arch/x86/include/asm/kvm_emulate.h

   1 /******************************************************************************
   2  * x86_emulate.h
   3  *
   4  * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
   5  *
   6  * Copyright (c) 2005 Keir Fraser
   7  *
   8  * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
   9  */
  10
  11 #ifndef _ASM_X86_KVM_X86_EMULATE_H
  12 #define _ASM_X86_KVM_X86_EMULATE_H
  13
  14 #include <asm/desc_defs.h>
  15
  16 struct x86_emulate_ctxt;
  17 enum x86_intercept;
  18 enum x86_intercept_stage;
  19
  20 struct x86_exception {
  21         u8 vector;
  22         bool error_code_valid;
  23         u16 error_code;
  24         bool nested_page_fault;
  25         u64 address; /* cr2 or nested page fault gpa */
  26 };
  27
  28 /*
  29  * This struct is used to carry enough information from the instruction
  30  * decoder to main KVM so that a decision can be made whether the
  31  * instruction needs to be intercepted or not.
  32  */
  33 struct x86_instruction_info {
  34         u8  intercept;          /* which intercept                      */
  35         u8  rep_prefix;         /* rep prefix?                          */
  36         u8  modrm_mod;          /* mod part of modrm                    */
  37         u8  modrm_reg;          /* index of register used               */
  38         u8  modrm_rm;           /* rm part of modrm                     */
  39         u64 src_val;            /* value of source operand              */
  40         u64 dst_val;            /* value of destination operand         */
  41         u8  src_bytes;          /* size of source operand               */
  42         u8  dst_bytes;          /* size of destination operand          */
  43         u8  ad_bytes;           /* size of src/dst address              */
  44         u64 next_rip;           /* rip following the instruction        */
  45 };
  46
  47 /*
  48  * x86_emulate_ops:
  49  *
  50  * These operations represent the instruction emulator's interface to memory.
  51  * There are two categories of operation: those that act on ordinary memory
  52  * regions (*_std), and those that act on memory regions known to require
  53  * special treatment or emulation (*_emulated).
  54  *
  55  * The emulator assumes that an instruction accesses only one 'emulated memory'
  56  * location, that this location is the given linear faulting address (cr2), and
  57  * that this is one of the instruction's data operands. Instruction fetches and
  58  * stack operations are assumed never to access emulated memory. The emulator
  59  * automatically deduces which operand of a string-move operation is accessing
  60  * emulated memory, and assumes that the other operand accesses normal memory.
  61  *
  62  * NOTES:
  63  *  1. The emulator isn't very smart about emulated vs. standard memory.
  64  *     'Emulated memory' access addresses should be checked for sanity.
  65  *     'Normal memory' accesses may fault, and the caller must arrange to
  66  *     detect and handle reentrancy into the emulator via recursive faults.
  67  *     Accesses may be unaligned and may cross page boundaries.
  68  *  2. If the access fails (cannot emulate, or a standard access faults) then
  69  *     it is up to the memop to propagate the fault to the guest VM via
  70  *     some out-of-band mechanism, unknown to the emulator. The memop signals
  71  *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
  72  *     then immediately bail.
  73  *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
  74  *     cmpxchg8b_emulated need support 8-byte accesses.
  75  *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
  76  */
  77 /* Access completed successfully: continue emulation as normal. */
  78 #define X86EMUL_CONTINUE        0
  79 /* Access is unhandleable: bail from emulation and return error to caller. */
  80 #define X86EMUL_UNHANDLEABLE    1
  81 /* Terminate emulation but return success to the caller. */
  82 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
  83 #define X86EMUL_RETRY_INSTR     3 /* retry the instruction for some reason */
  84 #define X86EMUL_CMPXCHG_FAILED  4 /* cmpxchg did not see expected value */
  85 #define X86EMUL_IO_NEEDED       5 /* IO is needed to complete emulation */
  86 #define X86EMUL_INTERCEPTED     6 /* Intercepted by nested VMCB/VMCS */
  87
  88 struct x86_emulate_ops {
  89         /*
  90          * read_gpr: read a general purpose register (rax - r15)
  91          *
  92          * @reg: gpr number.
  93          */
  94         ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
  95         /*
  96          * write_gpr: write a general purpose register (rax - r15)
  97          *
  98          * @reg: gpr number.
  99          * @val: value to write.
 100          */
 101         void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
 102         /*
 103          * read_std: Read bytes of standard (non-emulated/special) memory.
 104          *           Used for descriptor reading.
 105          *  @addr:  [IN ] Linear address from which to read.
 106          *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
 107          *  @bytes: [IN ] Number of bytes to read from memory.
 108          */
 109         int (*read_std)(struct x86_emulate_ctxt *ctxt,
 110                         unsigned long addr, void *val,
 111                         unsigned int bytes,
 112                         struct x86_exception *fault);
 113
 114         /*
 115          * write_std: Write bytes of standard (non-emulated/special) memory.
 116          *            Used for descriptor writing.
 117          *  @addr:  [IN ] Linear address to which to write.
 118          *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
 119          *  @bytes: [IN ] Number of bytes to write to memory.
 120          */
 121         int (*write_std)(struct x86_emulate_ctxt *ctxt,
 122                          unsigned long addr, void *val, unsigned int bytes,
 123                          struct x86_exception *fault);
 124         /*
 125          * fetch: Read bytes of standard (non-emulated/special) memory.
 126          *        Used for instruction fetch.
 127          *  @addr:  [IN ] Linear address from which to read.
 128          *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
 129          *  @bytes: [IN ] Number of bytes to read from memory.
 130          */
 131         int (*fetch)(struct x86_emulate_ctxt *ctxt,
 132                      unsigned long addr, void *val, unsigned int bytes,
 133                      struct x86_exception *fault);
 134
 135         /*
 136          * read_emulated: Read bytes from emulated/special memory area.
 137          *  @addr:  [IN ] Linear address from which to read.
 138          *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
 139          *  @bytes: [IN ] Number of bytes to read from memory.
 140          */
 141         int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
 142                              unsigned long addr, void *val, unsigned int bytes,
 143                              struct x86_exception *fault);
 144
 145         /*
 146          * write_emulated: Write bytes to emulated/special memory area.
 147          *  @addr:  [IN ] Linear address to which to write.
 148          *  @val:   [IN ] Value to write to memory (low-order bytes used as
 149          *                required).
 150          *  @bytes: [IN ] Number of bytes to write to memory.
 151          */
 152         int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
 153                               unsigned long addr, const void *val,
 154                               unsigned int bytes,
 155                               struct x86_exception *fault);
 156
 157         /*
 158          * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
 159          *                   emulated/special memory area.
 160          *  @addr:  [IN ] Linear address to access.
 161          *  @old:   [IN ] Value expected to be current at @addr.
 162          *  @new:   [IN ] Value to write to @addr.
 163          *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
 164          */
 165         int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
 166                                 unsigned long addr,
 167                                 const void *old,
 168                                 const void *new,
 169                                 unsigned int bytes,
 170                                 struct x86_exception *fault);
 171         void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
 172
 173         int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
 174                                int size, unsigned short port, void *val,
 175                                unsigned int count);
 176
 177         int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
 178                                 int size, unsigned short port, const void *val,
 179                                 unsigned int count);
 180
 181         bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
 182                             struct desc_struct *desc, u32 *base3, int seg);
 183         void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
 184                             struct desc_struct *desc, u32 base3, int seg);
 185         unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
 186                                                  int seg);
 187         void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
 188         void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
 189         void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
 190         void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
 191         ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
 192         int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
 193         int (*cpl)(struct x86_emulate_ctxt *ctxt);
 194         int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
 195         int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
 196         u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
 197         void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
 198         int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
 199         int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
 200         int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
 201         int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
 202         void (*halt)(struct x86_emulate_ctxt *ctxt);
 203         void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
 204         int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
 205         void (*get_fpu)(struct x86_emulate_ctxt *ctxt); /* disables preempt */
 206         void (*put_fpu)(struct x86_emulate_ctxt *ctxt); /* reenables preempt */
 207         int (*intercept)(struct x86_emulate_ctxt *ctxt,
 208                          struct x86_instruction_info *info,
 209                          enum x86_intercept_stage stage);
 210
 211         void (*get_cpuid)(struct x86_emulate_ctxt *ctxt,
 212                           u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
 213         void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
 214 };
 215
 216 typedef u32 __attribute__((vector_size(16))) sse128_t;
 217
 218 /* Type, address-of, and value of an instruction's operand. */
 219 struct operand {
 220         enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
 221         unsigned int bytes;
 222         unsigned int count;
 223         union {
 224                 unsigned long orig_val;
 225                 u64 orig_val64;
 226         };
 227         union {
 228                 unsigned long *reg;
 229                 struct segmented_address {
 230                         ulong ea;
 231                         unsigned seg;
 232                 } mem;
 233                 unsigned xmm;
 234                 unsigned mm;
 235         } addr;
 236         union {
 237                 unsigned long val;
 238                 u64 val64;
 239                 char valptr[sizeof(sse128_t)];
 240                 sse128_t vec_val;
 241                 u64 mm_val;
 242                 void *data;
 243         };
 244 };
 245
 246 struct fetch_cache {
 247         u8 data[15];
 248         u8 *ptr;
 249         u8 *end;
 250 };
 251
 252 struct read_cache {
 253         u8 data[1024];
 254         unsigned long pos;
 255         unsigned long end;
 256 };
 257
 258 /* Execution mode, passed to the emulator. */
 259 enum x86emul_mode {
 260         X86EMUL_MODE_REAL,      /* Real mode.             */
 261         X86EMUL_MODE_VM86,      /* Virtual 8086 mode.     */
 262         X86EMUL_MODE_PROT16,    /* 16-bit protected mode. */
 263         X86EMUL_MODE_PROT32,    /* 32-bit protected mode. */
 264         X86EMUL_MODE_PROT64,    /* 64-bit (long) mode.    */
 265 };
 266
 267 /* These match some of the HF_* flags defined in kvm_host.h  */
 268 #define X86EMUL_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
 269 #define X86EMUL_SMM_MASK             (1 << 6)
 270 #define X86EMUL_SMM_INSIDE_NMI_MASK  (1 << 7)
 271
 272 struct x86_emulate_ctxt {
 273         const struct x86_emulate_ops *ops;
 274
 275         /* Register state before/after emulation. */
 276         unsigned long eflags;
 277         unsigned long eip; /* eip before instruction emulation */
 278         /* Emulated execution mode, represented by an X86EMUL_MODE value. */
 279         enum x86emul_mode mode;
 280
 281         /* interruptibility state, as a result of execution of STI or MOV SS */
 282         int interruptibility;
 283         int emul_flags;
 284
 285         bool perm_ok; /* do not check permissions if true */
 286         bool ud;        /* inject an #UD if host doesn't support insn */
 287
 288         bool have_exception;
 289         struct x86_exception exception;
 290
 291         /*
 292          * decode cache
 293          */
 294
 295         /* current opcode length in bytes */
 296         u8 opcode_len;
 297         u8 b;
 298         u8 intercept;
 299         u8 op_bytes;
 300         u8 ad_bytes;
 301         struct operand src;
 302         struct operand src2;
 303         struct operand dst;
 304         int (*execute)(struct x86_emulate_ctxt *ctxt);
 305         int (*check_perm)(struct x86_emulate_ctxt *ctxt);
 306         /*
 307          * The following six fields are cleared together,
 308          * the rest are initialized unconditionally in x86_decode_insn
 309          * or elsewhere
 310          */
 311         bool rip_relative;
 312         u8 rex_prefix;
 313         u8 lock_prefix;
 314         u8 rep_prefix;
 315         /* bitmaps of registers in _regs[] that can be read */
 316         u32 regs_valid;
 317         /* bitmaps of registers in _regs[] that have been written */
 318         u32 regs_dirty;
 319         /* modrm */
 320         u8 modrm;
 321         u8 modrm_mod;
 322         u8 modrm_reg;
 323         u8 modrm_rm;
 324         u8 modrm_seg;
 325         u8 seg_override;
 326         u64 d;
 327         unsigned long _eip;
 328         struct operand memop;
 329         /* Fields above regs are cleared together. */
 330         unsigned long _regs[NR_VCPU_REGS];
 331         struct operand *memopp;
 332         struct fetch_cache fetch;
 333         struct read_cache io_read;
 334         struct read_cache mem_read;
 335 };
 336
 337 /* Repeat String Operation Prefix */
 338 #define REPE_PREFIX     0xf3
 339 #define REPNE_PREFIX    0xf2
 340
 341 /* CPUID vendors */
 342 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
 343 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
 344 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
 345
 346 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
 347 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
 348 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
 349
 350 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
 351 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
 352 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
 353
 354 enum x86_intercept_stage {
 355         X86_ICTP_NONE = 0,   /* Allow zero-init to not match anything */
 356         X86_ICPT_PRE_EXCEPT,
 357         X86_ICPT_POST_EXCEPT,
 358         X86_ICPT_POST_MEMACCESS,
 359 };
 360
 361 enum x86_intercept {
 362         x86_intercept_none,
 363         x86_intercept_cr_read,
 364         x86_intercept_cr_write,
 365         x86_intercept_clts,
 366         x86_intercept_lmsw,
 367         x86_intercept_smsw,
 368         x86_intercept_dr_read,
 369         x86_intercept_dr_write,
 370         x86_intercept_lidt,
 371         x86_intercept_sidt,
 372         x86_intercept_lgdt,
 373         x86_intercept_sgdt,
 374         x86_intercept_lldt,
 375         x86_intercept_sldt,
 376         x86_intercept_ltr,
 377         x86_intercept_str,
 378         x86_intercept_rdtsc,
 379         x86_intercept_rdpmc,
 380         x86_intercept_pushf,
 381         x86_intercept_popf,
 382         x86_intercept_cpuid,
 383         x86_intercept_rsm,
 384         x86_intercept_iret,
 385         x86_intercept_intn,
 386         x86_intercept_invd,
 387         x86_intercept_pause,
 388         x86_intercept_hlt,
 389         x86_intercept_invlpg,
 390         x86_intercept_invlpga,
 391         x86_intercept_vmrun,
 392         x86_intercept_vmload,
 393         x86_intercept_vmsave,
 394         x86_intercept_vmmcall,
 395         x86_intercept_stgi,
 396         x86_intercept_clgi,
 397         x86_intercept_skinit,
 398         x86_intercept_rdtscp,
 399         x86_intercept_icebp,
 400         x86_intercept_wbinvd,
 401         x86_intercept_monitor,
 402         x86_intercept_mwait,
 403         x86_intercept_rdmsr,
 404         x86_intercept_wrmsr,
 405         x86_intercept_in,
 406         x86_intercept_ins,
 407         x86_intercept_out,
 408         x86_intercept_outs,
 409
 410         nr_x86_intercepts
 411 };
 412
 413 /* Host execution mode. */
 414 #if defined(CONFIG_X86_32)
 415 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
 416 #elif defined(CONFIG_X86_64)
 417 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
 418 #endif
 419
 420 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
 421 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
 422 #define EMULATION_FAILED -1
 423 #define EMULATION_OK 0
 424 #define EMULATION_RESTART 1
 425 #define EMULATION_INTERCEPTED 2
 426 void init_decode_cache(struct x86_emulate_ctxt *ctxt);
 427 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
 428 int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
 429                          u16 tss_selector, int idt_index, int reason,
 430                          bool has_error_code, u32 error_code);
 431 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
 432 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
 433 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
 434
 435 #endif /* _ASM_X86_KVM_X86_EMULATE_H */