1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
17 static inline int paravirt_enabled(void)
19 return pv_info
.paravirt_enabled
;
22 static inline void load_sp0(struct tss_struct
*tss
,
23 struct thread_struct
*thread
)
25 PVOP_VCALL2(pv_cpu_ops
.load_sp0
, tss
, thread
);
28 /* The paravirtualized CPUID instruction. */
29 static inline void __cpuid(unsigned int *eax
, unsigned int *ebx
,
30 unsigned int *ecx
, unsigned int *edx
)
32 PVOP_VCALL4(pv_cpu_ops
.cpuid
, eax
, ebx
, ecx
, edx
);
36 * These special macros can be used to get or set a debugging register
38 static inline unsigned long paravirt_get_debugreg(int reg
)
40 return PVOP_CALL1(unsigned long, pv_cpu_ops
.get_debugreg
, reg
);
42 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
43 static inline void set_debugreg(unsigned long val
, int reg
)
45 PVOP_VCALL2(pv_cpu_ops
.set_debugreg
, reg
, val
);
48 static inline void clts(void)
50 PVOP_VCALL0(pv_cpu_ops
.clts
);
53 static inline unsigned long read_cr0(void)
55 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr0
);
58 static inline void write_cr0(unsigned long x
)
60 PVOP_VCALL1(pv_cpu_ops
.write_cr0
, x
);
63 static inline unsigned long read_cr2(void)
65 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr2
);
68 static inline void write_cr2(unsigned long x
)
70 PVOP_VCALL1(pv_mmu_ops
.write_cr2
, x
);
73 static inline unsigned long read_cr3(void)
75 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr3
);
78 static inline void write_cr3(unsigned long x
)
80 PVOP_VCALL1(pv_mmu_ops
.write_cr3
, x
);
83 static inline unsigned long __read_cr4(void)
85 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4
);
87 static inline unsigned long __read_cr4_safe(void)
89 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4_safe
);
92 static inline void __write_cr4(unsigned long x
)
94 PVOP_VCALL1(pv_cpu_ops
.write_cr4
, x
);
98 static inline unsigned long read_cr8(void)
100 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr8
);
103 static inline void write_cr8(unsigned long x
)
105 PVOP_VCALL1(pv_cpu_ops
.write_cr8
, x
);
109 static inline void arch_safe_halt(void)
111 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
114 static inline void halt(void)
116 PVOP_VCALL0(pv_irq_ops
.halt
);
119 static inline void wbinvd(void)
121 PVOP_VCALL0(pv_cpu_ops
.wbinvd
);
124 #define get_kernel_rpl() (pv_info.kernel_rpl)
126 static inline u64
paravirt_read_msr(unsigned msr
, int *err
)
128 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr
, msr
, err
);
131 static inline int paravirt_write_msr(unsigned msr
, unsigned low
, unsigned high
)
133 return PVOP_CALL3(int, pv_cpu_ops
.write_msr
, msr
, low
, high
);
136 /* These should all do BUG_ON(_err), but our headers are too tangled. */
137 #define rdmsr(msr, val1, val2) \
140 u64 _l = paravirt_read_msr(msr, &_err); \
145 #define wrmsr(msr, val1, val2) \
147 paravirt_write_msr(msr, val1, val2); \
150 #define rdmsrl(msr, val) \
153 val = paravirt_read_msr(msr, &_err); \
156 static inline void wrmsrl(unsigned msr
, u64 val
)
158 wrmsr(msr
, (u32
)val
, (u32
)(val
>>32));
161 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
163 /* rdmsr with exception handling */
164 #define rdmsr_safe(msr, a, b) \
167 u64 _l = paravirt_read_msr(msr, &_err); \
173 static inline int rdmsrl_safe(unsigned msr
, unsigned long long *p
)
177 *p
= paravirt_read_msr(msr
, &err
);
181 static inline unsigned long long paravirt_sched_clock(void)
183 return PVOP_CALL0(unsigned long long, pv_time_ops
.sched_clock
);
187 extern struct static_key paravirt_steal_enabled
;
188 extern struct static_key paravirt_steal_rq_enabled
;
190 static inline u64
paravirt_steal_clock(int cpu
)
192 return PVOP_CALL1(u64
, pv_time_ops
.steal_clock
, cpu
);
195 static inline unsigned long long paravirt_read_pmc(int counter
)
197 return PVOP_CALL1(u64
, pv_cpu_ops
.read_pmc
, counter
);
200 #define rdpmc(counter, low, high) \
202 u64 _l = paravirt_read_pmc(counter); \
207 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
209 static inline void paravirt_alloc_ldt(struct desc_struct
*ldt
, unsigned entries
)
211 PVOP_VCALL2(pv_cpu_ops
.alloc_ldt
, ldt
, entries
);
214 static inline void paravirt_free_ldt(struct desc_struct
*ldt
, unsigned entries
)
216 PVOP_VCALL2(pv_cpu_ops
.free_ldt
, ldt
, entries
);
219 static inline void load_TR_desc(void)
221 PVOP_VCALL0(pv_cpu_ops
.load_tr_desc
);
223 static inline void load_gdt(const struct desc_ptr
*dtr
)
225 PVOP_VCALL1(pv_cpu_ops
.load_gdt
, dtr
);
227 static inline void load_idt(const struct desc_ptr
*dtr
)
229 PVOP_VCALL1(pv_cpu_ops
.load_idt
, dtr
);
231 static inline void set_ldt(const void *addr
, unsigned entries
)
233 PVOP_VCALL2(pv_cpu_ops
.set_ldt
, addr
, entries
);
235 static inline void store_idt(struct desc_ptr
*dtr
)
237 PVOP_VCALL1(pv_cpu_ops
.store_idt
, dtr
);
239 static inline unsigned long paravirt_store_tr(void)
241 return PVOP_CALL0(unsigned long, pv_cpu_ops
.store_tr
);
243 #define store_tr(tr) ((tr) = paravirt_store_tr())
244 static inline void load_TLS(struct thread_struct
*t
, unsigned cpu
)
246 PVOP_VCALL2(pv_cpu_ops
.load_tls
, t
, cpu
);
250 static inline void load_gs_index(unsigned int gs
)
252 PVOP_VCALL1(pv_cpu_ops
.load_gs_index
, gs
);
256 static inline void write_ldt_entry(struct desc_struct
*dt
, int entry
,
259 PVOP_VCALL3(pv_cpu_ops
.write_ldt_entry
, dt
, entry
, desc
);
262 static inline void write_gdt_entry(struct desc_struct
*dt
, int entry
,
263 void *desc
, int type
)
265 PVOP_VCALL4(pv_cpu_ops
.write_gdt_entry
, dt
, entry
, desc
, type
);
268 static inline void write_idt_entry(gate_desc
*dt
, int entry
, const gate_desc
*g
)
270 PVOP_VCALL3(pv_cpu_ops
.write_idt_entry
, dt
, entry
, g
);
272 static inline void set_iopl_mask(unsigned mask
)
274 PVOP_VCALL1(pv_cpu_ops
.set_iopl_mask
, mask
);
277 /* The paravirtualized I/O functions */
278 static inline void slow_down_io(void)
280 pv_cpu_ops
.io_delay();
281 #ifdef REALLY_SLOW_IO
282 pv_cpu_ops
.io_delay();
283 pv_cpu_ops
.io_delay();
284 pv_cpu_ops
.io_delay();
289 static inline void startup_ipi_hook(int phys_apicid
, unsigned long start_eip
,
290 unsigned long start_esp
)
292 PVOP_VCALL3(pv_apic_ops
.startup_ipi_hook
,
293 phys_apicid
, start_eip
, start_esp
);
297 static inline void paravirt_activate_mm(struct mm_struct
*prev
,
298 struct mm_struct
*next
)
300 PVOP_VCALL2(pv_mmu_ops
.activate_mm
, prev
, next
);
303 static inline void paravirt_arch_dup_mmap(struct mm_struct
*oldmm
,
304 struct mm_struct
*mm
)
306 PVOP_VCALL2(pv_mmu_ops
.dup_mmap
, oldmm
, mm
);
309 static inline void paravirt_arch_exit_mmap(struct mm_struct
*mm
)
311 PVOP_VCALL1(pv_mmu_ops
.exit_mmap
, mm
);
314 static inline void __flush_tlb(void)
316 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_user
);
318 static inline void __flush_tlb_global(void)
320 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_kernel
);
322 static inline void __flush_tlb_single(unsigned long addr
)
324 PVOP_VCALL1(pv_mmu_ops
.flush_tlb_single
, addr
);
327 static inline void flush_tlb_others(const struct cpumask
*cpumask
,
328 struct mm_struct
*mm
,
332 PVOP_VCALL4(pv_mmu_ops
.flush_tlb_others
, cpumask
, mm
, start
, end
);
335 static inline int paravirt_pgd_alloc(struct mm_struct
*mm
)
337 return PVOP_CALL1(int, pv_mmu_ops
.pgd_alloc
, mm
);
340 static inline void paravirt_pgd_free(struct mm_struct
*mm
, pgd_t
*pgd
)
342 PVOP_VCALL2(pv_mmu_ops
.pgd_free
, mm
, pgd
);
345 static inline void paravirt_alloc_pte(struct mm_struct
*mm
, unsigned long pfn
)
347 PVOP_VCALL2(pv_mmu_ops
.alloc_pte
, mm
, pfn
);
349 static inline void paravirt_release_pte(unsigned long pfn
)
351 PVOP_VCALL1(pv_mmu_ops
.release_pte
, pfn
);
354 static inline void paravirt_alloc_pmd(struct mm_struct
*mm
, unsigned long pfn
)
356 PVOP_VCALL2(pv_mmu_ops
.alloc_pmd
, mm
, pfn
);
359 static inline void paravirt_release_pmd(unsigned long pfn
)
361 PVOP_VCALL1(pv_mmu_ops
.release_pmd
, pfn
);
364 static inline void paravirt_alloc_pud(struct mm_struct
*mm
, unsigned long pfn
)
366 PVOP_VCALL2(pv_mmu_ops
.alloc_pud
, mm
, pfn
);
368 static inline void paravirt_release_pud(unsigned long pfn
)
370 PVOP_VCALL1(pv_mmu_ops
.release_pud
, pfn
);
373 static inline void pte_update(struct mm_struct
*mm
, unsigned long addr
,
376 PVOP_VCALL3(pv_mmu_ops
.pte_update
, mm
, addr
, ptep
);
378 static inline void pmd_update(struct mm_struct
*mm
, unsigned long addr
,
381 PVOP_VCALL3(pv_mmu_ops
.pmd_update
, mm
, addr
, pmdp
);
384 static inline void pte_update_defer(struct mm_struct
*mm
, unsigned long addr
,
387 PVOP_VCALL3(pv_mmu_ops
.pte_update_defer
, mm
, addr
, ptep
);
390 static inline void pmd_update_defer(struct mm_struct
*mm
, unsigned long addr
,
393 PVOP_VCALL3(pv_mmu_ops
.pmd_update_defer
, mm
, addr
, pmdp
);
396 static inline pte_t
__pte(pteval_t val
)
400 if (sizeof(pteval_t
) > sizeof(long))
401 ret
= PVOP_CALLEE2(pteval_t
,
403 val
, (u64
)val
>> 32);
405 ret
= PVOP_CALLEE1(pteval_t
,
409 return (pte_t
) { .pte
= ret
};
412 static inline pteval_t
pte_val(pte_t pte
)
416 if (sizeof(pteval_t
) > sizeof(long))
417 ret
= PVOP_CALLEE2(pteval_t
, pv_mmu_ops
.pte_val
,
418 pte
.pte
, (u64
)pte
.pte
>> 32);
420 ret
= PVOP_CALLEE1(pteval_t
, pv_mmu_ops
.pte_val
,
426 static inline pgd_t
__pgd(pgdval_t val
)
430 if (sizeof(pgdval_t
) > sizeof(long))
431 ret
= PVOP_CALLEE2(pgdval_t
, pv_mmu_ops
.make_pgd
,
432 val
, (u64
)val
>> 32);
434 ret
= PVOP_CALLEE1(pgdval_t
, pv_mmu_ops
.make_pgd
,
437 return (pgd_t
) { ret
};
440 static inline pgdval_t
pgd_val(pgd_t pgd
)
444 if (sizeof(pgdval_t
) > sizeof(long))
445 ret
= PVOP_CALLEE2(pgdval_t
, pv_mmu_ops
.pgd_val
,
446 pgd
.pgd
, (u64
)pgd
.pgd
>> 32);
448 ret
= PVOP_CALLEE1(pgdval_t
, pv_mmu_ops
.pgd_val
,
454 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
455 static inline pte_t
ptep_modify_prot_start(struct mm_struct
*mm
, unsigned long addr
,
460 ret
= PVOP_CALL3(pteval_t
, pv_mmu_ops
.ptep_modify_prot_start
,
463 return (pte_t
) { .pte
= ret
};
466 static inline void ptep_modify_prot_commit(struct mm_struct
*mm
, unsigned long addr
,
467 pte_t
*ptep
, pte_t pte
)
469 if (sizeof(pteval_t
) > sizeof(long))
471 pv_mmu_ops
.ptep_modify_prot_commit(mm
, addr
, ptep
, pte
);
473 PVOP_VCALL4(pv_mmu_ops
.ptep_modify_prot_commit
,
474 mm
, addr
, ptep
, pte
.pte
);
477 static inline void set_pte(pte_t
*ptep
, pte_t pte
)
479 if (sizeof(pteval_t
) > sizeof(long))
480 PVOP_VCALL3(pv_mmu_ops
.set_pte
, ptep
,
481 pte
.pte
, (u64
)pte
.pte
>> 32);
483 PVOP_VCALL2(pv_mmu_ops
.set_pte
, ptep
,
487 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
488 pte_t
*ptep
, pte_t pte
)
490 if (sizeof(pteval_t
) > sizeof(long))
492 pv_mmu_ops
.set_pte_at(mm
, addr
, ptep
, pte
);
494 PVOP_VCALL4(pv_mmu_ops
.set_pte_at
, mm
, addr
, ptep
, pte
.pte
);
497 static inline void set_pmd_at(struct mm_struct
*mm
, unsigned long addr
,
498 pmd_t
*pmdp
, pmd_t pmd
)
500 if (sizeof(pmdval_t
) > sizeof(long))
502 pv_mmu_ops
.set_pmd_at(mm
, addr
, pmdp
, pmd
);
504 PVOP_VCALL4(pv_mmu_ops
.set_pmd_at
, mm
, addr
, pmdp
,
505 native_pmd_val(pmd
));
508 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmd
)
510 pmdval_t val
= native_pmd_val(pmd
);
512 if (sizeof(pmdval_t
) > sizeof(long))
513 PVOP_VCALL3(pv_mmu_ops
.set_pmd
, pmdp
, val
, (u64
)val
>> 32);
515 PVOP_VCALL2(pv_mmu_ops
.set_pmd
, pmdp
, val
);
518 #if CONFIG_PGTABLE_LEVELS >= 3
519 static inline pmd_t
__pmd(pmdval_t val
)
523 if (sizeof(pmdval_t
) > sizeof(long))
524 ret
= PVOP_CALLEE2(pmdval_t
, pv_mmu_ops
.make_pmd
,
525 val
, (u64
)val
>> 32);
527 ret
= PVOP_CALLEE1(pmdval_t
, pv_mmu_ops
.make_pmd
,
530 return (pmd_t
) { ret
};
533 static inline pmdval_t
pmd_val(pmd_t pmd
)
537 if (sizeof(pmdval_t
) > sizeof(long))
538 ret
= PVOP_CALLEE2(pmdval_t
, pv_mmu_ops
.pmd_val
,
539 pmd
.pmd
, (u64
)pmd
.pmd
>> 32);
541 ret
= PVOP_CALLEE1(pmdval_t
, pv_mmu_ops
.pmd_val
,
547 static inline void set_pud(pud_t
*pudp
, pud_t pud
)
549 pudval_t val
= native_pud_val(pud
);
551 if (sizeof(pudval_t
) > sizeof(long))
552 PVOP_VCALL3(pv_mmu_ops
.set_pud
, pudp
,
553 val
, (u64
)val
>> 32);
555 PVOP_VCALL2(pv_mmu_ops
.set_pud
, pudp
,
558 #if CONFIG_PGTABLE_LEVELS == 4
559 static inline pud_t
__pud(pudval_t val
)
563 if (sizeof(pudval_t
) > sizeof(long))
564 ret
= PVOP_CALLEE2(pudval_t
, pv_mmu_ops
.make_pud
,
565 val
, (u64
)val
>> 32);
567 ret
= PVOP_CALLEE1(pudval_t
, pv_mmu_ops
.make_pud
,
570 return (pud_t
) { ret
};
573 static inline pudval_t
pud_val(pud_t pud
)
577 if (sizeof(pudval_t
) > sizeof(long))
578 ret
= PVOP_CALLEE2(pudval_t
, pv_mmu_ops
.pud_val
,
579 pud
.pud
, (u64
)pud
.pud
>> 32);
581 ret
= PVOP_CALLEE1(pudval_t
, pv_mmu_ops
.pud_val
,
587 static inline void set_pgd(pgd_t
*pgdp
, pgd_t pgd
)
589 pgdval_t val
= native_pgd_val(pgd
);
591 if (sizeof(pgdval_t
) > sizeof(long))
592 PVOP_VCALL3(pv_mmu_ops
.set_pgd
, pgdp
,
593 val
, (u64
)val
>> 32);
595 PVOP_VCALL2(pv_mmu_ops
.set_pgd
, pgdp
,
599 static inline void pgd_clear(pgd_t
*pgdp
)
601 set_pgd(pgdp
, __pgd(0));
604 static inline void pud_clear(pud_t
*pudp
)
606 set_pud(pudp
, __pud(0));
609 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
611 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
613 #ifdef CONFIG_X86_PAE
614 /* Special-case pte-setting operations for PAE, which can't update a
615 64-bit pte atomically */
616 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
618 PVOP_VCALL3(pv_mmu_ops
.set_pte_atomic
, ptep
,
619 pte
.pte
, pte
.pte
>> 32);
622 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
625 PVOP_VCALL3(pv_mmu_ops
.pte_clear
, mm
, addr
, ptep
);
628 static inline void pmd_clear(pmd_t
*pmdp
)
630 PVOP_VCALL1(pv_mmu_ops
.pmd_clear
, pmdp
);
632 #else /* !CONFIG_X86_PAE */
633 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
638 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
641 set_pte_at(mm
, addr
, ptep
, __pte(0));
644 static inline void pmd_clear(pmd_t
*pmdp
)
646 set_pmd(pmdp
, __pmd(0));
648 #endif /* CONFIG_X86_PAE */
650 #define __HAVE_ARCH_START_CONTEXT_SWITCH
651 static inline void arch_start_context_switch(struct task_struct
*prev
)
653 PVOP_VCALL1(pv_cpu_ops
.start_context_switch
, prev
);
656 static inline void arch_end_context_switch(struct task_struct
*next
)
658 PVOP_VCALL1(pv_cpu_ops
.end_context_switch
, next
);
661 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
662 static inline void arch_enter_lazy_mmu_mode(void)
664 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.enter
);
667 static inline void arch_leave_lazy_mmu_mode(void)
669 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.leave
);
672 static inline void arch_flush_lazy_mmu_mode(void)
674 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.flush
);
677 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx
,
678 phys_addr_t phys
, pgprot_t flags
)
680 pv_mmu_ops
.set_fixmap(idx
, phys
, flags
);
683 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
685 #ifdef CONFIG_QUEUED_SPINLOCKS
687 static __always_inline
void pv_queued_spin_lock_slowpath(struct qspinlock
*lock
,
690 PVOP_VCALL2(pv_lock_ops
.queued_spin_lock_slowpath
, lock
, val
);
693 static __always_inline
void pv_queued_spin_unlock(struct qspinlock
*lock
)
695 PVOP_VCALLEE1(pv_lock_ops
.queued_spin_unlock
, lock
);
698 static __always_inline
void pv_wait(u8
*ptr
, u8 val
)
700 PVOP_VCALL2(pv_lock_ops
.wait
, ptr
, val
);
703 static __always_inline
void pv_kick(int cpu
)
705 PVOP_VCALL1(pv_lock_ops
.kick
, cpu
);
708 #else /* !CONFIG_QUEUED_SPINLOCKS */
710 static __always_inline
void __ticket_lock_spinning(struct arch_spinlock
*lock
,
713 PVOP_VCALLEE2(pv_lock_ops
.lock_spinning
, lock
, ticket
);
716 static __always_inline
void __ticket_unlock_kick(struct arch_spinlock
*lock
,
719 PVOP_VCALL2(pv_lock_ops
.unlock_kick
, lock
, ticket
);
722 #endif /* CONFIG_QUEUED_SPINLOCKS */
724 #endif /* SMP && PARAVIRT_SPINLOCKS */
727 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
728 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
730 /* save and restore all caller-save registers, except return value */
731 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
732 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
734 #define PV_FLAGS_ARG "0"
735 #define PV_EXTRA_CLOBBERS
736 #define PV_VEXTRA_CLOBBERS
738 /* save and restore all caller-save registers, except return value */
739 #define PV_SAVE_ALL_CALLER_REGS \
748 #define PV_RESTORE_ALL_CALLER_REGS \
758 /* We save some registers, but all of them, that's too much. We clobber all
759 * caller saved registers but the argument parameter */
760 #define PV_SAVE_REGS "pushq %%rdi;"
761 #define PV_RESTORE_REGS "popq %%rdi;"
762 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
763 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
764 #define PV_FLAGS_ARG "D"
768 * Generate a thunk around a function which saves all caller-save
769 * registers except for the return value. This allows C functions to
770 * be called from assembler code where fewer than normal registers are
771 * available. It may also help code generation around calls from C
772 * code if the common case doesn't use many registers.
774 * When a callee is wrapped in a thunk, the caller can assume that all
775 * arg regs and all scratch registers are preserved across the
776 * call. The return value in rax/eax will not be saved, even for void
779 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
780 extern typeof(func) __raw_callee_save_##func; \
782 asm(".pushsection .text;" \
783 ".globl __raw_callee_save_" #func " ; " \
784 "__raw_callee_save_" #func ": " \
785 PV_SAVE_ALL_CALLER_REGS \
787 PV_RESTORE_ALL_CALLER_REGS \
791 /* Get a reference to a callee-save function */
792 #define PV_CALLEE_SAVE(func) \
793 ((struct paravirt_callee_save) { __raw_callee_save_##func })
795 /* Promise that "func" already uses the right calling convention */
796 #define __PV_IS_CALLEE_SAVE(func) \
797 ((struct paravirt_callee_save) { func })
799 static inline notrace
unsigned long arch_local_save_flags(void)
801 return PVOP_CALLEE0(unsigned long, pv_irq_ops
.save_fl
);
804 static inline notrace
void arch_local_irq_restore(unsigned long f
)
806 PVOP_VCALLEE1(pv_irq_ops
.restore_fl
, f
);
809 static inline notrace
void arch_local_irq_disable(void)
811 PVOP_VCALLEE0(pv_irq_ops
.irq_disable
);
814 static inline notrace
void arch_local_irq_enable(void)
816 PVOP_VCALLEE0(pv_irq_ops
.irq_enable
);
819 static inline notrace
unsigned long arch_local_irq_save(void)
823 f
= arch_local_save_flags();
824 arch_local_irq_disable();
829 /* Make sure as little as possible of this mess escapes. */
844 extern void default_banner(void);
846 #else /* __ASSEMBLY__ */
848 #define _PVSITE(ptype, clobbers, ops, word, algn) \
852 .pushsection .parainstructions,"a"; \
861 #define COND_PUSH(set, mask, reg) \
862 .if ((~(set)) & mask); push %reg; .endif
863 #define COND_POP(set, mask, reg) \
864 .if ((~(set)) & mask); pop %reg; .endif
868 #define PV_SAVE_REGS(set) \
869 COND_PUSH(set, CLBR_RAX, rax); \
870 COND_PUSH(set, CLBR_RCX, rcx); \
871 COND_PUSH(set, CLBR_RDX, rdx); \
872 COND_PUSH(set, CLBR_RSI, rsi); \
873 COND_PUSH(set, CLBR_RDI, rdi); \
874 COND_PUSH(set, CLBR_R8, r8); \
875 COND_PUSH(set, CLBR_R9, r9); \
876 COND_PUSH(set, CLBR_R10, r10); \
877 COND_PUSH(set, CLBR_R11, r11)
878 #define PV_RESTORE_REGS(set) \
879 COND_POP(set, CLBR_R11, r11); \
880 COND_POP(set, CLBR_R10, r10); \
881 COND_POP(set, CLBR_R9, r9); \
882 COND_POP(set, CLBR_R8, r8); \
883 COND_POP(set, CLBR_RDI, rdi); \
884 COND_POP(set, CLBR_RSI, rsi); \
885 COND_POP(set, CLBR_RDX, rdx); \
886 COND_POP(set, CLBR_RCX, rcx); \
887 COND_POP(set, CLBR_RAX, rax)
889 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
890 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
891 #define PARA_INDIRECT(addr) *addr(%rip)
893 #define PV_SAVE_REGS(set) \
894 COND_PUSH(set, CLBR_EAX, eax); \
895 COND_PUSH(set, CLBR_EDI, edi); \
896 COND_PUSH(set, CLBR_ECX, ecx); \
897 COND_PUSH(set, CLBR_EDX, edx)
898 #define PV_RESTORE_REGS(set) \
899 COND_POP(set, CLBR_EDX, edx); \
900 COND_POP(set, CLBR_ECX, ecx); \
901 COND_POP(set, CLBR_EDI, edi); \
902 COND_POP(set, CLBR_EAX, eax)
904 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
905 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
906 #define PARA_INDIRECT(addr) *%cs:addr
909 #define INTERRUPT_RETURN \
910 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
911 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
913 #define DISABLE_INTERRUPTS(clobbers) \
914 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
915 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
916 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
917 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
919 #define ENABLE_INTERRUPTS(clobbers) \
920 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
921 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
922 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
923 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
925 #define USERGS_SYSRET32 \
926 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
928 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
931 #define GET_CR0_INTO_EAX \
932 push %ecx; push %edx; \
933 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
936 #define ENABLE_INTERRUPTS_SYSEXIT \
937 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
939 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
942 #else /* !CONFIG_X86_32 */
945 * If swapgs is used while the userspace stack is still current,
946 * there's no way to call a pvop. The PV replacement *must* be
947 * inlined, or the swapgs instruction must be trapped and emulated.
949 #define SWAPGS_UNSAFE_STACK \
950 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
954 * Note: swapgs is very special, and in practise is either going to be
955 * implemented with a single "swapgs" instruction or something very
956 * special. Either way, we don't need to save any registers for
960 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
961 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
964 #define GET_CR2_INTO_RAX \
965 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
967 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
968 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
970 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
972 #define USERGS_SYSRET64 \
973 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
975 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
976 #endif /* CONFIG_X86_32 */
978 #endif /* __ASSEMBLY__ */
979 #else /* CONFIG_PARAVIRT */
980 # define default_banner x86_init_noop
982 static inline void paravirt_arch_dup_mmap(struct mm_struct
*oldmm
,
983 struct mm_struct
*mm
)
987 static inline void paravirt_arch_exit_mmap(struct mm_struct
*mm
)
990 #endif /* __ASSEMBLY__ */
991 #endif /* !CONFIG_PARAVIRT */
992 #endif /* _ASM_X86_PARAVIRT_H */