Merge tag 'dm-4.2-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/device...
[deliverable/linux.git] / arch / x86 / include / asm / paravirt_types.h
1 #ifndef _ASM_X86_PARAVIRT_TYPES_H
2 #define _ASM_X86_PARAVIRT_TYPES_H
3
4 /* Bitmask of what can be clobbered: usually at least eax. */
5 #define CLBR_NONE 0
6 #define CLBR_EAX (1 << 0)
7 #define CLBR_ECX (1 << 1)
8 #define CLBR_EDX (1 << 2)
9 #define CLBR_EDI (1 << 3)
10
11 #ifdef CONFIG_X86_32
12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
13 #define CLBR_ANY ((1 << 4) - 1)
14
15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17 #define CLBR_SCRATCH (0)
18 #else
19 #define CLBR_RAX CLBR_EAX
20 #define CLBR_RCX CLBR_ECX
21 #define CLBR_RDX CLBR_EDX
22 #define CLBR_RDI CLBR_EDI
23 #define CLBR_RSI (1 << 4)
24 #define CLBR_R8 (1 << 5)
25 #define CLBR_R9 (1 << 6)
26 #define CLBR_R10 (1 << 7)
27 #define CLBR_R11 (1 << 8)
28
29 #define CLBR_ANY ((1 << 9) - 1)
30
31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33 #define CLBR_RET_REG (CLBR_RAX)
34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
35
36 #endif /* X86_64 */
37
38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
39
40 #ifndef __ASSEMBLY__
41
42 #include <asm/desc_defs.h>
43 #include <asm/kmap_types.h>
44 #include <asm/pgtable_types.h>
45
46 struct page;
47 struct thread_struct;
48 struct desc_ptr;
49 struct tss_struct;
50 struct mm_struct;
51 struct desc_struct;
52 struct task_struct;
53 struct cpumask;
54
55 /*
56 * Wrapper type for pointers to code which uses the non-standard
57 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
58 */
59 struct paravirt_callee_save {
60 void *func;
61 };
62
63 /* general info */
64 struct pv_info {
65 unsigned int kernel_rpl;
66 int shared_kernel_pmd;
67
68 #ifdef CONFIG_X86_64
69 u16 extra_user_64bit_cs; /* __USER_CS if none */
70 #endif
71
72 int paravirt_enabled;
73 const char *name;
74 };
75
76 struct pv_init_ops {
77 /*
78 * Patch may replace one of the defined code sequences with
79 * arbitrary code, subject to the same register constraints.
80 * This generally means the code is not free to clobber any
81 * registers other than EAX. The patch function should return
82 * the number of bytes of code generated, as we nop pad the
83 * rest in generic code.
84 */
85 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
86 unsigned long addr, unsigned len);
87 };
88
89
90 struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void);
93 void (*leave)(void);
94 void (*flush)(void);
95 };
96
97 struct pv_time_ops {
98 unsigned long long (*sched_clock)(void);
99 unsigned long long (*steal_clock)(int cpu);
100 unsigned long (*get_tsc_khz)(void);
101 };
102
103 struct pv_cpu_ops {
104 /* hooks for various privileged instructions */
105 unsigned long (*get_debugreg)(int regno);
106 void (*set_debugreg)(int regno, unsigned long value);
107
108 void (*clts)(void);
109
110 unsigned long (*read_cr0)(void);
111 void (*write_cr0)(unsigned long);
112
113 unsigned long (*read_cr4_safe)(void);
114 unsigned long (*read_cr4)(void);
115 void (*write_cr4)(unsigned long);
116
117 #ifdef CONFIG_X86_64
118 unsigned long (*read_cr8)(void);
119 void (*write_cr8)(unsigned long);
120 #endif
121
122 /* Segment descriptor handling */
123 void (*load_tr_desc)(void);
124 void (*load_gdt)(const struct desc_ptr *);
125 void (*load_idt)(const struct desc_ptr *);
126 /* store_gdt has been removed. */
127 void (*store_idt)(struct desc_ptr *);
128 void (*set_ldt)(const void *desc, unsigned entries);
129 unsigned long (*store_tr)(void);
130 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
131 #ifdef CONFIG_X86_64
132 void (*load_gs_index)(unsigned int idx);
133 #endif
134 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
135 const void *desc);
136 void (*write_gdt_entry)(struct desc_struct *,
137 int entrynum, const void *desc, int size);
138 void (*write_idt_entry)(gate_desc *,
139 int entrynum, const gate_desc *gate);
140 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
141 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
142
143 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
144
145 void (*set_iopl_mask)(unsigned mask);
146
147 void (*wbinvd)(void);
148 void (*io_delay)(void);
149
150 /* cpuid emulation, mostly so that caps bits can be disabled */
151 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
152 unsigned int *ecx, unsigned int *edx);
153
154 /* MSR, PMC and TSR operations.
155 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
156 u64 (*read_msr)(unsigned int msr, int *err);
157 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
158
159 u64 (*read_tsc)(void);
160 u64 (*read_pmc)(int counter);
161 unsigned long long (*read_tscp)(unsigned int *aux);
162
163 #ifdef CONFIG_X86_32
164 /*
165 * Atomically enable interrupts and return to userspace. This
166 * is only used in 32-bit kernels. 64-bit kernels use
167 * usergs_sysret32 instead.
168 */
169 void (*irq_enable_sysexit)(void);
170 #endif
171
172 /*
173 * Switch to usermode gs and return to 64-bit usermode using
174 * sysret. Only used in 64-bit kernels to return to 64-bit
175 * processes. Usermode register state, including %rsp, must
176 * already be restored.
177 */
178 void (*usergs_sysret64)(void);
179
180 /*
181 * Switch to usermode gs and return to 32-bit usermode using
182 * sysret. Used to return to 32-on-64 compat processes.
183 * Other usermode register state, including %esp, must already
184 * be restored.
185 */
186 void (*usergs_sysret32)(void);
187
188 /* Normal iret. Jump to this with the standard iret stack
189 frame set up. */
190 void (*iret)(void);
191
192 void (*swapgs)(void);
193
194 void (*start_context_switch)(struct task_struct *prev);
195 void (*end_context_switch)(struct task_struct *next);
196 };
197
198 struct pv_irq_ops {
199 /*
200 * Get/set interrupt state. save_fl and restore_fl are only
201 * expected to use X86_EFLAGS_IF; all other bits
202 * returned from save_fl are undefined, and may be ignored by
203 * restore_fl.
204 *
205 * NOTE: These functions callers expect the callee to preserve
206 * more registers than the standard C calling convention.
207 */
208 struct paravirt_callee_save save_fl;
209 struct paravirt_callee_save restore_fl;
210 struct paravirt_callee_save irq_disable;
211 struct paravirt_callee_save irq_enable;
212
213 void (*safe_halt)(void);
214 void (*halt)(void);
215
216 #ifdef CONFIG_X86_64
217 void (*adjust_exception_frame)(void);
218 #endif
219 };
220
221 struct pv_apic_ops {
222 #ifdef CONFIG_X86_LOCAL_APIC
223 void (*startup_ipi_hook)(int phys_apicid,
224 unsigned long start_eip,
225 unsigned long start_esp);
226 #endif
227 };
228
229 struct pv_mmu_ops {
230 unsigned long (*read_cr2)(void);
231 void (*write_cr2)(unsigned long);
232
233 unsigned long (*read_cr3)(void);
234 void (*write_cr3)(unsigned long);
235
236 /*
237 * Hooks for intercepting the creation/use/destruction of an
238 * mm_struct.
239 */
240 void (*activate_mm)(struct mm_struct *prev,
241 struct mm_struct *next);
242 void (*dup_mmap)(struct mm_struct *oldmm,
243 struct mm_struct *mm);
244 void (*exit_mmap)(struct mm_struct *mm);
245
246
247 /* TLB operations */
248 void (*flush_tlb_user)(void);
249 void (*flush_tlb_kernel)(void);
250 void (*flush_tlb_single)(unsigned long addr);
251 void (*flush_tlb_others)(const struct cpumask *cpus,
252 struct mm_struct *mm,
253 unsigned long start,
254 unsigned long end);
255
256 /* Hooks for allocating and freeing a pagetable top-level */
257 int (*pgd_alloc)(struct mm_struct *mm);
258 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
259
260 /*
261 * Hooks for allocating/releasing pagetable pages when they're
262 * attached to a pagetable
263 */
264 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
265 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
266 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
267 void (*release_pte)(unsigned long pfn);
268 void (*release_pmd)(unsigned long pfn);
269 void (*release_pud)(unsigned long pfn);
270
271 /* Pagetable manipulation functions */
272 void (*set_pte)(pte_t *ptep, pte_t pteval);
273 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
274 pte_t *ptep, pte_t pteval);
275 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
276 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr,
277 pmd_t *pmdp, pmd_t pmdval);
278 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
279 pte_t *ptep);
280 void (*pte_update_defer)(struct mm_struct *mm,
281 unsigned long addr, pte_t *ptep);
282 void (*pmd_update)(struct mm_struct *mm, unsigned long addr,
283 pmd_t *pmdp);
284 void (*pmd_update_defer)(struct mm_struct *mm,
285 unsigned long addr, pmd_t *pmdp);
286
287 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
288 pte_t *ptep);
289 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
290 pte_t *ptep, pte_t pte);
291
292 struct paravirt_callee_save pte_val;
293 struct paravirt_callee_save make_pte;
294
295 struct paravirt_callee_save pgd_val;
296 struct paravirt_callee_save make_pgd;
297
298 #if CONFIG_PGTABLE_LEVELS >= 3
299 #ifdef CONFIG_X86_PAE
300 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
301 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
302 pte_t *ptep);
303 void (*pmd_clear)(pmd_t *pmdp);
304
305 #endif /* CONFIG_X86_PAE */
306
307 void (*set_pud)(pud_t *pudp, pud_t pudval);
308
309 struct paravirt_callee_save pmd_val;
310 struct paravirt_callee_save make_pmd;
311
312 #if CONFIG_PGTABLE_LEVELS == 4
313 struct paravirt_callee_save pud_val;
314 struct paravirt_callee_save make_pud;
315
316 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
317 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
318 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
319
320 struct pv_lazy_ops lazy_mode;
321
322 /* dom0 ops */
323
324 /* Sometimes the physical address is a pfn, and sometimes its
325 an mfn. We can tell which is which from the index. */
326 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
327 phys_addr_t phys, pgprot_t flags);
328 };
329
330 struct arch_spinlock;
331 #ifdef CONFIG_SMP
332 #include <asm/spinlock_types.h>
333 #else
334 typedef u16 __ticket_t;
335 #endif
336
337 struct qspinlock;
338
339 struct pv_lock_ops {
340 #ifdef CONFIG_QUEUED_SPINLOCKS
341 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);
342 struct paravirt_callee_save queued_spin_unlock;
343
344 void (*wait)(u8 *ptr, u8 val);
345 void (*kick)(int cpu);
346 #else /* !CONFIG_QUEUED_SPINLOCKS */
347 struct paravirt_callee_save lock_spinning;
348 void (*unlock_kick)(struct arch_spinlock *lock, __ticket_t ticket);
349 #endif /* !CONFIG_QUEUED_SPINLOCKS */
350 };
351
352 /* This contains all the paravirt structures: we get a convenient
353 * number for each function using the offset which we use to indicate
354 * what to patch. */
355 struct paravirt_patch_template {
356 struct pv_init_ops pv_init_ops;
357 struct pv_time_ops pv_time_ops;
358 struct pv_cpu_ops pv_cpu_ops;
359 struct pv_irq_ops pv_irq_ops;
360 struct pv_apic_ops pv_apic_ops;
361 struct pv_mmu_ops pv_mmu_ops;
362 struct pv_lock_ops pv_lock_ops;
363 };
364
365 extern struct pv_info pv_info;
366 extern struct pv_init_ops pv_init_ops;
367 extern struct pv_time_ops pv_time_ops;
368 extern struct pv_cpu_ops pv_cpu_ops;
369 extern struct pv_irq_ops pv_irq_ops;
370 extern struct pv_apic_ops pv_apic_ops;
371 extern struct pv_mmu_ops pv_mmu_ops;
372 extern struct pv_lock_ops pv_lock_ops;
373
374 #define PARAVIRT_PATCH(x) \
375 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
376
377 #define paravirt_type(op) \
378 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
379 [paravirt_opptr] "i" (&(op))
380 #define paravirt_clobber(clobber) \
381 [paravirt_clobber] "i" (clobber)
382
383 /*
384 * Generate some code, and mark it as patchable by the
385 * apply_paravirt() alternate instruction patcher.
386 */
387 #define _paravirt_alt(insn_string, type, clobber) \
388 "771:\n\t" insn_string "\n" "772:\n" \
389 ".pushsection .parainstructions,\"a\"\n" \
390 _ASM_ALIGN "\n" \
391 _ASM_PTR " 771b\n" \
392 " .byte " type "\n" \
393 " .byte 772b-771b\n" \
394 " .short " clobber "\n" \
395 ".popsection\n"
396
397 /* Generate patchable code, with the default asm parameters. */
398 #define paravirt_alt(insn_string) \
399 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
400
401 /* Simple instruction patching code. */
402 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t"
403
404 #define DEF_NATIVE(ops, name, code) \
405 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \
406 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name))
407
408 unsigned paravirt_patch_nop(void);
409 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
410 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
411 unsigned paravirt_patch_ignore(unsigned len);
412 unsigned paravirt_patch_call(void *insnbuf,
413 const void *target, u16 tgt_clobbers,
414 unsigned long addr, u16 site_clobbers,
415 unsigned len);
416 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
417 unsigned long addr, unsigned len);
418 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
419 unsigned long addr, unsigned len);
420
421 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
422 const char *start, const char *end);
423
424 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
425 unsigned long addr, unsigned len);
426
427 int paravirt_disable_iospace(void);
428
429 /*
430 * This generates an indirect call based on the operation type number.
431 * The type number, computed in PARAVIRT_PATCH, is derived from the
432 * offset into the paravirt_patch_template structure, and can therefore be
433 * freely converted back into a structure offset.
434 */
435 #define PARAVIRT_CALL "call *%c[paravirt_opptr];"
436
437 /*
438 * These macros are intended to wrap calls through one of the paravirt
439 * ops structs, so that they can be later identified and patched at
440 * runtime.
441 *
442 * Normally, a call to a pv_op function is a simple indirect call:
443 * (pv_op_struct.operations)(args...).
444 *
445 * Unfortunately, this is a relatively slow operation for modern CPUs,
446 * because it cannot necessarily determine what the destination
447 * address is. In this case, the address is a runtime constant, so at
448 * the very least we can patch the call to e a simple direct call, or
449 * ideally, patch an inline implementation into the callsite. (Direct
450 * calls are essentially free, because the call and return addresses
451 * are completely predictable.)
452 *
453 * For i386, these macros rely on the standard gcc "regparm(3)" calling
454 * convention, in which the first three arguments are placed in %eax,
455 * %edx, %ecx (in that order), and the remaining arguments are placed
456 * on the stack. All caller-save registers (eax,edx,ecx) are expected
457 * to be modified (either clobbered or used for return values).
458 * X86_64, on the other hand, already specifies a register-based calling
459 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
460 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
461 * special handling for dealing with 4 arguments, unlike i386.
462 * However, x86_64 also have to clobber all caller saved registers, which
463 * unfortunately, are quite a bit (r8 - r11)
464 *
465 * The call instruction itself is marked by placing its start address
466 * and size into the .parainstructions section, so that
467 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
468 * appropriate patching under the control of the backend pv_init_ops
469 * implementation.
470 *
471 * Unfortunately there's no way to get gcc to generate the args setup
472 * for the call, and then allow the call itself to be generated by an
473 * inline asm. Because of this, we must do the complete arg setup and
474 * return value handling from within these macros. This is fairly
475 * cumbersome.
476 *
477 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
478 * It could be extended to more arguments, but there would be little
479 * to be gained from that. For each number of arguments, there are
480 * the two VCALL and CALL variants for void and non-void functions.
481 *
482 * When there is a return value, the invoker of the macro must specify
483 * the return type. The macro then uses sizeof() on that type to
484 * determine whether its a 32 or 64 bit value, and places the return
485 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
486 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
487 * the return value size.
488 *
489 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
490 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
491 * in low,high order
492 *
493 * Small structures are passed and returned in registers. The macro
494 * calling convention can't directly deal with this, so the wrapper
495 * functions must do this.
496 *
497 * These PVOP_* macros are only defined within this header. This
498 * means that all uses must be wrapped in inline functions. This also
499 * makes sure the incoming and outgoing types are always correct.
500 */
501 #ifdef CONFIG_X86_32
502 #define PVOP_VCALL_ARGS \
503 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
504 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
505
506 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
507 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
508 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
509
510 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
511 "=c" (__ecx)
512 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
513
514 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
515 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
516
517 #define EXTRA_CLOBBERS
518 #define VEXTRA_CLOBBERS
519 #else /* CONFIG_X86_64 */
520 /* [re]ax isn't an arg, but the return val */
521 #define PVOP_VCALL_ARGS \
522 unsigned long __edi = __edi, __esi = __esi, \
523 __edx = __edx, __ecx = __ecx, __eax = __eax
524 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
525
526 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
527 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
528 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
529 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
530
531 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
532 "=S" (__esi), "=d" (__edx), \
533 "=c" (__ecx)
534 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
535
536 /* void functions are still allowed [re]ax for scratch */
537 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
538 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
539
540 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
541 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
542 #endif /* CONFIG_X86_32 */
543
544 #ifdef CONFIG_PARAVIRT_DEBUG
545 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
546 #else
547 #define PVOP_TEST_NULL(op) ((void)op)
548 #endif
549
550 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
551 pre, post, ...) \
552 ({ \
553 rettype __ret; \
554 PVOP_CALL_ARGS; \
555 PVOP_TEST_NULL(op); \
556 /* This is 32-bit specific, but is okay in 64-bit */ \
557 /* since this condition will never hold */ \
558 if (sizeof(rettype) > sizeof(unsigned long)) { \
559 asm volatile(pre \
560 paravirt_alt(PARAVIRT_CALL) \
561 post \
562 : call_clbr \
563 : paravirt_type(op), \
564 paravirt_clobber(clbr), \
565 ##__VA_ARGS__ \
566 : "memory", "cc" extra_clbr); \
567 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
568 } else { \
569 asm volatile(pre \
570 paravirt_alt(PARAVIRT_CALL) \
571 post \
572 : call_clbr \
573 : paravirt_type(op), \
574 paravirt_clobber(clbr), \
575 ##__VA_ARGS__ \
576 : "memory", "cc" extra_clbr); \
577 __ret = (rettype)__eax; \
578 } \
579 __ret; \
580 })
581
582 #define __PVOP_CALL(rettype, op, pre, post, ...) \
583 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
584 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
585
586 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
587 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
588 PVOP_CALLEE_CLOBBERS, , \
589 pre, post, ##__VA_ARGS__)
590
591
592 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
593 ({ \
594 PVOP_VCALL_ARGS; \
595 PVOP_TEST_NULL(op); \
596 asm volatile(pre \
597 paravirt_alt(PARAVIRT_CALL) \
598 post \
599 : call_clbr \
600 : paravirt_type(op), \
601 paravirt_clobber(clbr), \
602 ##__VA_ARGS__ \
603 : "memory", "cc" extra_clbr); \
604 })
605
606 #define __PVOP_VCALL(op, pre, post, ...) \
607 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
608 VEXTRA_CLOBBERS, \
609 pre, post, ##__VA_ARGS__)
610
611 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
612 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
613 PVOP_VCALLEE_CLOBBERS, , \
614 pre, post, ##__VA_ARGS__)
615
616
617
618 #define PVOP_CALL0(rettype, op) \
619 __PVOP_CALL(rettype, op, "", "")
620 #define PVOP_VCALL0(op) \
621 __PVOP_VCALL(op, "", "")
622
623 #define PVOP_CALLEE0(rettype, op) \
624 __PVOP_CALLEESAVE(rettype, op, "", "")
625 #define PVOP_VCALLEE0(op) \
626 __PVOP_VCALLEESAVE(op, "", "")
627
628
629 #define PVOP_CALL1(rettype, op, arg1) \
630 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
631 #define PVOP_VCALL1(op, arg1) \
632 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
633
634 #define PVOP_CALLEE1(rettype, op, arg1) \
635 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
636 #define PVOP_VCALLEE1(op, arg1) \
637 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
638
639
640 #define PVOP_CALL2(rettype, op, arg1, arg2) \
641 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
642 PVOP_CALL_ARG2(arg2))
643 #define PVOP_VCALL2(op, arg1, arg2) \
644 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
645 PVOP_CALL_ARG2(arg2))
646
647 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \
648 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
649 PVOP_CALL_ARG2(arg2))
650 #define PVOP_VCALLEE2(op, arg1, arg2) \
651 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
652 PVOP_CALL_ARG2(arg2))
653
654
655 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
656 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
657 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
658 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
659 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
660 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
661
662 /* This is the only difference in x86_64. We can make it much simpler */
663 #ifdef CONFIG_X86_32
664 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
665 __PVOP_CALL(rettype, op, \
666 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
667 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
668 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
669 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
670 __PVOP_VCALL(op, \
671 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
672 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
673 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
674 #else
675 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
676 __PVOP_CALL(rettype, op, "", "", \
677 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
678 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
679 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
680 __PVOP_VCALL(op, "", "", \
681 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
682 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
683 #endif
684
685 /* Lazy mode for batching updates / context switch */
686 enum paravirt_lazy_mode {
687 PARAVIRT_LAZY_NONE,
688 PARAVIRT_LAZY_MMU,
689 PARAVIRT_LAZY_CPU,
690 };
691
692 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
693 void paravirt_start_context_switch(struct task_struct *prev);
694 void paravirt_end_context_switch(struct task_struct *next);
695
696 void paravirt_enter_lazy_mmu(void);
697 void paravirt_leave_lazy_mmu(void);
698 void paravirt_flush_lazy_mmu(void);
699
700 void _paravirt_nop(void);
701 u32 _paravirt_ident_32(u32);
702 u64 _paravirt_ident_64(u64);
703
704 #define paravirt_nop ((void *)_paravirt_nop)
705
706 /* These all sit in the .parainstructions section to tell us what to patch. */
707 struct paravirt_patch_site {
708 u8 *instr; /* original instructions */
709 u8 instrtype; /* type of this instruction */
710 u8 len; /* length of original instruction */
711 u16 clobbers; /* what registers you may clobber */
712 };
713
714 extern struct paravirt_patch_site __parainstructions[],
715 __parainstructions_end[];
716
717 #endif /* __ASSEMBLY__ */
718
719 #endif /* _ASM_X86_PARAVIRT_TYPES_H */
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