arch/x86/kernel/apic/numaq_32.c

   1 /*
   2  * Written by: Patricia Gaughen, IBM Corporation
   3  *
   4  * Copyright (C) 2002, IBM Corp.
   5  * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
   6  *
   7  * All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  17  * NON INFRINGEMENT.  See the GNU General Public License for more
  18  * details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  *
  24  * Send feedback to <gone@us.ibm.com>
  25  */
  26 #include <linux/nodemask.h>
  27 #include <linux/topology.h>
  28 #include <linux/bootmem.h>
  29 #include <linux/threads.h>
  30 #include <linux/cpumask.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mmzone.h>
  33 #include <linux/module.h>
  34 #include <linux/string.h>
  35 #include <linux/init.h>
  36 #include <linux/numa.h>
  37 #include <linux/smp.h>
  38 #include <linux/io.h>
  39 #include <linux/mm.h>
  40
  41 #include <asm/processor.h>
  42 #include <asm/fixmap.h>
  43 #include <asm/mpspec.h>
  44 #include <asm/numaq.h>
  45 #include <asm/setup.h>
  46 #include <asm/apic.h>
  47 #include <asm/e820.h>
  48 #include <asm/ipi.h>
  49
  50 #define MB_TO_PAGES(addr)               ((addr) << (20 - PAGE_SHIFT))
  51
  52 int found_numaq;
  53
  54 /*
  55  * Have to match translation table entries to main table entries by counter
  56  * hence the mpc_record variable .... can't see a less disgusting way of
  57  * doing this ....
  58  */
  59 struct mpc_trans {
  60         unsigned char                   mpc_type;
  61         unsigned char                   trans_len;
  62         unsigned char                   trans_type;
  63         unsigned char                   trans_quad;
  64         unsigned char                   trans_global;
  65         unsigned char                   trans_local;
  66         unsigned short                  trans_reserved;
  67 };
  68
  69 static int                              mpc_record;
  70
  71 static struct mpc_trans                 *translation_table[MAX_MPC_ENTRY];
  72
  73 int                                     mp_bus_id_to_node[MAX_MP_BUSSES];
  74 int                                     mp_bus_id_to_local[MAX_MP_BUSSES];
  75 int                                     quad_local_to_mp_bus_id[NR_CPUS/4][4];
  76
  77
  78 static inline void numaq_register_node(int node, struct sys_cfg_data *scd)
  79 {
  80         struct eachquadmem *eq = scd->eq + node;
  81
  82         node_set_online(node);
  83
  84         /* Convert to pages */
  85         node_start_pfn[node] =
  86                  MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size);
  87
  88         node_end_pfn[node] =
  89                  MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
  90
  91         e820_register_active_regions(node, node_start_pfn[node],
  92                                                 node_end_pfn[node]);
  93
  94         memory_present(node, node_start_pfn[node], node_end_pfn[node]);
  95
  96         node_remap_size[node] = node_memmap_size_bytes(node,
  97                                         node_start_pfn[node],
  98                                         node_end_pfn[node]);
  99 }
 100
 101 /*
 102  * Function: smp_dump_qct()
 103  *
 104  * Description: gets memory layout from the quad config table.  This
 105  * function also updates node_online_map with the nodes (quads) present.
 106  */
 107 static void __init smp_dump_qct(void)
 108 {
 109         struct sys_cfg_data *scd;
 110         int node;
 111
 112         scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR);
 113
 114         nodes_clear(node_online_map);
 115         for_each_node(node) {
 116                 if (scd->quads_present31_0 & (1 << node))
 117                         numaq_register_node(node, scd);
 118         }
 119 }
 120
 121 void __cpuinit numaq_tsc_disable(void)
 122 {
 123         if (!found_numaq)
 124                 return;
 125
 126         if (num_online_nodes() > 1) {
 127                 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
 128                 setup_clear_cpu_cap(X86_FEATURE_TSC);
 129         }
 130 }
 131
 132 static int __init numaq_pre_time_init(void)
 133 {
 134         numaq_tsc_disable();
 135         return 0;
 136 }
 137
 138 static inline int generate_logical_apicid(int quad, int phys_apicid)
 139 {
 140         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
 141 }
 142
 143 /* x86_quirks member */
 144 static int mpc_apic_id(struct mpc_cpu *m)
 145 {
 146         int quad = translation_table[mpc_record]->trans_quad;
 147         int logical_apicid = generate_logical_apicid(quad, m->apicid);
 148
 149         printk(KERN_DEBUG
 150                 "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
 151                  m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
 152                 (m->cpufeature & CPU_MODEL_MASK) >> 4,
 153                  m->apicver, quad, logical_apicid);
 154
 155         return logical_apicid;
 156 }
 157
 158 /* x86_quirks member */
 159 static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
 160 {
 161         int quad = translation_table[mpc_record]->trans_quad;
 162         int local = translation_table[mpc_record]->trans_local;
 163
 164         mp_bus_id_to_node[m->busid] = quad;
 165         mp_bus_id_to_local[m->busid] = local;
 166
 167         printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad);
 168 }
 169
 170 /* x86_quirks member */
 171 static void mpc_oem_pci_bus(struct mpc_bus *m)
 172 {
 173         int quad = translation_table[mpc_record]->trans_quad;
 174         int local = translation_table[mpc_record]->trans_local;
 175
 176         quad_local_to_mp_bus_id[quad][local] = m->busid;
 177 }
 178
 179 /*
 180  * Called from mpparse code.
 181  * mode = 0: prescan
 182  * mode = 1: one mpc entry scanned
 183  */
 184 static void numaq_mpc_record(unsigned int mode)
 185 {
 186         if (!mode)
 187                 mpc_record = 0;
 188         else
 189                 mpc_record++;
 190 }
 191
 192 static void __init MP_translation_info(struct mpc_trans *m)
 193 {
 194         printk(KERN_INFO
 195             "Translation: record %d, type %d, quad %d, global %d, local %d\n",
 196                mpc_record, m->trans_type, m->trans_quad, m->trans_global,
 197                m->trans_local);
 198
 199         if (mpc_record >= MAX_MPC_ENTRY)
 200                 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
 201         else
 202                 translation_table[mpc_record] = m; /* stash this for later */
 203
 204         if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
 205                 node_set_online(m->trans_quad);
 206 }
 207
 208 static int __init mpf_checksum(unsigned char *mp, int len)
 209 {
 210         int sum = 0;
 211
 212         while (len--)
 213                 sum += *mp++;
 214
 215         return sum & 0xFF;
 216 }
 217
 218 /*
 219  * Read/parse the MPC oem tables
 220  */
 221 static void __init
 222  smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
 223 {
 224         int count = sizeof(*oemtable);  /* the header size */
 225         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 226
 227         mpc_record = 0;
 228         printk(KERN_INFO
 229                 "Found an OEM MPC table at %8p - parsing it ... \n", oemtable);
 230
 231         if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
 232                 printk(KERN_WARNING
 233                        "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
 234                        oemtable->signature[0], oemtable->signature[1],
 235                        oemtable->signature[2], oemtable->signature[3]);
 236                 return;
 237         }
 238
 239         if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
 240                 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
 241                 return;
 242         }
 243
 244         while (count < oemtable->length) {
 245                 switch (*oemptr) {
 246                 case MP_TRANSLATION:
 247                         {
 248                                 struct mpc_trans *m = (void *)oemptr;
 249
 250                                 MP_translation_info(m);
 251                                 oemptr += sizeof(*m);
 252                                 count += sizeof(*m);
 253                                 ++mpc_record;
 254                                 break;
 255                         }
 256                 default:
 257                         printk(KERN_WARNING
 258                                "Unrecognised OEM table entry type! - %d\n",
 259                                (int)*oemptr);
 260                         return;
 261                 }
 262         }
 263 }
 264
 265 static int __init numaq_setup_ioapic_ids(void)
 266 {
 267         /* so can skip it */
 268         return 1;
 269 }
 270
 271 static struct x86_quirks numaq_x86_quirks __initdata = {
 272         .arch_pre_time_init             = numaq_pre_time_init,
 273         .arch_time_init                 = NULL,
 274         .arch_pre_intr_init             = NULL,
 275         .arch_intr_init                 = NULL,
 276         .arch_trap_init                 = NULL,
 277         .mach_get_smp_config            = NULL,
 278         .mach_find_smp_config           = NULL,
 279         .mpc_apic_id                    = mpc_apic_id,
 280         .mpc_oem_bus_info               = mpc_oem_bus_info,
 281         .mpc_oem_pci_bus                = mpc_oem_pci_bus,
 282         .smp_read_mpc_oem               = smp_read_mpc_oem,
 283         .setup_ioapic_ids               = numaq_setup_ioapic_ids,
 284 };
 285
 286 static __init void early_check_numaq(void)
 287 {
 288         /*
 289          * Find possible boot-time SMP configuration:
 290          */
 291         early_find_smp_config();
 292
 293         /*
 294          * get boot-time SMP configuration:
 295          */
 296         if (smp_found_config)
 297                 early_get_smp_config();
 298
 299         if (found_numaq) {
 300                 x86_quirks = &numaq_x86_quirks;
 301                 x86_init.mpparse.mpc_record = numaq_mpc_record;
 302         }
 303 }
 304
 305 int __init get_memcfg_numaq(void)
 306 {
 307         early_check_numaq();
 308         if (!found_numaq)
 309                 return 0;
 310         smp_dump_qct();
 311
 312         return 1;
 313 }
 314
 315 #define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
 316
 317 static inline unsigned int numaq_get_apic_id(unsigned long x)
 318 {
 319         return (x >> 24) & 0x0F;
 320 }
 321
 322 static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
 323 {
 324         default_send_IPI_mask_sequence_logical(mask, vector);
 325 }
 326
 327 static inline void numaq_send_IPI_allbutself(int vector)
 328 {
 329         default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
 330 }
 331
 332 static inline void numaq_send_IPI_all(int vector)
 333 {
 334         numaq_send_IPI_mask(cpu_online_mask, vector);
 335 }
 336
 337 #define NUMAQ_TRAMPOLINE_PHYS_LOW       (0x8)
 338 #define NUMAQ_TRAMPOLINE_PHYS_HIGH      (0xa)
 339
 340 /*
 341  * Because we use NMIs rather than the INIT-STARTUP sequence to
 342  * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
 343  */
 344 static inline void numaq_smp_callin_clear_local_apic(void)
 345 {
 346         clear_local_APIC();
 347 }
 348
 349 static inline const struct cpumask *numaq_target_cpus(void)
 350 {
 351         return cpu_all_mask;
 352 }
 353
 354 static inline unsigned long
 355 numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
 356 {
 357         return physid_isset(apicid, bitmap);
 358 }
 359
 360 static inline unsigned long numaq_check_apicid_present(int bit)
 361 {
 362         return physid_isset(bit, phys_cpu_present_map);
 363 }
 364
 365 static inline int numaq_apic_id_registered(void)
 366 {
 367         return 1;
 368 }
 369
 370 static inline void numaq_init_apic_ldr(void)
 371 {
 372         /* Already done in NUMA-Q firmware */
 373 }
 374
 375 static inline void numaq_setup_apic_routing(void)
 376 {
 377         printk(KERN_INFO
 378                 "Enabling APIC mode:  NUMA-Q.  Using %d I/O APICs\n",
 379                 nr_ioapics);
 380 }
 381
 382 /*
 383  * Skip adding the timer int on secondary nodes, which causes
 384  * a small but painful rift in the time-space continuum.
 385  */
 386 static inline int numaq_multi_timer_check(int apic, int irq)
 387 {
 388         return apic != 0 && irq == 0;
 389 }
 390
 391 static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
 392 {
 393         /* We don't have a good way to do this yet - hack */
 394         return physids_promote(0xFUL);
 395 }
 396
 397 static inline int numaq_cpu_to_logical_apicid(int cpu)
 398 {
 399         if (cpu >= nr_cpu_ids)
 400                 return BAD_APICID;
 401         return cpu_2_logical_apicid[cpu];
 402 }
 403
 404 /*
 405  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
 406  * cpu to APIC ID relation to properly interact with the intelligent
 407  * mode of the cluster controller.
 408  */
 409 static inline int numaq_cpu_present_to_apicid(int mps_cpu)
 410 {
 411         if (mps_cpu < 60)
 412                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
 413         else
 414                 return BAD_APICID;
 415 }
 416
 417 static inline int numaq_apicid_to_node(int logical_apicid)
 418 {
 419         return logical_apicid >> 4;
 420 }
 421
 422 static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
 423 {
 424         int node = numaq_apicid_to_node(logical_apicid);
 425         int cpu = __ffs(logical_apicid & 0xf);
 426
 427         return physid_mask_of_physid(cpu + 4*node);
 428 }
 429
 430 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 431 void *xquad_portio;
 432
 433 static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
 434 {
 435         return 1;
 436 }
 437
 438 /*
 439  * We use physical apicids here, not logical, so just return the default
 440  * physical broadcast to stop people from breaking us
 441  */
 442 static unsigned int numaq_cpu_mask_to_apicid(const struct cpumask *cpumask)
 443 {
 444         return 0x0F;
 445 }
 446
 447 static inline unsigned int
 448 numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 449                              const struct cpumask *andmask)
 450 {
 451         return 0x0F;
 452 }
 453
 454 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
 455 static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
 456 {
 457         return cpuid_apic >> index_msb;
 458 }
 459
 460 static int
 461 numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 462 {
 463         if (strncmp(oem, "IBM NUMA", 8))
 464                 printk(KERN_ERR "Warning! Not a NUMA-Q system!\n");
 465         else
 466                 found_numaq = 1;
 467
 468         return found_numaq;
 469 }
 470
 471 static int probe_numaq(void)
 472 {
 473         /* already know from get_memcfg_numaq() */
 474         return found_numaq;
 475 }
 476
 477 static void numaq_vector_allocation_domain(int cpu, struct cpumask *retmask)
 478 {
 479         /* Careful. Some cpus do not strictly honor the set of cpus
 480          * specified in the interrupt destination when using lowest
 481          * priority interrupt delivery mode.
 482          *
 483          * In particular there was a hyperthreading cpu observed to
 484          * deliver interrupts to the wrong hyperthread when only one
 485          * hyperthread was specified in the interrupt desitination.
 486          */
 487         cpumask_clear(retmask);
 488         cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
 489 }
 490
 491 static void numaq_setup_portio_remap(void)
 492 {
 493         int num_quads = num_online_nodes();
 494
 495         if (num_quads <= 1)
 496                 return;
 497
 498         printk(KERN_INFO
 499                 "Remapping cross-quad port I/O for %d quads\n", num_quads);
 500
 501         xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
 502
 503         printk(KERN_INFO
 504                 "xquad_portio vaddr 0x%08lx, len %08lx\n",
 505                 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
 506 }
 507
 508 /* Use __refdata to keep false positive warning calm.   */
 509 struct apic __refdata apic_numaq = {
 510
 511         .name                           = "NUMAQ",
 512         .probe                          = probe_numaq,
 513         .acpi_madt_oem_check            = NULL,
 514         .apic_id_registered             = numaq_apic_id_registered,
 515
 516         .irq_delivery_mode              = dest_LowestPrio,
 517         /* physical delivery on LOCAL quad: */
 518         .irq_dest_mode                  = 0,
 519
 520         .target_cpus                    = numaq_target_cpus,
 521         .disable_esr                    = 1,
 522         .dest_logical                   = APIC_DEST_LOGICAL,
 523         .check_apicid_used              = numaq_check_apicid_used,
 524         .check_apicid_present           = numaq_check_apicid_present,
 525
 526         .vector_allocation_domain       = numaq_vector_allocation_domain,
 527         .init_apic_ldr                  = numaq_init_apic_ldr,
 528
 529         .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
 530         .setup_apic_routing             = numaq_setup_apic_routing,
 531         .multi_timer_check              = numaq_multi_timer_check,
 532         .apicid_to_node                 = numaq_apicid_to_node,
 533         .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
 534         .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
 535         .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
 536         .setup_portio_remap             = numaq_setup_portio_remap,
 537         .check_phys_apicid_present      = numaq_check_phys_apicid_present,
 538         .enable_apic_mode               = NULL,
 539         .phys_pkg_id                    = numaq_phys_pkg_id,
 540         .mps_oem_check                  = numaq_mps_oem_check,
 541
 542         .get_apic_id                    = numaq_get_apic_id,
 543         .set_apic_id                    = NULL,
 544         .apic_id_mask                   = 0x0F << 24,
 545
 546         .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
 547         .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
 548
 549         .send_IPI_mask                  = numaq_send_IPI_mask,
 550         .send_IPI_mask_allbutself       = NULL,
 551         .send_IPI_allbutself            = numaq_send_IPI_allbutself,
 552         .send_IPI_all                   = numaq_send_IPI_all,
 553         .send_IPI_self                  = default_send_IPI_self,
 554
 555         .wakeup_secondary_cpu           = wakeup_secondary_cpu_via_nmi,
 556         .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
 557         .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
 558
 559         /* We don't do anything here because we use NMI's to boot instead */
 560         .wait_for_init_deassert         = NULL,
 561
 562         .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
 563         .inquire_remote_apic            = NULL,
 564
 565         .read                           = native_apic_mem_read,
 566         .write                          = native_apic_mem_write,
 567         .icr_read                       = native_apic_icr_read,
 568         .icr_write                      = native_apic_icr_write,
 569         .wait_icr_idle                  = native_apic_wait_icr_idle,
 570         .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 571 };