2 * Intel specific MCE features.
3 * Copyright 2004 Zwane Mwaikambo <zwane@linuxpower.ca>
6 #include <linux/init.h>
7 #include <linux/interrupt.h>
8 #include <linux/percpu.h>
9 #include <asm/processor.h>
13 #include <asm/hw_irq.h>
15 #include <asm/therm_throt.h>
17 asmlinkage
void smp_thermal_interrupt(void)
26 rdmsrl(MSR_IA32_THERM_STATUS
, msr_val
);
27 if (therm_throt_process(msr_val
& 1))
28 mce_log_therm_throt_event(smp_processor_id(), msr_val
);
30 inc_irq_stat(irq_thermal_count
);
34 static void __cpuinit
intel_init_thermal(struct cpuinfo_x86
*c
)
38 unsigned int cpu
= smp_processor_id();
40 if (!cpu_has(c
, X86_FEATURE_ACPI
))
43 if (!cpu_has(c
, X86_FEATURE_ACC
))
46 /* first check if TM1 is already enabled by the BIOS, in which
47 * case there might be some SMM goo which handles it, so we can't even
48 * put a handler since it might be delivered via SMI already.
50 rdmsr(MSR_IA32_MISC_ENABLE
, l
, h
);
51 h
= apic_read(APIC_LVTTHMR
);
52 if ((l
& (1 << 3)) && (h
& APIC_DM_SMI
)) {
54 "CPU%d: Thermal monitoring handled by SMI\n", cpu
);
58 if (cpu_has(c
, X86_FEATURE_TM2
) && (l
& (1 << 13)))
61 if (h
& APIC_VECTOR_MASK
) {
63 "CPU%d: Thermal LVT vector (%#x) already "
64 "installed\n", cpu
, (h
& APIC_VECTOR_MASK
));
68 h
= THERMAL_APIC_VECTOR
;
69 h
|= (APIC_DM_FIXED
| APIC_LVT_MASKED
);
70 apic_write(APIC_LVTTHMR
, h
);
72 rdmsr(MSR_IA32_THERM_INTERRUPT
, l
, h
);
73 wrmsr(MSR_IA32_THERM_INTERRUPT
, l
| 0x03, h
);
75 rdmsr(MSR_IA32_MISC_ENABLE
, l
, h
);
76 wrmsr(MSR_IA32_MISC_ENABLE
, l
| (1 << 3), h
);
78 l
= apic_read(APIC_LVTTHMR
);
79 apic_write(APIC_LVTTHMR
, l
& ~APIC_LVT_MASKED
);
80 printk(KERN_INFO
"CPU%d: Thermal monitoring enabled (%s)\n",
81 cpu
, tm2
? "TM2" : "TM1");
83 /* enable thermal throttle processing */
84 atomic_set(&therm_throt_en
, 1);
88 void __cpuinit
mce_intel_feature_init(struct cpuinfo_x86
*c
)
90 intel_init_thermal(c
);
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