2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <asm/fpu/internal.h>
9 #include <asm/fpu/regset.h>
10 #include <asm/fpu/signal.h>
11 #include <asm/fpu/types.h>
12 #include <asm/traps.h>
14 #include <linux/hardirq.h>
16 #define CREATE_TRACE_POINTS
17 #include <asm/trace/fpu.h>
20 * Represents the initial FPU state. It's mostly (but not completely) zeroes,
21 * depending on the FPU hardware format:
23 union fpregs_state init_fpstate __read_mostly
;
26 * Track whether the kernel is using the FPU state
31 * - by IRQ context code to potentially use the FPU
34 * - to debug kernel_fpu_begin()/end() correctness
36 static DEFINE_PER_CPU(bool, in_kernel_fpu
);
39 * Track which context is using the FPU on the CPU:
41 DEFINE_PER_CPU(struct fpu
*, fpu_fpregs_owner_ctx
);
43 static void kernel_fpu_disable(void)
45 WARN_ON_FPU(this_cpu_read(in_kernel_fpu
));
46 this_cpu_write(in_kernel_fpu
, true);
49 static void kernel_fpu_enable(void)
51 WARN_ON_FPU(!this_cpu_read(in_kernel_fpu
));
52 this_cpu_write(in_kernel_fpu
, false);
55 static bool kernel_fpu_disabled(void)
57 return this_cpu_read(in_kernel_fpu
);
61 * Were we in an interrupt that interrupted kernel mode?
63 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
64 * pair does nothing at all: the thread must not have fpu (so
65 * that we don't try to save the FPU state), and TS must
66 * be set (so that the clts/stts pair does nothing that is
67 * visible in the interrupted kernel thread).
69 * Except for the eagerfpu case when we return true; in the likely case
70 * the thread has FPU but we are not going to set/clear TS.
72 static bool interrupted_kernel_fpu_idle(void)
74 if (kernel_fpu_disabled())
80 return !current
->thread
.fpu
.fpregs_active
&& (read_cr0() & X86_CR0_TS
);
84 * Were we in user mode (or vm86 mode) when we were
87 * Doing kernel_fpu_begin/end() is ok if we are running
88 * in an interrupt context from user mode - we'll just
89 * save the FPU state as required.
91 static bool interrupted_user_mode(void)
93 struct pt_regs
*regs
= get_irq_regs();
94 return regs
&& user_mode(regs
);
98 * Can we use the FPU in kernel mode with the
99 * whole "kernel_fpu_begin/end()" sequence?
101 * It's always ok in process context (ie "not interrupt")
102 * but it is sometimes ok even from an irq.
104 bool irq_fpu_usable(void)
106 return !in_interrupt() ||
107 interrupted_user_mode() ||
108 interrupted_kernel_fpu_idle();
110 EXPORT_SYMBOL(irq_fpu_usable
);
112 void __kernel_fpu_begin(void)
114 struct fpu
*fpu
= ¤t
->thread
.fpu
;
116 WARN_ON_FPU(!irq_fpu_usable());
118 kernel_fpu_disable();
120 if (fpu
->fpregs_active
) {
122 * Ignore return value -- we don't care if reg state
125 copy_fpregs_to_fpstate(fpu
);
127 this_cpu_write(fpu_fpregs_owner_ctx
, NULL
);
128 __fpregs_activate_hw();
131 EXPORT_SYMBOL(__kernel_fpu_begin
);
133 void __kernel_fpu_end(void)
135 struct fpu
*fpu
= ¤t
->thread
.fpu
;
137 if (fpu
->fpregs_active
)
138 copy_kernel_to_fpregs(&fpu
->state
);
140 __fpregs_deactivate_hw();
144 EXPORT_SYMBOL(__kernel_fpu_end
);
146 void kernel_fpu_begin(void)
149 __kernel_fpu_begin();
151 EXPORT_SYMBOL_GPL(kernel_fpu_begin
);
153 void kernel_fpu_end(void)
158 EXPORT_SYMBOL_GPL(kernel_fpu_end
);
161 * CR0::TS save/restore functions:
163 int irq_ts_save(void)
166 * If in process context and not atomic, we can take a spurious DNA fault.
167 * Otherwise, doing clts() in process context requires disabling preemption
168 * or some heavy lifting like kernel_fpu_begin()
173 if (read_cr0() & X86_CR0_TS
) {
180 EXPORT_SYMBOL_GPL(irq_ts_save
);
182 void irq_ts_restore(int TS_state
)
187 EXPORT_SYMBOL_GPL(irq_ts_restore
);
190 * Save the FPU state (mark it for reload if necessary):
192 * This only ever gets called for the current task.
194 void fpu__save(struct fpu
*fpu
)
196 WARN_ON_FPU(fpu
!= ¤t
->thread
.fpu
);
199 trace_x86_fpu_before_save(fpu
);
200 if (fpu
->fpregs_active
) {
201 if (!copy_fpregs_to_fpstate(fpu
)) {
203 copy_kernel_to_fpregs(&fpu
->state
);
205 fpregs_deactivate(fpu
);
208 trace_x86_fpu_after_save(fpu
);
211 EXPORT_SYMBOL_GPL(fpu__save
);
214 * Legacy x87 fpstate state init:
216 static inline void fpstate_init_fstate(struct fregs_state
*fp
)
218 fp
->cwd
= 0xffff037fu
;
219 fp
->swd
= 0xffff0000u
;
220 fp
->twd
= 0xffffffffu
;
221 fp
->fos
= 0xffff0000u
;
224 void fpstate_init(union fpregs_state
*state
)
226 if (!static_cpu_has(X86_FEATURE_FPU
)) {
227 fpstate_init_soft(&state
->soft
);
231 memset(state
, 0, fpu_kernel_xstate_size
);
234 * XRSTORS requires that this bit is set in xcomp_bv, or
235 * it will #GP. Make sure it is replaced after the memset().
237 if (static_cpu_has(X86_FEATURE_XSAVES
))
238 state
->xsave
.header
.xcomp_bv
= XCOMP_BV_COMPACTED_FORMAT
;
240 if (static_cpu_has(X86_FEATURE_FXSR
))
241 fpstate_init_fxstate(&state
->fxsave
);
243 fpstate_init_fstate(&state
->fsave
);
245 EXPORT_SYMBOL_GPL(fpstate_init
);
247 int fpu__copy(struct fpu
*dst_fpu
, struct fpu
*src_fpu
)
249 dst_fpu
->counter
= 0;
250 dst_fpu
->fpregs_active
= 0;
251 dst_fpu
->last_cpu
= -1;
253 if (!src_fpu
->fpstate_active
|| !static_cpu_has(X86_FEATURE_FPU
))
256 WARN_ON_FPU(src_fpu
!= ¤t
->thread
.fpu
);
259 * Don't let 'init optimized' areas of the XSAVE area
260 * leak into the child task:
263 memset(&dst_fpu
->state
.xsave
, 0, fpu_kernel_xstate_size
);
266 * Save current FPU registers directly into the child
267 * FPU context, without any memory-to-memory copying.
268 * In lazy mode, if the FPU context isn't loaded into
269 * fpregs, CR0.TS will be set and do_device_not_available
270 * will load the FPU context.
272 * We have to do all this with preemption disabled,
273 * mostly because of the FNSAVE case, because in that
274 * case we must not allow preemption in the window
275 * between the FNSAVE and us marking the context lazy.
277 * It shouldn't be an issue as even FNSAVE is plenty
278 * fast in terms of critical section length.
281 if (!copy_fpregs_to_fpstate(dst_fpu
)) {
282 memcpy(&src_fpu
->state
, &dst_fpu
->state
,
283 fpu_kernel_xstate_size
);
286 copy_kernel_to_fpregs(&src_fpu
->state
);
288 fpregs_deactivate(src_fpu
);
292 trace_x86_fpu_copy_src(src_fpu
);
293 trace_x86_fpu_copy_dst(dst_fpu
);
299 * Activate the current task's in-memory FPU context,
300 * if it has not been used before:
302 void fpu__activate_curr(struct fpu
*fpu
)
304 WARN_ON_FPU(fpu
!= ¤t
->thread
.fpu
);
306 if (!fpu
->fpstate_active
) {
307 fpstate_init(&fpu
->state
);
308 trace_x86_fpu_init_state(fpu
);
310 trace_x86_fpu_activate_state(fpu
);
311 /* Safe to do for the current task: */
312 fpu
->fpstate_active
= 1;
315 EXPORT_SYMBOL_GPL(fpu__activate_curr
);
318 * This function must be called before we read a task's fpstate.
320 * If the task has not used the FPU before then initialize its
323 * If the task has used the FPU before then save it.
325 void fpu__activate_fpstate_read(struct fpu
*fpu
)
328 * If fpregs are active (in the current CPU), then
329 * copy them to the fpstate:
331 if (fpu
->fpregs_active
) {
334 if (!fpu
->fpstate_active
) {
335 fpstate_init(&fpu
->state
);
336 trace_x86_fpu_init_state(fpu
);
338 trace_x86_fpu_activate_state(fpu
);
339 /* Safe to do for current and for stopped child tasks: */
340 fpu
->fpstate_active
= 1;
346 * This function must be called before we write a task's fpstate.
348 * If the task has used the FPU before then unlazy it.
349 * If the task has not used the FPU before then initialize its fpstate.
351 * After this function call, after registers in the fpstate are
352 * modified and the child task has woken up, the child task will
353 * restore the modified FPU state from the modified context. If we
354 * didn't clear its lazy status here then the lazy in-registers
355 * state pending on its former CPU could be restored, corrupting
358 void fpu__activate_fpstate_write(struct fpu
*fpu
)
361 * Only stopped child tasks can be used to modify the FPU
362 * state in the fpstate buffer:
364 WARN_ON_FPU(fpu
== ¤t
->thread
.fpu
);
366 if (fpu
->fpstate_active
) {
367 /* Invalidate any lazy state: */
370 fpstate_init(&fpu
->state
);
371 trace_x86_fpu_init_state(fpu
);
373 trace_x86_fpu_activate_state(fpu
);
374 /* Safe to do for stopped child tasks: */
375 fpu
->fpstate_active
= 1;
380 * This function must be called before we write the current
383 * This call gets the current FPU register state and moves
384 * it in to the 'fpstate'. Preemption is disabled so that
385 * no writes to the 'fpstate' can occur from context
388 * Must be followed by a fpu__current_fpstate_write_end().
390 void fpu__current_fpstate_write_begin(void)
392 struct fpu
*fpu
= ¤t
->thread
.fpu
;
395 * Ensure that the context-switching code does not write
396 * over the fpstate while we are doing our update.
401 * Move the fpregs in to the fpu's 'fpstate'.
403 fpu__activate_fpstate_read(fpu
);
406 * The caller is about to write to 'fpu'. Ensure that no
407 * CPU thinks that its fpregs match the fpstate. This
408 * ensures we will not be lazy and skip a XRSTOR in the
415 * This function must be paired with fpu__current_fpstate_write_begin()
417 * This will ensure that the modified fpstate gets placed back in
418 * the fpregs if necessary.
420 * Note: This function may be called whether or not an _actual_
421 * write to the fpstate occurred.
423 void fpu__current_fpstate_write_end(void)
425 struct fpu
*fpu
= ¤t
->thread
.fpu
;
428 * 'fpu' now has an updated copy of the state, but the
429 * registers may still be out of date. Update them with
430 * an XRSTOR if they are active.
433 copy_kernel_to_fpregs(&fpu
->state
);
436 * Our update is done and the fpregs/fpstate are in sync
437 * if necessary. Context switches can happen again.
443 * 'fpu__restore()' is called to copy FPU registers from
444 * the FPU fpstate to the live hw registers and to activate
445 * access to the hardware registers, so that FPU instructions
446 * can be used afterwards.
448 * Must be called with kernel preemption disabled (for example
449 * with local interrupts disabled, as it is in the case of
450 * do_device_not_available()).
452 void fpu__restore(struct fpu
*fpu
)
454 fpu__activate_curr(fpu
);
456 /* Avoid __kernel_fpu_begin() right after fpregs_activate() */
457 kernel_fpu_disable();
458 trace_x86_fpu_before_restore(fpu
);
459 fpregs_activate(fpu
);
460 copy_kernel_to_fpregs(&fpu
->state
);
462 trace_x86_fpu_after_restore(fpu
);
465 EXPORT_SYMBOL_GPL(fpu__restore
);
468 * Drops current FPU state: deactivates the fpregs and
469 * the fpstate. NOTE: it still leaves previous contents
470 * in the fpregs in the eager-FPU case.
472 * This function can be used in cases where we know that
473 * a state-restore is coming: either an explicit one,
476 void fpu__drop(struct fpu
*fpu
)
481 if (fpu
->fpregs_active
) {
482 /* Ignore delayed exceptions from user space */
483 asm volatile("1: fwait\n"
485 _ASM_EXTABLE(1b
, 2b
));
486 fpregs_deactivate(fpu
);
489 fpu
->fpstate_active
= 0;
491 trace_x86_fpu_dropped(fpu
);
497 * Clear FPU registers by setting them up from
500 static inline void copy_init_fpstate_to_fpregs(void)
503 copy_kernel_to_xregs(&init_fpstate
.xsave
, -1);
504 else if (static_cpu_has(X86_FEATURE_FXSR
))
505 copy_kernel_to_fxregs(&init_fpstate
.fxsave
);
507 copy_kernel_to_fregs(&init_fpstate
.fsave
);
511 * Clear the FPU state back to init state.
513 * Called by sys_execve(), by the signal handler code and by various
516 void fpu__clear(struct fpu
*fpu
)
518 WARN_ON_FPU(fpu
!= ¤t
->thread
.fpu
); /* Almost certainly an anomaly */
520 if (!use_eager_fpu() || !static_cpu_has(X86_FEATURE_FPU
)) {
521 /* FPU state will be reallocated lazily at the first use. */
524 if (!fpu
->fpstate_active
) {
525 fpu__activate_curr(fpu
);
528 copy_init_fpstate_to_fpregs();
533 * x87 math exception handling:
536 int fpu__exception_code(struct fpu
*fpu
, int trap_nr
)
540 if (trap_nr
== X86_TRAP_MF
) {
541 unsigned short cwd
, swd
;
543 * (~cwd & swd) will mask out exceptions that are not set to unmasked
544 * status. 0x3f is the exception bits in these regs, 0x200 is the
545 * C1 reg you need in case of a stack fault, 0x040 is the stack
546 * fault bit. We should only be taking one exception at a time,
547 * so if this combination doesn't produce any single exception,
548 * then we have a bad program that isn't synchronizing its FPU usage
549 * and it will suffer the consequences since we won't be able to
550 * fully reproduce the context of the exception.
552 if (boot_cpu_has(X86_FEATURE_FXSR
)) {
553 cwd
= fpu
->state
.fxsave
.cwd
;
554 swd
= fpu
->state
.fxsave
.swd
;
556 cwd
= (unsigned short)fpu
->state
.fsave
.cwd
;
557 swd
= (unsigned short)fpu
->state
.fsave
.swd
;
563 * The SIMD FPU exceptions are handled a little differently, as there
564 * is only a single status/control register. Thus, to determine which
565 * unmasked exception was caught we must mask the exception mask bits
566 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
568 unsigned short mxcsr
= MXCSR_DEFAULT
;
570 if (boot_cpu_has(X86_FEATURE_XMM
))
571 mxcsr
= fpu
->state
.fxsave
.mxcsr
;
573 err
= ~(mxcsr
>> 7) & mxcsr
;
576 if (err
& 0x001) { /* Invalid op */
578 * swd & 0x240 == 0x040: Stack Underflow
579 * swd & 0x240 == 0x240: Stack Overflow
580 * User must clear the SF bit (0x40) if set
583 } else if (err
& 0x004) { /* Divide by Zero */
585 } else if (err
& 0x008) { /* Overflow */
587 } else if (err
& 0x012) { /* Denormal, Underflow */
589 } else if (err
& 0x020) { /* Precision */
594 * If we're using IRQ 13, or supposedly even some trap
595 * X86_TRAP_MF implementations, it's possible
596 * we get a spurious trap, which is not an error.