3 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeatures.h>
23 #include <asm/percpu.h>
25 #include <asm/bootparam.h>
26 #include <asm/export.h>
28 /* Physical address */
29 #define pa(X) ((X) - __PAGE_OFFSET)
32 * References to members of the new_cpu_data structure.
35 #define X86 new_cpu_data+CPUINFO_x86
36 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
37 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
38 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
39 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
40 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
41 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
42 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
45 * This is how much memory in addition to the memory covered up to
46 * and including _end we need mapped initially.
48 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
49 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
51 * Modulo rounding, each megabyte assigned here requires a kilobyte of
52 * memory, which is currently unreclaimed.
54 * This should be a multiple of a page.
56 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
57 * and small than max_low_pfn, otherwise will waste some page table entries
61 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
63 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
67 * Number of possible pages in the lowmem region.
69 * We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a
70 * gas warning about overflowing shift count when gas has been compiled
71 * with only a host target support using a 32-bit type for internal
74 LOWMEM_PAGES = (((2<<31) - __PAGE_OFFSET) >> PAGE_SHIFT)
76 /* Enough space to fit pagetables for the low memory linear map */
77 MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
80 * Worst-case size of the kernel mapping we need to make:
81 * a relocatable kernel can live anywhere in lowmem, so we need to be able
82 * to map all of lowmem.
84 KERNEL_PAGES = LOWMEM_PAGES
86 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
87 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
90 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
91 * %esi points to the real-mode code as a 32-bit pointer.
92 * CS and DS must be 4 GB flat segments, but we don't depend on
93 * any particular GDT layout, because we load our own as soon as we
98 movl pa(stack_start),%ecx
100 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
101 us to not reload segments */
102 testb $KEEP_SEGMENTS, BP_loadflags(%esi)
106 * Set segments to known values.
108 lgdt pa(boot_gdt_descr)
109 movl $(__BOOT_DS),%eax
116 leal -__PAGE_OFFSET(%ecx),%esp
119 * Clear BSS first so that there are no surprises...
123 movl $pa(__bss_start),%edi
124 movl $pa(__bss_stop),%ecx
129 * Copy bootup parameters out of the way.
130 * Note: %esi still has the pointer to the real-mode data.
131 * With the kexec as boot loader, parameter segment might be loaded beyond
132 * kernel image and might not even be addressable by early boot page tables.
133 * (kexec on panic case). Hence copy out the parameters before initializing
136 movl $pa(boot_params),%edi
137 movl $(PARAM_SIZE/4),%ecx
141 movl pa(boot_params) + NEW_CL_POINTER,%esi
143 jz 1f # No command line
144 movl $pa(boot_command_line),%edi
145 movl $(COMMAND_LINE_SIZE/4),%ecx
151 /* save OFW's pgdir table for later use when calling into OFW */
153 movl %eax, pa(olpc_ofw_pgd)
156 #ifdef CONFIG_MICROCODE
157 /* Early load ucode on BSP. */
162 * Initialize page tables. This creates a PDE and a set of page
163 * tables, which are located immediately beyond __brk_base. The variable
164 * _brk_end is set up to point to the first "safe" location.
165 * Mappings are created both at virtual address 0 (identity mapping)
166 * and PAGE_OFFSET for up to _end.
168 #ifdef CONFIG_X86_PAE
171 * In PAE mode initial_page_table is statically defined to contain
172 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
173 * entries). The identity mapping is handled by pointing two PGD entries
174 * to the first kernel PMD.
176 * Note the upper half of each PMD or PTE are always zero at this stage.
179 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
181 xorl %ebx,%ebx /* %ebx is kept at zero */
183 movl $pa(__brk_base), %edi
184 movl $pa(initial_pg_pmd), %edx
185 movl $PTE_IDENT_ATTR, %eax
187 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
188 movl %ecx,(%edx) /* Store PMD entry */
189 /* Upper half already zero */
201 * End condition: we must map up to the end + MAPPING_BEYOND_END.
203 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
207 addl $__PAGE_OFFSET, %edi
208 movl %edi, pa(_brk_end)
210 movl %eax, pa(max_pfn_mapped)
212 /* Do early initialization of the fixmap area */
213 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
214 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
217 page_pde_offset = (__PAGE_OFFSET >> 20);
219 movl $pa(__brk_base), %edi
220 movl $pa(initial_page_table), %edx
221 movl $PTE_IDENT_ATTR, %eax
223 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
224 movl %ecx,(%edx) /* Store identity PDE entry */
225 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
233 * End condition: we must map up to the end + MAPPING_BEYOND_END.
235 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
238 addl $__PAGE_OFFSET, %edi
239 movl %edi, pa(_brk_end)
241 movl %eax, pa(max_pfn_mapped)
243 /* Do early initialization of the fixmap area */
244 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
245 movl %eax,pa(initial_page_table+0xffc)
248 #ifdef CONFIG_PARAVIRT
249 /* This is can only trip for a broken bootloader... */
250 cmpw $0x207, pa(boot_params + BP_version)
253 /* Paravirt-compatible boot parameters. Look to see what architecture
254 we're booting under. */
255 movl pa(boot_params + BP_hardware_subarch), %eax
256 cmpl $num_subarch_entries, %eax
259 movl pa(subarch_entries)(,%eax,4), %eax
260 subl $__PAGE_OFFSET, %eax
266 /* Unknown implementation; there's really
267 nothing we can do at this point. */
273 .long default_entry /* normal x86/PC */
274 .long lguest_entry /* lguest hypervisor */
275 .long xen_entry /* Xen hypervisor */
276 .long default_entry /* Moorestown MID */
277 num_subarch_entries = (. - subarch_entries) / 4
281 #endif /* CONFIG_PARAVIRT */
283 #ifdef CONFIG_HOTPLUG_CPU
285 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
286 * up already except stack. We just set up stack here. Then call
290 movl stack_start, %ecx
297 * Non-boot CPU entry point; entered from trampoline.S
298 * We can't lgdt here, because lgdt itself uses a data segment, but
299 * we know the trampoline has already loaded the boot_gdt for us.
301 * If cpu hotplug is not supported then this code can go in init section
302 * which will be freed later
304 ENTRY(startup_32_smp)
306 movl $(__BOOT_DS),%eax
311 movl pa(stack_start),%ecx
313 leal -__PAGE_OFFSET(%ecx),%esp
315 #ifdef CONFIG_MICROCODE
316 /* Early load ucode on AP. */
321 #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
322 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
324 movl $(CR0_STATE & ~X86_CR0_PG),%eax
328 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
329 * bits like NT set. This would confuse the debugger if this code is traced. So
330 * initialize them properly now before switching to protected mode. That means
331 * DF in particular (even though we have cleared it earlier after copying the
332 * command line) because GCC expects it.
338 * New page tables may be in 4Mbyte page mode and may be using the global pages.
340 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
341 * if and only if CPUID exists and has flags other than the FPU flag set.
343 movl $-1,pa(X86_CPUID) # preset CPUID level
344 movl $X86_EFLAGS_ID,%ecx
346 popfl # set EFLAGS=ID
348 popl %eax # get EFLAGS
349 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
350 jz enable_paging # hw disallowed setting of ID bit
351 # which means no CPUID and no CR4
355 movl %eax,pa(X86_CPUID) # save largest std CPUID function
359 andl $~1,%edx # Ignore CPUID.FPU
360 jz enable_paging # No flags or only CPUID.FPU = no CR4
362 movl pa(mmu_cr4_features),%eax
365 testb $X86_CR4_PAE, %al # check if PAE is enabled
368 /* Check if extended functions are implemented */
369 movl $0x80000000, %eax
371 /* Value must be in the range 0x80000001 to 0x8000ffff */
372 subl $0x80000001, %eax
373 cmpl $(0x8000ffff-0x80000001), %eax
376 /* Clear bogus XD_DISABLE bits */
379 mov $0x80000001, %eax
381 /* Execute Disable bit supported? */
382 btl $(X86_FEATURE_NX & 31), %edx
385 /* Setup EFER (Extended Feature Enable Register) */
390 /* Make changes effective */
398 movl $pa(initial_page_table), %eax
399 movl %eax,%cr3 /* set the page table pointer.. */
401 movl %eax,%cr0 /* ..and set paging (PG) bit */
402 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
404 /* Shift the stack pointer to a virtual address */
405 addl $__PAGE_OFFSET, %esp
408 * start system 32-bit setup. We need to re-do some of the things done
409 * in 16-bit mode for the "real" operations.
411 movl setup_once_ref,%eax
413 jz 1f # Did we do this already?
420 movb $4,X86 # at least 486
424 /* get vendor info */
425 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
427 movl %eax,X86_CPUID # save CPUID level
428 movl %ebx,X86_VENDOR_ID # lo 4 chars
429 movl %edx,X86_VENDOR_ID+4 # next 4 chars
430 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
432 orl %eax,%eax # do we have processor info as well?
435 movl $1,%eax # Use the CPUID instruction to get CPU type
437 movb %al,%cl # save reg for future use
438 andb $0x0f,%ah # mask processor family
440 andb $0xf0,%al # mask model
443 andb $0x0f,%cl # mask mask revision
445 movl %edx,X86_CAPABILITY
448 movl $0x50022,%ecx # set AM, WP, NE and MP
450 andl $0x80000011,%eax # Save PG,PE,ET
456 ljmp $(__KERNEL_CS),$1f
457 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
458 movl %eax,%ss # after changing gdt.
460 movl $(__USER_DS),%eax # DS/ES contains default USER segment
464 movl $(__KERNEL_PERCPU), %eax
465 movl %eax,%fs # set this cpu's percpu
467 movl $(__KERNEL_STACK_CANARY),%eax
470 xorl %eax,%eax # Clear LDT
473 pushl $0 # fake return address for unwinder
476 #include "verify_cpu.S"
481 * The setup work we only want to run on the BSP.
483 * Warning: %esi is live across this function.
488 * Set up a idt with 256 interrupt gates that push zero if there
489 * is no error code and then jump to early_idt_handler_common.
490 * It doesn't actually load the idt - that needs to be done on
491 * each CPU. Interrupts are enabled elsewhere, when we can be
492 * relatively sure everything is ok.
496 movl $early_idt_handler_array,%eax
497 movl $NUM_EXCEPTION_VECTORS,%ecx
501 /* interrupt gate, dpl=0, present */
502 movl $(0x8E000000 + __KERNEL_CS),2(%edi)
503 addl $EARLY_IDT_HANDLER_SIZE,%eax
507 movl $256 - NUM_EXCEPTION_VECTORS,%ecx
508 movl $ignore_int,%edx
509 movl $(__KERNEL_CS << 16),%eax
510 movw %dx,%ax /* selector = 0x0010 = cs */
511 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
518 #ifdef CONFIG_CC_STACKPROTECTOR
520 * Configure the stack canary. The linker can't handle this by
521 * relocation. Manually set base address in stack canary
522 * segment descriptor.
525 movl $stack_canary,%ecx
526 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
528 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
529 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
532 andl $0,setup_once_ref /* Once is enough, thanks */
535 ENTRY(early_idt_handler_array)
539 # 24(%rsp) error code
541 .rept NUM_EXCEPTION_VECTORS
542 .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
543 pushl $0 # Dummy error code, to make stack frame uniform
545 pushl $i # 20(%esp) Vector number
546 jmp early_idt_handler_common
548 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
550 ENDPROC(early_idt_handler_array)
552 early_idt_handler_common:
554 * The stack is the hardware frame, an error code or zero, and the
559 incl %ss:early_recursion_flag
561 /* The vector number is in pt_regs->gs */
564 pushl %fs /* pt_regs->fs */
565 movw $0, 2(%esp) /* clear high bits (some CPUs leave garbage) */
566 pushl %es /* pt_regs->es */
567 movw $0, 2(%esp) /* clear high bits (some CPUs leave garbage) */
568 pushl %ds /* pt_regs->ds */
569 movw $0, 2(%esp) /* clear high bits (some CPUs leave garbage) */
570 pushl %eax /* pt_regs->ax */
571 pushl %ebp /* pt_regs->bp */
572 pushl %edi /* pt_regs->di */
573 pushl %esi /* pt_regs->si */
574 pushl %edx /* pt_regs->dx */
575 pushl %ecx /* pt_regs->cx */
576 pushl %ebx /* pt_regs->bx */
578 /* Fix up DS and ES */
579 movl $(__KERNEL_DS), %ecx
583 /* Load the vector number into EDX */
584 movl PT_GS(%esp), %edx
586 /* Load GS into pt_regs->gs and clear high bits */
587 movw %gs, PT_GS(%esp)
588 movw $0, PT_GS+2(%esp)
590 movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */
591 call early_fixup_exception
593 popl %ebx /* pt_regs->bx */
594 popl %ecx /* pt_regs->cx */
595 popl %edx /* pt_regs->dx */
596 popl %esi /* pt_regs->si */
597 popl %edi /* pt_regs->di */
598 popl %ebp /* pt_regs->bp */
599 popl %eax /* pt_regs->ax */
600 popl %ds /* pt_regs->ds */
601 popl %es /* pt_regs->es */
602 popl %fs /* pt_regs->fs */
603 popl %gs /* pt_regs->gs */
604 decl %ss:early_recursion_flag
605 addl $4, %esp /* pop pt_regs->orig_ax */
607 ENDPROC(early_idt_handler_common)
609 /* This is the default interrupt "handler" :-) */
619 movl $(__KERNEL_DS),%eax
622 cmpl $2,early_recursion_flag
624 incl early_recursion_flag
649 GLOBAL(early_recursion_flag)
655 .long i386_start_kernel
656 ENTRY(setup_once_ref)
664 #ifdef CONFIG_X86_PAE
668 ENTRY(initial_page_table)
673 ENTRY(empty_zero_page)
675 ENTRY(swapper_pg_dir)
677 EXPORT_SYMBOL(empty_zero_page)
680 * This starts the data section.
682 #ifdef CONFIG_X86_PAE
684 /* Page-aligned for the benefit of paravirt? */
686 ENTRY(initial_page_table)
687 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
689 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
690 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
691 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
694 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
695 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
699 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
701 # error "Kernel PMDs should be 1, 2 or 3"
703 .align PAGE_SIZE /* needs to be page-sized too */
709 .long init_thread_union+THREAD_SIZE
713 .asciz "Unknown interrupt or fault at: %p %p %p\n"
715 #include "../../x86/xen/xen-head.S"
718 * The IDT and GDT 'descriptors' are a strange 48-bit object
719 * only used by the lidt and lgdt instructions. They are not
720 * like usual segment descriptors - they consist of a 16-bit
721 * segment size, and 32-bit linear address value:
725 .globl boot_gdt_descr
729 # early boot GDT descriptor (must use 1:1 address mapping)
730 .word 0 # 32 bit align gdt_desc.address
733 .long boot_gdt - __PAGE_OFFSET
735 .word 0 # 32-bit align idt_desc.address
737 .word IDT_ENTRIES*8-1 # idt contains 256 entries
740 # boot GDT descriptor (later on used by CPU#0):
741 .word 0 # 32 bit align gdt_desc.address
742 ENTRY(early_gdt_descr)
743 .word GDT_ENTRIES*8-1
744 .long gdt_page /* Overwritten for secondary CPUs */
747 * The boot_gdt must mirror the equivalent in setup.S and is
748 * used only for booting.
750 .align L1_CACHE_BYTES
752 .fill GDT_ENTRY_BOOT_CS,8,0
753 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
754 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */