arch/x86/kernel/hpet.c

   1 #include <linux/clocksource.h>
   2 #include <linux/clockchips.h>
   3 #include <linux/delay.h>
   4 #include <linux/errno.h>
   5 #include <linux/hpet.h>
   6 #include <linux/init.h>
   7 #include <linux/sysdev.h>
   8 #include <linux/pm.h>
   9
  10 #include <asm/fixmap.h>
  11 #include <asm/hpet.h>
  12 #include <asm/i8253.h>
  13 #include <asm/io.h>
  14
  15 #define HPET_MASK       CLOCKSOURCE_MASK(32)
  16 #define HPET_SHIFT      22
  17
  18 /* FSEC = 10^-15
  19    NSEC = 10^-9 */
  20 #define FSEC_PER_NSEC   1000000
  21
  22 /*
  23  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  24  */
  25 unsigned long hpet_address;
  26 static void __iomem *hpet_virt_address;
  27
  28 unsigned long hpet_readl(unsigned long a)
  29 {
  30         return readl(hpet_virt_address + a);
  31 }
  32
  33 static inline void hpet_writel(unsigned long d, unsigned long a)
  34 {
  35         writel(d, hpet_virt_address + a);
  36 }
  37
  38 #ifdef CONFIG_X86_64
  39
  40 #include <asm/pgtable.h>
  41
  42 static inline void hpet_set_mapping(void)
  43 {
  44         set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
  45         __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
  46         hpet_virt_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
  47 }
  48
  49 static inline void hpet_clear_mapping(void)
  50 {
  51         hpet_virt_address = NULL;
  52 }
  53
  54 #else
  55
  56 static inline void hpet_set_mapping(void)
  57 {
  58         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
  59 }
  60
  61 static inline void hpet_clear_mapping(void)
  62 {
  63         iounmap(hpet_virt_address);
  64         hpet_virt_address = NULL;
  65 }
  66 #endif
  67
  68 /*
  69  * HPET command line enable / disable
  70  */
  71 static int boot_hpet_disable;
  72 int hpet_force_user;
  73
  74 static int __init hpet_setup(char* str)
  75 {
  76         if (str) {
  77                 if (!strncmp("disable", str, 7))
  78                         boot_hpet_disable = 1;
  79                 if (!strncmp("force", str, 5))
  80                         hpet_force_user = 1;
  81         }
  82         return 1;
  83 }
  84 __setup("hpet=", hpet_setup);
  85
  86 static int __init disable_hpet(char *str)
  87 {
  88         boot_hpet_disable = 1;
  89         return 1;
  90 }
  91 __setup("nohpet", disable_hpet);
  92
  93 static inline int is_hpet_capable(void)
  94 {
  95         return (!boot_hpet_disable && hpet_address);
  96 }
  97
  98 /*
  99  * HPET timer interrupt enable / disable
 100  */
 101 static int hpet_legacy_int_enabled;
 102
 103 /**
 104  * is_hpet_enabled - check whether the hpet timer interrupt is enabled
 105  */
 106 int is_hpet_enabled(void)
 107 {
 108         return is_hpet_capable() && hpet_legacy_int_enabled;
 109 }
 110 EXPORT_SYMBOL_GPL(is_hpet_enabled);
 111
 112 /*
 113  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
 114  * timer 0 and timer 1 in case of RTC emulation.
 115  */
 116 #ifdef CONFIG_HPET
 117 static void hpet_reserve_platform_timers(unsigned long id)
 118 {
 119         struct hpet __iomem *hpet = hpet_virt_address;
 120         struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
 121         unsigned int nrtimers, i;
 122         struct hpet_data hd;
 123
 124         nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
 125
 126         memset(&hd, 0, sizeof (hd));
 127         hd.hd_phys_address = hpet_address;
 128         hd.hd_address = hpet;
 129         hd.hd_nirqs = nrtimers;
 130         hd.hd_flags = HPET_DATA_PLATFORM;
 131         hpet_reserve_timer(&hd, 0);
 132
 133 #ifdef CONFIG_HPET_EMULATE_RTC
 134         hpet_reserve_timer(&hd, 1);
 135 #endif
 136
 137         hd.hd_irq[0] = HPET_LEGACY_8254;
 138         hd.hd_irq[1] = HPET_LEGACY_RTC;
 139
 140         for (i = 2; i < nrtimers; timer++, i++)
 141                 hd.hd_irq[i] = (timer->hpet_config & Tn_INT_ROUTE_CNF_MASK) >>
 142                         Tn_INT_ROUTE_CNF_SHIFT;
 143
 144         hpet_alloc(&hd);
 145
 146 }
 147 #else
 148 static void hpet_reserve_platform_timers(unsigned long id) { }
 149 #endif
 150
 151 /*
 152  * Common hpet info
 153  */
 154 static unsigned long hpet_period;
 155
 156 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 157                           struct clock_event_device *evt);
 158 static int hpet_legacy_next_event(unsigned long delta,
 159                            struct clock_event_device *evt);
 160
 161 /*
 162  * The hpet clock event device
 163  */
 164 static struct clock_event_device hpet_clockevent = {
 165         .name           = "hpet",
 166         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 167         .set_mode       = hpet_legacy_set_mode,
 168         .set_next_event = hpet_legacy_next_event,
 169         .shift          = 32,
 170         .irq            = 0,
 171         .rating         = 50,
 172 };
 173
 174 static void hpet_start_counter(void)
 175 {
 176         unsigned long cfg = hpet_readl(HPET_CFG);
 177
 178         cfg &= ~HPET_CFG_ENABLE;
 179         hpet_writel(cfg, HPET_CFG);
 180         hpet_writel(0, HPET_COUNTER);
 181         hpet_writel(0, HPET_COUNTER + 4);
 182         cfg |= HPET_CFG_ENABLE;
 183         hpet_writel(cfg, HPET_CFG);
 184 }
 185
 186 static void hpet_resume_device(void)
 187 {
 188         force_hpet_resume();
 189 }
 190
 191 static void hpet_restart_counter(void)
 192 {
 193         hpet_resume_device();
 194         hpet_start_counter();
 195 }
 196
 197 static void hpet_enable_legacy_int(void)
 198 {
 199         unsigned long cfg = hpet_readl(HPET_CFG);
 200
 201         cfg |= HPET_CFG_LEGACY;
 202         hpet_writel(cfg, HPET_CFG);
 203         hpet_legacy_int_enabled = 1;
 204 }
 205
 206 static void hpet_legacy_clockevent_register(void)
 207 {
 208         uint64_t hpet_freq;
 209
 210         /* Start HPET legacy interrupts */
 211         hpet_enable_legacy_int();
 212
 213         /*
 214          * The period is a femto seconds value. We need to calculate the
 215          * scaled math multiplication factor for nanosecond to hpet tick
 216          * conversion.
 217          */
 218         hpet_freq = 1000000000000000ULL;
 219         do_div(hpet_freq, hpet_period);
 220         hpet_clockevent.mult = div_sc((unsigned long) hpet_freq,
 221                                       NSEC_PER_SEC, 32);
 222         /* Calculate the min / max delta */
 223         hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
 224                                                            &hpet_clockevent);
 225         hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
 226                                                            &hpet_clockevent);
 227
 228         /*
 229          * Start hpet with the boot cpu mask and make it
 230          * global after the IO_APIC has been initialized.
 231          */
 232         hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
 233         clockevents_register_device(&hpet_clockevent);
 234         global_clock_event = &hpet_clockevent;
 235         printk(KERN_DEBUG "hpet clockevent registered\n");
 236 }
 237
 238 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 239                           struct clock_event_device *evt)
 240 {
 241         unsigned long cfg, cmp, now;
 242         uint64_t delta;
 243
 244         switch(mode) {
 245         case CLOCK_EVT_MODE_PERIODIC:
 246                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * hpet_clockevent.mult;
 247                 delta >>= hpet_clockevent.shift;
 248                 now = hpet_readl(HPET_COUNTER);
 249                 cmp = now + (unsigned long) delta;
 250                 cfg = hpet_readl(HPET_T0_CFG);
 251                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
 252                        HPET_TN_SETVAL | HPET_TN_32BIT;
 253                 hpet_writel(cfg, HPET_T0_CFG);
 254                 /*
 255                  * The first write after writing TN_SETVAL to the
 256                  * config register sets the counter value, the second
 257                  * write sets the period.
 258                  */
 259                 hpet_writel(cmp, HPET_T0_CMP);
 260                 udelay(1);
 261                 hpet_writel((unsigned long) delta, HPET_T0_CMP);
 262                 break;
 263
 264         case CLOCK_EVT_MODE_ONESHOT:
 265                 cfg = hpet_readl(HPET_T0_CFG);
 266                 cfg &= ~HPET_TN_PERIODIC;
 267                 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 268                 hpet_writel(cfg, HPET_T0_CFG);
 269                 break;
 270
 271         case CLOCK_EVT_MODE_UNUSED:
 272         case CLOCK_EVT_MODE_SHUTDOWN:
 273                 cfg = hpet_readl(HPET_T0_CFG);
 274                 cfg &= ~HPET_TN_ENABLE;
 275                 hpet_writel(cfg, HPET_T0_CFG);
 276                 break;
 277
 278         case CLOCK_EVT_MODE_RESUME:
 279                 hpet_enable_legacy_int();
 280                 break;
 281         }
 282 }
 283
 284 static int hpet_legacy_next_event(unsigned long delta,
 285                            struct clock_event_device *evt)
 286 {
 287         unsigned long cnt;
 288
 289         cnt = hpet_readl(HPET_COUNTER);
 290         cnt += delta;
 291         hpet_writel(cnt, HPET_T0_CMP);
 292
 293         return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0;
 294 }
 295
 296 /*
 297  * Clock source related code
 298  */
 299 static cycle_t read_hpet(void)
 300 {
 301         return (cycle_t)hpet_readl(HPET_COUNTER);
 302 }
 303
 304 #ifdef CONFIG_X86_64
 305 static cycle_t __vsyscall_fn vread_hpet(void)
 306 {
 307         return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
 308 }
 309 #endif
 310
 311 static struct clocksource clocksource_hpet = {
 312         .name           = "hpet",
 313         .rating         = 250,
 314         .read           = read_hpet,
 315         .mask           = HPET_MASK,
 316         .shift          = HPET_SHIFT,
 317         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 318         .resume         = hpet_restart_counter,
 319 #ifdef CONFIG_X86_64
 320         .vread          = vread_hpet,
 321 #endif
 322 };
 323
 324 static int hpet_clocksource_register(void)
 325 {
 326         u64 tmp, start, now;
 327         cycle_t t1;
 328
 329         /* Start the counter */
 330         hpet_start_counter();
 331
 332         /* Verify whether hpet counter works */
 333         t1 = read_hpet();
 334         rdtscll(start);
 335
 336         /*
 337          * We don't know the TSC frequency yet, but waiting for
 338          * 200000 TSC cycles is safe:
 339          * 4 GHz == 50us
 340          * 1 GHz == 200us
 341          */
 342         do {
 343                 rep_nop();
 344                 rdtscll(now);
 345         } while ((now - start) < 200000UL);
 346
 347         if (t1 == read_hpet()) {
 348                 printk(KERN_WARNING
 349                        "HPET counter not counting. HPET disabled\n");
 350                 return -ENODEV;
 351         }
 352
 353         /* Initialize and register HPET clocksource
 354          *
 355          * hpet period is in femto seconds per cycle
 356          * so we need to convert this to ns/cyc units
 357          * approximated by mult/2^shift
 358          *
 359          *  fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
 360          *  fsec/cyc * 1ns/1000000fsec * 2^shift = mult
 361          *  fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
 362          *  (fsec/cyc << shift)/1000000 = mult
 363          *  (hpet_period << shift)/FSEC_PER_NSEC = mult
 364          */
 365         tmp = (u64)hpet_period << HPET_SHIFT;
 366         do_div(tmp, FSEC_PER_NSEC);
 367         clocksource_hpet.mult = (u32)tmp;
 368
 369         clocksource_register(&clocksource_hpet);
 370
 371         return 0;
 372 }
 373
 374 /**
 375  * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
 376  */
 377 int __init hpet_enable(void)
 378 {
 379         unsigned long id;
 380
 381         if (!is_hpet_capable())
 382                 return 0;
 383
 384         hpet_set_mapping();
 385
 386         /*
 387          * Read the period and check for a sane value:
 388          */
 389         hpet_period = hpet_readl(HPET_PERIOD);
 390         if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
 391                 goto out_nohpet;
 392
 393         /*
 394          * Read the HPET ID register to retrieve the IRQ routing
 395          * information and the number of channels
 396          */
 397         id = hpet_readl(HPET_ID);
 398
 399 #ifdef CONFIG_HPET_EMULATE_RTC
 400         /*
 401          * The legacy routing mode needs at least two channels, tick timer
 402          * and the rtc emulation channel.
 403          */
 404         if (!(id & HPET_ID_NUMBER))
 405                 goto out_nohpet;
 406 #endif
 407
 408         if (hpet_clocksource_register())
 409                 goto out_nohpet;
 410
 411         if (id & HPET_ID_LEGSUP) {
 412                 hpet_legacy_clockevent_register();
 413                 return 1;
 414         }
 415         return 0;
 416
 417 out_nohpet:
 418         hpet_clear_mapping();
 419         boot_hpet_disable = 1;
 420         return 0;
 421 }
 422
 423 /*
 424  * Needs to be late, as the reserve_timer code calls kalloc !
 425  *
 426  * Not a problem on i386 as hpet_enable is called from late_time_init,
 427  * but on x86_64 it is necessary !
 428  */
 429 static __init int hpet_late_init(void)
 430 {
 431         if (boot_hpet_disable)
 432                 return -ENODEV;
 433
 434         if (!hpet_address) {
 435                 if (!force_hpet_address)
 436                         return -ENODEV;
 437
 438                 hpet_address = force_hpet_address;
 439                 hpet_enable();
 440                 if (!hpet_virt_address)
 441                         return -ENODEV;
 442         }
 443
 444         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
 445
 446         return 0;
 447 }
 448 fs_initcall(hpet_late_init);
 449
 450 void hpet_disable(void)
 451 {
 452         if (is_hpet_capable()) {
 453                 unsigned long cfg = hpet_readl(HPET_CFG);
 454
 455                 if (hpet_legacy_int_enabled) {
 456                         cfg &= ~HPET_CFG_LEGACY;
 457                         hpet_legacy_int_enabled = 0;
 458                 }
 459                 cfg &= ~HPET_CFG_ENABLE;
 460                 hpet_writel(cfg, HPET_CFG);
 461         }
 462 }
 463
 464 #ifdef CONFIG_HPET_EMULATE_RTC
 465
 466 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 467  * is enabled, we support RTC interrupt functionality in software.
 468  * RTC has 3 kinds of interrupts:
 469  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 470  *    is updated
 471  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 472  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 473  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 474  * (1) and (2) above are implemented using polling at a frequency of
 475  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 476  * overhead. (DEFAULT_RTC_INT_FREQ)
 477  * For (3), we use interrupts at 64Hz or user specified periodic
 478  * frequency, whichever is higher.
 479  */
 480 #include <linux/mc146818rtc.h>
 481 #include <linux/rtc.h>
 482 #include <asm/rtc.h>
 483
 484 #define DEFAULT_RTC_INT_FREQ    64
 485 #define DEFAULT_RTC_SHIFT       6
 486 #define RTC_NUM_INTS            1
 487
 488 static unsigned long hpet_rtc_flags;
 489 static unsigned long hpet_prev_update_sec;
 490 static struct rtc_time hpet_alarm_time;
 491 static unsigned long hpet_pie_count;
 492 static unsigned long hpet_t1_cmp;
 493 static unsigned long hpet_default_delta;
 494 static unsigned long hpet_pie_delta;
 495 static unsigned long hpet_pie_limit;
 496
 497 static rtc_irq_handler irq_handler;
 498
 499 /*
 500  * Registers a IRQ handler.
 501  */
 502 int hpet_register_irq_handler(rtc_irq_handler handler)
 503 {
 504         if (!is_hpet_enabled())
 505                 return -ENODEV;
 506         if (irq_handler)
 507                 return -EBUSY;
 508
 509         irq_handler = handler;
 510
 511         return 0;
 512 }
 513 EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
 514
 515 /*
 516  * Deregisters the IRQ handler registered with hpet_register_irq_handler()
 517  * and does cleanup.
 518  */
 519 void hpet_unregister_irq_handler(rtc_irq_handler handler)
 520 {
 521         if (!is_hpet_enabled())
 522                 return;
 523
 524         irq_handler = NULL;
 525         hpet_rtc_flags = 0;
 526 }
 527 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
 528
 529 /*
 530  * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
 531  * is not supported by all HPET implementations for timer 1.
 532  *
 533  * hpet_rtc_timer_init() is called when the rtc is initialized.
 534  */
 535 int hpet_rtc_timer_init(void)
 536 {
 537         unsigned long cfg, cnt, delta, flags;
 538
 539         if (!is_hpet_enabled())
 540                 return 0;
 541
 542         if (!hpet_default_delta) {
 543                 uint64_t clc;
 544
 545                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
 546                 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
 547                 hpet_default_delta = (unsigned long) clc;
 548         }
 549
 550         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
 551                 delta = hpet_default_delta;
 552         else
 553                 delta = hpet_pie_delta;
 554
 555         local_irq_save(flags);
 556
 557         cnt = delta + hpet_readl(HPET_COUNTER);
 558         hpet_writel(cnt, HPET_T1_CMP);
 559         hpet_t1_cmp = cnt;
 560
 561         cfg = hpet_readl(HPET_T1_CFG);
 562         cfg &= ~HPET_TN_PERIODIC;
 563         cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 564         hpet_writel(cfg, HPET_T1_CFG);
 565
 566         local_irq_restore(flags);
 567
 568         return 1;
 569 }
 570 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
 571
 572 /*
 573  * The functions below are called from rtc driver.
 574  * Return 0 if HPET is not being used.
 575  * Otherwise do the necessary changes and return 1.
 576  */
 577 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
 578 {
 579         if (!is_hpet_enabled())
 580                 return 0;
 581
 582         hpet_rtc_flags &= ~bit_mask;
 583         return 1;
 584 }
 585 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
 586
 587 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
 588 {
 589         unsigned long oldbits = hpet_rtc_flags;
 590
 591         if (!is_hpet_enabled())
 592                 return 0;
 593
 594         hpet_rtc_flags |= bit_mask;
 595
 596         if (!oldbits)
 597                 hpet_rtc_timer_init();
 598
 599         return 1;
 600 }
 601 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
 602
 603 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
 604                         unsigned char sec)
 605 {
 606         if (!is_hpet_enabled())
 607                 return 0;
 608
 609         hpet_alarm_time.tm_hour = hrs;
 610         hpet_alarm_time.tm_min = min;
 611         hpet_alarm_time.tm_sec = sec;
 612
 613         return 1;
 614 }
 615 EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
 616
 617 int hpet_set_periodic_freq(unsigned long freq)
 618 {
 619         uint64_t clc;
 620
 621         if (!is_hpet_enabled())
 622                 return 0;
 623
 624         if (freq <= DEFAULT_RTC_INT_FREQ)
 625                 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
 626         else {
 627                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
 628                 do_div(clc, freq);
 629                 clc >>= hpet_clockevent.shift;
 630                 hpet_pie_delta = (unsigned long) clc;
 631         }
 632         return 1;
 633 }
 634 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
 635
 636 int hpet_rtc_dropped_irq(void)
 637 {
 638         return is_hpet_enabled();
 639 }
 640 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
 641
 642 static void hpet_rtc_timer_reinit(void)
 643 {
 644         unsigned long cfg, delta;
 645         int lost_ints = -1;
 646
 647         if (unlikely(!hpet_rtc_flags)) {
 648                 cfg = hpet_readl(HPET_T1_CFG);
 649                 cfg &= ~HPET_TN_ENABLE;
 650                 hpet_writel(cfg, HPET_T1_CFG);
 651                 return;
 652         }
 653
 654         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
 655                 delta = hpet_default_delta;
 656         else
 657                 delta = hpet_pie_delta;
 658
 659         /*
 660          * Increment the comparator value until we are ahead of the
 661          * current count.
 662          */
 663         do {
 664                 hpet_t1_cmp += delta;
 665                 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
 666                 lost_ints++;
 667         } while ((long)(hpet_readl(HPET_COUNTER) - hpet_t1_cmp) > 0);
 668
 669         if (lost_ints) {
 670                 if (hpet_rtc_flags & RTC_PIE)
 671                         hpet_pie_count += lost_ints;
 672                 if (printk_ratelimit())
 673                         printk(KERN_WARNING "rtc: lost %d interrupts\n",
 674                                 lost_ints);
 675         }
 676 }
 677
 678 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
 679 {
 680         struct rtc_time curr_time;
 681         unsigned long rtc_int_flag = 0;
 682
 683         hpet_rtc_timer_reinit();
 684         memset(&curr_time, 0, sizeof(struct rtc_time));
 685
 686         if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
 687                 get_rtc_time(&curr_time);
 688
 689         if (hpet_rtc_flags & RTC_UIE &&
 690             curr_time.tm_sec != hpet_prev_update_sec) {
 691                 rtc_int_flag = RTC_UF;
 692                 hpet_prev_update_sec = curr_time.tm_sec;
 693         }
 694
 695         if (hpet_rtc_flags & RTC_PIE &&
 696             ++hpet_pie_count >= hpet_pie_limit) {
 697                 rtc_int_flag |= RTC_PF;
 698                 hpet_pie_count = 0;
 699         }
 700
 701         if (hpet_rtc_flags & RTC_AIE &&
 702             (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
 703             (curr_time.tm_min == hpet_alarm_time.tm_min) &&
 704             (curr_time.tm_hour == hpet_alarm_time.tm_hour))
 705                         rtc_int_flag |= RTC_AF;
 706
 707         if (rtc_int_flag) {
 708                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
 709                 if (irq_handler)
 710                         irq_handler(rtc_int_flag, dev_id);
 711         }
 712         return IRQ_HANDLED;
 713 }
 714 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);
 715 #endif