2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
16 * Copyright (C) 2007 Alan Stern
17 * Copyright (C) 2009 IBM Corporation
18 * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
20 * Authors: Alan Stern <stern@rowland.harvard.edu>
21 * K.Prasad <prasad@linux.vnet.ibm.com>
22 * Frederic Weisbecker <fweisbec@gmail.com>
26 * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
27 * using the CPU's debug registers.
30 #include <linux/perf_event.h>
31 #include <linux/hw_breakpoint.h>
32 #include <linux/irqflags.h>
33 #include <linux/notifier.h>
34 #include <linux/kallsyms.h>
35 #include <linux/percpu.h>
36 #include <linux/kdebug.h>
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/sched.h>
40 #include <linux/smp.h>
42 #include <asm/hw_breakpoint.h>
43 #include <asm/processor.h>
44 #include <asm/debugreg.h>
46 /* Per cpu debug control register value */
47 DEFINE_PER_CPU(unsigned long, cpu_dr7
);
48 EXPORT_PER_CPU_SYMBOL(cpu_dr7
);
50 /* Per cpu debug address registers values */
51 static DEFINE_PER_CPU(unsigned long, cpu_debugreg
[HBP_NUM
]);
54 * Stores the breakpoints currently in use on each breakpoint address
55 * register for each cpus
57 static DEFINE_PER_CPU(struct perf_event
*, bp_per_reg
[HBP_NUM
]);
60 static inline unsigned long
61 __encode_dr7(int drnum
, unsigned int len
, unsigned int type
)
63 unsigned long bp_info
;
65 bp_info
= (len
| type
) & 0xf;
66 bp_info
<<= (DR_CONTROL_SHIFT
+ drnum
* DR_CONTROL_SIZE
);
67 bp_info
|= (DR_GLOBAL_ENABLE
<< (drnum
* DR_ENABLE_SIZE
));
73 * Encode the length, type, Exact, and Enable bits for a particular breakpoint
74 * as stored in debug register 7.
76 unsigned long encode_dr7(int drnum
, unsigned int len
, unsigned int type
)
78 return __encode_dr7(drnum
, len
, type
) | DR_GLOBAL_SLOWDOWN
;
82 * Decode the length and type bits for a particular breakpoint as
83 * stored in debug register 7. Return the "enabled" status.
85 int decode_dr7(unsigned long dr7
, int bpnum
, unsigned *len
, unsigned *type
)
87 int bp_info
= dr7
>> (DR_CONTROL_SHIFT
+ bpnum
* DR_CONTROL_SIZE
);
89 *len
= (bp_info
& 0xc) | 0x40;
90 *type
= (bp_info
& 0x3) | 0x80;
92 return (dr7
>> (bpnum
* DR_ENABLE_SIZE
)) & 0x3;
96 * Install a perf counter breakpoint.
98 * We seek a free debug address register and use it for this
99 * breakpoint. Eventually we enable it in the debug control register.
101 * Atomic: we hold the counter->ctx->lock and we only handle variables
102 * and registers local to this cpu.
104 int arch_install_hw_breakpoint(struct perf_event
*bp
)
106 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
110 for (i
= 0; i
< HBP_NUM
; i
++) {
111 struct perf_event
**slot
= this_cpu_ptr(&bp_per_reg
[i
]);
119 if (WARN_ONCE(i
== HBP_NUM
, "Can't find any breakpoint slot"))
122 set_debugreg(info
->address
, i
);
123 __this_cpu_write(cpu_debugreg
[i
], info
->address
);
125 dr7
= this_cpu_ptr(&cpu_dr7
);
126 *dr7
|= encode_dr7(i
, info
->len
, info
->type
);
128 set_debugreg(*dr7
, 7);
134 * Uninstall the breakpoint contained in the given counter.
136 * First we search the debug address register it uses and then we disable
139 * Atomic: we hold the counter->ctx->lock and we only handle variables
140 * and registers local to this cpu.
142 void arch_uninstall_hw_breakpoint(struct perf_event
*bp
)
144 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
148 for (i
= 0; i
< HBP_NUM
; i
++) {
149 struct perf_event
**slot
= this_cpu_ptr(&bp_per_reg
[i
]);
157 if (WARN_ONCE(i
== HBP_NUM
, "Can't find any breakpoint slot"))
160 dr7
= this_cpu_ptr(&cpu_dr7
);
161 *dr7
&= ~__encode_dr7(i
, info
->len
, info
->type
);
163 set_debugreg(*dr7
, 7);
166 static int get_hbp_len(u8 hbp_len
)
168 unsigned int len_in_bytes
= 0;
171 case X86_BREAKPOINT_LEN_1
:
174 case X86_BREAKPOINT_LEN_2
:
177 case X86_BREAKPOINT_LEN_4
:
181 case X86_BREAKPOINT_LEN_8
:
190 * Check for virtual address in kernel space.
192 int arch_check_bp_in_kernelspace(struct perf_event
*bp
)
196 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
199 len
= get_hbp_len(info
->len
);
201 return (va
>= TASK_SIZE
) && ((va
+ len
- 1) >= TASK_SIZE
);
204 int arch_bp_generic_fields(int x86_len
, int x86_type
,
205 int *gen_len
, int *gen_type
)
209 case X86_BREAKPOINT_EXECUTE
:
210 if (x86_len
!= X86_BREAKPOINT_LEN_X
)
213 *gen_type
= HW_BREAKPOINT_X
;
214 *gen_len
= sizeof(long);
216 case X86_BREAKPOINT_WRITE
:
217 *gen_type
= HW_BREAKPOINT_W
;
219 case X86_BREAKPOINT_RW
:
220 *gen_type
= HW_BREAKPOINT_W
| HW_BREAKPOINT_R
;
228 case X86_BREAKPOINT_LEN_1
:
229 *gen_len
= HW_BREAKPOINT_LEN_1
;
231 case X86_BREAKPOINT_LEN_2
:
232 *gen_len
= HW_BREAKPOINT_LEN_2
;
234 case X86_BREAKPOINT_LEN_4
:
235 *gen_len
= HW_BREAKPOINT_LEN_4
;
238 case X86_BREAKPOINT_LEN_8
:
239 *gen_len
= HW_BREAKPOINT_LEN_8
;
250 static int arch_build_bp_info(struct perf_event
*bp
)
252 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
254 info
->address
= bp
->attr
.bp_addr
;
257 switch (bp
->attr
.bp_type
) {
258 case HW_BREAKPOINT_W
:
259 info
->type
= X86_BREAKPOINT_WRITE
;
261 case HW_BREAKPOINT_W
| HW_BREAKPOINT_R
:
262 info
->type
= X86_BREAKPOINT_RW
;
264 case HW_BREAKPOINT_X
:
265 info
->type
= X86_BREAKPOINT_EXECUTE
;
267 * x86 inst breakpoints need to have a specific undefined len.
268 * But we still need to check userspace is not trying to setup
269 * an unsupported length, to get a range breakpoint for example.
271 if (bp
->attr
.bp_len
== sizeof(long)) {
272 info
->len
= X86_BREAKPOINT_LEN_X
;
280 switch (bp
->attr
.bp_len
) {
281 case HW_BREAKPOINT_LEN_1
:
282 info
->len
= X86_BREAKPOINT_LEN_1
;
284 case HW_BREAKPOINT_LEN_2
:
285 info
->len
= X86_BREAKPOINT_LEN_2
;
287 case HW_BREAKPOINT_LEN_4
:
288 info
->len
= X86_BREAKPOINT_LEN_4
;
291 case HW_BREAKPOINT_LEN_8
:
292 info
->len
= X86_BREAKPOINT_LEN_8
;
302 * Validate the arch-specific HW Breakpoint register settings
304 int arch_validate_hwbkpt_settings(struct perf_event
*bp
)
306 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
311 ret
= arch_build_bp_info(bp
);
318 case X86_BREAKPOINT_LEN_1
:
321 case X86_BREAKPOINT_LEN_2
:
324 case X86_BREAKPOINT_LEN_4
:
328 case X86_BREAKPOINT_LEN_8
:
337 * Check that the low-order bits of the address are appropriate
338 * for the alignment implied by len.
340 if (info
->address
& align
)
347 * Dump the debug register contents to the user.
348 * We can't dump our per cpu values because it
349 * may contain cpu wide breakpoint, something that
350 * doesn't belong to the current task.
352 * TODO: include non-ptrace user breakpoints (perf)
354 void aout_dump_debugregs(struct user
*dump
)
358 struct perf_event
*bp
;
359 struct arch_hw_breakpoint
*info
;
360 struct thread_struct
*thread
= ¤t
->thread
;
362 for (i
= 0; i
< HBP_NUM
; i
++) {
363 bp
= thread
->ptrace_bps
[i
];
365 if (bp
&& !bp
->attr
.disabled
) {
366 dump
->u_debugreg
[i
] = bp
->attr
.bp_addr
;
367 info
= counter_arch_bp(bp
);
368 dr7
|= encode_dr7(i
, info
->len
, info
->type
);
370 dump
->u_debugreg
[i
] = 0;
374 dump
->u_debugreg
[4] = 0;
375 dump
->u_debugreg
[5] = 0;
376 dump
->u_debugreg
[6] = current
->thread
.debugreg6
;
378 dump
->u_debugreg
[7] = dr7
;
380 EXPORT_SYMBOL_GPL(aout_dump_debugregs
);
383 * Release the user breakpoints used by ptrace
385 void flush_ptrace_hw_breakpoint(struct task_struct
*tsk
)
388 struct thread_struct
*t
= &tsk
->thread
;
390 for (i
= 0; i
< HBP_NUM
; i
++) {
391 unregister_hw_breakpoint(t
->ptrace_bps
[i
]);
392 t
->ptrace_bps
[i
] = NULL
;
399 void hw_breakpoint_restore(void)
401 set_debugreg(__this_cpu_read(cpu_debugreg
[0]), 0);
402 set_debugreg(__this_cpu_read(cpu_debugreg
[1]), 1);
403 set_debugreg(__this_cpu_read(cpu_debugreg
[2]), 2);
404 set_debugreg(__this_cpu_read(cpu_debugreg
[3]), 3);
405 set_debugreg(current
->thread
.debugreg6
, 6);
406 set_debugreg(__this_cpu_read(cpu_dr7
), 7);
408 EXPORT_SYMBOL_GPL(hw_breakpoint_restore
);
411 * Handle debug exception notifications.
413 * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
415 * NOTIFY_DONE returned if one of the following conditions is true.
416 * i) When the causative address is from user-space and the exception
417 * is a valid one, i.e. not triggered as a result of lazy debug register
419 * ii) When there are more bits than trap<n> set in DR6 register (such
420 * as BD, BS or BT) indicating that more than one debug condition is
421 * met and requires some more action in do_debug().
423 * NOTIFY_STOP returned for all other cases
426 static int hw_breakpoint_handler(struct die_args
*args
)
428 int i
, cpu
, rc
= NOTIFY_STOP
;
429 struct perf_event
*bp
;
430 unsigned long dr7
, dr6
;
431 unsigned long *dr6_p
;
433 /* The DR6 value is pointed by args->err */
434 dr6_p
= (unsigned long *)ERR_PTR(args
->err
);
437 /* If it's a single step, TRAP bits are random */
441 /* Do an early return if no trap bits are set in DR6 */
442 if ((dr6
& DR_TRAP_BITS
) == 0)
445 get_debugreg(dr7
, 7);
446 /* Disable breakpoints during exception handling */
447 set_debugreg(0UL, 7);
449 * Assert that local interrupts are disabled
450 * Reset the DRn bits in the virtualized register value.
451 * The ptrace trigger routine will add in whatever is needed.
453 current
->thread
.debugreg6
&= ~DR_TRAP_BITS
;
456 /* Handle all the breakpoints that were triggered */
457 for (i
= 0; i
< HBP_NUM
; ++i
) {
458 if (likely(!(dr6
& (DR_TRAP0
<< i
))))
462 * The counter may be concurrently released but that can only
463 * occur from a call_rcu() path. We can then safely fetch
464 * the breakpoint, use its callback, touch its counter
465 * while we are in an rcu_read_lock() path.
469 bp
= per_cpu(bp_per_reg
[i
], cpu
);
471 * Reset the 'i'th TRAP bit in dr6 to denote completion of
474 (*dr6_p
) &= ~(DR_TRAP0
<< i
);
476 * bp can be NULL due to lazy debug register switching
477 * or due to concurrent perf counter removing.
484 perf_bp_event(bp
, args
->regs
);
487 * Set up resume flag to avoid breakpoint recursion when
488 * returning back to origin.
490 if (bp
->hw
.info
.type
== X86_BREAKPOINT_EXECUTE
)
491 args
->regs
->flags
|= X86_EFLAGS_RF
;
496 * Further processing in do_debug() is needed for a) user-space
497 * breakpoints (to generate signals) and b) when the system has
498 * taken exception due to multiple causes
500 if ((current
->thread
.debugreg6
& DR_TRAP_BITS
) ||
501 (dr6
& (~DR_TRAP_BITS
)))
504 set_debugreg(dr7
, 7);
511 * Handle debug exception notifications.
513 int hw_breakpoint_exceptions_notify(
514 struct notifier_block
*unused
, unsigned long val
, void *data
)
516 if (val
!= DIE_DEBUG
)
519 return hw_breakpoint_handler(data
);
522 void hw_breakpoint_pmu_read(struct perf_event
*bp
)
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