2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
19 #include <asm/fpu-internal.h>
23 * Were we in an interrupt that interrupted kernel mode?
25 * For now, on xsave platforms we will return interrupted
26 * kernel FPU as not-idle. TBD: As we use non-lazy FPU restore
27 * for xsave platforms, ideally we can change the return value
28 * to something like __thread_has_fpu(current). But we need to
29 * be careful of doing __thread_clear_has_fpu() before saving
30 * the FPU etc for supporting nested uses etc. For now, take
33 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
34 * pair does nothing at all: the thread must not have fpu (so
35 * that we don't try to save the FPU state), and TS must
36 * be set (so that the clts/stts pair does nothing that is
37 * visible in the interrupted kernel thread).
39 static inline bool interrupted_kernel_fpu_idle(void)
44 return !__thread_has_fpu(current
) &&
45 (read_cr0() & X86_CR0_TS
);
49 * Were we in user mode (or vm86 mode) when we were
52 * Doing kernel_fpu_begin/end() is ok if we are running
53 * in an interrupt context from user mode - we'll just
54 * save the FPU state as required.
56 static inline bool interrupted_user_mode(void)
58 struct pt_regs
*regs
= get_irq_regs();
59 return regs
&& user_mode_vm(regs
);
63 * Can we use the FPU in kernel mode with the
64 * whole "kernel_fpu_begin/end()" sequence?
66 * It's always ok in process context (ie "not interrupt")
67 * but it is sometimes ok even from an irq.
69 bool irq_fpu_usable(void)
71 return !in_interrupt() ||
72 interrupted_user_mode() ||
73 interrupted_kernel_fpu_idle();
75 EXPORT_SYMBOL(irq_fpu_usable
);
77 void kernel_fpu_begin(void)
79 struct task_struct
*me
= current
;
81 WARN_ON_ONCE(!irq_fpu_usable());
83 if (__thread_has_fpu(me
)) {
85 __thread_clear_has_fpu(me
);
86 /* We do 'stts()' in kernel_fpu_end() */
87 } else if (!use_xsave()) {
88 this_cpu_write(fpu_owner_task
, NULL
);
92 EXPORT_SYMBOL(kernel_fpu_begin
);
94 void kernel_fpu_end(void)
102 EXPORT_SYMBOL(kernel_fpu_end
);
104 void unlazy_fpu(struct task_struct
*tsk
)
107 if (__thread_has_fpu(tsk
)) {
108 __save_init_fpu(tsk
);
109 __thread_fpu_end(tsk
);
111 tsk
->fpu_counter
= 0;
114 EXPORT_SYMBOL(unlazy_fpu
);
116 unsigned int mxcsr_feature_mask __read_mostly
= 0xffffffffu
;
117 unsigned int xstate_size
;
118 EXPORT_SYMBOL_GPL(xstate_size
);
119 static struct i387_fxsave_struct fx_scratch __cpuinitdata
;
121 static void __cpuinit
mxcsr_feature_mask_init(void)
123 unsigned long mask
= 0;
127 memset(&fx_scratch
, 0, sizeof(struct i387_fxsave_struct
));
128 asm volatile("fxsave %0" : : "m" (fx_scratch
));
129 mask
= fx_scratch
.mxcsr_mask
;
133 mxcsr_feature_mask
&= mask
;
137 static void __cpuinit
init_thread_xstate(void)
140 * Note that xstate_size might be overwriten later during
146 * Disable xsave as we do not support it if i387
147 * emulation is enabled.
149 setup_clear_cpu_cap(X86_FEATURE_XSAVE
);
150 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT
);
151 xstate_size
= sizeof(struct i387_soft_struct
);
156 xstate_size
= sizeof(struct i387_fxsave_struct
);
158 xstate_size
= sizeof(struct i387_fsave_struct
);
162 * Called at bootup to set up the initial FPU state that is later cloned
163 * into all processes.
166 void __cpuinit
fpu_init(void)
169 unsigned long cr4_mask
= 0;
172 cr4_mask
|= X86_CR4_OSFXSR
;
174 cr4_mask
|= X86_CR4_OSXMMEXCPT
;
176 set_in_cr4(cr4_mask
);
179 cr0
&= ~(X86_CR0_TS
|X86_CR0_EM
); /* clear TS and EM */
184 if (!smp_processor_id())
185 init_thread_xstate();
187 mxcsr_feature_mask_init();
188 /* clean state in init */
189 current_thread_info()->status
= 0;
193 void fpu_finit(struct fpu
*fpu
)
196 finit_soft_fpu(&fpu
->state
->soft
);
201 struct i387_fxsave_struct
*fx
= &fpu
->state
->fxsave
;
203 memset(fx
, 0, xstate_size
);
206 fx
->mxcsr
= MXCSR_DEFAULT
;
208 struct i387_fsave_struct
*fp
= &fpu
->state
->fsave
;
209 memset(fp
, 0, xstate_size
);
210 fp
->cwd
= 0xffff037fu
;
211 fp
->swd
= 0xffff0000u
;
212 fp
->twd
= 0xffffffffu
;
213 fp
->fos
= 0xffff0000u
;
216 EXPORT_SYMBOL_GPL(fpu_finit
);
219 * The _current_ task is using the FPU for the first time
220 * so initialize it and set the mxcsr to its default
221 * value at reset if we support XMM instructions and then
222 * remember the current task has used the FPU.
224 int init_fpu(struct task_struct
*tsk
)
228 if (tsk_used_math(tsk
)) {
229 if (HAVE_HWFP
&& tsk
== current
)
231 tsk
->thread
.fpu
.last_cpu
= ~0;
236 * Memory allocation at the first usage of the FPU and other state.
238 ret
= fpu_alloc(&tsk
->thread
.fpu
);
242 fpu_finit(&tsk
->thread
.fpu
);
244 set_stopped_child_used_math(tsk
);
247 EXPORT_SYMBOL_GPL(init_fpu
);
250 * The xstateregs_active() routine is the same as the fpregs_active() routine,
251 * as the "regset->n" for the xstate regset will be updated based on the feature
252 * capabilites supported by the xsave.
254 int fpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
256 return tsk_used_math(target
) ? regset
->n
: 0;
259 int xfpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
261 return (cpu_has_fxsr
&& tsk_used_math(target
)) ? regset
->n
: 0;
264 int xfpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
265 unsigned int pos
, unsigned int count
,
266 void *kbuf
, void __user
*ubuf
)
273 ret
= init_fpu(target
);
277 sanitize_i387_state(target
);
279 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
280 &target
->thread
.fpu
.state
->fxsave
, 0, -1);
283 int xfpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
284 unsigned int pos
, unsigned int count
,
285 const void *kbuf
, const void __user
*ubuf
)
292 ret
= init_fpu(target
);
296 sanitize_i387_state(target
);
298 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
299 &target
->thread
.fpu
.state
->fxsave
, 0, -1);
302 * mxcsr reserved bits must be masked to zero for security reasons.
304 target
->thread
.fpu
.state
->fxsave
.mxcsr
&= mxcsr_feature_mask
;
307 * update the header bits in the xsave header, indicating the
308 * presence of FP and SSE state.
311 target
->thread
.fpu
.state
->xsave
.xsave_hdr
.xstate_bv
|= XSTATE_FPSSE
;
316 int xstateregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
317 unsigned int pos
, unsigned int count
,
318 void *kbuf
, void __user
*ubuf
)
325 ret
= init_fpu(target
);
330 * Copy the 48bytes defined by the software first into the xstate
331 * memory layout in the thread struct, so that we can copy the entire
332 * xstateregs to the user using one user_regset_copyout().
334 memcpy(&target
->thread
.fpu
.state
->fxsave
.sw_reserved
,
335 xstate_fx_sw_bytes
, sizeof(xstate_fx_sw_bytes
));
338 * Copy the xstate memory layout.
340 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
341 &target
->thread
.fpu
.state
->xsave
, 0, -1);
345 int xstateregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
346 unsigned int pos
, unsigned int count
,
347 const void *kbuf
, const void __user
*ubuf
)
350 struct xsave_hdr_struct
*xsave_hdr
;
355 ret
= init_fpu(target
);
359 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
360 &target
->thread
.fpu
.state
->xsave
, 0, -1);
363 * mxcsr reserved bits must be masked to zero for security reasons.
365 target
->thread
.fpu
.state
->fxsave
.mxcsr
&= mxcsr_feature_mask
;
367 xsave_hdr
= &target
->thread
.fpu
.state
->xsave
.xsave_hdr
;
369 xsave_hdr
->xstate_bv
&= pcntxt_mask
;
371 * These bits must be zero.
373 xsave_hdr
->reserved1
[0] = xsave_hdr
->reserved1
[1] = 0;
378 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
381 * FPU tag word conversions.
384 static inline unsigned short twd_i387_to_fxsr(unsigned short twd
)
386 unsigned int tmp
; /* to avoid 16 bit prefixes in the code */
388 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
390 tmp
= (tmp
| (tmp
>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
391 /* and move the valid bits to the lower byte. */
392 tmp
= (tmp
| (tmp
>> 1)) & 0x3333; /* 00VV00VV00VV00VV */
393 tmp
= (tmp
| (tmp
>> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
394 tmp
= (tmp
| (tmp
>> 4)) & 0x00ff; /* 00000000VVVVVVVV */
399 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
400 #define FP_EXP_TAG_VALID 0
401 #define FP_EXP_TAG_ZERO 1
402 #define FP_EXP_TAG_SPECIAL 2
403 #define FP_EXP_TAG_EMPTY 3
405 static inline u32
twd_fxsr_to_i387(struct i387_fxsave_struct
*fxsave
)
408 u32 tos
= (fxsave
->swd
>> 11) & 7;
409 u32 twd
= (unsigned long) fxsave
->twd
;
411 u32 ret
= 0xffff0000u
;
414 for (i
= 0; i
< 8; i
++, twd
>>= 1) {
416 st
= FPREG_ADDR(fxsave
, (i
- tos
) & 7);
418 switch (st
->exponent
& 0x7fff) {
420 tag
= FP_EXP_TAG_SPECIAL
;
423 if (!st
->significand
[0] &&
424 !st
->significand
[1] &&
425 !st
->significand
[2] &&
427 tag
= FP_EXP_TAG_ZERO
;
429 tag
= FP_EXP_TAG_SPECIAL
;
432 if (st
->significand
[3] & 0x8000)
433 tag
= FP_EXP_TAG_VALID
;
435 tag
= FP_EXP_TAG_SPECIAL
;
439 tag
= FP_EXP_TAG_EMPTY
;
441 ret
|= tag
<< (2 * i
);
447 * FXSR floating point environment conversions.
451 convert_from_fxsr(struct user_i387_ia32_struct
*env
, struct task_struct
*tsk
)
453 struct i387_fxsave_struct
*fxsave
= &tsk
->thread
.fpu
.state
->fxsave
;
454 struct _fpreg
*to
= (struct _fpreg
*) &env
->st_space
[0];
455 struct _fpxreg
*from
= (struct _fpxreg
*) &fxsave
->st_space
[0];
458 env
->cwd
= fxsave
->cwd
| 0xffff0000u
;
459 env
->swd
= fxsave
->swd
| 0xffff0000u
;
460 env
->twd
= twd_fxsr_to_i387(fxsave
);
463 env
->fip
= fxsave
->rip
;
464 env
->foo
= fxsave
->rdp
;
466 * should be actually ds/cs at fpu exception time, but
467 * that information is not available in 64bit mode.
469 env
->fcs
= task_pt_regs(tsk
)->cs
;
470 if (tsk
== current
) {
471 savesegment(ds
, env
->fos
);
473 env
->fos
= tsk
->thread
.ds
;
475 env
->fos
|= 0xffff0000;
477 env
->fip
= fxsave
->fip
;
478 env
->fcs
= (u16
) fxsave
->fcs
| ((u32
) fxsave
->fop
<< 16);
479 env
->foo
= fxsave
->foo
;
480 env
->fos
= fxsave
->fos
;
483 for (i
= 0; i
< 8; ++i
)
484 memcpy(&to
[i
], &from
[i
], sizeof(to
[0]));
487 void convert_to_fxsr(struct task_struct
*tsk
,
488 const struct user_i387_ia32_struct
*env
)
491 struct i387_fxsave_struct
*fxsave
= &tsk
->thread
.fpu
.state
->fxsave
;
492 struct _fpreg
*from
= (struct _fpreg
*) &env
->st_space
[0];
493 struct _fpxreg
*to
= (struct _fpxreg
*) &fxsave
->st_space
[0];
496 fxsave
->cwd
= env
->cwd
;
497 fxsave
->swd
= env
->swd
;
498 fxsave
->twd
= twd_i387_to_fxsr(env
->twd
);
499 fxsave
->fop
= (u16
) ((u32
) env
->fcs
>> 16);
501 fxsave
->rip
= env
->fip
;
502 fxsave
->rdp
= env
->foo
;
503 /* cs and ds ignored */
505 fxsave
->fip
= env
->fip
;
506 fxsave
->fcs
= (env
->fcs
& 0xffff);
507 fxsave
->foo
= env
->foo
;
508 fxsave
->fos
= env
->fos
;
511 for (i
= 0; i
< 8; ++i
)
512 memcpy(&to
[i
], &from
[i
], sizeof(from
[0]));
515 int fpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
516 unsigned int pos
, unsigned int count
,
517 void *kbuf
, void __user
*ubuf
)
519 struct user_i387_ia32_struct env
;
522 ret
= init_fpu(target
);
527 return fpregs_soft_get(target
, regset
, pos
, count
, kbuf
, ubuf
);
530 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
531 &target
->thread
.fpu
.state
->fsave
, 0,
535 sanitize_i387_state(target
);
537 if (kbuf
&& pos
== 0 && count
== sizeof(env
)) {
538 convert_from_fxsr(kbuf
, target
);
542 convert_from_fxsr(&env
, target
);
544 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
547 int fpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
548 unsigned int pos
, unsigned int count
,
549 const void *kbuf
, const void __user
*ubuf
)
551 struct user_i387_ia32_struct env
;
554 ret
= init_fpu(target
);
558 sanitize_i387_state(target
);
561 return fpregs_soft_set(target
, regset
, pos
, count
, kbuf
, ubuf
);
564 return user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
565 &target
->thread
.fpu
.state
->fsave
, 0, -1);
568 if (pos
> 0 || count
< sizeof(env
))
569 convert_from_fxsr(&env
, target
);
571 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
573 convert_to_fxsr(target
, &env
);
576 * update the header bit in the xsave header, indicating the
580 target
->thread
.fpu
.state
->xsave
.xsave_hdr
.xstate_bv
|= XSTATE_FP
;
585 * FPU state for core dumps.
586 * This is only used for a.out dumps now.
587 * It is declared generically using elf_fpregset_t (which is
588 * struct user_i387_struct) but is in fact only used for 32-bit
589 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
591 int dump_fpu(struct pt_regs
*regs
, struct user_i387_struct
*fpu
)
593 struct task_struct
*tsk
= current
;
596 fpvalid
= !!used_math();
598 fpvalid
= !fpregs_get(tsk
, NULL
,
599 0, sizeof(struct user_i387_ia32_struct
),
604 EXPORT_SYMBOL(dump_fpu
);
606 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */