arch/x86/kernel/mfgpt_32.c

   1 /*
   2  * Driver/API for AMD Geode Multi-Function General Purpose Timers (MFGPT)
   3  *
   4  * Copyright (C) 2006, Advanced Micro Devices, Inc.
   5  * Copyright (C) 2007, Andres Salomon <dilinger@debian.org>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of version 2 of the GNU General Public License
   9  * as published by the Free Software Foundation.
  10  *
  11  * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
  12  */
  13
  14 /*
  15  * We are using the 32Khz input clock - its the only one that has the
  16  * ranges we find desirable.  The following table lists the suitable
  17  * divisors and the associated hz, minimum interval
  18  * and the maximum interval:
  19  *
  20  *  Divisor   Hz      Min Delta (S) Max Delta (S)
  21  *   1        32000     .0005          2.048
  22  *   2        16000      .001          4.096
  23  *   4         8000      .002          8.192
  24  *   8         4000      .004         16.384
  25  *   16        2000      .008         32.768
  26  *   32        1000      .016         65.536
  27  *   64         500      .032        131.072
  28  *  128         250      .064        262.144
  29  *  256         125      .128        524.288
  30  */
  31
  32 #include <linux/kernel.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/module.h>
  35 #include <asm/geode.h>
  36
  37 #define F_AVAIL    0x01
  38
  39 static struct mfgpt_timer_t {
  40         int flags;
  41         struct module *owner;
  42 } mfgpt_timers[MFGPT_MAX_TIMERS];
  43
  44 /* Selected from the table above */
  45
  46 #define MFGPT_DIVISOR 16
  47 #define MFGPT_SCALE  4     /* divisor = 2^(scale) */
  48 #define MFGPT_HZ  (32000 / MFGPT_DIVISOR)
  49 #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
  50
  51 #ifdef CONFIG_GEODE_MFGPT_TIMER
  52 static int __init mfgpt_timer_setup(void);
  53 #else
  54 #define mfgpt_timer_setup() (0)
  55 #endif
  56
  57 /* Allow for disabling of MFGPTs */
  58 static int disable;
  59 static int __init mfgpt_disable(char *s)
  60 {
  61         disable = 1;
  62         return 1;
  63 }
  64 __setup("nomfgpt", mfgpt_disable);
  65
  66 /* Reset the MFGPT timers. This is required by some broken BIOSes which already
  67  * do the same and leave the system in an unstable state. TinyBIOS 0.98 is
  68  * affected at least (0.99 is OK with MFGPT workaround left to off).
  69  */
  70 static int __init mfgpt_fix(char *s)
  71 {
  72         u32 val, dummy;
  73
  74         /* The following udocumented bit resets the MFGPT timers */
  75         val = 0xFF; dummy = 0;
  76         wrmsr(0x5140002B, val, dummy);
  77         return 1;
  78 }
  79 __setup("mfgptfix", mfgpt_fix);
  80
  81 /*
  82  * Check whether any MFGPTs are available for the kernel to use.  In most
  83  * cases, firmware that uses AMD's VSA code will claim all timers during
  84  * bootup; we certainly don't want to take them if they're already in use.
  85  * In other cases (such as with VSAless OpenFirmware), the system firmware
  86  * leaves timers available for us to use.
  87  */
  88 int __init geode_mfgpt_detect(void)
  89 {
  90         int count = 0, i;
  91         u16 val;
  92
  93         if (disable) {
  94                 printk(KERN_INFO "geode-mfgpt:  Skipping MFGPT setup\n");
  95                 return 0;
  96         }
  97
  98         for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
  99                 val = geode_mfgpt_read(i, MFGPT_REG_SETUP);
 100                 if (!(val & MFGPT_SETUP_SETUP)) {
 101                         mfgpt_timers[i].flags = F_AVAIL;
 102                         count++;
 103                 }
 104         }
 105
 106         /* set up clock event device, if desired */
 107         i = mfgpt_timer_setup();
 108
 109         return count;
 110 }
 111
 112 int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
 113 {
 114         u32 msr, mask, value, dummy;
 115         int shift = (cmp == MFGPT_CMP1) ? 0 : 8;
 116
 117         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
 118                 return -EIO;
 119
 120         /*
 121          * The register maps for these are described in sections 6.17.1.x of
 122          * the AMD Geode CS5536 Companion Device Data Book.
 123          */
 124         switch (event) {
 125         case MFGPT_EVENT_RESET:
 126                 /*
 127                  * XXX: According to the docs, we cannot reset timers above
 128                  * 6; that is, resets for 7 and 8 will be ignored.  Is this
 129                  * a problem?   -dilinger
 130                  */
 131                 msr = MFGPT_NR_MSR;
 132                 mask = 1 << (timer + 24);
 133                 break;
 134
 135         case MFGPT_EVENT_NMI:
 136                 msr = MFGPT_NR_MSR;
 137                 mask = 1 << (timer + shift);
 138                 break;
 139
 140         case MFGPT_EVENT_IRQ:
 141                 msr = MFGPT_IRQ_MSR;
 142                 mask = 1 << (timer + shift);
 143                 break;
 144
 145         default:
 146                 return -EIO;
 147         }
 148
 149         rdmsr(msr, value, dummy);
 150
 151         if (enable)
 152                 value |= mask;
 153         else
 154                 value &= ~mask;
 155
 156         wrmsr(msr, value, dummy);
 157         return 0;
 158 }
 159
 160 int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
 161 {
 162         u32 val, dummy;
 163         int offset;
 164
 165         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
 166                 return -EIO;
 167
 168         if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
 169                 return -EIO;
 170
 171         rdmsr(MSR_PIC_ZSEL_LOW, val, dummy);
 172
 173         offset = (timer % 4) * 4;
 174
 175         val &= ~((0xF << offset) | (0xF << (offset + 16)));
 176
 177         if (enable) {
 178                 val |= (irq & 0x0F) << (offset);
 179                 val |= (irq & 0x0F) << (offset + 16);
 180         }
 181
 182         wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
 183         return 0;
 184 }
 185
 186 static int mfgpt_get(int timer, struct module *owner)
 187 {
 188         mfgpt_timers[timer].flags &= ~F_AVAIL;
 189         mfgpt_timers[timer].owner = owner;
 190         printk(KERN_INFO "geode-mfgpt:  Registered timer %d\n", timer);
 191         return timer;
 192 }
 193
 194 int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner)
 195 {
 196         int i;
 197
 198         if (!geode_get_dev_base(GEODE_DEV_MFGPT))
 199                 return -ENODEV;
 200         if (timer >= MFGPT_MAX_TIMERS)
 201                 return -EIO;
 202
 203         if (timer < 0) {
 204                 /* Try to find an available timer */
 205                 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
 206                         if (mfgpt_timers[i].flags & F_AVAIL)
 207                                 return mfgpt_get(i, owner);
 208
 209                         if (i == 5 && domain == MFGPT_DOMAIN_WORKING)
 210                                 break;
 211                 }
 212         } else {
 213                 /* If they requested a specific timer, try to honor that */
 214                 if (mfgpt_timers[timer].flags & F_AVAIL)
 215                         return mfgpt_get(timer, owner);
 216         }
 217
 218         /* No timers available - too bad */
 219         return -1;
 220 }
 221
 222
 223 #ifdef CONFIG_GEODE_MFGPT_TIMER
 224
 225 /*
 226  * The MFPGT timers on the CS5536 provide us with suitable timers to use
 227  * as clock event sources - not as good as a HPET or APIC, but certainly
 228  * better then the PIT.  This isn't a general purpose MFGPT driver, but
 229  * a simplified one designed specifically to act as a clock event source.
 230  * For full details about the MFGPT, please consult the CS5536 data sheet.
 231  */
 232
 233 #include <linux/clocksource.h>
 234 #include <linux/clockchips.h>
 235
 236 static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
 237 static u16 mfgpt_event_clock;
 238
 239 static int irq = 7;
 240 static int __init mfgpt_setup(char *str)
 241 {
 242         get_option(&str, &irq);
 243         return 1;
 244 }
 245 __setup("mfgpt_irq=", mfgpt_setup);
 246
 247 static inline void mfgpt_disable_timer(u16 clock)
 248 {
 249         u16 val = geode_mfgpt_read(clock, MFGPT_REG_SETUP);
 250         geode_mfgpt_write(clock, MFGPT_REG_SETUP, val & ~MFGPT_SETUP_CNTEN);
 251 }
 252
 253 static int mfgpt_next_event(unsigned long, struct clock_event_device *);
 254 static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
 255
 256 static struct clock_event_device mfgpt_clockevent = {
 257         .name = "mfgpt-timer",
 258         .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 259         .set_mode = mfgpt_set_mode,
 260         .set_next_event = mfgpt_next_event,
 261         .rating = 250,
 262         .cpumask = CPU_MASK_ALL,
 263         .shift = 32
 264 };
 265
 266 static inline void mfgpt_start_timer(u16 clock, u16 delta)
 267 {
 268         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
 269         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
 270
 271         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
 272                           MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
 273 }
 274
 275 static void mfgpt_set_mode(enum clock_event_mode mode,
 276                            struct clock_event_device *evt)
 277 {
 278         mfgpt_disable_timer(mfgpt_event_clock);
 279
 280         if (mode == CLOCK_EVT_MODE_PERIODIC)
 281                 mfgpt_start_timer(mfgpt_event_clock, MFGPT_PERIODIC);
 282
 283         mfgpt_tick_mode = mode;
 284 }
 285
 286 static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
 287 {
 288         mfgpt_start_timer(mfgpt_event_clock, delta);
 289         return 0;
 290 }
 291
 292 /* Assume (foolishly?), that this interrupt was due to our tick */
 293
 294 static irqreturn_t mfgpt_tick(int irq, void *dev_id)
 295 {
 296         /* Turn off the clock (and clear the event) */
 297         mfgpt_disable_timer(mfgpt_event_clock);
 298
 299         if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
 300                 return IRQ_HANDLED;
 301
 302         /* Clear the counter */
 303         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
 304
 305         /* Restart the clock in periodic mode */
 306
 307         if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
 308                 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
 309                                   MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
 310         }
 311
 312         mfgpt_clockevent.event_handler(&mfgpt_clockevent);
 313         return IRQ_HANDLED;
 314 }
 315
 316 static struct irqaction mfgptirq  = {
 317         .handler = mfgpt_tick,
 318         .flags = IRQF_DISABLED | IRQF_NOBALANCING,
 319         .mask = CPU_MASK_NONE,
 320         .name = "mfgpt-timer"
 321 };
 322
 323 static int __init mfgpt_timer_setup(void)
 324 {
 325         int timer, ret;
 326         u16 val;
 327
 328         timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING,
 329                         THIS_MODULE);
 330         if (timer < 0) {
 331                 printk(KERN_ERR
 332                        "mfgpt-timer:  Could not allocate a MFPGT timer\n");
 333                 return -ENODEV;
 334         }
 335
 336         mfgpt_event_clock = timer;
 337
 338         /* Set up the IRQ on the MFGPT side */
 339         if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
 340                 printk(KERN_ERR "mfgpt-timer:  Could not set up IRQ %d\n", irq);
 341                 return -EIO;
 342         }
 343
 344         /* And register it with the kernel */
 345         ret = setup_irq(irq, &mfgptirq);
 346
 347         if (ret) {
 348                 printk(KERN_ERR
 349                        "mfgpt-timer:  Unable to set up the interrupt.\n");
 350                 goto err;
 351         }
 352
 353         /* Set the clock scale and enable the event mode for CMP2 */
 354         val = MFGPT_SCALE | (3 << 8);
 355
 356         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
 357
 358         /* Set up the clock event */
 359         mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
 360         mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
 361                         &mfgpt_clockevent);
 362         mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
 363                         &mfgpt_clockevent);
 364
 365         printk(KERN_INFO
 366                "mfgpt-timer:  registering the MFGT timer as a clock event.\n");
 367         clockevents_register_device(&mfgpt_clockevent);
 368
 369         return 0;
 370
 371 err:
 372         geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
 373         printk(KERN_ERR
 374                "mfgpt-timer:  Unable to set up the MFGPT clock source\n");
 375         return -EIO;
 376 }
 377
 378 #endif