arch/x86/kernel/microcode_amd.c

   1 /*
   2  *  AMD CPU Microcode Update Driver for Linux
   3  *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
   4  *
   5  *  Author: Peter Oruba <peter.oruba@amd.com>
   6  *
   7  *  Based on work by:
   8  *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
   9  *
  10  *  Maintainers:
  11  *  Andreas Herrmann <andreas.herrmann3@amd.com>
  12  *  Borislav Petkov <borislav.petkov@amd.com>
  13  *
  14  *  This driver allows to upgrade microcode on F10h AMD
  15  *  CPUs and later.
  16  *
  17  *  Licensed under the terms of the GNU General Public
  18  *  License version 2. See file COPYING for details.
  19  */
  20
  21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22
  23 #include <linux/firmware.h>
  24 #include <linux/pci_ids.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/vmalloc.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/pci.h>
  30
  31 #include <asm/microcode.h>
  32 #include <asm/processor.h>
  33 #include <asm/msr.h>
  34
  35 MODULE_DESCRIPTION("AMD Microcode Update Driver");
  36 MODULE_AUTHOR("Peter Oruba");
  37 MODULE_LICENSE("GPL v2");
  38
  39 #define UCODE_MAGIC                0x00414d44
  40 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
  41 #define UCODE_UCODE_TYPE           0x00000001
  42
  43 struct equiv_cpu_entry {
  44         u32     installed_cpu;
  45         u32     fixed_errata_mask;
  46         u32     fixed_errata_compare;
  47         u16     equiv_cpu;
  48         u16     res;
  49 } __attribute__((packed));
  50
  51 struct microcode_header_amd {
  52         u32     data_code;
  53         u32     patch_id;
  54         u16     mc_patch_data_id;
  55         u8      mc_patch_data_len;
  56         u8      init_flag;
  57         u32     mc_patch_data_checksum;
  58         u32     nb_dev_id;
  59         u32     sb_dev_id;
  60         u16     processor_rev_id;
  61         u8      nb_rev_id;
  62         u8      sb_rev_id;
  63         u8      bios_api_rev;
  64         u8      reserved1[3];
  65         u32     match_reg[8];
  66 } __attribute__((packed));
  67
  68 struct microcode_amd {
  69         struct microcode_header_amd     hdr;
  70         unsigned int                    mpb[0];
  71 };
  72
  73 #define SECTION_HDR_SIZE        8
  74 #define CONTAINER_HDR_SZ        12
  75
  76 static struct equiv_cpu_entry *equiv_cpu_table;
  77
  78 /* page-sized ucode patch buffer */
  79 void *patch;
  80
  81 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
  82 {
  83         struct cpuinfo_x86 *c = &cpu_data(cpu);
  84
  85         csig->rev = c->microcode;
  86         pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
  87
  88         return 0;
  89 }
  90
  91 static unsigned int verify_ucode_size(int cpu, u32 patch_size,
  92                                       unsigned int size)
  93 {
  94         struct cpuinfo_x86 *c = &cpu_data(cpu);
  95         u32 max_size;
  96
  97 #define F1XH_MPB_MAX_SIZE 2048
  98 #define F14H_MPB_MAX_SIZE 1824
  99 #define F15H_MPB_MAX_SIZE 4096
 100
 101         switch (c->x86) {
 102         case 0x14:
 103                 max_size = F14H_MPB_MAX_SIZE;
 104                 break;
 105         case 0x15:
 106                 max_size = F15H_MPB_MAX_SIZE;
 107                 break;
 108         default:
 109                 max_size = F1XH_MPB_MAX_SIZE;
 110                 break;
 111         }
 112
 113         if (patch_size > min_t(u32, size, max_size)) {
 114                 pr_err("patch size mismatch\n");
 115                 return 0;
 116         }
 117
 118         return patch_size;
 119 }
 120
 121 static u16 find_equiv_id(void)
 122 {
 123         unsigned int current_cpu_id, i = 0;
 124
 125         BUG_ON(equiv_cpu_table == NULL);
 126
 127         current_cpu_id = cpuid_eax(0x00000001);
 128
 129         while (equiv_cpu_table[i].installed_cpu != 0) {
 130                 if (current_cpu_id == equiv_cpu_table[i].installed_cpu)
 131                         return equiv_cpu_table[i].equiv_cpu;
 132
 133                 i++;
 134         }
 135         return 0;
 136 }
 137
 138 /*
 139  * we signal a good patch is found by returning its size > 0
 140  */
 141 static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
 142                                   unsigned int leftover_size, int rev,
 143                                   unsigned int *current_size)
 144 {
 145         struct microcode_header_amd *mc_hdr;
 146         unsigned int actual_size, patch_size;
 147         u16 equiv_cpu_id;
 148
 149         /* size of the current patch we're staring at */
 150         patch_size = *(u32 *)(ucode_ptr + 4);
 151         *current_size = patch_size + SECTION_HDR_SIZE;
 152
 153         equiv_cpu_id = find_equiv_id();
 154         if (!equiv_cpu_id)
 155                 return 0;
 156
 157         /*
 158          * let's look at the patch header itself now
 159          */
 160         mc_hdr = (struct microcode_header_amd *)(ucode_ptr + SECTION_HDR_SIZE);
 161
 162         if (mc_hdr->processor_rev_id != equiv_cpu_id)
 163                 return 0;
 164
 165         /* ucode might be chipset specific -- currently we don't support this */
 166         if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
 167                 pr_err("CPU%d: chipset specific code not yet supported\n",
 168                        cpu);
 169                 return 0;
 170         }
 171
 172         if (mc_hdr->patch_id <= rev)
 173                 return 0;
 174
 175         /*
 176          * now that the header looks sane, verify its size
 177          */
 178         actual_size = verify_ucode_size(cpu, patch_size, leftover_size);
 179         if (!actual_size)
 180                 return 0;
 181
 182         /* clear the patch buffer */
 183         memset(patch, 0, PAGE_SIZE);
 184
 185         /* all looks ok, get the binary patch */
 186         memcpy(patch, ucode_ptr + SECTION_HDR_SIZE, actual_size);
 187
 188         return actual_size;
 189 }
 190
 191 static int apply_microcode_amd(int cpu)
 192 {
 193         u32 rev, dummy;
 194         int cpu_num = raw_smp_processor_id();
 195         struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
 196         struct microcode_amd *mc_amd = uci->mc;
 197         struct cpuinfo_x86 *c = &cpu_data(cpu);
 198
 199         /* We should bind the task to the CPU */
 200         BUG_ON(cpu_num != cpu);
 201
 202         if (mc_amd == NULL)
 203                 return 0;
 204
 205         rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
 206
 207         /* need to apply patch? */
 208         if (rev >= mc_amd->hdr.patch_id) {
 209                 c->microcode = rev;
 210                 return 0;
 211         }
 212
 213         wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
 214
 215         /* verify patch application was successful */
 216         rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
 217         if (rev != mc_amd->hdr.patch_id) {
 218                 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
 219                        cpu, mc_amd->hdr.patch_id);
 220                 return -1;
 221         }
 222
 223         pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
 224         uci->cpu_sig.rev = rev;
 225         c->microcode = rev;
 226
 227         return 0;
 228 }
 229
 230 static int install_equiv_cpu_table(const u8 *buf)
 231 {
 232         unsigned int *ibuf = (unsigned int *)buf;
 233         unsigned int type = ibuf[1];
 234         unsigned int size = ibuf[2];
 235
 236         if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
 237                 pr_err("empty section/"
 238                        "invalid type field in container file section header\n");
 239                 return -EINVAL;
 240         }
 241
 242         equiv_cpu_table = vmalloc(size);
 243         if (!equiv_cpu_table) {
 244                 pr_err("failed to allocate equivalent CPU table\n");
 245                 return -ENOMEM;
 246         }
 247
 248         memcpy(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
 249
 250         /* add header length */
 251         return size + CONTAINER_HDR_SZ;
 252 }
 253
 254 static void free_equiv_cpu_table(void)
 255 {
 256         vfree(equiv_cpu_table);
 257         equiv_cpu_table = NULL;
 258 }
 259
 260 static enum ucode_state
 261 generic_load_microcode(int cpu, const u8 *data, size_t size)
 262 {
 263         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 264         struct microcode_header_amd *mc_hdr = NULL;
 265         unsigned int mc_size, leftover, current_size = 0;
 266         int offset;
 267         const u8 *ucode_ptr = data;
 268         void *new_mc = NULL;
 269         unsigned int new_rev = uci->cpu_sig.rev;
 270         enum ucode_state state = UCODE_ERROR;
 271
 272         offset = install_equiv_cpu_table(ucode_ptr);
 273         if (offset < 0) {
 274                 pr_err("failed to create equivalent cpu table\n");
 275                 goto out;
 276         }
 277         ucode_ptr += offset;
 278         leftover = size - offset;
 279
 280         if (*(u32 *)ucode_ptr != UCODE_UCODE_TYPE) {
 281                 pr_err("invalid type field in container file section header\n");
 282                 goto free_table;
 283         }
 284
 285         while (leftover) {
 286                 mc_size = get_matching_microcode(cpu, ucode_ptr, leftover,
 287                                                  new_rev, &current_size);
 288                 if (mc_size) {
 289                         mc_hdr  = patch;
 290                         new_mc  = patch;
 291                         new_rev = mc_hdr->patch_id;
 292                         goto out_ok;
 293                 }
 294
 295                 ucode_ptr += current_size;
 296                 leftover  -= current_size;
 297         }
 298
 299         if (!new_mc) {
 300                 state = UCODE_NFOUND;
 301                 goto free_table;
 302         }
 303
 304 out_ok:
 305         uci->mc = new_mc;
 306         state = UCODE_OK;
 307         pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
 308                  cpu, uci->cpu_sig.rev, new_rev);
 309
 310 free_table:
 311         free_equiv_cpu_table();
 312
 313 out:
 314         return state;
 315 }
 316
 317 /*
 318  * AMD microcode firmware naming convention, up to family 15h they are in
 319  * the legacy file:
 320  *
 321  *    amd-ucode/microcode_amd.bin
 322  *
 323  * This legacy file is always smaller than 2K in size.
 324  *
 325  * Starting at family 15h they are in family specific firmware files:
 326  *
 327  *    amd-ucode/microcode_amd_fam15h.bin
 328  *    amd-ucode/microcode_amd_fam16h.bin
 329  *    ...
 330  *
 331  * These might be larger than 2K.
 332  */
 333 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
 334 {
 335         char fw_name[36] = "amd-ucode/microcode_amd.bin";
 336         const struct firmware *fw;
 337         enum ucode_state ret = UCODE_NFOUND;
 338         struct cpuinfo_x86 *c = &cpu_data(cpu);
 339
 340         if (c->x86 >= 0x15)
 341                 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
 342
 343         if (request_firmware(&fw, (const char *)fw_name, device)) {
 344                 pr_err("failed to load file %s\n", fw_name);
 345                 goto out;
 346         }
 347
 348         ret = UCODE_ERROR;
 349         if (*(u32 *)fw->data != UCODE_MAGIC) {
 350                 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
 351                 goto fw_release;
 352         }
 353
 354         ret = generic_load_microcode(cpu, fw->data, fw->size);
 355
 356 fw_release:
 357         release_firmware(fw);
 358
 359 out:
 360         return ret;
 361 }
 362
 363 static enum ucode_state
 364 request_microcode_user(int cpu, const void __user *buf, size_t size)
 365 {
 366         return UCODE_ERROR;
 367 }
 368
 369 static void microcode_fini_cpu_amd(int cpu)
 370 {
 371         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 372
 373         uci->mc = NULL;
 374 }
 375
 376 static struct microcode_ops microcode_amd_ops = {
 377         .request_microcode_user           = request_microcode_user,
 378         .request_microcode_fw             = request_microcode_amd,
 379         .collect_cpu_info                 = collect_cpu_info_amd,
 380         .apply_microcode                  = apply_microcode_amd,
 381         .microcode_fini_cpu               = microcode_fini_cpu_amd,
 382 };
 383
 384 struct microcode_ops * __init init_amd_microcode(void)
 385 {
 386         struct cpuinfo_x86 *c = &cpu_data(0);
 387
 388         if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
 389                 pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
 390                 return NULL;
 391         }
 392
 393         patch = (void *)get_zeroed_page(GFP_KERNEL);
 394         if (!patch)
 395                 return NULL;
 396
 397         return &microcode_amd_ops;
 398 }
 399
 400 void __exit exit_amd_microcode(void)
 401 {
 402         free_page((unsigned long)patch);
 403 }