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x86: move generic_processor_info to apic_64.c
[deliverable/linux.git] / arch / x86 / kernel / mpparse_64.c
1 /*
2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 *
8 * Fixes
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
14 */
15
16 #include <linux/mm.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
24
25 #include <asm/smp.h>
26 #include <asm/mtrr.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
31 #include <asm/acpi.h>
32 #include <asm/bios_ebda.h>
33
34 #include <mach_apic.h>
35
36 /* Have we found an MP table */
37 int smp_found_config;
38
39 /*
40 * Various Linux-internal data structures created from the
41 * MP-table.
42 */
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
45
46 static int mp_current_pci_id = 0;
47 /* I/O APIC entries */
48 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
49
50 /* # of MP IRQ source entries */
51 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
52
53 /* MP IRQ source entries */
54 int mp_irq_entries;
55
56 int nr_ioapics;
57
58 #ifdef CONFIG_SMP
59 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
60 = {[0 ... NR_CPUS - 1] = BAD_APICID };
61 void *x86_bios_cpu_apicid_early_ptr;
62 #endif
63 DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
64 EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
65
66 /*
67 * Intel MP BIOS table parsing routines:
68 */
69
70 /*
71 * Checksum an MP configuration block.
72 */
73
74 static int __init mpf_checksum(unsigned char *mp, int len)
75 {
76 int sum = 0;
77
78 while (len--)
79 sum += *mp++;
80
81 return sum & 0xFF;
82 }
83
84 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
85 {
86 char *bootup_cpu = "";
87
88 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
89 disabled_cpus++;
90 return;
91 }
92 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
93 bootup_cpu = " (Bootup-CPU)";
94 boot_cpu_physical_apicid = m->mpc_apicid;
95 }
96
97 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
98 generic_processor_info(m->mpc_apicid, 0);
99 }
100
101 static void __init MP_bus_info(struct mpc_config_bus *m)
102 {
103 char str[7];
104
105 memcpy(str, m->mpc_bustype, 6);
106 str[6] = 0;
107 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
108
109 if (strncmp(str, "ISA", 3) == 0) {
110 set_bit(m->mpc_busid, mp_bus_not_pci);
111 } else if (strncmp(str, "PCI", 3) == 0) {
112 clear_bit(m->mpc_busid, mp_bus_not_pci);
113 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
114 mp_current_pci_id++;
115 } else {
116 printk(KERN_ERR "Unknown bustype %s\n", str);
117 }
118 }
119
120 static int bad_ioapic(unsigned long address)
121 {
122 if (nr_ioapics >= MAX_IO_APICS) {
123 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
124 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
125 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
126 }
127 if (!address) {
128 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
129 " found in table, skipping!\n");
130 return 1;
131 }
132 return 0;
133 }
134
135 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
136 {
137 if (!(m->mpc_flags & MPC_APIC_USABLE))
138 return;
139
140 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
141 m->mpc_apicaddr);
142
143 if (bad_ioapic(m->mpc_apicaddr))
144 return;
145
146 mp_ioapics[nr_ioapics] = *m;
147 nr_ioapics++;
148 }
149
150 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
151 {
152 mp_irqs[mp_irq_entries] = *m;
153 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
154 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
155 m->mpc_irqtype, m->mpc_irqflag & 3,
156 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
157 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
158 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
159 panic("Max # of irq sources exceeded!!\n");
160 }
161
162 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
163 {
164 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
165 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
166 m->mpc_irqtype, m->mpc_irqflag & 3,
167 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
168 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
169 }
170
171 /*
172 * Read/parse the MPC
173 */
174 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
175 {
176 char str[16];
177 int count = sizeof(*mpc);
178 unsigned char *mpt = ((unsigned char *)mpc) + count;
179
180 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
181 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
182 mpc->mpc_signature[0],
183 mpc->mpc_signature[1],
184 mpc->mpc_signature[2], mpc->mpc_signature[3]);
185 return 0;
186 }
187 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
188 printk(KERN_ERR "MPTABLE: checksum error!\n");
189 return 0;
190 }
191 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
192 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
193 mpc->mpc_spec);
194 return 0;
195 }
196 if (!mpc->mpc_lapic) {
197 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
198 return 0;
199 }
200 memcpy(str, mpc->mpc_oem, 8);
201 str[8] = 0;
202 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
203
204 memcpy(str, mpc->mpc_productid, 12);
205 str[12] = 0;
206 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
207
208 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
209
210 /* save the local APIC address, it might be non-default */
211 if (!acpi_lapic)
212 mp_lapic_addr = mpc->mpc_lapic;
213
214 if (early)
215 return 1;
216
217 /*
218 * Now process the configuration blocks.
219 */
220 while (count < mpc->mpc_length) {
221 switch (*mpt) {
222 case MP_PROCESSOR:
223 {
224 struct mpc_config_processor *m =
225 (struct mpc_config_processor *)mpt;
226 if (!acpi_lapic)
227 MP_processor_info(m);
228 mpt += sizeof(*m);
229 count += sizeof(*m);
230 break;
231 }
232 case MP_BUS:
233 {
234 struct mpc_config_bus *m =
235 (struct mpc_config_bus *)mpt;
236 MP_bus_info(m);
237 mpt += sizeof(*m);
238 count += sizeof(*m);
239 break;
240 }
241 case MP_IOAPIC:
242 {
243 struct mpc_config_ioapic *m =
244 (struct mpc_config_ioapic *)mpt;
245 MP_ioapic_info(m);
246 mpt += sizeof(*m);
247 count += sizeof(*m);
248 break;
249 }
250 case MP_INTSRC:
251 {
252 struct mpc_config_intsrc *m =
253 (struct mpc_config_intsrc *)mpt;
254
255 MP_intsrc_info(m);
256 mpt += sizeof(*m);
257 count += sizeof(*m);
258 break;
259 }
260 case MP_LINTSRC:
261 {
262 struct mpc_config_lintsrc *m =
263 (struct mpc_config_lintsrc *)mpt;
264 MP_lintsrc_info(m);
265 mpt += sizeof(*m);
266 count += sizeof(*m);
267 break;
268 }
269 }
270 }
271 setup_apic_routing();
272 if (!num_processors)
273 printk(KERN_ERR "MPTABLE: no processors registered!\n");
274 return num_processors;
275 }
276
277 static int __init ELCR_trigger(unsigned int irq)
278 {
279 unsigned int port;
280
281 port = 0x4d0 + (irq >> 3);
282 return (inb(port) >> (irq & 7)) & 1;
283 }
284
285 static void __init construct_default_ioirq_mptable(int mpc_default_type)
286 {
287 struct mpc_config_intsrc intsrc;
288 int i;
289 int ELCR_fallback = 0;
290
291 intsrc.mpc_type = MP_INTSRC;
292 intsrc.mpc_irqflag = 0; /* conforming */
293 intsrc.mpc_srcbus = 0;
294 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
295
296 intsrc.mpc_irqtype = mp_INT;
297
298 /*
299 * If true, we have an ISA/PCI system with no IRQ entries
300 * in the MP table. To prevent the PCI interrupts from being set up
301 * incorrectly, we try to use the ELCR. The sanity check to see if
302 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
303 * never be level sensitive, so we simply see if the ELCR agrees.
304 * If it does, we assume it's valid.
305 */
306 if (mpc_default_type == 5) {
307 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
308 "falling back to ELCR\n");
309
310 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
311 ELCR_trigger(13))
312 printk(KERN_ERR "ELCR contains invalid data... "
313 "not using ELCR\n");
314 else {
315 printk(KERN_INFO
316 "Using ELCR to identify PCI interrupts\n");
317 ELCR_fallback = 1;
318 }
319 }
320
321 for (i = 0; i < 16; i++) {
322 switch (mpc_default_type) {
323 case 2:
324 if (i == 0 || i == 13)
325 continue; /* IRQ0 & IRQ13 not connected */
326 /* fall through */
327 default:
328 if (i == 2)
329 continue; /* IRQ2 is never connected */
330 }
331
332 if (ELCR_fallback) {
333 /*
334 * If the ELCR indicates a level-sensitive interrupt, we
335 * copy that information over to the MP table in the
336 * irqflag field (level sensitive, active high polarity).
337 */
338 if (ELCR_trigger(i))
339 intsrc.mpc_irqflag = 13;
340 else
341 intsrc.mpc_irqflag = 0;
342 }
343
344 intsrc.mpc_srcbusirq = i;
345 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
346 MP_intsrc_info(&intsrc);
347 }
348
349 intsrc.mpc_irqtype = mp_ExtINT;
350 intsrc.mpc_srcbusirq = 0;
351 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
352 MP_intsrc_info(&intsrc);
353 }
354
355 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
356 {
357 struct mpc_config_processor processor;
358 struct mpc_config_bus bus;
359 struct mpc_config_ioapic ioapic;
360 struct mpc_config_lintsrc lintsrc;
361 int linttypes[2] = { mp_ExtINT, mp_NMI };
362 int i;
363
364 /*
365 * local APIC has default address
366 */
367 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
368
369 /*
370 * 2 CPUs, numbered 0 & 1.
371 */
372 processor.mpc_type = MP_PROCESSOR;
373 processor.mpc_apicver = 0;
374 processor.mpc_cpuflag = CPU_ENABLED;
375 processor.mpc_cpufeature = 0;
376 processor.mpc_featureflag = 0;
377 processor.mpc_reserved[0] = 0;
378 processor.mpc_reserved[1] = 0;
379 for (i = 0; i < 2; i++) {
380 processor.mpc_apicid = i;
381 MP_processor_info(&processor);
382 }
383
384 bus.mpc_type = MP_BUS;
385 bus.mpc_busid = 0;
386 switch (mpc_default_type) {
387 default:
388 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
389 mpc_default_type);
390 /* fall through */
391 case 1:
392 case 5:
393 memcpy(bus.mpc_bustype, "ISA ", 6);
394 break;
395 }
396 MP_bus_info(&bus);
397 if (mpc_default_type > 4) {
398 bus.mpc_busid = 1;
399 memcpy(bus.mpc_bustype, "PCI ", 6);
400 MP_bus_info(&bus);
401 }
402
403 ioapic.mpc_type = MP_IOAPIC;
404 ioapic.mpc_apicid = 2;
405 ioapic.mpc_apicver = 0;
406 ioapic.mpc_flags = MPC_APIC_USABLE;
407 ioapic.mpc_apicaddr = 0xFEC00000;
408 MP_ioapic_info(&ioapic);
409
410 /*
411 * We set up most of the low 16 IO-APIC pins according to MPS rules.
412 */
413 construct_default_ioirq_mptable(mpc_default_type);
414
415 lintsrc.mpc_type = MP_LINTSRC;
416 lintsrc.mpc_irqflag = 0; /* conforming */
417 lintsrc.mpc_srcbusid = 0;
418 lintsrc.mpc_srcbusirq = 0;
419 lintsrc.mpc_destapic = MP_APIC_ALL;
420 for (i = 0; i < 2; i++) {
421 lintsrc.mpc_irqtype = linttypes[i];
422 lintsrc.mpc_destapiclint = i;
423 MP_lintsrc_info(&lintsrc);
424 }
425 }
426
427 static struct intel_mp_floating *mpf_found;
428
429 /*
430 * Scan the memory blocks for an SMP configuration block.
431 */
432 static void __init __get_smp_config(unsigned early)
433 {
434 struct intel_mp_floating *mpf = mpf_found;
435
436 if (acpi_lapic && early)
437 return;
438 /*
439 * ACPI supports both logical (e.g. Hyper-Threading) and physical
440 * processors, where MPS only supports physical.
441 */
442 if (acpi_lapic && acpi_ioapic) {
443 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
444 "information\n");
445 return;
446 } else if (acpi_lapic)
447 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
448 "configuration information\n");
449
450 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
451 mpf->mpf_specification);
452
453 /*
454 * Now see if we need to read further.
455 */
456 if (mpf->mpf_feature1 != 0) {
457 if (early) {
458 /*
459 * local APIC has default address
460 */
461 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
462 return;
463 }
464
465 printk(KERN_INFO "Default MP configuration #%d\n",
466 mpf->mpf_feature1);
467 construct_default_ISA_mptable(mpf->mpf_feature1);
468
469 } else if (mpf->mpf_physptr) {
470
471 /*
472 * Read the physical hardware table. Anything here will
473 * override the defaults.
474 */
475 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
476 smp_found_config = 0;
477 printk(KERN_ERR
478 "BIOS bug, MP table errors detected!...\n");
479 printk(KERN_ERR "... disabling SMP support. "
480 "(tell your hw vendor)\n");
481 return;
482 }
483
484 if (early)
485 return;
486 /*
487 * If there are no explicit MP IRQ entries, then we are
488 * broken. We set up most of the low 16 IO-APIC pins to
489 * ISA defaults and hope it will work.
490 */
491 if (!mp_irq_entries) {
492 struct mpc_config_bus bus;
493
494 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
495 "using default mptable. "
496 "(tell your hw vendor)\n");
497
498 bus.mpc_type = MP_BUS;
499 bus.mpc_busid = 0;
500 memcpy(bus.mpc_bustype, "ISA ", 6);
501 MP_bus_info(&bus);
502
503 construct_default_ioirq_mptable(0);
504 }
505
506 } else
507 BUG();
508
509 if (!early)
510 printk(KERN_INFO "Processors: %d\n", num_processors);
511 /*
512 * Only use the first configuration found.
513 */
514 }
515
516 void __init early_get_smp_config(void)
517 {
518 __get_smp_config(1);
519 }
520
521 void __init get_smp_config(void)
522 {
523 __get_smp_config(0);
524 }
525
526 static int __init smp_scan_config(unsigned long base, unsigned long length,
527 unsigned reserve)
528 {
529 extern void __bad_mpf_size(void);
530 unsigned int *bp = phys_to_virt(base);
531 struct intel_mp_floating *mpf;
532
533 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
534 if (sizeof(*mpf) != 16)
535 __bad_mpf_size();
536
537 while (length > 0) {
538 mpf = (struct intel_mp_floating *)bp;
539 if ((*bp == SMP_MAGIC_IDENT) &&
540 (mpf->mpf_length == 1) &&
541 !mpf_checksum((unsigned char *)bp, 16) &&
542 ((mpf->mpf_specification == 1)
543 || (mpf->mpf_specification == 4))) {
544
545 smp_found_config = 1;
546 mpf_found = mpf;
547
548 if (!reserve)
549 return 1;
550
551 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
552 if (mpf->mpf_physptr)
553 reserve_bootmem_generic(mpf->mpf_physptr,
554 PAGE_SIZE);
555 return 1;
556 }
557 bp += 4;
558 length -= 16;
559 }
560 return 0;
561 }
562
563 static void __init __find_smp_config(unsigned reserve)
564 {
565 unsigned int address;
566
567 /*
568 * FIXME: Linux assumes you have 640K of base ram..
569 * this continues the error...
570 *
571 * 1) Scan the bottom 1K for a signature
572 * 2) Scan the top 1K of base RAM
573 * 3) Scan the 64K of bios
574 */
575 if (smp_scan_config(0x0, 0x400, reserve) ||
576 smp_scan_config(639 * 0x400, 0x400, reserve) ||
577 smp_scan_config(0xF0000, 0x10000, reserve))
578 return;
579 /*
580 * If it is an SMP machine we should know now.
581 *
582 * there is a real-mode segmented pointer pointing to the
583 * 4K EBDA area at 0x40E, calculate and scan it here.
584 *
585 * NOTE! There are Linux loaders that will corrupt the EBDA
586 * area, and as such this kind of SMP config may be less
587 * trustworthy, simply because the SMP table may have been
588 * stomped on during early boot. These loaders are buggy and
589 * should be fixed.
590 *
591 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
592 */
593
594 address = get_bios_ebda();
595 if (address)
596 smp_scan_config(address, 0x400, reserve);
597 }
598
599 void __init early_find_smp_config(void)
600 {
601 __find_smp_config(0);
602 }
603
604 void __init find_smp_config(void)
605 {
606 __find_smp_config(1);
607 }
608
609 /* --------------------------------------------------------------------------
610 ACPI-based MP Configuration
611 -------------------------------------------------------------------------- */
612
613 #ifdef CONFIG_ACPI
614
615 void __init mp_register_lapic_address(u64 address)
616 {
617 mp_lapic_addr = (unsigned long)address;
618 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
619 if (boot_cpu_physical_apicid == -1U)
620 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
621 }
622 void __cpuinit mp_register_lapic(u8 id, u8 enabled)
623 {
624 if (!enabled) {
625 ++disabled_cpus;
626 return;
627 }
628
629 generic_processor_info(id, 0);
630 }
631
632
633 #define MP_ISA_BUS 0
634 #define MP_MAX_IOAPIC_PIN 127
635
636 static struct mp_ioapic_routing {
637 int apic_id;
638 int gsi_base;
639 int gsi_end;
640 u32 pin_programmed[4];
641 } mp_ioapic_routing[MAX_IO_APICS];
642
643 static int mp_find_ioapic(int gsi)
644 {
645 int i = 0;
646
647 /* Find the IOAPIC that manages this GSI. */
648 for (i = 0; i < nr_ioapics; i++) {
649 if ((gsi >= mp_ioapic_routing[i].gsi_base)
650 && (gsi <= mp_ioapic_routing[i].gsi_end))
651 return i;
652 }
653
654 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
655 return -1;
656 }
657
658 static u8 uniq_ioapic_id(u8 id)
659 {
660 int i;
661 DECLARE_BITMAP(used, 256);
662 bitmap_zero(used, 256);
663 for (i = 0; i < nr_ioapics; i++) {
664 struct mpc_config_ioapic *ia = &mp_ioapics[i];
665 __set_bit(ia->mpc_apicid, used);
666 }
667 if (!test_bit(id, used))
668 return id;
669 return find_first_zero_bit(used, 256);
670 }
671
672 void __init mp_register_ioapic(u8 id, u32 address, u32 gsi_base)
673 {
674 int idx = 0;
675
676 if (bad_ioapic(address))
677 return;
678
679 idx = nr_ioapics;
680
681 mp_ioapics[idx].mpc_type = MP_IOAPIC;
682 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
683 mp_ioapics[idx].mpc_apicaddr = address;
684
685 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
686 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
687 mp_ioapics[idx].mpc_apicver = 0;
688
689 /*
690 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
691 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
692 */
693 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
694 mp_ioapic_routing[idx].gsi_base = gsi_base;
695 mp_ioapic_routing[idx].gsi_end = gsi_base +
696 io_apic_get_redir_entries(idx);
697
698 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
699 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
700 mp_ioapics[idx].mpc_apicaddr,
701 mp_ioapic_routing[idx].gsi_base,
702 mp_ioapic_routing[idx].gsi_end);
703
704 nr_ioapics++;
705 }
706
707 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
708 {
709 struct mpc_config_intsrc intsrc;
710 int ioapic = -1;
711 int pin = -1;
712
713 /*
714 * Convert 'gsi' to 'ioapic.pin'.
715 */
716 ioapic = mp_find_ioapic(gsi);
717 if (ioapic < 0)
718 return;
719 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
720
721 /*
722 * TBD: This check is for faulty timer entries, where the override
723 * erroneously sets the trigger to level, resulting in a HUGE
724 * increase of timer interrupts!
725 */
726 if ((bus_irq == 0) && (trigger == 3))
727 trigger = 1;
728
729 intsrc.mpc_type = MP_INTSRC;
730 intsrc.mpc_irqtype = mp_INT;
731 intsrc.mpc_irqflag = (trigger << 2) | polarity;
732 intsrc.mpc_srcbus = MP_ISA_BUS;
733 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
734 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
735 intsrc.mpc_dstirq = pin; /* INTIN# */
736
737 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
738 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
739 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
740 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
741
742 mp_irqs[mp_irq_entries] = intsrc;
743 if (++mp_irq_entries == MAX_IRQ_SOURCES)
744 panic("Max # of irq sources exceeded!\n");
745 }
746
747 void __init mp_config_acpi_legacy_irqs(void)
748 {
749 struct mpc_config_intsrc intsrc;
750 int i = 0;
751 int ioapic = -1;
752
753 /*
754 * Fabricate the legacy ISA bus (bus #31).
755 */
756 set_bit(MP_ISA_BUS, mp_bus_not_pci);
757
758 /*
759 * Locate the IOAPIC that manages the ISA IRQs (0-15).
760 */
761 ioapic = mp_find_ioapic(0);
762 if (ioapic < 0)
763 return;
764
765 intsrc.mpc_type = MP_INTSRC;
766 intsrc.mpc_irqflag = 0; /* Conforming */
767 intsrc.mpc_srcbus = MP_ISA_BUS;
768 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
769
770 /*
771 * Use the default configuration for the IRQs 0-15. Unless
772 * overridden by (MADT) interrupt source override entries.
773 */
774 for (i = 0; i < 16; i++) {
775 int idx;
776
777 for (idx = 0; idx < mp_irq_entries; idx++) {
778 struct mpc_config_intsrc *irq = mp_irqs + idx;
779
780 /* Do we already have a mapping for this ISA IRQ? */
781 if (irq->mpc_srcbus == MP_ISA_BUS
782 && irq->mpc_srcbusirq == i)
783 break;
784
785 /* Do we already have a mapping for this IOAPIC pin */
786 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
787 (irq->mpc_dstirq == i))
788 break;
789 }
790
791 if (idx != mp_irq_entries) {
792 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
793 continue; /* IRQ already used */
794 }
795
796 intsrc.mpc_irqtype = mp_INT;
797 intsrc.mpc_srcbusirq = i; /* Identity mapped */
798 intsrc.mpc_dstirq = i;
799
800 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
801 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
802 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
803 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
804 intsrc.mpc_dstirq);
805
806 mp_irqs[mp_irq_entries] = intsrc;
807 if (++mp_irq_entries == MAX_IRQ_SOURCES)
808 panic("Max # of irq sources exceeded!\n");
809 }
810 }
811
812 int mp_register_gsi(u32 gsi, int triggering, int polarity)
813 {
814 int ioapic = -1;
815 int ioapic_pin = 0;
816 int idx, bit = 0;
817
818 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
819 return gsi;
820
821 /* Don't set up the ACPI SCI because it's already set up */
822 if (acpi_gbl_FADT.sci_interrupt == gsi)
823 return gsi;
824
825 ioapic = mp_find_ioapic(gsi);
826 if (ioapic < 0) {
827 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
828 return gsi;
829 }
830
831 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
832
833 /*
834 * Avoid pin reprogramming. PRTs typically include entries
835 * with redundant pin->gsi mappings (but unique PCI devices);
836 * we only program the IOAPIC on the first.
837 */
838 bit = ioapic_pin % 32;
839 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
840 if (idx > 3) {
841 printk(KERN_ERR "Invalid reference to IOAPIC pin "
842 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
843 ioapic_pin);
844 return gsi;
845 }
846 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
847 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
848 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
849 return gsi;
850 }
851
852 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
853
854 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
855 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
856 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
857 return gsi;
858 }
859 #endif /* CONFIG_ACPI */
Linux kernel - Deliverables
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