1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/slab.h>
6 #include <linux/sched.h>
7 #include <linux/module.h>
9 #include <linux/clockchips.h>
10 #include <asm/system.h>
12 unsigned long idle_halt
;
13 EXPORT_SYMBOL(idle_halt
);
14 unsigned long idle_nomwait
;
15 EXPORT_SYMBOL(idle_nomwait
);
17 struct kmem_cache
*task_xstate_cachep
;
18 static int force_mwait __cpuinitdata
;
20 int arch_dup_task_struct(struct task_struct
*dst
, struct task_struct
*src
)
23 if (src
->thread
.xstate
) {
24 dst
->thread
.xstate
= kmem_cache_alloc(task_xstate_cachep
,
26 if (!dst
->thread
.xstate
)
28 WARN_ON((unsigned long)dst
->thread
.xstate
& 15);
29 memcpy(dst
->thread
.xstate
, src
->thread
.xstate
, xstate_size
);
34 void free_thread_xstate(struct task_struct
*tsk
)
36 if (tsk
->thread
.xstate
) {
37 kmem_cache_free(task_xstate_cachep
, tsk
->thread
.xstate
);
38 tsk
->thread
.xstate
= NULL
;
42 void free_thread_info(struct thread_info
*ti
)
44 free_thread_xstate(ti
->task
);
45 free_pages((unsigned long)ti
, get_order(THREAD_SIZE
));
48 void arch_task_cache_init(void)
51 kmem_cache_create("task_xstate", xstate_size
,
52 __alignof__(union thread_xstate
),
57 * Idle related variables and functions
59 unsigned long boot_option_idle_override
= 0;
60 EXPORT_SYMBOL(boot_option_idle_override
);
63 * Powermanagement idle function, if any..
65 void (*pm_idle
)(void);
66 EXPORT_SYMBOL(pm_idle
);
70 * This halt magic was a workaround for ancient floppy DMA
71 * wreckage. It should be safe to remove.
73 static int hlt_counter
;
74 void disable_hlt(void)
78 EXPORT_SYMBOL(disable_hlt
);
84 EXPORT_SYMBOL(enable_hlt
);
86 static inline int hlt_use_halt(void)
88 return (!hlt_counter
&& boot_cpu_data
.hlt_works_ok
);
91 static inline int hlt_use_halt(void)
98 * We use this if we don't have any better
101 void default_idle(void)
103 if (hlt_use_halt()) {
104 current_thread_info()->status
&= ~TS_POLLING
;
106 * TS_POLLING-cleared state must be visible before we
112 safe_halt(); /* enables interrupts racelessly */
115 current_thread_info()->status
|= TS_POLLING
;
118 /* loop is done by the caller */
122 #ifdef CONFIG_APM_MODULE
123 EXPORT_SYMBOL(default_idle
);
126 static void do_nothing(void *unused
)
131 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
132 * pm_idle and update to new pm_idle value. Required while changing pm_idle
133 * handler on SMP systems.
135 * Caller must have changed pm_idle to the new value before the call. Old
136 * pm_idle value will not be used by any CPU after the return of this function.
138 void cpu_idle_wait(void)
141 /* kick all the CPUs so that they exit out of pm_idle */
142 smp_call_function(do_nothing
, NULL
, 1);
144 EXPORT_SYMBOL_GPL(cpu_idle_wait
);
147 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
148 * which can obviate IPI to trigger checking of need_resched.
149 * We execute MONITOR against need_resched and enter optimized wait state
150 * through MWAIT. Whenever someone changes need_resched, we would be woken
151 * up from MWAIT (without an IPI).
153 * New with Core Duo processors, MWAIT can take some hints based on CPU
156 void mwait_idle_with_hints(unsigned long ax
, unsigned long cx
)
158 if (!need_resched()) {
159 __monitor((void *)¤t_thread_info()->flags
, 0, 0);
166 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
167 static void mwait_idle(void)
169 if (!need_resched()) {
170 __monitor((void *)¤t_thread_info()->flags
, 0, 0);
181 * On SMP it's slightly faster (but much more power-consuming!)
182 * to poll the ->work.need_resched flag instead of waiting for the
183 * cross-CPU IPI to arrive. Use this option with caution.
185 static void poll_idle(void)
188 while (!need_resched())
193 * mwait selection logic:
195 * It depends on the CPU. For AMD CPUs that support MWAIT this is
196 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
197 * then depend on a clock divisor and current Pstate of the core. If
198 * all cores of a processor are in halt state (C1) the processor can
199 * enter the C1E (C1 enhanced) state. If mwait is used this will never
202 * idle=mwait overrides this decision and forces the usage of mwait.
204 static int __cpuinitdata force_mwait
;
206 #define MWAIT_INFO 0x05
207 #define MWAIT_ECX_EXTENDED_INFO 0x01
208 #define MWAIT_EDX_C1 0xf0
210 static int __cpuinit
mwait_usable(const struct cpuinfo_x86
*c
)
212 u32 eax
, ebx
, ecx
, edx
;
217 if (c
->cpuid_level
< MWAIT_INFO
)
220 cpuid(MWAIT_INFO
, &eax
, &ebx
, &ecx
, &edx
);
221 /* Check, whether EDX has extended info about MWAIT */
222 if (!(ecx
& MWAIT_ECX_EXTENDED_INFO
))
226 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
229 return (edx
& MWAIT_EDX_C1
);
233 * Check for AMD CPUs, which have potentially C1E support
235 static int __cpuinit
check_c1e_idle(const struct cpuinfo_x86
*c
)
237 if (c
->x86_vendor
!= X86_VENDOR_AMD
)
243 /* Family 0x0f models < rev F do not have C1E */
244 if (c
->x86
== 0x0f && c
->x86_model
< 0x40)
250 static cpumask_t c1e_mask
= CPU_MASK_NONE
;
251 static int c1e_detected
;
253 void c1e_remove_cpu(int cpu
)
255 cpu_clear(cpu
, c1e_mask
);
259 * C1E aware idle routine. We check for C1E active in the interrupt
260 * pending message MSR. If we detect C1E, then we handle it the same
261 * way as C3 power states (local apic timer and TSC stop)
263 static void c1e_idle(void)
271 rdmsr(MSR_K8_INT_PENDING_MSG
, lo
, hi
);
272 if (lo
& K8_INTP_C1E_ACTIVE_MASK
) {
274 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
275 mark_tsc_unstable("TSC halt in AMD C1E");
276 printk(KERN_INFO
"System has AMD C1E enabled\n");
277 set_cpu_cap(&boot_cpu_data
, X86_FEATURE_AMDC1E
);
282 int cpu
= smp_processor_id();
284 if (!cpu_isset(cpu
, c1e_mask
)) {
285 cpu_set(cpu
, c1e_mask
);
287 * Force broadcast so ACPI can not interfere. Needs
288 * to run with interrupts enabled as it uses
292 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE
,
294 printk(KERN_INFO
"Switch to broadcast mode on CPU%d\n",
298 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER
, &cpu
);
303 * The switch back from broadcast mode needs to be
304 * called with interrupts disabled.
307 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT
, &cpu
);
313 void __cpuinit
select_idle_routine(const struct cpuinfo_x86
*c
)
315 #ifdef CONFIG_X86_SMP
316 if (pm_idle
== poll_idle
&& smp_num_siblings
> 1) {
317 printk(KERN_WARNING
"WARNING: polling idle and HT enabled,"
318 " performance may degrade.\n");
324 if (cpu_has(c
, X86_FEATURE_MWAIT
) && mwait_usable(c
)) {
326 * One CPU supports mwait => All CPUs supports mwait
328 printk(KERN_INFO
"using mwait in idle threads.\n");
329 pm_idle
= mwait_idle
;
330 } else if (check_c1e_idle(c
)) {
331 printk(KERN_INFO
"using C1E aware idle routine\n");
334 pm_idle
= default_idle
;
337 static int __init
idle_setup(char *str
)
342 if (!strcmp(str
, "poll")) {
343 printk("using polling idle threads.\n");
345 } else if (!strcmp(str
, "mwait"))
347 else if (!strcmp(str
, "halt")) {
349 * When the boot option of idle=halt is added, halt is
350 * forced to be used for CPU idle. In such case CPU C2/C3
351 * won't be used again.
352 * To continue to load the CPU idle driver, don't touch
353 * the boot_option_idle_override.
355 pm_idle
= default_idle
;
358 } else if (!strcmp(str
, "nomwait")) {
360 * If the boot option of "idle=nomwait" is added,
361 * it means that mwait will be disabled for CPU C2/C3
362 * states. In such case it won't touch the variable
363 * of boot_option_idle_override.
370 boot_option_idle_override
= 1;
373 early_param("idle", idle_setup
);