2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
64 #include <asm/genapic.h>
65 #include <asm/setup.h>
66 #include <linux/mc146818rtc.h>
68 #include <mach_apic.h>
69 #include <mach_wakecpu.h>
70 #include <smpboot_hooks.h>
73 u8 apicid_2_node
[MAX_APICID
];
74 static int low_mappings
;
77 /* State of each CPU */
78 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
80 /* Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
84 #ifdef CONFIG_HOTPLUG_CPU
86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
87 * removed after init for !CONFIG_HOTPLUG_CPU.
89 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
93 static struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
94 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
98 /* Number of siblings per CPU package */
99 int smp_num_siblings
= 1;
100 EXPORT_SYMBOL(smp_num_siblings
);
102 /* Last level cache ID of each logical CPU */
103 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
105 cpumask_t cpu_callin_map
;
106 cpumask_t cpu_callout_map
;
108 /* representing HT siblings of each logical CPU */
109 DEFINE_PER_CPU(cpumask_t
, cpu_sibling_map
);
110 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
112 /* representing HT and core siblings of each logical CPU */
113 DEFINE_PER_CPU(cpumask_t
, cpu_core_map
);
114 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
116 /* Per CPU bogomips and other parameters */
117 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
118 EXPORT_PER_CPU_SYMBOL(cpu_info
);
120 static atomic_t init_deasserted
;
123 /* representing cpus for which sibling maps can be computed */
124 static cpumask_t cpu_sibling_setup_map
;
126 /* Set if we find a B stepping CPU */
127 static int __cpuinitdata smp_b_stepping
;
129 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
131 /* which logical CPUs are on which nodes */
132 cpumask_t node_to_cpumask_map
[MAX_NUMNODES
] __read_mostly
=
133 { [0 ... MAX_NUMNODES
-1] = CPU_MASK_NONE
};
134 EXPORT_SYMBOL(node_to_cpumask_map
);
135 /* which node each logical CPU is on */
136 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
137 EXPORT_SYMBOL(cpu_to_node_map
);
139 /* set up a mapping between cpu and node. */
140 static void map_cpu_to_node(int cpu
, int node
)
142 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
143 cpu_set(cpu
, node_to_cpumask_map
[node
]);
144 cpu_to_node_map
[cpu
] = node
;
147 /* undo a mapping between cpu and node. */
148 static void unmap_cpu_to_node(int cpu
)
152 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
153 for (node
= 0; node
< MAX_NUMNODES
; node
++)
154 cpu_clear(cpu
, node_to_cpumask_map
[node
]);
155 cpu_to_node_map
[cpu
] = 0;
157 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
158 #define map_cpu_to_node(cpu, node) ({})
159 #define unmap_cpu_to_node(cpu) ({})
163 static int boot_cpu_logical_apicid
;
165 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
166 { [0 ... NR_CPUS
-1] = BAD_APICID
};
168 static void map_cpu_to_logical_apicid(void)
170 int cpu
= smp_processor_id();
171 int apicid
= logical_smp_processor_id();
172 int node
= apicid_to_node(apicid
);
174 if (!node_online(node
))
175 node
= first_online_node
;
177 cpu_2_logical_apicid
[cpu
] = apicid
;
178 map_cpu_to_node(cpu
, node
);
181 void numa_remove_cpu(int cpu
)
183 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
184 unmap_cpu_to_node(cpu
);
187 #define map_cpu_to_logical_apicid() do {} while (0)
191 * Report back to the Boot Processor.
194 static void __cpuinit
smp_callin(void)
197 unsigned long timeout
;
200 * If waken up by an INIT in an 82489DX configuration
201 * we may get here before an INIT-deassert IPI reaches
202 * our local APIC. We have to wait for the IPI or we'll
203 * lock up on an APIC access.
205 wait_for_init_deassert(&init_deasserted
);
208 * (This works even if the APIC is not enabled.)
210 phys_id
= read_apic_id();
211 cpuid
= smp_processor_id();
212 if (cpu_isset(cpuid
, cpu_callin_map
)) {
213 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
216 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
219 * STARTUP IPIs are fragile beasts as they might sometimes
220 * trigger some glue motherboard logic. Complete APIC bus
221 * silence for 1 second, this overestimates the time the
222 * boot CPU is spending to send the up to 2 STARTUP IPIs
223 * by a factor of two. This should be enough.
227 * Waiting 2s total for startup (udelay is not yet working)
229 timeout
= jiffies
+ 2*HZ
;
230 while (time_before(jiffies
, timeout
)) {
232 * Has the boot CPU finished it's STARTUP sequence?
234 if (cpu_isset(cpuid
, cpu_callout_map
))
239 if (!time_before(jiffies
, timeout
)) {
240 panic("%s: CPU%d started up but did not get a callout!\n",
245 * the boot CPU has finished the init stage and is spinning
246 * on callin_map until we finish. We are free to set up this
247 * CPU, first the APIC. (this is probably redundant on most
251 pr_debug("CALLIN, before setup_local_APIC().\n");
252 smp_callin_clear_local_apic();
254 end_local_APIC_setup();
255 map_cpu_to_logical_apicid();
257 notify_cpu_starting(cpuid
);
261 * Need to enable IRQs because it can take longer and then
262 * the NMI watchdog might kill us.
267 pr_debug("Stack at about %p\n", &cpuid
);
270 * Save our processor parameters
272 smp_store_cpu_info(cpuid
);
275 * Allow the master to continue.
277 cpu_set(cpuid
, cpu_callin_map
);
280 static int __cpuinitdata unsafe_smp
;
283 * Activate a secondary processor.
285 notrace
static void __cpuinit
start_secondary(void *unused
)
288 * Don't put *anything* before cpu_init(), SMP booting is too
289 * fragile that we want to limit the things done here to the
290 * most necessary things.
297 /* otherwise gcc will move up smp_processor_id before the cpu_init */
300 * Check TSC synchronization with the BP:
302 check_tsc_sync_target();
304 if (nmi_watchdog
== NMI_IO_APIC
) {
305 disable_8259A_irq(0);
306 enable_NMI_through_LVT0();
316 /* This must be done before setting cpu_online_map */
317 set_cpu_sibling_map(raw_smp_processor_id());
321 * We need to hold call_lock, so there is no inconsistency
322 * between the time smp_call_function() determines number of
323 * IPI recipients, and the time when the determination is made
324 * for which cpus receive the IPI. Holding this
325 * lock helps us to not include this cpu in a currently in progress
326 * smp_call_function().
328 * We need to hold vector_lock so there the set of online cpus
329 * does not change while we are assigning vectors to cpus. Holding
330 * this lock ensures we don't half assign or remove an irq from a cpu.
334 __setup_vector_irq(smp_processor_id());
335 cpu_set(smp_processor_id(), cpu_online_map
);
336 unlock_vector_lock();
338 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
340 /* enable local interrupts */
343 setup_secondary_clock();
349 static void __cpuinit
smp_apply_quirks(struct cpuinfo_x86
*c
)
352 * Mask B, Pentium, but not Pentium MMX
354 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
356 c
->x86_mask
>= 1 && c
->x86_mask
<= 4 &&
359 * Remember we have B step Pentia with bugs
364 * Certain Athlons might work (for various values of 'work') in SMP
365 * but they are not certified as MP capable.
367 if ((c
->x86_vendor
== X86_VENDOR_AMD
) && (c
->x86
== 6)) {
369 if (num_possible_cpus() == 1)
372 /* Athlon 660/661 is valid. */
373 if ((c
->x86_model
== 6) && ((c
->x86_mask
== 0) ||
377 /* Duron 670 is valid */
378 if ((c
->x86_model
== 7) && (c
->x86_mask
== 0))
382 * Athlon 662, Duron 671, and Athlon >model 7 have capability
383 * bit. It's worth noting that the A5 stepping (662) of some
384 * Athlon XP's have the MP bit set.
385 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
388 if (((c
->x86_model
== 6) && (c
->x86_mask
>= 2)) ||
389 ((c
->x86_model
== 7) && (c
->x86_mask
>= 1)) ||
394 /* If we get here, not a certified SMP capable AMD system. */
402 static void __cpuinit
smp_checks(void)
405 printk(KERN_WARNING
"WARNING: SMP operation may be unreliable"
406 "with B stepping processors.\n");
409 * Don't taint if we are running SMP kernel on a single non-MP
412 if (unsafe_smp
&& num_online_cpus() > 1) {
413 printk(KERN_INFO
"WARNING: This combination of AMD"
414 "processors is not suitable for SMP.\n");
415 add_taint(TAINT_UNSAFE_SMP
);
420 * The bootstrap kernel entry code has set these up. Save them for
424 void __cpuinit
smp_store_cpu_info(int id
)
426 struct cpuinfo_x86
*c
= &cpu_data(id
);
431 identify_secondary_cpu(c
);
436 void __cpuinit
set_cpu_sibling_map(int cpu
)
439 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
441 cpu_set(cpu
, cpu_sibling_setup_map
);
443 if (smp_num_siblings
> 1) {
444 for_each_cpu_mask_nr(i
, cpu_sibling_setup_map
) {
445 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
&&
446 c
->cpu_core_id
== cpu_data(i
).cpu_core_id
) {
447 cpu_set(i
, per_cpu(cpu_sibling_map
, cpu
));
448 cpu_set(cpu
, per_cpu(cpu_sibling_map
, i
));
449 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
450 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
451 cpu_set(i
, c
->llc_shared_map
);
452 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
456 cpu_set(cpu
, per_cpu(cpu_sibling_map
, cpu
));
459 cpu_set(cpu
, c
->llc_shared_map
);
461 if (current_cpu_data
.x86_max_cores
== 1) {
462 per_cpu(cpu_core_map
, cpu
) = per_cpu(cpu_sibling_map
, cpu
);
467 for_each_cpu_mask_nr(i
, cpu_sibling_setup_map
) {
468 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
469 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
470 cpu_set(i
, c
->llc_shared_map
);
471 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
473 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
474 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
475 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
477 * Does this new cpu bringup a new core?
479 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1) {
481 * for each core in package, increment
482 * the booted_cores for this new cpu
484 if (first_cpu(per_cpu(cpu_sibling_map
, i
)) == i
)
487 * increment the core count for all
488 * the other cpus in this package
491 cpu_data(i
).booted_cores
++;
492 } else if (i
!= cpu
&& !c
->booted_cores
)
493 c
->booted_cores
= cpu_data(i
).booted_cores
;
498 /* maps the cpu to the sched domain representing multi-core */
499 cpumask_t
cpu_coregroup_map(int cpu
)
501 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
503 * For perf, we return last level cache shared map.
504 * And for power savings, we return cpu_core_map
506 if (sched_mc_power_savings
|| sched_smt_power_savings
)
507 return per_cpu(cpu_core_map
, cpu
);
509 return c
->llc_shared_map
;
512 static void impress_friends(void)
515 unsigned long bogosum
= 0;
517 * Allow the user to impress friends.
519 pr_debug("Before bogomips.\n");
520 for_each_possible_cpu(cpu
)
521 if (cpu_isset(cpu
, cpu_callout_map
))
522 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
524 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
527 (bogosum
/(5000/HZ
))%100);
529 pr_debug("Before bogocount - setting activated=1.\n");
532 void __inquire_remote_apic(int apicid
)
534 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
535 char *names
[] = { "ID", "VERSION", "SPIV" };
539 printk(KERN_INFO
"Inquiring remote APIC 0x%x...\n", apicid
);
541 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
542 printk(KERN_INFO
"... APIC 0x%x %s: ", apicid
, names
[i
]);
547 status
= safe_apic_wait_icr_idle();
550 "a previous APIC delivery may have failed\n");
552 apic_icr_write(APIC_DM_REMRD
| regs
[i
], apicid
);
557 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
558 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
561 case APIC_ICR_RR_VALID
:
562 status
= apic_read(APIC_RRR
);
563 printk(KERN_CONT
"%08x\n", status
);
566 printk(KERN_CONT
"failed\n");
572 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
573 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
574 * won't ... remember to clear down the APIC, etc later.
577 wakeup_secondary_cpu_via_nmi(int logical_apicid
, unsigned long start_eip
)
579 unsigned long send_status
, accept_status
= 0;
583 /* Boot on the stack */
584 /* Kick the second */
585 apic_icr_write(APIC_DM_NMI
| APIC_DEST_LOGICAL
, logical_apicid
);
587 pr_debug("Waiting for send to finish...\n");
588 send_status
= safe_apic_wait_icr_idle();
591 * Give the other CPU some time to accept the IPI.
594 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
595 maxlvt
= lapic_get_maxlvt();
596 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
597 apic_write(APIC_ESR
, 0);
598 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
600 pr_debug("NMI sent.\n");
603 printk(KERN_ERR
"APIC never delivered???\n");
605 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
607 return (send_status
| accept_status
);
611 wakeup_secondary_cpu_via_init(int phys_apicid
, unsigned long start_eip
)
613 unsigned long send_status
, accept_status
= 0;
614 int maxlvt
, num_starts
, j
;
616 if (get_uv_system_type() == UV_NON_UNIQUE_APIC
) {
617 send_status
= uv_wakeup_secondary(phys_apicid
, start_eip
);
618 atomic_set(&init_deasserted
, 1);
622 maxlvt
= lapic_get_maxlvt();
625 * Be paranoid about clearing APIC errors.
627 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
628 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
629 apic_write(APIC_ESR
, 0);
633 pr_debug("Asserting INIT.\n");
636 * Turn INIT on target chip
641 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
| APIC_DM_INIT
,
644 pr_debug("Waiting for send to finish...\n");
645 send_status
= safe_apic_wait_icr_idle();
649 pr_debug("Deasserting INIT.\n");
653 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_DM_INIT
, phys_apicid
);
655 pr_debug("Waiting for send to finish...\n");
656 send_status
= safe_apic_wait_icr_idle();
659 atomic_set(&init_deasserted
, 1);
662 * Should we send STARTUP IPIs ?
664 * Determine this based on the APIC version.
665 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
667 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
673 * Paravirt / VMI wants a startup IPI hook here to set up the
674 * target processor state.
676 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
677 (unsigned long)stack_start
.sp
);
680 * Run STARTUP IPI loop.
682 pr_debug("#startup loops: %d.\n", num_starts
);
684 for (j
= 1; j
<= num_starts
; j
++) {
685 pr_debug("Sending STARTUP #%d.\n", j
);
686 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
687 apic_write(APIC_ESR
, 0);
689 pr_debug("After apic_write.\n");
696 /* Boot on the stack */
697 /* Kick the second */
698 apic_icr_write(APIC_DM_STARTUP
| (start_eip
>> 12),
702 * Give the other CPU some time to accept the IPI.
706 pr_debug("Startup point 1.\n");
708 pr_debug("Waiting for send to finish...\n");
709 send_status
= safe_apic_wait_icr_idle();
712 * Give the other CPU some time to accept the IPI.
715 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
716 apic_write(APIC_ESR
, 0);
717 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
718 if (send_status
|| accept_status
)
721 pr_debug("After Startup.\n");
724 printk(KERN_ERR
"APIC never delivered???\n");
726 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
728 return (send_status
| accept_status
);
732 struct work_struct work
;
733 struct task_struct
*idle
;
734 struct completion done
;
738 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
740 struct create_idle
*c_idle
=
741 container_of(work
, struct create_idle
, work
);
743 c_idle
->idle
= fork_idle(c_idle
->cpu
);
744 complete(&c_idle
->done
);
749 /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
750 static void __ref
free_bootmem_pda(struct x8664_pda
*oldpda
)
753 free_bootmem((unsigned long)oldpda
, sizeof(*oldpda
));
757 * Allocate node local memory for the AP pda.
759 * Must be called after the _cpu_pda pointer table is initialized.
761 int __cpuinit
get_local_pda(int cpu
)
763 struct x8664_pda
*oldpda
, *newpda
;
764 unsigned long size
= sizeof(struct x8664_pda
);
765 int node
= cpu_to_node(cpu
);
767 if (cpu_pda(cpu
) && !cpu_pda(cpu
)->in_bootmem
)
770 oldpda
= cpu_pda(cpu
);
771 newpda
= kmalloc_node(size
, GFP_ATOMIC
, node
);
773 printk(KERN_ERR
"Could not allocate node local PDA "
774 "for CPU %d on node %d\n", cpu
, node
);
777 return 0; /* have a usable pda */
783 memcpy(newpda
, oldpda
, size
);
784 free_bootmem_pda(oldpda
);
787 newpda
->in_bootmem
= 0;
788 cpu_pda(cpu
) = newpda
;
791 #endif /* CONFIG_X86_64 */
793 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
795 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
796 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
797 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
800 unsigned long boot_error
= 0;
802 unsigned long start_ip
;
803 unsigned short nmi_high
= 0, nmi_low
= 0;
804 struct create_idle c_idle
= {
806 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
808 INIT_WORK(&c_idle
.work
, do_fork_idle
);
811 /* Allocate node local memory for AP pdas */
813 boot_error
= get_local_pda(cpu
);
816 /* if can't get pda memory, can't start cpu */
820 alternatives_smp_switch(1);
822 c_idle
.idle
= get_idle_for_cpu(cpu
);
825 * We can't use kernel_thread since we must avoid to
826 * reschedule the child.
829 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
830 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
831 init_idle(c_idle
.idle
, cpu
);
835 if (!keventd_up() || current_is_keventd())
836 c_idle
.work
.func(&c_idle
.work
);
838 schedule_work(&c_idle
.work
);
839 wait_for_completion(&c_idle
.done
);
842 if (IS_ERR(c_idle
.idle
)) {
843 printk("failed fork for CPU %d\n", cpu
);
844 return PTR_ERR(c_idle
.idle
);
847 set_idle_for_cpu(cpu
, c_idle
.idle
);
850 per_cpu(current_task
, cpu
) = c_idle
.idle
;
852 /* Stack for startup_32 can be just as for start_secondary onwards */
855 cpu_pda(cpu
)->pcurrent
= c_idle
.idle
;
856 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
858 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
859 initial_code
= (unsigned long)start_secondary
;
860 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
862 /* start_ip had better be page-aligned! */
863 start_ip
= setup_trampoline();
865 /* So we see what's up */
866 printk(KERN_INFO
"Booting processor %d APIC 0x%x ip 0x%lx\n",
867 cpu
, apicid
, start_ip
);
870 * This grunge runs the startup process for
871 * the targeted processor.
874 atomic_set(&init_deasserted
, 0);
876 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
878 pr_debug("Setting warm reset code and vector.\n");
880 store_NMI_vector(&nmi_high
, &nmi_low
);
882 smpboot_setup_warm_reset_vector(start_ip
);
884 * Be paranoid about clearing APIC errors.
886 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
887 apic_write(APIC_ESR
, 0);
893 * Starting actual IPI sequence...
895 boot_error
= wakeup_secondary_cpu(apicid
, start_ip
);
899 * allow APs to start initializing.
901 pr_debug("Before Callout %d.\n", cpu
);
902 cpu_set(cpu
, cpu_callout_map
);
903 pr_debug("After Callout %d.\n", cpu
);
906 * Wait 5s total for a response
908 for (timeout
= 0; timeout
< 50000; timeout
++) {
909 if (cpu_isset(cpu
, cpu_callin_map
))
910 break; /* It has booted */
914 if (cpu_isset(cpu
, cpu_callin_map
)) {
915 /* number CPUs logically, starting from 1 (BSP is 0) */
917 printk(KERN_INFO
"CPU%d: ", cpu
);
918 print_cpu_info(&cpu_data(cpu
));
919 pr_debug("CPU has booted.\n");
922 if (*((volatile unsigned char *)trampoline_base
)
924 /* trampoline started but...? */
925 printk(KERN_ERR
"Stuck ??\n");
927 /* trampoline code not run */
928 printk(KERN_ERR
"Not responding.\n");
929 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
)
930 inquire_remote_apic(apicid
);
937 /* Try to put things back the way they were before ... */
938 numa_remove_cpu(cpu
); /* was set by numa_add_cpu */
939 cpu_clear(cpu
, cpu_callout_map
); /* was set by do_boot_cpu() */
940 cpu_clear(cpu
, cpu_initialized
); /* was set by cpu_init() */
941 cpu_clear(cpu
, cpu_present_map
);
942 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
945 /* mark "stuck" area as not stuck */
946 *((volatile unsigned long *)trampoline_base
) = 0;
949 * Cleanup possible dangling ends...
951 smpboot_restore_warm_reset_vector();
956 int __cpuinit
native_cpu_up(unsigned int cpu
)
958 int apicid
= cpu_present_to_apicid(cpu
);
962 WARN_ON(irqs_disabled());
964 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
966 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
967 !physid_isset(apicid
, phys_cpu_present_map
)) {
968 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
973 * Already booted CPU?
975 if (cpu_isset(cpu
, cpu_callin_map
)) {
976 pr_debug("do_boot_cpu %d Already started\n", cpu
);
981 * Save current MTRR state in case it was changed since early boot
982 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
986 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
989 /* init low mem mapping */
990 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
991 min_t(unsigned long, KERNEL_PGD_PTRS
, KERNEL_PGD_BOUNDARY
));
995 err
= do_boot_cpu(apicid
, cpu
);
1000 err
= do_boot_cpu(apicid
, cpu
);
1003 pr_debug("do_boot_cpu failed %d\n", err
);
1008 * Check TSC synchronization with the AP (keep irqs disabled
1011 local_irq_save(flags
);
1012 check_tsc_sync_source(cpu
);
1013 local_irq_restore(flags
);
1015 while (!cpu_online(cpu
)) {
1017 touch_nmi_watchdog();
1024 * Fall back to non SMP mode after errors.
1026 * RED-PEN audit/test this more. I bet there is more state messed up here.
1028 static __init
void disable_smp(void)
1030 cpu_present_map
= cpumask_of_cpu(0);
1031 cpu_possible_map
= cpumask_of_cpu(0);
1032 smpboot_clear_io_apic_irqs();
1034 if (smp_found_config
)
1035 physid_set_mask_of_physid(boot_cpu_physical_apicid
, &phys_cpu_present_map
);
1037 physid_set_mask_of_physid(0, &phys_cpu_present_map
);
1038 map_cpu_to_logical_apicid();
1039 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
1040 cpu_set(0, per_cpu(cpu_core_map
, 0));
1044 * Various sanity checks.
1046 static int __init
smp_sanity_check(unsigned max_cpus
)
1050 #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32)
1051 if (def_to_bigsmp
&& nr_cpu_ids
> 8) {
1056 "More than 8 CPUs detected - skipping them.\n"
1057 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
1060 for_each_present_cpu(cpu
) {
1062 cpu_clear(cpu
, cpu_present_map
);
1067 for_each_possible_cpu(cpu
) {
1069 cpu_clear(cpu
, cpu_possible_map
);
1077 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
1079 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1080 hard_smp_processor_id());
1082 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1086 * If we couldn't find an SMP configuration at boot time,
1087 * get out of here now!
1089 if (!smp_found_config
&& !acpi_lapic
) {
1091 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
1093 if (APIC_init_uniprocessor())
1094 printk(KERN_NOTICE
"Local APIC not detected."
1095 " Using dummy APIC emulation.\n");
1100 * Should not be necessary because the MP table should list the boot
1101 * CPU too, but we do it for the sake of robustness anyway.
1103 if (!check_phys_apicid_present(boot_cpu_physical_apicid
)) {
1105 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1106 boot_cpu_physical_apicid
);
1107 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1112 * If we couldn't find a local APIC, then get out of here now!
1114 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
1116 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
1117 boot_cpu_physical_apicid
);
1118 printk(KERN_ERR
"... forcing use of dummy APIC emulation."
1119 "(tell your hw vendor)\n");
1120 smpboot_clear_io_apic();
1124 verify_local_APIC();
1127 * If SMP should be disabled, then really disable it!
1130 printk(KERN_INFO
"SMP mode deactivated.\n");
1131 smpboot_clear_io_apic();
1133 localise_nmi_watchdog();
1137 end_local_APIC_setup();
1144 static void __init
smp_cpu_index_default(void)
1147 struct cpuinfo_x86
*c
;
1149 for_each_possible_cpu(i
) {
1151 /* mark all to hotplug */
1152 c
->cpu_index
= NR_CPUS
;
1157 * Prepare for SMP bootup. The MP table or ACPI has been read
1158 * earlier. Just do some sanity checking here and enable APIC mode.
1160 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1163 smp_cpu_index_default();
1164 current_cpu_data
= boot_cpu_data
;
1165 cpu_callin_map
= cpumask_of_cpu(0);
1168 * Setup boot CPU information
1170 smp_store_cpu_info(0); /* Final full version of the data */
1171 #ifdef CONFIG_X86_32
1172 boot_cpu_logical_apicid
= logical_smp_processor_id();
1174 current_thread_info()->cpu
= 0; /* needed? */
1175 set_cpu_sibling_map(0);
1177 #ifdef CONFIG_X86_64
1179 setup_apic_routing();
1182 if (smp_sanity_check(max_cpus
) < 0) {
1183 printk(KERN_INFO
"SMP disabled\n");
1189 if (read_apic_id() != boot_cpu_physical_apicid
) {
1190 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1191 read_apic_id(), boot_cpu_physical_apicid
);
1192 /* Or can we switch back to PIC here? */
1199 * Switch from PIC to APIC mode.
1203 #ifdef CONFIG_X86_64
1205 * Enable IO APIC before setting up error vector
1207 if (!skip_ioapic_setup
&& nr_ioapics
)
1210 end_local_APIC_setup();
1212 map_cpu_to_logical_apicid();
1214 setup_portio_remap();
1216 smpboot_setup_io_apic();
1218 * Set up local APIC timer on boot CPU.
1221 printk(KERN_INFO
"CPU%d: ", 0);
1222 print_cpu_info(&cpu_data(0));
1231 * Early setup to make printk work.
1233 void __init
native_smp_prepare_boot_cpu(void)
1235 int me
= smp_processor_id();
1236 #ifdef CONFIG_X86_32
1239 switch_to_new_gdt();
1240 /* already set me in cpu_online_map in boot_cpu_init() */
1241 cpu_set(me
, cpu_callout_map
);
1242 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1245 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1247 pr_debug("Boot done.\n");
1251 #ifdef CONFIG_X86_IO_APIC
1252 setup_ioapic_dest();
1254 check_nmi_watchdog();
1257 static int __initdata setup_possible_cpus
= -1;
1258 static int __init
_setup_possible_cpus(char *str
)
1260 get_option(&str
, &setup_possible_cpus
);
1263 early_param("possible_cpus", _setup_possible_cpus
);
1267 * cpu_possible_map should be static, it cannot change as cpu's
1268 * are onlined, or offlined. The reason is per-cpu data-structures
1269 * are allocated by some modules at init time, and dont expect to
1270 * do this dynamically on cpu arrival/departure.
1271 * cpu_present_map on the other hand can change dynamically.
1272 * In case when cpu_hotplug is not compiled, then we resort to current
1273 * behaviour, which is cpu_possible == cpu_present.
1276 * Three ways to find out the number of additional hotplug CPUs:
1277 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1278 * - The user can overwrite it with possible_cpus=NUM
1279 * - Otherwise don't reserve additional CPUs.
1280 * We do this because additional CPUs waste a lot of memory.
1283 __init
void prefill_possible_map(void)
1287 /* no processor from mptable or madt */
1288 if (!num_processors
)
1291 if (setup_possible_cpus
== -1)
1292 possible
= num_processors
+ disabled_cpus
;
1294 possible
= setup_possible_cpus
;
1296 if (possible
> CONFIG_NR_CPUS
) {
1298 "%d Processors exceeds NR_CPUS limit of %d\n",
1299 possible
, CONFIG_NR_CPUS
);
1300 possible
= CONFIG_NR_CPUS
;
1303 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1304 possible
, max_t(int, possible
- num_processors
, 0));
1306 for (i
= 0; i
< possible
; i
++)
1307 cpu_set(i
, cpu_possible_map
);
1309 nr_cpu_ids
= possible
;
1312 #ifdef CONFIG_HOTPLUG_CPU
1314 static void remove_siblinginfo(int cpu
)
1317 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1319 for_each_cpu_mask_nr(sibling
, per_cpu(cpu_core_map
, cpu
)) {
1320 cpu_clear(cpu
, per_cpu(cpu_core_map
, sibling
));
1322 * last thread sibling in this cpu core going down
1324 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1)
1325 cpu_data(sibling
).booted_cores
--;
1328 for_each_cpu_mask_nr(sibling
, per_cpu(cpu_sibling_map
, cpu
))
1329 cpu_clear(cpu
, per_cpu(cpu_sibling_map
, sibling
));
1330 cpus_clear(per_cpu(cpu_sibling_map
, cpu
));
1331 cpus_clear(per_cpu(cpu_core_map
, cpu
));
1332 c
->phys_proc_id
= 0;
1334 cpu_clear(cpu
, cpu_sibling_setup_map
);
1337 static void __ref
remove_cpu_from_maps(int cpu
)
1339 cpu_clear(cpu
, cpu_online_map
);
1340 cpu_clear(cpu
, cpu_callout_map
);
1341 cpu_clear(cpu
, cpu_callin_map
);
1342 /* was set by cpu_init() */
1343 cpu_clear(cpu
, cpu_initialized
);
1344 numa_remove_cpu(cpu
);
1347 void cpu_disable_common(void)
1349 int cpu
= smp_processor_id();
1352 * Allow any queued timer interrupts to get serviced
1353 * This is only a temporary solution until we cleanup
1354 * fixup_irqs as we do for IA64.
1359 local_irq_disable();
1360 remove_siblinginfo(cpu
);
1362 /* It's now safe to remove this processor from the online map */
1364 remove_cpu_from_maps(cpu
);
1365 unlock_vector_lock();
1369 int native_cpu_disable(void)
1371 int cpu
= smp_processor_id();
1374 * Perhaps use cpufreq to drop frequency, but that could go
1375 * into generic code.
1377 * We won't take down the boot processor on i386 due to some
1378 * interrupts only being able to be serviced by the BSP.
1379 * Especially so if we're not using an IOAPIC -zwane
1384 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1385 stop_apic_nmi_watchdog(NULL
);
1388 cpu_disable_common();
1392 void native_cpu_die(unsigned int cpu
)
1394 /* We don't do anything here: idle task is faking death itself. */
1397 for (i
= 0; i
< 10; i
++) {
1398 /* They ack this in play_dead by setting CPU_DEAD */
1399 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1400 printk(KERN_INFO
"CPU %d is now offline\n", cpu
);
1401 if (1 == num_online_cpus())
1402 alternatives_smp_switch(0);
1407 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1410 void play_dead_common(void)
1413 reset_lazy_tlbstate();
1414 irq_ctx_exit(raw_smp_processor_id());
1415 c1e_remove_cpu(raw_smp_processor_id());
1419 __get_cpu_var(cpu_state
) = CPU_DEAD
;
1422 * With physical CPU hotplug, we should halt the cpu
1424 local_irq_disable();
1427 void native_play_dead(void)
1433 #else /* ... !CONFIG_HOTPLUG_CPU */
1434 int native_cpu_disable(void)
1439 void native_cpu_die(unsigned int cpu
)
1441 /* We said "no" in __cpu_disable */
1445 void native_play_dead(void)