2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
26 #include <linux/kvm_host.h>
27 #include <linux/types.h>
28 #include <linux/string.h>
30 #include <linux/highmem.h>
31 #include <linux/module.h>
32 #include <linux/swap.h>
33 #include <linux/hugetlb.h>
34 #include <linux/compiler.h>
35 #include <linux/srcu.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
40 #include <asm/cmpxchg.h>
45 * When setting this variable to true it enables Two-Dimensional-Paging
46 * where the hardware walks 2 page tables:
47 * 1. the guest-virtual to guest-physical
48 * 2. while doing 1. it walks guest-physical to host-physical
49 * If the hardware supports that we don't need to do shadow paging.
51 bool tdp_enabled
= false;
55 AUDIT_POST_PAGE_FAULT
,
66 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
67 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define pgprintk(x...) do { } while (0)
72 #define rmap_printk(x...) do { } while (0)
78 module_param(dbg
, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PTE_PREFETCH_NUM 8
93 #define PT_FIRST_AVAIL_BITS_SHIFT 10
94 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LVL_OFFSET_MASK(level) \
111 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
112 * PT32_LEVEL_BITS))) - 1))
114 #define PT32_INDEX(address, level)\
115 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
119 #define PT64_DIR_BASE_ADDR_MASK \
120 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
121 #define PT64_LVL_ADDR_MASK(level) \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
123 * PT64_LEVEL_BITS))) - 1))
124 #define PT64_LVL_OFFSET_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
128 #define PT32_BASE_ADDR_MASK PAGE_MASK
129 #define PT32_DIR_BASE_ADDR_MASK \
130 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
131 #define PT32_LVL_ADDR_MASK(level) \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
133 * PT32_LEVEL_BITS))) - 1))
135 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #include <trace/events/kvm.h>
145 #define CREATE_TRACE_POINTS
146 #include "mmutrace.h"
148 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
149 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
151 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
153 /* make pte_list_desc fit well in cache line */
154 #define PTE_LIST_EXT 3
156 struct pte_list_desc
{
157 u64
*sptes
[PTE_LIST_EXT
];
158 struct pte_list_desc
*more
;
161 struct kvm_shadow_walk_iterator
{
169 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
170 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
171 shadow_walk_okay(&(_walker)); \
172 shadow_walk_next(&(_walker)))
174 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)) && \
177 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
178 __shadow_walk_next(&(_walker), spte))
180 static struct kmem_cache
*pte_list_desc_cache
;
181 static struct kmem_cache
*mmu_page_header_cache
;
182 static struct percpu_counter kvm_total_used_mmu_pages
;
184 static u64 __read_mostly shadow_nx_mask
;
185 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
186 static u64 __read_mostly shadow_user_mask
;
187 static u64 __read_mostly shadow_accessed_mask
;
188 static u64 __read_mostly shadow_dirty_mask
;
189 static u64 __read_mostly shadow_mmio_mask
;
191 static void mmu_spte_set(u64
*sptep
, u64 spte
);
192 static void mmu_free_roots(struct kvm_vcpu
*vcpu
);
194 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask
)
196 shadow_mmio_mask
= mmio_mask
;
198 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask
);
201 * spte bits of bit 3 ~ bit 11 are used as low 9 bits of generation number,
202 * the bits of bits 52 ~ bit 61 are used as high 10 bits of generation
205 #define MMIO_SPTE_GEN_LOW_SHIFT 3
206 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
208 #define MMIO_GEN_SHIFT 19
209 #define MMIO_GEN_LOW_SHIFT 9
210 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 1)
211 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
212 #define MMIO_MAX_GEN ((1 << MMIO_GEN_SHIFT) - 1)
214 static u64
generation_mmio_spte_mask(unsigned int gen
)
218 WARN_ON(gen
> MMIO_MAX_GEN
);
220 mask
= (gen
& MMIO_GEN_LOW_MASK
) << MMIO_SPTE_GEN_LOW_SHIFT
;
221 mask
|= ((u64
)gen
>> MMIO_GEN_LOW_SHIFT
) << MMIO_SPTE_GEN_HIGH_SHIFT
;
225 static unsigned int get_mmio_spte_generation(u64 spte
)
229 spte
&= ~shadow_mmio_mask
;
231 gen
= (spte
>> MMIO_SPTE_GEN_LOW_SHIFT
) & MMIO_GEN_LOW_MASK
;
232 gen
|= (spte
>> MMIO_SPTE_GEN_HIGH_SHIFT
) << MMIO_GEN_LOW_SHIFT
;
236 static unsigned int kvm_current_mmio_generation(struct kvm
*kvm
)
239 * Init kvm generation close to MMIO_MAX_GEN to easily test the
240 * code of handling generation number wrap-around.
242 return (kvm_memslots(kvm
)->generation
+
243 MMIO_MAX_GEN
- 150) & MMIO_GEN_MASK
;
246 static void mark_mmio_spte(struct kvm
*kvm
, u64
*sptep
, u64 gfn
,
249 unsigned int gen
= kvm_current_mmio_generation(kvm
);
250 u64 mask
= generation_mmio_spte_mask(gen
);
252 access
&= ACC_WRITE_MASK
| ACC_USER_MASK
;
253 mask
|= shadow_mmio_mask
| access
| gfn
<< PAGE_SHIFT
;
255 trace_mark_mmio_spte(sptep
, gfn
, access
, gen
);
256 mmu_spte_set(sptep
, mask
);
259 static bool is_mmio_spte(u64 spte
)
261 return (spte
& shadow_mmio_mask
) == shadow_mmio_mask
;
264 static gfn_t
get_mmio_spte_gfn(u64 spte
)
266 u64 mask
= generation_mmio_spte_mask(MMIO_MAX_GEN
) | shadow_mmio_mask
;
267 return (spte
& ~mask
) >> PAGE_SHIFT
;
270 static unsigned get_mmio_spte_access(u64 spte
)
272 u64 mask
= generation_mmio_spte_mask(MMIO_MAX_GEN
) | shadow_mmio_mask
;
273 return (spte
& ~mask
) & ~PAGE_MASK
;
276 static bool set_mmio_spte(struct kvm
*kvm
, u64
*sptep
, gfn_t gfn
,
277 pfn_t pfn
, unsigned access
)
279 if (unlikely(is_noslot_pfn(pfn
))) {
280 mark_mmio_spte(kvm
, sptep
, gfn
, access
);
287 static bool check_mmio_spte(struct kvm
*kvm
, u64 spte
)
289 unsigned int kvm_gen
, spte_gen
;
291 kvm_gen
= kvm_current_mmio_generation(kvm
);
292 spte_gen
= get_mmio_spte_generation(spte
);
294 trace_check_mmio_spte(spte
, kvm_gen
, spte_gen
);
295 return likely(kvm_gen
== spte_gen
);
298 static inline u64
rsvd_bits(int s
, int e
)
300 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
303 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
304 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
306 shadow_user_mask
= user_mask
;
307 shadow_accessed_mask
= accessed_mask
;
308 shadow_dirty_mask
= dirty_mask
;
309 shadow_nx_mask
= nx_mask
;
310 shadow_x_mask
= x_mask
;
312 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
314 static int is_cpuid_PSE36(void)
319 static int is_nx(struct kvm_vcpu
*vcpu
)
321 return vcpu
->arch
.efer
& EFER_NX
;
324 static int is_shadow_present_pte(u64 pte
)
326 return pte
& PT_PRESENT_MASK
&& !is_mmio_spte(pte
);
329 static int is_large_pte(u64 pte
)
331 return pte
& PT_PAGE_SIZE_MASK
;
334 static int is_dirty_gpte(unsigned long pte
)
336 return pte
& PT_DIRTY_MASK
;
339 static int is_rmap_spte(u64 pte
)
341 return is_shadow_present_pte(pte
);
344 static int is_last_spte(u64 pte
, int level
)
346 if (level
== PT_PAGE_TABLE_LEVEL
)
348 if (is_large_pte(pte
))
353 static pfn_t
spte_to_pfn(u64 pte
)
355 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
358 static gfn_t
pse36_gfn_delta(u32 gpte
)
360 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
362 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
366 static void __set_spte(u64
*sptep
, u64 spte
)
371 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
376 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
378 return xchg(sptep
, spte
);
381 static u64
__get_spte_lockless(u64
*sptep
)
383 return ACCESS_ONCE(*sptep
);
386 static bool __check_direct_spte_mmio_pf(u64 spte
)
388 /* It is valid if the spte is zapped. */
400 static void count_spte_clear(u64
*sptep
, u64 spte
)
402 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
404 if (is_shadow_present_pte(spte
))
407 /* Ensure the spte is completely set before we increase the count */
409 sp
->clear_spte_count
++;
412 static void __set_spte(u64
*sptep
, u64 spte
)
414 union split_spte
*ssptep
, sspte
;
416 ssptep
= (union split_spte
*)sptep
;
417 sspte
= (union split_spte
)spte
;
419 ssptep
->spte_high
= sspte
.spte_high
;
422 * If we map the spte from nonpresent to present, We should store
423 * the high bits firstly, then set present bit, so cpu can not
424 * fetch this spte while we are setting the spte.
428 ssptep
->spte_low
= sspte
.spte_low
;
431 static void __update_clear_spte_fast(u64
*sptep
, u64 spte
)
433 union split_spte
*ssptep
, sspte
;
435 ssptep
= (union split_spte
*)sptep
;
436 sspte
= (union split_spte
)spte
;
438 ssptep
->spte_low
= sspte
.spte_low
;
441 * If we map the spte from present to nonpresent, we should clear
442 * present bit firstly to avoid vcpu fetch the old high bits.
446 ssptep
->spte_high
= sspte
.spte_high
;
447 count_spte_clear(sptep
, spte
);
450 static u64
__update_clear_spte_slow(u64
*sptep
, u64 spte
)
452 union split_spte
*ssptep
, sspte
, orig
;
454 ssptep
= (union split_spte
*)sptep
;
455 sspte
= (union split_spte
)spte
;
457 /* xchg acts as a barrier before the setting of the high bits */
458 orig
.spte_low
= xchg(&ssptep
->spte_low
, sspte
.spte_low
);
459 orig
.spte_high
= ssptep
->spte_high
;
460 ssptep
->spte_high
= sspte
.spte_high
;
461 count_spte_clear(sptep
, spte
);
467 * The idea using the light way get the spte on x86_32 guest is from
468 * gup_get_pte(arch/x86/mm/gup.c).
470 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
471 * coalesces them and we are running out of the MMU lock. Therefore
472 * we need to protect against in-progress updates of the spte.
474 * Reading the spte while an update is in progress may get the old value
475 * for the high part of the spte. The race is fine for a present->non-present
476 * change (because the high part of the spte is ignored for non-present spte),
477 * but for a present->present change we must reread the spte.
479 * All such changes are done in two steps (present->non-present and
480 * non-present->present), hence it is enough to count the number of
481 * present->non-present updates: if it changed while reading the spte,
482 * we might have hit the race. This is done using clear_spte_count.
484 static u64
__get_spte_lockless(u64
*sptep
)
486 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
487 union split_spte spte
, *orig
= (union split_spte
*)sptep
;
491 count
= sp
->clear_spte_count
;
494 spte
.spte_low
= orig
->spte_low
;
497 spte
.spte_high
= orig
->spte_high
;
500 if (unlikely(spte
.spte_low
!= orig
->spte_low
||
501 count
!= sp
->clear_spte_count
))
507 static bool __check_direct_spte_mmio_pf(u64 spte
)
509 union split_spte sspte
= (union split_spte
)spte
;
510 u32 high_mmio_mask
= shadow_mmio_mask
>> 32;
512 /* It is valid if the spte is zapped. */
516 /* It is valid if the spte is being zapped. */
517 if (sspte
.spte_low
== 0ull &&
518 (sspte
.spte_high
& high_mmio_mask
) == high_mmio_mask
)
525 static bool spte_is_locklessly_modifiable(u64 spte
)
527 return (spte
& (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
)) ==
528 (SPTE_HOST_WRITEABLE
| SPTE_MMU_WRITEABLE
);
531 static bool spte_has_volatile_bits(u64 spte
)
534 * Always atomicly update spte if it can be updated
535 * out of mmu-lock, it can ensure dirty bit is not lost,
536 * also, it can help us to get a stable is_writable_pte()
537 * to ensure tlb flush is not missed.
539 if (spte_is_locklessly_modifiable(spte
))
542 if (!shadow_accessed_mask
)
545 if (!is_shadow_present_pte(spte
))
548 if ((spte
& shadow_accessed_mask
) &&
549 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
555 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
557 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
560 /* Rules for using mmu_spte_set:
561 * Set the sptep from nonpresent to present.
562 * Note: the sptep being assigned *must* be either not present
563 * or in a state where the hardware will not attempt to update
566 static void mmu_spte_set(u64
*sptep
, u64 new_spte
)
568 WARN_ON(is_shadow_present_pte(*sptep
));
569 __set_spte(sptep
, new_spte
);
572 /* Rules for using mmu_spte_update:
573 * Update the state bits, it means the mapped pfn is not changged.
575 * Whenever we overwrite a writable spte with a read-only one we
576 * should flush remote TLBs. Otherwise rmap_write_protect
577 * will find a read-only spte, even though the writable spte
578 * might be cached on a CPU's TLB, the return value indicates this
581 static bool mmu_spte_update(u64
*sptep
, u64 new_spte
)
583 u64 old_spte
= *sptep
;
586 WARN_ON(!is_rmap_spte(new_spte
));
588 if (!is_shadow_present_pte(old_spte
)) {
589 mmu_spte_set(sptep
, new_spte
);
593 if (!spte_has_volatile_bits(old_spte
))
594 __update_clear_spte_fast(sptep
, new_spte
);
596 old_spte
= __update_clear_spte_slow(sptep
, new_spte
);
599 * For the spte updated out of mmu-lock is safe, since
600 * we always atomicly update it, see the comments in
601 * spte_has_volatile_bits().
603 if (is_writable_pte(old_spte
) && !is_writable_pte(new_spte
))
606 if (!shadow_accessed_mask
)
609 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
610 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
611 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
612 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
618 * Rules for using mmu_spte_clear_track_bits:
619 * It sets the sptep from present to nonpresent, and track the
620 * state bits, it is used to clear the last level sptep.
622 static int mmu_spte_clear_track_bits(u64
*sptep
)
625 u64 old_spte
= *sptep
;
627 if (!spte_has_volatile_bits(old_spte
))
628 __update_clear_spte_fast(sptep
, 0ull);
630 old_spte
= __update_clear_spte_slow(sptep
, 0ull);
632 if (!is_rmap_spte(old_spte
))
635 pfn
= spte_to_pfn(old_spte
);
638 * KVM does not hold the refcount of the page used by
639 * kvm mmu, before reclaiming the page, we should
640 * unmap it from mmu first.
642 WARN_ON(!kvm_is_mmio_pfn(pfn
) && !page_count(pfn_to_page(pfn
)));
644 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
645 kvm_set_pfn_accessed(pfn
);
646 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
647 kvm_set_pfn_dirty(pfn
);
652 * Rules for using mmu_spte_clear_no_track:
653 * Directly clear spte without caring the state bits of sptep,
654 * it is used to set the upper level spte.
656 static void mmu_spte_clear_no_track(u64
*sptep
)
658 __update_clear_spte_fast(sptep
, 0ull);
661 static u64
mmu_spte_get_lockless(u64
*sptep
)
663 return __get_spte_lockless(sptep
);
666 static void walk_shadow_page_lockless_begin(struct kvm_vcpu
*vcpu
)
669 * Prevent page table teardown by making any free-er wait during
670 * kvm_flush_remote_tlbs() IPI to all active vcpus.
673 vcpu
->mode
= READING_SHADOW_PAGE_TABLES
;
675 * Make sure a following spte read is not reordered ahead of the write
681 static void walk_shadow_page_lockless_end(struct kvm_vcpu
*vcpu
)
684 * Make sure the write to vcpu->mode is not reordered in front of
685 * reads to sptes. If it does, kvm_commit_zap_page() can see us
686 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
689 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
693 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
694 struct kmem_cache
*base_cache
, int min
)
698 if (cache
->nobjs
>= min
)
700 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
701 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
704 cache
->objects
[cache
->nobjs
++] = obj
;
709 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache
*cache
)
714 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
715 struct kmem_cache
*cache
)
718 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
721 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
726 if (cache
->nobjs
>= min
)
728 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
729 page
= (void *)__get_free_page(GFP_KERNEL
);
732 cache
->objects
[cache
->nobjs
++] = page
;
737 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
740 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
743 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
747 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
748 pte_list_desc_cache
, 8 + PTE_PREFETCH_NUM
);
751 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
754 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
755 mmu_page_header_cache
, 4);
760 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
762 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_list_desc_cache
,
763 pte_list_desc_cache
);
764 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
765 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
766 mmu_page_header_cache
);
769 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
)
774 p
= mc
->objects
[--mc
->nobjs
];
778 static struct pte_list_desc
*mmu_alloc_pte_list_desc(struct kvm_vcpu
*vcpu
)
780 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_list_desc_cache
);
783 static void mmu_free_pte_list_desc(struct pte_list_desc
*pte_list_desc
)
785 kmem_cache_free(pte_list_desc_cache
, pte_list_desc
);
788 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
790 if (!sp
->role
.direct
)
791 return sp
->gfns
[index
];
793 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
796 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
799 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
801 sp
->gfns
[index
] = gfn
;
805 * Return the pointer to the large page information for a given gfn,
806 * handling slots that are not large page aligned.
808 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
809 struct kvm_memory_slot
*slot
,
814 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
815 return &slot
->arch
.lpage_info
[level
- 2][idx
];
818 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
820 struct kvm_memory_slot
*slot
;
821 struct kvm_lpage_info
*linfo
;
824 slot
= gfn_to_memslot(kvm
, gfn
);
825 for (i
= PT_DIRECTORY_LEVEL
;
826 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
827 linfo
= lpage_info_slot(gfn
, slot
, i
);
828 linfo
->write_count
+= 1;
830 kvm
->arch
.indirect_shadow_pages
++;
833 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
835 struct kvm_memory_slot
*slot
;
836 struct kvm_lpage_info
*linfo
;
839 slot
= gfn_to_memslot(kvm
, gfn
);
840 for (i
= PT_DIRECTORY_LEVEL
;
841 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
842 linfo
= lpage_info_slot(gfn
, slot
, i
);
843 linfo
->write_count
-= 1;
844 WARN_ON(linfo
->write_count
< 0);
846 kvm
->arch
.indirect_shadow_pages
--;
849 static int has_wrprotected_page(struct kvm
*kvm
,
853 struct kvm_memory_slot
*slot
;
854 struct kvm_lpage_info
*linfo
;
856 slot
= gfn_to_memslot(kvm
, gfn
);
858 linfo
= lpage_info_slot(gfn
, slot
, level
);
859 return linfo
->write_count
;
865 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
867 unsigned long page_size
;
870 page_size
= kvm_host_page_size(kvm
, gfn
);
872 for (i
= PT_PAGE_TABLE_LEVEL
;
873 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
874 if (page_size
>= KVM_HPAGE_SIZE(i
))
883 static struct kvm_memory_slot
*
884 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
887 struct kvm_memory_slot
*slot
;
889 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
890 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
891 (no_dirty_log
&& slot
->dirty_bitmap
))
897 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
899 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
902 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
904 int host_level
, level
, max_level
;
906 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
908 if (host_level
== PT_PAGE_TABLE_LEVEL
)
911 max_level
= min(kvm_x86_ops
->get_lpage_level(), host_level
);
913 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
914 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
921 * Pte mapping structures:
923 * If pte_list bit zero is zero, then pte_list point to the spte.
925 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
926 * pte_list_desc containing more mappings.
928 * Returns the number of pte entries before the spte was added or zero if
929 * the spte was not added.
932 static int pte_list_add(struct kvm_vcpu
*vcpu
, u64
*spte
,
933 unsigned long *pte_list
)
935 struct pte_list_desc
*desc
;
939 rmap_printk("pte_list_add: %p %llx 0->1\n", spte
, *spte
);
940 *pte_list
= (unsigned long)spte
;
941 } else if (!(*pte_list
& 1)) {
942 rmap_printk("pte_list_add: %p %llx 1->many\n", spte
, *spte
);
943 desc
= mmu_alloc_pte_list_desc(vcpu
);
944 desc
->sptes
[0] = (u64
*)*pte_list
;
945 desc
->sptes
[1] = spte
;
946 *pte_list
= (unsigned long)desc
| 1;
949 rmap_printk("pte_list_add: %p %llx many->many\n", spte
, *spte
);
950 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
951 while (desc
->sptes
[PTE_LIST_EXT
-1] && desc
->more
) {
953 count
+= PTE_LIST_EXT
;
955 if (desc
->sptes
[PTE_LIST_EXT
-1]) {
956 desc
->more
= mmu_alloc_pte_list_desc(vcpu
);
959 for (i
= 0; desc
->sptes
[i
]; ++i
)
961 desc
->sptes
[i
] = spte
;
967 pte_list_desc_remove_entry(unsigned long *pte_list
, struct pte_list_desc
*desc
,
968 int i
, struct pte_list_desc
*prev_desc
)
972 for (j
= PTE_LIST_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
974 desc
->sptes
[i
] = desc
->sptes
[j
];
975 desc
->sptes
[j
] = NULL
;
978 if (!prev_desc
&& !desc
->more
)
979 *pte_list
= (unsigned long)desc
->sptes
[0];
982 prev_desc
->more
= desc
->more
;
984 *pte_list
= (unsigned long)desc
->more
| 1;
985 mmu_free_pte_list_desc(desc
);
988 static void pte_list_remove(u64
*spte
, unsigned long *pte_list
)
990 struct pte_list_desc
*desc
;
991 struct pte_list_desc
*prev_desc
;
995 printk(KERN_ERR
"pte_list_remove: %p 0->BUG\n", spte
);
997 } else if (!(*pte_list
& 1)) {
998 rmap_printk("pte_list_remove: %p 1->0\n", spte
);
999 if ((u64
*)*pte_list
!= spte
) {
1000 printk(KERN_ERR
"pte_list_remove: %p 1->BUG\n", spte
);
1005 rmap_printk("pte_list_remove: %p many->many\n", spte
);
1006 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1009 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1010 if (desc
->sptes
[i
] == spte
) {
1011 pte_list_desc_remove_entry(pte_list
,
1019 pr_err("pte_list_remove: %p many->many\n", spte
);
1024 typedef void (*pte_list_walk_fn
) (u64
*spte
);
1025 static void pte_list_walk(unsigned long *pte_list
, pte_list_walk_fn fn
)
1027 struct pte_list_desc
*desc
;
1033 if (!(*pte_list
& 1))
1034 return fn((u64
*)*pte_list
);
1036 desc
= (struct pte_list_desc
*)(*pte_list
& ~1ul);
1038 for (i
= 0; i
< PTE_LIST_EXT
&& desc
->sptes
[i
]; ++i
)
1044 static unsigned long *__gfn_to_rmap(gfn_t gfn
, int level
,
1045 struct kvm_memory_slot
*slot
)
1049 idx
= gfn_to_index(gfn
, slot
->base_gfn
, level
);
1050 return &slot
->arch
.rmap
[level
- PT_PAGE_TABLE_LEVEL
][idx
];
1054 * Take gfn and return the reverse mapping to it.
1056 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
1058 struct kvm_memory_slot
*slot
;
1060 slot
= gfn_to_memslot(kvm
, gfn
);
1061 return __gfn_to_rmap(gfn
, level
, slot
);
1064 static bool rmap_can_add(struct kvm_vcpu
*vcpu
)
1066 struct kvm_mmu_memory_cache
*cache
;
1068 cache
= &vcpu
->arch
.mmu_pte_list_desc_cache
;
1069 return mmu_memory_cache_free_objects(cache
);
1072 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1074 struct kvm_mmu_page
*sp
;
1075 unsigned long *rmapp
;
1077 sp
= page_header(__pa(spte
));
1078 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
1079 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1080 return pte_list_add(vcpu
, spte
, rmapp
);
1083 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
1085 struct kvm_mmu_page
*sp
;
1087 unsigned long *rmapp
;
1089 sp
= page_header(__pa(spte
));
1090 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
1091 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
1092 pte_list_remove(spte
, rmapp
);
1096 * Used by the following functions to iterate through the sptes linked by a
1097 * rmap. All fields are private and not assumed to be used outside.
1099 struct rmap_iterator
{
1100 /* private fields */
1101 struct pte_list_desc
*desc
; /* holds the sptep if not NULL */
1102 int pos
; /* index of the sptep */
1106 * Iteration must be started by this function. This should also be used after
1107 * removing/dropping sptes from the rmap link because in such cases the
1108 * information in the itererator may not be valid.
1110 * Returns sptep if found, NULL otherwise.
1112 static u64
*rmap_get_first(unsigned long rmap
, struct rmap_iterator
*iter
)
1122 iter
->desc
= (struct pte_list_desc
*)(rmap
& ~1ul);
1124 return iter
->desc
->sptes
[iter
->pos
];
1128 * Must be used with a valid iterator: e.g. after rmap_get_first().
1130 * Returns sptep if found, NULL otherwise.
1132 static u64
*rmap_get_next(struct rmap_iterator
*iter
)
1135 if (iter
->pos
< PTE_LIST_EXT
- 1) {
1139 sptep
= iter
->desc
->sptes
[iter
->pos
];
1144 iter
->desc
= iter
->desc
->more
;
1148 /* desc->sptes[0] cannot be NULL */
1149 return iter
->desc
->sptes
[iter
->pos
];
1156 static void drop_spte(struct kvm
*kvm
, u64
*sptep
)
1158 if (mmu_spte_clear_track_bits(sptep
))
1159 rmap_remove(kvm
, sptep
);
1163 static bool __drop_large_spte(struct kvm
*kvm
, u64
*sptep
)
1165 if (is_large_pte(*sptep
)) {
1166 WARN_ON(page_header(__pa(sptep
))->role
.level
==
1167 PT_PAGE_TABLE_LEVEL
);
1168 drop_spte(kvm
, sptep
);
1176 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1178 if (__drop_large_spte(vcpu
->kvm
, sptep
))
1179 kvm_flush_remote_tlbs(vcpu
->kvm
);
1183 * Write-protect on the specified @sptep, @pt_protect indicates whether
1184 * spte writ-protection is caused by protecting shadow page table.
1185 * @flush indicates whether tlb need be flushed.
1187 * Note: write protection is difference between drity logging and spte
1189 * - for dirty logging, the spte can be set to writable at anytime if
1190 * its dirty bitmap is properly set.
1191 * - for spte protection, the spte can be writable only after unsync-ing
1194 * Return true if the spte is dropped.
1197 spte_write_protect(struct kvm
*kvm
, u64
*sptep
, bool *flush
, bool pt_protect
)
1201 if (!is_writable_pte(spte
) &&
1202 !(pt_protect
&& spte_is_locklessly_modifiable(spte
)))
1205 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep
, *sptep
);
1207 if (__drop_large_spte(kvm
, sptep
)) {
1213 spte
&= ~SPTE_MMU_WRITEABLE
;
1214 spte
= spte
& ~PT_WRITABLE_MASK
;
1216 *flush
|= mmu_spte_update(sptep
, spte
);
1220 static bool __rmap_write_protect(struct kvm
*kvm
, unsigned long *rmapp
,
1224 struct rmap_iterator iter
;
1227 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1228 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1229 if (spte_write_protect(kvm
, sptep
, &flush
, pt_protect
)) {
1230 sptep
= rmap_get_first(*rmapp
, &iter
);
1234 sptep
= rmap_get_next(&iter
);
1241 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1242 * @kvm: kvm instance
1243 * @slot: slot to protect
1244 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1245 * @mask: indicates which pages we should protect
1247 * Used when we do not need to care about huge page mappings: e.g. during dirty
1248 * logging we do not have any such mappings.
1250 void kvm_mmu_write_protect_pt_masked(struct kvm
*kvm
,
1251 struct kvm_memory_slot
*slot
,
1252 gfn_t gfn_offset
, unsigned long mask
)
1254 unsigned long *rmapp
;
1257 rmapp
= __gfn_to_rmap(slot
->base_gfn
+ gfn_offset
+ __ffs(mask
),
1258 PT_PAGE_TABLE_LEVEL
, slot
);
1259 __rmap_write_protect(kvm
, rmapp
, false);
1261 /* clear the first set bit */
1266 static bool rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
1268 struct kvm_memory_slot
*slot
;
1269 unsigned long *rmapp
;
1271 bool write_protected
= false;
1273 slot
= gfn_to_memslot(kvm
, gfn
);
1275 for (i
= PT_PAGE_TABLE_LEVEL
;
1276 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
1277 rmapp
= __gfn_to_rmap(gfn
, i
, slot
);
1278 write_protected
|= __rmap_write_protect(kvm
, rmapp
, true);
1281 return write_protected
;
1284 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1285 struct kvm_memory_slot
*slot
, unsigned long data
)
1288 struct rmap_iterator iter
;
1289 int need_tlb_flush
= 0;
1291 while ((sptep
= rmap_get_first(*rmapp
, &iter
))) {
1292 BUG_ON(!(*sptep
& PT_PRESENT_MASK
));
1293 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep
, *sptep
);
1295 drop_spte(kvm
, sptep
);
1299 return need_tlb_flush
;
1302 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1303 struct kvm_memory_slot
*slot
, unsigned long data
)
1306 struct rmap_iterator iter
;
1309 pte_t
*ptep
= (pte_t
*)data
;
1312 WARN_ON(pte_huge(*ptep
));
1313 new_pfn
= pte_pfn(*ptep
);
1315 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;) {
1316 BUG_ON(!is_shadow_present_pte(*sptep
));
1317 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep
, *sptep
);
1321 if (pte_write(*ptep
)) {
1322 drop_spte(kvm
, sptep
);
1323 sptep
= rmap_get_first(*rmapp
, &iter
);
1325 new_spte
= *sptep
& ~PT64_BASE_ADDR_MASK
;
1326 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
1328 new_spte
&= ~PT_WRITABLE_MASK
;
1329 new_spte
&= ~SPTE_HOST_WRITEABLE
;
1330 new_spte
&= ~shadow_accessed_mask
;
1332 mmu_spte_clear_track_bits(sptep
);
1333 mmu_spte_set(sptep
, new_spte
);
1334 sptep
= rmap_get_next(&iter
);
1339 kvm_flush_remote_tlbs(kvm
);
1344 static int kvm_handle_hva_range(struct kvm
*kvm
,
1345 unsigned long start
,
1348 int (*handler
)(struct kvm
*kvm
,
1349 unsigned long *rmapp
,
1350 struct kvm_memory_slot
*slot
,
1351 unsigned long data
))
1355 struct kvm_memslots
*slots
;
1356 struct kvm_memory_slot
*memslot
;
1358 slots
= kvm_memslots(kvm
);
1360 kvm_for_each_memslot(memslot
, slots
) {
1361 unsigned long hva_start
, hva_end
;
1362 gfn_t gfn_start
, gfn_end
;
1364 hva_start
= max(start
, memslot
->userspace_addr
);
1365 hva_end
= min(end
, memslot
->userspace_addr
+
1366 (memslot
->npages
<< PAGE_SHIFT
));
1367 if (hva_start
>= hva_end
)
1370 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1371 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1373 gfn_start
= hva_to_gfn_memslot(hva_start
, memslot
);
1374 gfn_end
= hva_to_gfn_memslot(hva_end
+ PAGE_SIZE
- 1, memslot
);
1376 for (j
= PT_PAGE_TABLE_LEVEL
;
1377 j
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++j
) {
1378 unsigned long idx
, idx_end
;
1379 unsigned long *rmapp
;
1382 * {idx(page_j) | page_j intersects with
1383 * [hva_start, hva_end)} = {idx, idx+1, ..., idx_end}.
1385 idx
= gfn_to_index(gfn_start
, memslot
->base_gfn
, j
);
1386 idx_end
= gfn_to_index(gfn_end
- 1, memslot
->base_gfn
, j
);
1388 rmapp
= __gfn_to_rmap(gfn_start
, j
, memslot
);
1390 for (; idx
<= idx_end
; ++idx
)
1391 ret
|= handler(kvm
, rmapp
++, memslot
, data
);
1398 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
1400 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
1401 struct kvm_memory_slot
*slot
,
1402 unsigned long data
))
1404 return kvm_handle_hva_range(kvm
, hva
, hva
+ 1, data
, handler
);
1407 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
1409 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
1412 int kvm_unmap_hva_range(struct kvm
*kvm
, unsigned long start
, unsigned long end
)
1414 return kvm_handle_hva_range(kvm
, start
, end
, 0, kvm_unmap_rmapp
);
1417 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
1419 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
1422 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1423 struct kvm_memory_slot
*slot
, unsigned long data
)
1426 struct rmap_iterator
uninitialized_var(iter
);
1430 * In case of absence of EPT Access and Dirty Bits supports,
1431 * emulate the accessed bit for EPT, by checking if this page has
1432 * an EPT mapping, and clearing it if it does. On the next access,
1433 * a new EPT mapping will be established.
1434 * This has some overhead, but not as much as the cost of swapping
1435 * out actively used pages or breaking up actively used hugepages.
1437 if (!shadow_accessed_mask
) {
1438 young
= kvm_unmap_rmapp(kvm
, rmapp
, slot
, data
);
1442 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1443 sptep
= rmap_get_next(&iter
)) {
1444 BUG_ON(!is_shadow_present_pte(*sptep
));
1446 if (*sptep
& shadow_accessed_mask
) {
1448 clear_bit((ffs(shadow_accessed_mask
) - 1),
1449 (unsigned long *)sptep
);
1453 /* @data has hva passed to kvm_age_hva(). */
1454 trace_kvm_age_page(data
, slot
, young
);
1458 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
1459 struct kvm_memory_slot
*slot
, unsigned long data
)
1462 struct rmap_iterator iter
;
1466 * If there's no access bit in the secondary pte set by the
1467 * hardware it's up to gup-fast/gup to set the access bit in
1468 * the primary pte or in the page structure.
1470 if (!shadow_accessed_mask
)
1473 for (sptep
= rmap_get_first(*rmapp
, &iter
); sptep
;
1474 sptep
= rmap_get_next(&iter
)) {
1475 BUG_ON(!is_shadow_present_pte(*sptep
));
1477 if (*sptep
& shadow_accessed_mask
) {
1486 #define RMAP_RECYCLE_THRESHOLD 1000
1488 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
1490 unsigned long *rmapp
;
1491 struct kvm_mmu_page
*sp
;
1493 sp
= page_header(__pa(spte
));
1495 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
1497 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, NULL
, 0);
1498 kvm_flush_remote_tlbs(vcpu
->kvm
);
1501 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
1503 return kvm_handle_hva(kvm
, hva
, hva
, kvm_age_rmapp
);
1506 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1508 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1512 static int is_empty_shadow_page(u64
*spt
)
1517 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1518 if (is_shadow_present_pte(*pos
)) {
1519 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1528 * This value is the sum of all of the kvm instances's
1529 * kvm->arch.n_used_mmu_pages values. We need a global,
1530 * aggregate version in order to make the slab shrinker
1533 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1535 kvm
->arch
.n_used_mmu_pages
+= nr
;
1536 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1539 static void kvm_mmu_free_page(struct kvm_mmu_page
*sp
)
1541 ASSERT(is_empty_shadow_page(sp
->spt
));
1542 hlist_del(&sp
->hash_link
);
1543 list_del(&sp
->link
);
1544 free_page((unsigned long)sp
->spt
);
1545 if (!sp
->role
.direct
)
1546 free_page((unsigned long)sp
->gfns
);
1547 kmem_cache_free(mmu_page_header_cache
, sp
);
1550 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1552 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1555 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1556 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1561 pte_list_add(vcpu
, parent_pte
, &sp
->parent_ptes
);
1564 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1567 pte_list_remove(parent_pte
, &sp
->parent_ptes
);
1570 static void drop_parent_pte(struct kvm_mmu_page
*sp
,
1573 mmu_page_remove_parent_pte(sp
, parent_pte
);
1574 mmu_spte_clear_no_track(parent_pte
);
1577 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1578 u64
*parent_pte
, int direct
)
1580 struct kvm_mmu_page
*sp
;
1582 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
);
1583 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1585 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
);
1586 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1589 * The active_mmu_pages list is the FIFO list, do not move the
1590 * page until it is zapped. kvm_zap_obsolete_pages depends on
1591 * this feature. See the comments in kvm_zap_obsolete_pages().
1593 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1594 sp
->parent_ptes
= 0;
1595 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1596 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1600 static void mark_unsync(u64
*spte
);
1601 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1603 pte_list_walk(&sp
->parent_ptes
, mark_unsync
);
1606 static void mark_unsync(u64
*spte
)
1608 struct kvm_mmu_page
*sp
;
1611 sp
= page_header(__pa(spte
));
1612 index
= spte
- sp
->spt
;
1613 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1615 if (sp
->unsync_children
++)
1617 kvm_mmu_mark_parents_unsync(sp
);
1620 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1621 struct kvm_mmu_page
*sp
)
1626 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1630 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1631 struct kvm_mmu_page
*sp
, u64
*spte
,
1637 #define KVM_PAGE_ARRAY_NR 16
1639 struct kvm_mmu_pages
{
1640 struct mmu_page_and_offset
{
1641 struct kvm_mmu_page
*sp
;
1643 } page
[KVM_PAGE_ARRAY_NR
];
1647 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1653 for (i
=0; i
< pvec
->nr
; i
++)
1654 if (pvec
->page
[i
].sp
== sp
)
1657 pvec
->page
[pvec
->nr
].sp
= sp
;
1658 pvec
->page
[pvec
->nr
].idx
= idx
;
1660 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1663 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1664 struct kvm_mmu_pages
*pvec
)
1666 int i
, ret
, nr_unsync_leaf
= 0;
1668 for_each_set_bit(i
, sp
->unsync_child_bitmap
, 512) {
1669 struct kvm_mmu_page
*child
;
1670 u64 ent
= sp
->spt
[i
];
1672 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1673 goto clear_child_bitmap
;
1675 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1677 if (child
->unsync_children
) {
1678 if (mmu_pages_add(pvec
, child
, i
))
1681 ret
= __mmu_unsync_walk(child
, pvec
);
1683 goto clear_child_bitmap
;
1685 nr_unsync_leaf
+= ret
;
1688 } else if (child
->unsync
) {
1690 if (mmu_pages_add(pvec
, child
, i
))
1693 goto clear_child_bitmap
;
1698 __clear_bit(i
, sp
->unsync_child_bitmap
);
1699 sp
->unsync_children
--;
1700 WARN_ON((int)sp
->unsync_children
< 0);
1704 return nr_unsync_leaf
;
1707 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1708 struct kvm_mmu_pages
*pvec
)
1710 if (!sp
->unsync_children
)
1713 mmu_pages_add(pvec
, sp
, 0);
1714 return __mmu_unsync_walk(sp
, pvec
);
1717 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1719 WARN_ON(!sp
->unsync
);
1720 trace_kvm_mmu_sync_page(sp
);
1722 --kvm
->stat
.mmu_unsync
;
1725 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1726 struct list_head
*invalid_list
);
1727 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1728 struct list_head
*invalid_list
);
1731 * NOTE: we should pay more attention on the zapped-obsolete page
1732 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1733 * since it has been deleted from active_mmu_pages but still can be found
1736 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1737 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1738 * all the obsolete pages.
1740 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1741 hlist_for_each_entry(_sp, \
1742 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1743 if ((_sp)->gfn != (_gfn)) {} else
1745 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1746 for_each_gfn_sp(_kvm, _sp, _gfn) \
1747 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1749 /* @sp->gfn should be write-protected at the call site */
1750 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1751 struct list_head
*invalid_list
, bool clear_unsync
)
1753 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1754 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1759 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1761 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1762 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1766 kvm_mmu_flush_tlb(vcpu
);
1770 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1771 struct kvm_mmu_page
*sp
)
1773 LIST_HEAD(invalid_list
);
1776 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1778 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1783 #ifdef CONFIG_KVM_MMU_AUDIT
1784 #include "mmu_audit.c"
1786 static void kvm_mmu_audit(struct kvm_vcpu
*vcpu
, int point
) { }
1787 static void mmu_audit_disable(void) { }
1790 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1791 struct list_head
*invalid_list
)
1793 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1796 /* @gfn should be write-protected at the call site */
1797 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1799 struct kvm_mmu_page
*s
;
1800 LIST_HEAD(invalid_list
);
1803 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
1807 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1808 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1809 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1810 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1811 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1817 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1819 kvm_mmu_flush_tlb(vcpu
);
1822 struct mmu_page_path
{
1823 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1824 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1827 #define for_each_sp(pvec, sp, parents, i) \
1828 for (i = mmu_pages_next(&pvec, &parents, -1), \
1829 sp = pvec.page[i].sp; \
1830 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1831 i = mmu_pages_next(&pvec, &parents, i))
1833 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1834 struct mmu_page_path
*parents
,
1839 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1840 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1842 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1843 parents
->idx
[0] = pvec
->page
[n
].idx
;
1847 parents
->parent
[sp
->role
.level
-2] = sp
;
1848 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1854 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1856 struct kvm_mmu_page
*sp
;
1857 unsigned int level
= 0;
1860 unsigned int idx
= parents
->idx
[level
];
1862 sp
= parents
->parent
[level
];
1866 --sp
->unsync_children
;
1867 WARN_ON((int)sp
->unsync_children
< 0);
1868 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1870 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1873 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1874 struct mmu_page_path
*parents
,
1875 struct kvm_mmu_pages
*pvec
)
1877 parents
->parent
[parent
->role
.level
-1] = NULL
;
1881 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1882 struct kvm_mmu_page
*parent
)
1885 struct kvm_mmu_page
*sp
;
1886 struct mmu_page_path parents
;
1887 struct kvm_mmu_pages pages
;
1888 LIST_HEAD(invalid_list
);
1890 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1891 while (mmu_unsync_walk(parent
, &pages
)) {
1892 bool protected = false;
1894 for_each_sp(pages
, sp
, parents
, i
)
1895 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1898 kvm_flush_remote_tlbs(vcpu
->kvm
);
1900 for_each_sp(pages
, sp
, parents
, i
) {
1901 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1902 mmu_pages_clear_parents(&parents
);
1904 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1905 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1906 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1910 static void init_shadow_page_table(struct kvm_mmu_page
*sp
)
1914 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1918 static void __clear_sp_write_flooding_count(struct kvm_mmu_page
*sp
)
1920 sp
->write_flooding_count
= 0;
1923 static void clear_sp_write_flooding_count(u64
*spte
)
1925 struct kvm_mmu_page
*sp
= page_header(__pa(spte
));
1927 __clear_sp_write_flooding_count(sp
);
1930 static bool is_obsolete_sp(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1932 return unlikely(sp
->mmu_valid_gen
!= kvm
->arch
.mmu_valid_gen
);
1935 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1943 union kvm_mmu_page_role role
;
1945 struct kvm_mmu_page
*sp
;
1946 bool need_sync
= false;
1948 role
= vcpu
->arch
.mmu
.base_role
;
1950 role
.direct
= direct
;
1953 role
.access
= access
;
1954 if (!vcpu
->arch
.mmu
.direct_map
1955 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1956 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1957 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1958 role
.quadrant
= quadrant
;
1960 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
) {
1961 if (is_obsolete_sp(vcpu
->kvm
, sp
))
1964 if (!need_sync
&& sp
->unsync
)
1967 if (sp
->role
.word
!= role
.word
)
1970 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1973 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1974 if (sp
->unsync_children
) {
1975 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1976 kvm_mmu_mark_parents_unsync(sp
);
1977 } else if (sp
->unsync
)
1978 kvm_mmu_mark_parents_unsync(sp
);
1980 __clear_sp_write_flooding_count(sp
);
1981 trace_kvm_mmu_get_page(sp
, false);
1984 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1985 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1990 hlist_add_head(&sp
->hash_link
,
1991 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1993 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1994 kvm_flush_remote_tlbs(vcpu
->kvm
);
1995 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1996 kvm_sync_pages(vcpu
, gfn
);
1998 account_shadowed(vcpu
->kvm
, gfn
);
2000 sp
->mmu_valid_gen
= vcpu
->kvm
->arch
.mmu_valid_gen
;
2001 init_shadow_page_table(sp
);
2002 trace_kvm_mmu_get_page(sp
, true);
2006 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
2007 struct kvm_vcpu
*vcpu
, u64 addr
)
2009 iterator
->addr
= addr
;
2010 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
2011 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
2013 if (iterator
->level
== PT64_ROOT_LEVEL
&&
2014 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
2015 !vcpu
->arch
.mmu
.direct_map
)
2018 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
2019 iterator
->shadow_addr
2020 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
2021 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
2023 if (!iterator
->shadow_addr
)
2024 iterator
->level
= 0;
2028 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
2030 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
2033 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
2034 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
2038 static void __shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
,
2041 if (is_last_spte(spte
, iterator
->level
)) {
2042 iterator
->level
= 0;
2046 iterator
->shadow_addr
= spte
& PT64_BASE_ADDR_MASK
;
2050 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
2052 return __shadow_walk_next(iterator
, *iterator
->sptep
);
2055 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
2059 spte
= __pa(sp
->spt
) | PT_PRESENT_MASK
| PT_WRITABLE_MASK
|
2060 shadow_user_mask
| shadow_x_mask
| shadow_accessed_mask
;
2062 mmu_spte_set(sptep
, spte
);
2065 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2066 unsigned direct_access
)
2068 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
2069 struct kvm_mmu_page
*child
;
2072 * For the direct sp, if the guest pte's dirty bit
2073 * changed form clean to dirty, it will corrupt the
2074 * sp's access: allow writable in the read-only sp,
2075 * so we should update the spte at this point to get
2076 * a new sp with the correct access.
2078 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
2079 if (child
->role
.access
== direct_access
)
2082 drop_parent_pte(child
, sptep
);
2083 kvm_flush_remote_tlbs(vcpu
->kvm
);
2087 static bool mmu_page_zap_pte(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2091 struct kvm_mmu_page
*child
;
2094 if (is_shadow_present_pte(pte
)) {
2095 if (is_last_spte(pte
, sp
->role
.level
)) {
2096 drop_spte(kvm
, spte
);
2097 if (is_large_pte(pte
))
2100 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2101 drop_parent_pte(child
, spte
);
2106 if (is_mmio_spte(pte
))
2107 mmu_spte_clear_no_track(spte
);
2112 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
2113 struct kvm_mmu_page
*sp
)
2117 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
2118 mmu_page_zap_pte(kvm
, sp
, sp
->spt
+ i
);
2121 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
2123 mmu_page_remove_parent_pte(sp
, parent_pte
);
2126 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
2129 struct rmap_iterator iter
;
2131 while ((sptep
= rmap_get_first(sp
->parent_ptes
, &iter
)))
2132 drop_parent_pte(sp
, sptep
);
2135 static int mmu_zap_unsync_children(struct kvm
*kvm
,
2136 struct kvm_mmu_page
*parent
,
2137 struct list_head
*invalid_list
)
2140 struct mmu_page_path parents
;
2141 struct kvm_mmu_pages pages
;
2143 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
2146 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2147 while (mmu_unsync_walk(parent
, &pages
)) {
2148 struct kvm_mmu_page
*sp
;
2150 for_each_sp(pages
, sp
, parents
, i
) {
2151 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2152 mmu_pages_clear_parents(&parents
);
2155 kvm_mmu_pages_init(parent
, &parents
, &pages
);
2161 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
2162 struct list_head
*invalid_list
)
2166 trace_kvm_mmu_prepare_zap_page(sp
);
2167 ++kvm
->stat
.mmu_shadow_zapped
;
2168 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
2169 kvm_mmu_page_unlink_children(kvm
, sp
);
2170 kvm_mmu_unlink_parents(kvm
, sp
);
2172 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
2173 unaccount_shadowed(kvm
, sp
->gfn
);
2176 kvm_unlink_unsync_page(kvm
, sp
);
2177 if (!sp
->root_count
) {
2180 list_move(&sp
->link
, invalid_list
);
2181 kvm_mod_used_mmu_pages(kvm
, -1);
2183 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
2186 * The obsolete pages can not be used on any vcpus.
2187 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2189 if (!sp
->role
.invalid
&& !is_obsolete_sp(kvm
, sp
))
2190 kvm_reload_remote_mmus(kvm
);
2193 sp
->role
.invalid
= 1;
2197 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
2198 struct list_head
*invalid_list
)
2200 struct kvm_mmu_page
*sp
, *nsp
;
2202 if (list_empty(invalid_list
))
2206 * wmb: make sure everyone sees our modifications to the page tables
2207 * rmb: make sure we see changes to vcpu->mode
2212 * Wait for all vcpus to exit guest mode and/or lockless shadow
2215 kvm_flush_remote_tlbs(kvm
);
2217 list_for_each_entry_safe(sp
, nsp
, invalid_list
, link
) {
2218 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
2219 kvm_mmu_free_page(sp
);
2223 static bool prepare_zap_oldest_mmu_page(struct kvm
*kvm
,
2224 struct list_head
*invalid_list
)
2226 struct kvm_mmu_page
*sp
;
2228 if (list_empty(&kvm
->arch
.active_mmu_pages
))
2231 sp
= list_entry(kvm
->arch
.active_mmu_pages
.prev
,
2232 struct kvm_mmu_page
, link
);
2233 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
2239 * Changing the number of mmu pages allocated to the vm
2240 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2242 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
2244 LIST_HEAD(invalid_list
);
2246 spin_lock(&kvm
->mmu_lock
);
2248 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
2249 /* Need to free some mmu pages to achieve the goal. */
2250 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
)
2251 if (!prepare_zap_oldest_mmu_page(kvm
, &invalid_list
))
2254 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2255 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
2258 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
2260 spin_unlock(&kvm
->mmu_lock
);
2263 int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
2265 struct kvm_mmu_page
*sp
;
2266 LIST_HEAD(invalid_list
);
2269 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
2271 spin_lock(&kvm
->mmu_lock
);
2272 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
) {
2273 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
2276 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
2278 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
2279 spin_unlock(&kvm
->mmu_lock
);
2283 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page
);
2286 * The function is based on mtrr_type_lookup() in
2287 * arch/x86/kernel/cpu/mtrr/generic.c
2289 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
2294 u8 prev_match
, curr_match
;
2295 int num_var_ranges
= KVM_NR_VAR_MTRR
;
2297 if (!mtrr_state
->enabled
)
2300 /* Make end inclusive end, instead of exclusive */
2303 /* Look in fixed ranges. Just return the type as per start */
2304 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
2307 if (start
< 0x80000) {
2309 idx
+= (start
>> 16);
2310 return mtrr_state
->fixed_ranges
[idx
];
2311 } else if (start
< 0xC0000) {
2313 idx
+= ((start
- 0x80000) >> 14);
2314 return mtrr_state
->fixed_ranges
[idx
];
2315 } else if (start
< 0x1000000) {
2317 idx
+= ((start
- 0xC0000) >> 12);
2318 return mtrr_state
->fixed_ranges
[idx
];
2323 * Look in variable ranges
2324 * Look of multiple ranges matching this address and pick type
2325 * as per MTRR precedence
2327 if (!(mtrr_state
->enabled
& 2))
2328 return mtrr_state
->def_type
;
2331 for (i
= 0; i
< num_var_ranges
; ++i
) {
2332 unsigned short start_state
, end_state
;
2334 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
2337 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
2338 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
2339 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
2340 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
2342 start_state
= ((start
& mask
) == (base
& mask
));
2343 end_state
= ((end
& mask
) == (base
& mask
));
2344 if (start_state
!= end_state
)
2347 if ((start
& mask
) != (base
& mask
))
2350 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
2351 if (prev_match
== 0xFF) {
2352 prev_match
= curr_match
;
2356 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
2357 curr_match
== MTRR_TYPE_UNCACHABLE
)
2358 return MTRR_TYPE_UNCACHABLE
;
2360 if ((prev_match
== MTRR_TYPE_WRBACK
&&
2361 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
2362 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
2363 curr_match
== MTRR_TYPE_WRBACK
)) {
2364 prev_match
= MTRR_TYPE_WRTHROUGH
;
2365 curr_match
= MTRR_TYPE_WRTHROUGH
;
2368 if (prev_match
!= curr_match
)
2369 return MTRR_TYPE_UNCACHABLE
;
2372 if (prev_match
!= 0xFF)
2375 return mtrr_state
->def_type
;
2378 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2382 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
2383 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
2384 if (mtrr
== 0xfe || mtrr
== 0xff)
2385 mtrr
= MTRR_TYPE_WRBACK
;
2388 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
2390 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
2392 trace_kvm_mmu_unsync_page(sp
);
2393 ++vcpu
->kvm
->stat
.mmu_unsync
;
2396 kvm_mmu_mark_parents_unsync(sp
);
2399 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
2401 struct kvm_mmu_page
*s
;
2403 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2406 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
2407 __kvm_unsync_page(vcpu
, s
);
2411 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2414 struct kvm_mmu_page
*s
;
2415 bool need_unsync
= false;
2417 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
) {
2421 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
2428 kvm_unsync_pages(vcpu
, gfn
);
2432 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2433 unsigned pte_access
, int level
,
2434 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2435 bool can_unsync
, bool host_writable
)
2440 if (set_mmio_spte(vcpu
->kvm
, sptep
, gfn
, pfn
, pte_access
))
2443 spte
= PT_PRESENT_MASK
;
2445 spte
|= shadow_accessed_mask
;
2447 if (pte_access
& ACC_EXEC_MASK
)
2448 spte
|= shadow_x_mask
;
2450 spte
|= shadow_nx_mask
;
2452 if (pte_access
& ACC_USER_MASK
)
2453 spte
|= shadow_user_mask
;
2455 if (level
> PT_PAGE_TABLE_LEVEL
)
2456 spte
|= PT_PAGE_SIZE_MASK
;
2458 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2459 kvm_is_mmio_pfn(pfn
));
2462 spte
|= SPTE_HOST_WRITEABLE
;
2464 pte_access
&= ~ACC_WRITE_MASK
;
2466 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2468 if (pte_access
& ACC_WRITE_MASK
) {
2471 * Other vcpu creates new sp in the window between
2472 * mapping_level() and acquiring mmu-lock. We can
2473 * allow guest to retry the access, the mapping can
2474 * be fixed if guest refault.
2476 if (level
> PT_PAGE_TABLE_LEVEL
&&
2477 has_wrprotected_page(vcpu
->kvm
, gfn
, level
))
2480 spte
|= PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
;
2483 * Optimization: for pte sync, if spte was writable the hash
2484 * lookup is unnecessary (and expensive). Write protection
2485 * is responsibility of mmu_get_page / kvm_sync_page.
2486 * Same reasoning can be applied to dirty page accounting.
2488 if (!can_unsync
&& is_writable_pte(*sptep
))
2491 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2492 pgprintk("%s: found shadow page for %llx, marking ro\n",
2495 pte_access
&= ~ACC_WRITE_MASK
;
2496 spte
&= ~(PT_WRITABLE_MASK
| SPTE_MMU_WRITEABLE
);
2500 if (pte_access
& ACC_WRITE_MASK
)
2501 mark_page_dirty(vcpu
->kvm
, gfn
);
2504 if (mmu_spte_update(sptep
, spte
))
2505 kvm_flush_remote_tlbs(vcpu
->kvm
);
2510 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2511 unsigned pte_access
, int write_fault
, int *emulate
,
2512 int level
, gfn_t gfn
, pfn_t pfn
, bool speculative
,
2515 int was_rmapped
= 0;
2518 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__
,
2519 *sptep
, write_fault
, gfn
);
2521 if (is_rmap_spte(*sptep
)) {
2523 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2524 * the parent of the now unreachable PTE.
2526 if (level
> PT_PAGE_TABLE_LEVEL
&&
2527 !is_large_pte(*sptep
)) {
2528 struct kvm_mmu_page
*child
;
2531 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2532 drop_parent_pte(child
, sptep
);
2533 kvm_flush_remote_tlbs(vcpu
->kvm
);
2534 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2535 pgprintk("hfn old %llx new %llx\n",
2536 spte_to_pfn(*sptep
), pfn
);
2537 drop_spte(vcpu
->kvm
, sptep
);
2538 kvm_flush_remote_tlbs(vcpu
->kvm
);
2543 if (set_spte(vcpu
, sptep
, pte_access
, level
, gfn
, pfn
, speculative
,
2544 true, host_writable
)) {
2547 kvm_mmu_flush_tlb(vcpu
);
2550 if (unlikely(is_mmio_spte(*sptep
) && emulate
))
2553 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2554 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2555 is_large_pte(*sptep
)? "2MB" : "4kB",
2556 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2558 if (!was_rmapped
&& is_large_pte(*sptep
))
2559 ++vcpu
->kvm
->stat
.lpages
;
2561 if (is_shadow_present_pte(*sptep
)) {
2563 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2564 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2565 rmap_recycle(vcpu
, sptep
, gfn
);
2569 kvm_release_pfn_clean(pfn
);
2572 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2574 mmu_free_roots(vcpu
);
2577 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
2581 bit7
= (gpte
>> 7) & 1;
2582 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
2585 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2588 struct kvm_memory_slot
*slot
;
2590 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2592 return KVM_PFN_ERR_FAULT
;
2594 return gfn_to_pfn_memslot_atomic(slot
, gfn
);
2597 static bool prefetch_invalid_gpte(struct kvm_vcpu
*vcpu
,
2598 struct kvm_mmu_page
*sp
, u64
*spte
,
2601 if (is_rsvd_bits_set(&vcpu
->arch
.mmu
, gpte
, PT_PAGE_TABLE_LEVEL
))
2604 if (!is_present_gpte(gpte
))
2607 if (!(gpte
& PT_ACCESSED_MASK
))
2613 drop_spte(vcpu
->kvm
, spte
);
2617 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2618 struct kvm_mmu_page
*sp
,
2619 u64
*start
, u64
*end
)
2621 struct page
*pages
[PTE_PREFETCH_NUM
];
2622 unsigned access
= sp
->role
.access
;
2626 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2627 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2630 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2634 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2635 mmu_set_spte(vcpu
, start
, access
, 0, NULL
,
2636 sp
->role
.level
, gfn
, page_to_pfn(pages
[i
]),
2642 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2643 struct kvm_mmu_page
*sp
, u64
*sptep
)
2645 u64
*spte
, *start
= NULL
;
2648 WARN_ON(!sp
->role
.direct
);
2650 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2653 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2654 if (is_shadow_present_pte(*spte
) || spte
== sptep
) {
2657 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2665 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2667 struct kvm_mmu_page
*sp
;
2670 * Since it's no accessed bit on EPT, it's no way to
2671 * distinguish between actually accessed translations
2672 * and prefetched, so disable pte prefetch if EPT is
2675 if (!shadow_accessed_mask
)
2678 sp
= page_header(__pa(sptep
));
2679 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2682 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2685 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2686 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2689 struct kvm_shadow_walk_iterator iterator
;
2690 struct kvm_mmu_page
*sp
;
2694 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2695 if (iterator
.level
== level
) {
2696 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
,
2697 write
, &emulate
, level
, gfn
, pfn
,
2698 prefault
, map_writable
);
2699 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2700 ++vcpu
->stat
.pf_fixed
;
2704 if (!is_shadow_present_pte(*iterator
.sptep
)) {
2705 u64 base_addr
= iterator
.addr
;
2707 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2708 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2709 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2711 1, ACC_ALL
, iterator
.sptep
);
2713 link_shadow_page(iterator
.sptep
, sp
);
2719 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2723 info
.si_signo
= SIGBUS
;
2725 info
.si_code
= BUS_MCEERR_AR
;
2726 info
.si_addr
= (void __user
*)address
;
2727 info
.si_addr_lsb
= PAGE_SHIFT
;
2729 send_sig_info(SIGBUS
, &info
, tsk
);
2732 static int kvm_handle_bad_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
, pfn_t pfn
)
2735 * Do not cache the mmio info caused by writing the readonly gfn
2736 * into the spte otherwise read access on readonly gfn also can
2737 * caused mmio page fault and treat it as mmio access.
2738 * Return 1 to tell kvm to emulate it.
2740 if (pfn
== KVM_PFN_ERR_RO_FAULT
)
2743 if (pfn
== KVM_PFN_ERR_HWPOISON
) {
2744 kvm_send_hwpoison_signal(gfn_to_hva(vcpu
->kvm
, gfn
), current
);
2751 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2752 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2756 int level
= *levelp
;
2759 * Check if it's a transparent hugepage. If this would be an
2760 * hugetlbfs page, level wouldn't be set to
2761 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2764 if (!is_error_noslot_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2765 level
== PT_PAGE_TABLE_LEVEL
&&
2766 PageTransCompound(pfn_to_page(pfn
)) &&
2767 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2770 * mmu_notifier_retry was successful and we hold the
2771 * mmu_lock here, so the pmd can't become splitting
2772 * from under us, and in turn
2773 * __split_huge_page_refcount() can't run from under
2774 * us and we can safely transfer the refcount from
2775 * PG_tail to PG_head as we switch the pfn to tail to
2778 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2779 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2780 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2784 kvm_release_pfn_clean(pfn
);
2792 static bool handle_abnormal_pfn(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
,
2793 pfn_t pfn
, unsigned access
, int *ret_val
)
2797 /* The pfn is invalid, report the error! */
2798 if (unlikely(is_error_pfn(pfn
))) {
2799 *ret_val
= kvm_handle_bad_page(vcpu
, gfn
, pfn
);
2803 if (unlikely(is_noslot_pfn(pfn
)))
2804 vcpu_cache_mmio_info(vcpu
, gva
, gfn
, access
);
2811 static bool page_fault_can_be_fast(struct kvm_vcpu
*vcpu
, u32 error_code
)
2814 * #PF can be fast only if the shadow page table is present and it
2815 * is caused by write-protect, that means we just need change the
2816 * W bit of the spte which can be done out of mmu-lock.
2818 if (!(error_code
& PFERR_PRESENT_MASK
) ||
2819 !(error_code
& PFERR_WRITE_MASK
))
2826 fast_pf_fix_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
, u64 spte
)
2828 struct kvm_mmu_page
*sp
= page_header(__pa(sptep
));
2831 WARN_ON(!sp
->role
.direct
);
2834 * The gfn of direct spte is stable since it is calculated
2837 gfn
= kvm_mmu_page_get_gfn(sp
, sptep
- sp
->spt
);
2839 if (cmpxchg64(sptep
, spte
, spte
| PT_WRITABLE_MASK
) == spte
)
2840 mark_page_dirty(vcpu
->kvm
, gfn
);
2847 * - true: let the vcpu to access on the same address again.
2848 * - false: let the real page fault path to fix it.
2850 static bool fast_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
, int level
,
2853 struct kvm_shadow_walk_iterator iterator
;
2857 if (!page_fault_can_be_fast(vcpu
, error_code
))
2860 walk_shadow_page_lockless_begin(vcpu
);
2861 for_each_shadow_entry_lockless(vcpu
, gva
, iterator
, spte
)
2862 if (!is_shadow_present_pte(spte
) || iterator
.level
< level
)
2866 * If the mapping has been changed, let the vcpu fault on the
2867 * same address again.
2869 if (!is_rmap_spte(spte
)) {
2874 if (!is_last_spte(spte
, level
))
2878 * Check if it is a spurious fault caused by TLB lazily flushed.
2880 * Need not check the access of upper level table entries since
2881 * they are always ACC_ALL.
2883 if (is_writable_pte(spte
)) {
2889 * Currently, to simplify the code, only the spte write-protected
2890 * by dirty-log can be fast fixed.
2892 if (!spte_is_locklessly_modifiable(spte
))
2896 * Currently, fast page fault only works for direct mapping since
2897 * the gfn is not stable for indirect shadow page.
2898 * See Documentation/virtual/kvm/locking.txt to get more detail.
2900 ret
= fast_pf_fix_direct_spte(vcpu
, iterator
.sptep
, spte
);
2902 trace_fast_page_fault(vcpu
, gva
, error_code
, iterator
.sptep
,
2904 walk_shadow_page_lockless_end(vcpu
);
2909 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2910 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2911 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
);
2913 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, u32 error_code
,
2914 gfn_t gfn
, bool prefault
)
2920 unsigned long mmu_seq
;
2921 bool map_writable
, write
= error_code
& PFERR_WRITE_MASK
;
2923 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2924 if (likely(!force_pt_level
)) {
2925 level
= mapping_level(vcpu
, gfn
);
2927 * This path builds a PAE pagetable - so we can map
2928 * 2mb pages at maximum. Therefore check if the level
2929 * is larger than that.
2931 if (level
> PT_DIRECTORY_LEVEL
)
2932 level
= PT_DIRECTORY_LEVEL
;
2934 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2936 level
= PT_PAGE_TABLE_LEVEL
;
2938 if (fast_page_fault(vcpu
, v
, level
, error_code
))
2941 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2944 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2947 if (handle_abnormal_pfn(vcpu
, v
, gfn
, pfn
, ACC_ALL
, &r
))
2950 spin_lock(&vcpu
->kvm
->mmu_lock
);
2951 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
2953 make_mmu_pages_available(vcpu
);
2954 if (likely(!force_pt_level
))
2955 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2956 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2958 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2964 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2965 kvm_release_pfn_clean(pfn
);
2970 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2973 struct kvm_mmu_page
*sp
;
2974 LIST_HEAD(invalid_list
);
2976 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2979 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2980 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2981 vcpu
->arch
.mmu
.direct_map
)) {
2982 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2984 spin_lock(&vcpu
->kvm
->mmu_lock
);
2985 sp
= page_header(root
);
2987 if (!sp
->root_count
&& sp
->role
.invalid
) {
2988 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2989 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2991 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2992 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2996 spin_lock(&vcpu
->kvm
->mmu_lock
);
2997 for (i
= 0; i
< 4; ++i
) {
2998 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3001 root
&= PT64_BASE_ADDR_MASK
;
3002 sp
= page_header(root
);
3004 if (!sp
->root_count
&& sp
->role
.invalid
)
3005 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3008 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3010 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3011 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3012 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
3015 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
3019 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
3020 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3027 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
3029 struct kvm_mmu_page
*sp
;
3032 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3033 spin_lock(&vcpu
->kvm
->mmu_lock
);
3034 make_mmu_pages_available(vcpu
);
3035 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
3038 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3039 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
3040 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
3041 for (i
= 0; i
< 4; ++i
) {
3042 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3044 ASSERT(!VALID_PAGE(root
));
3045 spin_lock(&vcpu
->kvm
->mmu_lock
);
3046 make_mmu_pages_available(vcpu
);
3047 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
3049 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
3051 root
= __pa(sp
->spt
);
3053 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3054 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
3056 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3063 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
3065 struct kvm_mmu_page
*sp
;
3070 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
3072 if (mmu_check_root(vcpu
, root_gfn
))
3076 * Do we shadow a long mode page table? If so we need to
3077 * write-protect the guests page table root.
3079 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3080 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3082 ASSERT(!VALID_PAGE(root
));
3084 spin_lock(&vcpu
->kvm
->mmu_lock
);
3085 make_mmu_pages_available(vcpu
);
3086 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
3088 root
= __pa(sp
->spt
);
3090 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3091 vcpu
->arch
.mmu
.root_hpa
= root
;
3096 * We shadow a 32 bit page table. This may be a legacy 2-level
3097 * or a PAE 3-level page table. In either case we need to be aware that
3098 * the shadow page table may be a PAE or a long mode page table.
3100 pm_mask
= PT_PRESENT_MASK
;
3101 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
3102 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
3104 for (i
= 0; i
< 4; ++i
) {
3105 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3107 ASSERT(!VALID_PAGE(root
));
3108 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
3109 pdptr
= vcpu
->arch
.mmu
.get_pdptr(vcpu
, i
);
3110 if (!is_present_gpte(pdptr
)) {
3111 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
3114 root_gfn
= pdptr
>> PAGE_SHIFT
;
3115 if (mmu_check_root(vcpu
, root_gfn
))
3118 spin_lock(&vcpu
->kvm
->mmu_lock
);
3119 make_mmu_pages_available(vcpu
);
3120 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
3123 root
= __pa(sp
->spt
);
3125 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3127 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
3129 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
3132 * If we shadow a 32 bit page table with a long mode page
3133 * table we enter this path.
3135 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
3136 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
3138 * The additional page necessary for this is only
3139 * allocated on demand.
3144 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
3145 if (lm_root
== NULL
)
3148 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
3150 vcpu
->arch
.mmu
.lm_root
= lm_root
;
3153 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
3159 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
3161 if (vcpu
->arch
.mmu
.direct_map
)
3162 return mmu_alloc_direct_roots(vcpu
);
3164 return mmu_alloc_shadow_roots(vcpu
);
3167 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3170 struct kvm_mmu_page
*sp
;
3172 if (vcpu
->arch
.mmu
.direct_map
)
3175 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3178 vcpu_clear_mmio_info(vcpu
, ~0ul);
3179 kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
3180 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
3181 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
3182 sp
= page_header(root
);
3183 mmu_sync_children(vcpu
, sp
);
3184 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3187 for (i
= 0; i
< 4; ++i
) {
3188 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
3190 if (root
&& VALID_PAGE(root
)) {
3191 root
&= PT64_BASE_ADDR_MASK
;
3192 sp
= page_header(root
);
3193 mmu_sync_children(vcpu
, sp
);
3196 kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
3199 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
3201 spin_lock(&vcpu
->kvm
->mmu_lock
);
3202 mmu_sync_roots(vcpu
);
3203 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3206 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3207 u32 access
, struct x86_exception
*exception
)
3210 exception
->error_code
= 0;
3214 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
3216 struct x86_exception
*exception
)
3219 exception
->error_code
= 0;
3220 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
3223 static bool quickly_check_mmio_pf(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3226 return vcpu_match_mmio_gpa(vcpu
, addr
);
3228 return vcpu_match_mmio_gva(vcpu
, addr
);
3233 * On direct hosts, the last spte is only allows two states
3234 * for mmio page fault:
3235 * - It is the mmio spte
3236 * - It is zapped or it is being zapped.
3238 * This function completely checks the spte when the last spte
3239 * is not the mmio spte.
3241 static bool check_direct_spte_mmio_pf(u64 spte
)
3243 return __check_direct_spte_mmio_pf(spte
);
3246 static u64
walk_shadow_page_get_mmio_spte(struct kvm_vcpu
*vcpu
, u64 addr
)
3248 struct kvm_shadow_walk_iterator iterator
;
3251 walk_shadow_page_lockless_begin(vcpu
);
3252 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
)
3253 if (!is_shadow_present_pte(spte
))
3255 walk_shadow_page_lockless_end(vcpu
);
3260 int handle_mmio_page_fault_common(struct kvm_vcpu
*vcpu
, u64 addr
, bool direct
)
3264 if (quickly_check_mmio_pf(vcpu
, addr
, direct
))
3265 return RET_MMIO_PF_EMULATE
;
3267 spte
= walk_shadow_page_get_mmio_spte(vcpu
, addr
);
3269 if (is_mmio_spte(spte
)) {
3270 gfn_t gfn
= get_mmio_spte_gfn(spte
);
3271 unsigned access
= get_mmio_spte_access(spte
);
3273 if (!check_mmio_spte(vcpu
->kvm
, spte
))
3274 return RET_MMIO_PF_INVALID
;
3279 trace_handle_mmio_page_fault(addr
, gfn
, access
);
3280 vcpu_cache_mmio_info(vcpu
, addr
, gfn
, access
);
3281 return RET_MMIO_PF_EMULATE
;
3285 * It's ok if the gva is remapped by other cpus on shadow guest,
3286 * it's a BUG if the gfn is not a mmio page.
3288 if (direct
&& !check_direct_spte_mmio_pf(spte
))
3289 return RET_MMIO_PF_BUG
;
3292 * If the page table is zapped by other cpus, let CPU fault again on
3295 return RET_MMIO_PF_RETRY
;
3297 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common
);
3299 static int handle_mmio_page_fault(struct kvm_vcpu
*vcpu
, u64 addr
,
3300 u32 error_code
, bool direct
)
3304 ret
= handle_mmio_page_fault_common(vcpu
, addr
, direct
);
3305 WARN_ON(ret
== RET_MMIO_PF_BUG
);
3309 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
3310 u32 error_code
, bool prefault
)
3315 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
3317 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3318 r
= handle_mmio_page_fault(vcpu
, gva
, error_code
, true);
3320 if (likely(r
!= RET_MMIO_PF_INVALID
))
3324 r
= mmu_topup_memory_caches(vcpu
);
3329 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3331 gfn
= gva
>> PAGE_SHIFT
;
3333 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
3334 error_code
, gfn
, prefault
);
3337 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
3339 struct kvm_arch_async_pf arch
;
3341 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
3343 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
3344 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
3346 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
3349 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
3351 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
3352 kvm_event_needs_reinjection(vcpu
)))
3355 return kvm_x86_ops
->interrupt_allowed(vcpu
);
3358 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
3359 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
3363 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
3366 return false; /* *pfn has correct page already */
3368 if (!prefault
&& can_do_async_pf(vcpu
)) {
3369 trace_kvm_try_async_get_page(gva
, gfn
);
3370 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
3371 trace_kvm_async_pf_doublefault(gva
, gfn
);
3372 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
3374 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
3378 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
3383 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
3390 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3391 unsigned long mmu_seq
;
3392 int write
= error_code
& PFERR_WRITE_MASK
;
3396 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3398 if (unlikely(error_code
& PFERR_RSVD_MASK
)) {
3399 r
= handle_mmio_page_fault(vcpu
, gpa
, error_code
, true);
3401 if (likely(r
!= RET_MMIO_PF_INVALID
))
3405 r
= mmu_topup_memory_caches(vcpu
);
3409 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
3410 if (likely(!force_pt_level
)) {
3411 level
= mapping_level(vcpu
, gfn
);
3412 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
3414 level
= PT_PAGE_TABLE_LEVEL
;
3416 if (fast_page_fault(vcpu
, gpa
, level
, error_code
))
3419 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
3422 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
3425 if (handle_abnormal_pfn(vcpu
, 0, gfn
, pfn
, ACC_ALL
, &r
))
3428 spin_lock(&vcpu
->kvm
->mmu_lock
);
3429 if (mmu_notifier_retry(vcpu
->kvm
, mmu_seq
))
3431 make_mmu_pages_available(vcpu
);
3432 if (likely(!force_pt_level
))
3433 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
3434 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
3435 level
, gfn
, pfn
, prefault
);
3436 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3441 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3442 kvm_release_pfn_clean(pfn
);
3446 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
3448 mmu_free_roots(vcpu
);
3451 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
3452 struct kvm_mmu
*context
)
3454 context
->new_cr3
= nonpaging_new_cr3
;
3455 context
->page_fault
= nonpaging_page_fault
;
3456 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3457 context
->free
= nonpaging_free
;
3458 context
->sync_page
= nonpaging_sync_page
;
3459 context
->invlpg
= nonpaging_invlpg
;
3460 context
->update_pte
= nonpaging_update_pte
;
3461 context
->root_level
= 0;
3462 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3463 context
->root_hpa
= INVALID_PAGE
;
3464 context
->direct_map
= true;
3465 context
->nx
= false;
3469 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3471 ++vcpu
->stat
.tlb_flush
;
3472 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
3475 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
3477 pgprintk("%s: cr3 %lx\n", __func__
, kvm_read_cr3(vcpu
));
3478 mmu_free_roots(vcpu
);
3481 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
3483 return kvm_read_cr3(vcpu
);
3486 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
3487 struct x86_exception
*fault
)
3489 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
3492 static void paging_free(struct kvm_vcpu
*vcpu
)
3494 nonpaging_free(vcpu
);
3497 static inline void protect_clean_gpte(unsigned *access
, unsigned gpte
)
3501 BUILD_BUG_ON(PT_WRITABLE_MASK
!= ACC_WRITE_MASK
);
3503 mask
= (unsigned)~ACC_WRITE_MASK
;
3504 /* Allow write access to dirty gptes */
3505 mask
|= (gpte
>> (PT_DIRTY_SHIFT
- PT_WRITABLE_SHIFT
)) & PT_WRITABLE_MASK
;
3509 static bool sync_mmio_spte(struct kvm
*kvm
, u64
*sptep
, gfn_t gfn
,
3510 unsigned access
, int *nr_present
)
3512 if (unlikely(is_mmio_spte(*sptep
))) {
3513 if (gfn
!= get_mmio_spte_gfn(*sptep
)) {
3514 mmu_spte_clear_no_track(sptep
);
3519 mark_mmio_spte(kvm
, sptep
, gfn
, access
);
3526 static inline unsigned gpte_access(struct kvm_vcpu
*vcpu
, u64 gpte
)
3530 access
= (gpte
& (PT_WRITABLE_MASK
| PT_USER_MASK
)) | ACC_EXEC_MASK
;
3531 access
&= ~(gpte
>> PT64_NX_SHIFT
);
3536 static inline bool is_last_gpte(struct kvm_mmu
*mmu
, unsigned level
, unsigned gpte
)
3541 index
|= (gpte
& PT_PAGE_SIZE_MASK
) >> (PT_PAGE_SIZE_SHIFT
- 2);
3542 return mmu
->last_pte_bitmap
& (1 << index
);
3546 #include "paging_tmpl.h"
3550 #include "paging_tmpl.h"
3553 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
3554 struct kvm_mmu
*context
)
3556 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
3557 u64 exb_bit_rsvd
= 0;
3560 exb_bit_rsvd
= rsvd_bits(63, 63);
3561 switch (context
->root_level
) {
3562 case PT32_ROOT_LEVEL
:
3563 /* no rsvd bits for 2 level 4K page table entries */
3564 context
->rsvd_bits_mask
[0][1] = 0;
3565 context
->rsvd_bits_mask
[0][0] = 0;
3566 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3568 if (!is_pse(vcpu
)) {
3569 context
->rsvd_bits_mask
[1][1] = 0;
3573 if (is_cpuid_PSE36())
3574 /* 36bits PSE 4MB page */
3575 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
3577 /* 32 bits PSE 4MB page */
3578 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
3580 case PT32E_ROOT_LEVEL
:
3581 context
->rsvd_bits_mask
[0][2] =
3582 rsvd_bits(maxphyaddr
, 63) |
3583 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
3584 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3585 rsvd_bits(maxphyaddr
, 62); /* PDE */
3586 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3587 rsvd_bits(maxphyaddr
, 62); /* PTE */
3588 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3589 rsvd_bits(maxphyaddr
, 62) |
3590 rsvd_bits(13, 20); /* large page */
3591 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3593 case PT64_ROOT_LEVEL
:
3594 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
3595 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3596 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
3597 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
3598 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
3599 rsvd_bits(maxphyaddr
, 51);
3600 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
3601 rsvd_bits(maxphyaddr
, 51);
3602 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
3603 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
3604 rsvd_bits(maxphyaddr
, 51) |
3606 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
3607 rsvd_bits(maxphyaddr
, 51) |
3608 rsvd_bits(13, 20); /* large page */
3609 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
3614 static void update_permission_bitmask(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3616 unsigned bit
, byte
, pfec
;
3618 bool fault
, x
, w
, u
, wf
, uf
, ff
, smep
;
3620 smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3621 for (byte
= 0; byte
< ARRAY_SIZE(mmu
->permissions
); ++byte
) {
3624 wf
= pfec
& PFERR_WRITE_MASK
;
3625 uf
= pfec
& PFERR_USER_MASK
;
3626 ff
= pfec
& PFERR_FETCH_MASK
;
3627 for (bit
= 0; bit
< 8; ++bit
) {
3628 x
= bit
& ACC_EXEC_MASK
;
3629 w
= bit
& ACC_WRITE_MASK
;
3630 u
= bit
& ACC_USER_MASK
;
3632 /* Not really needed: !nx will cause pte.nx to fault */
3634 /* Allow supervisor writes if !cr0.wp */
3635 w
|= !is_write_protection(vcpu
) && !uf
;
3636 /* Disallow supervisor fetches of user code if cr4.smep */
3637 x
&= !(smep
&& u
&& !uf
);
3639 fault
= (ff
&& !x
) || (uf
&& !u
) || (wf
&& !w
);
3640 map
|= fault
<< bit
;
3642 mmu
->permissions
[byte
] = map
;
3646 static void update_last_pte_bitmap(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
)
3649 unsigned level
, root_level
= mmu
->root_level
;
3650 const unsigned ps_set_index
= 1 << 2; /* bit 2 of index: ps */
3652 if (root_level
== PT32E_ROOT_LEVEL
)
3654 /* PT_PAGE_TABLE_LEVEL always terminates */
3655 map
= 1 | (1 << ps_set_index
);
3656 for (level
= PT_DIRECTORY_LEVEL
; level
<= root_level
; ++level
) {
3657 if (level
<= PT_PDPE_LEVEL
3658 && (mmu
->root_level
>= PT32E_ROOT_LEVEL
|| is_pse(vcpu
)))
3659 map
|= 1 << (ps_set_index
| (level
- 1));
3661 mmu
->last_pte_bitmap
= map
;
3664 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
3665 struct kvm_mmu
*context
,
3668 context
->nx
= is_nx(vcpu
);
3669 context
->root_level
= level
;
3671 reset_rsvds_bits_mask(vcpu
, context
);
3672 update_permission_bitmask(vcpu
, context
);
3673 update_last_pte_bitmap(vcpu
, context
);
3675 ASSERT(is_pae(vcpu
));
3676 context
->new_cr3
= paging_new_cr3
;
3677 context
->page_fault
= paging64_page_fault
;
3678 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3679 context
->sync_page
= paging64_sync_page
;
3680 context
->invlpg
= paging64_invlpg
;
3681 context
->update_pte
= paging64_update_pte
;
3682 context
->free
= paging_free
;
3683 context
->shadow_root_level
= level
;
3684 context
->root_hpa
= INVALID_PAGE
;
3685 context
->direct_map
= false;
3689 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
3690 struct kvm_mmu
*context
)
3692 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
3695 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
3696 struct kvm_mmu
*context
)
3698 context
->nx
= false;
3699 context
->root_level
= PT32_ROOT_LEVEL
;
3701 reset_rsvds_bits_mask(vcpu
, context
);
3702 update_permission_bitmask(vcpu
, context
);
3703 update_last_pte_bitmap(vcpu
, context
);
3705 context
->new_cr3
= paging_new_cr3
;
3706 context
->page_fault
= paging32_page_fault
;
3707 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3708 context
->free
= paging_free
;
3709 context
->sync_page
= paging32_sync_page
;
3710 context
->invlpg
= paging32_invlpg
;
3711 context
->update_pte
= paging32_update_pte
;
3712 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
3713 context
->root_hpa
= INVALID_PAGE
;
3714 context
->direct_map
= false;
3718 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
3719 struct kvm_mmu
*context
)
3721 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
3724 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
3726 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
3728 context
->base_role
.word
= 0;
3729 context
->new_cr3
= nonpaging_new_cr3
;
3730 context
->page_fault
= tdp_page_fault
;
3731 context
->free
= nonpaging_free
;
3732 context
->sync_page
= nonpaging_sync_page
;
3733 context
->invlpg
= nonpaging_invlpg
;
3734 context
->update_pte
= nonpaging_update_pte
;
3735 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
3736 context
->root_hpa
= INVALID_PAGE
;
3737 context
->direct_map
= true;
3738 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
3739 context
->get_cr3
= get_cr3
;
3740 context
->get_pdptr
= kvm_pdptr_read
;
3741 context
->inject_page_fault
= kvm_inject_page_fault
;
3743 if (!is_paging(vcpu
)) {
3744 context
->nx
= false;
3745 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3746 context
->root_level
= 0;
3747 } else if (is_long_mode(vcpu
)) {
3748 context
->nx
= is_nx(vcpu
);
3749 context
->root_level
= PT64_ROOT_LEVEL
;
3750 reset_rsvds_bits_mask(vcpu
, context
);
3751 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3752 } else if (is_pae(vcpu
)) {
3753 context
->nx
= is_nx(vcpu
);
3754 context
->root_level
= PT32E_ROOT_LEVEL
;
3755 reset_rsvds_bits_mask(vcpu
, context
);
3756 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3758 context
->nx
= false;
3759 context
->root_level
= PT32_ROOT_LEVEL
;
3760 reset_rsvds_bits_mask(vcpu
, context
);
3761 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3764 update_permission_bitmask(vcpu
, context
);
3765 update_last_pte_bitmap(vcpu
, context
);
3770 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3773 bool smep
= kvm_read_cr4_bits(vcpu
, X86_CR4_SMEP
);
3775 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3777 if (!is_paging(vcpu
))
3778 r
= nonpaging_init_context(vcpu
, context
);
3779 else if (is_long_mode(vcpu
))
3780 r
= paging64_init_context(vcpu
, context
);
3781 else if (is_pae(vcpu
))
3782 r
= paging32E_init_context(vcpu
, context
);
3784 r
= paging32_init_context(vcpu
, context
);
3786 vcpu
->arch
.mmu
.base_role
.nxe
= is_nx(vcpu
);
3787 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3788 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3789 vcpu
->arch
.mmu
.base_role
.smep_andnot_wp
3790 = smep
&& !is_write_protection(vcpu
);
3794 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3796 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3798 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3800 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3801 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3802 vcpu
->arch
.walk_mmu
->get_pdptr
= kvm_pdptr_read
;
3803 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3808 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3810 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3812 g_context
->get_cr3
= get_cr3
;
3813 g_context
->get_pdptr
= kvm_pdptr_read
;
3814 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3817 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3818 * translation of l2_gpa to l1_gpa addresses is done using the
3819 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3820 * functions between mmu and nested_mmu are swapped.
3822 if (!is_paging(vcpu
)) {
3823 g_context
->nx
= false;
3824 g_context
->root_level
= 0;
3825 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3826 } else if (is_long_mode(vcpu
)) {
3827 g_context
->nx
= is_nx(vcpu
);
3828 g_context
->root_level
= PT64_ROOT_LEVEL
;
3829 reset_rsvds_bits_mask(vcpu
, g_context
);
3830 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3831 } else if (is_pae(vcpu
)) {
3832 g_context
->nx
= is_nx(vcpu
);
3833 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3834 reset_rsvds_bits_mask(vcpu
, g_context
);
3835 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3837 g_context
->nx
= false;
3838 g_context
->root_level
= PT32_ROOT_LEVEL
;
3839 reset_rsvds_bits_mask(vcpu
, g_context
);
3840 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3843 update_permission_bitmask(vcpu
, g_context
);
3844 update_last_pte_bitmap(vcpu
, g_context
);
3849 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3851 if (mmu_is_nested(vcpu
))
3852 return init_kvm_nested_mmu(vcpu
);
3853 else if (tdp_enabled
)
3854 return init_kvm_tdp_mmu(vcpu
);
3856 return init_kvm_softmmu(vcpu
);
3859 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
3862 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3863 /* mmu.free() should set root_hpa = INVALID_PAGE */
3864 vcpu
->arch
.mmu
.free(vcpu
);
3867 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3869 destroy_kvm_mmu(vcpu
);
3870 return init_kvm_mmu(vcpu
);
3872 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3874 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3878 r
= mmu_topup_memory_caches(vcpu
);
3881 r
= mmu_alloc_roots(vcpu
);
3882 kvm_mmu_sync_roots(vcpu
);
3885 /* set_cr3() should ensure TLB has been flushed */
3886 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3890 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3892 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3894 mmu_free_roots(vcpu
);
3896 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3898 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3899 struct kvm_mmu_page
*sp
, u64
*spte
,
3902 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3903 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3907 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3908 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
3911 static bool need_remote_flush(u64 old
, u64
new)
3913 if (!is_shadow_present_pte(old
))
3915 if (!is_shadow_present_pte(new))
3917 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3919 old
^= PT64_NX_MASK
;
3920 new ^= PT64_NX_MASK
;
3921 return (old
& ~new & PT64_PERM_MASK
) != 0;
3924 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3925 bool remote_flush
, bool local_flush
)
3931 kvm_flush_remote_tlbs(vcpu
->kvm
);
3932 else if (local_flush
)
3933 kvm_mmu_flush_tlb(vcpu
);
3936 static u64
mmu_pte_write_fetch_gpte(struct kvm_vcpu
*vcpu
, gpa_t
*gpa
,
3937 const u8
*new, int *bytes
)
3943 * Assume that the pte write on a page table of the same type
3944 * as the current vcpu paging mode since we update the sptes only
3945 * when they have the same mode.
3947 if (is_pae(vcpu
) && *bytes
== 4) {
3948 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3951 r
= kvm_read_guest(vcpu
->kvm
, *gpa
, &gentry
, 8);
3954 new = (const u8
*)&gentry
;
3959 gentry
= *(const u32
*)new;
3962 gentry
= *(const u64
*)new;
3973 * If we're seeing too many writes to a page, it may no longer be a page table,
3974 * or we may be forking, in which case it is better to unmap the page.
3976 static bool detect_write_flooding(struct kvm_mmu_page
*sp
)
3979 * Skip write-flooding detected for the sp whose level is 1, because
3980 * it can become unsync, then the guest page is not write-protected.
3982 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
)
3985 return ++sp
->write_flooding_count
>= 3;
3989 * Misaligned accesses are too much trouble to fix up; also, they usually
3990 * indicate a page is not used as a page table.
3992 static bool detect_write_misaligned(struct kvm_mmu_page
*sp
, gpa_t gpa
,
3995 unsigned offset
, pte_size
, misaligned
;
3997 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3998 gpa
, bytes
, sp
->role
.word
);
4000 offset
= offset_in_page(gpa
);
4001 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
4004 * Sometimes, the OS only writes the last one bytes to update status
4005 * bits, for example, in linux, andb instruction is used in clear_bit().
4007 if (!(offset
& (pte_size
- 1)) && bytes
== 1)
4010 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
4011 misaligned
|= bytes
< 4;
4016 static u64
*get_written_sptes(struct kvm_mmu_page
*sp
, gpa_t gpa
, int *nspte
)
4018 unsigned page_offset
, quadrant
;
4022 page_offset
= offset_in_page(gpa
);
4023 level
= sp
->role
.level
;
4025 if (!sp
->role
.cr4_pae
) {
4026 page_offset
<<= 1; /* 32->64 */
4028 * A 32-bit pde maps 4MB while the shadow pdes map
4029 * only 2MB. So we need to double the offset again
4030 * and zap two pdes instead of one.
4032 if (level
== PT32_ROOT_LEVEL
) {
4033 page_offset
&= ~7; /* kill rounding error */
4037 quadrant
= page_offset
>> PAGE_SHIFT
;
4038 page_offset
&= ~PAGE_MASK
;
4039 if (quadrant
!= sp
->role
.quadrant
)
4043 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
4047 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4048 const u8
*new, int bytes
)
4050 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
4051 union kvm_mmu_page_role mask
= { .word
= 0 };
4052 struct kvm_mmu_page
*sp
;
4053 LIST_HEAD(invalid_list
);
4054 u64 entry
, gentry
, *spte
;
4056 bool remote_flush
, local_flush
, zap_page
;
4059 * If we don't have indirect shadow pages, it means no page is
4060 * write-protected, so we can exit simply.
4062 if (!ACCESS_ONCE(vcpu
->kvm
->arch
.indirect_shadow_pages
))
4065 zap_page
= remote_flush
= local_flush
= false;
4067 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
4069 gentry
= mmu_pte_write_fetch_gpte(vcpu
, &gpa
, new, &bytes
);
4072 * No need to care whether allocation memory is successful
4073 * or not since pte prefetch is skiped if it does not have
4074 * enough objects in the cache.
4076 mmu_topup_memory_caches(vcpu
);
4078 spin_lock(&vcpu
->kvm
->mmu_lock
);
4079 ++vcpu
->kvm
->stat
.mmu_pte_write
;
4080 kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
4082 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
4083 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
) {
4084 if (detect_write_misaligned(sp
, gpa
, bytes
) ||
4085 detect_write_flooding(sp
)) {
4086 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
4088 ++vcpu
->kvm
->stat
.mmu_flooded
;
4092 spte
= get_written_sptes(sp
, gpa
, &npte
);
4099 mmu_page_zap_pte(vcpu
->kvm
, sp
, spte
);
4101 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
4102 & mask
.word
) && rmap_can_add(vcpu
))
4103 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
4104 if (need_remote_flush(entry
, *spte
))
4105 remote_flush
= true;
4109 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
4110 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4111 kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
4112 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4115 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
4120 if (vcpu
->arch
.mmu
.direct_map
)
4123 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
4125 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4129 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
4131 static void make_mmu_pages_available(struct kvm_vcpu
*vcpu
)
4133 LIST_HEAD(invalid_list
);
4135 if (likely(kvm_mmu_available_pages(vcpu
->kvm
) >= KVM_MIN_FREE_MMU_PAGES
))
4138 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
) {
4139 if (!prepare_zap_oldest_mmu_page(vcpu
->kvm
, &invalid_list
))
4142 ++vcpu
->kvm
->stat
.mmu_recycled
;
4144 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
4147 static bool is_mmio_page_fault(struct kvm_vcpu
*vcpu
, gva_t addr
)
4149 if (vcpu
->arch
.mmu
.direct_map
|| mmu_is_nested(vcpu
))
4150 return vcpu_match_mmio_gpa(vcpu
, addr
);
4152 return vcpu_match_mmio_gva(vcpu
, addr
);
4155 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
4156 void *insn
, int insn_len
)
4158 int r
, emulation_type
= EMULTYPE_RETRY
;
4159 enum emulation_result er
;
4161 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
4170 if (is_mmio_page_fault(vcpu
, cr2
))
4173 er
= x86_emulate_instruction(vcpu
, cr2
, emulation_type
, insn
, insn_len
);
4178 case EMULATE_DO_MMIO
:
4179 ++vcpu
->stat
.mmio_exits
;
4189 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
4191 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
4193 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
4194 kvm_mmu_flush_tlb(vcpu
);
4195 ++vcpu
->stat
.invlpg
;
4197 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
4199 void kvm_enable_tdp(void)
4203 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
4205 void kvm_disable_tdp(void)
4207 tdp_enabled
= false;
4209 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
4211 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
4213 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
4214 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
4215 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
4218 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
4226 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4227 * Therefore we need to allocate shadow page tables in the first
4228 * 4GB of memory, which happens to fit the DMA32 zone.
4230 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
4234 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
4235 for (i
= 0; i
< 4; ++i
)
4236 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
4241 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
4245 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
4246 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4247 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
4248 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
4250 return alloc_mmu_pages(vcpu
);
4253 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
4256 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
4258 return init_kvm_mmu(vcpu
);
4261 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
4263 struct kvm_memory_slot
*memslot
;
4267 memslot
= id_to_memslot(kvm
->memslots
, slot
);
4268 last_gfn
= memslot
->base_gfn
+ memslot
->npages
- 1;
4270 spin_lock(&kvm
->mmu_lock
);
4272 for (i
= PT_PAGE_TABLE_LEVEL
;
4273 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
4274 unsigned long *rmapp
;
4275 unsigned long last_index
, index
;
4277 rmapp
= memslot
->arch
.rmap
[i
- PT_PAGE_TABLE_LEVEL
];
4278 last_index
= gfn_to_index(last_gfn
, memslot
->base_gfn
, i
);
4280 for (index
= 0; index
<= last_index
; ++index
, ++rmapp
) {
4282 __rmap_write_protect(kvm
, rmapp
, false);
4284 if (need_resched() || spin_needbreak(&kvm
->mmu_lock
)) {
4285 kvm_flush_remote_tlbs(kvm
);
4286 cond_resched_lock(&kvm
->mmu_lock
);
4291 kvm_flush_remote_tlbs(kvm
);
4292 spin_unlock(&kvm
->mmu_lock
);
4295 #define BATCH_ZAP_PAGES 10
4296 static void kvm_zap_obsolete_pages(struct kvm
*kvm
)
4298 struct kvm_mmu_page
*sp
, *node
;
4302 list_for_each_entry_safe_reverse(sp
, node
,
4303 &kvm
->arch
.active_mmu_pages
, link
) {
4307 * No obsolete page exists before new created page since
4308 * active_mmu_pages is the FIFO list.
4310 if (!is_obsolete_sp(kvm
, sp
))
4314 * Since we are reversely walking the list and the invalid
4315 * list will be moved to the head, skip the invalid page
4316 * can help us to avoid the infinity list walking.
4318 if (sp
->role
.invalid
)
4322 * Need not flush tlb since we only zap the sp with invalid
4323 * generation number.
4325 if (batch
>= BATCH_ZAP_PAGES
&&
4326 cond_resched_lock(&kvm
->mmu_lock
)) {
4331 ret
= kvm_mmu_prepare_zap_page(kvm
, sp
,
4332 &kvm
->arch
.zapped_obsolete_pages
);
4340 * Should flush tlb before free page tables since lockless-walking
4341 * may use the pages.
4343 kvm_mmu_commit_zap_page(kvm
, &kvm
->arch
.zapped_obsolete_pages
);
4347 * Fast invalidate all shadow pages and use lock-break technique
4348 * to zap obsolete pages.
4350 * It's required when memslot is being deleted or VM is being
4351 * destroyed, in these cases, we should ensure that KVM MMU does
4352 * not use any resource of the being-deleted slot or all slots
4353 * after calling the function.
4355 void kvm_mmu_invalidate_zap_all_pages(struct kvm
*kvm
)
4357 spin_lock(&kvm
->mmu_lock
);
4358 trace_kvm_mmu_invalidate_zap_all_pages(kvm
);
4359 kvm
->arch
.mmu_valid_gen
++;
4362 * Notify all vcpus to reload its shadow page table
4363 * and flush TLB. Then all vcpus will switch to new
4364 * shadow page table with the new mmu_valid_gen.
4366 * Note: we should do this under the protection of
4367 * mmu-lock, otherwise, vcpu would purge shadow page
4368 * but miss tlb flush.
4370 kvm_reload_remote_mmus(kvm
);
4372 kvm_zap_obsolete_pages(kvm
);
4373 spin_unlock(&kvm
->mmu_lock
);
4376 static bool kvm_has_zapped_obsolete_pages(struct kvm
*kvm
)
4378 return unlikely(!list_empty_careful(&kvm
->arch
.zapped_obsolete_pages
));
4381 void kvm_mmu_invalidate_mmio_sptes(struct kvm
*kvm
)
4384 * The very rare case: if the generation-number is round,
4385 * zap all shadow pages.
4387 * The max value is MMIO_MAX_GEN - 1 since it is not called
4388 * when mark memslot invalid.
4390 if (unlikely(kvm_current_mmio_generation(kvm
) >= (MMIO_MAX_GEN
- 1))) {
4391 printk_ratelimited(KERN_INFO
"kvm: zapping shadow pages for mmio generation wraparound\n");
4392 kvm_mmu_invalidate_zap_all_pages(kvm
);
4396 static int mmu_shrink(struct shrinker
*shrink
, struct shrink_control
*sc
)
4399 int nr_to_scan
= sc
->nr_to_scan
;
4401 if (nr_to_scan
== 0)
4404 raw_spin_lock(&kvm_lock
);
4406 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4408 LIST_HEAD(invalid_list
);
4411 * Never scan more than sc->nr_to_scan VM instances.
4412 * Will not hit this condition practically since we do not try
4413 * to shrink more than one VM and it is very unlikely to see
4414 * !n_used_mmu_pages so many times.
4419 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4420 * here. We may skip a VM instance errorneosly, but we do not
4421 * want to shrink a VM that only started to populate its MMU
4424 if (!kvm
->arch
.n_used_mmu_pages
&&
4425 !kvm_has_zapped_obsolete_pages(kvm
))
4428 idx
= srcu_read_lock(&kvm
->srcu
);
4429 spin_lock(&kvm
->mmu_lock
);
4431 if (kvm_has_zapped_obsolete_pages(kvm
)) {
4432 kvm_mmu_commit_zap_page(kvm
,
4433 &kvm
->arch
.zapped_obsolete_pages
);
4437 prepare_zap_oldest_mmu_page(kvm
, &invalid_list
);
4438 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
4441 spin_unlock(&kvm
->mmu_lock
);
4442 srcu_read_unlock(&kvm
->srcu
, idx
);
4444 list_move_tail(&kvm
->vm_list
, &vm_list
);
4448 raw_spin_unlock(&kvm_lock
);
4451 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
4454 static struct shrinker mmu_shrinker
= {
4455 .shrink
= mmu_shrink
,
4456 .seeks
= DEFAULT_SEEKS
* 10,
4459 static void mmu_destroy_caches(void)
4461 if (pte_list_desc_cache
)
4462 kmem_cache_destroy(pte_list_desc_cache
);
4463 if (mmu_page_header_cache
)
4464 kmem_cache_destroy(mmu_page_header_cache
);
4467 int kvm_mmu_module_init(void)
4469 pte_list_desc_cache
= kmem_cache_create("pte_list_desc",
4470 sizeof(struct pte_list_desc
),
4472 if (!pte_list_desc_cache
)
4475 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
4476 sizeof(struct kvm_mmu_page
),
4478 if (!mmu_page_header_cache
)
4481 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
4484 register_shrinker(&mmu_shrinker
);
4489 mmu_destroy_caches();
4494 * Caculate mmu pages needed for kvm.
4496 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
4498 unsigned int nr_mmu_pages
;
4499 unsigned int nr_pages
= 0;
4500 struct kvm_memslots
*slots
;
4501 struct kvm_memory_slot
*memslot
;
4503 slots
= kvm_memslots(kvm
);
4505 kvm_for_each_memslot(memslot
, slots
)
4506 nr_pages
+= memslot
->npages
;
4508 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
4509 nr_mmu_pages
= max(nr_mmu_pages
,
4510 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
4512 return nr_mmu_pages
;
4515 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
4517 struct kvm_shadow_walk_iterator iterator
;
4521 walk_shadow_page_lockless_begin(vcpu
);
4522 for_each_shadow_entry_lockless(vcpu
, addr
, iterator
, spte
) {
4523 sptes
[iterator
.level
-1] = spte
;
4525 if (!is_shadow_present_pte(spte
))
4528 walk_shadow_page_lockless_end(vcpu
);
4532 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
4534 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
4538 destroy_kvm_mmu(vcpu
);
4539 free_mmu_pages(vcpu
);
4540 mmu_free_memory_caches(vcpu
);
4543 void kvm_mmu_module_exit(void)
4545 mmu_destroy_caches();
4546 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
4547 unregister_shrinker(&mmu_shrinker
);
4548 mmu_audit_disable();