2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
26 #include <linux/kvm_host.h>
27 #include <linux/types.h>
28 #include <linux/string.h>
30 #include <linux/highmem.h>
31 #include <linux/module.h>
32 #include <linux/swap.h>
33 #include <linux/hugetlb.h>
34 #include <linux/compiler.h>
35 #include <linux/srcu.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
40 #include <asm/cmpxchg.h>
45 * When setting this variable to true it enables Two-Dimensional-Paging
46 * where the hardware walks 2 page tables:
47 * 1. the guest-virtual to guest-physical
48 * 2. while doing 1. it walks guest-physical to host-physical
49 * If the hardware supports that we don't need to do shadow paging.
51 bool tdp_enabled
= false;
55 AUDIT_POST_PAGE_FAULT
,
62 char *audit_point_name
[] = {
75 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
76 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
80 #define pgprintk(x...) do { } while (0)
81 #define rmap_printk(x...) do { } while (0)
87 module_param(dbg
, bool, 0644);
90 static int oos_shadow
= 1;
91 module_param(oos_shadow
, bool, 0644);
94 #define ASSERT(x) do { } while (0)
98 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
99 __FILE__, __LINE__, #x); \
103 #define PTE_PREFETCH_NUM 8
105 #define PT_FIRST_AVAIL_BITS_SHIFT 9
106 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
108 #define PT64_LEVEL_BITS 9
110 #define PT64_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
113 #define PT64_INDEX(address, level)\
114 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
117 #define PT32_LEVEL_BITS 10
119 #define PT32_LEVEL_SHIFT(level) \
120 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
122 #define PT32_LVL_OFFSET_MASK(level) \
123 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
124 * PT32_LEVEL_BITS))) - 1))
126 #define PT32_INDEX(address, level)\
127 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
130 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
131 #define PT64_DIR_BASE_ADDR_MASK \
132 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
133 #define PT64_LVL_ADDR_MASK(level) \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
135 * PT64_LEVEL_BITS))) - 1))
136 #define PT64_LVL_OFFSET_MASK(level) \
137 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
138 * PT64_LEVEL_BITS))) - 1))
140 #define PT32_BASE_ADDR_MASK PAGE_MASK
141 #define PT32_DIR_BASE_ADDR_MASK \
142 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
143 #define PT32_LVL_ADDR_MASK(level) \
144 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
145 * PT32_LEVEL_BITS))) - 1))
147 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
152 #define ACC_EXEC_MASK 1
153 #define ACC_WRITE_MASK PT_WRITABLE_MASK
154 #define ACC_USER_MASK PT_USER_MASK
155 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
157 #include <trace/events/kvm.h>
159 #define CREATE_TRACE_POINTS
160 #include "mmutrace.h"
162 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
164 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
166 struct kvm_rmap_desc
{
167 u64
*sptes
[RMAP_EXT
];
168 struct kvm_rmap_desc
*more
;
171 struct kvm_shadow_walk_iterator
{
179 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
180 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
181 shadow_walk_okay(&(_walker)); \
182 shadow_walk_next(&(_walker)))
184 typedef void (*mmu_parent_walk_fn
) (struct kvm_mmu_page
*sp
, u64
*spte
);
186 static struct kmem_cache
*pte_chain_cache
;
187 static struct kmem_cache
*rmap_desc_cache
;
188 static struct kmem_cache
*mmu_page_header_cache
;
189 static struct percpu_counter kvm_total_used_mmu_pages
;
191 static u64 __read_mostly shadow_trap_nonpresent_pte
;
192 static u64 __read_mostly shadow_notrap_nonpresent_pte
;
193 static u64 __read_mostly shadow_nx_mask
;
194 static u64 __read_mostly shadow_x_mask
; /* mutual exclusive with nx_mask */
195 static u64 __read_mostly shadow_user_mask
;
196 static u64 __read_mostly shadow_accessed_mask
;
197 static u64 __read_mostly shadow_dirty_mask
;
199 static inline u64
rsvd_bits(int s
, int e
)
201 return ((1ULL << (e
- s
+ 1)) - 1) << s
;
204 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte
, u64 notrap_pte
)
206 shadow_trap_nonpresent_pte
= trap_pte
;
207 shadow_notrap_nonpresent_pte
= notrap_pte
;
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes
);
211 void kvm_mmu_set_mask_ptes(u64 user_mask
, u64 accessed_mask
,
212 u64 dirty_mask
, u64 nx_mask
, u64 x_mask
)
214 shadow_user_mask
= user_mask
;
215 shadow_accessed_mask
= accessed_mask
;
216 shadow_dirty_mask
= dirty_mask
;
217 shadow_nx_mask
= nx_mask
;
218 shadow_x_mask
= x_mask
;
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes
);
222 static bool is_write_protection(struct kvm_vcpu
*vcpu
)
224 return kvm_read_cr0_bits(vcpu
, X86_CR0_WP
);
227 static int is_cpuid_PSE36(void)
232 static int is_nx(struct kvm_vcpu
*vcpu
)
234 return vcpu
->arch
.efer
& EFER_NX
;
237 static int is_shadow_present_pte(u64 pte
)
239 return pte
!= shadow_trap_nonpresent_pte
240 && pte
!= shadow_notrap_nonpresent_pte
;
243 static int is_large_pte(u64 pte
)
245 return pte
& PT_PAGE_SIZE_MASK
;
248 static int is_writable_pte(unsigned long pte
)
250 return pte
& PT_WRITABLE_MASK
;
253 static int is_dirty_gpte(unsigned long pte
)
255 return pte
& PT_DIRTY_MASK
;
258 static int is_rmap_spte(u64 pte
)
260 return is_shadow_present_pte(pte
);
263 static int is_last_spte(u64 pte
, int level
)
265 if (level
== PT_PAGE_TABLE_LEVEL
)
267 if (is_large_pte(pte
))
272 static pfn_t
spte_to_pfn(u64 pte
)
274 return (pte
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
277 static gfn_t
pse36_gfn_delta(u32 gpte
)
279 int shift
= 32 - PT32_DIR_PSE36_SHIFT
- PAGE_SHIFT
;
281 return (gpte
& PT32_DIR_PSE36_MASK
) << shift
;
284 static void __set_spte(u64
*sptep
, u64 spte
)
286 set_64bit(sptep
, spte
);
289 static u64
__xchg_spte(u64
*sptep
, u64 new_spte
)
292 return xchg(sptep
, new_spte
);
298 } while (cmpxchg64(sptep
, old_spte
, new_spte
) != old_spte
);
304 static bool spte_has_volatile_bits(u64 spte
)
306 if (!shadow_accessed_mask
)
309 if (!is_shadow_present_pte(spte
))
312 if ((spte
& shadow_accessed_mask
) &&
313 (!is_writable_pte(spte
) || (spte
& shadow_dirty_mask
)))
319 static bool spte_is_bit_cleared(u64 old_spte
, u64 new_spte
, u64 bit_mask
)
321 return (old_spte
& bit_mask
) && !(new_spte
& bit_mask
);
324 static void update_spte(u64
*sptep
, u64 new_spte
)
326 u64 mask
, old_spte
= *sptep
;
328 WARN_ON(!is_rmap_spte(new_spte
));
330 new_spte
|= old_spte
& shadow_dirty_mask
;
332 mask
= shadow_accessed_mask
;
333 if (is_writable_pte(old_spte
))
334 mask
|= shadow_dirty_mask
;
336 if (!spte_has_volatile_bits(old_spte
) || (new_spte
& mask
) == mask
)
337 __set_spte(sptep
, new_spte
);
339 old_spte
= __xchg_spte(sptep
, new_spte
);
341 if (!shadow_accessed_mask
)
344 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_accessed_mask
))
345 kvm_set_pfn_accessed(spte_to_pfn(old_spte
));
346 if (spte_is_bit_cleared(old_spte
, new_spte
, shadow_dirty_mask
))
347 kvm_set_pfn_dirty(spte_to_pfn(old_spte
));
350 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache
*cache
,
351 struct kmem_cache
*base_cache
, int min
)
355 if (cache
->nobjs
>= min
)
357 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
358 obj
= kmem_cache_zalloc(base_cache
, GFP_KERNEL
);
361 cache
->objects
[cache
->nobjs
++] = obj
;
366 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache
*mc
,
367 struct kmem_cache
*cache
)
370 kmem_cache_free(cache
, mc
->objects
[--mc
->nobjs
]);
373 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache
*cache
,
378 if (cache
->nobjs
>= min
)
380 while (cache
->nobjs
< ARRAY_SIZE(cache
->objects
)) {
381 page
= (void *)__get_free_page(GFP_KERNEL
);
384 cache
->objects
[cache
->nobjs
++] = page
;
389 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache
*mc
)
392 free_page((unsigned long)mc
->objects
[--mc
->nobjs
]);
395 static int mmu_topup_memory_caches(struct kvm_vcpu
*vcpu
)
399 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
,
403 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_rmap_desc_cache
,
404 rmap_desc_cache
, 4 + PTE_PREFETCH_NUM
);
407 r
= mmu_topup_memory_cache_page(&vcpu
->arch
.mmu_page_cache
, 8);
410 r
= mmu_topup_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
411 mmu_page_header_cache
, 4);
416 static void mmu_free_memory_caches(struct kvm_vcpu
*vcpu
)
418 mmu_free_memory_cache(&vcpu
->arch
.mmu_pte_chain_cache
, pte_chain_cache
);
419 mmu_free_memory_cache(&vcpu
->arch
.mmu_rmap_desc_cache
, rmap_desc_cache
);
420 mmu_free_memory_cache_page(&vcpu
->arch
.mmu_page_cache
);
421 mmu_free_memory_cache(&vcpu
->arch
.mmu_page_header_cache
,
422 mmu_page_header_cache
);
425 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache
*mc
,
431 p
= mc
->objects
[--mc
->nobjs
];
435 static struct kvm_pte_chain
*mmu_alloc_pte_chain(struct kvm_vcpu
*vcpu
)
437 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_pte_chain_cache
,
438 sizeof(struct kvm_pte_chain
));
441 static void mmu_free_pte_chain(struct kvm_pte_chain
*pc
)
443 kmem_cache_free(pte_chain_cache
, pc
);
446 static struct kvm_rmap_desc
*mmu_alloc_rmap_desc(struct kvm_vcpu
*vcpu
)
448 return mmu_memory_cache_alloc(&vcpu
->arch
.mmu_rmap_desc_cache
,
449 sizeof(struct kvm_rmap_desc
));
452 static void mmu_free_rmap_desc(struct kvm_rmap_desc
*rd
)
454 kmem_cache_free(rmap_desc_cache
, rd
);
457 static gfn_t
kvm_mmu_page_get_gfn(struct kvm_mmu_page
*sp
, int index
)
459 if (!sp
->role
.direct
)
460 return sp
->gfns
[index
];
462 return sp
->gfn
+ (index
<< ((sp
->role
.level
- 1) * PT64_LEVEL_BITS
));
465 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page
*sp
, int index
, gfn_t gfn
)
468 BUG_ON(gfn
!= kvm_mmu_page_get_gfn(sp
, index
));
470 sp
->gfns
[index
] = gfn
;
474 * Return the pointer to the large page information for a given gfn,
475 * handling slots that are not large page aligned.
477 static struct kvm_lpage_info
*lpage_info_slot(gfn_t gfn
,
478 struct kvm_memory_slot
*slot
,
483 idx
= (gfn
>> KVM_HPAGE_GFN_SHIFT(level
)) -
484 (slot
->base_gfn
>> KVM_HPAGE_GFN_SHIFT(level
));
485 return &slot
->lpage_info
[level
- 2][idx
];
488 static void account_shadowed(struct kvm
*kvm
, gfn_t gfn
)
490 struct kvm_memory_slot
*slot
;
491 struct kvm_lpage_info
*linfo
;
494 slot
= gfn_to_memslot(kvm
, gfn
);
495 for (i
= PT_DIRECTORY_LEVEL
;
496 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
497 linfo
= lpage_info_slot(gfn
, slot
, i
);
498 linfo
->write_count
+= 1;
502 static void unaccount_shadowed(struct kvm
*kvm
, gfn_t gfn
)
504 struct kvm_memory_slot
*slot
;
505 struct kvm_lpage_info
*linfo
;
508 slot
= gfn_to_memslot(kvm
, gfn
);
509 for (i
= PT_DIRECTORY_LEVEL
;
510 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
511 linfo
= lpage_info_slot(gfn
, slot
, i
);
512 linfo
->write_count
-= 1;
513 WARN_ON(linfo
->write_count
< 0);
517 static int has_wrprotected_page(struct kvm
*kvm
,
521 struct kvm_memory_slot
*slot
;
522 struct kvm_lpage_info
*linfo
;
524 slot
= gfn_to_memslot(kvm
, gfn
);
526 linfo
= lpage_info_slot(gfn
, slot
, level
);
527 return linfo
->write_count
;
533 static int host_mapping_level(struct kvm
*kvm
, gfn_t gfn
)
535 unsigned long page_size
;
538 page_size
= kvm_host_page_size(kvm
, gfn
);
540 for (i
= PT_PAGE_TABLE_LEVEL
;
541 i
< (PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
); ++i
) {
542 if (page_size
>= KVM_HPAGE_SIZE(i
))
551 static struct kvm_memory_slot
*
552 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
555 struct kvm_memory_slot
*slot
;
557 slot
= gfn_to_memslot(vcpu
->kvm
, gfn
);
558 if (!slot
|| slot
->flags
& KVM_MEMSLOT_INVALID
||
559 (no_dirty_log
&& slot
->dirty_bitmap
))
565 static bool mapping_level_dirty_bitmap(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
567 return !gfn_to_memslot_dirty_bitmap(vcpu
, large_gfn
, true);
570 static int mapping_level(struct kvm_vcpu
*vcpu
, gfn_t large_gfn
)
572 int host_level
, level
, max_level
;
574 host_level
= host_mapping_level(vcpu
->kvm
, large_gfn
);
576 if (host_level
== PT_PAGE_TABLE_LEVEL
)
579 max_level
= kvm_x86_ops
->get_lpage_level() < host_level
?
580 kvm_x86_ops
->get_lpage_level() : host_level
;
582 for (level
= PT_DIRECTORY_LEVEL
; level
<= max_level
; ++level
)
583 if (has_wrprotected_page(vcpu
->kvm
, large_gfn
, level
))
590 * Take gfn and return the reverse mapping to it.
593 static unsigned long *gfn_to_rmap(struct kvm
*kvm
, gfn_t gfn
, int level
)
595 struct kvm_memory_slot
*slot
;
596 struct kvm_lpage_info
*linfo
;
598 slot
= gfn_to_memslot(kvm
, gfn
);
599 if (likely(level
== PT_PAGE_TABLE_LEVEL
))
600 return &slot
->rmap
[gfn
- slot
->base_gfn
];
602 linfo
= lpage_info_slot(gfn
, slot
, level
);
604 return &linfo
->rmap_pde
;
608 * Reverse mapping data structures:
610 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
611 * that points to page_address(page).
613 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
614 * containing more mappings.
616 * Returns the number of rmap entries before the spte was added or zero if
617 * the spte was not added.
620 static int rmap_add(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
622 struct kvm_mmu_page
*sp
;
623 struct kvm_rmap_desc
*desc
;
624 unsigned long *rmapp
;
627 if (!is_rmap_spte(*spte
))
629 sp
= page_header(__pa(spte
));
630 kvm_mmu_page_set_gfn(sp
, spte
- sp
->spt
, gfn
);
631 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
633 rmap_printk("rmap_add: %p %llx 0->1\n", spte
, *spte
);
634 *rmapp
= (unsigned long)spte
;
635 } else if (!(*rmapp
& 1)) {
636 rmap_printk("rmap_add: %p %llx 1->many\n", spte
, *spte
);
637 desc
= mmu_alloc_rmap_desc(vcpu
);
638 desc
->sptes
[0] = (u64
*)*rmapp
;
639 desc
->sptes
[1] = spte
;
640 *rmapp
= (unsigned long)desc
| 1;
643 rmap_printk("rmap_add: %p %llx many->many\n", spte
, *spte
);
644 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
645 while (desc
->sptes
[RMAP_EXT
-1] && desc
->more
) {
649 if (desc
->sptes
[RMAP_EXT
-1]) {
650 desc
->more
= mmu_alloc_rmap_desc(vcpu
);
653 for (i
= 0; desc
->sptes
[i
]; ++i
)
655 desc
->sptes
[i
] = spte
;
660 static void rmap_desc_remove_entry(unsigned long *rmapp
,
661 struct kvm_rmap_desc
*desc
,
663 struct kvm_rmap_desc
*prev_desc
)
667 for (j
= RMAP_EXT
- 1; !desc
->sptes
[j
] && j
> i
; --j
)
669 desc
->sptes
[i
] = desc
->sptes
[j
];
670 desc
->sptes
[j
] = NULL
;
673 if (!prev_desc
&& !desc
->more
)
674 *rmapp
= (unsigned long)desc
->sptes
[0];
677 prev_desc
->more
= desc
->more
;
679 *rmapp
= (unsigned long)desc
->more
| 1;
680 mmu_free_rmap_desc(desc
);
683 static void rmap_remove(struct kvm
*kvm
, u64
*spte
)
685 struct kvm_rmap_desc
*desc
;
686 struct kvm_rmap_desc
*prev_desc
;
687 struct kvm_mmu_page
*sp
;
689 unsigned long *rmapp
;
692 sp
= page_header(__pa(spte
));
693 gfn
= kvm_mmu_page_get_gfn(sp
, spte
- sp
->spt
);
694 rmapp
= gfn_to_rmap(kvm
, gfn
, sp
->role
.level
);
696 printk(KERN_ERR
"rmap_remove: %p 0->BUG\n", spte
);
698 } else if (!(*rmapp
& 1)) {
699 rmap_printk("rmap_remove: %p 1->0\n", spte
);
700 if ((u64
*)*rmapp
!= spte
) {
701 printk(KERN_ERR
"rmap_remove: %p 1->BUG\n", spte
);
706 rmap_printk("rmap_remove: %p many->many\n", spte
);
707 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
710 for (i
= 0; i
< RMAP_EXT
&& desc
->sptes
[i
]; ++i
)
711 if (desc
->sptes
[i
] == spte
) {
712 rmap_desc_remove_entry(rmapp
,
720 pr_err("rmap_remove: %p many->many\n", spte
);
725 static int set_spte_track_bits(u64
*sptep
, u64 new_spte
)
728 u64 old_spte
= *sptep
;
730 if (!spte_has_volatile_bits(old_spte
))
731 __set_spte(sptep
, new_spte
);
733 old_spte
= __xchg_spte(sptep
, new_spte
);
735 if (!is_rmap_spte(old_spte
))
738 pfn
= spte_to_pfn(old_spte
);
739 if (!shadow_accessed_mask
|| old_spte
& shadow_accessed_mask
)
740 kvm_set_pfn_accessed(pfn
);
741 if (!shadow_dirty_mask
|| (old_spte
& shadow_dirty_mask
))
742 kvm_set_pfn_dirty(pfn
);
746 static void drop_spte(struct kvm
*kvm
, u64
*sptep
, u64 new_spte
)
748 if (set_spte_track_bits(sptep
, new_spte
))
749 rmap_remove(kvm
, sptep
);
752 static u64
*rmap_next(struct kvm
*kvm
, unsigned long *rmapp
, u64
*spte
)
754 struct kvm_rmap_desc
*desc
;
760 else if (!(*rmapp
& 1)) {
762 return (u64
*)*rmapp
;
765 desc
= (struct kvm_rmap_desc
*)(*rmapp
& ~1ul);
768 for (i
= 0; i
< RMAP_EXT
&& desc
->sptes
[i
]; ++i
) {
769 if (prev_spte
== spte
)
770 return desc
->sptes
[i
];
771 prev_spte
= desc
->sptes
[i
];
778 static int rmap_write_protect(struct kvm
*kvm
, u64 gfn
)
780 unsigned long *rmapp
;
782 int i
, write_protected
= 0;
784 rmapp
= gfn_to_rmap(kvm
, gfn
, PT_PAGE_TABLE_LEVEL
);
786 spte
= rmap_next(kvm
, rmapp
, NULL
);
789 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
790 rmap_printk("rmap_write_protect: spte %p %llx\n", spte
, *spte
);
791 if (is_writable_pte(*spte
)) {
792 update_spte(spte
, *spte
& ~PT_WRITABLE_MASK
);
795 spte
= rmap_next(kvm
, rmapp
, spte
);
798 /* check for huge page mappings */
799 for (i
= PT_DIRECTORY_LEVEL
;
800 i
< PT_PAGE_TABLE_LEVEL
+ KVM_NR_PAGE_SIZES
; ++i
) {
801 rmapp
= gfn_to_rmap(kvm
, gfn
, i
);
802 spte
= rmap_next(kvm
, rmapp
, NULL
);
805 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
806 BUG_ON((*spte
& (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
)) != (PT_PAGE_SIZE_MASK
|PT_PRESENT_MASK
));
807 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte
, *spte
, gfn
);
808 if (is_writable_pte(*spte
)) {
810 shadow_trap_nonpresent_pte
);
815 spte
= rmap_next(kvm
, rmapp
, spte
);
819 return write_protected
;
822 static int kvm_unmap_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
826 int need_tlb_flush
= 0;
828 while ((spte
= rmap_next(kvm
, rmapp
, NULL
))) {
829 BUG_ON(!(*spte
& PT_PRESENT_MASK
));
830 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte
, *spte
);
831 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
834 return need_tlb_flush
;
837 static int kvm_set_pte_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
842 pte_t
*ptep
= (pte_t
*)data
;
845 WARN_ON(pte_huge(*ptep
));
846 new_pfn
= pte_pfn(*ptep
);
847 spte
= rmap_next(kvm
, rmapp
, NULL
);
849 BUG_ON(!is_shadow_present_pte(*spte
));
850 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte
, *spte
);
852 if (pte_write(*ptep
)) {
853 drop_spte(kvm
, spte
, shadow_trap_nonpresent_pte
);
854 spte
= rmap_next(kvm
, rmapp
, NULL
);
856 new_spte
= *spte
&~ (PT64_BASE_ADDR_MASK
);
857 new_spte
|= (u64
)new_pfn
<< PAGE_SHIFT
;
859 new_spte
&= ~PT_WRITABLE_MASK
;
860 new_spte
&= ~SPTE_HOST_WRITEABLE
;
861 new_spte
&= ~shadow_accessed_mask
;
862 set_spte_track_bits(spte
, new_spte
);
863 spte
= rmap_next(kvm
, rmapp
, spte
);
867 kvm_flush_remote_tlbs(kvm
);
872 static int kvm_handle_hva(struct kvm
*kvm
, unsigned long hva
,
874 int (*handler
)(struct kvm
*kvm
, unsigned long *rmapp
,
880 struct kvm_memslots
*slots
;
882 slots
= kvm_memslots(kvm
);
884 for (i
= 0; i
< slots
->nmemslots
; i
++) {
885 struct kvm_memory_slot
*memslot
= &slots
->memslots
[i
];
886 unsigned long start
= memslot
->userspace_addr
;
889 end
= start
+ (memslot
->npages
<< PAGE_SHIFT
);
890 if (hva
>= start
&& hva
< end
) {
891 gfn_t gfn_offset
= (hva
- start
) >> PAGE_SHIFT
;
892 gfn_t gfn
= memslot
->base_gfn
+ gfn_offset
;
894 ret
= handler(kvm
, &memslot
->rmap
[gfn_offset
], data
);
896 for (j
= 0; j
< KVM_NR_PAGE_SIZES
- 1; ++j
) {
897 struct kvm_lpage_info
*linfo
;
899 linfo
= lpage_info_slot(gfn
, memslot
,
900 PT_DIRECTORY_LEVEL
+ j
);
901 ret
|= handler(kvm
, &linfo
->rmap_pde
, data
);
903 trace_kvm_age_page(hva
, memslot
, ret
);
911 int kvm_unmap_hva(struct kvm
*kvm
, unsigned long hva
)
913 return kvm_handle_hva(kvm
, hva
, 0, kvm_unmap_rmapp
);
916 void kvm_set_spte_hva(struct kvm
*kvm
, unsigned long hva
, pte_t pte
)
918 kvm_handle_hva(kvm
, hva
, (unsigned long)&pte
, kvm_set_pte_rmapp
);
921 static int kvm_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
928 * Emulate the accessed bit for EPT, by checking if this page has
929 * an EPT mapping, and clearing it if it does. On the next access,
930 * a new EPT mapping will be established.
931 * This has some overhead, but not as much as the cost of swapping
932 * out actively used pages or breaking up actively used hugepages.
934 if (!shadow_accessed_mask
)
935 return kvm_unmap_rmapp(kvm
, rmapp
, data
);
937 spte
= rmap_next(kvm
, rmapp
, NULL
);
941 BUG_ON(!(_spte
& PT_PRESENT_MASK
));
942 _young
= _spte
& PT_ACCESSED_MASK
;
945 clear_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
947 spte
= rmap_next(kvm
, rmapp
, spte
);
952 static int kvm_test_age_rmapp(struct kvm
*kvm
, unsigned long *rmapp
,
959 * If there's no access bit in the secondary pte set by the
960 * hardware it's up to gup-fast/gup to set the access bit in
961 * the primary pte or in the page structure.
963 if (!shadow_accessed_mask
)
966 spte
= rmap_next(kvm
, rmapp
, NULL
);
969 BUG_ON(!(_spte
& PT_PRESENT_MASK
));
970 young
= _spte
& PT_ACCESSED_MASK
;
975 spte
= rmap_next(kvm
, rmapp
, spte
);
981 #define RMAP_RECYCLE_THRESHOLD 1000
983 static void rmap_recycle(struct kvm_vcpu
*vcpu
, u64
*spte
, gfn_t gfn
)
985 unsigned long *rmapp
;
986 struct kvm_mmu_page
*sp
;
988 sp
= page_header(__pa(spte
));
990 rmapp
= gfn_to_rmap(vcpu
->kvm
, gfn
, sp
->role
.level
);
992 kvm_unmap_rmapp(vcpu
->kvm
, rmapp
, 0);
993 kvm_flush_remote_tlbs(vcpu
->kvm
);
996 int kvm_age_hva(struct kvm
*kvm
, unsigned long hva
)
998 return kvm_handle_hva(kvm
, hva
, 0, kvm_age_rmapp
);
1001 int kvm_test_age_hva(struct kvm
*kvm
, unsigned long hva
)
1003 return kvm_handle_hva(kvm
, hva
, 0, kvm_test_age_rmapp
);
1007 static int is_empty_shadow_page(u64
*spt
)
1012 for (pos
= spt
, end
= pos
+ PAGE_SIZE
/ sizeof(u64
); pos
!= end
; pos
++)
1013 if (is_shadow_present_pte(*pos
)) {
1014 printk(KERN_ERR
"%s: %p %llx\n", __func__
,
1023 * This value is the sum of all of the kvm instances's
1024 * kvm->arch.n_used_mmu_pages values. We need a global,
1025 * aggregate version in order to make the slab shrinker
1028 static inline void kvm_mod_used_mmu_pages(struct kvm
*kvm
, int nr
)
1030 kvm
->arch
.n_used_mmu_pages
+= nr
;
1031 percpu_counter_add(&kvm_total_used_mmu_pages
, nr
);
1034 static void kvm_mmu_free_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1036 ASSERT(is_empty_shadow_page(sp
->spt
));
1037 hlist_del(&sp
->hash_link
);
1038 list_del(&sp
->link
);
1039 free_page((unsigned long)sp
->spt
);
1040 if (!sp
->role
.direct
)
1041 free_page((unsigned long)sp
->gfns
);
1042 kmem_cache_free(mmu_page_header_cache
, sp
);
1043 kvm_mod_used_mmu_pages(kvm
, -1);
1046 static unsigned kvm_page_table_hashfn(gfn_t gfn
)
1048 return gfn
& ((1 << KVM_MMU_HASH_SHIFT
) - 1);
1051 static struct kvm_mmu_page
*kvm_mmu_alloc_page(struct kvm_vcpu
*vcpu
,
1052 u64
*parent_pte
, int direct
)
1054 struct kvm_mmu_page
*sp
;
1056 sp
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_header_cache
, sizeof *sp
);
1057 sp
->spt
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
, PAGE_SIZE
);
1059 sp
->gfns
= mmu_memory_cache_alloc(&vcpu
->arch
.mmu_page_cache
,
1061 set_page_private(virt_to_page(sp
->spt
), (unsigned long)sp
);
1062 list_add(&sp
->link
, &vcpu
->kvm
->arch
.active_mmu_pages
);
1063 bitmap_zero(sp
->slot_bitmap
, KVM_MEMORY_SLOTS
+ KVM_PRIVATE_MEM_SLOTS
);
1064 sp
->multimapped
= 0;
1065 sp
->parent_pte
= parent_pte
;
1066 kvm_mod_used_mmu_pages(vcpu
->kvm
, +1);
1070 static void mmu_page_add_parent_pte(struct kvm_vcpu
*vcpu
,
1071 struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1073 struct kvm_pte_chain
*pte_chain
;
1074 struct hlist_node
*node
;
1079 if (!sp
->multimapped
) {
1080 u64
*old
= sp
->parent_pte
;
1083 sp
->parent_pte
= parent_pte
;
1086 sp
->multimapped
= 1;
1087 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1088 INIT_HLIST_HEAD(&sp
->parent_ptes
);
1089 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1090 pte_chain
->parent_ptes
[0] = old
;
1092 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
) {
1093 if (pte_chain
->parent_ptes
[NR_PTE_CHAIN_ENTRIES
-1])
1095 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
)
1096 if (!pte_chain
->parent_ptes
[i
]) {
1097 pte_chain
->parent_ptes
[i
] = parent_pte
;
1101 pte_chain
= mmu_alloc_pte_chain(vcpu
);
1103 hlist_add_head(&pte_chain
->link
, &sp
->parent_ptes
);
1104 pte_chain
->parent_ptes
[0] = parent_pte
;
1107 static void mmu_page_remove_parent_pte(struct kvm_mmu_page
*sp
,
1110 struct kvm_pte_chain
*pte_chain
;
1111 struct hlist_node
*node
;
1114 if (!sp
->multimapped
) {
1115 BUG_ON(sp
->parent_pte
!= parent_pte
);
1116 sp
->parent_pte
= NULL
;
1119 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1120 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1121 if (!pte_chain
->parent_ptes
[i
])
1123 if (pte_chain
->parent_ptes
[i
] != parent_pte
)
1125 while (i
+ 1 < NR_PTE_CHAIN_ENTRIES
1126 && pte_chain
->parent_ptes
[i
+ 1]) {
1127 pte_chain
->parent_ptes
[i
]
1128 = pte_chain
->parent_ptes
[i
+ 1];
1131 pte_chain
->parent_ptes
[i
] = NULL
;
1133 hlist_del(&pte_chain
->link
);
1134 mmu_free_pte_chain(pte_chain
);
1135 if (hlist_empty(&sp
->parent_ptes
)) {
1136 sp
->multimapped
= 0;
1137 sp
->parent_pte
= NULL
;
1145 static void mmu_parent_walk(struct kvm_mmu_page
*sp
, mmu_parent_walk_fn fn
)
1147 struct kvm_pte_chain
*pte_chain
;
1148 struct hlist_node
*node
;
1149 struct kvm_mmu_page
*parent_sp
;
1152 if (!sp
->multimapped
&& sp
->parent_pte
) {
1153 parent_sp
= page_header(__pa(sp
->parent_pte
));
1154 fn(parent_sp
, sp
->parent_pte
);
1158 hlist_for_each_entry(pte_chain
, node
, &sp
->parent_ptes
, link
)
1159 for (i
= 0; i
< NR_PTE_CHAIN_ENTRIES
; ++i
) {
1160 u64
*spte
= pte_chain
->parent_ptes
[i
];
1164 parent_sp
= page_header(__pa(spte
));
1165 fn(parent_sp
, spte
);
1169 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
);
1170 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page
*sp
)
1172 mmu_parent_walk(sp
, mark_unsync
);
1175 static void mark_unsync(struct kvm_mmu_page
*sp
, u64
*spte
)
1179 index
= spte
- sp
->spt
;
1180 if (__test_and_set_bit(index
, sp
->unsync_child_bitmap
))
1182 if (sp
->unsync_children
++)
1184 kvm_mmu_mark_parents_unsync(sp
);
1187 static void nonpaging_prefetch_page(struct kvm_vcpu
*vcpu
,
1188 struct kvm_mmu_page
*sp
)
1192 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
)
1193 sp
->spt
[i
] = shadow_trap_nonpresent_pte
;
1196 static int nonpaging_sync_page(struct kvm_vcpu
*vcpu
,
1197 struct kvm_mmu_page
*sp
)
1202 static void nonpaging_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
1206 static void nonpaging_update_pte(struct kvm_vcpu
*vcpu
,
1207 struct kvm_mmu_page
*sp
, u64
*spte
,
1213 #define KVM_PAGE_ARRAY_NR 16
1215 struct kvm_mmu_pages
{
1216 struct mmu_page_and_offset
{
1217 struct kvm_mmu_page
*sp
;
1219 } page
[KVM_PAGE_ARRAY_NR
];
1223 #define for_each_unsync_children(bitmap, idx) \
1224 for (idx = find_first_bit(bitmap, 512); \
1226 idx = find_next_bit(bitmap, 512, idx+1))
1228 static int mmu_pages_add(struct kvm_mmu_pages
*pvec
, struct kvm_mmu_page
*sp
,
1234 for (i
=0; i
< pvec
->nr
; i
++)
1235 if (pvec
->page
[i
].sp
== sp
)
1238 pvec
->page
[pvec
->nr
].sp
= sp
;
1239 pvec
->page
[pvec
->nr
].idx
= idx
;
1241 return (pvec
->nr
== KVM_PAGE_ARRAY_NR
);
1244 static int __mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1245 struct kvm_mmu_pages
*pvec
)
1247 int i
, ret
, nr_unsync_leaf
= 0;
1249 for_each_unsync_children(sp
->unsync_child_bitmap
, i
) {
1250 struct kvm_mmu_page
*child
;
1251 u64 ent
= sp
->spt
[i
];
1253 if (!is_shadow_present_pte(ent
) || is_large_pte(ent
))
1254 goto clear_child_bitmap
;
1256 child
= page_header(ent
& PT64_BASE_ADDR_MASK
);
1258 if (child
->unsync_children
) {
1259 if (mmu_pages_add(pvec
, child
, i
))
1262 ret
= __mmu_unsync_walk(child
, pvec
);
1264 goto clear_child_bitmap
;
1266 nr_unsync_leaf
+= ret
;
1269 } else if (child
->unsync
) {
1271 if (mmu_pages_add(pvec
, child
, i
))
1274 goto clear_child_bitmap
;
1279 __clear_bit(i
, sp
->unsync_child_bitmap
);
1280 sp
->unsync_children
--;
1281 WARN_ON((int)sp
->unsync_children
< 0);
1285 return nr_unsync_leaf
;
1288 static int mmu_unsync_walk(struct kvm_mmu_page
*sp
,
1289 struct kvm_mmu_pages
*pvec
)
1291 if (!sp
->unsync_children
)
1294 mmu_pages_add(pvec
, sp
, 0);
1295 return __mmu_unsync_walk(sp
, pvec
);
1298 static void kvm_unlink_unsync_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1300 WARN_ON(!sp
->unsync
);
1301 trace_kvm_mmu_sync_page(sp
);
1303 --kvm
->stat
.mmu_unsync
;
1306 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1307 struct list_head
*invalid_list
);
1308 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1309 struct list_head
*invalid_list
);
1311 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1312 hlist_for_each_entry(sp, pos, \
1313 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1314 if ((sp)->gfn != (gfn)) {} else
1316 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1317 hlist_for_each_entry(sp, pos, \
1318 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1319 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1320 (sp)->role.invalid) {} else
1322 /* @sp->gfn should be write-protected at the call site */
1323 static int __kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1324 struct list_head
*invalid_list
, bool clear_unsync
)
1326 if (sp
->role
.cr4_pae
!= !!is_pae(vcpu
)) {
1327 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1332 kvm_unlink_unsync_page(vcpu
->kvm
, sp
);
1334 if (vcpu
->arch
.mmu
.sync_page(vcpu
, sp
)) {
1335 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, invalid_list
);
1339 kvm_mmu_flush_tlb(vcpu
);
1343 static int kvm_sync_page_transient(struct kvm_vcpu
*vcpu
,
1344 struct kvm_mmu_page
*sp
)
1346 LIST_HEAD(invalid_list
);
1349 ret
= __kvm_sync_page(vcpu
, sp
, &invalid_list
, false);
1351 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1356 static int kvm_sync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
,
1357 struct list_head
*invalid_list
)
1359 return __kvm_sync_page(vcpu
, sp
, invalid_list
, true);
1362 /* @gfn should be write-protected at the call site */
1363 static void kvm_sync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1365 struct kvm_mmu_page
*s
;
1366 struct hlist_node
*node
;
1367 LIST_HEAD(invalid_list
);
1370 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1374 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1375 kvm_unlink_unsync_page(vcpu
->kvm
, s
);
1376 if ((s
->role
.cr4_pae
!= !!is_pae(vcpu
)) ||
1377 (vcpu
->arch
.mmu
.sync_page(vcpu
, s
))) {
1378 kvm_mmu_prepare_zap_page(vcpu
->kvm
, s
, &invalid_list
);
1384 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1386 kvm_mmu_flush_tlb(vcpu
);
1389 struct mmu_page_path
{
1390 struct kvm_mmu_page
*parent
[PT64_ROOT_LEVEL
-1];
1391 unsigned int idx
[PT64_ROOT_LEVEL
-1];
1394 #define for_each_sp(pvec, sp, parents, i) \
1395 for (i = mmu_pages_next(&pvec, &parents, -1), \
1396 sp = pvec.page[i].sp; \
1397 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1398 i = mmu_pages_next(&pvec, &parents, i))
1400 static int mmu_pages_next(struct kvm_mmu_pages
*pvec
,
1401 struct mmu_page_path
*parents
,
1406 for (n
= i
+1; n
< pvec
->nr
; n
++) {
1407 struct kvm_mmu_page
*sp
= pvec
->page
[n
].sp
;
1409 if (sp
->role
.level
== PT_PAGE_TABLE_LEVEL
) {
1410 parents
->idx
[0] = pvec
->page
[n
].idx
;
1414 parents
->parent
[sp
->role
.level
-2] = sp
;
1415 parents
->idx
[sp
->role
.level
-1] = pvec
->page
[n
].idx
;
1421 static void mmu_pages_clear_parents(struct mmu_page_path
*parents
)
1423 struct kvm_mmu_page
*sp
;
1424 unsigned int level
= 0;
1427 unsigned int idx
= parents
->idx
[level
];
1429 sp
= parents
->parent
[level
];
1433 --sp
->unsync_children
;
1434 WARN_ON((int)sp
->unsync_children
< 0);
1435 __clear_bit(idx
, sp
->unsync_child_bitmap
);
1437 } while (level
< PT64_ROOT_LEVEL
-1 && !sp
->unsync_children
);
1440 static void kvm_mmu_pages_init(struct kvm_mmu_page
*parent
,
1441 struct mmu_page_path
*parents
,
1442 struct kvm_mmu_pages
*pvec
)
1444 parents
->parent
[parent
->role
.level
-1] = NULL
;
1448 static void mmu_sync_children(struct kvm_vcpu
*vcpu
,
1449 struct kvm_mmu_page
*parent
)
1452 struct kvm_mmu_page
*sp
;
1453 struct mmu_page_path parents
;
1454 struct kvm_mmu_pages pages
;
1455 LIST_HEAD(invalid_list
);
1457 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1458 while (mmu_unsync_walk(parent
, &pages
)) {
1461 for_each_sp(pages
, sp
, parents
, i
)
1462 protected |= rmap_write_protect(vcpu
->kvm
, sp
->gfn
);
1465 kvm_flush_remote_tlbs(vcpu
->kvm
);
1467 for_each_sp(pages
, sp
, parents
, i
) {
1468 kvm_sync_page(vcpu
, sp
, &invalid_list
);
1469 mmu_pages_clear_parents(&parents
);
1471 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
1472 cond_resched_lock(&vcpu
->kvm
->mmu_lock
);
1473 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1477 static struct kvm_mmu_page
*kvm_mmu_get_page(struct kvm_vcpu
*vcpu
,
1485 union kvm_mmu_page_role role
;
1487 struct kvm_mmu_page
*sp
;
1488 struct hlist_node
*node
;
1489 bool need_sync
= false;
1491 role
= vcpu
->arch
.mmu
.base_role
;
1493 role
.direct
= direct
;
1496 role
.access
= access
;
1497 if (!vcpu
->arch
.mmu
.direct_map
1498 && vcpu
->arch
.mmu
.root_level
<= PT32_ROOT_LEVEL
) {
1499 quadrant
= gaddr
>> (PAGE_SHIFT
+ (PT64_PT_BITS
* level
));
1500 quadrant
&= (1 << ((PT32_PT_BITS
- PT64_PT_BITS
) * level
)) - 1;
1501 role
.quadrant
= quadrant
;
1503 for_each_gfn_sp(vcpu
->kvm
, sp
, gfn
, node
) {
1504 if (!need_sync
&& sp
->unsync
)
1507 if (sp
->role
.word
!= role
.word
)
1510 if (sp
->unsync
&& kvm_sync_page_transient(vcpu
, sp
))
1513 mmu_page_add_parent_pte(vcpu
, sp
, parent_pte
);
1514 if (sp
->unsync_children
) {
1515 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1516 kvm_mmu_mark_parents_unsync(sp
);
1517 } else if (sp
->unsync
)
1518 kvm_mmu_mark_parents_unsync(sp
);
1520 trace_kvm_mmu_get_page(sp
, false);
1523 ++vcpu
->kvm
->stat
.mmu_cache_miss
;
1524 sp
= kvm_mmu_alloc_page(vcpu
, parent_pte
, direct
);
1529 hlist_add_head(&sp
->hash_link
,
1530 &vcpu
->kvm
->arch
.mmu_page_hash
[kvm_page_table_hashfn(gfn
)]);
1532 if (rmap_write_protect(vcpu
->kvm
, gfn
))
1533 kvm_flush_remote_tlbs(vcpu
->kvm
);
1534 if (level
> PT_PAGE_TABLE_LEVEL
&& need_sync
)
1535 kvm_sync_pages(vcpu
, gfn
);
1537 account_shadowed(vcpu
->kvm
, gfn
);
1539 if (shadow_trap_nonpresent_pte
!= shadow_notrap_nonpresent_pte
)
1540 vcpu
->arch
.mmu
.prefetch_page(vcpu
, sp
);
1542 nonpaging_prefetch_page(vcpu
, sp
);
1543 trace_kvm_mmu_get_page(sp
, true);
1547 static void shadow_walk_init(struct kvm_shadow_walk_iterator
*iterator
,
1548 struct kvm_vcpu
*vcpu
, u64 addr
)
1550 iterator
->addr
= addr
;
1551 iterator
->shadow_addr
= vcpu
->arch
.mmu
.root_hpa
;
1552 iterator
->level
= vcpu
->arch
.mmu
.shadow_root_level
;
1554 if (iterator
->level
== PT64_ROOT_LEVEL
&&
1555 vcpu
->arch
.mmu
.root_level
< PT64_ROOT_LEVEL
&&
1556 !vcpu
->arch
.mmu
.direct_map
)
1559 if (iterator
->level
== PT32E_ROOT_LEVEL
) {
1560 iterator
->shadow_addr
1561 = vcpu
->arch
.mmu
.pae_root
[(addr
>> 30) & 3];
1562 iterator
->shadow_addr
&= PT64_BASE_ADDR_MASK
;
1564 if (!iterator
->shadow_addr
)
1565 iterator
->level
= 0;
1569 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator
*iterator
)
1571 if (iterator
->level
< PT_PAGE_TABLE_LEVEL
)
1574 if (iterator
->level
== PT_PAGE_TABLE_LEVEL
)
1575 if (is_large_pte(*iterator
->sptep
))
1578 iterator
->index
= SHADOW_PT_INDEX(iterator
->addr
, iterator
->level
);
1579 iterator
->sptep
= ((u64
*)__va(iterator
->shadow_addr
)) + iterator
->index
;
1583 static void shadow_walk_next(struct kvm_shadow_walk_iterator
*iterator
)
1585 iterator
->shadow_addr
= *iterator
->sptep
& PT64_BASE_ADDR_MASK
;
1589 static void link_shadow_page(u64
*sptep
, struct kvm_mmu_page
*sp
)
1593 spte
= __pa(sp
->spt
)
1594 | PT_PRESENT_MASK
| PT_ACCESSED_MASK
1595 | PT_WRITABLE_MASK
| PT_USER_MASK
;
1596 __set_spte(sptep
, spte
);
1599 static void drop_large_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
)
1601 if (is_large_pte(*sptep
)) {
1602 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
1603 kvm_flush_remote_tlbs(vcpu
->kvm
);
1607 static void validate_direct_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
1608 unsigned direct_access
)
1610 if (is_shadow_present_pte(*sptep
) && !is_large_pte(*sptep
)) {
1611 struct kvm_mmu_page
*child
;
1614 * For the direct sp, if the guest pte's dirty bit
1615 * changed form clean to dirty, it will corrupt the
1616 * sp's access: allow writable in the read-only sp,
1617 * so we should update the spte at this point to get
1618 * a new sp with the correct access.
1620 child
= page_header(*sptep
& PT64_BASE_ADDR_MASK
);
1621 if (child
->role
.access
== direct_access
)
1624 mmu_page_remove_parent_pte(child
, sptep
);
1625 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
1626 kvm_flush_remote_tlbs(vcpu
->kvm
);
1630 static void kvm_mmu_page_unlink_children(struct kvm
*kvm
,
1631 struct kvm_mmu_page
*sp
)
1639 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1642 if (is_shadow_present_pte(ent
)) {
1643 if (!is_last_spte(ent
, sp
->role
.level
)) {
1644 ent
&= PT64_BASE_ADDR_MASK
;
1645 mmu_page_remove_parent_pte(page_header(ent
),
1648 if (is_large_pte(ent
))
1650 drop_spte(kvm
, &pt
[i
],
1651 shadow_trap_nonpresent_pte
);
1654 pt
[i
] = shadow_trap_nonpresent_pte
;
1658 static void kvm_mmu_put_page(struct kvm_mmu_page
*sp
, u64
*parent_pte
)
1660 mmu_page_remove_parent_pte(sp
, parent_pte
);
1663 static void kvm_mmu_reset_last_pte_updated(struct kvm
*kvm
)
1666 struct kvm_vcpu
*vcpu
;
1668 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1669 vcpu
->arch
.last_pte_updated
= NULL
;
1672 static void kvm_mmu_unlink_parents(struct kvm
*kvm
, struct kvm_mmu_page
*sp
)
1676 while (sp
->multimapped
|| sp
->parent_pte
) {
1677 if (!sp
->multimapped
)
1678 parent_pte
= sp
->parent_pte
;
1680 struct kvm_pte_chain
*chain
;
1682 chain
= container_of(sp
->parent_ptes
.first
,
1683 struct kvm_pte_chain
, link
);
1684 parent_pte
= chain
->parent_ptes
[0];
1686 BUG_ON(!parent_pte
);
1687 kvm_mmu_put_page(sp
, parent_pte
);
1688 __set_spte(parent_pte
, shadow_trap_nonpresent_pte
);
1692 static int mmu_zap_unsync_children(struct kvm
*kvm
,
1693 struct kvm_mmu_page
*parent
,
1694 struct list_head
*invalid_list
)
1697 struct mmu_page_path parents
;
1698 struct kvm_mmu_pages pages
;
1700 if (parent
->role
.level
== PT_PAGE_TABLE_LEVEL
)
1703 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1704 while (mmu_unsync_walk(parent
, &pages
)) {
1705 struct kvm_mmu_page
*sp
;
1707 for_each_sp(pages
, sp
, parents
, i
) {
1708 kvm_mmu_prepare_zap_page(kvm
, sp
, invalid_list
);
1709 mmu_pages_clear_parents(&parents
);
1712 kvm_mmu_pages_init(parent
, &parents
, &pages
);
1718 static int kvm_mmu_prepare_zap_page(struct kvm
*kvm
, struct kvm_mmu_page
*sp
,
1719 struct list_head
*invalid_list
)
1723 trace_kvm_mmu_prepare_zap_page(sp
);
1724 ++kvm
->stat
.mmu_shadow_zapped
;
1725 ret
= mmu_zap_unsync_children(kvm
, sp
, invalid_list
);
1726 kvm_mmu_page_unlink_children(kvm
, sp
);
1727 kvm_mmu_unlink_parents(kvm
, sp
);
1728 if (!sp
->role
.invalid
&& !sp
->role
.direct
)
1729 unaccount_shadowed(kvm
, sp
->gfn
);
1731 kvm_unlink_unsync_page(kvm
, sp
);
1732 if (!sp
->root_count
) {
1735 list_move(&sp
->link
, invalid_list
);
1737 list_move(&sp
->link
, &kvm
->arch
.active_mmu_pages
);
1738 kvm_reload_remote_mmus(kvm
);
1741 sp
->role
.invalid
= 1;
1742 kvm_mmu_reset_last_pte_updated(kvm
);
1746 static void kvm_mmu_commit_zap_page(struct kvm
*kvm
,
1747 struct list_head
*invalid_list
)
1749 struct kvm_mmu_page
*sp
;
1751 if (list_empty(invalid_list
))
1754 kvm_flush_remote_tlbs(kvm
);
1757 sp
= list_first_entry(invalid_list
, struct kvm_mmu_page
, link
);
1758 WARN_ON(!sp
->role
.invalid
|| sp
->root_count
);
1759 kvm_mmu_free_page(kvm
, sp
);
1760 } while (!list_empty(invalid_list
));
1765 * Changing the number of mmu pages allocated to the vm
1766 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1768 void kvm_mmu_change_mmu_pages(struct kvm
*kvm
, unsigned int goal_nr_mmu_pages
)
1770 LIST_HEAD(invalid_list
);
1772 * If we set the number of mmu pages to be smaller be than the
1773 * number of actived pages , we must to free some mmu pages before we
1777 if (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
) {
1778 while (kvm
->arch
.n_used_mmu_pages
> goal_nr_mmu_pages
&&
1779 !list_empty(&kvm
->arch
.active_mmu_pages
)) {
1780 struct kvm_mmu_page
*page
;
1782 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
1783 struct kvm_mmu_page
, link
);
1784 kvm_mmu_prepare_zap_page(kvm
, page
, &invalid_list
);
1785 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1787 goal_nr_mmu_pages
= kvm
->arch
.n_used_mmu_pages
;
1790 kvm
->arch
.n_max_mmu_pages
= goal_nr_mmu_pages
;
1793 static int kvm_mmu_unprotect_page(struct kvm
*kvm
, gfn_t gfn
)
1795 struct kvm_mmu_page
*sp
;
1796 struct hlist_node
*node
;
1797 LIST_HEAD(invalid_list
);
1800 pgprintk("%s: looking for gfn %llx\n", __func__
, gfn
);
1803 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1804 pgprintk("%s: gfn %llx role %x\n", __func__
, gfn
,
1807 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1809 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1813 static void mmu_unshadow(struct kvm
*kvm
, gfn_t gfn
)
1815 struct kvm_mmu_page
*sp
;
1816 struct hlist_node
*node
;
1817 LIST_HEAD(invalid_list
);
1819 for_each_gfn_indirect_valid_sp(kvm
, sp
, gfn
, node
) {
1820 pgprintk("%s: zap %llx %x\n",
1821 __func__
, gfn
, sp
->role
.word
);
1822 kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
);
1824 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
1827 static void page_header_update_slot(struct kvm
*kvm
, void *pte
, gfn_t gfn
)
1829 int slot
= memslot_id(kvm
, gfn
);
1830 struct kvm_mmu_page
*sp
= page_header(__pa(pte
));
1832 __set_bit(slot
, sp
->slot_bitmap
);
1835 static void mmu_convert_notrap(struct kvm_mmu_page
*sp
)
1840 if (shadow_trap_nonpresent_pte
== shadow_notrap_nonpresent_pte
)
1843 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
1844 if (pt
[i
] == shadow_notrap_nonpresent_pte
)
1845 __set_spte(&pt
[i
], shadow_trap_nonpresent_pte
);
1850 * The function is based on mtrr_type_lookup() in
1851 * arch/x86/kernel/cpu/mtrr/generic.c
1853 static int get_mtrr_type(struct mtrr_state_type
*mtrr_state
,
1858 u8 prev_match
, curr_match
;
1859 int num_var_ranges
= KVM_NR_VAR_MTRR
;
1861 if (!mtrr_state
->enabled
)
1864 /* Make end inclusive end, instead of exclusive */
1867 /* Look in fixed ranges. Just return the type as per start */
1868 if (mtrr_state
->have_fixed
&& (start
< 0x100000)) {
1871 if (start
< 0x80000) {
1873 idx
+= (start
>> 16);
1874 return mtrr_state
->fixed_ranges
[idx
];
1875 } else if (start
< 0xC0000) {
1877 idx
+= ((start
- 0x80000) >> 14);
1878 return mtrr_state
->fixed_ranges
[idx
];
1879 } else if (start
< 0x1000000) {
1881 idx
+= ((start
- 0xC0000) >> 12);
1882 return mtrr_state
->fixed_ranges
[idx
];
1887 * Look in variable ranges
1888 * Look of multiple ranges matching this address and pick type
1889 * as per MTRR precedence
1891 if (!(mtrr_state
->enabled
& 2))
1892 return mtrr_state
->def_type
;
1895 for (i
= 0; i
< num_var_ranges
; ++i
) {
1896 unsigned short start_state
, end_state
;
1898 if (!(mtrr_state
->var_ranges
[i
].mask_lo
& (1 << 11)))
1901 base
= (((u64
)mtrr_state
->var_ranges
[i
].base_hi
) << 32) +
1902 (mtrr_state
->var_ranges
[i
].base_lo
& PAGE_MASK
);
1903 mask
= (((u64
)mtrr_state
->var_ranges
[i
].mask_hi
) << 32) +
1904 (mtrr_state
->var_ranges
[i
].mask_lo
& PAGE_MASK
);
1906 start_state
= ((start
& mask
) == (base
& mask
));
1907 end_state
= ((end
& mask
) == (base
& mask
));
1908 if (start_state
!= end_state
)
1911 if ((start
& mask
) != (base
& mask
))
1914 curr_match
= mtrr_state
->var_ranges
[i
].base_lo
& 0xff;
1915 if (prev_match
== 0xFF) {
1916 prev_match
= curr_match
;
1920 if (prev_match
== MTRR_TYPE_UNCACHABLE
||
1921 curr_match
== MTRR_TYPE_UNCACHABLE
)
1922 return MTRR_TYPE_UNCACHABLE
;
1924 if ((prev_match
== MTRR_TYPE_WRBACK
&&
1925 curr_match
== MTRR_TYPE_WRTHROUGH
) ||
1926 (prev_match
== MTRR_TYPE_WRTHROUGH
&&
1927 curr_match
== MTRR_TYPE_WRBACK
)) {
1928 prev_match
= MTRR_TYPE_WRTHROUGH
;
1929 curr_match
= MTRR_TYPE_WRTHROUGH
;
1932 if (prev_match
!= curr_match
)
1933 return MTRR_TYPE_UNCACHABLE
;
1936 if (prev_match
!= 0xFF)
1939 return mtrr_state
->def_type
;
1942 u8
kvm_get_guest_memory_type(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1946 mtrr
= get_mtrr_type(&vcpu
->arch
.mtrr_state
, gfn
<< PAGE_SHIFT
,
1947 (gfn
<< PAGE_SHIFT
) + PAGE_SIZE
);
1948 if (mtrr
== 0xfe || mtrr
== 0xff)
1949 mtrr
= MTRR_TYPE_WRBACK
;
1952 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type
);
1954 static void __kvm_unsync_page(struct kvm_vcpu
*vcpu
, struct kvm_mmu_page
*sp
)
1956 trace_kvm_mmu_unsync_page(sp
);
1957 ++vcpu
->kvm
->stat
.mmu_unsync
;
1960 kvm_mmu_mark_parents_unsync(sp
);
1961 mmu_convert_notrap(sp
);
1964 static void kvm_unsync_pages(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
1966 struct kvm_mmu_page
*s
;
1967 struct hlist_node
*node
;
1969 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1972 WARN_ON(s
->role
.level
!= PT_PAGE_TABLE_LEVEL
);
1973 __kvm_unsync_page(vcpu
, s
);
1977 static int mmu_need_write_protect(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
1980 struct kvm_mmu_page
*s
;
1981 struct hlist_node
*node
;
1982 bool need_unsync
= false;
1984 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, s
, gfn
, node
) {
1988 if (s
->role
.level
!= PT_PAGE_TABLE_LEVEL
)
1991 if (!need_unsync
&& !s
->unsync
) {
1998 kvm_unsync_pages(vcpu
, gfn
);
2002 static int set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2003 unsigned pte_access
, int user_fault
,
2004 int write_fault
, int dirty
, int level
,
2005 gfn_t gfn
, pfn_t pfn
, bool speculative
,
2006 bool can_unsync
, bool host_writable
)
2008 u64 spte
, entry
= *sptep
;
2012 * We don't set the accessed bit, since we sometimes want to see
2013 * whether the guest actually used the pte (in order to detect
2016 spte
= PT_PRESENT_MASK
;
2018 spte
|= shadow_accessed_mask
;
2020 pte_access
&= ~ACC_WRITE_MASK
;
2021 if (pte_access
& ACC_EXEC_MASK
)
2022 spte
|= shadow_x_mask
;
2024 spte
|= shadow_nx_mask
;
2025 if (pte_access
& ACC_USER_MASK
)
2026 spte
|= shadow_user_mask
;
2027 if (level
> PT_PAGE_TABLE_LEVEL
)
2028 spte
|= PT_PAGE_SIZE_MASK
;
2030 spte
|= kvm_x86_ops
->get_mt_mask(vcpu
, gfn
,
2031 kvm_is_mmio_pfn(pfn
));
2034 spte
|= SPTE_HOST_WRITEABLE
;
2036 pte_access
&= ~ACC_WRITE_MASK
;
2038 spte
|= (u64
)pfn
<< PAGE_SHIFT
;
2040 if ((pte_access
& ACC_WRITE_MASK
)
2041 || (!vcpu
->arch
.mmu
.direct_map
&& write_fault
2042 && !is_write_protection(vcpu
) && !user_fault
)) {
2044 if (level
> PT_PAGE_TABLE_LEVEL
&&
2045 has_wrprotected_page(vcpu
->kvm
, gfn
, level
)) {
2047 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2051 spte
|= PT_WRITABLE_MASK
;
2053 if (!vcpu
->arch
.mmu
.direct_map
2054 && !(pte_access
& ACC_WRITE_MASK
))
2055 spte
&= ~PT_USER_MASK
;
2058 * Optimization: for pte sync, if spte was writable the hash
2059 * lookup is unnecessary (and expensive). Write protection
2060 * is responsibility of mmu_get_page / kvm_sync_page.
2061 * Same reasoning can be applied to dirty page accounting.
2063 if (!can_unsync
&& is_writable_pte(*sptep
))
2066 if (mmu_need_write_protect(vcpu
, gfn
, can_unsync
)) {
2067 pgprintk("%s: found shadow page for %llx, marking ro\n",
2070 pte_access
&= ~ACC_WRITE_MASK
;
2071 if (is_writable_pte(spte
))
2072 spte
&= ~PT_WRITABLE_MASK
;
2076 if (pte_access
& ACC_WRITE_MASK
)
2077 mark_page_dirty(vcpu
->kvm
, gfn
);
2080 update_spte(sptep
, spte
);
2082 * If we overwrite a writable spte with a read-only one we
2083 * should flush remote TLBs. Otherwise rmap_write_protect
2084 * will find a read-only spte, even though the writable spte
2085 * might be cached on a CPU's TLB.
2087 if (is_writable_pte(entry
) && !is_writable_pte(*sptep
))
2088 kvm_flush_remote_tlbs(vcpu
->kvm
);
2093 static void mmu_set_spte(struct kvm_vcpu
*vcpu
, u64
*sptep
,
2094 unsigned pt_access
, unsigned pte_access
,
2095 int user_fault
, int write_fault
, int dirty
,
2096 int *ptwrite
, int level
, gfn_t gfn
,
2097 pfn_t pfn
, bool speculative
,
2100 int was_rmapped
= 0;
2103 pgprintk("%s: spte %llx access %x write_fault %d"
2104 " user_fault %d gfn %llx\n",
2105 __func__
, *sptep
, pt_access
,
2106 write_fault
, user_fault
, gfn
);
2108 if (is_rmap_spte(*sptep
)) {
2110 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2111 * the parent of the now unreachable PTE.
2113 if (level
> PT_PAGE_TABLE_LEVEL
&&
2114 !is_large_pte(*sptep
)) {
2115 struct kvm_mmu_page
*child
;
2118 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
2119 mmu_page_remove_parent_pte(child
, sptep
);
2120 __set_spte(sptep
, shadow_trap_nonpresent_pte
);
2121 kvm_flush_remote_tlbs(vcpu
->kvm
);
2122 } else if (pfn
!= spte_to_pfn(*sptep
)) {
2123 pgprintk("hfn old %llx new %llx\n",
2124 spte_to_pfn(*sptep
), pfn
);
2125 drop_spte(vcpu
->kvm
, sptep
, shadow_trap_nonpresent_pte
);
2126 kvm_flush_remote_tlbs(vcpu
->kvm
);
2131 if (set_spte(vcpu
, sptep
, pte_access
, user_fault
, write_fault
,
2132 dirty
, level
, gfn
, pfn
, speculative
, true,
2136 kvm_mmu_flush_tlb(vcpu
);
2139 pgprintk("%s: setting spte %llx\n", __func__
, *sptep
);
2140 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2141 is_large_pte(*sptep
)? "2MB" : "4kB",
2142 *sptep
& PT_PRESENT_MASK
?"RW":"R", gfn
,
2144 if (!was_rmapped
&& is_large_pte(*sptep
))
2145 ++vcpu
->kvm
->stat
.lpages
;
2147 page_header_update_slot(vcpu
->kvm
, sptep
, gfn
);
2149 rmap_count
= rmap_add(vcpu
, sptep
, gfn
);
2150 if (rmap_count
> RMAP_RECYCLE_THRESHOLD
)
2151 rmap_recycle(vcpu
, sptep
, gfn
);
2153 kvm_release_pfn_clean(pfn
);
2155 vcpu
->arch
.last_pte_updated
= sptep
;
2156 vcpu
->arch
.last_pte_gfn
= gfn
;
2160 static void nonpaging_new_cr3(struct kvm_vcpu
*vcpu
)
2164 static pfn_t
pte_prefetch_gfn_to_pfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
2167 struct kvm_memory_slot
*slot
;
2170 slot
= gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, no_dirty_log
);
2173 return page_to_pfn(bad_page
);
2176 hva
= gfn_to_hva_memslot(slot
, gfn
);
2178 return hva_to_pfn_atomic(vcpu
->kvm
, hva
);
2181 static int direct_pte_prefetch_many(struct kvm_vcpu
*vcpu
,
2182 struct kvm_mmu_page
*sp
,
2183 u64
*start
, u64
*end
)
2185 struct page
*pages
[PTE_PREFETCH_NUM
];
2186 unsigned access
= sp
->role
.access
;
2190 gfn
= kvm_mmu_page_get_gfn(sp
, start
- sp
->spt
);
2191 if (!gfn_to_memslot_dirty_bitmap(vcpu
, gfn
, access
& ACC_WRITE_MASK
))
2194 ret
= gfn_to_page_many_atomic(vcpu
->kvm
, gfn
, pages
, end
- start
);
2198 for (i
= 0; i
< ret
; i
++, gfn
++, start
++)
2199 mmu_set_spte(vcpu
, start
, ACC_ALL
,
2200 access
, 0, 0, 1, NULL
,
2201 sp
->role
.level
, gfn
,
2202 page_to_pfn(pages
[i
]), true, true);
2207 static void __direct_pte_prefetch(struct kvm_vcpu
*vcpu
,
2208 struct kvm_mmu_page
*sp
, u64
*sptep
)
2210 u64
*spte
, *start
= NULL
;
2213 WARN_ON(!sp
->role
.direct
);
2215 i
= (sptep
- sp
->spt
) & ~(PTE_PREFETCH_NUM
- 1);
2218 for (i
= 0; i
< PTE_PREFETCH_NUM
; i
++, spte
++) {
2219 if (*spte
!= shadow_trap_nonpresent_pte
|| spte
== sptep
) {
2222 if (direct_pte_prefetch_many(vcpu
, sp
, start
, spte
) < 0)
2230 static void direct_pte_prefetch(struct kvm_vcpu
*vcpu
, u64
*sptep
)
2232 struct kvm_mmu_page
*sp
;
2235 * Since it's no accessed bit on EPT, it's no way to
2236 * distinguish between actually accessed translations
2237 * and prefetched, so disable pte prefetch if EPT is
2240 if (!shadow_accessed_mask
)
2243 sp
= page_header(__pa(sptep
));
2244 if (sp
->role
.level
> PT_PAGE_TABLE_LEVEL
)
2247 __direct_pte_prefetch(vcpu
, sp
, sptep
);
2250 static int __direct_map(struct kvm_vcpu
*vcpu
, gpa_t v
, int write
,
2251 int map_writable
, int level
, gfn_t gfn
, pfn_t pfn
,
2254 struct kvm_shadow_walk_iterator iterator
;
2255 struct kvm_mmu_page
*sp
;
2259 for_each_shadow_entry(vcpu
, (u64
)gfn
<< PAGE_SHIFT
, iterator
) {
2260 if (iterator
.level
== level
) {
2261 unsigned pte_access
= ACC_ALL
;
2263 mmu_set_spte(vcpu
, iterator
.sptep
, ACC_ALL
, pte_access
,
2264 0, write
, 1, &pt_write
,
2265 level
, gfn
, pfn
, prefault
, map_writable
);
2266 direct_pte_prefetch(vcpu
, iterator
.sptep
);
2267 ++vcpu
->stat
.pf_fixed
;
2271 if (*iterator
.sptep
== shadow_trap_nonpresent_pte
) {
2272 u64 base_addr
= iterator
.addr
;
2274 base_addr
&= PT64_LVL_ADDR_MASK(iterator
.level
);
2275 pseudo_gfn
= base_addr
>> PAGE_SHIFT
;
2276 sp
= kvm_mmu_get_page(vcpu
, pseudo_gfn
, iterator
.addr
,
2278 1, ACC_ALL
, iterator
.sptep
);
2280 pgprintk("nonpaging_map: ENOMEM\n");
2281 kvm_release_pfn_clean(pfn
);
2285 __set_spte(iterator
.sptep
,
2287 | PT_PRESENT_MASK
| PT_WRITABLE_MASK
2288 | shadow_user_mask
| shadow_x_mask
2289 | shadow_accessed_mask
);
2295 static void kvm_send_hwpoison_signal(unsigned long address
, struct task_struct
*tsk
)
2299 info
.si_signo
= SIGBUS
;
2301 info
.si_code
= BUS_MCEERR_AR
;
2302 info
.si_addr
= (void __user
*)address
;
2303 info
.si_addr_lsb
= PAGE_SHIFT
;
2305 send_sig_info(SIGBUS
, &info
, tsk
);
2308 static int kvm_handle_bad_page(struct kvm
*kvm
, gfn_t gfn
, pfn_t pfn
)
2310 kvm_release_pfn_clean(pfn
);
2311 if (is_hwpoison_pfn(pfn
)) {
2312 kvm_send_hwpoison_signal(gfn_to_hva(kvm
, gfn
), current
);
2314 } else if (is_fault_pfn(pfn
))
2320 static void transparent_hugepage_adjust(struct kvm_vcpu
*vcpu
,
2321 gfn_t
*gfnp
, pfn_t
*pfnp
, int *levelp
)
2325 int level
= *levelp
;
2328 * Check if it's a transparent hugepage. If this would be an
2329 * hugetlbfs page, level wouldn't be set to
2330 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2333 if (!is_error_pfn(pfn
) && !kvm_is_mmio_pfn(pfn
) &&
2334 level
== PT_PAGE_TABLE_LEVEL
&&
2335 PageTransCompound(pfn_to_page(pfn
)) &&
2336 !has_wrprotected_page(vcpu
->kvm
, gfn
, PT_DIRECTORY_LEVEL
)) {
2339 * mmu_notifier_retry was successful and we hold the
2340 * mmu_lock here, so the pmd can't become splitting
2341 * from under us, and in turn
2342 * __split_huge_page_refcount() can't run from under
2343 * us and we can safely transfer the refcount from
2344 * PG_tail to PG_head as we switch the pfn to tail to
2347 *levelp
= level
= PT_DIRECTORY_LEVEL
;
2348 mask
= KVM_PAGES_PER_HPAGE(level
) - 1;
2349 VM_BUG_ON((gfn
& mask
) != (pfn
& mask
));
2353 kvm_release_pfn_clean(pfn
);
2355 if (!get_page_unless_zero(pfn_to_page(pfn
)))
2362 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2363 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
);
2365 static int nonpaging_map(struct kvm_vcpu
*vcpu
, gva_t v
, int write
, gfn_t gfn
,
2372 unsigned long mmu_seq
;
2375 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2376 if (likely(!force_pt_level
)) {
2377 level
= mapping_level(vcpu
, gfn
);
2379 * This path builds a PAE pagetable - so we can map
2380 * 2mb pages at maximum. Therefore check if the level
2381 * is larger than that.
2383 if (level
> PT_DIRECTORY_LEVEL
)
2384 level
= PT_DIRECTORY_LEVEL
;
2386 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2388 level
= PT_PAGE_TABLE_LEVEL
;
2390 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2393 if (try_async_pf(vcpu
, prefault
, gfn
, v
, &pfn
, write
, &map_writable
))
2397 if (is_error_pfn(pfn
))
2398 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2400 spin_lock(&vcpu
->kvm
->mmu_lock
);
2401 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2403 kvm_mmu_free_some_pages(vcpu
);
2404 if (likely(!force_pt_level
))
2405 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2406 r
= __direct_map(vcpu
, v
, write
, map_writable
, level
, gfn
, pfn
,
2408 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2414 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2415 kvm_release_pfn_clean(pfn
);
2420 static void mmu_free_roots(struct kvm_vcpu
*vcpu
)
2423 struct kvm_mmu_page
*sp
;
2424 LIST_HEAD(invalid_list
);
2426 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2428 spin_lock(&vcpu
->kvm
->mmu_lock
);
2429 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
&&
2430 (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
||
2431 vcpu
->arch
.mmu
.direct_map
)) {
2432 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2434 sp
= page_header(root
);
2436 if (!sp
->root_count
&& sp
->role
.invalid
) {
2437 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
2438 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2440 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2441 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2444 for (i
= 0; i
< 4; ++i
) {
2445 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2448 root
&= PT64_BASE_ADDR_MASK
;
2449 sp
= page_header(root
);
2451 if (!sp
->root_count
&& sp
->role
.invalid
)
2452 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
2455 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
2457 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
2458 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2459 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
2462 static int mmu_check_root(struct kvm_vcpu
*vcpu
, gfn_t root_gfn
)
2466 if (!kvm_is_visible_gfn(vcpu
->kvm
, root_gfn
)) {
2467 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2474 static int mmu_alloc_direct_roots(struct kvm_vcpu
*vcpu
)
2476 struct kvm_mmu_page
*sp
;
2479 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2480 spin_lock(&vcpu
->kvm
->mmu_lock
);
2481 kvm_mmu_free_some_pages(vcpu
);
2482 sp
= kvm_mmu_get_page(vcpu
, 0, 0, PT64_ROOT_LEVEL
,
2485 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2486 vcpu
->arch
.mmu
.root_hpa
= __pa(sp
->spt
);
2487 } else if (vcpu
->arch
.mmu
.shadow_root_level
== PT32E_ROOT_LEVEL
) {
2488 for (i
= 0; i
< 4; ++i
) {
2489 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2491 ASSERT(!VALID_PAGE(root
));
2492 spin_lock(&vcpu
->kvm
->mmu_lock
);
2493 kvm_mmu_free_some_pages(vcpu
);
2494 sp
= kvm_mmu_get_page(vcpu
, i
<< (30 - PAGE_SHIFT
),
2496 PT32_ROOT_LEVEL
, 1, ACC_ALL
,
2498 root
= __pa(sp
->spt
);
2500 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2501 vcpu
->arch
.mmu
.pae_root
[i
] = root
| PT_PRESENT_MASK
;
2503 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2510 static int mmu_alloc_shadow_roots(struct kvm_vcpu
*vcpu
)
2512 struct kvm_mmu_page
*sp
;
2517 root_gfn
= vcpu
->arch
.mmu
.get_cr3(vcpu
) >> PAGE_SHIFT
;
2519 if (mmu_check_root(vcpu
, root_gfn
))
2523 * Do we shadow a long mode page table? If so we need to
2524 * write-protect the guests page table root.
2526 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2527 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2529 ASSERT(!VALID_PAGE(root
));
2531 spin_lock(&vcpu
->kvm
->mmu_lock
);
2532 kvm_mmu_free_some_pages(vcpu
);
2533 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, 0, PT64_ROOT_LEVEL
,
2535 root
= __pa(sp
->spt
);
2537 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2538 vcpu
->arch
.mmu
.root_hpa
= root
;
2543 * We shadow a 32 bit page table. This may be a legacy 2-level
2544 * or a PAE 3-level page table. In either case we need to be aware that
2545 * the shadow page table may be a PAE or a long mode page table.
2547 pm_mask
= PT_PRESENT_MASK
;
2548 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
)
2549 pm_mask
|= PT_ACCESSED_MASK
| PT_WRITABLE_MASK
| PT_USER_MASK
;
2551 for (i
= 0; i
< 4; ++i
) {
2552 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2554 ASSERT(!VALID_PAGE(root
));
2555 if (vcpu
->arch
.mmu
.root_level
== PT32E_ROOT_LEVEL
) {
2556 pdptr
= kvm_pdptr_read_mmu(vcpu
, &vcpu
->arch
.mmu
, i
);
2557 if (!is_present_gpte(pdptr
)) {
2558 vcpu
->arch
.mmu
.pae_root
[i
] = 0;
2561 root_gfn
= pdptr
>> PAGE_SHIFT
;
2562 if (mmu_check_root(vcpu
, root_gfn
))
2565 spin_lock(&vcpu
->kvm
->mmu_lock
);
2566 kvm_mmu_free_some_pages(vcpu
);
2567 sp
= kvm_mmu_get_page(vcpu
, root_gfn
, i
<< 30,
2570 root
= __pa(sp
->spt
);
2572 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2574 vcpu
->arch
.mmu
.pae_root
[i
] = root
| pm_mask
;
2576 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.pae_root
);
2579 * If we shadow a 32 bit page table with a long mode page
2580 * table we enter this path.
2582 if (vcpu
->arch
.mmu
.shadow_root_level
== PT64_ROOT_LEVEL
) {
2583 if (vcpu
->arch
.mmu
.lm_root
== NULL
) {
2585 * The additional page necessary for this is only
2586 * allocated on demand.
2591 lm_root
= (void*)get_zeroed_page(GFP_KERNEL
);
2592 if (lm_root
== NULL
)
2595 lm_root
[0] = __pa(vcpu
->arch
.mmu
.pae_root
) | pm_mask
;
2597 vcpu
->arch
.mmu
.lm_root
= lm_root
;
2600 vcpu
->arch
.mmu
.root_hpa
= __pa(vcpu
->arch
.mmu
.lm_root
);
2606 static int mmu_alloc_roots(struct kvm_vcpu
*vcpu
)
2608 if (vcpu
->arch
.mmu
.direct_map
)
2609 return mmu_alloc_direct_roots(vcpu
);
2611 return mmu_alloc_shadow_roots(vcpu
);
2614 static void mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2617 struct kvm_mmu_page
*sp
;
2619 if (vcpu
->arch
.mmu
.direct_map
)
2622 if (!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
2625 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_SYNC
);
2626 if (vcpu
->arch
.mmu
.root_level
== PT64_ROOT_LEVEL
) {
2627 hpa_t root
= vcpu
->arch
.mmu
.root_hpa
;
2628 sp
= page_header(root
);
2629 mmu_sync_children(vcpu
, sp
);
2630 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2633 for (i
= 0; i
< 4; ++i
) {
2634 hpa_t root
= vcpu
->arch
.mmu
.pae_root
[i
];
2636 if (root
&& VALID_PAGE(root
)) {
2637 root
&= PT64_BASE_ADDR_MASK
;
2638 sp
= page_header(root
);
2639 mmu_sync_children(vcpu
, sp
);
2642 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_SYNC
);
2645 void kvm_mmu_sync_roots(struct kvm_vcpu
*vcpu
)
2647 spin_lock(&vcpu
->kvm
->mmu_lock
);
2648 mmu_sync_roots(vcpu
);
2649 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2652 static gpa_t
nonpaging_gva_to_gpa(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2653 u32 access
, struct x86_exception
*exception
)
2656 exception
->error_code
= 0;
2660 static gpa_t
nonpaging_gva_to_gpa_nested(struct kvm_vcpu
*vcpu
, gva_t vaddr
,
2662 struct x86_exception
*exception
)
2665 exception
->error_code
= 0;
2666 return vcpu
->arch
.nested_mmu
.translate_gpa(vcpu
, vaddr
, access
);
2669 static int nonpaging_page_fault(struct kvm_vcpu
*vcpu
, gva_t gva
,
2670 u32 error_code
, bool prefault
)
2675 pgprintk("%s: gva %lx error %x\n", __func__
, gva
, error_code
);
2676 r
= mmu_topup_memory_caches(vcpu
);
2681 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2683 gfn
= gva
>> PAGE_SHIFT
;
2685 return nonpaging_map(vcpu
, gva
& PAGE_MASK
,
2686 error_code
& PFERR_WRITE_MASK
, gfn
, prefault
);
2689 static int kvm_arch_setup_async_pf(struct kvm_vcpu
*vcpu
, gva_t gva
, gfn_t gfn
)
2691 struct kvm_arch_async_pf arch
;
2693 arch
.token
= (vcpu
->arch
.apf
.id
++ << 12) | vcpu
->vcpu_id
;
2695 arch
.direct_map
= vcpu
->arch
.mmu
.direct_map
;
2696 arch
.cr3
= vcpu
->arch
.mmu
.get_cr3(vcpu
);
2698 return kvm_setup_async_pf(vcpu
, gva
, gfn
, &arch
);
2701 static bool can_do_async_pf(struct kvm_vcpu
*vcpu
)
2703 if (unlikely(!irqchip_in_kernel(vcpu
->kvm
) ||
2704 kvm_event_needs_reinjection(vcpu
)))
2707 return kvm_x86_ops
->interrupt_allowed(vcpu
);
2710 static bool try_async_pf(struct kvm_vcpu
*vcpu
, bool prefault
, gfn_t gfn
,
2711 gva_t gva
, pfn_t
*pfn
, bool write
, bool *writable
)
2715 *pfn
= gfn_to_pfn_async(vcpu
->kvm
, gfn
, &async
, write
, writable
);
2718 return false; /* *pfn has correct page already */
2720 put_page(pfn_to_page(*pfn
));
2722 if (!prefault
&& can_do_async_pf(vcpu
)) {
2723 trace_kvm_try_async_get_page(gva
, gfn
);
2724 if (kvm_find_async_pf_gfn(vcpu
, gfn
)) {
2725 trace_kvm_async_pf_doublefault(gva
, gfn
);
2726 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
2728 } else if (kvm_arch_setup_async_pf(vcpu
, gva
, gfn
))
2732 *pfn
= gfn_to_pfn_prot(vcpu
->kvm
, gfn
, write
, writable
);
2737 static int tdp_page_fault(struct kvm_vcpu
*vcpu
, gva_t gpa
, u32 error_code
,
2744 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
2745 unsigned long mmu_seq
;
2746 int write
= error_code
& PFERR_WRITE_MASK
;
2750 ASSERT(VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
2752 r
= mmu_topup_memory_caches(vcpu
);
2756 force_pt_level
= mapping_level_dirty_bitmap(vcpu
, gfn
);
2757 if (likely(!force_pt_level
)) {
2758 level
= mapping_level(vcpu
, gfn
);
2759 gfn
&= ~(KVM_PAGES_PER_HPAGE(level
) - 1);
2761 level
= PT_PAGE_TABLE_LEVEL
;
2763 mmu_seq
= vcpu
->kvm
->mmu_notifier_seq
;
2766 if (try_async_pf(vcpu
, prefault
, gfn
, gpa
, &pfn
, write
, &map_writable
))
2770 if (is_error_pfn(pfn
))
2771 return kvm_handle_bad_page(vcpu
->kvm
, gfn
, pfn
);
2772 spin_lock(&vcpu
->kvm
->mmu_lock
);
2773 if (mmu_notifier_retry(vcpu
, mmu_seq
))
2775 kvm_mmu_free_some_pages(vcpu
);
2776 if (likely(!force_pt_level
))
2777 transparent_hugepage_adjust(vcpu
, &gfn
, &pfn
, &level
);
2778 r
= __direct_map(vcpu
, gpa
, write
, map_writable
,
2779 level
, gfn
, pfn
, prefault
);
2780 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2785 spin_unlock(&vcpu
->kvm
->mmu_lock
);
2786 kvm_release_pfn_clean(pfn
);
2790 static void nonpaging_free(struct kvm_vcpu
*vcpu
)
2792 mmu_free_roots(vcpu
);
2795 static int nonpaging_init_context(struct kvm_vcpu
*vcpu
,
2796 struct kvm_mmu
*context
)
2798 context
->new_cr3
= nonpaging_new_cr3
;
2799 context
->page_fault
= nonpaging_page_fault
;
2800 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
2801 context
->free
= nonpaging_free
;
2802 context
->prefetch_page
= nonpaging_prefetch_page
;
2803 context
->sync_page
= nonpaging_sync_page
;
2804 context
->invlpg
= nonpaging_invlpg
;
2805 context
->update_pte
= nonpaging_update_pte
;
2806 context
->root_level
= 0;
2807 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2808 context
->root_hpa
= INVALID_PAGE
;
2809 context
->direct_map
= true;
2810 context
->nx
= false;
2814 void kvm_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
2816 ++vcpu
->stat
.tlb_flush
;
2817 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
2820 static void paging_new_cr3(struct kvm_vcpu
*vcpu
)
2822 pgprintk("%s: cr3 %lx\n", __func__
, kvm_read_cr3(vcpu
));
2823 mmu_free_roots(vcpu
);
2826 static unsigned long get_cr3(struct kvm_vcpu
*vcpu
)
2828 return kvm_read_cr3(vcpu
);
2831 static void inject_page_fault(struct kvm_vcpu
*vcpu
,
2832 struct x86_exception
*fault
)
2834 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
2837 static void paging_free(struct kvm_vcpu
*vcpu
)
2839 nonpaging_free(vcpu
);
2842 static bool is_rsvd_bits_set(struct kvm_mmu
*mmu
, u64 gpte
, int level
)
2846 bit7
= (gpte
>> 7) & 1;
2847 return (gpte
& mmu
->rsvd_bits_mask
[bit7
][level
-1]) != 0;
2851 #include "paging_tmpl.h"
2855 #include "paging_tmpl.h"
2858 static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu
,
2859 struct kvm_mmu
*context
,
2862 int maxphyaddr
= cpuid_maxphyaddr(vcpu
);
2863 u64 exb_bit_rsvd
= 0;
2866 exb_bit_rsvd
= rsvd_bits(63, 63);
2868 case PT32_ROOT_LEVEL
:
2869 /* no rsvd bits for 2 level 4K page table entries */
2870 context
->rsvd_bits_mask
[0][1] = 0;
2871 context
->rsvd_bits_mask
[0][0] = 0;
2872 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2874 if (!is_pse(vcpu
)) {
2875 context
->rsvd_bits_mask
[1][1] = 0;
2879 if (is_cpuid_PSE36())
2880 /* 36bits PSE 4MB page */
2881 context
->rsvd_bits_mask
[1][1] = rsvd_bits(17, 21);
2883 /* 32 bits PSE 4MB page */
2884 context
->rsvd_bits_mask
[1][1] = rsvd_bits(13, 21);
2886 case PT32E_ROOT_LEVEL
:
2887 context
->rsvd_bits_mask
[0][2] =
2888 rsvd_bits(maxphyaddr
, 63) |
2889 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2890 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2891 rsvd_bits(maxphyaddr
, 62); /* PDE */
2892 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2893 rsvd_bits(maxphyaddr
, 62); /* PTE */
2894 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2895 rsvd_bits(maxphyaddr
, 62) |
2896 rsvd_bits(13, 20); /* large page */
2897 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2899 case PT64_ROOT_LEVEL
:
2900 context
->rsvd_bits_mask
[0][3] = exb_bit_rsvd
|
2901 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2902 context
->rsvd_bits_mask
[0][2] = exb_bit_rsvd
|
2903 rsvd_bits(maxphyaddr
, 51) | rsvd_bits(7, 8);
2904 context
->rsvd_bits_mask
[0][1] = exb_bit_rsvd
|
2905 rsvd_bits(maxphyaddr
, 51);
2906 context
->rsvd_bits_mask
[0][0] = exb_bit_rsvd
|
2907 rsvd_bits(maxphyaddr
, 51);
2908 context
->rsvd_bits_mask
[1][3] = context
->rsvd_bits_mask
[0][3];
2909 context
->rsvd_bits_mask
[1][2] = exb_bit_rsvd
|
2910 rsvd_bits(maxphyaddr
, 51) |
2912 context
->rsvd_bits_mask
[1][1] = exb_bit_rsvd
|
2913 rsvd_bits(maxphyaddr
, 51) |
2914 rsvd_bits(13, 20); /* large page */
2915 context
->rsvd_bits_mask
[1][0] = context
->rsvd_bits_mask
[0][0];
2920 static int paging64_init_context_common(struct kvm_vcpu
*vcpu
,
2921 struct kvm_mmu
*context
,
2924 context
->nx
= is_nx(vcpu
);
2926 reset_rsvds_bits_mask(vcpu
, context
, level
);
2928 ASSERT(is_pae(vcpu
));
2929 context
->new_cr3
= paging_new_cr3
;
2930 context
->page_fault
= paging64_page_fault
;
2931 context
->gva_to_gpa
= paging64_gva_to_gpa
;
2932 context
->prefetch_page
= paging64_prefetch_page
;
2933 context
->sync_page
= paging64_sync_page
;
2934 context
->invlpg
= paging64_invlpg
;
2935 context
->update_pte
= paging64_update_pte
;
2936 context
->free
= paging_free
;
2937 context
->root_level
= level
;
2938 context
->shadow_root_level
= level
;
2939 context
->root_hpa
= INVALID_PAGE
;
2940 context
->direct_map
= false;
2944 static int paging64_init_context(struct kvm_vcpu
*vcpu
,
2945 struct kvm_mmu
*context
)
2947 return paging64_init_context_common(vcpu
, context
, PT64_ROOT_LEVEL
);
2950 static int paging32_init_context(struct kvm_vcpu
*vcpu
,
2951 struct kvm_mmu
*context
)
2953 context
->nx
= false;
2955 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
2957 context
->new_cr3
= paging_new_cr3
;
2958 context
->page_fault
= paging32_page_fault
;
2959 context
->gva_to_gpa
= paging32_gva_to_gpa
;
2960 context
->free
= paging_free
;
2961 context
->prefetch_page
= paging32_prefetch_page
;
2962 context
->sync_page
= paging32_sync_page
;
2963 context
->invlpg
= paging32_invlpg
;
2964 context
->update_pte
= paging32_update_pte
;
2965 context
->root_level
= PT32_ROOT_LEVEL
;
2966 context
->shadow_root_level
= PT32E_ROOT_LEVEL
;
2967 context
->root_hpa
= INVALID_PAGE
;
2968 context
->direct_map
= false;
2972 static int paging32E_init_context(struct kvm_vcpu
*vcpu
,
2973 struct kvm_mmu
*context
)
2975 return paging64_init_context_common(vcpu
, context
, PT32E_ROOT_LEVEL
);
2978 static int init_kvm_tdp_mmu(struct kvm_vcpu
*vcpu
)
2980 struct kvm_mmu
*context
= vcpu
->arch
.walk_mmu
;
2982 context
->base_role
.word
= 0;
2983 context
->new_cr3
= nonpaging_new_cr3
;
2984 context
->page_fault
= tdp_page_fault
;
2985 context
->free
= nonpaging_free
;
2986 context
->prefetch_page
= nonpaging_prefetch_page
;
2987 context
->sync_page
= nonpaging_sync_page
;
2988 context
->invlpg
= nonpaging_invlpg
;
2989 context
->update_pte
= nonpaging_update_pte
;
2990 context
->shadow_root_level
= kvm_x86_ops
->get_tdp_level();
2991 context
->root_hpa
= INVALID_PAGE
;
2992 context
->direct_map
= true;
2993 context
->set_cr3
= kvm_x86_ops
->set_tdp_cr3
;
2994 context
->get_cr3
= get_cr3
;
2995 context
->inject_page_fault
= kvm_inject_page_fault
;
2996 context
->nx
= is_nx(vcpu
);
2998 if (!is_paging(vcpu
)) {
2999 context
->nx
= false;
3000 context
->gva_to_gpa
= nonpaging_gva_to_gpa
;
3001 context
->root_level
= 0;
3002 } else if (is_long_mode(vcpu
)) {
3003 context
->nx
= is_nx(vcpu
);
3004 reset_rsvds_bits_mask(vcpu
, context
, PT64_ROOT_LEVEL
);
3005 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3006 context
->root_level
= PT64_ROOT_LEVEL
;
3007 } else if (is_pae(vcpu
)) {
3008 context
->nx
= is_nx(vcpu
);
3009 reset_rsvds_bits_mask(vcpu
, context
, PT32E_ROOT_LEVEL
);
3010 context
->gva_to_gpa
= paging64_gva_to_gpa
;
3011 context
->root_level
= PT32E_ROOT_LEVEL
;
3013 context
->nx
= false;
3014 reset_rsvds_bits_mask(vcpu
, context
, PT32_ROOT_LEVEL
);
3015 context
->gva_to_gpa
= paging32_gva_to_gpa
;
3016 context
->root_level
= PT32_ROOT_LEVEL
;
3022 int kvm_init_shadow_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*context
)
3026 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3028 if (!is_paging(vcpu
))
3029 r
= nonpaging_init_context(vcpu
, context
);
3030 else if (is_long_mode(vcpu
))
3031 r
= paging64_init_context(vcpu
, context
);
3032 else if (is_pae(vcpu
))
3033 r
= paging32E_init_context(vcpu
, context
);
3035 r
= paging32_init_context(vcpu
, context
);
3037 vcpu
->arch
.mmu
.base_role
.cr4_pae
= !!is_pae(vcpu
);
3038 vcpu
->arch
.mmu
.base_role
.cr0_wp
= is_write_protection(vcpu
);
3042 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu
);
3044 static int init_kvm_softmmu(struct kvm_vcpu
*vcpu
)
3046 int r
= kvm_init_shadow_mmu(vcpu
, vcpu
->arch
.walk_mmu
);
3048 vcpu
->arch
.walk_mmu
->set_cr3
= kvm_x86_ops
->set_cr3
;
3049 vcpu
->arch
.walk_mmu
->get_cr3
= get_cr3
;
3050 vcpu
->arch
.walk_mmu
->inject_page_fault
= kvm_inject_page_fault
;
3055 static int init_kvm_nested_mmu(struct kvm_vcpu
*vcpu
)
3057 struct kvm_mmu
*g_context
= &vcpu
->arch
.nested_mmu
;
3059 g_context
->get_cr3
= get_cr3
;
3060 g_context
->inject_page_fault
= kvm_inject_page_fault
;
3063 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3064 * translation of l2_gpa to l1_gpa addresses is done using the
3065 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3066 * functions between mmu and nested_mmu are swapped.
3068 if (!is_paging(vcpu
)) {
3069 g_context
->nx
= false;
3070 g_context
->root_level
= 0;
3071 g_context
->gva_to_gpa
= nonpaging_gva_to_gpa_nested
;
3072 } else if (is_long_mode(vcpu
)) {
3073 g_context
->nx
= is_nx(vcpu
);
3074 reset_rsvds_bits_mask(vcpu
, g_context
, PT64_ROOT_LEVEL
);
3075 g_context
->root_level
= PT64_ROOT_LEVEL
;
3076 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3077 } else if (is_pae(vcpu
)) {
3078 g_context
->nx
= is_nx(vcpu
);
3079 reset_rsvds_bits_mask(vcpu
, g_context
, PT32E_ROOT_LEVEL
);
3080 g_context
->root_level
= PT32E_ROOT_LEVEL
;
3081 g_context
->gva_to_gpa
= paging64_gva_to_gpa_nested
;
3083 g_context
->nx
= false;
3084 reset_rsvds_bits_mask(vcpu
, g_context
, PT32_ROOT_LEVEL
);
3085 g_context
->root_level
= PT32_ROOT_LEVEL
;
3086 g_context
->gva_to_gpa
= paging32_gva_to_gpa_nested
;
3092 static int init_kvm_mmu(struct kvm_vcpu
*vcpu
)
3094 if (mmu_is_nested(vcpu
))
3095 return init_kvm_nested_mmu(vcpu
);
3096 else if (tdp_enabled
)
3097 return init_kvm_tdp_mmu(vcpu
);
3099 return init_kvm_softmmu(vcpu
);
3102 static void destroy_kvm_mmu(struct kvm_vcpu
*vcpu
)
3105 if (VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
))
3106 /* mmu.free() should set root_hpa = INVALID_PAGE */
3107 vcpu
->arch
.mmu
.free(vcpu
);
3110 int kvm_mmu_reset_context(struct kvm_vcpu
*vcpu
)
3112 destroy_kvm_mmu(vcpu
);
3113 return init_kvm_mmu(vcpu
);
3115 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context
);
3117 int kvm_mmu_load(struct kvm_vcpu
*vcpu
)
3121 r
= mmu_topup_memory_caches(vcpu
);
3124 r
= mmu_alloc_roots(vcpu
);
3125 spin_lock(&vcpu
->kvm
->mmu_lock
);
3126 mmu_sync_roots(vcpu
);
3127 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3130 /* set_cr3() should ensure TLB has been flushed */
3131 vcpu
->arch
.mmu
.set_cr3(vcpu
, vcpu
->arch
.mmu
.root_hpa
);
3135 EXPORT_SYMBOL_GPL(kvm_mmu_load
);
3137 void kvm_mmu_unload(struct kvm_vcpu
*vcpu
)
3139 mmu_free_roots(vcpu
);
3141 EXPORT_SYMBOL_GPL(kvm_mmu_unload
);
3143 static void mmu_pte_write_zap_pte(struct kvm_vcpu
*vcpu
,
3144 struct kvm_mmu_page
*sp
,
3148 struct kvm_mmu_page
*child
;
3151 if (is_shadow_present_pte(pte
)) {
3152 if (is_last_spte(pte
, sp
->role
.level
))
3153 drop_spte(vcpu
->kvm
, spte
, shadow_trap_nonpresent_pte
);
3155 child
= page_header(pte
& PT64_BASE_ADDR_MASK
);
3156 mmu_page_remove_parent_pte(child
, spte
);
3159 __set_spte(spte
, shadow_trap_nonpresent_pte
);
3160 if (is_large_pte(pte
))
3161 --vcpu
->kvm
->stat
.lpages
;
3164 static void mmu_pte_write_new_pte(struct kvm_vcpu
*vcpu
,
3165 struct kvm_mmu_page
*sp
, u64
*spte
,
3168 if (sp
->role
.level
!= PT_PAGE_TABLE_LEVEL
) {
3169 ++vcpu
->kvm
->stat
.mmu_pde_zapped
;
3173 ++vcpu
->kvm
->stat
.mmu_pte_updated
;
3174 vcpu
->arch
.mmu
.update_pte(vcpu
, sp
, spte
, new);
3177 static bool need_remote_flush(u64 old
, u64
new)
3179 if (!is_shadow_present_pte(old
))
3181 if (!is_shadow_present_pte(new))
3183 if ((old
^ new) & PT64_BASE_ADDR_MASK
)
3185 old
^= PT64_NX_MASK
;
3186 new ^= PT64_NX_MASK
;
3187 return (old
& ~new & PT64_PERM_MASK
) != 0;
3190 static void mmu_pte_write_flush_tlb(struct kvm_vcpu
*vcpu
, bool zap_page
,
3191 bool remote_flush
, bool local_flush
)
3197 kvm_flush_remote_tlbs(vcpu
->kvm
);
3198 else if (local_flush
)
3199 kvm_mmu_flush_tlb(vcpu
);
3202 static bool last_updated_pte_accessed(struct kvm_vcpu
*vcpu
)
3204 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3206 return !!(spte
&& (*spte
& shadow_accessed_mask
));
3209 static void kvm_mmu_access_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
3211 u64
*spte
= vcpu
->arch
.last_pte_updated
;
3214 && vcpu
->arch
.last_pte_gfn
== gfn
3215 && shadow_accessed_mask
3216 && !(*spte
& shadow_accessed_mask
)
3217 && is_shadow_present_pte(*spte
))
3218 set_bit(PT_ACCESSED_SHIFT
, (unsigned long *)spte
);
3221 void kvm_mmu_pte_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3222 const u8
*new, int bytes
,
3223 bool guest_initiated
)
3225 gfn_t gfn
= gpa
>> PAGE_SHIFT
;
3226 union kvm_mmu_page_role mask
= { .word
= 0 };
3227 struct kvm_mmu_page
*sp
;
3228 struct hlist_node
*node
;
3229 LIST_HEAD(invalid_list
);
3230 u64 entry
, gentry
, *spte
;
3231 unsigned pte_size
, page_offset
, misaligned
, quadrant
, offset
;
3232 int level
, npte
, invlpg_counter
, r
, flooded
= 0;
3233 bool remote_flush
, local_flush
, zap_page
;
3235 zap_page
= remote_flush
= local_flush
= false;
3236 offset
= offset_in_page(gpa
);
3238 pgprintk("%s: gpa %llx bytes %d\n", __func__
, gpa
, bytes
);
3240 invlpg_counter
= atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
);
3243 * Assume that the pte write on a page table of the same type
3244 * as the current vcpu paging mode since we update the sptes only
3245 * when they have the same mode.
3247 if ((is_pae(vcpu
) && bytes
== 4) || !new) {
3248 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3253 r
= kvm_read_guest(vcpu
->kvm
, gpa
, &gentry
, min(bytes
, 8));
3256 new = (const u8
*)&gentry
;
3261 gentry
= *(const u32
*)new;
3264 gentry
= *(const u64
*)new;
3271 spin_lock(&vcpu
->kvm
->mmu_lock
);
3272 if (atomic_read(&vcpu
->kvm
->arch
.invlpg_counter
) != invlpg_counter
)
3274 kvm_mmu_free_some_pages(vcpu
);
3275 ++vcpu
->kvm
->stat
.mmu_pte_write
;
3276 trace_kvm_mmu_audit(vcpu
, AUDIT_PRE_PTE_WRITE
);
3277 if (guest_initiated
) {
3278 kvm_mmu_access_page(vcpu
, gfn
);
3279 if (gfn
== vcpu
->arch
.last_pt_write_gfn
3280 && !last_updated_pte_accessed(vcpu
)) {
3281 ++vcpu
->arch
.last_pt_write_count
;
3282 if (vcpu
->arch
.last_pt_write_count
>= 3)
3285 vcpu
->arch
.last_pt_write_gfn
= gfn
;
3286 vcpu
->arch
.last_pt_write_count
= 1;
3287 vcpu
->arch
.last_pte_updated
= NULL
;
3291 mask
.cr0_wp
= mask
.cr4_pae
= mask
.nxe
= 1;
3292 for_each_gfn_indirect_valid_sp(vcpu
->kvm
, sp
, gfn
, node
) {
3293 pte_size
= sp
->role
.cr4_pae
? 8 : 4;
3294 misaligned
= (offset
^ (offset
+ bytes
- 1)) & ~(pte_size
- 1);
3295 misaligned
|= bytes
< 4;
3296 if (misaligned
|| flooded
) {
3298 * Misaligned accesses are too much trouble to fix
3299 * up; also, they usually indicate a page is not used
3302 * If we're seeing too many writes to a page,
3303 * it may no longer be a page table, or we may be
3304 * forking, in which case it is better to unmap the
3307 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3308 gpa
, bytes
, sp
->role
.word
);
3309 zap_page
|= !!kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
,
3311 ++vcpu
->kvm
->stat
.mmu_flooded
;
3314 page_offset
= offset
;
3315 level
= sp
->role
.level
;
3317 if (!sp
->role
.cr4_pae
) {
3318 page_offset
<<= 1; /* 32->64 */
3320 * A 32-bit pde maps 4MB while the shadow pdes map
3321 * only 2MB. So we need to double the offset again
3322 * and zap two pdes instead of one.
3324 if (level
== PT32_ROOT_LEVEL
) {
3325 page_offset
&= ~7; /* kill rounding error */
3329 quadrant
= page_offset
>> PAGE_SHIFT
;
3330 page_offset
&= ~PAGE_MASK
;
3331 if (quadrant
!= sp
->role
.quadrant
)
3335 spte
= &sp
->spt
[page_offset
/ sizeof(*spte
)];
3338 mmu_pte_write_zap_pte(vcpu
, sp
, spte
);
3340 !((sp
->role
.word
^ vcpu
->arch
.mmu
.base_role
.word
)
3342 mmu_pte_write_new_pte(vcpu
, sp
, spte
, &gentry
);
3343 if (!remote_flush
&& need_remote_flush(entry
, *spte
))
3344 remote_flush
= true;
3348 mmu_pte_write_flush_tlb(vcpu
, zap_page
, remote_flush
, local_flush
);
3349 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3350 trace_kvm_mmu_audit(vcpu
, AUDIT_POST_PTE_WRITE
);
3351 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3354 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu
*vcpu
, gva_t gva
)
3359 if (vcpu
->arch
.mmu
.direct_map
)
3362 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, gva
, NULL
);
3364 spin_lock(&vcpu
->kvm
->mmu_lock
);
3365 r
= kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3366 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3369 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt
);
3371 void __kvm_mmu_free_some_pages(struct kvm_vcpu
*vcpu
)
3373 LIST_HEAD(invalid_list
);
3375 while (kvm_mmu_available_pages(vcpu
->kvm
) < KVM_REFILL_PAGES
&&
3376 !list_empty(&vcpu
->kvm
->arch
.active_mmu_pages
)) {
3377 struct kvm_mmu_page
*sp
;
3379 sp
= container_of(vcpu
->kvm
->arch
.active_mmu_pages
.prev
,
3380 struct kvm_mmu_page
, link
);
3381 kvm_mmu_prepare_zap_page(vcpu
->kvm
, sp
, &invalid_list
);
3382 kvm_mmu_commit_zap_page(vcpu
->kvm
, &invalid_list
);
3383 ++vcpu
->kvm
->stat
.mmu_recycled
;
3387 int kvm_mmu_page_fault(struct kvm_vcpu
*vcpu
, gva_t cr2
, u32 error_code
,
3388 void *insn
, int insn_len
)
3391 enum emulation_result er
;
3393 r
= vcpu
->arch
.mmu
.page_fault(vcpu
, cr2
, error_code
, false);
3402 r
= mmu_topup_memory_caches(vcpu
);
3406 er
= x86_emulate_instruction(vcpu
, cr2
, 0, insn
, insn_len
);
3411 case EMULATE_DO_MMIO
:
3412 ++vcpu
->stat
.mmio_exits
;
3422 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault
);
3424 void kvm_mmu_invlpg(struct kvm_vcpu
*vcpu
, gva_t gva
)
3426 vcpu
->arch
.mmu
.invlpg(vcpu
, gva
);
3427 kvm_mmu_flush_tlb(vcpu
);
3428 ++vcpu
->stat
.invlpg
;
3430 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg
);
3432 void kvm_enable_tdp(void)
3436 EXPORT_SYMBOL_GPL(kvm_enable_tdp
);
3438 void kvm_disable_tdp(void)
3440 tdp_enabled
= false;
3442 EXPORT_SYMBOL_GPL(kvm_disable_tdp
);
3444 static void free_mmu_pages(struct kvm_vcpu
*vcpu
)
3446 free_page((unsigned long)vcpu
->arch
.mmu
.pae_root
);
3447 if (vcpu
->arch
.mmu
.lm_root
!= NULL
)
3448 free_page((unsigned long)vcpu
->arch
.mmu
.lm_root
);
3451 static int alloc_mmu_pages(struct kvm_vcpu
*vcpu
)
3459 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3460 * Therefore we need to allocate shadow page tables in the first
3461 * 4GB of memory, which happens to fit the DMA32 zone.
3463 page
= alloc_page(GFP_KERNEL
| __GFP_DMA32
);
3467 vcpu
->arch
.mmu
.pae_root
= page_address(page
);
3468 for (i
= 0; i
< 4; ++i
)
3469 vcpu
->arch
.mmu
.pae_root
[i
] = INVALID_PAGE
;
3474 int kvm_mmu_create(struct kvm_vcpu
*vcpu
)
3477 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3479 return alloc_mmu_pages(vcpu
);
3482 int kvm_mmu_setup(struct kvm_vcpu
*vcpu
)
3485 ASSERT(!VALID_PAGE(vcpu
->arch
.mmu
.root_hpa
));
3487 return init_kvm_mmu(vcpu
);
3490 void kvm_mmu_slot_remove_write_access(struct kvm
*kvm
, int slot
)
3492 struct kvm_mmu_page
*sp
;
3494 list_for_each_entry(sp
, &kvm
->arch
.active_mmu_pages
, link
) {
3498 if (!test_bit(slot
, sp
->slot_bitmap
))
3502 for (i
= 0; i
< PT64_ENT_PER_PAGE
; ++i
) {
3503 if (!is_shadow_present_pte(pt
[i
]) ||
3504 !is_last_spte(pt
[i
], sp
->role
.level
))
3507 if (is_large_pte(pt
[i
])) {
3508 drop_spte(kvm
, &pt
[i
],
3509 shadow_trap_nonpresent_pte
);
3515 if (is_writable_pte(pt
[i
]))
3516 update_spte(&pt
[i
], pt
[i
] & ~PT_WRITABLE_MASK
);
3519 kvm_flush_remote_tlbs(kvm
);
3522 void kvm_mmu_zap_all(struct kvm
*kvm
)
3524 struct kvm_mmu_page
*sp
, *node
;
3525 LIST_HEAD(invalid_list
);
3527 spin_lock(&kvm
->mmu_lock
);
3529 list_for_each_entry_safe(sp
, node
, &kvm
->arch
.active_mmu_pages
, link
)
3530 if (kvm_mmu_prepare_zap_page(kvm
, sp
, &invalid_list
))
3533 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3534 spin_unlock(&kvm
->mmu_lock
);
3537 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm
*kvm
,
3538 struct list_head
*invalid_list
)
3540 struct kvm_mmu_page
*page
;
3542 page
= container_of(kvm
->arch
.active_mmu_pages
.prev
,
3543 struct kvm_mmu_page
, link
);
3544 return kvm_mmu_prepare_zap_page(kvm
, page
, invalid_list
);
3547 static int mmu_shrink(struct shrinker
*shrink
, struct shrink_control
*sc
)
3550 struct kvm
*kvm_freed
= NULL
;
3551 int nr_to_scan
= sc
->nr_to_scan
;
3553 if (nr_to_scan
== 0)
3556 raw_spin_lock(&kvm_lock
);
3558 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3559 int idx
, freed_pages
;
3560 LIST_HEAD(invalid_list
);
3562 idx
= srcu_read_lock(&kvm
->srcu
);
3563 spin_lock(&kvm
->mmu_lock
);
3564 if (!kvm_freed
&& nr_to_scan
> 0 &&
3565 kvm
->arch
.n_used_mmu_pages
> 0) {
3566 freed_pages
= kvm_mmu_remove_some_alloc_mmu_pages(kvm
,
3572 kvm_mmu_commit_zap_page(kvm
, &invalid_list
);
3573 spin_unlock(&kvm
->mmu_lock
);
3574 srcu_read_unlock(&kvm
->srcu
, idx
);
3577 list_move_tail(&kvm_freed
->vm_list
, &vm_list
);
3579 raw_spin_unlock(&kvm_lock
);
3582 return percpu_counter_read_positive(&kvm_total_used_mmu_pages
);
3585 static struct shrinker mmu_shrinker
= {
3586 .shrink
= mmu_shrink
,
3587 .seeks
= DEFAULT_SEEKS
* 10,
3590 static void mmu_destroy_caches(void)
3592 if (pte_chain_cache
)
3593 kmem_cache_destroy(pte_chain_cache
);
3594 if (rmap_desc_cache
)
3595 kmem_cache_destroy(rmap_desc_cache
);
3596 if (mmu_page_header_cache
)
3597 kmem_cache_destroy(mmu_page_header_cache
);
3600 int kvm_mmu_module_init(void)
3602 pte_chain_cache
= kmem_cache_create("kvm_pte_chain",
3603 sizeof(struct kvm_pte_chain
),
3605 if (!pte_chain_cache
)
3607 rmap_desc_cache
= kmem_cache_create("kvm_rmap_desc",
3608 sizeof(struct kvm_rmap_desc
),
3610 if (!rmap_desc_cache
)
3613 mmu_page_header_cache
= kmem_cache_create("kvm_mmu_page_header",
3614 sizeof(struct kvm_mmu_page
),
3616 if (!mmu_page_header_cache
)
3619 if (percpu_counter_init(&kvm_total_used_mmu_pages
, 0))
3622 register_shrinker(&mmu_shrinker
);
3627 mmu_destroy_caches();
3632 * Caculate mmu pages needed for kvm.
3634 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm
*kvm
)
3637 unsigned int nr_mmu_pages
;
3638 unsigned int nr_pages
= 0;
3639 struct kvm_memslots
*slots
;
3641 slots
= kvm_memslots(kvm
);
3643 for (i
= 0; i
< slots
->nmemslots
; i
++)
3644 nr_pages
+= slots
->memslots
[i
].npages
;
3646 nr_mmu_pages
= nr_pages
* KVM_PERMILLE_MMU_PAGES
/ 1000;
3647 nr_mmu_pages
= max(nr_mmu_pages
,
3648 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES
);
3650 return nr_mmu_pages
;
3653 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3656 if (len
> buffer
->len
)
3661 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer
*buffer
,
3666 ret
= pv_mmu_peek_buffer(buffer
, len
);
3671 buffer
->processed
+= len
;
3675 static int kvm_pv_mmu_write(struct kvm_vcpu
*vcpu
,
3676 gpa_t addr
, gpa_t value
)
3681 if (!is_long_mode(vcpu
) && !is_pae(vcpu
))
3684 r
= mmu_topup_memory_caches(vcpu
);
3688 if (!emulator_write_phys(vcpu
, addr
, &value
, bytes
))
3694 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu
*vcpu
)
3696 (void)kvm_set_cr3(vcpu
, kvm_read_cr3(vcpu
));
3700 static int kvm_pv_mmu_release_pt(struct kvm_vcpu
*vcpu
, gpa_t addr
)
3702 spin_lock(&vcpu
->kvm
->mmu_lock
);
3703 mmu_unshadow(vcpu
->kvm
, addr
>> PAGE_SHIFT
);
3704 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3708 static int kvm_pv_mmu_op_one(struct kvm_vcpu
*vcpu
,
3709 struct kvm_pv_mmu_op_buffer
*buffer
)
3711 struct kvm_mmu_op_header
*header
;
3713 header
= pv_mmu_peek_buffer(buffer
, sizeof *header
);
3716 switch (header
->op
) {
3717 case KVM_MMU_OP_WRITE_PTE
: {
3718 struct kvm_mmu_op_write_pte
*wpte
;
3720 wpte
= pv_mmu_read_buffer(buffer
, sizeof *wpte
);
3723 return kvm_pv_mmu_write(vcpu
, wpte
->pte_phys
,
3726 case KVM_MMU_OP_FLUSH_TLB
: {
3727 struct kvm_mmu_op_flush_tlb
*ftlb
;
3729 ftlb
= pv_mmu_read_buffer(buffer
, sizeof *ftlb
);
3732 return kvm_pv_mmu_flush_tlb(vcpu
);
3734 case KVM_MMU_OP_RELEASE_PT
: {
3735 struct kvm_mmu_op_release_pt
*rpt
;
3737 rpt
= pv_mmu_read_buffer(buffer
, sizeof *rpt
);
3740 return kvm_pv_mmu_release_pt(vcpu
, rpt
->pt_phys
);
3746 int kvm_pv_mmu_op(struct kvm_vcpu
*vcpu
, unsigned long bytes
,
3747 gpa_t addr
, unsigned long *ret
)
3750 struct kvm_pv_mmu_op_buffer
*buffer
= &vcpu
->arch
.mmu_op_buffer
;
3752 buffer
->ptr
= buffer
->buf
;
3753 buffer
->len
= min_t(unsigned long, bytes
, sizeof buffer
->buf
);
3754 buffer
->processed
= 0;
3756 r
= kvm_read_guest(vcpu
->kvm
, addr
, buffer
->buf
, buffer
->len
);
3760 while (buffer
->len
) {
3761 r
= kvm_pv_mmu_op_one(vcpu
, buffer
);
3770 *ret
= buffer
->processed
;
3774 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu
*vcpu
, u64 addr
, u64 sptes
[4])
3776 struct kvm_shadow_walk_iterator iterator
;
3779 spin_lock(&vcpu
->kvm
->mmu_lock
);
3780 for_each_shadow_entry(vcpu
, addr
, iterator
) {
3781 sptes
[iterator
.level
-1] = *iterator
.sptep
;
3783 if (!is_shadow_present_pte(*iterator
.sptep
))
3786 spin_unlock(&vcpu
->kvm
->mmu_lock
);
3790 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy
);
3792 void kvm_mmu_destroy(struct kvm_vcpu
*vcpu
)
3796 destroy_kvm_mmu(vcpu
);
3797 free_mmu_pages(vcpu
);
3798 mmu_free_memory_caches(vcpu
);
3801 #ifdef CONFIG_KVM_MMU_AUDIT
3802 #include "mmu_audit.c"
3804 static void mmu_audit_disable(void) { }
3807 void kvm_mmu_module_exit(void)
3809 mmu_destroy_caches();
3810 percpu_counter_destroy(&kvm_total_used_mmu_pages
);
3811 unregister_shrinker(&mmu_shrinker
);
3812 mmu_audit_disable();