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KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <trace/events/kvm.h>
44 #undef TRACE_INCLUDE_FILE
45 #define CREATE_TRACE_POINTS
46 #include "trace.h"
47
48 #include <asm/debugreg.h>
49 #include <asm/uaccess.h>
50 #include <asm/msr.h>
51 #include <asm/desc.h>
52 #include <asm/mtrr.h>
53 #include <asm/mce.h>
54
55 #define MAX_IO_MSRS 256
56 #define CR0_RESERVED_BITS \
57 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
58 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
59 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
60 #define CR4_RESERVED_BITS \
61 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
62 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
63 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
64 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
65
66 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
67
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
70
71 /* EFER defaults:
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
74 */
75 #ifdef CONFIG_X86_64
76 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
77 #else
78 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
79 #endif
80
81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83
84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
86 struct kvm_cpuid_entry2 __user *entries);
87
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
90
91 int ignore_msrs = 0;
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
93
94 #define KVM_NR_SHARED_MSRS 16
95
96 struct kvm_shared_msrs_global {
97 int nr;
98 u32 msrs[KVM_NR_SHARED_MSRS];
99 };
100
101 struct kvm_shared_msrs {
102 struct user_return_notifier urn;
103 bool registered;
104 struct kvm_shared_msr_values {
105 u64 host;
106 u64 curr;
107 } values[KVM_NR_SHARED_MSRS];
108 };
109
110 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
111 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
112
113 struct kvm_stats_debugfs_item debugfs_entries[] = {
114 { "pf_fixed", VCPU_STAT(pf_fixed) },
115 { "pf_guest", VCPU_STAT(pf_guest) },
116 { "tlb_flush", VCPU_STAT(tlb_flush) },
117 { "invlpg", VCPU_STAT(invlpg) },
118 { "exits", VCPU_STAT(exits) },
119 { "io_exits", VCPU_STAT(io_exits) },
120 { "mmio_exits", VCPU_STAT(mmio_exits) },
121 { "signal_exits", VCPU_STAT(signal_exits) },
122 { "irq_window", VCPU_STAT(irq_window_exits) },
123 { "nmi_window", VCPU_STAT(nmi_window_exits) },
124 { "halt_exits", VCPU_STAT(halt_exits) },
125 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
126 { "hypercalls", VCPU_STAT(hypercalls) },
127 { "request_irq", VCPU_STAT(request_irq_exits) },
128 { "irq_exits", VCPU_STAT(irq_exits) },
129 { "host_state_reload", VCPU_STAT(host_state_reload) },
130 { "efer_reload", VCPU_STAT(efer_reload) },
131 { "fpu_reload", VCPU_STAT(fpu_reload) },
132 { "insn_emulation", VCPU_STAT(insn_emulation) },
133 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
134 { "irq_injections", VCPU_STAT(irq_injections) },
135 { "nmi_injections", VCPU_STAT(nmi_injections) },
136 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
137 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
138 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
139 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
140 { "mmu_flooded", VM_STAT(mmu_flooded) },
141 { "mmu_recycled", VM_STAT(mmu_recycled) },
142 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
143 { "mmu_unsync", VM_STAT(mmu_unsync) },
144 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
145 { "largepages", VM_STAT(lpages) },
146 { NULL }
147 };
148
149 static void kvm_on_user_return(struct user_return_notifier *urn)
150 {
151 unsigned slot;
152 struct kvm_shared_msrs *locals
153 = container_of(urn, struct kvm_shared_msrs, urn);
154 struct kvm_shared_msr_values *values;
155
156 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
157 values = &locals->values[slot];
158 if (values->host != values->curr) {
159 wrmsrl(shared_msrs_global.msrs[slot], values->host);
160 values->curr = values->host;
161 }
162 }
163 locals->registered = false;
164 user_return_notifier_unregister(urn);
165 }
166
167 static void shared_msr_update(unsigned slot, u32 msr)
168 {
169 struct kvm_shared_msrs *smsr;
170 u64 value;
171
172 smsr = &__get_cpu_var(shared_msrs);
173 /* only read, and nobody should modify it at this time,
174 * so don't need lock */
175 if (slot >= shared_msrs_global.nr) {
176 printk(KERN_ERR "kvm: invalid MSR slot!");
177 return;
178 }
179 rdmsrl_safe(msr, &value);
180 smsr->values[slot].host = value;
181 smsr->values[slot].curr = value;
182 }
183
184 void kvm_define_shared_msr(unsigned slot, u32 msr)
185 {
186 if (slot >= shared_msrs_global.nr)
187 shared_msrs_global.nr = slot + 1;
188 shared_msrs_global.msrs[slot] = msr;
189 /* we need ensured the shared_msr_global have been updated */
190 smp_wmb();
191 }
192 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
193
194 static void kvm_shared_msr_cpu_online(void)
195 {
196 unsigned i;
197
198 for (i = 0; i < shared_msrs_global.nr; ++i)
199 shared_msr_update(i, shared_msrs_global.msrs[i]);
200 }
201
202 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
203 {
204 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
205
206 if (((value ^ smsr->values[slot].curr) & mask) == 0)
207 return;
208 smsr->values[slot].curr = value;
209 wrmsrl(shared_msrs_global.msrs[slot], value);
210 if (!smsr->registered) {
211 smsr->urn.on_user_return = kvm_on_user_return;
212 user_return_notifier_register(&smsr->urn);
213 smsr->registered = true;
214 }
215 }
216 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
217
218 static void drop_user_return_notifiers(void *ignore)
219 {
220 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
221
222 if (smsr->registered)
223 kvm_on_user_return(&smsr->urn);
224 }
225
226 unsigned long segment_base(u16 selector)
227 {
228 struct descriptor_table gdt;
229 struct desc_struct *d;
230 unsigned long table_base;
231 unsigned long v;
232
233 if (selector == 0)
234 return 0;
235
236 kvm_get_gdt(&gdt);
237 table_base = gdt.base;
238
239 if (selector & 4) { /* from ldt */
240 u16 ldt_selector = kvm_read_ldt();
241
242 table_base = segment_base(ldt_selector);
243 }
244 d = (struct desc_struct *)(table_base + (selector & ~7));
245 v = get_desc_base(d);
246 #ifdef CONFIG_X86_64
247 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
248 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
249 #endif
250 return v;
251 }
252 EXPORT_SYMBOL_GPL(segment_base);
253
254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
255 {
256 if (irqchip_in_kernel(vcpu->kvm))
257 return vcpu->arch.apic_base;
258 else
259 return vcpu->arch.apic_base;
260 }
261 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
262
263 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
264 {
265 /* TODO: reserve bits check */
266 if (irqchip_in_kernel(vcpu->kvm))
267 kvm_lapic_set_base(vcpu, data);
268 else
269 vcpu->arch.apic_base = data;
270 }
271 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
272
273 #define EXCPT_BENIGN 0
274 #define EXCPT_CONTRIBUTORY 1
275 #define EXCPT_PF 2
276
277 static int exception_class(int vector)
278 {
279 switch (vector) {
280 case PF_VECTOR:
281 return EXCPT_PF;
282 case DE_VECTOR:
283 case TS_VECTOR:
284 case NP_VECTOR:
285 case SS_VECTOR:
286 case GP_VECTOR:
287 return EXCPT_CONTRIBUTORY;
288 default:
289 break;
290 }
291 return EXCPT_BENIGN;
292 }
293
294 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
295 unsigned nr, bool has_error, u32 error_code)
296 {
297 u32 prev_nr;
298 int class1, class2;
299
300 if (!vcpu->arch.exception.pending) {
301 queue:
302 vcpu->arch.exception.pending = true;
303 vcpu->arch.exception.has_error_code = has_error;
304 vcpu->arch.exception.nr = nr;
305 vcpu->arch.exception.error_code = error_code;
306 return;
307 }
308
309 /* to check exception */
310 prev_nr = vcpu->arch.exception.nr;
311 if (prev_nr == DF_VECTOR) {
312 /* triple fault -> shutdown */
313 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
314 return;
315 }
316 class1 = exception_class(prev_nr);
317 class2 = exception_class(nr);
318 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
319 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
320 /* generate double fault per SDM Table 5-5 */
321 vcpu->arch.exception.pending = true;
322 vcpu->arch.exception.has_error_code = true;
323 vcpu->arch.exception.nr = DF_VECTOR;
324 vcpu->arch.exception.error_code = 0;
325 } else
326 /* replace previous exception with a new one in a hope
327 that instruction re-execution will regenerate lost
328 exception */
329 goto queue;
330 }
331
332 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
333 {
334 kvm_multiple_exception(vcpu, nr, false, 0);
335 }
336 EXPORT_SYMBOL_GPL(kvm_queue_exception);
337
338 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
339 u32 error_code)
340 {
341 ++vcpu->stat.pf_guest;
342 vcpu->arch.cr2 = addr;
343 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
344 }
345
346 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
347 {
348 vcpu->arch.nmi_pending = 1;
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
351
352 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
353 {
354 kvm_multiple_exception(vcpu, nr, true, error_code);
355 }
356 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
357
358 /*
359 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
360 * a #GP and return false.
361 */
362 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
363 {
364 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
365 return true;
366 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
367 return false;
368 }
369 EXPORT_SYMBOL_GPL(kvm_require_cpl);
370
371 /*
372 * Load the pae pdptrs. Return true is they are all valid.
373 */
374 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
375 {
376 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
377 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
378 int i;
379 int ret;
380 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
381
382 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
383 offset * sizeof(u64), sizeof(pdpte));
384 if (ret < 0) {
385 ret = 0;
386 goto out;
387 }
388 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
389 if (is_present_gpte(pdpte[i]) &&
390 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
391 ret = 0;
392 goto out;
393 }
394 }
395 ret = 1;
396
397 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_avail);
400 __set_bit(VCPU_EXREG_PDPTR,
401 (unsigned long *)&vcpu->arch.regs_dirty);
402 out:
403
404 return ret;
405 }
406 EXPORT_SYMBOL_GPL(load_pdptrs);
407
408 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
409 {
410 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
411 bool changed = true;
412 int r;
413
414 if (is_long_mode(vcpu) || !is_pae(vcpu))
415 return false;
416
417 if (!test_bit(VCPU_EXREG_PDPTR,
418 (unsigned long *)&vcpu->arch.regs_avail))
419 return true;
420
421 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
422 if (r < 0)
423 goto out;
424 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
425 out:
426
427 return changed;
428 }
429
430 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
431 {
432 cr0 |= X86_CR0_ET;
433
434 #ifdef CONFIG_X86_64
435 if (cr0 & 0xffffffff00000000UL) {
436 kvm_inject_gp(vcpu, 0);
437 return;
438 }
439 #endif
440
441 cr0 &= ~CR0_RESERVED_BITS;
442
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
444 kvm_inject_gp(vcpu, 0);
445 return;
446 }
447
448 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
449 kvm_inject_gp(vcpu, 0);
450 return;
451 }
452
453 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
454 #ifdef CONFIG_X86_64
455 if ((vcpu->arch.efer & EFER_LME)) {
456 int cs_db, cs_l;
457
458 if (!is_pae(vcpu)) {
459 kvm_inject_gp(vcpu, 0);
460 return;
461 }
462 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
463 if (cs_l) {
464 kvm_inject_gp(vcpu, 0);
465 return;
466
467 }
468 } else
469 #endif
470 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
471 kvm_inject_gp(vcpu, 0);
472 return;
473 }
474
475 }
476
477 kvm_x86_ops->set_cr0(vcpu, cr0);
478 vcpu->arch.cr0 = cr0;
479
480 kvm_mmu_reset_context(vcpu);
481 return;
482 }
483 EXPORT_SYMBOL_GPL(kvm_set_cr0);
484
485 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
486 {
487 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
488 }
489 EXPORT_SYMBOL_GPL(kvm_lmsw);
490
491 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
492 {
493 unsigned long old_cr4 = kvm_read_cr4(vcpu);
494 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
495
496 if (cr4 & CR4_RESERVED_BITS) {
497 kvm_inject_gp(vcpu, 0);
498 return;
499 }
500
501 if (is_long_mode(vcpu)) {
502 if (!(cr4 & X86_CR4_PAE)) {
503 kvm_inject_gp(vcpu, 0);
504 return;
505 }
506 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
507 && ((cr4 ^ old_cr4) & pdptr_bits)
508 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
509 kvm_inject_gp(vcpu, 0);
510 return;
511 }
512
513 if (cr4 & X86_CR4_VMXE) {
514 kvm_inject_gp(vcpu, 0);
515 return;
516 }
517 kvm_x86_ops->set_cr4(vcpu, cr4);
518 vcpu->arch.cr4 = cr4;
519 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
520 kvm_mmu_reset_context(vcpu);
521 }
522 EXPORT_SYMBOL_GPL(kvm_set_cr4);
523
524 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
525 {
526 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
527 kvm_mmu_sync_roots(vcpu);
528 kvm_mmu_flush_tlb(vcpu);
529 return;
530 }
531
532 if (is_long_mode(vcpu)) {
533 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
534 kvm_inject_gp(vcpu, 0);
535 return;
536 }
537 } else {
538 if (is_pae(vcpu)) {
539 if (cr3 & CR3_PAE_RESERVED_BITS) {
540 kvm_inject_gp(vcpu, 0);
541 return;
542 }
543 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
544 kvm_inject_gp(vcpu, 0);
545 return;
546 }
547 }
548 /*
549 * We don't check reserved bits in nonpae mode, because
550 * this isn't enforced, and VMware depends on this.
551 */
552 }
553
554 /*
555 * Does the new cr3 value map to physical memory? (Note, we
556 * catch an invalid cr3 even in real-mode, because it would
557 * cause trouble later on when we turn on paging anyway.)
558 *
559 * A real CPU would silently accept an invalid cr3 and would
560 * attempt to use it - with largely undefined (and often hard
561 * to debug) behavior on the guest side.
562 */
563 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
564 kvm_inject_gp(vcpu, 0);
565 else {
566 vcpu->arch.cr3 = cr3;
567 vcpu->arch.mmu.new_cr3(vcpu);
568 }
569 }
570 EXPORT_SYMBOL_GPL(kvm_set_cr3);
571
572 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
573 {
574 if (cr8 & CR8_RESERVED_BITS) {
575 kvm_inject_gp(vcpu, 0);
576 return;
577 }
578 if (irqchip_in_kernel(vcpu->kvm))
579 kvm_lapic_set_tpr(vcpu, cr8);
580 else
581 vcpu->arch.cr8 = cr8;
582 }
583 EXPORT_SYMBOL_GPL(kvm_set_cr8);
584
585 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
586 {
587 if (irqchip_in_kernel(vcpu->kvm))
588 return kvm_lapic_get_cr8(vcpu);
589 else
590 return vcpu->arch.cr8;
591 }
592 EXPORT_SYMBOL_GPL(kvm_get_cr8);
593
594 static inline u32 bit(int bitno)
595 {
596 return 1 << (bitno & 31);
597 }
598
599 /*
600 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
601 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
602 *
603 * This list is modified at module load time to reflect the
604 * capabilities of the host cpu. This capabilities test skips MSRs that are
605 * kvm-specific. Those are put in the beginning of the list.
606 */
607
608 #define KVM_SAVE_MSRS_BEGIN 5
609 static u32 msrs_to_save[] = {
610 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
611 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
612 HV_X64_MSR_APIC_ASSIST_PAGE,
613 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
614 MSR_K6_STAR,
615 #ifdef CONFIG_X86_64
616 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
617 #endif
618 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
619 };
620
621 static unsigned num_msrs_to_save;
622
623 static u32 emulated_msrs[] = {
624 MSR_IA32_MISC_ENABLE,
625 };
626
627 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
628 {
629 if (efer & efer_reserved_bits) {
630 kvm_inject_gp(vcpu, 0);
631 return;
632 }
633
634 if (is_paging(vcpu)
635 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
636 kvm_inject_gp(vcpu, 0);
637 return;
638 }
639
640 if (efer & EFER_FFXSR) {
641 struct kvm_cpuid_entry2 *feat;
642
643 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
644 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
645 kvm_inject_gp(vcpu, 0);
646 return;
647 }
648 }
649
650 if (efer & EFER_SVME) {
651 struct kvm_cpuid_entry2 *feat;
652
653 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
654 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
655 kvm_inject_gp(vcpu, 0);
656 return;
657 }
658 }
659
660 kvm_x86_ops->set_efer(vcpu, efer);
661
662 efer &= ~EFER_LMA;
663 efer |= vcpu->arch.efer & EFER_LMA;
664
665 vcpu->arch.efer = efer;
666
667 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
668 kvm_mmu_reset_context(vcpu);
669 }
670
671 void kvm_enable_efer_bits(u64 mask)
672 {
673 efer_reserved_bits &= ~mask;
674 }
675 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
676
677
678 /*
679 * Writes msr value into into the appropriate "register".
680 * Returns 0 on success, non-0 otherwise.
681 * Assumes vcpu_load() was already called.
682 */
683 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
684 {
685 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
686 }
687
688 /*
689 * Adapt set_msr() to msr_io()'s calling convention
690 */
691 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
692 {
693 return kvm_set_msr(vcpu, index, *data);
694 }
695
696 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
697 {
698 static int version;
699 struct pvclock_wall_clock wc;
700 struct timespec boot;
701
702 if (!wall_clock)
703 return;
704
705 version++;
706
707 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
708
709 /*
710 * The guest calculates current wall clock time by adding
711 * system time (updated by kvm_write_guest_time below) to the
712 * wall clock specified here. guest system time equals host
713 * system time for us, thus we must fill in host boot time here.
714 */
715 getboottime(&boot);
716
717 wc.sec = boot.tv_sec;
718 wc.nsec = boot.tv_nsec;
719 wc.version = version;
720
721 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
722
723 version++;
724 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
725 }
726
727 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
728 {
729 uint32_t quotient, remainder;
730
731 /* Don't try to replace with do_div(), this one calculates
732 * "(dividend << 32) / divisor" */
733 __asm__ ( "divl %4"
734 : "=a" (quotient), "=d" (remainder)
735 : "0" (0), "1" (dividend), "r" (divisor) );
736 return quotient;
737 }
738
739 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
740 {
741 uint64_t nsecs = 1000000000LL;
742 int32_t shift = 0;
743 uint64_t tps64;
744 uint32_t tps32;
745
746 tps64 = tsc_khz * 1000LL;
747 while (tps64 > nsecs*2) {
748 tps64 >>= 1;
749 shift--;
750 }
751
752 tps32 = (uint32_t)tps64;
753 while (tps32 <= (uint32_t)nsecs) {
754 tps32 <<= 1;
755 shift++;
756 }
757
758 hv_clock->tsc_shift = shift;
759 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
760
761 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
762 __func__, tsc_khz, hv_clock->tsc_shift,
763 hv_clock->tsc_to_system_mul);
764 }
765
766 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
767
768 static void kvm_write_guest_time(struct kvm_vcpu *v)
769 {
770 struct timespec ts;
771 unsigned long flags;
772 struct kvm_vcpu_arch *vcpu = &v->arch;
773 void *shared_kaddr;
774 unsigned long this_tsc_khz;
775
776 if ((!vcpu->time_page))
777 return;
778
779 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
780 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
781 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
782 vcpu->hv_clock_tsc_khz = this_tsc_khz;
783 }
784 put_cpu_var(cpu_tsc_khz);
785
786 /* Keep irq disabled to prevent changes to the clock */
787 local_irq_save(flags);
788 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
789 ktime_get_ts(&ts);
790 monotonic_to_bootbased(&ts);
791 local_irq_restore(flags);
792
793 /* With all the info we got, fill in the values */
794
795 vcpu->hv_clock.system_time = ts.tv_nsec +
796 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
797
798 /*
799 * The interface expects us to write an even number signaling that the
800 * update is finished. Since the guest won't see the intermediate
801 * state, we just increase by 2 at the end.
802 */
803 vcpu->hv_clock.version += 2;
804
805 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
806
807 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
808 sizeof(vcpu->hv_clock));
809
810 kunmap_atomic(shared_kaddr, KM_USER0);
811
812 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
813 }
814
815 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
816 {
817 struct kvm_vcpu_arch *vcpu = &v->arch;
818
819 if (!vcpu->time_page)
820 return 0;
821 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
822 return 1;
823 }
824
825 static bool msr_mtrr_valid(unsigned msr)
826 {
827 switch (msr) {
828 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
829 case MSR_MTRRfix64K_00000:
830 case MSR_MTRRfix16K_80000:
831 case MSR_MTRRfix16K_A0000:
832 case MSR_MTRRfix4K_C0000:
833 case MSR_MTRRfix4K_C8000:
834 case MSR_MTRRfix4K_D0000:
835 case MSR_MTRRfix4K_D8000:
836 case MSR_MTRRfix4K_E0000:
837 case MSR_MTRRfix4K_E8000:
838 case MSR_MTRRfix4K_F0000:
839 case MSR_MTRRfix4K_F8000:
840 case MSR_MTRRdefType:
841 case MSR_IA32_CR_PAT:
842 return true;
843 case 0x2f8:
844 return true;
845 }
846 return false;
847 }
848
849 static bool valid_pat_type(unsigned t)
850 {
851 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
852 }
853
854 static bool valid_mtrr_type(unsigned t)
855 {
856 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
857 }
858
859 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
860 {
861 int i;
862
863 if (!msr_mtrr_valid(msr))
864 return false;
865
866 if (msr == MSR_IA32_CR_PAT) {
867 for (i = 0; i < 8; i++)
868 if (!valid_pat_type((data >> (i * 8)) & 0xff))
869 return false;
870 return true;
871 } else if (msr == MSR_MTRRdefType) {
872 if (data & ~0xcff)
873 return false;
874 return valid_mtrr_type(data & 0xff);
875 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
876 for (i = 0; i < 8 ; i++)
877 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
878 return false;
879 return true;
880 }
881
882 /* variable MTRRs */
883 return valid_mtrr_type(data & 0xff);
884 }
885
886 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
887 {
888 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
889
890 if (!mtrr_valid(vcpu, msr, data))
891 return 1;
892
893 if (msr == MSR_MTRRdefType) {
894 vcpu->arch.mtrr_state.def_type = data;
895 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
896 } else if (msr == MSR_MTRRfix64K_00000)
897 p[0] = data;
898 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
899 p[1 + msr - MSR_MTRRfix16K_80000] = data;
900 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
901 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
902 else if (msr == MSR_IA32_CR_PAT)
903 vcpu->arch.pat = data;
904 else { /* Variable MTRRs */
905 int idx, is_mtrr_mask;
906 u64 *pt;
907
908 idx = (msr - 0x200) / 2;
909 is_mtrr_mask = msr - 0x200 - 2 * idx;
910 if (!is_mtrr_mask)
911 pt =
912 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
913 else
914 pt =
915 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
916 *pt = data;
917 }
918
919 kvm_mmu_reset_context(vcpu);
920 return 0;
921 }
922
923 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
924 {
925 u64 mcg_cap = vcpu->arch.mcg_cap;
926 unsigned bank_num = mcg_cap & 0xff;
927
928 switch (msr) {
929 case MSR_IA32_MCG_STATUS:
930 vcpu->arch.mcg_status = data;
931 break;
932 case MSR_IA32_MCG_CTL:
933 if (!(mcg_cap & MCG_CTL_P))
934 return 1;
935 if (data != 0 && data != ~(u64)0)
936 return -1;
937 vcpu->arch.mcg_ctl = data;
938 break;
939 default:
940 if (msr >= MSR_IA32_MC0_CTL &&
941 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
942 u32 offset = msr - MSR_IA32_MC0_CTL;
943 /* only 0 or all 1s can be written to IA32_MCi_CTL
944 * some Linux kernels though clear bit 10 in bank 4 to
945 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
946 * this to avoid an uncatched #GP in the guest
947 */
948 if ((offset & 0x3) == 0 &&
949 data != 0 && (data | (1 << 10)) != ~(u64)0)
950 return -1;
951 vcpu->arch.mce_banks[offset] = data;
952 break;
953 }
954 return 1;
955 }
956 return 0;
957 }
958
959 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
960 {
961 struct kvm *kvm = vcpu->kvm;
962 int lm = is_long_mode(vcpu);
963 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
964 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
965 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
966 : kvm->arch.xen_hvm_config.blob_size_32;
967 u32 page_num = data & ~PAGE_MASK;
968 u64 page_addr = data & PAGE_MASK;
969 u8 *page;
970 int r;
971
972 r = -E2BIG;
973 if (page_num >= blob_size)
974 goto out;
975 r = -ENOMEM;
976 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
977 if (!page)
978 goto out;
979 r = -EFAULT;
980 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
981 goto out_free;
982 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
983 goto out_free;
984 r = 0;
985 out_free:
986 kfree(page);
987 out:
988 return r;
989 }
990
991 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
992 {
993 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
994 }
995
996 static bool kvm_hv_msr_partition_wide(u32 msr)
997 {
998 bool r = false;
999 switch (msr) {
1000 case HV_X64_MSR_GUEST_OS_ID:
1001 case HV_X64_MSR_HYPERCALL:
1002 r = true;
1003 break;
1004 }
1005
1006 return r;
1007 }
1008
1009 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1010 {
1011 struct kvm *kvm = vcpu->kvm;
1012
1013 switch (msr) {
1014 case HV_X64_MSR_GUEST_OS_ID:
1015 kvm->arch.hv_guest_os_id = data;
1016 /* setting guest os id to zero disables hypercall page */
1017 if (!kvm->arch.hv_guest_os_id)
1018 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1019 break;
1020 case HV_X64_MSR_HYPERCALL: {
1021 u64 gfn;
1022 unsigned long addr;
1023 u8 instructions[4];
1024
1025 /* if guest os id is not set hypercall should remain disabled */
1026 if (!kvm->arch.hv_guest_os_id)
1027 break;
1028 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1029 kvm->arch.hv_hypercall = data;
1030 break;
1031 }
1032 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1033 addr = gfn_to_hva(kvm, gfn);
1034 if (kvm_is_error_hva(addr))
1035 return 1;
1036 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1037 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1038 if (copy_to_user((void __user *)addr, instructions, 4))
1039 return 1;
1040 kvm->arch.hv_hypercall = data;
1041 break;
1042 }
1043 default:
1044 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1045 "data 0x%llx\n", msr, data);
1046 return 1;
1047 }
1048 return 0;
1049 }
1050
1051 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1052 {
1053 switch (msr) {
1054 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1055 unsigned long addr;
1056
1057 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1058 vcpu->arch.hv_vapic = data;
1059 break;
1060 }
1061 addr = gfn_to_hva(vcpu->kvm, data >>
1062 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1063 if (kvm_is_error_hva(addr))
1064 return 1;
1065 if (clear_user((void __user *)addr, PAGE_SIZE))
1066 return 1;
1067 vcpu->arch.hv_vapic = data;
1068 break;
1069 }
1070 case HV_X64_MSR_EOI:
1071 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1072 case HV_X64_MSR_ICR:
1073 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1074 case HV_X64_MSR_TPR:
1075 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1076 default:
1077 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1078 "data 0x%llx\n", msr, data);
1079 return 1;
1080 }
1081
1082 return 0;
1083 }
1084
1085 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1086 {
1087 switch (msr) {
1088 case MSR_EFER:
1089 set_efer(vcpu, data);
1090 break;
1091 case MSR_K7_HWCR:
1092 data &= ~(u64)0x40; /* ignore flush filter disable */
1093 if (data != 0) {
1094 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1095 data);
1096 return 1;
1097 }
1098 break;
1099 case MSR_FAM10H_MMIO_CONF_BASE:
1100 if (data != 0) {
1101 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1102 "0x%llx\n", data);
1103 return 1;
1104 }
1105 break;
1106 case MSR_AMD64_NB_CFG:
1107 break;
1108 case MSR_IA32_DEBUGCTLMSR:
1109 if (!data) {
1110 /* We support the non-activated case already */
1111 break;
1112 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1113 /* Values other than LBR and BTF are vendor-specific,
1114 thus reserved and should throw a #GP */
1115 return 1;
1116 }
1117 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1118 __func__, data);
1119 break;
1120 case MSR_IA32_UCODE_REV:
1121 case MSR_IA32_UCODE_WRITE:
1122 case MSR_VM_HSAVE_PA:
1123 case MSR_AMD64_PATCH_LOADER:
1124 break;
1125 case 0x200 ... 0x2ff:
1126 return set_msr_mtrr(vcpu, msr, data);
1127 case MSR_IA32_APICBASE:
1128 kvm_set_apic_base(vcpu, data);
1129 break;
1130 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1131 return kvm_x2apic_msr_write(vcpu, msr, data);
1132 case MSR_IA32_MISC_ENABLE:
1133 vcpu->arch.ia32_misc_enable_msr = data;
1134 break;
1135 case MSR_KVM_WALL_CLOCK:
1136 vcpu->kvm->arch.wall_clock = data;
1137 kvm_write_wall_clock(vcpu->kvm, data);
1138 break;
1139 case MSR_KVM_SYSTEM_TIME: {
1140 if (vcpu->arch.time_page) {
1141 kvm_release_page_dirty(vcpu->arch.time_page);
1142 vcpu->arch.time_page = NULL;
1143 }
1144
1145 vcpu->arch.time = data;
1146
1147 /* we verify if the enable bit is set... */
1148 if (!(data & 1))
1149 break;
1150
1151 /* ...but clean it before doing the actual write */
1152 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1153
1154 vcpu->arch.time_page =
1155 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1156
1157 if (is_error_page(vcpu->arch.time_page)) {
1158 kvm_release_page_clean(vcpu->arch.time_page);
1159 vcpu->arch.time_page = NULL;
1160 }
1161
1162 kvm_request_guest_time_update(vcpu);
1163 break;
1164 }
1165 case MSR_IA32_MCG_CTL:
1166 case MSR_IA32_MCG_STATUS:
1167 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1168 return set_msr_mce(vcpu, msr, data);
1169
1170 /* Performance counters are not protected by a CPUID bit,
1171 * so we should check all of them in the generic path for the sake of
1172 * cross vendor migration.
1173 * Writing a zero into the event select MSRs disables them,
1174 * which we perfectly emulate ;-). Any other value should be at least
1175 * reported, some guests depend on them.
1176 */
1177 case MSR_P6_EVNTSEL0:
1178 case MSR_P6_EVNTSEL1:
1179 case MSR_K7_EVNTSEL0:
1180 case MSR_K7_EVNTSEL1:
1181 case MSR_K7_EVNTSEL2:
1182 case MSR_K7_EVNTSEL3:
1183 if (data != 0)
1184 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1185 "0x%x data 0x%llx\n", msr, data);
1186 break;
1187 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1188 * so we ignore writes to make it happy.
1189 */
1190 case MSR_P6_PERFCTR0:
1191 case MSR_P6_PERFCTR1:
1192 case MSR_K7_PERFCTR0:
1193 case MSR_K7_PERFCTR1:
1194 case MSR_K7_PERFCTR2:
1195 case MSR_K7_PERFCTR3:
1196 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1197 "0x%x data 0x%llx\n", msr, data);
1198 break;
1199 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1200 if (kvm_hv_msr_partition_wide(msr)) {
1201 int r;
1202 mutex_lock(&vcpu->kvm->lock);
1203 r = set_msr_hyperv_pw(vcpu, msr, data);
1204 mutex_unlock(&vcpu->kvm->lock);
1205 return r;
1206 } else
1207 return set_msr_hyperv(vcpu, msr, data);
1208 break;
1209 default:
1210 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1211 return xen_hvm_config(vcpu, data);
1212 if (!ignore_msrs) {
1213 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1214 msr, data);
1215 return 1;
1216 } else {
1217 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1218 msr, data);
1219 break;
1220 }
1221 }
1222 return 0;
1223 }
1224 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1225
1226
1227 /*
1228 * Reads an msr value (of 'msr_index') into 'pdata'.
1229 * Returns 0 on success, non-0 otherwise.
1230 * Assumes vcpu_load() was already called.
1231 */
1232 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1233 {
1234 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1235 }
1236
1237 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1238 {
1239 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1240
1241 if (!msr_mtrr_valid(msr))
1242 return 1;
1243
1244 if (msr == MSR_MTRRdefType)
1245 *pdata = vcpu->arch.mtrr_state.def_type +
1246 (vcpu->arch.mtrr_state.enabled << 10);
1247 else if (msr == MSR_MTRRfix64K_00000)
1248 *pdata = p[0];
1249 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1251 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1253 else if (msr == MSR_IA32_CR_PAT)
1254 *pdata = vcpu->arch.pat;
1255 else { /* Variable MTRRs */
1256 int idx, is_mtrr_mask;
1257 u64 *pt;
1258
1259 idx = (msr - 0x200) / 2;
1260 is_mtrr_mask = msr - 0x200 - 2 * idx;
1261 if (!is_mtrr_mask)
1262 pt =
1263 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1264 else
1265 pt =
1266 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1267 *pdata = *pt;
1268 }
1269
1270 return 0;
1271 }
1272
1273 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1274 {
1275 u64 data;
1276 u64 mcg_cap = vcpu->arch.mcg_cap;
1277 unsigned bank_num = mcg_cap & 0xff;
1278
1279 switch (msr) {
1280 case MSR_IA32_P5_MC_ADDR:
1281 case MSR_IA32_P5_MC_TYPE:
1282 data = 0;
1283 break;
1284 case MSR_IA32_MCG_CAP:
1285 data = vcpu->arch.mcg_cap;
1286 break;
1287 case MSR_IA32_MCG_CTL:
1288 if (!(mcg_cap & MCG_CTL_P))
1289 return 1;
1290 data = vcpu->arch.mcg_ctl;
1291 break;
1292 case MSR_IA32_MCG_STATUS:
1293 data = vcpu->arch.mcg_status;
1294 break;
1295 default:
1296 if (msr >= MSR_IA32_MC0_CTL &&
1297 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1298 u32 offset = msr - MSR_IA32_MC0_CTL;
1299 data = vcpu->arch.mce_banks[offset];
1300 break;
1301 }
1302 return 1;
1303 }
1304 *pdata = data;
1305 return 0;
1306 }
1307
1308 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1309 {
1310 u64 data = 0;
1311 struct kvm *kvm = vcpu->kvm;
1312
1313 switch (msr) {
1314 case HV_X64_MSR_GUEST_OS_ID:
1315 data = kvm->arch.hv_guest_os_id;
1316 break;
1317 case HV_X64_MSR_HYPERCALL:
1318 data = kvm->arch.hv_hypercall;
1319 break;
1320 default:
1321 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1322 return 1;
1323 }
1324
1325 *pdata = data;
1326 return 0;
1327 }
1328
1329 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1330 {
1331 u64 data = 0;
1332
1333 switch (msr) {
1334 case HV_X64_MSR_VP_INDEX: {
1335 int r;
1336 struct kvm_vcpu *v;
1337 kvm_for_each_vcpu(r, v, vcpu->kvm)
1338 if (v == vcpu)
1339 data = r;
1340 break;
1341 }
1342 case HV_X64_MSR_EOI:
1343 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1344 case HV_X64_MSR_ICR:
1345 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1346 case HV_X64_MSR_TPR:
1347 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1348 default:
1349 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1350 return 1;
1351 }
1352 *pdata = data;
1353 return 0;
1354 }
1355
1356 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1357 {
1358 u64 data;
1359
1360 switch (msr) {
1361 case MSR_IA32_PLATFORM_ID:
1362 case MSR_IA32_UCODE_REV:
1363 case MSR_IA32_EBL_CR_POWERON:
1364 case MSR_IA32_DEBUGCTLMSR:
1365 case MSR_IA32_LASTBRANCHFROMIP:
1366 case MSR_IA32_LASTBRANCHTOIP:
1367 case MSR_IA32_LASTINTFROMIP:
1368 case MSR_IA32_LASTINTTOIP:
1369 case MSR_K8_SYSCFG:
1370 case MSR_K7_HWCR:
1371 case MSR_VM_HSAVE_PA:
1372 case MSR_P6_PERFCTR0:
1373 case MSR_P6_PERFCTR1:
1374 case MSR_P6_EVNTSEL0:
1375 case MSR_P6_EVNTSEL1:
1376 case MSR_K7_EVNTSEL0:
1377 case MSR_K7_PERFCTR0:
1378 case MSR_K8_INT_PENDING_MSG:
1379 case MSR_AMD64_NB_CFG:
1380 case MSR_FAM10H_MMIO_CONF_BASE:
1381 data = 0;
1382 break;
1383 case MSR_MTRRcap:
1384 data = 0x500 | KVM_NR_VAR_MTRR;
1385 break;
1386 case 0x200 ... 0x2ff:
1387 return get_msr_mtrr(vcpu, msr, pdata);
1388 case 0xcd: /* fsb frequency */
1389 data = 3;
1390 break;
1391 case MSR_IA32_APICBASE:
1392 data = kvm_get_apic_base(vcpu);
1393 break;
1394 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1395 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1396 break;
1397 case MSR_IA32_MISC_ENABLE:
1398 data = vcpu->arch.ia32_misc_enable_msr;
1399 break;
1400 case MSR_IA32_PERF_STATUS:
1401 /* TSC increment by tick */
1402 data = 1000ULL;
1403 /* CPU multiplier */
1404 data |= (((uint64_t)4ULL) << 40);
1405 break;
1406 case MSR_EFER:
1407 data = vcpu->arch.efer;
1408 break;
1409 case MSR_KVM_WALL_CLOCK:
1410 data = vcpu->kvm->arch.wall_clock;
1411 break;
1412 case MSR_KVM_SYSTEM_TIME:
1413 data = vcpu->arch.time;
1414 break;
1415 case MSR_IA32_P5_MC_ADDR:
1416 case MSR_IA32_P5_MC_TYPE:
1417 case MSR_IA32_MCG_CAP:
1418 case MSR_IA32_MCG_CTL:
1419 case MSR_IA32_MCG_STATUS:
1420 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1421 return get_msr_mce(vcpu, msr, pdata);
1422 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1423 if (kvm_hv_msr_partition_wide(msr)) {
1424 int r;
1425 mutex_lock(&vcpu->kvm->lock);
1426 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1427 mutex_unlock(&vcpu->kvm->lock);
1428 return r;
1429 } else
1430 return get_msr_hyperv(vcpu, msr, pdata);
1431 break;
1432 default:
1433 if (!ignore_msrs) {
1434 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1435 return 1;
1436 } else {
1437 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1438 data = 0;
1439 }
1440 break;
1441 }
1442 *pdata = data;
1443 return 0;
1444 }
1445 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1446
1447 /*
1448 * Read or write a bunch of msrs. All parameters are kernel addresses.
1449 *
1450 * @return number of msrs set successfully.
1451 */
1452 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1453 struct kvm_msr_entry *entries,
1454 int (*do_msr)(struct kvm_vcpu *vcpu,
1455 unsigned index, u64 *data))
1456 {
1457 int i, idx;
1458
1459 vcpu_load(vcpu);
1460
1461 idx = srcu_read_lock(&vcpu->kvm->srcu);
1462 for (i = 0; i < msrs->nmsrs; ++i)
1463 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1464 break;
1465 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1466
1467 vcpu_put(vcpu);
1468
1469 return i;
1470 }
1471
1472 /*
1473 * Read or write a bunch of msrs. Parameters are user addresses.
1474 *
1475 * @return number of msrs set successfully.
1476 */
1477 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1478 int (*do_msr)(struct kvm_vcpu *vcpu,
1479 unsigned index, u64 *data),
1480 int writeback)
1481 {
1482 struct kvm_msrs msrs;
1483 struct kvm_msr_entry *entries;
1484 int r, n;
1485 unsigned size;
1486
1487 r = -EFAULT;
1488 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1489 goto out;
1490
1491 r = -E2BIG;
1492 if (msrs.nmsrs >= MAX_IO_MSRS)
1493 goto out;
1494
1495 r = -ENOMEM;
1496 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1497 entries = vmalloc(size);
1498 if (!entries)
1499 goto out;
1500
1501 r = -EFAULT;
1502 if (copy_from_user(entries, user_msrs->entries, size))
1503 goto out_free;
1504
1505 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1506 if (r < 0)
1507 goto out_free;
1508
1509 r = -EFAULT;
1510 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1511 goto out_free;
1512
1513 r = n;
1514
1515 out_free:
1516 vfree(entries);
1517 out:
1518 return r;
1519 }
1520
1521 int kvm_dev_ioctl_check_extension(long ext)
1522 {
1523 int r;
1524
1525 switch (ext) {
1526 case KVM_CAP_IRQCHIP:
1527 case KVM_CAP_HLT:
1528 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1529 case KVM_CAP_SET_TSS_ADDR:
1530 case KVM_CAP_EXT_CPUID:
1531 case KVM_CAP_CLOCKSOURCE:
1532 case KVM_CAP_PIT:
1533 case KVM_CAP_NOP_IO_DELAY:
1534 case KVM_CAP_MP_STATE:
1535 case KVM_CAP_SYNC_MMU:
1536 case KVM_CAP_REINJECT_CONTROL:
1537 case KVM_CAP_IRQ_INJECT_STATUS:
1538 case KVM_CAP_ASSIGN_DEV_IRQ:
1539 case KVM_CAP_IRQFD:
1540 case KVM_CAP_IOEVENTFD:
1541 case KVM_CAP_PIT2:
1542 case KVM_CAP_PIT_STATE2:
1543 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1544 case KVM_CAP_XEN_HVM:
1545 case KVM_CAP_ADJUST_CLOCK:
1546 case KVM_CAP_VCPU_EVENTS:
1547 case KVM_CAP_HYPERV:
1548 case KVM_CAP_HYPERV_VAPIC:
1549 case KVM_CAP_HYPERV_SPIN:
1550 case KVM_CAP_PCI_SEGMENT:
1551 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1552 r = 1;
1553 break;
1554 case KVM_CAP_COALESCED_MMIO:
1555 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1556 break;
1557 case KVM_CAP_VAPIC:
1558 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1559 break;
1560 case KVM_CAP_NR_VCPUS:
1561 r = KVM_MAX_VCPUS;
1562 break;
1563 case KVM_CAP_NR_MEMSLOTS:
1564 r = KVM_MEMORY_SLOTS;
1565 break;
1566 case KVM_CAP_PV_MMU: /* obsolete */
1567 r = 0;
1568 break;
1569 case KVM_CAP_IOMMU:
1570 r = iommu_found();
1571 break;
1572 case KVM_CAP_MCE:
1573 r = KVM_MAX_MCE_BANKS;
1574 break;
1575 default:
1576 r = 0;
1577 break;
1578 }
1579 return r;
1580
1581 }
1582
1583 long kvm_arch_dev_ioctl(struct file *filp,
1584 unsigned int ioctl, unsigned long arg)
1585 {
1586 void __user *argp = (void __user *)arg;
1587 long r;
1588
1589 switch (ioctl) {
1590 case KVM_GET_MSR_INDEX_LIST: {
1591 struct kvm_msr_list __user *user_msr_list = argp;
1592 struct kvm_msr_list msr_list;
1593 unsigned n;
1594
1595 r = -EFAULT;
1596 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1597 goto out;
1598 n = msr_list.nmsrs;
1599 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1600 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1601 goto out;
1602 r = -E2BIG;
1603 if (n < msr_list.nmsrs)
1604 goto out;
1605 r = -EFAULT;
1606 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1607 num_msrs_to_save * sizeof(u32)))
1608 goto out;
1609 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1610 &emulated_msrs,
1611 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1612 goto out;
1613 r = 0;
1614 break;
1615 }
1616 case KVM_GET_SUPPORTED_CPUID: {
1617 struct kvm_cpuid2 __user *cpuid_arg = argp;
1618 struct kvm_cpuid2 cpuid;
1619
1620 r = -EFAULT;
1621 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1622 goto out;
1623 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1624 cpuid_arg->entries);
1625 if (r)
1626 goto out;
1627
1628 r = -EFAULT;
1629 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1630 goto out;
1631 r = 0;
1632 break;
1633 }
1634 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1635 u64 mce_cap;
1636
1637 mce_cap = KVM_MCE_CAP_SUPPORTED;
1638 r = -EFAULT;
1639 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1640 goto out;
1641 r = 0;
1642 break;
1643 }
1644 default:
1645 r = -EINVAL;
1646 }
1647 out:
1648 return r;
1649 }
1650
1651 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1652 {
1653 kvm_x86_ops->vcpu_load(vcpu, cpu);
1654 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1655 unsigned long khz = cpufreq_quick_get(cpu);
1656 if (!khz)
1657 khz = tsc_khz;
1658 per_cpu(cpu_tsc_khz, cpu) = khz;
1659 }
1660 kvm_request_guest_time_update(vcpu);
1661 }
1662
1663 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1664 {
1665 kvm_put_guest_fpu(vcpu);
1666 kvm_x86_ops->vcpu_put(vcpu);
1667 }
1668
1669 static int is_efer_nx(void)
1670 {
1671 unsigned long long efer = 0;
1672
1673 rdmsrl_safe(MSR_EFER, &efer);
1674 return efer & EFER_NX;
1675 }
1676
1677 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1678 {
1679 int i;
1680 struct kvm_cpuid_entry2 *e, *entry;
1681
1682 entry = NULL;
1683 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1684 e = &vcpu->arch.cpuid_entries[i];
1685 if (e->function == 0x80000001) {
1686 entry = e;
1687 break;
1688 }
1689 }
1690 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1691 entry->edx &= ~(1 << 20);
1692 printk(KERN_INFO "kvm: guest NX capability removed\n");
1693 }
1694 }
1695
1696 /* when an old userspace process fills a new kernel module */
1697 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1698 struct kvm_cpuid *cpuid,
1699 struct kvm_cpuid_entry __user *entries)
1700 {
1701 int r, i;
1702 struct kvm_cpuid_entry *cpuid_entries;
1703
1704 r = -E2BIG;
1705 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1706 goto out;
1707 r = -ENOMEM;
1708 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1709 if (!cpuid_entries)
1710 goto out;
1711 r = -EFAULT;
1712 if (copy_from_user(cpuid_entries, entries,
1713 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1714 goto out_free;
1715 for (i = 0; i < cpuid->nent; i++) {
1716 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1717 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1718 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1719 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1720 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1721 vcpu->arch.cpuid_entries[i].index = 0;
1722 vcpu->arch.cpuid_entries[i].flags = 0;
1723 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1724 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1725 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1726 }
1727 vcpu->arch.cpuid_nent = cpuid->nent;
1728 cpuid_fix_nx_cap(vcpu);
1729 r = 0;
1730 kvm_apic_set_version(vcpu);
1731 kvm_x86_ops->cpuid_update(vcpu);
1732
1733 out_free:
1734 vfree(cpuid_entries);
1735 out:
1736 return r;
1737 }
1738
1739 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1740 struct kvm_cpuid2 *cpuid,
1741 struct kvm_cpuid_entry2 __user *entries)
1742 {
1743 int r;
1744
1745 r = -E2BIG;
1746 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1747 goto out;
1748 r = -EFAULT;
1749 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1750 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1751 goto out;
1752 vcpu->arch.cpuid_nent = cpuid->nent;
1753 kvm_apic_set_version(vcpu);
1754 kvm_x86_ops->cpuid_update(vcpu);
1755 return 0;
1756
1757 out:
1758 return r;
1759 }
1760
1761 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1762 struct kvm_cpuid2 *cpuid,
1763 struct kvm_cpuid_entry2 __user *entries)
1764 {
1765 int r;
1766
1767 r = -E2BIG;
1768 if (cpuid->nent < vcpu->arch.cpuid_nent)
1769 goto out;
1770 r = -EFAULT;
1771 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1772 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1773 goto out;
1774 return 0;
1775
1776 out:
1777 cpuid->nent = vcpu->arch.cpuid_nent;
1778 return r;
1779 }
1780
1781 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1782 u32 index)
1783 {
1784 entry->function = function;
1785 entry->index = index;
1786 cpuid_count(entry->function, entry->index,
1787 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1788 entry->flags = 0;
1789 }
1790
1791 #define F(x) bit(X86_FEATURE_##x)
1792
1793 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1794 u32 index, int *nent, int maxnent)
1795 {
1796 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1797 #ifdef CONFIG_X86_64
1798 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1799 ? F(GBPAGES) : 0;
1800 unsigned f_lm = F(LM);
1801 #else
1802 unsigned f_gbpages = 0;
1803 unsigned f_lm = 0;
1804 #endif
1805 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1806
1807 /* cpuid 1.edx */
1808 const u32 kvm_supported_word0_x86_features =
1809 F(FPU) | F(VME) | F(DE) | F(PSE) |
1810 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1811 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1812 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1813 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1814 0 /* Reserved, DS, ACPI */ | F(MMX) |
1815 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1816 0 /* HTT, TM, Reserved, PBE */;
1817 /* cpuid 0x80000001.edx */
1818 const u32 kvm_supported_word1_x86_features =
1819 F(FPU) | F(VME) | F(DE) | F(PSE) |
1820 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1821 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1822 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1823 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1824 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1825 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1826 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1827 /* cpuid 1.ecx */
1828 const u32 kvm_supported_word4_x86_features =
1829 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1830 0 /* DS-CPL, VMX, SMX, EST */ |
1831 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1832 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1833 0 /* Reserved, DCA */ | F(XMM4_1) |
1834 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1835 0 /* Reserved, XSAVE, OSXSAVE */;
1836 /* cpuid 0x80000001.ecx */
1837 const u32 kvm_supported_word6_x86_features =
1838 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1839 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1840 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1841 0 /* SKINIT */ | 0 /* WDT */;
1842
1843 /* all calls to cpuid_count() should be made on the same cpu */
1844 get_cpu();
1845 do_cpuid_1_ent(entry, function, index);
1846 ++*nent;
1847
1848 switch (function) {
1849 case 0:
1850 entry->eax = min(entry->eax, (u32)0xb);
1851 break;
1852 case 1:
1853 entry->edx &= kvm_supported_word0_x86_features;
1854 entry->ecx &= kvm_supported_word4_x86_features;
1855 /* we support x2apic emulation even if host does not support
1856 * it since we emulate x2apic in software */
1857 entry->ecx |= F(X2APIC);
1858 break;
1859 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1860 * may return different values. This forces us to get_cpu() before
1861 * issuing the first command, and also to emulate this annoying behavior
1862 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1863 case 2: {
1864 int t, times = entry->eax & 0xff;
1865
1866 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1867 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1868 for (t = 1; t < times && *nent < maxnent; ++t) {
1869 do_cpuid_1_ent(&entry[t], function, 0);
1870 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1871 ++*nent;
1872 }
1873 break;
1874 }
1875 /* function 4 and 0xb have additional index. */
1876 case 4: {
1877 int i, cache_type;
1878
1879 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1880 /* read more entries until cache_type is zero */
1881 for (i = 1; *nent < maxnent; ++i) {
1882 cache_type = entry[i - 1].eax & 0x1f;
1883 if (!cache_type)
1884 break;
1885 do_cpuid_1_ent(&entry[i], function, i);
1886 entry[i].flags |=
1887 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1888 ++*nent;
1889 }
1890 break;
1891 }
1892 case 0xb: {
1893 int i, level_type;
1894
1895 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1896 /* read more entries until level_type is zero */
1897 for (i = 1; *nent < maxnent; ++i) {
1898 level_type = entry[i - 1].ecx & 0xff00;
1899 if (!level_type)
1900 break;
1901 do_cpuid_1_ent(&entry[i], function, i);
1902 entry[i].flags |=
1903 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1904 ++*nent;
1905 }
1906 break;
1907 }
1908 case 0x80000000:
1909 entry->eax = min(entry->eax, 0x8000001a);
1910 break;
1911 case 0x80000001:
1912 entry->edx &= kvm_supported_word1_x86_features;
1913 entry->ecx &= kvm_supported_word6_x86_features;
1914 break;
1915 }
1916 put_cpu();
1917 }
1918
1919 #undef F
1920
1921 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1922 struct kvm_cpuid_entry2 __user *entries)
1923 {
1924 struct kvm_cpuid_entry2 *cpuid_entries;
1925 int limit, nent = 0, r = -E2BIG;
1926 u32 func;
1927
1928 if (cpuid->nent < 1)
1929 goto out;
1930 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1931 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1932 r = -ENOMEM;
1933 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1934 if (!cpuid_entries)
1935 goto out;
1936
1937 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1938 limit = cpuid_entries[0].eax;
1939 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1940 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1941 &nent, cpuid->nent);
1942 r = -E2BIG;
1943 if (nent >= cpuid->nent)
1944 goto out_free;
1945
1946 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1947 limit = cpuid_entries[nent - 1].eax;
1948 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1949 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1950 &nent, cpuid->nent);
1951 r = -E2BIG;
1952 if (nent >= cpuid->nent)
1953 goto out_free;
1954
1955 r = -EFAULT;
1956 if (copy_to_user(entries, cpuid_entries,
1957 nent * sizeof(struct kvm_cpuid_entry2)))
1958 goto out_free;
1959 cpuid->nent = nent;
1960 r = 0;
1961
1962 out_free:
1963 vfree(cpuid_entries);
1964 out:
1965 return r;
1966 }
1967
1968 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1969 struct kvm_lapic_state *s)
1970 {
1971 vcpu_load(vcpu);
1972 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1973 vcpu_put(vcpu);
1974
1975 return 0;
1976 }
1977
1978 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1979 struct kvm_lapic_state *s)
1980 {
1981 vcpu_load(vcpu);
1982 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1983 kvm_apic_post_state_restore(vcpu);
1984 update_cr8_intercept(vcpu);
1985 vcpu_put(vcpu);
1986
1987 return 0;
1988 }
1989
1990 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1991 struct kvm_interrupt *irq)
1992 {
1993 if (irq->irq < 0 || irq->irq >= 256)
1994 return -EINVAL;
1995 if (irqchip_in_kernel(vcpu->kvm))
1996 return -ENXIO;
1997 vcpu_load(vcpu);
1998
1999 kvm_queue_interrupt(vcpu, irq->irq, false);
2000
2001 vcpu_put(vcpu);
2002
2003 return 0;
2004 }
2005
2006 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2007 {
2008 vcpu_load(vcpu);
2009 kvm_inject_nmi(vcpu);
2010 vcpu_put(vcpu);
2011
2012 return 0;
2013 }
2014
2015 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2016 struct kvm_tpr_access_ctl *tac)
2017 {
2018 if (tac->flags)
2019 return -EINVAL;
2020 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2021 return 0;
2022 }
2023
2024 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2025 u64 mcg_cap)
2026 {
2027 int r;
2028 unsigned bank_num = mcg_cap & 0xff, bank;
2029
2030 r = -EINVAL;
2031 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2032 goto out;
2033 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2034 goto out;
2035 r = 0;
2036 vcpu->arch.mcg_cap = mcg_cap;
2037 /* Init IA32_MCG_CTL to all 1s */
2038 if (mcg_cap & MCG_CTL_P)
2039 vcpu->arch.mcg_ctl = ~(u64)0;
2040 /* Init IA32_MCi_CTL to all 1s */
2041 for (bank = 0; bank < bank_num; bank++)
2042 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2043 out:
2044 return r;
2045 }
2046
2047 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2048 struct kvm_x86_mce *mce)
2049 {
2050 u64 mcg_cap = vcpu->arch.mcg_cap;
2051 unsigned bank_num = mcg_cap & 0xff;
2052 u64 *banks = vcpu->arch.mce_banks;
2053
2054 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2055 return -EINVAL;
2056 /*
2057 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2058 * reporting is disabled
2059 */
2060 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2061 vcpu->arch.mcg_ctl != ~(u64)0)
2062 return 0;
2063 banks += 4 * mce->bank;
2064 /*
2065 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2066 * reporting is disabled for the bank
2067 */
2068 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2069 return 0;
2070 if (mce->status & MCI_STATUS_UC) {
2071 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2072 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2073 printk(KERN_DEBUG "kvm: set_mce: "
2074 "injects mce exception while "
2075 "previous one is in progress!\n");
2076 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2077 return 0;
2078 }
2079 if (banks[1] & MCI_STATUS_VAL)
2080 mce->status |= MCI_STATUS_OVER;
2081 banks[2] = mce->addr;
2082 banks[3] = mce->misc;
2083 vcpu->arch.mcg_status = mce->mcg_status;
2084 banks[1] = mce->status;
2085 kvm_queue_exception(vcpu, MC_VECTOR);
2086 } else if (!(banks[1] & MCI_STATUS_VAL)
2087 || !(banks[1] & MCI_STATUS_UC)) {
2088 if (banks[1] & MCI_STATUS_VAL)
2089 mce->status |= MCI_STATUS_OVER;
2090 banks[2] = mce->addr;
2091 banks[3] = mce->misc;
2092 banks[1] = mce->status;
2093 } else
2094 banks[1] |= MCI_STATUS_OVER;
2095 return 0;
2096 }
2097
2098 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2099 struct kvm_vcpu_events *events)
2100 {
2101 vcpu_load(vcpu);
2102
2103 events->exception.injected = vcpu->arch.exception.pending;
2104 events->exception.nr = vcpu->arch.exception.nr;
2105 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2106 events->exception.error_code = vcpu->arch.exception.error_code;
2107
2108 events->interrupt.injected = vcpu->arch.interrupt.pending;
2109 events->interrupt.nr = vcpu->arch.interrupt.nr;
2110 events->interrupt.soft = vcpu->arch.interrupt.soft;
2111
2112 events->nmi.injected = vcpu->arch.nmi_injected;
2113 events->nmi.pending = vcpu->arch.nmi_pending;
2114 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2115
2116 events->sipi_vector = vcpu->arch.sipi_vector;
2117
2118 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2119 | KVM_VCPUEVENT_VALID_SIPI_VECTOR);
2120
2121 vcpu_put(vcpu);
2122 }
2123
2124 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2125 struct kvm_vcpu_events *events)
2126 {
2127 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2128 | KVM_VCPUEVENT_VALID_SIPI_VECTOR))
2129 return -EINVAL;
2130
2131 vcpu_load(vcpu);
2132
2133 vcpu->arch.exception.pending = events->exception.injected;
2134 vcpu->arch.exception.nr = events->exception.nr;
2135 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2136 vcpu->arch.exception.error_code = events->exception.error_code;
2137
2138 vcpu->arch.interrupt.pending = events->interrupt.injected;
2139 vcpu->arch.interrupt.nr = events->interrupt.nr;
2140 vcpu->arch.interrupt.soft = events->interrupt.soft;
2141 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2142 kvm_pic_clear_isr_ack(vcpu->kvm);
2143
2144 vcpu->arch.nmi_injected = events->nmi.injected;
2145 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2146 vcpu->arch.nmi_pending = events->nmi.pending;
2147 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2148
2149 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2150 vcpu->arch.sipi_vector = events->sipi_vector;
2151
2152 vcpu_put(vcpu);
2153
2154 return 0;
2155 }
2156
2157 long kvm_arch_vcpu_ioctl(struct file *filp,
2158 unsigned int ioctl, unsigned long arg)
2159 {
2160 struct kvm_vcpu *vcpu = filp->private_data;
2161 void __user *argp = (void __user *)arg;
2162 int r;
2163 struct kvm_lapic_state *lapic = NULL;
2164
2165 switch (ioctl) {
2166 case KVM_GET_LAPIC: {
2167 r = -EINVAL;
2168 if (!vcpu->arch.apic)
2169 goto out;
2170 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2171
2172 r = -ENOMEM;
2173 if (!lapic)
2174 goto out;
2175 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2176 if (r)
2177 goto out;
2178 r = -EFAULT;
2179 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2180 goto out;
2181 r = 0;
2182 break;
2183 }
2184 case KVM_SET_LAPIC: {
2185 r = -EINVAL;
2186 if (!vcpu->arch.apic)
2187 goto out;
2188 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2189 r = -ENOMEM;
2190 if (!lapic)
2191 goto out;
2192 r = -EFAULT;
2193 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2194 goto out;
2195 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2196 if (r)
2197 goto out;
2198 r = 0;
2199 break;
2200 }
2201 case KVM_INTERRUPT: {
2202 struct kvm_interrupt irq;
2203
2204 r = -EFAULT;
2205 if (copy_from_user(&irq, argp, sizeof irq))
2206 goto out;
2207 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2208 if (r)
2209 goto out;
2210 r = 0;
2211 break;
2212 }
2213 case KVM_NMI: {
2214 r = kvm_vcpu_ioctl_nmi(vcpu);
2215 if (r)
2216 goto out;
2217 r = 0;
2218 break;
2219 }
2220 case KVM_SET_CPUID: {
2221 struct kvm_cpuid __user *cpuid_arg = argp;
2222 struct kvm_cpuid cpuid;
2223
2224 r = -EFAULT;
2225 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2226 goto out;
2227 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2228 if (r)
2229 goto out;
2230 break;
2231 }
2232 case KVM_SET_CPUID2: {
2233 struct kvm_cpuid2 __user *cpuid_arg = argp;
2234 struct kvm_cpuid2 cpuid;
2235
2236 r = -EFAULT;
2237 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2238 goto out;
2239 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2240 cpuid_arg->entries);
2241 if (r)
2242 goto out;
2243 break;
2244 }
2245 case KVM_GET_CPUID2: {
2246 struct kvm_cpuid2 __user *cpuid_arg = argp;
2247 struct kvm_cpuid2 cpuid;
2248
2249 r = -EFAULT;
2250 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2251 goto out;
2252 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2253 cpuid_arg->entries);
2254 if (r)
2255 goto out;
2256 r = -EFAULT;
2257 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2258 goto out;
2259 r = 0;
2260 break;
2261 }
2262 case KVM_GET_MSRS:
2263 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2264 break;
2265 case KVM_SET_MSRS:
2266 r = msr_io(vcpu, argp, do_set_msr, 0);
2267 break;
2268 case KVM_TPR_ACCESS_REPORTING: {
2269 struct kvm_tpr_access_ctl tac;
2270
2271 r = -EFAULT;
2272 if (copy_from_user(&tac, argp, sizeof tac))
2273 goto out;
2274 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2275 if (r)
2276 goto out;
2277 r = -EFAULT;
2278 if (copy_to_user(argp, &tac, sizeof tac))
2279 goto out;
2280 r = 0;
2281 break;
2282 };
2283 case KVM_SET_VAPIC_ADDR: {
2284 struct kvm_vapic_addr va;
2285
2286 r = -EINVAL;
2287 if (!irqchip_in_kernel(vcpu->kvm))
2288 goto out;
2289 r = -EFAULT;
2290 if (copy_from_user(&va, argp, sizeof va))
2291 goto out;
2292 r = 0;
2293 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2294 break;
2295 }
2296 case KVM_X86_SETUP_MCE: {
2297 u64 mcg_cap;
2298
2299 r = -EFAULT;
2300 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2301 goto out;
2302 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2303 break;
2304 }
2305 case KVM_X86_SET_MCE: {
2306 struct kvm_x86_mce mce;
2307
2308 r = -EFAULT;
2309 if (copy_from_user(&mce, argp, sizeof mce))
2310 goto out;
2311 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2312 break;
2313 }
2314 case KVM_GET_VCPU_EVENTS: {
2315 struct kvm_vcpu_events events;
2316
2317 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2318
2319 r = -EFAULT;
2320 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2321 break;
2322 r = 0;
2323 break;
2324 }
2325 case KVM_SET_VCPU_EVENTS: {
2326 struct kvm_vcpu_events events;
2327
2328 r = -EFAULT;
2329 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2330 break;
2331
2332 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2333 break;
2334 }
2335 default:
2336 r = -EINVAL;
2337 }
2338 out:
2339 kfree(lapic);
2340 return r;
2341 }
2342
2343 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2344 {
2345 int ret;
2346
2347 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2348 return -1;
2349 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2350 return ret;
2351 }
2352
2353 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2354 u64 ident_addr)
2355 {
2356 kvm->arch.ept_identity_map_addr = ident_addr;
2357 return 0;
2358 }
2359
2360 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2361 u32 kvm_nr_mmu_pages)
2362 {
2363 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2364 return -EINVAL;
2365
2366 mutex_lock(&kvm->slots_lock);
2367 spin_lock(&kvm->mmu_lock);
2368
2369 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2370 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2371
2372 spin_unlock(&kvm->mmu_lock);
2373 mutex_unlock(&kvm->slots_lock);
2374 return 0;
2375 }
2376
2377 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2378 {
2379 return kvm->arch.n_alloc_mmu_pages;
2380 }
2381
2382 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2383 {
2384 int i;
2385 struct kvm_mem_alias *alias;
2386 struct kvm_mem_aliases *aliases;
2387
2388 aliases = rcu_dereference(kvm->arch.aliases);
2389
2390 for (i = 0; i < aliases->naliases; ++i) {
2391 alias = &aliases->aliases[i];
2392 if (alias->flags & KVM_ALIAS_INVALID)
2393 continue;
2394 if (gfn >= alias->base_gfn
2395 && gfn < alias->base_gfn + alias->npages)
2396 return alias->target_gfn + gfn - alias->base_gfn;
2397 }
2398 return gfn;
2399 }
2400
2401 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2402 {
2403 int i;
2404 struct kvm_mem_alias *alias;
2405 struct kvm_mem_aliases *aliases;
2406
2407 aliases = rcu_dereference(kvm->arch.aliases);
2408
2409 for (i = 0; i < aliases->naliases; ++i) {
2410 alias = &aliases->aliases[i];
2411 if (gfn >= alias->base_gfn
2412 && gfn < alias->base_gfn + alias->npages)
2413 return alias->target_gfn + gfn - alias->base_gfn;
2414 }
2415 return gfn;
2416 }
2417
2418 /*
2419 * Set a new alias region. Aliases map a portion of physical memory into
2420 * another portion. This is useful for memory windows, for example the PC
2421 * VGA region.
2422 */
2423 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2424 struct kvm_memory_alias *alias)
2425 {
2426 int r, n;
2427 struct kvm_mem_alias *p;
2428 struct kvm_mem_aliases *aliases, *old_aliases;
2429
2430 r = -EINVAL;
2431 /* General sanity checks */
2432 if (alias->memory_size & (PAGE_SIZE - 1))
2433 goto out;
2434 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2435 goto out;
2436 if (alias->slot >= KVM_ALIAS_SLOTS)
2437 goto out;
2438 if (alias->guest_phys_addr + alias->memory_size
2439 < alias->guest_phys_addr)
2440 goto out;
2441 if (alias->target_phys_addr + alias->memory_size
2442 < alias->target_phys_addr)
2443 goto out;
2444
2445 r = -ENOMEM;
2446 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2447 if (!aliases)
2448 goto out;
2449
2450 mutex_lock(&kvm->slots_lock);
2451
2452 /* invalidate any gfn reference in case of deletion/shrinking */
2453 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2454 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2455 old_aliases = kvm->arch.aliases;
2456 rcu_assign_pointer(kvm->arch.aliases, aliases);
2457 synchronize_srcu_expedited(&kvm->srcu);
2458 kvm_mmu_zap_all(kvm);
2459 kfree(old_aliases);
2460
2461 r = -ENOMEM;
2462 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2463 if (!aliases)
2464 goto out_unlock;
2465
2466 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2467
2468 p = &aliases->aliases[alias->slot];
2469 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2470 p->npages = alias->memory_size >> PAGE_SHIFT;
2471 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2472 p->flags &= ~(KVM_ALIAS_INVALID);
2473
2474 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2475 if (aliases->aliases[n - 1].npages)
2476 break;
2477 aliases->naliases = n;
2478
2479 old_aliases = kvm->arch.aliases;
2480 rcu_assign_pointer(kvm->arch.aliases, aliases);
2481 synchronize_srcu_expedited(&kvm->srcu);
2482 kfree(old_aliases);
2483 r = 0;
2484
2485 out_unlock:
2486 mutex_unlock(&kvm->slots_lock);
2487 out:
2488 return r;
2489 }
2490
2491 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2492 {
2493 int r;
2494
2495 r = 0;
2496 switch (chip->chip_id) {
2497 case KVM_IRQCHIP_PIC_MASTER:
2498 memcpy(&chip->chip.pic,
2499 &pic_irqchip(kvm)->pics[0],
2500 sizeof(struct kvm_pic_state));
2501 break;
2502 case KVM_IRQCHIP_PIC_SLAVE:
2503 memcpy(&chip->chip.pic,
2504 &pic_irqchip(kvm)->pics[1],
2505 sizeof(struct kvm_pic_state));
2506 break;
2507 case KVM_IRQCHIP_IOAPIC:
2508 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2509 break;
2510 default:
2511 r = -EINVAL;
2512 break;
2513 }
2514 return r;
2515 }
2516
2517 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2518 {
2519 int r;
2520
2521 r = 0;
2522 switch (chip->chip_id) {
2523 case KVM_IRQCHIP_PIC_MASTER:
2524 raw_spin_lock(&pic_irqchip(kvm)->lock);
2525 memcpy(&pic_irqchip(kvm)->pics[0],
2526 &chip->chip.pic,
2527 sizeof(struct kvm_pic_state));
2528 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2529 break;
2530 case KVM_IRQCHIP_PIC_SLAVE:
2531 raw_spin_lock(&pic_irqchip(kvm)->lock);
2532 memcpy(&pic_irqchip(kvm)->pics[1],
2533 &chip->chip.pic,
2534 sizeof(struct kvm_pic_state));
2535 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2536 break;
2537 case KVM_IRQCHIP_IOAPIC:
2538 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2539 break;
2540 default:
2541 r = -EINVAL;
2542 break;
2543 }
2544 kvm_pic_update_irq(pic_irqchip(kvm));
2545 return r;
2546 }
2547
2548 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2549 {
2550 int r = 0;
2551
2552 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2553 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2554 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2555 return r;
2556 }
2557
2558 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2559 {
2560 int r = 0;
2561
2562 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2563 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2564 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2565 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2566 return r;
2567 }
2568
2569 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2570 {
2571 int r = 0;
2572
2573 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2574 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2575 sizeof(ps->channels));
2576 ps->flags = kvm->arch.vpit->pit_state.flags;
2577 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2578 return r;
2579 }
2580
2581 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2582 {
2583 int r = 0, start = 0;
2584 u32 prev_legacy, cur_legacy;
2585 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2586 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2587 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2588 if (!prev_legacy && cur_legacy)
2589 start = 1;
2590 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2591 sizeof(kvm->arch.vpit->pit_state.channels));
2592 kvm->arch.vpit->pit_state.flags = ps->flags;
2593 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2594 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2595 return r;
2596 }
2597
2598 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2599 struct kvm_reinject_control *control)
2600 {
2601 if (!kvm->arch.vpit)
2602 return -ENXIO;
2603 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2604 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2605 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2606 return 0;
2607 }
2608
2609 /*
2610 * Get (and clear) the dirty memory log for a memory slot.
2611 */
2612 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2613 struct kvm_dirty_log *log)
2614 {
2615 int r, n, i;
2616 struct kvm_memory_slot *memslot;
2617 unsigned long is_dirty = 0;
2618 unsigned long *dirty_bitmap = NULL;
2619
2620 mutex_lock(&kvm->slots_lock);
2621
2622 r = -EINVAL;
2623 if (log->slot >= KVM_MEMORY_SLOTS)
2624 goto out;
2625
2626 memslot = &kvm->memslots->memslots[log->slot];
2627 r = -ENOENT;
2628 if (!memslot->dirty_bitmap)
2629 goto out;
2630
2631 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2632
2633 r = -ENOMEM;
2634 dirty_bitmap = vmalloc(n);
2635 if (!dirty_bitmap)
2636 goto out;
2637 memset(dirty_bitmap, 0, n);
2638
2639 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2640 is_dirty = memslot->dirty_bitmap[i];
2641
2642 /* If nothing is dirty, don't bother messing with page tables. */
2643 if (is_dirty) {
2644 struct kvm_memslots *slots, *old_slots;
2645
2646 spin_lock(&kvm->mmu_lock);
2647 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2648 spin_unlock(&kvm->mmu_lock);
2649
2650 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2651 if (!slots)
2652 goto out_free;
2653
2654 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2655 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2656
2657 old_slots = kvm->memslots;
2658 rcu_assign_pointer(kvm->memslots, slots);
2659 synchronize_srcu_expedited(&kvm->srcu);
2660 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2661 kfree(old_slots);
2662 }
2663
2664 r = 0;
2665 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2666 r = -EFAULT;
2667 out_free:
2668 vfree(dirty_bitmap);
2669 out:
2670 mutex_unlock(&kvm->slots_lock);
2671 return r;
2672 }
2673
2674 long kvm_arch_vm_ioctl(struct file *filp,
2675 unsigned int ioctl, unsigned long arg)
2676 {
2677 struct kvm *kvm = filp->private_data;
2678 void __user *argp = (void __user *)arg;
2679 int r = -ENOTTY;
2680 /*
2681 * This union makes it completely explicit to gcc-3.x
2682 * that these two variables' stack usage should be
2683 * combined, not added together.
2684 */
2685 union {
2686 struct kvm_pit_state ps;
2687 struct kvm_pit_state2 ps2;
2688 struct kvm_memory_alias alias;
2689 struct kvm_pit_config pit_config;
2690 } u;
2691
2692 switch (ioctl) {
2693 case KVM_SET_TSS_ADDR:
2694 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2695 if (r < 0)
2696 goto out;
2697 break;
2698 case KVM_SET_IDENTITY_MAP_ADDR: {
2699 u64 ident_addr;
2700
2701 r = -EFAULT;
2702 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2703 goto out;
2704 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2705 if (r < 0)
2706 goto out;
2707 break;
2708 }
2709 case KVM_SET_MEMORY_REGION: {
2710 struct kvm_memory_region kvm_mem;
2711 struct kvm_userspace_memory_region kvm_userspace_mem;
2712
2713 r = -EFAULT;
2714 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2715 goto out;
2716 kvm_userspace_mem.slot = kvm_mem.slot;
2717 kvm_userspace_mem.flags = kvm_mem.flags;
2718 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2719 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2720 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2721 if (r)
2722 goto out;
2723 break;
2724 }
2725 case KVM_SET_NR_MMU_PAGES:
2726 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2727 if (r)
2728 goto out;
2729 break;
2730 case KVM_GET_NR_MMU_PAGES:
2731 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2732 break;
2733 case KVM_SET_MEMORY_ALIAS:
2734 r = -EFAULT;
2735 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2736 goto out;
2737 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2738 if (r)
2739 goto out;
2740 break;
2741 case KVM_CREATE_IRQCHIP: {
2742 struct kvm_pic *vpic;
2743
2744 mutex_lock(&kvm->lock);
2745 r = -EEXIST;
2746 if (kvm->arch.vpic)
2747 goto create_irqchip_unlock;
2748 r = -ENOMEM;
2749 vpic = kvm_create_pic(kvm);
2750 if (vpic) {
2751 r = kvm_ioapic_init(kvm);
2752 if (r) {
2753 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2754 &vpic->dev);
2755 kfree(vpic);
2756 goto create_irqchip_unlock;
2757 }
2758 } else
2759 goto create_irqchip_unlock;
2760 smp_wmb();
2761 kvm->arch.vpic = vpic;
2762 smp_wmb();
2763 r = kvm_setup_default_irq_routing(kvm);
2764 if (r) {
2765 mutex_lock(&kvm->irq_lock);
2766 kvm_ioapic_destroy(kvm);
2767 kvm_destroy_pic(kvm);
2768 mutex_unlock(&kvm->irq_lock);
2769 }
2770 create_irqchip_unlock:
2771 mutex_unlock(&kvm->lock);
2772 break;
2773 }
2774 case KVM_CREATE_PIT:
2775 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2776 goto create_pit;
2777 case KVM_CREATE_PIT2:
2778 r = -EFAULT;
2779 if (copy_from_user(&u.pit_config, argp,
2780 sizeof(struct kvm_pit_config)))
2781 goto out;
2782 create_pit:
2783 mutex_lock(&kvm->slots_lock);
2784 r = -EEXIST;
2785 if (kvm->arch.vpit)
2786 goto create_pit_unlock;
2787 r = -ENOMEM;
2788 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2789 if (kvm->arch.vpit)
2790 r = 0;
2791 create_pit_unlock:
2792 mutex_unlock(&kvm->slots_lock);
2793 break;
2794 case KVM_IRQ_LINE_STATUS:
2795 case KVM_IRQ_LINE: {
2796 struct kvm_irq_level irq_event;
2797
2798 r = -EFAULT;
2799 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2800 goto out;
2801 if (irqchip_in_kernel(kvm)) {
2802 __s32 status;
2803 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2804 irq_event.irq, irq_event.level);
2805 if (ioctl == KVM_IRQ_LINE_STATUS) {
2806 irq_event.status = status;
2807 if (copy_to_user(argp, &irq_event,
2808 sizeof irq_event))
2809 goto out;
2810 }
2811 r = 0;
2812 }
2813 break;
2814 }
2815 case KVM_GET_IRQCHIP: {
2816 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2817 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2818
2819 r = -ENOMEM;
2820 if (!chip)
2821 goto out;
2822 r = -EFAULT;
2823 if (copy_from_user(chip, argp, sizeof *chip))
2824 goto get_irqchip_out;
2825 r = -ENXIO;
2826 if (!irqchip_in_kernel(kvm))
2827 goto get_irqchip_out;
2828 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2829 if (r)
2830 goto get_irqchip_out;
2831 r = -EFAULT;
2832 if (copy_to_user(argp, chip, sizeof *chip))
2833 goto get_irqchip_out;
2834 r = 0;
2835 get_irqchip_out:
2836 kfree(chip);
2837 if (r)
2838 goto out;
2839 break;
2840 }
2841 case KVM_SET_IRQCHIP: {
2842 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2843 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2844
2845 r = -ENOMEM;
2846 if (!chip)
2847 goto out;
2848 r = -EFAULT;
2849 if (copy_from_user(chip, argp, sizeof *chip))
2850 goto set_irqchip_out;
2851 r = -ENXIO;
2852 if (!irqchip_in_kernel(kvm))
2853 goto set_irqchip_out;
2854 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2855 if (r)
2856 goto set_irqchip_out;
2857 r = 0;
2858 set_irqchip_out:
2859 kfree(chip);
2860 if (r)
2861 goto out;
2862 break;
2863 }
2864 case KVM_GET_PIT: {
2865 r = -EFAULT;
2866 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2867 goto out;
2868 r = -ENXIO;
2869 if (!kvm->arch.vpit)
2870 goto out;
2871 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2872 if (r)
2873 goto out;
2874 r = -EFAULT;
2875 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2876 goto out;
2877 r = 0;
2878 break;
2879 }
2880 case KVM_SET_PIT: {
2881 r = -EFAULT;
2882 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2883 goto out;
2884 r = -ENXIO;
2885 if (!kvm->arch.vpit)
2886 goto out;
2887 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2888 if (r)
2889 goto out;
2890 r = 0;
2891 break;
2892 }
2893 case KVM_GET_PIT2: {
2894 r = -ENXIO;
2895 if (!kvm->arch.vpit)
2896 goto out;
2897 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2898 if (r)
2899 goto out;
2900 r = -EFAULT;
2901 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2902 goto out;
2903 r = 0;
2904 break;
2905 }
2906 case KVM_SET_PIT2: {
2907 r = -EFAULT;
2908 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2909 goto out;
2910 r = -ENXIO;
2911 if (!kvm->arch.vpit)
2912 goto out;
2913 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2914 if (r)
2915 goto out;
2916 r = 0;
2917 break;
2918 }
2919 case KVM_REINJECT_CONTROL: {
2920 struct kvm_reinject_control control;
2921 r = -EFAULT;
2922 if (copy_from_user(&control, argp, sizeof(control)))
2923 goto out;
2924 r = kvm_vm_ioctl_reinject(kvm, &control);
2925 if (r)
2926 goto out;
2927 r = 0;
2928 break;
2929 }
2930 case KVM_XEN_HVM_CONFIG: {
2931 r = -EFAULT;
2932 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2933 sizeof(struct kvm_xen_hvm_config)))
2934 goto out;
2935 r = -EINVAL;
2936 if (kvm->arch.xen_hvm_config.flags)
2937 goto out;
2938 r = 0;
2939 break;
2940 }
2941 case KVM_SET_CLOCK: {
2942 struct timespec now;
2943 struct kvm_clock_data user_ns;
2944 u64 now_ns;
2945 s64 delta;
2946
2947 r = -EFAULT;
2948 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2949 goto out;
2950
2951 r = -EINVAL;
2952 if (user_ns.flags)
2953 goto out;
2954
2955 r = 0;
2956 ktime_get_ts(&now);
2957 now_ns = timespec_to_ns(&now);
2958 delta = user_ns.clock - now_ns;
2959 kvm->arch.kvmclock_offset = delta;
2960 break;
2961 }
2962 case KVM_GET_CLOCK: {
2963 struct timespec now;
2964 struct kvm_clock_data user_ns;
2965 u64 now_ns;
2966
2967 ktime_get_ts(&now);
2968 now_ns = timespec_to_ns(&now);
2969 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2970 user_ns.flags = 0;
2971
2972 r = -EFAULT;
2973 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2974 goto out;
2975 r = 0;
2976 break;
2977 }
2978
2979 default:
2980 ;
2981 }
2982 out:
2983 return r;
2984 }
2985
2986 static void kvm_init_msr_list(void)
2987 {
2988 u32 dummy[2];
2989 unsigned i, j;
2990
2991 /* skip the first msrs in the list. KVM-specific */
2992 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2993 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2994 continue;
2995 if (j < i)
2996 msrs_to_save[j] = msrs_to_save[i];
2997 j++;
2998 }
2999 num_msrs_to_save = j;
3000 }
3001
3002 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3003 const void *v)
3004 {
3005 if (vcpu->arch.apic &&
3006 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3007 return 0;
3008
3009 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3010 }
3011
3012 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3013 {
3014 if (vcpu->arch.apic &&
3015 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3016 return 0;
3017
3018 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3019 }
3020
3021 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3022 {
3023 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3024 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3025 }
3026
3027 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3028 {
3029 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3030 access |= PFERR_FETCH_MASK;
3031 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3032 }
3033
3034 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3035 {
3036 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3037 access |= PFERR_WRITE_MASK;
3038 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3039 }
3040
3041 /* uses this to access any guest's mapped memory without checking CPL */
3042 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3043 {
3044 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3045 }
3046
3047 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3048 struct kvm_vcpu *vcpu, u32 access,
3049 u32 *error)
3050 {
3051 void *data = val;
3052 int r = X86EMUL_CONTINUE;
3053
3054 while (bytes) {
3055 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3056 unsigned offset = addr & (PAGE_SIZE-1);
3057 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3058 int ret;
3059
3060 if (gpa == UNMAPPED_GVA) {
3061 r = X86EMUL_PROPAGATE_FAULT;
3062 goto out;
3063 }
3064 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3065 if (ret < 0) {
3066 r = X86EMUL_UNHANDLEABLE;
3067 goto out;
3068 }
3069
3070 bytes -= toread;
3071 data += toread;
3072 addr += toread;
3073 }
3074 out:
3075 return r;
3076 }
3077
3078 /* used for instruction fetching */
3079 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3080 struct kvm_vcpu *vcpu, u32 *error)
3081 {
3082 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3083 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3084 access | PFERR_FETCH_MASK, error);
3085 }
3086
3087 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3088 struct kvm_vcpu *vcpu, u32 *error)
3089 {
3090 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3091 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3092 error);
3093 }
3094
3095 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3096 struct kvm_vcpu *vcpu, u32 *error)
3097 {
3098 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3099 }
3100
3101 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
3102 struct kvm_vcpu *vcpu, u32 *error)
3103 {
3104 void *data = val;
3105 int r = X86EMUL_CONTINUE;
3106
3107 while (bytes) {
3108 gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error);
3109 unsigned offset = addr & (PAGE_SIZE-1);
3110 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3111 int ret;
3112
3113 if (gpa == UNMAPPED_GVA) {
3114 r = X86EMUL_PROPAGATE_FAULT;
3115 goto out;
3116 }
3117 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3118 if (ret < 0) {
3119 r = X86EMUL_UNHANDLEABLE;
3120 goto out;
3121 }
3122
3123 bytes -= towrite;
3124 data += towrite;
3125 addr += towrite;
3126 }
3127 out:
3128 return r;
3129 }
3130
3131
3132 static int emulator_read_emulated(unsigned long addr,
3133 void *val,
3134 unsigned int bytes,
3135 struct kvm_vcpu *vcpu)
3136 {
3137 gpa_t gpa;
3138 u32 error_code;
3139
3140 if (vcpu->mmio_read_completed) {
3141 memcpy(val, vcpu->mmio_data, bytes);
3142 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3143 vcpu->mmio_phys_addr, *(u64 *)val);
3144 vcpu->mmio_read_completed = 0;
3145 return X86EMUL_CONTINUE;
3146 }
3147
3148 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3149
3150 if (gpa == UNMAPPED_GVA) {
3151 kvm_inject_page_fault(vcpu, addr, error_code);
3152 return X86EMUL_PROPAGATE_FAULT;
3153 }
3154
3155 /* For APIC access vmexit */
3156 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3157 goto mmio;
3158
3159 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3160 == X86EMUL_CONTINUE)
3161 return X86EMUL_CONTINUE;
3162
3163 mmio:
3164 /*
3165 * Is this MMIO handled locally?
3166 */
3167 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3168 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3169 return X86EMUL_CONTINUE;
3170 }
3171
3172 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3173
3174 vcpu->mmio_needed = 1;
3175 vcpu->mmio_phys_addr = gpa;
3176 vcpu->mmio_size = bytes;
3177 vcpu->mmio_is_write = 0;
3178
3179 return X86EMUL_UNHANDLEABLE;
3180 }
3181
3182 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3183 const void *val, int bytes)
3184 {
3185 int ret;
3186
3187 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3188 if (ret < 0)
3189 return 0;
3190 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3191 return 1;
3192 }
3193
3194 static int emulator_write_emulated_onepage(unsigned long addr,
3195 const void *val,
3196 unsigned int bytes,
3197 struct kvm_vcpu *vcpu)
3198 {
3199 gpa_t gpa;
3200 u32 error_code;
3201
3202 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3203
3204 if (gpa == UNMAPPED_GVA) {
3205 kvm_inject_page_fault(vcpu, addr, error_code);
3206 return X86EMUL_PROPAGATE_FAULT;
3207 }
3208
3209 /* For APIC access vmexit */
3210 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3211 goto mmio;
3212
3213 if (emulator_write_phys(vcpu, gpa, val, bytes))
3214 return X86EMUL_CONTINUE;
3215
3216 mmio:
3217 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3218 /*
3219 * Is this MMIO handled locally?
3220 */
3221 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3222 return X86EMUL_CONTINUE;
3223
3224 vcpu->mmio_needed = 1;
3225 vcpu->mmio_phys_addr = gpa;
3226 vcpu->mmio_size = bytes;
3227 vcpu->mmio_is_write = 1;
3228 memcpy(vcpu->mmio_data, val, bytes);
3229
3230 return X86EMUL_CONTINUE;
3231 }
3232
3233 int emulator_write_emulated(unsigned long addr,
3234 const void *val,
3235 unsigned int bytes,
3236 struct kvm_vcpu *vcpu)
3237 {
3238 /* Crossing a page boundary? */
3239 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3240 int rc, now;
3241
3242 now = -addr & ~PAGE_MASK;
3243 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3244 if (rc != X86EMUL_CONTINUE)
3245 return rc;
3246 addr += now;
3247 val += now;
3248 bytes -= now;
3249 }
3250 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3251 }
3252 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3253
3254 static int emulator_cmpxchg_emulated(unsigned long addr,
3255 const void *old,
3256 const void *new,
3257 unsigned int bytes,
3258 struct kvm_vcpu *vcpu)
3259 {
3260 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3261 #ifndef CONFIG_X86_64
3262 /* guests cmpxchg8b have to be emulated atomically */
3263 if (bytes == 8) {
3264 gpa_t gpa;
3265 struct page *page;
3266 char *kaddr;
3267 u64 val;
3268
3269 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3270
3271 if (gpa == UNMAPPED_GVA ||
3272 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3273 goto emul_write;
3274
3275 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3276 goto emul_write;
3277
3278 val = *(u64 *)new;
3279
3280 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3281
3282 kaddr = kmap_atomic(page, KM_USER0);
3283 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
3284 kunmap_atomic(kaddr, KM_USER0);
3285 kvm_release_page_dirty(page);
3286 }
3287 emul_write:
3288 #endif
3289
3290 return emulator_write_emulated(addr, new, bytes, vcpu);
3291 }
3292
3293 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3294 {
3295 return kvm_x86_ops->get_segment_base(vcpu, seg);
3296 }
3297
3298 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3299 {
3300 kvm_mmu_invlpg(vcpu, address);
3301 return X86EMUL_CONTINUE;
3302 }
3303
3304 int emulate_clts(struct kvm_vcpu *vcpu)
3305 {
3306 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3307 kvm_x86_ops->fpu_activate(vcpu);
3308 return X86EMUL_CONTINUE;
3309 }
3310
3311 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3312 {
3313 return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest);
3314 }
3315
3316 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3317 {
3318 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3319
3320 return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask);
3321 }
3322
3323 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3324 {
3325 u8 opcodes[4];
3326 unsigned long rip = kvm_rip_read(vcpu);
3327 unsigned long rip_linear;
3328
3329 if (!printk_ratelimit())
3330 return;
3331
3332 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3333
3334 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3335
3336 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3337 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3338 }
3339 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3340
3341 static struct x86_emulate_ops emulate_ops = {
3342 .read_std = kvm_read_guest_virt_system,
3343 .fetch = kvm_fetch_guest_virt,
3344 .read_emulated = emulator_read_emulated,
3345 .write_emulated = emulator_write_emulated,
3346 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3347 };
3348
3349 static void cache_all_regs(struct kvm_vcpu *vcpu)
3350 {
3351 kvm_register_read(vcpu, VCPU_REGS_RAX);
3352 kvm_register_read(vcpu, VCPU_REGS_RSP);
3353 kvm_register_read(vcpu, VCPU_REGS_RIP);
3354 vcpu->arch.regs_dirty = ~0;
3355 }
3356
3357 int emulate_instruction(struct kvm_vcpu *vcpu,
3358 unsigned long cr2,
3359 u16 error_code,
3360 int emulation_type)
3361 {
3362 int r, shadow_mask;
3363 struct decode_cache *c;
3364 struct kvm_run *run = vcpu->run;
3365
3366 kvm_clear_exception_queue(vcpu);
3367 vcpu->arch.mmio_fault_cr2 = cr2;
3368 /*
3369 * TODO: fix emulate.c to use guest_read/write_register
3370 * instead of direct ->regs accesses, can save hundred cycles
3371 * on Intel for instructions that don't read/change RSP, for
3372 * for example.
3373 */
3374 cache_all_regs(vcpu);
3375
3376 vcpu->mmio_is_write = 0;
3377 vcpu->arch.pio.string = 0;
3378
3379 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3380 int cs_db, cs_l;
3381 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3382
3383 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3384 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
3385 vcpu->arch.emulate_ctxt.mode =
3386 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3387 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3388 ? X86EMUL_MODE_VM86 : cs_l
3389 ? X86EMUL_MODE_PROT64 : cs_db
3390 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3391
3392 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3393
3394 /* Only allow emulation of specific instructions on #UD
3395 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3396 c = &vcpu->arch.emulate_ctxt.decode;
3397 if (emulation_type & EMULTYPE_TRAP_UD) {
3398 if (!c->twobyte)
3399 return EMULATE_FAIL;
3400 switch (c->b) {
3401 case 0x01: /* VMMCALL */
3402 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3403 return EMULATE_FAIL;
3404 break;
3405 case 0x34: /* sysenter */
3406 case 0x35: /* sysexit */
3407 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3408 return EMULATE_FAIL;
3409 break;
3410 case 0x05: /* syscall */
3411 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3412 return EMULATE_FAIL;
3413 break;
3414 default:
3415 return EMULATE_FAIL;
3416 }
3417
3418 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3419 return EMULATE_FAIL;
3420 }
3421
3422 ++vcpu->stat.insn_emulation;
3423 if (r) {
3424 ++vcpu->stat.insn_emulation_fail;
3425 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3426 return EMULATE_DONE;
3427 return EMULATE_FAIL;
3428 }
3429 }
3430
3431 if (emulation_type & EMULTYPE_SKIP) {
3432 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3433 return EMULATE_DONE;
3434 }
3435
3436 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3437 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3438
3439 if (r == 0)
3440 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3441
3442 if (vcpu->arch.pio.string)
3443 return EMULATE_DO_MMIO;
3444
3445 if ((r || vcpu->mmio_is_write) && run) {
3446 run->exit_reason = KVM_EXIT_MMIO;
3447 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3448 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3449 run->mmio.len = vcpu->mmio_size;
3450 run->mmio.is_write = vcpu->mmio_is_write;
3451 }
3452
3453 if (r) {
3454 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3455 return EMULATE_DONE;
3456 if (!vcpu->mmio_needed) {
3457 kvm_report_emulation_failure(vcpu, "mmio");
3458 return EMULATE_FAIL;
3459 }
3460 return EMULATE_DO_MMIO;
3461 }
3462
3463 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3464
3465 if (vcpu->mmio_is_write) {
3466 vcpu->mmio_needed = 0;
3467 return EMULATE_DO_MMIO;
3468 }
3469
3470 return EMULATE_DONE;
3471 }
3472 EXPORT_SYMBOL_GPL(emulate_instruction);
3473
3474 static int pio_copy_data(struct kvm_vcpu *vcpu)
3475 {
3476 void *p = vcpu->arch.pio_data;
3477 gva_t q = vcpu->arch.pio.guest_gva;
3478 unsigned bytes;
3479 int ret;
3480 u32 error_code;
3481
3482 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3483 if (vcpu->arch.pio.in)
3484 ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code);
3485 else
3486 ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code);
3487
3488 if (ret == X86EMUL_PROPAGATE_FAULT)
3489 kvm_inject_page_fault(vcpu, q, error_code);
3490
3491 return ret;
3492 }
3493
3494 int complete_pio(struct kvm_vcpu *vcpu)
3495 {
3496 struct kvm_pio_request *io = &vcpu->arch.pio;
3497 long delta;
3498 int r;
3499 unsigned long val;
3500
3501 if (!io->string) {
3502 if (io->in) {
3503 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3504 memcpy(&val, vcpu->arch.pio_data, io->size);
3505 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3506 }
3507 } else {
3508 if (io->in) {
3509 r = pio_copy_data(vcpu);
3510 if (r)
3511 goto out;
3512 }
3513
3514 delta = 1;
3515 if (io->rep) {
3516 delta *= io->cur_count;
3517 /*
3518 * The size of the register should really depend on
3519 * current address size.
3520 */
3521 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3522 val -= delta;
3523 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3524 }
3525 if (io->down)
3526 delta = -delta;
3527 delta *= io->size;
3528 if (io->in) {
3529 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3530 val += delta;
3531 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3532 } else {
3533 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3534 val += delta;
3535 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3536 }
3537 }
3538 out:
3539 io->count -= io->cur_count;
3540 io->cur_count = 0;
3541
3542 return 0;
3543 }
3544
3545 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3546 {
3547 /* TODO: String I/O for in kernel device */
3548 int r;
3549
3550 if (vcpu->arch.pio.in)
3551 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3552 vcpu->arch.pio.size, pd);
3553 else
3554 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3555 vcpu->arch.pio.port, vcpu->arch.pio.size,
3556 pd);
3557 return r;
3558 }
3559
3560 static int pio_string_write(struct kvm_vcpu *vcpu)
3561 {
3562 struct kvm_pio_request *io = &vcpu->arch.pio;
3563 void *pd = vcpu->arch.pio_data;
3564 int i, r = 0;
3565
3566 for (i = 0; i < io->cur_count; i++) {
3567 if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3568 io->port, io->size, pd)) {
3569 r = -EOPNOTSUPP;
3570 break;
3571 }
3572 pd += io->size;
3573 }
3574 return r;
3575 }
3576
3577 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3578 {
3579 unsigned long val;
3580
3581 trace_kvm_pio(!in, port, size, 1);
3582
3583 vcpu->run->exit_reason = KVM_EXIT_IO;
3584 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3585 vcpu->run->io.size = vcpu->arch.pio.size = size;
3586 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3587 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3588 vcpu->run->io.port = vcpu->arch.pio.port = port;
3589 vcpu->arch.pio.in = in;
3590 vcpu->arch.pio.string = 0;
3591 vcpu->arch.pio.down = 0;
3592 vcpu->arch.pio.rep = 0;
3593
3594 if (!vcpu->arch.pio.in) {
3595 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3596 memcpy(vcpu->arch.pio_data, &val, 4);
3597 }
3598
3599 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3600 complete_pio(vcpu);
3601 return 1;
3602 }
3603 return 0;
3604 }
3605 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3606
3607 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3608 int size, unsigned long count, int down,
3609 gva_t address, int rep, unsigned port)
3610 {
3611 unsigned now, in_page;
3612 int ret = 0;
3613
3614 trace_kvm_pio(!in, port, size, count);
3615
3616 vcpu->run->exit_reason = KVM_EXIT_IO;
3617 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3618 vcpu->run->io.size = vcpu->arch.pio.size = size;
3619 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3620 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3621 vcpu->run->io.port = vcpu->arch.pio.port = port;
3622 vcpu->arch.pio.in = in;
3623 vcpu->arch.pio.string = 1;
3624 vcpu->arch.pio.down = down;
3625 vcpu->arch.pio.rep = rep;
3626
3627 if (!count) {
3628 kvm_x86_ops->skip_emulated_instruction(vcpu);
3629 return 1;
3630 }
3631
3632 if (!down)
3633 in_page = PAGE_SIZE - offset_in_page(address);
3634 else
3635 in_page = offset_in_page(address) + size;
3636 now = min(count, (unsigned long)in_page / size);
3637 if (!now)
3638 now = 1;
3639 if (down) {
3640 /*
3641 * String I/O in reverse. Yuck. Kill the guest, fix later.
3642 */
3643 pr_unimpl(vcpu, "guest string pio down\n");
3644 kvm_inject_gp(vcpu, 0);
3645 return 1;
3646 }
3647 vcpu->run->io.count = now;
3648 vcpu->arch.pio.cur_count = now;
3649
3650 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3651 kvm_x86_ops->skip_emulated_instruction(vcpu);
3652
3653 vcpu->arch.pio.guest_gva = address;
3654
3655 if (!vcpu->arch.pio.in) {
3656 /* string PIO write */
3657 ret = pio_copy_data(vcpu);
3658 if (ret == X86EMUL_PROPAGATE_FAULT)
3659 return 1;
3660 if (ret == 0 && !pio_string_write(vcpu)) {
3661 complete_pio(vcpu);
3662 if (vcpu->arch.pio.count == 0)
3663 ret = 1;
3664 }
3665 }
3666 /* no string PIO read support yet */
3667
3668 return ret;
3669 }
3670 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3671
3672 static void bounce_off(void *info)
3673 {
3674 /* nothing */
3675 }
3676
3677 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3678 void *data)
3679 {
3680 struct cpufreq_freqs *freq = data;
3681 struct kvm *kvm;
3682 struct kvm_vcpu *vcpu;
3683 int i, send_ipi = 0;
3684
3685 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3686 return 0;
3687 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3688 return 0;
3689 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3690
3691 spin_lock(&kvm_lock);
3692 list_for_each_entry(kvm, &vm_list, vm_list) {
3693 kvm_for_each_vcpu(i, vcpu, kvm) {
3694 if (vcpu->cpu != freq->cpu)
3695 continue;
3696 if (!kvm_request_guest_time_update(vcpu))
3697 continue;
3698 if (vcpu->cpu != smp_processor_id())
3699 send_ipi++;
3700 }
3701 }
3702 spin_unlock(&kvm_lock);
3703
3704 if (freq->old < freq->new && send_ipi) {
3705 /*
3706 * We upscale the frequency. Must make the guest
3707 * doesn't see old kvmclock values while running with
3708 * the new frequency, otherwise we risk the guest sees
3709 * time go backwards.
3710 *
3711 * In case we update the frequency for another cpu
3712 * (which might be in guest context) send an interrupt
3713 * to kick the cpu out of guest context. Next time
3714 * guest context is entered kvmclock will be updated,
3715 * so the guest will not see stale values.
3716 */
3717 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3718 }
3719 return 0;
3720 }
3721
3722 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3723 .notifier_call = kvmclock_cpufreq_notifier
3724 };
3725
3726 static void kvm_timer_init(void)
3727 {
3728 int cpu;
3729
3730 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3731 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3732 CPUFREQ_TRANSITION_NOTIFIER);
3733 for_each_online_cpu(cpu) {
3734 unsigned long khz = cpufreq_get(cpu);
3735 if (!khz)
3736 khz = tsc_khz;
3737 per_cpu(cpu_tsc_khz, cpu) = khz;
3738 }
3739 } else {
3740 for_each_possible_cpu(cpu)
3741 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3742 }
3743 }
3744
3745 int kvm_arch_init(void *opaque)
3746 {
3747 int r;
3748 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3749
3750 if (kvm_x86_ops) {
3751 printk(KERN_ERR "kvm: already loaded the other module\n");
3752 r = -EEXIST;
3753 goto out;
3754 }
3755
3756 if (!ops->cpu_has_kvm_support()) {
3757 printk(KERN_ERR "kvm: no hardware support\n");
3758 r = -EOPNOTSUPP;
3759 goto out;
3760 }
3761 if (ops->disabled_by_bios()) {
3762 printk(KERN_ERR "kvm: disabled by bios\n");
3763 r = -EOPNOTSUPP;
3764 goto out;
3765 }
3766
3767 r = kvm_mmu_module_init();
3768 if (r)
3769 goto out;
3770
3771 kvm_init_msr_list();
3772
3773 kvm_x86_ops = ops;
3774 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3775 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3776 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3777 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3778
3779 kvm_timer_init();
3780
3781 return 0;
3782
3783 out:
3784 return r;
3785 }
3786
3787 void kvm_arch_exit(void)
3788 {
3789 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3790 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3791 CPUFREQ_TRANSITION_NOTIFIER);
3792 kvm_x86_ops = NULL;
3793 kvm_mmu_module_exit();
3794 }
3795
3796 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3797 {
3798 ++vcpu->stat.halt_exits;
3799 if (irqchip_in_kernel(vcpu->kvm)) {
3800 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3801 return 1;
3802 } else {
3803 vcpu->run->exit_reason = KVM_EXIT_HLT;
3804 return 0;
3805 }
3806 }
3807 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3808
3809 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3810 unsigned long a1)
3811 {
3812 if (is_long_mode(vcpu))
3813 return a0;
3814 else
3815 return a0 | ((gpa_t)a1 << 32);
3816 }
3817
3818 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
3819 {
3820 u64 param, ingpa, outgpa, ret;
3821 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
3822 bool fast, longmode;
3823 int cs_db, cs_l;
3824
3825 /*
3826 * hypercall generates UD from non zero cpl and real mode
3827 * per HYPER-V spec
3828 */
3829 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
3830 kvm_queue_exception(vcpu, UD_VECTOR);
3831 return 0;
3832 }
3833
3834 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3835 longmode = is_long_mode(vcpu) && cs_l == 1;
3836
3837 if (!longmode) {
3838 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
3839 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
3840 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
3841 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
3842 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
3843 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
3844 }
3845 #ifdef CONFIG_X86_64
3846 else {
3847 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
3848 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
3849 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
3850 }
3851 #endif
3852
3853 code = param & 0xffff;
3854 fast = (param >> 16) & 0x1;
3855 rep_cnt = (param >> 32) & 0xfff;
3856 rep_idx = (param >> 48) & 0xfff;
3857
3858 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
3859
3860 switch (code) {
3861 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
3862 kvm_vcpu_on_spin(vcpu);
3863 break;
3864 default:
3865 res = HV_STATUS_INVALID_HYPERCALL_CODE;
3866 break;
3867 }
3868
3869 ret = res | (((u64)rep_done & 0xfff) << 32);
3870 if (longmode) {
3871 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3872 } else {
3873 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
3874 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
3875 }
3876
3877 return 1;
3878 }
3879
3880 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3881 {
3882 unsigned long nr, a0, a1, a2, a3, ret;
3883 int r = 1;
3884
3885 if (kvm_hv_hypercall_enabled(vcpu->kvm))
3886 return kvm_hv_hypercall(vcpu);
3887
3888 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3889 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3890 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3891 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3892 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3893
3894 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3895
3896 if (!is_long_mode(vcpu)) {
3897 nr &= 0xFFFFFFFF;
3898 a0 &= 0xFFFFFFFF;
3899 a1 &= 0xFFFFFFFF;
3900 a2 &= 0xFFFFFFFF;
3901 a3 &= 0xFFFFFFFF;
3902 }
3903
3904 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3905 ret = -KVM_EPERM;
3906 goto out;
3907 }
3908
3909 switch (nr) {
3910 case KVM_HC_VAPIC_POLL_IRQ:
3911 ret = 0;
3912 break;
3913 case KVM_HC_MMU_OP:
3914 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3915 break;
3916 default:
3917 ret = -KVM_ENOSYS;
3918 break;
3919 }
3920 out:
3921 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3922 ++vcpu->stat.hypercalls;
3923 return r;
3924 }
3925 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3926
3927 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3928 {
3929 char instruction[3];
3930 unsigned long rip = kvm_rip_read(vcpu);
3931
3932 /*
3933 * Blow out the MMU to ensure that no other VCPU has an active mapping
3934 * to ensure that the updated hypercall appears atomically across all
3935 * VCPUs.
3936 */
3937 kvm_mmu_zap_all(vcpu->kvm);
3938
3939 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3940
3941 return emulator_write_emulated(rip, instruction, 3, vcpu);
3942 }
3943
3944 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3945 {
3946 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3947 }
3948
3949 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3950 {
3951 struct descriptor_table dt = { limit, base };
3952
3953 kvm_x86_ops->set_gdt(vcpu, &dt);
3954 }
3955
3956 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3957 {
3958 struct descriptor_table dt = { limit, base };
3959
3960 kvm_x86_ops->set_idt(vcpu, &dt);
3961 }
3962
3963 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3964 unsigned long *rflags)
3965 {
3966 kvm_lmsw(vcpu, msw);
3967 *rflags = kvm_get_rflags(vcpu);
3968 }
3969
3970 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3971 {
3972 unsigned long value;
3973
3974 switch (cr) {
3975 case 0:
3976 value = kvm_read_cr0(vcpu);
3977 break;
3978 case 2:
3979 value = vcpu->arch.cr2;
3980 break;
3981 case 3:
3982 value = vcpu->arch.cr3;
3983 break;
3984 case 4:
3985 value = kvm_read_cr4(vcpu);
3986 break;
3987 case 8:
3988 value = kvm_get_cr8(vcpu);
3989 break;
3990 default:
3991 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3992 return 0;
3993 }
3994
3995 return value;
3996 }
3997
3998 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3999 unsigned long *rflags)
4000 {
4001 switch (cr) {
4002 case 0:
4003 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4004 *rflags = kvm_get_rflags(vcpu);
4005 break;
4006 case 2:
4007 vcpu->arch.cr2 = val;
4008 break;
4009 case 3:
4010 kvm_set_cr3(vcpu, val);
4011 break;
4012 case 4:
4013 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4014 break;
4015 case 8:
4016 kvm_set_cr8(vcpu, val & 0xfUL);
4017 break;
4018 default:
4019 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4020 }
4021 }
4022
4023 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4024 {
4025 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4026 int j, nent = vcpu->arch.cpuid_nent;
4027
4028 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4029 /* when no next entry is found, the current entry[i] is reselected */
4030 for (j = i + 1; ; j = (j + 1) % nent) {
4031 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4032 if (ej->function == e->function) {
4033 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4034 return j;
4035 }
4036 }
4037 return 0; /* silence gcc, even though control never reaches here */
4038 }
4039
4040 /* find an entry with matching function, matching index (if needed), and that
4041 * should be read next (if it's stateful) */
4042 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4043 u32 function, u32 index)
4044 {
4045 if (e->function != function)
4046 return 0;
4047 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4048 return 0;
4049 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4050 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4051 return 0;
4052 return 1;
4053 }
4054
4055 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4056 u32 function, u32 index)
4057 {
4058 int i;
4059 struct kvm_cpuid_entry2 *best = NULL;
4060
4061 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4062 struct kvm_cpuid_entry2 *e;
4063
4064 e = &vcpu->arch.cpuid_entries[i];
4065 if (is_matching_cpuid_entry(e, function, index)) {
4066 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4067 move_to_next_stateful_cpuid_entry(vcpu, i);
4068 best = e;
4069 break;
4070 }
4071 /*
4072 * Both basic or both extended?
4073 */
4074 if (((e->function ^ function) & 0x80000000) == 0)
4075 if (!best || e->function > best->function)
4076 best = e;
4077 }
4078 return best;
4079 }
4080 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4081
4082 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4083 {
4084 struct kvm_cpuid_entry2 *best;
4085
4086 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4087 if (best)
4088 return best->eax & 0xff;
4089 return 36;
4090 }
4091
4092 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4093 {
4094 u32 function, index;
4095 struct kvm_cpuid_entry2 *best;
4096
4097 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4098 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4099 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4100 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4101 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4102 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4103 best = kvm_find_cpuid_entry(vcpu, function, index);
4104 if (best) {
4105 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4106 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4107 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4108 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4109 }
4110 kvm_x86_ops->skip_emulated_instruction(vcpu);
4111 trace_kvm_cpuid(function,
4112 kvm_register_read(vcpu, VCPU_REGS_RAX),
4113 kvm_register_read(vcpu, VCPU_REGS_RBX),
4114 kvm_register_read(vcpu, VCPU_REGS_RCX),
4115 kvm_register_read(vcpu, VCPU_REGS_RDX));
4116 }
4117 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4118
4119 /*
4120 * Check if userspace requested an interrupt window, and that the
4121 * interrupt window is open.
4122 *
4123 * No need to exit to userspace if we already have an interrupt queued.
4124 */
4125 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4126 {
4127 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4128 vcpu->run->request_interrupt_window &&
4129 kvm_arch_interrupt_allowed(vcpu));
4130 }
4131
4132 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4133 {
4134 struct kvm_run *kvm_run = vcpu->run;
4135
4136 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4137 kvm_run->cr8 = kvm_get_cr8(vcpu);
4138 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4139 if (irqchip_in_kernel(vcpu->kvm))
4140 kvm_run->ready_for_interrupt_injection = 1;
4141 else
4142 kvm_run->ready_for_interrupt_injection =
4143 kvm_arch_interrupt_allowed(vcpu) &&
4144 !kvm_cpu_has_interrupt(vcpu) &&
4145 !kvm_event_needs_reinjection(vcpu);
4146 }
4147
4148 static void vapic_enter(struct kvm_vcpu *vcpu)
4149 {
4150 struct kvm_lapic *apic = vcpu->arch.apic;
4151 struct page *page;
4152
4153 if (!apic || !apic->vapic_addr)
4154 return;
4155
4156 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4157
4158 vcpu->arch.apic->vapic_page = page;
4159 }
4160
4161 static void vapic_exit(struct kvm_vcpu *vcpu)
4162 {
4163 struct kvm_lapic *apic = vcpu->arch.apic;
4164 int idx;
4165
4166 if (!apic || !apic->vapic_addr)
4167 return;
4168
4169 idx = srcu_read_lock(&vcpu->kvm->srcu);
4170 kvm_release_page_dirty(apic->vapic_page);
4171 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4172 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4173 }
4174
4175 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4176 {
4177 int max_irr, tpr;
4178
4179 if (!kvm_x86_ops->update_cr8_intercept)
4180 return;
4181
4182 if (!vcpu->arch.apic)
4183 return;
4184
4185 if (!vcpu->arch.apic->vapic_addr)
4186 max_irr = kvm_lapic_find_highest_irr(vcpu);
4187 else
4188 max_irr = -1;
4189
4190 if (max_irr != -1)
4191 max_irr >>= 4;
4192
4193 tpr = kvm_lapic_get_cr8(vcpu);
4194
4195 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4196 }
4197
4198 static void inject_pending_event(struct kvm_vcpu *vcpu)
4199 {
4200 /* try to reinject previous events if any */
4201 if (vcpu->arch.exception.pending) {
4202 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4203 vcpu->arch.exception.has_error_code,
4204 vcpu->arch.exception.error_code);
4205 return;
4206 }
4207
4208 if (vcpu->arch.nmi_injected) {
4209 kvm_x86_ops->set_nmi(vcpu);
4210 return;
4211 }
4212
4213 if (vcpu->arch.interrupt.pending) {
4214 kvm_x86_ops->set_irq(vcpu);
4215 return;
4216 }
4217
4218 /* try to inject new event if pending */
4219 if (vcpu->arch.nmi_pending) {
4220 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4221 vcpu->arch.nmi_pending = false;
4222 vcpu->arch.nmi_injected = true;
4223 kvm_x86_ops->set_nmi(vcpu);
4224 }
4225 } else if (kvm_cpu_has_interrupt(vcpu)) {
4226 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4227 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4228 false);
4229 kvm_x86_ops->set_irq(vcpu);
4230 }
4231 }
4232 }
4233
4234 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4235 {
4236 int r;
4237 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4238 vcpu->run->request_interrupt_window;
4239
4240 if (vcpu->requests)
4241 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4242 kvm_mmu_unload(vcpu);
4243
4244 r = kvm_mmu_reload(vcpu);
4245 if (unlikely(r))
4246 goto out;
4247
4248 if (vcpu->requests) {
4249 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4250 __kvm_migrate_timers(vcpu);
4251 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4252 kvm_write_guest_time(vcpu);
4253 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4254 kvm_mmu_sync_roots(vcpu);
4255 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4256 kvm_x86_ops->tlb_flush(vcpu);
4257 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4258 &vcpu->requests)) {
4259 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4260 r = 0;
4261 goto out;
4262 }
4263 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4264 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4265 r = 0;
4266 goto out;
4267 }
4268 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4269 vcpu->fpu_active = 0;
4270 kvm_x86_ops->fpu_deactivate(vcpu);
4271 }
4272 }
4273
4274 preempt_disable();
4275
4276 kvm_x86_ops->prepare_guest_switch(vcpu);
4277 if (vcpu->fpu_active)
4278 kvm_load_guest_fpu(vcpu);
4279
4280 local_irq_disable();
4281
4282 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4283 smp_mb__after_clear_bit();
4284
4285 if (vcpu->requests || need_resched() || signal_pending(current)) {
4286 set_bit(KVM_REQ_KICK, &vcpu->requests);
4287 local_irq_enable();
4288 preempt_enable();
4289 r = 1;
4290 goto out;
4291 }
4292
4293 inject_pending_event(vcpu);
4294
4295 /* enable NMI/IRQ window open exits if needed */
4296 if (vcpu->arch.nmi_pending)
4297 kvm_x86_ops->enable_nmi_window(vcpu);
4298 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4299 kvm_x86_ops->enable_irq_window(vcpu);
4300
4301 if (kvm_lapic_enabled(vcpu)) {
4302 update_cr8_intercept(vcpu);
4303 kvm_lapic_sync_to_vapic(vcpu);
4304 }
4305
4306 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4307
4308 kvm_guest_enter();
4309
4310 if (unlikely(vcpu->arch.switch_db_regs)) {
4311 set_debugreg(0, 7);
4312 set_debugreg(vcpu->arch.eff_db[0], 0);
4313 set_debugreg(vcpu->arch.eff_db[1], 1);
4314 set_debugreg(vcpu->arch.eff_db[2], 2);
4315 set_debugreg(vcpu->arch.eff_db[3], 3);
4316 }
4317
4318 trace_kvm_entry(vcpu->vcpu_id);
4319 kvm_x86_ops->run(vcpu);
4320
4321 /*
4322 * If the guest has used debug registers, at least dr7
4323 * will be disabled while returning to the host.
4324 * If we don't have active breakpoints in the host, we don't
4325 * care about the messed up debug address registers. But if
4326 * we have some of them active, restore the old state.
4327 */
4328 if (hw_breakpoint_active())
4329 hw_breakpoint_restore();
4330
4331 set_bit(KVM_REQ_KICK, &vcpu->requests);
4332 local_irq_enable();
4333
4334 ++vcpu->stat.exits;
4335
4336 /*
4337 * We must have an instruction between local_irq_enable() and
4338 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4339 * the interrupt shadow. The stat.exits increment will do nicely.
4340 * But we need to prevent reordering, hence this barrier():
4341 */
4342 barrier();
4343
4344 kvm_guest_exit();
4345
4346 preempt_enable();
4347
4348 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4349
4350 /*
4351 * Profile KVM exit RIPs:
4352 */
4353 if (unlikely(prof_on == KVM_PROFILING)) {
4354 unsigned long rip = kvm_rip_read(vcpu);
4355 profile_hit(KVM_PROFILING, (void *)rip);
4356 }
4357
4358
4359 kvm_lapic_sync_from_vapic(vcpu);
4360
4361 r = kvm_x86_ops->handle_exit(vcpu);
4362 out:
4363 return r;
4364 }
4365
4366
4367 static int __vcpu_run(struct kvm_vcpu *vcpu)
4368 {
4369 int r;
4370 struct kvm *kvm = vcpu->kvm;
4371
4372 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4373 pr_debug("vcpu %d received sipi with vector # %x\n",
4374 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4375 kvm_lapic_reset(vcpu);
4376 r = kvm_arch_vcpu_reset(vcpu);
4377 if (r)
4378 return r;
4379 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4380 }
4381
4382 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4383 vapic_enter(vcpu);
4384
4385 r = 1;
4386 while (r > 0) {
4387 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4388 r = vcpu_enter_guest(vcpu);
4389 else {
4390 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4391 kvm_vcpu_block(vcpu);
4392 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4393 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4394 {
4395 switch(vcpu->arch.mp_state) {
4396 case KVM_MP_STATE_HALTED:
4397 vcpu->arch.mp_state =
4398 KVM_MP_STATE_RUNNABLE;
4399 case KVM_MP_STATE_RUNNABLE:
4400 break;
4401 case KVM_MP_STATE_SIPI_RECEIVED:
4402 default:
4403 r = -EINTR;
4404 break;
4405 }
4406 }
4407 }
4408
4409 if (r <= 0)
4410 break;
4411
4412 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4413 if (kvm_cpu_has_pending_timer(vcpu))
4414 kvm_inject_pending_timer_irqs(vcpu);
4415
4416 if (dm_request_for_irq_injection(vcpu)) {
4417 r = -EINTR;
4418 vcpu->run->exit_reason = KVM_EXIT_INTR;
4419 ++vcpu->stat.request_irq_exits;
4420 }
4421 if (signal_pending(current)) {
4422 r = -EINTR;
4423 vcpu->run->exit_reason = KVM_EXIT_INTR;
4424 ++vcpu->stat.signal_exits;
4425 }
4426 if (need_resched()) {
4427 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4428 kvm_resched(vcpu);
4429 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4430 }
4431 }
4432
4433 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4434 post_kvm_run_save(vcpu);
4435
4436 vapic_exit(vcpu);
4437
4438 return r;
4439 }
4440
4441 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4442 {
4443 int r;
4444 sigset_t sigsaved;
4445
4446 vcpu_load(vcpu);
4447
4448 if (vcpu->sigset_active)
4449 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4450
4451 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4452 kvm_vcpu_block(vcpu);
4453 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4454 r = -EAGAIN;
4455 goto out;
4456 }
4457
4458 /* re-sync apic's tpr */
4459 if (!irqchip_in_kernel(vcpu->kvm))
4460 kvm_set_cr8(vcpu, kvm_run->cr8);
4461
4462 if (vcpu->arch.pio.cur_count) {
4463 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4464 r = complete_pio(vcpu);
4465 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4466 if (r)
4467 goto out;
4468 }
4469 if (vcpu->mmio_needed) {
4470 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4471 vcpu->mmio_read_completed = 1;
4472 vcpu->mmio_needed = 0;
4473
4474 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4475 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4476 EMULTYPE_NO_DECODE);
4477 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4478 if (r == EMULATE_DO_MMIO) {
4479 /*
4480 * Read-modify-write. Back to userspace.
4481 */
4482 r = 0;
4483 goto out;
4484 }
4485 }
4486 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4487 kvm_register_write(vcpu, VCPU_REGS_RAX,
4488 kvm_run->hypercall.ret);
4489
4490 r = __vcpu_run(vcpu);
4491
4492 out:
4493 if (vcpu->sigset_active)
4494 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4495
4496 vcpu_put(vcpu);
4497 return r;
4498 }
4499
4500 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4501 {
4502 vcpu_load(vcpu);
4503
4504 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4505 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4506 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4507 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4508 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4509 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4510 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4511 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4512 #ifdef CONFIG_X86_64
4513 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4514 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4515 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4516 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4517 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4518 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4519 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4520 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4521 #endif
4522
4523 regs->rip = kvm_rip_read(vcpu);
4524 regs->rflags = kvm_get_rflags(vcpu);
4525
4526 vcpu_put(vcpu);
4527
4528 return 0;
4529 }
4530
4531 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4532 {
4533 vcpu_load(vcpu);
4534
4535 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4536 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4537 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4538 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4539 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4540 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4541 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4542 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4543 #ifdef CONFIG_X86_64
4544 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4545 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4546 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4547 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4548 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4549 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4550 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4551 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4552 #endif
4553
4554 kvm_rip_write(vcpu, regs->rip);
4555 kvm_set_rflags(vcpu, regs->rflags);
4556
4557 vcpu->arch.exception.pending = false;
4558
4559 vcpu_put(vcpu);
4560
4561 return 0;
4562 }
4563
4564 void kvm_get_segment(struct kvm_vcpu *vcpu,
4565 struct kvm_segment *var, int seg)
4566 {
4567 kvm_x86_ops->get_segment(vcpu, var, seg);
4568 }
4569
4570 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4571 {
4572 struct kvm_segment cs;
4573
4574 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4575 *db = cs.db;
4576 *l = cs.l;
4577 }
4578 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4579
4580 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4581 struct kvm_sregs *sregs)
4582 {
4583 struct descriptor_table dt;
4584
4585 vcpu_load(vcpu);
4586
4587 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4588 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4589 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4590 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4591 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4592 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4593
4594 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4595 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4596
4597 kvm_x86_ops->get_idt(vcpu, &dt);
4598 sregs->idt.limit = dt.limit;
4599 sregs->idt.base = dt.base;
4600 kvm_x86_ops->get_gdt(vcpu, &dt);
4601 sregs->gdt.limit = dt.limit;
4602 sregs->gdt.base = dt.base;
4603
4604 sregs->cr0 = kvm_read_cr0(vcpu);
4605 sregs->cr2 = vcpu->arch.cr2;
4606 sregs->cr3 = vcpu->arch.cr3;
4607 sregs->cr4 = kvm_read_cr4(vcpu);
4608 sregs->cr8 = kvm_get_cr8(vcpu);
4609 sregs->efer = vcpu->arch.efer;
4610 sregs->apic_base = kvm_get_apic_base(vcpu);
4611
4612 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4613
4614 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4615 set_bit(vcpu->arch.interrupt.nr,
4616 (unsigned long *)sregs->interrupt_bitmap);
4617
4618 vcpu_put(vcpu);
4619
4620 return 0;
4621 }
4622
4623 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4624 struct kvm_mp_state *mp_state)
4625 {
4626 vcpu_load(vcpu);
4627 mp_state->mp_state = vcpu->arch.mp_state;
4628 vcpu_put(vcpu);
4629 return 0;
4630 }
4631
4632 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4633 struct kvm_mp_state *mp_state)
4634 {
4635 vcpu_load(vcpu);
4636 vcpu->arch.mp_state = mp_state->mp_state;
4637 vcpu_put(vcpu);
4638 return 0;
4639 }
4640
4641 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4642 struct kvm_segment *var, int seg)
4643 {
4644 kvm_x86_ops->set_segment(vcpu, var, seg);
4645 }
4646
4647 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4648 struct kvm_segment *kvm_desct)
4649 {
4650 kvm_desct->base = get_desc_base(seg_desc);
4651 kvm_desct->limit = get_desc_limit(seg_desc);
4652 if (seg_desc->g) {
4653 kvm_desct->limit <<= 12;
4654 kvm_desct->limit |= 0xfff;
4655 }
4656 kvm_desct->selector = selector;
4657 kvm_desct->type = seg_desc->type;
4658 kvm_desct->present = seg_desc->p;
4659 kvm_desct->dpl = seg_desc->dpl;
4660 kvm_desct->db = seg_desc->d;
4661 kvm_desct->s = seg_desc->s;
4662 kvm_desct->l = seg_desc->l;
4663 kvm_desct->g = seg_desc->g;
4664 kvm_desct->avl = seg_desc->avl;
4665 if (!selector)
4666 kvm_desct->unusable = 1;
4667 else
4668 kvm_desct->unusable = 0;
4669 kvm_desct->padding = 0;
4670 }
4671
4672 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4673 u16 selector,
4674 struct descriptor_table *dtable)
4675 {
4676 if (selector & 1 << 2) {
4677 struct kvm_segment kvm_seg;
4678
4679 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4680
4681 if (kvm_seg.unusable)
4682 dtable->limit = 0;
4683 else
4684 dtable->limit = kvm_seg.limit;
4685 dtable->base = kvm_seg.base;
4686 }
4687 else
4688 kvm_x86_ops->get_gdt(vcpu, dtable);
4689 }
4690
4691 /* allowed just for 8 bytes segments */
4692 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4693 struct desc_struct *seg_desc)
4694 {
4695 struct descriptor_table dtable;
4696 u16 index = selector >> 3;
4697 int ret;
4698 u32 err;
4699 gva_t addr;
4700
4701 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4702
4703 if (dtable.limit < index * 8 + 7) {
4704 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4705 return X86EMUL_PROPAGATE_FAULT;
4706 }
4707 addr = dtable.base + index * 8;
4708 ret = kvm_read_guest_virt_system(addr, seg_desc, sizeof(*seg_desc),
4709 vcpu, &err);
4710 if (ret == X86EMUL_PROPAGATE_FAULT)
4711 kvm_inject_page_fault(vcpu, addr, err);
4712
4713 return ret;
4714 }
4715
4716 /* allowed just for 8 bytes segments */
4717 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4718 struct desc_struct *seg_desc)
4719 {
4720 struct descriptor_table dtable;
4721 u16 index = selector >> 3;
4722
4723 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4724
4725 if (dtable.limit < index * 8 + 7)
4726 return 1;
4727 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL);
4728 }
4729
4730 static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu,
4731 struct desc_struct *seg_desc)
4732 {
4733 u32 base_addr = get_desc_base(seg_desc);
4734
4735 return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL);
4736 }
4737
4738 static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu,
4739 struct desc_struct *seg_desc)
4740 {
4741 u32 base_addr = get_desc_base(seg_desc);
4742
4743 return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL);
4744 }
4745
4746 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4747 {
4748 struct kvm_segment kvm_seg;
4749
4750 kvm_get_segment(vcpu, &kvm_seg, seg);
4751 return kvm_seg.selector;
4752 }
4753
4754 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4755 {
4756 struct kvm_segment segvar = {
4757 .base = selector << 4,
4758 .limit = 0xffff,
4759 .selector = selector,
4760 .type = 3,
4761 .present = 1,
4762 .dpl = 3,
4763 .db = 0,
4764 .s = 1,
4765 .l = 0,
4766 .g = 0,
4767 .avl = 0,
4768 .unusable = 0,
4769 };
4770 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4771 return X86EMUL_CONTINUE;
4772 }
4773
4774 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4775 {
4776 return (seg != VCPU_SREG_LDTR) &&
4777 (seg != VCPU_SREG_TR) &&
4778 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4779 }
4780
4781 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg)
4782 {
4783 struct kvm_segment kvm_seg;
4784 struct desc_struct seg_desc;
4785 u8 dpl, rpl, cpl;
4786 unsigned err_vec = GP_VECTOR;
4787 u32 err_code = 0;
4788 bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
4789 int ret;
4790
4791 if (is_vm86_segment(vcpu, seg) || !is_protmode(vcpu))
4792 return kvm_load_realmode_segment(vcpu, selector, seg);
4793
4794 /* NULL selector is not valid for TR, CS and SS */
4795 if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
4796 && null_selector)
4797 goto exception;
4798
4799 /* TR should be in GDT only */
4800 if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
4801 goto exception;
4802
4803 ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc);
4804 if (ret)
4805 return ret;
4806
4807 seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg);
4808
4809 if (null_selector) { /* for NULL selector skip all following checks */
4810 kvm_seg.unusable = 1;
4811 goto load;
4812 }
4813
4814 err_code = selector & 0xfffc;
4815 err_vec = GP_VECTOR;
4816
4817 /* can't load system descriptor into segment selecor */
4818 if (seg <= VCPU_SREG_GS && !kvm_seg.s)
4819 goto exception;
4820
4821 if (!kvm_seg.present) {
4822 err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
4823 goto exception;
4824 }
4825
4826 rpl = selector & 3;
4827 dpl = kvm_seg.dpl;
4828 cpl = kvm_x86_ops->get_cpl(vcpu);
4829
4830 switch (seg) {
4831 case VCPU_SREG_SS:
4832 /*
4833 * segment is not a writable data segment or segment
4834 * selector's RPL != CPL or segment selector's RPL != CPL
4835 */
4836 if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl)
4837 goto exception;
4838 break;
4839 case VCPU_SREG_CS:
4840 if (!(kvm_seg.type & 8))
4841 goto exception;
4842
4843 if (kvm_seg.type & 4) {
4844 /* conforming */
4845 if (dpl > cpl)
4846 goto exception;
4847 } else {
4848 /* nonconforming */
4849 if (rpl > cpl || dpl != cpl)
4850 goto exception;
4851 }
4852 /* CS(RPL) <- CPL */
4853 selector = (selector & 0xfffc) | cpl;
4854 break;
4855 case VCPU_SREG_TR:
4856 if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9))
4857 goto exception;
4858 break;
4859 case VCPU_SREG_LDTR:
4860 if (kvm_seg.s || kvm_seg.type != 2)
4861 goto exception;
4862 break;
4863 default: /* DS, ES, FS, or GS */
4864 /*
4865 * segment is not a data or readable code segment or
4866 * ((segment is a data or nonconforming code segment)
4867 * and (both RPL and CPL > DPL))
4868 */
4869 if ((kvm_seg.type & 0xa) == 0x8 ||
4870 (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl)))
4871 goto exception;
4872 break;
4873 }
4874
4875 if (!kvm_seg.unusable && kvm_seg.s) {
4876 /* mark segment as accessed */
4877 kvm_seg.type |= 1;
4878 seg_desc.type |= 1;
4879 save_guest_segment_descriptor(vcpu, selector, &seg_desc);
4880 }
4881 load:
4882 kvm_set_segment(vcpu, &kvm_seg, seg);
4883 return X86EMUL_CONTINUE;
4884 exception:
4885 kvm_queue_exception_e(vcpu, err_vec, err_code);
4886 return X86EMUL_PROPAGATE_FAULT;
4887 }
4888
4889 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4890 struct tss_segment_32 *tss)
4891 {
4892 tss->cr3 = vcpu->arch.cr3;
4893 tss->eip = kvm_rip_read(vcpu);
4894 tss->eflags = kvm_get_rflags(vcpu);
4895 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4896 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4897 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4898 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4899 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4900 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4901 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4902 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4903 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4904 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4905 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4906 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4907 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4908 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4909 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4910 }
4911
4912 static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg)
4913 {
4914 struct kvm_segment kvm_seg;
4915 kvm_get_segment(vcpu, &kvm_seg, seg);
4916 kvm_seg.selector = sel;
4917 kvm_set_segment(vcpu, &kvm_seg, seg);
4918 }
4919
4920 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4921 struct tss_segment_32 *tss)
4922 {
4923 kvm_set_cr3(vcpu, tss->cr3);
4924
4925 kvm_rip_write(vcpu, tss->eip);
4926 kvm_set_rflags(vcpu, tss->eflags | 2);
4927
4928 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4929 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4930 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4931 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4932 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4933 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4934 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4935 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4936
4937 /*
4938 * SDM says that segment selectors are loaded before segment
4939 * descriptors
4940 */
4941 kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR);
4942 kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
4943 kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
4944 kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
4945 kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
4946 kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS);
4947 kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS);
4948
4949 /*
4950 * Now load segment descriptors. If fault happenes at this stage
4951 * it is handled in a context of new task
4952 */
4953 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR))
4954 return 1;
4955
4956 if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
4957 return 1;
4958
4959 if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
4960 return 1;
4961
4962 if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
4963 return 1;
4964
4965 if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
4966 return 1;
4967
4968 if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS))
4969 return 1;
4970
4971 if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS))
4972 return 1;
4973 return 0;
4974 }
4975
4976 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4977 struct tss_segment_16 *tss)
4978 {
4979 tss->ip = kvm_rip_read(vcpu);
4980 tss->flag = kvm_get_rflags(vcpu);
4981 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4982 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4983 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4984 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4985 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4986 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4987 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4988 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4989
4990 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4991 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4992 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4993 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4994 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4995 }
4996
4997 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4998 struct tss_segment_16 *tss)
4999 {
5000 kvm_rip_write(vcpu, tss->ip);
5001 kvm_set_rflags(vcpu, tss->flag | 2);
5002 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
5003 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
5004 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
5005 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
5006 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
5007 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
5008 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
5009 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
5010
5011 /*
5012 * SDM says that segment selectors are loaded before segment
5013 * descriptors
5014 */
5015 kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR);
5016 kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
5017 kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
5018 kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
5019 kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
5020
5021 /*
5022 * Now load segment descriptors. If fault happenes at this stage
5023 * it is handled in a context of new task
5024 */
5025 if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR))
5026 return 1;
5027
5028 if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
5029 return 1;
5030
5031 if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
5032 return 1;
5033
5034 if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
5035 return 1;
5036
5037 if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
5038 return 1;
5039 return 0;
5040 }
5041
5042 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
5043 u16 old_tss_sel, u32 old_tss_base,
5044 struct desc_struct *nseg_desc)
5045 {
5046 struct tss_segment_16 tss_segment_16;
5047 int ret = 0;
5048
5049 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5050 sizeof tss_segment_16))
5051 goto out;
5052
5053 save_state_to_tss16(vcpu, &tss_segment_16);
5054
5055 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5056 sizeof tss_segment_16))
5057 goto out;
5058
5059 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5060 &tss_segment_16, sizeof tss_segment_16))
5061 goto out;
5062
5063 if (old_tss_sel != 0xffff) {
5064 tss_segment_16.prev_task_link = old_tss_sel;
5065
5066 if (kvm_write_guest(vcpu->kvm,
5067 get_tss_base_addr_write(vcpu, nseg_desc),
5068 &tss_segment_16.prev_task_link,
5069 sizeof tss_segment_16.prev_task_link))
5070 goto out;
5071 }
5072
5073 if (load_state_from_tss16(vcpu, &tss_segment_16))
5074 goto out;
5075
5076 ret = 1;
5077 out:
5078 return ret;
5079 }
5080
5081 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
5082 u16 old_tss_sel, u32 old_tss_base,
5083 struct desc_struct *nseg_desc)
5084 {
5085 struct tss_segment_32 tss_segment_32;
5086 int ret = 0;
5087
5088 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5089 sizeof tss_segment_32))
5090 goto out;
5091
5092 save_state_to_tss32(vcpu, &tss_segment_32);
5093
5094 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5095 sizeof tss_segment_32))
5096 goto out;
5097
5098 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5099 &tss_segment_32, sizeof tss_segment_32))
5100 goto out;
5101
5102 if (old_tss_sel != 0xffff) {
5103 tss_segment_32.prev_task_link = old_tss_sel;
5104
5105 if (kvm_write_guest(vcpu->kvm,
5106 get_tss_base_addr_write(vcpu, nseg_desc),
5107 &tss_segment_32.prev_task_link,
5108 sizeof tss_segment_32.prev_task_link))
5109 goto out;
5110 }
5111
5112 if (load_state_from_tss32(vcpu, &tss_segment_32))
5113 goto out;
5114
5115 ret = 1;
5116 out:
5117 return ret;
5118 }
5119
5120 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
5121 {
5122 struct kvm_segment tr_seg;
5123 struct desc_struct cseg_desc;
5124 struct desc_struct nseg_desc;
5125 int ret = 0;
5126 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
5127 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
5128
5129 old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL);
5130
5131 /* FIXME: Handle errors. Failure to read either TSS or their
5132 * descriptors should generate a pagefault.
5133 */
5134 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
5135 goto out;
5136
5137 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
5138 goto out;
5139
5140 if (reason != TASK_SWITCH_IRET) {
5141 int cpl;
5142
5143 cpl = kvm_x86_ops->get_cpl(vcpu);
5144 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
5145 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
5146 return 1;
5147 }
5148 }
5149
5150 if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
5151 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
5152 return 1;
5153 }
5154
5155 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
5156 cseg_desc.type &= ~(1 << 1); //clear the B flag
5157 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
5158 }
5159
5160 if (reason == TASK_SWITCH_IRET) {
5161 u32 eflags = kvm_get_rflags(vcpu);
5162 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
5163 }
5164
5165 /* set back link to prev task only if NT bit is set in eflags
5166 note that old_tss_sel is not used afetr this point */
5167 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
5168 old_tss_sel = 0xffff;
5169
5170 if (nseg_desc.type & 8)
5171 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
5172 old_tss_base, &nseg_desc);
5173 else
5174 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
5175 old_tss_base, &nseg_desc);
5176
5177 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
5178 u32 eflags = kvm_get_rflags(vcpu);
5179 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
5180 }
5181
5182 if (reason != TASK_SWITCH_IRET) {
5183 nseg_desc.type |= (1 << 1);
5184 save_guest_segment_descriptor(vcpu, tss_selector,
5185 &nseg_desc);
5186 }
5187
5188 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS);
5189 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
5190 tr_seg.type = 11;
5191 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
5192 out:
5193 return ret;
5194 }
5195 EXPORT_SYMBOL_GPL(kvm_task_switch);
5196
5197 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5198 struct kvm_sregs *sregs)
5199 {
5200 int mmu_reset_needed = 0;
5201 int pending_vec, max_bits;
5202 struct descriptor_table dt;
5203
5204 vcpu_load(vcpu);
5205
5206 dt.limit = sregs->idt.limit;
5207 dt.base = sregs->idt.base;
5208 kvm_x86_ops->set_idt(vcpu, &dt);
5209 dt.limit = sregs->gdt.limit;
5210 dt.base = sregs->gdt.base;
5211 kvm_x86_ops->set_gdt(vcpu, &dt);
5212
5213 vcpu->arch.cr2 = sregs->cr2;
5214 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5215 vcpu->arch.cr3 = sregs->cr3;
5216
5217 kvm_set_cr8(vcpu, sregs->cr8);
5218
5219 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5220 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5221 kvm_set_apic_base(vcpu, sregs->apic_base);
5222
5223 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5224 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5225 vcpu->arch.cr0 = sregs->cr0;
5226
5227 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5228 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5229 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5230 load_pdptrs(vcpu, vcpu->arch.cr3);
5231 mmu_reset_needed = 1;
5232 }
5233
5234 if (mmu_reset_needed)
5235 kvm_mmu_reset_context(vcpu);
5236
5237 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5238 pending_vec = find_first_bit(
5239 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5240 if (pending_vec < max_bits) {
5241 kvm_queue_interrupt(vcpu, pending_vec, false);
5242 pr_debug("Set back pending irq %d\n", pending_vec);
5243 if (irqchip_in_kernel(vcpu->kvm))
5244 kvm_pic_clear_isr_ack(vcpu->kvm);
5245 }
5246
5247 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5248 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5249 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5250 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5251 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5252 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5253
5254 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5255 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5256
5257 update_cr8_intercept(vcpu);
5258
5259 /* Older userspace won't unhalt the vcpu on reset. */
5260 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5261 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5262 !is_protmode(vcpu))
5263 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5264
5265 vcpu_put(vcpu);
5266
5267 return 0;
5268 }
5269
5270 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5271 struct kvm_guest_debug *dbg)
5272 {
5273 unsigned long rflags;
5274 int i, r;
5275
5276 vcpu_load(vcpu);
5277
5278 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5279 r = -EBUSY;
5280 if (vcpu->arch.exception.pending)
5281 goto unlock_out;
5282 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5283 kvm_queue_exception(vcpu, DB_VECTOR);
5284 else
5285 kvm_queue_exception(vcpu, BP_VECTOR);
5286 }
5287
5288 /*
5289 * Read rflags as long as potentially injected trace flags are still
5290 * filtered out.
5291 */
5292 rflags = kvm_get_rflags(vcpu);
5293
5294 vcpu->guest_debug = dbg->control;
5295 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5296 vcpu->guest_debug = 0;
5297
5298 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5299 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5300 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5301 vcpu->arch.switch_db_regs =
5302 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5303 } else {
5304 for (i = 0; i < KVM_NR_DB_REGS; i++)
5305 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5306 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5307 }
5308
5309 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5310 vcpu->arch.singlestep_cs =
5311 get_segment_selector(vcpu, VCPU_SREG_CS);
5312 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu);
5313 }
5314
5315 /*
5316 * Trigger an rflags update that will inject or remove the trace
5317 * flags.
5318 */
5319 kvm_set_rflags(vcpu, rflags);
5320
5321 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5322
5323 r = 0;
5324
5325 unlock_out:
5326 vcpu_put(vcpu);
5327
5328 return r;
5329 }
5330
5331 /*
5332 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5333 * we have asm/x86/processor.h
5334 */
5335 struct fxsave {
5336 u16 cwd;
5337 u16 swd;
5338 u16 twd;
5339 u16 fop;
5340 u64 rip;
5341 u64 rdp;
5342 u32 mxcsr;
5343 u32 mxcsr_mask;
5344 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5345 #ifdef CONFIG_X86_64
5346 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5347 #else
5348 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5349 #endif
5350 };
5351
5352 /*
5353 * Translate a guest virtual address to a guest physical address.
5354 */
5355 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5356 struct kvm_translation *tr)
5357 {
5358 unsigned long vaddr = tr->linear_address;
5359 gpa_t gpa;
5360 int idx;
5361
5362 vcpu_load(vcpu);
5363 idx = srcu_read_lock(&vcpu->kvm->srcu);
5364 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5365 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5366 tr->physical_address = gpa;
5367 tr->valid = gpa != UNMAPPED_GVA;
5368 tr->writeable = 1;
5369 tr->usermode = 0;
5370 vcpu_put(vcpu);
5371
5372 return 0;
5373 }
5374
5375 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5376 {
5377 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5378
5379 vcpu_load(vcpu);
5380
5381 memcpy(fpu->fpr, fxsave->st_space, 128);
5382 fpu->fcw = fxsave->cwd;
5383 fpu->fsw = fxsave->swd;
5384 fpu->ftwx = fxsave->twd;
5385 fpu->last_opcode = fxsave->fop;
5386 fpu->last_ip = fxsave->rip;
5387 fpu->last_dp = fxsave->rdp;
5388 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5389
5390 vcpu_put(vcpu);
5391
5392 return 0;
5393 }
5394
5395 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5396 {
5397 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5398
5399 vcpu_load(vcpu);
5400
5401 memcpy(fxsave->st_space, fpu->fpr, 128);
5402 fxsave->cwd = fpu->fcw;
5403 fxsave->swd = fpu->fsw;
5404 fxsave->twd = fpu->ftwx;
5405 fxsave->fop = fpu->last_opcode;
5406 fxsave->rip = fpu->last_ip;
5407 fxsave->rdp = fpu->last_dp;
5408 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5409
5410 vcpu_put(vcpu);
5411
5412 return 0;
5413 }
5414
5415 void fx_init(struct kvm_vcpu *vcpu)
5416 {
5417 unsigned after_mxcsr_mask;
5418
5419 /*
5420 * Touch the fpu the first time in non atomic context as if
5421 * this is the first fpu instruction the exception handler
5422 * will fire before the instruction returns and it'll have to
5423 * allocate ram with GFP_KERNEL.
5424 */
5425 if (!used_math())
5426 kvm_fx_save(&vcpu->arch.host_fx_image);
5427
5428 /* Initialize guest FPU by resetting ours and saving into guest's */
5429 preempt_disable();
5430 kvm_fx_save(&vcpu->arch.host_fx_image);
5431 kvm_fx_finit();
5432 kvm_fx_save(&vcpu->arch.guest_fx_image);
5433 kvm_fx_restore(&vcpu->arch.host_fx_image);
5434 preempt_enable();
5435
5436 vcpu->arch.cr0 |= X86_CR0_ET;
5437 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5438 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5439 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5440 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5441 }
5442 EXPORT_SYMBOL_GPL(fx_init);
5443
5444 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5445 {
5446 if (vcpu->guest_fpu_loaded)
5447 return;
5448
5449 vcpu->guest_fpu_loaded = 1;
5450 kvm_fx_save(&vcpu->arch.host_fx_image);
5451 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5452 trace_kvm_fpu(1);
5453 }
5454
5455 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5456 {
5457 if (!vcpu->guest_fpu_loaded)
5458 return;
5459
5460 vcpu->guest_fpu_loaded = 0;
5461 kvm_fx_save(&vcpu->arch.guest_fx_image);
5462 kvm_fx_restore(&vcpu->arch.host_fx_image);
5463 ++vcpu->stat.fpu_reload;
5464 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5465 trace_kvm_fpu(0);
5466 }
5467
5468 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5469 {
5470 if (vcpu->arch.time_page) {
5471 kvm_release_page_dirty(vcpu->arch.time_page);
5472 vcpu->arch.time_page = NULL;
5473 }
5474
5475 kvm_x86_ops->vcpu_free(vcpu);
5476 }
5477
5478 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5479 unsigned int id)
5480 {
5481 return kvm_x86_ops->vcpu_create(kvm, id);
5482 }
5483
5484 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5485 {
5486 int r;
5487
5488 /* We do fxsave: this must be aligned. */
5489 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5490
5491 vcpu->arch.mtrr_state.have_fixed = 1;
5492 vcpu_load(vcpu);
5493 r = kvm_arch_vcpu_reset(vcpu);
5494 if (r == 0)
5495 r = kvm_mmu_setup(vcpu);
5496 vcpu_put(vcpu);
5497 if (r < 0)
5498 goto free_vcpu;
5499
5500 return 0;
5501 free_vcpu:
5502 kvm_x86_ops->vcpu_free(vcpu);
5503 return r;
5504 }
5505
5506 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5507 {
5508 vcpu_load(vcpu);
5509 kvm_mmu_unload(vcpu);
5510 vcpu_put(vcpu);
5511
5512 kvm_x86_ops->vcpu_free(vcpu);
5513 }
5514
5515 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5516 {
5517 vcpu->arch.nmi_pending = false;
5518 vcpu->arch.nmi_injected = false;
5519
5520 vcpu->arch.switch_db_regs = 0;
5521 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5522 vcpu->arch.dr6 = DR6_FIXED_1;
5523 vcpu->arch.dr7 = DR7_FIXED_1;
5524
5525 return kvm_x86_ops->vcpu_reset(vcpu);
5526 }
5527
5528 int kvm_arch_hardware_enable(void *garbage)
5529 {
5530 /*
5531 * Since this may be called from a hotplug notifcation,
5532 * we can't get the CPU frequency directly.
5533 */
5534 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5535 int cpu = raw_smp_processor_id();
5536 per_cpu(cpu_tsc_khz, cpu) = 0;
5537 }
5538
5539 kvm_shared_msr_cpu_online();
5540
5541 return kvm_x86_ops->hardware_enable(garbage);
5542 }
5543
5544 void kvm_arch_hardware_disable(void *garbage)
5545 {
5546 kvm_x86_ops->hardware_disable(garbage);
5547 drop_user_return_notifiers(garbage);
5548 }
5549
5550 int kvm_arch_hardware_setup(void)
5551 {
5552 return kvm_x86_ops->hardware_setup();
5553 }
5554
5555 void kvm_arch_hardware_unsetup(void)
5556 {
5557 kvm_x86_ops->hardware_unsetup();
5558 }
5559
5560 void kvm_arch_check_processor_compat(void *rtn)
5561 {
5562 kvm_x86_ops->check_processor_compatibility(rtn);
5563 }
5564
5565 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5566 {
5567 struct page *page;
5568 struct kvm *kvm;
5569 int r;
5570
5571 BUG_ON(vcpu->kvm == NULL);
5572 kvm = vcpu->kvm;
5573
5574 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5575 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5576 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5577 else
5578 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5579
5580 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5581 if (!page) {
5582 r = -ENOMEM;
5583 goto fail;
5584 }
5585 vcpu->arch.pio_data = page_address(page);
5586
5587 r = kvm_mmu_create(vcpu);
5588 if (r < 0)
5589 goto fail_free_pio_data;
5590
5591 if (irqchip_in_kernel(kvm)) {
5592 r = kvm_create_lapic(vcpu);
5593 if (r < 0)
5594 goto fail_mmu_destroy;
5595 }
5596
5597 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5598 GFP_KERNEL);
5599 if (!vcpu->arch.mce_banks) {
5600 r = -ENOMEM;
5601 goto fail_free_lapic;
5602 }
5603 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5604
5605 return 0;
5606 fail_free_lapic:
5607 kvm_free_lapic(vcpu);
5608 fail_mmu_destroy:
5609 kvm_mmu_destroy(vcpu);
5610 fail_free_pio_data:
5611 free_page((unsigned long)vcpu->arch.pio_data);
5612 fail:
5613 return r;
5614 }
5615
5616 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5617 {
5618 int idx;
5619
5620 kfree(vcpu->arch.mce_banks);
5621 kvm_free_lapic(vcpu);
5622 idx = srcu_read_lock(&vcpu->kvm->srcu);
5623 kvm_mmu_destroy(vcpu);
5624 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5625 free_page((unsigned long)vcpu->arch.pio_data);
5626 }
5627
5628 struct kvm *kvm_arch_create_vm(void)
5629 {
5630 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5631
5632 if (!kvm)
5633 return ERR_PTR(-ENOMEM);
5634
5635 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5636 if (!kvm->arch.aliases) {
5637 kfree(kvm);
5638 return ERR_PTR(-ENOMEM);
5639 }
5640
5641 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5642 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5643
5644 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5645 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5646
5647 rdtscll(kvm->arch.vm_init_tsc);
5648
5649 return kvm;
5650 }
5651
5652 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5653 {
5654 vcpu_load(vcpu);
5655 kvm_mmu_unload(vcpu);
5656 vcpu_put(vcpu);
5657 }
5658
5659 static void kvm_free_vcpus(struct kvm *kvm)
5660 {
5661 unsigned int i;
5662 struct kvm_vcpu *vcpu;
5663
5664 /*
5665 * Unpin any mmu pages first.
5666 */
5667 kvm_for_each_vcpu(i, vcpu, kvm)
5668 kvm_unload_vcpu_mmu(vcpu);
5669 kvm_for_each_vcpu(i, vcpu, kvm)
5670 kvm_arch_vcpu_free(vcpu);
5671
5672 mutex_lock(&kvm->lock);
5673 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5674 kvm->vcpus[i] = NULL;
5675
5676 atomic_set(&kvm->online_vcpus, 0);
5677 mutex_unlock(&kvm->lock);
5678 }
5679
5680 void kvm_arch_sync_events(struct kvm *kvm)
5681 {
5682 kvm_free_all_assigned_devices(kvm);
5683 }
5684
5685 void kvm_arch_destroy_vm(struct kvm *kvm)
5686 {
5687 kvm_iommu_unmap_guest(kvm);
5688 kvm_free_pit(kvm);
5689 kfree(kvm->arch.vpic);
5690 kfree(kvm->arch.vioapic);
5691 kvm_free_vcpus(kvm);
5692 kvm_free_physmem(kvm);
5693 if (kvm->arch.apic_access_page)
5694 put_page(kvm->arch.apic_access_page);
5695 if (kvm->arch.ept_identity_pagetable)
5696 put_page(kvm->arch.ept_identity_pagetable);
5697 cleanup_srcu_struct(&kvm->srcu);
5698 kfree(kvm->arch.aliases);
5699 kfree(kvm);
5700 }
5701
5702 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5703 struct kvm_memory_slot *memslot,
5704 struct kvm_memory_slot old,
5705 struct kvm_userspace_memory_region *mem,
5706 int user_alloc)
5707 {
5708 int npages = memslot->npages;
5709
5710 /*To keep backward compatibility with older userspace,
5711 *x86 needs to hanlde !user_alloc case.
5712 */
5713 if (!user_alloc) {
5714 if (npages && !old.rmap) {
5715 unsigned long userspace_addr;
5716
5717 down_write(&current->mm->mmap_sem);
5718 userspace_addr = do_mmap(NULL, 0,
5719 npages * PAGE_SIZE,
5720 PROT_READ | PROT_WRITE,
5721 MAP_PRIVATE | MAP_ANONYMOUS,
5722 0);
5723 up_write(&current->mm->mmap_sem);
5724
5725 if (IS_ERR((void *)userspace_addr))
5726 return PTR_ERR((void *)userspace_addr);
5727
5728 memslot->userspace_addr = userspace_addr;
5729 }
5730 }
5731
5732
5733 return 0;
5734 }
5735
5736 void kvm_arch_commit_memory_region(struct kvm *kvm,
5737 struct kvm_userspace_memory_region *mem,
5738 struct kvm_memory_slot old,
5739 int user_alloc)
5740 {
5741
5742 int npages = mem->memory_size >> PAGE_SHIFT;
5743
5744 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5745 int ret;
5746
5747 down_write(&current->mm->mmap_sem);
5748 ret = do_munmap(current->mm, old.userspace_addr,
5749 old.npages * PAGE_SIZE);
5750 up_write(&current->mm->mmap_sem);
5751 if (ret < 0)
5752 printk(KERN_WARNING
5753 "kvm_vm_ioctl_set_memory_region: "
5754 "failed to munmap memory\n");
5755 }
5756
5757 spin_lock(&kvm->mmu_lock);
5758 if (!kvm->arch.n_requested_mmu_pages) {
5759 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5760 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5761 }
5762
5763 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5764 spin_unlock(&kvm->mmu_lock);
5765 }
5766
5767 void kvm_arch_flush_shadow(struct kvm *kvm)
5768 {
5769 kvm_mmu_zap_all(kvm);
5770 kvm_reload_remote_mmus(kvm);
5771 }
5772
5773 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5774 {
5775 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5776 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5777 || vcpu->arch.nmi_pending ||
5778 (kvm_arch_interrupt_allowed(vcpu) &&
5779 kvm_cpu_has_interrupt(vcpu));
5780 }
5781
5782 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5783 {
5784 int me;
5785 int cpu = vcpu->cpu;
5786
5787 if (waitqueue_active(&vcpu->wq)) {
5788 wake_up_interruptible(&vcpu->wq);
5789 ++vcpu->stat.halt_wakeup;
5790 }
5791
5792 me = get_cpu();
5793 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5794 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5795 smp_send_reschedule(cpu);
5796 put_cpu();
5797 }
5798
5799 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5800 {
5801 return kvm_x86_ops->interrupt_allowed(vcpu);
5802 }
5803
5804 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5805 {
5806 unsigned long rflags;
5807
5808 rflags = kvm_x86_ops->get_rflags(vcpu);
5809 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5810 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
5811 return rflags;
5812 }
5813 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5814
5815 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5816 {
5817 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5818 vcpu->arch.singlestep_cs ==
5819 get_segment_selector(vcpu, VCPU_SREG_CS) &&
5820 vcpu->arch.singlestep_rip == kvm_rip_read(vcpu))
5821 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
5822 kvm_x86_ops->set_rflags(vcpu, rflags);
5823 }
5824 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5825
5826 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5827 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5828 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5829 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5830 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
Linux kernel - Deliverables
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