2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
47 #define MAX_IO_MSRS 256
48 #define CR0_RESERVED_BITS \
49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
52 #define CR4_RESERVED_BITS \
53 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
54 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
55 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
56 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
58 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
60 #define KVM_MAX_MCE_BANKS 32
61 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
64 * - enable syscall per default because its emulated by KVM
65 * - enable LME and LMA per default on 64 bit KVM
68 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
70 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
73 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
74 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
76 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
77 struct kvm_cpuid_entry2 __user
*entries
);
78 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
79 u32 function
, u32 index
);
81 struct kvm_x86_ops
*kvm_x86_ops
;
82 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
84 struct kvm_stats_debugfs_item debugfs_entries
[] = {
85 { "pf_fixed", VCPU_STAT(pf_fixed
) },
86 { "pf_guest", VCPU_STAT(pf_guest
) },
87 { "tlb_flush", VCPU_STAT(tlb_flush
) },
88 { "invlpg", VCPU_STAT(invlpg
) },
89 { "exits", VCPU_STAT(exits
) },
90 { "io_exits", VCPU_STAT(io_exits
) },
91 { "mmio_exits", VCPU_STAT(mmio_exits
) },
92 { "signal_exits", VCPU_STAT(signal_exits
) },
93 { "irq_window", VCPU_STAT(irq_window_exits
) },
94 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
95 { "halt_exits", VCPU_STAT(halt_exits
) },
96 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
97 { "hypercalls", VCPU_STAT(hypercalls
) },
98 { "request_irq", VCPU_STAT(request_irq_exits
) },
99 { "irq_exits", VCPU_STAT(irq_exits
) },
100 { "host_state_reload", VCPU_STAT(host_state_reload
) },
101 { "efer_reload", VCPU_STAT(efer_reload
) },
102 { "fpu_reload", VCPU_STAT(fpu_reload
) },
103 { "insn_emulation", VCPU_STAT(insn_emulation
) },
104 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
105 { "irq_injections", VCPU_STAT(irq_injections
) },
106 { "nmi_injections", VCPU_STAT(nmi_injections
) },
107 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
108 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
109 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
110 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
111 { "mmu_flooded", VM_STAT(mmu_flooded
) },
112 { "mmu_recycled", VM_STAT(mmu_recycled
) },
113 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
114 { "mmu_unsync", VM_STAT(mmu_unsync
) },
115 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
116 { "largepages", VM_STAT(lpages
) },
120 unsigned long segment_base(u16 selector
)
122 struct descriptor_table gdt
;
123 struct desc_struct
*d
;
124 unsigned long table_base
;
130 asm("sgdt %0" : "=m"(gdt
));
131 table_base
= gdt
.base
;
133 if (selector
& 4) { /* from ldt */
136 asm("sldt %0" : "=g"(ldt_selector
));
137 table_base
= segment_base(ldt_selector
);
139 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
140 v
= d
->base0
| ((unsigned long)d
->base1
<< 16) |
141 ((unsigned long)d
->base2
<< 24);
143 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
144 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
148 EXPORT_SYMBOL_GPL(segment_base
);
150 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
152 if (irqchip_in_kernel(vcpu
->kvm
))
153 return vcpu
->arch
.apic_base
;
155 return vcpu
->arch
.apic_base
;
157 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
159 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
161 /* TODO: reserve bits check */
162 if (irqchip_in_kernel(vcpu
->kvm
))
163 kvm_lapic_set_base(vcpu
, data
);
165 vcpu
->arch
.apic_base
= data
;
167 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
169 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
171 WARN_ON(vcpu
->arch
.exception
.pending
);
172 vcpu
->arch
.exception
.pending
= true;
173 vcpu
->arch
.exception
.has_error_code
= false;
174 vcpu
->arch
.exception
.nr
= nr
;
176 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
178 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
181 ++vcpu
->stat
.pf_guest
;
183 if (vcpu
->arch
.exception
.pending
) {
184 switch(vcpu
->arch
.exception
.nr
) {
186 /* triple fault -> shutdown */
187 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
190 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
191 vcpu
->arch
.exception
.error_code
= 0;
194 /* replace previous exception with a new one in a hope
195 that instruction re-execution will regenerate lost
197 vcpu
->arch
.exception
.pending
= false;
201 vcpu
->arch
.cr2
= addr
;
202 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
205 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
207 vcpu
->arch
.nmi_pending
= 1;
209 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
211 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
213 WARN_ON(vcpu
->arch
.exception
.pending
);
214 vcpu
->arch
.exception
.pending
= true;
215 vcpu
->arch
.exception
.has_error_code
= true;
216 vcpu
->arch
.exception
.nr
= nr
;
217 vcpu
->arch
.exception
.error_code
= error_code
;
219 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
221 static void __queue_exception(struct kvm_vcpu
*vcpu
)
223 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
224 vcpu
->arch
.exception
.has_error_code
,
225 vcpu
->arch
.exception
.error_code
);
229 * Load the pae pdptrs. Return true is they are all valid.
231 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
233 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
234 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
237 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
239 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
240 offset
* sizeof(u64
), sizeof(pdpte
));
245 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
246 if (is_present_gpte(pdpte
[i
]) &&
247 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
254 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
255 __set_bit(VCPU_EXREG_PDPTR
,
256 (unsigned long *)&vcpu
->arch
.regs_avail
);
257 __set_bit(VCPU_EXREG_PDPTR
,
258 (unsigned long *)&vcpu
->arch
.regs_dirty
);
263 EXPORT_SYMBOL_GPL(load_pdptrs
);
265 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
267 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
271 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
274 if (!test_bit(VCPU_EXREG_PDPTR
,
275 (unsigned long *)&vcpu
->arch
.regs_avail
))
278 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
281 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
287 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
289 if (cr0
& CR0_RESERVED_BITS
) {
290 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
291 cr0
, vcpu
->arch
.cr0
);
292 kvm_inject_gp(vcpu
, 0);
296 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
297 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
298 kvm_inject_gp(vcpu
, 0);
302 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
303 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
304 "and a clear PE flag\n");
305 kvm_inject_gp(vcpu
, 0);
309 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
311 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
315 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
316 "in long mode while PAE is disabled\n");
317 kvm_inject_gp(vcpu
, 0);
320 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
322 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
323 "in long mode while CS.L == 1\n");
324 kvm_inject_gp(vcpu
, 0);
330 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
331 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
333 kvm_inject_gp(vcpu
, 0);
339 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
340 vcpu
->arch
.cr0
= cr0
;
342 kvm_mmu_reset_context(vcpu
);
345 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
347 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
349 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
350 KVMTRACE_1D(LMSW
, vcpu
,
351 (u32
)((vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f)),
354 EXPORT_SYMBOL_GPL(kvm_lmsw
);
356 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
358 unsigned long old_cr4
= vcpu
->arch
.cr4
;
359 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
361 if (cr4
& CR4_RESERVED_BITS
) {
362 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
363 kvm_inject_gp(vcpu
, 0);
367 if (is_long_mode(vcpu
)) {
368 if (!(cr4
& X86_CR4_PAE
)) {
369 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
371 kvm_inject_gp(vcpu
, 0);
374 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
375 && ((cr4
^ old_cr4
) & pdptr_bits
)
376 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
377 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
378 kvm_inject_gp(vcpu
, 0);
382 if (cr4
& X86_CR4_VMXE
) {
383 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
384 kvm_inject_gp(vcpu
, 0);
387 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
388 vcpu
->arch
.cr4
= cr4
;
389 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
390 kvm_mmu_reset_context(vcpu
);
392 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
394 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
396 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
397 kvm_mmu_sync_roots(vcpu
);
398 kvm_mmu_flush_tlb(vcpu
);
402 if (is_long_mode(vcpu
)) {
403 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
404 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
405 kvm_inject_gp(vcpu
, 0);
410 if (cr3
& CR3_PAE_RESERVED_BITS
) {
412 "set_cr3: #GP, reserved bits\n");
413 kvm_inject_gp(vcpu
, 0);
416 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
417 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
419 kvm_inject_gp(vcpu
, 0);
424 * We don't check reserved bits in nonpae mode, because
425 * this isn't enforced, and VMware depends on this.
430 * Does the new cr3 value map to physical memory? (Note, we
431 * catch an invalid cr3 even in real-mode, because it would
432 * cause trouble later on when we turn on paging anyway.)
434 * A real CPU would silently accept an invalid cr3 and would
435 * attempt to use it - with largely undefined (and often hard
436 * to debug) behavior on the guest side.
438 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
439 kvm_inject_gp(vcpu
, 0);
441 vcpu
->arch
.cr3
= cr3
;
442 vcpu
->arch
.mmu
.new_cr3(vcpu
);
445 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
447 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
449 if (cr8
& CR8_RESERVED_BITS
) {
450 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
451 kvm_inject_gp(vcpu
, 0);
454 if (irqchip_in_kernel(vcpu
->kvm
))
455 kvm_lapic_set_tpr(vcpu
, cr8
);
457 vcpu
->arch
.cr8
= cr8
;
459 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
461 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
463 if (irqchip_in_kernel(vcpu
->kvm
))
464 return kvm_lapic_get_cr8(vcpu
);
466 return vcpu
->arch
.cr8
;
468 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
470 static inline u32
bit(int bitno
)
472 return 1 << (bitno
& 31);
476 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
477 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
479 * This list is modified at module load time to reflect the
480 * capabilities of the host cpu.
482 static u32 msrs_to_save
[] = {
483 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
486 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
488 MSR_IA32_TSC
, MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
489 MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
492 static unsigned num_msrs_to_save
;
494 static u32 emulated_msrs
[] = {
495 MSR_IA32_MISC_ENABLE
,
498 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
500 if (efer
& efer_reserved_bits
) {
501 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
503 kvm_inject_gp(vcpu
, 0);
508 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
509 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
510 kvm_inject_gp(vcpu
, 0);
514 if (efer
& EFER_FFXSR
) {
515 struct kvm_cpuid_entry2
*feat
;
517 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
518 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
519 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
520 kvm_inject_gp(vcpu
, 0);
525 if (efer
& EFER_SVME
) {
526 struct kvm_cpuid_entry2
*feat
;
528 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
529 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
530 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
531 kvm_inject_gp(vcpu
, 0);
536 kvm_x86_ops
->set_efer(vcpu
, efer
);
539 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
541 vcpu
->arch
.shadow_efer
= efer
;
543 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
544 kvm_mmu_reset_context(vcpu
);
547 void kvm_enable_efer_bits(u64 mask
)
549 efer_reserved_bits
&= ~mask
;
551 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
555 * Writes msr value into into the appropriate "register".
556 * Returns 0 on success, non-0 otherwise.
557 * Assumes vcpu_load() was already called.
559 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
561 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
565 * Adapt set_msr() to msr_io()'s calling convention
567 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
569 return kvm_set_msr(vcpu
, index
, *data
);
572 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
575 struct pvclock_wall_clock wc
;
576 struct timespec now
, sys
, boot
;
583 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
586 * The guest calculates current wall clock time by adding
587 * system time (updated by kvm_write_guest_time below) to the
588 * wall clock specified here. guest system time equals host
589 * system time for us, thus we must fill in host boot time here.
591 now
= current_kernel_time();
593 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
595 wc
.sec
= boot
.tv_sec
;
596 wc
.nsec
= boot
.tv_nsec
;
597 wc
.version
= version
;
599 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
602 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
605 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
607 uint32_t quotient
, remainder
;
609 /* Don't try to replace with do_div(), this one calculates
610 * "(dividend << 32) / divisor" */
612 : "=a" (quotient
), "=d" (remainder
)
613 : "0" (0), "1" (dividend
), "r" (divisor
) );
617 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
619 uint64_t nsecs
= 1000000000LL;
624 tps64
= tsc_khz
* 1000LL;
625 while (tps64
> nsecs
*2) {
630 tps32
= (uint32_t)tps64
;
631 while (tps32
<= (uint32_t)nsecs
) {
636 hv_clock
->tsc_shift
= shift
;
637 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
639 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
640 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
641 hv_clock
->tsc_to_system_mul
);
644 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
646 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
650 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
652 unsigned long this_tsc_khz
;
654 if ((!vcpu
->time_page
))
657 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
658 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
659 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
660 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
662 put_cpu_var(cpu_tsc_khz
);
664 /* Keep irq disabled to prevent changes to the clock */
665 local_irq_save(flags
);
666 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
668 local_irq_restore(flags
);
670 /* With all the info we got, fill in the values */
672 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
673 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
);
675 * The interface expects us to write an even number signaling that the
676 * update is finished. Since the guest won't see the intermediate
677 * state, we just increase by 2 at the end.
679 vcpu
->hv_clock
.version
+= 2;
681 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
683 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
684 sizeof(vcpu
->hv_clock
));
686 kunmap_atomic(shared_kaddr
, KM_USER0
);
688 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
691 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
693 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
695 if (!vcpu
->time_page
)
697 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
701 static bool msr_mtrr_valid(unsigned msr
)
704 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
705 case MSR_MTRRfix64K_00000
:
706 case MSR_MTRRfix16K_80000
:
707 case MSR_MTRRfix16K_A0000
:
708 case MSR_MTRRfix4K_C0000
:
709 case MSR_MTRRfix4K_C8000
:
710 case MSR_MTRRfix4K_D0000
:
711 case MSR_MTRRfix4K_D8000
:
712 case MSR_MTRRfix4K_E0000
:
713 case MSR_MTRRfix4K_E8000
:
714 case MSR_MTRRfix4K_F0000
:
715 case MSR_MTRRfix4K_F8000
:
716 case MSR_MTRRdefType
:
717 case MSR_IA32_CR_PAT
:
725 static bool valid_pat_type(unsigned t
)
727 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
730 static bool valid_mtrr_type(unsigned t
)
732 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
735 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
739 if (!msr_mtrr_valid(msr
))
742 if (msr
== MSR_IA32_CR_PAT
) {
743 for (i
= 0; i
< 8; i
++)
744 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
747 } else if (msr
== MSR_MTRRdefType
) {
750 return valid_mtrr_type(data
& 0xff);
751 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
752 for (i
= 0; i
< 8 ; i
++)
753 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
759 return valid_mtrr_type(data
& 0xff);
762 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
764 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
766 if (!mtrr_valid(vcpu
, msr
, data
))
769 if (msr
== MSR_MTRRdefType
) {
770 vcpu
->arch
.mtrr_state
.def_type
= data
;
771 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
772 } else if (msr
== MSR_MTRRfix64K_00000
)
774 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
775 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
776 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
777 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
778 else if (msr
== MSR_IA32_CR_PAT
)
779 vcpu
->arch
.pat
= data
;
780 else { /* Variable MTRRs */
781 int idx
, is_mtrr_mask
;
784 idx
= (msr
- 0x200) / 2;
785 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
788 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
791 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
795 kvm_mmu_reset_context(vcpu
);
799 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
801 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
802 unsigned bank_num
= mcg_cap
& 0xff;
805 case MSR_IA32_MCG_STATUS
:
806 vcpu
->arch
.mcg_status
= data
;
808 case MSR_IA32_MCG_CTL
:
809 if (!(mcg_cap
& MCG_CTL_P
))
811 if (data
!= 0 && data
!= ~(u64
)0)
813 vcpu
->arch
.mcg_ctl
= data
;
816 if (msr
>= MSR_IA32_MC0_CTL
&&
817 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
818 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
819 /* only 0 or all 1s can be written to IA32_MCi_CTL */
820 if ((offset
& 0x3) == 0 &&
821 data
!= 0 && data
!= ~(u64
)0)
823 vcpu
->arch
.mce_banks
[offset
] = data
;
831 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
835 set_efer(vcpu
, data
);
837 case MSR_IA32_DEBUGCTLMSR
:
839 /* We support the non-activated case already */
841 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
842 /* Values other than LBR and BTF are vendor-specific,
843 thus reserved and should throw a #GP */
846 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
849 case MSR_IA32_UCODE_REV
:
850 case MSR_IA32_UCODE_WRITE
:
851 case MSR_VM_HSAVE_PA
:
853 case 0x200 ... 0x2ff:
854 return set_msr_mtrr(vcpu
, msr
, data
);
855 case MSR_IA32_APICBASE
:
856 kvm_set_apic_base(vcpu
, data
);
858 case MSR_IA32_MISC_ENABLE
:
859 vcpu
->arch
.ia32_misc_enable_msr
= data
;
861 case MSR_KVM_WALL_CLOCK
:
862 vcpu
->kvm
->arch
.wall_clock
= data
;
863 kvm_write_wall_clock(vcpu
->kvm
, data
);
865 case MSR_KVM_SYSTEM_TIME
: {
866 if (vcpu
->arch
.time_page
) {
867 kvm_release_page_dirty(vcpu
->arch
.time_page
);
868 vcpu
->arch
.time_page
= NULL
;
871 vcpu
->arch
.time
= data
;
873 /* we verify if the enable bit is set... */
877 /* ...but clean it before doing the actual write */
878 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
880 vcpu
->arch
.time_page
=
881 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
883 if (is_error_page(vcpu
->arch
.time_page
)) {
884 kvm_release_page_clean(vcpu
->arch
.time_page
);
885 vcpu
->arch
.time_page
= NULL
;
888 kvm_request_guest_time_update(vcpu
);
891 case MSR_IA32_MCG_CTL
:
892 case MSR_IA32_MCG_STATUS
:
893 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
894 return set_msr_mce(vcpu
, msr
, data
);
896 /* Performance counters are not protected by a CPUID bit,
897 * so we should check all of them in the generic path for the sake of
898 * cross vendor migration.
899 * Writing a zero into the event select MSRs disables them,
900 * which we perfectly emulate ;-). Any other value should be at least
901 * reported, some guests depend on them.
903 case MSR_P6_EVNTSEL0
:
904 case MSR_P6_EVNTSEL1
:
905 case MSR_K7_EVNTSEL0
:
906 case MSR_K7_EVNTSEL1
:
907 case MSR_K7_EVNTSEL2
:
908 case MSR_K7_EVNTSEL3
:
910 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
911 "0x%x data 0x%llx\n", msr
, data
);
913 /* at least RHEL 4 unconditionally writes to the perfctr registers,
914 * so we ignore writes to make it happy.
916 case MSR_P6_PERFCTR0
:
917 case MSR_P6_PERFCTR1
:
918 case MSR_K7_PERFCTR0
:
919 case MSR_K7_PERFCTR1
:
920 case MSR_K7_PERFCTR2
:
921 case MSR_K7_PERFCTR3
:
922 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
923 "0x%x data 0x%llx\n", msr
, data
);
926 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n", msr
, data
);
931 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
935 * Reads an msr value (of 'msr_index') into 'pdata'.
936 * Returns 0 on success, non-0 otherwise.
937 * Assumes vcpu_load() was already called.
939 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
941 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
944 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
946 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
948 if (!msr_mtrr_valid(msr
))
951 if (msr
== MSR_MTRRdefType
)
952 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
953 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
954 else if (msr
== MSR_MTRRfix64K_00000
)
956 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
957 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
958 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
959 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
960 else if (msr
== MSR_IA32_CR_PAT
)
961 *pdata
= vcpu
->arch
.pat
;
962 else { /* Variable MTRRs */
963 int idx
, is_mtrr_mask
;
966 idx
= (msr
- 0x200) / 2;
967 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
970 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
973 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
980 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
983 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
984 unsigned bank_num
= mcg_cap
& 0xff;
987 case MSR_IA32_P5_MC_ADDR
:
988 case MSR_IA32_P5_MC_TYPE
:
991 case MSR_IA32_MCG_CAP
:
992 data
= vcpu
->arch
.mcg_cap
;
994 case MSR_IA32_MCG_CTL
:
995 if (!(mcg_cap
& MCG_CTL_P
))
997 data
= vcpu
->arch
.mcg_ctl
;
999 case MSR_IA32_MCG_STATUS
:
1000 data
= vcpu
->arch
.mcg_status
;
1003 if (msr
>= MSR_IA32_MC0_CTL
&&
1004 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1005 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1006 data
= vcpu
->arch
.mce_banks
[offset
];
1015 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1020 case MSR_IA32_PLATFORM_ID
:
1021 case MSR_IA32_UCODE_REV
:
1022 case MSR_IA32_EBL_CR_POWERON
:
1023 case MSR_IA32_DEBUGCTLMSR
:
1024 case MSR_IA32_LASTBRANCHFROMIP
:
1025 case MSR_IA32_LASTBRANCHTOIP
:
1026 case MSR_IA32_LASTINTFROMIP
:
1027 case MSR_IA32_LASTINTTOIP
:
1030 case MSR_VM_HSAVE_PA
:
1031 case MSR_P6_EVNTSEL0
:
1032 case MSR_P6_EVNTSEL1
:
1033 case MSR_K7_EVNTSEL0
:
1037 data
= 0x500 | KVM_NR_VAR_MTRR
;
1039 case 0x200 ... 0x2ff:
1040 return get_msr_mtrr(vcpu
, msr
, pdata
);
1041 case 0xcd: /* fsb frequency */
1044 case MSR_IA32_APICBASE
:
1045 data
= kvm_get_apic_base(vcpu
);
1047 case MSR_IA32_MISC_ENABLE
:
1048 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1050 case MSR_IA32_PERF_STATUS
:
1051 /* TSC increment by tick */
1053 /* CPU multiplier */
1054 data
|= (((uint64_t)4ULL) << 40);
1057 data
= vcpu
->arch
.shadow_efer
;
1059 case MSR_KVM_WALL_CLOCK
:
1060 data
= vcpu
->kvm
->arch
.wall_clock
;
1062 case MSR_KVM_SYSTEM_TIME
:
1063 data
= vcpu
->arch
.time
;
1065 case MSR_IA32_P5_MC_ADDR
:
1066 case MSR_IA32_P5_MC_TYPE
:
1067 case MSR_IA32_MCG_CAP
:
1068 case MSR_IA32_MCG_CTL
:
1069 case MSR_IA32_MCG_STATUS
:
1070 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1071 return get_msr_mce(vcpu
, msr
, pdata
);
1073 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1079 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1082 * Read or write a bunch of msrs. All parameters are kernel addresses.
1084 * @return number of msrs set successfully.
1086 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1087 struct kvm_msr_entry
*entries
,
1088 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1089 unsigned index
, u64
*data
))
1095 down_read(&vcpu
->kvm
->slots_lock
);
1096 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1097 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1099 up_read(&vcpu
->kvm
->slots_lock
);
1107 * Read or write a bunch of msrs. Parameters are user addresses.
1109 * @return number of msrs set successfully.
1111 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1112 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1113 unsigned index
, u64
*data
),
1116 struct kvm_msrs msrs
;
1117 struct kvm_msr_entry
*entries
;
1122 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1126 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1130 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1131 entries
= vmalloc(size
);
1136 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1139 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1144 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1155 int kvm_dev_ioctl_check_extension(long ext
)
1160 case KVM_CAP_IRQCHIP
:
1162 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1163 case KVM_CAP_SET_TSS_ADDR
:
1164 case KVM_CAP_EXT_CPUID
:
1165 case KVM_CAP_CLOCKSOURCE
:
1167 case KVM_CAP_NOP_IO_DELAY
:
1168 case KVM_CAP_MP_STATE
:
1169 case KVM_CAP_SYNC_MMU
:
1170 case KVM_CAP_REINJECT_CONTROL
:
1171 case KVM_CAP_IRQ_INJECT_STATUS
:
1172 case KVM_CAP_ASSIGN_DEV_IRQ
:
1177 case KVM_CAP_COALESCED_MMIO
:
1178 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1181 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1183 case KVM_CAP_NR_VCPUS
:
1186 case KVM_CAP_NR_MEMSLOTS
:
1187 r
= KVM_MEMORY_SLOTS
;
1189 case KVM_CAP_PV_MMU
:
1196 r
= KVM_MAX_MCE_BANKS
;
1206 long kvm_arch_dev_ioctl(struct file
*filp
,
1207 unsigned int ioctl
, unsigned long arg
)
1209 void __user
*argp
= (void __user
*)arg
;
1213 case KVM_GET_MSR_INDEX_LIST
: {
1214 struct kvm_msr_list __user
*user_msr_list
= argp
;
1215 struct kvm_msr_list msr_list
;
1219 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1222 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1223 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1226 if (n
< msr_list
.nmsrs
)
1229 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1230 num_msrs_to_save
* sizeof(u32
)))
1232 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1234 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1239 case KVM_GET_SUPPORTED_CPUID
: {
1240 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1241 struct kvm_cpuid2 cpuid
;
1244 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1246 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1247 cpuid_arg
->entries
);
1252 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1257 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1260 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1262 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1274 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1276 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1277 kvm_request_guest_time_update(vcpu
);
1280 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1282 kvm_x86_ops
->vcpu_put(vcpu
);
1283 kvm_put_guest_fpu(vcpu
);
1286 static int is_efer_nx(void)
1288 unsigned long long efer
= 0;
1290 rdmsrl_safe(MSR_EFER
, &efer
);
1291 return efer
& EFER_NX
;
1294 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1297 struct kvm_cpuid_entry2
*e
, *entry
;
1300 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1301 e
= &vcpu
->arch
.cpuid_entries
[i
];
1302 if (e
->function
== 0x80000001) {
1307 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1308 entry
->edx
&= ~(1 << 20);
1309 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1313 /* when an old userspace process fills a new kernel module */
1314 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1315 struct kvm_cpuid
*cpuid
,
1316 struct kvm_cpuid_entry __user
*entries
)
1319 struct kvm_cpuid_entry
*cpuid_entries
;
1322 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1325 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1329 if (copy_from_user(cpuid_entries
, entries
,
1330 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1332 for (i
= 0; i
< cpuid
->nent
; i
++) {
1333 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1334 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1335 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1336 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1337 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1338 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1339 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1340 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1341 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1342 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1344 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1345 cpuid_fix_nx_cap(vcpu
);
1349 vfree(cpuid_entries
);
1354 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1355 struct kvm_cpuid2
*cpuid
,
1356 struct kvm_cpuid_entry2 __user
*entries
)
1361 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1364 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1365 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1367 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1374 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1375 struct kvm_cpuid2
*cpuid
,
1376 struct kvm_cpuid_entry2 __user
*entries
)
1381 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1384 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1385 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1390 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1394 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1397 entry
->function
= function
;
1398 entry
->index
= index
;
1399 cpuid_count(entry
->function
, entry
->index
,
1400 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1404 #define F(x) bit(X86_FEATURE_##x)
1406 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1407 u32 index
, int *nent
, int maxnent
)
1409 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1410 #ifdef CONFIG_X86_64
1411 unsigned f_lm
= F(LM
);
1417 const u32 kvm_supported_word0_x86_features
=
1418 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1419 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1420 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1421 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1422 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1423 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1424 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1425 0 /* HTT, TM, Reserved, PBE */;
1426 /* cpuid 0x80000001.edx */
1427 const u32 kvm_supported_word1_x86_features
=
1428 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1429 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1430 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1431 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1432 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1433 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1434 F(FXSR
) | F(FXSR_OPT
) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1435 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1437 const u32 kvm_supported_word4_x86_features
=
1438 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1439 0 /* DS-CPL, VMX, SMX, EST */ |
1440 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1441 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1442 0 /* Reserved, DCA */ | F(XMM4_1
) |
1443 F(XMM4_2
) | 0 /* x2APIC */ | F(MOVBE
) | F(POPCNT
) |
1444 0 /* Reserved, XSAVE, OSXSAVE */;
1445 /* cpuid 0x80000001.ecx */
1446 const u32 kvm_supported_word6_x86_features
=
1447 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1448 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1449 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1450 0 /* SKINIT */ | 0 /* WDT */;
1452 /* all calls to cpuid_count() should be made on the same cpu */
1454 do_cpuid_1_ent(entry
, function
, index
);
1459 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1462 entry
->edx
&= kvm_supported_word0_x86_features
;
1463 entry
->ecx
&= kvm_supported_word4_x86_features
;
1465 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1466 * may return different values. This forces us to get_cpu() before
1467 * issuing the first command, and also to emulate this annoying behavior
1468 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1470 int t
, times
= entry
->eax
& 0xff;
1472 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1473 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1474 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1475 do_cpuid_1_ent(&entry
[t
], function
, 0);
1476 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1481 /* function 4 and 0xb have additional index. */
1485 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1486 /* read more entries until cache_type is zero */
1487 for (i
= 1; *nent
< maxnent
; ++i
) {
1488 cache_type
= entry
[i
- 1].eax
& 0x1f;
1491 do_cpuid_1_ent(&entry
[i
], function
, i
);
1493 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1501 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1502 /* read more entries until level_type is zero */
1503 for (i
= 1; *nent
< maxnent
; ++i
) {
1504 level_type
= entry
[i
- 1].ecx
& 0xff00;
1507 do_cpuid_1_ent(&entry
[i
], function
, i
);
1509 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1515 entry
->eax
= min(entry
->eax
, 0x8000001a);
1518 entry
->edx
&= kvm_supported_word1_x86_features
;
1519 entry
->ecx
&= kvm_supported_word6_x86_features
;
1527 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1528 struct kvm_cpuid_entry2 __user
*entries
)
1530 struct kvm_cpuid_entry2
*cpuid_entries
;
1531 int limit
, nent
= 0, r
= -E2BIG
;
1534 if (cpuid
->nent
< 1)
1537 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1541 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1542 limit
= cpuid_entries
[0].eax
;
1543 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1544 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1545 &nent
, cpuid
->nent
);
1547 if (nent
>= cpuid
->nent
)
1550 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1551 limit
= cpuid_entries
[nent
- 1].eax
;
1552 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1553 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1554 &nent
, cpuid
->nent
);
1556 if (nent
>= cpuid
->nent
)
1560 if (copy_to_user(entries
, cpuid_entries
,
1561 nent
* sizeof(struct kvm_cpuid_entry2
)))
1567 vfree(cpuid_entries
);
1572 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1573 struct kvm_lapic_state
*s
)
1576 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1582 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1583 struct kvm_lapic_state
*s
)
1586 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1587 kvm_apic_post_state_restore(vcpu
);
1593 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1594 struct kvm_interrupt
*irq
)
1596 if (irq
->irq
< 0 || irq
->irq
>= 256)
1598 if (irqchip_in_kernel(vcpu
->kvm
))
1602 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1609 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1612 kvm_inject_nmi(vcpu
);
1618 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1619 struct kvm_tpr_access_ctl
*tac
)
1623 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1627 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1631 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1636 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1639 vcpu
->arch
.mcg_cap
= mcg_cap
;
1640 /* Init IA32_MCG_CTL to all 1s */
1641 if (mcg_cap
& MCG_CTL_P
)
1642 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1643 /* Init IA32_MCi_CTL to all 1s */
1644 for (bank
= 0; bank
< bank_num
; bank
++)
1645 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1650 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1651 struct kvm_x86_mce
*mce
)
1653 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1654 unsigned bank_num
= mcg_cap
& 0xff;
1655 u64
*banks
= vcpu
->arch
.mce_banks
;
1657 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1660 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1661 * reporting is disabled
1663 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1664 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1666 banks
+= 4 * mce
->bank
;
1668 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1669 * reporting is disabled for the bank
1671 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1673 if (mce
->status
& MCI_STATUS_UC
) {
1674 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1675 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1676 printk(KERN_DEBUG
"kvm: set_mce: "
1677 "injects mce exception while "
1678 "previous one is in progress!\n");
1679 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1682 if (banks
[1] & MCI_STATUS_VAL
)
1683 mce
->status
|= MCI_STATUS_OVER
;
1684 banks
[2] = mce
->addr
;
1685 banks
[3] = mce
->misc
;
1686 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1687 banks
[1] = mce
->status
;
1688 kvm_queue_exception(vcpu
, MC_VECTOR
);
1689 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1690 || !(banks
[1] & MCI_STATUS_UC
)) {
1691 if (banks
[1] & MCI_STATUS_VAL
)
1692 mce
->status
|= MCI_STATUS_OVER
;
1693 banks
[2] = mce
->addr
;
1694 banks
[3] = mce
->misc
;
1695 banks
[1] = mce
->status
;
1697 banks
[1] |= MCI_STATUS_OVER
;
1701 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1702 unsigned int ioctl
, unsigned long arg
)
1704 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1705 void __user
*argp
= (void __user
*)arg
;
1707 struct kvm_lapic_state
*lapic
= NULL
;
1710 case KVM_GET_LAPIC
: {
1711 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1716 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1720 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1725 case KVM_SET_LAPIC
: {
1726 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1731 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1733 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1739 case KVM_INTERRUPT
: {
1740 struct kvm_interrupt irq
;
1743 if (copy_from_user(&irq
, argp
, sizeof irq
))
1745 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1752 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1758 case KVM_SET_CPUID
: {
1759 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1760 struct kvm_cpuid cpuid
;
1763 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1765 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1770 case KVM_SET_CPUID2
: {
1771 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1772 struct kvm_cpuid2 cpuid
;
1775 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1777 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1778 cpuid_arg
->entries
);
1783 case KVM_GET_CPUID2
: {
1784 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1785 struct kvm_cpuid2 cpuid
;
1788 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1790 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1791 cpuid_arg
->entries
);
1795 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1801 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1804 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1806 case KVM_TPR_ACCESS_REPORTING
: {
1807 struct kvm_tpr_access_ctl tac
;
1810 if (copy_from_user(&tac
, argp
, sizeof tac
))
1812 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
1816 if (copy_to_user(argp
, &tac
, sizeof tac
))
1821 case KVM_SET_VAPIC_ADDR
: {
1822 struct kvm_vapic_addr va
;
1825 if (!irqchip_in_kernel(vcpu
->kvm
))
1828 if (copy_from_user(&va
, argp
, sizeof va
))
1831 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
1834 case KVM_X86_SETUP_MCE
: {
1838 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
1840 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
1843 case KVM_X86_SET_MCE
: {
1844 struct kvm_x86_mce mce
;
1847 if (copy_from_user(&mce
, argp
, sizeof mce
))
1849 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
1860 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
1864 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
1866 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
1870 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
1871 u32 kvm_nr_mmu_pages
)
1873 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
1876 down_write(&kvm
->slots_lock
);
1877 spin_lock(&kvm
->mmu_lock
);
1879 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
1880 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
1882 spin_unlock(&kvm
->mmu_lock
);
1883 up_write(&kvm
->slots_lock
);
1887 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
1889 return kvm
->arch
.n_alloc_mmu_pages
;
1892 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
1895 struct kvm_mem_alias
*alias
;
1897 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
1898 alias
= &kvm
->arch
.aliases
[i
];
1899 if (gfn
>= alias
->base_gfn
1900 && gfn
< alias
->base_gfn
+ alias
->npages
)
1901 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
1907 * Set a new alias region. Aliases map a portion of physical memory into
1908 * another portion. This is useful for memory windows, for example the PC
1911 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
1912 struct kvm_memory_alias
*alias
)
1915 struct kvm_mem_alias
*p
;
1918 /* General sanity checks */
1919 if (alias
->memory_size
& (PAGE_SIZE
- 1))
1921 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
1923 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
1925 if (alias
->guest_phys_addr
+ alias
->memory_size
1926 < alias
->guest_phys_addr
)
1928 if (alias
->target_phys_addr
+ alias
->memory_size
1929 < alias
->target_phys_addr
)
1932 down_write(&kvm
->slots_lock
);
1933 spin_lock(&kvm
->mmu_lock
);
1935 p
= &kvm
->arch
.aliases
[alias
->slot
];
1936 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
1937 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
1938 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
1940 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
1941 if (kvm
->arch
.aliases
[n
- 1].npages
)
1943 kvm
->arch
.naliases
= n
;
1945 spin_unlock(&kvm
->mmu_lock
);
1946 kvm_mmu_zap_all(kvm
);
1948 up_write(&kvm
->slots_lock
);
1956 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
1961 switch (chip
->chip_id
) {
1962 case KVM_IRQCHIP_PIC_MASTER
:
1963 memcpy(&chip
->chip
.pic
,
1964 &pic_irqchip(kvm
)->pics
[0],
1965 sizeof(struct kvm_pic_state
));
1967 case KVM_IRQCHIP_PIC_SLAVE
:
1968 memcpy(&chip
->chip
.pic
,
1969 &pic_irqchip(kvm
)->pics
[1],
1970 sizeof(struct kvm_pic_state
));
1972 case KVM_IRQCHIP_IOAPIC
:
1973 memcpy(&chip
->chip
.ioapic
,
1974 ioapic_irqchip(kvm
),
1975 sizeof(struct kvm_ioapic_state
));
1984 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
1989 switch (chip
->chip_id
) {
1990 case KVM_IRQCHIP_PIC_MASTER
:
1991 memcpy(&pic_irqchip(kvm
)->pics
[0],
1993 sizeof(struct kvm_pic_state
));
1995 case KVM_IRQCHIP_PIC_SLAVE
:
1996 memcpy(&pic_irqchip(kvm
)->pics
[1],
1998 sizeof(struct kvm_pic_state
));
2000 case KVM_IRQCHIP_IOAPIC
:
2001 memcpy(ioapic_irqchip(kvm
),
2003 sizeof(struct kvm_ioapic_state
));
2009 kvm_pic_update_irq(pic_irqchip(kvm
));
2013 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2017 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2021 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2025 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2026 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
);
2030 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2031 struct kvm_reinject_control
*control
)
2033 if (!kvm
->arch
.vpit
)
2035 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2040 * Get (and clear) the dirty memory log for a memory slot.
2042 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2043 struct kvm_dirty_log
*log
)
2047 struct kvm_memory_slot
*memslot
;
2050 down_write(&kvm
->slots_lock
);
2052 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2056 /* If nothing is dirty, don't bother messing with page tables. */
2058 spin_lock(&kvm
->mmu_lock
);
2059 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2060 spin_unlock(&kvm
->mmu_lock
);
2061 kvm_flush_remote_tlbs(kvm
);
2062 memslot
= &kvm
->memslots
[log
->slot
];
2063 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2064 memset(memslot
->dirty_bitmap
, 0, n
);
2068 up_write(&kvm
->slots_lock
);
2072 long kvm_arch_vm_ioctl(struct file
*filp
,
2073 unsigned int ioctl
, unsigned long arg
)
2075 struct kvm
*kvm
= filp
->private_data
;
2076 void __user
*argp
= (void __user
*)arg
;
2079 * This union makes it completely explicit to gcc-3.x
2080 * that these two variables' stack usage should be
2081 * combined, not added together.
2084 struct kvm_pit_state ps
;
2085 struct kvm_memory_alias alias
;
2086 struct kvm_pit_config pit_config
;
2090 case KVM_SET_TSS_ADDR
:
2091 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2095 case KVM_SET_MEMORY_REGION
: {
2096 struct kvm_memory_region kvm_mem
;
2097 struct kvm_userspace_memory_region kvm_userspace_mem
;
2100 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2102 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2103 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2104 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2105 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2106 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2111 case KVM_SET_NR_MMU_PAGES
:
2112 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2116 case KVM_GET_NR_MMU_PAGES
:
2117 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2119 case KVM_SET_MEMORY_ALIAS
:
2121 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2123 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2127 case KVM_CREATE_IRQCHIP
:
2129 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2130 if (kvm
->arch
.vpic
) {
2131 r
= kvm_ioapic_init(kvm
);
2133 kfree(kvm
->arch
.vpic
);
2134 kvm
->arch
.vpic
= NULL
;
2139 r
= kvm_setup_default_irq_routing(kvm
);
2141 kfree(kvm
->arch
.vpic
);
2142 kfree(kvm
->arch
.vioapic
);
2146 case KVM_CREATE_PIT
:
2147 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2149 case KVM_CREATE_PIT2
:
2151 if (copy_from_user(&u
.pit_config
, argp
,
2152 sizeof(struct kvm_pit_config
)))
2155 mutex_lock(&kvm
->lock
);
2158 goto create_pit_unlock
;
2160 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2164 mutex_unlock(&kvm
->lock
);
2166 case KVM_IRQ_LINE_STATUS
:
2167 case KVM_IRQ_LINE
: {
2168 struct kvm_irq_level irq_event
;
2171 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2173 if (irqchip_in_kernel(kvm
)) {
2175 mutex_lock(&kvm
->irq_lock
);
2176 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2177 irq_event
.irq
, irq_event
.level
);
2178 mutex_unlock(&kvm
->irq_lock
);
2179 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2180 irq_event
.status
= status
;
2181 if (copy_to_user(argp
, &irq_event
,
2189 case KVM_GET_IRQCHIP
: {
2190 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2191 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2197 if (copy_from_user(chip
, argp
, sizeof *chip
))
2198 goto get_irqchip_out
;
2200 if (!irqchip_in_kernel(kvm
))
2201 goto get_irqchip_out
;
2202 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2204 goto get_irqchip_out
;
2206 if (copy_to_user(argp
, chip
, sizeof *chip
))
2207 goto get_irqchip_out
;
2215 case KVM_SET_IRQCHIP
: {
2216 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2217 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2223 if (copy_from_user(chip
, argp
, sizeof *chip
))
2224 goto set_irqchip_out
;
2226 if (!irqchip_in_kernel(kvm
))
2227 goto set_irqchip_out
;
2228 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2230 goto set_irqchip_out
;
2240 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2243 if (!kvm
->arch
.vpit
)
2245 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2249 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2256 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2259 if (!kvm
->arch
.vpit
)
2261 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2267 case KVM_REINJECT_CONTROL
: {
2268 struct kvm_reinject_control control
;
2270 if (copy_from_user(&control
, argp
, sizeof(control
)))
2272 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2285 static void kvm_init_msr_list(void)
2290 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2291 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2294 msrs_to_save
[j
] = msrs_to_save
[i
];
2297 num_msrs_to_save
= j
;
2301 * Only apic need an MMIO device hook, so shortcut now..
2303 static struct kvm_io_device
*vcpu_find_pervcpu_dev(struct kvm_vcpu
*vcpu
,
2304 gpa_t addr
, int len
,
2307 struct kvm_io_device
*dev
;
2309 if (vcpu
->arch
.apic
) {
2310 dev
= &vcpu
->arch
.apic
->dev
;
2311 if (kvm_iodevice_in_range(dev
, addr
, len
, is_write
))
2318 static struct kvm_io_device
*vcpu_find_mmio_dev(struct kvm_vcpu
*vcpu
,
2319 gpa_t addr
, int len
,
2322 struct kvm_io_device
*dev
;
2324 dev
= vcpu_find_pervcpu_dev(vcpu
, addr
, len
, is_write
);
2326 dev
= kvm_io_bus_find_dev(&vcpu
->kvm
->mmio_bus
, addr
, len
,
2331 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2332 struct kvm_vcpu
*vcpu
)
2335 int r
= X86EMUL_CONTINUE
;
2338 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2339 unsigned offset
= addr
& (PAGE_SIZE
-1);
2340 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2343 if (gpa
== UNMAPPED_GVA
) {
2344 r
= X86EMUL_PROPAGATE_FAULT
;
2347 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2349 r
= X86EMUL_UNHANDLEABLE
;
2361 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2362 struct kvm_vcpu
*vcpu
)
2365 int r
= X86EMUL_CONTINUE
;
2368 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2369 unsigned offset
= addr
& (PAGE_SIZE
-1);
2370 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2373 if (gpa
== UNMAPPED_GVA
) {
2374 r
= X86EMUL_PROPAGATE_FAULT
;
2377 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2379 r
= X86EMUL_UNHANDLEABLE
;
2392 static int emulator_read_emulated(unsigned long addr
,
2395 struct kvm_vcpu
*vcpu
)
2397 struct kvm_io_device
*mmio_dev
;
2400 if (vcpu
->mmio_read_completed
) {
2401 memcpy(val
, vcpu
->mmio_data
, bytes
);
2402 vcpu
->mmio_read_completed
= 0;
2403 return X86EMUL_CONTINUE
;
2406 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2408 /* For APIC access vmexit */
2409 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2412 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2413 == X86EMUL_CONTINUE
)
2414 return X86EMUL_CONTINUE
;
2415 if (gpa
== UNMAPPED_GVA
)
2416 return X86EMUL_PROPAGATE_FAULT
;
2420 * Is this MMIO handled locally?
2422 mutex_lock(&vcpu
->kvm
->lock
);
2423 mmio_dev
= vcpu_find_mmio_dev(vcpu
, gpa
, bytes
, 0);
2424 mutex_unlock(&vcpu
->kvm
->lock
);
2426 kvm_iodevice_read(mmio_dev
, gpa
, bytes
, val
);
2427 return X86EMUL_CONTINUE
;
2430 vcpu
->mmio_needed
= 1;
2431 vcpu
->mmio_phys_addr
= gpa
;
2432 vcpu
->mmio_size
= bytes
;
2433 vcpu
->mmio_is_write
= 0;
2435 return X86EMUL_UNHANDLEABLE
;
2438 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2439 const void *val
, int bytes
)
2443 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2446 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2450 static int emulator_write_emulated_onepage(unsigned long addr
,
2453 struct kvm_vcpu
*vcpu
)
2455 struct kvm_io_device
*mmio_dev
;
2458 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2460 if (gpa
== UNMAPPED_GVA
) {
2461 kvm_inject_page_fault(vcpu
, addr
, 2);
2462 return X86EMUL_PROPAGATE_FAULT
;
2465 /* For APIC access vmexit */
2466 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2469 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2470 return X86EMUL_CONTINUE
;
2474 * Is this MMIO handled locally?
2476 mutex_lock(&vcpu
->kvm
->lock
);
2477 mmio_dev
= vcpu_find_mmio_dev(vcpu
, gpa
, bytes
, 1);
2478 mutex_unlock(&vcpu
->kvm
->lock
);
2480 kvm_iodevice_write(mmio_dev
, gpa
, bytes
, val
);
2481 return X86EMUL_CONTINUE
;
2484 vcpu
->mmio_needed
= 1;
2485 vcpu
->mmio_phys_addr
= gpa
;
2486 vcpu
->mmio_size
= bytes
;
2487 vcpu
->mmio_is_write
= 1;
2488 memcpy(vcpu
->mmio_data
, val
, bytes
);
2490 return X86EMUL_CONTINUE
;
2493 int emulator_write_emulated(unsigned long addr
,
2496 struct kvm_vcpu
*vcpu
)
2498 /* Crossing a page boundary? */
2499 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2502 now
= -addr
& ~PAGE_MASK
;
2503 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2504 if (rc
!= X86EMUL_CONTINUE
)
2510 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2512 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2514 static int emulator_cmpxchg_emulated(unsigned long addr
,
2518 struct kvm_vcpu
*vcpu
)
2520 static int reported
;
2524 printk(KERN_WARNING
"kvm: emulating exchange as write\n");
2526 #ifndef CONFIG_X86_64
2527 /* guests cmpxchg8b have to be emulated atomically */
2534 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2536 if (gpa
== UNMAPPED_GVA
||
2537 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2540 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2545 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2547 kaddr
= kmap_atomic(page
, KM_USER0
);
2548 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2549 kunmap_atomic(kaddr
, KM_USER0
);
2550 kvm_release_page_dirty(page
);
2555 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2558 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2560 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2563 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2565 kvm_mmu_invlpg(vcpu
, address
);
2566 return X86EMUL_CONTINUE
;
2569 int emulate_clts(struct kvm_vcpu
*vcpu
)
2571 KVMTRACE_0D(CLTS
, vcpu
, handler
);
2572 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2573 return X86EMUL_CONTINUE
;
2576 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2578 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2582 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2583 return X86EMUL_CONTINUE
;
2585 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2586 return X86EMUL_UNHANDLEABLE
;
2590 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2592 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2595 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2597 /* FIXME: better handling */
2598 return X86EMUL_UNHANDLEABLE
;
2600 return X86EMUL_CONTINUE
;
2603 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2606 unsigned long rip
= kvm_rip_read(vcpu
);
2607 unsigned long rip_linear
;
2609 if (!printk_ratelimit())
2612 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2614 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2616 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2617 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2619 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2621 static struct x86_emulate_ops emulate_ops
= {
2622 .read_std
= kvm_read_guest_virt
,
2623 .read_emulated
= emulator_read_emulated
,
2624 .write_emulated
= emulator_write_emulated
,
2625 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2628 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2630 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2631 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2632 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2633 vcpu
->arch
.regs_dirty
= ~0;
2636 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2637 struct kvm_run
*run
,
2643 struct decode_cache
*c
;
2645 kvm_clear_exception_queue(vcpu
);
2646 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2648 * TODO: fix x86_emulate.c to use guest_read/write_register
2649 * instead of direct ->regs accesses, can save hundred cycles
2650 * on Intel for instructions that don't read/change RSP, for
2653 cache_all_regs(vcpu
);
2655 vcpu
->mmio_is_write
= 0;
2656 vcpu
->arch
.pio
.string
= 0;
2658 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2660 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2662 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2663 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
2664 vcpu
->arch
.emulate_ctxt
.mode
=
2665 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2666 ? X86EMUL_MODE_REAL
: cs_l
2667 ? X86EMUL_MODE_PROT64
: cs_db
2668 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2670 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2672 /* Reject the instructions other than VMCALL/VMMCALL when
2673 * try to emulate invalid opcode */
2674 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2675 if ((emulation_type
& EMULTYPE_TRAP_UD
) &&
2676 (!(c
->twobyte
&& c
->b
== 0x01 &&
2677 (c
->modrm_reg
== 0 || c
->modrm_reg
== 3) &&
2678 c
->modrm_mod
== 3 && c
->modrm_rm
== 1)))
2679 return EMULATE_FAIL
;
2681 ++vcpu
->stat
.insn_emulation
;
2683 ++vcpu
->stat
.insn_emulation_fail
;
2684 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2685 return EMULATE_DONE
;
2686 return EMULATE_FAIL
;
2690 if (emulation_type
& EMULTYPE_SKIP
) {
2691 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
2692 return EMULATE_DONE
;
2695 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2696 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
2699 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
2701 if (vcpu
->arch
.pio
.string
)
2702 return EMULATE_DO_MMIO
;
2704 if ((r
|| vcpu
->mmio_is_write
) && run
) {
2705 run
->exit_reason
= KVM_EXIT_MMIO
;
2706 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
2707 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
2708 run
->mmio
.len
= vcpu
->mmio_size
;
2709 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
2713 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2714 return EMULATE_DONE
;
2715 if (!vcpu
->mmio_needed
) {
2716 kvm_report_emulation_failure(vcpu
, "mmio");
2717 return EMULATE_FAIL
;
2719 return EMULATE_DO_MMIO
;
2722 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
2724 if (vcpu
->mmio_is_write
) {
2725 vcpu
->mmio_needed
= 0;
2726 return EMULATE_DO_MMIO
;
2729 return EMULATE_DONE
;
2731 EXPORT_SYMBOL_GPL(emulate_instruction
);
2733 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
2735 void *p
= vcpu
->arch
.pio_data
;
2736 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
2740 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
2741 if (vcpu
->arch
.pio
.in
)
2742 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
2744 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
2748 int complete_pio(struct kvm_vcpu
*vcpu
)
2750 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2757 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2758 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
2759 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
2763 r
= pio_copy_data(vcpu
);
2770 delta
*= io
->cur_count
;
2772 * The size of the register should really depend on
2773 * current address size.
2775 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
2777 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
2783 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
2785 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
2787 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
2789 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
2793 io
->count
-= io
->cur_count
;
2799 static void kernel_pio(struct kvm_io_device
*pio_dev
,
2800 struct kvm_vcpu
*vcpu
,
2803 /* TODO: String I/O for in kernel device */
2805 if (vcpu
->arch
.pio
.in
)
2806 kvm_iodevice_read(pio_dev
, vcpu
->arch
.pio
.port
,
2807 vcpu
->arch
.pio
.size
,
2810 kvm_iodevice_write(pio_dev
, vcpu
->arch
.pio
.port
,
2811 vcpu
->arch
.pio
.size
,
2815 static void pio_string_write(struct kvm_io_device
*pio_dev
,
2816 struct kvm_vcpu
*vcpu
)
2818 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2819 void *pd
= vcpu
->arch
.pio_data
;
2822 for (i
= 0; i
< io
->cur_count
; i
++) {
2823 kvm_iodevice_write(pio_dev
, io
->port
,
2830 static struct kvm_io_device
*vcpu_find_pio_dev(struct kvm_vcpu
*vcpu
,
2831 gpa_t addr
, int len
,
2834 return kvm_io_bus_find_dev(&vcpu
->kvm
->pio_bus
, addr
, len
, is_write
);
2837 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2838 int size
, unsigned port
)
2840 struct kvm_io_device
*pio_dev
;
2843 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2844 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2845 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2846 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2847 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
2848 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2849 vcpu
->arch
.pio
.in
= in
;
2850 vcpu
->arch
.pio
.string
= 0;
2851 vcpu
->arch
.pio
.down
= 0;
2852 vcpu
->arch
.pio
.rep
= 0;
2854 if (vcpu
->run
->io
.direction
== KVM_EXIT_IO_IN
)
2855 KVMTRACE_2D(IO_READ
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2858 KVMTRACE_2D(IO_WRITE
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2861 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2862 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
2864 mutex_lock(&vcpu
->kvm
->lock
);
2865 pio_dev
= vcpu_find_pio_dev(vcpu
, port
, size
, !in
);
2866 mutex_unlock(&vcpu
->kvm
->lock
);
2868 kernel_pio(pio_dev
, vcpu
, vcpu
->arch
.pio_data
);
2874 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
2876 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2877 int size
, unsigned long count
, int down
,
2878 gva_t address
, int rep
, unsigned port
)
2880 unsigned now
, in_page
;
2882 struct kvm_io_device
*pio_dev
;
2884 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2885 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2886 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2887 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2888 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
2889 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2890 vcpu
->arch
.pio
.in
= in
;
2891 vcpu
->arch
.pio
.string
= 1;
2892 vcpu
->arch
.pio
.down
= down
;
2893 vcpu
->arch
.pio
.rep
= rep
;
2895 if (vcpu
->run
->io
.direction
== KVM_EXIT_IO_IN
)
2896 KVMTRACE_2D(IO_READ
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2899 KVMTRACE_2D(IO_WRITE
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2903 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
2908 in_page
= PAGE_SIZE
- offset_in_page(address
);
2910 in_page
= offset_in_page(address
) + size
;
2911 now
= min(count
, (unsigned long)in_page
/ size
);
2916 * String I/O in reverse. Yuck. Kill the guest, fix later.
2918 pr_unimpl(vcpu
, "guest string pio down\n");
2919 kvm_inject_gp(vcpu
, 0);
2922 vcpu
->run
->io
.count
= now
;
2923 vcpu
->arch
.pio
.cur_count
= now
;
2925 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
2926 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
2928 vcpu
->arch
.pio
.guest_gva
= address
;
2930 mutex_lock(&vcpu
->kvm
->lock
);
2931 pio_dev
= vcpu_find_pio_dev(vcpu
, port
,
2932 vcpu
->arch
.pio
.cur_count
,
2933 !vcpu
->arch
.pio
.in
);
2934 mutex_unlock(&vcpu
->kvm
->lock
);
2936 if (!vcpu
->arch
.pio
.in
) {
2937 /* string PIO write */
2938 ret
= pio_copy_data(vcpu
);
2939 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
2940 kvm_inject_gp(vcpu
, 0);
2943 if (ret
== 0 && pio_dev
) {
2944 pio_string_write(pio_dev
, vcpu
);
2946 if (vcpu
->arch
.pio
.count
== 0)
2950 pr_unimpl(vcpu
, "no string pio read support yet, "
2951 "port %x size %d count %ld\n",
2956 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
2958 static void bounce_off(void *info
)
2963 static unsigned int ref_freq
;
2964 static unsigned long tsc_khz_ref
;
2966 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
2969 struct cpufreq_freqs
*freq
= data
;
2971 struct kvm_vcpu
*vcpu
;
2972 int i
, send_ipi
= 0;
2975 ref_freq
= freq
->old
;
2977 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
2979 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
2981 per_cpu(cpu_tsc_khz
, freq
->cpu
) = cpufreq_scale(tsc_khz_ref
, ref_freq
, freq
->new);
2983 spin_lock(&kvm_lock
);
2984 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
2985 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2986 if (vcpu
->cpu
!= freq
->cpu
)
2988 if (!kvm_request_guest_time_update(vcpu
))
2990 if (vcpu
->cpu
!= smp_processor_id())
2994 spin_unlock(&kvm_lock
);
2996 if (freq
->old
< freq
->new && send_ipi
) {
2998 * We upscale the frequency. Must make the guest
2999 * doesn't see old kvmclock values while running with
3000 * the new frequency, otherwise we risk the guest sees
3001 * time go backwards.
3003 * In case we update the frequency for another cpu
3004 * (which might be in guest context) send an interrupt
3005 * to kick the cpu out of guest context. Next time
3006 * guest context is entered kvmclock will be updated,
3007 * so the guest will not see stale values.
3009 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3014 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3015 .notifier_call
= kvmclock_cpufreq_notifier
3018 int kvm_arch_init(void *opaque
)
3021 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3024 printk(KERN_ERR
"kvm: already loaded the other module\n");
3029 if (!ops
->cpu_has_kvm_support()) {
3030 printk(KERN_ERR
"kvm: no hardware support\n");
3034 if (ops
->disabled_by_bios()) {
3035 printk(KERN_ERR
"kvm: disabled by bios\n");
3040 r
= kvm_mmu_module_init();
3044 kvm_init_msr_list();
3047 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3048 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3049 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3050 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3052 for_each_possible_cpu(cpu
)
3053 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3054 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3055 tsc_khz_ref
= tsc_khz
;
3056 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3057 CPUFREQ_TRANSITION_NOTIFIER
);
3066 void kvm_arch_exit(void)
3068 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3069 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3070 CPUFREQ_TRANSITION_NOTIFIER
);
3072 kvm_mmu_module_exit();
3075 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3077 ++vcpu
->stat
.halt_exits
;
3078 KVMTRACE_0D(HLT
, vcpu
, handler
);
3079 if (irqchip_in_kernel(vcpu
->kvm
)) {
3080 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3083 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3087 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3089 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3092 if (is_long_mode(vcpu
))
3095 return a0
| ((gpa_t
)a1
<< 32);
3098 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3100 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3103 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3104 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3105 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3106 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3107 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3109 KVMTRACE_1D(VMMCALL
, vcpu
, (u32
)nr
, handler
);
3111 if (!is_long_mode(vcpu
)) {
3120 case KVM_HC_VAPIC_POLL_IRQ
:
3124 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3130 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3131 ++vcpu
->stat
.hypercalls
;
3134 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3136 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3138 char instruction
[3];
3140 unsigned long rip
= kvm_rip_read(vcpu
);
3144 * Blow out the MMU to ensure that no other VCPU has an active mapping
3145 * to ensure that the updated hypercall appears atomically across all
3148 kvm_mmu_zap_all(vcpu
->kvm
);
3150 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3151 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3152 != X86EMUL_CONTINUE
)
3158 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3160 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3163 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3165 struct descriptor_table dt
= { limit
, base
};
3167 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3170 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3172 struct descriptor_table dt
= { limit
, base
};
3174 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3177 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3178 unsigned long *rflags
)
3180 kvm_lmsw(vcpu
, msw
);
3181 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3184 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3186 unsigned long value
;
3188 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3191 value
= vcpu
->arch
.cr0
;
3194 value
= vcpu
->arch
.cr2
;
3197 value
= vcpu
->arch
.cr3
;
3200 value
= vcpu
->arch
.cr4
;
3203 value
= kvm_get_cr8(vcpu
);
3206 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3209 KVMTRACE_3D(CR_READ
, vcpu
, (u32
)cr
, (u32
)value
,
3210 (u32
)((u64
)value
>> 32), handler
);
3215 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3216 unsigned long *rflags
)
3218 KVMTRACE_3D(CR_WRITE
, vcpu
, (u32
)cr
, (u32
)val
,
3219 (u32
)((u64
)val
>> 32), handler
);
3223 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3224 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3227 vcpu
->arch
.cr2
= val
;
3230 kvm_set_cr3(vcpu
, val
);
3233 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3236 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3239 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3243 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3245 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3246 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3248 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3249 /* when no next entry is found, the current entry[i] is reselected */
3250 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3251 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3252 if (ej
->function
== e
->function
) {
3253 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3257 return 0; /* silence gcc, even though control never reaches here */
3260 /* find an entry with matching function, matching index (if needed), and that
3261 * should be read next (if it's stateful) */
3262 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3263 u32 function
, u32 index
)
3265 if (e
->function
!= function
)
3267 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3269 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3270 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3275 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3276 u32 function
, u32 index
)
3279 struct kvm_cpuid_entry2
*best
= NULL
;
3281 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3282 struct kvm_cpuid_entry2
*e
;
3284 e
= &vcpu
->arch
.cpuid_entries
[i
];
3285 if (is_matching_cpuid_entry(e
, function
, index
)) {
3286 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3287 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3292 * Both basic or both extended?
3294 if (((e
->function
^ function
) & 0x80000000) == 0)
3295 if (!best
|| e
->function
> best
->function
)
3301 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3303 struct kvm_cpuid_entry2
*best
;
3305 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3307 return best
->eax
& 0xff;
3311 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3313 u32 function
, index
;
3314 struct kvm_cpuid_entry2
*best
;
3316 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3317 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3318 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3319 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3320 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3321 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3322 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3324 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3325 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3326 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3327 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3329 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3330 KVMTRACE_5D(CPUID
, vcpu
, function
,
3331 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3332 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3333 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3334 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RDX
), handler
);
3336 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3339 * Check if userspace requested an interrupt window, and that the
3340 * interrupt window is open.
3342 * No need to exit to userspace if we already have an interrupt queued.
3344 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
3345 struct kvm_run
*kvm_run
)
3347 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3348 kvm_run
->request_interrupt_window
&&
3349 kvm_arch_interrupt_allowed(vcpu
));
3352 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
3353 struct kvm_run
*kvm_run
)
3355 kvm_run
->if_flag
= (kvm_x86_ops
->get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3356 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3357 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3358 if (irqchip_in_kernel(vcpu
->kvm
))
3359 kvm_run
->ready_for_interrupt_injection
= 1;
3361 kvm_run
->ready_for_interrupt_injection
=
3362 kvm_arch_interrupt_allowed(vcpu
) &&
3363 !kvm_cpu_has_interrupt(vcpu
) &&
3364 !kvm_event_needs_reinjection(vcpu
);
3367 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3369 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3372 if (!apic
|| !apic
->vapic_addr
)
3375 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3377 vcpu
->arch
.apic
->vapic_page
= page
;
3380 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3382 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3384 if (!apic
|| !apic
->vapic_addr
)
3387 down_read(&vcpu
->kvm
->slots_lock
);
3388 kvm_release_page_dirty(apic
->vapic_page
);
3389 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3390 up_read(&vcpu
->kvm
->slots_lock
);
3393 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3397 if (!kvm_x86_ops
->update_cr8_intercept
)
3400 if (!vcpu
->arch
.apic
->vapic_addr
)
3401 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3408 tpr
= kvm_lapic_get_cr8(vcpu
);
3410 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3413 static void inject_pending_irq(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3415 /* try to reinject previous events if any */
3416 if (vcpu
->arch
.nmi_injected
) {
3417 kvm_x86_ops
->set_nmi(vcpu
);
3421 if (vcpu
->arch
.interrupt
.pending
) {
3422 kvm_x86_ops
->set_irq(vcpu
);
3426 /* try to inject new event if pending */
3427 if (vcpu
->arch
.nmi_pending
) {
3428 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3429 vcpu
->arch
.nmi_pending
= false;
3430 vcpu
->arch
.nmi_injected
= true;
3431 kvm_x86_ops
->set_nmi(vcpu
);
3433 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3434 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3435 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3437 kvm_x86_ops
->set_irq(vcpu
);
3442 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3445 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3446 kvm_run
->request_interrupt_window
;
3449 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3450 kvm_mmu_unload(vcpu
);
3452 r
= kvm_mmu_reload(vcpu
);
3456 if (vcpu
->requests
) {
3457 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3458 __kvm_migrate_timers(vcpu
);
3459 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3460 kvm_write_guest_time(vcpu
);
3461 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3462 kvm_mmu_sync_roots(vcpu
);
3463 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3464 kvm_x86_ops
->tlb_flush(vcpu
);
3465 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3467 kvm_run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3471 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3472 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3480 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3481 kvm_load_guest_fpu(vcpu
);
3483 local_irq_disable();
3485 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3486 smp_mb__after_clear_bit();
3488 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3495 if (vcpu
->arch
.exception
.pending
)
3496 __queue_exception(vcpu
);
3498 inject_pending_irq(vcpu
, kvm_run
);
3500 /* enable NMI/IRQ window open exits if needed */
3501 if (vcpu
->arch
.nmi_pending
)
3502 kvm_x86_ops
->enable_nmi_window(vcpu
);
3503 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3504 kvm_x86_ops
->enable_irq_window(vcpu
);
3506 if (kvm_lapic_enabled(vcpu
)) {
3507 update_cr8_intercept(vcpu
);
3508 kvm_lapic_sync_to_vapic(vcpu
);
3511 up_read(&vcpu
->kvm
->slots_lock
);
3515 get_debugreg(vcpu
->arch
.host_dr6
, 6);
3516 get_debugreg(vcpu
->arch
.host_dr7
, 7);
3517 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3518 get_debugreg(vcpu
->arch
.host_db
[0], 0);
3519 get_debugreg(vcpu
->arch
.host_db
[1], 1);
3520 get_debugreg(vcpu
->arch
.host_db
[2], 2);
3521 get_debugreg(vcpu
->arch
.host_db
[3], 3);
3524 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3525 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3526 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3527 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3530 KVMTRACE_0D(VMENTRY
, vcpu
, entryexit
);
3531 kvm_x86_ops
->run(vcpu
, kvm_run
);
3533 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3535 set_debugreg(vcpu
->arch
.host_db
[0], 0);
3536 set_debugreg(vcpu
->arch
.host_db
[1], 1);
3537 set_debugreg(vcpu
->arch
.host_db
[2], 2);
3538 set_debugreg(vcpu
->arch
.host_db
[3], 3);
3540 set_debugreg(vcpu
->arch
.host_dr6
, 6);
3541 set_debugreg(vcpu
->arch
.host_dr7
, 7);
3543 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3549 * We must have an instruction between local_irq_enable() and
3550 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3551 * the interrupt shadow. The stat.exits increment will do nicely.
3552 * But we need to prevent reordering, hence this barrier():
3560 down_read(&vcpu
->kvm
->slots_lock
);
3563 * Profile KVM exit RIPs:
3565 if (unlikely(prof_on
== KVM_PROFILING
)) {
3566 unsigned long rip
= kvm_rip_read(vcpu
);
3567 profile_hit(KVM_PROFILING
, (void *)rip
);
3571 kvm_lapic_sync_from_vapic(vcpu
);
3573 r
= kvm_x86_ops
->handle_exit(kvm_run
, vcpu
);
3579 static int __vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3583 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3584 pr_debug("vcpu %d received sipi with vector # %x\n",
3585 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3586 kvm_lapic_reset(vcpu
);
3587 r
= kvm_arch_vcpu_reset(vcpu
);
3590 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3593 down_read(&vcpu
->kvm
->slots_lock
);
3598 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3599 r
= vcpu_enter_guest(vcpu
, kvm_run
);
3601 up_read(&vcpu
->kvm
->slots_lock
);
3602 kvm_vcpu_block(vcpu
);
3603 down_read(&vcpu
->kvm
->slots_lock
);
3604 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3606 switch(vcpu
->arch
.mp_state
) {
3607 case KVM_MP_STATE_HALTED
:
3608 vcpu
->arch
.mp_state
=
3609 KVM_MP_STATE_RUNNABLE
;
3610 case KVM_MP_STATE_RUNNABLE
:
3612 case KVM_MP_STATE_SIPI_RECEIVED
:
3623 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3624 if (kvm_cpu_has_pending_timer(vcpu
))
3625 kvm_inject_pending_timer_irqs(vcpu
);
3627 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
3629 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3630 ++vcpu
->stat
.request_irq_exits
;
3632 if (signal_pending(current
)) {
3634 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3635 ++vcpu
->stat
.signal_exits
;
3637 if (need_resched()) {
3638 up_read(&vcpu
->kvm
->slots_lock
);
3640 down_read(&vcpu
->kvm
->slots_lock
);
3644 up_read(&vcpu
->kvm
->slots_lock
);
3645 post_kvm_run_save(vcpu
, kvm_run
);
3652 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3659 if (vcpu
->sigset_active
)
3660 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3662 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3663 kvm_vcpu_block(vcpu
);
3664 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3669 /* re-sync apic's tpr */
3670 if (!irqchip_in_kernel(vcpu
->kvm
))
3671 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3673 if (vcpu
->arch
.pio
.cur_count
) {
3674 r
= complete_pio(vcpu
);
3678 #if CONFIG_HAS_IOMEM
3679 if (vcpu
->mmio_needed
) {
3680 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3681 vcpu
->mmio_read_completed
= 1;
3682 vcpu
->mmio_needed
= 0;
3684 down_read(&vcpu
->kvm
->slots_lock
);
3685 r
= emulate_instruction(vcpu
, kvm_run
,
3686 vcpu
->arch
.mmio_fault_cr2
, 0,
3687 EMULTYPE_NO_DECODE
);
3688 up_read(&vcpu
->kvm
->slots_lock
);
3689 if (r
== EMULATE_DO_MMIO
) {
3691 * Read-modify-write. Back to userspace.
3698 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3699 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3700 kvm_run
->hypercall
.ret
);
3702 r
= __vcpu_run(vcpu
, kvm_run
);
3705 if (vcpu
->sigset_active
)
3706 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3712 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3716 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3717 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3718 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3719 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3720 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3721 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3722 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3723 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3724 #ifdef CONFIG_X86_64
3725 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3726 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
3727 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
3728 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
3729 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
3730 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
3731 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
3732 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
3735 regs
->rip
= kvm_rip_read(vcpu
);
3736 regs
->rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3739 * Don't leak debug flags in case they were set for guest debugging
3741 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
3742 regs
->rflags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
3749 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3753 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
3754 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
3755 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
3756 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
3757 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
3758 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
3759 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
3760 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
3761 #ifdef CONFIG_X86_64
3762 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
3763 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
3764 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
3765 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
3766 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
3767 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
3768 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
3769 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
3773 kvm_rip_write(vcpu
, regs
->rip
);
3774 kvm_x86_ops
->set_rflags(vcpu
, regs
->rflags
);
3777 vcpu
->arch
.exception
.pending
= false;
3784 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3785 struct kvm_segment
*var
, int seg
)
3787 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3790 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
3792 struct kvm_segment cs
;
3794 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
3798 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
3800 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
3801 struct kvm_sregs
*sregs
)
3803 struct descriptor_table dt
;
3807 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
3808 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
3809 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
3810 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
3811 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
3812 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
3814 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
3815 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
3817 kvm_x86_ops
->get_idt(vcpu
, &dt
);
3818 sregs
->idt
.limit
= dt
.limit
;
3819 sregs
->idt
.base
= dt
.base
;
3820 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
3821 sregs
->gdt
.limit
= dt
.limit
;
3822 sregs
->gdt
.base
= dt
.base
;
3824 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3825 sregs
->cr0
= vcpu
->arch
.cr0
;
3826 sregs
->cr2
= vcpu
->arch
.cr2
;
3827 sregs
->cr3
= vcpu
->arch
.cr3
;
3828 sregs
->cr4
= vcpu
->arch
.cr4
;
3829 sregs
->cr8
= kvm_get_cr8(vcpu
);
3830 sregs
->efer
= vcpu
->arch
.shadow_efer
;
3831 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
3833 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
3835 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
3836 set_bit(vcpu
->arch
.interrupt
.nr
,
3837 (unsigned long *)sregs
->interrupt_bitmap
);
3844 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
3845 struct kvm_mp_state
*mp_state
)
3848 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
3853 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
3854 struct kvm_mp_state
*mp_state
)
3857 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
3862 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3863 struct kvm_segment
*var
, int seg
)
3865 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3868 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
3869 struct kvm_segment
*kvm_desct
)
3871 kvm_desct
->base
= seg_desc
->base0
;
3872 kvm_desct
->base
|= seg_desc
->base1
<< 16;
3873 kvm_desct
->base
|= seg_desc
->base2
<< 24;
3874 kvm_desct
->limit
= seg_desc
->limit0
;
3875 kvm_desct
->limit
|= seg_desc
->limit
<< 16;
3877 kvm_desct
->limit
<<= 12;
3878 kvm_desct
->limit
|= 0xfff;
3880 kvm_desct
->selector
= selector
;
3881 kvm_desct
->type
= seg_desc
->type
;
3882 kvm_desct
->present
= seg_desc
->p
;
3883 kvm_desct
->dpl
= seg_desc
->dpl
;
3884 kvm_desct
->db
= seg_desc
->d
;
3885 kvm_desct
->s
= seg_desc
->s
;
3886 kvm_desct
->l
= seg_desc
->l
;
3887 kvm_desct
->g
= seg_desc
->g
;
3888 kvm_desct
->avl
= seg_desc
->avl
;
3890 kvm_desct
->unusable
= 1;
3892 kvm_desct
->unusable
= 0;
3893 kvm_desct
->padding
= 0;
3896 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
3898 struct descriptor_table
*dtable
)
3900 if (selector
& 1 << 2) {
3901 struct kvm_segment kvm_seg
;
3903 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
3905 if (kvm_seg
.unusable
)
3908 dtable
->limit
= kvm_seg
.limit
;
3909 dtable
->base
= kvm_seg
.base
;
3912 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
3915 /* allowed just for 8 bytes segments */
3916 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
3917 struct desc_struct
*seg_desc
)
3920 struct descriptor_table dtable
;
3921 u16 index
= selector
>> 3;
3923 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
3925 if (dtable
.limit
< index
* 8 + 7) {
3926 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
3929 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
3931 return kvm_read_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
3934 /* allowed just for 8 bytes segments */
3935 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
3936 struct desc_struct
*seg_desc
)
3939 struct descriptor_table dtable
;
3940 u16 index
= selector
>> 3;
3942 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
3944 if (dtable
.limit
< index
* 8 + 7)
3946 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
3948 return kvm_write_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
3951 static u32
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
3952 struct desc_struct
*seg_desc
)
3956 base_addr
= seg_desc
->base0
;
3957 base_addr
|= (seg_desc
->base1
<< 16);
3958 base_addr
|= (seg_desc
->base2
<< 24);
3960 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
3963 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
3965 struct kvm_segment kvm_seg
;
3967 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
3968 return kvm_seg
.selector
;
3971 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
3973 struct kvm_segment
*kvm_seg
)
3975 struct desc_struct seg_desc
;
3977 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
3979 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
3983 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
3985 struct kvm_segment segvar
= {
3986 .base
= selector
<< 4,
3988 .selector
= selector
,
3999 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4003 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4004 int type_bits
, int seg
)
4006 struct kvm_segment kvm_seg
;
4008 if (!(vcpu
->arch
.cr0
& X86_CR0_PE
))
4009 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4010 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4012 kvm_seg
.type
|= type_bits
;
4014 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4015 seg
!= VCPU_SREG_LDTR
)
4017 kvm_seg
.unusable
= 1;
4019 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4023 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4024 struct tss_segment_32
*tss
)
4026 tss
->cr3
= vcpu
->arch
.cr3
;
4027 tss
->eip
= kvm_rip_read(vcpu
);
4028 tss
->eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4029 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4030 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4031 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4032 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4033 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4034 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4035 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4036 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4037 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4038 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4039 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4040 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4041 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4042 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4043 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4046 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4047 struct tss_segment_32
*tss
)
4049 kvm_set_cr3(vcpu
, tss
->cr3
);
4051 kvm_rip_write(vcpu
, tss
->eip
);
4052 kvm_x86_ops
->set_rflags(vcpu
, tss
->eflags
| 2);
4054 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4055 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4056 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4057 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4058 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4059 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4060 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4061 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4063 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4066 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4069 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4072 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4075 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4078 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4081 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4086 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4087 struct tss_segment_16
*tss
)
4089 tss
->ip
= kvm_rip_read(vcpu
);
4090 tss
->flag
= kvm_x86_ops
->get_rflags(vcpu
);
4091 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4092 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4093 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4094 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4095 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4096 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4097 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4098 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4100 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4101 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4102 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4103 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4104 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4105 tss
->prev_task_link
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4108 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4109 struct tss_segment_16
*tss
)
4111 kvm_rip_write(vcpu
, tss
->ip
);
4112 kvm_x86_ops
->set_rflags(vcpu
, tss
->flag
| 2);
4113 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4114 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4115 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4116 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4117 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4118 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4119 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4120 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4122 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4125 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4128 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4131 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4134 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4139 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4140 u16 old_tss_sel
, u32 old_tss_base
,
4141 struct desc_struct
*nseg_desc
)
4143 struct tss_segment_16 tss_segment_16
;
4146 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4147 sizeof tss_segment_16
))
4150 save_state_to_tss16(vcpu
, &tss_segment_16
);
4152 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4153 sizeof tss_segment_16
))
4156 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4157 &tss_segment_16
, sizeof tss_segment_16
))
4160 if (old_tss_sel
!= 0xffff) {
4161 tss_segment_16
.prev_task_link
= old_tss_sel
;
4163 if (kvm_write_guest(vcpu
->kvm
,
4164 get_tss_base_addr(vcpu
, nseg_desc
),
4165 &tss_segment_16
.prev_task_link
,
4166 sizeof tss_segment_16
.prev_task_link
))
4170 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4178 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4179 u16 old_tss_sel
, u32 old_tss_base
,
4180 struct desc_struct
*nseg_desc
)
4182 struct tss_segment_32 tss_segment_32
;
4185 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4186 sizeof tss_segment_32
))
4189 save_state_to_tss32(vcpu
, &tss_segment_32
);
4191 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4192 sizeof tss_segment_32
))
4195 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4196 &tss_segment_32
, sizeof tss_segment_32
))
4199 if (old_tss_sel
!= 0xffff) {
4200 tss_segment_32
.prev_task_link
= old_tss_sel
;
4202 if (kvm_write_guest(vcpu
->kvm
,
4203 get_tss_base_addr(vcpu
, nseg_desc
),
4204 &tss_segment_32
.prev_task_link
,
4205 sizeof tss_segment_32
.prev_task_link
))
4209 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4217 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4219 struct kvm_segment tr_seg
;
4220 struct desc_struct cseg_desc
;
4221 struct desc_struct nseg_desc
;
4223 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4224 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4226 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4228 /* FIXME: Handle errors. Failure to read either TSS or their
4229 * descriptors should generate a pagefault.
4231 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4234 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4237 if (reason
!= TASK_SWITCH_IRET
) {
4240 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4241 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4242 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4247 if (!nseg_desc
.p
|| (nseg_desc
.limit0
| nseg_desc
.limit
<< 16) < 0x67) {
4248 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4252 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4253 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4254 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4257 if (reason
== TASK_SWITCH_IRET
) {
4258 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4259 kvm_x86_ops
->set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4262 /* set back link to prev task only if NT bit is set in eflags
4263 note that old_tss_sel is not used afetr this point */
4264 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4265 old_tss_sel
= 0xffff;
4267 /* set back link to prev task only if NT bit is set in eflags
4268 note that old_tss_sel is not used afetr this point */
4269 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4270 old_tss_sel
= 0xffff;
4272 if (nseg_desc
.type
& 8)
4273 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4274 old_tss_base
, &nseg_desc
);
4276 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4277 old_tss_base
, &nseg_desc
);
4279 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4280 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4281 kvm_x86_ops
->set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4284 if (reason
!= TASK_SWITCH_IRET
) {
4285 nseg_desc
.type
|= (1 << 1);
4286 save_guest_segment_descriptor(vcpu
, tss_selector
,
4290 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4291 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4293 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4297 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4299 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4300 struct kvm_sregs
*sregs
)
4302 int mmu_reset_needed
= 0;
4303 int pending_vec
, max_bits
;
4304 struct descriptor_table dt
;
4308 dt
.limit
= sregs
->idt
.limit
;
4309 dt
.base
= sregs
->idt
.base
;
4310 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4311 dt
.limit
= sregs
->gdt
.limit
;
4312 dt
.base
= sregs
->gdt
.base
;
4313 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4315 vcpu
->arch
.cr2
= sregs
->cr2
;
4316 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4318 down_read(&vcpu
->kvm
->slots_lock
);
4319 if (gfn_to_memslot(vcpu
->kvm
, sregs
->cr3
>> PAGE_SHIFT
))
4320 vcpu
->arch
.cr3
= sregs
->cr3
;
4322 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
4323 up_read(&vcpu
->kvm
->slots_lock
);
4325 kvm_set_cr8(vcpu
, sregs
->cr8
);
4327 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4328 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4329 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4331 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4333 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4334 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4335 vcpu
->arch
.cr0
= sregs
->cr0
;
4337 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4338 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4339 if (!is_long_mode(vcpu
) && is_pae(vcpu
))
4340 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4342 if (mmu_reset_needed
)
4343 kvm_mmu_reset_context(vcpu
);
4345 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4346 pending_vec
= find_first_bit(
4347 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4348 if (pending_vec
< max_bits
) {
4349 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4350 pr_debug("Set back pending irq %d\n", pending_vec
);
4351 if (irqchip_in_kernel(vcpu
->kvm
))
4352 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4355 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4356 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4357 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4358 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4359 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4360 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4362 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4363 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4365 /* Older userspace won't unhalt the vcpu on reset. */
4366 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4367 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4368 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4369 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4376 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4377 struct kvm_guest_debug
*dbg
)
4383 if ((dbg
->control
& (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) ==
4384 (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) {
4385 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4386 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4387 vcpu
->arch
.switch_db_regs
=
4388 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4390 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4391 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4392 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4395 r
= kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4397 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4398 kvm_queue_exception(vcpu
, DB_VECTOR
);
4399 else if (dbg
->control
& KVM_GUESTDBG_INJECT_BP
)
4400 kvm_queue_exception(vcpu
, BP_VECTOR
);
4408 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4409 * we have asm/x86/processor.h
4420 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4421 #ifdef CONFIG_X86_64
4422 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4424 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4429 * Translate a guest virtual address to a guest physical address.
4431 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4432 struct kvm_translation
*tr
)
4434 unsigned long vaddr
= tr
->linear_address
;
4438 down_read(&vcpu
->kvm
->slots_lock
);
4439 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4440 up_read(&vcpu
->kvm
->slots_lock
);
4441 tr
->physical_address
= gpa
;
4442 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4450 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4452 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4456 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4457 fpu
->fcw
= fxsave
->cwd
;
4458 fpu
->fsw
= fxsave
->swd
;
4459 fpu
->ftwx
= fxsave
->twd
;
4460 fpu
->last_opcode
= fxsave
->fop
;
4461 fpu
->last_ip
= fxsave
->rip
;
4462 fpu
->last_dp
= fxsave
->rdp
;
4463 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4470 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4472 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4476 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4477 fxsave
->cwd
= fpu
->fcw
;
4478 fxsave
->swd
= fpu
->fsw
;
4479 fxsave
->twd
= fpu
->ftwx
;
4480 fxsave
->fop
= fpu
->last_opcode
;
4481 fxsave
->rip
= fpu
->last_ip
;
4482 fxsave
->rdp
= fpu
->last_dp
;
4483 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4490 void fx_init(struct kvm_vcpu
*vcpu
)
4492 unsigned after_mxcsr_mask
;
4495 * Touch the fpu the first time in non atomic context as if
4496 * this is the first fpu instruction the exception handler
4497 * will fire before the instruction returns and it'll have to
4498 * allocate ram with GFP_KERNEL.
4501 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4503 /* Initialize guest FPU by resetting ours and saving into guest's */
4505 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4507 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4508 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4511 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4512 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4513 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4514 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4515 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4517 EXPORT_SYMBOL_GPL(fx_init
);
4519 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4521 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4524 vcpu
->guest_fpu_loaded
= 1;
4525 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4526 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4528 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4530 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4532 if (!vcpu
->guest_fpu_loaded
)
4535 vcpu
->guest_fpu_loaded
= 0;
4536 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4537 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4538 ++vcpu
->stat
.fpu_reload
;
4540 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4542 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4544 if (vcpu
->arch
.time_page
) {
4545 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4546 vcpu
->arch
.time_page
= NULL
;
4549 kvm_x86_ops
->vcpu_free(vcpu
);
4552 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4555 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4558 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4562 /* We do fxsave: this must be aligned. */
4563 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4565 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4567 r
= kvm_arch_vcpu_reset(vcpu
);
4569 r
= kvm_mmu_setup(vcpu
);
4576 kvm_x86_ops
->vcpu_free(vcpu
);
4580 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4583 kvm_mmu_unload(vcpu
);
4586 kvm_x86_ops
->vcpu_free(vcpu
);
4589 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4591 vcpu
->arch
.nmi_pending
= false;
4592 vcpu
->arch
.nmi_injected
= false;
4594 vcpu
->arch
.switch_db_regs
= 0;
4595 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4596 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4597 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4599 return kvm_x86_ops
->vcpu_reset(vcpu
);
4602 void kvm_arch_hardware_enable(void *garbage
)
4604 kvm_x86_ops
->hardware_enable(garbage
);
4607 void kvm_arch_hardware_disable(void *garbage
)
4609 kvm_x86_ops
->hardware_disable(garbage
);
4612 int kvm_arch_hardware_setup(void)
4614 return kvm_x86_ops
->hardware_setup();
4617 void kvm_arch_hardware_unsetup(void)
4619 kvm_x86_ops
->hardware_unsetup();
4622 void kvm_arch_check_processor_compat(void *rtn
)
4624 kvm_x86_ops
->check_processor_compatibility(rtn
);
4627 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4633 BUG_ON(vcpu
->kvm
== NULL
);
4636 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4637 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
4638 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4640 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4642 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4647 vcpu
->arch
.pio_data
= page_address(page
);
4649 r
= kvm_mmu_create(vcpu
);
4651 goto fail_free_pio_data
;
4653 if (irqchip_in_kernel(kvm
)) {
4654 r
= kvm_create_lapic(vcpu
);
4656 goto fail_mmu_destroy
;
4659 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4661 if (!vcpu
->arch
.mce_banks
) {
4663 goto fail_mmu_destroy
;
4665 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4670 kvm_mmu_destroy(vcpu
);
4672 free_page((unsigned long)vcpu
->arch
.pio_data
);
4677 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4679 kvm_free_lapic(vcpu
);
4680 down_read(&vcpu
->kvm
->slots_lock
);
4681 kvm_mmu_destroy(vcpu
);
4682 up_read(&vcpu
->kvm
->slots_lock
);
4683 free_page((unsigned long)vcpu
->arch
.pio_data
);
4686 struct kvm
*kvm_arch_create_vm(void)
4688 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4691 return ERR_PTR(-ENOMEM
);
4693 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4694 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4696 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4697 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4699 rdtscll(kvm
->arch
.vm_init_tsc
);
4704 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4707 kvm_mmu_unload(vcpu
);
4711 static void kvm_free_vcpus(struct kvm
*kvm
)
4714 struct kvm_vcpu
*vcpu
;
4717 * Unpin any mmu pages first.
4719 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4720 kvm_unload_vcpu_mmu(vcpu
);
4721 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4722 kvm_arch_vcpu_free(vcpu
);
4724 mutex_lock(&kvm
->lock
);
4725 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
4726 kvm
->vcpus
[i
] = NULL
;
4728 atomic_set(&kvm
->online_vcpus
, 0);
4729 mutex_unlock(&kvm
->lock
);
4732 void kvm_arch_sync_events(struct kvm
*kvm
)
4734 kvm_free_all_assigned_devices(kvm
);
4737 void kvm_arch_destroy_vm(struct kvm
*kvm
)
4739 kvm_iommu_unmap_guest(kvm
);
4741 kfree(kvm
->arch
.vpic
);
4742 kfree(kvm
->arch
.vioapic
);
4743 kvm_free_vcpus(kvm
);
4744 kvm_free_physmem(kvm
);
4745 if (kvm
->arch
.apic_access_page
)
4746 put_page(kvm
->arch
.apic_access_page
);
4747 if (kvm
->arch
.ept_identity_pagetable
)
4748 put_page(kvm
->arch
.ept_identity_pagetable
);
4752 int kvm_arch_set_memory_region(struct kvm
*kvm
,
4753 struct kvm_userspace_memory_region
*mem
,
4754 struct kvm_memory_slot old
,
4757 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
4758 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
4760 /*To keep backward compatibility with older userspace,
4761 *x86 needs to hanlde !user_alloc case.
4764 if (npages
&& !old
.rmap
) {
4765 unsigned long userspace_addr
;
4767 down_write(¤t
->mm
->mmap_sem
);
4768 userspace_addr
= do_mmap(NULL
, 0,
4770 PROT_READ
| PROT_WRITE
,
4771 MAP_PRIVATE
| MAP_ANONYMOUS
,
4773 up_write(¤t
->mm
->mmap_sem
);
4775 if (IS_ERR((void *)userspace_addr
))
4776 return PTR_ERR((void *)userspace_addr
);
4778 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4779 spin_lock(&kvm
->mmu_lock
);
4780 memslot
->userspace_addr
= userspace_addr
;
4781 spin_unlock(&kvm
->mmu_lock
);
4783 if (!old
.user_alloc
&& old
.rmap
) {
4786 down_write(¤t
->mm
->mmap_sem
);
4787 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
4788 old
.npages
* PAGE_SIZE
);
4789 up_write(¤t
->mm
->mmap_sem
);
4792 "kvm_vm_ioctl_set_memory_region: "
4793 "failed to munmap memory\n");
4798 spin_lock(&kvm
->mmu_lock
);
4799 if (!kvm
->arch
.n_requested_mmu_pages
) {
4800 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
4801 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
4804 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
4805 spin_unlock(&kvm
->mmu_lock
);
4806 kvm_flush_remote_tlbs(kvm
);
4811 void kvm_arch_flush_shadow(struct kvm
*kvm
)
4813 kvm_mmu_zap_all(kvm
);
4814 kvm_reload_remote_mmus(kvm
);
4817 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
4819 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
4820 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
4821 || vcpu
->arch
.nmi_pending
;
4824 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
4827 int cpu
= vcpu
->cpu
;
4829 if (waitqueue_active(&vcpu
->wq
)) {
4830 wake_up_interruptible(&vcpu
->wq
);
4831 ++vcpu
->stat
.halt_wakeup
;
4835 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
4836 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
4837 smp_send_reschedule(cpu
);
4841 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
4843 return kvm_x86_ops
->interrupt_allowed(vcpu
);