2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
47 #define MAX_IO_MSRS 256
48 #define CR0_RESERVED_BITS \
49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
52 #define CR4_RESERVED_BITS \
53 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
54 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
55 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
56 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
58 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
60 #define KVM_MAX_MCE_BANKS 32
61 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
64 * - enable syscall per default because its emulated by KVM
65 * - enable LME and LMA per default on 64 bit KVM
68 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
70 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
73 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
74 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
76 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
77 struct kvm_cpuid_entry2 __user
*entries
);
78 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
79 u32 function
, u32 index
);
81 struct kvm_x86_ops
*kvm_x86_ops
;
82 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
84 struct kvm_stats_debugfs_item debugfs_entries
[] = {
85 { "pf_fixed", VCPU_STAT(pf_fixed
) },
86 { "pf_guest", VCPU_STAT(pf_guest
) },
87 { "tlb_flush", VCPU_STAT(tlb_flush
) },
88 { "invlpg", VCPU_STAT(invlpg
) },
89 { "exits", VCPU_STAT(exits
) },
90 { "io_exits", VCPU_STAT(io_exits
) },
91 { "mmio_exits", VCPU_STAT(mmio_exits
) },
92 { "signal_exits", VCPU_STAT(signal_exits
) },
93 { "irq_window", VCPU_STAT(irq_window_exits
) },
94 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
95 { "halt_exits", VCPU_STAT(halt_exits
) },
96 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
97 { "hypercalls", VCPU_STAT(hypercalls
) },
98 { "request_irq", VCPU_STAT(request_irq_exits
) },
99 { "irq_exits", VCPU_STAT(irq_exits
) },
100 { "host_state_reload", VCPU_STAT(host_state_reload
) },
101 { "efer_reload", VCPU_STAT(efer_reload
) },
102 { "fpu_reload", VCPU_STAT(fpu_reload
) },
103 { "insn_emulation", VCPU_STAT(insn_emulation
) },
104 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
105 { "irq_injections", VCPU_STAT(irq_injections
) },
106 { "nmi_injections", VCPU_STAT(nmi_injections
) },
107 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
108 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
109 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
110 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
111 { "mmu_flooded", VM_STAT(mmu_flooded
) },
112 { "mmu_recycled", VM_STAT(mmu_recycled
) },
113 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
114 { "mmu_unsync", VM_STAT(mmu_unsync
) },
115 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
116 { "largepages", VM_STAT(lpages
) },
120 unsigned long segment_base(u16 selector
)
122 struct descriptor_table gdt
;
123 struct desc_struct
*d
;
124 unsigned long table_base
;
130 asm("sgdt %0" : "=m"(gdt
));
131 table_base
= gdt
.base
;
133 if (selector
& 4) { /* from ldt */
136 asm("sldt %0" : "=g"(ldt_selector
));
137 table_base
= segment_base(ldt_selector
);
139 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
140 v
= d
->base0
| ((unsigned long)d
->base1
<< 16) |
141 ((unsigned long)d
->base2
<< 24);
143 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
144 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
148 EXPORT_SYMBOL_GPL(segment_base
);
150 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
152 if (irqchip_in_kernel(vcpu
->kvm
))
153 return vcpu
->arch
.apic_base
;
155 return vcpu
->arch
.apic_base
;
157 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
159 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
161 /* TODO: reserve bits check */
162 if (irqchip_in_kernel(vcpu
->kvm
))
163 kvm_lapic_set_base(vcpu
, data
);
165 vcpu
->arch
.apic_base
= data
;
167 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
169 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
171 WARN_ON(vcpu
->arch
.exception
.pending
);
172 vcpu
->arch
.exception
.pending
= true;
173 vcpu
->arch
.exception
.has_error_code
= false;
174 vcpu
->arch
.exception
.nr
= nr
;
176 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
178 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
181 ++vcpu
->stat
.pf_guest
;
183 if (vcpu
->arch
.exception
.pending
) {
184 if (vcpu
->arch
.exception
.nr
== PF_VECTOR
) {
185 printk(KERN_DEBUG
"kvm: inject_page_fault:"
186 " double fault 0x%lx\n", addr
);
187 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
188 vcpu
->arch
.exception
.error_code
= 0;
189 } else if (vcpu
->arch
.exception
.nr
== DF_VECTOR
) {
190 /* triple fault -> shutdown */
191 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
195 vcpu
->arch
.cr2
= addr
;
196 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
199 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
201 vcpu
->arch
.nmi_pending
= 1;
203 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
205 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
207 WARN_ON(vcpu
->arch
.exception
.pending
);
208 vcpu
->arch
.exception
.pending
= true;
209 vcpu
->arch
.exception
.has_error_code
= true;
210 vcpu
->arch
.exception
.nr
= nr
;
211 vcpu
->arch
.exception
.error_code
= error_code
;
213 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
215 static void __queue_exception(struct kvm_vcpu
*vcpu
)
217 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
218 vcpu
->arch
.exception
.has_error_code
,
219 vcpu
->arch
.exception
.error_code
);
223 * Load the pae pdptrs. Return true is they are all valid.
225 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
227 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
228 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
231 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
233 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
234 offset
* sizeof(u64
), sizeof(pdpte
));
239 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
240 if (is_present_pte(pdpte
[i
]) &&
241 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
248 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
253 EXPORT_SYMBOL_GPL(load_pdptrs
);
255 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
257 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
261 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
264 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
267 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
273 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
275 if (cr0
& CR0_RESERVED_BITS
) {
276 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
277 cr0
, vcpu
->arch
.cr0
);
278 kvm_inject_gp(vcpu
, 0);
282 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
283 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
284 kvm_inject_gp(vcpu
, 0);
288 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
289 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
290 "and a clear PE flag\n");
291 kvm_inject_gp(vcpu
, 0);
295 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
297 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
301 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
302 "in long mode while PAE is disabled\n");
303 kvm_inject_gp(vcpu
, 0);
306 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
308 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
309 "in long mode while CS.L == 1\n");
310 kvm_inject_gp(vcpu
, 0);
316 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
317 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
319 kvm_inject_gp(vcpu
, 0);
325 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
326 vcpu
->arch
.cr0
= cr0
;
328 kvm_mmu_reset_context(vcpu
);
331 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
333 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
335 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
336 KVMTRACE_1D(LMSW
, vcpu
,
337 (u32
)((vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f)),
340 EXPORT_SYMBOL_GPL(kvm_lmsw
);
342 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
344 unsigned long old_cr4
= vcpu
->arch
.cr4
;
345 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
347 if (cr4
& CR4_RESERVED_BITS
) {
348 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
349 kvm_inject_gp(vcpu
, 0);
353 if (is_long_mode(vcpu
)) {
354 if (!(cr4
& X86_CR4_PAE
)) {
355 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
357 kvm_inject_gp(vcpu
, 0);
360 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
361 && ((cr4
^ old_cr4
) & pdptr_bits
)
362 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
363 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
364 kvm_inject_gp(vcpu
, 0);
368 if (cr4
& X86_CR4_VMXE
) {
369 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
370 kvm_inject_gp(vcpu
, 0);
373 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
374 vcpu
->arch
.cr4
= cr4
;
375 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
376 kvm_mmu_reset_context(vcpu
);
378 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
380 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
382 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
383 kvm_mmu_sync_roots(vcpu
);
384 kvm_mmu_flush_tlb(vcpu
);
388 if (is_long_mode(vcpu
)) {
389 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
390 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
391 kvm_inject_gp(vcpu
, 0);
396 if (cr3
& CR3_PAE_RESERVED_BITS
) {
398 "set_cr3: #GP, reserved bits\n");
399 kvm_inject_gp(vcpu
, 0);
402 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
403 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
405 kvm_inject_gp(vcpu
, 0);
410 * We don't check reserved bits in nonpae mode, because
411 * this isn't enforced, and VMware depends on this.
416 * Does the new cr3 value map to physical memory? (Note, we
417 * catch an invalid cr3 even in real-mode, because it would
418 * cause trouble later on when we turn on paging anyway.)
420 * A real CPU would silently accept an invalid cr3 and would
421 * attempt to use it - with largely undefined (and often hard
422 * to debug) behavior on the guest side.
424 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
425 kvm_inject_gp(vcpu
, 0);
427 vcpu
->arch
.cr3
= cr3
;
428 vcpu
->arch
.mmu
.new_cr3(vcpu
);
431 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
433 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
435 if (cr8
& CR8_RESERVED_BITS
) {
436 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
437 kvm_inject_gp(vcpu
, 0);
440 if (irqchip_in_kernel(vcpu
->kvm
))
441 kvm_lapic_set_tpr(vcpu
, cr8
);
443 vcpu
->arch
.cr8
= cr8
;
445 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
447 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
449 if (irqchip_in_kernel(vcpu
->kvm
))
450 return kvm_lapic_get_cr8(vcpu
);
452 return vcpu
->arch
.cr8
;
454 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
456 static inline u32
bit(int bitno
)
458 return 1 << (bitno
& 31);
462 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
463 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
465 * This list is modified at module load time to reflect the
466 * capabilities of the host cpu.
468 static u32 msrs_to_save
[] = {
469 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
472 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
474 MSR_IA32_TSC
, MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
475 MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
478 static unsigned num_msrs_to_save
;
480 static u32 emulated_msrs
[] = {
481 MSR_IA32_MISC_ENABLE
,
484 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
486 if (efer
& efer_reserved_bits
) {
487 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
489 kvm_inject_gp(vcpu
, 0);
494 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
495 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
496 kvm_inject_gp(vcpu
, 0);
500 if (efer
& EFER_FFXSR
) {
501 struct kvm_cpuid_entry2
*feat
;
503 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
504 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
505 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
506 kvm_inject_gp(vcpu
, 0);
511 if (efer
& EFER_SVME
) {
512 struct kvm_cpuid_entry2
*feat
;
514 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
515 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
516 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
517 kvm_inject_gp(vcpu
, 0);
522 kvm_x86_ops
->set_efer(vcpu
, efer
);
525 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
527 vcpu
->arch
.shadow_efer
= efer
;
529 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
530 kvm_mmu_reset_context(vcpu
);
533 void kvm_enable_efer_bits(u64 mask
)
535 efer_reserved_bits
&= ~mask
;
537 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
541 * Writes msr value into into the appropriate "register".
542 * Returns 0 on success, non-0 otherwise.
543 * Assumes vcpu_load() was already called.
545 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
547 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
551 * Adapt set_msr() to msr_io()'s calling convention
553 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
555 return kvm_set_msr(vcpu
, index
, *data
);
558 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
561 struct pvclock_wall_clock wc
;
562 struct timespec now
, sys
, boot
;
569 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
572 * The guest calculates current wall clock time by adding
573 * system time (updated by kvm_write_guest_time below) to the
574 * wall clock specified here. guest system time equals host
575 * system time for us, thus we must fill in host boot time here.
577 now
= current_kernel_time();
579 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
581 wc
.sec
= boot
.tv_sec
;
582 wc
.nsec
= boot
.tv_nsec
;
583 wc
.version
= version
;
585 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
588 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
591 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
593 uint32_t quotient
, remainder
;
595 /* Don't try to replace with do_div(), this one calculates
596 * "(dividend << 32) / divisor" */
598 : "=a" (quotient
), "=d" (remainder
)
599 : "0" (0), "1" (dividend
), "r" (divisor
) );
603 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
605 uint64_t nsecs
= 1000000000LL;
610 tps64
= tsc_khz
* 1000LL;
611 while (tps64
> nsecs
*2) {
616 tps32
= (uint32_t)tps64
;
617 while (tps32
<= (uint32_t)nsecs
) {
622 hv_clock
->tsc_shift
= shift
;
623 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
625 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
626 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
627 hv_clock
->tsc_to_system_mul
);
630 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
632 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
636 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
638 unsigned long this_tsc_khz
;
640 if ((!vcpu
->time_page
))
643 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
644 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
645 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
646 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
648 put_cpu_var(cpu_tsc_khz
);
650 /* Keep irq disabled to prevent changes to the clock */
651 local_irq_save(flags
);
652 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
654 local_irq_restore(flags
);
656 /* With all the info we got, fill in the values */
658 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
659 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
);
661 * The interface expects us to write an even number signaling that the
662 * update is finished. Since the guest won't see the intermediate
663 * state, we just increase by 2 at the end.
665 vcpu
->hv_clock
.version
+= 2;
667 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
669 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
670 sizeof(vcpu
->hv_clock
));
672 kunmap_atomic(shared_kaddr
, KM_USER0
);
674 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
677 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
679 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
681 if (!vcpu
->time_page
)
683 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
687 static bool msr_mtrr_valid(unsigned msr
)
690 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
691 case MSR_MTRRfix64K_00000
:
692 case MSR_MTRRfix16K_80000
:
693 case MSR_MTRRfix16K_A0000
:
694 case MSR_MTRRfix4K_C0000
:
695 case MSR_MTRRfix4K_C8000
:
696 case MSR_MTRRfix4K_D0000
:
697 case MSR_MTRRfix4K_D8000
:
698 case MSR_MTRRfix4K_E0000
:
699 case MSR_MTRRfix4K_E8000
:
700 case MSR_MTRRfix4K_F0000
:
701 case MSR_MTRRfix4K_F8000
:
702 case MSR_MTRRdefType
:
703 case MSR_IA32_CR_PAT
:
711 static bool valid_pat_type(unsigned t
)
713 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
716 static bool valid_mtrr_type(unsigned t
)
718 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
721 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
725 if (!msr_mtrr_valid(msr
))
728 if (msr
== MSR_IA32_CR_PAT
) {
729 for (i
= 0; i
< 8; i
++)
730 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
733 } else if (msr
== MSR_MTRRdefType
) {
736 return valid_mtrr_type(data
& 0xff);
737 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
738 for (i
= 0; i
< 8 ; i
++)
739 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
745 return valid_mtrr_type(data
& 0xff);
748 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
750 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
752 if (!mtrr_valid(vcpu
, msr
, data
))
755 if (msr
== MSR_MTRRdefType
) {
756 vcpu
->arch
.mtrr_state
.def_type
= data
;
757 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
758 } else if (msr
== MSR_MTRRfix64K_00000
)
760 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
761 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
762 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
763 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
764 else if (msr
== MSR_IA32_CR_PAT
)
765 vcpu
->arch
.pat
= data
;
766 else { /* Variable MTRRs */
767 int idx
, is_mtrr_mask
;
770 idx
= (msr
- 0x200) / 2;
771 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
774 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
777 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
781 kvm_mmu_reset_context(vcpu
);
785 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
787 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
788 unsigned bank_num
= mcg_cap
& 0xff;
791 case MSR_IA32_MCG_STATUS
:
792 vcpu
->arch
.mcg_status
= data
;
794 case MSR_IA32_MCG_CTL
:
795 if (!(mcg_cap
& MCG_CTL_P
))
797 if (data
!= 0 && data
!= ~(u64
)0)
799 vcpu
->arch
.mcg_ctl
= data
;
802 if (msr
>= MSR_IA32_MC0_CTL
&&
803 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
804 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
805 /* only 0 or all 1s can be written to IA32_MCi_CTL */
806 if ((offset
& 0x3) == 0 &&
807 data
!= 0 && data
!= ~(u64
)0)
809 vcpu
->arch
.mce_banks
[offset
] = data
;
817 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
821 set_efer(vcpu
, data
);
823 case MSR_IA32_DEBUGCTLMSR
:
825 /* We support the non-activated case already */
827 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
828 /* Values other than LBR and BTF are vendor-specific,
829 thus reserved and should throw a #GP */
832 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
835 case MSR_IA32_UCODE_REV
:
836 case MSR_IA32_UCODE_WRITE
:
837 case MSR_VM_HSAVE_PA
:
839 case 0x200 ... 0x2ff:
840 return set_msr_mtrr(vcpu
, msr
, data
);
841 case MSR_IA32_APICBASE
:
842 kvm_set_apic_base(vcpu
, data
);
844 case MSR_IA32_MISC_ENABLE
:
845 vcpu
->arch
.ia32_misc_enable_msr
= data
;
847 case MSR_KVM_WALL_CLOCK
:
848 vcpu
->kvm
->arch
.wall_clock
= data
;
849 kvm_write_wall_clock(vcpu
->kvm
, data
);
851 case MSR_KVM_SYSTEM_TIME
: {
852 if (vcpu
->arch
.time_page
) {
853 kvm_release_page_dirty(vcpu
->arch
.time_page
);
854 vcpu
->arch
.time_page
= NULL
;
857 vcpu
->arch
.time
= data
;
859 /* we verify if the enable bit is set... */
863 /* ...but clean it before doing the actual write */
864 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
866 vcpu
->arch
.time_page
=
867 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
869 if (is_error_page(vcpu
->arch
.time_page
)) {
870 kvm_release_page_clean(vcpu
->arch
.time_page
);
871 vcpu
->arch
.time_page
= NULL
;
874 kvm_request_guest_time_update(vcpu
);
877 case MSR_IA32_MCG_CTL
:
878 case MSR_IA32_MCG_STATUS
:
879 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
880 return set_msr_mce(vcpu
, msr
, data
);
882 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n", msr
, data
);
887 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
891 * Reads an msr value (of 'msr_index') into 'pdata'.
892 * Returns 0 on success, non-0 otherwise.
893 * Assumes vcpu_load() was already called.
895 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
897 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
900 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
902 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
904 if (!msr_mtrr_valid(msr
))
907 if (msr
== MSR_MTRRdefType
)
908 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
909 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
910 else if (msr
== MSR_MTRRfix64K_00000
)
912 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
913 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
914 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
915 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
916 else if (msr
== MSR_IA32_CR_PAT
)
917 *pdata
= vcpu
->arch
.pat
;
918 else { /* Variable MTRRs */
919 int idx
, is_mtrr_mask
;
922 idx
= (msr
- 0x200) / 2;
923 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
926 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
929 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
936 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
939 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
940 unsigned bank_num
= mcg_cap
& 0xff;
943 case MSR_IA32_P5_MC_ADDR
:
944 case MSR_IA32_P5_MC_TYPE
:
947 case MSR_IA32_MCG_CAP
:
948 data
= vcpu
->arch
.mcg_cap
;
950 case MSR_IA32_MCG_CTL
:
951 if (!(mcg_cap
& MCG_CTL_P
))
953 data
= vcpu
->arch
.mcg_ctl
;
955 case MSR_IA32_MCG_STATUS
:
956 data
= vcpu
->arch
.mcg_status
;
959 if (msr
>= MSR_IA32_MC0_CTL
&&
960 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
961 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
962 data
= vcpu
->arch
.mce_banks
[offset
];
971 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
976 case 0xc0010010: /* SYSCFG */
977 case 0xc0010015: /* HWCR */
978 case MSR_IA32_PLATFORM_ID
:
979 case MSR_IA32_UCODE_REV
:
980 case MSR_IA32_EBL_CR_POWERON
:
981 case MSR_IA32_DEBUGCTLMSR
:
982 case MSR_IA32_LASTBRANCHFROMIP
:
983 case MSR_IA32_LASTBRANCHTOIP
:
984 case MSR_IA32_LASTINTFROMIP
:
985 case MSR_IA32_LASTINTTOIP
:
986 case MSR_VM_HSAVE_PA
:
987 case MSR_P6_EVNTSEL0
:
988 case MSR_P6_EVNTSEL1
:
989 case MSR_K7_EVNTSEL0
:
993 data
= 0x500 | KVM_NR_VAR_MTRR
;
995 case 0x200 ... 0x2ff:
996 return get_msr_mtrr(vcpu
, msr
, pdata
);
997 case 0xcd: /* fsb frequency */
1000 case MSR_IA32_APICBASE
:
1001 data
= kvm_get_apic_base(vcpu
);
1003 case MSR_IA32_MISC_ENABLE
:
1004 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1006 case MSR_IA32_PERF_STATUS
:
1007 /* TSC increment by tick */
1009 /* CPU multiplier */
1010 data
|= (((uint64_t)4ULL) << 40);
1013 data
= vcpu
->arch
.shadow_efer
;
1015 case MSR_KVM_WALL_CLOCK
:
1016 data
= vcpu
->kvm
->arch
.wall_clock
;
1018 case MSR_KVM_SYSTEM_TIME
:
1019 data
= vcpu
->arch
.time
;
1021 case MSR_IA32_P5_MC_ADDR
:
1022 case MSR_IA32_P5_MC_TYPE
:
1023 case MSR_IA32_MCG_CAP
:
1024 case MSR_IA32_MCG_CTL
:
1025 case MSR_IA32_MCG_STATUS
:
1026 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1027 return get_msr_mce(vcpu
, msr
, pdata
);
1029 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1035 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1038 * Read or write a bunch of msrs. All parameters are kernel addresses.
1040 * @return number of msrs set successfully.
1042 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1043 struct kvm_msr_entry
*entries
,
1044 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1045 unsigned index
, u64
*data
))
1051 down_read(&vcpu
->kvm
->slots_lock
);
1052 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1053 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1055 up_read(&vcpu
->kvm
->slots_lock
);
1063 * Read or write a bunch of msrs. Parameters are user addresses.
1065 * @return number of msrs set successfully.
1067 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1068 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1069 unsigned index
, u64
*data
),
1072 struct kvm_msrs msrs
;
1073 struct kvm_msr_entry
*entries
;
1078 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1082 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1086 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1087 entries
= vmalloc(size
);
1092 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1095 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1100 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1111 int kvm_dev_ioctl_check_extension(long ext
)
1116 case KVM_CAP_IRQCHIP
:
1118 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1119 case KVM_CAP_SET_TSS_ADDR
:
1120 case KVM_CAP_EXT_CPUID
:
1121 case KVM_CAP_CLOCKSOURCE
:
1123 case KVM_CAP_NOP_IO_DELAY
:
1124 case KVM_CAP_MP_STATE
:
1125 case KVM_CAP_SYNC_MMU
:
1126 case KVM_CAP_REINJECT_CONTROL
:
1127 case KVM_CAP_IRQ_INJECT_STATUS
:
1128 case KVM_CAP_ASSIGN_DEV_IRQ
:
1131 case KVM_CAP_COALESCED_MMIO
:
1132 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1135 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1137 case KVM_CAP_NR_VCPUS
:
1140 case KVM_CAP_NR_MEMSLOTS
:
1141 r
= KVM_MEMORY_SLOTS
;
1143 case KVM_CAP_PV_MMU
:
1150 r
= KVM_MAX_MCE_BANKS
;
1160 long kvm_arch_dev_ioctl(struct file
*filp
,
1161 unsigned int ioctl
, unsigned long arg
)
1163 void __user
*argp
= (void __user
*)arg
;
1167 case KVM_GET_MSR_INDEX_LIST
: {
1168 struct kvm_msr_list __user
*user_msr_list
= argp
;
1169 struct kvm_msr_list msr_list
;
1173 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1176 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1177 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1180 if (n
< msr_list
.nmsrs
)
1183 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1184 num_msrs_to_save
* sizeof(u32
)))
1186 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1188 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1193 case KVM_GET_SUPPORTED_CPUID
: {
1194 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1195 struct kvm_cpuid2 cpuid
;
1198 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1200 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1201 cpuid_arg
->entries
);
1206 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1211 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1214 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1216 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1228 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1230 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1231 kvm_request_guest_time_update(vcpu
);
1234 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1236 kvm_x86_ops
->vcpu_put(vcpu
);
1237 kvm_put_guest_fpu(vcpu
);
1240 static int is_efer_nx(void)
1242 unsigned long long efer
= 0;
1244 rdmsrl_safe(MSR_EFER
, &efer
);
1245 return efer
& EFER_NX
;
1248 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1251 struct kvm_cpuid_entry2
*e
, *entry
;
1254 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1255 e
= &vcpu
->arch
.cpuid_entries
[i
];
1256 if (e
->function
== 0x80000001) {
1261 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1262 entry
->edx
&= ~(1 << 20);
1263 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1267 /* when an old userspace process fills a new kernel module */
1268 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1269 struct kvm_cpuid
*cpuid
,
1270 struct kvm_cpuid_entry __user
*entries
)
1273 struct kvm_cpuid_entry
*cpuid_entries
;
1276 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1279 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1283 if (copy_from_user(cpuid_entries
, entries
,
1284 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1286 for (i
= 0; i
< cpuid
->nent
; i
++) {
1287 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1288 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1289 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1290 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1291 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1292 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1293 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1294 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1295 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1296 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1298 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1299 cpuid_fix_nx_cap(vcpu
);
1303 vfree(cpuid_entries
);
1308 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1309 struct kvm_cpuid2
*cpuid
,
1310 struct kvm_cpuid_entry2 __user
*entries
)
1315 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1318 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1319 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1321 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1328 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1329 struct kvm_cpuid2
*cpuid
,
1330 struct kvm_cpuid_entry2 __user
*entries
)
1335 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1338 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1339 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1344 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1348 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1351 entry
->function
= function
;
1352 entry
->index
= index
;
1353 cpuid_count(entry
->function
, entry
->index
,
1354 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1358 #define F(x) bit(X86_FEATURE_##x)
1360 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1361 u32 index
, int *nent
, int maxnent
)
1363 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1364 #ifdef CONFIG_X86_64
1365 unsigned f_lm
= F(LM
);
1371 const u32 kvm_supported_word0_x86_features
=
1372 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1373 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1374 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1375 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1376 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1377 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1378 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1379 0 /* HTT, TM, Reserved, PBE */;
1380 /* cpuid 0x80000001.edx */
1381 const u32 kvm_supported_word1_x86_features
=
1382 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1383 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1384 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1385 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1386 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1387 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1388 F(FXSR
) | F(FXSR_OPT
) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1389 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1391 const u32 kvm_supported_word4_x86_features
=
1392 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1393 0 /* DS-CPL, VMX, SMX, EST */ |
1394 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1395 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1396 0 /* Reserved, DCA */ | F(XMM4_1
) |
1397 F(XMM4_2
) | 0 /* x2APIC */ | F(MOVBE
) | F(POPCNT
) |
1398 0 /* Reserved, XSAVE, OSXSAVE */;
1399 /* cpuid 0x80000001.ecx */
1400 const u32 kvm_supported_word6_x86_features
=
1401 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1402 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1403 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1404 0 /* SKINIT */ | 0 /* WDT */;
1406 /* all calls to cpuid_count() should be made on the same cpu */
1408 do_cpuid_1_ent(entry
, function
, index
);
1413 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1416 entry
->edx
&= kvm_supported_word0_x86_features
;
1417 entry
->ecx
&= kvm_supported_word4_x86_features
;
1419 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1420 * may return different values. This forces us to get_cpu() before
1421 * issuing the first command, and also to emulate this annoying behavior
1422 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1424 int t
, times
= entry
->eax
& 0xff;
1426 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1427 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1428 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1429 do_cpuid_1_ent(&entry
[t
], function
, 0);
1430 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1435 /* function 4 and 0xb have additional index. */
1439 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1440 /* read more entries until cache_type is zero */
1441 for (i
= 1; *nent
< maxnent
; ++i
) {
1442 cache_type
= entry
[i
- 1].eax
& 0x1f;
1445 do_cpuid_1_ent(&entry
[i
], function
, i
);
1447 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1455 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1456 /* read more entries until level_type is zero */
1457 for (i
= 1; *nent
< maxnent
; ++i
) {
1458 level_type
= entry
[i
- 1].ecx
& 0xff00;
1461 do_cpuid_1_ent(&entry
[i
], function
, i
);
1463 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1469 entry
->eax
= min(entry
->eax
, 0x8000001a);
1472 entry
->edx
&= kvm_supported_word1_x86_features
;
1473 entry
->ecx
&= kvm_supported_word6_x86_features
;
1481 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1482 struct kvm_cpuid_entry2 __user
*entries
)
1484 struct kvm_cpuid_entry2
*cpuid_entries
;
1485 int limit
, nent
= 0, r
= -E2BIG
;
1488 if (cpuid
->nent
< 1)
1491 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1495 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1496 limit
= cpuid_entries
[0].eax
;
1497 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1498 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1499 &nent
, cpuid
->nent
);
1501 if (nent
>= cpuid
->nent
)
1504 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1505 limit
= cpuid_entries
[nent
- 1].eax
;
1506 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1507 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1508 &nent
, cpuid
->nent
);
1510 if (copy_to_user(entries
, cpuid_entries
,
1511 nent
* sizeof(struct kvm_cpuid_entry2
)))
1517 vfree(cpuid_entries
);
1522 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1523 struct kvm_lapic_state
*s
)
1526 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1532 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1533 struct kvm_lapic_state
*s
)
1536 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1537 kvm_apic_post_state_restore(vcpu
);
1543 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1544 struct kvm_interrupt
*irq
)
1546 if (irq
->irq
< 0 || irq
->irq
>= 256)
1548 if (irqchip_in_kernel(vcpu
->kvm
))
1552 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1559 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1562 kvm_inject_nmi(vcpu
);
1568 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1569 struct kvm_tpr_access_ctl
*tac
)
1573 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1577 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1581 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1586 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1589 vcpu
->arch
.mcg_cap
= mcg_cap
;
1590 /* Init IA32_MCG_CTL to all 1s */
1591 if (mcg_cap
& MCG_CTL_P
)
1592 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1593 /* Init IA32_MCi_CTL to all 1s */
1594 for (bank
= 0; bank
< bank_num
; bank
++)
1595 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1600 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1601 struct kvm_x86_mce
*mce
)
1603 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1604 unsigned bank_num
= mcg_cap
& 0xff;
1605 u64
*banks
= vcpu
->arch
.mce_banks
;
1607 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1610 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1611 * reporting is disabled
1613 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1614 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1616 banks
+= 4 * mce
->bank
;
1618 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1619 * reporting is disabled for the bank
1621 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1623 if (mce
->status
& MCI_STATUS_UC
) {
1624 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1625 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1626 printk(KERN_DEBUG
"kvm: set_mce: "
1627 "injects mce exception while "
1628 "previous one is in progress!\n");
1629 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1632 if (banks
[1] & MCI_STATUS_VAL
)
1633 mce
->status
|= MCI_STATUS_OVER
;
1634 banks
[2] = mce
->addr
;
1635 banks
[3] = mce
->misc
;
1636 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1637 banks
[1] = mce
->status
;
1638 kvm_queue_exception(vcpu
, MC_VECTOR
);
1639 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1640 || !(banks
[1] & MCI_STATUS_UC
)) {
1641 if (banks
[1] & MCI_STATUS_VAL
)
1642 mce
->status
|= MCI_STATUS_OVER
;
1643 banks
[2] = mce
->addr
;
1644 banks
[3] = mce
->misc
;
1645 banks
[1] = mce
->status
;
1647 banks
[1] |= MCI_STATUS_OVER
;
1651 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1652 unsigned int ioctl
, unsigned long arg
)
1654 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1655 void __user
*argp
= (void __user
*)arg
;
1657 struct kvm_lapic_state
*lapic
= NULL
;
1660 case KVM_GET_LAPIC
: {
1661 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1666 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1670 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1675 case KVM_SET_LAPIC
: {
1676 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1681 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1683 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1689 case KVM_INTERRUPT
: {
1690 struct kvm_interrupt irq
;
1693 if (copy_from_user(&irq
, argp
, sizeof irq
))
1695 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1702 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1708 case KVM_SET_CPUID
: {
1709 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1710 struct kvm_cpuid cpuid
;
1713 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1715 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1720 case KVM_SET_CPUID2
: {
1721 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1722 struct kvm_cpuid2 cpuid
;
1725 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1727 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1728 cpuid_arg
->entries
);
1733 case KVM_GET_CPUID2
: {
1734 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1735 struct kvm_cpuid2 cpuid
;
1738 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1740 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1741 cpuid_arg
->entries
);
1745 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1751 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1754 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1756 case KVM_TPR_ACCESS_REPORTING
: {
1757 struct kvm_tpr_access_ctl tac
;
1760 if (copy_from_user(&tac
, argp
, sizeof tac
))
1762 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
1766 if (copy_to_user(argp
, &tac
, sizeof tac
))
1771 case KVM_SET_VAPIC_ADDR
: {
1772 struct kvm_vapic_addr va
;
1775 if (!irqchip_in_kernel(vcpu
->kvm
))
1778 if (copy_from_user(&va
, argp
, sizeof va
))
1781 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
1784 case KVM_X86_SETUP_MCE
: {
1788 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
1790 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
1793 case KVM_X86_SET_MCE
: {
1794 struct kvm_x86_mce mce
;
1797 if (copy_from_user(&mce
, argp
, sizeof mce
))
1799 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
1810 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
1814 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
1816 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
1820 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
1821 u32 kvm_nr_mmu_pages
)
1823 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
1826 down_write(&kvm
->slots_lock
);
1827 spin_lock(&kvm
->mmu_lock
);
1829 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
1830 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
1832 spin_unlock(&kvm
->mmu_lock
);
1833 up_write(&kvm
->slots_lock
);
1837 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
1839 return kvm
->arch
.n_alloc_mmu_pages
;
1842 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
1845 struct kvm_mem_alias
*alias
;
1847 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
1848 alias
= &kvm
->arch
.aliases
[i
];
1849 if (gfn
>= alias
->base_gfn
1850 && gfn
< alias
->base_gfn
+ alias
->npages
)
1851 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
1857 * Set a new alias region. Aliases map a portion of physical memory into
1858 * another portion. This is useful for memory windows, for example the PC
1861 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
1862 struct kvm_memory_alias
*alias
)
1865 struct kvm_mem_alias
*p
;
1868 /* General sanity checks */
1869 if (alias
->memory_size
& (PAGE_SIZE
- 1))
1871 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
1873 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
1875 if (alias
->guest_phys_addr
+ alias
->memory_size
1876 < alias
->guest_phys_addr
)
1878 if (alias
->target_phys_addr
+ alias
->memory_size
1879 < alias
->target_phys_addr
)
1882 down_write(&kvm
->slots_lock
);
1883 spin_lock(&kvm
->mmu_lock
);
1885 p
= &kvm
->arch
.aliases
[alias
->slot
];
1886 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
1887 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
1888 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
1890 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
1891 if (kvm
->arch
.aliases
[n
- 1].npages
)
1893 kvm
->arch
.naliases
= n
;
1895 spin_unlock(&kvm
->mmu_lock
);
1896 kvm_mmu_zap_all(kvm
);
1898 up_write(&kvm
->slots_lock
);
1906 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
1911 switch (chip
->chip_id
) {
1912 case KVM_IRQCHIP_PIC_MASTER
:
1913 memcpy(&chip
->chip
.pic
,
1914 &pic_irqchip(kvm
)->pics
[0],
1915 sizeof(struct kvm_pic_state
));
1917 case KVM_IRQCHIP_PIC_SLAVE
:
1918 memcpy(&chip
->chip
.pic
,
1919 &pic_irqchip(kvm
)->pics
[1],
1920 sizeof(struct kvm_pic_state
));
1922 case KVM_IRQCHIP_IOAPIC
:
1923 memcpy(&chip
->chip
.ioapic
,
1924 ioapic_irqchip(kvm
),
1925 sizeof(struct kvm_ioapic_state
));
1934 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
1939 switch (chip
->chip_id
) {
1940 case KVM_IRQCHIP_PIC_MASTER
:
1941 memcpy(&pic_irqchip(kvm
)->pics
[0],
1943 sizeof(struct kvm_pic_state
));
1945 case KVM_IRQCHIP_PIC_SLAVE
:
1946 memcpy(&pic_irqchip(kvm
)->pics
[1],
1948 sizeof(struct kvm_pic_state
));
1950 case KVM_IRQCHIP_IOAPIC
:
1951 memcpy(ioapic_irqchip(kvm
),
1953 sizeof(struct kvm_ioapic_state
));
1959 kvm_pic_update_irq(pic_irqchip(kvm
));
1963 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
1967 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
1971 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
1975 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
1976 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
);
1980 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
1981 struct kvm_reinject_control
*control
)
1983 if (!kvm
->arch
.vpit
)
1985 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
1990 * Get (and clear) the dirty memory log for a memory slot.
1992 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
1993 struct kvm_dirty_log
*log
)
1997 struct kvm_memory_slot
*memslot
;
2000 down_write(&kvm
->slots_lock
);
2002 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2006 /* If nothing is dirty, don't bother messing with page tables. */
2008 spin_lock(&kvm
->mmu_lock
);
2009 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2010 spin_unlock(&kvm
->mmu_lock
);
2011 kvm_flush_remote_tlbs(kvm
);
2012 memslot
= &kvm
->memslots
[log
->slot
];
2013 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2014 memset(memslot
->dirty_bitmap
, 0, n
);
2018 up_write(&kvm
->slots_lock
);
2022 long kvm_arch_vm_ioctl(struct file
*filp
,
2023 unsigned int ioctl
, unsigned long arg
)
2025 struct kvm
*kvm
= filp
->private_data
;
2026 void __user
*argp
= (void __user
*)arg
;
2029 * This union makes it completely explicit to gcc-3.x
2030 * that these two variables' stack usage should be
2031 * combined, not added together.
2034 struct kvm_pit_state ps
;
2035 struct kvm_memory_alias alias
;
2039 case KVM_SET_TSS_ADDR
:
2040 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2044 case KVM_SET_MEMORY_REGION
: {
2045 struct kvm_memory_region kvm_mem
;
2046 struct kvm_userspace_memory_region kvm_userspace_mem
;
2049 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2051 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2052 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2053 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2054 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2055 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2060 case KVM_SET_NR_MMU_PAGES
:
2061 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2065 case KVM_GET_NR_MMU_PAGES
:
2066 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2068 case KVM_SET_MEMORY_ALIAS
:
2070 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2072 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2076 case KVM_CREATE_IRQCHIP
:
2078 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2079 if (kvm
->arch
.vpic
) {
2080 r
= kvm_ioapic_init(kvm
);
2082 kfree(kvm
->arch
.vpic
);
2083 kvm
->arch
.vpic
= NULL
;
2088 r
= kvm_setup_default_irq_routing(kvm
);
2090 kfree(kvm
->arch
.vpic
);
2091 kfree(kvm
->arch
.vioapic
);
2095 case KVM_CREATE_PIT
:
2096 mutex_lock(&kvm
->lock
);
2099 goto create_pit_unlock
;
2101 kvm
->arch
.vpit
= kvm_create_pit(kvm
);
2105 mutex_unlock(&kvm
->lock
);
2107 case KVM_IRQ_LINE_STATUS
:
2108 case KVM_IRQ_LINE
: {
2109 struct kvm_irq_level irq_event
;
2112 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2114 if (irqchip_in_kernel(kvm
)) {
2116 mutex_lock(&kvm
->lock
);
2117 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2118 irq_event
.irq
, irq_event
.level
);
2119 mutex_unlock(&kvm
->lock
);
2120 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2121 irq_event
.status
= status
;
2122 if (copy_to_user(argp
, &irq_event
,
2130 case KVM_GET_IRQCHIP
: {
2131 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2132 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2138 if (copy_from_user(chip
, argp
, sizeof *chip
))
2139 goto get_irqchip_out
;
2141 if (!irqchip_in_kernel(kvm
))
2142 goto get_irqchip_out
;
2143 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2145 goto get_irqchip_out
;
2147 if (copy_to_user(argp
, chip
, sizeof *chip
))
2148 goto get_irqchip_out
;
2156 case KVM_SET_IRQCHIP
: {
2157 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2158 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2164 if (copy_from_user(chip
, argp
, sizeof *chip
))
2165 goto set_irqchip_out
;
2167 if (!irqchip_in_kernel(kvm
))
2168 goto set_irqchip_out
;
2169 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2171 goto set_irqchip_out
;
2181 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2184 if (!kvm
->arch
.vpit
)
2186 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2190 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2197 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2200 if (!kvm
->arch
.vpit
)
2202 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2208 case KVM_REINJECT_CONTROL
: {
2209 struct kvm_reinject_control control
;
2211 if (copy_from_user(&control
, argp
, sizeof(control
)))
2213 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2226 static void kvm_init_msr_list(void)
2231 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2232 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2235 msrs_to_save
[j
] = msrs_to_save
[i
];
2238 num_msrs_to_save
= j
;
2242 * Only apic need an MMIO device hook, so shortcut now..
2244 static struct kvm_io_device
*vcpu_find_pervcpu_dev(struct kvm_vcpu
*vcpu
,
2245 gpa_t addr
, int len
,
2248 struct kvm_io_device
*dev
;
2250 if (vcpu
->arch
.apic
) {
2251 dev
= &vcpu
->arch
.apic
->dev
;
2252 if (dev
->in_range(dev
, addr
, len
, is_write
))
2259 static struct kvm_io_device
*vcpu_find_mmio_dev(struct kvm_vcpu
*vcpu
,
2260 gpa_t addr
, int len
,
2263 struct kvm_io_device
*dev
;
2265 dev
= vcpu_find_pervcpu_dev(vcpu
, addr
, len
, is_write
);
2267 dev
= kvm_io_bus_find_dev(&vcpu
->kvm
->mmio_bus
, addr
, len
,
2272 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2273 struct kvm_vcpu
*vcpu
)
2276 int r
= X86EMUL_CONTINUE
;
2279 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2280 unsigned offset
= addr
& (PAGE_SIZE
-1);
2281 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2284 if (gpa
== UNMAPPED_GVA
) {
2285 r
= X86EMUL_PROPAGATE_FAULT
;
2288 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2290 r
= X86EMUL_UNHANDLEABLE
;
2302 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2303 struct kvm_vcpu
*vcpu
)
2306 int r
= X86EMUL_CONTINUE
;
2309 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2310 unsigned offset
= addr
& (PAGE_SIZE
-1);
2311 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2314 if (gpa
== UNMAPPED_GVA
) {
2315 r
= X86EMUL_PROPAGATE_FAULT
;
2318 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2320 r
= X86EMUL_UNHANDLEABLE
;
2333 static int emulator_read_emulated(unsigned long addr
,
2336 struct kvm_vcpu
*vcpu
)
2338 struct kvm_io_device
*mmio_dev
;
2341 if (vcpu
->mmio_read_completed
) {
2342 memcpy(val
, vcpu
->mmio_data
, bytes
);
2343 vcpu
->mmio_read_completed
= 0;
2344 return X86EMUL_CONTINUE
;
2347 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2349 /* For APIC access vmexit */
2350 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2353 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2354 == X86EMUL_CONTINUE
)
2355 return X86EMUL_CONTINUE
;
2356 if (gpa
== UNMAPPED_GVA
)
2357 return X86EMUL_PROPAGATE_FAULT
;
2361 * Is this MMIO handled locally?
2363 mutex_lock(&vcpu
->kvm
->lock
);
2364 mmio_dev
= vcpu_find_mmio_dev(vcpu
, gpa
, bytes
, 0);
2366 kvm_iodevice_read(mmio_dev
, gpa
, bytes
, val
);
2367 mutex_unlock(&vcpu
->kvm
->lock
);
2368 return X86EMUL_CONTINUE
;
2370 mutex_unlock(&vcpu
->kvm
->lock
);
2372 vcpu
->mmio_needed
= 1;
2373 vcpu
->mmio_phys_addr
= gpa
;
2374 vcpu
->mmio_size
= bytes
;
2375 vcpu
->mmio_is_write
= 0;
2377 return X86EMUL_UNHANDLEABLE
;
2380 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2381 const void *val
, int bytes
)
2385 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2388 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2392 static int emulator_write_emulated_onepage(unsigned long addr
,
2395 struct kvm_vcpu
*vcpu
)
2397 struct kvm_io_device
*mmio_dev
;
2400 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2402 if (gpa
== UNMAPPED_GVA
) {
2403 kvm_inject_page_fault(vcpu
, addr
, 2);
2404 return X86EMUL_PROPAGATE_FAULT
;
2407 /* For APIC access vmexit */
2408 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2411 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2412 return X86EMUL_CONTINUE
;
2416 * Is this MMIO handled locally?
2418 mutex_lock(&vcpu
->kvm
->lock
);
2419 mmio_dev
= vcpu_find_mmio_dev(vcpu
, gpa
, bytes
, 1);
2421 kvm_iodevice_write(mmio_dev
, gpa
, bytes
, val
);
2422 mutex_unlock(&vcpu
->kvm
->lock
);
2423 return X86EMUL_CONTINUE
;
2425 mutex_unlock(&vcpu
->kvm
->lock
);
2427 vcpu
->mmio_needed
= 1;
2428 vcpu
->mmio_phys_addr
= gpa
;
2429 vcpu
->mmio_size
= bytes
;
2430 vcpu
->mmio_is_write
= 1;
2431 memcpy(vcpu
->mmio_data
, val
, bytes
);
2433 return X86EMUL_CONTINUE
;
2436 int emulator_write_emulated(unsigned long addr
,
2439 struct kvm_vcpu
*vcpu
)
2441 /* Crossing a page boundary? */
2442 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2445 now
= -addr
& ~PAGE_MASK
;
2446 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2447 if (rc
!= X86EMUL_CONTINUE
)
2453 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2455 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2457 static int emulator_cmpxchg_emulated(unsigned long addr
,
2461 struct kvm_vcpu
*vcpu
)
2463 static int reported
;
2467 printk(KERN_WARNING
"kvm: emulating exchange as write\n");
2469 #ifndef CONFIG_X86_64
2470 /* guests cmpxchg8b have to be emulated atomically */
2477 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2479 if (gpa
== UNMAPPED_GVA
||
2480 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2483 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2488 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2490 kaddr
= kmap_atomic(page
, KM_USER0
);
2491 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2492 kunmap_atomic(kaddr
, KM_USER0
);
2493 kvm_release_page_dirty(page
);
2498 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2501 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2503 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2506 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2508 kvm_mmu_invlpg(vcpu
, address
);
2509 return X86EMUL_CONTINUE
;
2512 int emulate_clts(struct kvm_vcpu
*vcpu
)
2514 KVMTRACE_0D(CLTS
, vcpu
, handler
);
2515 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2516 return X86EMUL_CONTINUE
;
2519 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2521 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2525 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2526 return X86EMUL_CONTINUE
;
2528 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2529 return X86EMUL_UNHANDLEABLE
;
2533 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2535 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2538 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2540 /* FIXME: better handling */
2541 return X86EMUL_UNHANDLEABLE
;
2543 return X86EMUL_CONTINUE
;
2546 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2549 unsigned long rip
= kvm_rip_read(vcpu
);
2550 unsigned long rip_linear
;
2552 if (!printk_ratelimit())
2555 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2557 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2559 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2560 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2562 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2564 static struct x86_emulate_ops emulate_ops
= {
2565 .read_std
= kvm_read_guest_virt
,
2566 .read_emulated
= emulator_read_emulated
,
2567 .write_emulated
= emulator_write_emulated
,
2568 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2571 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2573 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2574 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2575 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2576 vcpu
->arch
.regs_dirty
= ~0;
2579 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2580 struct kvm_run
*run
,
2586 struct decode_cache
*c
;
2588 kvm_clear_exception_queue(vcpu
);
2589 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2591 * TODO: fix x86_emulate.c to use guest_read/write_register
2592 * instead of direct ->regs accesses, can save hundred cycles
2593 * on Intel for instructions that don't read/change RSP, for
2596 cache_all_regs(vcpu
);
2598 vcpu
->mmio_is_write
= 0;
2599 vcpu
->arch
.pio
.string
= 0;
2601 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2603 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2605 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2606 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
2607 vcpu
->arch
.emulate_ctxt
.mode
=
2608 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2609 ? X86EMUL_MODE_REAL
: cs_l
2610 ? X86EMUL_MODE_PROT64
: cs_db
2611 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2613 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2615 /* Reject the instructions other than VMCALL/VMMCALL when
2616 * try to emulate invalid opcode */
2617 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2618 if ((emulation_type
& EMULTYPE_TRAP_UD
) &&
2619 (!(c
->twobyte
&& c
->b
== 0x01 &&
2620 (c
->modrm_reg
== 0 || c
->modrm_reg
== 3) &&
2621 c
->modrm_mod
== 3 && c
->modrm_rm
== 1)))
2622 return EMULATE_FAIL
;
2624 ++vcpu
->stat
.insn_emulation
;
2626 ++vcpu
->stat
.insn_emulation_fail
;
2627 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2628 return EMULATE_DONE
;
2629 return EMULATE_FAIL
;
2633 if (emulation_type
& EMULTYPE_SKIP
) {
2634 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
2635 return EMULATE_DONE
;
2638 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2639 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
2642 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
2644 if (vcpu
->arch
.pio
.string
)
2645 return EMULATE_DO_MMIO
;
2647 if ((r
|| vcpu
->mmio_is_write
) && run
) {
2648 run
->exit_reason
= KVM_EXIT_MMIO
;
2649 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
2650 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
2651 run
->mmio
.len
= vcpu
->mmio_size
;
2652 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
2656 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2657 return EMULATE_DONE
;
2658 if (!vcpu
->mmio_needed
) {
2659 kvm_report_emulation_failure(vcpu
, "mmio");
2660 return EMULATE_FAIL
;
2662 return EMULATE_DO_MMIO
;
2665 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
2667 if (vcpu
->mmio_is_write
) {
2668 vcpu
->mmio_needed
= 0;
2669 return EMULATE_DO_MMIO
;
2672 return EMULATE_DONE
;
2674 EXPORT_SYMBOL_GPL(emulate_instruction
);
2676 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
2678 void *p
= vcpu
->arch
.pio_data
;
2679 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
2683 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
2684 if (vcpu
->arch
.pio
.in
)
2685 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
2687 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
2691 int complete_pio(struct kvm_vcpu
*vcpu
)
2693 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2700 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2701 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
2702 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
2706 r
= pio_copy_data(vcpu
);
2713 delta
*= io
->cur_count
;
2715 * The size of the register should really depend on
2716 * current address size.
2718 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
2720 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
2726 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
2728 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
2730 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
2732 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
2736 io
->count
-= io
->cur_count
;
2742 static void kernel_pio(struct kvm_io_device
*pio_dev
,
2743 struct kvm_vcpu
*vcpu
,
2746 /* TODO: String I/O for in kernel device */
2748 mutex_lock(&vcpu
->kvm
->lock
);
2749 if (vcpu
->arch
.pio
.in
)
2750 kvm_iodevice_read(pio_dev
, vcpu
->arch
.pio
.port
,
2751 vcpu
->arch
.pio
.size
,
2754 kvm_iodevice_write(pio_dev
, vcpu
->arch
.pio
.port
,
2755 vcpu
->arch
.pio
.size
,
2757 mutex_unlock(&vcpu
->kvm
->lock
);
2760 static void pio_string_write(struct kvm_io_device
*pio_dev
,
2761 struct kvm_vcpu
*vcpu
)
2763 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2764 void *pd
= vcpu
->arch
.pio_data
;
2767 mutex_lock(&vcpu
->kvm
->lock
);
2768 for (i
= 0; i
< io
->cur_count
; i
++) {
2769 kvm_iodevice_write(pio_dev
, io
->port
,
2774 mutex_unlock(&vcpu
->kvm
->lock
);
2777 static struct kvm_io_device
*vcpu_find_pio_dev(struct kvm_vcpu
*vcpu
,
2778 gpa_t addr
, int len
,
2781 return kvm_io_bus_find_dev(&vcpu
->kvm
->pio_bus
, addr
, len
, is_write
);
2784 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2785 int size
, unsigned port
)
2787 struct kvm_io_device
*pio_dev
;
2790 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2791 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2792 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2793 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2794 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
2795 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2796 vcpu
->arch
.pio
.in
= in
;
2797 vcpu
->arch
.pio
.string
= 0;
2798 vcpu
->arch
.pio
.down
= 0;
2799 vcpu
->arch
.pio
.rep
= 0;
2801 if (vcpu
->run
->io
.direction
== KVM_EXIT_IO_IN
)
2802 KVMTRACE_2D(IO_READ
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2805 KVMTRACE_2D(IO_WRITE
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2808 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2809 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
2811 pio_dev
= vcpu_find_pio_dev(vcpu
, port
, size
, !in
);
2813 kernel_pio(pio_dev
, vcpu
, vcpu
->arch
.pio_data
);
2819 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
2821 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2822 int size
, unsigned long count
, int down
,
2823 gva_t address
, int rep
, unsigned port
)
2825 unsigned now
, in_page
;
2827 struct kvm_io_device
*pio_dev
;
2829 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2830 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2831 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2832 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2833 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
2834 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2835 vcpu
->arch
.pio
.in
= in
;
2836 vcpu
->arch
.pio
.string
= 1;
2837 vcpu
->arch
.pio
.down
= down
;
2838 vcpu
->arch
.pio
.rep
= rep
;
2840 if (vcpu
->run
->io
.direction
== KVM_EXIT_IO_IN
)
2841 KVMTRACE_2D(IO_READ
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2844 KVMTRACE_2D(IO_WRITE
, vcpu
, vcpu
->run
->io
.port
, (u32
)size
,
2848 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
2853 in_page
= PAGE_SIZE
- offset_in_page(address
);
2855 in_page
= offset_in_page(address
) + size
;
2856 now
= min(count
, (unsigned long)in_page
/ size
);
2861 * String I/O in reverse. Yuck. Kill the guest, fix later.
2863 pr_unimpl(vcpu
, "guest string pio down\n");
2864 kvm_inject_gp(vcpu
, 0);
2867 vcpu
->run
->io
.count
= now
;
2868 vcpu
->arch
.pio
.cur_count
= now
;
2870 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
2871 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
2873 vcpu
->arch
.pio
.guest_gva
= address
;
2875 pio_dev
= vcpu_find_pio_dev(vcpu
, port
,
2876 vcpu
->arch
.pio
.cur_count
,
2877 !vcpu
->arch
.pio
.in
);
2878 if (!vcpu
->arch
.pio
.in
) {
2879 /* string PIO write */
2880 ret
= pio_copy_data(vcpu
);
2881 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
2882 kvm_inject_gp(vcpu
, 0);
2885 if (ret
== 0 && pio_dev
) {
2886 pio_string_write(pio_dev
, vcpu
);
2888 if (vcpu
->arch
.pio
.count
== 0)
2892 pr_unimpl(vcpu
, "no string pio read support yet, "
2893 "port %x size %d count %ld\n",
2898 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
2900 static void bounce_off(void *info
)
2905 static unsigned int ref_freq
;
2906 static unsigned long tsc_khz_ref
;
2908 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
2911 struct cpufreq_freqs
*freq
= data
;
2913 struct kvm_vcpu
*vcpu
;
2914 int i
, send_ipi
= 0;
2917 ref_freq
= freq
->old
;
2919 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
2921 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
2923 per_cpu(cpu_tsc_khz
, freq
->cpu
) = cpufreq_scale(tsc_khz_ref
, ref_freq
, freq
->new);
2925 spin_lock(&kvm_lock
);
2926 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
2927 for (i
= 0; i
< KVM_MAX_VCPUS
; ++i
) {
2928 vcpu
= kvm
->vcpus
[i
];
2931 if (vcpu
->cpu
!= freq
->cpu
)
2933 if (!kvm_request_guest_time_update(vcpu
))
2935 if (vcpu
->cpu
!= smp_processor_id())
2939 spin_unlock(&kvm_lock
);
2941 if (freq
->old
< freq
->new && send_ipi
) {
2943 * We upscale the frequency. Must make the guest
2944 * doesn't see old kvmclock values while running with
2945 * the new frequency, otherwise we risk the guest sees
2946 * time go backwards.
2948 * In case we update the frequency for another cpu
2949 * (which might be in guest context) send an interrupt
2950 * to kick the cpu out of guest context. Next time
2951 * guest context is entered kvmclock will be updated,
2952 * so the guest will not see stale values.
2954 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
2959 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
2960 .notifier_call
= kvmclock_cpufreq_notifier
2963 int kvm_arch_init(void *opaque
)
2966 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
2969 printk(KERN_ERR
"kvm: already loaded the other module\n");
2974 if (!ops
->cpu_has_kvm_support()) {
2975 printk(KERN_ERR
"kvm: no hardware support\n");
2979 if (ops
->disabled_by_bios()) {
2980 printk(KERN_ERR
"kvm: disabled by bios\n");
2985 r
= kvm_mmu_module_init();
2989 kvm_init_msr_list();
2992 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2993 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
2994 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
2995 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
2997 for_each_possible_cpu(cpu
)
2998 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
2999 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3000 tsc_khz_ref
= tsc_khz
;
3001 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3002 CPUFREQ_TRANSITION_NOTIFIER
);
3011 void kvm_arch_exit(void)
3013 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3014 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3015 CPUFREQ_TRANSITION_NOTIFIER
);
3017 kvm_mmu_module_exit();
3020 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3022 ++vcpu
->stat
.halt_exits
;
3023 KVMTRACE_0D(HLT
, vcpu
, handler
);
3024 if (irqchip_in_kernel(vcpu
->kvm
)) {
3025 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3028 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3032 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3034 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3037 if (is_long_mode(vcpu
))
3040 return a0
| ((gpa_t
)a1
<< 32);
3043 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3045 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3048 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3049 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3050 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3051 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3052 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3054 KVMTRACE_1D(VMMCALL
, vcpu
, (u32
)nr
, handler
);
3056 if (!is_long_mode(vcpu
)) {
3065 case KVM_HC_VAPIC_POLL_IRQ
:
3069 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3075 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3076 ++vcpu
->stat
.hypercalls
;
3079 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3081 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3083 char instruction
[3];
3085 unsigned long rip
= kvm_rip_read(vcpu
);
3089 * Blow out the MMU to ensure that no other VCPU has an active mapping
3090 * to ensure that the updated hypercall appears atomically across all
3093 kvm_mmu_zap_all(vcpu
->kvm
);
3095 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3096 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3097 != X86EMUL_CONTINUE
)
3103 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3105 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3108 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3110 struct descriptor_table dt
= { limit
, base
};
3112 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3115 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3117 struct descriptor_table dt
= { limit
, base
};
3119 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3122 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3123 unsigned long *rflags
)
3125 kvm_lmsw(vcpu
, msw
);
3126 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3129 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3131 unsigned long value
;
3133 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3136 value
= vcpu
->arch
.cr0
;
3139 value
= vcpu
->arch
.cr2
;
3142 value
= vcpu
->arch
.cr3
;
3145 value
= vcpu
->arch
.cr4
;
3148 value
= kvm_get_cr8(vcpu
);
3151 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3154 KVMTRACE_3D(CR_READ
, vcpu
, (u32
)cr
, (u32
)value
,
3155 (u32
)((u64
)value
>> 32), handler
);
3160 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3161 unsigned long *rflags
)
3163 KVMTRACE_3D(CR_WRITE
, vcpu
, (u32
)cr
, (u32
)val
,
3164 (u32
)((u64
)val
>> 32), handler
);
3168 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3169 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3172 vcpu
->arch
.cr2
= val
;
3175 kvm_set_cr3(vcpu
, val
);
3178 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3181 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3184 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3188 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3190 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3191 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3193 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3194 /* when no next entry is found, the current entry[i] is reselected */
3195 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3196 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3197 if (ej
->function
== e
->function
) {
3198 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3202 return 0; /* silence gcc, even though control never reaches here */
3205 /* find an entry with matching function, matching index (if needed), and that
3206 * should be read next (if it's stateful) */
3207 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3208 u32 function
, u32 index
)
3210 if (e
->function
!= function
)
3212 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3214 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3215 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3220 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3221 u32 function
, u32 index
)
3224 struct kvm_cpuid_entry2
*best
= NULL
;
3226 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3227 struct kvm_cpuid_entry2
*e
;
3229 e
= &vcpu
->arch
.cpuid_entries
[i
];
3230 if (is_matching_cpuid_entry(e
, function
, index
)) {
3231 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3232 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3237 * Both basic or both extended?
3239 if (((e
->function
^ function
) & 0x80000000) == 0)
3240 if (!best
|| e
->function
> best
->function
)
3246 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3248 struct kvm_cpuid_entry2
*best
;
3250 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3252 return best
->eax
& 0xff;
3256 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3258 u32 function
, index
;
3259 struct kvm_cpuid_entry2
*best
;
3261 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3262 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3263 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3264 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3265 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3266 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3267 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3269 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3270 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3271 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3272 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3274 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3275 KVMTRACE_5D(CPUID
, vcpu
, function
,
3276 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3277 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3278 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3279 (u32
)kvm_register_read(vcpu
, VCPU_REGS_RDX
), handler
);
3281 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3284 * Check if userspace requested an interrupt window, and that the
3285 * interrupt window is open.
3287 * No need to exit to userspace if we already have an interrupt queued.
3289 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
3290 struct kvm_run
*kvm_run
)
3292 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3293 kvm_run
->request_interrupt_window
&&
3294 kvm_arch_interrupt_allowed(vcpu
));
3297 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
3298 struct kvm_run
*kvm_run
)
3300 kvm_run
->if_flag
= (kvm_x86_ops
->get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3301 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3302 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3303 if (irqchip_in_kernel(vcpu
->kvm
))
3304 kvm_run
->ready_for_interrupt_injection
= 1;
3306 kvm_run
->ready_for_interrupt_injection
=
3307 kvm_arch_interrupt_allowed(vcpu
) &&
3308 !kvm_cpu_has_interrupt(vcpu
) &&
3309 !kvm_event_needs_reinjection(vcpu
);
3312 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3314 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3317 if (!apic
|| !apic
->vapic_addr
)
3320 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3322 vcpu
->arch
.apic
->vapic_page
= page
;
3325 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3327 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3329 if (!apic
|| !apic
->vapic_addr
)
3332 down_read(&vcpu
->kvm
->slots_lock
);
3333 kvm_release_page_dirty(apic
->vapic_page
);
3334 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3335 up_read(&vcpu
->kvm
->slots_lock
);
3338 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3342 if (!kvm_x86_ops
->update_cr8_intercept
)
3345 if (!vcpu
->arch
.apic
->vapic_addr
)
3346 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3353 tpr
= kvm_lapic_get_cr8(vcpu
);
3355 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3358 static void inject_pending_irq(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3360 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
3361 kvm_x86_ops
->set_interrupt_shadow(vcpu
, 0);
3363 /* try to reinject previous events if any */
3364 if (vcpu
->arch
.nmi_injected
) {
3365 kvm_x86_ops
->set_nmi(vcpu
);
3369 if (vcpu
->arch
.interrupt
.pending
) {
3370 kvm_x86_ops
->set_irq(vcpu
);
3374 /* try to inject new event if pending */
3375 if (vcpu
->arch
.nmi_pending
) {
3376 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3377 vcpu
->arch
.nmi_pending
= false;
3378 vcpu
->arch
.nmi_injected
= true;
3379 kvm_x86_ops
->set_nmi(vcpu
);
3381 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3382 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3383 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3385 kvm_x86_ops
->set_irq(vcpu
);
3390 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3393 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3394 kvm_run
->request_interrupt_window
;
3397 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3398 kvm_mmu_unload(vcpu
);
3400 r
= kvm_mmu_reload(vcpu
);
3404 if (vcpu
->requests
) {
3405 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3406 __kvm_migrate_timers(vcpu
);
3407 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3408 kvm_write_guest_time(vcpu
);
3409 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3410 kvm_mmu_sync_roots(vcpu
);
3411 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3412 kvm_x86_ops
->tlb_flush(vcpu
);
3413 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3415 kvm_run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3419 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3420 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3428 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3429 kvm_load_guest_fpu(vcpu
);
3431 local_irq_disable();
3433 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3434 smp_mb__after_clear_bit();
3436 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3443 if (vcpu
->arch
.exception
.pending
)
3444 __queue_exception(vcpu
);
3446 inject_pending_irq(vcpu
, kvm_run
);
3448 /* enable NMI/IRQ window open exits if needed */
3449 if (vcpu
->arch
.nmi_pending
)
3450 kvm_x86_ops
->enable_nmi_window(vcpu
);
3451 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3452 kvm_x86_ops
->enable_irq_window(vcpu
);
3454 if (kvm_lapic_enabled(vcpu
)) {
3455 update_cr8_intercept(vcpu
);
3456 kvm_lapic_sync_to_vapic(vcpu
);
3459 up_read(&vcpu
->kvm
->slots_lock
);
3463 get_debugreg(vcpu
->arch
.host_dr6
, 6);
3464 get_debugreg(vcpu
->arch
.host_dr7
, 7);
3465 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3466 get_debugreg(vcpu
->arch
.host_db
[0], 0);
3467 get_debugreg(vcpu
->arch
.host_db
[1], 1);
3468 get_debugreg(vcpu
->arch
.host_db
[2], 2);
3469 get_debugreg(vcpu
->arch
.host_db
[3], 3);
3472 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3473 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3474 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3475 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3478 KVMTRACE_0D(VMENTRY
, vcpu
, entryexit
);
3479 kvm_x86_ops
->run(vcpu
, kvm_run
);
3481 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3483 set_debugreg(vcpu
->arch
.host_db
[0], 0);
3484 set_debugreg(vcpu
->arch
.host_db
[1], 1);
3485 set_debugreg(vcpu
->arch
.host_db
[2], 2);
3486 set_debugreg(vcpu
->arch
.host_db
[3], 3);
3488 set_debugreg(vcpu
->arch
.host_dr6
, 6);
3489 set_debugreg(vcpu
->arch
.host_dr7
, 7);
3491 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3497 * We must have an instruction between local_irq_enable() and
3498 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3499 * the interrupt shadow. The stat.exits increment will do nicely.
3500 * But we need to prevent reordering, hence this barrier():
3508 down_read(&vcpu
->kvm
->slots_lock
);
3511 * Profile KVM exit RIPs:
3513 if (unlikely(prof_on
== KVM_PROFILING
)) {
3514 unsigned long rip
= kvm_rip_read(vcpu
);
3515 profile_hit(KVM_PROFILING
, (void *)rip
);
3519 kvm_lapic_sync_from_vapic(vcpu
);
3521 r
= kvm_x86_ops
->handle_exit(kvm_run
, vcpu
);
3527 static int __vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3531 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3532 pr_debug("vcpu %d received sipi with vector # %x\n",
3533 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3534 kvm_lapic_reset(vcpu
);
3535 r
= kvm_arch_vcpu_reset(vcpu
);
3538 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3541 down_read(&vcpu
->kvm
->slots_lock
);
3546 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3547 r
= vcpu_enter_guest(vcpu
, kvm_run
);
3549 up_read(&vcpu
->kvm
->slots_lock
);
3550 kvm_vcpu_block(vcpu
);
3551 down_read(&vcpu
->kvm
->slots_lock
);
3552 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3554 switch(vcpu
->arch
.mp_state
) {
3555 case KVM_MP_STATE_HALTED
:
3556 vcpu
->arch
.mp_state
=
3557 KVM_MP_STATE_RUNNABLE
;
3558 case KVM_MP_STATE_RUNNABLE
:
3560 case KVM_MP_STATE_SIPI_RECEIVED
:
3571 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3572 if (kvm_cpu_has_pending_timer(vcpu
))
3573 kvm_inject_pending_timer_irqs(vcpu
);
3575 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
3577 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3578 ++vcpu
->stat
.request_irq_exits
;
3580 if (signal_pending(current
)) {
3582 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3583 ++vcpu
->stat
.signal_exits
;
3585 if (need_resched()) {
3586 up_read(&vcpu
->kvm
->slots_lock
);
3588 down_read(&vcpu
->kvm
->slots_lock
);
3592 up_read(&vcpu
->kvm
->slots_lock
);
3593 post_kvm_run_save(vcpu
, kvm_run
);
3600 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3607 if (vcpu
->sigset_active
)
3608 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3610 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3611 kvm_vcpu_block(vcpu
);
3612 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3617 /* re-sync apic's tpr */
3618 if (!irqchip_in_kernel(vcpu
->kvm
))
3619 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3621 if (vcpu
->arch
.pio
.cur_count
) {
3622 r
= complete_pio(vcpu
);
3626 #if CONFIG_HAS_IOMEM
3627 if (vcpu
->mmio_needed
) {
3628 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3629 vcpu
->mmio_read_completed
= 1;
3630 vcpu
->mmio_needed
= 0;
3632 down_read(&vcpu
->kvm
->slots_lock
);
3633 r
= emulate_instruction(vcpu
, kvm_run
,
3634 vcpu
->arch
.mmio_fault_cr2
, 0,
3635 EMULTYPE_NO_DECODE
);
3636 up_read(&vcpu
->kvm
->slots_lock
);
3637 if (r
== EMULATE_DO_MMIO
) {
3639 * Read-modify-write. Back to userspace.
3646 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3647 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3648 kvm_run
->hypercall
.ret
);
3650 r
= __vcpu_run(vcpu
, kvm_run
);
3653 if (vcpu
->sigset_active
)
3654 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3660 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3664 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3665 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3666 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3667 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3668 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3669 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3670 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3671 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3672 #ifdef CONFIG_X86_64
3673 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3674 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
3675 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
3676 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
3677 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
3678 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
3679 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
3680 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
3683 regs
->rip
= kvm_rip_read(vcpu
);
3684 regs
->rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3687 * Don't leak debug flags in case they were set for guest debugging
3689 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
3690 regs
->rflags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
3697 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3701 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
3702 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
3703 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
3704 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
3705 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
3706 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
3707 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
3708 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
3709 #ifdef CONFIG_X86_64
3710 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
3711 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
3712 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
3713 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
3714 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
3715 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
3716 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
3717 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
3721 kvm_rip_write(vcpu
, regs
->rip
);
3722 kvm_x86_ops
->set_rflags(vcpu
, regs
->rflags
);
3725 vcpu
->arch
.exception
.pending
= false;
3732 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3733 struct kvm_segment
*var
, int seg
)
3735 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3738 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
3740 struct kvm_segment cs
;
3742 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
3746 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
3748 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
3749 struct kvm_sregs
*sregs
)
3751 struct descriptor_table dt
;
3755 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
3756 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
3757 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
3758 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
3759 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
3760 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
3762 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
3763 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
3765 kvm_x86_ops
->get_idt(vcpu
, &dt
);
3766 sregs
->idt
.limit
= dt
.limit
;
3767 sregs
->idt
.base
= dt
.base
;
3768 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
3769 sregs
->gdt
.limit
= dt
.limit
;
3770 sregs
->gdt
.base
= dt
.base
;
3772 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3773 sregs
->cr0
= vcpu
->arch
.cr0
;
3774 sregs
->cr2
= vcpu
->arch
.cr2
;
3775 sregs
->cr3
= vcpu
->arch
.cr3
;
3776 sregs
->cr4
= vcpu
->arch
.cr4
;
3777 sregs
->cr8
= kvm_get_cr8(vcpu
);
3778 sregs
->efer
= vcpu
->arch
.shadow_efer
;
3779 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
3781 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
3783 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
3784 set_bit(vcpu
->arch
.interrupt
.nr
,
3785 (unsigned long *)sregs
->interrupt_bitmap
);
3792 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
3793 struct kvm_mp_state
*mp_state
)
3796 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
3801 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
3802 struct kvm_mp_state
*mp_state
)
3805 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
3810 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3811 struct kvm_segment
*var
, int seg
)
3813 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3816 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
3817 struct kvm_segment
*kvm_desct
)
3819 kvm_desct
->base
= seg_desc
->base0
;
3820 kvm_desct
->base
|= seg_desc
->base1
<< 16;
3821 kvm_desct
->base
|= seg_desc
->base2
<< 24;
3822 kvm_desct
->limit
= seg_desc
->limit0
;
3823 kvm_desct
->limit
|= seg_desc
->limit
<< 16;
3825 kvm_desct
->limit
<<= 12;
3826 kvm_desct
->limit
|= 0xfff;
3828 kvm_desct
->selector
= selector
;
3829 kvm_desct
->type
= seg_desc
->type
;
3830 kvm_desct
->present
= seg_desc
->p
;
3831 kvm_desct
->dpl
= seg_desc
->dpl
;
3832 kvm_desct
->db
= seg_desc
->d
;
3833 kvm_desct
->s
= seg_desc
->s
;
3834 kvm_desct
->l
= seg_desc
->l
;
3835 kvm_desct
->g
= seg_desc
->g
;
3836 kvm_desct
->avl
= seg_desc
->avl
;
3838 kvm_desct
->unusable
= 1;
3840 kvm_desct
->unusable
= 0;
3841 kvm_desct
->padding
= 0;
3844 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
3846 struct descriptor_table
*dtable
)
3848 if (selector
& 1 << 2) {
3849 struct kvm_segment kvm_seg
;
3851 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
3853 if (kvm_seg
.unusable
)
3856 dtable
->limit
= kvm_seg
.limit
;
3857 dtable
->base
= kvm_seg
.base
;
3860 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
3863 /* allowed just for 8 bytes segments */
3864 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
3865 struct desc_struct
*seg_desc
)
3868 struct descriptor_table dtable
;
3869 u16 index
= selector
>> 3;
3871 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
3873 if (dtable
.limit
< index
* 8 + 7) {
3874 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
3877 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
3879 return kvm_read_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
3882 /* allowed just for 8 bytes segments */
3883 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
3884 struct desc_struct
*seg_desc
)
3887 struct descriptor_table dtable
;
3888 u16 index
= selector
>> 3;
3890 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
3892 if (dtable
.limit
< index
* 8 + 7)
3894 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
3896 return kvm_write_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
3899 static u32
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
3900 struct desc_struct
*seg_desc
)
3904 base_addr
= seg_desc
->base0
;
3905 base_addr
|= (seg_desc
->base1
<< 16);
3906 base_addr
|= (seg_desc
->base2
<< 24);
3908 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
3911 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
3913 struct kvm_segment kvm_seg
;
3915 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
3916 return kvm_seg
.selector
;
3919 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
3921 struct kvm_segment
*kvm_seg
)
3923 struct desc_struct seg_desc
;
3925 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
3927 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
3931 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
3933 struct kvm_segment segvar
= {
3934 .base
= selector
<< 4,
3936 .selector
= selector
,
3947 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
3951 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
3952 int type_bits
, int seg
)
3954 struct kvm_segment kvm_seg
;
3956 if (!(vcpu
->arch
.cr0
& X86_CR0_PE
))
3957 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
3958 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
3960 kvm_seg
.type
|= type_bits
;
3962 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
3963 seg
!= VCPU_SREG_LDTR
)
3965 kvm_seg
.unusable
= 1;
3967 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
3971 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
3972 struct tss_segment_32
*tss
)
3974 tss
->cr3
= vcpu
->arch
.cr3
;
3975 tss
->eip
= kvm_rip_read(vcpu
);
3976 tss
->eflags
= kvm_x86_ops
->get_rflags(vcpu
);
3977 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3978 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3979 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3980 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3981 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3982 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3983 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3984 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3985 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
3986 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
3987 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
3988 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
3989 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
3990 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
3991 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
3994 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
3995 struct tss_segment_32
*tss
)
3997 kvm_set_cr3(vcpu
, tss
->cr3
);
3999 kvm_rip_write(vcpu
, tss
->eip
);
4000 kvm_x86_ops
->set_rflags(vcpu
, tss
->eflags
| 2);
4002 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4003 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4004 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4005 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4006 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4007 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4008 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4009 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4011 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4014 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4017 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4020 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4023 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4026 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4029 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4034 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4035 struct tss_segment_16
*tss
)
4037 tss
->ip
= kvm_rip_read(vcpu
);
4038 tss
->flag
= kvm_x86_ops
->get_rflags(vcpu
);
4039 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4040 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4041 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4042 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4043 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4044 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4045 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4046 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4048 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4049 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4050 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4051 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4052 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4053 tss
->prev_task_link
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4056 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4057 struct tss_segment_16
*tss
)
4059 kvm_rip_write(vcpu
, tss
->ip
);
4060 kvm_x86_ops
->set_rflags(vcpu
, tss
->flag
| 2);
4061 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4062 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4063 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4064 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4065 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4066 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4067 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4068 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4070 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4073 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4076 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4079 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4082 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4087 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4088 u16 old_tss_sel
, u32 old_tss_base
,
4089 struct desc_struct
*nseg_desc
)
4091 struct tss_segment_16 tss_segment_16
;
4094 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4095 sizeof tss_segment_16
))
4098 save_state_to_tss16(vcpu
, &tss_segment_16
);
4100 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4101 sizeof tss_segment_16
))
4104 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4105 &tss_segment_16
, sizeof tss_segment_16
))
4108 if (old_tss_sel
!= 0xffff) {
4109 tss_segment_16
.prev_task_link
= old_tss_sel
;
4111 if (kvm_write_guest(vcpu
->kvm
,
4112 get_tss_base_addr(vcpu
, nseg_desc
),
4113 &tss_segment_16
.prev_task_link
,
4114 sizeof tss_segment_16
.prev_task_link
))
4118 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4126 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4127 u16 old_tss_sel
, u32 old_tss_base
,
4128 struct desc_struct
*nseg_desc
)
4130 struct tss_segment_32 tss_segment_32
;
4133 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4134 sizeof tss_segment_32
))
4137 save_state_to_tss32(vcpu
, &tss_segment_32
);
4139 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4140 sizeof tss_segment_32
))
4143 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4144 &tss_segment_32
, sizeof tss_segment_32
))
4147 if (old_tss_sel
!= 0xffff) {
4148 tss_segment_32
.prev_task_link
= old_tss_sel
;
4150 if (kvm_write_guest(vcpu
->kvm
,
4151 get_tss_base_addr(vcpu
, nseg_desc
),
4152 &tss_segment_32
.prev_task_link
,
4153 sizeof tss_segment_32
.prev_task_link
))
4157 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4165 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4167 struct kvm_segment tr_seg
;
4168 struct desc_struct cseg_desc
;
4169 struct desc_struct nseg_desc
;
4171 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4172 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4174 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4176 /* FIXME: Handle errors. Failure to read either TSS or their
4177 * descriptors should generate a pagefault.
4179 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4182 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4185 if (reason
!= TASK_SWITCH_IRET
) {
4188 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4189 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4190 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4195 if (!nseg_desc
.p
|| (nseg_desc
.limit0
| nseg_desc
.limit
<< 16) < 0x67) {
4196 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4200 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4201 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4202 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4205 if (reason
== TASK_SWITCH_IRET
) {
4206 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4207 kvm_x86_ops
->set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4210 /* set back link to prev task only if NT bit is set in eflags
4211 note that old_tss_sel is not used afetr this point */
4212 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4213 old_tss_sel
= 0xffff;
4215 /* set back link to prev task only if NT bit is set in eflags
4216 note that old_tss_sel is not used afetr this point */
4217 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4218 old_tss_sel
= 0xffff;
4220 if (nseg_desc
.type
& 8)
4221 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4222 old_tss_base
, &nseg_desc
);
4224 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4225 old_tss_base
, &nseg_desc
);
4227 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4228 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4229 kvm_x86_ops
->set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4232 if (reason
!= TASK_SWITCH_IRET
) {
4233 nseg_desc
.type
|= (1 << 1);
4234 save_guest_segment_descriptor(vcpu
, tss_selector
,
4238 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4239 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4241 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4245 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4247 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4248 struct kvm_sregs
*sregs
)
4250 int mmu_reset_needed
= 0;
4251 int pending_vec
, max_bits
;
4252 struct descriptor_table dt
;
4256 dt
.limit
= sregs
->idt
.limit
;
4257 dt
.base
= sregs
->idt
.base
;
4258 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4259 dt
.limit
= sregs
->gdt
.limit
;
4260 dt
.base
= sregs
->gdt
.base
;
4261 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4263 vcpu
->arch
.cr2
= sregs
->cr2
;
4264 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4266 down_read(&vcpu
->kvm
->slots_lock
);
4267 if (gfn_to_memslot(vcpu
->kvm
, sregs
->cr3
>> PAGE_SHIFT
))
4268 vcpu
->arch
.cr3
= sregs
->cr3
;
4270 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
4271 up_read(&vcpu
->kvm
->slots_lock
);
4273 kvm_set_cr8(vcpu
, sregs
->cr8
);
4275 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4276 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4277 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4279 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4281 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4282 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4283 vcpu
->arch
.cr0
= sregs
->cr0
;
4285 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4286 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4287 if (!is_long_mode(vcpu
) && is_pae(vcpu
))
4288 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4290 if (mmu_reset_needed
)
4291 kvm_mmu_reset_context(vcpu
);
4293 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4294 pending_vec
= find_first_bit(
4295 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4296 if (pending_vec
< max_bits
) {
4297 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4298 pr_debug("Set back pending irq %d\n", pending_vec
);
4299 if (irqchip_in_kernel(vcpu
->kvm
))
4300 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4303 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4304 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4305 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4306 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4307 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4308 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4310 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4311 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4313 /* Older userspace won't unhalt the vcpu on reset. */
4314 if (vcpu
->vcpu_id
== 0 && kvm_rip_read(vcpu
) == 0xfff0 &&
4315 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4316 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4317 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4324 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4325 struct kvm_guest_debug
*dbg
)
4331 if ((dbg
->control
& (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) ==
4332 (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) {
4333 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4334 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4335 vcpu
->arch
.switch_db_regs
=
4336 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4338 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4339 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4340 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4343 r
= kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4345 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4346 kvm_queue_exception(vcpu
, DB_VECTOR
);
4347 else if (dbg
->control
& KVM_GUESTDBG_INJECT_BP
)
4348 kvm_queue_exception(vcpu
, BP_VECTOR
);
4356 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4357 * we have asm/x86/processor.h
4368 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4369 #ifdef CONFIG_X86_64
4370 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4372 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4377 * Translate a guest virtual address to a guest physical address.
4379 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4380 struct kvm_translation
*tr
)
4382 unsigned long vaddr
= tr
->linear_address
;
4386 down_read(&vcpu
->kvm
->slots_lock
);
4387 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4388 up_read(&vcpu
->kvm
->slots_lock
);
4389 tr
->physical_address
= gpa
;
4390 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4398 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4400 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4404 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4405 fpu
->fcw
= fxsave
->cwd
;
4406 fpu
->fsw
= fxsave
->swd
;
4407 fpu
->ftwx
= fxsave
->twd
;
4408 fpu
->last_opcode
= fxsave
->fop
;
4409 fpu
->last_ip
= fxsave
->rip
;
4410 fpu
->last_dp
= fxsave
->rdp
;
4411 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4418 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4420 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4424 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4425 fxsave
->cwd
= fpu
->fcw
;
4426 fxsave
->swd
= fpu
->fsw
;
4427 fxsave
->twd
= fpu
->ftwx
;
4428 fxsave
->fop
= fpu
->last_opcode
;
4429 fxsave
->rip
= fpu
->last_ip
;
4430 fxsave
->rdp
= fpu
->last_dp
;
4431 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4438 void fx_init(struct kvm_vcpu
*vcpu
)
4440 unsigned after_mxcsr_mask
;
4443 * Touch the fpu the first time in non atomic context as if
4444 * this is the first fpu instruction the exception handler
4445 * will fire before the instruction returns and it'll have to
4446 * allocate ram with GFP_KERNEL.
4449 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4451 /* Initialize guest FPU by resetting ours and saving into guest's */
4453 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4455 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4456 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4459 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4460 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4461 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4462 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4463 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4465 EXPORT_SYMBOL_GPL(fx_init
);
4467 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4469 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4472 vcpu
->guest_fpu_loaded
= 1;
4473 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4474 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4476 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4478 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4480 if (!vcpu
->guest_fpu_loaded
)
4483 vcpu
->guest_fpu_loaded
= 0;
4484 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4485 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4486 ++vcpu
->stat
.fpu_reload
;
4488 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4490 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4492 if (vcpu
->arch
.time_page
) {
4493 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4494 vcpu
->arch
.time_page
= NULL
;
4497 kvm_x86_ops
->vcpu_free(vcpu
);
4500 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4503 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4506 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4510 /* We do fxsave: this must be aligned. */
4511 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4513 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4515 r
= kvm_arch_vcpu_reset(vcpu
);
4517 r
= kvm_mmu_setup(vcpu
);
4524 kvm_x86_ops
->vcpu_free(vcpu
);
4528 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4531 kvm_mmu_unload(vcpu
);
4534 kvm_x86_ops
->vcpu_free(vcpu
);
4537 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4539 vcpu
->arch
.nmi_pending
= false;
4540 vcpu
->arch
.nmi_injected
= false;
4542 vcpu
->arch
.switch_db_regs
= 0;
4543 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4544 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4545 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4547 return kvm_x86_ops
->vcpu_reset(vcpu
);
4550 void kvm_arch_hardware_enable(void *garbage
)
4552 kvm_x86_ops
->hardware_enable(garbage
);
4555 void kvm_arch_hardware_disable(void *garbage
)
4557 kvm_x86_ops
->hardware_disable(garbage
);
4560 int kvm_arch_hardware_setup(void)
4562 return kvm_x86_ops
->hardware_setup();
4565 void kvm_arch_hardware_unsetup(void)
4567 kvm_x86_ops
->hardware_unsetup();
4570 void kvm_arch_check_processor_compat(void *rtn
)
4572 kvm_x86_ops
->check_processor_compatibility(rtn
);
4575 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4581 BUG_ON(vcpu
->kvm
== NULL
);
4584 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4585 if (!irqchip_in_kernel(kvm
) || vcpu
->vcpu_id
== 0)
4586 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4588 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4590 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4595 vcpu
->arch
.pio_data
= page_address(page
);
4597 r
= kvm_mmu_create(vcpu
);
4599 goto fail_free_pio_data
;
4601 if (irqchip_in_kernel(kvm
)) {
4602 r
= kvm_create_lapic(vcpu
);
4604 goto fail_mmu_destroy
;
4607 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4609 if (!vcpu
->arch
.mce_banks
) {
4611 goto fail_mmu_destroy
;
4613 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4618 kvm_mmu_destroy(vcpu
);
4620 free_page((unsigned long)vcpu
->arch
.pio_data
);
4625 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4627 kvm_free_lapic(vcpu
);
4628 down_read(&vcpu
->kvm
->slots_lock
);
4629 kvm_mmu_destroy(vcpu
);
4630 up_read(&vcpu
->kvm
->slots_lock
);
4631 free_page((unsigned long)vcpu
->arch
.pio_data
);
4634 struct kvm
*kvm_arch_create_vm(void)
4636 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4639 return ERR_PTR(-ENOMEM
);
4641 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4642 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4644 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4645 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4647 rdtscll(kvm
->arch
.vm_init_tsc
);
4652 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4655 kvm_mmu_unload(vcpu
);
4659 static void kvm_free_vcpus(struct kvm
*kvm
)
4664 * Unpin any mmu pages first.
4666 for (i
= 0; i
< KVM_MAX_VCPUS
; ++i
)
4668 kvm_unload_vcpu_mmu(kvm
->vcpus
[i
]);
4669 for (i
= 0; i
< KVM_MAX_VCPUS
; ++i
) {
4670 if (kvm
->vcpus
[i
]) {
4671 kvm_arch_vcpu_free(kvm
->vcpus
[i
]);
4672 kvm
->vcpus
[i
] = NULL
;
4678 void kvm_arch_sync_events(struct kvm
*kvm
)
4680 kvm_free_all_assigned_devices(kvm
);
4683 void kvm_arch_destroy_vm(struct kvm
*kvm
)
4685 kvm_iommu_unmap_guest(kvm
);
4687 kfree(kvm
->arch
.vpic
);
4688 kfree(kvm
->arch
.vioapic
);
4689 kvm_free_vcpus(kvm
);
4690 kvm_free_physmem(kvm
);
4691 if (kvm
->arch
.apic_access_page
)
4692 put_page(kvm
->arch
.apic_access_page
);
4693 if (kvm
->arch
.ept_identity_pagetable
)
4694 put_page(kvm
->arch
.ept_identity_pagetable
);
4698 int kvm_arch_set_memory_region(struct kvm
*kvm
,
4699 struct kvm_userspace_memory_region
*mem
,
4700 struct kvm_memory_slot old
,
4703 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
4704 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
4706 /*To keep backward compatibility with older userspace,
4707 *x86 needs to hanlde !user_alloc case.
4710 if (npages
&& !old
.rmap
) {
4711 unsigned long userspace_addr
;
4713 down_write(¤t
->mm
->mmap_sem
);
4714 userspace_addr
= do_mmap(NULL
, 0,
4716 PROT_READ
| PROT_WRITE
,
4717 MAP_PRIVATE
| MAP_ANONYMOUS
,
4719 up_write(¤t
->mm
->mmap_sem
);
4721 if (IS_ERR((void *)userspace_addr
))
4722 return PTR_ERR((void *)userspace_addr
);
4724 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4725 spin_lock(&kvm
->mmu_lock
);
4726 memslot
->userspace_addr
= userspace_addr
;
4727 spin_unlock(&kvm
->mmu_lock
);
4729 if (!old
.user_alloc
&& old
.rmap
) {
4732 down_write(¤t
->mm
->mmap_sem
);
4733 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
4734 old
.npages
* PAGE_SIZE
);
4735 up_write(¤t
->mm
->mmap_sem
);
4738 "kvm_vm_ioctl_set_memory_region: "
4739 "failed to munmap memory\n");
4744 spin_lock(&kvm
->mmu_lock
);
4745 if (!kvm
->arch
.n_requested_mmu_pages
) {
4746 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
4747 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
4750 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
4751 spin_unlock(&kvm
->mmu_lock
);
4752 kvm_flush_remote_tlbs(kvm
);
4757 void kvm_arch_flush_shadow(struct kvm
*kvm
)
4759 kvm_mmu_zap_all(kvm
);
4760 kvm_reload_remote_mmus(kvm
);
4763 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
4765 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
4766 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
4767 || vcpu
->arch
.nmi_pending
;
4770 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
4773 int cpu
= vcpu
->cpu
;
4775 if (waitqueue_active(&vcpu
->wq
)) {
4776 wake_up_interruptible(&vcpu
->wq
);
4777 ++vcpu
->stat
.halt_wakeup
;
4781 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
4782 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
4783 smp_send_reschedule(cpu
);
4787 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
4789 return kvm_x86_ops
->interrupt_allowed(vcpu
);