2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
25 * The current flushing context - we pass it instead of 5 arguments:
34 unsigned force_split
: 1;
38 #define CPA_FLUSHTLB 1
42 static unsigned long direct_pages_count
[PG_LEVEL_NUM
];
44 void update_page_count(int level
, unsigned long pages
)
48 /* Protect against CPA */
49 spin_lock_irqsave(&pgd_lock
, flags
);
50 direct_pages_count
[level
] += pages
;
51 spin_unlock_irqrestore(&pgd_lock
, flags
);
54 static void split_page_count(int level
)
56 direct_pages_count
[level
]--;
57 direct_pages_count
[level
- 1] += PTRS_PER_PTE
;
60 int arch_report_meminfo(char *page
)
62 int n
= sprintf(page
, "DirectMap4k: %8lu kB\n",
63 direct_pages_count
[PG_LEVEL_4K
] << 2);
64 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
65 n
+= sprintf(page
+ n
, "DirectMap2M: %8lu kB\n",
66 direct_pages_count
[PG_LEVEL_2M
] << 11);
68 n
+= sprintf(page
+ n
, "DirectMap4M: %8lu kB\n",
69 direct_pages_count
[PG_LEVEL_2M
] << 12);
73 n
+= sprintf(page
+ n
, "DirectMap1G: %8lu kB\n",
74 direct_pages_count
[PG_LEVEL_1G
] << 20);
79 static inline void split_page_count(int level
) { }
84 static inline unsigned long highmap_start_pfn(void)
86 return __pa(_text
) >> PAGE_SHIFT
;
89 static inline unsigned long highmap_end_pfn(void)
91 return __pa(round_up((unsigned long)_end
, PMD_SIZE
)) >> PAGE_SHIFT
;
96 #ifdef CONFIG_DEBUG_PAGEALLOC
97 # define debug_pagealloc 1
99 # define debug_pagealloc 0
103 within(unsigned long addr
, unsigned long start
, unsigned long end
)
105 return addr
>= start
&& addr
< end
;
113 * clflush_cache_range - flush a cache range with clflush
114 * @addr: virtual start address
115 * @size: number of bytes to flush
117 * clflush is an unordered instruction which needs fencing with mfence
118 * to avoid ordering issues.
120 void clflush_cache_range(void *vaddr
, unsigned int size
)
122 void *vend
= vaddr
+ size
- 1;
126 for (; vaddr
< vend
; vaddr
+= boot_cpu_data
.x86_clflush_size
)
129 * Flush any possible final partial cacheline:
136 static void __cpa_flush_all(void *arg
)
138 unsigned long cache
= (unsigned long)arg
;
141 * Flush all to work around Errata in early athlons regarding
142 * large page flushing.
146 if (cache
&& boot_cpu_data
.x86_model
>= 4)
150 static void cpa_flush_all(unsigned long cache
)
152 BUG_ON(irqs_disabled());
154 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1);
157 static void __cpa_flush_range(void *arg
)
160 * We could optimize that further and do individual per page
161 * tlb invalidates for a low number of pages. Caveat: we must
162 * flush the high aliases on 64bit as well.
167 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
169 unsigned int i
, level
;
172 BUG_ON(irqs_disabled());
173 WARN_ON(PAGE_ALIGN(start
) != start
);
175 on_each_cpu(__cpa_flush_range
, NULL
, 1);
181 * We only need to flush on one CPU,
182 * clflush is a MESI-coherent instruction that
183 * will cause all other CPUs to flush the same
186 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
187 pte_t
*pte
= lookup_address(addr
, &level
);
190 * Only flush present addresses:
192 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
193 clflush_cache_range((void *) addr
, PAGE_SIZE
);
197 static void cpa_flush_array(unsigned long *start
, int numpages
, int cache
)
199 unsigned int i
, level
;
202 BUG_ON(irqs_disabled());
204 on_each_cpu(__cpa_flush_range
, NULL
, 1);
210 if (numpages
>= 1024) {
211 if (boot_cpu_data
.x86_model
>= 4)
216 * We only need to flush on one CPU,
217 * clflush is a MESI-coherent instruction that
218 * will cause all other CPUs to flush the same
221 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
++) {
222 pte_t
*pte
= lookup_address(*addr
, &level
);
225 * Only flush present addresses:
227 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
228 clflush_cache_range((void *) *addr
, PAGE_SIZE
);
233 * Certain areas of memory on x86 require very specific protection flags,
234 * for example the BIOS area or kernel text. Callers don't always get this
235 * right (again, ioremap() on BIOS memory is not uncommon) so this function
236 * checks and fixes these known static required protection bits.
238 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
,
241 pgprot_t forbidden
= __pgprot(0);
244 * The BIOS area between 640k and 1Mb needs to be executable for
245 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
247 if (within(pfn
, BIOS_BEGIN
>> PAGE_SHIFT
, BIOS_END
>> PAGE_SHIFT
))
248 pgprot_val(forbidden
) |= _PAGE_NX
;
251 * The kernel text needs to be executable for obvious reasons
252 * Does not cover __inittext since that is gone later on. On
253 * 64bit we do not enforce !NX on the low mapping
255 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
256 pgprot_val(forbidden
) |= _PAGE_NX
;
259 * The .rodata section needs to be read-only. Using the pfn
260 * catches all aliases.
262 if (within(pfn
, __pa((unsigned long)__start_rodata
) >> PAGE_SHIFT
,
263 __pa((unsigned long)__end_rodata
) >> PAGE_SHIFT
))
264 pgprot_val(forbidden
) |= _PAGE_RW
;
266 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
272 * Lookup the page table entry for a virtual address. Return a pointer
273 * to the entry and the level of the mapping.
275 * Note: We return pud and pmd either when the entry is marked large
276 * or when the present bit is not set. Otherwise we would return a
277 * pointer to a nonexisting mapping.
279 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
281 pgd_t
*pgd
= pgd_offset_k(address
);
285 *level
= PG_LEVEL_NONE
;
290 pud
= pud_offset(pgd
, address
);
294 *level
= PG_LEVEL_1G
;
295 if (pud_large(*pud
) || !pud_present(*pud
))
298 pmd
= pmd_offset(pud
, address
);
302 *level
= PG_LEVEL_2M
;
303 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
306 *level
= PG_LEVEL_4K
;
308 return pte_offset_kernel(pmd
, address
);
310 EXPORT_SYMBOL_GPL(lookup_address
);
313 * Set the new pmd in all the pgds we know about:
315 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
318 set_pte_atomic(kpte
, pte
);
320 if (!SHARED_KERNEL_PMD
) {
323 list_for_each_entry(page
, &pgd_list
, lru
) {
328 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
329 pud
= pud_offset(pgd
, address
);
330 pmd
= pmd_offset(pud
, address
);
331 set_pte_atomic((pte_t
*)pmd
, pte
);
338 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
339 struct cpa_data
*cpa
)
341 unsigned long nextpage_addr
, numpages
, pmask
, psize
, flags
, addr
, pfn
;
342 pte_t new_pte
, old_pte
, *tmp
;
343 pgprot_t old_prot
, new_prot
;
347 if (cpa
->force_split
)
350 spin_lock_irqsave(&pgd_lock
, flags
);
352 * Check for races, another CPU might have split this page
355 tmp
= lookup_address(address
, &level
);
361 psize
= PMD_PAGE_SIZE
;
362 pmask
= PMD_PAGE_MASK
;
366 psize
= PUD_PAGE_SIZE
;
367 pmask
= PUD_PAGE_MASK
;
376 * Calculate the number of pages, which fit into this large
377 * page starting at address:
379 nextpage_addr
= (address
+ psize
) & pmask
;
380 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
381 if (numpages
< cpa
->numpages
)
382 cpa
->numpages
= numpages
;
385 * We are safe now. Check whether the new pgprot is the same:
388 old_prot
= new_prot
= pte_pgprot(old_pte
);
390 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
391 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
394 * old_pte points to the large page base address. So we need
395 * to add the offset of the virtual address:
397 pfn
= pte_pfn(old_pte
) + ((address
& (psize
- 1)) >> PAGE_SHIFT
);
400 new_prot
= static_protections(new_prot
, address
, pfn
);
403 * We need to check the full range, whether
404 * static_protection() requires a different pgprot for one of
405 * the pages in the range we try to preserve:
407 addr
= address
+ PAGE_SIZE
;
409 for (i
= 1; i
< cpa
->numpages
; i
++, addr
+= PAGE_SIZE
, pfn
++) {
410 pgprot_t chk_prot
= static_protections(new_prot
, addr
, pfn
);
412 if (pgprot_val(chk_prot
) != pgprot_val(new_prot
))
417 * If there are no changes, return. maxpages has been updated
420 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
426 * We need to change the attributes. Check, whether we can
427 * change the large page in one go. We request a split, when
428 * the address is not aligned and the number of pages is
429 * smaller than the number of pages in the large page. Note
430 * that we limited the number of possible pages already to
431 * the number of pages in the large page.
433 if (address
== (nextpage_addr
- psize
) && cpa
->numpages
== numpages
) {
435 * The address is aligned and the number of pages
436 * covers the full page.
438 new_pte
= pfn_pte(pte_pfn(old_pte
), canon_pgprot(new_prot
));
439 __set_pmd_pte(kpte
, address
, new_pte
);
440 cpa
->flags
|= CPA_FLUSHTLB
;
445 spin_unlock_irqrestore(&pgd_lock
, flags
);
450 static LIST_HEAD(page_pool
);
451 static unsigned long pool_size
, pool_pages
, pool_low
;
452 static unsigned long pool_used
, pool_failed
;
454 static void cpa_fill_pool(struct page
**ret
)
456 gfp_t gfp
= GFP_KERNEL
;
461 * Avoid recursion (on debug-pagealloc) and also signal
462 * our priority to get to these pagetables:
464 if (current
->flags
& PF_MEMALLOC
)
466 current
->flags
|= PF_MEMALLOC
;
469 * Allocate atomically from atomic contexts:
471 if (in_atomic() || irqs_disabled() || debug_pagealloc
)
472 gfp
= GFP_ATOMIC
| __GFP_NORETRY
| __GFP_NOWARN
;
474 while (pool_pages
< pool_size
|| (ret
&& !*ret
)) {
475 p
= alloc_pages(gfp
, 0);
481 * If the call site needs a page right now, provide it:
487 spin_lock_irqsave(&pgd_lock
, flags
);
488 list_add(&p
->lru
, &page_pool
);
490 spin_unlock_irqrestore(&pgd_lock
, flags
);
493 current
->flags
&= ~PF_MEMALLOC
;
496 #define SHIFT_MB (20 - PAGE_SHIFT)
497 #define ROUND_MB_GB ((1 << 10) - 1)
498 #define SHIFT_MB_GB 10
499 #define POOL_PAGES_PER_GB 16
501 void __init
cpa_init(void)
508 * Calculate the number of pool pages:
510 * Convert totalram (nr of pages) to MiB and round to the next
511 * GiB. Shift MiB to Gib and multiply the result by
514 if (debug_pagealloc
) {
515 gb
= ((si
.totalram
>> SHIFT_MB
) + ROUND_MB_GB
) >> SHIFT_MB_GB
;
516 pool_size
= POOL_PAGES_PER_GB
* gb
;
520 pool_low
= pool_size
;
524 "CPA: page pool initialized %lu of %lu pages preallocated\n",
525 pool_pages
, pool_size
);
528 static int split_large_page(pte_t
*kpte
, unsigned long address
)
530 unsigned long flags
, pfn
, pfninc
= 1;
531 unsigned int i
, level
;
537 * Get a page from the pool. The pool list is protected by the
538 * pgd_lock, which we have to take anyway for the split
541 spin_lock_irqsave(&pgd_lock
, flags
);
542 if (list_empty(&page_pool
)) {
543 spin_unlock_irqrestore(&pgd_lock
, flags
);
545 cpa_fill_pool(&base
);
548 spin_lock_irqsave(&pgd_lock
, flags
);
550 base
= list_first_entry(&page_pool
, struct page
, lru
);
551 list_del(&base
->lru
);
554 if (pool_pages
< pool_low
)
555 pool_low
= pool_pages
;
559 * Check for races, another CPU might have split this page
562 tmp
= lookup_address(address
, &level
);
566 pbase
= (pte_t
*)page_address(base
);
567 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
568 ref_prot
= pte_pgprot(pte_clrhuge(*kpte
));
571 if (level
== PG_LEVEL_1G
) {
572 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
573 pgprot_val(ref_prot
) |= _PAGE_PSE
;
578 * Get the target pfn from the original entry:
580 pfn
= pte_pfn(*kpte
);
581 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
582 set_pte(&pbase
[i
], pfn_pte(pfn
, ref_prot
));
584 if (address
>= (unsigned long)__va(0) &&
585 address
< (unsigned long)__va(max_low_pfn_mapped
<< PAGE_SHIFT
))
586 split_page_count(level
);
589 if (address
>= (unsigned long)__va(1UL<<32) &&
590 address
< (unsigned long)__va(max_pfn_mapped
<< PAGE_SHIFT
))
591 split_page_count(level
);
595 * Install the new, split up pagetable. Important details here:
597 * On Intel the NX bit of all levels must be cleared to make a
598 * page executable. See section 4.13.2 of Intel 64 and IA-32
599 * Architectures Software Developer's Manual).
601 * Mark the entry present. The current mapping might be
602 * set to not present, which we preserved above.
604 ref_prot
= pte_pgprot(pte_mkexec(pte_clrhuge(*kpte
)));
605 pgprot_val(ref_prot
) |= _PAGE_PRESENT
;
606 __set_pmd_pte(kpte
, address
, mk_pte(base
, ref_prot
));
611 * If we dropped out via the lookup_address check under
612 * pgd_lock then stick the page back into the pool:
615 list_add(&base
->lru
, &page_pool
);
619 spin_unlock_irqrestore(&pgd_lock
, flags
);
624 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
626 unsigned long address
;
629 pte_t
*kpte
, old_pte
;
631 if (cpa
->flags
& CPA_ARRAY
)
632 address
= cpa
->vaddr
[cpa
->curpage
];
634 address
= *cpa
->vaddr
;
637 kpte
= lookup_address(address
, &level
);
642 if (!pte_val(old_pte
)) {
645 WARN(1, KERN_WARNING
"CPA: called for zero pte. "
646 "vaddr = %lx cpa->vaddr = %lx\n", address
,
651 if (level
== PG_LEVEL_4K
) {
653 pgprot_t new_prot
= pte_pgprot(old_pte
);
654 unsigned long pfn
= pte_pfn(old_pte
);
656 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
657 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
659 new_prot
= static_protections(new_prot
, address
, pfn
);
662 * We need to keep the pfn from the existing PTE,
663 * after all we're only going to change it's attributes
664 * not the memory it points to
666 new_pte
= pfn_pte(pfn
, canon_pgprot(new_prot
));
669 * Do we really change anything ?
671 if (pte_val(old_pte
) != pte_val(new_pte
)) {
672 set_pte_atomic(kpte
, new_pte
);
673 cpa
->flags
|= CPA_FLUSHTLB
;
680 * Check, whether we can keep the large page intact
681 * and just change the pte:
683 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
685 * When the range fits into the existing large page,
686 * return. cp->numpages and cpa->tlbflush have been updated in
693 * We have to split the large page:
695 err
= split_large_page(kpte
, address
);
697 cpa
->flags
|= CPA_FLUSHTLB
;
704 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
706 static int cpa_process_alias(struct cpa_data
*cpa
)
708 struct cpa_data alias_cpa
;
710 unsigned long temp_cpa_vaddr
, vaddr
;
712 if (cpa
->pfn
>= max_pfn_mapped
)
716 if (cpa
->pfn
>= max_low_pfn_mapped
&& cpa
->pfn
< (1UL<<(32-PAGE_SHIFT
)))
720 * No need to redo, when the primary call touched the direct
723 if (cpa
->flags
& CPA_ARRAY
)
724 vaddr
= cpa
->vaddr
[cpa
->curpage
];
728 if (!(within(vaddr
, PAGE_OFFSET
,
729 PAGE_OFFSET
+ (max_low_pfn_mapped
<< PAGE_SHIFT
))
731 || within(vaddr
, PAGE_OFFSET
+ (1UL<<32),
732 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))
737 temp_cpa_vaddr
= (unsigned long) __va(cpa
->pfn
<< PAGE_SHIFT
);
738 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
739 alias_cpa
.flags
&= ~CPA_ARRAY
;
742 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
749 * No need to redo, when the primary call touched the high
752 if (within(vaddr
, (unsigned long) _text
, (unsigned long) _end
))
756 * If the physical address is inside the kernel map, we need
757 * to touch the high mapped kernel as well:
759 if (!within(cpa
->pfn
, highmap_start_pfn(), highmap_end_pfn()))
763 temp_cpa_vaddr
= (cpa
->pfn
<< PAGE_SHIFT
) + __START_KERNEL_map
- phys_base
;
764 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
765 alias_cpa
.flags
&= ~CPA_ARRAY
;
768 * The high mapping range is imprecise, so ignore the return value.
770 __change_page_attr_set_clr(&alias_cpa
, 0);
775 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
777 int ret
, numpages
= cpa
->numpages
;
781 * Store the remaining nr of pages for the large page
782 * preservation check.
784 cpa
->numpages
= numpages
;
785 /* for array changes, we can't use large page */
786 if (cpa
->flags
& CPA_ARRAY
)
789 ret
= __change_page_attr(cpa
, checkalias
);
794 ret
= cpa_process_alias(cpa
);
800 * Adjust the number of pages with the result of the
801 * CPA operation. Either a large page has been
802 * preserved or a single page update happened.
804 BUG_ON(cpa
->numpages
> numpages
);
805 numpages
-= cpa
->numpages
;
806 if (cpa
->flags
& CPA_ARRAY
)
809 *cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
815 static inline int cache_attr(pgprot_t attr
)
817 return pgprot_val(attr
) &
818 (_PAGE_PAT
| _PAGE_PAT_LARGE
| _PAGE_PWT
| _PAGE_PCD
);
821 static int change_page_attr_set_clr(unsigned long *addr
, int numpages
,
822 pgprot_t mask_set
, pgprot_t mask_clr
,
823 int force_split
, int array
)
826 int ret
, cache
, checkalias
;
829 * Check, if we are requested to change a not supported
832 mask_set
= canon_pgprot(mask_set
);
833 mask_clr
= canon_pgprot(mask_clr
);
834 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
837 /* Ensure we are PAGE_SIZE aligned */
839 if (*addr
& ~PAGE_MASK
) {
842 * People should not be passing in unaligned addresses:
848 for (i
= 0; i
< numpages
; i
++) {
849 if (addr
[i
] & ~PAGE_MASK
) {
850 addr
[i
] &= PAGE_MASK
;
856 /* Must avoid aliasing mappings in the highmem code */
860 cpa
.numpages
= numpages
;
861 cpa
.mask_set
= mask_set
;
862 cpa
.mask_clr
= mask_clr
;
865 cpa
.force_split
= force_split
;
868 cpa
.flags
|= CPA_ARRAY
;
870 /* No alias checking for _NX bit modifications */
871 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
873 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
876 * Check whether we really changed something:
878 if (!(cpa
.flags
& CPA_FLUSHTLB
))
882 * No need to flush, when we did not set any of the caching
885 cache
= cache_attr(mask_set
);
888 * On success we use clflush, when the CPU supports it to
889 * avoid the wbindv. If the CPU does not support it and in the
890 * error case we fall back to cpa_flush_all (which uses
893 if (!ret
&& cpu_has_clflush
) {
894 if (cpa
.flags
& CPA_ARRAY
)
895 cpa_flush_array(addr
, numpages
, cache
);
897 cpa_flush_range(*addr
, numpages
, cache
);
899 cpa_flush_all(cache
);
907 static inline int change_page_attr_set(unsigned long *addr
, int numpages
,
908 pgprot_t mask
, int array
)
910 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0,
914 static inline int change_page_attr_clear(unsigned long *addr
, int numpages
,
915 pgprot_t mask
, int array
)
917 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0,
921 int _set_memory_uc(unsigned long addr
, int numpages
)
924 * for now UC MINUS. see comments in ioremap_nocache()
926 return change_page_attr_set(&addr
, numpages
,
927 __pgprot(_PAGE_CACHE_UC_MINUS
), 0);
930 int set_memory_uc(unsigned long addr
, int numpages
)
933 * for now UC MINUS. see comments in ioremap_nocache()
935 if (reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
936 _PAGE_CACHE_UC_MINUS
, NULL
))
939 return _set_memory_uc(addr
, numpages
);
941 EXPORT_SYMBOL(set_memory_uc
);
943 int set_memory_array_uc(unsigned long *addr
, int addrinarray
)
947 * for now UC MINUS. see comments in ioremap_nocache()
949 for (i
= 0; i
< addrinarray
; i
++) {
950 if (reserve_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
,
951 _PAGE_CACHE_UC_MINUS
, NULL
))
955 return change_page_attr_set(addr
, addrinarray
,
956 __pgprot(_PAGE_CACHE_UC_MINUS
), 1);
959 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
962 EXPORT_SYMBOL(set_memory_array_uc
);
964 int _set_memory_wc(unsigned long addr
, int numpages
)
966 return change_page_attr_set(&addr
, numpages
,
967 __pgprot(_PAGE_CACHE_WC
), 0);
970 int set_memory_wc(unsigned long addr
, int numpages
)
973 return set_memory_uc(addr
, numpages
);
975 if (reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
976 _PAGE_CACHE_WC
, NULL
))
979 return _set_memory_wc(addr
, numpages
);
981 EXPORT_SYMBOL(set_memory_wc
);
983 int _set_memory_wb(unsigned long addr
, int numpages
)
985 return change_page_attr_clear(&addr
, numpages
,
986 __pgprot(_PAGE_CACHE_MASK
), 0);
989 int set_memory_wb(unsigned long addr
, int numpages
)
991 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
993 return _set_memory_wb(addr
, numpages
);
995 EXPORT_SYMBOL(set_memory_wb
);
997 int set_memory_array_wb(unsigned long *addr
, int addrinarray
)
1000 for (i
= 0; i
< addrinarray
; i
++)
1001 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
1003 return change_page_attr_clear(addr
, addrinarray
,
1004 __pgprot(_PAGE_CACHE_MASK
), 1);
1006 EXPORT_SYMBOL(set_memory_array_wb
);
1008 int set_memory_x(unsigned long addr
, int numpages
)
1010 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1012 EXPORT_SYMBOL(set_memory_x
);
1014 int set_memory_nx(unsigned long addr
, int numpages
)
1016 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1018 EXPORT_SYMBOL(set_memory_nx
);
1020 int set_memory_ro(unsigned long addr
, int numpages
)
1022 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1025 int set_memory_rw(unsigned long addr
, int numpages
)
1027 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1030 int set_memory_np(unsigned long addr
, int numpages
)
1032 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_PRESENT
), 0);
1035 int set_memory_4k(unsigned long addr
, int numpages
)
1037 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
1041 int set_pages_uc(struct page
*page
, int numpages
)
1043 unsigned long addr
= (unsigned long)page_address(page
);
1045 return set_memory_uc(addr
, numpages
);
1047 EXPORT_SYMBOL(set_pages_uc
);
1049 int set_pages_wb(struct page
*page
, int numpages
)
1051 unsigned long addr
= (unsigned long)page_address(page
);
1053 return set_memory_wb(addr
, numpages
);
1055 EXPORT_SYMBOL(set_pages_wb
);
1057 int set_pages_x(struct page
*page
, int numpages
)
1059 unsigned long addr
= (unsigned long)page_address(page
);
1061 return set_memory_x(addr
, numpages
);
1063 EXPORT_SYMBOL(set_pages_x
);
1065 int set_pages_nx(struct page
*page
, int numpages
)
1067 unsigned long addr
= (unsigned long)page_address(page
);
1069 return set_memory_nx(addr
, numpages
);
1071 EXPORT_SYMBOL(set_pages_nx
);
1073 int set_pages_ro(struct page
*page
, int numpages
)
1075 unsigned long addr
= (unsigned long)page_address(page
);
1077 return set_memory_ro(addr
, numpages
);
1080 int set_pages_rw(struct page
*page
, int numpages
)
1082 unsigned long addr
= (unsigned long)page_address(page
);
1084 return set_memory_rw(addr
, numpages
);
1087 #ifdef CONFIG_DEBUG_PAGEALLOC
1089 static int __set_pages_p(struct page
*page
, int numpages
)
1091 unsigned long tempaddr
= (unsigned long) page_address(page
);
1092 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1093 .numpages
= numpages
,
1094 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1095 .mask_clr
= __pgprot(0),
1098 return __change_page_attr_set_clr(&cpa
, 1);
1101 static int __set_pages_np(struct page
*page
, int numpages
)
1103 unsigned long tempaddr
= (unsigned long) page_address(page
);
1104 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1105 .numpages
= numpages
,
1106 .mask_set
= __pgprot(0),
1107 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1110 return __change_page_attr_set_clr(&cpa
, 1);
1113 void kernel_map_pages(struct page
*page
, int numpages
, int enable
)
1115 if (PageHighMem(page
))
1118 debug_check_no_locks_freed(page_address(page
),
1119 numpages
* PAGE_SIZE
);
1123 * If page allocator is not up yet then do not call c_p_a():
1125 if (!debug_pagealloc_enabled
)
1129 * The return value is ignored as the calls cannot fail.
1130 * Large pages are kept enabled at boot time, and are
1131 * split up quickly with DEBUG_PAGEALLOC. If a splitup
1132 * fails here (due to temporary memory shortage) no damage
1133 * is done because we just keep the largepage intact up
1134 * to the next attempt when it will likely be split up:
1137 __set_pages_p(page
, numpages
);
1139 __set_pages_np(page
, numpages
);
1142 * We should perform an IPI and flush all tlbs,
1143 * but that can deadlock->flush only current cpu:
1148 * Try to refill the page pool here. We can do this only after
1151 cpa_fill_pool(NULL
);
1154 #ifdef CONFIG_DEBUG_FS
1155 static int dpa_show(struct seq_file
*m
, void *v
)
1157 seq_puts(m
, "DEBUG_PAGEALLOC\n");
1158 seq_printf(m
, "pool_size : %lu\n", pool_size
);
1159 seq_printf(m
, "pool_pages : %lu\n", pool_pages
);
1160 seq_printf(m
, "pool_low : %lu\n", pool_low
);
1161 seq_printf(m
, "pool_used : %lu\n", pool_used
);
1162 seq_printf(m
, "pool_failed : %lu\n", pool_failed
);
1167 static int dpa_open(struct inode
*inode
, struct file
*filp
)
1169 return single_open(filp
, dpa_show
, NULL
);
1172 static const struct file_operations dpa_fops
= {
1175 .llseek
= seq_lseek
,
1176 .release
= single_release
,
1179 static int __init
debug_pagealloc_proc_init(void)
1183 de
= debugfs_create_file("debug_pagealloc", 0600, NULL
, NULL
,
1190 __initcall(debug_pagealloc_proc_init
);
1193 #ifdef CONFIG_HIBERNATION
1195 bool kernel_page_present(struct page
*page
)
1200 if (PageHighMem(page
))
1203 pte
= lookup_address((unsigned long)page_address(page
), &level
);
1204 return (pte_val(*pte
) & _PAGE_PRESENT
);
1207 #endif /* CONFIG_HIBERNATION */
1209 #endif /* CONFIG_DEBUG_PAGEALLOC */
1212 * The testcases use internal knowledge of the implementation that shouldn't
1213 * be exposed to the rest of the kernel. Include these directly here.
1215 #ifdef CONFIG_CPA_DEBUG
1216 #include "pageattr-test.c"