arch/x86/pci/pcbios.c

   1 /*
   2  * BIOS32 and PCI BIOS handling.
   3  */
   4
   5 #include <linux/pci.h>
   6 #include <linux/init.h>
   7 #include <linux/slab.h>
   8 #include <linux/module.h>
   9 #include <linux/uaccess.h>
  10 #include <asm/pci_x86.h>
  11 #include <asm/pci-functions.h>
  12 #include <asm/cacheflush.h>
  13
  14 /* BIOS32 signature: "_32_" */
  15 #define BIOS32_SIGNATURE        (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
  16
  17 /* PCI signature: "PCI " */
  18 #define PCI_SIGNATURE           (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
  19
  20 /* PCI service signature: "$PCI" */
  21 #define PCI_SERVICE             (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
  22
  23 /* PCI BIOS hardware mechanism flags */
  24 #define PCIBIOS_HW_TYPE1                0x01
  25 #define PCIBIOS_HW_TYPE2                0x02
  26 #define PCIBIOS_HW_TYPE1_SPEC           0x10
  27 #define PCIBIOS_HW_TYPE2_SPEC           0x20
  28
  29 int pcibios_enabled;
  30
  31 /* According to the BIOS specification at:
  32  * http://members.datafast.net.au/dft0802/specs/bios21.pdf, we could
  33  * restrict the x zone to some pages and make it ro. But this may be
  34  * broken on some bios, complex to handle with static_protections.
  35  * We could make the 0xe0000-0x100000 range rox, but this can break
  36  * some ISA mapping.
  37  *
  38  * So we let's an rw and x hole when pcibios is used. This shouldn't
  39  * happen for modern system with mmconfig, and if you don't want it
  40  * you could disable pcibios...
  41  */
  42 static inline void set_bios_x(void)
  43 {
  44         pcibios_enabled = 1;
  45         set_memory_x(PAGE_OFFSET + BIOS_BEGIN, (BIOS_END - BIOS_BEGIN) >> PAGE_SHIFT);
  46         if (__supported_pte_mask & _PAGE_NX)
  47                 printk(KERN_INFO "PCI : PCI BIOS area is rw and x. Use pci=nobios if you want it NX.\n");
  48 }
  49
  50 /*
  51  * This is the standard structure used to identify the entry point
  52  * to the BIOS32 Service Directory, as documented in
  53  *      Standard BIOS 32-bit Service Directory Proposal
  54  *      Revision 0.4 May 24, 1993
  55  *      Phoenix Technologies Ltd.
  56  *      Norwood, MA
  57  * and the PCI BIOS specification.
  58  */
  59
  60 union bios32 {
  61         struct {
  62                 unsigned long signature;        /* _32_ */
  63                 unsigned long entry;            /* 32 bit physical address */
  64                 unsigned char revision;         /* Revision level, 0 */
  65                 unsigned char length;           /* Length in paragraphs should be 01 */
  66                 unsigned char checksum;         /* All bytes must add up to zero */
  67                 unsigned char reserved[5];      /* Must be zero */
  68         } fields;
  69         char chars[16];
  70 };
  71
  72 /*
  73  * Physical address of the service directory.  I don't know if we're
  74  * allowed to have more than one of these or not, so just in case
  75  * we'll make pcibios_present() take a memory start parameter and store
  76  * the array there.
  77  */
  78
  79 static struct {
  80         unsigned long address;
  81         unsigned short segment;
  82 } bios32_indirect __initdata = { 0, __KERNEL_CS };
  83
  84 /*
  85  * Returns the entry point for the given service, NULL on error
  86  */
  87
  88 static unsigned long __init bios32_service(unsigned long service)
  89 {
  90         unsigned char return_code;      /* %al */
  91         unsigned long address;          /* %ebx */
  92         unsigned long length;           /* %ecx */
  93         unsigned long entry;            /* %edx */
  94         unsigned long flags;
  95
  96         local_irq_save(flags);
  97         __asm__("lcall *(%%edi); cld"
  98                 : "=a" (return_code),
  99                   "=b" (address),
 100                   "=c" (length),
 101                   "=d" (entry)
 102                 : "0" (service),
 103                   "1" (0),
 104                   "D" (&bios32_indirect));
 105         local_irq_restore(flags);
 106
 107         switch (return_code) {
 108                 case 0:
 109                         return address + entry;
 110                 case 0x80:      /* Not present */
 111                         printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
 112                         return 0;
 113                 default: /* Shouldn't happen */
 114                         printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
 115                                 service, return_code);
 116                         return 0;
 117         }
 118 }
 119
 120 static struct {
 121         unsigned long address;
 122         unsigned short segment;
 123 } pci_indirect = { 0, __KERNEL_CS };
 124
 125 static int pci_bios_present;
 126
 127 static int __init check_pcibios(void)
 128 {
 129         u32 signature, eax, ebx, ecx;
 130         u8 status, major_ver, minor_ver, hw_mech;
 131         unsigned long flags, pcibios_entry;
 132
 133         if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
 134                 pci_indirect.address = pcibios_entry + PAGE_OFFSET;
 135
 136                 local_irq_save(flags);
 137                 __asm__(
 138                         "lcall *(%%edi); cld\n\t"
 139                         "jc 1f\n\t"
 140                         "xor %%ah, %%ah\n"
 141                         "1:"
 142                         : "=d" (signature),
 143                           "=a" (eax),
 144                           "=b" (ebx),
 145                           "=c" (ecx)
 146                         : "1" (PCIBIOS_PCI_BIOS_PRESENT),
 147                           "D" (&pci_indirect)
 148                         : "memory");
 149                 local_irq_restore(flags);
 150
 151                 status = (eax >> 8) & 0xff;
 152                 hw_mech = eax & 0xff;
 153                 major_ver = (ebx >> 8) & 0xff;
 154                 minor_ver = ebx & 0xff;
 155                 if (pcibios_last_bus < 0)
 156                         pcibios_last_bus = ecx & 0xff;
 157                 DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
 158                         status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
 159                 if (status || signature != PCI_SIGNATURE) {
 160                         printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
 161                                 status, signature);
 162                         return 0;
 163                 }
 164                 printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
 165                         major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
 166 #ifdef CONFIG_PCI_DIRECT
 167                 if (!(hw_mech & PCIBIOS_HW_TYPE1))
 168                         pci_probe &= ~PCI_PROBE_CONF1;
 169                 if (!(hw_mech & PCIBIOS_HW_TYPE2))
 170                         pci_probe &= ~PCI_PROBE_CONF2;
 171 #endif
 172                 return 1;
 173         }
 174         return 0;
 175 }
 176
 177 static int pci_bios_read(unsigned int seg, unsigned int bus,
 178                          unsigned int devfn, int reg, int len, u32 *value)
 179 {
 180         unsigned long result = 0;
 181         unsigned long flags;
 182         unsigned long bx = (bus << 8) | devfn;
 183         u16 number = 0, mask = 0;
 184
 185         WARN_ON(seg);
 186         if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
 187                 return -EINVAL;
 188
 189         raw_spin_lock_irqsave(&pci_config_lock, flags);
 190
 191         switch (len) {
 192         case 1:
 193                 number = PCIBIOS_READ_CONFIG_BYTE;
 194                 mask = 0xff;
 195                 break;
 196         case 2:
 197                 number = PCIBIOS_READ_CONFIG_WORD;
 198                 mask = 0xffff;
 199                 break;
 200         case 4:
 201                 number = PCIBIOS_READ_CONFIG_DWORD;
 202                 break;
 203         }
 204
 205         __asm__("lcall *(%%esi); cld\n\t"
 206                 "jc 1f\n\t"
 207                 "xor %%ah, %%ah\n"
 208                 "1:"
 209                 : "=c" (*value),
 210                   "=a" (result)
 211                 : "1" (number),
 212                   "b" (bx),
 213                   "D" ((long)reg),
 214                   "S" (&pci_indirect));
 215         /*
 216          * Zero-extend the result beyond 8 or 16 bits, do not trust the
 217          * BIOS having done it:
 218          */
 219         if (mask)
 220                 *value &= mask;
 221
 222         raw_spin_unlock_irqrestore(&pci_config_lock, flags);
 223
 224         return (int)((result & 0xff00) >> 8);
 225 }
 226
 227 static int pci_bios_write(unsigned int seg, unsigned int bus,
 228                           unsigned int devfn, int reg, int len, u32 value)
 229 {
 230         unsigned long result = 0;
 231         unsigned long flags;
 232         unsigned long bx = (bus << 8) | devfn;
 233         u16 number = 0;
 234
 235         WARN_ON(seg);
 236         if ((bus > 255) || (devfn > 255) || (reg > 255))
 237                 return -EINVAL;
 238
 239         raw_spin_lock_irqsave(&pci_config_lock, flags);
 240
 241         switch (len) {
 242         case 1:
 243                 number = PCIBIOS_WRITE_CONFIG_BYTE;
 244                 break;
 245         case 2:
 246                 number = PCIBIOS_WRITE_CONFIG_WORD;
 247                 break;
 248         case 4:
 249                 number = PCIBIOS_WRITE_CONFIG_DWORD;
 250                 break;
 251         }
 252
 253         __asm__("lcall *(%%esi); cld\n\t"
 254                 "jc 1f\n\t"
 255                 "xor %%ah, %%ah\n"
 256                 "1:"
 257                 : "=a" (result)
 258                 : "0" (number),
 259                   "c" (value),
 260                   "b" (bx),
 261                   "D" ((long)reg),
 262                   "S" (&pci_indirect));
 263
 264         raw_spin_unlock_irqrestore(&pci_config_lock, flags);
 265
 266         return (int)((result & 0xff00) >> 8);
 267 }
 268
 269
 270 /*
 271  * Function table for BIOS32 access
 272  */
 273
 274 static const struct pci_raw_ops pci_bios_access = {
 275         .read =         pci_bios_read,
 276         .write =        pci_bios_write
 277 };
 278
 279 /*
 280  * Try to find PCI BIOS.
 281  */
 282
 283 static const struct pci_raw_ops *__init pci_find_bios(void)
 284 {
 285         union bios32 *check;
 286         unsigned char sum;
 287         int i, length;
 288
 289         /*
 290          * Follow the standard procedure for locating the BIOS32 Service
 291          * directory by scanning the permissible address range from
 292          * 0xe0000 through 0xfffff for a valid BIOS32 structure.
 293          */
 294
 295         for (check = (union bios32 *) __va(0xe0000);
 296              check <= (union bios32 *) __va(0xffff0);
 297              ++check) {
 298                 long sig;
 299                 if (probe_kernel_address(&check->fields.signature, sig))
 300                         continue;
 301
 302                 if (check->fields.signature != BIOS32_SIGNATURE)
 303                         continue;
 304                 length = check->fields.length * 16;
 305                 if (!length)
 306                         continue;
 307                 sum = 0;
 308                 for (i = 0; i < length ; ++i)
 309                         sum += check->chars[i];
 310                 if (sum != 0)
 311                         continue;
 312                 if (check->fields.revision != 0) {
 313                         printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
 314                                 check->fields.revision, check);
 315                         continue;
 316                 }
 317                 DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
 318                 if (check->fields.entry >= 0x100000) {
 319                         printk("PCI: BIOS32 entry (0x%p) in high memory, "
 320                                         "cannot use.\n", check);
 321                         return NULL;
 322                 } else {
 323                         unsigned long bios32_entry = check->fields.entry;
 324                         DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
 325                                         bios32_entry);
 326                         bios32_indirect.address = bios32_entry + PAGE_OFFSET;
 327                         set_bios_x();
 328                         if (check_pcibios())
 329                                 return &pci_bios_access;
 330                 }
 331                 break;  /* Hopefully more than one BIOS32 cannot happen... */
 332         }
 333
 334         return NULL;
 335 }
 336
 337 /*
 338  *  BIOS Functions for IRQ Routing
 339  */
 340
 341 struct irq_routing_options {
 342         u16 size;
 343         struct irq_info *table;
 344         u16 segment;
 345 } __attribute__((packed));
 346
 347 struct irq_routing_table * pcibios_get_irq_routing_table(void)
 348 {
 349         struct irq_routing_options opt;
 350         struct irq_routing_table *rt = NULL;
 351         int ret, map;
 352         unsigned long page;
 353
 354         if (!pci_bios_present)
 355                 return NULL;
 356         page = __get_free_page(GFP_KERNEL);
 357         if (!page)
 358                 return NULL;
 359         opt.table = (struct irq_info *) page;
 360         opt.size = PAGE_SIZE;
 361         opt.segment = __KERNEL_DS;
 362
 363         DBG("PCI: Fetching IRQ routing table... ");
 364         __asm__("push %%es\n\t"
 365                 "push %%ds\n\t"
 366                 "pop  %%es\n\t"
 367                 "lcall *(%%esi); cld\n\t"
 368                 "pop %%es\n\t"
 369                 "jc 1f\n\t"
 370                 "xor %%ah, %%ah\n"
 371                 "1:"
 372                 : "=a" (ret),
 373                   "=b" (map),
 374                   "=m" (opt)
 375                 : "0" (PCIBIOS_GET_ROUTING_OPTIONS),
 376                   "1" (0),
 377                   "D" ((long) &opt),
 378                   "S" (&pci_indirect),
 379                   "m" (opt)
 380                 : "memory");
 381         DBG("OK  ret=%d, size=%d, map=%x\n", ret, opt.size, map);
 382         if (ret & 0xff00)
 383                 printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
 384         else if (opt.size) {
 385                 rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
 386                 if (rt) {
 387                         memset(rt, 0, sizeof(struct irq_routing_table));
 388                         rt->size = opt.size + sizeof(struct irq_routing_table);
 389                         rt->exclusive_irqs = map;
 390                         memcpy(rt->slots, (void *) page, opt.size);
 391                         printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
 392                 }
 393         }
 394         free_page(page);
 395         return rt;
 396 }
 397 EXPORT_SYMBOL(pcibios_get_irq_routing_table);
 398
 399 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
 400 {
 401         int ret;
 402
 403         __asm__("lcall *(%%esi); cld\n\t"
 404                 "jc 1f\n\t"
 405                 "xor %%ah, %%ah\n"
 406                 "1:"
 407                 : "=a" (ret)
 408                 : "0" (PCIBIOS_SET_PCI_HW_INT),
 409                   "b" ((dev->bus->number << 8) | dev->devfn),
 410                   "c" ((irq << 8) | (pin + 10)),
 411                   "S" (&pci_indirect));
 412         return !(ret & 0xff00);
 413 }
 414 EXPORT_SYMBOL(pcibios_set_irq_routing);
 415
 416 void __init pci_pcbios_init(void)
 417 {
 418         if ((pci_probe & PCI_PROBE_BIOS)
 419                 && ((raw_pci_ops = pci_find_bios()))) {
 420                 pci_bios_present = 1;
 421         }
 422 }
 423