2 * intel_mid_sfi.c: Intel MID SFI initialization code
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/interrupt.h>
16 #include <linux/scatterlist.h>
17 #include <linux/sfi.h>
18 #include <linux/intel_pmic_gpio.h>
19 #include <linux/spi/spi.h>
20 #include <linux/i2c.h>
21 #include <linux/skbuff.h>
22 #include <linux/gpio.h>
23 #include <linux/gpio_keys.h>
24 #include <linux/input.h>
25 #include <linux/platform_device.h>
26 #include <linux/irq.h>
27 #include <linux/module.h>
28 #include <linux/notifier.h>
29 #include <linux/mmc/core.h>
30 #include <linux/mmc/card.h>
31 #include <linux/blkdev.h>
33 #include <asm/setup.h>
34 #include <asm/mpspec_def.h>
35 #include <asm/hw_irq.h>
37 #include <asm/io_apic.h>
38 #include <asm/intel-mid.h>
39 #include <asm/intel_mid_vrtc.h>
41 #include <asm/i8259.h>
42 #include <asm/intel_scu_ipc.h>
43 #include <asm/apb_timer.h>
44 #include <asm/reboot.h>
46 #define SFI_SIG_OEM0 "OEM0"
47 #define MAX_IPCDEVS 24
48 #define MAX_SCU_SPI 24
49 #define MAX_SCU_I2C 24
51 static struct platform_device
*ipc_devs
[MAX_IPCDEVS
];
52 static struct spi_board_info
*spi_devs
[MAX_SCU_SPI
];
53 static struct i2c_board_info
*i2c_devs
[MAX_SCU_I2C
];
54 static struct sfi_gpio_table_entry
*gpio_table
;
55 static struct sfi_timer_table_entry sfi_mtimer_array
[SFI_MTMR_MAX_NUM
];
56 static int ipc_next_dev
;
57 static int spi_next_dev
;
58 static int i2c_next_dev
;
59 static int i2c_bus
[MAX_SCU_I2C
];
60 static int gpio_num_entry
;
61 static u32 sfi_mtimer_usage
[SFI_MTMR_MAX_NUM
];
65 struct sfi_rtc_table_entry sfi_mrtc_array
[SFI_MRTC_MAX
];
66 EXPORT_SYMBOL_GPL(sfi_mrtc_array
);
68 struct blocking_notifier_head intel_scu_notifier
=
69 BLOCKING_NOTIFIER_INIT(intel_scu_notifier
);
70 EXPORT_SYMBOL_GPL(intel_scu_notifier
);
72 #define intel_mid_sfi_get_pdata(dev, priv) \
73 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL)
75 /* parse all the mtimer info to a static mtimer array */
76 int __init
sfi_parse_mtmr(struct sfi_table_header
*table
)
78 struct sfi_table_simple
*sb
;
79 struct sfi_timer_table_entry
*pentry
;
80 struct mpc_intsrc mp_irq
;
83 sb
= (struct sfi_table_simple
*)table
;
84 if (!sfi_mtimer_num
) {
85 sfi_mtimer_num
= SFI_GET_NUM_ENTRIES(sb
,
86 struct sfi_timer_table_entry
);
87 pentry
= (struct sfi_timer_table_entry
*) sb
->pentry
;
88 totallen
= sfi_mtimer_num
* sizeof(*pentry
);
89 memcpy(sfi_mtimer_array
, pentry
, totallen
);
92 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num
);
93 pentry
= sfi_mtimer_array
;
94 for (totallen
= 0; totallen
< sfi_mtimer_num
; totallen
++, pentry
++) {
95 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
96 totallen
, (u32
)pentry
->phys_addr
,
97 pentry
->freq_hz
, pentry
->irq
);
100 mp_irq
.type
= MP_INTSRC
;
101 mp_irq
.irqtype
= mp_INT
;
102 /* triggering mode edge bit 2-3, active high polarity bit 0-1 */
104 mp_irq
.srcbus
= MP_BUS_ISA
;
105 mp_irq
.srcbusirq
= pentry
->irq
; /* IRQ */
106 mp_irq
.dstapic
= MP_APIC_ALL
;
107 mp_irq
.dstirq
= pentry
->irq
;
108 mp_save_irq(&mp_irq
);
114 struct sfi_timer_table_entry
*sfi_get_mtmr(int hint
)
117 if (hint
< sfi_mtimer_num
) {
118 if (!sfi_mtimer_usage
[hint
]) {
119 pr_debug("hint taken for timer %d irq %d\n",
120 hint
, sfi_mtimer_array
[hint
].irq
);
121 sfi_mtimer_usage
[hint
] = 1;
122 return &sfi_mtimer_array
[hint
];
125 /* take the first timer available */
126 for (i
= 0; i
< sfi_mtimer_num
;) {
127 if (!sfi_mtimer_usage
[i
]) {
128 sfi_mtimer_usage
[i
] = 1;
129 return &sfi_mtimer_array
[i
];
136 void sfi_free_mtmr(struct sfi_timer_table_entry
*mtmr
)
139 for (i
= 0; i
< sfi_mtimer_num
;) {
140 if (mtmr
->irq
== sfi_mtimer_array
[i
].irq
) {
141 sfi_mtimer_usage
[i
] = 0;
148 /* parse all the mrtc info to a global mrtc array */
149 int __init
sfi_parse_mrtc(struct sfi_table_header
*table
)
151 struct sfi_table_simple
*sb
;
152 struct sfi_rtc_table_entry
*pentry
;
153 struct mpc_intsrc mp_irq
;
157 sb
= (struct sfi_table_simple
*)table
;
159 sfi_mrtc_num
= SFI_GET_NUM_ENTRIES(sb
,
160 struct sfi_rtc_table_entry
);
161 pentry
= (struct sfi_rtc_table_entry
*)sb
->pentry
;
162 totallen
= sfi_mrtc_num
* sizeof(*pentry
);
163 memcpy(sfi_mrtc_array
, pentry
, totallen
);
166 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num
);
167 pentry
= sfi_mrtc_array
;
168 for (totallen
= 0; totallen
< sfi_mrtc_num
; totallen
++, pentry
++) {
169 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
170 totallen
, (u32
)pentry
->phys_addr
, pentry
->irq
);
171 mp_irq
.type
= MP_INTSRC
;
172 mp_irq
.irqtype
= mp_INT
;
173 mp_irq
.irqflag
= 0xf; /* level trigger and active low */
174 mp_irq
.srcbus
= MP_BUS_ISA
;
175 mp_irq
.srcbusirq
= pentry
->irq
; /* IRQ */
176 mp_irq
.dstapic
= MP_APIC_ALL
;
177 mp_irq
.dstirq
= pentry
->irq
;
178 mp_save_irq(&mp_irq
);
185 * Parsing GPIO table first, since the DEVS table will need this table
186 * to map the pin name to the actual pin.
188 static int __init
sfi_parse_gpio(struct sfi_table_header
*table
)
190 struct sfi_table_simple
*sb
;
191 struct sfi_gpio_table_entry
*pentry
;
196 sb
= (struct sfi_table_simple
*)table
;
197 num
= SFI_GET_NUM_ENTRIES(sb
, struct sfi_gpio_table_entry
);
198 pentry
= (struct sfi_gpio_table_entry
*)sb
->pentry
;
200 gpio_table
= kmalloc(num
* sizeof(*pentry
), GFP_KERNEL
);
203 memcpy(gpio_table
, pentry
, num
* sizeof(*pentry
));
204 gpio_num_entry
= num
;
206 pr_debug("GPIO pin info:\n");
207 for (i
= 0; i
< num
; i
++, pentry
++)
208 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
210 pentry
->controller_name
,
216 int get_gpio_by_name(const char *name
)
218 struct sfi_gpio_table_entry
*pentry
= gpio_table
;
223 for (i
= 0; i
< gpio_num_entry
; i
++, pentry
++) {
224 if (!strncmp(name
, pentry
->pin_name
, SFI_NAME_LEN
))
225 return pentry
->pin_no
;
230 void __init
intel_scu_device_register(struct platform_device
*pdev
)
232 if (ipc_next_dev
== MAX_IPCDEVS
)
233 pr_err("too many SCU IPC devices");
235 ipc_devs
[ipc_next_dev
++] = pdev
;
238 static void __init
intel_scu_spi_device_register(struct spi_board_info
*sdev
)
240 struct spi_board_info
*new_dev
;
242 if (spi_next_dev
== MAX_SCU_SPI
) {
243 pr_err("too many SCU SPI devices");
247 new_dev
= kzalloc(sizeof(*sdev
), GFP_KERNEL
);
249 pr_err("failed to alloc mem for delayed spi dev %s\n",
253 memcpy(new_dev
, sdev
, sizeof(*sdev
));
255 spi_devs
[spi_next_dev
++] = new_dev
;
258 static void __init
intel_scu_i2c_device_register(int bus
,
259 struct i2c_board_info
*idev
)
261 struct i2c_board_info
*new_dev
;
263 if (i2c_next_dev
== MAX_SCU_I2C
) {
264 pr_err("too many SCU I2C devices");
268 new_dev
= kzalloc(sizeof(*idev
), GFP_KERNEL
);
270 pr_err("failed to alloc mem for delayed i2c dev %s\n",
274 memcpy(new_dev
, idev
, sizeof(*idev
));
276 i2c_bus
[i2c_next_dev
] = bus
;
277 i2c_devs
[i2c_next_dev
++] = new_dev
;
280 /* Called by IPC driver */
281 void intel_scu_devices_create(void)
285 for (i
= 0; i
< ipc_next_dev
; i
++)
286 platform_device_add(ipc_devs
[i
]);
288 for (i
= 0; i
< spi_next_dev
; i
++)
289 spi_register_board_info(spi_devs
[i
], 1);
291 for (i
= 0; i
< i2c_next_dev
; i
++) {
292 struct i2c_adapter
*adapter
;
293 struct i2c_client
*client
;
295 adapter
= i2c_get_adapter(i2c_bus
[i
]);
297 client
= i2c_new_device(adapter
, i2c_devs
[i
]);
299 pr_err("can't create i2c device %s\n",
302 i2c_register_board_info(i2c_bus
[i
], i2c_devs
[i
], 1);
304 intel_scu_notifier_post(SCU_AVAILABLE
, NULL
);
306 EXPORT_SYMBOL_GPL(intel_scu_devices_create
);
308 /* Called by IPC driver */
309 void intel_scu_devices_destroy(void)
313 intel_scu_notifier_post(SCU_DOWN
, NULL
);
315 for (i
= 0; i
< ipc_next_dev
; i
++)
316 platform_device_del(ipc_devs
[i
]);
318 EXPORT_SYMBOL_GPL(intel_scu_devices_destroy
);
320 static void __init
install_irq_resource(struct platform_device
*pdev
, int irq
)
322 /* Single threaded */
323 static struct resource res __initdata
= {
325 .flags
= IORESOURCE_IRQ
,
328 platform_device_add_resources(pdev
, &res
, 1);
331 static void __init
sfi_handle_ipc_dev(struct sfi_device_table_entry
*pentry
,
334 struct platform_device
*pdev
;
337 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
338 pentry
->name
, pentry
->irq
);
339 pdata
= intel_mid_sfi_get_pdata(dev
, pentry
);
341 pdev
= platform_device_alloc(pentry
->name
, 0);
343 pr_err("out of memory for SFI platform device '%s'.\n",
347 install_irq_resource(pdev
, pentry
->irq
);
349 pdev
->dev
.platform_data
= pdata
;
350 platform_device_add(pdev
);
353 static void __init
sfi_handle_spi_dev(struct sfi_device_table_entry
*pentry
,
356 struct spi_board_info spi_info
;
359 memset(&spi_info
, 0, sizeof(spi_info
));
360 strncpy(spi_info
.modalias
, pentry
->name
, SFI_NAME_LEN
);
361 spi_info
.irq
= ((pentry
->irq
== (u8
)0xff) ? 0 : pentry
->irq
);
362 spi_info
.bus_num
= pentry
->host_num
;
363 spi_info
.chip_select
= pentry
->addr
;
364 spi_info
.max_speed_hz
= pentry
->max_freq
;
365 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n",
369 spi_info
.max_speed_hz
,
370 spi_info
.chip_select
);
372 pdata
= intel_mid_sfi_get_pdata(dev
, &spi_info
);
374 spi_info
.platform_data
= pdata
;
376 intel_scu_spi_device_register(&spi_info
);
378 spi_register_board_info(&spi_info
, 1);
381 static void __init
sfi_handle_i2c_dev(struct sfi_device_table_entry
*pentry
,
384 struct i2c_board_info i2c_info
;
387 memset(&i2c_info
, 0, sizeof(i2c_info
));
388 strncpy(i2c_info
.type
, pentry
->name
, SFI_NAME_LEN
);
389 i2c_info
.irq
= ((pentry
->irq
== (u8
)0xff) ? 0 : pentry
->irq
);
390 i2c_info
.addr
= pentry
->addr
;
391 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n",
396 pdata
= intel_mid_sfi_get_pdata(dev
, &i2c_info
);
397 i2c_info
.platform_data
= pdata
;
400 intel_scu_i2c_device_register(pentry
->host_num
, &i2c_info
);
402 i2c_register_board_info(pentry
->host_num
, &i2c_info
, 1);
405 extern struct devs_id
*const __x86_intel_mid_dev_start
[],
406 *const __x86_intel_mid_dev_end
[];
408 static struct devs_id __init
*get_device_id(u8 type
, char *name
)
410 struct devs_id
*const *dev_table
;
412 for (dev_table
= __x86_intel_mid_dev_start
;
413 dev_table
< __x86_intel_mid_dev_end
; dev_table
++) {
414 struct devs_id
*dev
= *dev_table
;
415 if (dev
->type
== type
&&
416 !strncmp(dev
->name
, name
, SFI_NAME_LEN
)) {
424 static int __init
sfi_parse_devs(struct sfi_table_header
*table
)
426 struct sfi_table_simple
*sb
;
427 struct sfi_device_table_entry
*pentry
;
428 struct devs_id
*dev
= NULL
;
431 struct io_apic_irq_attr irq_attr
;
433 sb
= (struct sfi_table_simple
*)table
;
434 num
= SFI_GET_NUM_ENTRIES(sb
, struct sfi_device_table_entry
);
435 pentry
= (struct sfi_device_table_entry
*)sb
->pentry
;
437 for (i
= 0; i
< num
; i
++, pentry
++) {
438 int irq
= pentry
->irq
;
440 if (irq
!= (u8
)0xff) { /* native RTE case */
441 /* these SPI2 devices are not exposed to system as PCI
442 * devices, but they have separate RTE entry in IOAPIC
443 * so we have to enable them one by one here
445 ioapic
= mp_find_ioapic(irq
);
446 irq_attr
.ioapic
= ioapic
;
447 irq_attr
.ioapic_pin
= irq
;
448 irq_attr
.trigger
= 1;
449 irq_attr
.polarity
= 1;
450 io_apic_set_pci_routing(NULL
, irq
, &irq_attr
);
452 irq
= 0; /* No irq */
454 dev
= get_device_id(pentry
->type
, pentry
->name
);
459 if (dev
->device_handler
) {
460 dev
->device_handler(pentry
, dev
);
462 switch (pentry
->type
) {
463 case SFI_DEV_TYPE_IPC
:
464 sfi_handle_ipc_dev(pentry
, dev
);
466 case SFI_DEV_TYPE_SPI
:
467 sfi_handle_spi_dev(pentry
, dev
);
469 case SFI_DEV_TYPE_I2C
:
470 sfi_handle_i2c_dev(pentry
, dev
);
472 case SFI_DEV_TYPE_UART
:
473 case SFI_DEV_TYPE_HSI
:
482 static int __init
intel_mid_platform_init(void)
484 sfi_table_parse(SFI_SIG_GPIO
, NULL
, NULL
, sfi_parse_gpio
);
485 sfi_table_parse(SFI_SIG_DEVS
, NULL
, NULL
, sfi_parse_devs
);
488 arch_initcall(intel_mid_platform_init
);