2 * arch/xtensa/kernel/setup.c
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 1995 Linus Torvalds
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 * Chris Zankel <chris@zankel.net>
12 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
14 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
17 #include <linux/errno.h>
18 #include <linux/init.h>
20 #include <linux/proc_fs.h>
21 #include <linux/screen_info.h>
22 #include <linux/bootmem.h>
23 #include <linux/kernel.h>
24 #include <linux/percpu.h>
25 #include <linux/clk-provider.h>
26 #include <linux/cpu.h>
27 #include <linux/of_fdt.h>
28 #include <linux/of_platform.h>
30 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
31 # include <linux/console.h>
35 # include <linux/timex.h>
39 # include <linux/seq_file.h>
42 #include <asm/bootparam.h>
43 #include <asm/mmu_context.h>
44 #include <asm/pgtable.h>
45 #include <asm/processor.h>
46 #include <asm/timex.h>
47 #include <asm/platform.h>
49 #include <asm/setup.h>
50 #include <asm/param.h>
51 #include <asm/traps.h>
54 #include <platform/hardware.h>
56 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
57 struct screen_info screen_info
= { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
60 #ifdef CONFIG_BLK_DEV_FD
61 extern struct fd_ops no_fd_ops
;
62 struct fd_ops
*fd_ops
;
65 extern struct rtc_ops no_rtc_ops
;
66 struct rtc_ops
*rtc_ops
;
68 #ifdef CONFIG_BLK_DEV_INITRD
69 extern unsigned long initrd_start
;
70 extern unsigned long initrd_end
;
71 int initrd_is_mapped
= 0;
72 extern int initrd_below_start_ok
;
76 extern u32 __dtb_start
[];
77 void *dtb_start
= __dtb_start
;
80 unsigned char aux_device_present
;
81 extern unsigned long loops_per_jiffy
;
83 /* Command line specified as configuration option. */
85 static char __initdata command_line
[COMMAND_LINE_SIZE
];
87 #ifdef CONFIG_CMDLINE_BOOL
88 static char default_command_line
[COMMAND_LINE_SIZE
] __initdata
= CONFIG_CMDLINE
;
91 sysmem_info_t __initdata sysmem
;
93 extern int mem_reserve(unsigned long, unsigned long, int);
94 extern void bootmem_init(void);
95 extern void zones_init(void);
98 * Boot parameter parsing.
100 * The Xtensa port uses a list of variable-sized tags to pass data to
101 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
102 * to be recognised. The list is terminated with a zero-sized
106 typedef struct tagtable
{
108 int (*parse
)(const bp_tag_t
*);
111 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
112 __attribute__((used, section(".taglist"))) = { tag, fn }
114 /* parse current tag */
116 static int __init
add_sysmem_bank(unsigned long type
, unsigned long start
,
119 if (sysmem
.nr_banks
>= SYSMEM_BANKS_MAX
) {
121 "Ignoring memory bank 0x%08lx size %ldKB\n",
125 sysmem
.bank
[sysmem
.nr_banks
].type
= type
;
126 sysmem
.bank
[sysmem
.nr_banks
].start
= PAGE_ALIGN(start
);
127 sysmem
.bank
[sysmem
.nr_banks
].end
= end
& PAGE_MASK
;
133 static int __init
parse_tag_mem(const bp_tag_t
*tag
)
135 meminfo_t
*mi
= (meminfo_t
*)(tag
->data
);
137 if (mi
->type
!= MEMORY_TYPE_CONVENTIONAL
)
140 return add_sysmem_bank(mi
->type
, mi
->start
, mi
->end
);
143 __tagtable(BP_TAG_MEMORY
, parse_tag_mem
);
145 #ifdef CONFIG_BLK_DEV_INITRD
147 static int __init
parse_tag_initrd(const bp_tag_t
* tag
)
150 mi
= (meminfo_t
*)(tag
->data
);
151 initrd_start
= (unsigned long)__va(mi
->start
);
152 initrd_end
= (unsigned long)__va(mi
->end
);
157 __tagtable(BP_TAG_INITRD
, parse_tag_initrd
);
161 static int __init
parse_tag_fdt(const bp_tag_t
*tag
)
163 dtb_start
= __va(tag
->data
[0]);
167 __tagtable(BP_TAG_FDT
, parse_tag_fdt
);
169 #endif /* CONFIG_OF */
171 #endif /* CONFIG_BLK_DEV_INITRD */
173 static int __init
parse_tag_cmdline(const bp_tag_t
* tag
)
175 strlcpy(command_line
, (char *)(tag
->data
), COMMAND_LINE_SIZE
);
179 __tagtable(BP_TAG_COMMAND_LINE
, parse_tag_cmdline
);
181 static int __init
parse_bootparam(const bp_tag_t
* tag
)
183 extern tagtable_t __tagtable_begin
, __tagtable_end
;
186 /* Boot parameters must start with a BP_TAG_FIRST tag. */
188 if (tag
->id
!= BP_TAG_FIRST
) {
189 printk(KERN_WARNING
"Invalid boot parameters!\n");
193 tag
= (bp_tag_t
*)((unsigned long)tag
+ sizeof(bp_tag_t
) + tag
->size
);
195 /* Parse all tags. */
197 while (tag
!= NULL
&& tag
->id
!= BP_TAG_LAST
) {
198 for (t
= &__tagtable_begin
; t
< &__tagtable_end
; t
++) {
199 if (tag
->id
== t
->tag
) {
204 if (t
== &__tagtable_end
)
205 printk(KERN_WARNING
"Ignoring tag "
206 "0x%08x\n", tag
->id
);
207 tag
= (bp_tag_t
*)((unsigned long)(tag
+ 1) + tag
->size
);
214 bool __initdata dt_memory_scan
= false;
216 #if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
217 unsigned long xtensa_kio_paddr
= XCHAL_KIO_DEFAULT_PADDR
;
218 EXPORT_SYMBOL(xtensa_kio_paddr
);
220 static int __init
xtensa_dt_io_area(unsigned long node
, const char *uname
,
221 int depth
, void *data
)
223 const __be32
*ranges
;
229 if (!of_flat_dt_is_compatible(node
, "simple-bus"))
232 ranges
= of_get_flat_dt_prop(node
, "ranges", &len
);
238 xtensa_kio_paddr
= of_read_ulong(ranges
+1, 1);
239 /* round down to nearest 256MB boundary */
240 xtensa_kio_paddr
&= 0xf0000000;
245 static int __init
xtensa_dt_io_area(unsigned long node
, const char *uname
,
246 int depth
, void *data
)
252 void __init
early_init_dt_add_memory_arch(u64 base
, u64 size
)
258 add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL
, base
, base
+ size
);
261 void * __init
early_init_dt_alloc_memory_arch(u64 size
, u64 align
)
263 return __alloc_bootmem(size
, align
, 0);
266 void __init
early_init_devtree(void *params
)
268 if (sysmem
.nr_banks
== 0)
269 dt_memory_scan
= true;
271 early_init_dt_scan(params
);
272 of_scan_flat_dt(xtensa_dt_io_area
, NULL
);
274 if (!command_line
[0])
275 strlcpy(command_line
, boot_command_line
, COMMAND_LINE_SIZE
);
278 static int __init
xtensa_device_probe(void)
281 of_platform_populate(NULL
, of_default_bus_match_table
, NULL
, NULL
);
285 device_initcall(xtensa_device_probe
);
287 #endif /* CONFIG_OF */
290 * Initialize architecture. (Early stage)
293 void __init
init_arch(bp_tag_t
*bp_start
)
297 /* Parse boot parameters */
300 parse_bootparam(bp_start
);
303 early_init_devtree(dtb_start
);
306 if (sysmem
.nr_banks
== 0) {
308 sysmem
.bank
[0].start
= PLATFORM_DEFAULT_MEM_START
;
309 sysmem
.bank
[0].end
= PLATFORM_DEFAULT_MEM_START
310 + PLATFORM_DEFAULT_MEM_SIZE
;
313 #ifdef CONFIG_CMDLINE_BOOL
314 if (!command_line
[0])
315 strlcpy(command_line
, default_command_line
, COMMAND_LINE_SIZE
);
318 /* Early hook for platforms */
320 platform_init(bp_start
);
322 /* Initialize MMU. */
328 * Initialize system. Setup memory and reserve regions.
333 extern char _WindowVectors_text_start
;
334 extern char _WindowVectors_text_end
;
335 extern char _DebugInterruptVector_literal_start
;
336 extern char _DebugInterruptVector_text_end
;
337 extern char _KernelExceptionVector_literal_start
;
338 extern char _KernelExceptionVector_text_end
;
339 extern char _UserExceptionVector_literal_start
;
340 extern char _UserExceptionVector_text_end
;
341 extern char _DoubleExceptionVector_literal_start
;
342 extern char _DoubleExceptionVector_text_end
;
343 #if XCHAL_EXCM_LEVEL >= 2
344 extern char _Level2InterruptVector_text_start
;
345 extern char _Level2InterruptVector_text_end
;
347 #if XCHAL_EXCM_LEVEL >= 3
348 extern char _Level3InterruptVector_text_start
;
349 extern char _Level3InterruptVector_text_end
;
351 #if XCHAL_EXCM_LEVEL >= 4
352 extern char _Level4InterruptVector_text_start
;
353 extern char _Level4InterruptVector_text_end
;
355 #if XCHAL_EXCM_LEVEL >= 5
356 extern char _Level5InterruptVector_text_start
;
357 extern char _Level5InterruptVector_text_end
;
359 #if XCHAL_EXCM_LEVEL >= 6
360 extern char _Level6InterruptVector_text_start
;
361 extern char _Level6InterruptVector_text_end
;
366 #ifdef CONFIG_S32C1I_SELFTEST
367 #if XCHAL_HAVE_S32C1I
369 static int __initdata rcw_word
, rcw_probe_pc
, rcw_exc
;
372 * Basic atomic compare-and-swap, that records PC of S32C1I for probing.
374 * If *v == cmp, set *v = set. Return previous *v.
376 static inline int probed_compare_swap(int *v
, int cmp
, int set
)
380 __asm__
__volatile__(
383 " wsr %2, scompare1\n"
384 "1: s32c1i %0, %3, 0\n"
385 : "=a" (set
), "=&a" (tmp
)
386 : "a" (cmp
), "a" (v
), "a" (&rcw_probe_pc
), "0" (set
)
392 /* Handle probed exception */
394 static void __init
do_probed_exception(struct pt_regs
*regs
,
395 unsigned long exccause
)
397 if (regs
->pc
== rcw_probe_pc
) { /* exception on s32c1i ? */
398 regs
->pc
+= 3; /* skip the s32c1i instruction */
401 do_unhandled(regs
, exccause
);
405 /* Simple test of S32C1I (soc bringup assist) */
407 static int __init
check_s32c1i(void)
409 int n
, cause1
, cause2
;
410 void *handbus
, *handdata
, *handaddr
; /* temporarily saved handlers */
413 handbus
= trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR
,
414 do_probed_exception
);
415 handdata
= trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR
,
416 do_probed_exception
);
417 handaddr
= trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR
,
418 do_probed_exception
);
420 /* First try an S32C1I that does not store: */
423 n
= probed_compare_swap(&rcw_word
, 0, 2);
426 /* took exception? */
428 /* unclean exception? */
429 if (n
!= 2 || rcw_word
!= 1)
430 panic("S32C1I exception error");
431 } else if (rcw_word
!= 1 || n
!= 1) {
432 panic("S32C1I compare error");
435 /* Then an S32C1I that stores: */
437 rcw_word
= 0x1234567;
438 n
= probed_compare_swap(&rcw_word
, 0x1234567, 0xabcde);
442 /* unclean exception? */
443 if (n
!= 0xabcde || rcw_word
!= 0x1234567)
444 panic("S32C1I exception error (b)");
445 } else if (rcw_word
!= 0xabcde || n
!= 0x1234567) {
446 panic("S32C1I store error");
449 /* Verify consistency of exceptions: */
450 if (cause1
|| cause2
) {
451 pr_warn("S32C1I took exception %d, %d\n", cause1
, cause2
);
452 /* If emulation of S32C1I upon bus error gets implemented,
453 we can get rid of this panic for single core (not SMP) */
454 panic("S32C1I exceptions not currently supported");
456 if (cause1
!= cause2
)
457 panic("inconsistent S32C1I exceptions");
459 trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR
, handbus
);
460 trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR
, handdata
);
461 trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR
, handaddr
);
465 #else /* XCHAL_HAVE_S32C1I */
467 /* This condition should not occur with a commercially deployed processor.
468 Display reminder for early engr test or demo chips / FPGA bitstreams */
469 static int __init
check_s32c1i(void)
471 pr_warn("Processor configuration lacks atomic compare-and-swap support!\n");
475 #endif /* XCHAL_HAVE_S32C1I */
476 early_initcall(check_s32c1i
);
477 #endif /* CONFIG_S32C1I_SELFTEST */
480 void __init
setup_arch(char **cmdline_p
)
482 strlcpy(boot_command_line
, command_line
, COMMAND_LINE_SIZE
);
483 *cmdline_p
= command_line
;
485 /* Reserve some memory regions */
487 #ifdef CONFIG_BLK_DEV_INITRD
488 if (initrd_start
< initrd_end
) {
489 initrd_is_mapped
= mem_reserve(__pa(initrd_start
),
490 __pa(initrd_end
), 0);
491 initrd_below_start_ok
= 1;
497 mem_reserve(__pa(&_stext
),__pa(&_end
), 1);
499 mem_reserve(__pa(&_WindowVectors_text_start
),
500 __pa(&_WindowVectors_text_end
), 0);
502 mem_reserve(__pa(&_DebugInterruptVector_literal_start
),
503 __pa(&_DebugInterruptVector_text_end
), 0);
505 mem_reserve(__pa(&_KernelExceptionVector_literal_start
),
506 __pa(&_KernelExceptionVector_text_end
), 0);
508 mem_reserve(__pa(&_UserExceptionVector_literal_start
),
509 __pa(&_UserExceptionVector_text_end
), 0);
511 mem_reserve(__pa(&_DoubleExceptionVector_literal_start
),
512 __pa(&_DoubleExceptionVector_text_end
), 0);
514 #if XCHAL_EXCM_LEVEL >= 2
515 mem_reserve(__pa(&_Level2InterruptVector_text_start
),
516 __pa(&_Level2InterruptVector_text_end
), 0);
518 #if XCHAL_EXCM_LEVEL >= 3
519 mem_reserve(__pa(&_Level3InterruptVector_text_start
),
520 __pa(&_Level3InterruptVector_text_end
), 0);
522 #if XCHAL_EXCM_LEVEL >= 4
523 mem_reserve(__pa(&_Level4InterruptVector_text_start
),
524 __pa(&_Level4InterruptVector_text_end
), 0);
526 #if XCHAL_EXCM_LEVEL >= 5
527 mem_reserve(__pa(&_Level5InterruptVector_text_start
),
528 __pa(&_Level5InterruptVector_text_end
), 0);
530 #if XCHAL_EXCM_LEVEL >= 6
531 mem_reserve(__pa(&_Level6InterruptVector_text_start
),
532 __pa(&_Level6InterruptVector_text_end
), 0);
537 unflatten_and_copy_device_tree();
539 platform_setup(cmdline_p
);
549 # if defined(CONFIG_VGA_CONSOLE)
550 conswitchp
= &vga_con
;
551 # elif defined(CONFIG_DUMMY_CONSOLE)
552 conswitchp
= &dummy_con
;
557 platform_pcibios_init();
561 static DEFINE_PER_CPU(struct cpu
, cpu_data
);
563 static int __init
topology_init(void)
567 for_each_possible_cpu(i
) {
568 struct cpu
*cpu
= &per_cpu(cpu_data
, i
);
569 cpu
->hotpluggable
= !!i
;
570 register_cpu(cpu
, i
);
575 subsys_initcall(topology_init
);
577 void machine_restart(char * cmd
)
582 void machine_halt(void)
588 void machine_power_off(void)
590 platform_power_off();
593 #ifdef CONFIG_PROC_FS
596 * Display some core information through /proc/cpuinfo.
600 c_show(struct seq_file
*f
, void *slot
)
602 char buf
[NR_CPUS
* 5];
604 cpulist_scnprintf(buf
, sizeof(buf
), cpu_online_mask
);
605 /* high-level stuff */
606 seq_printf(f
, "CPU count\t: %u\n"
608 "vendor_id\t: Tensilica\n"
609 "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME
"\n"
610 "core ID\t\t: " XCHAL_CORE_ID
"\n"
613 "cpu MHz\t\t: %lu.%02lu\n"
614 "bogomips\t: %lu.%02lu\n",
617 XCHAL_BUILD_UNIQUE_ID
,
618 XCHAL_HAVE_BE
? "big" : "little",
620 (ccount_freq
/10000) % 100,
621 loops_per_jiffy
/(500000/HZ
),
622 (loops_per_jiffy
/(5000/HZ
)) % 100);
624 seq_printf(f
,"flags\t\t: "
634 #if XCHAL_HAVE_DENSITY
637 #if XCHAL_HAVE_BOOLEANS
646 #if XCHAL_HAVE_MINMAX
652 #if XCHAL_HAVE_CLAMPS
664 #if XCHAL_HAVE_MUL32_HIGH
670 #if XCHAL_HAVE_S32C1I
676 seq_printf(f
,"physical aregs\t: %d\n"
687 seq_printf(f
,"num ints\t: %d\n"
691 "debug level\t: %d\n",
692 XCHAL_NUM_INTERRUPTS
,
693 XCHAL_NUM_EXTINTERRUPTS
,
699 seq_printf(f
,"icache line size: %d\n"
700 "icache ways\t: %d\n"
701 "icache size\t: %d\n"
703 #if XCHAL_ICACHE_LINE_LOCKABLE
707 "dcache line size: %d\n"
708 "dcache ways\t: %d\n"
709 "dcache size\t: %d\n"
711 #if XCHAL_DCACHE_IS_WRITEBACK
714 #if XCHAL_DCACHE_LINE_LOCKABLE
718 XCHAL_ICACHE_LINESIZE
,
721 XCHAL_DCACHE_LINESIZE
,
729 * We show only CPU #0 info.
732 c_start(struct seq_file
*f
, loff_t
*pos
)
734 return (*pos
== 0) ? (void *)1 : NULL
;
738 c_next(struct seq_file
*f
, void *v
, loff_t
*pos
)
744 c_stop(struct seq_file
*f
, void *v
)
748 const struct seq_operations cpuinfo_op
=
756 #endif /* CONFIG_PROC_FS */