bfe31c6cd4ee10bb34d4a5ad94027c2ac5048e40
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
7 This file is part of BFD, the Binary File Descriptor library.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22
23 #include "bfd.h"
24 #include "sysdep.h"
25 #include "libbfd.h"
26 #include "bfdlink.h"
27 #include "genlink.h"
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
30 #include "libcoff.h"
31 #include "libiberty.h"
32
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
40
41 struct funcvec_hash_entry
42 {
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
45
46 /* The offset within the vectors section where
47 this entry lives. */
48 bfd_vma offset;
49 };
50
51 struct funcvec_hash_table
52 {
53 /* The basic hash table. */
54 struct bfd_hash_table root;
55
56 bfd *abfd;
57
58 /* Offset at which we'll add the next entry. */
59 unsigned int offset;
60 };
61
62 static struct bfd_hash_entry *
63 funcvec_hash_newfunc
64 (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
65
66 static bfd_boolean
67 funcvec_hash_table_init
68 (struct funcvec_hash_table *, bfd *,
69 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
70 struct bfd_hash_table *,
71 const char *));
72
73 static bfd_reloc_status_type special
74 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
75 static int select_reloc
76 (reloc_howto_type *);
77 static void rtype2howto
78 (arelent *, struct internal_reloc *);
79 static void reloc_processing
80 (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *);
81 static bfd_boolean h8300_symbol_address_p
82 (bfd *, asection *, bfd_vma);
83 static int h8300_reloc16_estimate
84 (bfd *, asection *, arelent *, unsigned int,
85 struct bfd_link_info *);
86 static void h8300_reloc16_extra_cases
87 (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
88 bfd_byte *, unsigned int *, unsigned int *);
89 static bfd_boolean h8300_bfd_link_add_symbols
90 (bfd *, struct bfd_link_info *);
91
92 /* To lookup a value in the function vector hash table. */
93 #define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
96
97 /* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
101 struct h8300_coff_link_hash_table {
102 /* The main hash table. */
103 struct generic_link_hash_table root;
104
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection *vectors_sec;
108
109 /* Hash table of the functions we need to enter into the function
110 vector. */
111 struct funcvec_hash_table *funcvec_hash_table;
112 };
113
114 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *);
115
116 /* Get the H8/300 COFF linker hash table from a link_info structure. */
117
118 #define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
120
121 /* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
123
124 static struct bfd_hash_entry *
125 funcvec_hash_newfunc (struct bfd_hash_entry *entry,
126 struct bfd_hash_table *gen_table,
127 const char *string)
128 {
129 struct funcvec_hash_entry *ret;
130 struct funcvec_hash_table *table;
131
132 ret = (struct funcvec_hash_entry *) entry;
133 table = (struct funcvec_hash_table *) gen_table;
134
135 /* Allocate the structure if it has not already been allocated by a
136 subclass. */
137 if (ret == NULL)
138 ret = ((struct funcvec_hash_entry *)
139 bfd_hash_allocate (gen_table,
140 sizeof (struct funcvec_hash_entry)));
141 if (ret == NULL)
142 return NULL;
143
144 /* Call the allocation method of the superclass. */
145 ret = ((struct funcvec_hash_entry *)
146 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
147
148 if (ret == NULL)
149 return NULL;
150
151 /* Note where this entry will reside in the function vector table. */
152 ret->offset = table->offset;
153
154 /* Bump the offset at which we store entries in the function
155 vector. We'd like to bump up the size of the vectors section,
156 but it's not easily available here. */
157 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
158 table->offset += 2;
159 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
160 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
161 table->offset += 4;
162 else
163 return NULL;
164
165 /* Everything went OK. */
166 return (struct bfd_hash_entry *) ret;
167 }
168
169 /* Initialize the function vector hash table. */
170
171 static bfd_boolean
172 funcvec_hash_table_init (struct funcvec_hash_table *table,
173 bfd *abfd,
174 struct bfd_hash_entry *(*newfunc)
175 (struct bfd_hash_entry *,
176 struct bfd_hash_table *,
177 const char *))
178 {
179 /* Initialize our local fields, then call the generic initialization
180 routine. */
181 table->offset = 0;
182 table->abfd = abfd;
183 return (bfd_hash_table_init (&table->root, newfunc));
184 }
185
186 /* Create the derived linker hash table. We use a derived hash table
187 basically to hold "static" information during an H8/300 coff link
188 without using static variables. */
189
190 static struct bfd_link_hash_table *
191 h8300_coff_link_hash_table_create (bfd *abfd)
192 {
193 struct h8300_coff_link_hash_table *ret;
194 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
195
196 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
197 if (ret == NULL)
198 return NULL;
199 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
200 _bfd_generic_link_hash_newfunc))
201 {
202 free (ret);
203 return NULL;
204 }
205
206 /* Initialize our data. */
207 ret->vectors_sec = NULL;
208 ret->funcvec_hash_table = NULL;
209
210 /* OK. Everything's initialized, return the base pointer. */
211 return &ret->root.root;
212 }
213
214 /* Special handling for H8/300 relocs.
215 We only come here for pcrel stuff and return normally if not an -r link.
216 When doing -r, we can't do any arithmetic for the pcrel stuff, because
217 the code in reloc.c assumes that we can manipulate the targets of
218 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
219 which means that the gap after the instruction may not be enough to
220 contain the offset required for the branch, so we have to use only
221 the addend until the final link. */
222
223 static bfd_reloc_status_type
224 special (bfd *abfd ATTRIBUTE_UNUSED,
225 arelent *reloc_entry ATTRIBUTE_UNUSED,
226 asymbol *symbol ATTRIBUTE_UNUSED,
227 PTR data ATTRIBUTE_UNUSED,
228 asection *input_section ATTRIBUTE_UNUSED,
229 bfd *output_bfd,
230 char **error_message ATTRIBUTE_UNUSED)
231 {
232 if (output_bfd == (bfd *) NULL)
233 return bfd_reloc_continue;
234
235 /* Adjust the reloc address to that in the output section. */
236 reloc_entry->address += input_section->output_offset;
237 return bfd_reloc_ok;
238 }
239
240 static reloc_howto_type howto_table[] = {
241 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
242 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
243 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
244 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
245 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
246 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
247 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
248 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
249 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
250 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
251 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
252 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
253 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
254 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
255
256 /* An indirect reference to a function. This causes the function's address
257 to be added to the function vector in lo-mem and puts the address of
258 the function vector's entry in the jsr instruction. */
259 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
260
261 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
262 branch is turned into an 8bit pc-relative branch. */
263 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
264
265 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
266
267 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
268
269 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
270
271 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
272 };
273
274 /* Turn a howto into a reloc number. */
275
276 #define SELECT_RELOC(x,howto) \
277 { x.r_type = select_reloc (howto); }
278
279 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
280 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
281 #define H8300 1 /* Customize coffcode.h */
282 #define __A_MAGIC_SET__
283
284 /* Code to swap in the reloc. */
285 #define SWAP_IN_RELOC_OFFSET H_GET_32
286 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
287 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
288 dst->r_stuff[0] = 'S'; \
289 dst->r_stuff[1] = 'C';
290
291 static int
292 select_reloc (reloc_howto_type *howto)
293 {
294 return howto->type;
295 }
296
297 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
298
299 static void
300 rtype2howto (arelent *internal, struct internal_reloc *dst)
301 {
302 switch (dst->r_type)
303 {
304 case R_RELBYTE:
305 internal->howto = howto_table + 0;
306 break;
307 case R_RELWORD:
308 internal->howto = howto_table + 1;
309 break;
310 case R_RELLONG:
311 internal->howto = howto_table + 2;
312 break;
313 case R_PCRBYTE:
314 internal->howto = howto_table + 3;
315 break;
316 case R_PCRWORD:
317 internal->howto = howto_table + 4;
318 break;
319 case R_PCRLONG:
320 internal->howto = howto_table + 5;
321 break;
322 case R_MOV16B1:
323 internal->howto = howto_table + 6;
324 break;
325 case R_MOV16B2:
326 internal->howto = howto_table + 7;
327 break;
328 case R_JMP1:
329 internal->howto = howto_table + 8;
330 break;
331 case R_JMP2:
332 internal->howto = howto_table + 9;
333 break;
334 case R_JMPL1:
335 internal->howto = howto_table + 10;
336 break;
337 case R_JMPL2:
338 internal->howto = howto_table + 11;
339 break;
340 case R_MOV24B1:
341 internal->howto = howto_table + 12;
342 break;
343 case R_MOV24B2:
344 internal->howto = howto_table + 13;
345 break;
346 case R_MEM_INDIRECT:
347 internal->howto = howto_table + 14;
348 break;
349 case R_PCRWORD_B:
350 internal->howto = howto_table + 15;
351 break;
352 case R_MOVL1:
353 internal->howto = howto_table + 16;
354 break;
355 case R_MOVL2:
356 internal->howto = howto_table + 17;
357 break;
358 case R_BCC_INV:
359 internal->howto = howto_table + 18;
360 break;
361 case R_JMP_DEL:
362 internal->howto = howto_table + 19;
363 break;
364 default:
365 abort ();
366 break;
367 }
368 }
369
370 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
371
372 /* Perform any necessary magic to the addend in a reloc entry. */
373
374 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
375 cache_ptr->addend = ext_reloc.r_offset;
376
377 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
378 reloc_processing (relent, reloc, symbols, abfd, section)
379
380 static void
381 reloc_processing (arelent *relent, struct internal_reloc *reloc,
382 asymbol **symbols, bfd *abfd, asection *section)
383 {
384 relent->address = reloc->r_vaddr;
385 rtype2howto (relent, reloc);
386
387 if (((int) reloc->r_symndx) > 0)
388 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
389 else
390 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
391
392 relent->addend = reloc->r_offset;
393
394 relent->address -= section->vma;
395 #if 0
396 relent->section = 0;
397 #endif
398 }
399
400 static bfd_boolean
401 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address)
402 {
403 asymbol **s;
404
405 s = _bfd_generic_link_get_symbols (abfd);
406 BFD_ASSERT (s != (asymbol **) NULL);
407
408 /* Search all the symbols for one in INPUT_SECTION with
409 address ADDRESS. */
410 while (*s)
411 {
412 asymbol *p = *s;
413
414 if (p->section == input_section
415 && (input_section->output_section->vma
416 + input_section->output_offset
417 + p->value) == address)
418 return TRUE;
419 s++;
420 }
421 return FALSE;
422 }
423
424 /* If RELOC represents a relaxable instruction/reloc, change it into
425 the relaxed reloc, notify the linker that symbol addresses
426 have changed (bfd_perform_slip) and return how much the current
427 section has shrunk by.
428
429 FIXME: Much of this code has knowledge of the ordering of entries
430 in the howto table. This needs to be fixed. */
431
432 static int
433 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc,
434 unsigned int shrink, struct bfd_link_info *link_info)
435 {
436 bfd_vma value;
437 bfd_vma dot;
438 bfd_vma gap;
439 static asection *last_input_section = NULL;
440 static arelent *last_reloc = NULL;
441
442 /* The address of the thing to be relocated will have moved back by
443 the size of the shrink - but we don't change reloc->address here,
444 since we need it to know where the relocation lives in the source
445 uncooked section. */
446 bfd_vma address = reloc->address - shrink;
447
448 if (input_section != last_input_section)
449 last_reloc = NULL;
450
451 /* Only examine the relocs which might be relaxable. */
452 switch (reloc->howto->type)
453 {
454 /* This is the 16/24 bit absolute branch which could become an 8 bit
455 pc-relative branch. */
456 case R_JMP1:
457 case R_JMPL1:
458 /* Get the address of the target of this branch. */
459 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
460
461 /* Get the address of the next instruction (not the reloc). */
462 dot = (input_section->output_section->vma
463 + input_section->output_offset + address);
464
465 /* Adjust for R_JMP1 vs R_JMPL1. */
466 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
467
468 /* Compute the distance from this insn to the branch target. */
469 gap = value - dot;
470
471 /* If the distance is within -128..+128 inclusive, then we can relax
472 this jump. +128 is valid since the target will move two bytes
473 closer if we do relax this branch. */
474 if ((int) gap >= -128 && (int) gap <= 128)
475 {
476 bfd_byte code;
477
478 if (!bfd_get_section_contents (abfd, input_section, & code,
479 reloc->address, 1))
480 break;
481 code = bfd_get_8 (abfd, & code);
482
483 /* It's possible we may be able to eliminate this branch entirely;
484 if the previous instruction is a branch around this instruction,
485 and there's no label at this instruction, then we can reverse
486 the condition on the previous branch and eliminate this jump.
487
488 original: new:
489 bCC lab1 bCC' lab2
490 jmp lab2
491 lab1: lab1:
492
493 This saves 4 bytes instead of two, and should be relatively
494 common.
495
496 Only perform this optimisation for jumps (code 0x5a) not
497 subroutine calls, as otherwise it could transform:
498
499 mov.w r0,r0
500 beq .L1
501 jsr @_bar
502 .L1: rts
503 _bar: rts
504 into:
505 mov.w r0,r0
506 bne _bar
507 rts
508 _bar: rts
509
510 which changes the call (jsr) into a branch (bne). */
511 if (code == 0x5a
512 && gap <= 126
513 && last_reloc
514 && last_reloc->howto->type == R_PCRBYTE)
515 {
516 bfd_vma last_value;
517 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
518 input_section) + 1;
519
520 if (last_value == dot + 2
521 && last_reloc->address + 1 == reloc->address
522 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
523 {
524 reloc->howto = howto_table + 19;
525 last_reloc->howto = howto_table + 18;
526 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
527 last_reloc->addend = reloc->addend;
528 shrink += 4;
529 bfd_perform_slip (abfd, 4, input_section, address);
530 break;
531 }
532 }
533
534 /* Change the reloc type. */
535 reloc->howto = reloc->howto + 1;
536
537 /* This shrinks this section by two bytes. */
538 shrink += 2;
539 bfd_perform_slip (abfd, 2, input_section, address);
540 }
541 break;
542
543 /* This is the 16 bit pc-relative branch which could become an 8 bit
544 pc-relative branch. */
545 case R_PCRWORD:
546 /* Get the address of the target of this branch, add one to the value
547 because the addend field in PCrel jumps is off by -1. */
548 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
549
550 /* Get the address of the next instruction if we were to relax. */
551 dot = input_section->output_section->vma +
552 input_section->output_offset + address;
553
554 /* Compute the distance from this insn to the branch target. */
555 gap = value - dot;
556
557 /* If the distance is within -128..+128 inclusive, then we can relax
558 this jump. +128 is valid since the target will move two bytes
559 closer if we do relax this branch. */
560 if ((int) gap >= -128 && (int) gap <= 128)
561 {
562 /* Change the reloc type. */
563 reloc->howto = howto_table + 15;
564
565 /* This shrinks this section by two bytes. */
566 shrink += 2;
567 bfd_perform_slip (abfd, 2, input_section, address);
568 }
569 break;
570
571 /* This is a 16 bit absolute address in a mov.b insn, which can
572 become an 8 bit absolute address if it's in the right range. */
573 case R_MOV16B1:
574 /* Get the address of the data referenced by this mov.b insn. */
575 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
576 value = bfd_h8300_pad_address (abfd, value);
577
578 /* If the address is in the top 256 bytes of the address space
579 then we can relax this instruction. */
580 if (value >= 0xffffff00u)
581 {
582 /* Change the reloc type. */
583 reloc->howto = reloc->howto + 1;
584
585 /* This shrinks this section by two bytes. */
586 shrink += 2;
587 bfd_perform_slip (abfd, 2, input_section, address);
588 }
589 break;
590
591 /* Similarly for a 24 bit absolute address in a mov.b. Note that
592 if we can't relax this into an 8 bit absolute, we'll fall through
593 and try to relax it into a 16bit absolute. */
594 case R_MOV24B1:
595 /* Get the address of the data referenced by this mov.b insn. */
596 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
597 value = bfd_h8300_pad_address (abfd, value);
598
599 if (value >= 0xffffff00u)
600 {
601 /* Change the reloc type. */
602 reloc->howto = reloc->howto + 1;
603
604 /* This shrinks this section by four bytes. */
605 shrink += 4;
606 bfd_perform_slip (abfd, 4, input_section, address);
607
608 /* Done with this reloc. */
609 break;
610 }
611
612 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
613 reloc. */
614
615 /* This is a 24/32 bit absolute address in a mov insn, which can
616 become an 16 bit absolute address if it's in the right range. */
617 case R_MOVL1:
618 /* Get the address of the data referenced by this mov insn. */
619 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
620 value = bfd_h8300_pad_address (abfd, value);
621
622 /* If the address is a sign-extended 16-bit value then we can
623 relax this instruction. */
624 if (value <= 0x7fff || value >= 0xffff8000u)
625 {
626 /* Change the reloc type. */
627 reloc->howto = howto_table + 17;
628
629 /* This shrinks this section by two bytes. */
630 shrink += 2;
631 bfd_perform_slip (abfd, 2, input_section, address);
632 }
633 break;
634
635 /* No other reloc types represent relaxing opportunities. */
636 default:
637 break;
638 }
639
640 last_reloc = reloc;
641 last_input_section = input_section;
642 return shrink;
643 }
644
645 /* Handle relocations for the H8/300, including relocs for relaxed
646 instructions.
647
648 FIXME: Not all relocations check for overflow! */
649
650 static void
651 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info,
652 struct bfd_link_order *link_order, arelent *reloc,
653 bfd_byte *data, unsigned int *src_ptr,
654 unsigned int *dst_ptr)
655 {
656 unsigned int src_address = *src_ptr;
657 unsigned int dst_address = *dst_ptr;
658 asection *input_section = link_order->u.indirect.section;
659 bfd_vma value;
660 bfd_vma dot;
661 int gap, tmp;
662
663 switch (reloc->howto->type)
664 {
665 /* Generic 8bit pc-relative relocation. */
666 case R_PCRBYTE:
667 /* Get the address of the target of this branch. */
668 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
669
670 dot = (link_order->offset
671 + dst_address
672 + link_order->u.indirect.section->output_section->vma);
673
674 gap = value - dot;
675
676 /* Sanity check. */
677 if (gap < -128 || gap > 126)
678 {
679 if (! ((*link_info->callbacks->reloc_overflow)
680 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
681 reloc->howto->name, reloc->addend, input_section->owner,
682 input_section, reloc->address)))
683 abort ();
684 }
685
686 /* Everything looks OK. Apply the relocation and update the
687 src/dst address appropriately. */
688 bfd_put_8 (abfd, gap, data + dst_address);
689 dst_address++;
690 src_address++;
691
692 /* All done. */
693 break;
694
695 /* Generic 16bit pc-relative relocation. */
696 case R_PCRWORD:
697 /* Get the address of the target of this branch. */
698 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
699
700 /* Get the address of the instruction (not the reloc). */
701 dot = (link_order->offset
702 + dst_address
703 + link_order->u.indirect.section->output_section->vma + 1);
704
705 gap = value - dot;
706
707 /* Sanity check. */
708 if (gap > 32766 || gap < -32768)
709 {
710 if (! ((*link_info->callbacks->reloc_overflow)
711 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
712 reloc->howto->name, reloc->addend, input_section->owner,
713 input_section, reloc->address)))
714 abort ();
715 }
716
717 /* Everything looks OK. Apply the relocation and update the
718 src/dst address appropriately. */
719 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
720 dst_address += 2;
721 src_address += 2;
722
723 /* All done. */
724 break;
725
726 /* Generic 8bit absolute relocation. */
727 case R_RELBYTE:
728 /* Get the address of the object referenced by this insn. */
729 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
730
731 bfd_put_8 (abfd, value & 0xff, data + dst_address);
732 dst_address += 1;
733 src_address += 1;
734
735 /* All done. */
736 break;
737
738 /* Various simple 16bit absolute relocations. */
739 case R_MOV16B1:
740 case R_JMP1:
741 case R_RELWORD:
742 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
743 bfd_put_16 (abfd, value, data + dst_address);
744 dst_address += 2;
745 src_address += 2;
746 break;
747
748 /* Various simple 24/32bit absolute relocations. */
749 case R_MOV24B1:
750 case R_MOVL1:
751 case R_RELLONG:
752 /* Get the address of the target of this branch. */
753 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
754 bfd_put_32 (abfd, value, data + dst_address);
755 dst_address += 4;
756 src_address += 4;
757 break;
758
759 /* Another 24/32bit absolute relocation. */
760 case R_JMPL1:
761 /* Get the address of the target of this branch. */
762 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
763
764 value = ((value & 0x00ffffff)
765 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
766 bfd_put_32 (abfd, value, data + dst_address);
767 dst_address += 4;
768 src_address += 4;
769 break;
770
771 /* A 16bit abolute relocation that was formerlly a 24/32bit
772 absolute relocation. */
773 case R_MOVL2:
774 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
775 value = bfd_h8300_pad_address (abfd, value);
776
777 /* Sanity check. */
778 if (value <= 0x7fff || value >= 0xffff8000u)
779 {
780 /* Insert the 16bit value into the proper location. */
781 bfd_put_16 (abfd, value, data + dst_address);
782
783 /* Fix the opcode. For all the move insns, we simply
784 need to turn off bit 0x20 in the previous byte. */
785 data[dst_address - 1] &= ~0x20;
786 dst_address += 2;
787 src_address += 4;
788 }
789 else
790 {
791 if (! ((*link_info->callbacks->reloc_overflow)
792 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
793 reloc->howto->name, reloc->addend, input_section->owner,
794 input_section, reloc->address)))
795 abort ();
796 }
797 break;
798
799 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
800 case R_JMP2:
801 /* Get the address of the target of this branch. */
802 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
803
804 /* Get the address of the next instruction. */
805 dot = (link_order->offset
806 + dst_address
807 + link_order->u.indirect.section->output_section->vma + 1);
808
809 gap = value - dot;
810
811 /* Sanity check. */
812 if (gap < -128 || gap > 126)
813 {
814 if (! ((*link_info->callbacks->reloc_overflow)
815 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
816 reloc->howto->name, reloc->addend, input_section->owner,
817 input_section, reloc->address)))
818 abort ();
819 }
820
821 /* Now fix the instruction itself. */
822 switch (data[dst_address - 1])
823 {
824 case 0x5e:
825 /* jsr -> bsr */
826 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
827 break;
828 case 0x5a:
829 /* jmp ->bra */
830 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
831 break;
832
833 default:
834 abort ();
835 }
836
837 /* Write out the 8bit value. */
838 bfd_put_8 (abfd, gap, data + dst_address);
839
840 dst_address += 1;
841 src_address += 3;
842
843 break;
844
845 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
846 case R_PCRWORD_B:
847 /* Get the address of the target of this branch. */
848 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
849
850 /* Get the address of the instruction (not the reloc). */
851 dot = (link_order->offset
852 + dst_address
853 + link_order->u.indirect.section->output_section->vma - 1);
854
855 gap = value - dot;
856
857 /* Sanity check. */
858 if (gap < -128 || gap > 126)
859 {
860 if (! ((*link_info->callbacks->reloc_overflow)
861 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
862 reloc->howto->name, reloc->addend, input_section->owner,
863 input_section, reloc->address)))
864 abort ();
865 }
866
867 /* Now fix the instruction. */
868 switch (data[dst_address - 2])
869 {
870 case 0x58:
871 /* bCC:16 -> bCC:8 */
872 /* Get the condition code from the original insn. */
873 tmp = data[dst_address - 1];
874 tmp &= 0xf0;
875 tmp >>= 4;
876
877 /* Now or in the high nibble of the opcode. */
878 tmp |= 0x40;
879
880 /* Write it. */
881 bfd_put_8 (abfd, tmp, data + dst_address - 2);
882 break;
883
884 case 0x5c:
885 /* bsr:16 -> bsr:8 */
886 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
887 break;
888
889 default:
890 abort ();
891 }
892
893 /* Output the target. */
894 bfd_put_8 (abfd, gap, data + dst_address - 1);
895
896 /* We don't advance dst_address -- the 8bit reloc is applied at
897 dst_address - 1, so the next insn should begin at dst_address. */
898 src_address += 2;
899
900 break;
901
902 /* Similarly for a 24bit absolute that is now 8 bits. */
903 case R_JMPL2:
904 /* Get the address of the target of this branch. */
905 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
906
907 /* Get the address of the instruction (not the reloc). */
908 dot = (link_order->offset
909 + dst_address
910 + link_order->u.indirect.section->output_section->vma + 2);
911
912 gap = value - dot;
913
914 /* Fix the instruction. */
915 switch (data[src_address])
916 {
917 case 0x5e:
918 /* jsr -> bsr */
919 bfd_put_8 (abfd, 0x55, data + dst_address);
920 break;
921 case 0x5a:
922 /* jmp ->bra */
923 bfd_put_8 (abfd, 0x40, data + dst_address);
924 break;
925 default:
926 abort ();
927 }
928
929 bfd_put_8 (abfd, gap, data + dst_address + 1);
930 dst_address += 2;
931 src_address += 4;
932
933 break;
934
935 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
936 case R_MOV16B2:
937 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
938
939 /* Sanity check. */
940 if (data[dst_address - 2] != 0x6a)
941 abort ();
942
943 /* Fix up the opcode. */
944 switch (data[src_address - 1] & 0xf0)
945 {
946 case 0x00:
947 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
948 break;
949 case 0x80:
950 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
951 break;
952 default:
953 abort ();
954 }
955
956 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
957 src_address += 2;
958 break;
959
960 /* Similarly for a 24bit mov.b */
961 case R_MOV24B2:
962 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
963
964 /* Sanity check. */
965 if (data[dst_address - 2] != 0x6a)
966 abort ();
967
968 /* Fix up the opcode. */
969 switch (data[src_address - 1] & 0xf0)
970 {
971 case 0x20:
972 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
973 break;
974 case 0xa0:
975 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
976 break;
977 default:
978 abort ();
979 }
980
981 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
982 src_address += 4;
983 break;
984
985 case R_BCC_INV:
986 /* Get the address of the target of this branch. */
987 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
988
989 dot = (link_order->offset
990 + dst_address
991 + link_order->u.indirect.section->output_section->vma) + 1;
992
993 gap = value - dot;
994
995 /* Sanity check. */
996 if (gap < -128 || gap > 126)
997 {
998 if (! ((*link_info->callbacks->reloc_overflow)
999 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1000 reloc->howto->name, reloc->addend, input_section->owner,
1001 input_section, reloc->address)))
1002 abort ();
1003 }
1004
1005 /* Everything looks OK. Fix the condition in the instruction, apply
1006 the relocation, and update the src/dst address appropriately. */
1007
1008 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1009 data + dst_address - 1);
1010 bfd_put_8 (abfd, gap, data + dst_address);
1011 dst_address++;
1012 src_address++;
1013
1014 /* All done. */
1015 break;
1016
1017 case R_JMP_DEL:
1018 src_address += 4;
1019 break;
1020
1021 /* An 8bit memory indirect instruction (jmp/jsr).
1022
1023 There's several things that need to be done to handle
1024 this relocation.
1025
1026 If this is a reloc against the absolute symbol, then
1027 we should handle it just R_RELBYTE. Likewise if it's
1028 for a symbol with a value ge 0 and le 0xff.
1029
1030 Otherwise it's a jump/call through the function vector,
1031 and the linker is expected to set up the function vector
1032 and put the right value into the jump/call instruction. */
1033 case R_MEM_INDIRECT:
1034 {
1035 /* We need to find the symbol so we can determine it's
1036 address in the function vector table. */
1037 asymbol *symbol;
1038 const char *name;
1039 struct funcvec_hash_table *ftab;
1040 struct funcvec_hash_entry *h;
1041 struct h8300_coff_link_hash_table *htab;
1042 asection *vectors_sec;
1043
1044 if (link_info->hash->creator != abfd->xvec)
1045 {
1046 (*_bfd_error_handler)
1047 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1048 link_info->hash->creator->name);
1049
1050 /* What else can we do? This function doesn't allow return
1051 of an error, and we don't want to call abort as that
1052 indicates an internal error. */
1053 #ifndef EXIT_FAILURE
1054 #define EXIT_FAILURE 1
1055 #endif
1056 xexit (EXIT_FAILURE);
1057 }
1058 htab = h8300_coff_hash_table (link_info);
1059 vectors_sec = htab->vectors_sec;
1060
1061 /* First see if this is a reloc against the absolute symbol
1062 or against a symbol with a nonnegative value <= 0xff. */
1063 symbol = *(reloc->sym_ptr_ptr);
1064 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1065 if (symbol == bfd_abs_section_ptr->symbol
1066 || value <= 0xff)
1067 {
1068 /* This should be handled in a manner very similar to
1069 R_RELBYTES. If the value is in range, then just slam
1070 the value into the right location. Else trigger a
1071 reloc overflow callback. */
1072 if (value <= 0xff)
1073 {
1074 bfd_put_8 (abfd, value, data + dst_address);
1075 dst_address += 1;
1076 src_address += 1;
1077 }
1078 else
1079 {
1080 if (! ((*link_info->callbacks->reloc_overflow)
1081 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1082 reloc->howto->name, reloc->addend, input_section->owner,
1083 input_section, reloc->address)))
1084 abort ();
1085 }
1086 break;
1087 }
1088
1089 /* This is a jump/call through a function vector, and we're
1090 expected to create the function vector ourselves.
1091
1092 First look up this symbol in the linker hash table -- we need
1093 the derived linker symbol which holds this symbol's index
1094 in the function vector. */
1095 name = symbol->name;
1096 if (symbol->flags & BSF_LOCAL)
1097 {
1098 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1099 if (new_name == NULL)
1100 abort ();
1101
1102 strcpy (new_name, name);
1103 sprintf (new_name + strlen (name), "_%08x",
1104 (int) symbol->section);
1105 name = new_name;
1106 }
1107
1108 ftab = htab->funcvec_hash_table;
1109 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1110
1111 /* This shouldn't ever happen. If it does that means we've got
1112 data corruption of some kind. Aborting seems like a reasonable
1113 thing to do here. */
1114 if (h == NULL || vectors_sec == NULL)
1115 abort ();
1116
1117 /* Place the address of the function vector entry into the
1118 reloc's address. */
1119 bfd_put_8 (abfd,
1120 vectors_sec->output_offset + h->offset,
1121 data + dst_address);
1122
1123 dst_address++;
1124 src_address++;
1125
1126 /* Now create an entry in the function vector itself. */
1127 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1128 bfd_put_16 (abfd,
1129 bfd_coff_reloc16_get_value (reloc,
1130 link_info,
1131 input_section),
1132 vectors_sec->contents + h->offset);
1133 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1134 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1135 bfd_put_32 (abfd,
1136 bfd_coff_reloc16_get_value (reloc,
1137 link_info,
1138 input_section),
1139 vectors_sec->contents + h->offset);
1140 else
1141 abort ();
1142
1143 /* Gross. We've already written the contents of the vector section
1144 before we get here... So we write it again with the new data. */
1145 bfd_set_section_contents (vectors_sec->output_section->owner,
1146 vectors_sec->output_section,
1147 vectors_sec->contents,
1148 (file_ptr) vectors_sec->output_offset,
1149 vectors_sec->_raw_size);
1150 break;
1151 }
1152
1153 default:
1154 abort ();
1155 break;
1156
1157 }
1158
1159 *src_ptr = src_address;
1160 *dst_ptr = dst_address;
1161 }
1162
1163 /* Routine for the h8300 linker.
1164
1165 This routine is necessary to handle the special R_MEM_INDIRECT
1166 relocs on the h8300. It's responsible for generating a vectors
1167 section and attaching it to an input bfd as well as sizing
1168 the vectors section. It also creates our vectors hash table.
1169
1170 It uses the generic linker routines to actually add the symbols.
1171 from this BFD to the bfd linker hash table. It may add a few
1172 selected static symbols to the bfd linker hash table. */
1173
1174 static bfd_boolean
1175 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info)
1176 {
1177 asection *sec;
1178 struct funcvec_hash_table *funcvec_hash_table;
1179 bfd_size_type amt;
1180 struct h8300_coff_link_hash_table *htab;
1181
1182 /* Add the symbols using the generic code. */
1183 _bfd_generic_link_add_symbols (abfd, info);
1184
1185 if (info->hash->creator != abfd->xvec)
1186 return TRUE;
1187
1188 htab = h8300_coff_hash_table (info);
1189
1190 /* If we haven't created a vectors section, do so now. */
1191 if (!htab->vectors_sec)
1192 {
1193 flagword flags;
1194
1195 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1196 flags = (SEC_ALLOC | SEC_LOAD
1197 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1198 htab->vectors_sec = bfd_make_section (abfd, ".vectors");
1199
1200 /* If the section wasn't created, or we couldn't set the flags,
1201 quit quickly now, rather than dying a painful death later. */
1202 if (!htab->vectors_sec
1203 || !bfd_set_section_flags (abfd, htab->vectors_sec, flags))
1204 return FALSE;
1205
1206 /* Also create the vector hash table. */
1207 amt = sizeof (struct funcvec_hash_table);
1208 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1209
1210 if (!funcvec_hash_table)
1211 return FALSE;
1212
1213 /* And initialize the funcvec hash table. */
1214 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1215 funcvec_hash_newfunc))
1216 {
1217 bfd_release (abfd, funcvec_hash_table);
1218 return FALSE;
1219 }
1220
1221 /* Store away a pointer to the funcvec hash table. */
1222 htab->funcvec_hash_table = funcvec_hash_table;
1223 }
1224
1225 /* Load up the function vector hash table. */
1226 funcvec_hash_table = htab->funcvec_hash_table;
1227
1228 /* Now scan the relocs for all the sections in this bfd; create
1229 additional space in the .vectors section as needed. */
1230 for (sec = abfd->sections; sec; sec = sec->next)
1231 {
1232 long reloc_size, reloc_count, i;
1233 asymbol **symbols;
1234 arelent **relocs;
1235
1236 /* Suck in the relocs, symbols & canonicalize them. */
1237 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1238 if (reloc_size <= 0)
1239 continue;
1240
1241 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1242 if (!relocs)
1243 return FALSE;
1244
1245 /* The symbols should have been read in by _bfd_generic link_add_symbols
1246 call abovec, so we can cheat and use the pointer to them that was
1247 saved in the above call. */
1248 symbols = _bfd_generic_link_get_symbols(abfd);
1249 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1250 if (reloc_count <= 0)
1251 {
1252 free (relocs);
1253 continue;
1254 }
1255
1256 /* Now walk through all the relocations in this section. */
1257 for (i = 0; i < reloc_count; i++)
1258 {
1259 arelent *reloc = relocs[i];
1260 asymbol *symbol = *(reloc->sym_ptr_ptr);
1261 const char *name;
1262
1263 /* We've got an indirect reloc. See if we need to add it
1264 to the function vector table. At this point, we have
1265 to add a new entry for each unique symbol referenced
1266 by an R_MEM_INDIRECT relocation except for a reloc
1267 against the absolute section symbol. */
1268 if (reloc->howto->type == R_MEM_INDIRECT
1269 && symbol != bfd_abs_section_ptr->symbol)
1270
1271 {
1272 struct funcvec_hash_table *ftab;
1273 struct funcvec_hash_entry *h;
1274
1275 name = symbol->name;
1276 if (symbol->flags & BSF_LOCAL)
1277 {
1278 char *new_name;
1279
1280 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1281 if (new_name == NULL)
1282 abort ();
1283
1284 strcpy (new_name, name);
1285 sprintf (new_name + strlen (name), "_%08x",
1286 (int) symbol->section);
1287 name = new_name;
1288 }
1289
1290 /* Look this symbol up in the function vector hash table. */
1291 ftab = htab->funcvec_hash_table;
1292 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1293
1294 /* If this symbol isn't already in the hash table, add
1295 it and bump up the size of the hash table. */
1296 if (h == NULL)
1297 {
1298 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1299 if (h == NULL)
1300 {
1301 free (relocs);
1302 return FALSE;
1303 }
1304
1305 /* Bump the size of the vectors section. Each vector
1306 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1307 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1308 htab->vectors_sec->_raw_size += 2;
1309 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1310 || bfd_get_mach (abfd) == bfd_mach_h8300s)
1311 htab->vectors_sec->_raw_size += 4;
1312 }
1313 }
1314 }
1315
1316 /* We're done with the relocations, release them. */
1317 free (relocs);
1318 }
1319
1320 /* Now actually allocate some space for the function vector. It's
1321 wasteful to do this more than once, but this is easier. */
1322 sec = htab->vectors_sec;
1323 if (sec->_raw_size != 0)
1324 {
1325 /* Free the old contents. */
1326 if (sec->contents)
1327 free (sec->contents);
1328
1329 /* Allocate new contents. */
1330 sec->contents = bfd_malloc (sec->_raw_size);
1331 }
1332
1333 return TRUE;
1334 }
1335
1336 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1337 #define coff_reloc16_estimate h8300_reloc16_estimate
1338 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1339 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1340
1341 #define COFF_LONG_FILENAMES
1342 #include "coffcode.h"
1343
1344 #undef coff_bfd_get_relocated_section_contents
1345 #undef coff_bfd_relax_section
1346 #define coff_bfd_get_relocated_section_contents \
1347 bfd_coff_reloc16_get_relocated_section_contents
1348 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1349
1350 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE)
This page took 0.085112 seconds and 4 git commands to generate.