Replace occurrances of 'Hitachi' with 'Renesas'.
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
7 This file is part of BFD, the Binary File Descriptor library.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22
23 #include "bfd.h"
24 #include "sysdep.h"
25 #include "libbfd.h"
26 #include "bfdlink.h"
27 #include "genlink.h"
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
30 #include "libcoff.h"
31 #include "libiberty.h"
32
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
40
41 struct funcvec_hash_entry
42 {
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
45
46 /* The offset within the vectors section where
47 this entry lives. */
48 bfd_vma offset;
49 };
50
51 struct funcvec_hash_table
52 {
53 /* The basic hash table. */
54 struct bfd_hash_table root;
55
56 bfd *abfd;
57
58 /* Offset at which we'll add the next entry. */
59 unsigned int offset;
60 };
61
62 static struct bfd_hash_entry *
63 funcvec_hash_newfunc
64 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
65
66 static bfd_boolean
67 funcvec_hash_table_init
68 PARAMS ((struct funcvec_hash_table *, bfd *,
69 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
70 struct bfd_hash_table *,
71 const char *)));
72
73 static bfd_reloc_status_type special
74 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
75 static int select_reloc
76 PARAMS ((reloc_howto_type *));
77 static void rtype2howto
78 PARAMS ((arelent *, struct internal_reloc *));
79 static void reloc_processing
80 PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *));
81 static bfd_boolean h8300_symbol_address_p
82 PARAMS ((bfd *, asection *, bfd_vma));
83 static int h8300_reloc16_estimate
84 PARAMS ((bfd *, asection *, arelent *, unsigned int,
85 struct bfd_link_info *));
86 static void h8300_reloc16_extra_cases
87 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
88 bfd_byte *, unsigned int *, unsigned int *));
89 static bfd_boolean h8300_bfd_link_add_symbols
90 PARAMS ((bfd *, struct bfd_link_info *));
91
92 /* To lookup a value in the function vector hash table. */
93 #define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
96
97 /* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
101 struct h8300_coff_link_hash_table {
102 /* The main hash table. */
103 struct generic_link_hash_table root;
104
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection *vectors_sec;
108
109 /* Hash table of the functions we need to enter into the function
110 vector. */
111 struct funcvec_hash_table *funcvec_hash_table;
112 };
113
114 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
115 PARAMS ((bfd *));
116
117 /* Get the H8/300 COFF linker hash table from a link_info structure. */
118
119 #define h8300_coff_hash_table(p) \
120 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
121
122 /* Initialize fields within a funcvec hash table entry. Called whenever
123 a new entry is added to the funcvec hash table. */
124
125 static struct bfd_hash_entry *
126 funcvec_hash_newfunc (entry, gen_table, string)
127 struct bfd_hash_entry *entry;
128 struct bfd_hash_table *gen_table;
129 const char *string;
130 {
131 struct funcvec_hash_entry *ret;
132 struct funcvec_hash_table *table;
133
134 ret = (struct funcvec_hash_entry *) entry;
135 table = (struct funcvec_hash_table *) gen_table;
136
137 /* Allocate the structure if it has not already been allocated by a
138 subclass. */
139 if (ret == NULL)
140 ret = ((struct funcvec_hash_entry *)
141 bfd_hash_allocate (gen_table,
142 sizeof (struct funcvec_hash_entry)));
143 if (ret == NULL)
144 return NULL;
145
146 /* Call the allocation method of the superclass. */
147 ret = ((struct funcvec_hash_entry *)
148 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
149
150 if (ret == NULL)
151 return NULL;
152
153 /* Note where this entry will reside in the function vector table. */
154 ret->offset = table->offset;
155
156 /* Bump the offset at which we store entries in the function
157 vector. We'd like to bump up the size of the vectors section,
158 but it's not easily available here. */
159 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
160 table->offset += 2;
161 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
162 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
163 table->offset += 4;
164 else
165 return NULL;
166
167 /* Everything went OK. */
168 return (struct bfd_hash_entry *) ret;
169 }
170
171 /* Initialize the function vector hash table. */
172
173 static bfd_boolean
174 funcvec_hash_table_init (table, abfd, newfunc)
175 struct funcvec_hash_table *table;
176 bfd *abfd;
177 struct bfd_hash_entry *(*newfunc)
178 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *,
179 const char *));
180 {
181 /* Initialize our local fields, then call the generic initialization
182 routine. */
183 table->offset = 0;
184 table->abfd = abfd;
185 return (bfd_hash_table_init (&table->root, newfunc));
186 }
187
188 /* Create the derived linker hash table. We use a derived hash table
189 basically to hold "static" information during an H8/300 coff link
190 without using static variables. */
191
192 static struct bfd_link_hash_table *
193 h8300_coff_link_hash_table_create (abfd)
194 bfd *abfd;
195 {
196 struct h8300_coff_link_hash_table *ret;
197 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
198
199 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
200 if (ret == NULL)
201 return NULL;
202 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
203 _bfd_generic_link_hash_newfunc))
204 {
205 free (ret);
206 return NULL;
207 }
208
209 /* Initialize our data. */
210 ret->vectors_sec = NULL;
211 ret->funcvec_hash_table = NULL;
212
213 /* OK. Everything's initialized, return the base pointer. */
214 return &ret->root.root;
215 }
216
217 /* Special handling for H8/300 relocs.
218 We only come here for pcrel stuff and return normally if not an -r link.
219 When doing -r, we can't do any arithmetic for the pcrel stuff, because
220 the code in reloc.c assumes that we can manipulate the targets of
221 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
222 which means that the gap after the instruction may not be enough to
223 contain the offset required for the branch, so we have to use only
224 the addend until the final link. */
225
226 static bfd_reloc_status_type
227 special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
228 error_message)
229 bfd *abfd ATTRIBUTE_UNUSED;
230 arelent *reloc_entry ATTRIBUTE_UNUSED;
231 asymbol *symbol ATTRIBUTE_UNUSED;
232 PTR data ATTRIBUTE_UNUSED;
233 asection *input_section ATTRIBUTE_UNUSED;
234 bfd *output_bfd;
235 char **error_message ATTRIBUTE_UNUSED;
236 {
237 if (output_bfd == (bfd *) NULL)
238 return bfd_reloc_continue;
239
240 /* Adjust the reloc address to that in the output section. */
241 reloc_entry->address += input_section->output_offset;
242 return bfd_reloc_ok;
243 }
244
245 static reloc_howto_type howto_table[] = {
246 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
247 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
248 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
249 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
250 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
251 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
252 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
253 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
254 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
255 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
256 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
257 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
258 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
259 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
260
261 /* An indirect reference to a function. This causes the function's address
262 to be added to the function vector in lo-mem and puts the address of
263 the function vector's entry in the jsr instruction. */
264 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
265
266 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
267 branch is turned into an 8bit pc-relative branch. */
268 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
269
270 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
271
272 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
273
274 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
275
276 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
277 };
278
279 /* Turn a howto into a reloc number. */
280
281 #define SELECT_RELOC(x,howto) \
282 { x.r_type = select_reloc (howto); }
283
284 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x))
285 #define H8300 1 /* Customize coffcode.h */
286 #define __A_MAGIC_SET__
287
288 /* Code to swap in the reloc. */
289 #define SWAP_IN_RELOC_OFFSET H_GET_32
290 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
291 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
292 dst->r_stuff[0] = 'S'; \
293 dst->r_stuff[1] = 'C';
294
295 static int
296 select_reloc (howto)
297 reloc_howto_type *howto;
298 {
299 return howto->type;
300 }
301
302 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
303
304 static void
305 rtype2howto (internal, dst)
306 arelent *internal;
307 struct internal_reloc *dst;
308 {
309 switch (dst->r_type)
310 {
311 case R_RELBYTE:
312 internal->howto = howto_table + 0;
313 break;
314 case R_RELWORD:
315 internal->howto = howto_table + 1;
316 break;
317 case R_RELLONG:
318 internal->howto = howto_table + 2;
319 break;
320 case R_PCRBYTE:
321 internal->howto = howto_table + 3;
322 break;
323 case R_PCRWORD:
324 internal->howto = howto_table + 4;
325 break;
326 case R_PCRLONG:
327 internal->howto = howto_table + 5;
328 break;
329 case R_MOV16B1:
330 internal->howto = howto_table + 6;
331 break;
332 case R_MOV16B2:
333 internal->howto = howto_table + 7;
334 break;
335 case R_JMP1:
336 internal->howto = howto_table + 8;
337 break;
338 case R_JMP2:
339 internal->howto = howto_table + 9;
340 break;
341 case R_JMPL1:
342 internal->howto = howto_table + 10;
343 break;
344 case R_JMPL2:
345 internal->howto = howto_table + 11;
346 break;
347 case R_MOV24B1:
348 internal->howto = howto_table + 12;
349 break;
350 case R_MOV24B2:
351 internal->howto = howto_table + 13;
352 break;
353 case R_MEM_INDIRECT:
354 internal->howto = howto_table + 14;
355 break;
356 case R_PCRWORD_B:
357 internal->howto = howto_table + 15;
358 break;
359 case R_MOVL1:
360 internal->howto = howto_table + 16;
361 break;
362 case R_MOVL2:
363 internal->howto = howto_table + 17;
364 break;
365 case R_BCC_INV:
366 internal->howto = howto_table + 18;
367 break;
368 case R_JMP_DEL:
369 internal->howto = howto_table + 19;
370 break;
371 default:
372 abort ();
373 break;
374 }
375 }
376
377 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
378
379 /* Perform any necessary magic to the addend in a reloc entry. */
380
381 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
382 cache_ptr->addend = ext_reloc.r_offset;
383
384 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
385 reloc_processing (relent, reloc, symbols, abfd, section)
386
387 static void
388 reloc_processing (relent, reloc, symbols, abfd, section)
389 arelent *relent;
390 struct internal_reloc *reloc;
391 asymbol **symbols;
392 bfd *abfd;
393 asection *section;
394 {
395 relent->address = reloc->r_vaddr;
396 rtype2howto (relent, reloc);
397
398 if (((int) reloc->r_symndx) > 0)
399 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
400 else
401 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
402
403 relent->addend = reloc->r_offset;
404
405 relent->address -= section->vma;
406 #if 0
407 relent->section = 0;
408 #endif
409 }
410
411 static bfd_boolean
412 h8300_symbol_address_p (abfd, input_section, address)
413 bfd *abfd;
414 asection *input_section;
415 bfd_vma address;
416 {
417 asymbol **s;
418
419 s = _bfd_generic_link_get_symbols (abfd);
420 BFD_ASSERT (s != (asymbol **) NULL);
421
422 /* Search all the symbols for one in INPUT_SECTION with
423 address ADDRESS. */
424 while (*s)
425 {
426 asymbol *p = *s;
427
428 if (p->section == input_section
429 && (input_section->output_section->vma
430 + input_section->output_offset
431 + p->value) == address)
432 return TRUE;
433 s++;
434 }
435 return FALSE;
436 }
437
438 /* If RELOC represents a relaxable instruction/reloc, change it into
439 the relaxed reloc, notify the linker that symbol addresses
440 have changed (bfd_perform_slip) and return how much the current
441 section has shrunk by.
442
443 FIXME: Much of this code has knowledge of the ordering of entries
444 in the howto table. This needs to be fixed. */
445
446 static int
447 h8300_reloc16_estimate (abfd, input_section, reloc, shrink, link_info)
448 bfd *abfd;
449 asection *input_section;
450 arelent *reloc;
451 unsigned int shrink;
452 struct bfd_link_info *link_info;
453 {
454 bfd_vma value;
455 bfd_vma dot;
456 bfd_vma gap;
457 static asection *last_input_section = NULL;
458 static arelent *last_reloc = NULL;
459
460 /* The address of the thing to be relocated will have moved back by
461 the size of the shrink - but we don't change reloc->address here,
462 since we need it to know where the relocation lives in the source
463 uncooked section. */
464 bfd_vma address = reloc->address - shrink;
465
466 if (input_section != last_input_section)
467 last_reloc = NULL;
468
469 /* Only examine the relocs which might be relaxable. */
470 switch (reloc->howto->type)
471 {
472 /* This is the 16/24 bit absolute branch which could become an 8 bit
473 pc-relative branch. */
474 case R_JMP1:
475 case R_JMPL1:
476 /* Get the address of the target of this branch. */
477 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
478
479 /* Get the address of the next instruction (not the reloc). */
480 dot = (input_section->output_section->vma
481 + input_section->output_offset + address);
482
483 /* Adjust for R_JMP1 vs R_JMPL1. */
484 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
485
486 /* Compute the distance from this insn to the branch target. */
487 gap = value - dot;
488
489 /* If the distance is within -128..+128 inclusive, then we can relax
490 this jump. +128 is valid since the target will move two bytes
491 closer if we do relax this branch. */
492 if ((int) gap >= -128 && (int) gap <= 128)
493 {
494 bfd_byte code;
495
496 if (!bfd_get_section_contents (abfd, input_section, & code,
497 reloc->address, 1))
498 break;
499 code = bfd_get_8 (abfd, & code);
500
501 /* It's possible we may be able to eliminate this branch entirely;
502 if the previous instruction is a branch around this instruction,
503 and there's no label at this instruction, then we can reverse
504 the condition on the previous branch and eliminate this jump.
505
506 original: new:
507 bCC lab1 bCC' lab2
508 jmp lab2
509 lab1: lab1:
510
511 This saves 4 bytes instead of two, and should be relatively
512 common.
513
514 Only perform this optimisation for jumps (code 0x5a) not
515 subroutine calls, as otherwise it could transform:
516
517 mov.w r0,r0
518 beq .L1
519 jsr @_bar
520 .L1: rts
521 _bar: rts
522 into:
523 mov.w r0,r0
524 bne _bar
525 rts
526 _bar: rts
527
528 which changes the call (jsr) into a branch (bne). */
529 if (code == 0x5a
530 && gap <= 126
531 && last_reloc
532 && last_reloc->howto->type == R_PCRBYTE)
533 {
534 bfd_vma last_value;
535 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
536 input_section) + 1;
537
538 if (last_value == dot + 2
539 && last_reloc->address + 1 == reloc->address
540 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
541 {
542 reloc->howto = howto_table + 19;
543 last_reloc->howto = howto_table + 18;
544 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
545 last_reloc->addend = reloc->addend;
546 shrink += 4;
547 bfd_perform_slip (abfd, 4, input_section, address);
548 break;
549 }
550 }
551
552 /* Change the reloc type. */
553 reloc->howto = reloc->howto + 1;
554
555 /* This shrinks this section by two bytes. */
556 shrink += 2;
557 bfd_perform_slip (abfd, 2, input_section, address);
558 }
559 break;
560
561 /* This is the 16 bit pc-relative branch which could become an 8 bit
562 pc-relative branch. */
563 case R_PCRWORD:
564 /* Get the address of the target of this branch, add one to the value
565 because the addend field in PCrel jumps is off by -1. */
566 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
567
568 /* Get the address of the next instruction if we were to relax. */
569 dot = input_section->output_section->vma +
570 input_section->output_offset + address;
571
572 /* Compute the distance from this insn to the branch target. */
573 gap = value - dot;
574
575 /* If the distance is within -128..+128 inclusive, then we can relax
576 this jump. +128 is valid since the target will move two bytes
577 closer if we do relax this branch. */
578 if ((int) gap >= -128 && (int) gap <= 128)
579 {
580 /* Change the reloc type. */
581 reloc->howto = howto_table + 15;
582
583 /* This shrinks this section by two bytes. */
584 shrink += 2;
585 bfd_perform_slip (abfd, 2, input_section, address);
586 }
587 break;
588
589 /* This is a 16 bit absolute address in a mov.b insn, which can
590 become an 8 bit absolute address if it's in the right range. */
591 case R_MOV16B1:
592 /* Get the address of the data referenced by this mov.b insn. */
593 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
594
595 /* The address is in 0xff00..0xffff inclusive on the h8300 or
596 0xffff00..0xffffff inclusive on the h8300h, then we can
597 relax this mov.b */
598 if ((bfd_get_mach (abfd) == bfd_mach_h8300
599 && value >= 0xff00
600 && value <= 0xffff)
601 || ((bfd_get_mach (abfd) == bfd_mach_h8300h
602 || bfd_get_mach (abfd) == bfd_mach_h8300s)
603 && value >= 0xffff00
604 && value <= 0xffffff))
605 {
606 /* Change the reloc type. */
607 reloc->howto = reloc->howto + 1;
608
609 /* This shrinks this section by two bytes. */
610 shrink += 2;
611 bfd_perform_slip (abfd, 2, input_section, address);
612 }
613 break;
614
615 /* Similarly for a 24 bit absolute address in a mov.b. Note that
616 if we can't relax this into an 8 bit absolute, we'll fall through
617 and try to relax it into a 16bit absolute. */
618 case R_MOV24B1:
619 /* Get the address of the data referenced by this mov.b insn. */
620 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
621
622 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
623 then we can relax this mov.b */
624 if ((bfd_get_mach (abfd) == bfd_mach_h8300h
625 || bfd_get_mach (abfd) == bfd_mach_h8300s)
626 && value >= 0xffff00
627 && value <= 0xffffff)
628 {
629 /* Change the reloc type. */
630 reloc->howto = reloc->howto + 1;
631
632 /* This shrinks this section by four bytes. */
633 shrink += 4;
634 bfd_perform_slip (abfd, 4, input_section, address);
635
636 /* Done with this reloc. */
637 break;
638 }
639
640 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
641 reloc. */
642
643 /* This is a 24/32 bit absolute address in a mov insn, which can
644 become an 16 bit absolute address if it's in the right range. */
645 case R_MOVL1:
646 /* Get the address of the data referenced by this mov insn. */
647 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
648
649 /* If this address is in 0x0000..0x7fff inclusive or
650 0xff8000..0xffffff inclusive, then it can be relaxed. */
651 if (value <= 0x7fff || value >= 0xff8000)
652 {
653 /* Change the reloc type. */
654 reloc->howto = howto_table + 17;
655
656 /* This shrinks this section by two bytes. */
657 shrink += 2;
658 bfd_perform_slip (abfd, 2, input_section, address);
659 }
660 break;
661
662 /* No other reloc types represent relaxing opportunities. */
663 default:
664 break;
665 }
666
667 last_reloc = reloc;
668 last_input_section = input_section;
669 return shrink;
670 }
671
672 /* Handle relocations for the H8/300, including relocs for relaxed
673 instructions.
674
675 FIXME: Not all relocations check for overflow! */
676
677 static void
678 h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
679 dst_ptr)
680 bfd *abfd;
681 struct bfd_link_info *link_info;
682 struct bfd_link_order *link_order;
683 arelent *reloc;
684 bfd_byte *data;
685 unsigned int *src_ptr;
686 unsigned int *dst_ptr;
687 {
688 unsigned int src_address = *src_ptr;
689 unsigned int dst_address = *dst_ptr;
690 asection *input_section = link_order->u.indirect.section;
691 bfd_vma value;
692 bfd_vma dot;
693 int gap, tmp;
694
695 switch (reloc->howto->type)
696 {
697 /* Generic 8bit pc-relative relocation. */
698 case R_PCRBYTE:
699 /* Get the address of the target of this branch. */
700 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
701
702 dot = (link_order->offset
703 + dst_address
704 + link_order->u.indirect.section->output_section->vma);
705
706 gap = value - dot;
707
708 /* Sanity check. */
709 if (gap < -128 || gap > 126)
710 {
711 if (! ((*link_info->callbacks->reloc_overflow)
712 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
713 reloc->howto->name, reloc->addend, input_section->owner,
714 input_section, reloc->address)))
715 abort ();
716 }
717
718 /* Everything looks OK. Apply the relocation and update the
719 src/dst address appropriately. */
720 bfd_put_8 (abfd, gap, data + dst_address);
721 dst_address++;
722 src_address++;
723
724 /* All done. */
725 break;
726
727 /* Generic 16bit pc-relative relocation. */
728 case R_PCRWORD:
729 /* Get the address of the target of this branch. */
730 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
731
732 /* Get the address of the instruction (not the reloc). */
733 dot = (link_order->offset
734 + dst_address
735 + link_order->u.indirect.section->output_section->vma + 1);
736
737 gap = value - dot;
738
739 /* Sanity check. */
740 if (gap > 32766 || gap < -32768)
741 {
742 if (! ((*link_info->callbacks->reloc_overflow)
743 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
744 reloc->howto->name, reloc->addend, input_section->owner,
745 input_section, reloc->address)))
746 abort ();
747 }
748
749 /* Everything looks OK. Apply the relocation and update the
750 src/dst address appropriately. */
751 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
752 dst_address += 2;
753 src_address += 2;
754
755 /* All done. */
756 break;
757
758 /* Generic 8bit absolute relocation. */
759 case R_RELBYTE:
760 /* Get the address of the object referenced by this insn. */
761 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
762
763 /* Sanity check. */
764 if (value <= 0xff
765 || (value >= 0x0000ff00 && value <= 0x0000ffff)
766 || (value >= 0x00ffff00 && value <= 0x00ffffff)
767 || (value >= 0xffffff00 && value <= 0xffffffff))
768 {
769 /* Everything looks OK. Apply the relocation and update the
770 src/dst address appropriately. */
771 bfd_put_8 (abfd, value & 0xff, data + dst_address);
772 dst_address += 1;
773 src_address += 1;
774 }
775 else
776 {
777 if (! ((*link_info->callbacks->reloc_overflow)
778 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
779 reloc->howto->name, reloc->addend, input_section->owner,
780 input_section, reloc->address)))
781 abort ();
782 }
783
784 /* All done. */
785 break;
786
787 /* Various simple 16bit absolute relocations. */
788 case R_MOV16B1:
789 case R_JMP1:
790 case R_RELWORD:
791 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
792 bfd_put_16 (abfd, value, data + dst_address);
793 dst_address += 2;
794 src_address += 2;
795 break;
796
797 /* Various simple 24/32bit absolute relocations. */
798 case R_MOV24B1:
799 case R_MOVL1:
800 case R_RELLONG:
801 /* Get the address of the target of this branch. */
802 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
803 bfd_put_32 (abfd, value, data + dst_address);
804 dst_address += 4;
805 src_address += 4;
806 break;
807
808 /* Another 24/32bit absolute relocation. */
809 case R_JMPL1:
810 /* Get the address of the target of this branch. */
811 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
812
813 value = ((value & 0x00ffffff)
814 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
815 bfd_put_32 (abfd, value, data + dst_address);
816 dst_address += 4;
817 src_address += 4;
818 break;
819
820 /* A 16bit abolute relocation that was formerlly a 24/32bit
821 absolute relocation. */
822 case R_MOVL2:
823 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
824
825 /* Sanity check. */
826 if (value <= 0x7fff || value >= 0xff8000)
827 {
828 /* Insert the 16bit value into the proper location. */
829 bfd_put_16 (abfd, value, data + dst_address);
830
831 /* Fix the opcode. For all the move insns, we simply
832 need to turn off bit 0x20 in the previous byte. */
833 data[dst_address - 1] &= ~0x20;
834 dst_address += 2;
835 src_address += 4;
836 }
837 else
838 {
839 if (! ((*link_info->callbacks->reloc_overflow)
840 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
841 reloc->howto->name, reloc->addend, input_section->owner,
842 input_section, reloc->address)))
843 abort ();
844 }
845 break;
846
847 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
848 case R_JMP2:
849 /* Get the address of the target of this branch. */
850 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
851
852 /* Get the address of the next instruction. */
853 dot = (link_order->offset
854 + dst_address
855 + link_order->u.indirect.section->output_section->vma + 1);
856
857 gap = value - dot;
858
859 /* Sanity check. */
860 if (gap < -128 || gap > 126)
861 {
862 if (! ((*link_info->callbacks->reloc_overflow)
863 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
864 reloc->howto->name, reloc->addend, input_section->owner,
865 input_section, reloc->address)))
866 abort ();
867 }
868
869 /* Now fix the instruction itself. */
870 switch (data[dst_address - 1])
871 {
872 case 0x5e:
873 /* jsr -> bsr */
874 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
875 break;
876 case 0x5a:
877 /* jmp ->bra */
878 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
879 break;
880
881 default:
882 abort ();
883 }
884
885 /* Write out the 8bit value. */
886 bfd_put_8 (abfd, gap, data + dst_address);
887
888 dst_address += 1;
889 src_address += 3;
890
891 break;
892
893 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
894 case R_PCRWORD_B:
895 /* Get the address of the target of this branch. */
896 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
897
898 /* Get the address of the instruction (not the reloc). */
899 dot = (link_order->offset
900 + dst_address
901 + link_order->u.indirect.section->output_section->vma - 1);
902
903 gap = value - dot;
904
905 /* Sanity check. */
906 if (gap < -128 || gap > 126)
907 {
908 if (! ((*link_info->callbacks->reloc_overflow)
909 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
910 reloc->howto->name, reloc->addend, input_section->owner,
911 input_section, reloc->address)))
912 abort ();
913 }
914
915 /* Now fix the instruction. */
916 switch (data[dst_address - 2])
917 {
918 case 0x58:
919 /* bCC:16 -> bCC:8 */
920 /* Get the condition code from the original insn. */
921 tmp = data[dst_address - 1];
922 tmp &= 0xf0;
923 tmp >>= 4;
924
925 /* Now or in the high nibble of the opcode. */
926 tmp |= 0x40;
927
928 /* Write it. */
929 bfd_put_8 (abfd, tmp, data + dst_address - 2);
930 break;
931
932 case 0x5c:
933 /* bsr:16 -> bsr:8 */
934 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
935 break;
936
937 default:
938 abort ();
939 }
940
941 /* Output the target. */
942 bfd_put_8 (abfd, gap, data + dst_address - 1);
943
944 /* We don't advance dst_address -- the 8bit reloc is applied at
945 dst_address - 1, so the next insn should begin at dst_address. */
946 src_address += 2;
947
948 break;
949
950 /* Similarly for a 24bit absolute that is now 8 bits. */
951 case R_JMPL2:
952 /* Get the address of the target of this branch. */
953 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
954
955 /* Get the address of the instruction (not the reloc). */
956 dot = (link_order->offset
957 + dst_address
958 + link_order->u.indirect.section->output_section->vma + 2);
959
960 gap = value - dot;
961
962 /* Fix the instruction. */
963 switch (data[src_address])
964 {
965 case 0x5e:
966 /* jsr -> bsr */
967 bfd_put_8 (abfd, 0x55, data + dst_address);
968 break;
969 case 0x5a:
970 /* jmp ->bra */
971 bfd_put_8 (abfd, 0x40, data + dst_address);
972 break;
973 default:
974 abort ();
975 }
976
977 bfd_put_8 (abfd, gap, data + dst_address + 1);
978 dst_address += 2;
979 src_address += 4;
980
981 break;
982
983 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
984 case R_MOV16B2:
985 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
986
987 /* Sanity check. */
988 if (data[dst_address - 2] != 0x6a)
989 abort ();
990
991 /* Fix up the opcode. */
992 switch (data[src_address - 1] & 0xf0)
993 {
994 case 0x00:
995 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
996 break;
997 case 0x80:
998 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
999 break;
1000 default:
1001 abort ();
1002 }
1003
1004 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1005 src_address += 2;
1006 break;
1007
1008 /* Similarly for a 24bit mov.b */
1009 case R_MOV24B2:
1010 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1011
1012 /* Sanity check. */
1013 if (data[dst_address - 2] != 0x6a)
1014 abort ();
1015
1016 /* Fix up the opcode. */
1017 switch (data[src_address - 1] & 0xf0)
1018 {
1019 case 0x20:
1020 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
1021 break;
1022 case 0xa0:
1023 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
1024 break;
1025 default:
1026 abort ();
1027 }
1028
1029 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1030 src_address += 4;
1031 break;
1032
1033 case R_BCC_INV:
1034 /* Get the address of the target of this branch. */
1035 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1036
1037 dot = (link_order->offset
1038 + dst_address
1039 + link_order->u.indirect.section->output_section->vma) + 1;
1040
1041 gap = value - dot;
1042
1043 /* Sanity check. */
1044 if (gap < -128 || gap > 126)
1045 {
1046 if (! ((*link_info->callbacks->reloc_overflow)
1047 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1048 reloc->howto->name, reloc->addend, input_section->owner,
1049 input_section, reloc->address)))
1050 abort ();
1051 }
1052
1053 /* Everything looks OK. Fix the condition in the instruction, apply
1054 the relocation, and update the src/dst address appropriately. */
1055
1056 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1057 data + dst_address - 1);
1058 bfd_put_8 (abfd, gap, data + dst_address);
1059 dst_address++;
1060 src_address++;
1061
1062 /* All done. */
1063 break;
1064
1065 case R_JMP_DEL:
1066 src_address += 4;
1067 break;
1068
1069 /* An 8bit memory indirect instruction (jmp/jsr).
1070
1071 There's several things that need to be done to handle
1072 this relocation.
1073
1074 If this is a reloc against the absolute symbol, then
1075 we should handle it just R_RELBYTE. Likewise if it's
1076 for a symbol with a value ge 0 and le 0xff.
1077
1078 Otherwise it's a jump/call through the function vector,
1079 and the linker is expected to set up the function vector
1080 and put the right value into the jump/call instruction. */
1081 case R_MEM_INDIRECT:
1082 {
1083 /* We need to find the symbol so we can determine it's
1084 address in the function vector table. */
1085 asymbol *symbol;
1086 const char *name;
1087 struct funcvec_hash_table *ftab;
1088 struct funcvec_hash_entry *h;
1089 struct h8300_coff_link_hash_table *htab;
1090 asection *vectors_sec;
1091
1092 if (link_info->hash->creator != abfd->xvec)
1093 {
1094 (*_bfd_error_handler)
1095 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1096 link_info->hash->creator->name);
1097
1098 /* What else can we do? This function doesn't allow return
1099 of an error, and we don't want to call abort as that
1100 indicates an internal error. */
1101 #ifndef EXIT_FAILURE
1102 #define EXIT_FAILURE 1
1103 #endif
1104 xexit (EXIT_FAILURE);
1105 }
1106 htab = h8300_coff_hash_table (link_info);
1107 vectors_sec = htab->vectors_sec;
1108
1109 /* First see if this is a reloc against the absolute symbol
1110 or against a symbol with a nonnegative value <= 0xff. */
1111 symbol = *(reloc->sym_ptr_ptr);
1112 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1113 if (symbol == bfd_abs_section_ptr->symbol
1114 || value <= 0xff)
1115 {
1116 /* This should be handled in a manner very similar to
1117 R_RELBYTES. If the value is in range, then just slam
1118 the value into the right location. Else trigger a
1119 reloc overflow callback. */
1120 if (value <= 0xff)
1121 {
1122 bfd_put_8 (abfd, value, data + dst_address);
1123 dst_address += 1;
1124 src_address += 1;
1125 }
1126 else
1127 {
1128 if (! ((*link_info->callbacks->reloc_overflow)
1129 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1130 reloc->howto->name, reloc->addend, input_section->owner,
1131 input_section, reloc->address)))
1132 abort ();
1133 }
1134 break;
1135 }
1136
1137 /* This is a jump/call through a function vector, and we're
1138 expected to create the function vector ourselves.
1139
1140 First look up this symbol in the linker hash table -- we need
1141 the derived linker symbol which holds this symbol's index
1142 in the function vector. */
1143 name = symbol->name;
1144 if (symbol->flags & BSF_LOCAL)
1145 {
1146 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1147 if (new_name == NULL)
1148 abort ();
1149
1150 strcpy (new_name, name);
1151 sprintf (new_name + strlen (name), "_%08x",
1152 (int) symbol->section);
1153 name = new_name;
1154 }
1155
1156 ftab = htab->funcvec_hash_table;
1157 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1158
1159 /* This shouldn't ever happen. If it does that means we've got
1160 data corruption of some kind. Aborting seems like a reasonable
1161 thing to do here. */
1162 if (h == NULL || vectors_sec == NULL)
1163 abort ();
1164
1165 /* Place the address of the function vector entry into the
1166 reloc's address. */
1167 bfd_put_8 (abfd,
1168 vectors_sec->output_offset + h->offset,
1169 data + dst_address);
1170
1171 dst_address++;
1172 src_address++;
1173
1174 /* Now create an entry in the function vector itself. */
1175 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1176 bfd_put_16 (abfd,
1177 bfd_coff_reloc16_get_value (reloc,
1178 link_info,
1179 input_section),
1180 vectors_sec->contents + h->offset);
1181 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1182 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1183 bfd_put_32 (abfd,
1184 bfd_coff_reloc16_get_value (reloc,
1185 link_info,
1186 input_section),
1187 vectors_sec->contents + h->offset);
1188 else
1189 abort ();
1190
1191 /* Gross. We've already written the contents of the vector section
1192 before we get here... So we write it again with the new data. */
1193 bfd_set_section_contents (vectors_sec->output_section->owner,
1194 vectors_sec->output_section,
1195 vectors_sec->contents,
1196 (file_ptr) vectors_sec->output_offset,
1197 vectors_sec->_raw_size);
1198 break;
1199 }
1200
1201 default:
1202 abort ();
1203 break;
1204
1205 }
1206
1207 *src_ptr = src_address;
1208 *dst_ptr = dst_address;
1209 }
1210
1211 /* Routine for the h8300 linker.
1212
1213 This routine is necessary to handle the special R_MEM_INDIRECT
1214 relocs on the h8300. It's responsible for generating a vectors
1215 section and attaching it to an input bfd as well as sizing
1216 the vectors section. It also creates our vectors hash table.
1217
1218 It uses the generic linker routines to actually add the symbols.
1219 from this BFD to the bfd linker hash table. It may add a few
1220 selected static symbols to the bfd linker hash table. */
1221
1222 static bfd_boolean
1223 h8300_bfd_link_add_symbols (abfd, info)
1224 bfd *abfd;
1225 struct bfd_link_info *info;
1226 {
1227 asection *sec;
1228 struct funcvec_hash_table *funcvec_hash_table;
1229 bfd_size_type amt;
1230 struct h8300_coff_link_hash_table *htab;
1231
1232 /* Add the symbols using the generic code. */
1233 _bfd_generic_link_add_symbols (abfd, info);
1234
1235 if (info->hash->creator != abfd->xvec)
1236 return TRUE;
1237
1238 htab = h8300_coff_hash_table (info);
1239
1240 /* If we haven't created a vectors section, do so now. */
1241 if (!htab->vectors_sec)
1242 {
1243 flagword flags;
1244
1245 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1246 flags = (SEC_ALLOC | SEC_LOAD
1247 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1248 htab->vectors_sec = bfd_make_section (abfd, ".vectors");
1249
1250 /* If the section wasn't created, or we couldn't set the flags,
1251 quit quickly now, rather than dying a painful death later. */
1252 if (!htab->vectors_sec
1253 || !bfd_set_section_flags (abfd, htab->vectors_sec, flags))
1254 return FALSE;
1255
1256 /* Also create the vector hash table. */
1257 amt = sizeof (struct funcvec_hash_table);
1258 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1259
1260 if (!funcvec_hash_table)
1261 return FALSE;
1262
1263 /* And initialize the funcvec hash table. */
1264 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1265 funcvec_hash_newfunc))
1266 {
1267 bfd_release (abfd, funcvec_hash_table);
1268 return FALSE;
1269 }
1270
1271 /* Store away a pointer to the funcvec hash table. */
1272 htab->funcvec_hash_table = funcvec_hash_table;
1273 }
1274
1275 /* Load up the function vector hash table. */
1276 funcvec_hash_table = htab->funcvec_hash_table;
1277
1278 /* Now scan the relocs for all the sections in this bfd; create
1279 additional space in the .vectors section as needed. */
1280 for (sec = abfd->sections; sec; sec = sec->next)
1281 {
1282 long reloc_size, reloc_count, i;
1283 asymbol **symbols;
1284 arelent **relocs;
1285
1286 /* Suck in the relocs, symbols & canonicalize them. */
1287 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1288 if (reloc_size <= 0)
1289 continue;
1290
1291 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1292 if (!relocs)
1293 return FALSE;
1294
1295 /* The symbols should have been read in by _bfd_generic link_add_symbols
1296 call abovec, so we can cheat and use the pointer to them that was
1297 saved in the above call. */
1298 symbols = _bfd_generic_link_get_symbols(abfd);
1299 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1300 if (reloc_count <= 0)
1301 {
1302 free (relocs);
1303 continue;
1304 }
1305
1306 /* Now walk through all the relocations in this section. */
1307 for (i = 0; i < reloc_count; i++)
1308 {
1309 arelent *reloc = relocs[i];
1310 asymbol *symbol = *(reloc->sym_ptr_ptr);
1311 const char *name;
1312
1313 /* We've got an indirect reloc. See if we need to add it
1314 to the function vector table. At this point, we have
1315 to add a new entry for each unique symbol referenced
1316 by an R_MEM_INDIRECT relocation except for a reloc
1317 against the absolute section symbol. */
1318 if (reloc->howto->type == R_MEM_INDIRECT
1319 && symbol != bfd_abs_section_ptr->symbol)
1320
1321 {
1322 struct funcvec_hash_table *ftab;
1323 struct funcvec_hash_entry *h;
1324
1325 name = symbol->name;
1326 if (symbol->flags & BSF_LOCAL)
1327 {
1328 char *new_name;
1329
1330 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1331 if (new_name == NULL)
1332 abort ();
1333
1334 strcpy (new_name, name);
1335 sprintf (new_name + strlen (name), "_%08x",
1336 (int) symbol->section);
1337 name = new_name;
1338 }
1339
1340 /* Look this symbol up in the function vector hash table. */
1341 ftab = htab->funcvec_hash_table;
1342 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1343
1344 /* If this symbol isn't already in the hash table, add
1345 it and bump up the size of the hash table. */
1346 if (h == NULL)
1347 {
1348 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1349 if (h == NULL)
1350 {
1351 free (relocs);
1352 return FALSE;
1353 }
1354
1355 /* Bump the size of the vectors section. Each vector
1356 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1357 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1358 htab->vectors_sec->_raw_size += 2;
1359 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1360 || bfd_get_mach (abfd) == bfd_mach_h8300s)
1361 htab->vectors_sec->_raw_size += 4;
1362 }
1363 }
1364 }
1365
1366 /* We're done with the relocations, release them. */
1367 free (relocs);
1368 }
1369
1370 /* Now actually allocate some space for the function vector. It's
1371 wasteful to do this more than once, but this is easier. */
1372 sec = htab->vectors_sec;
1373 if (sec->_raw_size != 0)
1374 {
1375 /* Free the old contents. */
1376 if (sec->contents)
1377 free (sec->contents);
1378
1379 /* Allocate new contents. */
1380 sec->contents = bfd_malloc (sec->_raw_size);
1381 }
1382
1383 return TRUE;
1384 }
1385
1386 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1387 #define coff_reloc16_estimate h8300_reloc16_estimate
1388 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1389 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1390
1391 #define COFF_LONG_FILENAMES
1392 #include "coffcode.h"
1393
1394 #undef coff_bfd_get_relocated_section_contents
1395 #undef coff_bfd_relax_section
1396 #define coff_bfd_get_relocated_section_contents \
1397 bfd_coff_reloc16_get_relocated_section_contents
1398 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1399
1400 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL)
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