1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 NULL
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE
, /* pc_relative. */
1700 complain_overflow_bitfield
,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc
, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE
, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE
), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE
, /* pc_relative. */
1713 complain_overflow_bitfield
,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc
, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE
, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE
), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE
, /* pc_relative. */
1726 complain_overflow_bitfield
,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc
, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE
, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE
), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE
, /* pc_relative. */
1739 complain_overflow_bitfield
,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc
, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE
, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE
), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1751 HOWTO (R_ARM_IRELATIVE
, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE
, /* pc_relative */
1757 complain_overflow_bitfield
,/* complain_on_overflow */
1758 bfd_elf_generic_reloc
, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE
, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE
) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1769 HOWTO (R_ARM_RREL32
, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE
, /* pc_relative */
1775 complain_overflow_dont
,/* complain_on_overflow */
1776 bfd_elf_generic_reloc
, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE
, /* partial_inplace */
1781 FALSE
), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32
, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE
, /* pc_relative */
1789 complain_overflow_dont
,/* complain_on_overflow */
1790 bfd_elf_generic_reloc
, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE
, /* partial_inplace */
1795 FALSE
), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24
, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE
, /* pc_relative */
1803 complain_overflow_dont
,/* complain_on_overflow */
1804 bfd_elf_generic_reloc
, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE
, /* partial_inplace */
1809 FALSE
), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE
, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE
, /* pc_relative */
1817 complain_overflow_dont
,/* complain_on_overflow */
1818 bfd_elf_generic_reloc
, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE
, /* partial_inplace */
1823 FALSE
) /* pcrel_offset */
1826 static reloc_howto_type
*
1827 elf32_arm_howto_from_type (unsigned int r_type
)
1829 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1830 return &elf32_arm_howto_table_1
[r_type
];
1832 if (r_type
== R_ARM_IRELATIVE
)
1833 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1835 if (r_type
>= R_ARM_RREL32
1836 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1837 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1843 elf32_arm_info_to_howto (bfd
* abfd ATTRIBUTE_UNUSED
, arelent
* bfd_reloc
,
1844 Elf_Internal_Rela
* elf_reloc
)
1846 unsigned int r_type
;
1848 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1849 bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val
;
1855 unsigned char elf_reloc_val
;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1861 {BFD_RELOC_NONE
, R_ARM_NONE
},
1862 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1863 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1864 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1865 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1866 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1867 {BFD_RELOC_32
, R_ARM_ABS32
},
1868 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1869 {BFD_RELOC_8
, R_ARM_ABS8
},
1870 {BFD_RELOC_16
, R_ARM_ABS16
},
1871 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1872 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1879 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1880 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1881 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1882 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1883 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1884 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1885 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1886 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1887 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1888 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1889 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1890 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1891 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1892 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1893 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1894 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1895 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1898 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1899 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1900 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1901 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1904 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1905 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1906 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1907 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1908 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1909 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1910 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1911 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1912 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1913 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1914 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1915 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1919 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1921 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1922 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1923 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1924 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1925 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1926 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1927 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1928 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1929 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1930 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1931 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1933 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1935 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1936 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1937 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1938 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1939 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1940 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1941 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1942 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1943 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1944 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1945 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1946 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
1953 static reloc_howto_type
*
1954 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1955 bfd_reloc_code_real_type code
)
1959 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1960 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1966 static reloc_howto_type
*
1967 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1972 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1973 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1974 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1975 return &elf32_arm_howto_table_1
[i
];
1977 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1978 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1979 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1980 return &elf32_arm_howto_table_2
[i
];
1982 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1983 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1984 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1985 return &elf32_arm_howto_table_3
[i
];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
1998 switch (note
->descsz
)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2008 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2019 size
, note
->descpos
+ offset
);
2023 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2025 switch (note
->descsz
)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd
)->core
->pid
2032 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2033 elf_tdata (abfd
)->core
->program
2034 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2035 elf_tdata (abfd
)->core
->command
2036 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command
= elf_tdata (abfd
)->core
->command
;
2044 int n
= strlen (command
);
2046 if (0 < n
&& command
[n
- 1] == ' ')
2047 command
[n
- 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2067 va_start (ap
, note_type
);
2068 memset (data
, 0, sizeof (data
));
2069 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2070 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2073 return elfcore_write_note (abfd
, buf
, bufsiz
,
2074 "CORE", note_type
, data
, sizeof (data
));
2085 va_start (ap
, note_type
);
2086 memset (data
, 0, sizeof (data
));
2087 pid
= va_arg (ap
, long);
2088 bfd_put_32 (abfd
, pid
, data
+ 24);
2089 cursig
= va_arg (ap
, int);
2090 bfd_put_16 (abfd
, cursig
, data
+ 12);
2091 greg
= va_arg (ap
, const void *);
2092 memcpy (data
+ 72, greg
, 72);
2095 return elfcore_write_note (abfd
, buf
, bufsiz
,
2096 "CORE", note_type
, data
, sizeof (data
));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32
;
2111 typedef unsigned short int insn16
;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 #define CMSE_PREFIX "__acle_se_"
2143 /* The name of the dynamic interpreter. This is put in the .interp
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2147 static const unsigned long tls_trampoline
[] =
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2154 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2167 #ifdef FOUR_WORD_PLT
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2173 static const bfd_vma elf32_arm_plt0_entry
[] =
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2181 /* Subsequent entries in a procedure linkage table look like
2183 static const bfd_vma elf32_arm_plt_entry
[] =
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2191 #else /* not FOUR_WORD_PLT */
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2197 static const bfd_vma elf32_arm_plt0_entry
[] =
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short
[] =
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long
[] =
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2225 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2227 #endif /* not FOUR_WORD_PLT */
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2245 static const bfd_vma elf32_thumb2_plt_entry
[] =
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2296 /* The entries in a PLT when using a DLL-based target with multiple
2298 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2308 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2375 enum stub_insn_type type
;
2376 unsigned int r_type
;
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2574 /* Cortex-A8 erratum-workaround stubs. */
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2586 /* Stub used for b.w and bl.w instructions. */
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2616 const char * stubborn_problems[] = { "np" };
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2621 .data.rel.local.stubborn_problems
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2632 #define STUB_SUFFIX ".__stub"
2634 /* One entry per long/short branch stub defined above. */
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2674 const insn_sequence
* template_sequence
;
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions
[] =
2685 struct elf32_arm_stub_hash_entry
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root
;
2690 /* The stub section. */
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset
;
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value
;
2699 asection
*target_section
;
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2706 bfd_vma source_value
;
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn
;
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type
;
2714 /* Its encoding size in bytes. */
2717 const insn_sequence
*stub_template
;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size
;
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry
*h
;
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type
;
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2737 /* Used to build a map of a section. This is required for mixed-endian
2740 typedef struct elf32_elf_section_map
2745 elf32_arm_section_map
;
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2753 VFP11_ERRATUM_ARM_VENEER
,
2754 VFP11_ERRATUM_THUMB_VENEER
2756 elf32_vfp11_erratum_type
;
2758 typedef struct elf32_vfp11_erratum_list
2760 struct elf32_vfp11_erratum_list
*next
;
2766 struct elf32_vfp11_erratum_list
*veneer
;
2767 unsigned int vfp_insn
;
2771 struct elf32_vfp11_erratum_list
*branch
;
2775 elf32_vfp11_erratum_type type
;
2777 elf32_vfp11_erratum_list
;
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2784 STM32L4XX_ERRATUM_VENEER
2786 elf32_stm32l4xx_erratum_type
;
2788 typedef struct elf32_stm32l4xx_erratum_list
2790 struct elf32_stm32l4xx_erratum_list
*next
;
2796 struct elf32_stm32l4xx_erratum_list
*veneer
;
2801 struct elf32_stm32l4xx_erratum_list
*branch
;
2805 elf32_stm32l4xx_erratum_type type
;
2807 elf32_stm32l4xx_erratum_list
;
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2814 arm_unwind_edit_type
;
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2819 arm_unwind_edit_type type
;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection
*linked_section
;
2825 struct arm_unwind_table_edit
*next
;
2827 arm_unwind_table_edit
;
2829 typedef struct _arm_elf_section_data
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf
;
2833 unsigned int mapcount
;
2834 unsigned int mapsize
;
2835 elf32_arm_section_map
*map
;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount
;
2838 elf32_vfp11_erratum_list
*erratumlist
;
2839 unsigned int stm32l4xx_erratumcount
;
2840 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2841 unsigned int additional_reloc_count
;
2842 /* Information about unwind tables. */
2845 /* Unwind info attached to a text section. */
2848 asection
*arm_exidx_sec
;
2851 /* Unwind info attached to an .ARM.exidx section. */
2854 arm_unwind_table_edit
*unwind_edit_list
;
2855 arm_unwind_table_edit
*unwind_edit_tail
;
2859 _arm_elf_section_data
;
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2870 struct a8_erratum_fix
2875 bfd_vma target_offset
;
2876 unsigned long orig_insn
;
2878 enum elf32_arm_stub_type stub_type
;
2879 enum arm_st_branch_type branch_type
;
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2885 struct a8_erratum_reloc
2888 bfd_vma destination
;
2889 struct elf32_arm_link_hash_entry
*hash
;
2890 const char *sym_name
;
2891 unsigned int r_type
;
2892 enum arm_st_branch_type branch_type
;
2893 bfd_boolean non_a8_stub
;
2896 /* The size of the thread control block. */
2899 /* ARM-specific information about a PLT entry, over and above the usual
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount
;
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount
;
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount
;
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset
;
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root
;
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm
;
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs
*dyn_relocs
;
2939 struct elf_arm_obj_tdata
2941 struct elf_obj_tdata root
;
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type
;
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma
*local_tlsdesc_gotent
;
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info
**local_iplt
;
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning
;
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning
;
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2977 elf32_arm_mkobject (bfd
*abfd
)
2979 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2988 struct elf_link_hash_entry root
;
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs
*dyn_relocs
;
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt
;
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type
: 8;
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt
: 1;
3007 unsigned int unused
: 23;
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got
;
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry
*export_glue
;
3017 /* A pointer to the most recently used stub hash entry against this
3019 struct elf32_arm_stub_hash_entry
*stub_cache
;
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3042 /* This is the section to which stubs in the group will be
3045 /* The stub section. */
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3055 /* The main hash table. */
3056 struct elf_link_hash_table root
;
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size
;
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size
;
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size
;
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset
[15];
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3073 bfd_size_type vfp11_erratum_glue_size
;
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3077 bfd_size_type stm32l4xx_erratum_glue_size
;
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix
*a8_erratum_fixes
;
3083 unsigned int num_a8_erratum_fixes
;
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd
* bfd_of_glue_owner
;
3088 /* Nonzero to output a BE8 image. */
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix
;
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes
;
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes
;
3126 /* Nonzero to force PIC branch veneers. */
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size
;
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size
;
3135 /* True if the target system is VxWorks. */
3138 /* True if the target system is Symbian OS. */
3141 /* True if the target system is Native Client. */
3144 /* True if the target uses REL relocations. */
3147 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3148 bfd_vma next_tls_desc_index
;
3150 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3151 bfd_vma num_tls_desc
;
3153 /* Short-cuts to get to dynamic linker sections. */
3157 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3160 /* The offset into splt of the PLT entry for the TLS descriptor
3161 resolver. Special values are 0, if not necessary (or not found
3162 to be necessary yet), and -1 if needed but not determined
3164 bfd_vma dt_tlsdesc_plt
;
3166 /* The offset into sgot of the GOT entry used by the PLT entry
3168 bfd_vma dt_tlsdesc_got
;
3170 /* Offset in .plt section of tls_arm_trampoline. */
3171 bfd_vma tls_trampoline
;
3173 /* Data for R_ARM_TLS_LDM32 relocations. */
3176 bfd_signed_vma refcount
;
3180 /* Small local sym cache. */
3181 struct sym_cache sym_cache
;
3183 /* For convenience in allocate_dynrelocs. */
3186 /* The amount of space used by the reserved portion of the sgotplt
3187 section, plus whatever space is used by the jump slots. */
3188 bfd_vma sgotplt_jump_table_size
;
3190 /* The stub hash table. */
3191 struct bfd_hash_table stub_hash_table
;
3193 /* Linker stub bfd. */
3196 /* Linker call-backs. */
3197 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3199 void (*layout_sections_again
) (void);
3201 /* Array to keep track of which stub sections have been created, and
3202 information on stub grouping. */
3203 struct map_stub
*stub_group
;
3205 /* Input stub section holding secure gateway veneers. */
3206 asection
*cmse_stub_sec
;
3208 /* Number of elements in stub_group. */
3209 unsigned int top_id
;
3211 /* Assorted information used by elf32_arm_size_stubs. */
3212 unsigned int bfd_count
;
3213 unsigned int top_index
;
3214 asection
**input_list
;
3218 ctz (unsigned int mask
)
3220 #if GCC_VERSION >= 3004
3221 return __builtin_ctz (mask
);
3225 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3236 popcount (unsigned int mask
)
3238 #if GCC_VERSION >= 3004
3239 return __builtin_popcount (mask
);
3241 unsigned int i
, sum
= 0;
3243 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3253 /* Create an entry in an ARM ELF linker hash table. */
3255 static struct bfd_hash_entry
*
3256 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3257 struct bfd_hash_table
* table
,
3258 const char * string
)
3260 struct elf32_arm_link_hash_entry
* ret
=
3261 (struct elf32_arm_link_hash_entry
*) entry
;
3263 /* Allocate the structure if it has not already been allocated by a
3266 ret
= (struct elf32_arm_link_hash_entry
*)
3267 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3269 return (struct bfd_hash_entry
*) ret
;
3271 /* Call the allocation method of the superclass. */
3272 ret
= ((struct elf32_arm_link_hash_entry
*)
3273 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3277 ret
->dyn_relocs
= NULL
;
3278 ret
->tls_type
= GOT_UNKNOWN
;
3279 ret
->tlsdesc_got
= (bfd_vma
) -1;
3280 ret
->plt
.thumb_refcount
= 0;
3281 ret
->plt
.maybe_thumb_refcount
= 0;
3282 ret
->plt
.noncall_refcount
= 0;
3283 ret
->plt
.got_offset
= -1;
3284 ret
->is_iplt
= FALSE
;
3285 ret
->export_glue
= NULL
;
3287 ret
->stub_cache
= NULL
;
3290 return (struct bfd_hash_entry
*) ret
;
3293 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3297 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3299 if (elf_local_got_refcounts (abfd
) == NULL
)
3301 bfd_size_type num_syms
;
3305 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3306 size
= num_syms
* (sizeof (bfd_signed_vma
)
3307 + sizeof (struct arm_local_iplt_info
*)
3310 data
= bfd_zalloc (abfd
, size
);
3314 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3315 data
+= num_syms
* sizeof (bfd_signed_vma
);
3317 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3318 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3320 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3321 data
+= num_syms
* sizeof (bfd_vma
);
3323 elf32_arm_local_got_tls_type (abfd
) = data
;
3328 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3329 to input bfd ABFD. Create the information if it doesn't already exist.
3330 Return null if an allocation fails. */
3332 static struct arm_local_iplt_info
*
3333 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3335 struct arm_local_iplt_info
**ptr
;
3337 if (!elf32_arm_allocate_local_sym_info (abfd
))
3340 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3341 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3343 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3347 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3348 in ABFD's symbol table. If the symbol is global, H points to its
3349 hash table entry, otherwise H is null.
3351 Return true if the symbol does have PLT information. When returning
3352 true, point *ROOT_PLT at the target-independent reference count/offset
3353 union and *ARM_PLT at the ARM-specific information. */
3356 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3357 struct elf32_arm_link_hash_entry
*h
,
3358 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3359 struct arm_plt_info
**arm_plt
)
3361 struct arm_local_iplt_info
*local_iplt
;
3363 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3368 *root_plt
= &h
->root
.plt
;
3373 if (elf32_arm_local_iplt (abfd
) == NULL
)
3376 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3377 if (local_iplt
== NULL
)
3380 *root_plt
= &local_iplt
->root
;
3381 *arm_plt
= &local_iplt
->arm
;
3385 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3389 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3390 struct arm_plt_info
*arm_plt
)
3392 struct elf32_arm_link_hash_table
*htab
;
3394 htab
= elf32_arm_hash_table (info
);
3395 return (arm_plt
->thumb_refcount
!= 0
3396 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3399 /* Return a pointer to the head of the dynamic reloc list that should
3400 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3401 ABFD's symbol table. Return null if an error occurs. */
3403 static struct elf_dyn_relocs
**
3404 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3405 Elf_Internal_Sym
*isym
)
3407 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3409 struct arm_local_iplt_info
*local_iplt
;
3411 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3412 if (local_iplt
== NULL
)
3414 return &local_iplt
->dyn_relocs
;
3418 /* Track dynamic relocs needed for local syms too.
3419 We really need local syms available to do this
3424 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3428 vpp
= &elf_section_data (s
)->local_dynrel
;
3429 return (struct elf_dyn_relocs
**) vpp
;
3433 /* Initialize an entry in the stub hash table. */
3435 static struct bfd_hash_entry
*
3436 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3437 struct bfd_hash_table
*table
,
3440 /* Allocate the structure if it has not already been allocated by a
3444 entry
= (struct bfd_hash_entry
*)
3445 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3450 /* Call the allocation method of the superclass. */
3451 entry
= bfd_hash_newfunc (entry
, table
, string
);
3454 struct elf32_arm_stub_hash_entry
*eh
;
3456 /* Initialize the local fields. */
3457 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3458 eh
->stub_sec
= NULL
;
3459 eh
->stub_offset
= 0;
3460 eh
->source_value
= 0;
3461 eh
->target_value
= 0;
3462 eh
->target_section
= NULL
;
3464 eh
->stub_type
= arm_stub_none
;
3466 eh
->stub_template
= NULL
;
3467 eh
->stub_template_size
= 0;
3470 eh
->output_name
= NULL
;
3476 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3477 shortcuts to them in our hash table. */
3480 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3482 struct elf32_arm_link_hash_table
*htab
;
3484 htab
= elf32_arm_hash_table (info
);
3488 /* BPABI objects never have a GOT, or associated sections. */
3489 if (htab
->symbian_p
)
3492 if (! _bfd_elf_create_got_section (dynobj
, info
))
3498 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3501 create_ifunc_sections (struct bfd_link_info
*info
)
3503 struct elf32_arm_link_hash_table
*htab
;
3504 const struct elf_backend_data
*bed
;
3509 htab
= elf32_arm_hash_table (info
);
3510 dynobj
= htab
->root
.dynobj
;
3511 bed
= get_elf_backend_data (dynobj
);
3512 flags
= bed
->dynamic_sec_flags
;
3514 if (htab
->root
.iplt
== NULL
)
3516 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3517 flags
| SEC_READONLY
| SEC_CODE
);
3519 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3521 htab
->root
.iplt
= s
;
3524 if (htab
->root
.irelplt
== NULL
)
3526 s
= bfd_make_section_anyway_with_flags (dynobj
,
3527 RELOC_SECTION (htab
, ".iplt"),
3528 flags
| SEC_READONLY
);
3530 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3532 htab
->root
.irelplt
= s
;
3535 if (htab
->root
.igotplt
== NULL
)
3537 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3539 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3541 htab
->root
.igotplt
= s
;
3546 /* Determine if we're dealing with a Thumb only architecture. */
3549 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3552 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3553 Tag_CPU_arch_profile
);
3556 return profile
== 'M';
3558 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3560 /* Force return logic to be reviewed for each new architecture. */
3561 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8
3562 || arch
== TAG_CPU_ARCH_V8M_BASE
3563 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3565 if (arch
== TAG_CPU_ARCH_V6_M
3566 || arch
== TAG_CPU_ARCH_V6S_M
3567 || arch
== TAG_CPU_ARCH_V7E_M
3568 || arch
== TAG_CPU_ARCH_V8M_BASE
3569 || arch
== TAG_CPU_ARCH_V8M_MAIN
)
3575 /* Determine if we're dealing with a Thumb-2 object. */
3578 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3581 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3585 return thumb_isa
== 2;
3587 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3589 /* Force return logic to be reviewed for each new architecture. */
3590 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8
3591 || arch
== TAG_CPU_ARCH_V8M_BASE
3592 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3594 return (arch
== TAG_CPU_ARCH_V6T2
3595 || arch
== TAG_CPU_ARCH_V7
3596 || arch
== TAG_CPU_ARCH_V7E_M
3597 || arch
== TAG_CPU_ARCH_V8
3598 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3601 /* Determine whether Thumb-2 BL instruction is available. */
3604 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3607 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3609 /* Force return logic to be reviewed for each new architecture. */
3610 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8
3611 || arch
== TAG_CPU_ARCH_V8M_BASE
3612 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3614 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3615 return (arch
== TAG_CPU_ARCH_V6T2
3616 || arch
>= TAG_CPU_ARCH_V7
);
3619 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3620 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3624 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3626 struct elf32_arm_link_hash_table
*htab
;
3628 htab
= elf32_arm_hash_table (info
);
3632 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3635 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3638 htab
->sdynbss
= bfd_get_linker_section (dynobj
, ".dynbss");
3639 if (!bfd_link_pic (info
))
3640 htab
->srelbss
= bfd_get_linker_section (dynobj
,
3641 RELOC_SECTION (htab
, ".bss"));
3643 if (htab
->vxworks_p
)
3645 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3648 if (bfd_link_pic (info
))
3650 htab
->plt_header_size
= 0;
3651 htab
->plt_entry_size
3652 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3656 htab
->plt_header_size
3657 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3658 htab
->plt_entry_size
3659 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3662 if (elf_elfheader (dynobj
))
3663 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3668 Test for thumb only architectures. Note - we cannot just call
3669 using_thumb_only() as the attributes in the output bfd have not been
3670 initialised at this point, so instead we use the input bfd. */
3671 bfd
* saved_obfd
= htab
->obfd
;
3673 htab
->obfd
= dynobj
;
3674 if (using_thumb_only (htab
))
3676 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3677 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3679 htab
->obfd
= saved_obfd
;
3682 if (!htab
->root
.splt
3683 || !htab
->root
.srelplt
3685 || (!bfd_link_pic (info
) && !htab
->srelbss
))
3691 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3694 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3695 struct elf_link_hash_entry
*dir
,
3696 struct elf_link_hash_entry
*ind
)
3698 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3700 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3701 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3703 if (eind
->dyn_relocs
!= NULL
)
3705 if (edir
->dyn_relocs
!= NULL
)
3707 struct elf_dyn_relocs
**pp
;
3708 struct elf_dyn_relocs
*p
;
3710 /* Add reloc counts against the indirect sym to the direct sym
3711 list. Merge any entries against the same section. */
3712 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3714 struct elf_dyn_relocs
*q
;
3716 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3717 if (q
->sec
== p
->sec
)
3719 q
->pc_count
+= p
->pc_count
;
3720 q
->count
+= p
->count
;
3727 *pp
= edir
->dyn_relocs
;
3730 edir
->dyn_relocs
= eind
->dyn_relocs
;
3731 eind
->dyn_relocs
= NULL
;
3734 if (ind
->root
.type
== bfd_link_hash_indirect
)
3736 /* Copy over PLT info. */
3737 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3738 eind
->plt
.thumb_refcount
= 0;
3739 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3740 eind
->plt
.maybe_thumb_refcount
= 0;
3741 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3742 eind
->plt
.noncall_refcount
= 0;
3744 /* We should only allocate a function to .iplt once the final
3745 symbol information is known. */
3746 BFD_ASSERT (!eind
->is_iplt
);
3748 if (dir
->got
.refcount
<= 0)
3750 edir
->tls_type
= eind
->tls_type
;
3751 eind
->tls_type
= GOT_UNKNOWN
;
3755 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3758 /* Destroy an ARM elf linker hash table. */
3761 elf32_arm_link_hash_table_free (bfd
*obfd
)
3763 struct elf32_arm_link_hash_table
*ret
3764 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
3766 bfd_hash_table_free (&ret
->stub_hash_table
);
3767 _bfd_elf_link_hash_table_free (obfd
);
3770 /* Create an ARM elf linker hash table. */
3772 static struct bfd_link_hash_table
*
3773 elf32_arm_link_hash_table_create (bfd
*abfd
)
3775 struct elf32_arm_link_hash_table
*ret
;
3776 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3778 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3782 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3783 elf32_arm_link_hash_newfunc
,
3784 sizeof (struct elf32_arm_link_hash_entry
),
3791 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3792 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
3793 #ifdef FOUR_WORD_PLT
3794 ret
->plt_header_size
= 16;
3795 ret
->plt_entry_size
= 16;
3797 ret
->plt_header_size
= 20;
3798 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
3803 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3804 sizeof (struct elf32_arm_stub_hash_entry
)))
3806 _bfd_elf_link_hash_table_free (abfd
);
3809 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
3811 return &ret
->root
.root
;
3814 /* Determine what kind of NOPs are available. */
3817 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3819 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3822 /* Force return logic to be reviewed for each new architecture. */
3823 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8
3824 || arch
== TAG_CPU_ARCH_V8M_BASE
3825 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3827 return (arch
== TAG_CPU_ARCH_V6T2
3828 || arch
== TAG_CPU_ARCH_V6K
3829 || arch
== TAG_CPU_ARCH_V7
3830 || arch
== TAG_CPU_ARCH_V8
);
3834 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3838 case arm_stub_long_branch_thumb_only
:
3839 case arm_stub_long_branch_thumb2_only
:
3840 case arm_stub_long_branch_thumb2_only_pure
:
3841 case arm_stub_long_branch_v4t_thumb_arm
:
3842 case arm_stub_short_branch_v4t_thumb_arm
:
3843 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3844 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3845 case arm_stub_long_branch_thumb_only_pic
:
3846 case arm_stub_cmse_branch_thumb_only
:
3857 /* Determine the type of stub needed, if any, for a call. */
3859 static enum elf32_arm_stub_type
3860 arm_type_of_stub (struct bfd_link_info
*info
,
3861 asection
*input_sec
,
3862 const Elf_Internal_Rela
*rel
,
3863 unsigned char st_type
,
3864 enum arm_st_branch_type
*actual_branch_type
,
3865 struct elf32_arm_link_hash_entry
*hash
,
3866 bfd_vma destination
,
3872 bfd_signed_vma branch_offset
;
3873 unsigned int r_type
;
3874 struct elf32_arm_link_hash_table
* globals
;
3875 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
3876 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3878 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3879 union gotplt_union
*root_plt
;
3880 struct arm_plt_info
*arm_plt
;
3884 if (branch_type
== ST_BRANCH_LONG
)
3887 globals
= elf32_arm_hash_table (info
);
3888 if (globals
== NULL
)
3891 thumb_only
= using_thumb_only (globals
);
3892 thumb2
= using_thumb2 (globals
);
3893 thumb2_bl
= using_thumb2_bl (globals
);
3895 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3897 /* True for architectures that implement the thumb2 movw instruction. */
3898 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
3900 /* Determine where the call point is. */
3901 location
= (input_sec
->output_offset
3902 + input_sec
->output_section
->vma
3905 r_type
= ELF32_R_TYPE (rel
->r_info
);
3907 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3908 are considering a function call relocation. */
3909 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3910 || r_type
== R_ARM_THM_JUMP19
)
3911 && branch_type
== ST_BRANCH_TO_ARM
)
3912 branch_type
= ST_BRANCH_TO_THUMB
;
3914 /* For TLS call relocs, it is the caller's responsibility to provide
3915 the address of the appropriate trampoline. */
3916 if (r_type
!= R_ARM_TLS_CALL
3917 && r_type
!= R_ARM_THM_TLS_CALL
3918 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
3919 ELF32_R_SYM (rel
->r_info
), &root_plt
,
3921 && root_plt
->offset
!= (bfd_vma
) -1)
3925 if (hash
== NULL
|| hash
->is_iplt
)
3926 splt
= globals
->root
.iplt
;
3928 splt
= globals
->root
.splt
;
3933 /* Note when dealing with PLT entries: the main PLT stub is in
3934 ARM mode, so if the branch is in Thumb mode, another
3935 Thumb->ARM stub will be inserted later just before the ARM
3936 PLT stub. We don't take this extra distance into account
3937 here, because if a long branch stub is needed, we'll add a
3938 Thumb->Arm one and branch directly to the ARM PLT entry
3939 because it avoids spreading offset corrections in several
3942 destination
= (splt
->output_section
->vma
3943 + splt
->output_offset
3944 + root_plt
->offset
);
3946 branch_type
= ST_BRANCH_TO_ARM
;
3949 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3950 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3952 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3954 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3955 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
3957 /* Handle cases where:
3958 - this call goes too far (different Thumb/Thumb2 max
3960 - it's a Thumb->Arm call and blx is not available, or it's a
3961 Thumb->Arm branch (not bl). A stub is needed in this case,
3962 but only if this call is not through a PLT entry. Indeed,
3963 PLT stubs handle mode switching already.
3966 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3967 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3969 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3970 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3972 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
3973 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
3974 && (r_type
== R_ARM_THM_JUMP19
))
3975 || (branch_type
== ST_BRANCH_TO_ARM
3976 && (((r_type
== R_ARM_THM_CALL
3977 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
3978 || (r_type
== R_ARM_THM_JUMP24
)
3979 || (r_type
== R_ARM_THM_JUMP19
))
3982 if (branch_type
== ST_BRANCH_TO_THUMB
)
3984 /* Thumb to thumb. */
3987 if (input_sec
->flags
& SEC_ELF_PURECODE
)
3988 (*_bfd_error_handler
) (_("%B(%s): warning: long branch "
3989 " veneers used in section with "
3990 "SHF_ARM_PURECODE section "
3991 "attribute is only supported"
3992 " for M-profile targets that "
3993 "implement the movw "
3996 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3998 ? ((globals
->use_blx
3999 && (r_type
== R_ARM_THM_CALL
))
4000 /* V5T and above. Stub starts with ARM code, so
4001 we must be able to switch mode before
4002 reaching it, which is only possible for 'bl'
4003 (ie R_ARM_THM_CALL relocation). */
4004 ? arm_stub_long_branch_any_thumb_pic
4005 /* On V4T, use Thumb code only. */
4006 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4008 /* non-PIC stubs. */
4009 : ((globals
->use_blx
4010 && (r_type
== R_ARM_THM_CALL
))
4011 /* V5T and above. */
4012 ? arm_stub_long_branch_any_any
4014 : arm_stub_long_branch_v4t_thumb_thumb
);
4018 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4019 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4022 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4023 (*_bfd_error_handler
) (_("%B(%s): warning: long branch "
4024 " veneers used in section with "
4025 "SHF_ARM_PURECODE section "
4026 "attribute is only supported"
4027 " for M-profile targets that "
4028 "implement the movw "
4031 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4033 ? arm_stub_long_branch_thumb_only_pic
4035 : (thumb2
? arm_stub_long_branch_thumb2_only
4036 : arm_stub_long_branch_thumb_only
);
4042 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4043 (*_bfd_error_handler
) (_("%B(%s): warning: long branch "
4044 " veneers used in section with "
4045 "SHF_ARM_PURECODE section "
4046 "attribute is only supported"
4047 " for M-profile targets that "
4048 "implement the movw "
4053 && sym_sec
->owner
!= NULL
4054 && !INTERWORK_FLAG (sym_sec
->owner
))
4056 (*_bfd_error_handler
)
4057 (_("%B(%s): warning: interworking not enabled.\n"
4058 " first occurrence: %B: Thumb call to ARM"),
4059 sym_sec
->owner
, input_bfd
, name
);
4063 (bfd_link_pic (info
) | globals
->pic_veneer
)
4065 ? (r_type
== R_ARM_THM_TLS_CALL
4066 /* TLS PIC stubs. */
4067 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4068 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4069 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4070 /* V5T PIC and above. */
4071 ? arm_stub_long_branch_any_arm_pic
4073 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4075 /* non-PIC stubs. */
4076 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4077 /* V5T and above. */
4078 ? arm_stub_long_branch_any_any
4080 : arm_stub_long_branch_v4t_thumb_arm
);
4082 /* Handle v4t short branches. */
4083 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4084 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4085 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4086 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4090 else if (r_type
== R_ARM_CALL
4091 || r_type
== R_ARM_JUMP24
4092 || r_type
== R_ARM_PLT32
4093 || r_type
== R_ARM_TLS_CALL
)
4095 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4096 (*_bfd_error_handler
) (_("%B(%s): warning: long branch "
4097 " veneers used in section with "
4098 "SHF_ARM_PURECODE section "
4099 "attribute is only supported"
4100 " for M-profile targets that "
4101 "implement the movw "
4103 if (branch_type
== ST_BRANCH_TO_THUMB
)
4108 && sym_sec
->owner
!= NULL
4109 && !INTERWORK_FLAG (sym_sec
->owner
))
4111 (*_bfd_error_handler
)
4112 (_("%B(%s): warning: interworking not enabled.\n"
4113 " first occurrence: %B: ARM call to Thumb"),
4114 sym_sec
->owner
, input_bfd
, name
);
4117 /* We have an extra 2-bytes reach because of
4118 the mode change (bit 24 (H) of BLX encoding). */
4119 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4120 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4121 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4122 || (r_type
== R_ARM_JUMP24
)
4123 || (r_type
== R_ARM_PLT32
))
4125 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4127 ? ((globals
->use_blx
)
4128 /* V5T and above. */
4129 ? arm_stub_long_branch_any_thumb_pic
4131 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4133 /* non-PIC stubs. */
4134 : ((globals
->use_blx
)
4135 /* V5T and above. */
4136 ? arm_stub_long_branch_any_any
4138 : arm_stub_long_branch_v4t_arm_thumb
);
4144 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4145 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4148 (bfd_link_pic (info
) | globals
->pic_veneer
)
4150 ? (r_type
== R_ARM_TLS_CALL
4152 ? arm_stub_long_branch_any_tls_pic
4154 ? arm_stub_long_branch_arm_nacl_pic
4155 : arm_stub_long_branch_any_arm_pic
))
4156 /* non-PIC stubs. */
4158 ? arm_stub_long_branch_arm_nacl
4159 : arm_stub_long_branch_any_any
);
4164 /* If a stub is needed, record the actual destination type. */
4165 if (stub_type
!= arm_stub_none
)
4166 *actual_branch_type
= branch_type
;
4171 /* Build a name for an entry in the stub hash table. */
4174 elf32_arm_stub_name (const asection
*input_section
,
4175 const asection
*sym_sec
,
4176 const struct elf32_arm_link_hash_entry
*hash
,
4177 const Elf_Internal_Rela
*rel
,
4178 enum elf32_arm_stub_type stub_type
)
4185 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4186 stub_name
= (char *) bfd_malloc (len
);
4187 if (stub_name
!= NULL
)
4188 sprintf (stub_name
, "%08x_%s+%x_%d",
4189 input_section
->id
& 0xffffffff,
4190 hash
->root
.root
.root
.string
,
4191 (int) rel
->r_addend
& 0xffffffff,
4196 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4197 stub_name
= (char *) bfd_malloc (len
);
4198 if (stub_name
!= NULL
)
4199 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4200 input_section
->id
& 0xffffffff,
4201 sym_sec
->id
& 0xffffffff,
4202 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4203 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4204 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4205 (int) rel
->r_addend
& 0xffffffff,
4212 /* Look up an entry in the stub hash. Stub entries are cached because
4213 creating the stub name takes a bit of time. */
4215 static struct elf32_arm_stub_hash_entry
*
4216 elf32_arm_get_stub_entry (const asection
*input_section
,
4217 const asection
*sym_sec
,
4218 struct elf_link_hash_entry
*hash
,
4219 const Elf_Internal_Rela
*rel
,
4220 struct elf32_arm_link_hash_table
*htab
,
4221 enum elf32_arm_stub_type stub_type
)
4223 struct elf32_arm_stub_hash_entry
*stub_entry
;
4224 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4225 const asection
*id_sec
;
4227 if ((input_section
->flags
& SEC_CODE
) == 0)
4230 /* If this input section is part of a group of sections sharing one
4231 stub section, then use the id of the first section in the group.
4232 Stub names need to include a section id, as there may well be
4233 more than one stub used to reach say, printf, and we need to
4234 distinguish between them. */
4235 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4237 if (h
!= NULL
&& h
->stub_cache
!= NULL
4238 && h
->stub_cache
->h
== h
4239 && h
->stub_cache
->id_sec
== id_sec
4240 && h
->stub_cache
->stub_type
== stub_type
)
4242 stub_entry
= h
->stub_cache
;
4248 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4249 if (stub_name
== NULL
)
4252 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4253 stub_name
, FALSE
, FALSE
);
4255 h
->stub_cache
= stub_entry
;
4263 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4267 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4269 if (stub_type
>= max_stub_type
)
4270 abort (); /* Should be unreachable. */
4274 case arm_stub_cmse_branch_thumb_only
:
4281 abort (); /* Should be unreachable. */
4284 /* Required alignment (as a power of 2) for the dedicated section holding
4285 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4286 with input sections. */
4289 arm_dedicated_stub_output_section_required_alignment
4290 (enum elf32_arm_stub_type stub_type
)
4292 if (stub_type
>= max_stub_type
)
4293 abort (); /* Should be unreachable. */
4297 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4299 case arm_stub_cmse_branch_thumb_only
:
4303 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4307 abort (); /* Should be unreachable. */
4310 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4311 NULL if veneers of this type are interspersed with input sections. */
4314 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4316 if (stub_type
>= max_stub_type
)
4317 abort (); /* Should be unreachable. */
4321 case arm_stub_cmse_branch_thumb_only
:
4322 return ".gnu.sgstubs";
4325 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4329 abort (); /* Should be unreachable. */
4332 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4333 returns the address of the hash table field in HTAB holding a pointer to the
4334 corresponding input section. Otherwise, returns NULL. */
4337 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4338 enum elf32_arm_stub_type stub_type
)
4340 if (stub_type
>= max_stub_type
)
4341 abort (); /* Should be unreachable. */
4345 case arm_stub_cmse_branch_thumb_only
:
4346 return &htab
->cmse_stub_sec
;
4349 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4353 abort (); /* Should be unreachable. */
4356 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4357 is the section that branch into veneer and can be NULL if stub should go in
4358 a dedicated output section. Returns a pointer to the stub section, and the
4359 section to which the stub section will be attached (in *LINK_SEC_P).
4360 LINK_SEC_P may be NULL. */
4363 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4364 struct elf32_arm_link_hash_table
*htab
,
4365 enum elf32_arm_stub_type stub_type
)
4367 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4368 const char *stub_sec_prefix
;
4369 bfd_boolean dedicated_output_section
=
4370 arm_dedicated_stub_output_section_required (stub_type
);
4373 if (dedicated_output_section
)
4375 bfd
*output_bfd
= htab
->obfd
;
4376 const char *out_sec_name
=
4377 arm_dedicated_stub_output_section_name (stub_type
);
4379 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4380 stub_sec_prefix
= out_sec_name
;
4381 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4382 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4383 if (out_sec
== NULL
)
4385 (*_bfd_error_handler
) (_("No address assigned to the veneers output "
4386 "section %s"), out_sec_name
);
4392 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4393 BFD_ASSERT (link_sec
!= NULL
);
4394 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4395 if (*stub_sec_p
== NULL
)
4396 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4397 stub_sec_prefix
= link_sec
->name
;
4398 out_sec
= link_sec
->output_section
;
4399 align
= htab
->nacl_p
? 4 : 3;
4402 if (*stub_sec_p
== NULL
)
4408 namelen
= strlen (stub_sec_prefix
);
4409 len
= namelen
+ sizeof (STUB_SUFFIX
);
4410 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4414 memcpy (s_name
, stub_sec_prefix
, namelen
);
4415 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4416 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4418 if (*stub_sec_p
== NULL
)
4421 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4422 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4426 if (!dedicated_output_section
)
4427 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4430 *link_sec_p
= link_sec
;
4435 /* Add a new stub entry to the stub hash. Not all fields of the new
4436 stub entry are initialised. */
4438 static struct elf32_arm_stub_hash_entry
*
4439 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4440 struct elf32_arm_link_hash_table
*htab
,
4441 enum elf32_arm_stub_type stub_type
)
4445 struct elf32_arm_stub_hash_entry
*stub_entry
;
4447 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4449 if (stub_sec
== NULL
)
4452 /* Enter this entry into the linker stub hash table. */
4453 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4455 if (stub_entry
== NULL
)
4457 if (section
== NULL
)
4459 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
4465 stub_entry
->stub_sec
= stub_sec
;
4466 stub_entry
->stub_offset
= 0;
4467 stub_entry
->id_sec
= link_sec
;
4472 /* Store an Arm insn into an output section not processed by
4473 elf32_arm_write_section. */
4476 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4477 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4479 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4480 bfd_putl32 (val
, ptr
);
4482 bfd_putb32 (val
, ptr
);
4485 /* Store a 16-bit Thumb insn into an output section not processed by
4486 elf32_arm_write_section. */
4489 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4490 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4492 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4493 bfd_putl16 (val
, ptr
);
4495 bfd_putb16 (val
, ptr
);
4498 /* Store a Thumb2 insn into an output section not processed by
4499 elf32_arm_write_section. */
4502 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4503 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4505 /* T2 instructions are 16-bit streamed. */
4506 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4508 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4509 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4513 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4514 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4518 /* If it's possible to change R_TYPE to a more efficient access
4519 model, return the new reloc type. */
4522 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4523 struct elf_link_hash_entry
*h
)
4525 int is_local
= (h
== NULL
);
4527 if (bfd_link_pic (info
)
4528 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4531 /* We do not support relaxations for Old TLS models. */
4534 case R_ARM_TLS_GOTDESC
:
4535 case R_ARM_TLS_CALL
:
4536 case R_ARM_THM_TLS_CALL
:
4537 case R_ARM_TLS_DESCSEQ
:
4538 case R_ARM_THM_TLS_DESCSEQ
:
4539 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4545 static bfd_reloc_status_type elf32_arm_final_link_relocate
4546 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4547 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4548 const char *, unsigned char, enum arm_st_branch_type
,
4549 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4552 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4556 case arm_stub_a8_veneer_b_cond
:
4557 case arm_stub_a8_veneer_b
:
4558 case arm_stub_a8_veneer_bl
:
4561 case arm_stub_long_branch_any_any
:
4562 case arm_stub_long_branch_v4t_arm_thumb
:
4563 case arm_stub_long_branch_thumb_only
:
4564 case arm_stub_long_branch_thumb2_only
:
4565 case arm_stub_long_branch_thumb2_only_pure
:
4566 case arm_stub_long_branch_v4t_thumb_thumb
:
4567 case arm_stub_long_branch_v4t_thumb_arm
:
4568 case arm_stub_short_branch_v4t_thumb_arm
:
4569 case arm_stub_long_branch_any_arm_pic
:
4570 case arm_stub_long_branch_any_thumb_pic
:
4571 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4572 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4573 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4574 case arm_stub_long_branch_thumb_only_pic
:
4575 case arm_stub_long_branch_any_tls_pic
:
4576 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4577 case arm_stub_cmse_branch_thumb_only
:
4578 case arm_stub_a8_veneer_blx
:
4581 case arm_stub_long_branch_arm_nacl
:
4582 case arm_stub_long_branch_arm_nacl_pic
:
4586 abort (); /* Should be unreachable. */
4590 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4591 veneering (TRUE) or have their own symbol (FALSE). */
4594 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4596 if (stub_type
>= max_stub_type
)
4597 abort (); /* Should be unreachable. */
4601 case arm_stub_cmse_branch_thumb_only
:
4608 abort (); /* Should be unreachable. */
4611 /* Returns the padding needed for the dedicated section used stubs of type
4615 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4617 if (stub_type
>= max_stub_type
)
4618 abort (); /* Should be unreachable. */
4622 case arm_stub_cmse_branch_thumb_only
:
4629 abort (); /* Should be unreachable. */
4633 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4637 struct elf32_arm_stub_hash_entry
*stub_entry
;
4638 struct elf32_arm_link_hash_table
*globals
;
4639 struct bfd_link_info
*info
;
4646 const insn_sequence
*template_sequence
;
4648 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4649 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4652 /* Massage our args to the form they really have. */
4653 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4654 info
= (struct bfd_link_info
*) in_arg
;
4656 globals
= elf32_arm_hash_table (info
);
4657 if (globals
== NULL
)
4660 stub_sec
= stub_entry
->stub_sec
;
4662 if ((globals
->fix_cortex_a8
< 0)
4663 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4664 /* We have to do less-strictly-aligned fixes last. */
4667 /* Make a note of the offset within the stubs for this entry. */
4668 stub_entry
->stub_offset
= stub_sec
->size
;
4669 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4671 stub_bfd
= stub_sec
->owner
;
4673 /* This is the address of the stub destination. */
4674 sym_value
= (stub_entry
->target_value
4675 + stub_entry
->target_section
->output_offset
4676 + stub_entry
->target_section
->output_section
->vma
);
4678 template_sequence
= stub_entry
->stub_template
;
4679 template_size
= stub_entry
->stub_template_size
;
4682 for (i
= 0; i
< template_size
; i
++)
4684 switch (template_sequence
[i
].type
)
4688 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4689 if (template_sequence
[i
].reloc_addend
!= 0)
4691 /* We've borrowed the reloc_addend field to mean we should
4692 insert a condition code into this (Thumb-1 branch)
4693 instruction. See THUMB16_BCOND_INSN. */
4694 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4695 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4697 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4703 bfd_put_16 (stub_bfd
,
4704 (template_sequence
[i
].data
>> 16) & 0xffff,
4706 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4708 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4710 stub_reloc_idx
[nrelocs
] = i
;
4711 stub_reloc_offset
[nrelocs
++] = size
;
4717 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4719 /* Handle cases where the target is encoded within the
4721 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4723 stub_reloc_idx
[nrelocs
] = i
;
4724 stub_reloc_offset
[nrelocs
++] = size
;
4730 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4731 stub_reloc_idx
[nrelocs
] = i
;
4732 stub_reloc_offset
[nrelocs
++] = size
;
4742 stub_sec
->size
+= size
;
4744 /* Stub size has already been computed in arm_size_one_stub. Check
4746 BFD_ASSERT (size
== stub_entry
->stub_size
);
4748 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4749 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4752 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4754 BFD_ASSERT (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
);
4756 for (i
= 0; i
< nrelocs
; i
++)
4758 Elf_Internal_Rela rel
;
4759 bfd_boolean unresolved_reloc
;
4760 char *error_message
;
4762 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4764 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4765 rel
.r_info
= ELF32_R_INFO (0,
4766 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4769 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4770 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4771 template should refer back to the instruction after the original
4772 branch. We use target_section as Cortex-A8 erratum workaround stubs
4773 are only generated when both source and target are in the same
4775 points_to
= stub_entry
->target_section
->output_section
->vma
4776 + stub_entry
->target_section
->output_offset
4777 + stub_entry
->source_value
;
4779 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4780 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4781 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4782 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4783 stub_entry
->branch_type
,
4784 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4792 /* Calculate the template, template size and instruction size for a stub.
4793 Return value is the instruction size. */
4796 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4797 const insn_sequence
**stub_template
,
4798 int *stub_template_size
)
4800 const insn_sequence
*template_sequence
= NULL
;
4801 int template_size
= 0, i
;
4804 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4806 *stub_template
= template_sequence
;
4808 template_size
= stub_definitions
[stub_type
].template_size
;
4809 if (stub_template_size
)
4810 *stub_template_size
= template_size
;
4813 for (i
= 0; i
< template_size
; i
++)
4815 switch (template_sequence
[i
].type
)
4836 /* As above, but don't actually build the stub. Just bump offset so
4837 we know stub section sizes. */
4840 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4841 void *in_arg ATTRIBUTE_UNUSED
)
4843 struct elf32_arm_stub_hash_entry
*stub_entry
;
4844 const insn_sequence
*template_sequence
;
4845 int template_size
, size
;
4847 /* Massage our args to the form they really have. */
4848 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4850 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4851 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4853 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4856 stub_entry
->stub_size
= size
;
4857 stub_entry
->stub_template
= template_sequence
;
4858 stub_entry
->stub_template_size
= template_size
;
4860 size
= (size
+ 7) & ~7;
4861 stub_entry
->stub_sec
->size
+= size
;
4866 /* External entry points for sizing and building linker stubs. */
4868 /* Set up various things so that we can make a list of input sections
4869 for each output section included in the link. Returns -1 on error,
4870 0 when no stubs will be needed, and 1 on success. */
4873 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4874 struct bfd_link_info
*info
)
4877 unsigned int bfd_count
;
4878 unsigned int top_id
, top_index
;
4880 asection
**input_list
, **list
;
4882 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4886 if (! is_elf_hash_table (htab
))
4889 /* Count the number of input BFDs and find the top input section id. */
4890 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4892 input_bfd
= input_bfd
->link
.next
)
4895 for (section
= input_bfd
->sections
;
4897 section
= section
->next
)
4899 if (top_id
< section
->id
)
4900 top_id
= section
->id
;
4903 htab
->bfd_count
= bfd_count
;
4905 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4906 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4907 if (htab
->stub_group
== NULL
)
4909 htab
->top_id
= top_id
;
4911 /* We can't use output_bfd->section_count here to find the top output
4912 section index as some sections may have been removed, and
4913 _bfd_strip_section_from_output doesn't renumber the indices. */
4914 for (section
= output_bfd
->sections
, top_index
= 0;
4916 section
= section
->next
)
4918 if (top_index
< section
->index
)
4919 top_index
= section
->index
;
4922 htab
->top_index
= top_index
;
4923 amt
= sizeof (asection
*) * (top_index
+ 1);
4924 input_list
= (asection
**) bfd_malloc (amt
);
4925 htab
->input_list
= input_list
;
4926 if (input_list
== NULL
)
4929 /* For sections we aren't interested in, mark their entries with a
4930 value we can check later. */
4931 list
= input_list
+ top_index
;
4933 *list
= bfd_abs_section_ptr
;
4934 while (list
-- != input_list
);
4936 for (section
= output_bfd
->sections
;
4938 section
= section
->next
)
4940 if ((section
->flags
& SEC_CODE
) != 0)
4941 input_list
[section
->index
] = NULL
;
4947 /* The linker repeatedly calls this function for each input section,
4948 in the order that input sections are linked into output sections.
4949 Build lists of input sections to determine groupings between which
4950 we may insert linker stubs. */
4953 elf32_arm_next_input_section (struct bfd_link_info
*info
,
4956 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4961 if (isec
->output_section
->index
<= htab
->top_index
)
4963 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
4965 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
4967 /* Steal the link_sec pointer for our list. */
4968 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4969 /* This happens to make the list in reverse order,
4970 which we reverse later. */
4971 PREV_SEC (isec
) = *list
;
4977 /* See whether we can group stub sections together. Grouping stub
4978 sections may result in fewer stubs. More importantly, we need to
4979 put all .init* and .fini* stubs at the end of the .init or
4980 .fini output sections respectively, because glibc splits the
4981 _init and _fini functions into multiple parts. Putting a stub in
4982 the middle of a function is not a good idea. */
4985 group_sections (struct elf32_arm_link_hash_table
*htab
,
4986 bfd_size_type stub_group_size
,
4987 bfd_boolean stubs_always_after_branch
)
4989 asection
**list
= htab
->input_list
;
4993 asection
*tail
= *list
;
4996 if (tail
== bfd_abs_section_ptr
)
4999 /* Reverse the list: we must avoid placing stubs at the
5000 beginning of the section because the beginning of the text
5001 section may be required for an interrupt vector in bare metal
5003 #define NEXT_SEC PREV_SEC
5005 while (tail
!= NULL
)
5007 /* Pop from tail. */
5008 asection
*item
= tail
;
5009 tail
= PREV_SEC (item
);
5012 NEXT_SEC (item
) = head
;
5016 while (head
!= NULL
)
5020 bfd_vma stub_group_start
= head
->output_offset
;
5021 bfd_vma end_of_next
;
5024 while (NEXT_SEC (curr
) != NULL
)
5026 next
= NEXT_SEC (curr
);
5027 end_of_next
= next
->output_offset
+ next
->size
;
5028 if (end_of_next
- stub_group_start
>= stub_group_size
)
5029 /* End of NEXT is too far from start, so stop. */
5031 /* Add NEXT to the group. */
5035 /* OK, the size from the start to the start of CURR is less
5036 than stub_group_size and thus can be handled by one stub
5037 section. (Or the head section is itself larger than
5038 stub_group_size, in which case we may be toast.)
5039 We should really be keeping track of the total size of
5040 stubs added here, as stubs contribute to the final output
5044 next
= NEXT_SEC (head
);
5045 /* Set up this stub group. */
5046 htab
->stub_group
[head
->id
].link_sec
= curr
;
5048 while (head
!= curr
&& (head
= next
) != NULL
);
5050 /* But wait, there's more! Input sections up to stub_group_size
5051 bytes after the stub section can be handled by it too. */
5052 if (!stubs_always_after_branch
)
5054 stub_group_start
= curr
->output_offset
+ curr
->size
;
5056 while (next
!= NULL
)
5058 end_of_next
= next
->output_offset
+ next
->size
;
5059 if (end_of_next
- stub_group_start
>= stub_group_size
)
5060 /* End of NEXT is too far from stubs, so stop. */
5062 /* Add NEXT to the stub group. */
5064 next
= NEXT_SEC (head
);
5065 htab
->stub_group
[head
->id
].link_sec
= curr
;
5071 while (list
++ != htab
->input_list
+ htab
->top_index
);
5073 free (htab
->input_list
);
5078 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5082 a8_reloc_compare (const void *a
, const void *b
)
5084 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5085 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5087 if (ra
->from
< rb
->from
)
5089 else if (ra
->from
> rb
->from
)
5095 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5096 const char *, char **);
5098 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5099 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5100 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5104 cortex_a8_erratum_scan (bfd
*input_bfd
,
5105 struct bfd_link_info
*info
,
5106 struct a8_erratum_fix
**a8_fixes_p
,
5107 unsigned int *num_a8_fixes_p
,
5108 unsigned int *a8_fix_table_size_p
,
5109 struct a8_erratum_reloc
*a8_relocs
,
5110 unsigned int num_a8_relocs
,
5111 unsigned prev_num_a8_fixes
,
5112 bfd_boolean
*stub_changed_p
)
5115 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5116 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5117 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5118 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5123 for (section
= input_bfd
->sections
;
5125 section
= section
->next
)
5127 bfd_byte
*contents
= NULL
;
5128 struct _arm_elf_section_data
*sec_data
;
5132 if (elf_section_type (section
) != SHT_PROGBITS
5133 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5134 || (section
->flags
& SEC_EXCLUDE
) != 0
5135 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5136 || (section
->output_section
== bfd_abs_section_ptr
))
5139 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5141 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5142 contents
= elf_section_data (section
)->this_hdr
.contents
;
5143 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5146 sec_data
= elf32_arm_section_data (section
);
5148 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5150 unsigned int span_start
= sec_data
->map
[span
].vma
;
5151 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5152 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5154 char span_type
= sec_data
->map
[span
].type
;
5155 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5157 if (span_type
!= 't')
5160 /* Span is entirely within a single 4KB region: skip scanning. */
5161 if (((base_vma
+ span_start
) & ~0xfff)
5162 == ((base_vma
+ span_end
) & ~0xfff))
5165 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5167 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5168 * The branch target is in the same 4KB region as the
5169 first half of the branch.
5170 * The instruction before the branch is a 32-bit
5171 length non-branch instruction. */
5172 for (i
= span_start
; i
< span_end
;)
5174 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5175 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5176 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5178 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5183 /* Load the rest of the insn (in manual-friendly order). */
5184 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5186 /* Encoding T4: B<c>.W. */
5187 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5188 /* Encoding T1: BL<c>.W. */
5189 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5190 /* Encoding T2: BLX<c>.W. */
5191 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5192 /* Encoding T3: B<c>.W (not permitted in IT block). */
5193 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5194 && (insn
& 0x07f00000) != 0x03800000;
5197 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5199 if (((base_vma
+ i
) & 0xfff) == 0xffe
5203 && ! last_was_branch
)
5205 bfd_signed_vma offset
= 0;
5206 bfd_boolean force_target_arm
= FALSE
;
5207 bfd_boolean force_target_thumb
= FALSE
;
5209 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5210 struct a8_erratum_reloc key
, *found
;
5211 bfd_boolean use_plt
= FALSE
;
5213 key
.from
= base_vma
+ i
;
5214 found
= (struct a8_erratum_reloc
*)
5215 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5216 sizeof (struct a8_erratum_reloc
),
5221 char *error_message
= NULL
;
5222 struct elf_link_hash_entry
*entry
;
5224 /* We don't care about the error returned from this
5225 function, only if there is glue or not. */
5226 entry
= find_thumb_glue (info
, found
->sym_name
,
5230 found
->non_a8_stub
= TRUE
;
5232 /* Keep a simpler condition, for the sake of clarity. */
5233 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5234 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5237 if (found
->r_type
== R_ARM_THM_CALL
)
5239 if (found
->branch_type
== ST_BRANCH_TO_ARM
5241 force_target_arm
= TRUE
;
5243 force_target_thumb
= TRUE
;
5247 /* Check if we have an offending branch instruction. */
5249 if (found
&& found
->non_a8_stub
)
5250 /* We've already made a stub for this instruction, e.g.
5251 it's a long branch or a Thumb->ARM stub. Assume that
5252 stub will suffice to work around the A8 erratum (see
5253 setting of always_after_branch above). */
5257 offset
= (insn
& 0x7ff) << 1;
5258 offset
|= (insn
& 0x3f0000) >> 4;
5259 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5260 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5261 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5262 if (offset
& 0x100000)
5263 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5264 stub_type
= arm_stub_a8_veneer_b_cond
;
5266 else if (is_b
|| is_bl
|| is_blx
)
5268 int s
= (insn
& 0x4000000) != 0;
5269 int j1
= (insn
& 0x2000) != 0;
5270 int j2
= (insn
& 0x800) != 0;
5274 offset
= (insn
& 0x7ff) << 1;
5275 offset
|= (insn
& 0x3ff0000) >> 4;
5279 if (offset
& 0x1000000)
5280 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5283 offset
&= ~ ((bfd_signed_vma
) 3);
5285 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5286 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5289 if (stub_type
!= arm_stub_none
)
5291 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5293 /* The original instruction is a BL, but the target is
5294 an ARM instruction. If we were not making a stub,
5295 the BL would have been converted to a BLX. Use the
5296 BLX stub instead in that case. */
5297 if (htab
->use_blx
&& force_target_arm
5298 && stub_type
== arm_stub_a8_veneer_bl
)
5300 stub_type
= arm_stub_a8_veneer_blx
;
5304 /* Conversely, if the original instruction was
5305 BLX but the target is Thumb mode, use the BL
5307 else if (force_target_thumb
5308 && stub_type
== arm_stub_a8_veneer_blx
)
5310 stub_type
= arm_stub_a8_veneer_bl
;
5316 pc_for_insn
&= ~ ((bfd_vma
) 3);
5318 /* If we found a relocation, use the proper destination,
5319 not the offset in the (unrelocated) instruction.
5320 Note this is always done if we switched the stub type
5324 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5326 /* If the stub will use a Thumb-mode branch to a
5327 PLT target, redirect it to the preceding Thumb
5329 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5330 offset
-= PLT_THUMB_STUB_SIZE
;
5332 target
= pc_for_insn
+ offset
;
5334 /* The BLX stub is ARM-mode code. Adjust the offset to
5335 take the different PC value (+8 instead of +4) into
5337 if (stub_type
== arm_stub_a8_veneer_blx
)
5340 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5342 char *stub_name
= NULL
;
5344 if (num_a8_fixes
== a8_fix_table_size
)
5346 a8_fix_table_size
*= 2;
5347 a8_fixes
= (struct a8_erratum_fix
*)
5348 bfd_realloc (a8_fixes
,
5349 sizeof (struct a8_erratum_fix
)
5350 * a8_fix_table_size
);
5353 if (num_a8_fixes
< prev_num_a8_fixes
)
5355 /* If we're doing a subsequent scan,
5356 check if we've found the same fix as
5357 before, and try and reuse the stub
5359 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5360 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5361 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5365 *stub_changed_p
= TRUE
;
5371 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5372 if (stub_name
!= NULL
)
5373 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5376 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5377 a8_fixes
[num_a8_fixes
].section
= section
;
5378 a8_fixes
[num_a8_fixes
].offset
= i
;
5379 a8_fixes
[num_a8_fixes
].target_offset
=
5381 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5382 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5383 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5384 a8_fixes
[num_a8_fixes
].branch_type
=
5385 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5392 i
+= insn_32bit
? 4 : 2;
5393 last_was_32bit
= insn_32bit
;
5394 last_was_branch
= is_32bit_branch
;
5398 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5402 *a8_fixes_p
= a8_fixes
;
5403 *num_a8_fixes_p
= num_a8_fixes
;
5404 *a8_fix_table_size_p
= a8_fix_table_size
;
5409 /* Create or update a stub entry depending on whether the stub can already be
5410 found in HTAB. The stub is identified by:
5411 - its type STUB_TYPE
5412 - its source branch (note that several can share the same stub) whose
5413 section and relocation (if any) are given by SECTION and IRELA
5415 - its target symbol whose input section, hash, name, value and branch type
5416 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5419 If found, the value of the stub's target symbol is updated from SYM_VALUE
5420 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5421 TRUE and the stub entry is initialized.
5423 Returns whether the stub could be successfully created or updated, or FALSE
5424 if an error occured. */
5427 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5428 enum elf32_arm_stub_type stub_type
, asection
*section
,
5429 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5430 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5431 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5432 bfd_boolean
*new_stub
)
5434 const asection
*id_sec
;
5436 struct elf32_arm_stub_hash_entry
*stub_entry
;
5437 unsigned int r_type
;
5438 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5440 BFD_ASSERT (stub_type
!= arm_stub_none
);
5444 stub_name
= sym_name
;
5448 BFD_ASSERT (section
);
5450 /* Support for grouping stub sections. */
5451 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5453 /* Get the name of this stub. */
5454 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5460 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5462 /* The proper stub has already been created, just update its value. */
5463 if (stub_entry
!= NULL
)
5467 stub_entry
->target_value
= sym_value
;
5471 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5472 if (stub_entry
== NULL
)
5479 stub_entry
->target_value
= sym_value
;
5480 stub_entry
->target_section
= sym_sec
;
5481 stub_entry
->stub_type
= stub_type
;
5482 stub_entry
->h
= hash
;
5483 stub_entry
->branch_type
= branch_type
;
5486 stub_entry
->output_name
= sym_name
;
5489 if (sym_name
== NULL
)
5490 sym_name
= "unnamed";
5491 stub_entry
->output_name
= (char *)
5492 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5493 + strlen (sym_name
));
5494 if (stub_entry
->output_name
== NULL
)
5500 /* For historical reasons, use the existing names for ARM-to-Thumb and
5501 Thumb-to-ARM stubs. */
5502 r_type
= ELF32_R_TYPE (irela
->r_info
);
5503 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5504 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5505 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5506 && branch_type
== ST_BRANCH_TO_ARM
)
5507 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5508 else if ((r_type
== (unsigned int) R_ARM_CALL
5509 || r_type
== (unsigned int) R_ARM_JUMP24
)
5510 && branch_type
== ST_BRANCH_TO_THUMB
)
5511 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5513 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5520 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5521 gateway veneer to transition from non secure to secure state and create them
5524 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5525 defines the conditions that govern Secure Gateway veneer creation for a
5526 given symbol <SYM> as follows:
5527 - it has function type
5528 - it has non local binding
5529 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5530 same type, binding and value as <SYM> (called normal symbol).
5531 An entry function can handle secure state transition itself in which case
5532 its special symbol would have a different value from the normal symbol.
5534 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5535 entry mapping while HTAB gives the name to hash entry mapping.
5537 If any secure gateway veneer is created, *STUB_CHANGED is set to TRUE. The
5538 return value gives whether a stub failed to be allocated. */
5541 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5542 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5543 bfd_boolean
*stub_changed
)
5545 const struct elf_backend_data
*bed
;
5546 Elf_Internal_Shdr
*symtab_hdr
;
5547 unsigned i
, j
, sym_count
, ext_start
;
5548 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5549 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5550 enum arm_st_branch_type branch_type
;
5551 char *sym_name
, *lsym_name
;
5554 bfd_boolean is_v8m
, new_stub
, created_stub
, cmse_invalid
, ret
= TRUE
;
5556 bed
= get_elf_backend_data (input_bfd
);
5557 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5558 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5559 ext_start
= symtab_hdr
->sh_info
;
5560 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5561 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5563 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5564 if (local_syms
== NULL
)
5565 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5566 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5568 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5572 for (i
= 0; i
< sym_count
; i
++)
5574 cmse_invalid
= FALSE
;
5578 cmse_sym
= &local_syms
[i
];
5579 /* Not a special symbol. */
5580 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym
->st_target_internal
))
5582 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5583 symtab_hdr
->sh_link
,
5585 /* Special symbol with local binding. */
5586 cmse_invalid
= TRUE
;
5590 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5591 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5593 /* Not a special symbol. */
5594 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
5597 /* Special symbol has incorrect binding or type. */
5598 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5599 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5600 || cmse_hash
->root
.type
!= STT_FUNC
)
5601 cmse_invalid
= TRUE
;
5606 (*_bfd_error_handler
) (_("%B: Special symbol `%s' only allowed for "
5607 "ARMv8-M architecture or later."),
5608 input_bfd
, sym_name
);
5609 is_v8m
= TRUE
; /* Avoid multiple warning. */
5615 (*_bfd_error_handler
) (_("%B: invalid special symbol `%s'."),
5616 input_bfd
, sym_name
);
5617 (*_bfd_error_handler
) (_("It must be a global or weak function "
5624 sym_name
+= strlen (CMSE_PREFIX
);
5625 hash
= (struct elf32_arm_link_hash_entry
*)
5626 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5628 /* No associated normal symbol or it is neither global nor weak. */
5630 || (hash
->root
.root
.type
!= bfd_link_hash_defined
5631 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5632 || hash
->root
.type
!= STT_FUNC
)
5634 /* Initialize here to avoid warning about use of possibly
5635 uninitialized variable. */
5640 /* Searching for a normal symbol with local binding. */
5641 for (; j
< ext_start
; j
++)
5644 bfd_elf_string_from_elf_section (input_bfd
,
5645 symtab_hdr
->sh_link
,
5646 local_syms
[j
].st_name
);
5647 if (!strcmp (sym_name
, lsym_name
))
5652 if (hash
|| j
< ext_start
)
5654 (*_bfd_error_handler
)
5655 (_("%B: invalid standard symbol `%s'."), input_bfd
, sym_name
);
5656 (*_bfd_error_handler
)
5657 (_("It must be a global or weak function symbol."));
5660 (*_bfd_error_handler
)
5661 (_("%B: absent standard symbol `%s'."), input_bfd
, sym_name
);
5667 sym_value
= hash
->root
.root
.u
.def
.value
;
5668 section
= hash
->root
.root
.u
.def
.section
;
5670 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
5672 (*_bfd_error_handler
)
5673 (_("%B: `%s' and its special symbol are in different sections."),
5674 input_bfd
, sym_name
);
5677 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
5678 continue; /* Ignore: could be an entry function starting with SG. */
5680 /* If this section is a link-once section that will be discarded, then
5681 don't create any stubs. */
5682 if (section
->output_section
== NULL
)
5684 (*_bfd_error_handler
)
5685 (_("%B: entry function `%s' not output."), input_bfd
, sym_name
);
5689 if (hash
->root
.size
== 0)
5691 (*_bfd_error_handler
)
5692 (_("%B: entry function `%s' is empty."), input_bfd
, sym_name
);
5698 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
5700 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5701 NULL
, NULL
, section
, hash
, sym_name
,
5702 sym_value
, branch_type
, &new_stub
);
5708 BFD_ASSERT (new_stub
);
5709 *stub_changed
= TRUE
;
5713 if (!symtab_hdr
->contents
)
5718 /* Determine and set the size of the stub section for a final link.
5720 The basic idea here is to examine all the relocations looking for
5721 PC-relative calls to a target that is unreachable with a "bl"
5725 elf32_arm_size_stubs (bfd
*output_bfd
,
5727 struct bfd_link_info
*info
,
5728 bfd_signed_vma group_size
,
5729 asection
* (*add_stub_section
) (const char *, asection
*,
5732 void (*layout_sections_again
) (void))
5734 obj_attribute
*out_attr
;
5735 bfd_size_type stub_group_size
;
5736 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
5737 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5738 struct a8_erratum_fix
*a8_fixes
= NULL
;
5739 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
5740 struct a8_erratum_reloc
*a8_relocs
= NULL
;
5741 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
5746 if (htab
->fix_cortex_a8
)
5748 a8_fixes
= (struct a8_erratum_fix
*)
5749 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
5750 a8_relocs
= (struct a8_erratum_reloc
*)
5751 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
5754 /* Propagate mach to stub bfd, because it may not have been
5755 finalized when we created stub_bfd. */
5756 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
5757 bfd_get_mach (output_bfd
));
5759 /* Stash our params away. */
5760 htab
->stub_bfd
= stub_bfd
;
5761 htab
->add_stub_section
= add_stub_section
;
5762 htab
->layout_sections_again
= layout_sections_again
;
5763 stubs_always_after_branch
= group_size
< 0;
5765 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
5766 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
5767 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5768 as the first half of a 32-bit branch straddling two 4K pages. This is a
5769 crude way of enforcing that. */
5770 if (htab
->fix_cortex_a8
)
5771 stubs_always_after_branch
= 1;
5774 stub_group_size
= -group_size
;
5776 stub_group_size
= group_size
;
5778 if (stub_group_size
== 1)
5780 /* Default values. */
5781 /* Thumb branch range is +-4MB has to be used as the default
5782 maximum size (a given section can contain both ARM and Thumb
5783 code, so the worst case has to be taken into account).
5785 This value is 24K less than that, which allows for 2025
5786 12-byte stubs. If we exceed that, then we will fail to link.
5787 The user will have to relink with an explicit group size
5789 stub_group_size
= 4170000;
5792 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
5794 /* If we're applying the cortex A8 fix, we need to determine the
5795 program header size now, because we cannot change it later --
5796 that could alter section placements. Notice the A8 erratum fix
5797 ends up requiring the section addresses to remain unchanged
5798 modulo the page size. That's something we cannot represent
5799 inside BFD, and we don't want to force the section alignment to
5800 be the page size. */
5801 if (htab
->fix_cortex_a8
)
5802 (*htab
->layout_sections_again
) ();
5807 unsigned int bfd_indx
;
5809 enum elf32_arm_stub_type stub_type
;
5810 bfd_boolean stub_changed
= FALSE
;
5811 unsigned prev_num_a8_fixes
= num_a8_fixes
;
5814 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
5816 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
5818 Elf_Internal_Shdr
*symtab_hdr
;
5820 Elf_Internal_Sym
*local_syms
= NULL
;
5822 if (!is_arm_elf (input_bfd
))
5827 /* We'll need the symbol table in a second. */
5828 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5829 if (symtab_hdr
->sh_info
== 0)
5832 /* Limit scan of symbols to object file whose profile is
5833 Microcontroller to not hinder performance in the general case. */
5834 if (m_profile
&& first_veneer_scan
)
5836 struct elf_link_hash_entry
**sym_hashes
;
5838 sym_hashes
= elf_sym_hashes (input_bfd
);
5839 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
5841 goto error_ret_free_local
;
5844 /* Walk over each section attached to the input bfd. */
5845 for (section
= input_bfd
->sections
;
5847 section
= section
->next
)
5849 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
5851 /* If there aren't any relocs, then there's nothing more
5853 if ((section
->flags
& SEC_RELOC
) == 0
5854 || section
->reloc_count
== 0
5855 || (section
->flags
& SEC_CODE
) == 0)
5858 /* If this section is a link-once section that will be
5859 discarded, then don't create any stubs. */
5860 if (section
->output_section
== NULL
5861 || section
->output_section
->owner
!= output_bfd
)
5864 /* Get the relocs. */
5866 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
5867 NULL
, info
->keep_memory
);
5868 if (internal_relocs
== NULL
)
5869 goto error_ret_free_local
;
5871 /* Now examine each relocation. */
5872 irela
= internal_relocs
;
5873 irelaend
= irela
+ section
->reloc_count
;
5874 for (; irela
< irelaend
; irela
++)
5876 unsigned int r_type
, r_indx
;
5879 bfd_vma destination
;
5880 struct elf32_arm_link_hash_entry
*hash
;
5881 const char *sym_name
;
5882 unsigned char st_type
;
5883 enum arm_st_branch_type branch_type
;
5884 bfd_boolean created_stub
= FALSE
;
5886 r_type
= ELF32_R_TYPE (irela
->r_info
);
5887 r_indx
= ELF32_R_SYM (irela
->r_info
);
5889 if (r_type
>= (unsigned int) R_ARM_max
)
5891 bfd_set_error (bfd_error_bad_value
);
5892 error_ret_free_internal
:
5893 if (elf_section_data (section
)->relocs
== NULL
)
5894 free (internal_relocs
);
5896 error_ret_free_local
:
5897 if (local_syms
!= NULL
5898 && (symtab_hdr
->contents
5899 != (unsigned char *) local_syms
))
5905 if (r_indx
>= symtab_hdr
->sh_info
)
5906 hash
= elf32_arm_hash_entry
5907 (elf_sym_hashes (input_bfd
)
5908 [r_indx
- symtab_hdr
->sh_info
]);
5910 /* Only look for stubs on branch instructions, or
5911 non-relaxed TLSCALL */
5912 if ((r_type
!= (unsigned int) R_ARM_CALL
)
5913 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
5914 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
5915 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
5916 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
5917 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
5918 && (r_type
!= (unsigned int) R_ARM_PLT32
)
5919 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
5920 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5921 && r_type
== elf32_arm_tls_transition
5922 (info
, r_type
, &hash
->root
)
5923 && ((hash
? hash
->tls_type
5924 : (elf32_arm_local_got_tls_type
5925 (input_bfd
)[r_indx
]))
5926 & GOT_TLS_GDESC
) != 0))
5929 /* Now determine the call target, its name, value,
5936 if (r_type
== (unsigned int) R_ARM_TLS_CALL
5937 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5939 /* A non-relaxed TLS call. The target is the
5940 plt-resident trampoline and nothing to do
5942 BFD_ASSERT (htab
->tls_trampoline
> 0);
5943 sym_sec
= htab
->root
.splt
;
5944 sym_value
= htab
->tls_trampoline
;
5947 branch_type
= ST_BRANCH_TO_ARM
;
5951 /* It's a local symbol. */
5952 Elf_Internal_Sym
*sym
;
5954 if (local_syms
== NULL
)
5957 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5958 if (local_syms
== NULL
)
5960 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5961 symtab_hdr
->sh_info
, 0,
5963 if (local_syms
== NULL
)
5964 goto error_ret_free_internal
;
5967 sym
= local_syms
+ r_indx
;
5968 if (sym
->st_shndx
== SHN_UNDEF
)
5969 sym_sec
= bfd_und_section_ptr
;
5970 else if (sym
->st_shndx
== SHN_ABS
)
5971 sym_sec
= bfd_abs_section_ptr
;
5972 else if (sym
->st_shndx
== SHN_COMMON
)
5973 sym_sec
= bfd_com_section_ptr
;
5976 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
5979 /* This is an undefined symbol. It can never
5983 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
5984 sym_value
= sym
->st_value
;
5985 destination
= (sym_value
+ irela
->r_addend
5986 + sym_sec
->output_offset
5987 + sym_sec
->output_section
->vma
);
5988 st_type
= ELF_ST_TYPE (sym
->st_info
);
5990 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
5992 = bfd_elf_string_from_elf_section (input_bfd
,
5993 symtab_hdr
->sh_link
,
5998 /* It's an external symbol. */
5999 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6000 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6001 hash
= ((struct elf32_arm_link_hash_entry
*)
6002 hash
->root
.root
.u
.i
.link
);
6004 if (hash
->root
.root
.type
== bfd_link_hash_defined
6005 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6007 sym_sec
= hash
->root
.root
.u
.def
.section
;
6008 sym_value
= hash
->root
.root
.u
.def
.value
;
6010 struct elf32_arm_link_hash_table
*globals
=
6011 elf32_arm_hash_table (info
);
6013 /* For a destination in a shared library,
6014 use the PLT stub as target address to
6015 decide whether a branch stub is
6018 && globals
->root
.splt
!= NULL
6020 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6022 sym_sec
= globals
->root
.splt
;
6023 sym_value
= hash
->root
.plt
.offset
;
6024 if (sym_sec
->output_section
!= NULL
)
6025 destination
= (sym_value
6026 + sym_sec
->output_offset
6027 + sym_sec
->output_section
->vma
);
6029 else if (sym_sec
->output_section
!= NULL
)
6030 destination
= (sym_value
+ irela
->r_addend
6031 + sym_sec
->output_offset
6032 + sym_sec
->output_section
->vma
);
6034 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6035 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6037 /* For a shared library, use the PLT stub as
6038 target address to decide whether a long
6039 branch stub is needed.
6040 For absolute code, they cannot be handled. */
6041 struct elf32_arm_link_hash_table
*globals
=
6042 elf32_arm_hash_table (info
);
6045 && globals
->root
.splt
!= NULL
6047 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6049 sym_sec
= globals
->root
.splt
;
6050 sym_value
= hash
->root
.plt
.offset
;
6051 if (sym_sec
->output_section
!= NULL
)
6052 destination
= (sym_value
6053 + sym_sec
->output_offset
6054 + sym_sec
->output_section
->vma
);
6061 bfd_set_error (bfd_error_bad_value
);
6062 goto error_ret_free_internal
;
6064 st_type
= hash
->root
.type
;
6066 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6067 sym_name
= hash
->root
.root
.root
.string
;
6072 bfd_boolean new_stub
;
6074 /* Determine what (if any) linker stub is needed. */
6075 stub_type
= arm_type_of_stub (info
, section
, irela
,
6076 st_type
, &branch_type
,
6077 hash
, destination
, sym_sec
,
6078 input_bfd
, sym_name
);
6079 if (stub_type
== arm_stub_none
)
6082 /* We've either created a stub for this reloc already,
6083 or we are about to. */
6085 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6087 (char *) sym_name
, sym_value
,
6088 branch_type
, &new_stub
);
6091 goto error_ret_free_internal
;
6095 stub_changed
= TRUE
;
6099 /* Look for relocations which might trigger Cortex-A8
6101 if (htab
->fix_cortex_a8
6102 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6103 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6104 || r_type
== (unsigned int) R_ARM_THM_CALL
6105 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6107 bfd_vma from
= section
->output_section
->vma
6108 + section
->output_offset
6111 if ((from
& 0xfff) == 0xffe)
6113 /* Found a candidate. Note we haven't checked the
6114 destination is within 4K here: if we do so (and
6115 don't create an entry in a8_relocs) we can't tell
6116 that a branch should have been relocated when
6118 if (num_a8_relocs
== a8_reloc_table_size
)
6120 a8_reloc_table_size
*= 2;
6121 a8_relocs
= (struct a8_erratum_reloc
*)
6122 bfd_realloc (a8_relocs
,
6123 sizeof (struct a8_erratum_reloc
)
6124 * a8_reloc_table_size
);
6127 a8_relocs
[num_a8_relocs
].from
= from
;
6128 a8_relocs
[num_a8_relocs
].destination
= destination
;
6129 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6130 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6131 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6132 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6133 a8_relocs
[num_a8_relocs
].hash
= hash
;
6140 /* We're done with the internal relocs, free them. */
6141 if (elf_section_data (section
)->relocs
== NULL
)
6142 free (internal_relocs
);
6145 if (htab
->fix_cortex_a8
)
6147 /* Sort relocs which might apply to Cortex-A8 erratum. */
6148 qsort (a8_relocs
, num_a8_relocs
,
6149 sizeof (struct a8_erratum_reloc
),
6152 /* Scan for branches which might trigger Cortex-A8 erratum. */
6153 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6154 &num_a8_fixes
, &a8_fix_table_size
,
6155 a8_relocs
, num_a8_relocs
,
6156 prev_num_a8_fixes
, &stub_changed
)
6158 goto error_ret_free_local
;
6161 if (local_syms
!= NULL
6162 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6164 if (!info
->keep_memory
)
6167 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6171 if (prev_num_a8_fixes
!= num_a8_fixes
)
6172 stub_changed
= TRUE
;
6177 /* OK, we've added some stubs. Find out the new size of the
6179 for (stub_sec
= htab
->stub_bfd
->sections
;
6181 stub_sec
= stub_sec
->next
)
6183 /* Ignore non-stub sections. */
6184 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6190 /* Compute stub section size, considering padding. */
6191 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6192 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6196 asection
**stub_sec_p
;
6198 padding
= arm_dedicated_stub_section_padding (stub_type
);
6199 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6200 /* Skip if no stub input section or no stub section padding
6202 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6204 /* Stub section padding required but no dedicated section. */
6205 BFD_ASSERT (stub_sec_p
);
6207 size
= (*stub_sec_p
)->size
;
6208 size
= (size
+ padding
- 1) & ~(padding
- 1);
6209 (*stub_sec_p
)->size
= size
;
6212 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6213 if (htab
->fix_cortex_a8
)
6214 for (i
= 0; i
< num_a8_fixes
; i
++)
6216 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6217 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6219 if (stub_sec
== NULL
)
6223 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6228 /* Ask the linker to do its stuff. */
6229 (*htab
->layout_sections_again
) ();
6230 first_veneer_scan
= FALSE
;
6233 /* Add stubs for Cortex-A8 erratum fixes now. */
6234 if (htab
->fix_cortex_a8
)
6236 for (i
= 0; i
< num_a8_fixes
; i
++)
6238 struct elf32_arm_stub_hash_entry
*stub_entry
;
6239 char *stub_name
= a8_fixes
[i
].stub_name
;
6240 asection
*section
= a8_fixes
[i
].section
;
6241 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6242 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6243 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6244 const insn_sequence
*template_sequence
;
6245 int template_size
, size
= 0;
6247 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6249 if (stub_entry
== NULL
)
6251 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
6257 stub_entry
->stub_sec
= stub_sec
;
6258 stub_entry
->stub_offset
= 0;
6259 stub_entry
->id_sec
= link_sec
;
6260 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6261 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6262 stub_entry
->target_section
= a8_fixes
[i
].section
;
6263 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6264 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6265 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6267 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6271 stub_entry
->stub_size
= size
;
6272 stub_entry
->stub_template
= template_sequence
;
6273 stub_entry
->stub_template_size
= template_size
;
6276 /* Stash the Cortex-A8 erratum fix array for use later in
6277 elf32_arm_write_section(). */
6278 htab
->a8_erratum_fixes
= a8_fixes
;
6279 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6283 htab
->a8_erratum_fixes
= NULL
;
6284 htab
->num_a8_erratum_fixes
= 0;
6289 /* Build all the stubs associated with the current output file. The
6290 stubs are kept in a hash table attached to the main linker hash
6291 table. We also set up the .plt entries for statically linked PIC
6292 functions here. This function is called via arm_elf_finish in the
6296 elf32_arm_build_stubs (struct bfd_link_info
*info
)
6299 struct bfd_hash_table
*table
;
6300 struct elf32_arm_link_hash_table
*htab
;
6302 htab
= elf32_arm_hash_table (info
);
6306 for (stub_sec
= htab
->stub_bfd
->sections
;
6308 stub_sec
= stub_sec
->next
)
6312 /* Ignore non-stub sections. */
6313 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6316 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6317 must at least be done for stub section requiring padding. */
6318 size
= stub_sec
->size
;
6319 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
6320 if (stub_sec
->contents
== NULL
&& size
!= 0)
6325 /* Build the stubs as directed by the stub hash table. */
6326 table
= &htab
->stub_hash_table
;
6327 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6328 if (htab
->fix_cortex_a8
)
6330 /* Place the cortex a8 stubs last. */
6331 htab
->fix_cortex_a8
= -1;
6332 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6338 /* Locate the Thumb encoded calling stub for NAME. */
6340 static struct elf_link_hash_entry
*
6341 find_thumb_glue (struct bfd_link_info
*link_info
,
6343 char **error_message
)
6346 struct elf_link_hash_entry
*hash
;
6347 struct elf32_arm_link_hash_table
*hash_table
;
6349 /* We need a pointer to the armelf specific hash table. */
6350 hash_table
= elf32_arm_hash_table (link_info
);
6351 if (hash_table
== NULL
)
6354 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6355 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
6357 BFD_ASSERT (tmp_name
);
6359 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
6361 hash
= elf_link_hash_lookup
6362 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6365 && asprintf (error_message
, _("unable to find THUMB glue '%s' for '%s'"),
6366 tmp_name
, name
) == -1)
6367 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6374 /* Locate the ARM encoded calling stub for NAME. */
6376 static struct elf_link_hash_entry
*
6377 find_arm_glue (struct bfd_link_info
*link_info
,
6379 char **error_message
)
6382 struct elf_link_hash_entry
*myh
;
6383 struct elf32_arm_link_hash_table
*hash_table
;
6385 /* We need a pointer to the elfarm specific hash table. */
6386 hash_table
= elf32_arm_hash_table (link_info
);
6387 if (hash_table
== NULL
)
6390 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6391 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6393 BFD_ASSERT (tmp_name
);
6395 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6397 myh
= elf_link_hash_lookup
6398 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6401 && asprintf (error_message
, _("unable to find ARM glue '%s' for '%s'"),
6402 tmp_name
, name
) == -1)
6403 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6410 /* ARM->Thumb glue (static images):
6414 ldr r12, __func_addr
6417 .word func @ behave as if you saw a ARM_32 reloc.
6424 .word func @ behave as if you saw a ARM_32 reloc.
6426 (relocatable images)
6429 ldr r12, __func_offset
6435 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6436 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
6437 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
6438 static const insn32 a2t3_func_addr_insn
= 0x00000001;
6440 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6441 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
6442 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
6444 #define ARM2THUMB_PIC_GLUE_SIZE 16
6445 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
6446 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
6447 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
6449 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6453 __func_from_thumb: __func_from_thumb:
6455 nop ldr r6, __func_addr
6465 #define THUMB2ARM_GLUE_SIZE 8
6466 static const insn16 t2a1_bx_pc_insn
= 0x4778;
6467 static const insn16 t2a2_noop_insn
= 0x46c0;
6468 static const insn32 t2a3_b_insn
= 0xea000000;
6470 #define VFP11_ERRATUM_VENEER_SIZE 8
6471 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6472 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6474 #define ARM_BX_VENEER_SIZE 12
6475 static const insn32 armbx1_tst_insn
= 0xe3100001;
6476 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
6477 static const insn32 armbx3_bx_insn
= 0xe12fff10;
6479 #ifndef ELFARM_NABI_C_INCLUDED
6481 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
6484 bfd_byte
* contents
;
6488 /* Do not include empty glue sections in the output. */
6491 s
= bfd_get_linker_section (abfd
, name
);
6493 s
->flags
|= SEC_EXCLUDE
;
6498 BFD_ASSERT (abfd
!= NULL
);
6500 s
= bfd_get_linker_section (abfd
, name
);
6501 BFD_ASSERT (s
!= NULL
);
6503 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
6505 BFD_ASSERT (s
->size
== size
);
6506 s
->contents
= contents
;
6510 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
6512 struct elf32_arm_link_hash_table
* globals
;
6514 globals
= elf32_arm_hash_table (info
);
6515 BFD_ASSERT (globals
!= NULL
);
6517 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6518 globals
->arm_glue_size
,
6519 ARM2THUMB_GLUE_SECTION_NAME
);
6521 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6522 globals
->thumb_glue_size
,
6523 THUMB2ARM_GLUE_SECTION_NAME
);
6525 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6526 globals
->vfp11_erratum_glue_size
,
6527 VFP11_ERRATUM_VENEER_SECTION_NAME
);
6529 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6530 globals
->stm32l4xx_erratum_glue_size
,
6531 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6533 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6534 globals
->bx_glue_size
,
6535 ARM_BX_GLUE_SECTION_NAME
);
6540 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6541 returns the symbol identifying the stub. */
6543 static struct elf_link_hash_entry
*
6544 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
6545 struct elf_link_hash_entry
* h
)
6547 const char * name
= h
->root
.root
.string
;
6550 struct elf_link_hash_entry
* myh
;
6551 struct bfd_link_hash_entry
* bh
;
6552 struct elf32_arm_link_hash_table
* globals
;
6556 globals
= elf32_arm_hash_table (link_info
);
6557 BFD_ASSERT (globals
!= NULL
);
6558 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6560 s
= bfd_get_linker_section
6561 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
6563 BFD_ASSERT (s
!= NULL
);
6565 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6566 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6568 BFD_ASSERT (tmp_name
);
6570 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6572 myh
= elf_link_hash_lookup
6573 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6577 /* We've already seen this guy. */
6582 /* The only trick here is using hash_table->arm_glue_size as the value.
6583 Even though the section isn't allocated yet, this is where we will be
6584 putting it. The +1 on the value marks that the stub has not been
6585 output yet - not that it is a Thumb function. */
6587 val
= globals
->arm_glue_size
+ 1;
6588 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6589 tmp_name
, BSF_GLOBAL
, s
, val
,
6590 NULL
, TRUE
, FALSE
, &bh
);
6592 myh
= (struct elf_link_hash_entry
*) bh
;
6593 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6594 myh
->forced_local
= 1;
6598 if (bfd_link_pic (link_info
)
6599 || globals
->root
.is_relocatable_executable
6600 || globals
->pic_veneer
)
6601 size
= ARM2THUMB_PIC_GLUE_SIZE
;
6602 else if (globals
->use_blx
)
6603 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
6605 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
6608 globals
->arm_glue_size
+= size
;
6613 /* Allocate space for ARMv4 BX veneers. */
6616 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
6619 struct elf32_arm_link_hash_table
*globals
;
6621 struct elf_link_hash_entry
*myh
;
6622 struct bfd_link_hash_entry
*bh
;
6625 /* BX PC does not need a veneer. */
6629 globals
= elf32_arm_hash_table (link_info
);
6630 BFD_ASSERT (globals
!= NULL
);
6631 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6633 /* Check if this veneer has already been allocated. */
6634 if (globals
->bx_glue_offset
[reg
])
6637 s
= bfd_get_linker_section
6638 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
6640 BFD_ASSERT (s
!= NULL
);
6642 /* Add symbol for veneer. */
6644 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
6646 BFD_ASSERT (tmp_name
);
6648 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
6650 myh
= elf_link_hash_lookup
6651 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6653 BFD_ASSERT (myh
== NULL
);
6656 val
= globals
->bx_glue_size
;
6657 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6658 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6659 NULL
, TRUE
, FALSE
, &bh
);
6661 myh
= (struct elf_link_hash_entry
*) bh
;
6662 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6663 myh
->forced_local
= 1;
6665 s
->size
+= ARM_BX_VENEER_SIZE
;
6666 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
6667 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
6671 /* Add an entry to the code/data map for section SEC. */
6674 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
6676 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
6677 unsigned int newidx
;
6679 if (sec_data
->map
== NULL
)
6681 sec_data
->map
= (elf32_arm_section_map
*)
6682 bfd_malloc (sizeof (elf32_arm_section_map
));
6683 sec_data
->mapcount
= 0;
6684 sec_data
->mapsize
= 1;
6687 newidx
= sec_data
->mapcount
++;
6689 if (sec_data
->mapcount
> sec_data
->mapsize
)
6691 sec_data
->mapsize
*= 2;
6692 sec_data
->map
= (elf32_arm_section_map
*)
6693 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
6694 * sizeof (elf32_arm_section_map
));
6699 sec_data
->map
[newidx
].vma
= vma
;
6700 sec_data
->map
[newidx
].type
= type
;
6705 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6706 veneers are handled for now. */
6709 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
6710 elf32_vfp11_erratum_list
*branch
,
6712 asection
*branch_sec
,
6713 unsigned int offset
)
6716 struct elf32_arm_link_hash_table
*hash_table
;
6718 struct elf_link_hash_entry
*myh
;
6719 struct bfd_link_hash_entry
*bh
;
6721 struct _arm_elf_section_data
*sec_data
;
6722 elf32_vfp11_erratum_list
*newerr
;
6724 hash_table
= elf32_arm_hash_table (link_info
);
6725 BFD_ASSERT (hash_table
!= NULL
);
6726 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
6728 s
= bfd_get_linker_section
6729 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
6731 sec_data
= elf32_arm_section_data (s
);
6733 BFD_ASSERT (s
!= NULL
);
6735 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6736 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6738 BFD_ASSERT (tmp_name
);
6740 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
6741 hash_table
->num_vfp11_fixes
);
6743 myh
= elf_link_hash_lookup
6744 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6746 BFD_ASSERT (myh
== NULL
);
6749 val
= hash_table
->vfp11_erratum_glue_size
;
6750 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
6751 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6752 NULL
, TRUE
, FALSE
, &bh
);
6754 myh
= (struct elf_link_hash_entry
*) bh
;
6755 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6756 myh
->forced_local
= 1;
6758 /* Link veneer back to calling location. */
6759 sec_data
->erratumcount
+= 1;
6760 newerr
= (elf32_vfp11_erratum_list
*)
6761 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
6763 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
6765 newerr
->u
.v
.branch
= branch
;
6766 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
6767 branch
->u
.b
.veneer
= newerr
;
6769 newerr
->next
= sec_data
->erratumlist
;
6770 sec_data
->erratumlist
= newerr
;
6772 /* A symbol for the return from the veneer. */
6773 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
6774 hash_table
->num_vfp11_fixes
);
6776 myh
= elf_link_hash_lookup
6777 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6784 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
6785 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
6787 myh
= (struct elf_link_hash_entry
*) bh
;
6788 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6789 myh
->forced_local
= 1;
6793 /* Generate a mapping symbol for the veneer section, and explicitly add an
6794 entry for that symbol to the code/data map for the section. */
6795 if (hash_table
->vfp11_erratum_glue_size
== 0)
6798 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6799 ever requires this erratum fix. */
6800 _bfd_generic_link_add_one_symbol (link_info
,
6801 hash_table
->bfd_of_glue_owner
, "$a",
6802 BSF_LOCAL
, s
, 0, NULL
,
6805 myh
= (struct elf_link_hash_entry
*) bh
;
6806 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
6807 myh
->forced_local
= 1;
6809 /* The elf32_arm_init_maps function only cares about symbols from input
6810 BFDs. We must make a note of this generated mapping symbol
6811 ourselves so that code byteswapping works properly in
6812 elf32_arm_write_section. */
6813 elf32_arm_section_map_add (s
, 'a', 0);
6816 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
6817 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
6818 hash_table
->num_vfp11_fixes
++;
6820 /* The offset of the veneer. */
6824 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6825 veneers need to be handled because used only in Cortex-M. */
6828 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
6829 elf32_stm32l4xx_erratum_list
*branch
,
6831 asection
*branch_sec
,
6832 unsigned int offset
,
6833 bfd_size_type veneer_size
)
6836 struct elf32_arm_link_hash_table
*hash_table
;
6838 struct elf_link_hash_entry
*myh
;
6839 struct bfd_link_hash_entry
*bh
;
6841 struct _arm_elf_section_data
*sec_data
;
6842 elf32_stm32l4xx_erratum_list
*newerr
;
6844 hash_table
= elf32_arm_hash_table (link_info
);
6845 BFD_ASSERT (hash_table
!= NULL
);
6846 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
6848 s
= bfd_get_linker_section
6849 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6851 BFD_ASSERT (s
!= NULL
);
6853 sec_data
= elf32_arm_section_data (s
);
6855 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6856 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6858 BFD_ASSERT (tmp_name
);
6860 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
6861 hash_table
->num_stm32l4xx_fixes
);
6863 myh
= elf_link_hash_lookup
6864 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6866 BFD_ASSERT (myh
== NULL
);
6869 val
= hash_table
->stm32l4xx_erratum_glue_size
;
6870 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
6871 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6872 NULL
, TRUE
, FALSE
, &bh
);
6874 myh
= (struct elf_link_hash_entry
*) bh
;
6875 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6876 myh
->forced_local
= 1;
6878 /* Link veneer back to calling location. */
6879 sec_data
->stm32l4xx_erratumcount
+= 1;
6880 newerr
= (elf32_stm32l4xx_erratum_list
*)
6881 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
6883 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
6885 newerr
->u
.v
.branch
= branch
;
6886 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
6887 branch
->u
.b
.veneer
= newerr
;
6889 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
6890 sec_data
->stm32l4xx_erratumlist
= newerr
;
6892 /* A symbol for the return from the veneer. */
6893 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
6894 hash_table
->num_stm32l4xx_fixes
);
6896 myh
= elf_link_hash_lookup
6897 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6904 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
6905 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
6907 myh
= (struct elf_link_hash_entry
*) bh
;
6908 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6909 myh
->forced_local
= 1;
6913 /* Generate a mapping symbol for the veneer section, and explicitly add an
6914 entry for that symbol to the code/data map for the section. */
6915 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
6918 /* Creates a THUMB symbol since there is no other choice. */
6919 _bfd_generic_link_add_one_symbol (link_info
,
6920 hash_table
->bfd_of_glue_owner
, "$t",
6921 BSF_LOCAL
, s
, 0, NULL
,
6924 myh
= (struct elf_link_hash_entry
*) bh
;
6925 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
6926 myh
->forced_local
= 1;
6928 /* The elf32_arm_init_maps function only cares about symbols from input
6929 BFDs. We must make a note of this generated mapping symbol
6930 ourselves so that code byteswapping works properly in
6931 elf32_arm_write_section. */
6932 elf32_arm_section_map_add (s
, 't', 0);
6935 s
->size
+= veneer_size
;
6936 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
6937 hash_table
->num_stm32l4xx_fixes
++;
6939 /* The offset of the veneer. */
6943 #define ARM_GLUE_SECTION_FLAGS \
6944 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6945 | SEC_READONLY | SEC_LINKER_CREATED)
6947 /* Create a fake section for use by the ARM backend of the linker. */
6950 arm_make_glue_section (bfd
* abfd
, const char * name
)
6954 sec
= bfd_get_linker_section (abfd
, name
);
6959 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
6962 || !bfd_set_section_alignment (abfd
, sec
, 2))
6965 /* Set the gc mark to prevent the section from being removed by garbage
6966 collection, despite the fact that no relocs refer to this section. */
6972 /* Set size of .plt entries. This function is called from the
6973 linker scripts in ld/emultempl/{armelf}.em. */
6976 bfd_elf32_arm_use_long_plt (void)
6978 elf32_arm_use_long_plt_entry
= TRUE
;
6981 /* Add the glue sections to ABFD. This function is called from the
6982 linker scripts in ld/emultempl/{armelf}.em. */
6985 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
6986 struct bfd_link_info
*info
)
6988 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
6989 bfd_boolean dostm32l4xx
= globals
6990 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
6991 bfd_boolean addglue
;
6993 /* If we are only performing a partial
6994 link do not bother adding the glue. */
6995 if (bfd_link_relocatable (info
))
6998 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
6999 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7000 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7001 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7007 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7010 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7011 ensures they are not marked for deletion by
7012 strip_excluded_output_sections () when veneers are going to be created
7013 later. Not doing so would trigger assert on empty section size in
7014 lang_size_sections_1 (). */
7017 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7019 enum elf32_arm_stub_type stub_type
;
7021 /* If we are only performing a partial
7022 link do not bother adding the glue. */
7023 if (bfd_link_relocatable (info
))
7026 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7029 const char *out_sec_name
;
7031 if (!arm_dedicated_stub_output_section_required (stub_type
))
7034 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7035 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7036 if (out_sec
!= NULL
)
7037 out_sec
->flags
|= SEC_KEEP
;
7041 /* Select a BFD to be used to hold the sections used by the glue code.
7042 This function is called from the linker scripts in ld/emultempl/
7046 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7048 struct elf32_arm_link_hash_table
*globals
;
7050 /* If we are only performing a partial link
7051 do not bother getting a bfd to hold the glue. */
7052 if (bfd_link_relocatable (info
))
7055 /* Make sure we don't attach the glue sections to a dynamic object. */
7056 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7058 globals
= elf32_arm_hash_table (info
);
7059 BFD_ASSERT (globals
!= NULL
);
7061 if (globals
->bfd_of_glue_owner
!= NULL
)
7064 /* Save the bfd for later use. */
7065 globals
->bfd_of_glue_owner
= abfd
;
7071 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7075 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7078 if (globals
->fix_arm1176
)
7080 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7081 globals
->use_blx
= 1;
7085 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7086 globals
->use_blx
= 1;
7091 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7092 struct bfd_link_info
*link_info
)
7094 Elf_Internal_Shdr
*symtab_hdr
;
7095 Elf_Internal_Rela
*internal_relocs
= NULL
;
7096 Elf_Internal_Rela
*irel
, *irelend
;
7097 bfd_byte
*contents
= NULL
;
7100 struct elf32_arm_link_hash_table
*globals
;
7102 /* If we are only performing a partial link do not bother
7103 to construct any glue. */
7104 if (bfd_link_relocatable (link_info
))
7107 /* Here we have a bfd that is to be included on the link. We have a
7108 hook to do reloc rummaging, before section sizes are nailed down. */
7109 globals
= elf32_arm_hash_table (link_info
);
7110 BFD_ASSERT (globals
!= NULL
);
7112 check_use_blx (globals
);
7114 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7116 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7121 /* PR 5398: If we have not decided to include any loadable sections in
7122 the output then we will not have a glue owner bfd. This is OK, it
7123 just means that there is nothing else for us to do here. */
7124 if (globals
->bfd_of_glue_owner
== NULL
)
7127 /* Rummage around all the relocs and map the glue vectors. */
7128 sec
= abfd
->sections
;
7133 for (; sec
!= NULL
; sec
= sec
->next
)
7135 if (sec
->reloc_count
== 0)
7138 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7141 symtab_hdr
= & elf_symtab_hdr (abfd
);
7143 /* Load the relocs. */
7145 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7147 if (internal_relocs
== NULL
)
7150 irelend
= internal_relocs
+ sec
->reloc_count
;
7151 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7154 unsigned long r_index
;
7156 struct elf_link_hash_entry
*h
;
7158 r_type
= ELF32_R_TYPE (irel
->r_info
);
7159 r_index
= ELF32_R_SYM (irel
->r_info
);
7161 /* These are the only relocation types we care about. */
7162 if ( r_type
!= R_ARM_PC24
7163 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7166 /* Get the section contents if we haven't done so already. */
7167 if (contents
== NULL
)
7169 /* Get cached copy if it exists. */
7170 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7171 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7174 /* Go get them off disk. */
7175 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7180 if (r_type
== R_ARM_V4BX
)
7184 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7185 record_arm_bx_glue (link_info
, reg
);
7189 /* If the relocation is not against a symbol it cannot concern us. */
7192 /* We don't care about local symbols. */
7193 if (r_index
< symtab_hdr
->sh_info
)
7196 /* This is an external symbol. */
7197 r_index
-= symtab_hdr
->sh_info
;
7198 h
= (struct elf_link_hash_entry
*)
7199 elf_sym_hashes (abfd
)[r_index
];
7201 /* If the relocation is against a static symbol it must be within
7202 the current section and so cannot be a cross ARM/Thumb relocation. */
7206 /* If the call will go through a PLT entry then we do not need
7208 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7214 /* This one is a call from arm code. We need to look up
7215 the target of the call. If it is a thumb target, we
7217 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7218 == ST_BRANCH_TO_THUMB
)
7219 record_arm_to_thumb_glue (link_info
, h
);
7227 if (contents
!= NULL
7228 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7232 if (internal_relocs
!= NULL
7233 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7234 free (internal_relocs
);
7235 internal_relocs
= NULL
;
7241 if (contents
!= NULL
7242 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7244 if (internal_relocs
!= NULL
7245 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7246 free (internal_relocs
);
7253 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7256 bfd_elf32_arm_init_maps (bfd
*abfd
)
7258 Elf_Internal_Sym
*isymbuf
;
7259 Elf_Internal_Shdr
*hdr
;
7260 unsigned int i
, localsyms
;
7262 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7263 if (! is_arm_elf (abfd
))
7266 if ((abfd
->flags
& DYNAMIC
) != 0)
7269 hdr
= & elf_symtab_hdr (abfd
);
7270 localsyms
= hdr
->sh_info
;
7272 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7273 should contain the number of local symbols, which should come before any
7274 global symbols. Mapping symbols are always local. */
7275 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7278 /* No internal symbols read? Skip this BFD. */
7279 if (isymbuf
== NULL
)
7282 for (i
= 0; i
< localsyms
; i
++)
7284 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
7285 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
7289 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
7291 name
= bfd_elf_string_from_elf_section (abfd
,
7292 hdr
->sh_link
, isym
->st_name
);
7294 if (bfd_is_arm_special_symbol_name (name
,
7295 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
7296 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
7302 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7303 say what they wanted. */
7306 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7308 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7309 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7311 if (globals
== NULL
)
7314 if (globals
->fix_cortex_a8
== -1)
7316 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7317 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
7318 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
7319 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
7320 globals
->fix_cortex_a8
= 1;
7322 globals
->fix_cortex_a8
= 0;
7328 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7330 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7331 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7333 if (globals
== NULL
)
7335 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7336 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
7338 switch (globals
->vfp11_fix
)
7340 case BFD_ARM_VFP11_FIX_DEFAULT
:
7341 case BFD_ARM_VFP11_FIX_NONE
:
7342 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7346 /* Give a warning, but do as the user requests anyway. */
7347 (*_bfd_error_handler
) (_("%B: warning: selected VFP11 erratum "
7348 "workaround is not necessary for target architecture"), obfd
);
7351 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
7352 /* For earlier architectures, we might need the workaround, but do not
7353 enable it by default. If users is running with broken hardware, they
7354 must enable the erratum fix explicitly. */
7355 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7359 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7361 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7362 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7364 if (globals
== NULL
)
7367 /* We assume only Cortex-M4 may require the fix. */
7368 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
7369 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
7371 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
7372 /* Give a warning, but do as the user requests anyway. */
7373 (*_bfd_error_handler
)
7374 (_("%B: warning: selected STM32L4XX erratum "
7375 "workaround is not necessary for target architecture"), obfd
);
7379 enum bfd_arm_vfp11_pipe
7387 /* Return a VFP register number. This is encoded as RX:X for single-precision
7388 registers, or X:RX for double-precision registers, where RX is the group of
7389 four bits in the instruction encoding and X is the single extension bit.
7390 RX and X fields are specified using their lowest (starting) bit. The return
7393 0...31: single-precision registers s0...s31
7394 32...63: double-precision registers d0...d31.
7396 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7397 encounter VFP3 instructions, so we allow the full range for DP registers. */
7400 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
7404 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
7406 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
7409 /* Set bits in *WMASK according to a register number REG as encoded by
7410 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7413 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
7418 *wmask
|= 3 << ((reg
- 32) * 2);
7421 /* Return TRUE if WMASK overwrites anything in REGS. */
7424 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
7428 for (i
= 0; i
< numregs
; i
++)
7430 unsigned int reg
= regs
[i
];
7432 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
7440 if ((wmask
& (3 << (reg
* 2))) != 0)
7447 /* In this function, we're interested in two things: finding input registers
7448 for VFP data-processing instructions, and finding the set of registers which
7449 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7450 hold the written set, so FLDM etc. are easy to deal with (we're only
7451 interested in 32 SP registers or 16 dp registers, due to the VFP version
7452 implemented by the chip in question). DP registers are marked by setting
7453 both SP registers in the write mask). */
7455 static enum bfd_arm_vfp11_pipe
7456 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
7459 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
7460 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
7462 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7465 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7466 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7468 pqrs
= ((insn
& 0x00800000) >> 20)
7469 | ((insn
& 0x00300000) >> 19)
7470 | ((insn
& 0x00000040) >> 6);
7474 case 0: /* fmac[sd]. */
7475 case 1: /* fnmac[sd]. */
7476 case 2: /* fmsc[sd]. */
7477 case 3: /* fnmsc[sd]. */
7479 bfd_arm_vfp11_write_mask (destmask
, fd
);
7481 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7486 case 4: /* fmul[sd]. */
7487 case 5: /* fnmul[sd]. */
7488 case 6: /* fadd[sd]. */
7489 case 7: /* fsub[sd]. */
7493 case 8: /* fdiv[sd]. */
7496 bfd_arm_vfp11_write_mask (destmask
, fd
);
7497 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7502 case 15: /* extended opcode. */
7504 unsigned int extn
= ((insn
>> 15) & 0x1e)
7505 | ((insn
>> 7) & 1);
7509 case 0: /* fcpy[sd]. */
7510 case 1: /* fabs[sd]. */
7511 case 2: /* fneg[sd]. */
7512 case 8: /* fcmp[sd]. */
7513 case 9: /* fcmpe[sd]. */
7514 case 10: /* fcmpz[sd]. */
7515 case 11: /* fcmpez[sd]. */
7516 case 16: /* fuito[sd]. */
7517 case 17: /* fsito[sd]. */
7518 case 24: /* ftoui[sd]. */
7519 case 25: /* ftouiz[sd]. */
7520 case 26: /* ftosi[sd]. */
7521 case 27: /* ftosiz[sd]. */
7522 /* These instructions will not bounce due to underflow. */
7527 case 3: /* fsqrt[sd]. */
7528 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7529 registers to cause the erratum in previous instructions. */
7530 bfd_arm_vfp11_write_mask (destmask
, fd
);
7534 case 15: /* fcvt{ds,sd}. */
7538 bfd_arm_vfp11_write_mask (destmask
, fd
);
7540 /* Only FCVTSD can underflow. */
7541 if ((insn
& 0x100) != 0)
7560 /* Two-register transfer. */
7561 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
7563 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7565 if ((insn
& 0x100000) == 0)
7568 bfd_arm_vfp11_write_mask (destmask
, fm
);
7571 bfd_arm_vfp11_write_mask (destmask
, fm
);
7572 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
7578 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
7580 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7581 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
7585 case 0: /* Two-reg transfer. We should catch these above. */
7588 case 2: /* fldm[sdx]. */
7592 unsigned int i
, offset
= insn
& 0xff;
7597 for (i
= fd
; i
< fd
+ offset
; i
++)
7598 bfd_arm_vfp11_write_mask (destmask
, i
);
7602 case 4: /* fld[sd]. */
7604 bfd_arm_vfp11_write_mask (destmask
, fd
);
7613 /* Single-register transfer. Note L==0. */
7614 else if ((insn
& 0x0f100e10) == 0x0e000a10)
7616 unsigned int opcode
= (insn
>> 21) & 7;
7617 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
7621 case 0: /* fmsr/fmdlr. */
7622 case 1: /* fmdhr. */
7623 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7624 destination register. I don't know if this is exactly right,
7625 but it is the conservative choice. */
7626 bfd_arm_vfp11_write_mask (destmask
, fn
);
7640 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
7643 /* Look for potentially-troublesome code sequences which might trigger the
7644 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7645 (available from ARM) for details of the erratum. A short version is
7646 described in ld.texinfo. */
7649 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
7652 bfd_byte
*contents
= NULL
;
7654 int regs
[3], numregs
= 0;
7655 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7656 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
7658 if (globals
== NULL
)
7661 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7662 The states transition as follows:
7664 0 -> 1 (vector) or 0 -> 2 (scalar)
7665 A VFP FMAC-pipeline instruction has been seen. Fill
7666 regs[0]..regs[numregs-1] with its input operands. Remember this
7667 instruction in 'first_fmac'.
7670 Any instruction, except for a VFP instruction which overwrites
7675 A VFP instruction has been seen which overwrites any of regs[*].
7676 We must make a veneer! Reset state to 0 before examining next
7680 If we fail to match anything in state 2, reset to state 0 and reset
7681 the instruction pointer to the instruction after 'first_fmac'.
7683 If the VFP11 vector mode is in use, there must be at least two unrelated
7684 instructions between anti-dependent VFP11 instructions to properly avoid
7685 triggering the erratum, hence the use of the extra state 1. */
7687 /* If we are only performing a partial link do not bother
7688 to construct any glue. */
7689 if (bfd_link_relocatable (link_info
))
7692 /* Skip if this bfd does not correspond to an ELF image. */
7693 if (! is_arm_elf (abfd
))
7696 /* We should have chosen a fix type by the time we get here. */
7697 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
7699 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
7702 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7703 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
7706 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7708 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
7709 struct _arm_elf_section_data
*sec_data
;
7711 /* If we don't have executable progbits, we're not interested in this
7712 section. Also skip if section is to be excluded. */
7713 if (elf_section_type (sec
) != SHT_PROGBITS
7714 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
7715 || (sec
->flags
& SEC_EXCLUDE
) != 0
7716 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
7717 || sec
->output_section
== bfd_abs_section_ptr
7718 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
7721 sec_data
= elf32_arm_section_data (sec
);
7723 if (sec_data
->mapcount
== 0)
7726 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7727 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7728 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7731 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
7732 elf32_arm_compare_mapping
);
7734 for (span
= 0; span
< sec_data
->mapcount
; span
++)
7736 unsigned int span_start
= sec_data
->map
[span
].vma
;
7737 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
7738 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
7739 char span_type
= sec_data
->map
[span
].type
;
7741 /* FIXME: Only ARM mode is supported at present. We may need to
7742 support Thumb-2 mode also at some point. */
7743 if (span_type
!= 'a')
7746 for (i
= span_start
; i
< span_end
;)
7748 unsigned int next_i
= i
+ 4;
7749 unsigned int insn
= bfd_big_endian (abfd
)
7750 ? (contents
[i
] << 24)
7751 | (contents
[i
+ 1] << 16)
7752 | (contents
[i
+ 2] << 8)
7754 : (contents
[i
+ 3] << 24)
7755 | (contents
[i
+ 2] << 16)
7756 | (contents
[i
+ 1] << 8)
7758 unsigned int writemask
= 0;
7759 enum bfd_arm_vfp11_pipe vpipe
;
7764 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
7766 /* I'm assuming the VFP11 erratum can trigger with denorm
7767 operands on either the FMAC or the DS pipeline. This might
7768 lead to slightly overenthusiastic veneer insertion. */
7769 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
7771 state
= use_vector
? 1 : 2;
7773 veneer_of_insn
= insn
;
7779 int other_regs
[3], other_numregs
;
7780 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
7783 if (vpipe
!= VFP11_BAD
7784 && bfd_arm_vfp11_antidependency (writemask
, regs
,
7794 int other_regs
[3], other_numregs
;
7795 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
7798 if (vpipe
!= VFP11_BAD
7799 && bfd_arm_vfp11_antidependency (writemask
, regs
,
7805 next_i
= first_fmac
+ 4;
7811 abort (); /* Should be unreachable. */
7816 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
7817 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7819 elf32_arm_section_data (sec
)->erratumcount
+= 1;
7821 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
7826 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
7833 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
7838 newerr
->next
= sec_data
->erratumlist
;
7839 sec_data
->erratumlist
= newerr
;
7848 if (contents
!= NULL
7849 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7857 if (contents
!= NULL
7858 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7864 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7865 after sections have been laid out, using specially-named symbols. */
7868 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
7869 struct bfd_link_info
*link_info
)
7872 struct elf32_arm_link_hash_table
*globals
;
7875 if (bfd_link_relocatable (link_info
))
7878 /* Skip if this bfd does not correspond to an ELF image. */
7879 if (! is_arm_elf (abfd
))
7882 globals
= elf32_arm_hash_table (link_info
);
7883 if (globals
== NULL
)
7886 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7887 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7889 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7891 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7892 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
7894 for (; errnode
!= NULL
; errnode
= errnode
->next
)
7896 struct elf_link_hash_entry
*myh
;
7899 switch (errnode
->type
)
7901 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
7902 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
7903 /* Find veneer symbol. */
7904 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7905 errnode
->u
.b
.veneer
->u
.v
.id
);
7907 myh
= elf_link_hash_lookup
7908 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7911 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
7912 "`%s'"), abfd
, tmp_name
);
7914 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7915 + myh
->root
.u
.def
.section
->output_offset
7916 + myh
->root
.u
.def
.value
;
7918 errnode
->u
.b
.veneer
->vma
= vma
;
7921 case VFP11_ERRATUM_ARM_VENEER
:
7922 case VFP11_ERRATUM_THUMB_VENEER
:
7923 /* Find return location. */
7924 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7927 myh
= elf_link_hash_lookup
7928 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7931 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
7932 "`%s'"), abfd
, tmp_name
);
7934 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7935 + myh
->root
.u
.def
.section
->output_offset
7936 + myh
->root
.u
.def
.value
;
7938 errnode
->u
.v
.branch
->vma
= vma
;
7950 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7951 return locations after sections have been laid out, using
7952 specially-named symbols. */
7955 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
7956 struct bfd_link_info
*link_info
)
7959 struct elf32_arm_link_hash_table
*globals
;
7962 if (bfd_link_relocatable (link_info
))
7965 /* Skip if this bfd does not correspond to an ELF image. */
7966 if (! is_arm_elf (abfd
))
7969 globals
= elf32_arm_hash_table (link_info
);
7970 if (globals
== NULL
)
7973 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7974 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7976 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7978 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7979 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
7981 for (; errnode
!= NULL
; errnode
= errnode
->next
)
7983 struct elf_link_hash_entry
*myh
;
7986 switch (errnode
->type
)
7988 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
7989 /* Find veneer symbol. */
7990 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7991 errnode
->u
.b
.veneer
->u
.v
.id
);
7993 myh
= elf_link_hash_lookup
7994 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7997 (*_bfd_error_handler
) (_("%B: unable to find STM32L4XX veneer "
7998 "`%s'"), abfd
, tmp_name
);
8000 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8001 + myh
->root
.u
.def
.section
->output_offset
8002 + myh
->root
.u
.def
.value
;
8004 errnode
->u
.b
.veneer
->vma
= vma
;
8007 case STM32L4XX_ERRATUM_VENEER
:
8008 /* Find return location. */
8009 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8012 myh
= elf_link_hash_lookup
8013 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8016 (*_bfd_error_handler
) (_("%B: unable to find STM32L4XX veneer "
8017 "`%s'"), abfd
, tmp_name
);
8019 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8020 + myh
->root
.u
.def
.section
->output_offset
8021 + myh
->root
.u
.def
.value
;
8023 errnode
->u
.v
.branch
->vma
= vma
;
8035 static inline bfd_boolean
8036 is_thumb2_ldmia (const insn32 insn
)
8038 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8039 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8040 return (insn
& 0xffd02000) == 0xe8900000;
8043 static inline bfd_boolean
8044 is_thumb2_ldmdb (const insn32 insn
)
8046 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8047 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8048 return (insn
& 0xffd02000) == 0xe9100000;
8051 static inline bfd_boolean
8052 is_thumb2_vldm (const insn32 insn
)
8054 /* A6.5 Extension register load or store instruction
8056 We look for SP 32-bit and DP 64-bit registers.
8057 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8058 <list> is consecutive 64-bit registers
8059 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8060 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8061 <list> is consecutive 32-bit registers
8062 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8063 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8064 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8066 (((insn
& 0xfe100f00) == 0xec100b00) ||
8067 ((insn
& 0xfe100f00) == 0xec100a00))
8068 && /* (IA without !). */
8069 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8070 /* (IA with !), includes VPOP (when reg number is SP). */
8071 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8073 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8076 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8078 - computes the number and the mode of memory accesses
8079 - decides if the replacement should be done:
8080 . replaces only if > 8-word accesses
8081 . or (testing purposes only) replaces all accesses. */
8084 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8085 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8089 /* The field encoding the register list is the same for both LDMIA
8090 and LDMDB encodings. */
8091 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8092 nb_words
= popcount (insn
& 0x0000ffff);
8093 else if (is_thumb2_vldm (insn
))
8094 nb_words
= (insn
& 0xff);
8096 /* DEFAULT mode accounts for the real bug condition situation,
8097 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8099 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8100 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8103 /* Look for potentially-troublesome code sequences which might trigger
8104 the STM STM32L4XX erratum. */
8107 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8108 struct bfd_link_info
*link_info
)
8111 bfd_byte
*contents
= NULL
;
8112 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8114 if (globals
== NULL
)
8117 /* If we are only performing a partial link do not bother
8118 to construct any glue. */
8119 if (bfd_link_relocatable (link_info
))
8122 /* Skip if this bfd does not correspond to an ELF image. */
8123 if (! is_arm_elf (abfd
))
8126 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8129 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8130 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8133 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8135 unsigned int i
, span
;
8136 struct _arm_elf_section_data
*sec_data
;
8138 /* If we don't have executable progbits, we're not interested in this
8139 section. Also skip if section is to be excluded. */
8140 if (elf_section_type (sec
) != SHT_PROGBITS
8141 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8142 || (sec
->flags
& SEC_EXCLUDE
) != 0
8143 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8144 || sec
->output_section
== bfd_abs_section_ptr
8145 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8148 sec_data
= elf32_arm_section_data (sec
);
8150 if (sec_data
->mapcount
== 0)
8153 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8154 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8155 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8158 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8159 elf32_arm_compare_mapping
);
8161 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8163 unsigned int span_start
= sec_data
->map
[span
].vma
;
8164 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8165 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8166 char span_type
= sec_data
->map
[span
].type
;
8167 int itblock_current_pos
= 0;
8169 /* Only Thumb2 mode need be supported with this CM4 specific
8170 code, we should not encounter any arm mode eg span_type
8172 if (span_type
!= 't')
8175 for (i
= span_start
; i
< span_end
;)
8177 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8178 bfd_boolean insn_32bit
= FALSE
;
8179 bfd_boolean is_ldm
= FALSE
;
8180 bfd_boolean is_vldm
= FALSE
;
8181 bfd_boolean is_not_last_in_it_block
= FALSE
;
8183 /* The first 16-bits of all 32-bit thumb2 instructions start
8184 with opcode[15..13]=0b111 and the encoded op1 can be anything
8185 except opcode[12..11]!=0b00.
8186 See 32-bit Thumb instruction encoding. */
8187 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8190 /* Compute the predicate that tells if the instruction
8191 is concerned by the IT block
8192 - Creates an error if there is a ldm that is not
8193 last in the IT block thus cannot be replaced
8194 - Otherwise we can create a branch at the end of the
8195 IT block, it will be controlled naturally by IT
8196 with the proper pseudo-predicate
8197 - So the only interesting predicate is the one that
8198 tells that we are not on the last item of an IT
8200 if (itblock_current_pos
!= 0)
8201 is_not_last_in_it_block
= !!--itblock_current_pos
;
8205 /* Load the rest of the insn (in manual-friendly order). */
8206 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8207 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8208 is_vldm
= is_thumb2_vldm (insn
);
8210 /* Veneers are created for (v)ldm depending on
8211 option flags and memory accesses conditions; but
8212 if the instruction is not the last instruction of
8213 an IT block, we cannot create a jump there, so we
8215 if ((is_ldm
|| is_vldm
) &&
8216 stm32l4xx_need_create_replacing_stub
8217 (insn
, globals
->stm32l4xx_fix
))
8219 if (is_not_last_in_it_block
)
8221 (*_bfd_error_handler
)
8222 /* Note - overlong line used here to allow for translation. */
8224 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8225 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8226 abfd
, sec
, (long)i
);
8230 elf32_stm32l4xx_erratum_list
*newerr
=
8231 (elf32_stm32l4xx_erratum_list
*)
8233 (sizeof (elf32_stm32l4xx_erratum_list
));
8235 elf32_arm_section_data (sec
)
8236 ->stm32l4xx_erratumcount
+= 1;
8237 newerr
->u
.b
.insn
= insn
;
8238 /* We create only thumb branches. */
8240 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8241 record_stm32l4xx_erratum_veneer
8242 (link_info
, newerr
, abfd
, sec
,
8245 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8246 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8248 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8249 sec_data
->stm32l4xx_erratumlist
= newerr
;
8256 IT blocks are only encoded in T1
8257 Encoding T1: IT{x{y{z}}} <firstcond>
8258 1 0 1 1 - 1 1 1 1 - firstcond - mask
8259 if mask = '0000' then see 'related encodings'
8260 We don't deal with UNPREDICTABLE, just ignore these.
8261 There can be no nested IT blocks so an IT block
8262 is naturally a new one for which it is worth
8263 computing its size. */
8264 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00) &&
8265 ((insn
& 0x000f) != 0x0000);
8266 /* If we have a new IT block we compute its size. */
8269 /* Compute the number of instructions controlled
8270 by the IT block, it will be used to decide
8271 whether we are inside an IT block or not. */
8272 unsigned int mask
= insn
& 0x000f;
8273 itblock_current_pos
= 4 - ctz (mask
);
8277 i
+= insn_32bit
? 4 : 2;
8281 if (contents
!= NULL
8282 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8290 if (contents
!= NULL
8291 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8297 /* Set target relocation values needed during linking. */
8300 bfd_elf32_arm_set_target_relocs (struct bfd
*output_bfd
,
8301 struct bfd_link_info
*link_info
,
8303 char * target2_type
,
8306 bfd_arm_vfp11_fix vfp11_fix
,
8307 bfd_arm_stm32l4xx_fix stm32l4xx_fix
,
8308 int no_enum_warn
, int no_wchar_warn
,
8309 int pic_veneer
, int fix_cortex_a8
,
8312 struct elf32_arm_link_hash_table
*globals
;
8314 globals
= elf32_arm_hash_table (link_info
);
8315 if (globals
== NULL
)
8318 globals
->target1_is_rel
= target1_is_rel
;
8319 if (strcmp (target2_type
, "rel") == 0)
8320 globals
->target2_reloc
= R_ARM_REL32
;
8321 else if (strcmp (target2_type
, "abs") == 0)
8322 globals
->target2_reloc
= R_ARM_ABS32
;
8323 else if (strcmp (target2_type
, "got-rel") == 0)
8324 globals
->target2_reloc
= R_ARM_GOT_PREL
;
8327 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8330 globals
->fix_v4bx
= fix_v4bx
;
8331 globals
->use_blx
|= use_blx
;
8332 globals
->vfp11_fix
= vfp11_fix
;
8333 globals
->stm32l4xx_fix
= stm32l4xx_fix
;
8334 globals
->pic_veneer
= pic_veneer
;
8335 globals
->fix_cortex_a8
= fix_cortex_a8
;
8336 globals
->fix_arm1176
= fix_arm1176
;
8338 BFD_ASSERT (is_arm_elf (output_bfd
));
8339 elf_arm_tdata (output_bfd
)->no_enum_size_warning
= no_enum_warn
;
8340 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
= no_wchar_warn
;
8343 /* Replace the target offset of a Thumb bl or b.w instruction. */
8346 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
8352 BFD_ASSERT ((offset
& 1) == 0);
8354 upper
= bfd_get_16 (abfd
, insn
);
8355 lower
= bfd_get_16 (abfd
, insn
+ 2);
8356 reloc_sign
= (offset
< 0) ? 1 : 0;
8357 upper
= (upper
& ~(bfd_vma
) 0x7ff)
8358 | ((offset
>> 12) & 0x3ff)
8359 | (reloc_sign
<< 10);
8360 lower
= (lower
& ~(bfd_vma
) 0x2fff)
8361 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
8362 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
8363 | ((offset
>> 1) & 0x7ff);
8364 bfd_put_16 (abfd
, upper
, insn
);
8365 bfd_put_16 (abfd
, lower
, insn
+ 2);
8368 /* Thumb code calling an ARM function. */
8371 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
8375 asection
* input_section
,
8376 bfd_byte
* hit_data
,
8379 bfd_signed_vma addend
,
8381 char **error_message
)
8385 long int ret_offset
;
8386 struct elf_link_hash_entry
* myh
;
8387 struct elf32_arm_link_hash_table
* globals
;
8389 myh
= find_thumb_glue (info
, name
, error_message
);
8393 globals
= elf32_arm_hash_table (info
);
8394 BFD_ASSERT (globals
!= NULL
);
8395 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8397 my_offset
= myh
->root
.u
.def
.value
;
8399 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8400 THUMB2ARM_GLUE_SECTION_NAME
);
8402 BFD_ASSERT (s
!= NULL
);
8403 BFD_ASSERT (s
->contents
!= NULL
);
8404 BFD_ASSERT (s
->output_section
!= NULL
);
8406 if ((my_offset
& 0x01) == 0x01)
8409 && sym_sec
->owner
!= NULL
8410 && !INTERWORK_FLAG (sym_sec
->owner
))
8412 (*_bfd_error_handler
)
8413 (_("%B(%s): warning: interworking not enabled.\n"
8414 " first occurrence: %B: Thumb call to ARM"),
8415 sym_sec
->owner
, input_bfd
, name
);
8421 myh
->root
.u
.def
.value
= my_offset
;
8423 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
8424 s
->contents
+ my_offset
);
8426 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
8427 s
->contents
+ my_offset
+ 2);
8430 /* Address of destination of the stub. */
8431 ((bfd_signed_vma
) val
)
8433 /* Offset from the start of the current section
8434 to the start of the stubs. */
8436 /* Offset of the start of this stub from the start of the stubs. */
8438 /* Address of the start of the current section. */
8439 + s
->output_section
->vma
)
8440 /* The branch instruction is 4 bytes into the stub. */
8442 /* ARM branches work from the pc of the instruction + 8. */
8445 put_arm_insn (globals
, output_bfd
,
8446 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
8447 s
->contents
+ my_offset
+ 4);
8450 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
8452 /* Now go back and fix up the original BL insn to point to here. */
8454 /* Address of where the stub is located. */
8455 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
8456 /* Address of where the BL is located. */
8457 - (input_section
->output_section
->vma
+ input_section
->output_offset
8459 /* Addend in the relocation. */
8461 /* Biassing for PC-relative addressing. */
8464 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
8469 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8471 static struct elf_link_hash_entry
*
8472 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
8479 char ** error_message
)
8482 long int ret_offset
;
8483 struct elf_link_hash_entry
* myh
;
8484 struct elf32_arm_link_hash_table
* globals
;
8486 myh
= find_arm_glue (info
, name
, error_message
);
8490 globals
= elf32_arm_hash_table (info
);
8491 BFD_ASSERT (globals
!= NULL
);
8492 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8494 my_offset
= myh
->root
.u
.def
.value
;
8496 if ((my_offset
& 0x01) == 0x01)
8499 && sym_sec
->owner
!= NULL
8500 && !INTERWORK_FLAG (sym_sec
->owner
))
8502 (*_bfd_error_handler
)
8503 (_("%B(%s): warning: interworking not enabled.\n"
8504 " first occurrence: %B: arm call to thumb"),
8505 sym_sec
->owner
, input_bfd
, name
);
8509 myh
->root
.u
.def
.value
= my_offset
;
8511 if (bfd_link_pic (info
)
8512 || globals
->root
.is_relocatable_executable
8513 || globals
->pic_veneer
)
8515 /* For relocatable objects we can't use absolute addresses,
8516 so construct the address from a relative offset. */
8517 /* TODO: If the offset is small it's probably worth
8518 constructing the address with adds. */
8519 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
8520 s
->contents
+ my_offset
);
8521 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
8522 s
->contents
+ my_offset
+ 4);
8523 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
8524 s
->contents
+ my_offset
+ 8);
8525 /* Adjust the offset by 4 for the position of the add,
8526 and 8 for the pipeline offset. */
8527 ret_offset
= (val
- (s
->output_offset
8528 + s
->output_section
->vma
8531 bfd_put_32 (output_bfd
, ret_offset
,
8532 s
->contents
+ my_offset
+ 12);
8534 else if (globals
->use_blx
)
8536 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
8537 s
->contents
+ my_offset
);
8539 /* It's a thumb address. Add the low order bit. */
8540 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
8541 s
->contents
+ my_offset
+ 4);
8545 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
8546 s
->contents
+ my_offset
);
8548 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
8549 s
->contents
+ my_offset
+ 4);
8551 /* It's a thumb address. Add the low order bit. */
8552 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
8553 s
->contents
+ my_offset
+ 8);
8559 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
8564 /* Arm code calling a Thumb function. */
8567 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
8571 asection
* input_section
,
8572 bfd_byte
* hit_data
,
8575 bfd_signed_vma addend
,
8577 char **error_message
)
8579 unsigned long int tmp
;
8582 long int ret_offset
;
8583 struct elf_link_hash_entry
* myh
;
8584 struct elf32_arm_link_hash_table
* globals
;
8586 globals
= elf32_arm_hash_table (info
);
8587 BFD_ASSERT (globals
!= NULL
);
8588 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8590 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8591 ARM2THUMB_GLUE_SECTION_NAME
);
8592 BFD_ASSERT (s
!= NULL
);
8593 BFD_ASSERT (s
->contents
!= NULL
);
8594 BFD_ASSERT (s
->output_section
!= NULL
);
8596 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
8597 sym_sec
, val
, s
, error_message
);
8601 my_offset
= myh
->root
.u
.def
.value
;
8602 tmp
= bfd_get_32 (input_bfd
, hit_data
);
8603 tmp
= tmp
& 0xFF000000;
8605 /* Somehow these are both 4 too far, so subtract 8. */
8606 ret_offset
= (s
->output_offset
8608 + s
->output_section
->vma
8609 - (input_section
->output_offset
8610 + input_section
->output_section
->vma
8614 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
8616 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
8621 /* Populate Arm stub for an exported Thumb function. */
8624 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
8626 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
8628 struct elf_link_hash_entry
* myh
;
8629 struct elf32_arm_link_hash_entry
*eh
;
8630 struct elf32_arm_link_hash_table
* globals
;
8633 char *error_message
;
8635 eh
= elf32_arm_hash_entry (h
);
8636 /* Allocate stubs for exported Thumb functions on v4t. */
8637 if (eh
->export_glue
== NULL
)
8640 globals
= elf32_arm_hash_table (info
);
8641 BFD_ASSERT (globals
!= NULL
);
8642 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8644 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8645 ARM2THUMB_GLUE_SECTION_NAME
);
8646 BFD_ASSERT (s
!= NULL
);
8647 BFD_ASSERT (s
->contents
!= NULL
);
8648 BFD_ASSERT (s
->output_section
!= NULL
);
8650 sec
= eh
->export_glue
->root
.u
.def
.section
;
8652 BFD_ASSERT (sec
->output_section
!= NULL
);
8654 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
8655 + sec
->output_section
->vma
;
8657 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
8658 h
->root
.u
.def
.section
->owner
,
8659 globals
->obfd
, sec
, val
, s
,
8665 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8668 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
8673 struct elf32_arm_link_hash_table
*globals
;
8675 globals
= elf32_arm_hash_table (info
);
8676 BFD_ASSERT (globals
!= NULL
);
8677 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8679 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8680 ARM_BX_GLUE_SECTION_NAME
);
8681 BFD_ASSERT (s
!= NULL
);
8682 BFD_ASSERT (s
->contents
!= NULL
);
8683 BFD_ASSERT (s
->output_section
!= NULL
);
8685 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
8687 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
8689 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
8691 p
= s
->contents
+ glue_addr
;
8692 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
8693 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
8694 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
8695 globals
->bx_glue_offset
[reg
] |= 1;
8698 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
8701 /* Generate Arm stubs for exported Thumb symbols. */
8703 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
8704 struct bfd_link_info
*link_info
)
8706 struct elf32_arm_link_hash_table
* globals
;
8708 if (link_info
== NULL
)
8709 /* Ignore this if we are not called by the ELF backend linker. */
8712 globals
= elf32_arm_hash_table (link_info
);
8713 if (globals
== NULL
)
8716 /* If blx is available then exported Thumb symbols are OK and there is
8718 if (globals
->use_blx
)
8721 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
8725 /* Reserve space for COUNT dynamic relocations in relocation selection
8729 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
8730 bfd_size_type count
)
8732 struct elf32_arm_link_hash_table
*htab
;
8734 htab
= elf32_arm_hash_table (info
);
8735 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
8738 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
8741 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8742 dynamic, the relocations should go in SRELOC, otherwise they should
8743 go in the special .rel.iplt section. */
8746 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
8747 bfd_size_type count
)
8749 struct elf32_arm_link_hash_table
*htab
;
8751 htab
= elf32_arm_hash_table (info
);
8752 if (!htab
->root
.dynamic_sections_created
)
8753 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
8756 BFD_ASSERT (sreloc
!= NULL
);
8757 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
8761 /* Add relocation REL to the end of relocation section SRELOC. */
8764 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
8765 asection
*sreloc
, Elf_Internal_Rela
*rel
)
8768 struct elf32_arm_link_hash_table
*htab
;
8770 htab
= elf32_arm_hash_table (info
);
8771 if (!htab
->root
.dynamic_sections_created
8772 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
8773 sreloc
= htab
->root
.irelplt
;
8776 loc
= sreloc
->contents
;
8777 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
8778 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
8780 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
8783 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8784 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8788 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
8789 bfd_boolean is_iplt_entry
,
8790 union gotplt_union
*root_plt
,
8791 struct arm_plt_info
*arm_plt
)
8793 struct elf32_arm_link_hash_table
*htab
;
8797 htab
= elf32_arm_hash_table (info
);
8801 splt
= htab
->root
.iplt
;
8802 sgotplt
= htab
->root
.igotplt
;
8804 /* NaCl uses a special first entry in .iplt too. */
8805 if (htab
->nacl_p
&& splt
->size
== 0)
8806 splt
->size
+= htab
->plt_header_size
;
8808 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8809 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
8813 splt
= htab
->root
.splt
;
8814 sgotplt
= htab
->root
.sgotplt
;
8816 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8817 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
8819 /* If this is the first .plt entry, make room for the special
8821 if (splt
->size
== 0)
8822 splt
->size
+= htab
->plt_header_size
;
8824 htab
->next_tls_desc_index
++;
8827 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8828 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
8829 splt
->size
+= PLT_THUMB_STUB_SIZE
;
8830 root_plt
->offset
= splt
->size
;
8831 splt
->size
+= htab
->plt_entry_size
;
8833 if (!htab
->symbian_p
)
8835 /* We also need to make an entry in the .got.plt section, which
8836 will be placed in the .got section by the linker script. */
8838 arm_plt
->got_offset
= sgotplt
->size
;
8840 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
8846 arm_movw_immediate (bfd_vma value
)
8848 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
8852 arm_movt_immediate (bfd_vma value
)
8854 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
8857 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8858 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8859 Otherwise, DYNINDX is the index of the symbol in the dynamic
8860 symbol table and SYM_VALUE is undefined.
8862 ROOT_PLT points to the offset of the PLT entry from the start of its
8863 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8864 bookkeeping information.
8866 Returns FALSE if there was a problem. */
8869 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
8870 union gotplt_union
*root_plt
,
8871 struct arm_plt_info
*arm_plt
,
8872 int dynindx
, bfd_vma sym_value
)
8874 struct elf32_arm_link_hash_table
*htab
;
8880 Elf_Internal_Rela rel
;
8881 bfd_vma plt_header_size
;
8882 bfd_vma got_header_size
;
8884 htab
= elf32_arm_hash_table (info
);
8886 /* Pick the appropriate sections and sizes. */
8889 splt
= htab
->root
.iplt
;
8890 sgot
= htab
->root
.igotplt
;
8891 srel
= htab
->root
.irelplt
;
8893 /* There are no reserved entries in .igot.plt, and no special
8894 first entry in .iplt. */
8895 got_header_size
= 0;
8896 plt_header_size
= 0;
8900 splt
= htab
->root
.splt
;
8901 sgot
= htab
->root
.sgotplt
;
8902 srel
= htab
->root
.srelplt
;
8904 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
8905 plt_header_size
= htab
->plt_header_size
;
8907 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
8909 /* Fill in the entry in the procedure linkage table. */
8910 if (htab
->symbian_p
)
8912 BFD_ASSERT (dynindx
>= 0);
8913 put_arm_insn (htab
, output_bfd
,
8914 elf32_arm_symbian_plt_entry
[0],
8915 splt
->contents
+ root_plt
->offset
);
8916 bfd_put_32 (output_bfd
,
8917 elf32_arm_symbian_plt_entry
[1],
8918 splt
->contents
+ root_plt
->offset
+ 4);
8920 /* Fill in the entry in the .rel.plt section. */
8921 rel
.r_offset
= (splt
->output_section
->vma
8922 + splt
->output_offset
8923 + root_plt
->offset
+ 4);
8924 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
8926 /* Get the index in the procedure linkage table which
8927 corresponds to this symbol. This is the index of this symbol
8928 in all the symbols for which we are making plt entries. The
8929 first entry in the procedure linkage table is reserved. */
8930 plt_index
= ((root_plt
->offset
- plt_header_size
)
8931 / htab
->plt_entry_size
);
8935 bfd_vma got_offset
, got_address
, plt_address
;
8936 bfd_vma got_displacement
, initial_got_entry
;
8939 BFD_ASSERT (sgot
!= NULL
);
8941 /* Get the offset into the .(i)got.plt table of the entry that
8942 corresponds to this function. */
8943 got_offset
= (arm_plt
->got_offset
& -2);
8945 /* Get the index in the procedure linkage table which
8946 corresponds to this symbol. This is the index of this symbol
8947 in all the symbols for which we are making plt entries.
8948 After the reserved .got.plt entries, all symbols appear in
8949 the same order as in .plt. */
8950 plt_index
= (got_offset
- got_header_size
) / 4;
8952 /* Calculate the address of the GOT entry. */
8953 got_address
= (sgot
->output_section
->vma
8954 + sgot
->output_offset
8957 /* ...and the address of the PLT entry. */
8958 plt_address
= (splt
->output_section
->vma
8959 + splt
->output_offset
8960 + root_plt
->offset
);
8962 ptr
= splt
->contents
+ root_plt
->offset
;
8963 if (htab
->vxworks_p
&& bfd_link_pic (info
))
8968 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
8970 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
8972 val
|= got_address
- sgot
->output_section
->vma
;
8974 val
|= plt_index
* RELOC_SIZE (htab
);
8975 if (i
== 2 || i
== 5)
8976 bfd_put_32 (output_bfd
, val
, ptr
);
8978 put_arm_insn (htab
, output_bfd
, val
, ptr
);
8981 else if (htab
->vxworks_p
)
8986 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
8988 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
8992 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
8994 val
|= plt_index
* RELOC_SIZE (htab
);
8995 if (i
== 2 || i
== 5)
8996 bfd_put_32 (output_bfd
, val
, ptr
);
8998 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9001 loc
= (htab
->srelplt2
->contents
9002 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9004 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9005 referencing the GOT for this PLT entry. */
9006 rel
.r_offset
= plt_address
+ 8;
9007 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9008 rel
.r_addend
= got_offset
;
9009 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9010 loc
+= RELOC_SIZE (htab
);
9012 /* Create the R_ARM_ABS32 relocation referencing the
9013 beginning of the PLT for this GOT entry. */
9014 rel
.r_offset
= got_address
;
9015 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9017 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9019 else if (htab
->nacl_p
)
9021 /* Calculate the displacement between the PLT slot and the
9022 common tail that's part of the special initial PLT slot. */
9023 int32_t tail_displacement
9024 = ((splt
->output_section
->vma
+ splt
->output_offset
9025 + ARM_NACL_PLT_TAIL_OFFSET
)
9026 - (plt_address
+ htab
->plt_entry_size
+ 4));
9027 BFD_ASSERT ((tail_displacement
& 3) == 0);
9028 tail_displacement
>>= 2;
9030 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9031 || (-tail_displacement
& 0xff000000) == 0);
9033 /* Calculate the displacement between the PLT slot and the entry
9034 in the GOT. The offset accounts for the value produced by
9035 adding to pc in the penultimate instruction of the PLT stub. */
9036 got_displacement
= (got_address
9037 - (plt_address
+ htab
->plt_entry_size
));
9039 /* NaCl does not support interworking at all. */
9040 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9042 put_arm_insn (htab
, output_bfd
,
9043 elf32_arm_nacl_plt_entry
[0]
9044 | arm_movw_immediate (got_displacement
),
9046 put_arm_insn (htab
, output_bfd
,
9047 elf32_arm_nacl_plt_entry
[1]
9048 | arm_movt_immediate (got_displacement
),
9050 put_arm_insn (htab
, output_bfd
,
9051 elf32_arm_nacl_plt_entry
[2],
9053 put_arm_insn (htab
, output_bfd
,
9054 elf32_arm_nacl_plt_entry
[3]
9055 | (tail_displacement
& 0x00ffffff),
9058 else if (using_thumb_only (htab
))
9060 /* PR ld/16017: Generate thumb only PLT entries. */
9061 if (!using_thumb2 (htab
))
9063 /* FIXME: We ought to be able to generate thumb-1 PLT
9065 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9070 /* Calculate the displacement between the PLT slot and the entry in
9071 the GOT. The 12-byte offset accounts for the value produced by
9072 adding to pc in the 3rd instruction of the PLT stub. */
9073 got_displacement
= got_address
- (plt_address
+ 12);
9075 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9076 instead of 'put_thumb_insn'. */
9077 put_arm_insn (htab
, output_bfd
,
9078 elf32_thumb2_plt_entry
[0]
9079 | ((got_displacement
& 0x000000ff) << 16)
9080 | ((got_displacement
& 0x00000700) << 20)
9081 | ((got_displacement
& 0x00000800) >> 1)
9082 | ((got_displacement
& 0x0000f000) >> 12),
9084 put_arm_insn (htab
, output_bfd
,
9085 elf32_thumb2_plt_entry
[1]
9086 | ((got_displacement
& 0x00ff0000) )
9087 | ((got_displacement
& 0x07000000) << 4)
9088 | ((got_displacement
& 0x08000000) >> 17)
9089 | ((got_displacement
& 0xf0000000) >> 28),
9091 put_arm_insn (htab
, output_bfd
,
9092 elf32_thumb2_plt_entry
[2],
9094 put_arm_insn (htab
, output_bfd
,
9095 elf32_thumb2_plt_entry
[3],
9100 /* Calculate the displacement between the PLT slot and the
9101 entry in the GOT. The eight-byte offset accounts for the
9102 value produced by adding to pc in the first instruction
9104 got_displacement
= got_address
- (plt_address
+ 8);
9106 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9108 put_thumb_insn (htab
, output_bfd
,
9109 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9110 put_thumb_insn (htab
, output_bfd
,
9111 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9114 if (!elf32_arm_use_long_plt_entry
)
9116 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9118 put_arm_insn (htab
, output_bfd
,
9119 elf32_arm_plt_entry_short
[0]
9120 | ((got_displacement
& 0x0ff00000) >> 20),
9122 put_arm_insn (htab
, output_bfd
,
9123 elf32_arm_plt_entry_short
[1]
9124 | ((got_displacement
& 0x000ff000) >> 12),
9126 put_arm_insn (htab
, output_bfd
,
9127 elf32_arm_plt_entry_short
[2]
9128 | (got_displacement
& 0x00000fff),
9130 #ifdef FOUR_WORD_PLT
9131 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9136 put_arm_insn (htab
, output_bfd
,
9137 elf32_arm_plt_entry_long
[0]
9138 | ((got_displacement
& 0xf0000000) >> 28),
9140 put_arm_insn (htab
, output_bfd
,
9141 elf32_arm_plt_entry_long
[1]
9142 | ((got_displacement
& 0x0ff00000) >> 20),
9144 put_arm_insn (htab
, output_bfd
,
9145 elf32_arm_plt_entry_long
[2]
9146 | ((got_displacement
& 0x000ff000) >> 12),
9148 put_arm_insn (htab
, output_bfd
,
9149 elf32_arm_plt_entry_long
[3]
9150 | (got_displacement
& 0x00000fff),
9155 /* Fill in the entry in the .rel(a).(i)plt section. */
9156 rel
.r_offset
= got_address
;
9160 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9161 The dynamic linker or static executable then calls SYM_VALUE
9162 to determine the correct run-time value of the .igot.plt entry. */
9163 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9164 initial_got_entry
= sym_value
;
9168 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9169 initial_got_entry
= (splt
->output_section
->vma
9170 + splt
->output_offset
);
9173 /* Fill in the entry in the global offset table. */
9174 bfd_put_32 (output_bfd
, initial_got_entry
,
9175 sgot
->contents
+ got_offset
);
9179 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9182 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
9183 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9189 /* Some relocations map to different relocations depending on the
9190 target. Return the real relocation. */
9193 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
9199 if (globals
->target1_is_rel
)
9205 return globals
->target2_reloc
;
9212 /* Return the base VMA address which should be subtracted from real addresses
9213 when resolving @dtpoff relocation.
9214 This is PT_TLS segment p_vaddr. */
9217 dtpoff_base (struct bfd_link_info
*info
)
9219 /* If tls_sec is NULL, we should have signalled an error already. */
9220 if (elf_hash_table (info
)->tls_sec
== NULL
)
9222 return elf_hash_table (info
)->tls_sec
->vma
;
9225 /* Return the relocation value for @tpoff relocation
9226 if STT_TLS virtual address is ADDRESS. */
9229 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
9231 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9234 /* If tls_sec is NULL, we should have signalled an error already. */
9235 if (htab
->tls_sec
== NULL
)
9237 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
9238 return address
- htab
->tls_sec
->vma
+ base
;
9241 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9242 VALUE is the relocation value. */
9244 static bfd_reloc_status_type
9245 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
9248 return bfd_reloc_overflow
;
9250 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
9251 bfd_put_32 (abfd
, value
, data
);
9252 return bfd_reloc_ok
;
9255 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9256 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9257 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9259 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9260 is to then call final_link_relocate. Return other values in the
9263 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9264 the pre-relaxed code. It would be nice if the relocs were updated
9265 to match the optimization. */
9267 static bfd_reloc_status_type
9268 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
9269 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
9270 Elf_Internal_Rela
*rel
, unsigned long is_local
)
9274 switch (ELF32_R_TYPE (rel
->r_info
))
9277 return bfd_reloc_notsupported
;
9279 case R_ARM_TLS_GOTDESC
:
9284 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9286 insn
-= 5; /* THUMB */
9288 insn
-= 8; /* ARM */
9290 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9291 return bfd_reloc_continue
;
9293 case R_ARM_THM_TLS_DESCSEQ
:
9295 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
9296 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
9300 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9302 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9306 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9309 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
9311 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
9315 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9318 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
9319 contents
+ rel
->r_offset
);
9323 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
9324 /* It's a 32 bit instruction, fetch the rest of it for
9325 error generation. */
9327 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
9328 (*_bfd_error_handler
)
9329 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
9330 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
9331 return bfd_reloc_notsupported
;
9335 case R_ARM_TLS_DESCSEQ
:
9337 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9338 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9342 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
9343 contents
+ rel
->r_offset
);
9345 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9349 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9352 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
9353 contents
+ rel
->r_offset
);
9355 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
9359 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9362 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
9363 contents
+ rel
->r_offset
);
9367 (*_bfd_error_handler
)
9368 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
9369 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
9370 return bfd_reloc_notsupported
;
9374 case R_ARM_TLS_CALL
:
9375 /* GD->IE relaxation, turn the instruction into 'nop' or
9376 'ldr r0, [pc,r0]' */
9377 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
9378 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9381 case R_ARM_THM_TLS_CALL
:
9382 /* GD->IE relaxation. */
9384 /* add r0,pc; ldr r0, [r0] */
9386 else if (using_thumb2 (globals
))
9393 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
9394 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
9397 return bfd_reloc_ok
;
9400 /* For a given value of n, calculate the value of G_n as required to
9401 deal with group relocations. We return it in the form of an
9402 encoded constant-and-rotation, together with the final residual. If n is
9403 specified as less than zero, then final_residual is filled with the
9404 input value and no further action is performed. */
9407 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
9411 bfd_vma encoded_g_n
= 0;
9412 bfd_vma residual
= value
; /* Also known as Y_n. */
9414 for (current_n
= 0; current_n
<= n
; current_n
++)
9418 /* Calculate which part of the value to mask. */
9425 /* Determine the most significant bit in the residual and
9426 align the resulting value to a 2-bit boundary. */
9427 for (msb
= 30; msb
>= 0; msb
-= 2)
9428 if (residual
& (3 << msb
))
9431 /* The desired shift is now (msb - 6), or zero, whichever
9438 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9439 g_n
= residual
& (0xff << shift
);
9440 encoded_g_n
= (g_n
>> shift
)
9441 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
9443 /* Calculate the residual for the next time around. */
9447 *final_residual
= residual
;
9452 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9453 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9456 identify_add_or_sub (bfd_vma insn
)
9458 int opcode
= insn
& 0x1e00000;
9460 if (opcode
== 1 << 23) /* ADD */
9463 if (opcode
== 1 << 22) /* SUB */
9469 /* Perform a relocation as part of a final link. */
9471 static bfd_reloc_status_type
9472 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
9475 asection
* input_section
,
9476 bfd_byte
* contents
,
9477 Elf_Internal_Rela
* rel
,
9479 struct bfd_link_info
* info
,
9481 const char * sym_name
,
9482 unsigned char st_type
,
9483 enum arm_st_branch_type branch_type
,
9484 struct elf_link_hash_entry
* h
,
9485 bfd_boolean
* unresolved_reloc_p
,
9486 char ** error_message
)
9488 unsigned long r_type
= howto
->type
;
9489 unsigned long r_symndx
;
9490 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
9491 bfd_vma
* local_got_offsets
;
9492 bfd_vma
* local_tlsdesc_gotents
;
9495 asection
* sreloc
= NULL
;
9498 bfd_signed_vma signed_addend
;
9499 unsigned char dynreloc_st_type
;
9500 bfd_vma dynreloc_value
;
9501 struct elf32_arm_link_hash_table
* globals
;
9502 struct elf32_arm_link_hash_entry
*eh
;
9503 union gotplt_union
*root_plt
;
9504 struct arm_plt_info
*arm_plt
;
9506 bfd_vma gotplt_offset
;
9507 bfd_boolean has_iplt_entry
;
9509 globals
= elf32_arm_hash_table (info
);
9510 if (globals
== NULL
)
9511 return bfd_reloc_notsupported
;
9513 BFD_ASSERT (is_arm_elf (input_bfd
));
9515 /* Some relocation types map to different relocations depending on the
9516 target. We pick the right one here. */
9517 r_type
= arm_real_reloc_type (globals
, r_type
);
9519 /* It is possible to have linker relaxations on some TLS access
9520 models. Update our information here. */
9521 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
9523 if (r_type
!= howto
->type
)
9524 howto
= elf32_arm_howto_from_type (r_type
);
9526 eh
= (struct elf32_arm_link_hash_entry
*) h
;
9527 sgot
= globals
->root
.sgot
;
9528 local_got_offsets
= elf_local_got_offsets (input_bfd
);
9529 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
9531 if (globals
->root
.dynamic_sections_created
)
9532 srelgot
= globals
->root
.srelgot
;
9536 r_symndx
= ELF32_R_SYM (rel
->r_info
);
9538 if (globals
->use_rel
)
9540 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
9542 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9545 signed_addend
&= ~ howto
->src_mask
;
9546 signed_addend
|= addend
;
9549 signed_addend
= addend
;
9552 addend
= signed_addend
= rel
->r_addend
;
9554 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9555 are resolving a function call relocation. */
9556 if (using_thumb_only (globals
)
9557 && (r_type
== R_ARM_THM_CALL
9558 || r_type
== R_ARM_THM_JUMP24
)
9559 && branch_type
== ST_BRANCH_TO_ARM
)
9560 branch_type
= ST_BRANCH_TO_THUMB
;
9562 /* Record the symbol information that should be used in dynamic
9564 dynreloc_st_type
= st_type
;
9565 dynreloc_value
= value
;
9566 if (branch_type
== ST_BRANCH_TO_THUMB
)
9567 dynreloc_value
|= 1;
9569 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9570 VALUE appropriately for relocations that we resolve at link time. */
9571 has_iplt_entry
= FALSE
;
9572 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
9574 && root_plt
->offset
!= (bfd_vma
) -1)
9576 plt_offset
= root_plt
->offset
;
9577 gotplt_offset
= arm_plt
->got_offset
;
9579 if (h
== NULL
|| eh
->is_iplt
)
9581 has_iplt_entry
= TRUE
;
9582 splt
= globals
->root
.iplt
;
9584 /* Populate .iplt entries here, because not all of them will
9585 be seen by finish_dynamic_symbol. The lower bit is set if
9586 we have already populated the entry. */
9591 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
9592 -1, dynreloc_value
))
9593 root_plt
->offset
|= 1;
9595 return bfd_reloc_notsupported
;
9598 /* Static relocations always resolve to the .iplt entry. */
9600 value
= (splt
->output_section
->vma
9601 + splt
->output_offset
9603 branch_type
= ST_BRANCH_TO_ARM
;
9605 /* If there are non-call relocations that resolve to the .iplt
9606 entry, then all dynamic ones must too. */
9607 if (arm_plt
->noncall_refcount
!= 0)
9609 dynreloc_st_type
= st_type
;
9610 dynreloc_value
= value
;
9614 /* We populate the .plt entry in finish_dynamic_symbol. */
9615 splt
= globals
->root
.splt
;
9620 plt_offset
= (bfd_vma
) -1;
9621 gotplt_offset
= (bfd_vma
) -1;
9627 /* We don't need to find a value for this symbol. It's just a
9629 *unresolved_reloc_p
= FALSE
;
9630 return bfd_reloc_ok
;
9633 if (!globals
->vxworks_p
)
9634 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
9638 case R_ARM_ABS32_NOI
:
9640 case R_ARM_REL32_NOI
:
9646 /* Handle relocations which should use the PLT entry. ABS32/REL32
9647 will use the symbol's value, which may point to a PLT entry, but we
9648 don't need to handle that here. If we created a PLT entry, all
9649 branches in this object should go to it, except if the PLT is too
9650 far away, in which case a long branch stub should be inserted. */
9651 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
9652 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
9653 && r_type
!= R_ARM_CALL
9654 && r_type
!= R_ARM_JUMP24
9655 && r_type
!= R_ARM_PLT32
)
9656 && plt_offset
!= (bfd_vma
) -1)
9658 /* If we've created a .plt section, and assigned a PLT entry
9659 to this function, it must either be a STT_GNU_IFUNC reference
9660 or not be known to bind locally. In other cases, we should
9661 have cleared the PLT entry by now. */
9662 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
9664 value
= (splt
->output_section
->vma
9665 + splt
->output_offset
9667 *unresolved_reloc_p
= FALSE
;
9668 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9669 contents
, rel
->r_offset
, value
,
9673 /* When generating a shared object or relocatable executable, these
9674 relocations are copied into the output file to be resolved at
9676 if ((bfd_link_pic (info
)
9677 || globals
->root
.is_relocatable_executable
)
9678 && (input_section
->flags
& SEC_ALLOC
)
9679 && !(globals
->vxworks_p
9680 && strcmp (input_section
->output_section
->name
,
9682 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
9683 || !SYMBOL_CALLS_LOCAL (info
, h
))
9684 && !(input_bfd
== globals
->stub_bfd
9685 && strstr (input_section
->name
, STUB_SUFFIX
))
9687 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
9688 || h
->root
.type
!= bfd_link_hash_undefweak
)
9689 && r_type
!= R_ARM_PC24
9690 && r_type
!= R_ARM_CALL
9691 && r_type
!= R_ARM_JUMP24
9692 && r_type
!= R_ARM_PREL31
9693 && r_type
!= R_ARM_PLT32
)
9695 Elf_Internal_Rela outrel
;
9696 bfd_boolean skip
, relocate
;
9698 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
9701 char *v
= _("shared object");
9703 if (bfd_link_executable (info
))
9704 v
= _("PIE executable");
9706 (*_bfd_error_handler
)
9707 (_("%B: relocation %s against external or undefined symbol `%s'"
9708 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
9709 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
9710 return bfd_reloc_notsupported
;
9713 *unresolved_reloc_p
= FALSE
;
9715 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
9717 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
9718 ! globals
->use_rel
);
9721 return bfd_reloc_notsupported
;
9727 outrel
.r_addend
= addend
;
9729 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
9731 if (outrel
.r_offset
== (bfd_vma
) -1)
9733 else if (outrel
.r_offset
== (bfd_vma
) -2)
9734 skip
= TRUE
, relocate
= TRUE
;
9735 outrel
.r_offset
+= (input_section
->output_section
->vma
9736 + input_section
->output_offset
);
9739 memset (&outrel
, 0, sizeof outrel
);
9742 && (!bfd_link_pic (info
)
9743 || !SYMBOLIC_BIND (info
, h
)
9744 || !h
->def_regular
))
9745 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
9750 /* This symbol is local, or marked to become local. */
9751 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
9752 if (globals
->symbian_p
)
9756 /* On Symbian OS, the data segment and text segement
9757 can be relocated independently. Therefore, we
9758 must indicate the segment to which this
9759 relocation is relative. The BPABI allows us to
9760 use any symbol in the right segment; we just use
9761 the section symbol as it is convenient. (We
9762 cannot use the symbol given by "h" directly as it
9763 will not appear in the dynamic symbol table.)
9765 Note that the dynamic linker ignores the section
9766 symbol value, so we don't subtract osec->vma
9767 from the emitted reloc addend. */
9769 osec
= sym_sec
->output_section
;
9771 osec
= input_section
->output_section
;
9772 symbol
= elf_section_data (osec
)->dynindx
;
9775 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9777 if ((osec
->flags
& SEC_READONLY
) == 0
9778 && htab
->data_index_section
!= NULL
)
9779 osec
= htab
->data_index_section
;
9781 osec
= htab
->text_index_section
;
9782 symbol
= elf_section_data (osec
)->dynindx
;
9784 BFD_ASSERT (symbol
!= 0);
9787 /* On SVR4-ish systems, the dynamic loader cannot
9788 relocate the text and data segments independently,
9789 so the symbol does not matter. */
9791 if (dynreloc_st_type
== STT_GNU_IFUNC
)
9792 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9793 to the .iplt entry. Instead, every non-call reference
9794 must use an R_ARM_IRELATIVE relocation to obtain the
9795 correct run-time address. */
9796 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
9798 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
9799 if (globals
->use_rel
)
9802 outrel
.r_addend
+= dynreloc_value
;
9805 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
9807 /* If this reloc is against an external symbol, we do not want to
9808 fiddle with the addend. Otherwise, we need to include the symbol
9809 value so that it becomes an addend for the dynamic reloc. */
9811 return bfd_reloc_ok
;
9813 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9814 contents
, rel
->r_offset
,
9815 dynreloc_value
, (bfd_vma
) 0);
9817 else switch (r_type
)
9820 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
9822 case R_ARM_XPC25
: /* Arm BLX instruction. */
9825 case R_ARM_PC24
: /* Arm B/BL instruction. */
9828 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
9830 if (r_type
== R_ARM_XPC25
)
9832 /* Check for Arm calling Arm function. */
9833 /* FIXME: Should we translate the instruction into a BL
9834 instruction instead ? */
9835 if (branch_type
!= ST_BRANCH_TO_THUMB
)
9836 (*_bfd_error_handler
)
9837 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9839 h
? h
->root
.root
.string
: "(local)");
9841 else if (r_type
== R_ARM_PC24
)
9843 /* Check for Arm calling Thumb function. */
9844 if (branch_type
== ST_BRANCH_TO_THUMB
)
9846 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
9847 output_bfd
, input_section
,
9848 hit_data
, sym_sec
, rel
->r_offset
,
9849 signed_addend
, value
,
9851 return bfd_reloc_ok
;
9853 return bfd_reloc_dangerous
;
9857 /* Check if a stub has to be inserted because the
9858 destination is too far or we are changing mode. */
9859 if ( r_type
== R_ARM_CALL
9860 || r_type
== R_ARM_JUMP24
9861 || r_type
== R_ARM_PLT32
)
9863 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9864 struct elf32_arm_link_hash_entry
*hash
;
9866 hash
= (struct elf32_arm_link_hash_entry
*) h
;
9867 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9868 st_type
, &branch_type
,
9869 hash
, value
, sym_sec
,
9870 input_bfd
, sym_name
);
9872 if (stub_type
!= arm_stub_none
)
9874 /* The target is out of reach, so redirect the
9875 branch to the local stub for this function. */
9876 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9881 if (stub_entry
!= NULL
)
9882 value
= (stub_entry
->stub_offset
9883 + stub_entry
->stub_sec
->output_offset
9884 + stub_entry
->stub_sec
->output_section
->vma
);
9886 if (plt_offset
!= (bfd_vma
) -1)
9887 *unresolved_reloc_p
= FALSE
;
9892 /* If the call goes through a PLT entry, make sure to
9893 check distance to the right destination address. */
9894 if (plt_offset
!= (bfd_vma
) -1)
9896 value
= (splt
->output_section
->vma
9897 + splt
->output_offset
9899 *unresolved_reloc_p
= FALSE
;
9900 /* The PLT entry is in ARM mode, regardless of the
9902 branch_type
= ST_BRANCH_TO_ARM
;
9907 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9909 S is the address of the symbol in the relocation.
9910 P is address of the instruction being relocated.
9911 A is the addend (extracted from the instruction) in bytes.
9913 S is held in 'value'.
9914 P is the base address of the section containing the
9915 instruction plus the offset of the reloc into that
9917 (input_section->output_section->vma +
9918 input_section->output_offset +
9920 A is the addend, converted into bytes, ie:
9923 Note: None of these operations have knowledge of the pipeline
9924 size of the processor, thus it is up to the assembler to
9925 encode this information into the addend. */
9926 value
-= (input_section
->output_section
->vma
9927 + input_section
->output_offset
);
9928 value
-= rel
->r_offset
;
9929 if (globals
->use_rel
)
9930 value
+= (signed_addend
<< howto
->size
);
9932 /* RELA addends do not have to be adjusted by howto->size. */
9933 value
+= signed_addend
;
9935 signed_addend
= value
;
9936 signed_addend
>>= howto
->rightshift
;
9938 /* A branch to an undefined weak symbol is turned into a jump to
9939 the next instruction unless a PLT entry will be created.
9940 Do the same for local undefined symbols (but not for STN_UNDEF).
9941 The jump to the next instruction is optimized as a NOP depending
9942 on the architecture. */
9943 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
9944 && plt_offset
== (bfd_vma
) -1)
9945 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
9947 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
9949 if (arch_has_arm_nop (globals
))
9950 value
|= 0x0320f000;
9952 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9956 /* Perform a signed range check. */
9957 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
9958 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
9959 return bfd_reloc_overflow
;
9961 addend
= (value
& 2);
9963 value
= (signed_addend
& howto
->dst_mask
)
9964 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
9966 if (r_type
== R_ARM_CALL
)
9968 /* Set the H bit in the BLX instruction. */
9969 if (branch_type
== ST_BRANCH_TO_THUMB
)
9974 value
&= ~(bfd_vma
)(1 << 24);
9977 /* Select the correct instruction (BL or BLX). */
9978 /* Only if we are not handling a BL to a stub. In this
9979 case, mode switching is performed by the stub. */
9980 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
9982 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
9984 value
&= ~(bfd_vma
)(1 << 28);
9994 if (branch_type
== ST_BRANCH_TO_THUMB
)
9998 case R_ARM_ABS32_NOI
:
10004 if (branch_type
== ST_BRANCH_TO_THUMB
)
10006 value
-= (input_section
->output_section
->vma
10007 + input_section
->output_offset
+ rel
->r_offset
);
10010 case R_ARM_REL32_NOI
:
10012 value
-= (input_section
->output_section
->vma
10013 + input_section
->output_offset
+ rel
->r_offset
);
10017 value
-= (input_section
->output_section
->vma
10018 + input_section
->output_offset
+ rel
->r_offset
);
10019 value
+= signed_addend
;
10020 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10022 /* Check for overflow. */
10023 if ((value
^ (value
>> 1)) & (1 << 30))
10024 return bfd_reloc_overflow
;
10026 value
&= 0x7fffffff;
10027 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10028 if (branch_type
== ST_BRANCH_TO_THUMB
)
10033 bfd_put_32 (input_bfd
, value
, hit_data
);
10034 return bfd_reloc_ok
;
10037 /* PR 16202: Refectch the addend using the correct size. */
10038 if (globals
->use_rel
)
10039 addend
= bfd_get_8 (input_bfd
, hit_data
);
10042 /* There is no way to tell whether the user intended to use a signed or
10043 unsigned addend. When checking for overflow we accept either,
10044 as specified by the AAELF. */
10045 if ((long) value
> 0xff || (long) value
< -0x80)
10046 return bfd_reloc_overflow
;
10048 bfd_put_8 (input_bfd
, value
, hit_data
);
10049 return bfd_reloc_ok
;
10052 /* PR 16202: Refectch the addend using the correct size. */
10053 if (globals
->use_rel
)
10054 addend
= bfd_get_16 (input_bfd
, hit_data
);
10057 /* See comment for R_ARM_ABS8. */
10058 if ((long) value
> 0xffff || (long) value
< -0x8000)
10059 return bfd_reloc_overflow
;
10061 bfd_put_16 (input_bfd
, value
, hit_data
);
10062 return bfd_reloc_ok
;
10064 case R_ARM_THM_ABS5
:
10065 /* Support ldr and str instructions for the thumb. */
10066 if (globals
->use_rel
)
10068 /* Need to refetch addend. */
10069 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10070 /* ??? Need to determine shift amount from operand size. */
10071 addend
>>= howto
->rightshift
;
10075 /* ??? Isn't value unsigned? */
10076 if ((long) value
> 0x1f || (long) value
< -0x10)
10077 return bfd_reloc_overflow
;
10079 /* ??? Value needs to be properly shifted into place first. */
10080 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10081 bfd_put_16 (input_bfd
, value
, hit_data
);
10082 return bfd_reloc_ok
;
10084 case R_ARM_THM_ALU_PREL_11_0
:
10085 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10088 bfd_signed_vma relocation
;
10090 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10091 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10093 if (globals
->use_rel
)
10095 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10096 | ((insn
& (1 << 26)) >> 15);
10097 if (insn
& 0xf00000)
10098 signed_addend
= -signed_addend
;
10101 relocation
= value
+ signed_addend
;
10102 relocation
-= Pa (input_section
->output_section
->vma
10103 + input_section
->output_offset
10106 value
= relocation
;
10108 if (value
>= 0x1000)
10109 return bfd_reloc_overflow
;
10111 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10112 | ((value
& 0x700) << 4)
10113 | ((value
& 0x800) << 15);
10114 if (relocation
< 0)
10117 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10118 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10120 return bfd_reloc_ok
;
10123 case R_ARM_THM_PC8
:
10124 /* PR 10073: This reloc is not generated by the GNU toolchain,
10125 but it is supported for compatibility with third party libraries
10126 generated by other compilers, specifically the ARM/IAR. */
10129 bfd_signed_vma relocation
;
10131 insn
= bfd_get_16 (input_bfd
, hit_data
);
10133 if (globals
->use_rel
)
10134 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10136 relocation
= value
+ addend
;
10137 relocation
-= Pa (input_section
->output_section
->vma
10138 + input_section
->output_offset
10141 value
= relocation
;
10143 /* We do not check for overflow of this reloc. Although strictly
10144 speaking this is incorrect, it appears to be necessary in order
10145 to work with IAR generated relocs. Since GCC and GAS do not
10146 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10147 a problem for them. */
10150 insn
= (insn
& 0xff00) | (value
>> 2);
10152 bfd_put_16 (input_bfd
, insn
, hit_data
);
10154 return bfd_reloc_ok
;
10157 case R_ARM_THM_PC12
:
10158 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10161 bfd_signed_vma relocation
;
10163 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10164 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10166 if (globals
->use_rel
)
10168 signed_addend
= insn
& 0xfff;
10169 if (!(insn
& (1 << 23)))
10170 signed_addend
= -signed_addend
;
10173 relocation
= value
+ signed_addend
;
10174 relocation
-= Pa (input_section
->output_section
->vma
10175 + input_section
->output_offset
10178 value
= relocation
;
10180 if (value
>= 0x1000)
10181 return bfd_reloc_overflow
;
10183 insn
= (insn
& 0xff7ff000) | value
;
10184 if (relocation
>= 0)
10187 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10188 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10190 return bfd_reloc_ok
;
10193 case R_ARM_THM_XPC22
:
10194 case R_ARM_THM_CALL
:
10195 case R_ARM_THM_JUMP24
:
10196 /* Thumb BL (branch long instruction). */
10198 bfd_vma relocation
;
10199 bfd_vma reloc_sign
;
10200 bfd_boolean overflow
= FALSE
;
10201 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10202 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10203 bfd_signed_vma reloc_signed_max
;
10204 bfd_signed_vma reloc_signed_min
;
10206 bfd_signed_vma signed_check
;
10208 const int thumb2
= using_thumb2 (globals
);
10209 const int thumb2_bl
= using_thumb2_bl (globals
);
10211 /* A branch to an undefined weak symbol is turned into a jump to
10212 the next instruction unless a PLT entry will be created.
10213 The jump to the next instruction is optimized as a NOP.W for
10214 Thumb-2 enabled architectures. */
10215 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
10216 && plt_offset
== (bfd_vma
) -1)
10220 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
10221 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
10225 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
10226 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
10228 return bfd_reloc_ok
;
10231 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10232 with Thumb-1) involving the J1 and J2 bits. */
10233 if (globals
->use_rel
)
10235 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
10236 bfd_vma upper
= upper_insn
& 0x3ff;
10237 bfd_vma lower
= lower_insn
& 0x7ff;
10238 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
10239 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
10240 bfd_vma i1
= j1
^ s
? 0 : 1;
10241 bfd_vma i2
= j2
^ s
? 0 : 1;
10243 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
10245 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
10247 signed_addend
= addend
;
10250 if (r_type
== R_ARM_THM_XPC22
)
10252 /* Check for Thumb to Thumb call. */
10253 /* FIXME: Should we translate the instruction into a BL
10254 instruction instead ? */
10255 if (branch_type
== ST_BRANCH_TO_THUMB
)
10256 (*_bfd_error_handler
)
10257 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10259 h
? h
->root
.root
.string
: "(local)");
10263 /* If it is not a call to Thumb, assume call to Arm.
10264 If it is a call relative to a section name, then it is not a
10265 function call at all, but rather a long jump. Calls through
10266 the PLT do not require stubs. */
10267 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
10269 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
10271 /* Convert BL to BLX. */
10272 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10274 else if (( r_type
!= R_ARM_THM_CALL
)
10275 && (r_type
!= R_ARM_THM_JUMP24
))
10277 if (elf32_thumb_to_arm_stub
10278 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
10279 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
10281 return bfd_reloc_ok
;
10283 return bfd_reloc_dangerous
;
10286 else if (branch_type
== ST_BRANCH_TO_THUMB
10287 && globals
->use_blx
10288 && r_type
== R_ARM_THM_CALL
)
10290 /* Make sure this is a BL. */
10291 lower_insn
|= 0x1800;
10295 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10296 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
10298 /* Check if a stub has to be inserted because the destination
10300 struct elf32_arm_stub_hash_entry
*stub_entry
;
10301 struct elf32_arm_link_hash_entry
*hash
;
10303 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10305 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10306 st_type
, &branch_type
,
10307 hash
, value
, sym_sec
,
10308 input_bfd
, sym_name
);
10310 if (stub_type
!= arm_stub_none
)
10312 /* The target is out of reach or we are changing modes, so
10313 redirect the branch to the local stub for this
10315 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10319 if (stub_entry
!= NULL
)
10321 value
= (stub_entry
->stub_offset
10322 + stub_entry
->stub_sec
->output_offset
10323 + stub_entry
->stub_sec
->output_section
->vma
);
10325 if (plt_offset
!= (bfd_vma
) -1)
10326 *unresolved_reloc_p
= FALSE
;
10329 /* If this call becomes a call to Arm, force BLX. */
10330 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
10333 && !arm_stub_is_thumb (stub_entry
->stub_type
))
10334 || branch_type
!= ST_BRANCH_TO_THUMB
)
10335 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10340 /* Handle calls via the PLT. */
10341 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
10343 value
= (splt
->output_section
->vma
10344 + splt
->output_offset
10347 if (globals
->use_blx
10348 && r_type
== R_ARM_THM_CALL
10349 && ! using_thumb_only (globals
))
10351 /* If the Thumb BLX instruction is available, convert
10352 the BL to a BLX instruction to call the ARM-mode
10354 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10355 branch_type
= ST_BRANCH_TO_ARM
;
10359 if (! using_thumb_only (globals
))
10360 /* Target the Thumb stub before the ARM PLT entry. */
10361 value
-= PLT_THUMB_STUB_SIZE
;
10362 branch_type
= ST_BRANCH_TO_THUMB
;
10364 *unresolved_reloc_p
= FALSE
;
10367 relocation
= value
+ signed_addend
;
10369 relocation
-= (input_section
->output_section
->vma
10370 + input_section
->output_offset
10373 check
= relocation
>> howto
->rightshift
;
10375 /* If this is a signed value, the rightshift just dropped
10376 leading 1 bits (assuming twos complement). */
10377 if ((bfd_signed_vma
) relocation
>= 0)
10378 signed_check
= check
;
10380 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
10382 /* Calculate the permissable maximum and minimum values for
10383 this relocation according to whether we're relocating for
10385 bitsize
= howto
->bitsize
;
10388 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
10389 reloc_signed_min
= ~reloc_signed_max
;
10391 /* Assumes two's complement. */
10392 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10395 if ((lower_insn
& 0x5000) == 0x4000)
10396 /* For a BLX instruction, make sure that the relocation is rounded up
10397 to a word boundary. This follows the semantics of the instruction
10398 which specifies that bit 1 of the target address will come from bit
10399 1 of the base address. */
10400 relocation
= (relocation
+ 2) & ~ 3;
10402 /* Put RELOCATION back into the insn. Assumes two's complement.
10403 We use the Thumb-2 encoding, which is safe even if dealing with
10404 a Thumb-1 instruction by virtue of our overflow check above. */
10405 reloc_sign
= (signed_check
< 0) ? 1 : 0;
10406 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
10407 | ((relocation
>> 12) & 0x3ff)
10408 | (reloc_sign
<< 10);
10409 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
10410 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
10411 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
10412 | ((relocation
>> 1) & 0x7ff);
10414 /* Put the relocated value back in the object file: */
10415 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10416 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10418 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10422 case R_ARM_THM_JUMP19
:
10423 /* Thumb32 conditional branch instruction. */
10425 bfd_vma relocation
;
10426 bfd_boolean overflow
= FALSE
;
10427 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10428 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10429 bfd_signed_vma reloc_signed_max
= 0xffffe;
10430 bfd_signed_vma reloc_signed_min
= -0x100000;
10431 bfd_signed_vma signed_check
;
10432 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10433 struct elf32_arm_stub_hash_entry
*stub_entry
;
10434 struct elf32_arm_link_hash_entry
*hash
;
10436 /* Need to refetch the addend, reconstruct the top three bits,
10437 and squish the two 11 bit pieces together. */
10438 if (globals
->use_rel
)
10440 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
10441 bfd_vma upper
= (upper_insn
& 0x003f);
10442 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
10443 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
10444 bfd_vma lower
= (lower_insn
& 0x07ff);
10448 upper
|= (!S
) << 8;
10449 upper
-= 0x0100; /* Sign extend. */
10451 addend
= (upper
<< 12) | (lower
<< 1);
10452 signed_addend
= addend
;
10455 /* Handle calls via the PLT. */
10456 if (plt_offset
!= (bfd_vma
) -1)
10458 value
= (splt
->output_section
->vma
10459 + splt
->output_offset
10461 /* Target the Thumb stub before the ARM PLT entry. */
10462 value
-= PLT_THUMB_STUB_SIZE
;
10463 *unresolved_reloc_p
= FALSE
;
10466 hash
= (struct elf32_arm_link_hash_entry
*)h
;
10468 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10469 st_type
, &branch_type
,
10470 hash
, value
, sym_sec
,
10471 input_bfd
, sym_name
);
10472 if (stub_type
!= arm_stub_none
)
10474 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10478 if (stub_entry
!= NULL
)
10480 value
= (stub_entry
->stub_offset
10481 + stub_entry
->stub_sec
->output_offset
10482 + stub_entry
->stub_sec
->output_section
->vma
);
10486 relocation
= value
+ signed_addend
;
10487 relocation
-= (input_section
->output_section
->vma
10488 + input_section
->output_offset
10490 signed_check
= (bfd_signed_vma
) relocation
;
10492 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10495 /* Put RELOCATION back into the insn. */
10497 bfd_vma S
= (relocation
& 0x00100000) >> 20;
10498 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
10499 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
10500 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
10501 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
10503 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
10504 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
10507 /* Put the relocated value back in the object file: */
10508 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10509 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10511 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10514 case R_ARM_THM_JUMP11
:
10515 case R_ARM_THM_JUMP8
:
10516 case R_ARM_THM_JUMP6
:
10517 /* Thumb B (branch) instruction). */
10519 bfd_signed_vma relocation
;
10520 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
10521 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
10522 bfd_signed_vma signed_check
;
10524 /* CZB cannot jump backward. */
10525 if (r_type
== R_ARM_THM_JUMP6
)
10526 reloc_signed_min
= 0;
10528 if (globals
->use_rel
)
10530 /* Need to refetch addend. */
10531 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10532 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10534 signed_addend
= -1;
10535 signed_addend
&= ~ howto
->src_mask
;
10536 signed_addend
|= addend
;
10539 signed_addend
= addend
;
10540 /* The value in the insn has been right shifted. We need to
10541 undo this, so that we can perform the address calculation
10542 in terms of bytes. */
10543 signed_addend
<<= howto
->rightshift
;
10545 relocation
= value
+ signed_addend
;
10547 relocation
-= (input_section
->output_section
->vma
10548 + input_section
->output_offset
10551 relocation
>>= howto
->rightshift
;
10552 signed_check
= relocation
;
10554 if (r_type
== R_ARM_THM_JUMP6
)
10555 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
10557 relocation
&= howto
->dst_mask
;
10558 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10560 bfd_put_16 (input_bfd
, relocation
, hit_data
);
10562 /* Assumes two's complement. */
10563 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10564 return bfd_reloc_overflow
;
10566 return bfd_reloc_ok
;
10569 case R_ARM_ALU_PCREL7_0
:
10570 case R_ARM_ALU_PCREL15_8
:
10571 case R_ARM_ALU_PCREL23_15
:
10574 bfd_vma relocation
;
10576 insn
= bfd_get_32 (input_bfd
, hit_data
);
10577 if (globals
->use_rel
)
10579 /* Extract the addend. */
10580 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
10581 signed_addend
= addend
;
10583 relocation
= value
+ signed_addend
;
10585 relocation
-= (input_section
->output_section
->vma
10586 + input_section
->output_offset
10588 insn
= (insn
& ~0xfff)
10589 | ((howto
->bitpos
<< 7) & 0xf00)
10590 | ((relocation
>> howto
->bitpos
) & 0xff);
10591 bfd_put_32 (input_bfd
, value
, hit_data
);
10593 return bfd_reloc_ok
;
10595 case R_ARM_GNU_VTINHERIT
:
10596 case R_ARM_GNU_VTENTRY
:
10597 return bfd_reloc_ok
;
10599 case R_ARM_GOTOFF32
:
10600 /* Relocation is relative to the start of the
10601 global offset table. */
10603 BFD_ASSERT (sgot
!= NULL
);
10605 return bfd_reloc_notsupported
;
10607 /* If we are addressing a Thumb function, we need to adjust the
10608 address by one, so that attempts to call the function pointer will
10609 correctly interpret it as Thumb code. */
10610 if (branch_type
== ST_BRANCH_TO_THUMB
)
10613 /* Note that sgot->output_offset is not involved in this
10614 calculation. We always want the start of .got. If we
10615 define _GLOBAL_OFFSET_TABLE in a different way, as is
10616 permitted by the ABI, we might have to change this
10618 value
-= sgot
->output_section
->vma
;
10619 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10620 contents
, rel
->r_offset
, value
,
10624 /* Use global offset table as symbol value. */
10625 BFD_ASSERT (sgot
!= NULL
);
10628 return bfd_reloc_notsupported
;
10630 *unresolved_reloc_p
= FALSE
;
10631 value
= sgot
->output_section
->vma
;
10632 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10633 contents
, rel
->r_offset
, value
,
10637 case R_ARM_GOT_PREL
:
10638 /* Relocation is to the entry for this symbol in the
10639 global offset table. */
10641 return bfd_reloc_notsupported
;
10643 if (dynreloc_st_type
== STT_GNU_IFUNC
10644 && plt_offset
!= (bfd_vma
) -1
10645 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
10647 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10648 symbol, and the relocation resolves directly to the runtime
10649 target rather than to the .iplt entry. This means that any
10650 .got entry would be the same value as the .igot.plt entry,
10651 so there's no point creating both. */
10652 sgot
= globals
->root
.igotplt
;
10653 value
= sgot
->output_offset
+ gotplt_offset
;
10655 else if (h
!= NULL
)
10659 off
= h
->got
.offset
;
10660 BFD_ASSERT (off
!= (bfd_vma
) -1);
10661 if ((off
& 1) != 0)
10663 /* We have already processsed one GOT relocation against
10666 if (globals
->root
.dynamic_sections_created
10667 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
10668 *unresolved_reloc_p
= FALSE
;
10672 Elf_Internal_Rela outrel
;
10674 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
10676 /* If the symbol doesn't resolve locally in a static
10677 object, we have an undefined reference. If the
10678 symbol doesn't resolve locally in a dynamic object,
10679 it should be resolved by the dynamic linker. */
10680 if (globals
->root
.dynamic_sections_created
)
10682 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
10683 *unresolved_reloc_p
= FALSE
;
10687 outrel
.r_addend
= 0;
10691 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10692 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
10693 else if (bfd_link_pic (info
) &&
10694 (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10695 || h
->root
.type
!= bfd_link_hash_undefweak
))
10696 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
10699 outrel
.r_addend
= dynreloc_value
;
10702 /* The GOT entry is initialized to zero by default.
10703 See if we should install a different value. */
10704 if (outrel
.r_addend
!= 0
10705 && (outrel
.r_info
== 0 || globals
->use_rel
))
10707 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10708 sgot
->contents
+ off
);
10709 outrel
.r_addend
= 0;
10712 if (outrel
.r_info
!= 0)
10714 outrel
.r_offset
= (sgot
->output_section
->vma
10715 + sgot
->output_offset
10717 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10719 h
->got
.offset
|= 1;
10721 value
= sgot
->output_offset
+ off
;
10727 BFD_ASSERT (local_got_offsets
!= NULL
&&
10728 local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
10730 off
= local_got_offsets
[r_symndx
];
10732 /* The offset must always be a multiple of 4. We use the
10733 least significant bit to record whether we have already
10734 generated the necessary reloc. */
10735 if ((off
& 1) != 0)
10739 if (globals
->use_rel
)
10740 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
10742 if (bfd_link_pic (info
) || dynreloc_st_type
== STT_GNU_IFUNC
)
10744 Elf_Internal_Rela outrel
;
10746 outrel
.r_addend
= addend
+ dynreloc_value
;
10747 outrel
.r_offset
= (sgot
->output_section
->vma
10748 + sgot
->output_offset
10750 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10751 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
10753 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
10754 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10757 local_got_offsets
[r_symndx
] |= 1;
10760 value
= sgot
->output_offset
+ off
;
10762 if (r_type
!= R_ARM_GOT32
)
10763 value
+= sgot
->output_section
->vma
;
10765 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10766 contents
, rel
->r_offset
, value
,
10769 case R_ARM_TLS_LDO32
:
10770 value
= value
- dtpoff_base (info
);
10772 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10773 contents
, rel
->r_offset
, value
,
10776 case R_ARM_TLS_LDM32
:
10783 off
= globals
->tls_ldm_got
.offset
;
10785 if ((off
& 1) != 0)
10789 /* If we don't know the module number, create a relocation
10791 if (bfd_link_pic (info
))
10793 Elf_Internal_Rela outrel
;
10795 if (srelgot
== NULL
)
10798 outrel
.r_addend
= 0;
10799 outrel
.r_offset
= (sgot
->output_section
->vma
10800 + sgot
->output_offset
+ off
);
10801 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
10803 if (globals
->use_rel
)
10804 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10805 sgot
->contents
+ off
);
10807 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10810 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
10812 globals
->tls_ldm_got
.offset
|= 1;
10815 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
10816 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
10818 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10819 contents
, rel
->r_offset
, value
,
10823 case R_ARM_TLS_CALL
:
10824 case R_ARM_THM_TLS_CALL
:
10825 case R_ARM_TLS_GD32
:
10826 case R_ARM_TLS_IE32
:
10827 case R_ARM_TLS_GOTDESC
:
10828 case R_ARM_TLS_DESCSEQ
:
10829 case R_ARM_THM_TLS_DESCSEQ
:
10831 bfd_vma off
, offplt
;
10835 BFD_ASSERT (sgot
!= NULL
);
10840 dyn
= globals
->root
.dynamic_sections_created
;
10841 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
10842 bfd_link_pic (info
),
10844 && (!bfd_link_pic (info
)
10845 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
10847 *unresolved_reloc_p
= FALSE
;
10850 off
= h
->got
.offset
;
10851 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
10852 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
10856 BFD_ASSERT (local_got_offsets
!= NULL
);
10857 off
= local_got_offsets
[r_symndx
];
10858 offplt
= local_tlsdesc_gotents
[r_symndx
];
10859 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
10862 /* Linker relaxations happens from one of the
10863 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10864 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
10865 tls_type
= GOT_TLS_IE
;
10867 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
10869 if ((off
& 1) != 0)
10873 bfd_boolean need_relocs
= FALSE
;
10874 Elf_Internal_Rela outrel
;
10877 /* The GOT entries have not been initialized yet. Do it
10878 now, and emit any relocations. If both an IE GOT and a
10879 GD GOT are necessary, we emit the GD first. */
10881 if ((bfd_link_pic (info
) || indx
!= 0)
10883 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10884 || h
->root
.type
!= bfd_link_hash_undefweak
))
10886 need_relocs
= TRUE
;
10887 BFD_ASSERT (srelgot
!= NULL
);
10890 if (tls_type
& GOT_TLS_GDESC
)
10894 /* We should have relaxed, unless this is an undefined
10896 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
10897 || bfd_link_pic (info
));
10898 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
10899 <= globals
->root
.sgotplt
->size
);
10901 outrel
.r_addend
= 0;
10902 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
10903 + globals
->root
.sgotplt
->output_offset
10905 + globals
->sgotplt_jump_table_size
);
10907 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
10908 sreloc
= globals
->root
.srelplt
;
10909 loc
= sreloc
->contents
;
10910 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
10911 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
10912 <= sreloc
->contents
+ sreloc
->size
);
10914 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
10916 /* For globals, the first word in the relocation gets
10917 the relocation index and the top bit set, or zero,
10918 if we're binding now. For locals, it gets the
10919 symbol's offset in the tls section. */
10920 bfd_put_32 (output_bfd
,
10921 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
10922 : info
->flags
& DF_BIND_NOW
? 0
10923 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
10924 globals
->root
.sgotplt
->contents
+ offplt
10925 + globals
->sgotplt_jump_table_size
);
10927 /* Second word in the relocation is always zero. */
10928 bfd_put_32 (output_bfd
, 0,
10929 globals
->root
.sgotplt
->contents
+ offplt
10930 + globals
->sgotplt_jump_table_size
+ 4);
10932 if (tls_type
& GOT_TLS_GD
)
10936 outrel
.r_addend
= 0;
10937 outrel
.r_offset
= (sgot
->output_section
->vma
10938 + sgot
->output_offset
10940 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
10942 if (globals
->use_rel
)
10943 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10944 sgot
->contents
+ cur_off
);
10946 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10949 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
10950 sgot
->contents
+ cur_off
+ 4);
10953 outrel
.r_addend
= 0;
10954 outrel
.r_info
= ELF32_R_INFO (indx
,
10955 R_ARM_TLS_DTPOFF32
);
10956 outrel
.r_offset
+= 4;
10958 if (globals
->use_rel
)
10959 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10960 sgot
->contents
+ cur_off
+ 4);
10962 elf32_arm_add_dynreloc (output_bfd
, info
,
10968 /* If we are not emitting relocations for a
10969 general dynamic reference, then we must be in a
10970 static link or an executable link with the
10971 symbol binding locally. Mark it as belonging
10972 to module 1, the executable. */
10973 bfd_put_32 (output_bfd
, 1,
10974 sgot
->contents
+ cur_off
);
10975 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
10976 sgot
->contents
+ cur_off
+ 4);
10982 if (tls_type
& GOT_TLS_IE
)
10987 outrel
.r_addend
= value
- dtpoff_base (info
);
10989 outrel
.r_addend
= 0;
10990 outrel
.r_offset
= (sgot
->output_section
->vma
10991 + sgot
->output_offset
10993 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
10995 if (globals
->use_rel
)
10996 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10997 sgot
->contents
+ cur_off
);
10999 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11002 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11003 sgot
->contents
+ cur_off
);
11008 h
->got
.offset
|= 1;
11010 local_got_offsets
[r_symndx
] |= 1;
11013 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
11015 else if (tls_type
& GOT_TLS_GDESC
)
11018 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11019 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11021 bfd_signed_vma offset
;
11022 /* TLS stubs are arm mode. The original symbol is a
11023 data object, so branch_type is bogus. */
11024 branch_type
= ST_BRANCH_TO_ARM
;
11025 enum elf32_arm_stub_type stub_type
11026 = arm_type_of_stub (info
, input_section
, rel
,
11027 st_type
, &branch_type
,
11028 (struct elf32_arm_link_hash_entry
*)h
,
11029 globals
->tls_trampoline
, globals
->root
.splt
,
11030 input_bfd
, sym_name
);
11032 if (stub_type
!= arm_stub_none
)
11034 struct elf32_arm_stub_hash_entry
*stub_entry
11035 = elf32_arm_get_stub_entry
11036 (input_section
, globals
->root
.splt
, 0, rel
,
11037 globals
, stub_type
);
11038 offset
= (stub_entry
->stub_offset
11039 + stub_entry
->stub_sec
->output_offset
11040 + stub_entry
->stub_sec
->output_section
->vma
);
11043 offset
= (globals
->root
.splt
->output_section
->vma
11044 + globals
->root
.splt
->output_offset
11045 + globals
->tls_trampoline
);
11047 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11049 unsigned long inst
;
11051 offset
-= (input_section
->output_section
->vma
11052 + input_section
->output_offset
11053 + rel
->r_offset
+ 8);
11055 inst
= offset
>> 2;
11056 inst
&= 0x00ffffff;
11057 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11061 /* Thumb blx encodes the offset in a complicated
11063 unsigned upper_insn
, lower_insn
;
11066 offset
-= (input_section
->output_section
->vma
11067 + input_section
->output_offset
11068 + rel
->r_offset
+ 4);
11070 if (stub_type
!= arm_stub_none
11071 && arm_stub_is_thumb (stub_type
))
11073 lower_insn
= 0xd000;
11077 lower_insn
= 0xc000;
11078 /* Round up the offset to a word boundary. */
11079 offset
= (offset
+ 2) & ~2;
11083 upper_insn
= (0xf000
11084 | ((offset
>> 12) & 0x3ff)
11086 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11087 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11088 | ((offset
>> 1) & 0x7ff);
11089 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11090 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11091 return bfd_reloc_ok
;
11094 /* These relocations needs special care, as besides the fact
11095 they point somewhere in .gotplt, the addend must be
11096 adjusted accordingly depending on the type of instruction
11098 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11100 unsigned long data
, insn
;
11103 data
= bfd_get_32 (input_bfd
, hit_data
);
11109 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
11110 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
11111 insn
= (insn
<< 16)
11112 | bfd_get_16 (input_bfd
,
11113 contents
+ rel
->r_offset
- data
+ 2);
11114 if ((insn
& 0xf800c000) == 0xf000c000)
11117 else if ((insn
& 0xffffff00) == 0x4400)
11122 (*_bfd_error_handler
)
11123 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11124 input_bfd
, input_section
,
11125 (unsigned long)rel
->r_offset
, insn
);
11126 return bfd_reloc_notsupported
;
11131 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
11133 switch (insn
>> 24)
11135 case 0xeb: /* bl */
11136 case 0xfa: /* blx */
11140 case 0xe0: /* add */
11145 (*_bfd_error_handler
)
11146 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11147 input_bfd
, input_section
,
11148 (unsigned long)rel
->r_offset
, insn
);
11149 return bfd_reloc_notsupported
;
11153 value
+= ((globals
->root
.sgotplt
->output_section
->vma
11154 + globals
->root
.sgotplt
->output_offset
+ off
)
11155 - (input_section
->output_section
->vma
11156 + input_section
->output_offset
11158 + globals
->sgotplt_jump_table_size
);
11161 value
= ((globals
->root
.sgot
->output_section
->vma
11162 + globals
->root
.sgot
->output_offset
+ off
)
11163 - (input_section
->output_section
->vma
11164 + input_section
->output_offset
+ rel
->r_offset
));
11166 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11167 contents
, rel
->r_offset
, value
,
11171 case R_ARM_TLS_LE32
:
11172 if (bfd_link_dll (info
))
11174 (*_bfd_error_handler
)
11175 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11176 input_bfd
, input_section
,
11177 (long) rel
->r_offset
, howto
->name
);
11178 return bfd_reloc_notsupported
;
11181 value
= tpoff (info
, value
);
11183 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11184 contents
, rel
->r_offset
, value
,
11188 if (globals
->fix_v4bx
)
11190 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11192 /* Ensure that we have a BX instruction. */
11193 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
11195 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
11197 /* Branch to veneer. */
11199 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
11200 glue_addr
-= input_section
->output_section
->vma
11201 + input_section
->output_offset
11202 + rel
->r_offset
+ 8;
11203 insn
= (insn
& 0xf0000000) | 0x0a000000
11204 | ((glue_addr
>> 2) & 0x00ffffff);
11208 /* Preserve Rm (lowest four bits) and the condition code
11209 (highest four bits). Other bits encode MOV PC,Rm. */
11210 insn
= (insn
& 0xf000000f) | 0x01a0f000;
11213 bfd_put_32 (input_bfd
, insn
, hit_data
);
11215 return bfd_reloc_ok
;
11217 case R_ARM_MOVW_ABS_NC
:
11218 case R_ARM_MOVT_ABS
:
11219 case R_ARM_MOVW_PREL_NC
:
11220 case R_ARM_MOVT_PREL
:
11221 /* Until we properly support segment-base-relative addressing then
11222 we assume the segment base to be zero, as for the group relocations.
11223 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11224 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11225 case R_ARM_MOVW_BREL_NC
:
11226 case R_ARM_MOVW_BREL
:
11227 case R_ARM_MOVT_BREL
:
11229 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11231 if (globals
->use_rel
)
11233 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
11234 signed_addend
= (addend
^ 0x8000) - 0x8000;
11237 value
+= signed_addend
;
11239 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
11240 value
-= (input_section
->output_section
->vma
11241 + input_section
->output_offset
+ rel
->r_offset
);
11243 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
11244 return bfd_reloc_overflow
;
11246 if (branch_type
== ST_BRANCH_TO_THUMB
)
11249 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
11250 || r_type
== R_ARM_MOVT_BREL
)
11253 insn
&= 0xfff0f000;
11254 insn
|= value
& 0xfff;
11255 insn
|= (value
& 0xf000) << 4;
11256 bfd_put_32 (input_bfd
, insn
, hit_data
);
11258 return bfd_reloc_ok
;
11260 case R_ARM_THM_MOVW_ABS_NC
:
11261 case R_ARM_THM_MOVT_ABS
:
11262 case R_ARM_THM_MOVW_PREL_NC
:
11263 case R_ARM_THM_MOVT_PREL
:
11264 /* Until we properly support segment-base-relative addressing then
11265 we assume the segment base to be zero, as for the above relocations.
11266 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11267 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11268 as R_ARM_THM_MOVT_ABS. */
11269 case R_ARM_THM_MOVW_BREL_NC
:
11270 case R_ARM_THM_MOVW_BREL
:
11271 case R_ARM_THM_MOVT_BREL
:
11275 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
11276 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
11278 if (globals
->use_rel
)
11280 addend
= ((insn
>> 4) & 0xf000)
11281 | ((insn
>> 15) & 0x0800)
11282 | ((insn
>> 4) & 0x0700)
11284 signed_addend
= (addend
^ 0x8000) - 0x8000;
11287 value
+= signed_addend
;
11289 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
11290 value
-= (input_section
->output_section
->vma
11291 + input_section
->output_offset
+ rel
->r_offset
);
11293 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
11294 return bfd_reloc_overflow
;
11296 if (branch_type
== ST_BRANCH_TO_THUMB
)
11299 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
11300 || r_type
== R_ARM_THM_MOVT_BREL
)
11303 insn
&= 0xfbf08f00;
11304 insn
|= (value
& 0xf000) << 4;
11305 insn
|= (value
& 0x0800) << 15;
11306 insn
|= (value
& 0x0700) << 4;
11307 insn
|= (value
& 0x00ff);
11309 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11310 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11312 return bfd_reloc_ok
;
11314 case R_ARM_ALU_PC_G0_NC
:
11315 case R_ARM_ALU_PC_G1_NC
:
11316 case R_ARM_ALU_PC_G0
:
11317 case R_ARM_ALU_PC_G1
:
11318 case R_ARM_ALU_PC_G2
:
11319 case R_ARM_ALU_SB_G0_NC
:
11320 case R_ARM_ALU_SB_G1_NC
:
11321 case R_ARM_ALU_SB_G0
:
11322 case R_ARM_ALU_SB_G1
:
11323 case R_ARM_ALU_SB_G2
:
11325 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11326 bfd_vma pc
= input_section
->output_section
->vma
11327 + input_section
->output_offset
+ rel
->r_offset
;
11328 /* sb is the origin of the *segment* containing the symbol. */
11329 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11332 bfd_signed_vma signed_value
;
11335 /* Determine which group of bits to select. */
11338 case R_ARM_ALU_PC_G0_NC
:
11339 case R_ARM_ALU_PC_G0
:
11340 case R_ARM_ALU_SB_G0_NC
:
11341 case R_ARM_ALU_SB_G0
:
11345 case R_ARM_ALU_PC_G1_NC
:
11346 case R_ARM_ALU_PC_G1
:
11347 case R_ARM_ALU_SB_G1_NC
:
11348 case R_ARM_ALU_SB_G1
:
11352 case R_ARM_ALU_PC_G2
:
11353 case R_ARM_ALU_SB_G2
:
11361 /* If REL, extract the addend from the insn. If RELA, it will
11362 have already been fetched for us. */
11363 if (globals
->use_rel
)
11366 bfd_vma constant
= insn
& 0xff;
11367 bfd_vma rotation
= (insn
& 0xf00) >> 8;
11370 signed_addend
= constant
;
11373 /* Compensate for the fact that in the instruction, the
11374 rotation is stored in multiples of 2 bits. */
11377 /* Rotate "constant" right by "rotation" bits. */
11378 signed_addend
= (constant
>> rotation
) |
11379 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
11382 /* Determine if the instruction is an ADD or a SUB.
11383 (For REL, this determines the sign of the addend.) */
11384 negative
= identify_add_or_sub (insn
);
11387 (*_bfd_error_handler
)
11388 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11389 input_bfd
, input_section
,
11390 (long) rel
->r_offset
, howto
->name
);
11391 return bfd_reloc_overflow
;
11394 signed_addend
*= negative
;
11397 /* Compute the value (X) to go in the place. */
11398 if (r_type
== R_ARM_ALU_PC_G0_NC
11399 || r_type
== R_ARM_ALU_PC_G1_NC
11400 || r_type
== R_ARM_ALU_PC_G0
11401 || r_type
== R_ARM_ALU_PC_G1
11402 || r_type
== R_ARM_ALU_PC_G2
)
11404 signed_value
= value
- pc
+ signed_addend
;
11406 /* Section base relative. */
11407 signed_value
= value
- sb
+ signed_addend
;
11409 /* If the target symbol is a Thumb function, then set the
11410 Thumb bit in the address. */
11411 if (branch_type
== ST_BRANCH_TO_THUMB
)
11414 /* Calculate the value of the relevant G_n, in encoded
11415 constant-with-rotation format. */
11416 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11419 /* Check for overflow if required. */
11420 if ((r_type
== R_ARM_ALU_PC_G0
11421 || r_type
== R_ARM_ALU_PC_G1
11422 || r_type
== R_ARM_ALU_PC_G2
11423 || r_type
== R_ARM_ALU_SB_G0
11424 || r_type
== R_ARM_ALU_SB_G1
11425 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
11427 (*_bfd_error_handler
)
11428 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11429 input_bfd
, input_section
,
11430 (long) rel
->r_offset
, signed_value
< 0 ? - signed_value
: signed_value
,
11432 return bfd_reloc_overflow
;
11435 /* Mask out the value and the ADD/SUB part of the opcode; take care
11436 not to destroy the S bit. */
11437 insn
&= 0xff1ff000;
11439 /* Set the opcode according to whether the value to go in the
11440 place is negative. */
11441 if (signed_value
< 0)
11446 /* Encode the offset. */
11449 bfd_put_32 (input_bfd
, insn
, hit_data
);
11451 return bfd_reloc_ok
;
11453 case R_ARM_LDR_PC_G0
:
11454 case R_ARM_LDR_PC_G1
:
11455 case R_ARM_LDR_PC_G2
:
11456 case R_ARM_LDR_SB_G0
:
11457 case R_ARM_LDR_SB_G1
:
11458 case R_ARM_LDR_SB_G2
:
11460 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11461 bfd_vma pc
= input_section
->output_section
->vma
11462 + input_section
->output_offset
+ rel
->r_offset
;
11463 /* sb is the origin of the *segment* containing the symbol. */
11464 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11466 bfd_signed_vma signed_value
;
11469 /* Determine which groups of bits to calculate. */
11472 case R_ARM_LDR_PC_G0
:
11473 case R_ARM_LDR_SB_G0
:
11477 case R_ARM_LDR_PC_G1
:
11478 case R_ARM_LDR_SB_G1
:
11482 case R_ARM_LDR_PC_G2
:
11483 case R_ARM_LDR_SB_G2
:
11491 /* If REL, extract the addend from the insn. If RELA, it will
11492 have already been fetched for us. */
11493 if (globals
->use_rel
)
11495 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11496 signed_addend
= negative
* (insn
& 0xfff);
11499 /* Compute the value (X) to go in the place. */
11500 if (r_type
== R_ARM_LDR_PC_G0
11501 || r_type
== R_ARM_LDR_PC_G1
11502 || r_type
== R_ARM_LDR_PC_G2
)
11504 signed_value
= value
- pc
+ signed_addend
;
11506 /* Section base relative. */
11507 signed_value
= value
- sb
+ signed_addend
;
11509 /* Calculate the value of the relevant G_{n-1} to obtain
11510 the residual at that stage. */
11511 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11512 group
- 1, &residual
);
11514 /* Check for overflow. */
11515 if (residual
>= 0x1000)
11517 (*_bfd_error_handler
)
11518 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11519 input_bfd
, input_section
,
11520 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
11521 return bfd_reloc_overflow
;
11524 /* Mask out the value and U bit. */
11525 insn
&= 0xff7ff000;
11527 /* Set the U bit if the value to go in the place is non-negative. */
11528 if (signed_value
>= 0)
11531 /* Encode the offset. */
11534 bfd_put_32 (input_bfd
, insn
, hit_data
);
11536 return bfd_reloc_ok
;
11538 case R_ARM_LDRS_PC_G0
:
11539 case R_ARM_LDRS_PC_G1
:
11540 case R_ARM_LDRS_PC_G2
:
11541 case R_ARM_LDRS_SB_G0
:
11542 case R_ARM_LDRS_SB_G1
:
11543 case R_ARM_LDRS_SB_G2
:
11545 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11546 bfd_vma pc
= input_section
->output_section
->vma
11547 + input_section
->output_offset
+ rel
->r_offset
;
11548 /* sb is the origin of the *segment* containing the symbol. */
11549 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11551 bfd_signed_vma signed_value
;
11554 /* Determine which groups of bits to calculate. */
11557 case R_ARM_LDRS_PC_G0
:
11558 case R_ARM_LDRS_SB_G0
:
11562 case R_ARM_LDRS_PC_G1
:
11563 case R_ARM_LDRS_SB_G1
:
11567 case R_ARM_LDRS_PC_G2
:
11568 case R_ARM_LDRS_SB_G2
:
11576 /* If REL, extract the addend from the insn. If RELA, it will
11577 have already been fetched for us. */
11578 if (globals
->use_rel
)
11580 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11581 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
11584 /* Compute the value (X) to go in the place. */
11585 if (r_type
== R_ARM_LDRS_PC_G0
11586 || r_type
== R_ARM_LDRS_PC_G1
11587 || r_type
== R_ARM_LDRS_PC_G2
)
11589 signed_value
= value
- pc
+ signed_addend
;
11591 /* Section base relative. */
11592 signed_value
= value
- sb
+ signed_addend
;
11594 /* Calculate the value of the relevant G_{n-1} to obtain
11595 the residual at that stage. */
11596 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11597 group
- 1, &residual
);
11599 /* Check for overflow. */
11600 if (residual
>= 0x100)
11602 (*_bfd_error_handler
)
11603 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11604 input_bfd
, input_section
,
11605 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
11606 return bfd_reloc_overflow
;
11609 /* Mask out the value and U bit. */
11610 insn
&= 0xff7ff0f0;
11612 /* Set the U bit if the value to go in the place is non-negative. */
11613 if (signed_value
>= 0)
11616 /* Encode the offset. */
11617 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
11619 bfd_put_32 (input_bfd
, insn
, hit_data
);
11621 return bfd_reloc_ok
;
11623 case R_ARM_LDC_PC_G0
:
11624 case R_ARM_LDC_PC_G1
:
11625 case R_ARM_LDC_PC_G2
:
11626 case R_ARM_LDC_SB_G0
:
11627 case R_ARM_LDC_SB_G1
:
11628 case R_ARM_LDC_SB_G2
:
11630 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11631 bfd_vma pc
= input_section
->output_section
->vma
11632 + input_section
->output_offset
+ rel
->r_offset
;
11633 /* sb is the origin of the *segment* containing the symbol. */
11634 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11636 bfd_signed_vma signed_value
;
11639 /* Determine which groups of bits to calculate. */
11642 case R_ARM_LDC_PC_G0
:
11643 case R_ARM_LDC_SB_G0
:
11647 case R_ARM_LDC_PC_G1
:
11648 case R_ARM_LDC_SB_G1
:
11652 case R_ARM_LDC_PC_G2
:
11653 case R_ARM_LDC_SB_G2
:
11661 /* If REL, extract the addend from the insn. If RELA, it will
11662 have already been fetched for us. */
11663 if (globals
->use_rel
)
11665 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11666 signed_addend
= negative
* ((insn
& 0xff) << 2);
11669 /* Compute the value (X) to go in the place. */
11670 if (r_type
== R_ARM_LDC_PC_G0
11671 || r_type
== R_ARM_LDC_PC_G1
11672 || r_type
== R_ARM_LDC_PC_G2
)
11674 signed_value
= value
- pc
+ signed_addend
;
11676 /* Section base relative. */
11677 signed_value
= value
- sb
+ signed_addend
;
11679 /* Calculate the value of the relevant G_{n-1} to obtain
11680 the residual at that stage. */
11681 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11682 group
- 1, &residual
);
11684 /* Check for overflow. (The absolute value to go in the place must be
11685 divisible by four and, after having been divided by four, must
11686 fit in eight bits.) */
11687 if ((residual
& 0x3) != 0 || residual
>= 0x400)
11689 (*_bfd_error_handler
)
11690 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11691 input_bfd
, input_section
,
11692 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
11693 return bfd_reloc_overflow
;
11696 /* Mask out the value and U bit. */
11697 insn
&= 0xff7fff00;
11699 /* Set the U bit if the value to go in the place is non-negative. */
11700 if (signed_value
>= 0)
11703 /* Encode the offset. */
11704 insn
|= residual
>> 2;
11706 bfd_put_32 (input_bfd
, insn
, hit_data
);
11708 return bfd_reloc_ok
;
11710 case R_ARM_THM_ALU_ABS_G0_NC
:
11711 case R_ARM_THM_ALU_ABS_G1_NC
:
11712 case R_ARM_THM_ALU_ABS_G2_NC
:
11713 case R_ARM_THM_ALU_ABS_G3_NC
:
11715 const int shift_array
[4] = {0, 8, 16, 24};
11716 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
11717 bfd_vma addr
= value
;
11718 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
11720 /* Compute address. */
11721 if (globals
->use_rel
)
11722 signed_addend
= insn
& 0xff;
11723 addr
+= signed_addend
;
11724 if (branch_type
== ST_BRANCH_TO_THUMB
)
11726 /* Clean imm8 insn. */
11728 /* And update with correct part of address. */
11729 insn
|= (addr
>> shift
) & 0xff;
11731 bfd_put_16 (input_bfd
, insn
, hit_data
);
11734 *unresolved_reloc_p
= FALSE
;
11735 return bfd_reloc_ok
;
11738 return bfd_reloc_notsupported
;
11742 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11744 arm_add_to_rel (bfd
* abfd
,
11745 bfd_byte
* address
,
11746 reloc_howto_type
* howto
,
11747 bfd_signed_vma increment
)
11749 bfd_signed_vma addend
;
11751 if (howto
->type
== R_ARM_THM_CALL
11752 || howto
->type
== R_ARM_THM_JUMP24
)
11754 int upper_insn
, lower_insn
;
11757 upper_insn
= bfd_get_16 (abfd
, address
);
11758 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
11759 upper
= upper_insn
& 0x7ff;
11760 lower
= lower_insn
& 0x7ff;
11762 addend
= (upper
<< 12) | (lower
<< 1);
11763 addend
+= increment
;
11766 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
11767 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
11769 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
11770 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
11776 contents
= bfd_get_32 (abfd
, address
);
11778 /* Get the (signed) value from the instruction. */
11779 addend
= contents
& howto
->src_mask
;
11780 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11782 bfd_signed_vma mask
;
11785 mask
&= ~ howto
->src_mask
;
11789 /* Add in the increment, (which is a byte value). */
11790 switch (howto
->type
)
11793 addend
+= increment
;
11800 addend
<<= howto
->size
;
11801 addend
+= increment
;
11803 /* Should we check for overflow here ? */
11805 /* Drop any undesired bits. */
11806 addend
>>= howto
->rightshift
;
11810 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
11812 bfd_put_32 (abfd
, contents
, address
);
11816 #define IS_ARM_TLS_RELOC(R_TYPE) \
11817 ((R_TYPE) == R_ARM_TLS_GD32 \
11818 || (R_TYPE) == R_ARM_TLS_LDO32 \
11819 || (R_TYPE) == R_ARM_TLS_LDM32 \
11820 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11821 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11822 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11823 || (R_TYPE) == R_ARM_TLS_LE32 \
11824 || (R_TYPE) == R_ARM_TLS_IE32 \
11825 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11827 /* Specific set of relocations for the gnu tls dialect. */
11828 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11829 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11830 || (R_TYPE) == R_ARM_TLS_CALL \
11831 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11832 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11833 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11835 /* Relocate an ARM ELF section. */
11838 elf32_arm_relocate_section (bfd
* output_bfd
,
11839 struct bfd_link_info
* info
,
11841 asection
* input_section
,
11842 bfd_byte
* contents
,
11843 Elf_Internal_Rela
* relocs
,
11844 Elf_Internal_Sym
* local_syms
,
11845 asection
** local_sections
)
11847 Elf_Internal_Shdr
*symtab_hdr
;
11848 struct elf_link_hash_entry
**sym_hashes
;
11849 Elf_Internal_Rela
*rel
;
11850 Elf_Internal_Rela
*relend
;
11852 struct elf32_arm_link_hash_table
* globals
;
11854 globals
= elf32_arm_hash_table (info
);
11855 if (globals
== NULL
)
11858 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
11859 sym_hashes
= elf_sym_hashes (input_bfd
);
11862 relend
= relocs
+ input_section
->reloc_count
;
11863 for (; rel
< relend
; rel
++)
11866 reloc_howto_type
* howto
;
11867 unsigned long r_symndx
;
11868 Elf_Internal_Sym
* sym
;
11870 struct elf_link_hash_entry
* h
;
11871 bfd_vma relocation
;
11872 bfd_reloc_status_type r
;
11875 bfd_boolean unresolved_reloc
= FALSE
;
11876 char *error_message
= NULL
;
11878 r_symndx
= ELF32_R_SYM (rel
->r_info
);
11879 r_type
= ELF32_R_TYPE (rel
->r_info
);
11880 r_type
= arm_real_reloc_type (globals
, r_type
);
11882 if ( r_type
== R_ARM_GNU_VTENTRY
11883 || r_type
== R_ARM_GNU_VTINHERIT
)
11886 bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
11887 howto
= bfd_reloc
.howto
;
11893 if (r_symndx
< symtab_hdr
->sh_info
)
11895 sym
= local_syms
+ r_symndx
;
11896 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
11897 sec
= local_sections
[r_symndx
];
11899 /* An object file might have a reference to a local
11900 undefined symbol. This is a daft object file, but we
11901 should at least do something about it. V4BX & NONE
11902 relocations do not use the symbol and are explicitly
11903 allowed to use the undefined symbol, so allow those.
11904 Likewise for relocations against STN_UNDEF. */
11905 if (r_type
!= R_ARM_V4BX
11906 && r_type
!= R_ARM_NONE
11907 && r_symndx
!= STN_UNDEF
11908 && bfd_is_und_section (sec
)
11909 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
11910 (*info
->callbacks
->undefined_symbol
)
11911 (info
, bfd_elf_string_from_elf_section
11912 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
11913 input_bfd
, input_section
,
11914 rel
->r_offset
, TRUE
);
11916 if (globals
->use_rel
)
11918 relocation
= (sec
->output_section
->vma
11919 + sec
->output_offset
11921 if (!bfd_link_relocatable (info
)
11922 && (sec
->flags
& SEC_MERGE
)
11923 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
11926 bfd_vma addend
, value
;
11930 case R_ARM_MOVW_ABS_NC
:
11931 case R_ARM_MOVT_ABS
:
11932 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
11933 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
11934 addend
= (addend
^ 0x8000) - 0x8000;
11937 case R_ARM_THM_MOVW_ABS_NC
:
11938 case R_ARM_THM_MOVT_ABS
:
11939 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
11941 value
|= bfd_get_16 (input_bfd
,
11942 contents
+ rel
->r_offset
+ 2);
11943 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
11944 | ((value
& 0x04000000) >> 15);
11945 addend
= (addend
^ 0x8000) - 0x8000;
11949 if (howto
->rightshift
11950 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
11952 (*_bfd_error_handler
)
11953 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11954 input_bfd
, input_section
,
11955 (long) rel
->r_offset
, howto
->name
);
11959 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
11961 /* Get the (signed) value from the instruction. */
11962 addend
= value
& howto
->src_mask
;
11963 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11965 bfd_signed_vma mask
;
11968 mask
&= ~ howto
->src_mask
;
11976 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
11978 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
11980 /* Cases here must match those in the preceding
11981 switch statement. */
11984 case R_ARM_MOVW_ABS_NC
:
11985 case R_ARM_MOVT_ABS
:
11986 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
11987 | (addend
& 0xfff);
11988 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
11991 case R_ARM_THM_MOVW_ABS_NC
:
11992 case R_ARM_THM_MOVT_ABS
:
11993 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
11994 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
11995 bfd_put_16 (input_bfd
, value
>> 16,
11996 contents
+ rel
->r_offset
);
11997 bfd_put_16 (input_bfd
, value
,
11998 contents
+ rel
->r_offset
+ 2);
12002 value
= (value
& ~ howto
->dst_mask
)
12003 | (addend
& howto
->dst_mask
);
12004 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12010 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
12014 bfd_boolean warned
, ignored
;
12016 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
12017 r_symndx
, symtab_hdr
, sym_hashes
,
12018 h
, sec
, relocation
,
12019 unresolved_reloc
, warned
, ignored
);
12021 sym_type
= h
->type
;
12024 if (sec
!= NULL
&& discarded_section (sec
))
12025 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
12026 rel
, 1, relend
, howto
, 0, contents
);
12028 if (bfd_link_relocatable (info
))
12030 /* This is a relocatable link. We don't have to change
12031 anything, unless the reloc is against a section symbol,
12032 in which case we have to adjust according to where the
12033 section symbol winds up in the output section. */
12034 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12036 if (globals
->use_rel
)
12037 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
12038 howto
, (bfd_signed_vma
) sec
->output_offset
);
12040 rel
->r_addend
+= sec
->output_offset
;
12046 name
= h
->root
.root
.string
;
12049 name
= (bfd_elf_string_from_elf_section
12050 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
12051 if (name
== NULL
|| *name
== '\0')
12052 name
= bfd_section_name (input_bfd
, sec
);
12055 if (r_symndx
!= STN_UNDEF
12056 && r_type
!= R_ARM_NONE
12058 || h
->root
.type
== bfd_link_hash_defined
12059 || h
->root
.type
== bfd_link_hash_defweak
)
12060 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
12062 (*_bfd_error_handler
)
12063 ((sym_type
== STT_TLS
12064 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12065 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12068 (long) rel
->r_offset
,
12073 /* We call elf32_arm_final_link_relocate unless we're completely
12074 done, i.e., the relaxation produced the final output we want,
12075 and we won't let anybody mess with it. Also, we have to do
12076 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12077 both in relaxed and non-relaxed cases. */
12078 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
12079 || (IS_ARM_TLS_GNU_RELOC (r_type
)
12080 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
12081 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
12084 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
12085 contents
, rel
, h
== NULL
);
12086 /* This may have been marked unresolved because it came from
12087 a shared library. But we've just dealt with that. */
12088 unresolved_reloc
= 0;
12091 r
= bfd_reloc_continue
;
12093 if (r
== bfd_reloc_continue
)
12095 unsigned char branch_type
=
12096 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
12097 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
12099 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
12100 input_section
, contents
, rel
,
12101 relocation
, info
, sec
, name
,
12102 sym_type
, branch_type
, h
,
12107 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12108 because such sections are not SEC_ALLOC and thus ld.so will
12109 not process them. */
12110 if (unresolved_reloc
12111 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
12113 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
12114 rel
->r_offset
) != (bfd_vma
) -1)
12116 (*_bfd_error_handler
)
12117 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12120 (long) rel
->r_offset
,
12122 h
->root
.root
.string
);
12126 if (r
!= bfd_reloc_ok
)
12130 case bfd_reloc_overflow
:
12131 /* If the overflowing reloc was to an undefined symbol,
12132 we have already printed one error message and there
12133 is no point complaining again. */
12134 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
12135 (*info
->callbacks
->reloc_overflow
)
12136 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
12137 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
12140 case bfd_reloc_undefined
:
12141 (*info
->callbacks
->undefined_symbol
)
12142 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
12145 case bfd_reloc_outofrange
:
12146 error_message
= _("out of range");
12149 case bfd_reloc_notsupported
:
12150 error_message
= _("unsupported relocation");
12153 case bfd_reloc_dangerous
:
12154 /* error_message should already be set. */
12158 error_message
= _("unknown error");
12159 /* Fall through. */
12162 BFD_ASSERT (error_message
!= NULL
);
12163 (*info
->callbacks
->reloc_dangerous
)
12164 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
12173 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12174 adds the edit to the start of the list. (The list must be built in order of
12175 ascending TINDEX: the function's callers are primarily responsible for
12176 maintaining that condition). */
12179 add_unwind_table_edit (arm_unwind_table_edit
**head
,
12180 arm_unwind_table_edit
**tail
,
12181 arm_unwind_edit_type type
,
12182 asection
*linked_section
,
12183 unsigned int tindex
)
12185 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
12186 xmalloc (sizeof (arm_unwind_table_edit
));
12188 new_edit
->type
= type
;
12189 new_edit
->linked_section
= linked_section
;
12190 new_edit
->index
= tindex
;
12194 new_edit
->next
= NULL
;
12197 (*tail
)->next
= new_edit
;
12199 (*tail
) = new_edit
;
12202 (*head
) = new_edit
;
12206 new_edit
->next
= *head
;
12215 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
12217 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12219 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
12223 if (!exidx_sec
->rawsize
)
12224 exidx_sec
->rawsize
= exidx_sec
->size
;
12226 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
12227 out_sec
= exidx_sec
->output_section
;
12228 /* Adjust size of output section. */
12229 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
12232 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12234 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
12236 struct _arm_elf_section_data
*exidx_arm_data
;
12238 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12239 add_unwind_table_edit (
12240 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
12241 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
12242 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
12244 exidx_arm_data
->additional_reloc_count
++;
12246 adjust_exidx_size(exidx_sec
, 8);
12249 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12250 made to those tables, such that:
12252 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12253 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12254 codes which have been inlined into the index).
12256 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12258 The edits are applied when the tables are written
12259 (in elf32_arm_write_section). */
12262 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
12263 unsigned int num_text_sections
,
12264 struct bfd_link_info
*info
,
12265 bfd_boolean merge_exidx_entries
)
12268 unsigned int last_second_word
= 0, i
;
12269 asection
*last_exidx_sec
= NULL
;
12270 asection
*last_text_sec
= NULL
;
12271 int last_unwind_type
= -1;
12273 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12275 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
12279 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
12281 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
12282 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
12284 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
12287 if (elf_sec
->linked_to
)
12289 Elf_Internal_Shdr
*linked_hdr
12290 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
12291 struct _arm_elf_section_data
*linked_sec_arm_data
12292 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
12294 if (linked_sec_arm_data
== NULL
)
12297 /* Link this .ARM.exidx section back from the text section it
12299 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
12304 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12305 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12306 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12308 for (i
= 0; i
< num_text_sections
; i
++)
12310 asection
*sec
= text_section_order
[i
];
12311 asection
*exidx_sec
;
12312 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
12313 struct _arm_elf_section_data
*exidx_arm_data
;
12314 bfd_byte
*contents
= NULL
;
12315 int deleted_exidx_bytes
= 0;
12317 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
12318 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
12319 Elf_Internal_Shdr
*hdr
;
12322 if (arm_data
== NULL
)
12325 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
12326 if (exidx_sec
== NULL
)
12328 /* Section has no unwind data. */
12329 if (last_unwind_type
== 0 || !last_exidx_sec
)
12332 /* Ignore zero sized sections. */
12333 if (sec
->size
== 0)
12336 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12337 last_unwind_type
= 0;
12341 /* Skip /DISCARD/ sections. */
12342 if (bfd_is_abs_section (exidx_sec
->output_section
))
12345 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
12346 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
12349 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12350 if (exidx_arm_data
== NULL
)
12353 ibfd
= exidx_sec
->owner
;
12355 if (hdr
->contents
!= NULL
)
12356 contents
= hdr
->contents
;
12357 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
12361 if (last_unwind_type
> 0)
12363 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
12364 /* Add cantunwind if first unwind item does not match section
12366 if (first_word
!= sec
->vma
)
12368 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
12369 last_unwind_type
= 0;
12373 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
12375 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
12379 /* An EXIDX_CANTUNWIND entry. */
12380 if (second_word
== 1)
12382 if (last_unwind_type
== 0)
12386 /* Inlined unwinding data. Merge if equal to previous. */
12387 else if ((second_word
& 0x80000000) != 0)
12389 if (merge_exidx_entries
12390 && last_second_word
== second_word
&& last_unwind_type
== 1)
12393 last_second_word
= second_word
;
12395 /* Normal table entry. In theory we could merge these too,
12396 but duplicate entries are likely to be much less common. */
12400 if (elide
&& !bfd_link_relocatable (info
))
12402 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
12403 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
12405 deleted_exidx_bytes
+= 8;
12408 last_unwind_type
= unwind_type
;
12411 /* Free contents if we allocated it ourselves. */
12412 if (contents
!= hdr
->contents
)
12415 /* Record edits to be applied later (in elf32_arm_write_section). */
12416 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
12417 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
12419 if (deleted_exidx_bytes
> 0)
12420 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
12422 last_exidx_sec
= exidx_sec
;
12423 last_text_sec
= sec
;
12426 /* Add terminating CANTUNWIND entry. */
12427 if (!bfd_link_relocatable (info
) && last_exidx_sec
12428 && last_unwind_type
!= 0)
12429 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12435 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
12436 bfd
*ibfd
, const char *name
)
12438 asection
*sec
, *osec
;
12440 sec
= bfd_get_linker_section (ibfd
, name
);
12441 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
12444 osec
= sec
->output_section
;
12445 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
12448 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
12449 sec
->output_offset
, sec
->size
))
12456 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
12458 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
12459 asection
*sec
, *osec
;
12461 if (globals
== NULL
)
12464 /* Invoke the regular ELF backend linker to do all the work. */
12465 if (!bfd_elf_final_link (abfd
, info
))
12468 /* Process stub sections (eg BE8 encoding, ...). */
12469 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
12471 for (i
=0; i
<htab
->top_id
; i
++)
12473 sec
= htab
->stub_group
[i
].stub_sec
;
12474 /* Only process it once, in its link_sec slot. */
12475 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
12477 osec
= sec
->output_section
;
12478 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
12479 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
12480 sec
->output_offset
, sec
->size
))
12485 /* Write out any glue sections now that we have created all the
12487 if (globals
->bfd_of_glue_owner
!= NULL
)
12489 if (! elf32_arm_output_glue_section (info
, abfd
,
12490 globals
->bfd_of_glue_owner
,
12491 ARM2THUMB_GLUE_SECTION_NAME
))
12494 if (! elf32_arm_output_glue_section (info
, abfd
,
12495 globals
->bfd_of_glue_owner
,
12496 THUMB2ARM_GLUE_SECTION_NAME
))
12499 if (! elf32_arm_output_glue_section (info
, abfd
,
12500 globals
->bfd_of_glue_owner
,
12501 VFP11_ERRATUM_VENEER_SECTION_NAME
))
12504 if (! elf32_arm_output_glue_section (info
, abfd
,
12505 globals
->bfd_of_glue_owner
,
12506 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
12509 if (! elf32_arm_output_glue_section (info
, abfd
,
12510 globals
->bfd_of_glue_owner
,
12511 ARM_BX_GLUE_SECTION_NAME
))
12518 /* Return a best guess for the machine number based on the attributes. */
12520 static unsigned int
12521 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
12523 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
12527 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
12528 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
12529 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
12531 case TAG_CPU_ARCH_V5TE
:
12535 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
12536 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
12540 if (strcmp (name
, "IWMMXT2") == 0)
12541 return bfd_mach_arm_iWMMXt2
;
12543 if (strcmp (name
, "IWMMXT") == 0)
12544 return bfd_mach_arm_iWMMXt
;
12546 if (strcmp (name
, "XSCALE") == 0)
12550 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
12551 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
12554 case 1: return bfd_mach_arm_iWMMXt
;
12555 case 2: return bfd_mach_arm_iWMMXt2
;
12556 default: return bfd_mach_arm_XScale
;
12561 return bfd_mach_arm_5TE
;
12565 return bfd_mach_arm_unknown
;
12569 /* Set the right machine number. */
12572 elf32_arm_object_p (bfd
*abfd
)
12576 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
12578 if (mach
== bfd_mach_arm_unknown
)
12580 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
12581 mach
= bfd_mach_arm_ep9312
;
12583 mach
= bfd_arm_get_mach_from_attributes (abfd
);
12586 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
12590 /* Function to keep ARM specific flags in the ELF header. */
12593 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
12595 if (elf_flags_init (abfd
)
12596 && elf_elfheader (abfd
)->e_flags
!= flags
)
12598 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
12600 if (flags
& EF_ARM_INTERWORK
)
12601 (*_bfd_error_handler
)
12602 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
12606 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12612 elf_elfheader (abfd
)->e_flags
= flags
;
12613 elf_flags_init (abfd
) = TRUE
;
12619 /* Copy backend specific data from one object module to another. */
12622 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
12625 flagword out_flags
;
12627 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
12630 in_flags
= elf_elfheader (ibfd
)->e_flags
;
12631 out_flags
= elf_elfheader (obfd
)->e_flags
;
12633 if (elf_flags_init (obfd
)
12634 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
12635 && in_flags
!= out_flags
)
12637 /* Cannot mix APCS26 and APCS32 code. */
12638 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
12641 /* Cannot mix float APCS and non-float APCS code. */
12642 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
12645 /* If the src and dest have different interworking flags
12646 then turn off the interworking bit. */
12647 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
12649 if (out_flags
& EF_ARM_INTERWORK
)
12651 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12654 in_flags
&= ~EF_ARM_INTERWORK
;
12657 /* Likewise for PIC, though don't warn for this case. */
12658 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
12659 in_flags
&= ~EF_ARM_PIC
;
12662 elf_elfheader (obfd
)->e_flags
= in_flags
;
12663 elf_flags_init (obfd
) = TRUE
;
12665 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
12668 /* Values for Tag_ABI_PCS_R9_use. */
12677 /* Values for Tag_ABI_PCS_RW_data. */
12680 AEABI_PCS_RW_data_absolute
,
12681 AEABI_PCS_RW_data_PCrel
,
12682 AEABI_PCS_RW_data_SBrel
,
12683 AEABI_PCS_RW_data_unused
12686 /* Values for Tag_ABI_enum_size. */
12692 AEABI_enum_forced_wide
12695 /* Determine whether an object attribute tag takes an integer, a
12699 elf32_arm_obj_attrs_arg_type (int tag
)
12701 if (tag
== Tag_compatibility
)
12702 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
12703 else if (tag
== Tag_nodefaults
)
12704 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
12705 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
12706 return ATTR_TYPE_FLAG_STR_VAL
;
12708 return ATTR_TYPE_FLAG_INT_VAL
;
12710 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
12713 /* The ABI defines that Tag_conformance should be emitted first, and that
12714 Tag_nodefaults should be second (if either is defined). This sets those
12715 two positions, and bumps up the position of all the remaining tags to
12718 elf32_arm_obj_attrs_order (int num
)
12720 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
12721 return Tag_conformance
;
12722 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
12723 return Tag_nodefaults
;
12724 if ((num
- 2) < Tag_nodefaults
)
12726 if ((num
- 1) < Tag_conformance
)
12731 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12733 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
12735 if ((tag
& 127) < 64)
12738 (_("%B: Unknown mandatory EABI object attribute %d"),
12740 bfd_set_error (bfd_error_bad_value
);
12746 (_("Warning: %B: Unknown EABI object attribute %d"),
12752 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12753 Returns -1 if no architecture could be read. */
12756 get_secondary_compatible_arch (bfd
*abfd
)
12758 obj_attribute
*attr
=
12759 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
12761 /* Note: the tag and its argument below are uleb128 values, though
12762 currently-defined values fit in one byte for each. */
12764 && attr
->s
[0] == Tag_CPU_arch
12765 && (attr
->s
[1] & 128) != 128
12766 && attr
->s
[2] == 0)
12769 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12773 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12774 The tag is removed if ARCH is -1. */
12777 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
12779 obj_attribute
*attr
=
12780 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
12788 /* Note: the tag and its argument below are uleb128 values, though
12789 currently-defined values fit in one byte for each. */
12791 attr
->s
= (char *) bfd_alloc (abfd
, 3);
12792 attr
->s
[0] = Tag_CPU_arch
;
12797 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12801 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
12802 int newtag
, int secondary_compat
)
12804 #define T(X) TAG_CPU_ARCH_##X
12805 int tagl
, tagh
, result
;
12808 T(V6T2
), /* PRE_V4. */
12810 T(V6T2
), /* V4T. */
12811 T(V6T2
), /* V5T. */
12812 T(V6T2
), /* V5TE. */
12813 T(V6T2
), /* V5TEJ. */
12816 T(V6T2
) /* V6T2. */
12820 T(V6K
), /* PRE_V4. */
12824 T(V6K
), /* V5TE. */
12825 T(V6K
), /* V5TEJ. */
12827 T(V6KZ
), /* V6KZ. */
12833 T(V7
), /* PRE_V4. */
12838 T(V7
), /* V5TEJ. */
12851 T(V6K
), /* V5TE. */
12852 T(V6K
), /* V5TEJ. */
12854 T(V6KZ
), /* V6KZ. */
12858 T(V6_M
) /* V6_M. */
12860 const int v6s_m
[] =
12866 T(V6K
), /* V5TE. */
12867 T(V6K
), /* V5TEJ. */
12869 T(V6KZ
), /* V6KZ. */
12873 T(V6S_M
), /* V6_M. */
12874 T(V6S_M
) /* V6S_M. */
12876 const int v7e_m
[] =
12880 T(V7E_M
), /* V4T. */
12881 T(V7E_M
), /* V5T. */
12882 T(V7E_M
), /* V5TE. */
12883 T(V7E_M
), /* V5TEJ. */
12884 T(V7E_M
), /* V6. */
12885 T(V7E_M
), /* V6KZ. */
12886 T(V7E_M
), /* V6T2. */
12887 T(V7E_M
), /* V6K. */
12888 T(V7E_M
), /* V7. */
12889 T(V7E_M
), /* V6_M. */
12890 T(V7E_M
), /* V6S_M. */
12891 T(V7E_M
) /* V7E_M. */
12895 T(V8
), /* PRE_V4. */
12900 T(V8
), /* V5TEJ. */
12907 T(V8
), /* V6S_M. */
12908 T(V8
), /* V7E_M. */
12911 const int v8m_baseline
[] =
12924 T(V8M_BASE
), /* V6_M. */
12925 T(V8M_BASE
), /* V6S_M. */
12929 T(V8M_BASE
) /* V8-M BASELINE. */
12931 const int v8m_mainline
[] =
12943 T(V8M_MAIN
), /* V7. */
12944 T(V8M_MAIN
), /* V6_M. */
12945 T(V8M_MAIN
), /* V6S_M. */
12946 T(V8M_MAIN
), /* V7E_M. */
12949 T(V8M_MAIN
), /* V8-M BASELINE. */
12950 T(V8M_MAIN
) /* V8-M MAINLINE. */
12952 const int v4t_plus_v6_m
[] =
12958 T(V5TE
), /* V5TE. */
12959 T(V5TEJ
), /* V5TEJ. */
12961 T(V6KZ
), /* V6KZ. */
12962 T(V6T2
), /* V6T2. */
12965 T(V6_M
), /* V6_M. */
12966 T(V6S_M
), /* V6S_M. */
12967 T(V7E_M
), /* V7E_M. */
12970 T(V8M_BASE
), /* V8-M BASELINE. */
12971 T(V8M_MAIN
), /* V8-M MAINLINE. */
12972 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
12974 const int *comb
[] =
12986 /* Pseudo-architecture. */
12990 /* Check we've not got a higher architecture than we know about. */
12992 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
12994 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd
);
12998 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13000 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
13001 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
13002 oldtag
= T(V4T_PLUS_V6_M
);
13004 /* And override the new tag if we have a Tag_also_compatible_with on the
13007 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
13008 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
13009 newtag
= T(V4T_PLUS_V6_M
);
13011 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
13012 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
13014 /* Architectures before V6KZ add features monotonically. */
13015 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
13018 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
13020 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13021 as the canonical version. */
13022 if (result
== T(V4T_PLUS_V6_M
))
13025 *secondary_compat_out
= T(V6_M
);
13028 *secondary_compat_out
= -1;
13032 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13033 ibfd
, oldtag
, newtag
);
13041 /* Query attributes object to see if integer divide instructions may be
13042 present in an object. */
13044 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
13046 int arch
= attr
[Tag_CPU_arch
].i
;
13047 int profile
= attr
[Tag_CPU_arch_profile
].i
;
13049 switch (attr
[Tag_DIV_use
].i
)
13052 /* Integer divide allowed if instruction contained in archetecture. */
13053 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
13055 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
13061 /* Integer divide explicitly prohibited. */
13065 /* Unrecognised case - treat as allowing divide everywhere. */
13067 /* Integer divide allowed in ARM state. */
13072 /* Query attributes object to see if integer divide instructions are
13073 forbidden to be in the object. This is not the inverse of
13074 elf32_arm_attributes_accept_div. */
13076 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
13078 return attr
[Tag_DIV_use
].i
== 1;
13081 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13082 are conflicting attributes. */
13085 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, bfd
*obfd
)
13087 obj_attribute
*in_attr
;
13088 obj_attribute
*out_attr
;
13089 /* Some tags have 0 = don't care, 1 = strong requirement,
13090 2 = weak requirement. */
13091 static const int order_021
[3] = {0, 2, 1};
13093 bfd_boolean result
= TRUE
;
13094 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
13096 /* Skip the linker stubs file. This preserves previous behavior
13097 of accepting unknown attributes in the first input file - but
13099 if (ibfd
->flags
& BFD_LINKER_CREATED
)
13102 /* Skip any input that hasn't attribute section.
13103 This enables to link object files without attribute section with
13105 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
13108 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
13110 /* This is the first object. Copy the attributes. */
13111 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
13113 out_attr
= elf_known_obj_attributes_proc (obfd
);
13115 /* Use the Tag_null value to indicate the attributes have been
13119 /* We do not output objects with Tag_MPextension_use_legacy - we move
13120 the attribute's value to Tag_MPextension_use. */
13121 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
13123 if (out_attr
[Tag_MPextension_use
].i
!= 0
13124 && out_attr
[Tag_MPextension_use_legacy
].i
13125 != out_attr
[Tag_MPextension_use
].i
)
13128 (_("Error: %B has both the current and legacy "
13129 "Tag_MPextension_use attributes"), ibfd
);
13133 out_attr
[Tag_MPextension_use
] =
13134 out_attr
[Tag_MPextension_use_legacy
];
13135 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
13136 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
13142 in_attr
= elf_known_obj_attributes_proc (ibfd
);
13143 out_attr
= elf_known_obj_attributes_proc (obfd
);
13144 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13145 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
13147 /* Ignore mismatches if the object doesn't use floating point or is
13148 floating point ABI independent. */
13149 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
13150 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13151 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
13152 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
13153 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13154 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
13157 (_("error: %B uses VFP register arguments, %B does not"),
13158 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
13159 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
13164 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
13166 /* Merge this attribute with existing attributes. */
13169 case Tag_CPU_raw_name
:
13171 /* These are merged after Tag_CPU_arch. */
13174 case Tag_ABI_optimization_goals
:
13175 case Tag_ABI_FP_optimization_goals
:
13176 /* Use the first value seen. */
13181 int secondary_compat
= -1, secondary_compat_out
= -1;
13182 unsigned int saved_out_attr
= out_attr
[i
].i
;
13184 static const char *name_table
[] =
13186 /* These aren't real CPU names, but we can't guess
13187 that from the architecture version alone. */
13203 "ARM v8-M.baseline",
13204 "ARM v8-M.mainline",
13207 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13208 secondary_compat
= get_secondary_compatible_arch (ibfd
);
13209 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
13210 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
13211 &secondary_compat_out
,
13215 /* Return with error if failed to merge. */
13216 if (arch_attr
== -1)
13219 out_attr
[i
].i
= arch_attr
;
13221 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
13223 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13224 if (out_attr
[i
].i
== saved_out_attr
)
13225 ; /* Leave the names alone. */
13226 else if (out_attr
[i
].i
== in_attr
[i
].i
)
13228 /* The output architecture has been changed to match the
13229 input architecture. Use the input names. */
13230 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
13231 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
13233 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
13234 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
13239 out_attr
[Tag_CPU_name
].s
= NULL
;
13240 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
13243 /* If we still don't have a value for Tag_CPU_name,
13244 make one up now. Tag_CPU_raw_name remains blank. */
13245 if (out_attr
[Tag_CPU_name
].s
== NULL
13246 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
13247 out_attr
[Tag_CPU_name
].s
=
13248 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
13252 case Tag_ARM_ISA_use
:
13253 case Tag_THUMB_ISA_use
:
13254 case Tag_WMMX_arch
:
13255 case Tag_Advanced_SIMD_arch
:
13256 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13257 case Tag_ABI_FP_rounding
:
13258 case Tag_ABI_FP_exceptions
:
13259 case Tag_ABI_FP_user_exceptions
:
13260 case Tag_ABI_FP_number_model
:
13261 case Tag_FP_HP_extension
:
13262 case Tag_CPU_unaligned_access
:
13264 case Tag_MPextension_use
:
13265 /* Use the largest value specified. */
13266 if (in_attr
[i
].i
> out_attr
[i
].i
)
13267 out_attr
[i
].i
= in_attr
[i
].i
;
13270 case Tag_ABI_align_preserved
:
13271 case Tag_ABI_PCS_RO_data
:
13272 /* Use the smallest value specified. */
13273 if (in_attr
[i
].i
< out_attr
[i
].i
)
13274 out_attr
[i
].i
= in_attr
[i
].i
;
13277 case Tag_ABI_align_needed
:
13278 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
13279 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
13280 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
13282 /* This error message should be enabled once all non-conformant
13283 binaries in the toolchain have had the attributes set
13286 (_("error: %B: 8-byte data alignment conflicts with %B"),
13290 /* Fall through. */
13291 case Tag_ABI_FP_denormal
:
13292 case Tag_ABI_PCS_GOT_use
:
13293 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13294 value if greater than 2 (for future-proofing). */
13295 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
13296 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
13297 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
13298 out_attr
[i
].i
= in_attr
[i
].i
;
13301 case Tag_Virtualization_use
:
13302 /* The virtualization tag effectively stores two bits of
13303 information: the intended use of TrustZone (in bit 0), and the
13304 intended use of Virtualization (in bit 1). */
13305 if (out_attr
[i
].i
== 0)
13306 out_attr
[i
].i
= in_attr
[i
].i
;
13307 else if (in_attr
[i
].i
!= 0
13308 && in_attr
[i
].i
!= out_attr
[i
].i
)
13310 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
13315 (_("error: %B: unable to merge virtualization attributes "
13323 case Tag_CPU_arch_profile
:
13324 if (out_attr
[i
].i
!= in_attr
[i
].i
)
13326 /* 0 will merge with anything.
13327 'A' and 'S' merge to 'A'.
13328 'R' and 'S' merge to 'R'.
13329 'M' and 'A|R|S' is an error. */
13330 if (out_attr
[i
].i
== 0
13331 || (out_attr
[i
].i
== 'S'
13332 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
13333 out_attr
[i
].i
= in_attr
[i
].i
;
13334 else if (in_attr
[i
].i
== 0
13335 || (in_attr
[i
].i
== 'S'
13336 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
13337 ; /* Do nothing. */
13341 (_("error: %B: Conflicting architecture profiles %c/%c"),
13343 in_attr
[i
].i
? in_attr
[i
].i
: '0',
13344 out_attr
[i
].i
? out_attr
[i
].i
: '0');
13350 case Tag_DSP_extension
:
13351 /* No need to change output value if any of:
13352 - pre (<=) ARMv5T input architecture (do not have DSP)
13353 - M input profile not ARMv7E-M and do not have DSP. */
13354 if (in_attr
[Tag_CPU_arch
].i
<= 3
13355 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
13356 && in_attr
[Tag_CPU_arch
].i
!= 13
13357 && in_attr
[i
].i
== 0))
13358 ; /* Do nothing. */
13359 /* Output value should be 0 if DSP part of architecture, ie.
13360 - post (>=) ARMv5te architecture output
13361 - A, R or S profile output or ARMv7E-M output architecture. */
13362 else if (out_attr
[Tag_CPU_arch
].i
>= 4
13363 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
13364 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
13365 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
13366 || out_attr
[Tag_CPU_arch
].i
== 13))
13368 /* Otherwise, DSP instructions are added and not part of output
13376 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13377 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13378 when it's 0. It might mean absence of FP hardware if
13379 Tag_FP_arch is zero. */
13381 #define VFP_VERSION_COUNT 9
13382 static const struct
13386 } vfp_versions
[VFP_VERSION_COUNT
] =
13402 /* If the output has no requirement about FP hardware,
13403 follow the requirement of the input. */
13404 if (out_attr
[i
].i
== 0)
13406 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
13407 out_attr
[i
].i
= in_attr
[i
].i
;
13408 out_attr
[Tag_ABI_HardFP_use
].i
13409 = in_attr
[Tag_ABI_HardFP_use
].i
;
13412 /* If the input has no requirement about FP hardware, do
13414 else if (in_attr
[i
].i
== 0)
13416 BFD_ASSERT (in_attr
[Tag_ABI_HardFP_use
].i
== 0);
13420 /* Both the input and the output have nonzero Tag_FP_arch.
13421 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13423 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13425 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
13426 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
13428 /* If the input and the output have different Tag_ABI_HardFP_use,
13429 the combination of them is 0 (implied by Tag_FP_arch). */
13430 else if (in_attr
[Tag_ABI_HardFP_use
].i
13431 != out_attr
[Tag_ABI_HardFP_use
].i
)
13432 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
13434 /* Now we can handle Tag_FP_arch. */
13436 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13437 pick the biggest. */
13438 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
13439 && in_attr
[i
].i
> out_attr
[i
].i
)
13441 out_attr
[i
] = in_attr
[i
];
13444 /* The output uses the superset of input features
13445 (ISA version) and registers. */
13446 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
13447 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
13448 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
13449 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
13450 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
13451 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
13452 /* This assumes all possible supersets are also a valid
13454 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
13456 if (regs
== vfp_versions
[newval
].regs
13457 && ver
== vfp_versions
[newval
].ver
)
13460 out_attr
[i
].i
= newval
;
13463 case Tag_PCS_config
:
13464 if (out_attr
[i
].i
== 0)
13465 out_attr
[i
].i
= in_attr
[i
].i
;
13466 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
13468 /* It's sometimes ok to mix different configs, so this is only
13471 (_("Warning: %B: Conflicting platform configuration"), ibfd
);
13474 case Tag_ABI_PCS_R9_use
:
13475 if (in_attr
[i
].i
!= out_attr
[i
].i
13476 && out_attr
[i
].i
!= AEABI_R9_unused
13477 && in_attr
[i
].i
!= AEABI_R9_unused
)
13480 (_("error: %B: Conflicting use of R9"), ibfd
);
13483 if (out_attr
[i
].i
== AEABI_R9_unused
)
13484 out_attr
[i
].i
= in_attr
[i
].i
;
13486 case Tag_ABI_PCS_RW_data
:
13487 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
13488 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
13489 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
13492 (_("error: %B: SB relative addressing conflicts with use of R9"),
13496 /* Use the smallest value specified. */
13497 if (in_attr
[i
].i
< out_attr
[i
].i
)
13498 out_attr
[i
].i
= in_attr
[i
].i
;
13500 case Tag_ABI_PCS_wchar_t
:
13501 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
13502 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
13505 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13506 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
13508 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
13509 out_attr
[i
].i
= in_attr
[i
].i
;
13511 case Tag_ABI_enum_size
:
13512 if (in_attr
[i
].i
!= AEABI_enum_unused
)
13514 if (out_attr
[i
].i
== AEABI_enum_unused
13515 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
13517 /* The existing object is compatible with anything.
13518 Use whatever requirements the new object has. */
13519 out_attr
[i
].i
= in_attr
[i
].i
;
13521 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
13522 && out_attr
[i
].i
!= in_attr
[i
].i
13523 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
13525 static const char *aeabi_enum_names
[] =
13526 { "", "variable-size", "32-bit", "" };
13527 const char *in_name
=
13528 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
13529 ? aeabi_enum_names
[in_attr
[i
].i
]
13531 const char *out_name
=
13532 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
13533 ? aeabi_enum_names
[out_attr
[i
].i
]
13536 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13537 ibfd
, in_name
, out_name
);
13541 case Tag_ABI_VFP_args
:
13544 case Tag_ABI_WMMX_args
:
13545 if (in_attr
[i
].i
!= out_attr
[i
].i
)
13548 (_("error: %B uses iWMMXt register arguments, %B does not"),
13553 case Tag_compatibility
:
13554 /* Merged in target-independent code. */
13556 case Tag_ABI_HardFP_use
:
13557 /* This is handled along with Tag_FP_arch. */
13559 case Tag_ABI_FP_16bit_format
:
13560 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
13562 if (in_attr
[i
].i
!= out_attr
[i
].i
)
13565 (_("error: fp16 format mismatch between %B and %B"),
13570 if (in_attr
[i
].i
!= 0)
13571 out_attr
[i
].i
= in_attr
[i
].i
;
13575 /* A value of zero on input means that the divide instruction may
13576 be used if available in the base architecture as specified via
13577 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13578 the user did not want divide instructions. A value of 2
13579 explicitly means that divide instructions were allowed in ARM
13580 and Thumb state. */
13581 if (in_attr
[i
].i
== out_attr
[i
].i
)
13582 /* Do nothing. */ ;
13583 else if (elf32_arm_attributes_forbid_div (in_attr
)
13584 && !elf32_arm_attributes_accept_div (out_attr
))
13586 else if (elf32_arm_attributes_forbid_div (out_attr
)
13587 && elf32_arm_attributes_accept_div (in_attr
))
13588 out_attr
[i
].i
= in_attr
[i
].i
;
13589 else if (in_attr
[i
].i
== 2)
13590 out_attr
[i
].i
= in_attr
[i
].i
;
13593 case Tag_MPextension_use_legacy
:
13594 /* We don't output objects with Tag_MPextension_use_legacy - we
13595 move the value to Tag_MPextension_use. */
13596 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
13598 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
13601 (_("%B has has both the current and legacy "
13602 "Tag_MPextension_use attributes"),
13608 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
13609 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
13613 case Tag_nodefaults
:
13614 /* This tag is set if it exists, but the value is unused (and is
13615 typically zero). We don't actually need to do anything here -
13616 the merge happens automatically when the type flags are merged
13619 case Tag_also_compatible_with
:
13620 /* Already done in Tag_CPU_arch. */
13622 case Tag_conformance
:
13623 /* Keep the attribute if it matches. Throw it away otherwise.
13624 No attribute means no claim to conform. */
13625 if (!in_attr
[i
].s
|| !out_attr
[i
].s
13626 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
13627 out_attr
[i
].s
= NULL
;
13632 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
13635 /* If out_attr was copied from in_attr then it won't have a type yet. */
13636 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
13637 out_attr
[i
].type
= in_attr
[i
].type
;
13640 /* Merge Tag_compatibility attributes and any common GNU ones. */
13641 if (!_bfd_elf_merge_object_attributes (ibfd
, obfd
))
13644 /* Check for any attributes not known on ARM. */
13645 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
13651 /* Return TRUE if the two EABI versions are incompatible. */
13654 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
13656 /* v4 and v5 are the same spec before and after it was released,
13657 so allow mixing them. */
13658 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
13659 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
13662 return (iver
== over
);
13665 /* Merge backend specific data from an object file to the output
13666 object file when linking. */
13669 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
);
13671 /* Display the flags field. */
13674 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
13676 FILE * file
= (FILE *) ptr
;
13677 unsigned long flags
;
13679 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
13681 /* Print normal ELF private data. */
13682 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
13684 flags
= elf_elfheader (abfd
)->e_flags
;
13685 /* Ignore init flag - it may not be set, despite the flags field
13686 containing valid data. */
13688 /* xgettext:c-format */
13689 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
13691 switch (EF_ARM_EABI_VERSION (flags
))
13693 case EF_ARM_EABI_UNKNOWN
:
13694 /* The following flag bits are GNU extensions and not part of the
13695 official ARM ELF extended ABI. Hence they are only decoded if
13696 the EABI version is not set. */
13697 if (flags
& EF_ARM_INTERWORK
)
13698 fprintf (file
, _(" [interworking enabled]"));
13700 if (flags
& EF_ARM_APCS_26
)
13701 fprintf (file
, " [APCS-26]");
13703 fprintf (file
, " [APCS-32]");
13705 if (flags
& EF_ARM_VFP_FLOAT
)
13706 fprintf (file
, _(" [VFP float format]"));
13707 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
13708 fprintf (file
, _(" [Maverick float format]"));
13710 fprintf (file
, _(" [FPA float format]"));
13712 if (flags
& EF_ARM_APCS_FLOAT
)
13713 fprintf (file
, _(" [floats passed in float registers]"));
13715 if (flags
& EF_ARM_PIC
)
13716 fprintf (file
, _(" [position independent]"));
13718 if (flags
& EF_ARM_NEW_ABI
)
13719 fprintf (file
, _(" [new ABI]"));
13721 if (flags
& EF_ARM_OLD_ABI
)
13722 fprintf (file
, _(" [old ABI]"));
13724 if (flags
& EF_ARM_SOFT_FLOAT
)
13725 fprintf (file
, _(" [software FP]"));
13727 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
13728 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
13729 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
13730 | EF_ARM_MAVERICK_FLOAT
);
13733 case EF_ARM_EABI_VER1
:
13734 fprintf (file
, _(" [Version1 EABI]"));
13736 if (flags
& EF_ARM_SYMSARESORTED
)
13737 fprintf (file
, _(" [sorted symbol table]"));
13739 fprintf (file
, _(" [unsorted symbol table]"));
13741 flags
&= ~ EF_ARM_SYMSARESORTED
;
13744 case EF_ARM_EABI_VER2
:
13745 fprintf (file
, _(" [Version2 EABI]"));
13747 if (flags
& EF_ARM_SYMSARESORTED
)
13748 fprintf (file
, _(" [sorted symbol table]"));
13750 fprintf (file
, _(" [unsorted symbol table]"));
13752 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
13753 fprintf (file
, _(" [dynamic symbols use segment index]"));
13755 if (flags
& EF_ARM_MAPSYMSFIRST
)
13756 fprintf (file
, _(" [mapping symbols precede others]"));
13758 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
13759 | EF_ARM_MAPSYMSFIRST
);
13762 case EF_ARM_EABI_VER3
:
13763 fprintf (file
, _(" [Version3 EABI]"));
13766 case EF_ARM_EABI_VER4
:
13767 fprintf (file
, _(" [Version4 EABI]"));
13770 case EF_ARM_EABI_VER5
:
13771 fprintf (file
, _(" [Version5 EABI]"));
13773 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
13774 fprintf (file
, _(" [soft-float ABI]"));
13776 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
13777 fprintf (file
, _(" [hard-float ABI]"));
13779 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
13782 if (flags
& EF_ARM_BE8
)
13783 fprintf (file
, _(" [BE8]"));
13785 if (flags
& EF_ARM_LE8
)
13786 fprintf (file
, _(" [LE8]"));
13788 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
13792 fprintf (file
, _(" <EABI version unrecognised>"));
13796 flags
&= ~ EF_ARM_EABIMASK
;
13798 if (flags
& EF_ARM_RELEXEC
)
13799 fprintf (file
, _(" [relocatable executable]"));
13801 flags
&= ~EF_ARM_RELEXEC
;
13804 fprintf (file
, _("<Unrecognised flag bits set>"));
13806 fputc ('\n', file
);
13812 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
13814 switch (ELF_ST_TYPE (elf_sym
->st_info
))
13816 case STT_ARM_TFUNC
:
13817 return ELF_ST_TYPE (elf_sym
->st_info
);
13819 case STT_ARM_16BIT
:
13820 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13821 This allows us to distinguish between data used by Thumb instructions
13822 and non-data (which is probably code) inside Thumb regions of an
13824 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
13825 return ELF_ST_TYPE (elf_sym
->st_info
);
13836 elf32_arm_gc_mark_hook (asection
*sec
,
13837 struct bfd_link_info
*info
,
13838 Elf_Internal_Rela
*rel
,
13839 struct elf_link_hash_entry
*h
,
13840 Elf_Internal_Sym
*sym
)
13843 switch (ELF32_R_TYPE (rel
->r_info
))
13845 case R_ARM_GNU_VTINHERIT
:
13846 case R_ARM_GNU_VTENTRY
:
13850 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
13853 /* Update the got entry reference counts for the section being removed. */
13856 elf32_arm_gc_sweep_hook (bfd
* abfd
,
13857 struct bfd_link_info
* info
,
13859 const Elf_Internal_Rela
* relocs
)
13861 Elf_Internal_Shdr
*symtab_hdr
;
13862 struct elf_link_hash_entry
**sym_hashes
;
13863 bfd_signed_vma
*local_got_refcounts
;
13864 const Elf_Internal_Rela
*rel
, *relend
;
13865 struct elf32_arm_link_hash_table
* globals
;
13867 if (bfd_link_relocatable (info
))
13870 globals
= elf32_arm_hash_table (info
);
13871 if (globals
== NULL
)
13874 elf_section_data (sec
)->local_dynrel
= NULL
;
13876 symtab_hdr
= & elf_symtab_hdr (abfd
);
13877 sym_hashes
= elf_sym_hashes (abfd
);
13878 local_got_refcounts
= elf_local_got_refcounts (abfd
);
13880 check_use_blx (globals
);
13882 relend
= relocs
+ sec
->reloc_count
;
13883 for (rel
= relocs
; rel
< relend
; rel
++)
13885 unsigned long r_symndx
;
13886 struct elf_link_hash_entry
*h
= NULL
;
13887 struct elf32_arm_link_hash_entry
*eh
;
13889 bfd_boolean call_reloc_p
;
13890 bfd_boolean may_become_dynamic_p
;
13891 bfd_boolean may_need_local_target_p
;
13892 union gotplt_union
*root_plt
;
13893 struct arm_plt_info
*arm_plt
;
13895 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13896 if (r_symndx
>= symtab_hdr
->sh_info
)
13898 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
13899 while (h
->root
.type
== bfd_link_hash_indirect
13900 || h
->root
.type
== bfd_link_hash_warning
)
13901 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
13903 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13905 call_reloc_p
= FALSE
;
13906 may_become_dynamic_p
= FALSE
;
13907 may_need_local_target_p
= FALSE
;
13909 r_type
= ELF32_R_TYPE (rel
->r_info
);
13910 r_type
= arm_real_reloc_type (globals
, r_type
);
13914 case R_ARM_GOT_PREL
:
13915 case R_ARM_TLS_GD32
:
13916 case R_ARM_TLS_IE32
:
13919 if (h
->got
.refcount
> 0)
13920 h
->got
.refcount
-= 1;
13922 else if (local_got_refcounts
!= NULL
)
13924 if (local_got_refcounts
[r_symndx
] > 0)
13925 local_got_refcounts
[r_symndx
] -= 1;
13929 case R_ARM_TLS_LDM32
:
13930 globals
->tls_ldm_got
.refcount
-= 1;
13938 case R_ARM_THM_CALL
:
13939 case R_ARM_THM_JUMP24
:
13940 case R_ARM_THM_JUMP19
:
13941 call_reloc_p
= TRUE
;
13942 may_need_local_target_p
= TRUE
;
13946 if (!globals
->vxworks_p
)
13948 may_need_local_target_p
= TRUE
;
13951 /* Fall through. */
13953 case R_ARM_ABS32_NOI
:
13955 case R_ARM_REL32_NOI
:
13956 case R_ARM_MOVW_ABS_NC
:
13957 case R_ARM_MOVT_ABS
:
13958 case R_ARM_MOVW_PREL_NC
:
13959 case R_ARM_MOVT_PREL
:
13960 case R_ARM_THM_MOVW_ABS_NC
:
13961 case R_ARM_THM_MOVT_ABS
:
13962 case R_ARM_THM_MOVW_PREL_NC
:
13963 case R_ARM_THM_MOVT_PREL
:
13964 /* Should the interworking branches be here also? */
13965 if ((bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
13966 && (sec
->flags
& SEC_ALLOC
) != 0)
13969 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
13971 call_reloc_p
= TRUE
;
13972 may_need_local_target_p
= TRUE
;
13975 may_become_dynamic_p
= TRUE
;
13978 may_need_local_target_p
= TRUE
;
13985 if (may_need_local_target_p
13986 && elf32_arm_get_plt_info (abfd
, globals
, eh
, r_symndx
, &root_plt
,
13989 /* If PLT refcount book-keeping is wrong and too low, we'll
13990 see a zero value (going to -1) for the root PLT reference
13992 if (root_plt
->refcount
>= 0)
13994 BFD_ASSERT (root_plt
->refcount
!= 0);
13995 root_plt
->refcount
-= 1;
13998 /* A value of -1 means the symbol has become local, forced
13999 or seeing a hidden definition. Any other negative value
14001 BFD_ASSERT (root_plt
->refcount
== -1);
14004 arm_plt
->noncall_refcount
--;
14006 if (r_type
== R_ARM_THM_CALL
)
14007 arm_plt
->maybe_thumb_refcount
--;
14009 if (r_type
== R_ARM_THM_JUMP24
14010 || r_type
== R_ARM_THM_JUMP19
)
14011 arm_plt
->thumb_refcount
--;
14014 if (may_become_dynamic_p
)
14016 struct elf_dyn_relocs
**pp
;
14017 struct elf_dyn_relocs
*p
;
14020 pp
= &(eh
->dyn_relocs
);
14023 Elf_Internal_Sym
*isym
;
14025 isym
= bfd_sym_from_r_symndx (&globals
->sym_cache
,
14029 pp
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
14033 for (; (p
= *pp
) != NULL
; pp
= &p
->next
)
14036 /* Everything must go for SEC. */
14046 /* Look through the relocs for a section during the first phase. */
14049 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
14050 asection
*sec
, const Elf_Internal_Rela
*relocs
)
14052 Elf_Internal_Shdr
*symtab_hdr
;
14053 struct elf_link_hash_entry
**sym_hashes
;
14054 const Elf_Internal_Rela
*rel
;
14055 const Elf_Internal_Rela
*rel_end
;
14058 struct elf32_arm_link_hash_table
*htab
;
14059 bfd_boolean call_reloc_p
;
14060 bfd_boolean may_become_dynamic_p
;
14061 bfd_boolean may_need_local_target_p
;
14062 unsigned long nsyms
;
14064 if (bfd_link_relocatable (info
))
14067 BFD_ASSERT (is_arm_elf (abfd
));
14069 htab
= elf32_arm_hash_table (info
);
14075 /* Create dynamic sections for relocatable executables so that we can
14076 copy relocations. */
14077 if (htab
->root
.is_relocatable_executable
14078 && ! htab
->root
.dynamic_sections_created
)
14080 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
14084 if (htab
->root
.dynobj
== NULL
)
14085 htab
->root
.dynobj
= abfd
;
14086 if (!create_ifunc_sections (info
))
14089 dynobj
= htab
->root
.dynobj
;
14091 symtab_hdr
= & elf_symtab_hdr (abfd
);
14092 sym_hashes
= elf_sym_hashes (abfd
);
14093 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
14095 rel_end
= relocs
+ sec
->reloc_count
;
14096 for (rel
= relocs
; rel
< rel_end
; rel
++)
14098 Elf_Internal_Sym
*isym
;
14099 struct elf_link_hash_entry
*h
;
14100 struct elf32_arm_link_hash_entry
*eh
;
14101 unsigned long r_symndx
;
14104 r_symndx
= ELF32_R_SYM (rel
->r_info
);
14105 r_type
= ELF32_R_TYPE (rel
->r_info
);
14106 r_type
= arm_real_reloc_type (htab
, r_type
);
14108 if (r_symndx
>= nsyms
14109 /* PR 9934: It is possible to have relocations that do not
14110 refer to symbols, thus it is also possible to have an
14111 object file containing relocations but no symbol table. */
14112 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
14114 (*_bfd_error_handler
) (_("%B: bad symbol index: %d"), abfd
,
14123 if (r_symndx
< symtab_hdr
->sh_info
)
14125 /* A local symbol. */
14126 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
14133 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
14134 while (h
->root
.type
== bfd_link_hash_indirect
14135 || h
->root
.type
== bfd_link_hash_warning
)
14136 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
14138 /* PR15323, ref flags aren't set for references in the
14140 h
->root
.non_ir_ref
= 1;
14144 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14146 call_reloc_p
= FALSE
;
14147 may_become_dynamic_p
= FALSE
;
14148 may_need_local_target_p
= FALSE
;
14150 /* Could be done earlier, if h were already available. */
14151 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
14155 case R_ARM_GOT_PREL
:
14156 case R_ARM_TLS_GD32
:
14157 case R_ARM_TLS_IE32
:
14158 case R_ARM_TLS_GOTDESC
:
14159 case R_ARM_TLS_DESCSEQ
:
14160 case R_ARM_THM_TLS_DESCSEQ
:
14161 case R_ARM_TLS_CALL
:
14162 case R_ARM_THM_TLS_CALL
:
14163 /* This symbol requires a global offset table entry. */
14165 int tls_type
, old_tls_type
;
14169 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
14171 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
14173 case R_ARM_TLS_GOTDESC
:
14174 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
14175 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
14176 tls_type
= GOT_TLS_GDESC
; break;
14178 default: tls_type
= GOT_NORMAL
; break;
14181 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
14182 info
->flags
|= DF_STATIC_TLS
;
14187 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14191 /* This is a global offset table entry for a local symbol. */
14192 if (!elf32_arm_allocate_local_sym_info (abfd
))
14194 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
14195 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
14198 /* If a variable is accessed with both tls methods, two
14199 slots may be created. */
14200 if (GOT_TLS_GD_ANY_P (old_tls_type
)
14201 && GOT_TLS_GD_ANY_P (tls_type
))
14202 tls_type
|= old_tls_type
;
14204 /* We will already have issued an error message if there
14205 is a TLS/non-TLS mismatch, based on the symbol
14206 type. So just combine any TLS types needed. */
14207 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
14208 && tls_type
!= GOT_NORMAL
)
14209 tls_type
|= old_tls_type
;
14211 /* If the symbol is accessed in both IE and GDESC
14212 method, we're able to relax. Turn off the GDESC flag,
14213 without messing up with any other kind of tls types
14214 that may be involved. */
14215 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
14216 tls_type
&= ~GOT_TLS_GDESC
;
14218 if (old_tls_type
!= tls_type
)
14221 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
14223 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
14226 /* Fall through. */
14228 case R_ARM_TLS_LDM32
:
14229 if (r_type
== R_ARM_TLS_LDM32
)
14230 htab
->tls_ldm_got
.refcount
++;
14231 /* Fall through. */
14233 case R_ARM_GOTOFF32
:
14235 if (htab
->root
.sgot
== NULL
14236 && !create_got_section (htab
->root
.dynobj
, info
))
14245 case R_ARM_THM_CALL
:
14246 case R_ARM_THM_JUMP24
:
14247 case R_ARM_THM_JUMP19
:
14248 call_reloc_p
= TRUE
;
14249 may_need_local_target_p
= TRUE
;
14253 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14254 ldr __GOTT_INDEX__ offsets. */
14255 if (!htab
->vxworks_p
)
14257 may_need_local_target_p
= TRUE
;
14260 else goto jump_over
;
14262 /* Fall through. */
14264 case R_ARM_MOVW_ABS_NC
:
14265 case R_ARM_MOVT_ABS
:
14266 case R_ARM_THM_MOVW_ABS_NC
:
14267 case R_ARM_THM_MOVT_ABS
:
14268 if (bfd_link_pic (info
))
14270 (*_bfd_error_handler
)
14271 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14272 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
14273 (h
) ? h
->root
.root
.string
: "a local symbol");
14274 bfd_set_error (bfd_error_bad_value
);
14278 /* Fall through. */
14280 case R_ARM_ABS32_NOI
:
14282 if (h
!= NULL
&& bfd_link_executable (info
))
14284 h
->pointer_equality_needed
= 1;
14286 /* Fall through. */
14288 case R_ARM_REL32_NOI
:
14289 case R_ARM_MOVW_PREL_NC
:
14290 case R_ARM_MOVT_PREL
:
14291 case R_ARM_THM_MOVW_PREL_NC
:
14292 case R_ARM_THM_MOVT_PREL
:
14294 /* Should the interworking branches be listed here? */
14295 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
14296 && (sec
->flags
& SEC_ALLOC
) != 0)
14299 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
14301 /* In shared libraries and relocatable executables,
14302 we treat local relative references as calls;
14303 see the related SYMBOL_CALLS_LOCAL code in
14304 allocate_dynrelocs. */
14305 call_reloc_p
= TRUE
;
14306 may_need_local_target_p
= TRUE
;
14309 /* We are creating a shared library or relocatable
14310 executable, and this is a reloc against a global symbol,
14311 or a non-PC-relative reloc against a local symbol.
14312 We may need to copy the reloc into the output. */
14313 may_become_dynamic_p
= TRUE
;
14316 may_need_local_target_p
= TRUE
;
14319 /* This relocation describes the C++ object vtable hierarchy.
14320 Reconstruct it for later use during GC. */
14321 case R_ARM_GNU_VTINHERIT
:
14322 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
14326 /* This relocation describes which C++ vtable entries are actually
14327 used. Record for later use during GC. */
14328 case R_ARM_GNU_VTENTRY
:
14329 BFD_ASSERT (h
!= NULL
);
14331 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
14339 /* We may need a .plt entry if the function this reloc
14340 refers to is in a different object, regardless of the
14341 symbol's type. We can't tell for sure yet, because
14342 something later might force the symbol local. */
14344 else if (may_need_local_target_p
)
14345 /* If this reloc is in a read-only section, we might
14346 need a copy reloc. We can't check reliably at this
14347 stage whether the section is read-only, as input
14348 sections have not yet been mapped to output sections.
14349 Tentatively set the flag for now, and correct in
14350 adjust_dynamic_symbol. */
14351 h
->non_got_ref
= 1;
14354 if (may_need_local_target_p
14355 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
14357 union gotplt_union
*root_plt
;
14358 struct arm_plt_info
*arm_plt
;
14359 struct arm_local_iplt_info
*local_iplt
;
14363 root_plt
= &h
->plt
;
14364 arm_plt
= &eh
->plt
;
14368 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
14369 if (local_iplt
== NULL
)
14371 root_plt
= &local_iplt
->root
;
14372 arm_plt
= &local_iplt
->arm
;
14375 /* If the symbol is a function that doesn't bind locally,
14376 this relocation will need a PLT entry. */
14377 if (root_plt
->refcount
!= -1)
14378 root_plt
->refcount
+= 1;
14381 arm_plt
->noncall_refcount
++;
14383 /* It's too early to use htab->use_blx here, so we have to
14384 record possible blx references separately from
14385 relocs that definitely need a thumb stub. */
14387 if (r_type
== R_ARM_THM_CALL
)
14388 arm_plt
->maybe_thumb_refcount
+= 1;
14390 if (r_type
== R_ARM_THM_JUMP24
14391 || r_type
== R_ARM_THM_JUMP19
)
14392 arm_plt
->thumb_refcount
+= 1;
14395 if (may_become_dynamic_p
)
14397 struct elf_dyn_relocs
*p
, **head
;
14399 /* Create a reloc section in dynobj. */
14400 if (sreloc
== NULL
)
14402 sreloc
= _bfd_elf_make_dynamic_reloc_section
14403 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
14405 if (sreloc
== NULL
)
14408 /* BPABI objects never have dynamic relocations mapped. */
14409 if (htab
->symbian_p
)
14413 flags
= bfd_get_section_flags (dynobj
, sreloc
);
14414 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
14415 bfd_set_section_flags (dynobj
, sreloc
, flags
);
14419 /* If this is a global symbol, count the number of
14420 relocations we need for this symbol. */
14422 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
14425 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
14431 if (p
== NULL
|| p
->sec
!= sec
)
14433 bfd_size_type amt
= sizeof *p
;
14435 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
14445 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
14454 /* Unwinding tables are not referenced directly. This pass marks them as
14455 required if the corresponding code section is marked. Similarly, ARMv8-M
14456 secure entry functions can only be referenced by SG veneers which are
14457 created after the GC process. They need to be marked in case they reside in
14458 their own section (as would be the case if code was compiled with
14459 -ffunction-sections). */
14462 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
14463 elf_gc_mark_hook_fn gc_mark_hook
)
14466 Elf_Internal_Shdr
**elf_shdrp
;
14467 asection
*cmse_sec
;
14468 obj_attribute
*out_attr
;
14469 Elf_Internal_Shdr
*symtab_hdr
;
14470 unsigned i
, sym_count
, ext_start
;
14471 const struct elf_backend_data
*bed
;
14472 struct elf_link_hash_entry
**sym_hashes
;
14473 struct elf32_arm_link_hash_entry
*cmse_hash
;
14474 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
14476 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
14478 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
14479 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
14480 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
14482 /* Marking EH data may cause additional code sections to be marked,
14483 requiring multiple passes. */
14488 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
14492 if (! is_arm_elf (sub
))
14495 elf_shdrp
= elf_elfsections (sub
);
14496 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
14498 Elf_Internal_Shdr
*hdr
;
14500 hdr
= &elf_section_data (o
)->this_hdr
;
14501 if (hdr
->sh_type
== SHT_ARM_EXIDX
14503 && hdr
->sh_link
< elf_numsections (sub
)
14505 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
14508 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
14513 /* Mark section holding ARMv8-M secure entry functions. We mark all
14514 of them so no need for a second browsing. */
14515 if (is_v8m
&& first_bfd_browse
)
14517 sym_hashes
= elf_sym_hashes (sub
);
14518 bed
= get_elf_backend_data (sub
);
14519 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
14520 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
14521 ext_start
= symtab_hdr
->sh_info
;
14523 /* Scan symbols. */
14524 for (i
= ext_start
; i
< sym_count
; i
++)
14526 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
14528 /* Assume it is a special symbol. If not, cmse_scan will
14529 warn about it and user can do something about it. */
14530 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
14532 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
14533 if (!_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
14539 first_bfd_browse
= FALSE
;
14545 /* Treat mapping symbols as special target symbols. */
14548 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
14550 return bfd_is_arm_special_symbol_name (sym
->name
,
14551 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
14554 /* This is a copy of elf_find_function() from elf.c except that
14555 ARM mapping symbols are ignored when looking for function names
14556 and STT_ARM_TFUNC is considered to a function type. */
14559 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
14560 asymbol
** symbols
,
14561 asection
* section
,
14563 const char ** filename_ptr
,
14564 const char ** functionname_ptr
)
14566 const char * filename
= NULL
;
14567 asymbol
* func
= NULL
;
14568 bfd_vma low_func
= 0;
14571 for (p
= symbols
; *p
!= NULL
; p
++)
14573 elf_symbol_type
*q
;
14575 q
= (elf_symbol_type
*) *p
;
14577 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
14582 filename
= bfd_asymbol_name (&q
->symbol
);
14585 case STT_ARM_TFUNC
:
14587 /* Skip mapping symbols. */
14588 if ((q
->symbol
.flags
& BSF_LOCAL
)
14589 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
14590 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
14592 /* Fall through. */
14593 if (bfd_get_section (&q
->symbol
) == section
14594 && q
->symbol
.value
>= low_func
14595 && q
->symbol
.value
<= offset
)
14597 func
= (asymbol
*) q
;
14598 low_func
= q
->symbol
.value
;
14608 *filename_ptr
= filename
;
14609 if (functionname_ptr
)
14610 *functionname_ptr
= bfd_asymbol_name (func
);
14616 /* Find the nearest line to a particular section and offset, for error
14617 reporting. This code is a duplicate of the code in elf.c, except
14618 that it uses arm_elf_find_function. */
14621 elf32_arm_find_nearest_line (bfd
* abfd
,
14622 asymbol
** symbols
,
14623 asection
* section
,
14625 const char ** filename_ptr
,
14626 const char ** functionname_ptr
,
14627 unsigned int * line_ptr
,
14628 unsigned int * discriminator_ptr
)
14630 bfd_boolean found
= FALSE
;
14632 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
14633 filename_ptr
, functionname_ptr
,
14634 line_ptr
, discriminator_ptr
,
14635 dwarf_debug_sections
, 0,
14636 & elf_tdata (abfd
)->dwarf2_find_line_info
))
14638 if (!*functionname_ptr
)
14639 arm_elf_find_function (abfd
, symbols
, section
, offset
,
14640 *filename_ptr
? NULL
: filename_ptr
,
14646 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
14649 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
14650 & found
, filename_ptr
,
14651 functionname_ptr
, line_ptr
,
14652 & elf_tdata (abfd
)->line_info
))
14655 if (found
&& (*functionname_ptr
|| *line_ptr
))
14658 if (symbols
== NULL
)
14661 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
14662 filename_ptr
, functionname_ptr
))
14670 elf32_arm_find_inliner_info (bfd
* abfd
,
14671 const char ** filename_ptr
,
14672 const char ** functionname_ptr
,
14673 unsigned int * line_ptr
)
14676 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
14677 functionname_ptr
, line_ptr
,
14678 & elf_tdata (abfd
)->dwarf2_find_line_info
);
14682 /* Adjust a symbol defined by a dynamic object and referenced by a
14683 regular object. The current definition is in some section of the
14684 dynamic object, but we're not including those sections. We have to
14685 change the definition to something the rest of the link can
14689 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
14690 struct elf_link_hash_entry
* h
)
14694 struct elf32_arm_link_hash_entry
* eh
;
14695 struct elf32_arm_link_hash_table
*globals
;
14697 globals
= elf32_arm_hash_table (info
);
14698 if (globals
== NULL
)
14701 dynobj
= elf_hash_table (info
)->dynobj
;
14703 /* Make sure we know what is going on here. */
14704 BFD_ASSERT (dynobj
!= NULL
14706 || h
->type
== STT_GNU_IFUNC
14707 || h
->u
.weakdef
!= NULL
14710 && !h
->def_regular
)));
14712 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14714 /* If this is a function, put it in the procedure linkage table. We
14715 will fill in the contents of the procedure linkage table later,
14716 when we know the address of the .got section. */
14717 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
14719 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14720 symbol binds locally. */
14721 if (h
->plt
.refcount
<= 0
14722 || (h
->type
!= STT_GNU_IFUNC
14723 && (SYMBOL_CALLS_LOCAL (info
, h
)
14724 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
14725 && h
->root
.type
== bfd_link_hash_undefweak
))))
14727 /* This case can occur if we saw a PLT32 reloc in an input
14728 file, but the symbol was never referred to by a dynamic
14729 object, or if all references were garbage collected. In
14730 such a case, we don't actually need to build a procedure
14731 linkage table, and we can just do a PC24 reloc instead. */
14732 h
->plt
.offset
= (bfd_vma
) -1;
14733 eh
->plt
.thumb_refcount
= 0;
14734 eh
->plt
.maybe_thumb_refcount
= 0;
14735 eh
->plt
.noncall_refcount
= 0;
14743 /* It's possible that we incorrectly decided a .plt reloc was
14744 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14745 in check_relocs. We can't decide accurately between function
14746 and non-function syms in check-relocs; Objects loaded later in
14747 the link may change h->type. So fix it now. */
14748 h
->plt
.offset
= (bfd_vma
) -1;
14749 eh
->plt
.thumb_refcount
= 0;
14750 eh
->plt
.maybe_thumb_refcount
= 0;
14751 eh
->plt
.noncall_refcount
= 0;
14754 /* If this is a weak symbol, and there is a real definition, the
14755 processor independent code will have arranged for us to see the
14756 real definition first, and we can just use the same value. */
14757 if (h
->u
.weakdef
!= NULL
)
14759 BFD_ASSERT (h
->u
.weakdef
->root
.type
== bfd_link_hash_defined
14760 || h
->u
.weakdef
->root
.type
== bfd_link_hash_defweak
);
14761 h
->root
.u
.def
.section
= h
->u
.weakdef
->root
.u
.def
.section
;
14762 h
->root
.u
.def
.value
= h
->u
.weakdef
->root
.u
.def
.value
;
14766 /* If there are no non-GOT references, we do not need a copy
14768 if (!h
->non_got_ref
)
14771 /* This is a reference to a symbol defined by a dynamic object which
14772 is not a function. */
14774 /* If we are creating a shared library, we must presume that the
14775 only references to the symbol are via the global offset table.
14776 For such cases we need not do anything here; the relocations will
14777 be handled correctly by relocate_section. Relocatable executables
14778 can reference data in shared objects directly, so we don't need to
14779 do anything here. */
14780 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
14783 /* We must allocate the symbol in our .dynbss section, which will
14784 become part of the .bss section of the executable. There will be
14785 an entry for this symbol in the .dynsym section. The dynamic
14786 object will contain position independent code, so all references
14787 from the dynamic object to this symbol will go through the global
14788 offset table. The dynamic linker will use the .dynsym entry to
14789 determine the address it must put in the global offset table, so
14790 both the dynamic object and the regular object will refer to the
14791 same memory location for the variable. */
14792 s
= bfd_get_linker_section (dynobj
, ".dynbss");
14793 BFD_ASSERT (s
!= NULL
);
14795 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
14796 linker to copy the initial value out of the dynamic object and into
14797 the runtime process image. We need to remember the offset into the
14798 .rel(a).bss section we are going to use. */
14799 if (info
->nocopyreloc
== 0
14800 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
14805 srel
= bfd_get_linker_section (dynobj
, RELOC_SECTION (globals
, ".bss"));
14806 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
14810 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
14813 /* Allocate space in .plt, .got and associated reloc sections for
14817 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
14819 struct bfd_link_info
*info
;
14820 struct elf32_arm_link_hash_table
*htab
;
14821 struct elf32_arm_link_hash_entry
*eh
;
14822 struct elf_dyn_relocs
*p
;
14824 if (h
->root
.type
== bfd_link_hash_indirect
)
14827 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14829 info
= (struct bfd_link_info
*) inf
;
14830 htab
= elf32_arm_hash_table (info
);
14834 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
14835 && h
->plt
.refcount
> 0)
14837 /* Make sure this symbol is output as a dynamic symbol.
14838 Undefined weak syms won't yet be marked as dynamic. */
14839 if (h
->dynindx
== -1
14840 && !h
->forced_local
)
14842 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14846 /* If the call in the PLT entry binds locally, the associated
14847 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14848 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14849 than the .plt section. */
14850 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
14853 if (eh
->plt
.noncall_refcount
== 0
14854 && SYMBOL_REFERENCES_LOCAL (info
, h
))
14855 /* All non-call references can be resolved directly.
14856 This means that they can (and in some cases, must)
14857 resolve directly to the run-time target, rather than
14858 to the PLT. That in turns means that any .got entry
14859 would be equal to the .igot.plt entry, so there's
14860 no point having both. */
14861 h
->got
.refcount
= 0;
14864 if (bfd_link_pic (info
)
14866 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
14868 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
14870 /* If this symbol is not defined in a regular file, and we are
14871 not generating a shared library, then set the symbol to this
14872 location in the .plt. This is required to make function
14873 pointers compare as equal between the normal executable and
14874 the shared library. */
14875 if (! bfd_link_pic (info
)
14876 && !h
->def_regular
)
14878 h
->root
.u
.def
.section
= htab
->root
.splt
;
14879 h
->root
.u
.def
.value
= h
->plt
.offset
;
14881 /* Make sure the function is not marked as Thumb, in case
14882 it is the target of an ABS32 relocation, which will
14883 point to the PLT entry. */
14884 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
14887 /* VxWorks executables have a second set of relocations for
14888 each PLT entry. They go in a separate relocation section,
14889 which is processed by the kernel loader. */
14890 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
14892 /* There is a relocation for the initial PLT entry:
14893 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14894 if (h
->plt
.offset
== htab
->plt_header_size
)
14895 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
14897 /* There are two extra relocations for each subsequent
14898 PLT entry: an R_ARM_32 relocation for the GOT entry,
14899 and an R_ARM_32 relocation for the PLT entry. */
14900 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
14905 h
->plt
.offset
= (bfd_vma
) -1;
14911 h
->plt
.offset
= (bfd_vma
) -1;
14915 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14916 eh
->tlsdesc_got
= (bfd_vma
) -1;
14918 if (h
->got
.refcount
> 0)
14922 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14925 /* Make sure this symbol is output as a dynamic symbol.
14926 Undefined weak syms won't yet be marked as dynamic. */
14927 if (h
->dynindx
== -1
14928 && !h
->forced_local
)
14930 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14934 if (!htab
->symbian_p
)
14936 s
= htab
->root
.sgot
;
14937 h
->got
.offset
= s
->size
;
14939 if (tls_type
== GOT_UNKNOWN
)
14942 if (tls_type
== GOT_NORMAL
)
14943 /* Non-TLS symbols need one GOT slot. */
14947 if (tls_type
& GOT_TLS_GDESC
)
14949 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14951 = (htab
->root
.sgotplt
->size
14952 - elf32_arm_compute_jump_table_size (htab
));
14953 htab
->root
.sgotplt
->size
+= 8;
14954 h
->got
.offset
= (bfd_vma
) -2;
14955 /* plt.got_offset needs to know there's a TLS_DESC
14956 reloc in the middle of .got.plt. */
14957 htab
->num_tls_desc
++;
14960 if (tls_type
& GOT_TLS_GD
)
14962 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14963 the symbol is both GD and GDESC, got.offset may
14964 have been overwritten. */
14965 h
->got
.offset
= s
->size
;
14969 if (tls_type
& GOT_TLS_IE
)
14970 /* R_ARM_TLS_IE32 needs one GOT slot. */
14974 dyn
= htab
->root
.dynamic_sections_created
;
14977 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
14978 bfd_link_pic (info
),
14980 && (!bfd_link_pic (info
)
14981 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
14984 if (tls_type
!= GOT_NORMAL
14985 && (bfd_link_pic (info
) || indx
!= 0)
14986 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
14987 || h
->root
.type
!= bfd_link_hash_undefweak
))
14989 if (tls_type
& GOT_TLS_IE
)
14990 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14992 if (tls_type
& GOT_TLS_GD
)
14993 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14995 if (tls_type
& GOT_TLS_GDESC
)
14997 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
14998 /* GDESC needs a trampoline to jump to. */
14999 htab
->tls_trampoline
= -1;
15002 /* Only GD needs it. GDESC just emits one relocation per
15004 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
15005 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15007 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
15009 if (htab
->root
.dynamic_sections_created
)
15010 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15011 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15013 else if (h
->type
== STT_GNU_IFUNC
15014 && eh
->plt
.noncall_refcount
== 0)
15015 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15016 they all resolve dynamically instead. Reserve room for the
15017 GOT entry's R_ARM_IRELATIVE relocation. */
15018 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
15019 else if (bfd_link_pic (info
)
15020 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15021 || h
->root
.type
!= bfd_link_hash_undefweak
))
15022 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15023 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15027 h
->got
.offset
= (bfd_vma
) -1;
15029 /* Allocate stubs for exported Thumb functions on v4t. */
15030 if (!htab
->use_blx
&& h
->dynindx
!= -1
15032 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
15033 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
15035 struct elf_link_hash_entry
* th
;
15036 struct bfd_link_hash_entry
* bh
;
15037 struct elf_link_hash_entry
* myh
;
15041 /* Create a new symbol to regist the real location of the function. */
15042 s
= h
->root
.u
.def
.section
;
15043 sprintf (name
, "__real_%s", h
->root
.root
.string
);
15044 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
15045 name
, BSF_GLOBAL
, s
,
15046 h
->root
.u
.def
.value
,
15047 NULL
, TRUE
, FALSE
, &bh
);
15049 myh
= (struct elf_link_hash_entry
*) bh
;
15050 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
15051 myh
->forced_local
= 1;
15052 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
15053 eh
->export_glue
= myh
;
15054 th
= record_arm_to_thumb_glue (info
, h
);
15055 /* Point the symbol at the stub. */
15056 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
15057 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15058 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
15059 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
15062 if (eh
->dyn_relocs
== NULL
)
15065 /* In the shared -Bsymbolic case, discard space allocated for
15066 dynamic pc-relative relocs against symbols which turn out to be
15067 defined in regular objects. For the normal shared case, discard
15068 space for pc-relative relocs that have become local due to symbol
15069 visibility changes. */
15071 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
15073 /* Relocs that use pc_count are PC-relative forms, which will appear
15074 on something like ".long foo - ." or "movw REG, foo - .". We want
15075 calls to protected symbols to resolve directly to the function
15076 rather than going via the plt. If people want function pointer
15077 comparisons to work as expected then they should avoid writing
15078 assembly like ".long foo - .". */
15079 if (SYMBOL_CALLS_LOCAL (info
, h
))
15081 struct elf_dyn_relocs
**pp
;
15083 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15085 p
->count
-= p
->pc_count
;
15094 if (htab
->vxworks_p
)
15096 struct elf_dyn_relocs
**pp
;
15098 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15100 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
15107 /* Also discard relocs on undefined weak syms with non-default
15109 if (eh
->dyn_relocs
!= NULL
15110 && h
->root
.type
== bfd_link_hash_undefweak
)
15112 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
)
15113 eh
->dyn_relocs
= NULL
;
15115 /* Make sure undefined weak symbols are output as a dynamic
15117 else if (h
->dynindx
== -1
15118 && !h
->forced_local
)
15120 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15125 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
15126 && h
->root
.type
== bfd_link_hash_new
)
15128 /* Output absolute symbols so that we can create relocations
15129 against them. For normal symbols we output a relocation
15130 against the section that contains them. */
15131 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15138 /* For the non-shared case, discard space for relocs against
15139 symbols which turn out to need copy relocs or are not
15142 if (!h
->non_got_ref
15143 && ((h
->def_dynamic
15144 && !h
->def_regular
)
15145 || (htab
->root
.dynamic_sections_created
15146 && (h
->root
.type
== bfd_link_hash_undefweak
15147 || h
->root
.type
== bfd_link_hash_undefined
))))
15149 /* Make sure this symbol is output as a dynamic symbol.
15150 Undefined weak syms won't yet be marked as dynamic. */
15151 if (h
->dynindx
== -1
15152 && !h
->forced_local
)
15154 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15158 /* If that succeeded, we know we'll be keeping all the
15160 if (h
->dynindx
!= -1)
15164 eh
->dyn_relocs
= NULL
;
15169 /* Finally, allocate space. */
15170 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15172 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
15173 if (h
->type
== STT_GNU_IFUNC
15174 && eh
->plt
.noncall_refcount
== 0
15175 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15176 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
15178 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
15184 /* Find any dynamic relocs that apply to read-only sections. */
15187 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry
* h
, void * inf
)
15189 struct elf32_arm_link_hash_entry
* eh
;
15190 struct elf_dyn_relocs
* p
;
15192 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15193 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15195 asection
*s
= p
->sec
;
15197 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
15199 struct bfd_link_info
*info
= (struct bfd_link_info
*) inf
;
15201 info
->flags
|= DF_TEXTREL
;
15203 /* Not an error, just cut short the traversal. */
15211 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
15214 struct elf32_arm_link_hash_table
*globals
;
15216 globals
= elf32_arm_hash_table (info
);
15217 if (globals
== NULL
)
15220 globals
->byteswap_code
= byteswap_code
;
15223 /* Set the sizes of the dynamic sections. */
15226 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
15227 struct bfd_link_info
* info
)
15232 bfd_boolean relocs
;
15234 struct elf32_arm_link_hash_table
*htab
;
15236 htab
= elf32_arm_hash_table (info
);
15240 dynobj
= elf_hash_table (info
)->dynobj
;
15241 BFD_ASSERT (dynobj
!= NULL
);
15242 check_use_blx (htab
);
15244 if (elf_hash_table (info
)->dynamic_sections_created
)
15246 /* Set the contents of the .interp section to the interpreter. */
15247 if (bfd_link_executable (info
) && !info
->nointerp
)
15249 s
= bfd_get_linker_section (dynobj
, ".interp");
15250 BFD_ASSERT (s
!= NULL
);
15251 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
15252 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
15256 /* Set up .got offsets for local syms, and space for local dynamic
15258 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15260 bfd_signed_vma
*local_got
;
15261 bfd_signed_vma
*end_local_got
;
15262 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
15263 char *local_tls_type
;
15264 bfd_vma
*local_tlsdesc_gotent
;
15265 bfd_size_type locsymcount
;
15266 Elf_Internal_Shdr
*symtab_hdr
;
15268 bfd_boolean is_vxworks
= htab
->vxworks_p
;
15269 unsigned int symndx
;
15271 if (! is_arm_elf (ibfd
))
15274 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
15276 struct elf_dyn_relocs
*p
;
15278 for (p
= (struct elf_dyn_relocs
*)
15279 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
15281 if (!bfd_is_abs_section (p
->sec
)
15282 && bfd_is_abs_section (p
->sec
->output_section
))
15284 /* Input section has been discarded, either because
15285 it is a copy of a linkonce section or due to
15286 linker script /DISCARD/, so we'll be discarding
15289 else if (is_vxworks
15290 && strcmp (p
->sec
->output_section
->name
,
15293 /* Relocations in vxworks .tls_vars sections are
15294 handled specially by the loader. */
15296 else if (p
->count
!= 0)
15298 srel
= elf_section_data (p
->sec
)->sreloc
;
15299 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
15300 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
15301 info
->flags
|= DF_TEXTREL
;
15306 local_got
= elf_local_got_refcounts (ibfd
);
15310 symtab_hdr
= & elf_symtab_hdr (ibfd
);
15311 locsymcount
= symtab_hdr
->sh_info
;
15312 end_local_got
= local_got
+ locsymcount
;
15313 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
15314 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
15315 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
15317 s
= htab
->root
.sgot
;
15318 srel
= htab
->root
.srelgot
;
15319 for (; local_got
< end_local_got
;
15320 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
15321 ++local_tlsdesc_gotent
, ++symndx
)
15323 *local_tlsdesc_gotent
= (bfd_vma
) -1;
15324 local_iplt
= *local_iplt_ptr
;
15325 if (local_iplt
!= NULL
)
15327 struct elf_dyn_relocs
*p
;
15329 if (local_iplt
->root
.refcount
> 0)
15331 elf32_arm_allocate_plt_entry (info
, TRUE
,
15334 if (local_iplt
->arm
.noncall_refcount
== 0)
15335 /* All references to the PLT are calls, so all
15336 non-call references can resolve directly to the
15337 run-time target. This means that the .got entry
15338 would be the same as the .igot.plt entry, so there's
15339 no point creating both. */
15344 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
15345 local_iplt
->root
.offset
= (bfd_vma
) -1;
15348 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15352 psrel
= elf_section_data (p
->sec
)->sreloc
;
15353 if (local_iplt
->arm
.noncall_refcount
== 0)
15354 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
15356 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
15359 if (*local_got
> 0)
15361 Elf_Internal_Sym
*isym
;
15363 *local_got
= s
->size
;
15364 if (*local_tls_type
& GOT_TLS_GD
)
15365 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15367 if (*local_tls_type
& GOT_TLS_GDESC
)
15369 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
15370 - elf32_arm_compute_jump_table_size (htab
);
15371 htab
->root
.sgotplt
->size
+= 8;
15372 *local_got
= (bfd_vma
) -2;
15373 /* plt.got_offset needs to know there's a TLS_DESC
15374 reloc in the middle of .got.plt. */
15375 htab
->num_tls_desc
++;
15377 if (*local_tls_type
& GOT_TLS_IE
)
15380 if (*local_tls_type
& GOT_NORMAL
)
15382 /* If the symbol is both GD and GDESC, *local_got
15383 may have been overwritten. */
15384 *local_got
= s
->size
;
15388 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
15392 /* If all references to an STT_GNU_IFUNC PLT are calls,
15393 then all non-call references, including this GOT entry,
15394 resolve directly to the run-time target. */
15395 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
15396 && (local_iplt
== NULL
15397 || local_iplt
->arm
.noncall_refcount
== 0))
15398 elf32_arm_allocate_irelocs (info
, srel
, 1);
15399 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
)
15401 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
))
15402 || *local_tls_type
& GOT_TLS_GD
)
15403 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15405 if (bfd_link_pic (info
) && *local_tls_type
& GOT_TLS_GDESC
)
15407 elf32_arm_allocate_dynrelocs (info
,
15408 htab
->root
.srelplt
, 1);
15409 htab
->tls_trampoline
= -1;
15414 *local_got
= (bfd_vma
) -1;
15418 if (htab
->tls_ldm_got
.refcount
> 0)
15420 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15421 for R_ARM_TLS_LDM32 relocations. */
15422 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
15423 htab
->root
.sgot
->size
+= 8;
15424 if (bfd_link_pic (info
))
15425 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15428 htab
->tls_ldm_got
.offset
= -1;
15430 /* Allocate global sym .plt and .got entries, and space for global
15431 sym dynamic relocs. */
15432 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
15434 /* Here we rummage through the found bfds to collect glue information. */
15435 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15437 if (! is_arm_elf (ibfd
))
15440 /* Initialise mapping tables for code/data. */
15441 bfd_elf32_arm_init_maps (ibfd
);
15443 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
15444 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
15445 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
15446 /* xgettext:c-format */
15447 _bfd_error_handler (_("Errors encountered processing file %s"),
15451 /* Allocate space for the glue sections now that we've sized them. */
15452 bfd_elf32_arm_allocate_interworking_sections (info
);
15454 /* For every jump slot reserved in the sgotplt, reloc_count is
15455 incremented. However, when we reserve space for TLS descriptors,
15456 it's not incremented, so in order to compute the space reserved
15457 for them, it suffices to multiply the reloc count by the jump
15459 if (htab
->root
.srelplt
)
15460 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
15462 if (htab
->tls_trampoline
)
15464 if (htab
->root
.splt
->size
== 0)
15465 htab
->root
.splt
->size
+= htab
->plt_header_size
;
15467 htab
->tls_trampoline
= htab
->root
.splt
->size
;
15468 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
15470 /* If we're not using lazy TLS relocations, don't generate the
15471 PLT and GOT entries they require. */
15472 if (!(info
->flags
& DF_BIND_NOW
))
15474 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
15475 htab
->root
.sgot
->size
+= 4;
15477 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
15478 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
15482 /* The check_relocs and adjust_dynamic_symbol entry points have
15483 determined the sizes of the various dynamic sections. Allocate
15484 memory for them. */
15487 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
15491 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
15494 /* It's OK to base decisions on the section name, because none
15495 of the dynobj section names depend upon the input files. */
15496 name
= bfd_get_section_name (dynobj
, s
);
15498 if (s
== htab
->root
.splt
)
15500 /* Remember whether there is a PLT. */
15501 plt
= s
->size
!= 0;
15503 else if (CONST_STRNEQ (name
, ".rel"))
15507 /* Remember whether there are any reloc sections other
15508 than .rel(a).plt and .rela.plt.unloaded. */
15509 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
15512 /* We use the reloc_count field as a counter if we need
15513 to copy relocs into the output file. */
15514 s
->reloc_count
= 0;
15517 else if (s
!= htab
->root
.sgot
15518 && s
!= htab
->root
.sgotplt
15519 && s
!= htab
->root
.iplt
15520 && s
!= htab
->root
.igotplt
15521 && s
!= htab
->sdynbss
)
15523 /* It's not one of our sections, so don't allocate space. */
15529 /* If we don't need this section, strip it from the
15530 output file. This is mostly to handle .rel(a).bss and
15531 .rel(a).plt. We must create both sections in
15532 create_dynamic_sections, because they must be created
15533 before the linker maps input sections to output
15534 sections. The linker does that before
15535 adjust_dynamic_symbol is called, and it is that
15536 function which decides whether anything needs to go
15537 into these sections. */
15538 s
->flags
|= SEC_EXCLUDE
;
15542 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
15545 /* Allocate memory for the section contents. */
15546 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
15547 if (s
->contents
== NULL
)
15551 if (elf_hash_table (info
)->dynamic_sections_created
)
15553 /* Add some entries to the .dynamic section. We fill in the
15554 values later, in elf32_arm_finish_dynamic_sections, but we
15555 must add the entries now so that we get the correct size for
15556 the .dynamic section. The DT_DEBUG entry is filled in by the
15557 dynamic linker and used by the debugger. */
15558 #define add_dynamic_entry(TAG, VAL) \
15559 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
15561 if (bfd_link_executable (info
))
15563 if (!add_dynamic_entry (DT_DEBUG
, 0))
15569 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
15570 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
15571 || !add_dynamic_entry (DT_PLTREL
,
15572 htab
->use_rel
? DT_REL
: DT_RELA
)
15573 || !add_dynamic_entry (DT_JMPREL
, 0))
15576 if (htab
->dt_tlsdesc_plt
&&
15577 (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
15578 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
15586 if (!add_dynamic_entry (DT_REL
, 0)
15587 || !add_dynamic_entry (DT_RELSZ
, 0)
15588 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
15593 if (!add_dynamic_entry (DT_RELA
, 0)
15594 || !add_dynamic_entry (DT_RELASZ
, 0)
15595 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
15600 /* If any dynamic relocs apply to a read-only section,
15601 then we need a DT_TEXTREL entry. */
15602 if ((info
->flags
& DF_TEXTREL
) == 0)
15603 elf_link_hash_traverse (& htab
->root
, elf32_arm_readonly_dynrelocs
,
15606 if ((info
->flags
& DF_TEXTREL
) != 0)
15608 if (!add_dynamic_entry (DT_TEXTREL
, 0))
15611 if (htab
->vxworks_p
15612 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
15615 #undef add_dynamic_entry
15620 /* Size sections even though they're not dynamic. We use it to setup
15621 _TLS_MODULE_BASE_, if needed. */
15624 elf32_arm_always_size_sections (bfd
*output_bfd
,
15625 struct bfd_link_info
*info
)
15629 if (bfd_link_relocatable (info
))
15632 tls_sec
= elf_hash_table (info
)->tls_sec
;
15636 struct elf_link_hash_entry
*tlsbase
;
15638 tlsbase
= elf_link_hash_lookup
15639 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
15643 struct bfd_link_hash_entry
*bh
= NULL
;
15644 const struct elf_backend_data
*bed
15645 = get_elf_backend_data (output_bfd
);
15647 if (!(_bfd_generic_link_add_one_symbol
15648 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
15649 tls_sec
, 0, NULL
, FALSE
,
15650 bed
->collect
, &bh
)))
15653 tlsbase
->type
= STT_TLS
;
15654 tlsbase
= (struct elf_link_hash_entry
*)bh
;
15655 tlsbase
->def_regular
= 1;
15656 tlsbase
->other
= STV_HIDDEN
;
15657 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
15663 /* Finish up dynamic symbol handling. We set the contents of various
15664 dynamic sections here. */
15667 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
15668 struct bfd_link_info
* info
,
15669 struct elf_link_hash_entry
* h
,
15670 Elf_Internal_Sym
* sym
)
15672 struct elf32_arm_link_hash_table
*htab
;
15673 struct elf32_arm_link_hash_entry
*eh
;
15675 htab
= elf32_arm_hash_table (info
);
15679 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15681 if (h
->plt
.offset
!= (bfd_vma
) -1)
15685 BFD_ASSERT (h
->dynindx
!= -1);
15686 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
15691 if (!h
->def_regular
)
15693 /* Mark the symbol as undefined, rather than as defined in
15694 the .plt section. */
15695 sym
->st_shndx
= SHN_UNDEF
;
15696 /* If the symbol is weak we need to clear the value.
15697 Otherwise, the PLT entry would provide a definition for
15698 the symbol even if the symbol wasn't defined anywhere,
15699 and so the symbol would never be NULL. Leave the value if
15700 there were any relocations where pointer equality matters
15701 (this is a clue for the dynamic linker, to make function
15702 pointer comparisons work between an application and shared
15704 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
15707 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
15709 /* At least one non-call relocation references this .iplt entry,
15710 so the .iplt entry is the function's canonical address. */
15711 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
15712 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
15713 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
15714 (output_bfd
, htab
->root
.iplt
->output_section
));
15715 sym
->st_value
= (h
->plt
.offset
15716 + htab
->root
.iplt
->output_section
->vma
15717 + htab
->root
.iplt
->output_offset
);
15724 Elf_Internal_Rela rel
;
15726 /* This symbol needs a copy reloc. Set it up. */
15727 BFD_ASSERT (h
->dynindx
!= -1
15728 && (h
->root
.type
== bfd_link_hash_defined
15729 || h
->root
.type
== bfd_link_hash_defweak
));
15732 BFD_ASSERT (s
!= NULL
);
15735 rel
.r_offset
= (h
->root
.u
.def
.value
15736 + h
->root
.u
.def
.section
->output_section
->vma
15737 + h
->root
.u
.def
.section
->output_offset
);
15738 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
15739 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
15742 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15743 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15744 to the ".got" section. */
15745 if (h
== htab
->root
.hdynamic
15746 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
15747 sym
->st_shndx
= SHN_ABS
;
15753 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
15755 const unsigned long *template, unsigned count
)
15759 for (ix
= 0; ix
!= count
; ix
++)
15761 unsigned long insn
= template[ix
];
15763 /* Emit mov pc,rx if bx is not permitted. */
15764 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
15765 insn
= (insn
& 0xf000000f) | 0x01a0f000;
15766 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
15770 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15771 other variants, NaCl needs this entry in a static executable's
15772 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15773 zero. For .iplt really only the last bundle is useful, and .iplt
15774 could have a shorter first entry, with each individual PLT entry's
15775 relative branch calculated differently so it targets the last
15776 bundle instead of the instruction before it (labelled .Lplt_tail
15777 above). But it's simpler to keep the size and layout of PLT0
15778 consistent with the dynamic case, at the cost of some dead code at
15779 the start of .iplt and the one dead store to the stack at the start
15782 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
15783 asection
*plt
, bfd_vma got_displacement
)
15787 put_arm_insn (htab
, output_bfd
,
15788 elf32_arm_nacl_plt0_entry
[0]
15789 | arm_movw_immediate (got_displacement
),
15790 plt
->contents
+ 0);
15791 put_arm_insn (htab
, output_bfd
,
15792 elf32_arm_nacl_plt0_entry
[1]
15793 | arm_movt_immediate (got_displacement
),
15794 plt
->contents
+ 4);
15796 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
15797 put_arm_insn (htab
, output_bfd
,
15798 elf32_arm_nacl_plt0_entry
[i
],
15799 plt
->contents
+ (i
* 4));
15802 /* Finish up the dynamic sections. */
15805 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
15810 struct elf32_arm_link_hash_table
*htab
;
15812 htab
= elf32_arm_hash_table (info
);
15816 dynobj
= elf_hash_table (info
)->dynobj
;
15818 sgot
= htab
->root
.sgotplt
;
15819 /* A broken linker script might have discarded the dynamic sections.
15820 Catch this here so that we do not seg-fault later on. */
15821 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
15823 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
15825 if (elf_hash_table (info
)->dynamic_sections_created
)
15828 Elf32_External_Dyn
*dyncon
, *dynconend
;
15830 splt
= htab
->root
.splt
;
15831 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
15832 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
15834 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
15835 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
15837 for (; dyncon
< dynconend
; dyncon
++)
15839 Elf_Internal_Dyn dyn
;
15843 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
15850 if (htab
->vxworks_p
15851 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
15852 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15857 goto get_vma_if_bpabi
;
15860 goto get_vma_if_bpabi
;
15863 goto get_vma_if_bpabi
;
15865 name
= ".gnu.version";
15866 goto get_vma_if_bpabi
;
15868 name
= ".gnu.version_d";
15869 goto get_vma_if_bpabi
;
15871 name
= ".gnu.version_r";
15872 goto get_vma_if_bpabi
;
15875 name
= htab
->symbian_p
? ".got" : ".got.plt";
15878 name
= RELOC_SECTION (htab
, ".plt");
15880 s
= bfd_get_linker_section (dynobj
, name
);
15883 (*_bfd_error_handler
)
15884 (_("could not find section %s"), name
);
15885 bfd_set_error (bfd_error_invalid_operation
);
15888 if (!htab
->symbian_p
)
15889 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
15891 /* In the BPABI, tags in the PT_DYNAMIC section point
15892 at the file offset, not the memory address, for the
15893 convenience of the post linker. */
15894 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
15895 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15899 if (htab
->symbian_p
)
15904 s
= htab
->root
.srelplt
;
15905 BFD_ASSERT (s
!= NULL
);
15906 dyn
.d_un
.d_val
= s
->size
;
15907 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15912 if (!htab
->symbian_p
)
15914 /* My reading of the SVR4 ABI indicates that the
15915 procedure linkage table relocs (DT_JMPREL) should be
15916 included in the overall relocs (DT_REL). This is
15917 what Solaris does. However, UnixWare can not handle
15918 that case. Therefore, we override the DT_RELSZ entry
15919 here to make it not include the JMPREL relocs. Since
15920 the linker script arranges for .rel(a).plt to follow all
15921 other relocation sections, we don't have to worry
15922 about changing the DT_REL entry. */
15923 s
= htab
->root
.srelplt
;
15925 dyn
.d_un
.d_val
-= s
->size
;
15926 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15929 /* Fall through. */
15933 /* In the BPABI, the DT_REL tag must point at the file
15934 offset, not the VMA, of the first relocation
15935 section. So, we use code similar to that in
15936 elflink.c, but do not check for SHF_ALLOC on the
15937 relcoation section, since relocations sections are
15938 never allocated under the BPABI. The comments above
15939 about Unixware notwithstanding, we include all of the
15940 relocations here. */
15941 if (htab
->symbian_p
)
15944 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
15945 ? SHT_REL
: SHT_RELA
);
15946 dyn
.d_un
.d_val
= 0;
15947 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
15949 Elf_Internal_Shdr
*hdr
15950 = elf_elfsections (output_bfd
)[i
];
15951 if (hdr
->sh_type
== type
)
15953 if (dyn
.d_tag
== DT_RELSZ
15954 || dyn
.d_tag
== DT_RELASZ
)
15955 dyn
.d_un
.d_val
+= hdr
->sh_size
;
15956 else if ((ufile_ptr
) hdr
->sh_offset
15957 <= dyn
.d_un
.d_val
- 1)
15958 dyn
.d_un
.d_val
= hdr
->sh_offset
;
15961 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15965 case DT_TLSDESC_PLT
:
15966 s
= htab
->root
.splt
;
15967 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
15968 + htab
->dt_tlsdesc_plt
);
15969 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15972 case DT_TLSDESC_GOT
:
15973 s
= htab
->root
.sgot
;
15974 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
15975 + htab
->dt_tlsdesc_got
);
15976 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15979 /* Set the bottom bit of DT_INIT/FINI if the
15980 corresponding function is Thumb. */
15982 name
= info
->init_function
;
15985 name
= info
->fini_function
;
15987 /* If it wasn't set by elf_bfd_final_link
15988 then there is nothing to adjust. */
15989 if (dyn
.d_un
.d_val
!= 0)
15991 struct elf_link_hash_entry
* eh
;
15993 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
15994 FALSE
, FALSE
, TRUE
);
15996 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
15997 == ST_BRANCH_TO_THUMB
)
15999 dyn
.d_un
.d_val
|= 1;
16000 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16007 /* Fill in the first entry in the procedure linkage table. */
16008 if (splt
->size
> 0 && htab
->plt_header_size
)
16010 const bfd_vma
*plt0_entry
;
16011 bfd_vma got_address
, plt_address
, got_displacement
;
16013 /* Calculate the addresses of the GOT and PLT. */
16014 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
16015 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
16017 if (htab
->vxworks_p
)
16019 /* The VxWorks GOT is relocated by the dynamic linker.
16020 Therefore, we must emit relocations rather than simply
16021 computing the values now. */
16022 Elf_Internal_Rela rel
;
16024 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
16025 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16026 splt
->contents
+ 0);
16027 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16028 splt
->contents
+ 4);
16029 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16030 splt
->contents
+ 8);
16031 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
16033 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16034 rel
.r_offset
= plt_address
+ 12;
16035 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16037 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
16038 htab
->srelplt2
->contents
);
16040 else if (htab
->nacl_p
)
16041 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
16042 got_address
+ 8 - (plt_address
+ 16));
16043 else if (using_thumb_only (htab
))
16045 got_displacement
= got_address
- (plt_address
+ 12);
16047 plt0_entry
= elf32_thumb2_plt0_entry
;
16048 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16049 splt
->contents
+ 0);
16050 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16051 splt
->contents
+ 4);
16052 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16053 splt
->contents
+ 8);
16055 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
16059 got_displacement
= got_address
- (plt_address
+ 16);
16061 plt0_entry
= elf32_arm_plt0_entry
;
16062 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16063 splt
->contents
+ 0);
16064 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16065 splt
->contents
+ 4);
16066 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16067 splt
->contents
+ 8);
16068 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
16069 splt
->contents
+ 12);
16071 #ifdef FOUR_WORD_PLT
16072 /* The displacement value goes in the otherwise-unused
16073 last word of the second entry. */
16074 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
16076 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
16081 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16082 really seem like the right value. */
16083 if (splt
->output_section
->owner
== output_bfd
)
16084 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
16086 if (htab
->dt_tlsdesc_plt
)
16088 bfd_vma got_address
16089 = sgot
->output_section
->vma
+ sgot
->output_offset
;
16090 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
16091 + htab
->root
.sgot
->output_offset
);
16092 bfd_vma plt_address
16093 = splt
->output_section
->vma
+ splt
->output_offset
;
16095 arm_put_trampoline (htab
, output_bfd
,
16096 splt
->contents
+ htab
->dt_tlsdesc_plt
,
16097 dl_tlsdesc_lazy_trampoline
, 6);
16099 bfd_put_32 (output_bfd
,
16100 gotplt_address
+ htab
->dt_tlsdesc_got
16101 - (plt_address
+ htab
->dt_tlsdesc_plt
)
16102 - dl_tlsdesc_lazy_trampoline
[6],
16103 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
16104 bfd_put_32 (output_bfd
,
16105 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
16106 - dl_tlsdesc_lazy_trampoline
[7],
16107 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
16110 if (htab
->tls_trampoline
)
16112 arm_put_trampoline (htab
, output_bfd
,
16113 splt
->contents
+ htab
->tls_trampoline
,
16114 tls_trampoline
, 3);
16115 #ifdef FOUR_WORD_PLT
16116 bfd_put_32 (output_bfd
, 0x00000000,
16117 splt
->contents
+ htab
->tls_trampoline
+ 12);
16121 if (htab
->vxworks_p
16122 && !bfd_link_pic (info
)
16123 && htab
->root
.splt
->size
> 0)
16125 /* Correct the .rel(a).plt.unloaded relocations. They will have
16126 incorrect symbol indexes. */
16130 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
16131 / htab
->plt_entry_size
);
16132 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
16134 for (; num_plts
; num_plts
--)
16136 Elf_Internal_Rela rel
;
16138 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16139 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16140 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16141 p
+= RELOC_SIZE (htab
);
16143 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16144 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
16145 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16146 p
+= RELOC_SIZE (htab
);
16151 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
16152 /* NaCl uses a special first entry in .iplt too. */
16153 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
16155 /* Fill in the first three entries in the global offset table. */
16158 if (sgot
->size
> 0)
16161 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
16163 bfd_put_32 (output_bfd
,
16164 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
16166 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
16167 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
16170 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
16177 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
16179 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
16180 struct elf32_arm_link_hash_table
*globals
;
16181 struct elf_segment_map
*m
;
16183 i_ehdrp
= elf_elfheader (abfd
);
16185 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
16186 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
16188 _bfd_elf_post_process_headers (abfd
, link_info
);
16189 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
16193 globals
= elf32_arm_hash_table (link_info
);
16194 if (globals
!= NULL
&& globals
->byteswap_code
)
16195 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
16198 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
16199 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
16201 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
16202 if (abi
== AEABI_VFP_args_vfp
)
16203 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
16205 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
16208 /* Scan segment to set p_flags attribute if it contains only sections with
16209 SHF_ARM_PURECODE flag. */
16210 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
16216 for (j
= 0; j
< m
->count
; j
++)
16218 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
16224 m
->p_flags_valid
= 1;
16229 static enum elf_reloc_type_class
16230 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
16231 const asection
*rel_sec ATTRIBUTE_UNUSED
,
16232 const Elf_Internal_Rela
*rela
)
16234 switch ((int) ELF32_R_TYPE (rela
->r_info
))
16236 case R_ARM_RELATIVE
:
16237 return reloc_class_relative
;
16238 case R_ARM_JUMP_SLOT
:
16239 return reloc_class_plt
;
16241 return reloc_class_copy
;
16242 case R_ARM_IRELATIVE
:
16243 return reloc_class_ifunc
;
16245 return reloc_class_normal
;
16250 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
16252 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
16255 /* Return TRUE if this is an unwinding table entry. */
16258 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
16260 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
16261 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
16265 /* Set the type and flags for an ARM section. We do this by
16266 the section name, which is a hack, but ought to work. */
16269 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
16273 name
= bfd_get_section_name (abfd
, sec
);
16275 if (is_arm_elf_unwind_section_name (abfd
, name
))
16277 hdr
->sh_type
= SHT_ARM_EXIDX
;
16278 hdr
->sh_flags
|= SHF_LINK_ORDER
;
16281 if (sec
->flags
& SEC_ELF_PURECODE
)
16282 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
16287 /* Handle an ARM specific section when reading an object file. This is
16288 called when bfd_section_from_shdr finds a section with an unknown
16292 elf32_arm_section_from_shdr (bfd
*abfd
,
16293 Elf_Internal_Shdr
* hdr
,
16297 /* There ought to be a place to keep ELF backend specific flags, but
16298 at the moment there isn't one. We just keep track of the
16299 sections by their name, instead. Fortunately, the ABI gives
16300 names for all the ARM specific sections, so we will probably get
16302 switch (hdr
->sh_type
)
16304 case SHT_ARM_EXIDX
:
16305 case SHT_ARM_PREEMPTMAP
:
16306 case SHT_ARM_ATTRIBUTES
:
16313 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
16319 static _arm_elf_section_data
*
16320 get_arm_elf_section_data (asection
* sec
)
16322 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
16323 return elf32_arm_section_data (sec
);
16331 struct bfd_link_info
*info
;
16334 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
16335 asection
*, struct elf_link_hash_entry
*);
16336 } output_arch_syminfo
;
16338 enum map_symbol_type
16346 /* Output a single mapping symbol. */
16349 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
16350 enum map_symbol_type type
,
16353 static const char *names
[3] = {"$a", "$t", "$d"};
16354 Elf_Internal_Sym sym
;
16356 sym
.st_value
= osi
->sec
->output_section
->vma
16357 + osi
->sec
->output_offset
16361 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
16362 sym
.st_shndx
= osi
->sec_shndx
;
16363 sym
.st_target_internal
= 0;
16364 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
16365 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
16368 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16369 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16372 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
16373 bfd_boolean is_iplt_entry_p
,
16374 union gotplt_union
*root_plt
,
16375 struct arm_plt_info
*arm_plt
)
16377 struct elf32_arm_link_hash_table
*htab
;
16378 bfd_vma addr
, plt_header_size
;
16380 if (root_plt
->offset
== (bfd_vma
) -1)
16383 htab
= elf32_arm_hash_table (osi
->info
);
16387 if (is_iplt_entry_p
)
16389 osi
->sec
= htab
->root
.iplt
;
16390 plt_header_size
= 0;
16394 osi
->sec
= htab
->root
.splt
;
16395 plt_header_size
= htab
->plt_header_size
;
16397 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
16398 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
16400 addr
= root_plt
->offset
& -2;
16401 if (htab
->symbian_p
)
16403 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16405 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
16408 else if (htab
->vxworks_p
)
16410 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16412 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
16414 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
16416 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
16419 else if (htab
->nacl_p
)
16421 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16424 else if (using_thumb_only (htab
))
16426 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
16431 bfd_boolean thumb_stub_p
;
16433 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
16436 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
16439 #ifdef FOUR_WORD_PLT
16440 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16442 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
16445 /* A three-word PLT with no Thumb thunk contains only Arm code,
16446 so only need to output a mapping symbol for the first PLT entry and
16447 entries with thumb thunks. */
16448 if (thumb_stub_p
|| addr
== plt_header_size
)
16450 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16459 /* Output mapping symbols for PLT entries associated with H. */
16462 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
16464 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
16465 struct elf32_arm_link_hash_entry
*eh
;
16467 if (h
->root
.type
== bfd_link_hash_indirect
)
16470 if (h
->root
.type
== bfd_link_hash_warning
)
16471 /* When warning symbols are created, they **replace** the "real"
16472 entry in the hash table, thus we never get to see the real
16473 symbol in a hash traversal. So look at it now. */
16474 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
16476 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16477 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
16478 &h
->plt
, &eh
->plt
);
16481 /* Bind a veneered symbol to its veneer identified by its hash entry
16482 STUB_ENTRY. The veneered location thus loose its symbol. */
16485 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
16487 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
16490 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
16491 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
16492 hash
->root
.size
= stub_entry
->stub_size
;
16495 /* Output a single local symbol for a generated stub. */
16498 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
16499 bfd_vma offset
, bfd_vma size
)
16501 Elf_Internal_Sym sym
;
16503 sym
.st_value
= osi
->sec
->output_section
->vma
16504 + osi
->sec
->output_offset
16506 sym
.st_size
= size
;
16508 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16509 sym
.st_shndx
= osi
->sec_shndx
;
16510 sym
.st_target_internal
= 0;
16511 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
16515 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
16518 struct elf32_arm_stub_hash_entry
*stub_entry
;
16519 asection
*stub_sec
;
16522 output_arch_syminfo
*osi
;
16523 const insn_sequence
*template_sequence
;
16524 enum stub_insn_type prev_type
;
16527 enum map_symbol_type sym_type
;
16529 /* Massage our args to the form they really have. */
16530 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16531 osi
= (output_arch_syminfo
*) in_arg
;
16533 stub_sec
= stub_entry
->stub_sec
;
16535 /* Ensure this stub is attached to the current section being
16537 if (stub_sec
!= osi
->sec
)
16540 addr
= (bfd_vma
) stub_entry
->stub_offset
;
16541 template_sequence
= stub_entry
->stub_template
;
16543 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
16544 arm_stub_claim_sym (stub_entry
);
16547 stub_name
= stub_entry
->output_name
;
16548 switch (template_sequence
[0].type
)
16551 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
16552 stub_entry
->stub_size
))
16557 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
16558 stub_entry
->stub_size
))
16567 prev_type
= DATA_TYPE
;
16569 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
16571 switch (template_sequence
[i
].type
)
16574 sym_type
= ARM_MAP_ARM
;
16579 sym_type
= ARM_MAP_THUMB
;
16583 sym_type
= ARM_MAP_DATA
;
16591 if (template_sequence
[i
].type
!= prev_type
)
16593 prev_type
= template_sequence
[i
].type
;
16594 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
16598 switch (template_sequence
[i
].type
)
16622 /* Output mapping symbols for linker generated sections,
16623 and for those data-only sections that do not have a
16627 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
16628 struct bfd_link_info
*info
,
16630 int (*func
) (void *, const char *,
16631 Elf_Internal_Sym
*,
16633 struct elf_link_hash_entry
*))
16635 output_arch_syminfo osi
;
16636 struct elf32_arm_link_hash_table
*htab
;
16638 bfd_size_type size
;
16641 htab
= elf32_arm_hash_table (info
);
16645 check_use_blx (htab
);
16647 osi
.flaginfo
= flaginfo
;
16651 /* Add a $d mapping symbol to data-only sections that
16652 don't have any mapping symbol. This may result in (harmless) redundant
16653 mapping symbols. */
16654 for (input_bfd
= info
->input_bfds
;
16656 input_bfd
= input_bfd
->link
.next
)
16658 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
16659 for (osi
.sec
= input_bfd
->sections
;
16661 osi
.sec
= osi
.sec
->next
)
16663 if (osi
.sec
->output_section
!= NULL
16664 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
16666 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
16667 == SEC_HAS_CONTENTS
16668 && get_arm_elf_section_data (osi
.sec
) != NULL
16669 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
16670 && osi
.sec
->size
> 0
16671 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
16673 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16674 (output_bfd
, osi
.sec
->output_section
);
16675 if (osi
.sec_shndx
!= (int)SHN_BAD
)
16676 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
16681 /* ARM->Thumb glue. */
16682 if (htab
->arm_glue_size
> 0)
16684 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16685 ARM2THUMB_GLUE_SECTION_NAME
);
16687 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16688 (output_bfd
, osi
.sec
->output_section
);
16689 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
16690 || htab
->pic_veneer
)
16691 size
= ARM2THUMB_PIC_GLUE_SIZE
;
16692 else if (htab
->use_blx
)
16693 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
16695 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
16697 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
16699 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
16700 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
16704 /* Thumb->ARM glue. */
16705 if (htab
->thumb_glue_size
> 0)
16707 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16708 THUMB2ARM_GLUE_SECTION_NAME
);
16710 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16711 (output_bfd
, osi
.sec
->output_section
);
16712 size
= THUMB2ARM_GLUE_SIZE
;
16714 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
16716 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
16717 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
16721 /* ARMv4 BX veneers. */
16722 if (htab
->bx_glue_size
> 0)
16724 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16725 ARM_BX_GLUE_SECTION_NAME
);
16727 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16728 (output_bfd
, osi
.sec
->output_section
);
16730 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
16733 /* Long calls stubs. */
16734 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
16736 asection
* stub_sec
;
16738 for (stub_sec
= htab
->stub_bfd
->sections
;
16740 stub_sec
= stub_sec
->next
)
16742 /* Ignore non-stub sections. */
16743 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
16746 osi
.sec
= stub_sec
;
16748 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16749 (output_bfd
, osi
.sec
->output_section
);
16751 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
16755 /* Finally, output mapping symbols for the PLT. */
16756 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
16758 osi
.sec
= htab
->root
.splt
;
16759 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
16760 (output_bfd
, osi
.sec
->output_section
));
16762 /* Output mapping symbols for the plt header. SymbianOS does not have a
16764 if (htab
->vxworks_p
)
16766 /* VxWorks shared libraries have no PLT header. */
16767 if (!bfd_link_pic (info
))
16769 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16771 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
16775 else if (htab
->nacl_p
)
16777 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16780 else if (using_thumb_only (htab
))
16782 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
16784 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
16786 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
16789 else if (!htab
->symbian_p
)
16791 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16793 #ifndef FOUR_WORD_PLT
16794 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
16799 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
16801 /* NaCl uses a special first entry in .iplt too. */
16802 osi
.sec
= htab
->root
.iplt
;
16803 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
16804 (output_bfd
, osi
.sec
->output_section
));
16805 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16808 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
16809 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
16811 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
16812 for (input_bfd
= info
->input_bfds
;
16814 input_bfd
= input_bfd
->link
.next
)
16816 struct arm_local_iplt_info
**local_iplt
;
16817 unsigned int i
, num_syms
;
16819 local_iplt
= elf32_arm_local_iplt (input_bfd
);
16820 if (local_iplt
!= NULL
)
16822 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
16823 for (i
= 0; i
< num_syms
; i
++)
16824 if (local_iplt
[i
] != NULL
16825 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
16826 &local_iplt
[i
]->root
,
16827 &local_iplt
[i
]->arm
))
16832 if (htab
->dt_tlsdesc_plt
!= 0)
16834 /* Mapping symbols for the lazy tls trampoline. */
16835 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
16838 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
16839 htab
->dt_tlsdesc_plt
+ 24))
16842 if (htab
->tls_trampoline
!= 0)
16844 /* Mapping symbols for the tls trampoline. */
16845 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
16847 #ifdef FOUR_WORD_PLT
16848 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
16849 htab
->tls_trampoline
+ 12))
16857 /* Allocate target specific section data. */
16860 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
16862 if (!sec
->used_by_bfd
)
16864 _arm_elf_section_data
*sdata
;
16865 bfd_size_type amt
= sizeof (*sdata
);
16867 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
16870 sec
->used_by_bfd
= sdata
;
16873 return _bfd_elf_new_section_hook (abfd
, sec
);
16877 /* Used to order a list of mapping symbols by address. */
16880 elf32_arm_compare_mapping (const void * a
, const void * b
)
16882 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
16883 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
16885 if (amap
->vma
> bmap
->vma
)
16887 else if (amap
->vma
< bmap
->vma
)
16889 else if (amap
->type
> bmap
->type
)
16890 /* Ensure results do not depend on the host qsort for objects with
16891 multiple mapping symbols at the same address by sorting on type
16894 else if (amap
->type
< bmap
->type
)
16900 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16902 static unsigned long
16903 offset_prel31 (unsigned long addr
, bfd_vma offset
)
16905 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
16908 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16912 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
16914 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
16915 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
16917 /* High bit of first word is supposed to be zero. */
16918 if ((first_word
& 0x80000000ul
) == 0)
16919 first_word
= offset_prel31 (first_word
, offset
);
16921 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16922 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16923 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
16924 second_word
= offset_prel31 (second_word
, offset
);
16926 bfd_put_32 (output_bfd
, first_word
, to
);
16927 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
16930 /* Data for make_branch_to_a8_stub(). */
16932 struct a8_branch_to_stub_data
16934 asection
*writing_section
;
16935 bfd_byte
*contents
;
16939 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16940 places for a particular section. */
16943 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
16946 struct elf32_arm_stub_hash_entry
*stub_entry
;
16947 struct a8_branch_to_stub_data
*data
;
16948 bfd_byte
*contents
;
16949 unsigned long branch_insn
;
16950 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
16951 bfd_signed_vma branch_offset
;
16955 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16956 data
= (struct a8_branch_to_stub_data
*) in_arg
;
16958 if (stub_entry
->target_section
!= data
->writing_section
16959 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
16962 contents
= data
->contents
;
16964 /* We use target_section as Cortex-A8 erratum workaround stubs are only
16965 generated when both source and target are in the same section. */
16966 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
16967 + stub_entry
->target_section
->output_offset
16968 + stub_entry
->source_value
;
16970 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
16971 + stub_entry
->stub_sec
->output_offset
16972 + stub_entry
->stub_offset
;
16974 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
16975 veneered_insn_loc
&= ~3u;
16977 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
16979 abfd
= stub_entry
->target_section
->owner
;
16980 loc
= stub_entry
->source_value
;
16982 /* We attempt to avoid this condition by setting stubs_always_after_branch
16983 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16984 This check is just to be on the safe side... */
16985 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
16987 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub is "
16988 "allocated in unsafe location"), abfd
);
16992 switch (stub_entry
->stub_type
)
16994 case arm_stub_a8_veneer_b
:
16995 case arm_stub_a8_veneer_b_cond
:
16996 branch_insn
= 0xf0009000;
16999 case arm_stub_a8_veneer_blx
:
17000 branch_insn
= 0xf000e800;
17003 case arm_stub_a8_veneer_bl
:
17005 unsigned int i1
, j1
, i2
, j2
, s
;
17007 branch_insn
= 0xf000d000;
17010 if (branch_offset
< -16777216 || branch_offset
> 16777214)
17012 /* There's not much we can do apart from complain if this
17014 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub out "
17015 "of range (input file too large)"), abfd
);
17019 /* i1 = not(j1 eor s), so:
17021 j1 = (not i1) eor s. */
17023 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
17024 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
17025 i2
= (branch_offset
>> 22) & 1;
17026 i1
= (branch_offset
>> 23) & 1;
17027 s
= (branch_offset
>> 24) & 1;
17030 branch_insn
|= j2
<< 11;
17031 branch_insn
|= j1
<< 13;
17032 branch_insn
|= s
<< 26;
17041 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
17042 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
17047 /* Beginning of stm32l4xx work-around. */
17049 /* Functions encoding instructions necessary for the emission of the
17050 fix-stm32l4xx-629360.
17051 Encoding is extracted from the
17052 ARM (C) Architecture Reference Manual
17053 ARMv7-A and ARMv7-R edition
17054 ARM DDI 0406C.b (ID072512). */
17056 static inline bfd_vma
17057 create_instruction_branch_absolute (int branch_offset
)
17059 /* A8.8.18 B (A8-334)
17060 B target_address (Encoding T4). */
17061 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17062 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17063 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17065 int s
= ((branch_offset
& 0x1000000) >> 24);
17066 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
17067 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
17069 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
17070 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17072 bfd_vma patched_inst
= 0xf0009000
17074 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
17075 | j1
<< 13 /* J1. */
17076 | j2
<< 11 /* J2. */
17077 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
17079 return patched_inst
;
17082 static inline bfd_vma
17083 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
17085 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17086 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17087 bfd_vma patched_inst
= 0xe8900000
17088 | (/*W=*/wback
<< 21)
17090 | (reg_mask
& 0x0000ffff);
17092 return patched_inst
;
17095 static inline bfd_vma
17096 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
17098 /* A8.8.60 LDMDB/LDMEA (A8-402)
17099 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17100 bfd_vma patched_inst
= 0xe9100000
17101 | (/*W=*/wback
<< 21)
17103 | (reg_mask
& 0x0000ffff);
17105 return patched_inst
;
17108 static inline bfd_vma
17109 create_instruction_mov (int target_reg
, int source_reg
)
17111 /* A8.8.103 MOV (register) (A8-486)
17112 MOV Rd, Rm (Encoding T1). */
17113 bfd_vma patched_inst
= 0x4600
17114 | (target_reg
& 0x7)
17115 | ((target_reg
& 0x8) >> 3) << 7
17116 | (source_reg
<< 3);
17118 return patched_inst
;
17121 static inline bfd_vma
17122 create_instruction_sub (int target_reg
, int source_reg
, int value
)
17124 /* A8.8.221 SUB (immediate) (A8-708)
17125 SUB Rd, Rn, #value (Encoding T3). */
17126 bfd_vma patched_inst
= 0xf1a00000
17127 | (target_reg
<< 8)
17128 | (source_reg
<< 16)
17130 | ((value
& 0x800) >> 11) << 26
17131 | ((value
& 0x700) >> 8) << 12
17134 return patched_inst
;
17137 static inline bfd_vma
17138 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
17141 /* A8.8.332 VLDM (A8-922)
17142 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17143 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
17144 | (/*W=*/wback
<< 21)
17146 | (num_words
& 0x000000ff)
17147 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
17148 | (first_reg
& 0x00000001) << 22;
17150 return patched_inst
;
17153 static inline bfd_vma
17154 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
17157 /* A8.8.332 VLDM (A8-922)
17158 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17159 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
17161 | (num_words
& 0x000000ff)
17162 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
17163 | (first_reg
& 0x00000001) << 22;
17165 return patched_inst
;
17168 static inline bfd_vma
17169 create_instruction_udf_w (int value
)
17171 /* A8.8.247 UDF (A8-758)
17172 Undefined (Encoding T2). */
17173 bfd_vma patched_inst
= 0xf7f0a000
17174 | (value
& 0x00000fff)
17175 | (value
& 0x000f0000) << 16;
17177 return patched_inst
;
17180 static inline bfd_vma
17181 create_instruction_udf (int value
)
17183 /* A8.8.247 UDF (A8-758)
17184 Undefined (Encoding T1). */
17185 bfd_vma patched_inst
= 0xde00
17188 return patched_inst
;
17191 /* Functions writing an instruction in memory, returning the next
17192 memory position to write to. */
17194 static inline bfd_byte
*
17195 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
17196 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17198 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
17202 static inline bfd_byte
*
17203 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
17204 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17206 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
17210 /* Function filling up a region in memory with T1 and T2 UDFs taking
17211 care of alignment. */
17214 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
17216 const bfd_byte
* const base_stub_contents
,
17217 bfd_byte
* const from_stub_contents
,
17218 const bfd_byte
* const end_stub_contents
)
17220 bfd_byte
*current_stub_contents
= from_stub_contents
;
17222 /* Fill the remaining of the stub with deterministic contents : UDF
17224 Check if realignment is needed on modulo 4 frontier using T1, to
17226 if ((current_stub_contents
< end_stub_contents
)
17227 && !((current_stub_contents
- base_stub_contents
) % 2)
17228 && ((current_stub_contents
- base_stub_contents
) % 4))
17229 current_stub_contents
=
17230 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17231 create_instruction_udf (0));
17233 for (; current_stub_contents
< end_stub_contents
;)
17234 current_stub_contents
=
17235 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17236 create_instruction_udf_w (0));
17238 return current_stub_contents
;
17241 /* Functions writing the stream of instructions equivalent to the
17242 derived sequence for ldmia, ldmdb, vldm respectively. */
17245 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
17247 const insn32 initial_insn
,
17248 const bfd_byte
*const initial_insn_addr
,
17249 bfd_byte
*const base_stub_contents
)
17251 int wback
= (initial_insn
& 0x00200000) >> 21;
17252 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
17253 int insn_all_registers
= initial_insn
& 0x0000ffff;
17254 int insn_low_registers
, insn_high_registers
;
17255 int usable_register_mask
;
17256 int nb_registers
= popcount (insn_all_registers
);
17257 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17258 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17259 bfd_byte
*current_stub_contents
= base_stub_contents
;
17261 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
17263 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17264 smaller than 8 registers load sequences that do not cause the
17266 if (nb_registers
<= 8)
17268 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17269 current_stub_contents
=
17270 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17273 /* B initial_insn_addr+4. */
17275 current_stub_contents
=
17276 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17277 create_instruction_branch_absolute
17278 (initial_insn_addr
- current_stub_contents
));
17281 /* Fill the remaining of the stub with deterministic contents. */
17282 current_stub_contents
=
17283 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17284 base_stub_contents
, current_stub_contents
,
17285 base_stub_contents
+
17286 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17291 /* - reg_list[13] == 0. */
17292 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
17294 /* - reg_list[14] & reg_list[15] != 1. */
17295 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17297 /* - if (wback==1) reg_list[rn] == 0. */
17298 BFD_ASSERT (!wback
|| !restore_rn
);
17300 /* - nb_registers > 8. */
17301 BFD_ASSERT (popcount (insn_all_registers
) > 8);
17303 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17305 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17306 - One with the 7 lowest registers (register mask 0x007F)
17307 This LDM will finally contain between 2 and 7 registers
17308 - One with the 7 highest registers (register mask 0xDF80)
17309 This ldm will finally contain between 2 and 7 registers. */
17310 insn_low_registers
= insn_all_registers
& 0x007F;
17311 insn_high_registers
= insn_all_registers
& 0xDF80;
17313 /* A spare register may be needed during this veneer to temporarily
17314 handle the base register. This register will be restored with the
17315 last LDM operation.
17316 The usable register may be any general purpose register (that
17317 excludes PC, SP, LR : register mask is 0x1FFF). */
17318 usable_register_mask
= 0x1FFF;
17320 /* Generate the stub function. */
17323 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17324 current_stub_contents
=
17325 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17326 create_instruction_ldmia
17327 (rn
, /*wback=*/1, insn_low_registers
));
17329 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17330 current_stub_contents
=
17331 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17332 create_instruction_ldmia
17333 (rn
, /*wback=*/1, insn_high_registers
));
17336 /* B initial_insn_addr+4. */
17337 current_stub_contents
=
17338 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17339 create_instruction_branch_absolute
17340 (initial_insn_addr
- current_stub_contents
));
17343 else /* if (!wback). */
17347 /* If Rn is not part of the high-register-list, move it there. */
17348 if (!(insn_high_registers
& (1 << rn
)))
17350 /* Choose a Ri in the high-register-list that will be restored. */
17351 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17354 current_stub_contents
=
17355 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17356 create_instruction_mov (ri
, rn
));
17359 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17360 current_stub_contents
=
17361 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17362 create_instruction_ldmia
17363 (ri
, /*wback=*/1, insn_low_registers
));
17365 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17366 current_stub_contents
=
17367 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17368 create_instruction_ldmia
17369 (ri
, /*wback=*/0, insn_high_registers
));
17373 /* B initial_insn_addr+4. */
17374 current_stub_contents
=
17375 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17376 create_instruction_branch_absolute
17377 (initial_insn_addr
- current_stub_contents
));
17381 /* Fill the remaining of the stub with deterministic contents. */
17382 current_stub_contents
=
17383 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17384 base_stub_contents
, current_stub_contents
,
17385 base_stub_contents
+
17386 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17390 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
17392 const insn32 initial_insn
,
17393 const bfd_byte
*const initial_insn_addr
,
17394 bfd_byte
*const base_stub_contents
)
17396 int wback
= (initial_insn
& 0x00200000) >> 21;
17397 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
17398 int insn_all_registers
= initial_insn
& 0x0000ffff;
17399 int insn_low_registers
, insn_high_registers
;
17400 int usable_register_mask
;
17401 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17402 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17403 int nb_registers
= popcount (insn_all_registers
);
17404 bfd_byte
*current_stub_contents
= base_stub_contents
;
17406 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
17408 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17409 smaller than 8 registers load sequences that do not cause the
17411 if (nb_registers
<= 8)
17413 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17414 current_stub_contents
=
17415 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17418 /* B initial_insn_addr+4. */
17419 current_stub_contents
=
17420 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17421 create_instruction_branch_absolute
17422 (initial_insn_addr
- current_stub_contents
));
17424 /* Fill the remaining of the stub with deterministic contents. */
17425 current_stub_contents
=
17426 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17427 base_stub_contents
, current_stub_contents
,
17428 base_stub_contents
+
17429 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17434 /* - reg_list[13] == 0. */
17435 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
17437 /* - reg_list[14] & reg_list[15] != 1. */
17438 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17440 /* - if (wback==1) reg_list[rn] == 0. */
17441 BFD_ASSERT (!wback
|| !restore_rn
);
17443 /* - nb_registers > 8. */
17444 BFD_ASSERT (popcount (insn_all_registers
) > 8);
17446 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17448 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17449 - One with the 7 lowest registers (register mask 0x007F)
17450 This LDM will finally contain between 2 and 7 registers
17451 - One with the 7 highest registers (register mask 0xDF80)
17452 This ldm will finally contain between 2 and 7 registers. */
17453 insn_low_registers
= insn_all_registers
& 0x007F;
17454 insn_high_registers
= insn_all_registers
& 0xDF80;
17456 /* A spare register may be needed during this veneer to temporarily
17457 handle the base register. This register will be restored with
17458 the last LDM operation.
17459 The usable register may be any general purpose register (that excludes
17460 PC, SP, LR : register mask is 0x1FFF). */
17461 usable_register_mask
= 0x1FFF;
17463 /* Generate the stub function. */
17464 if (!wback
&& !restore_pc
&& !restore_rn
)
17466 /* Choose a Ri in the low-register-list that will be restored. */
17467 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
17470 current_stub_contents
=
17471 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17472 create_instruction_mov (ri
, rn
));
17474 /* LDMDB Ri!, {R-high-register-list}. */
17475 current_stub_contents
=
17476 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17477 create_instruction_ldmdb
17478 (ri
, /*wback=*/1, insn_high_registers
));
17480 /* LDMDB Ri, {R-low-register-list}. */
17481 current_stub_contents
=
17482 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17483 create_instruction_ldmdb
17484 (ri
, /*wback=*/0, insn_low_registers
));
17486 /* B initial_insn_addr+4. */
17487 current_stub_contents
=
17488 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17489 create_instruction_branch_absolute
17490 (initial_insn_addr
- current_stub_contents
));
17492 else if (wback
&& !restore_pc
&& !restore_rn
)
17494 /* LDMDB Rn!, {R-high-register-list}. */
17495 current_stub_contents
=
17496 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17497 create_instruction_ldmdb
17498 (rn
, /*wback=*/1, insn_high_registers
));
17500 /* LDMDB Rn!, {R-low-register-list}. */
17501 current_stub_contents
=
17502 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17503 create_instruction_ldmdb
17504 (rn
, /*wback=*/1, insn_low_registers
));
17506 /* B initial_insn_addr+4. */
17507 current_stub_contents
=
17508 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17509 create_instruction_branch_absolute
17510 (initial_insn_addr
- current_stub_contents
));
17512 else if (!wback
&& restore_pc
&& !restore_rn
)
17514 /* Choose a Ri in the high-register-list that will be restored. */
17515 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17517 /* SUB Ri, Rn, #(4*nb_registers). */
17518 current_stub_contents
=
17519 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17520 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
17522 /* LDMIA Ri!, {R-low-register-list}. */
17523 current_stub_contents
=
17524 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17525 create_instruction_ldmia
17526 (ri
, /*wback=*/1, insn_low_registers
));
17528 /* LDMIA Ri, {R-high-register-list}. */
17529 current_stub_contents
=
17530 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17531 create_instruction_ldmia
17532 (ri
, /*wback=*/0, insn_high_registers
));
17534 else if (wback
&& restore_pc
&& !restore_rn
)
17536 /* Choose a Ri in the high-register-list that will be restored. */
17537 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17539 /* SUB Rn, Rn, #(4*nb_registers) */
17540 current_stub_contents
=
17541 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17542 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
17545 current_stub_contents
=
17546 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17547 create_instruction_mov (ri
, rn
));
17549 /* LDMIA Ri!, {R-low-register-list}. */
17550 current_stub_contents
=
17551 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17552 create_instruction_ldmia
17553 (ri
, /*wback=*/1, insn_low_registers
));
17555 /* LDMIA Ri, {R-high-register-list}. */
17556 current_stub_contents
=
17557 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17558 create_instruction_ldmia
17559 (ri
, /*wback=*/0, insn_high_registers
));
17561 else if (!wback
&& !restore_pc
&& restore_rn
)
17564 if (!(insn_low_registers
& (1 << rn
)))
17566 /* Choose a Ri in the low-register-list that will be restored. */
17567 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
17570 current_stub_contents
=
17571 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17572 create_instruction_mov (ri
, rn
));
17575 /* LDMDB Ri!, {R-high-register-list}. */
17576 current_stub_contents
=
17577 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17578 create_instruction_ldmdb
17579 (ri
, /*wback=*/1, insn_high_registers
));
17581 /* LDMDB Ri, {R-low-register-list}. */
17582 current_stub_contents
=
17583 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17584 create_instruction_ldmdb
17585 (ri
, /*wback=*/0, insn_low_registers
));
17587 /* B initial_insn_addr+4. */
17588 current_stub_contents
=
17589 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17590 create_instruction_branch_absolute
17591 (initial_insn_addr
- current_stub_contents
));
17593 else if (!wback
&& restore_pc
&& restore_rn
)
17596 if (!(insn_high_registers
& (1 << rn
)))
17598 /* Choose a Ri in the high-register-list that will be restored. */
17599 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17602 /* SUB Ri, Rn, #(4*nb_registers). */
17603 current_stub_contents
=
17604 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17605 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
17607 /* LDMIA Ri!, {R-low-register-list}. */
17608 current_stub_contents
=
17609 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17610 create_instruction_ldmia
17611 (ri
, /*wback=*/1, insn_low_registers
));
17613 /* LDMIA Ri, {R-high-register-list}. */
17614 current_stub_contents
=
17615 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17616 create_instruction_ldmia
17617 (ri
, /*wback=*/0, insn_high_registers
));
17619 else if (wback
&& restore_rn
)
17621 /* The assembler should not have accepted to encode this. */
17622 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
17623 "undefined behavior.\n");
17626 /* Fill the remaining of the stub with deterministic contents. */
17627 current_stub_contents
=
17628 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17629 base_stub_contents
, current_stub_contents
,
17630 base_stub_contents
+
17631 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17636 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
17638 const insn32 initial_insn
,
17639 const bfd_byte
*const initial_insn_addr
,
17640 bfd_byte
*const base_stub_contents
)
17642 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
17643 bfd_byte
*current_stub_contents
= base_stub_contents
;
17645 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
17647 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17648 smaller than 8 words load sequences that do not cause the
17650 if (num_words
<= 8)
17652 /* Untouched instruction. */
17653 current_stub_contents
=
17654 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17657 /* B initial_insn_addr+4. */
17658 current_stub_contents
=
17659 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17660 create_instruction_branch_absolute
17661 (initial_insn_addr
- current_stub_contents
));
17665 bfd_boolean is_dp
= /* DP encoding. */
17666 (initial_insn
& 0xfe100f00) == 0xec100b00;
17667 bfd_boolean is_ia_nobang
= /* (IA without !). */
17668 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
17669 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
17670 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
17671 bfd_boolean is_db_bang
= /* (DB with !). */
17672 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
17673 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
17674 /* d = UInt (Vd:D);. */
17675 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
17676 | (((unsigned int)initial_insn
<< 9) >> 31);
17678 /* Compute the number of 8-words chunks needed to split. */
17679 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
17682 /* The test coverage has been done assuming the following
17683 hypothesis that exactly one of the previous is_ predicates is
17685 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
17686 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
17688 /* We treat the cutting of the words in one pass for all
17689 cases, then we emit the adjustments:
17692 -> vldm rx!, {8_words_or_less} for each needed 8_word
17693 -> sub rx, rx, #size (list)
17696 -> vldm rx!, {8_words_or_less} for each needed 8_word
17697 This also handles vpop instruction (when rx is sp)
17700 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
17701 for (chunk
= 0; chunk
< chunks
; ++chunk
)
17703 bfd_vma new_insn
= 0;
17705 if (is_ia_nobang
|| is_ia_bang
)
17707 new_insn
= create_instruction_vldmia
17711 chunks
- (chunk
+ 1) ?
17712 8 : num_words
- chunk
* 8,
17713 first_reg
+ chunk
* 8);
17715 else if (is_db_bang
)
17717 new_insn
= create_instruction_vldmdb
17720 chunks
- (chunk
+ 1) ?
17721 8 : num_words
- chunk
* 8,
17722 first_reg
+ chunk
* 8);
17726 current_stub_contents
=
17727 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17731 /* Only this case requires the base register compensation
17735 current_stub_contents
=
17736 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17737 create_instruction_sub
17738 (base_reg
, base_reg
, 4*num_words
));
17741 /* B initial_insn_addr+4. */
17742 current_stub_contents
=
17743 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17744 create_instruction_branch_absolute
17745 (initial_insn_addr
- current_stub_contents
));
17748 /* Fill the remaining of the stub with deterministic contents. */
17749 current_stub_contents
=
17750 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17751 base_stub_contents
, current_stub_contents
,
17752 base_stub_contents
+
17753 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
17757 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
17759 const insn32 wrong_insn
,
17760 const bfd_byte
*const wrong_insn_addr
,
17761 bfd_byte
*const stub_contents
)
17763 if (is_thumb2_ldmia (wrong_insn
))
17764 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
17765 wrong_insn
, wrong_insn_addr
,
17767 else if (is_thumb2_ldmdb (wrong_insn
))
17768 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
17769 wrong_insn
, wrong_insn_addr
,
17771 else if (is_thumb2_vldm (wrong_insn
))
17772 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
17773 wrong_insn
, wrong_insn_addr
,
17777 /* End of stm32l4xx work-around. */
17781 elf32_arm_add_relocation (bfd
*output_bfd
, struct bfd_link_info
*info
,
17782 asection
*output_sec
, Elf_Internal_Rela
*rel
)
17784 BFD_ASSERT (output_sec
&& rel
);
17785 struct bfd_elf_section_reloc_data
*output_reldata
;
17786 struct elf32_arm_link_hash_table
*htab
;
17787 struct bfd_elf_section_data
*oesd
= elf_section_data (output_sec
);
17788 Elf_Internal_Shdr
*rel_hdr
;
17793 rel_hdr
= oesd
->rel
.hdr
;
17794 output_reldata
= &(oesd
->rel
);
17796 else if (oesd
->rela
.hdr
)
17798 rel_hdr
= oesd
->rela
.hdr
;
17799 output_reldata
= &(oesd
->rela
);
17806 bfd_byte
*erel
= rel_hdr
->contents
;
17807 erel
+= output_reldata
->count
* rel_hdr
->sh_entsize
;
17808 htab
= elf32_arm_hash_table (info
);
17809 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, erel
);
17810 output_reldata
->count
++;
17813 /* Do code byteswapping. Return FALSE afterwards so that the section is
17814 written out as normal. */
17817 elf32_arm_write_section (bfd
*output_bfd
,
17818 struct bfd_link_info
*link_info
,
17820 bfd_byte
*contents
)
17822 unsigned int mapcount
, errcount
;
17823 _arm_elf_section_data
*arm_data
;
17824 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
17825 elf32_arm_section_map
*map
;
17826 elf32_vfp11_erratum_list
*errnode
;
17827 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
17830 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
17834 if (globals
== NULL
)
17837 /* If this section has not been allocated an _arm_elf_section_data
17838 structure then we cannot record anything. */
17839 arm_data
= get_arm_elf_section_data (sec
);
17840 if (arm_data
== NULL
)
17843 mapcount
= arm_data
->mapcount
;
17844 map
= arm_data
->map
;
17845 errcount
= arm_data
->erratumcount
;
17849 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
17851 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
17852 errnode
= errnode
->next
)
17854 bfd_vma target
= errnode
->vma
- offset
;
17856 switch (errnode
->type
)
17858 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
17860 bfd_vma branch_to_veneer
;
17861 /* Original condition code of instruction, plus bit mask for
17862 ARM B instruction. */
17863 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
17866 /* The instruction is before the label. */
17869 /* Above offset included in -4 below. */
17870 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
17871 - errnode
->vma
- 4;
17873 if ((signed) branch_to_veneer
< -(1 << 25)
17874 || (signed) branch_to_veneer
>= (1 << 25))
17875 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
17876 "range"), output_bfd
);
17878 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
17879 contents
[endianflip
^ target
] = insn
& 0xff;
17880 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
17881 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
17882 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
17886 case VFP11_ERRATUM_ARM_VENEER
:
17888 bfd_vma branch_from_veneer
;
17891 /* Take size of veneer into account. */
17892 branch_from_veneer
= errnode
->u
.v
.branch
->vma
17893 - errnode
->vma
- 12;
17895 if ((signed) branch_from_veneer
< -(1 << 25)
17896 || (signed) branch_from_veneer
>= (1 << 25))
17897 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
17898 "range"), output_bfd
);
17900 /* Original instruction. */
17901 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
17902 contents
[endianflip
^ target
] = insn
& 0xff;
17903 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
17904 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
17905 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
17907 /* Branch back to insn after original insn. */
17908 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
17909 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
17910 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
17911 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
17912 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
17922 if (arm_data
->stm32l4xx_erratumcount
!= 0)
17924 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
17925 stm32l4xx_errnode
!= 0;
17926 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
17928 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
17930 switch (stm32l4xx_errnode
->type
)
17932 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
17935 bfd_vma branch_to_veneer
=
17936 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
17938 if ((signed) branch_to_veneer
< -(1 << 24)
17939 || (signed) branch_to_veneer
>= (1 << 24))
17941 bfd_vma out_of_range
=
17942 ((signed) branch_to_veneer
< -(1 << 24)) ?
17943 - branch_to_veneer
- (1 << 24) :
17944 ((signed) branch_to_veneer
>= (1 << 24)) ?
17945 branch_to_veneer
- (1 << 24) : 0;
17947 (*_bfd_error_handler
)
17948 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17949 "Jump out of range by %ld bytes. "
17950 "Cannot encode branch instruction. "),
17952 (long) (stm32l4xx_errnode
->vma
- 4),
17957 insn
= create_instruction_branch_absolute
17958 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
17960 /* The instruction is before the label. */
17963 put_thumb2_insn (globals
, output_bfd
,
17964 (bfd_vma
) insn
, contents
+ target
);
17968 case STM32L4XX_ERRATUM_VENEER
:
17971 bfd_byte
* veneer_r
;
17974 veneer
= contents
+ target
;
17976 + stm32l4xx_errnode
->u
.b
.veneer
->vma
17977 - stm32l4xx_errnode
->vma
- 4;
17979 if ((signed) (veneer_r
- veneer
-
17980 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
17981 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
17982 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
17983 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
17984 || (signed) (veneer_r
- veneer
) >= (1 << 24))
17986 (*_bfd_error_handler
) (_("%B: error: Cannot create STM32L4XX "
17987 "veneer."), output_bfd
);
17991 /* Original instruction. */
17992 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
17994 stm32l4xx_create_replacing_stub
17995 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
18005 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
18007 arm_unwind_table_edit
*edit_node
18008 = arm_data
->u
.exidx
.unwind_edit_list
;
18009 /* Now, sec->size is the size of the section we will write. The original
18010 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18011 markers) was sec->rawsize. (This isn't the case if we perform no
18012 edits, then rawsize will be zero and we should use size). */
18013 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
18014 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
18015 unsigned int in_index
, out_index
;
18016 bfd_vma add_to_offsets
= 0;
18018 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
18022 unsigned int edit_index
= edit_node
->index
;
18024 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
18026 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18027 contents
+ in_index
* 8, add_to_offsets
);
18031 else if (in_index
== edit_index
18032 || (in_index
* 8 >= input_size
18033 && edit_index
== UINT_MAX
))
18035 switch (edit_node
->type
)
18037 case DELETE_EXIDX_ENTRY
:
18039 add_to_offsets
+= 8;
18042 case INSERT_EXIDX_CANTUNWIND_AT_END
:
18044 asection
*text_sec
= edit_node
->linked_section
;
18045 bfd_vma text_offset
= text_sec
->output_section
->vma
18046 + text_sec
->output_offset
18048 bfd_vma exidx_offset
= offset
+ out_index
* 8;
18049 unsigned long prel31_offset
;
18051 /* Note: this is meant to be equivalent to an
18052 R_ARM_PREL31 relocation. These synthetic
18053 EXIDX_CANTUNWIND markers are not relocated by the
18054 usual BFD method. */
18055 prel31_offset
= (text_offset
- exidx_offset
)
18057 if (bfd_link_relocatable (link_info
))
18059 /* Here relocation for new EXIDX_CANTUNWIND is
18060 created, so there is no need to
18061 adjust offset by hand. */
18062 prel31_offset
= text_sec
->output_offset
18065 /* New relocation entity. */
18066 asection
*text_out
= text_sec
->output_section
;
18067 Elf_Internal_Rela rel
;
18069 rel
.r_offset
= exidx_offset
;
18070 rel
.r_info
= ELF32_R_INFO (text_out
->target_index
,
18073 elf32_arm_add_relocation (output_bfd
, link_info
,
18074 sec
->output_section
,
18078 /* First address we can't unwind. */
18079 bfd_put_32 (output_bfd
, prel31_offset
,
18080 &edited_contents
[out_index
* 8]);
18082 /* Code for EXIDX_CANTUNWIND. */
18083 bfd_put_32 (output_bfd
, 0x1,
18084 &edited_contents
[out_index
* 8 + 4]);
18087 add_to_offsets
-= 8;
18092 edit_node
= edit_node
->next
;
18097 /* No more edits, copy remaining entries verbatim. */
18098 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18099 contents
+ in_index
* 8, add_to_offsets
);
18105 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
18106 bfd_set_section_contents (output_bfd
, sec
->output_section
,
18108 (file_ptr
) sec
->output_offset
, sec
->size
);
18113 /* Fix code to point to Cortex-A8 erratum stubs. */
18114 if (globals
->fix_cortex_a8
)
18116 struct a8_branch_to_stub_data data
;
18118 data
.writing_section
= sec
;
18119 data
.contents
= contents
;
18121 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
18128 if (globals
->byteswap_code
)
18130 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
18133 for (i
= 0; i
< mapcount
; i
++)
18135 if (i
== mapcount
- 1)
18138 end
= map
[i
+ 1].vma
;
18140 switch (map
[i
].type
)
18143 /* Byte swap code words. */
18144 while (ptr
+ 3 < end
)
18146 tmp
= contents
[ptr
];
18147 contents
[ptr
] = contents
[ptr
+ 3];
18148 contents
[ptr
+ 3] = tmp
;
18149 tmp
= contents
[ptr
+ 1];
18150 contents
[ptr
+ 1] = contents
[ptr
+ 2];
18151 contents
[ptr
+ 2] = tmp
;
18157 /* Byte swap code halfwords. */
18158 while (ptr
+ 1 < end
)
18160 tmp
= contents
[ptr
];
18161 contents
[ptr
] = contents
[ptr
+ 1];
18162 contents
[ptr
+ 1] = tmp
;
18168 /* Leave data alone. */
18176 arm_data
->mapcount
= -1;
18177 arm_data
->mapsize
= 0;
18178 arm_data
->map
= NULL
;
18183 /* Mangle thumb function symbols as we read them in. */
18186 elf32_arm_swap_symbol_in (bfd
* abfd
,
18189 Elf_Internal_Sym
*dst
)
18191 Elf_Internal_Shdr
*symtab_hdr
;
18192 const char *name
= NULL
;
18194 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
18196 dst
->st_target_internal
= 0;
18198 /* New EABI objects mark thumb function symbols by setting the low bit of
18200 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
18201 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
18203 if (dst
->st_value
& 1)
18205 dst
->st_value
&= ~(bfd_vma
) 1;
18206 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
18207 ST_BRANCH_TO_THUMB
);
18210 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
18212 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
18214 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
18215 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
18217 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
18218 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
18220 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
18222 /* Mark CMSE special symbols. */
18223 symtab_hdr
= & elf_symtab_hdr (abfd
);
18224 if (symtab_hdr
->sh_size
)
18225 name
= bfd_elf_sym_name (abfd
, symtab_hdr
, dst
, NULL
);
18226 if (name
&& CONST_STRNEQ (name
, CMSE_PREFIX
))
18227 ARM_SET_SYM_CMSE_SPCL (dst
->st_target_internal
);
18233 /* Mangle thumb function symbols as we write them out. */
18236 elf32_arm_swap_symbol_out (bfd
*abfd
,
18237 const Elf_Internal_Sym
*src
,
18241 Elf_Internal_Sym newsym
;
18243 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18244 of the address set, as per the new EABI. We do this unconditionally
18245 because objcopy does not set the elf header flags until after
18246 it writes out the symbol table. */
18247 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
18250 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
18251 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
18252 if (newsym
.st_shndx
!= SHN_UNDEF
)
18254 /* Do this only for defined symbols. At link type, the static
18255 linker will simulate the work of dynamic linker of resolving
18256 symbols and will carry over the thumbness of found symbols to
18257 the output symbol table. It's not clear how it happens, but
18258 the thumbness of undefined symbols can well be different at
18259 runtime, and writing '1' for them will be confusing for users
18260 and possibly for dynamic linker itself.
18262 newsym
.st_value
|= 1;
18267 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
18270 /* Add the PT_ARM_EXIDX program header. */
18273 elf32_arm_modify_segment_map (bfd
*abfd
,
18274 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18276 struct elf_segment_map
*m
;
18279 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18280 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18282 /* If there is already a PT_ARM_EXIDX header, then we do not
18283 want to add another one. This situation arises when running
18284 "strip"; the input binary already has the header. */
18285 m
= elf_seg_map (abfd
);
18286 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
18290 m
= (struct elf_segment_map
*)
18291 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
18294 m
->p_type
= PT_ARM_EXIDX
;
18296 m
->sections
[0] = sec
;
18298 m
->next
= elf_seg_map (abfd
);
18299 elf_seg_map (abfd
) = m
;
18306 /* We may add a PT_ARM_EXIDX program header. */
18309 elf32_arm_additional_program_headers (bfd
*abfd
,
18310 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18314 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18315 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18321 /* Hook called by the linker routine which adds symbols from an object
18325 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
18326 Elf_Internal_Sym
*sym
, const char **namep
,
18327 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
18329 if (ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
18330 && (abfd
->flags
& DYNAMIC
) == 0
18331 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
18332 elf_tdata (info
->output_bfd
)->has_gnu_symbols
|= elf_gnu_symbol_ifunc
;
18334 if (elf32_arm_hash_table (info
) == NULL
)
18337 if (elf32_arm_hash_table (info
)->vxworks_p
18338 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
18339 flagsp
, secp
, valp
))
18345 /* We use this to override swap_symbol_in and swap_symbol_out. */
18346 const struct elf_size_info elf32_arm_size_info
=
18348 sizeof (Elf32_External_Ehdr
),
18349 sizeof (Elf32_External_Phdr
),
18350 sizeof (Elf32_External_Shdr
),
18351 sizeof (Elf32_External_Rel
),
18352 sizeof (Elf32_External_Rela
),
18353 sizeof (Elf32_External_Sym
),
18354 sizeof (Elf32_External_Dyn
),
18355 sizeof (Elf_External_Note
),
18359 ELFCLASS32
, EV_CURRENT
,
18360 bfd_elf32_write_out_phdrs
,
18361 bfd_elf32_write_shdrs_and_ehdr
,
18362 bfd_elf32_checksum_contents
,
18363 bfd_elf32_write_relocs
,
18364 elf32_arm_swap_symbol_in
,
18365 elf32_arm_swap_symbol_out
,
18366 bfd_elf32_slurp_reloc_table
,
18367 bfd_elf32_slurp_symbol_table
,
18368 bfd_elf32_swap_dyn_in
,
18369 bfd_elf32_swap_dyn_out
,
18370 bfd_elf32_swap_reloc_in
,
18371 bfd_elf32_swap_reloc_out
,
18372 bfd_elf32_swap_reloca_in
,
18373 bfd_elf32_swap_reloca_out
18377 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
18379 /* V7 BE8 code is always little endian. */
18380 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18381 return bfd_getl32 (addr
);
18383 return bfd_get_32 (abfd
, addr
);
18387 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
18389 /* V7 BE8 code is always little endian. */
18390 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18391 return bfd_getl16 (addr
);
18393 return bfd_get_16 (abfd
, addr
);
18396 /* Return size of plt0 entry starting at ADDR
18397 or (bfd_vma) -1 if size can not be determined. */
18400 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
18402 bfd_vma first_word
;
18405 first_word
= read_code32 (abfd
, addr
);
18407 if (first_word
== elf32_arm_plt0_entry
[0])
18408 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
18409 else if (first_word
== elf32_thumb2_plt0_entry
[0])
18410 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
18412 /* We don't yet handle this PLT format. */
18413 return (bfd_vma
) -1;
18418 /* Return size of plt entry starting at offset OFFSET
18419 of plt section located at address START
18420 or (bfd_vma) -1 if size can not be determined. */
18423 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
18425 bfd_vma first_insn
;
18426 bfd_vma plt_size
= 0;
18427 const bfd_byte
*addr
= start
+ offset
;
18429 /* PLT entry size if fixed on Thumb-only platforms. */
18430 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
18431 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
18433 /* Respect Thumb stub if necessary. */
18434 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
18436 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
18439 /* Strip immediate from first add. */
18440 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
18442 #ifdef FOUR_WORD_PLT
18443 if (first_insn
== elf32_arm_plt_entry
[0])
18444 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
18446 if (first_insn
== elf32_arm_plt_entry_long
[0])
18447 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
18448 else if (first_insn
== elf32_arm_plt_entry_short
[0])
18449 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
18452 /* We don't yet handle this PLT format. */
18453 return (bfd_vma
) -1;
18458 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18461 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
18462 long symcount ATTRIBUTE_UNUSED
,
18463 asymbol
**syms ATTRIBUTE_UNUSED
,
18473 Elf_Internal_Shdr
*hdr
;
18481 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
18484 if (dynsymcount
<= 0)
18487 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
18488 if (relplt
== NULL
)
18491 hdr
= &elf_section_data (relplt
)->this_hdr
;
18492 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
18493 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
18496 plt
= bfd_get_section_by_name (abfd
, ".plt");
18500 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
18503 data
= plt
->contents
;
18506 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
18508 bfd_cache_section_contents((asection
*) plt
, data
);
18511 count
= relplt
->size
/ hdr
->sh_entsize
;
18512 size
= count
* sizeof (asymbol
);
18513 p
= relplt
->relocation
;
18514 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
18516 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
18517 if (p
->addend
!= 0)
18518 size
+= sizeof ("+0x") - 1 + 8;
18521 s
= *ret
= (asymbol
*) bfd_malloc (size
);
18525 offset
= elf32_arm_plt0_size (abfd
, data
);
18526 if (offset
== (bfd_vma
) -1)
18529 names
= (char *) (s
+ count
);
18530 p
= relplt
->relocation
;
18532 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
18536 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
18537 if (plt_size
== (bfd_vma
) -1)
18540 *s
= **p
->sym_ptr_ptr
;
18541 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
18542 we are defining a symbol, ensure one of them is set. */
18543 if ((s
->flags
& BSF_LOCAL
) == 0)
18544 s
->flags
|= BSF_GLOBAL
;
18545 s
->flags
|= BSF_SYNTHETIC
;
18550 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
18551 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
18553 if (p
->addend
!= 0)
18557 memcpy (names
, "+0x", sizeof ("+0x") - 1);
18558 names
+= sizeof ("+0x") - 1;
18559 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
18560 for (a
= buf
; *a
== '0'; ++a
)
18563 memcpy (names
, a
, len
);
18566 memcpy (names
, "@plt", sizeof ("@plt"));
18567 names
+= sizeof ("@plt");
18569 offset
+= plt_size
;
18576 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
18578 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
18579 *flags
|= SEC_ELF_PURECODE
;
18584 elf32_arm_lookup_section_flags (char *flag_name
)
18586 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
18587 return SHF_ARM_PURECODE
;
18589 return SEC_NO_FLAGS
;
18592 static unsigned int
18593 elf32_arm_count_additional_relocs (asection
*sec
)
18595 struct _arm_elf_section_data
*arm_data
;
18596 arm_data
= get_arm_elf_section_data (sec
);
18597 return arm_data
->additional_reloc_count
;
18600 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
18601 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
18602 FALSE otherwise. ISECTION is the best guess matching section from the
18603 input bfd IBFD, but it might be NULL. */
18606 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
18607 bfd
*obfd ATTRIBUTE_UNUSED
,
18608 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
18609 Elf_Internal_Shdr
*osection
)
18611 switch (osection
->sh_type
)
18613 case SHT_ARM_EXIDX
:
18615 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
18616 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
18619 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
18620 osection
->sh_info
= 0;
18622 /* The sh_link field must be set to the text section associated with
18623 this index section. Unfortunately the ARM EHABI does not specify
18624 exactly how to determine this association. Our caller does try
18625 to match up OSECTION with its corresponding input section however
18626 so that is a good first guess. */
18627 if (isection
!= NULL
18628 && osection
->bfd_section
!= NULL
18629 && isection
->bfd_section
!= NULL
18630 && isection
->bfd_section
->output_section
!= NULL
18631 && isection
->bfd_section
->output_section
== osection
->bfd_section
18632 && iheaders
!= NULL
18633 && isection
->sh_link
> 0
18634 && isection
->sh_link
< elf_numsections (ibfd
)
18635 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
18636 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
18639 for (i
= elf_numsections (obfd
); i
-- > 0;)
18640 if (oheaders
[i
]->bfd_section
18641 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
18647 /* Failing that we have to find a matching section ourselves. If
18648 we had the output section name available we could compare that
18649 with input section names. Unfortunately we don't. So instead
18650 we use a simple heuristic and look for the nearest executable
18651 section before this one. */
18652 for (i
= elf_numsections (obfd
); i
-- > 0;)
18653 if (oheaders
[i
] == osection
)
18659 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
18660 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
18661 == (SHF_ALLOC
| SHF_EXECINSTR
))
18667 osection
->sh_link
= i
;
18668 /* If the text section was part of a group
18669 then the index section should be too. */
18670 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
18671 osection
->sh_flags
|= SHF_GROUP
;
18677 case SHT_ARM_PREEMPTMAP
:
18678 osection
->sh_flags
= SHF_ALLOC
;
18681 case SHT_ARM_ATTRIBUTES
:
18682 case SHT_ARM_DEBUGOVERLAY
:
18683 case SHT_ARM_OVERLAYSECTION
:
18691 /* Returns TRUE if NAME is an ARM mapping symbol.
18692 Traditionally the symbols $a, $d and $t have been used.
18693 The ARM ELF standard also defines $x (for A64 code). It also allows a
18694 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
18695 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
18696 not support them here. $t.x indicates the start of ThumbEE instructions. */
18699 is_arm_mapping_symbol (const char * name
)
18701 return name
!= NULL
/* Paranoia. */
18702 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
18703 the mapping symbols could have acquired a prefix.
18704 We do not support this here, since such symbols no
18705 longer conform to the ARM ELF ABI. */
18706 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
18707 && (name
[2] == 0 || name
[2] == '.');
18708 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
18709 any characters that follow the period are legal characters for the body
18710 of a symbol's name. For now we just assume that this is the case. */
18713 /* Make sure that mapping symbols in object files are not removed via the
18714 "strip --strip-unneeded" tool. These symbols are needed in order to
18715 correctly generate interworking veneers, and for byte swapping code
18716 regions. Once an object file has been linked, it is safe to remove the
18717 symbols as they will no longer be needed. */
18720 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
18722 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
18723 && sym
->section
!= bfd_abs_section_ptr
18724 && is_arm_mapping_symbol (sym
->name
))
18725 sym
->flags
|= BSF_KEEP
;
18728 #undef elf_backend_copy_special_section_fields
18729 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
18731 #define ELF_ARCH bfd_arch_arm
18732 #define ELF_TARGET_ID ARM_ELF_DATA
18733 #define ELF_MACHINE_CODE EM_ARM
18734 #ifdef __QNXTARGET__
18735 #define ELF_MAXPAGESIZE 0x1000
18737 #define ELF_MAXPAGESIZE 0x10000
18739 #define ELF_MINPAGESIZE 0x1000
18740 #define ELF_COMMONPAGESIZE 0x1000
18742 #define bfd_elf32_mkobject elf32_arm_mkobject
18744 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
18745 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
18746 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
18747 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
18748 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
18749 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
18750 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
18751 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
18752 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
18753 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
18754 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
18755 #define bfd_elf32_bfd_final_link elf32_arm_final_link
18756 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
18758 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
18759 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
18760 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
18761 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
18762 #define elf_backend_check_relocs elf32_arm_check_relocs
18763 #define elf_backend_relocate_section elf32_arm_relocate_section
18764 #define elf_backend_write_section elf32_arm_write_section
18765 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
18766 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
18767 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
18768 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
18769 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
18770 #define elf_backend_always_size_sections elf32_arm_always_size_sections
18771 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
18772 #define elf_backend_post_process_headers elf32_arm_post_process_headers
18773 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
18774 #define elf_backend_object_p elf32_arm_object_p
18775 #define elf_backend_fake_sections elf32_arm_fake_sections
18776 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
18777 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18778 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
18779 #define elf_backend_size_info elf32_arm_size_info
18780 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18781 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
18782 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
18783 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
18784 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
18785 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
18786 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
18788 #define elf_backend_can_refcount 1
18789 #define elf_backend_can_gc_sections 1
18790 #define elf_backend_plt_readonly 1
18791 #define elf_backend_want_got_plt 1
18792 #define elf_backend_want_plt_sym 0
18793 #define elf_backend_may_use_rel_p 1
18794 #define elf_backend_may_use_rela_p 0
18795 #define elf_backend_default_use_rela_p 0
18797 #define elf_backend_got_header_size 12
18798 #define elf_backend_extern_protected_data 1
18800 #undef elf_backend_obj_attrs_vendor
18801 #define elf_backend_obj_attrs_vendor "aeabi"
18802 #undef elf_backend_obj_attrs_section
18803 #define elf_backend_obj_attrs_section ".ARM.attributes"
18804 #undef elf_backend_obj_attrs_arg_type
18805 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
18806 #undef elf_backend_obj_attrs_section_type
18807 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
18808 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
18809 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
18811 #undef elf_backend_section_flags
18812 #define elf_backend_section_flags elf32_arm_section_flags
18813 #undef elf_backend_lookup_section_flags_hook
18814 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
18816 #include "elf32-target.h"
18818 /* Native Client targets. */
18820 #undef TARGET_LITTLE_SYM
18821 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
18822 #undef TARGET_LITTLE_NAME
18823 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
18824 #undef TARGET_BIG_SYM
18825 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
18826 #undef TARGET_BIG_NAME
18827 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
18829 /* Like elf32_arm_link_hash_table_create -- but overrides
18830 appropriately for NaCl. */
18832 static struct bfd_link_hash_table
*
18833 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
18835 struct bfd_link_hash_table
*ret
;
18837 ret
= elf32_arm_link_hash_table_create (abfd
);
18840 struct elf32_arm_link_hash_table
*htab
18841 = (struct elf32_arm_link_hash_table
*) ret
;
18845 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
18846 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
18851 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
18852 really need to use elf32_arm_modify_segment_map. But we do it
18853 anyway just to reduce gratuitous differences with the stock ARM backend. */
18856 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
18858 return (elf32_arm_modify_segment_map (abfd
, info
)
18859 && nacl_modify_segment_map (abfd
, info
));
18863 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
18865 elf32_arm_final_write_processing (abfd
, linker
);
18866 nacl_final_write_processing (abfd
, linker
);
18870 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
18871 const arelent
*rel ATTRIBUTE_UNUSED
)
18874 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
18875 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
18879 #define elf32_bed elf32_arm_nacl_bed
18880 #undef bfd_elf32_bfd_link_hash_table_create
18881 #define bfd_elf32_bfd_link_hash_table_create \
18882 elf32_arm_nacl_link_hash_table_create
18883 #undef elf_backend_plt_alignment
18884 #define elf_backend_plt_alignment 4
18885 #undef elf_backend_modify_segment_map
18886 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18887 #undef elf_backend_modify_program_headers
18888 #define elf_backend_modify_program_headers nacl_modify_program_headers
18889 #undef elf_backend_final_write_processing
18890 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18891 #undef bfd_elf32_get_synthetic_symtab
18892 #undef elf_backend_plt_sym_val
18893 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18894 #undef elf_backend_copy_special_section_fields
18896 #undef ELF_MINPAGESIZE
18897 #undef ELF_COMMONPAGESIZE
18900 #include "elf32-target.h"
18902 /* Reset to defaults. */
18903 #undef elf_backend_plt_alignment
18904 #undef elf_backend_modify_segment_map
18905 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18906 #undef elf_backend_modify_program_headers
18907 #undef elf_backend_final_write_processing
18908 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18909 #undef ELF_MINPAGESIZE
18910 #define ELF_MINPAGESIZE 0x1000
18911 #undef ELF_COMMONPAGESIZE
18912 #define ELF_COMMONPAGESIZE 0x1000
18915 /* VxWorks Targets. */
18917 #undef TARGET_LITTLE_SYM
18918 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18919 #undef TARGET_LITTLE_NAME
18920 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18921 #undef TARGET_BIG_SYM
18922 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18923 #undef TARGET_BIG_NAME
18924 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18926 /* Like elf32_arm_link_hash_table_create -- but overrides
18927 appropriately for VxWorks. */
18929 static struct bfd_link_hash_table
*
18930 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
18932 struct bfd_link_hash_table
*ret
;
18934 ret
= elf32_arm_link_hash_table_create (abfd
);
18937 struct elf32_arm_link_hash_table
*htab
18938 = (struct elf32_arm_link_hash_table
*) ret
;
18940 htab
->vxworks_p
= 1;
18946 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
18948 elf32_arm_final_write_processing (abfd
, linker
);
18949 elf_vxworks_final_write_processing (abfd
, linker
);
18953 #define elf32_bed elf32_arm_vxworks_bed
18955 #undef bfd_elf32_bfd_link_hash_table_create
18956 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18957 #undef elf_backend_final_write_processing
18958 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18959 #undef elf_backend_emit_relocs
18960 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18962 #undef elf_backend_may_use_rel_p
18963 #define elf_backend_may_use_rel_p 0
18964 #undef elf_backend_may_use_rela_p
18965 #define elf_backend_may_use_rela_p 1
18966 #undef elf_backend_default_use_rela_p
18967 #define elf_backend_default_use_rela_p 1
18968 #undef elf_backend_want_plt_sym
18969 #define elf_backend_want_plt_sym 1
18970 #undef ELF_MAXPAGESIZE
18971 #define ELF_MAXPAGESIZE 0x1000
18973 #include "elf32-target.h"
18976 /* Merge backend specific data from an object file to the output
18977 object file when linking. */
18980 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
)
18982 flagword out_flags
;
18984 bfd_boolean flags_compatible
= TRUE
;
18987 /* Check if we have the same endianness. */
18988 if (! _bfd_generic_verify_endian_match (ibfd
, obfd
))
18991 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
18994 if (!elf32_arm_merge_eabi_attributes (ibfd
, obfd
))
18997 /* The input BFD must have had its flags initialised. */
18998 /* The following seems bogus to me -- The flags are initialized in
18999 the assembler but I don't think an elf_flags_init field is
19000 written into the object. */
19001 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19003 in_flags
= elf_elfheader (ibfd
)->e_flags
;
19004 out_flags
= elf_elfheader (obfd
)->e_flags
;
19006 /* In theory there is no reason why we couldn't handle this. However
19007 in practice it isn't even close to working and there is no real
19008 reason to want it. */
19009 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
19010 && !(ibfd
->flags
& DYNAMIC
)
19011 && (in_flags
& EF_ARM_BE8
))
19013 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19018 if (!elf_flags_init (obfd
))
19020 /* If the input is the default architecture and had the default
19021 flags then do not bother setting the flags for the output
19022 architecture, instead allow future merges to do this. If no
19023 future merges ever set these flags then they will retain their
19024 uninitialised values, which surprise surprise, correspond
19025 to the default values. */
19026 if (bfd_get_arch_info (ibfd
)->the_default
19027 && elf_elfheader (ibfd
)->e_flags
== 0)
19030 elf_flags_init (obfd
) = TRUE
;
19031 elf_elfheader (obfd
)->e_flags
= in_flags
;
19033 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
19034 && bfd_get_arch_info (obfd
)->the_default
)
19035 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
19040 /* Determine what should happen if the input ARM architecture
19041 does not match the output ARM architecture. */
19042 if (! bfd_arm_merge_machines (ibfd
, obfd
))
19045 /* Identical flags must be compatible. */
19046 if (in_flags
== out_flags
)
19049 /* Check to see if the input BFD actually contains any sections. If
19050 not, its flags may not have been initialised either, but it
19051 cannot actually cause any incompatiblity. Do not short-circuit
19052 dynamic objects; their section list may be emptied by
19053 elf_link_add_object_symbols.
19055 Also check to see if there are no code sections in the input.
19056 In this case there is no need to check for code specific flags.
19057 XXX - do we need to worry about floating-point format compatability
19058 in data sections ? */
19059 if (!(ibfd
->flags
& DYNAMIC
))
19061 bfd_boolean null_input_bfd
= TRUE
;
19062 bfd_boolean only_data_sections
= TRUE
;
19064 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
19066 /* Ignore synthetic glue sections. */
19067 if (strcmp (sec
->name
, ".glue_7")
19068 && strcmp (sec
->name
, ".glue_7t"))
19070 if ((bfd_get_section_flags (ibfd
, sec
)
19071 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19072 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19073 only_data_sections
= FALSE
;
19075 null_input_bfd
= FALSE
;
19080 if (null_input_bfd
|| only_data_sections
)
19084 /* Complain about various flag mismatches. */
19085 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
19086 EF_ARM_EABI_VERSION (out_flags
)))
19089 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19091 (in_flags
& EF_ARM_EABIMASK
) >> 24,
19092 (out_flags
& EF_ARM_EABIMASK
) >> 24);
19096 /* Not sure what needs to be checked for EABI versions >= 1. */
19097 /* VxWorks libraries do not use these flags. */
19098 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
19099 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
19100 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
19102 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
19105 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19107 in_flags
& EF_ARM_APCS_26
? 26 : 32,
19108 out_flags
& EF_ARM_APCS_26
? 26 : 32);
19109 flags_compatible
= FALSE
;
19112 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
19114 if (in_flags
& EF_ARM_APCS_FLOAT
)
19116 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19120 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19123 flags_compatible
= FALSE
;
19126 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
19128 if (in_flags
& EF_ARM_VFP_FLOAT
)
19130 (_("error: %B uses VFP instructions, whereas %B does not"),
19134 (_("error: %B uses FPA instructions, whereas %B does not"),
19137 flags_compatible
= FALSE
;
19140 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
19142 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
19144 (_("error: %B uses Maverick instructions, whereas %B does not"),
19148 (_("error: %B does not use Maverick instructions, whereas %B does"),
19151 flags_compatible
= FALSE
;
19154 #ifdef EF_ARM_SOFT_FLOAT
19155 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
19157 /* We can allow interworking between code that is VFP format
19158 layout, and uses either soft float or integer regs for
19159 passing floating point arguments and results. We already
19160 know that the APCS_FLOAT flags match; similarly for VFP
19162 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
19163 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
19165 if (in_flags
& EF_ARM_SOFT_FLOAT
)
19167 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19171 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19174 flags_compatible
= FALSE
;
19179 /* Interworking mismatch is only a warning. */
19180 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
19182 if (in_flags
& EF_ARM_INTERWORK
)
19185 (_("Warning: %B supports interworking, whereas %B does not"),
19191 (_("Warning: %B does not support interworking, whereas %B does"),
19197 return flags_compatible
;
19201 /* Symbian OS Targets. */
19203 #undef TARGET_LITTLE_SYM
19204 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19205 #undef TARGET_LITTLE_NAME
19206 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19207 #undef TARGET_BIG_SYM
19208 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19209 #undef TARGET_BIG_NAME
19210 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19212 /* Like elf32_arm_link_hash_table_create -- but overrides
19213 appropriately for Symbian OS. */
19215 static struct bfd_link_hash_table
*
19216 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
19218 struct bfd_link_hash_table
*ret
;
19220 ret
= elf32_arm_link_hash_table_create (abfd
);
19223 struct elf32_arm_link_hash_table
*htab
19224 = (struct elf32_arm_link_hash_table
*)ret
;
19225 /* There is no PLT header for Symbian OS. */
19226 htab
->plt_header_size
= 0;
19227 /* The PLT entries are each one instruction and one word. */
19228 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
19229 htab
->symbian_p
= 1;
19230 /* Symbian uses armv5t or above, so use_blx is always true. */
19232 htab
->root
.is_relocatable_executable
= 1;
19237 static const struct bfd_elf_special_section
19238 elf32_arm_symbian_special_sections
[] =
19240 /* In a BPABI executable, the dynamic linking sections do not go in
19241 the loadable read-only segment. The post-linker may wish to
19242 refer to these sections, but they are not part of the final
19244 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
19245 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
19246 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
19247 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
19248 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
19249 /* These sections do not need to be writable as the SymbianOS
19250 postlinker will arrange things so that no dynamic relocation is
19252 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
19253 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
19254 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
19255 { NULL
, 0, 0, 0, 0 }
19259 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
19260 struct bfd_link_info
*link_info
)
19262 /* BPABI objects are never loaded directly by an OS kernel; they are
19263 processed by a postlinker first, into an OS-specific format. If
19264 the D_PAGED bit is set on the file, BFD will align segments on
19265 page boundaries, so that an OS can directly map the file. With
19266 BPABI objects, that just results in wasted space. In addition,
19267 because we clear the D_PAGED bit, map_sections_to_segments will
19268 recognize that the program headers should not be mapped into any
19269 loadable segment. */
19270 abfd
->flags
&= ~D_PAGED
;
19271 elf32_arm_begin_write_processing (abfd
, link_info
);
19275 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
19276 struct bfd_link_info
*info
)
19278 struct elf_segment_map
*m
;
19281 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19282 segment. However, because the .dynamic section is not marked
19283 with SEC_LOAD, the generic ELF code will not create such a
19285 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
19288 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
19289 if (m
->p_type
== PT_DYNAMIC
)
19294 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
19295 m
->next
= elf_seg_map (abfd
);
19296 elf_seg_map (abfd
) = m
;
19300 /* Also call the generic arm routine. */
19301 return elf32_arm_modify_segment_map (abfd
, info
);
19304 /* Return address for Ith PLT stub in section PLT, for relocation REL
19305 or (bfd_vma) -1 if it should not be included. */
19308 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
19309 const arelent
*rel ATTRIBUTE_UNUSED
)
19311 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
19315 #define elf32_bed elf32_arm_symbian_bed
19317 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19318 will process them and then discard them. */
19319 #undef ELF_DYNAMIC_SEC_FLAGS
19320 #define ELF_DYNAMIC_SEC_FLAGS \
19321 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19323 #undef elf_backend_emit_relocs
19325 #undef bfd_elf32_bfd_link_hash_table_create
19326 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19327 #undef elf_backend_special_sections
19328 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19329 #undef elf_backend_begin_write_processing
19330 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19331 #undef elf_backend_final_write_processing
19332 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19334 #undef elf_backend_modify_segment_map
19335 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19337 /* There is no .got section for BPABI objects, and hence no header. */
19338 #undef elf_backend_got_header_size
19339 #define elf_backend_got_header_size 0
19341 /* Similarly, there is no .got.plt section. */
19342 #undef elf_backend_want_got_plt
19343 #define elf_backend_want_got_plt 0
19345 #undef elf_backend_plt_sym_val
19346 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19348 #undef elf_backend_may_use_rel_p
19349 #define elf_backend_may_use_rel_p 1
19350 #undef elf_backend_may_use_rela_p
19351 #define elf_backend_may_use_rela_p 0
19352 #undef elf_backend_default_use_rela_p
19353 #define elf_backend_default_use_rela_p 0
19354 #undef elf_backend_want_plt_sym
19355 #define elf_backend_want_plt_sym 0
19356 #undef ELF_MAXPAGESIZE
19357 #define ELF_MAXPAGESIZE 0x8000
19359 #include "elf32-target.h"