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Move link_hash_table_free functions earlier
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2014 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 };
1693
1694 /* 160 onwards: */
1695 static reloc_howto_type elf32_arm_howto_table_2[1] =
1696 {
1697 HOWTO (R_ARM_IRELATIVE, /* type */
1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
1710 };
1711
1712 /* 249-255 extended, currently unused, relocations: */
1713 static reloc_howto_type elf32_arm_howto_table_3[4] =
1714 {
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770 };
1771
1772 static reloc_howto_type *
1773 elf32_arm_howto_from_type (unsigned int r_type)
1774 {
1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1776 return &elf32_arm_howto_table_1[r_type];
1777
1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
1781 if (r_type >= R_ARM_RREL32
1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1784
1785 return NULL;
1786 }
1787
1788 static void
1789 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791 {
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796 }
1797
1798 struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804 /* All entries in this list must also be present in elf32_arm_howto_table. */
1805 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1893 };
1894
1895 static reloc_howto_type *
1896 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
1898 {
1899 unsigned int i;
1900
1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1904
1905 return NULL;
1906 }
1907
1908 static reloc_howto_type *
1909 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911 {
1912 unsigned int i;
1913
1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
1929 return NULL;
1930 }
1931
1932 /* Support for core dump NOTE sections. */
1933
1934 static bfd_boolean
1935 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1936 {
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
1945 case 148: /* Linux/ARM 32-bit. */
1946 /* pr_cursig */
1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
1948
1949 /* pr_pid */
1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962 }
1963
1964 static bfd_boolean
1965 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1966 {
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
1972 case 124: /* Linux/ARM elf_prpsinfo. */
1973 elf_tdata (abfd)->core->pid
1974 = bfd_get_32 (abfd, note->descdata + 12);
1975 elf_tdata (abfd)->core->program
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1977 elf_tdata (abfd)->core->command
1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
1984 {
1985 char *command = elf_tdata (abfd)->core->command;
1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993 }
1994
1995 static char *
1996 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998 {
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041 }
2042
2043 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2044 #define TARGET_LITTLE_NAME "elf32-littlearm"
2045 #define TARGET_BIG_SYM arm_elf32_be_vec
2046 #define TARGET_BIG_NAME "elf32-bigarm"
2047
2048 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2050 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2051
2052 typedef unsigned long int insn32;
2053 typedef unsigned short int insn16;
2054
2055 /* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
2057 #define INTERWORK_FLAG(abfd) \
2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
2061
2062 /* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
2065 name can be changed. The only requirement is the %s be present. */
2066 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
2072 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
2075 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
2078 #define STUB_ENTRY_NAME "__%s_veneer"
2079
2080 /* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
2084 static const unsigned long tls_trampoline [] =
2085 {
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089 };
2090
2091 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2092 {
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2100 + dl_tlsdesc_lazy_resolver(GOT) */
2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102 };
2103
2104 #ifdef FOUR_WORD_PLT
2105
2106 /* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
2108 called before the relocation has been set up calls the dynamic
2109 linker first. */
2110 static const bfd_vma elf32_arm_plt0_entry [] =
2111 {
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116 };
2117
2118 /* Subsequent entries in a procedure linkage table look like
2119 this. */
2120 static const bfd_vma elf32_arm_plt_entry [] =
2121 {
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126 };
2127
2128 #else /* not FOUR_WORD_PLT */
2129
2130 /* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
2134 static const bfd_vma elf32_arm_plt0_entry [] =
2135 {
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141 };
2142
2143 /* By default subsequent entries in a procedure linkage table look like
2144 this. Offsets that don't fit into 28 bits will cause link error. */
2145 static const bfd_vma elf32_arm_plt_entry_short [] =
2146 {
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150 };
2151
2152 /* When explicitly asked, we'll use this "long" entry format
2153 which can cope with arbitrary displacements. */
2154 static const bfd_vma elf32_arm_plt_entry_long [] =
2155 {
2156 0xe28fc200, /* add ip, pc, #0xN0000000 */
2157 0xe28cc600, /* add ip, ip, #0xNN00000 */
2158 0xe28cca00, /* add ip, ip, #0xNN000 */
2159 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2160 };
2161
2162 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2163
2164 #endif /* not FOUR_WORD_PLT */
2165
2166 /* The first entry in a procedure linkage table looks like this.
2167 It is set up so that any shared library function that is called before the
2168 relocation has been set up calls the dynamic linker first. */
2169 static const bfd_vma elf32_thumb2_plt0_entry [] =
2170 {
2171 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2172 an instruction maybe encoded to one or two array elements. */
2173 0xf8dfb500, /* push {lr} */
2174 0x44fee008, /* ldr.w lr, [pc, #8] */
2175 /* add lr, pc */
2176 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2177 0x00000000, /* &GOT[0] - . */
2178 };
2179
2180 /* Subsequent entries in a procedure linkage table for thumb only target
2181 look like this. */
2182 static const bfd_vma elf32_thumb2_plt_entry [] =
2183 {
2184 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2185 an instruction maybe encoded to one or two array elements. */
2186 0x0c00f240, /* movw ip, #0xNNNN */
2187 0x0c00f2c0, /* movt ip, #0xNNNN */
2188 0xf8dc44fc, /* add ip, pc */
2189 0xbf00f000 /* ldr.w pc, [ip] */
2190 /* nop */
2191 };
2192
2193 /* The format of the first entry in the procedure linkage table
2194 for a VxWorks executable. */
2195 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2196 {
2197 0xe52dc008, /* str ip,[sp,#-8]! */
2198 0xe59fc000, /* ldr ip,[pc] */
2199 0xe59cf008, /* ldr pc,[ip,#8] */
2200 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2201 };
2202
2203 /* The format of subsequent entries in a VxWorks executable. */
2204 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2205 {
2206 0xe59fc000, /* ldr ip,[pc] */
2207 0xe59cf000, /* ldr pc,[ip] */
2208 0x00000000, /* .long @got */
2209 0xe59fc000, /* ldr ip,[pc] */
2210 0xea000000, /* b _PLT */
2211 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2212 };
2213
2214 /* The format of entries in a VxWorks shared library. */
2215 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2216 {
2217 0xe59fc000, /* ldr ip,[pc] */
2218 0xe79cf009, /* ldr pc,[ip,r9] */
2219 0x00000000, /* .long @got */
2220 0xe59fc000, /* ldr ip,[pc] */
2221 0xe599f008, /* ldr pc,[r9,#8] */
2222 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2223 };
2224
2225 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2226 #define PLT_THUMB_STUB_SIZE 4
2227 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2228 {
2229 0x4778, /* bx pc */
2230 0x46c0 /* nop */
2231 };
2232
2233 /* The entries in a PLT when using a DLL-based target with multiple
2234 address spaces. */
2235 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2236 {
2237 0xe51ff004, /* ldr pc, [pc, #-4] */
2238 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2239 };
2240
2241 /* The first entry in a procedure linkage table looks like
2242 this. It is set up so that any shared library function that is
2243 called before the relocation has been set up calls the dynamic
2244 linker first. */
2245 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2246 {
2247 /* First bundle: */
2248 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2249 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2250 0xe08cc00f, /* add ip, ip, pc */
2251 0xe52dc008, /* str ip, [sp, #-8]! */
2252 /* Second bundle: */
2253 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2254 0xe59cc000, /* ldr ip, [ip] */
2255 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2256 0xe12fff1c, /* bx ip */
2257 /* Third bundle: */
2258 0xe320f000, /* nop */
2259 0xe320f000, /* nop */
2260 0xe320f000, /* nop */
2261 /* .Lplt_tail: */
2262 0xe50dc004, /* str ip, [sp, #-4] */
2263 /* Fourth bundle: */
2264 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2265 0xe59cc000, /* ldr ip, [ip] */
2266 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2267 0xe12fff1c, /* bx ip */
2268 };
2269 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2270
2271 /* Subsequent entries in a procedure linkage table look like this. */
2272 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2273 {
2274 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2275 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2276 0xe08cc00f, /* add ip, ip, pc */
2277 0xea000000, /* b .Lplt_tail */
2278 };
2279
2280 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2281 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2282 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2283 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2284 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2285 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2286
2287 enum stub_insn_type
2288 {
2289 THUMB16_TYPE = 1,
2290 THUMB32_TYPE,
2291 ARM_TYPE,
2292 DATA_TYPE
2293 };
2294
2295 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2296 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2297 is inserted in arm_build_one_stub(). */
2298 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2299 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2300 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2301 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2302 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2303 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2304
2305 typedef struct
2306 {
2307 bfd_vma data;
2308 enum stub_insn_type type;
2309 unsigned int r_type;
2310 int reloc_addend;
2311 } insn_sequence;
2312
2313 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2314 to reach the stub if necessary. */
2315 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2316 {
2317 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2318 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2319 };
2320
2321 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2322 available. */
2323 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2324 {
2325 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2326 ARM_INSN (0xe12fff1c), /* bx ip */
2327 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2328 };
2329
2330 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2331 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2332 {
2333 THUMB16_INSN (0xb401), /* push {r0} */
2334 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2335 THUMB16_INSN (0x4684), /* mov ip, r0 */
2336 THUMB16_INSN (0xbc01), /* pop {r0} */
2337 THUMB16_INSN (0x4760), /* bx ip */
2338 THUMB16_INSN (0xbf00), /* nop */
2339 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2340 };
2341
2342 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2343 allowed. */
2344 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2345 {
2346 THUMB16_INSN (0x4778), /* bx pc */
2347 THUMB16_INSN (0x46c0), /* nop */
2348 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2349 ARM_INSN (0xe12fff1c), /* bx ip */
2350 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2351 };
2352
2353 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2354 available. */
2355 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2356 {
2357 THUMB16_INSN (0x4778), /* bx pc */
2358 THUMB16_INSN (0x46c0), /* nop */
2359 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2360 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2361 };
2362
2363 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2364 one, when the destination is close enough. */
2365 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2366 {
2367 THUMB16_INSN (0x4778), /* bx pc */
2368 THUMB16_INSN (0x46c0), /* nop */
2369 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2370 };
2371
2372 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2373 blx to reach the stub if necessary. */
2374 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2375 {
2376 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2377 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2378 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2379 };
2380
2381 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2382 blx to reach the stub if necessary. We can not add into pc;
2383 it is not guaranteed to mode switch (different in ARMv6 and
2384 ARMv7). */
2385 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2386 {
2387 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2388 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2391 };
2392
2393 /* V4T ARM -> ARM long branch stub, PIC. */
2394 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2395 {
2396 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2397 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2398 ARM_INSN (0xe12fff1c), /* bx ip */
2399 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2400 };
2401
2402 /* V4T Thumb -> ARM long branch stub, PIC. */
2403 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2404 {
2405 THUMB16_INSN (0x4778), /* bx pc */
2406 THUMB16_INSN (0x46c0), /* nop */
2407 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2408 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2409 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2410 };
2411
2412 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2413 architectures. */
2414 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2415 {
2416 THUMB16_INSN (0xb401), /* push {r0} */
2417 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2418 THUMB16_INSN (0x46fc), /* mov ip, pc */
2419 THUMB16_INSN (0x4484), /* add ip, r0 */
2420 THUMB16_INSN (0xbc01), /* pop {r0} */
2421 THUMB16_INSN (0x4760), /* bx ip */
2422 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2432 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2433 ARM_INSN (0xe12fff1c), /* bx ip */
2434 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2435 };
2436
2437 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2438 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2439 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2440 {
2441 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2442 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2443 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2444 };
2445
2446 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2447 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2448 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2453 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2454 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2455 };
2456
2457 /* NaCl ARM -> ARM long branch stub. */
2458 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2459 {
2460 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2461 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2462 ARM_INSN (0xe12fff1c), /* bx ip */
2463 ARM_INSN (0xe320f000), /* nop */
2464 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2465 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2466 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2467 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2468 };
2469
2470 /* NaCl ARM -> ARM long branch stub, PIC. */
2471 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2472 {
2473 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2474 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2475 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2476 ARM_INSN (0xe12fff1c), /* bx ip */
2477 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2478 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2479 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2480 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2481 };
2482
2483
2484 /* Cortex-A8 erratum-workaround stubs. */
2485
2486 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2487 can't use a conditional branch to reach this stub). */
2488
2489 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2490 {
2491 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2492 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2493 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2494 };
2495
2496 /* Stub used for b.w and bl.w instructions. */
2497
2498 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2499 {
2500 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2501 };
2502
2503 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2504 {
2505 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2506 };
2507
2508 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2509 instruction (which switches to ARM mode) to point to this stub. Jump to the
2510 real destination using an ARM-mode branch. */
2511
2512 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2513 {
2514 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2515 };
2516
2517 /* For each section group there can be a specially created linker section
2518 to hold the stubs for that group. The name of the stub section is based
2519 upon the name of another section within that group with the suffix below
2520 applied.
2521
2522 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2523 create what appeared to be a linker stub section when it actually
2524 contained user code/data. For example, consider this fragment:
2525
2526 const char * stubborn_problems[] = { "np" };
2527
2528 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2529 section called:
2530
2531 .data.rel.local.stubborn_problems
2532
2533 This then causes problems in arm32_arm_build_stubs() as it triggers:
2534
2535 // Ignore non-stub sections.
2536 if (!strstr (stub_sec->name, STUB_SUFFIX))
2537 continue;
2538
2539 And so the section would be ignored instead of being processed. Hence
2540 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2541 C identifier. */
2542 #define STUB_SUFFIX ".__stub"
2543
2544 /* One entry per long/short branch stub defined above. */
2545 #define DEF_STUBS \
2546 DEF_STUB(long_branch_any_any) \
2547 DEF_STUB(long_branch_v4t_arm_thumb) \
2548 DEF_STUB(long_branch_thumb_only) \
2549 DEF_STUB(long_branch_v4t_thumb_thumb) \
2550 DEF_STUB(long_branch_v4t_thumb_arm) \
2551 DEF_STUB(short_branch_v4t_thumb_arm) \
2552 DEF_STUB(long_branch_any_arm_pic) \
2553 DEF_STUB(long_branch_any_thumb_pic) \
2554 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2555 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2556 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2557 DEF_STUB(long_branch_thumb_only_pic) \
2558 DEF_STUB(long_branch_any_tls_pic) \
2559 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2560 DEF_STUB(long_branch_arm_nacl) \
2561 DEF_STUB(long_branch_arm_nacl_pic) \
2562 DEF_STUB(a8_veneer_b_cond) \
2563 DEF_STUB(a8_veneer_b) \
2564 DEF_STUB(a8_veneer_bl) \
2565 DEF_STUB(a8_veneer_blx)
2566
2567 #define DEF_STUB(x) arm_stub_##x,
2568 enum elf32_arm_stub_type
2569 {
2570 arm_stub_none,
2571 DEF_STUBS
2572 /* Note the first a8_veneer type. */
2573 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2574 };
2575 #undef DEF_STUB
2576
2577 typedef struct
2578 {
2579 const insn_sequence* template_sequence;
2580 int template_size;
2581 } stub_def;
2582
2583 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2584 static const stub_def stub_definitions[] =
2585 {
2586 {NULL, 0},
2587 DEF_STUBS
2588 };
2589
2590 struct elf32_arm_stub_hash_entry
2591 {
2592 /* Base hash table entry structure. */
2593 struct bfd_hash_entry root;
2594
2595 /* The stub section. */
2596 asection *stub_sec;
2597
2598 /* Offset within stub_sec of the beginning of this stub. */
2599 bfd_vma stub_offset;
2600
2601 /* Given the symbol's value and its section we can determine its final
2602 value when building the stubs (so the stub knows where to jump). */
2603 bfd_vma target_value;
2604 asection *target_section;
2605
2606 /* Offset to apply to relocation referencing target_value. */
2607 bfd_vma target_addend;
2608
2609 /* The instruction which caused this stub to be generated (only valid for
2610 Cortex-A8 erratum workaround stubs at present). */
2611 unsigned long orig_insn;
2612
2613 /* The stub type. */
2614 enum elf32_arm_stub_type stub_type;
2615 /* Its encoding size in bytes. */
2616 int stub_size;
2617 /* Its template. */
2618 const insn_sequence *stub_template;
2619 /* The size of the template (number of entries). */
2620 int stub_template_size;
2621
2622 /* The symbol table entry, if any, that this was derived from. */
2623 struct elf32_arm_link_hash_entry *h;
2624
2625 /* Type of branch. */
2626 enum arm_st_branch_type branch_type;
2627
2628 /* Where this stub is being called from, or, in the case of combined
2629 stub sections, the first input section in the group. */
2630 asection *id_sec;
2631
2632 /* The name for the local symbol at the start of this stub. The
2633 stub name in the hash table has to be unique; this does not, so
2634 it can be friendlier. */
2635 char *output_name;
2636 };
2637
2638 /* Used to build a map of a section. This is required for mixed-endian
2639 code/data. */
2640
2641 typedef struct elf32_elf_section_map
2642 {
2643 bfd_vma vma;
2644 char type;
2645 }
2646 elf32_arm_section_map;
2647
2648 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2649
2650 typedef enum
2651 {
2652 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2653 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2654 VFP11_ERRATUM_ARM_VENEER,
2655 VFP11_ERRATUM_THUMB_VENEER
2656 }
2657 elf32_vfp11_erratum_type;
2658
2659 typedef struct elf32_vfp11_erratum_list
2660 {
2661 struct elf32_vfp11_erratum_list *next;
2662 bfd_vma vma;
2663 union
2664 {
2665 struct
2666 {
2667 struct elf32_vfp11_erratum_list *veneer;
2668 unsigned int vfp_insn;
2669 } b;
2670 struct
2671 {
2672 struct elf32_vfp11_erratum_list *branch;
2673 unsigned int id;
2674 } v;
2675 } u;
2676 elf32_vfp11_erratum_type type;
2677 }
2678 elf32_vfp11_erratum_list;
2679
2680 typedef enum
2681 {
2682 DELETE_EXIDX_ENTRY,
2683 INSERT_EXIDX_CANTUNWIND_AT_END
2684 }
2685 arm_unwind_edit_type;
2686
2687 /* A (sorted) list of edits to apply to an unwind table. */
2688 typedef struct arm_unwind_table_edit
2689 {
2690 arm_unwind_edit_type type;
2691 /* Note: we sometimes want to insert an unwind entry corresponding to a
2692 section different from the one we're currently writing out, so record the
2693 (text) section this edit relates to here. */
2694 asection *linked_section;
2695 unsigned int index;
2696 struct arm_unwind_table_edit *next;
2697 }
2698 arm_unwind_table_edit;
2699
2700 typedef struct _arm_elf_section_data
2701 {
2702 /* Information about mapping symbols. */
2703 struct bfd_elf_section_data elf;
2704 unsigned int mapcount;
2705 unsigned int mapsize;
2706 elf32_arm_section_map *map;
2707 /* Information about CPU errata. */
2708 unsigned int erratumcount;
2709 elf32_vfp11_erratum_list *erratumlist;
2710 /* Information about unwind tables. */
2711 union
2712 {
2713 /* Unwind info attached to a text section. */
2714 struct
2715 {
2716 asection *arm_exidx_sec;
2717 } text;
2718
2719 /* Unwind info attached to an .ARM.exidx section. */
2720 struct
2721 {
2722 arm_unwind_table_edit *unwind_edit_list;
2723 arm_unwind_table_edit *unwind_edit_tail;
2724 } exidx;
2725 } u;
2726 }
2727 _arm_elf_section_data;
2728
2729 #define elf32_arm_section_data(sec) \
2730 ((_arm_elf_section_data *) elf_section_data (sec))
2731
2732 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2733 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2734 so may be created multiple times: we use an array of these entries whilst
2735 relaxing which we can refresh easily, then create stubs for each potentially
2736 erratum-triggering instruction once we've settled on a solution. */
2737
2738 struct a8_erratum_fix
2739 {
2740 bfd *input_bfd;
2741 asection *section;
2742 bfd_vma offset;
2743 bfd_vma addend;
2744 unsigned long orig_insn;
2745 char *stub_name;
2746 enum elf32_arm_stub_type stub_type;
2747 enum arm_st_branch_type branch_type;
2748 };
2749
2750 /* A table of relocs applied to branches which might trigger Cortex-A8
2751 erratum. */
2752
2753 struct a8_erratum_reloc
2754 {
2755 bfd_vma from;
2756 bfd_vma destination;
2757 struct elf32_arm_link_hash_entry *hash;
2758 const char *sym_name;
2759 unsigned int r_type;
2760 enum arm_st_branch_type branch_type;
2761 bfd_boolean non_a8_stub;
2762 };
2763
2764 /* The size of the thread control block. */
2765 #define TCB_SIZE 8
2766
2767 /* ARM-specific information about a PLT entry, over and above the usual
2768 gotplt_union. */
2769 struct arm_plt_info
2770 {
2771 /* We reference count Thumb references to a PLT entry separately,
2772 so that we can emit the Thumb trampoline only if needed. */
2773 bfd_signed_vma thumb_refcount;
2774
2775 /* Some references from Thumb code may be eliminated by BL->BLX
2776 conversion, so record them separately. */
2777 bfd_signed_vma maybe_thumb_refcount;
2778
2779 /* How many of the recorded PLT accesses were from non-call relocations.
2780 This information is useful when deciding whether anything takes the
2781 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2782 non-call references to the function should resolve directly to the
2783 real runtime target. */
2784 unsigned int noncall_refcount;
2785
2786 /* Since PLT entries have variable size if the Thumb prologue is
2787 used, we need to record the index into .got.plt instead of
2788 recomputing it from the PLT offset. */
2789 bfd_signed_vma got_offset;
2790 };
2791
2792 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2793 struct arm_local_iplt_info
2794 {
2795 /* The information that is usually found in the generic ELF part of
2796 the hash table entry. */
2797 union gotplt_union root;
2798
2799 /* The information that is usually found in the ARM-specific part of
2800 the hash table entry. */
2801 struct arm_plt_info arm;
2802
2803 /* A list of all potential dynamic relocations against this symbol. */
2804 struct elf_dyn_relocs *dyn_relocs;
2805 };
2806
2807 struct elf_arm_obj_tdata
2808 {
2809 struct elf_obj_tdata root;
2810
2811 /* tls_type for each local got entry. */
2812 char *local_got_tls_type;
2813
2814 /* GOTPLT entries for TLS descriptors. */
2815 bfd_vma *local_tlsdesc_gotent;
2816
2817 /* Information for local symbols that need entries in .iplt. */
2818 struct arm_local_iplt_info **local_iplt;
2819
2820 /* Zero to warn when linking objects with incompatible enum sizes. */
2821 int no_enum_size_warning;
2822
2823 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2824 int no_wchar_size_warning;
2825 };
2826
2827 #define elf_arm_tdata(bfd) \
2828 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2829
2830 #define elf32_arm_local_got_tls_type(bfd) \
2831 (elf_arm_tdata (bfd)->local_got_tls_type)
2832
2833 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2834 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2835
2836 #define elf32_arm_local_iplt(bfd) \
2837 (elf_arm_tdata (bfd)->local_iplt)
2838
2839 #define is_arm_elf(bfd) \
2840 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2841 && elf_tdata (bfd) != NULL \
2842 && elf_object_id (bfd) == ARM_ELF_DATA)
2843
2844 static bfd_boolean
2845 elf32_arm_mkobject (bfd *abfd)
2846 {
2847 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2848 ARM_ELF_DATA);
2849 }
2850
2851 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2852
2853 /* Arm ELF linker hash entry. */
2854 struct elf32_arm_link_hash_entry
2855 {
2856 struct elf_link_hash_entry root;
2857
2858 /* Track dynamic relocs copied for this symbol. */
2859 struct elf_dyn_relocs *dyn_relocs;
2860
2861 /* ARM-specific PLT information. */
2862 struct arm_plt_info plt;
2863
2864 #define GOT_UNKNOWN 0
2865 #define GOT_NORMAL 1
2866 #define GOT_TLS_GD 2
2867 #define GOT_TLS_IE 4
2868 #define GOT_TLS_GDESC 8
2869 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2870 unsigned int tls_type : 8;
2871
2872 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2873 unsigned int is_iplt : 1;
2874
2875 unsigned int unused : 23;
2876
2877 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2878 starting at the end of the jump table. */
2879 bfd_vma tlsdesc_got;
2880
2881 /* The symbol marking the real symbol location for exported thumb
2882 symbols with Arm stubs. */
2883 struct elf_link_hash_entry *export_glue;
2884
2885 /* A pointer to the most recently used stub hash entry against this
2886 symbol. */
2887 struct elf32_arm_stub_hash_entry *stub_cache;
2888 };
2889
2890 /* Traverse an arm ELF linker hash table. */
2891 #define elf32_arm_link_hash_traverse(table, func, info) \
2892 (elf_link_hash_traverse \
2893 (&(table)->root, \
2894 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2895 (info)))
2896
2897 /* Get the ARM elf linker hash table from a link_info structure. */
2898 #define elf32_arm_hash_table(info) \
2899 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2900 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2901
2902 #define arm_stub_hash_lookup(table, string, create, copy) \
2903 ((struct elf32_arm_stub_hash_entry *) \
2904 bfd_hash_lookup ((table), (string), (create), (copy)))
2905
2906 /* Array to keep track of which stub sections have been created, and
2907 information on stub grouping. */
2908 struct map_stub
2909 {
2910 /* This is the section to which stubs in the group will be
2911 attached. */
2912 asection *link_sec;
2913 /* The stub section. */
2914 asection *stub_sec;
2915 };
2916
2917 #define elf32_arm_compute_jump_table_size(htab) \
2918 ((htab)->next_tls_desc_index * 4)
2919
2920 /* ARM ELF linker hash table. */
2921 struct elf32_arm_link_hash_table
2922 {
2923 /* The main hash table. */
2924 struct elf_link_hash_table root;
2925
2926 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2927 bfd_size_type thumb_glue_size;
2928
2929 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2930 bfd_size_type arm_glue_size;
2931
2932 /* The size in bytes of section containing the ARMv4 BX veneers. */
2933 bfd_size_type bx_glue_size;
2934
2935 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2936 veneer has been populated. */
2937 bfd_vma bx_glue_offset[15];
2938
2939 /* The size in bytes of the section containing glue for VFP11 erratum
2940 veneers. */
2941 bfd_size_type vfp11_erratum_glue_size;
2942
2943 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2944 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2945 elf32_arm_write_section(). */
2946 struct a8_erratum_fix *a8_erratum_fixes;
2947 unsigned int num_a8_erratum_fixes;
2948
2949 /* An arbitrary input BFD chosen to hold the glue sections. */
2950 bfd * bfd_of_glue_owner;
2951
2952 /* Nonzero to output a BE8 image. */
2953 int byteswap_code;
2954
2955 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2956 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2957 int target1_is_rel;
2958
2959 /* The relocation to use for R_ARM_TARGET2 relocations. */
2960 int target2_reloc;
2961
2962 /* 0 = Ignore R_ARM_V4BX.
2963 1 = Convert BX to MOV PC.
2964 2 = Generate v4 interworing stubs. */
2965 int fix_v4bx;
2966
2967 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2968 int fix_cortex_a8;
2969
2970 /* Whether we should fix the ARM1176 BLX immediate issue. */
2971 int fix_arm1176;
2972
2973 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2974 int use_blx;
2975
2976 /* What sort of code sequences we should look for which may trigger the
2977 VFP11 denorm erratum. */
2978 bfd_arm_vfp11_fix vfp11_fix;
2979
2980 /* Global counter for the number of fixes we have emitted. */
2981 int num_vfp11_fixes;
2982
2983 /* Nonzero to force PIC branch veneers. */
2984 int pic_veneer;
2985
2986 /* The number of bytes in the initial entry in the PLT. */
2987 bfd_size_type plt_header_size;
2988
2989 /* The number of bytes in the subsequent PLT etries. */
2990 bfd_size_type plt_entry_size;
2991
2992 /* True if the target system is VxWorks. */
2993 int vxworks_p;
2994
2995 /* True if the target system is Symbian OS. */
2996 int symbian_p;
2997
2998 /* True if the target system is Native Client. */
2999 int nacl_p;
3000
3001 /* True if the target uses REL relocations. */
3002 int use_rel;
3003
3004 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3005 bfd_vma next_tls_desc_index;
3006
3007 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3008 bfd_vma num_tls_desc;
3009
3010 /* Short-cuts to get to dynamic linker sections. */
3011 asection *sdynbss;
3012 asection *srelbss;
3013
3014 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3015 asection *srelplt2;
3016
3017 /* The offset into splt of the PLT entry for the TLS descriptor
3018 resolver. Special values are 0, if not necessary (or not found
3019 to be necessary yet), and -1 if needed but not determined
3020 yet. */
3021 bfd_vma dt_tlsdesc_plt;
3022
3023 /* The offset into sgot of the GOT entry used by the PLT entry
3024 above. */
3025 bfd_vma dt_tlsdesc_got;
3026
3027 /* Offset in .plt section of tls_arm_trampoline. */
3028 bfd_vma tls_trampoline;
3029
3030 /* Data for R_ARM_TLS_LDM32 relocations. */
3031 union
3032 {
3033 bfd_signed_vma refcount;
3034 bfd_vma offset;
3035 } tls_ldm_got;
3036
3037 /* Small local sym cache. */
3038 struct sym_cache sym_cache;
3039
3040 /* For convenience in allocate_dynrelocs. */
3041 bfd * obfd;
3042
3043 /* The amount of space used by the reserved portion of the sgotplt
3044 section, plus whatever space is used by the jump slots. */
3045 bfd_vma sgotplt_jump_table_size;
3046
3047 /* The stub hash table. */
3048 struct bfd_hash_table stub_hash_table;
3049
3050 /* Linker stub bfd. */
3051 bfd *stub_bfd;
3052
3053 /* Linker call-backs. */
3054 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3055 void (*layout_sections_again) (void);
3056
3057 /* Array to keep track of which stub sections have been created, and
3058 information on stub grouping. */
3059 struct map_stub *stub_group;
3060
3061 /* Number of elements in stub_group. */
3062 int top_id;
3063
3064 /* Assorted information used by elf32_arm_size_stubs. */
3065 unsigned int bfd_count;
3066 int top_index;
3067 asection **input_list;
3068 };
3069
3070 /* Create an entry in an ARM ELF linker hash table. */
3071
3072 static struct bfd_hash_entry *
3073 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3074 struct bfd_hash_table * table,
3075 const char * string)
3076 {
3077 struct elf32_arm_link_hash_entry * ret =
3078 (struct elf32_arm_link_hash_entry *) entry;
3079
3080 /* Allocate the structure if it has not already been allocated by a
3081 subclass. */
3082 if (ret == NULL)
3083 ret = (struct elf32_arm_link_hash_entry *)
3084 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3085 if (ret == NULL)
3086 return (struct bfd_hash_entry *) ret;
3087
3088 /* Call the allocation method of the superclass. */
3089 ret = ((struct elf32_arm_link_hash_entry *)
3090 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3091 table, string));
3092 if (ret != NULL)
3093 {
3094 ret->dyn_relocs = NULL;
3095 ret->tls_type = GOT_UNKNOWN;
3096 ret->tlsdesc_got = (bfd_vma) -1;
3097 ret->plt.thumb_refcount = 0;
3098 ret->plt.maybe_thumb_refcount = 0;
3099 ret->plt.noncall_refcount = 0;
3100 ret->plt.got_offset = -1;
3101 ret->is_iplt = FALSE;
3102 ret->export_glue = NULL;
3103
3104 ret->stub_cache = NULL;
3105 }
3106
3107 return (struct bfd_hash_entry *) ret;
3108 }
3109
3110 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3111 symbols. */
3112
3113 static bfd_boolean
3114 elf32_arm_allocate_local_sym_info (bfd *abfd)
3115 {
3116 if (elf_local_got_refcounts (abfd) == NULL)
3117 {
3118 bfd_size_type num_syms;
3119 bfd_size_type size;
3120 char *data;
3121
3122 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3123 size = num_syms * (sizeof (bfd_signed_vma)
3124 + sizeof (struct arm_local_iplt_info *)
3125 + sizeof (bfd_vma)
3126 + sizeof (char));
3127 data = bfd_zalloc (abfd, size);
3128 if (data == NULL)
3129 return FALSE;
3130
3131 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3132 data += num_syms * sizeof (bfd_signed_vma);
3133
3134 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3135 data += num_syms * sizeof (struct arm_local_iplt_info *);
3136
3137 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3138 data += num_syms * sizeof (bfd_vma);
3139
3140 elf32_arm_local_got_tls_type (abfd) = data;
3141 }
3142 return TRUE;
3143 }
3144
3145 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3146 to input bfd ABFD. Create the information if it doesn't already exist.
3147 Return null if an allocation fails. */
3148
3149 static struct arm_local_iplt_info *
3150 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3151 {
3152 struct arm_local_iplt_info **ptr;
3153
3154 if (!elf32_arm_allocate_local_sym_info (abfd))
3155 return NULL;
3156
3157 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3158 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3159 if (*ptr == NULL)
3160 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3161 return *ptr;
3162 }
3163
3164 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3165 in ABFD's symbol table. If the symbol is global, H points to its
3166 hash table entry, otherwise H is null.
3167
3168 Return true if the symbol does have PLT information. When returning
3169 true, point *ROOT_PLT at the target-independent reference count/offset
3170 union and *ARM_PLT at the ARM-specific information. */
3171
3172 static bfd_boolean
3173 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3174 unsigned long r_symndx, union gotplt_union **root_plt,
3175 struct arm_plt_info **arm_plt)
3176 {
3177 struct arm_local_iplt_info *local_iplt;
3178
3179 if (h != NULL)
3180 {
3181 *root_plt = &h->root.plt;
3182 *arm_plt = &h->plt;
3183 return TRUE;
3184 }
3185
3186 if (elf32_arm_local_iplt (abfd) == NULL)
3187 return FALSE;
3188
3189 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3190 if (local_iplt == NULL)
3191 return FALSE;
3192
3193 *root_plt = &local_iplt->root;
3194 *arm_plt = &local_iplt->arm;
3195 return TRUE;
3196 }
3197
3198 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3199 before it. */
3200
3201 static bfd_boolean
3202 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3203 struct arm_plt_info *arm_plt)
3204 {
3205 struct elf32_arm_link_hash_table *htab;
3206
3207 htab = elf32_arm_hash_table (info);
3208 return (arm_plt->thumb_refcount != 0
3209 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3210 }
3211
3212 /* Return a pointer to the head of the dynamic reloc list that should
3213 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3214 ABFD's symbol table. Return null if an error occurs. */
3215
3216 static struct elf_dyn_relocs **
3217 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3218 Elf_Internal_Sym *isym)
3219 {
3220 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3221 {
3222 struct arm_local_iplt_info *local_iplt;
3223
3224 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3225 if (local_iplt == NULL)
3226 return NULL;
3227 return &local_iplt->dyn_relocs;
3228 }
3229 else
3230 {
3231 /* Track dynamic relocs needed for local syms too.
3232 We really need local syms available to do this
3233 easily. Oh well. */
3234 asection *s;
3235 void *vpp;
3236
3237 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3238 if (s == NULL)
3239 abort ();
3240
3241 vpp = &elf_section_data (s)->local_dynrel;
3242 return (struct elf_dyn_relocs **) vpp;
3243 }
3244 }
3245
3246 /* Initialize an entry in the stub hash table. */
3247
3248 static struct bfd_hash_entry *
3249 stub_hash_newfunc (struct bfd_hash_entry *entry,
3250 struct bfd_hash_table *table,
3251 const char *string)
3252 {
3253 /* Allocate the structure if it has not already been allocated by a
3254 subclass. */
3255 if (entry == NULL)
3256 {
3257 entry = (struct bfd_hash_entry *)
3258 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3259 if (entry == NULL)
3260 return entry;
3261 }
3262
3263 /* Call the allocation method of the superclass. */
3264 entry = bfd_hash_newfunc (entry, table, string);
3265 if (entry != NULL)
3266 {
3267 struct elf32_arm_stub_hash_entry *eh;
3268
3269 /* Initialize the local fields. */
3270 eh = (struct elf32_arm_stub_hash_entry *) entry;
3271 eh->stub_sec = NULL;
3272 eh->stub_offset = 0;
3273 eh->target_value = 0;
3274 eh->target_section = NULL;
3275 eh->target_addend = 0;
3276 eh->orig_insn = 0;
3277 eh->stub_type = arm_stub_none;
3278 eh->stub_size = 0;
3279 eh->stub_template = NULL;
3280 eh->stub_template_size = 0;
3281 eh->h = NULL;
3282 eh->id_sec = NULL;
3283 eh->output_name = NULL;
3284 }
3285
3286 return entry;
3287 }
3288
3289 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3290 shortcuts to them in our hash table. */
3291
3292 static bfd_boolean
3293 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3294 {
3295 struct elf32_arm_link_hash_table *htab;
3296
3297 htab = elf32_arm_hash_table (info);
3298 if (htab == NULL)
3299 return FALSE;
3300
3301 /* BPABI objects never have a GOT, or associated sections. */
3302 if (htab->symbian_p)
3303 return TRUE;
3304
3305 if (! _bfd_elf_create_got_section (dynobj, info))
3306 return FALSE;
3307
3308 return TRUE;
3309 }
3310
3311 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3312
3313 static bfd_boolean
3314 create_ifunc_sections (struct bfd_link_info *info)
3315 {
3316 struct elf32_arm_link_hash_table *htab;
3317 const struct elf_backend_data *bed;
3318 bfd *dynobj;
3319 asection *s;
3320 flagword flags;
3321
3322 htab = elf32_arm_hash_table (info);
3323 dynobj = htab->root.dynobj;
3324 bed = get_elf_backend_data (dynobj);
3325 flags = bed->dynamic_sec_flags;
3326
3327 if (htab->root.iplt == NULL)
3328 {
3329 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3330 flags | SEC_READONLY | SEC_CODE);
3331 if (s == NULL
3332 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3333 return FALSE;
3334 htab->root.iplt = s;
3335 }
3336
3337 if (htab->root.irelplt == NULL)
3338 {
3339 s = bfd_make_section_anyway_with_flags (dynobj,
3340 RELOC_SECTION (htab, ".iplt"),
3341 flags | SEC_READONLY);
3342 if (s == NULL
3343 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3344 return FALSE;
3345 htab->root.irelplt = s;
3346 }
3347
3348 if (htab->root.igotplt == NULL)
3349 {
3350 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3351 if (s == NULL
3352 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3353 return FALSE;
3354 htab->root.igotplt = s;
3355 }
3356 return TRUE;
3357 }
3358
3359 /* Determine if we're dealing with a Thumb only architecture. */
3360
3361 static bfd_boolean
3362 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3363 {
3364 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3365 Tag_CPU_arch);
3366 int profile;
3367
3368 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3369 return TRUE;
3370
3371 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3372 return FALSE;
3373
3374 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3375 Tag_CPU_arch_profile);
3376
3377 return profile == 'M';
3378 }
3379
3380 /* Determine if we're dealing with a Thumb-2 object. */
3381
3382 static bfd_boolean
3383 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3384 {
3385 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3386 Tag_CPU_arch);
3387 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3388 }
3389
3390 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3391 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3392 hash table. */
3393
3394 static bfd_boolean
3395 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3396 {
3397 struct elf32_arm_link_hash_table *htab;
3398
3399 htab = elf32_arm_hash_table (info);
3400 if (htab == NULL)
3401 return FALSE;
3402
3403 if (!htab->root.sgot && !create_got_section (dynobj, info))
3404 return FALSE;
3405
3406 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3407 return FALSE;
3408
3409 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3410 if (!info->shared)
3411 htab->srelbss = bfd_get_linker_section (dynobj,
3412 RELOC_SECTION (htab, ".bss"));
3413
3414 if (htab->vxworks_p)
3415 {
3416 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3417 return FALSE;
3418
3419 if (info->shared)
3420 {
3421 htab->plt_header_size = 0;
3422 htab->plt_entry_size
3423 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3424 }
3425 else
3426 {
3427 htab->plt_header_size
3428 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3429 htab->plt_entry_size
3430 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3431 }
3432 }
3433 else
3434 {
3435 /* PR ld/16017
3436 Test for thumb only architectures. Note - we cannot just call
3437 using_thumb_only() as the attributes in the output bfd have not been
3438 initialised at this point, so instead we use the input bfd. */
3439 bfd * saved_obfd = htab->obfd;
3440
3441 htab->obfd = dynobj;
3442 if (using_thumb_only (htab))
3443 {
3444 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3445 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3446 }
3447 htab->obfd = saved_obfd;
3448 }
3449
3450 if (!htab->root.splt
3451 || !htab->root.srelplt
3452 || !htab->sdynbss
3453 || (!info->shared && !htab->srelbss))
3454 abort ();
3455
3456 return TRUE;
3457 }
3458
3459 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3460
3461 static void
3462 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3463 struct elf_link_hash_entry *dir,
3464 struct elf_link_hash_entry *ind)
3465 {
3466 struct elf32_arm_link_hash_entry *edir, *eind;
3467
3468 edir = (struct elf32_arm_link_hash_entry *) dir;
3469 eind = (struct elf32_arm_link_hash_entry *) ind;
3470
3471 if (eind->dyn_relocs != NULL)
3472 {
3473 if (edir->dyn_relocs != NULL)
3474 {
3475 struct elf_dyn_relocs **pp;
3476 struct elf_dyn_relocs *p;
3477
3478 /* Add reloc counts against the indirect sym to the direct sym
3479 list. Merge any entries against the same section. */
3480 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3481 {
3482 struct elf_dyn_relocs *q;
3483
3484 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3485 if (q->sec == p->sec)
3486 {
3487 q->pc_count += p->pc_count;
3488 q->count += p->count;
3489 *pp = p->next;
3490 break;
3491 }
3492 if (q == NULL)
3493 pp = &p->next;
3494 }
3495 *pp = edir->dyn_relocs;
3496 }
3497
3498 edir->dyn_relocs = eind->dyn_relocs;
3499 eind->dyn_relocs = NULL;
3500 }
3501
3502 if (ind->root.type == bfd_link_hash_indirect)
3503 {
3504 /* Copy over PLT info. */
3505 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3506 eind->plt.thumb_refcount = 0;
3507 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3508 eind->plt.maybe_thumb_refcount = 0;
3509 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3510 eind->plt.noncall_refcount = 0;
3511
3512 /* We should only allocate a function to .iplt once the final
3513 symbol information is known. */
3514 BFD_ASSERT (!eind->is_iplt);
3515
3516 if (dir->got.refcount <= 0)
3517 {
3518 edir->tls_type = eind->tls_type;
3519 eind->tls_type = GOT_UNKNOWN;
3520 }
3521 }
3522
3523 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3524 }
3525
3526 /* Destroy an ARM elf linker hash table. */
3527
3528 static void
3529 elf32_arm_link_hash_table_free (struct bfd_link_hash_table *hash)
3530 {
3531 struct elf32_arm_link_hash_table *ret
3532 = (struct elf32_arm_link_hash_table *) hash;
3533
3534 bfd_hash_table_free (&ret->stub_hash_table);
3535 _bfd_elf_link_hash_table_free (hash);
3536 }
3537
3538 /* Create an ARM elf linker hash table. */
3539
3540 static struct bfd_link_hash_table *
3541 elf32_arm_link_hash_table_create (bfd *abfd)
3542 {
3543 struct elf32_arm_link_hash_table *ret;
3544 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3545
3546 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3547 if (ret == NULL)
3548 return NULL;
3549
3550 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3551 elf32_arm_link_hash_newfunc,
3552 sizeof (struct elf32_arm_link_hash_entry),
3553 ARM_ELF_DATA))
3554 {
3555 free (ret);
3556 return NULL;
3557 }
3558
3559 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3560 #ifdef FOUR_WORD_PLT
3561 ret->plt_header_size = 16;
3562 ret->plt_entry_size = 16;
3563 #else
3564 ret->plt_header_size = 20;
3565 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3566 #endif
3567 ret->use_rel = 1;
3568 ret->obfd = abfd;
3569
3570 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3571 sizeof (struct elf32_arm_stub_hash_entry)))
3572 {
3573 free (ret);
3574 return NULL;
3575 }
3576
3577 return &ret->root.root;
3578 }
3579
3580 /* Determine what kind of NOPs are available. */
3581
3582 static bfd_boolean
3583 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3584 {
3585 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3586 Tag_CPU_arch);
3587 return arch == TAG_CPU_ARCH_V6T2
3588 || arch == TAG_CPU_ARCH_V6K
3589 || arch == TAG_CPU_ARCH_V7
3590 || arch == TAG_CPU_ARCH_V7E_M;
3591 }
3592
3593 static bfd_boolean
3594 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3595 {
3596 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3597 Tag_CPU_arch);
3598 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3599 || arch == TAG_CPU_ARCH_V7E_M);
3600 }
3601
3602 static bfd_boolean
3603 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3604 {
3605 switch (stub_type)
3606 {
3607 case arm_stub_long_branch_thumb_only:
3608 case arm_stub_long_branch_v4t_thumb_arm:
3609 case arm_stub_short_branch_v4t_thumb_arm:
3610 case arm_stub_long_branch_v4t_thumb_arm_pic:
3611 case arm_stub_long_branch_v4t_thumb_tls_pic:
3612 case arm_stub_long_branch_thumb_only_pic:
3613 return TRUE;
3614 case arm_stub_none:
3615 BFD_FAIL ();
3616 return FALSE;
3617 break;
3618 default:
3619 return FALSE;
3620 }
3621 }
3622
3623 /* Determine the type of stub needed, if any, for a call. */
3624
3625 static enum elf32_arm_stub_type
3626 arm_type_of_stub (struct bfd_link_info *info,
3627 asection *input_sec,
3628 const Elf_Internal_Rela *rel,
3629 unsigned char st_type,
3630 enum arm_st_branch_type *actual_branch_type,
3631 struct elf32_arm_link_hash_entry *hash,
3632 bfd_vma destination,
3633 asection *sym_sec,
3634 bfd *input_bfd,
3635 const char *name)
3636 {
3637 bfd_vma location;
3638 bfd_signed_vma branch_offset;
3639 unsigned int r_type;
3640 struct elf32_arm_link_hash_table * globals;
3641 int thumb2;
3642 int thumb_only;
3643 enum elf32_arm_stub_type stub_type = arm_stub_none;
3644 int use_plt = 0;
3645 enum arm_st_branch_type branch_type = *actual_branch_type;
3646 union gotplt_union *root_plt;
3647 struct arm_plt_info *arm_plt;
3648
3649 if (branch_type == ST_BRANCH_LONG)
3650 return stub_type;
3651
3652 globals = elf32_arm_hash_table (info);
3653 if (globals == NULL)
3654 return stub_type;
3655
3656 thumb_only = using_thumb_only (globals);
3657
3658 thumb2 = using_thumb2 (globals);
3659
3660 /* Determine where the call point is. */
3661 location = (input_sec->output_offset
3662 + input_sec->output_section->vma
3663 + rel->r_offset);
3664
3665 r_type = ELF32_R_TYPE (rel->r_info);
3666
3667 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3668 are considering a function call relocation. */
3669 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3670 && branch_type == ST_BRANCH_TO_ARM)
3671 branch_type = ST_BRANCH_TO_THUMB;
3672
3673 /* For TLS call relocs, it is the caller's responsibility to provide
3674 the address of the appropriate trampoline. */
3675 if (r_type != R_ARM_TLS_CALL
3676 && r_type != R_ARM_THM_TLS_CALL
3677 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3678 &root_plt, &arm_plt)
3679 && root_plt->offset != (bfd_vma) -1)
3680 {
3681 asection *splt;
3682
3683 if (hash == NULL || hash->is_iplt)
3684 splt = globals->root.iplt;
3685 else
3686 splt = globals->root.splt;
3687 if (splt != NULL)
3688 {
3689 use_plt = 1;
3690
3691 /* Note when dealing with PLT entries: the main PLT stub is in
3692 ARM mode, so if the branch is in Thumb mode, another
3693 Thumb->ARM stub will be inserted later just before the ARM
3694 PLT stub. We don't take this extra distance into account
3695 here, because if a long branch stub is needed, we'll add a
3696 Thumb->Arm one and branch directly to the ARM PLT entry
3697 because it avoids spreading offset corrections in several
3698 places. */
3699
3700 destination = (splt->output_section->vma
3701 + splt->output_offset
3702 + root_plt->offset);
3703 st_type = STT_FUNC;
3704 branch_type = ST_BRANCH_TO_ARM;
3705 }
3706 }
3707 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3708 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3709
3710 branch_offset = (bfd_signed_vma)(destination - location);
3711
3712 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3713 || r_type == R_ARM_THM_TLS_CALL)
3714 {
3715 /* Handle cases where:
3716 - this call goes too far (different Thumb/Thumb2 max
3717 distance)
3718 - it's a Thumb->Arm call and blx is not available, or it's a
3719 Thumb->Arm branch (not bl). A stub is needed in this case,
3720 but only if this call is not through a PLT entry. Indeed,
3721 PLT stubs handle mode switching already.
3722 */
3723 if ((!thumb2
3724 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3725 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3726 || (thumb2
3727 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3728 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3729 || (branch_type == ST_BRANCH_TO_ARM
3730 && (((r_type == R_ARM_THM_CALL
3731 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3732 || (r_type == R_ARM_THM_JUMP24))
3733 && !use_plt))
3734 {
3735 if (branch_type == ST_BRANCH_TO_THUMB)
3736 {
3737 /* Thumb to thumb. */
3738 if (!thumb_only)
3739 {
3740 stub_type = (info->shared | globals->pic_veneer)
3741 /* PIC stubs. */
3742 ? ((globals->use_blx
3743 && (r_type == R_ARM_THM_CALL))
3744 /* V5T and above. Stub starts with ARM code, so
3745 we must be able to switch mode before
3746 reaching it, which is only possible for 'bl'
3747 (ie R_ARM_THM_CALL relocation). */
3748 ? arm_stub_long_branch_any_thumb_pic
3749 /* On V4T, use Thumb code only. */
3750 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3751
3752 /* non-PIC stubs. */
3753 : ((globals->use_blx
3754 && (r_type == R_ARM_THM_CALL))
3755 /* V5T and above. */
3756 ? arm_stub_long_branch_any_any
3757 /* V4T. */
3758 : arm_stub_long_branch_v4t_thumb_thumb);
3759 }
3760 else
3761 {
3762 stub_type = (info->shared | globals->pic_veneer)
3763 /* PIC stub. */
3764 ? arm_stub_long_branch_thumb_only_pic
3765 /* non-PIC stub. */
3766 : arm_stub_long_branch_thumb_only;
3767 }
3768 }
3769 else
3770 {
3771 /* Thumb to arm. */
3772 if (sym_sec != NULL
3773 && sym_sec->owner != NULL
3774 && !INTERWORK_FLAG (sym_sec->owner))
3775 {
3776 (*_bfd_error_handler)
3777 (_("%B(%s): warning: interworking not enabled.\n"
3778 " first occurrence: %B: Thumb call to ARM"),
3779 sym_sec->owner, input_bfd, name);
3780 }
3781
3782 stub_type =
3783 (info->shared | globals->pic_veneer)
3784 /* PIC stubs. */
3785 ? (r_type == R_ARM_THM_TLS_CALL
3786 /* TLS PIC stubs. */
3787 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3788 : arm_stub_long_branch_v4t_thumb_tls_pic)
3789 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3790 /* V5T PIC and above. */
3791 ? arm_stub_long_branch_any_arm_pic
3792 /* V4T PIC stub. */
3793 : arm_stub_long_branch_v4t_thumb_arm_pic))
3794
3795 /* non-PIC stubs. */
3796 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3797 /* V5T and above. */
3798 ? arm_stub_long_branch_any_any
3799 /* V4T. */
3800 : arm_stub_long_branch_v4t_thumb_arm);
3801
3802 /* Handle v4t short branches. */
3803 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3804 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3805 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3806 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3807 }
3808 }
3809 }
3810 else if (r_type == R_ARM_CALL
3811 || r_type == R_ARM_JUMP24
3812 || r_type == R_ARM_PLT32
3813 || r_type == R_ARM_TLS_CALL)
3814 {
3815 if (branch_type == ST_BRANCH_TO_THUMB)
3816 {
3817 /* Arm to thumb. */
3818
3819 if (sym_sec != NULL
3820 && sym_sec->owner != NULL
3821 && !INTERWORK_FLAG (sym_sec->owner))
3822 {
3823 (*_bfd_error_handler)
3824 (_("%B(%s): warning: interworking not enabled.\n"
3825 " first occurrence: %B: ARM call to Thumb"),
3826 sym_sec->owner, input_bfd, name);
3827 }
3828
3829 /* We have an extra 2-bytes reach because of
3830 the mode change (bit 24 (H) of BLX encoding). */
3831 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3832 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3833 || (r_type == R_ARM_CALL && !globals->use_blx)
3834 || (r_type == R_ARM_JUMP24)
3835 || (r_type == R_ARM_PLT32))
3836 {
3837 stub_type = (info->shared | globals->pic_veneer)
3838 /* PIC stubs. */
3839 ? ((globals->use_blx)
3840 /* V5T and above. */
3841 ? arm_stub_long_branch_any_thumb_pic
3842 /* V4T stub. */
3843 : arm_stub_long_branch_v4t_arm_thumb_pic)
3844
3845 /* non-PIC stubs. */
3846 : ((globals->use_blx)
3847 /* V5T and above. */
3848 ? arm_stub_long_branch_any_any
3849 /* V4T. */
3850 : arm_stub_long_branch_v4t_arm_thumb);
3851 }
3852 }
3853 else
3854 {
3855 /* Arm to arm. */
3856 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3857 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3858 {
3859 stub_type =
3860 (info->shared | globals->pic_veneer)
3861 /* PIC stubs. */
3862 ? (r_type == R_ARM_TLS_CALL
3863 /* TLS PIC Stub. */
3864 ? arm_stub_long_branch_any_tls_pic
3865 : (globals->nacl_p
3866 ? arm_stub_long_branch_arm_nacl_pic
3867 : arm_stub_long_branch_any_arm_pic))
3868 /* non-PIC stubs. */
3869 : (globals->nacl_p
3870 ? arm_stub_long_branch_arm_nacl
3871 : arm_stub_long_branch_any_any);
3872 }
3873 }
3874 }
3875
3876 /* If a stub is needed, record the actual destination type. */
3877 if (stub_type != arm_stub_none)
3878 *actual_branch_type = branch_type;
3879
3880 return stub_type;
3881 }
3882
3883 /* Build a name for an entry in the stub hash table. */
3884
3885 static char *
3886 elf32_arm_stub_name (const asection *input_section,
3887 const asection *sym_sec,
3888 const struct elf32_arm_link_hash_entry *hash,
3889 const Elf_Internal_Rela *rel,
3890 enum elf32_arm_stub_type stub_type)
3891 {
3892 char *stub_name;
3893 bfd_size_type len;
3894
3895 if (hash)
3896 {
3897 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3898 stub_name = (char *) bfd_malloc (len);
3899 if (stub_name != NULL)
3900 sprintf (stub_name, "%08x_%s+%x_%d",
3901 input_section->id & 0xffffffff,
3902 hash->root.root.root.string,
3903 (int) rel->r_addend & 0xffffffff,
3904 (int) stub_type);
3905 }
3906 else
3907 {
3908 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3909 stub_name = (char *) bfd_malloc (len);
3910 if (stub_name != NULL)
3911 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3912 input_section->id & 0xffffffff,
3913 sym_sec->id & 0xffffffff,
3914 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3915 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3916 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3917 (int) rel->r_addend & 0xffffffff,
3918 (int) stub_type);
3919 }
3920
3921 return stub_name;
3922 }
3923
3924 /* Look up an entry in the stub hash. Stub entries are cached because
3925 creating the stub name takes a bit of time. */
3926
3927 static struct elf32_arm_stub_hash_entry *
3928 elf32_arm_get_stub_entry (const asection *input_section,
3929 const asection *sym_sec,
3930 struct elf_link_hash_entry *hash,
3931 const Elf_Internal_Rela *rel,
3932 struct elf32_arm_link_hash_table *htab,
3933 enum elf32_arm_stub_type stub_type)
3934 {
3935 struct elf32_arm_stub_hash_entry *stub_entry;
3936 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3937 const asection *id_sec;
3938
3939 if ((input_section->flags & SEC_CODE) == 0)
3940 return NULL;
3941
3942 /* If this input section is part of a group of sections sharing one
3943 stub section, then use the id of the first section in the group.
3944 Stub names need to include a section id, as there may well be
3945 more than one stub used to reach say, printf, and we need to
3946 distinguish between them. */
3947 id_sec = htab->stub_group[input_section->id].link_sec;
3948
3949 if (h != NULL && h->stub_cache != NULL
3950 && h->stub_cache->h == h
3951 && h->stub_cache->id_sec == id_sec
3952 && h->stub_cache->stub_type == stub_type)
3953 {
3954 stub_entry = h->stub_cache;
3955 }
3956 else
3957 {
3958 char *stub_name;
3959
3960 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3961 if (stub_name == NULL)
3962 return NULL;
3963
3964 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3965 stub_name, FALSE, FALSE);
3966 if (h != NULL)
3967 h->stub_cache = stub_entry;
3968
3969 free (stub_name);
3970 }
3971
3972 return stub_entry;
3973 }
3974
3975 /* Find or create a stub section. Returns a pointer to the stub section, and
3976 the section to which the stub section will be attached (in *LINK_SEC_P).
3977 LINK_SEC_P may be NULL. */
3978
3979 static asection *
3980 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3981 struct elf32_arm_link_hash_table *htab)
3982 {
3983 asection *link_sec;
3984 asection *stub_sec;
3985
3986 link_sec = htab->stub_group[section->id].link_sec;
3987 BFD_ASSERT (link_sec != NULL);
3988 stub_sec = htab->stub_group[section->id].stub_sec;
3989
3990 if (stub_sec == NULL)
3991 {
3992 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3993 if (stub_sec == NULL)
3994 {
3995 size_t namelen;
3996 bfd_size_type len;
3997 char *s_name;
3998
3999 namelen = strlen (link_sec->name);
4000 len = namelen + sizeof (STUB_SUFFIX);
4001 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4002 if (s_name == NULL)
4003 return NULL;
4004
4005 memcpy (s_name, link_sec->name, namelen);
4006 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4007 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4008 htab->nacl_p ? 4 : 3);
4009 if (stub_sec == NULL)
4010 return NULL;
4011 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4012 }
4013 htab->stub_group[section->id].stub_sec = stub_sec;
4014 }
4015
4016 if (link_sec_p)
4017 *link_sec_p = link_sec;
4018
4019 return stub_sec;
4020 }
4021
4022 /* Add a new stub entry to the stub hash. Not all fields of the new
4023 stub entry are initialised. */
4024
4025 static struct elf32_arm_stub_hash_entry *
4026 elf32_arm_add_stub (const char *stub_name,
4027 asection *section,
4028 struct elf32_arm_link_hash_table *htab)
4029 {
4030 asection *link_sec;
4031 asection *stub_sec;
4032 struct elf32_arm_stub_hash_entry *stub_entry;
4033
4034 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4035 if (stub_sec == NULL)
4036 return NULL;
4037
4038 /* Enter this entry into the linker stub hash table. */
4039 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4040 TRUE, FALSE);
4041 if (stub_entry == NULL)
4042 {
4043 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4044 section->owner,
4045 stub_name);
4046 return NULL;
4047 }
4048
4049 stub_entry->stub_sec = stub_sec;
4050 stub_entry->stub_offset = 0;
4051 stub_entry->id_sec = link_sec;
4052
4053 return stub_entry;
4054 }
4055
4056 /* Store an Arm insn into an output section not processed by
4057 elf32_arm_write_section. */
4058
4059 static void
4060 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4061 bfd * output_bfd, bfd_vma val, void * ptr)
4062 {
4063 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4064 bfd_putl32 (val, ptr);
4065 else
4066 bfd_putb32 (val, ptr);
4067 }
4068
4069 /* Store a 16-bit Thumb insn into an output section not processed by
4070 elf32_arm_write_section. */
4071
4072 static void
4073 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4074 bfd * output_bfd, bfd_vma val, void * ptr)
4075 {
4076 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4077 bfd_putl16 (val, ptr);
4078 else
4079 bfd_putb16 (val, ptr);
4080 }
4081
4082 /* If it's possible to change R_TYPE to a more efficient access
4083 model, return the new reloc type. */
4084
4085 static unsigned
4086 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4087 struct elf_link_hash_entry *h)
4088 {
4089 int is_local = (h == NULL);
4090
4091 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4092 return r_type;
4093
4094 /* We do not support relaxations for Old TLS models. */
4095 switch (r_type)
4096 {
4097 case R_ARM_TLS_GOTDESC:
4098 case R_ARM_TLS_CALL:
4099 case R_ARM_THM_TLS_CALL:
4100 case R_ARM_TLS_DESCSEQ:
4101 case R_ARM_THM_TLS_DESCSEQ:
4102 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4103 }
4104
4105 return r_type;
4106 }
4107
4108 static bfd_reloc_status_type elf32_arm_final_link_relocate
4109 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4110 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4111 const char *, unsigned char, enum arm_st_branch_type,
4112 struct elf_link_hash_entry *, bfd_boolean *, char **);
4113
4114 static unsigned int
4115 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4116 {
4117 switch (stub_type)
4118 {
4119 case arm_stub_a8_veneer_b_cond:
4120 case arm_stub_a8_veneer_b:
4121 case arm_stub_a8_veneer_bl:
4122 return 2;
4123
4124 case arm_stub_long_branch_any_any:
4125 case arm_stub_long_branch_v4t_arm_thumb:
4126 case arm_stub_long_branch_thumb_only:
4127 case arm_stub_long_branch_v4t_thumb_thumb:
4128 case arm_stub_long_branch_v4t_thumb_arm:
4129 case arm_stub_short_branch_v4t_thumb_arm:
4130 case arm_stub_long_branch_any_arm_pic:
4131 case arm_stub_long_branch_any_thumb_pic:
4132 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4133 case arm_stub_long_branch_v4t_arm_thumb_pic:
4134 case arm_stub_long_branch_v4t_thumb_arm_pic:
4135 case arm_stub_long_branch_thumb_only_pic:
4136 case arm_stub_long_branch_any_tls_pic:
4137 case arm_stub_long_branch_v4t_thumb_tls_pic:
4138 case arm_stub_a8_veneer_blx:
4139 return 4;
4140
4141 case arm_stub_long_branch_arm_nacl:
4142 case arm_stub_long_branch_arm_nacl_pic:
4143 return 16;
4144
4145 default:
4146 abort (); /* Should be unreachable. */
4147 }
4148 }
4149
4150 static bfd_boolean
4151 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4152 void * in_arg)
4153 {
4154 #define MAXRELOCS 3
4155 struct elf32_arm_stub_hash_entry *stub_entry;
4156 struct elf32_arm_link_hash_table *globals;
4157 struct bfd_link_info *info;
4158 asection *stub_sec;
4159 bfd *stub_bfd;
4160 bfd_byte *loc;
4161 bfd_vma sym_value;
4162 int template_size;
4163 int size;
4164 const insn_sequence *template_sequence;
4165 int i;
4166 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4167 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4168 int nrelocs = 0;
4169
4170 /* Massage our args to the form they really have. */
4171 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4172 info = (struct bfd_link_info *) in_arg;
4173
4174 globals = elf32_arm_hash_table (info);
4175 if (globals == NULL)
4176 return FALSE;
4177
4178 stub_sec = stub_entry->stub_sec;
4179
4180 if ((globals->fix_cortex_a8 < 0)
4181 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4182 /* We have to do less-strictly-aligned fixes last. */
4183 return TRUE;
4184
4185 /* Make a note of the offset within the stubs for this entry. */
4186 stub_entry->stub_offset = stub_sec->size;
4187 loc = stub_sec->contents + stub_entry->stub_offset;
4188
4189 stub_bfd = stub_sec->owner;
4190
4191 /* This is the address of the stub destination. */
4192 sym_value = (stub_entry->target_value
4193 + stub_entry->target_section->output_offset
4194 + stub_entry->target_section->output_section->vma);
4195
4196 template_sequence = stub_entry->stub_template;
4197 template_size = stub_entry->stub_template_size;
4198
4199 size = 0;
4200 for (i = 0; i < template_size; i++)
4201 {
4202 switch (template_sequence[i].type)
4203 {
4204 case THUMB16_TYPE:
4205 {
4206 bfd_vma data = (bfd_vma) template_sequence[i].data;
4207 if (template_sequence[i].reloc_addend != 0)
4208 {
4209 /* We've borrowed the reloc_addend field to mean we should
4210 insert a condition code into this (Thumb-1 branch)
4211 instruction. See THUMB16_BCOND_INSN. */
4212 BFD_ASSERT ((data & 0xff00) == 0xd000);
4213 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4214 }
4215 bfd_put_16 (stub_bfd, data, loc + size);
4216 size += 2;
4217 }
4218 break;
4219
4220 case THUMB32_TYPE:
4221 bfd_put_16 (stub_bfd,
4222 (template_sequence[i].data >> 16) & 0xffff,
4223 loc + size);
4224 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4225 loc + size + 2);
4226 if (template_sequence[i].r_type != R_ARM_NONE)
4227 {
4228 stub_reloc_idx[nrelocs] = i;
4229 stub_reloc_offset[nrelocs++] = size;
4230 }
4231 size += 4;
4232 break;
4233
4234 case ARM_TYPE:
4235 bfd_put_32 (stub_bfd, template_sequence[i].data,
4236 loc + size);
4237 /* Handle cases where the target is encoded within the
4238 instruction. */
4239 if (template_sequence[i].r_type == R_ARM_JUMP24)
4240 {
4241 stub_reloc_idx[nrelocs] = i;
4242 stub_reloc_offset[nrelocs++] = size;
4243 }
4244 size += 4;
4245 break;
4246
4247 case DATA_TYPE:
4248 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4249 stub_reloc_idx[nrelocs] = i;
4250 stub_reloc_offset[nrelocs++] = size;
4251 size += 4;
4252 break;
4253
4254 default:
4255 BFD_FAIL ();
4256 return FALSE;
4257 }
4258 }
4259
4260 stub_sec->size += size;
4261
4262 /* Stub size has already been computed in arm_size_one_stub. Check
4263 consistency. */
4264 BFD_ASSERT (size == stub_entry->stub_size);
4265
4266 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4267 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4268 sym_value |= 1;
4269
4270 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4271 in each stub. */
4272 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4273
4274 for (i = 0; i < nrelocs; i++)
4275 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4276 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4277 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4278 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4279 {
4280 Elf_Internal_Rela rel;
4281 bfd_boolean unresolved_reloc;
4282 char *error_message;
4283 enum arm_st_branch_type branch_type
4284 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4285 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4286 bfd_vma points_to = sym_value + stub_entry->target_addend;
4287
4288 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4289 rel.r_info = ELF32_R_INFO (0,
4290 template_sequence[stub_reloc_idx[i]].r_type);
4291 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4292
4293 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4294 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4295 template should refer back to the instruction after the original
4296 branch. */
4297 points_to = sym_value;
4298
4299 /* There may be unintended consequences if this is not true. */
4300 BFD_ASSERT (stub_entry->h == NULL);
4301
4302 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4303 properly. We should probably use this function unconditionally,
4304 rather than only for certain relocations listed in the enclosing
4305 conditional, for the sake of consistency. */
4306 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4307 (template_sequence[stub_reloc_idx[i]].r_type),
4308 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4309 points_to, info, stub_entry->target_section, "", STT_FUNC,
4310 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4311 &unresolved_reloc, &error_message);
4312 }
4313 else
4314 {
4315 Elf_Internal_Rela rel;
4316 bfd_boolean unresolved_reloc;
4317 char *error_message;
4318 bfd_vma points_to = sym_value + stub_entry->target_addend
4319 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4320
4321 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4322 rel.r_info = ELF32_R_INFO (0,
4323 template_sequence[stub_reloc_idx[i]].r_type);
4324 rel.r_addend = 0;
4325
4326 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4327 (template_sequence[stub_reloc_idx[i]].r_type),
4328 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4329 points_to, info, stub_entry->target_section, "", STT_FUNC,
4330 stub_entry->branch_type,
4331 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4332 &error_message);
4333 }
4334
4335 return TRUE;
4336 #undef MAXRELOCS
4337 }
4338
4339 /* Calculate the template, template size and instruction size for a stub.
4340 Return value is the instruction size. */
4341
4342 static unsigned int
4343 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4344 const insn_sequence **stub_template,
4345 int *stub_template_size)
4346 {
4347 const insn_sequence *template_sequence = NULL;
4348 int template_size = 0, i;
4349 unsigned int size;
4350
4351 template_sequence = stub_definitions[stub_type].template_sequence;
4352 if (stub_template)
4353 *stub_template = template_sequence;
4354
4355 template_size = stub_definitions[stub_type].template_size;
4356 if (stub_template_size)
4357 *stub_template_size = template_size;
4358
4359 size = 0;
4360 for (i = 0; i < template_size; i++)
4361 {
4362 switch (template_sequence[i].type)
4363 {
4364 case THUMB16_TYPE:
4365 size += 2;
4366 break;
4367
4368 case ARM_TYPE:
4369 case THUMB32_TYPE:
4370 case DATA_TYPE:
4371 size += 4;
4372 break;
4373
4374 default:
4375 BFD_FAIL ();
4376 return 0;
4377 }
4378 }
4379
4380 return size;
4381 }
4382
4383 /* As above, but don't actually build the stub. Just bump offset so
4384 we know stub section sizes. */
4385
4386 static bfd_boolean
4387 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4388 void *in_arg ATTRIBUTE_UNUSED)
4389 {
4390 struct elf32_arm_stub_hash_entry *stub_entry;
4391 const insn_sequence *template_sequence;
4392 int template_size, size;
4393
4394 /* Massage our args to the form they really have. */
4395 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4396
4397 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4398 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4399
4400 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4401 &template_size);
4402
4403 stub_entry->stub_size = size;
4404 stub_entry->stub_template = template_sequence;
4405 stub_entry->stub_template_size = template_size;
4406
4407 size = (size + 7) & ~7;
4408 stub_entry->stub_sec->size += size;
4409
4410 return TRUE;
4411 }
4412
4413 /* External entry points for sizing and building linker stubs. */
4414
4415 /* Set up various things so that we can make a list of input sections
4416 for each output section included in the link. Returns -1 on error,
4417 0 when no stubs will be needed, and 1 on success. */
4418
4419 int
4420 elf32_arm_setup_section_lists (bfd *output_bfd,
4421 struct bfd_link_info *info)
4422 {
4423 bfd *input_bfd;
4424 unsigned int bfd_count;
4425 int top_id, top_index;
4426 asection *section;
4427 asection **input_list, **list;
4428 bfd_size_type amt;
4429 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4430
4431 if (htab == NULL)
4432 return 0;
4433 if (! is_elf_hash_table (htab))
4434 return 0;
4435
4436 /* Count the number of input BFDs and find the top input section id. */
4437 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4438 input_bfd != NULL;
4439 input_bfd = input_bfd->link.next)
4440 {
4441 bfd_count += 1;
4442 for (section = input_bfd->sections;
4443 section != NULL;
4444 section = section->next)
4445 {
4446 if (top_id < section->id)
4447 top_id = section->id;
4448 }
4449 }
4450 htab->bfd_count = bfd_count;
4451
4452 amt = sizeof (struct map_stub) * (top_id + 1);
4453 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4454 if (htab->stub_group == NULL)
4455 return -1;
4456 htab->top_id = top_id;
4457
4458 /* We can't use output_bfd->section_count here to find the top output
4459 section index as some sections may have been removed, and
4460 _bfd_strip_section_from_output doesn't renumber the indices. */
4461 for (section = output_bfd->sections, top_index = 0;
4462 section != NULL;
4463 section = section->next)
4464 {
4465 if (top_index < section->index)
4466 top_index = section->index;
4467 }
4468
4469 htab->top_index = top_index;
4470 amt = sizeof (asection *) * (top_index + 1);
4471 input_list = (asection **) bfd_malloc (amt);
4472 htab->input_list = input_list;
4473 if (input_list == NULL)
4474 return -1;
4475
4476 /* For sections we aren't interested in, mark their entries with a
4477 value we can check later. */
4478 list = input_list + top_index;
4479 do
4480 *list = bfd_abs_section_ptr;
4481 while (list-- != input_list);
4482
4483 for (section = output_bfd->sections;
4484 section != NULL;
4485 section = section->next)
4486 {
4487 if ((section->flags & SEC_CODE) != 0)
4488 input_list[section->index] = NULL;
4489 }
4490
4491 return 1;
4492 }
4493
4494 /* The linker repeatedly calls this function for each input section,
4495 in the order that input sections are linked into output sections.
4496 Build lists of input sections to determine groupings between which
4497 we may insert linker stubs. */
4498
4499 void
4500 elf32_arm_next_input_section (struct bfd_link_info *info,
4501 asection *isec)
4502 {
4503 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4504
4505 if (htab == NULL)
4506 return;
4507
4508 if (isec->output_section->index <= htab->top_index)
4509 {
4510 asection **list = htab->input_list + isec->output_section->index;
4511
4512 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4513 {
4514 /* Steal the link_sec pointer for our list. */
4515 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4516 /* This happens to make the list in reverse order,
4517 which we reverse later. */
4518 PREV_SEC (isec) = *list;
4519 *list = isec;
4520 }
4521 }
4522 }
4523
4524 /* See whether we can group stub sections together. Grouping stub
4525 sections may result in fewer stubs. More importantly, we need to
4526 put all .init* and .fini* stubs at the end of the .init or
4527 .fini output sections respectively, because glibc splits the
4528 _init and _fini functions into multiple parts. Putting a stub in
4529 the middle of a function is not a good idea. */
4530
4531 static void
4532 group_sections (struct elf32_arm_link_hash_table *htab,
4533 bfd_size_type stub_group_size,
4534 bfd_boolean stubs_always_after_branch)
4535 {
4536 asection **list = htab->input_list;
4537
4538 do
4539 {
4540 asection *tail = *list;
4541 asection *head;
4542
4543 if (tail == bfd_abs_section_ptr)
4544 continue;
4545
4546 /* Reverse the list: we must avoid placing stubs at the
4547 beginning of the section because the beginning of the text
4548 section may be required for an interrupt vector in bare metal
4549 code. */
4550 #define NEXT_SEC PREV_SEC
4551 head = NULL;
4552 while (tail != NULL)
4553 {
4554 /* Pop from tail. */
4555 asection *item = tail;
4556 tail = PREV_SEC (item);
4557
4558 /* Push on head. */
4559 NEXT_SEC (item) = head;
4560 head = item;
4561 }
4562
4563 while (head != NULL)
4564 {
4565 asection *curr;
4566 asection *next;
4567 bfd_vma stub_group_start = head->output_offset;
4568 bfd_vma end_of_next;
4569
4570 curr = head;
4571 while (NEXT_SEC (curr) != NULL)
4572 {
4573 next = NEXT_SEC (curr);
4574 end_of_next = next->output_offset + next->size;
4575 if (end_of_next - stub_group_start >= stub_group_size)
4576 /* End of NEXT is too far from start, so stop. */
4577 break;
4578 /* Add NEXT to the group. */
4579 curr = next;
4580 }
4581
4582 /* OK, the size from the start to the start of CURR is less
4583 than stub_group_size and thus can be handled by one stub
4584 section. (Or the head section is itself larger than
4585 stub_group_size, in which case we may be toast.)
4586 We should really be keeping track of the total size of
4587 stubs added here, as stubs contribute to the final output
4588 section size. */
4589 do
4590 {
4591 next = NEXT_SEC (head);
4592 /* Set up this stub group. */
4593 htab->stub_group[head->id].link_sec = curr;
4594 }
4595 while (head != curr && (head = next) != NULL);
4596
4597 /* But wait, there's more! Input sections up to stub_group_size
4598 bytes after the stub section can be handled by it too. */
4599 if (!stubs_always_after_branch)
4600 {
4601 stub_group_start = curr->output_offset + curr->size;
4602
4603 while (next != NULL)
4604 {
4605 end_of_next = next->output_offset + next->size;
4606 if (end_of_next - stub_group_start >= stub_group_size)
4607 /* End of NEXT is too far from stubs, so stop. */
4608 break;
4609 /* Add NEXT to the stub group. */
4610 head = next;
4611 next = NEXT_SEC (head);
4612 htab->stub_group[head->id].link_sec = curr;
4613 }
4614 }
4615 head = next;
4616 }
4617 }
4618 while (list++ != htab->input_list + htab->top_index);
4619
4620 free (htab->input_list);
4621 #undef PREV_SEC
4622 #undef NEXT_SEC
4623 }
4624
4625 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4626 erratum fix. */
4627
4628 static int
4629 a8_reloc_compare (const void *a, const void *b)
4630 {
4631 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4632 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4633
4634 if (ra->from < rb->from)
4635 return -1;
4636 else if (ra->from > rb->from)
4637 return 1;
4638 else
4639 return 0;
4640 }
4641
4642 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4643 const char *, char **);
4644
4645 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4646 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4647 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4648 otherwise. */
4649
4650 static bfd_boolean
4651 cortex_a8_erratum_scan (bfd *input_bfd,
4652 struct bfd_link_info *info,
4653 struct a8_erratum_fix **a8_fixes_p,
4654 unsigned int *num_a8_fixes_p,
4655 unsigned int *a8_fix_table_size_p,
4656 struct a8_erratum_reloc *a8_relocs,
4657 unsigned int num_a8_relocs,
4658 unsigned prev_num_a8_fixes,
4659 bfd_boolean *stub_changed_p)
4660 {
4661 asection *section;
4662 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4663 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4664 unsigned int num_a8_fixes = *num_a8_fixes_p;
4665 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4666
4667 if (htab == NULL)
4668 return FALSE;
4669
4670 for (section = input_bfd->sections;
4671 section != NULL;
4672 section = section->next)
4673 {
4674 bfd_byte *contents = NULL;
4675 struct _arm_elf_section_data *sec_data;
4676 unsigned int span;
4677 bfd_vma base_vma;
4678
4679 if (elf_section_type (section) != SHT_PROGBITS
4680 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4681 || (section->flags & SEC_EXCLUDE) != 0
4682 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4683 || (section->output_section == bfd_abs_section_ptr))
4684 continue;
4685
4686 base_vma = section->output_section->vma + section->output_offset;
4687
4688 if (elf_section_data (section)->this_hdr.contents != NULL)
4689 contents = elf_section_data (section)->this_hdr.contents;
4690 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4691 return TRUE;
4692
4693 sec_data = elf32_arm_section_data (section);
4694
4695 for (span = 0; span < sec_data->mapcount; span++)
4696 {
4697 unsigned int span_start = sec_data->map[span].vma;
4698 unsigned int span_end = (span == sec_data->mapcount - 1)
4699 ? section->size : sec_data->map[span + 1].vma;
4700 unsigned int i;
4701 char span_type = sec_data->map[span].type;
4702 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4703
4704 if (span_type != 't')
4705 continue;
4706
4707 /* Span is entirely within a single 4KB region: skip scanning. */
4708 if (((base_vma + span_start) & ~0xfff)
4709 == ((base_vma + span_end) & ~0xfff))
4710 continue;
4711
4712 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4713
4714 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4715 * The branch target is in the same 4KB region as the
4716 first half of the branch.
4717 * The instruction before the branch is a 32-bit
4718 length non-branch instruction. */
4719 for (i = span_start; i < span_end;)
4720 {
4721 unsigned int insn = bfd_getl16 (&contents[i]);
4722 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4723 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4724
4725 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4726 insn_32bit = TRUE;
4727
4728 if (insn_32bit)
4729 {
4730 /* Load the rest of the insn (in manual-friendly order). */
4731 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4732
4733 /* Encoding T4: B<c>.W. */
4734 is_b = (insn & 0xf800d000) == 0xf0009000;
4735 /* Encoding T1: BL<c>.W. */
4736 is_bl = (insn & 0xf800d000) == 0xf000d000;
4737 /* Encoding T2: BLX<c>.W. */
4738 is_blx = (insn & 0xf800d000) == 0xf000c000;
4739 /* Encoding T3: B<c>.W (not permitted in IT block). */
4740 is_bcc = (insn & 0xf800d000) == 0xf0008000
4741 && (insn & 0x07f00000) != 0x03800000;
4742 }
4743
4744 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4745
4746 if (((base_vma + i) & 0xfff) == 0xffe
4747 && insn_32bit
4748 && is_32bit_branch
4749 && last_was_32bit
4750 && ! last_was_branch)
4751 {
4752 bfd_signed_vma offset = 0;
4753 bfd_boolean force_target_arm = FALSE;
4754 bfd_boolean force_target_thumb = FALSE;
4755 bfd_vma target;
4756 enum elf32_arm_stub_type stub_type = arm_stub_none;
4757 struct a8_erratum_reloc key, *found;
4758 bfd_boolean use_plt = FALSE;
4759
4760 key.from = base_vma + i;
4761 found = (struct a8_erratum_reloc *)
4762 bsearch (&key, a8_relocs, num_a8_relocs,
4763 sizeof (struct a8_erratum_reloc),
4764 &a8_reloc_compare);
4765
4766 if (found)
4767 {
4768 char *error_message = NULL;
4769 struct elf_link_hash_entry *entry;
4770
4771 /* We don't care about the error returned from this
4772 function, only if there is glue or not. */
4773 entry = find_thumb_glue (info, found->sym_name,
4774 &error_message);
4775
4776 if (entry)
4777 found->non_a8_stub = TRUE;
4778
4779 /* Keep a simpler condition, for the sake of clarity. */
4780 if (htab->root.splt != NULL && found->hash != NULL
4781 && found->hash->root.plt.offset != (bfd_vma) -1)
4782 use_plt = TRUE;
4783
4784 if (found->r_type == R_ARM_THM_CALL)
4785 {
4786 if (found->branch_type == ST_BRANCH_TO_ARM
4787 || use_plt)
4788 force_target_arm = TRUE;
4789 else
4790 force_target_thumb = TRUE;
4791 }
4792 }
4793
4794 /* Check if we have an offending branch instruction. */
4795
4796 if (found && found->non_a8_stub)
4797 /* We've already made a stub for this instruction, e.g.
4798 it's a long branch or a Thumb->ARM stub. Assume that
4799 stub will suffice to work around the A8 erratum (see
4800 setting of always_after_branch above). */
4801 ;
4802 else if (is_bcc)
4803 {
4804 offset = (insn & 0x7ff) << 1;
4805 offset |= (insn & 0x3f0000) >> 4;
4806 offset |= (insn & 0x2000) ? 0x40000 : 0;
4807 offset |= (insn & 0x800) ? 0x80000 : 0;
4808 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4809 if (offset & 0x100000)
4810 offset |= ~ ((bfd_signed_vma) 0xfffff);
4811 stub_type = arm_stub_a8_veneer_b_cond;
4812 }
4813 else if (is_b || is_bl || is_blx)
4814 {
4815 int s = (insn & 0x4000000) != 0;
4816 int j1 = (insn & 0x2000) != 0;
4817 int j2 = (insn & 0x800) != 0;
4818 int i1 = !(j1 ^ s);
4819 int i2 = !(j2 ^ s);
4820
4821 offset = (insn & 0x7ff) << 1;
4822 offset |= (insn & 0x3ff0000) >> 4;
4823 offset |= i2 << 22;
4824 offset |= i1 << 23;
4825 offset |= s << 24;
4826 if (offset & 0x1000000)
4827 offset |= ~ ((bfd_signed_vma) 0xffffff);
4828
4829 if (is_blx)
4830 offset &= ~ ((bfd_signed_vma) 3);
4831
4832 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4833 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4834 }
4835
4836 if (stub_type != arm_stub_none)
4837 {
4838 bfd_vma pc_for_insn = base_vma + i + 4;
4839
4840 /* The original instruction is a BL, but the target is
4841 an ARM instruction. If we were not making a stub,
4842 the BL would have been converted to a BLX. Use the
4843 BLX stub instead in that case. */
4844 if (htab->use_blx && force_target_arm
4845 && stub_type == arm_stub_a8_veneer_bl)
4846 {
4847 stub_type = arm_stub_a8_veneer_blx;
4848 is_blx = TRUE;
4849 is_bl = FALSE;
4850 }
4851 /* Conversely, if the original instruction was
4852 BLX but the target is Thumb mode, use the BL
4853 stub. */
4854 else if (force_target_thumb
4855 && stub_type == arm_stub_a8_veneer_blx)
4856 {
4857 stub_type = arm_stub_a8_veneer_bl;
4858 is_blx = FALSE;
4859 is_bl = TRUE;
4860 }
4861
4862 if (is_blx)
4863 pc_for_insn &= ~ ((bfd_vma) 3);
4864
4865 /* If we found a relocation, use the proper destination,
4866 not the offset in the (unrelocated) instruction.
4867 Note this is always done if we switched the stub type
4868 above. */
4869 if (found)
4870 offset =
4871 (bfd_signed_vma) (found->destination - pc_for_insn);
4872
4873 /* If the stub will use a Thumb-mode branch to a
4874 PLT target, redirect it to the preceding Thumb
4875 entry point. */
4876 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4877 offset -= PLT_THUMB_STUB_SIZE;
4878
4879 target = pc_for_insn + offset;
4880
4881 /* The BLX stub is ARM-mode code. Adjust the offset to
4882 take the different PC value (+8 instead of +4) into
4883 account. */
4884 if (stub_type == arm_stub_a8_veneer_blx)
4885 offset += 4;
4886
4887 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4888 {
4889 char *stub_name = NULL;
4890
4891 if (num_a8_fixes == a8_fix_table_size)
4892 {
4893 a8_fix_table_size *= 2;
4894 a8_fixes = (struct a8_erratum_fix *)
4895 bfd_realloc (a8_fixes,
4896 sizeof (struct a8_erratum_fix)
4897 * a8_fix_table_size);
4898 }
4899
4900 if (num_a8_fixes < prev_num_a8_fixes)
4901 {
4902 /* If we're doing a subsequent scan,
4903 check if we've found the same fix as
4904 before, and try and reuse the stub
4905 name. */
4906 stub_name = a8_fixes[num_a8_fixes].stub_name;
4907 if ((a8_fixes[num_a8_fixes].section != section)
4908 || (a8_fixes[num_a8_fixes].offset != i))
4909 {
4910 free (stub_name);
4911 stub_name = NULL;
4912 *stub_changed_p = TRUE;
4913 }
4914 }
4915
4916 if (!stub_name)
4917 {
4918 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4919 if (stub_name != NULL)
4920 sprintf (stub_name, "%x:%x", section->id, i);
4921 }
4922
4923 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4924 a8_fixes[num_a8_fixes].section = section;
4925 a8_fixes[num_a8_fixes].offset = i;
4926 a8_fixes[num_a8_fixes].addend = offset;
4927 a8_fixes[num_a8_fixes].orig_insn = insn;
4928 a8_fixes[num_a8_fixes].stub_name = stub_name;
4929 a8_fixes[num_a8_fixes].stub_type = stub_type;
4930 a8_fixes[num_a8_fixes].branch_type =
4931 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4932
4933 num_a8_fixes++;
4934 }
4935 }
4936 }
4937
4938 i += insn_32bit ? 4 : 2;
4939 last_was_32bit = insn_32bit;
4940 last_was_branch = is_32bit_branch;
4941 }
4942 }
4943
4944 if (elf_section_data (section)->this_hdr.contents == NULL)
4945 free (contents);
4946 }
4947
4948 *a8_fixes_p = a8_fixes;
4949 *num_a8_fixes_p = num_a8_fixes;
4950 *a8_fix_table_size_p = a8_fix_table_size;
4951
4952 return FALSE;
4953 }
4954
4955 /* Determine and set the size of the stub section for a final link.
4956
4957 The basic idea here is to examine all the relocations looking for
4958 PC-relative calls to a target that is unreachable with a "bl"
4959 instruction. */
4960
4961 bfd_boolean
4962 elf32_arm_size_stubs (bfd *output_bfd,
4963 bfd *stub_bfd,
4964 struct bfd_link_info *info,
4965 bfd_signed_vma group_size,
4966 asection * (*add_stub_section) (const char *, asection *,
4967 unsigned int),
4968 void (*layout_sections_again) (void))
4969 {
4970 bfd_size_type stub_group_size;
4971 bfd_boolean stubs_always_after_branch;
4972 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4973 struct a8_erratum_fix *a8_fixes = NULL;
4974 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4975 struct a8_erratum_reloc *a8_relocs = NULL;
4976 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4977
4978 if (htab == NULL)
4979 return FALSE;
4980
4981 if (htab->fix_cortex_a8)
4982 {
4983 a8_fixes = (struct a8_erratum_fix *)
4984 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4985 a8_relocs = (struct a8_erratum_reloc *)
4986 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4987 }
4988
4989 /* Propagate mach to stub bfd, because it may not have been
4990 finalized when we created stub_bfd. */
4991 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4992 bfd_get_mach (output_bfd));
4993
4994 /* Stash our params away. */
4995 htab->stub_bfd = stub_bfd;
4996 htab->add_stub_section = add_stub_section;
4997 htab->layout_sections_again = layout_sections_again;
4998 stubs_always_after_branch = group_size < 0;
4999
5000 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5001 as the first half of a 32-bit branch straddling two 4K pages. This is a
5002 crude way of enforcing that. */
5003 if (htab->fix_cortex_a8)
5004 stubs_always_after_branch = 1;
5005
5006 if (group_size < 0)
5007 stub_group_size = -group_size;
5008 else
5009 stub_group_size = group_size;
5010
5011 if (stub_group_size == 1)
5012 {
5013 /* Default values. */
5014 /* Thumb branch range is +-4MB has to be used as the default
5015 maximum size (a given section can contain both ARM and Thumb
5016 code, so the worst case has to be taken into account).
5017
5018 This value is 24K less than that, which allows for 2025
5019 12-byte stubs. If we exceed that, then we will fail to link.
5020 The user will have to relink with an explicit group size
5021 option. */
5022 stub_group_size = 4170000;
5023 }
5024
5025 group_sections (htab, stub_group_size, stubs_always_after_branch);
5026
5027 /* If we're applying the cortex A8 fix, we need to determine the
5028 program header size now, because we cannot change it later --
5029 that could alter section placements. Notice the A8 erratum fix
5030 ends up requiring the section addresses to remain unchanged
5031 modulo the page size. That's something we cannot represent
5032 inside BFD, and we don't want to force the section alignment to
5033 be the page size. */
5034 if (htab->fix_cortex_a8)
5035 (*htab->layout_sections_again) ();
5036
5037 while (1)
5038 {
5039 bfd *input_bfd;
5040 unsigned int bfd_indx;
5041 asection *stub_sec;
5042 bfd_boolean stub_changed = FALSE;
5043 unsigned prev_num_a8_fixes = num_a8_fixes;
5044
5045 num_a8_fixes = 0;
5046 for (input_bfd = info->input_bfds, bfd_indx = 0;
5047 input_bfd != NULL;
5048 input_bfd = input_bfd->link.next, bfd_indx++)
5049 {
5050 Elf_Internal_Shdr *symtab_hdr;
5051 asection *section;
5052 Elf_Internal_Sym *local_syms = NULL;
5053
5054 if (!is_arm_elf (input_bfd))
5055 continue;
5056
5057 num_a8_relocs = 0;
5058
5059 /* We'll need the symbol table in a second. */
5060 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5061 if (symtab_hdr->sh_info == 0)
5062 continue;
5063
5064 /* Walk over each section attached to the input bfd. */
5065 for (section = input_bfd->sections;
5066 section != NULL;
5067 section = section->next)
5068 {
5069 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5070
5071 /* If there aren't any relocs, then there's nothing more
5072 to do. */
5073 if ((section->flags & SEC_RELOC) == 0
5074 || section->reloc_count == 0
5075 || (section->flags & SEC_CODE) == 0)
5076 continue;
5077
5078 /* If this section is a link-once section that will be
5079 discarded, then don't create any stubs. */
5080 if (section->output_section == NULL
5081 || section->output_section->owner != output_bfd)
5082 continue;
5083
5084 /* Get the relocs. */
5085 internal_relocs
5086 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5087 NULL, info->keep_memory);
5088 if (internal_relocs == NULL)
5089 goto error_ret_free_local;
5090
5091 /* Now examine each relocation. */
5092 irela = internal_relocs;
5093 irelaend = irela + section->reloc_count;
5094 for (; irela < irelaend; irela++)
5095 {
5096 unsigned int r_type, r_indx;
5097 enum elf32_arm_stub_type stub_type;
5098 struct elf32_arm_stub_hash_entry *stub_entry;
5099 asection *sym_sec;
5100 bfd_vma sym_value;
5101 bfd_vma destination;
5102 struct elf32_arm_link_hash_entry *hash;
5103 const char *sym_name;
5104 char *stub_name;
5105 const asection *id_sec;
5106 unsigned char st_type;
5107 enum arm_st_branch_type branch_type;
5108 bfd_boolean created_stub = FALSE;
5109
5110 r_type = ELF32_R_TYPE (irela->r_info);
5111 r_indx = ELF32_R_SYM (irela->r_info);
5112
5113 if (r_type >= (unsigned int) R_ARM_max)
5114 {
5115 bfd_set_error (bfd_error_bad_value);
5116 error_ret_free_internal:
5117 if (elf_section_data (section)->relocs == NULL)
5118 free (internal_relocs);
5119 goto error_ret_free_local;
5120 }
5121
5122 hash = NULL;
5123 if (r_indx >= symtab_hdr->sh_info)
5124 hash = elf32_arm_hash_entry
5125 (elf_sym_hashes (input_bfd)
5126 [r_indx - symtab_hdr->sh_info]);
5127
5128 /* Only look for stubs on branch instructions, or
5129 non-relaxed TLSCALL */
5130 if ((r_type != (unsigned int) R_ARM_CALL)
5131 && (r_type != (unsigned int) R_ARM_THM_CALL)
5132 && (r_type != (unsigned int) R_ARM_JUMP24)
5133 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5134 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5135 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5136 && (r_type != (unsigned int) R_ARM_PLT32)
5137 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5138 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5139 && r_type == elf32_arm_tls_transition
5140 (info, r_type, &hash->root)
5141 && ((hash ? hash->tls_type
5142 : (elf32_arm_local_got_tls_type
5143 (input_bfd)[r_indx]))
5144 & GOT_TLS_GDESC) != 0))
5145 continue;
5146
5147 /* Now determine the call target, its name, value,
5148 section. */
5149 sym_sec = NULL;
5150 sym_value = 0;
5151 destination = 0;
5152 sym_name = NULL;
5153
5154 if (r_type == (unsigned int) R_ARM_TLS_CALL
5155 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5156 {
5157 /* A non-relaxed TLS call. The target is the
5158 plt-resident trampoline and nothing to do
5159 with the symbol. */
5160 BFD_ASSERT (htab->tls_trampoline > 0);
5161 sym_sec = htab->root.splt;
5162 sym_value = htab->tls_trampoline;
5163 hash = 0;
5164 st_type = STT_FUNC;
5165 branch_type = ST_BRANCH_TO_ARM;
5166 }
5167 else if (!hash)
5168 {
5169 /* It's a local symbol. */
5170 Elf_Internal_Sym *sym;
5171
5172 if (local_syms == NULL)
5173 {
5174 local_syms
5175 = (Elf_Internal_Sym *) symtab_hdr->contents;
5176 if (local_syms == NULL)
5177 local_syms
5178 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5179 symtab_hdr->sh_info, 0,
5180 NULL, NULL, NULL);
5181 if (local_syms == NULL)
5182 goto error_ret_free_internal;
5183 }
5184
5185 sym = local_syms + r_indx;
5186 if (sym->st_shndx == SHN_UNDEF)
5187 sym_sec = bfd_und_section_ptr;
5188 else if (sym->st_shndx == SHN_ABS)
5189 sym_sec = bfd_abs_section_ptr;
5190 else if (sym->st_shndx == SHN_COMMON)
5191 sym_sec = bfd_com_section_ptr;
5192 else
5193 sym_sec =
5194 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5195
5196 if (!sym_sec)
5197 /* This is an undefined symbol. It can never
5198 be resolved. */
5199 continue;
5200
5201 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5202 sym_value = sym->st_value;
5203 destination = (sym_value + irela->r_addend
5204 + sym_sec->output_offset
5205 + sym_sec->output_section->vma);
5206 st_type = ELF_ST_TYPE (sym->st_info);
5207 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5208 sym_name
5209 = bfd_elf_string_from_elf_section (input_bfd,
5210 symtab_hdr->sh_link,
5211 sym->st_name);
5212 }
5213 else
5214 {
5215 /* It's an external symbol. */
5216 while (hash->root.root.type == bfd_link_hash_indirect
5217 || hash->root.root.type == bfd_link_hash_warning)
5218 hash = ((struct elf32_arm_link_hash_entry *)
5219 hash->root.root.u.i.link);
5220
5221 if (hash->root.root.type == bfd_link_hash_defined
5222 || hash->root.root.type == bfd_link_hash_defweak)
5223 {
5224 sym_sec = hash->root.root.u.def.section;
5225 sym_value = hash->root.root.u.def.value;
5226
5227 struct elf32_arm_link_hash_table *globals =
5228 elf32_arm_hash_table (info);
5229
5230 /* For a destination in a shared library,
5231 use the PLT stub as target address to
5232 decide whether a branch stub is
5233 needed. */
5234 if (globals != NULL
5235 && globals->root.splt != NULL
5236 && hash != NULL
5237 && hash->root.plt.offset != (bfd_vma) -1)
5238 {
5239 sym_sec = globals->root.splt;
5240 sym_value = hash->root.plt.offset;
5241 if (sym_sec->output_section != NULL)
5242 destination = (sym_value
5243 + sym_sec->output_offset
5244 + sym_sec->output_section->vma);
5245 }
5246 else if (sym_sec->output_section != NULL)
5247 destination = (sym_value + irela->r_addend
5248 + sym_sec->output_offset
5249 + sym_sec->output_section->vma);
5250 }
5251 else if ((hash->root.root.type == bfd_link_hash_undefined)
5252 || (hash->root.root.type == bfd_link_hash_undefweak))
5253 {
5254 /* For a shared library, use the PLT stub as
5255 target address to decide whether a long
5256 branch stub is needed.
5257 For absolute code, they cannot be handled. */
5258 struct elf32_arm_link_hash_table *globals =
5259 elf32_arm_hash_table (info);
5260
5261 if (globals != NULL
5262 && globals->root.splt != NULL
5263 && hash != NULL
5264 && hash->root.plt.offset != (bfd_vma) -1)
5265 {
5266 sym_sec = globals->root.splt;
5267 sym_value = hash->root.plt.offset;
5268 if (sym_sec->output_section != NULL)
5269 destination = (sym_value
5270 + sym_sec->output_offset
5271 + sym_sec->output_section->vma);
5272 }
5273 else
5274 continue;
5275 }
5276 else
5277 {
5278 bfd_set_error (bfd_error_bad_value);
5279 goto error_ret_free_internal;
5280 }
5281 st_type = hash->root.type;
5282 branch_type = hash->root.target_internal;
5283 sym_name = hash->root.root.root.string;
5284 }
5285
5286 do
5287 {
5288 /* Determine what (if any) linker stub is needed. */
5289 stub_type = arm_type_of_stub (info, section, irela,
5290 st_type, &branch_type,
5291 hash, destination, sym_sec,
5292 input_bfd, sym_name);
5293 if (stub_type == arm_stub_none)
5294 break;
5295
5296 /* Support for grouping stub sections. */
5297 id_sec = htab->stub_group[section->id].link_sec;
5298
5299 /* Get the name of this stub. */
5300 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5301 irela, stub_type);
5302 if (!stub_name)
5303 goto error_ret_free_internal;
5304
5305 /* We've either created a stub for this reloc already,
5306 or we are about to. */
5307 created_stub = TRUE;
5308
5309 stub_entry = arm_stub_hash_lookup
5310 (&htab->stub_hash_table, stub_name,
5311 FALSE, FALSE);
5312 if (stub_entry != NULL)
5313 {
5314 /* The proper stub has already been created. */
5315 free (stub_name);
5316 stub_entry->target_value = sym_value;
5317 break;
5318 }
5319
5320 stub_entry = elf32_arm_add_stub (stub_name, section,
5321 htab);
5322 if (stub_entry == NULL)
5323 {
5324 free (stub_name);
5325 goto error_ret_free_internal;
5326 }
5327
5328 stub_entry->target_value = sym_value;
5329 stub_entry->target_section = sym_sec;
5330 stub_entry->stub_type = stub_type;
5331 stub_entry->h = hash;
5332 stub_entry->branch_type = branch_type;
5333
5334 if (sym_name == NULL)
5335 sym_name = "unnamed";
5336 stub_entry->output_name = (char *)
5337 bfd_alloc (htab->stub_bfd,
5338 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5339 + strlen (sym_name));
5340 if (stub_entry->output_name == NULL)
5341 {
5342 free (stub_name);
5343 goto error_ret_free_internal;
5344 }
5345
5346 /* For historical reasons, use the existing names for
5347 ARM-to-Thumb and Thumb-to-ARM stubs. */
5348 if ((r_type == (unsigned int) R_ARM_THM_CALL
5349 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5350 && branch_type == ST_BRANCH_TO_ARM)
5351 sprintf (stub_entry->output_name,
5352 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5353 else if ((r_type == (unsigned int) R_ARM_CALL
5354 || r_type == (unsigned int) R_ARM_JUMP24)
5355 && branch_type == ST_BRANCH_TO_THUMB)
5356 sprintf (stub_entry->output_name,
5357 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5358 else
5359 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5360 sym_name);
5361
5362 stub_changed = TRUE;
5363 }
5364 while (0);
5365
5366 /* Look for relocations which might trigger Cortex-A8
5367 erratum. */
5368 if (htab->fix_cortex_a8
5369 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5370 || r_type == (unsigned int) R_ARM_THM_JUMP19
5371 || r_type == (unsigned int) R_ARM_THM_CALL
5372 || r_type == (unsigned int) R_ARM_THM_XPC22))
5373 {
5374 bfd_vma from = section->output_section->vma
5375 + section->output_offset
5376 + irela->r_offset;
5377
5378 if ((from & 0xfff) == 0xffe)
5379 {
5380 /* Found a candidate. Note we haven't checked the
5381 destination is within 4K here: if we do so (and
5382 don't create an entry in a8_relocs) we can't tell
5383 that a branch should have been relocated when
5384 scanning later. */
5385 if (num_a8_relocs == a8_reloc_table_size)
5386 {
5387 a8_reloc_table_size *= 2;
5388 a8_relocs = (struct a8_erratum_reloc *)
5389 bfd_realloc (a8_relocs,
5390 sizeof (struct a8_erratum_reloc)
5391 * a8_reloc_table_size);
5392 }
5393
5394 a8_relocs[num_a8_relocs].from = from;
5395 a8_relocs[num_a8_relocs].destination = destination;
5396 a8_relocs[num_a8_relocs].r_type = r_type;
5397 a8_relocs[num_a8_relocs].branch_type = branch_type;
5398 a8_relocs[num_a8_relocs].sym_name = sym_name;
5399 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5400 a8_relocs[num_a8_relocs].hash = hash;
5401
5402 num_a8_relocs++;
5403 }
5404 }
5405 }
5406
5407 /* We're done with the internal relocs, free them. */
5408 if (elf_section_data (section)->relocs == NULL)
5409 free (internal_relocs);
5410 }
5411
5412 if (htab->fix_cortex_a8)
5413 {
5414 /* Sort relocs which might apply to Cortex-A8 erratum. */
5415 qsort (a8_relocs, num_a8_relocs,
5416 sizeof (struct a8_erratum_reloc),
5417 &a8_reloc_compare);
5418
5419 /* Scan for branches which might trigger Cortex-A8 erratum. */
5420 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5421 &num_a8_fixes, &a8_fix_table_size,
5422 a8_relocs, num_a8_relocs,
5423 prev_num_a8_fixes, &stub_changed)
5424 != 0)
5425 goto error_ret_free_local;
5426 }
5427 }
5428
5429 if (prev_num_a8_fixes != num_a8_fixes)
5430 stub_changed = TRUE;
5431
5432 if (!stub_changed)
5433 break;
5434
5435 /* OK, we've added some stubs. Find out the new size of the
5436 stub sections. */
5437 for (stub_sec = htab->stub_bfd->sections;
5438 stub_sec != NULL;
5439 stub_sec = stub_sec->next)
5440 {
5441 /* Ignore non-stub sections. */
5442 if (!strstr (stub_sec->name, STUB_SUFFIX))
5443 continue;
5444
5445 stub_sec->size = 0;
5446 }
5447
5448 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5449
5450 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5451 if (htab->fix_cortex_a8)
5452 for (i = 0; i < num_a8_fixes; i++)
5453 {
5454 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5455 a8_fixes[i].section, htab);
5456
5457 if (stub_sec == NULL)
5458 goto error_ret_free_local;
5459
5460 stub_sec->size
5461 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5462 NULL);
5463 }
5464
5465
5466 /* Ask the linker to do its stuff. */
5467 (*htab->layout_sections_again) ();
5468 }
5469
5470 /* Add stubs for Cortex-A8 erratum fixes now. */
5471 if (htab->fix_cortex_a8)
5472 {
5473 for (i = 0; i < num_a8_fixes; i++)
5474 {
5475 struct elf32_arm_stub_hash_entry *stub_entry;
5476 char *stub_name = a8_fixes[i].stub_name;
5477 asection *section = a8_fixes[i].section;
5478 unsigned int section_id = a8_fixes[i].section->id;
5479 asection *link_sec = htab->stub_group[section_id].link_sec;
5480 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5481 const insn_sequence *template_sequence;
5482 int template_size, size = 0;
5483
5484 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5485 TRUE, FALSE);
5486 if (stub_entry == NULL)
5487 {
5488 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5489 section->owner,
5490 stub_name);
5491 return FALSE;
5492 }
5493
5494 stub_entry->stub_sec = stub_sec;
5495 stub_entry->stub_offset = 0;
5496 stub_entry->id_sec = link_sec;
5497 stub_entry->stub_type = a8_fixes[i].stub_type;
5498 stub_entry->target_section = a8_fixes[i].section;
5499 stub_entry->target_value = a8_fixes[i].offset;
5500 stub_entry->target_addend = a8_fixes[i].addend;
5501 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5502 stub_entry->branch_type = a8_fixes[i].branch_type;
5503
5504 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5505 &template_sequence,
5506 &template_size);
5507
5508 stub_entry->stub_size = size;
5509 stub_entry->stub_template = template_sequence;
5510 stub_entry->stub_template_size = template_size;
5511 }
5512
5513 /* Stash the Cortex-A8 erratum fix array for use later in
5514 elf32_arm_write_section(). */
5515 htab->a8_erratum_fixes = a8_fixes;
5516 htab->num_a8_erratum_fixes = num_a8_fixes;
5517 }
5518 else
5519 {
5520 htab->a8_erratum_fixes = NULL;
5521 htab->num_a8_erratum_fixes = 0;
5522 }
5523 return TRUE;
5524
5525 error_ret_free_local:
5526 return FALSE;
5527 }
5528
5529 /* Build all the stubs associated with the current output file. The
5530 stubs are kept in a hash table attached to the main linker hash
5531 table. We also set up the .plt entries for statically linked PIC
5532 functions here. This function is called via arm_elf_finish in the
5533 linker. */
5534
5535 bfd_boolean
5536 elf32_arm_build_stubs (struct bfd_link_info *info)
5537 {
5538 asection *stub_sec;
5539 struct bfd_hash_table *table;
5540 struct elf32_arm_link_hash_table *htab;
5541
5542 htab = elf32_arm_hash_table (info);
5543 if (htab == NULL)
5544 return FALSE;
5545
5546 for (stub_sec = htab->stub_bfd->sections;
5547 stub_sec != NULL;
5548 stub_sec = stub_sec->next)
5549 {
5550 bfd_size_type size;
5551
5552 /* Ignore non-stub sections. */
5553 if (!strstr (stub_sec->name, STUB_SUFFIX))
5554 continue;
5555
5556 /* Allocate memory to hold the linker stubs. */
5557 size = stub_sec->size;
5558 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5559 if (stub_sec->contents == NULL && size != 0)
5560 return FALSE;
5561 stub_sec->size = 0;
5562 }
5563
5564 /* Build the stubs as directed by the stub hash table. */
5565 table = &htab->stub_hash_table;
5566 bfd_hash_traverse (table, arm_build_one_stub, info);
5567 if (htab->fix_cortex_a8)
5568 {
5569 /* Place the cortex a8 stubs last. */
5570 htab->fix_cortex_a8 = -1;
5571 bfd_hash_traverse (table, arm_build_one_stub, info);
5572 }
5573
5574 return TRUE;
5575 }
5576
5577 /* Locate the Thumb encoded calling stub for NAME. */
5578
5579 static struct elf_link_hash_entry *
5580 find_thumb_glue (struct bfd_link_info *link_info,
5581 const char *name,
5582 char **error_message)
5583 {
5584 char *tmp_name;
5585 struct elf_link_hash_entry *hash;
5586 struct elf32_arm_link_hash_table *hash_table;
5587
5588 /* We need a pointer to the armelf specific hash table. */
5589 hash_table = elf32_arm_hash_table (link_info);
5590 if (hash_table == NULL)
5591 return NULL;
5592
5593 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5594 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5595
5596 BFD_ASSERT (tmp_name);
5597
5598 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5599
5600 hash = elf_link_hash_lookup
5601 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5602
5603 if (hash == NULL
5604 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5605 tmp_name, name) == -1)
5606 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5607
5608 free (tmp_name);
5609
5610 return hash;
5611 }
5612
5613 /* Locate the ARM encoded calling stub for NAME. */
5614
5615 static struct elf_link_hash_entry *
5616 find_arm_glue (struct bfd_link_info *link_info,
5617 const char *name,
5618 char **error_message)
5619 {
5620 char *tmp_name;
5621 struct elf_link_hash_entry *myh;
5622 struct elf32_arm_link_hash_table *hash_table;
5623
5624 /* We need a pointer to the elfarm specific hash table. */
5625 hash_table = elf32_arm_hash_table (link_info);
5626 if (hash_table == NULL)
5627 return NULL;
5628
5629 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5630 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5631
5632 BFD_ASSERT (tmp_name);
5633
5634 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5635
5636 myh = elf_link_hash_lookup
5637 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5638
5639 if (myh == NULL
5640 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5641 tmp_name, name) == -1)
5642 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5643
5644 free (tmp_name);
5645
5646 return myh;
5647 }
5648
5649 /* ARM->Thumb glue (static images):
5650
5651 .arm
5652 __func_from_arm:
5653 ldr r12, __func_addr
5654 bx r12
5655 __func_addr:
5656 .word func @ behave as if you saw a ARM_32 reloc.
5657
5658 (v5t static images)
5659 .arm
5660 __func_from_arm:
5661 ldr pc, __func_addr
5662 __func_addr:
5663 .word func @ behave as if you saw a ARM_32 reloc.
5664
5665 (relocatable images)
5666 .arm
5667 __func_from_arm:
5668 ldr r12, __func_offset
5669 add r12, r12, pc
5670 bx r12
5671 __func_offset:
5672 .word func - . */
5673
5674 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5675 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5676 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5677 static const insn32 a2t3_func_addr_insn = 0x00000001;
5678
5679 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5680 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5681 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5682
5683 #define ARM2THUMB_PIC_GLUE_SIZE 16
5684 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5685 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5686 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5687
5688 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5689
5690 .thumb .thumb
5691 .align 2 .align 2
5692 __func_from_thumb: __func_from_thumb:
5693 bx pc push {r6, lr}
5694 nop ldr r6, __func_addr
5695 .arm mov lr, pc
5696 b func bx r6
5697 .arm
5698 ;; back_to_thumb
5699 ldmia r13! {r6, lr}
5700 bx lr
5701 __func_addr:
5702 .word func */
5703
5704 #define THUMB2ARM_GLUE_SIZE 8
5705 static const insn16 t2a1_bx_pc_insn = 0x4778;
5706 static const insn16 t2a2_noop_insn = 0x46c0;
5707 static const insn32 t2a3_b_insn = 0xea000000;
5708
5709 #define VFP11_ERRATUM_VENEER_SIZE 8
5710
5711 #define ARM_BX_VENEER_SIZE 12
5712 static const insn32 armbx1_tst_insn = 0xe3100001;
5713 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5714 static const insn32 armbx3_bx_insn = 0xe12fff10;
5715
5716 #ifndef ELFARM_NABI_C_INCLUDED
5717 static void
5718 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5719 {
5720 asection * s;
5721 bfd_byte * contents;
5722
5723 if (size == 0)
5724 {
5725 /* Do not include empty glue sections in the output. */
5726 if (abfd != NULL)
5727 {
5728 s = bfd_get_linker_section (abfd, name);
5729 if (s != NULL)
5730 s->flags |= SEC_EXCLUDE;
5731 }
5732 return;
5733 }
5734
5735 BFD_ASSERT (abfd != NULL);
5736
5737 s = bfd_get_linker_section (abfd, name);
5738 BFD_ASSERT (s != NULL);
5739
5740 contents = (bfd_byte *) bfd_alloc (abfd, size);
5741
5742 BFD_ASSERT (s->size == size);
5743 s->contents = contents;
5744 }
5745
5746 bfd_boolean
5747 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5748 {
5749 struct elf32_arm_link_hash_table * globals;
5750
5751 globals = elf32_arm_hash_table (info);
5752 BFD_ASSERT (globals != NULL);
5753
5754 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5755 globals->arm_glue_size,
5756 ARM2THUMB_GLUE_SECTION_NAME);
5757
5758 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5759 globals->thumb_glue_size,
5760 THUMB2ARM_GLUE_SECTION_NAME);
5761
5762 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5763 globals->vfp11_erratum_glue_size,
5764 VFP11_ERRATUM_VENEER_SECTION_NAME);
5765
5766 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5767 globals->bx_glue_size,
5768 ARM_BX_GLUE_SECTION_NAME);
5769
5770 return TRUE;
5771 }
5772
5773 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5774 returns the symbol identifying the stub. */
5775
5776 static struct elf_link_hash_entry *
5777 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5778 struct elf_link_hash_entry * h)
5779 {
5780 const char * name = h->root.root.string;
5781 asection * s;
5782 char * tmp_name;
5783 struct elf_link_hash_entry * myh;
5784 struct bfd_link_hash_entry * bh;
5785 struct elf32_arm_link_hash_table * globals;
5786 bfd_vma val;
5787 bfd_size_type size;
5788
5789 globals = elf32_arm_hash_table (link_info);
5790 BFD_ASSERT (globals != NULL);
5791 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5792
5793 s = bfd_get_linker_section
5794 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5795
5796 BFD_ASSERT (s != NULL);
5797
5798 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5799 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5800
5801 BFD_ASSERT (tmp_name);
5802
5803 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5804
5805 myh = elf_link_hash_lookup
5806 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5807
5808 if (myh != NULL)
5809 {
5810 /* We've already seen this guy. */
5811 free (tmp_name);
5812 return myh;
5813 }
5814
5815 /* The only trick here is using hash_table->arm_glue_size as the value.
5816 Even though the section isn't allocated yet, this is where we will be
5817 putting it. The +1 on the value marks that the stub has not been
5818 output yet - not that it is a Thumb function. */
5819 bh = NULL;
5820 val = globals->arm_glue_size + 1;
5821 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5822 tmp_name, BSF_GLOBAL, s, val,
5823 NULL, TRUE, FALSE, &bh);
5824
5825 myh = (struct elf_link_hash_entry *) bh;
5826 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5827 myh->forced_local = 1;
5828
5829 free (tmp_name);
5830
5831 if (link_info->shared || globals->root.is_relocatable_executable
5832 || globals->pic_veneer)
5833 size = ARM2THUMB_PIC_GLUE_SIZE;
5834 else if (globals->use_blx)
5835 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5836 else
5837 size = ARM2THUMB_STATIC_GLUE_SIZE;
5838
5839 s->size += size;
5840 globals->arm_glue_size += size;
5841
5842 return myh;
5843 }
5844
5845 /* Allocate space for ARMv4 BX veneers. */
5846
5847 static void
5848 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5849 {
5850 asection * s;
5851 struct elf32_arm_link_hash_table *globals;
5852 char *tmp_name;
5853 struct elf_link_hash_entry *myh;
5854 struct bfd_link_hash_entry *bh;
5855 bfd_vma val;
5856
5857 /* BX PC does not need a veneer. */
5858 if (reg == 15)
5859 return;
5860
5861 globals = elf32_arm_hash_table (link_info);
5862 BFD_ASSERT (globals != NULL);
5863 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5864
5865 /* Check if this veneer has already been allocated. */
5866 if (globals->bx_glue_offset[reg])
5867 return;
5868
5869 s = bfd_get_linker_section
5870 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5871
5872 BFD_ASSERT (s != NULL);
5873
5874 /* Add symbol for veneer. */
5875 tmp_name = (char *)
5876 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5877
5878 BFD_ASSERT (tmp_name);
5879
5880 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5881
5882 myh = elf_link_hash_lookup
5883 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5884
5885 BFD_ASSERT (myh == NULL);
5886
5887 bh = NULL;
5888 val = globals->bx_glue_size;
5889 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5890 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5891 NULL, TRUE, FALSE, &bh);
5892
5893 myh = (struct elf_link_hash_entry *) bh;
5894 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5895 myh->forced_local = 1;
5896
5897 s->size += ARM_BX_VENEER_SIZE;
5898 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5899 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5900 }
5901
5902
5903 /* Add an entry to the code/data map for section SEC. */
5904
5905 static void
5906 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5907 {
5908 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5909 unsigned int newidx;
5910
5911 if (sec_data->map == NULL)
5912 {
5913 sec_data->map = (elf32_arm_section_map *)
5914 bfd_malloc (sizeof (elf32_arm_section_map));
5915 sec_data->mapcount = 0;
5916 sec_data->mapsize = 1;
5917 }
5918
5919 newidx = sec_data->mapcount++;
5920
5921 if (sec_data->mapcount > sec_data->mapsize)
5922 {
5923 sec_data->mapsize *= 2;
5924 sec_data->map = (elf32_arm_section_map *)
5925 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5926 * sizeof (elf32_arm_section_map));
5927 }
5928
5929 if (sec_data->map)
5930 {
5931 sec_data->map[newidx].vma = vma;
5932 sec_data->map[newidx].type = type;
5933 }
5934 }
5935
5936
5937 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5938 veneers are handled for now. */
5939
5940 static bfd_vma
5941 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5942 elf32_vfp11_erratum_list *branch,
5943 bfd *branch_bfd,
5944 asection *branch_sec,
5945 unsigned int offset)
5946 {
5947 asection *s;
5948 struct elf32_arm_link_hash_table *hash_table;
5949 char *tmp_name;
5950 struct elf_link_hash_entry *myh;
5951 struct bfd_link_hash_entry *bh;
5952 bfd_vma val;
5953 struct _arm_elf_section_data *sec_data;
5954 elf32_vfp11_erratum_list *newerr;
5955
5956 hash_table = elf32_arm_hash_table (link_info);
5957 BFD_ASSERT (hash_table != NULL);
5958 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5959
5960 s = bfd_get_linker_section
5961 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5962
5963 sec_data = elf32_arm_section_data (s);
5964
5965 BFD_ASSERT (s != NULL);
5966
5967 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5968 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5969
5970 BFD_ASSERT (tmp_name);
5971
5972 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5973 hash_table->num_vfp11_fixes);
5974
5975 myh = elf_link_hash_lookup
5976 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5977
5978 BFD_ASSERT (myh == NULL);
5979
5980 bh = NULL;
5981 val = hash_table->vfp11_erratum_glue_size;
5982 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5983 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5984 NULL, TRUE, FALSE, &bh);
5985
5986 myh = (struct elf_link_hash_entry *) bh;
5987 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5988 myh->forced_local = 1;
5989
5990 /* Link veneer back to calling location. */
5991 sec_data->erratumcount += 1;
5992 newerr = (elf32_vfp11_erratum_list *)
5993 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5994
5995 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5996 newerr->vma = -1;
5997 newerr->u.v.branch = branch;
5998 newerr->u.v.id = hash_table->num_vfp11_fixes;
5999 branch->u.b.veneer = newerr;
6000
6001 newerr->next = sec_data->erratumlist;
6002 sec_data->erratumlist = newerr;
6003
6004 /* A symbol for the return from the veneer. */
6005 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6006 hash_table->num_vfp11_fixes);
6007
6008 myh = elf_link_hash_lookup
6009 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6010
6011 if (myh != NULL)
6012 abort ();
6013
6014 bh = NULL;
6015 val = offset + 4;
6016 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6017 branch_sec, val, NULL, TRUE, FALSE, &bh);
6018
6019 myh = (struct elf_link_hash_entry *) bh;
6020 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6021 myh->forced_local = 1;
6022
6023 free (tmp_name);
6024
6025 /* Generate a mapping symbol for the veneer section, and explicitly add an
6026 entry for that symbol to the code/data map for the section. */
6027 if (hash_table->vfp11_erratum_glue_size == 0)
6028 {
6029 bh = NULL;
6030 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6031 ever requires this erratum fix. */
6032 _bfd_generic_link_add_one_symbol (link_info,
6033 hash_table->bfd_of_glue_owner, "$a",
6034 BSF_LOCAL, s, 0, NULL,
6035 TRUE, FALSE, &bh);
6036
6037 myh = (struct elf_link_hash_entry *) bh;
6038 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6039 myh->forced_local = 1;
6040
6041 /* The elf32_arm_init_maps function only cares about symbols from input
6042 BFDs. We must make a note of this generated mapping symbol
6043 ourselves so that code byteswapping works properly in
6044 elf32_arm_write_section. */
6045 elf32_arm_section_map_add (s, 'a', 0);
6046 }
6047
6048 s->size += VFP11_ERRATUM_VENEER_SIZE;
6049 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6050 hash_table->num_vfp11_fixes++;
6051
6052 /* The offset of the veneer. */
6053 return val;
6054 }
6055
6056 #define ARM_GLUE_SECTION_FLAGS \
6057 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6058 | SEC_READONLY | SEC_LINKER_CREATED)
6059
6060 /* Create a fake section for use by the ARM backend of the linker. */
6061
6062 static bfd_boolean
6063 arm_make_glue_section (bfd * abfd, const char * name)
6064 {
6065 asection * sec;
6066
6067 sec = bfd_get_linker_section (abfd, name);
6068 if (sec != NULL)
6069 /* Already made. */
6070 return TRUE;
6071
6072 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6073
6074 if (sec == NULL
6075 || !bfd_set_section_alignment (abfd, sec, 2))
6076 return FALSE;
6077
6078 /* Set the gc mark to prevent the section from being removed by garbage
6079 collection, despite the fact that no relocs refer to this section. */
6080 sec->gc_mark = 1;
6081
6082 return TRUE;
6083 }
6084
6085 /* Set size of .plt entries. This function is called from the
6086 linker scripts in ld/emultempl/{armelf}.em. */
6087
6088 void
6089 bfd_elf32_arm_use_long_plt (void)
6090 {
6091 elf32_arm_use_long_plt_entry = TRUE;
6092 }
6093
6094 /* Add the glue sections to ABFD. This function is called from the
6095 linker scripts in ld/emultempl/{armelf}.em. */
6096
6097 bfd_boolean
6098 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6099 struct bfd_link_info *info)
6100 {
6101 /* If we are only performing a partial
6102 link do not bother adding the glue. */
6103 if (info->relocatable)
6104 return TRUE;
6105
6106 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6107 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6108 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6109 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6110 }
6111
6112 /* Select a BFD to be used to hold the sections used by the glue code.
6113 This function is called from the linker scripts in ld/emultempl/
6114 {armelf/pe}.em. */
6115
6116 bfd_boolean
6117 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6118 {
6119 struct elf32_arm_link_hash_table *globals;
6120
6121 /* If we are only performing a partial link
6122 do not bother getting a bfd to hold the glue. */
6123 if (info->relocatable)
6124 return TRUE;
6125
6126 /* Make sure we don't attach the glue sections to a dynamic object. */
6127 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6128
6129 globals = elf32_arm_hash_table (info);
6130 BFD_ASSERT (globals != NULL);
6131
6132 if (globals->bfd_of_glue_owner != NULL)
6133 return TRUE;
6134
6135 /* Save the bfd for later use. */
6136 globals->bfd_of_glue_owner = abfd;
6137
6138 return TRUE;
6139 }
6140
6141 static void
6142 check_use_blx (struct elf32_arm_link_hash_table *globals)
6143 {
6144 int cpu_arch;
6145
6146 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6147 Tag_CPU_arch);
6148
6149 if (globals->fix_arm1176)
6150 {
6151 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6152 globals->use_blx = 1;
6153 }
6154 else
6155 {
6156 if (cpu_arch > TAG_CPU_ARCH_V4T)
6157 globals->use_blx = 1;
6158 }
6159 }
6160
6161 bfd_boolean
6162 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6163 struct bfd_link_info *link_info)
6164 {
6165 Elf_Internal_Shdr *symtab_hdr;
6166 Elf_Internal_Rela *internal_relocs = NULL;
6167 Elf_Internal_Rela *irel, *irelend;
6168 bfd_byte *contents = NULL;
6169
6170 asection *sec;
6171 struct elf32_arm_link_hash_table *globals;
6172
6173 /* If we are only performing a partial link do not bother
6174 to construct any glue. */
6175 if (link_info->relocatable)
6176 return TRUE;
6177
6178 /* Here we have a bfd that is to be included on the link. We have a
6179 hook to do reloc rummaging, before section sizes are nailed down. */
6180 globals = elf32_arm_hash_table (link_info);
6181 BFD_ASSERT (globals != NULL);
6182
6183 check_use_blx (globals);
6184
6185 if (globals->byteswap_code && !bfd_big_endian (abfd))
6186 {
6187 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6188 abfd);
6189 return FALSE;
6190 }
6191
6192 /* PR 5398: If we have not decided to include any loadable sections in
6193 the output then we will not have a glue owner bfd. This is OK, it
6194 just means that there is nothing else for us to do here. */
6195 if (globals->bfd_of_glue_owner == NULL)
6196 return TRUE;
6197
6198 /* Rummage around all the relocs and map the glue vectors. */
6199 sec = abfd->sections;
6200
6201 if (sec == NULL)
6202 return TRUE;
6203
6204 for (; sec != NULL; sec = sec->next)
6205 {
6206 if (sec->reloc_count == 0)
6207 continue;
6208
6209 if ((sec->flags & SEC_EXCLUDE) != 0)
6210 continue;
6211
6212 symtab_hdr = & elf_symtab_hdr (abfd);
6213
6214 /* Load the relocs. */
6215 internal_relocs
6216 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6217
6218 if (internal_relocs == NULL)
6219 goto error_return;
6220
6221 irelend = internal_relocs + sec->reloc_count;
6222 for (irel = internal_relocs; irel < irelend; irel++)
6223 {
6224 long r_type;
6225 unsigned long r_index;
6226
6227 struct elf_link_hash_entry *h;
6228
6229 r_type = ELF32_R_TYPE (irel->r_info);
6230 r_index = ELF32_R_SYM (irel->r_info);
6231
6232 /* These are the only relocation types we care about. */
6233 if ( r_type != R_ARM_PC24
6234 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6235 continue;
6236
6237 /* Get the section contents if we haven't done so already. */
6238 if (contents == NULL)
6239 {
6240 /* Get cached copy if it exists. */
6241 if (elf_section_data (sec)->this_hdr.contents != NULL)
6242 contents = elf_section_data (sec)->this_hdr.contents;
6243 else
6244 {
6245 /* Go get them off disk. */
6246 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6247 goto error_return;
6248 }
6249 }
6250
6251 if (r_type == R_ARM_V4BX)
6252 {
6253 int reg;
6254
6255 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6256 record_arm_bx_glue (link_info, reg);
6257 continue;
6258 }
6259
6260 /* If the relocation is not against a symbol it cannot concern us. */
6261 h = NULL;
6262
6263 /* We don't care about local symbols. */
6264 if (r_index < symtab_hdr->sh_info)
6265 continue;
6266
6267 /* This is an external symbol. */
6268 r_index -= symtab_hdr->sh_info;
6269 h = (struct elf_link_hash_entry *)
6270 elf_sym_hashes (abfd)[r_index];
6271
6272 /* If the relocation is against a static symbol it must be within
6273 the current section and so cannot be a cross ARM/Thumb relocation. */
6274 if (h == NULL)
6275 continue;
6276
6277 /* If the call will go through a PLT entry then we do not need
6278 glue. */
6279 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6280 continue;
6281
6282 switch (r_type)
6283 {
6284 case R_ARM_PC24:
6285 /* This one is a call from arm code. We need to look up
6286 the target of the call. If it is a thumb target, we
6287 insert glue. */
6288 if (h->target_internal == ST_BRANCH_TO_THUMB)
6289 record_arm_to_thumb_glue (link_info, h);
6290 break;
6291
6292 default:
6293 abort ();
6294 }
6295 }
6296
6297 if (contents != NULL
6298 && elf_section_data (sec)->this_hdr.contents != contents)
6299 free (contents);
6300 contents = NULL;
6301
6302 if (internal_relocs != NULL
6303 && elf_section_data (sec)->relocs != internal_relocs)
6304 free (internal_relocs);
6305 internal_relocs = NULL;
6306 }
6307
6308 return TRUE;
6309
6310 error_return:
6311 if (contents != NULL
6312 && elf_section_data (sec)->this_hdr.contents != contents)
6313 free (contents);
6314 if (internal_relocs != NULL
6315 && elf_section_data (sec)->relocs != internal_relocs)
6316 free (internal_relocs);
6317
6318 return FALSE;
6319 }
6320 #endif
6321
6322
6323 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6324
6325 void
6326 bfd_elf32_arm_init_maps (bfd *abfd)
6327 {
6328 Elf_Internal_Sym *isymbuf;
6329 Elf_Internal_Shdr *hdr;
6330 unsigned int i, localsyms;
6331
6332 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6333 if (! is_arm_elf (abfd))
6334 return;
6335
6336 if ((abfd->flags & DYNAMIC) != 0)
6337 return;
6338
6339 hdr = & elf_symtab_hdr (abfd);
6340 localsyms = hdr->sh_info;
6341
6342 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6343 should contain the number of local symbols, which should come before any
6344 global symbols. Mapping symbols are always local. */
6345 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6346 NULL);
6347
6348 /* No internal symbols read? Skip this BFD. */
6349 if (isymbuf == NULL)
6350 return;
6351
6352 for (i = 0; i < localsyms; i++)
6353 {
6354 Elf_Internal_Sym *isym = &isymbuf[i];
6355 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6356 const char *name;
6357
6358 if (sec != NULL
6359 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6360 {
6361 name = bfd_elf_string_from_elf_section (abfd,
6362 hdr->sh_link, isym->st_name);
6363
6364 if (bfd_is_arm_special_symbol_name (name,
6365 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6366 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6367 }
6368 }
6369 }
6370
6371
6372 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6373 say what they wanted. */
6374
6375 void
6376 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6377 {
6378 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6379 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6380
6381 if (globals == NULL)
6382 return;
6383
6384 if (globals->fix_cortex_a8 == -1)
6385 {
6386 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6387 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6388 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6389 || out_attr[Tag_CPU_arch_profile].i == 0))
6390 globals->fix_cortex_a8 = 1;
6391 else
6392 globals->fix_cortex_a8 = 0;
6393 }
6394 }
6395
6396
6397 void
6398 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6399 {
6400 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6401 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6402
6403 if (globals == NULL)
6404 return;
6405 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6406 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6407 {
6408 switch (globals->vfp11_fix)
6409 {
6410 case BFD_ARM_VFP11_FIX_DEFAULT:
6411 case BFD_ARM_VFP11_FIX_NONE:
6412 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6413 break;
6414
6415 default:
6416 /* Give a warning, but do as the user requests anyway. */
6417 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6418 "workaround is not necessary for target architecture"), obfd);
6419 }
6420 }
6421 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6422 /* For earlier architectures, we might need the workaround, but do not
6423 enable it by default. If users is running with broken hardware, they
6424 must enable the erratum fix explicitly. */
6425 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6426 }
6427
6428
6429 enum bfd_arm_vfp11_pipe
6430 {
6431 VFP11_FMAC,
6432 VFP11_LS,
6433 VFP11_DS,
6434 VFP11_BAD
6435 };
6436
6437 /* Return a VFP register number. This is encoded as RX:X for single-precision
6438 registers, or X:RX for double-precision registers, where RX is the group of
6439 four bits in the instruction encoding and X is the single extension bit.
6440 RX and X fields are specified using their lowest (starting) bit. The return
6441 value is:
6442
6443 0...31: single-precision registers s0...s31
6444 32...63: double-precision registers d0...d31.
6445
6446 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6447 encounter VFP3 instructions, so we allow the full range for DP registers. */
6448
6449 static unsigned int
6450 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6451 unsigned int x)
6452 {
6453 if (is_double)
6454 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6455 else
6456 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6457 }
6458
6459 /* Set bits in *WMASK according to a register number REG as encoded by
6460 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6461
6462 static void
6463 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6464 {
6465 if (reg < 32)
6466 *wmask |= 1 << reg;
6467 else if (reg < 48)
6468 *wmask |= 3 << ((reg - 32) * 2);
6469 }
6470
6471 /* Return TRUE if WMASK overwrites anything in REGS. */
6472
6473 static bfd_boolean
6474 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6475 {
6476 int i;
6477
6478 for (i = 0; i < numregs; i++)
6479 {
6480 unsigned int reg = regs[i];
6481
6482 if (reg < 32 && (wmask & (1 << reg)) != 0)
6483 return TRUE;
6484
6485 reg -= 32;
6486
6487 if (reg >= 16)
6488 continue;
6489
6490 if ((wmask & (3 << (reg * 2))) != 0)
6491 return TRUE;
6492 }
6493
6494 return FALSE;
6495 }
6496
6497 /* In this function, we're interested in two things: finding input registers
6498 for VFP data-processing instructions, and finding the set of registers which
6499 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6500 hold the written set, so FLDM etc. are easy to deal with (we're only
6501 interested in 32 SP registers or 16 dp registers, due to the VFP version
6502 implemented by the chip in question). DP registers are marked by setting
6503 both SP registers in the write mask). */
6504
6505 static enum bfd_arm_vfp11_pipe
6506 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6507 int *numregs)
6508 {
6509 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6510 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6511
6512 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6513 {
6514 unsigned int pqrs;
6515 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6516 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6517
6518 pqrs = ((insn & 0x00800000) >> 20)
6519 | ((insn & 0x00300000) >> 19)
6520 | ((insn & 0x00000040) >> 6);
6521
6522 switch (pqrs)
6523 {
6524 case 0: /* fmac[sd]. */
6525 case 1: /* fnmac[sd]. */
6526 case 2: /* fmsc[sd]. */
6527 case 3: /* fnmsc[sd]. */
6528 vpipe = VFP11_FMAC;
6529 bfd_arm_vfp11_write_mask (destmask, fd);
6530 regs[0] = fd;
6531 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6532 regs[2] = fm;
6533 *numregs = 3;
6534 break;
6535
6536 case 4: /* fmul[sd]. */
6537 case 5: /* fnmul[sd]. */
6538 case 6: /* fadd[sd]. */
6539 case 7: /* fsub[sd]. */
6540 vpipe = VFP11_FMAC;
6541 goto vfp_binop;
6542
6543 case 8: /* fdiv[sd]. */
6544 vpipe = VFP11_DS;
6545 vfp_binop:
6546 bfd_arm_vfp11_write_mask (destmask, fd);
6547 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6548 regs[1] = fm;
6549 *numregs = 2;
6550 break;
6551
6552 case 15: /* extended opcode. */
6553 {
6554 unsigned int extn = ((insn >> 15) & 0x1e)
6555 | ((insn >> 7) & 1);
6556
6557 switch (extn)
6558 {
6559 case 0: /* fcpy[sd]. */
6560 case 1: /* fabs[sd]. */
6561 case 2: /* fneg[sd]. */
6562 case 8: /* fcmp[sd]. */
6563 case 9: /* fcmpe[sd]. */
6564 case 10: /* fcmpz[sd]. */
6565 case 11: /* fcmpez[sd]. */
6566 case 16: /* fuito[sd]. */
6567 case 17: /* fsito[sd]. */
6568 case 24: /* ftoui[sd]. */
6569 case 25: /* ftouiz[sd]. */
6570 case 26: /* ftosi[sd]. */
6571 case 27: /* ftosiz[sd]. */
6572 /* These instructions will not bounce due to underflow. */
6573 *numregs = 0;
6574 vpipe = VFP11_FMAC;
6575 break;
6576
6577 case 3: /* fsqrt[sd]. */
6578 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6579 registers to cause the erratum in previous instructions. */
6580 bfd_arm_vfp11_write_mask (destmask, fd);
6581 vpipe = VFP11_DS;
6582 break;
6583
6584 case 15: /* fcvt{ds,sd}. */
6585 {
6586 int rnum = 0;
6587
6588 bfd_arm_vfp11_write_mask (destmask, fd);
6589
6590 /* Only FCVTSD can underflow. */
6591 if ((insn & 0x100) != 0)
6592 regs[rnum++] = fm;
6593
6594 *numregs = rnum;
6595
6596 vpipe = VFP11_FMAC;
6597 }
6598 break;
6599
6600 default:
6601 return VFP11_BAD;
6602 }
6603 }
6604 break;
6605
6606 default:
6607 return VFP11_BAD;
6608 }
6609 }
6610 /* Two-register transfer. */
6611 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6612 {
6613 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6614
6615 if ((insn & 0x100000) == 0)
6616 {
6617 if (is_double)
6618 bfd_arm_vfp11_write_mask (destmask, fm);
6619 else
6620 {
6621 bfd_arm_vfp11_write_mask (destmask, fm);
6622 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6623 }
6624 }
6625
6626 vpipe = VFP11_LS;
6627 }
6628 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6629 {
6630 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6631 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6632
6633 switch (puw)
6634 {
6635 case 0: /* Two-reg transfer. We should catch these above. */
6636 abort ();
6637
6638 case 2: /* fldm[sdx]. */
6639 case 3:
6640 case 5:
6641 {
6642 unsigned int i, offset = insn & 0xff;
6643
6644 if (is_double)
6645 offset >>= 1;
6646
6647 for (i = fd; i < fd + offset; i++)
6648 bfd_arm_vfp11_write_mask (destmask, i);
6649 }
6650 break;
6651
6652 case 4: /* fld[sd]. */
6653 case 6:
6654 bfd_arm_vfp11_write_mask (destmask, fd);
6655 break;
6656
6657 default:
6658 return VFP11_BAD;
6659 }
6660
6661 vpipe = VFP11_LS;
6662 }
6663 /* Single-register transfer. Note L==0. */
6664 else if ((insn & 0x0f100e10) == 0x0e000a10)
6665 {
6666 unsigned int opcode = (insn >> 21) & 7;
6667 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6668
6669 switch (opcode)
6670 {
6671 case 0: /* fmsr/fmdlr. */
6672 case 1: /* fmdhr. */
6673 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6674 destination register. I don't know if this is exactly right,
6675 but it is the conservative choice. */
6676 bfd_arm_vfp11_write_mask (destmask, fn);
6677 break;
6678
6679 case 7: /* fmxr. */
6680 break;
6681 }
6682
6683 vpipe = VFP11_LS;
6684 }
6685
6686 return vpipe;
6687 }
6688
6689
6690 static int elf32_arm_compare_mapping (const void * a, const void * b);
6691
6692
6693 /* Look for potentially-troublesome code sequences which might trigger the
6694 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6695 (available from ARM) for details of the erratum. A short version is
6696 described in ld.texinfo. */
6697
6698 bfd_boolean
6699 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6700 {
6701 asection *sec;
6702 bfd_byte *contents = NULL;
6703 int state = 0;
6704 int regs[3], numregs = 0;
6705 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6706 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6707
6708 if (globals == NULL)
6709 return FALSE;
6710
6711 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6712 The states transition as follows:
6713
6714 0 -> 1 (vector) or 0 -> 2 (scalar)
6715 A VFP FMAC-pipeline instruction has been seen. Fill
6716 regs[0]..regs[numregs-1] with its input operands. Remember this
6717 instruction in 'first_fmac'.
6718
6719 1 -> 2
6720 Any instruction, except for a VFP instruction which overwrites
6721 regs[*].
6722
6723 1 -> 3 [ -> 0 ] or
6724 2 -> 3 [ -> 0 ]
6725 A VFP instruction has been seen which overwrites any of regs[*].
6726 We must make a veneer! Reset state to 0 before examining next
6727 instruction.
6728
6729 2 -> 0
6730 If we fail to match anything in state 2, reset to state 0 and reset
6731 the instruction pointer to the instruction after 'first_fmac'.
6732
6733 If the VFP11 vector mode is in use, there must be at least two unrelated
6734 instructions between anti-dependent VFP11 instructions to properly avoid
6735 triggering the erratum, hence the use of the extra state 1. */
6736
6737 /* If we are only performing a partial link do not bother
6738 to construct any glue. */
6739 if (link_info->relocatable)
6740 return TRUE;
6741
6742 /* Skip if this bfd does not correspond to an ELF image. */
6743 if (! is_arm_elf (abfd))
6744 return TRUE;
6745
6746 /* We should have chosen a fix type by the time we get here. */
6747 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6748
6749 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6750 return TRUE;
6751
6752 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6753 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6754 return TRUE;
6755
6756 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6757 {
6758 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6759 struct _arm_elf_section_data *sec_data;
6760
6761 /* If we don't have executable progbits, we're not interested in this
6762 section. Also skip if section is to be excluded. */
6763 if (elf_section_type (sec) != SHT_PROGBITS
6764 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6765 || (sec->flags & SEC_EXCLUDE) != 0
6766 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6767 || sec->output_section == bfd_abs_section_ptr
6768 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6769 continue;
6770
6771 sec_data = elf32_arm_section_data (sec);
6772
6773 if (sec_data->mapcount == 0)
6774 continue;
6775
6776 if (elf_section_data (sec)->this_hdr.contents != NULL)
6777 contents = elf_section_data (sec)->this_hdr.contents;
6778 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6779 goto error_return;
6780
6781 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6782 elf32_arm_compare_mapping);
6783
6784 for (span = 0; span < sec_data->mapcount; span++)
6785 {
6786 unsigned int span_start = sec_data->map[span].vma;
6787 unsigned int span_end = (span == sec_data->mapcount - 1)
6788 ? sec->size : sec_data->map[span + 1].vma;
6789 char span_type = sec_data->map[span].type;
6790
6791 /* FIXME: Only ARM mode is supported at present. We may need to
6792 support Thumb-2 mode also at some point. */
6793 if (span_type != 'a')
6794 continue;
6795
6796 for (i = span_start; i < span_end;)
6797 {
6798 unsigned int next_i = i + 4;
6799 unsigned int insn = bfd_big_endian (abfd)
6800 ? (contents[i] << 24)
6801 | (contents[i + 1] << 16)
6802 | (contents[i + 2] << 8)
6803 | contents[i + 3]
6804 : (contents[i + 3] << 24)
6805 | (contents[i + 2] << 16)
6806 | (contents[i + 1] << 8)
6807 | contents[i];
6808 unsigned int writemask = 0;
6809 enum bfd_arm_vfp11_pipe vpipe;
6810
6811 switch (state)
6812 {
6813 case 0:
6814 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6815 &numregs);
6816 /* I'm assuming the VFP11 erratum can trigger with denorm
6817 operands on either the FMAC or the DS pipeline. This might
6818 lead to slightly overenthusiastic veneer insertion. */
6819 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6820 {
6821 state = use_vector ? 1 : 2;
6822 first_fmac = i;
6823 veneer_of_insn = insn;
6824 }
6825 break;
6826
6827 case 1:
6828 {
6829 int other_regs[3], other_numregs;
6830 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6831 other_regs,
6832 &other_numregs);
6833 if (vpipe != VFP11_BAD
6834 && bfd_arm_vfp11_antidependency (writemask, regs,
6835 numregs))
6836 state = 3;
6837 else
6838 state = 2;
6839 }
6840 break;
6841
6842 case 2:
6843 {
6844 int other_regs[3], other_numregs;
6845 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6846 other_regs,
6847 &other_numregs);
6848 if (vpipe != VFP11_BAD
6849 && bfd_arm_vfp11_antidependency (writemask, regs,
6850 numregs))
6851 state = 3;
6852 else
6853 {
6854 state = 0;
6855 next_i = first_fmac + 4;
6856 }
6857 }
6858 break;
6859
6860 case 3:
6861 abort (); /* Should be unreachable. */
6862 }
6863
6864 if (state == 3)
6865 {
6866 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6867 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6868
6869 elf32_arm_section_data (sec)->erratumcount += 1;
6870
6871 newerr->u.b.vfp_insn = veneer_of_insn;
6872
6873 switch (span_type)
6874 {
6875 case 'a':
6876 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6877 break;
6878
6879 default:
6880 abort ();
6881 }
6882
6883 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6884 first_fmac);
6885
6886 newerr->vma = -1;
6887
6888 newerr->next = sec_data->erratumlist;
6889 sec_data->erratumlist = newerr;
6890
6891 state = 0;
6892 }
6893
6894 i = next_i;
6895 }
6896 }
6897
6898 if (contents != NULL
6899 && elf_section_data (sec)->this_hdr.contents != contents)
6900 free (contents);
6901 contents = NULL;
6902 }
6903
6904 return TRUE;
6905
6906 error_return:
6907 if (contents != NULL
6908 && elf_section_data (sec)->this_hdr.contents != contents)
6909 free (contents);
6910
6911 return FALSE;
6912 }
6913
6914 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6915 after sections have been laid out, using specially-named symbols. */
6916
6917 void
6918 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6919 struct bfd_link_info *link_info)
6920 {
6921 asection *sec;
6922 struct elf32_arm_link_hash_table *globals;
6923 char *tmp_name;
6924
6925 if (link_info->relocatable)
6926 return;
6927
6928 /* Skip if this bfd does not correspond to an ELF image. */
6929 if (! is_arm_elf (abfd))
6930 return;
6931
6932 globals = elf32_arm_hash_table (link_info);
6933 if (globals == NULL)
6934 return;
6935
6936 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6937 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6938
6939 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6940 {
6941 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6942 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6943
6944 for (; errnode != NULL; errnode = errnode->next)
6945 {
6946 struct elf_link_hash_entry *myh;
6947 bfd_vma vma;
6948
6949 switch (errnode->type)
6950 {
6951 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6952 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6953 /* Find veneer symbol. */
6954 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6955 errnode->u.b.veneer->u.v.id);
6956
6957 myh = elf_link_hash_lookup
6958 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6959
6960 if (myh == NULL)
6961 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6962 "`%s'"), abfd, tmp_name);
6963
6964 vma = myh->root.u.def.section->output_section->vma
6965 + myh->root.u.def.section->output_offset
6966 + myh->root.u.def.value;
6967
6968 errnode->u.b.veneer->vma = vma;
6969 break;
6970
6971 case VFP11_ERRATUM_ARM_VENEER:
6972 case VFP11_ERRATUM_THUMB_VENEER:
6973 /* Find return location. */
6974 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6975 errnode->u.v.id);
6976
6977 myh = elf_link_hash_lookup
6978 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6979
6980 if (myh == NULL)
6981 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6982 "`%s'"), abfd, tmp_name);
6983
6984 vma = myh->root.u.def.section->output_section->vma
6985 + myh->root.u.def.section->output_offset
6986 + myh->root.u.def.value;
6987
6988 errnode->u.v.branch->vma = vma;
6989 break;
6990
6991 default:
6992 abort ();
6993 }
6994 }
6995 }
6996
6997 free (tmp_name);
6998 }
6999
7000
7001 /* Set target relocation values needed during linking. */
7002
7003 void
7004 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7005 struct bfd_link_info *link_info,
7006 int target1_is_rel,
7007 char * target2_type,
7008 int fix_v4bx,
7009 int use_blx,
7010 bfd_arm_vfp11_fix vfp11_fix,
7011 int no_enum_warn, int no_wchar_warn,
7012 int pic_veneer, int fix_cortex_a8,
7013 int fix_arm1176)
7014 {
7015 struct elf32_arm_link_hash_table *globals;
7016
7017 globals = elf32_arm_hash_table (link_info);
7018 if (globals == NULL)
7019 return;
7020
7021 globals->target1_is_rel = target1_is_rel;
7022 if (strcmp (target2_type, "rel") == 0)
7023 globals->target2_reloc = R_ARM_REL32;
7024 else if (strcmp (target2_type, "abs") == 0)
7025 globals->target2_reloc = R_ARM_ABS32;
7026 else if (strcmp (target2_type, "got-rel") == 0)
7027 globals->target2_reloc = R_ARM_GOT_PREL;
7028 else
7029 {
7030 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7031 target2_type);
7032 }
7033 globals->fix_v4bx = fix_v4bx;
7034 globals->use_blx |= use_blx;
7035 globals->vfp11_fix = vfp11_fix;
7036 globals->pic_veneer = pic_veneer;
7037 globals->fix_cortex_a8 = fix_cortex_a8;
7038 globals->fix_arm1176 = fix_arm1176;
7039
7040 BFD_ASSERT (is_arm_elf (output_bfd));
7041 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7042 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7043 }
7044
7045 /* Replace the target offset of a Thumb bl or b.w instruction. */
7046
7047 static void
7048 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7049 {
7050 bfd_vma upper;
7051 bfd_vma lower;
7052 int reloc_sign;
7053
7054 BFD_ASSERT ((offset & 1) == 0);
7055
7056 upper = bfd_get_16 (abfd, insn);
7057 lower = bfd_get_16 (abfd, insn + 2);
7058 reloc_sign = (offset < 0) ? 1 : 0;
7059 upper = (upper & ~(bfd_vma) 0x7ff)
7060 | ((offset >> 12) & 0x3ff)
7061 | (reloc_sign << 10);
7062 lower = (lower & ~(bfd_vma) 0x2fff)
7063 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7064 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7065 | ((offset >> 1) & 0x7ff);
7066 bfd_put_16 (abfd, upper, insn);
7067 bfd_put_16 (abfd, lower, insn + 2);
7068 }
7069
7070 /* Thumb code calling an ARM function. */
7071
7072 static int
7073 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7074 const char * name,
7075 bfd * input_bfd,
7076 bfd * output_bfd,
7077 asection * input_section,
7078 bfd_byte * hit_data,
7079 asection * sym_sec,
7080 bfd_vma offset,
7081 bfd_signed_vma addend,
7082 bfd_vma val,
7083 char **error_message)
7084 {
7085 asection * s = 0;
7086 bfd_vma my_offset;
7087 long int ret_offset;
7088 struct elf_link_hash_entry * myh;
7089 struct elf32_arm_link_hash_table * globals;
7090
7091 myh = find_thumb_glue (info, name, error_message);
7092 if (myh == NULL)
7093 return FALSE;
7094
7095 globals = elf32_arm_hash_table (info);
7096 BFD_ASSERT (globals != NULL);
7097 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7098
7099 my_offset = myh->root.u.def.value;
7100
7101 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7102 THUMB2ARM_GLUE_SECTION_NAME);
7103
7104 BFD_ASSERT (s != NULL);
7105 BFD_ASSERT (s->contents != NULL);
7106 BFD_ASSERT (s->output_section != NULL);
7107
7108 if ((my_offset & 0x01) == 0x01)
7109 {
7110 if (sym_sec != NULL
7111 && sym_sec->owner != NULL
7112 && !INTERWORK_FLAG (sym_sec->owner))
7113 {
7114 (*_bfd_error_handler)
7115 (_("%B(%s): warning: interworking not enabled.\n"
7116 " first occurrence: %B: Thumb call to ARM"),
7117 sym_sec->owner, input_bfd, name);
7118
7119 return FALSE;
7120 }
7121
7122 --my_offset;
7123 myh->root.u.def.value = my_offset;
7124
7125 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7126 s->contents + my_offset);
7127
7128 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7129 s->contents + my_offset + 2);
7130
7131 ret_offset =
7132 /* Address of destination of the stub. */
7133 ((bfd_signed_vma) val)
7134 - ((bfd_signed_vma)
7135 /* Offset from the start of the current section
7136 to the start of the stubs. */
7137 (s->output_offset
7138 /* Offset of the start of this stub from the start of the stubs. */
7139 + my_offset
7140 /* Address of the start of the current section. */
7141 + s->output_section->vma)
7142 /* The branch instruction is 4 bytes into the stub. */
7143 + 4
7144 /* ARM branches work from the pc of the instruction + 8. */
7145 + 8);
7146
7147 put_arm_insn (globals, output_bfd,
7148 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7149 s->contents + my_offset + 4);
7150 }
7151
7152 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7153
7154 /* Now go back and fix up the original BL insn to point to here. */
7155 ret_offset =
7156 /* Address of where the stub is located. */
7157 (s->output_section->vma + s->output_offset + my_offset)
7158 /* Address of where the BL is located. */
7159 - (input_section->output_section->vma + input_section->output_offset
7160 + offset)
7161 /* Addend in the relocation. */
7162 - addend
7163 /* Biassing for PC-relative addressing. */
7164 - 8;
7165
7166 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7167
7168 return TRUE;
7169 }
7170
7171 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7172
7173 static struct elf_link_hash_entry *
7174 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7175 const char * name,
7176 bfd * input_bfd,
7177 bfd * output_bfd,
7178 asection * sym_sec,
7179 bfd_vma val,
7180 asection * s,
7181 char ** error_message)
7182 {
7183 bfd_vma my_offset;
7184 long int ret_offset;
7185 struct elf_link_hash_entry * myh;
7186 struct elf32_arm_link_hash_table * globals;
7187
7188 myh = find_arm_glue (info, name, error_message);
7189 if (myh == NULL)
7190 return NULL;
7191
7192 globals = elf32_arm_hash_table (info);
7193 BFD_ASSERT (globals != NULL);
7194 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7195
7196 my_offset = myh->root.u.def.value;
7197
7198 if ((my_offset & 0x01) == 0x01)
7199 {
7200 if (sym_sec != NULL
7201 && sym_sec->owner != NULL
7202 && !INTERWORK_FLAG (sym_sec->owner))
7203 {
7204 (*_bfd_error_handler)
7205 (_("%B(%s): warning: interworking not enabled.\n"
7206 " first occurrence: %B: arm call to thumb"),
7207 sym_sec->owner, input_bfd, name);
7208 }
7209
7210 --my_offset;
7211 myh->root.u.def.value = my_offset;
7212
7213 if (info->shared || globals->root.is_relocatable_executable
7214 || globals->pic_veneer)
7215 {
7216 /* For relocatable objects we can't use absolute addresses,
7217 so construct the address from a relative offset. */
7218 /* TODO: If the offset is small it's probably worth
7219 constructing the address with adds. */
7220 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7221 s->contents + my_offset);
7222 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7223 s->contents + my_offset + 4);
7224 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7225 s->contents + my_offset + 8);
7226 /* Adjust the offset by 4 for the position of the add,
7227 and 8 for the pipeline offset. */
7228 ret_offset = (val - (s->output_offset
7229 + s->output_section->vma
7230 + my_offset + 12))
7231 | 1;
7232 bfd_put_32 (output_bfd, ret_offset,
7233 s->contents + my_offset + 12);
7234 }
7235 else if (globals->use_blx)
7236 {
7237 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7238 s->contents + my_offset);
7239
7240 /* It's a thumb address. Add the low order bit. */
7241 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7242 s->contents + my_offset + 4);
7243 }
7244 else
7245 {
7246 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7247 s->contents + my_offset);
7248
7249 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7250 s->contents + my_offset + 4);
7251
7252 /* It's a thumb address. Add the low order bit. */
7253 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7254 s->contents + my_offset + 8);
7255
7256 my_offset += 12;
7257 }
7258 }
7259
7260 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7261
7262 return myh;
7263 }
7264
7265 /* Arm code calling a Thumb function. */
7266
7267 static int
7268 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7269 const char * name,
7270 bfd * input_bfd,
7271 bfd * output_bfd,
7272 asection * input_section,
7273 bfd_byte * hit_data,
7274 asection * sym_sec,
7275 bfd_vma offset,
7276 bfd_signed_vma addend,
7277 bfd_vma val,
7278 char **error_message)
7279 {
7280 unsigned long int tmp;
7281 bfd_vma my_offset;
7282 asection * s;
7283 long int ret_offset;
7284 struct elf_link_hash_entry * myh;
7285 struct elf32_arm_link_hash_table * globals;
7286
7287 globals = elf32_arm_hash_table (info);
7288 BFD_ASSERT (globals != NULL);
7289 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7290
7291 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7292 ARM2THUMB_GLUE_SECTION_NAME);
7293 BFD_ASSERT (s != NULL);
7294 BFD_ASSERT (s->contents != NULL);
7295 BFD_ASSERT (s->output_section != NULL);
7296
7297 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7298 sym_sec, val, s, error_message);
7299 if (!myh)
7300 return FALSE;
7301
7302 my_offset = myh->root.u.def.value;
7303 tmp = bfd_get_32 (input_bfd, hit_data);
7304 tmp = tmp & 0xFF000000;
7305
7306 /* Somehow these are both 4 too far, so subtract 8. */
7307 ret_offset = (s->output_offset
7308 + my_offset
7309 + s->output_section->vma
7310 - (input_section->output_offset
7311 + input_section->output_section->vma
7312 + offset + addend)
7313 - 8);
7314
7315 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7316
7317 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7318
7319 return TRUE;
7320 }
7321
7322 /* Populate Arm stub for an exported Thumb function. */
7323
7324 static bfd_boolean
7325 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7326 {
7327 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7328 asection * s;
7329 struct elf_link_hash_entry * myh;
7330 struct elf32_arm_link_hash_entry *eh;
7331 struct elf32_arm_link_hash_table * globals;
7332 asection *sec;
7333 bfd_vma val;
7334 char *error_message;
7335
7336 eh = elf32_arm_hash_entry (h);
7337 /* Allocate stubs for exported Thumb functions on v4t. */
7338 if (eh->export_glue == NULL)
7339 return TRUE;
7340
7341 globals = elf32_arm_hash_table (info);
7342 BFD_ASSERT (globals != NULL);
7343 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7344
7345 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7346 ARM2THUMB_GLUE_SECTION_NAME);
7347 BFD_ASSERT (s != NULL);
7348 BFD_ASSERT (s->contents != NULL);
7349 BFD_ASSERT (s->output_section != NULL);
7350
7351 sec = eh->export_glue->root.u.def.section;
7352
7353 BFD_ASSERT (sec->output_section != NULL);
7354
7355 val = eh->export_glue->root.u.def.value + sec->output_offset
7356 + sec->output_section->vma;
7357
7358 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7359 h->root.u.def.section->owner,
7360 globals->obfd, sec, val, s,
7361 &error_message);
7362 BFD_ASSERT (myh);
7363 return TRUE;
7364 }
7365
7366 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7367
7368 static bfd_vma
7369 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7370 {
7371 bfd_byte *p;
7372 bfd_vma glue_addr;
7373 asection *s;
7374 struct elf32_arm_link_hash_table *globals;
7375
7376 globals = elf32_arm_hash_table (info);
7377 BFD_ASSERT (globals != NULL);
7378 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7379
7380 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7381 ARM_BX_GLUE_SECTION_NAME);
7382 BFD_ASSERT (s != NULL);
7383 BFD_ASSERT (s->contents != NULL);
7384 BFD_ASSERT (s->output_section != NULL);
7385
7386 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7387
7388 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7389
7390 if ((globals->bx_glue_offset[reg] & 1) == 0)
7391 {
7392 p = s->contents + glue_addr;
7393 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7394 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7395 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7396 globals->bx_glue_offset[reg] |= 1;
7397 }
7398
7399 return glue_addr + s->output_section->vma + s->output_offset;
7400 }
7401
7402 /* Generate Arm stubs for exported Thumb symbols. */
7403 static void
7404 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7405 struct bfd_link_info *link_info)
7406 {
7407 struct elf32_arm_link_hash_table * globals;
7408
7409 if (link_info == NULL)
7410 /* Ignore this if we are not called by the ELF backend linker. */
7411 return;
7412
7413 globals = elf32_arm_hash_table (link_info);
7414 if (globals == NULL)
7415 return;
7416
7417 /* If blx is available then exported Thumb symbols are OK and there is
7418 nothing to do. */
7419 if (globals->use_blx)
7420 return;
7421
7422 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7423 link_info);
7424 }
7425
7426 /* Reserve space for COUNT dynamic relocations in relocation selection
7427 SRELOC. */
7428
7429 static void
7430 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7431 bfd_size_type count)
7432 {
7433 struct elf32_arm_link_hash_table *htab;
7434
7435 htab = elf32_arm_hash_table (info);
7436 BFD_ASSERT (htab->root.dynamic_sections_created);
7437 if (sreloc == NULL)
7438 abort ();
7439 sreloc->size += RELOC_SIZE (htab) * count;
7440 }
7441
7442 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7443 dynamic, the relocations should go in SRELOC, otherwise they should
7444 go in the special .rel.iplt section. */
7445
7446 static void
7447 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7448 bfd_size_type count)
7449 {
7450 struct elf32_arm_link_hash_table *htab;
7451
7452 htab = elf32_arm_hash_table (info);
7453 if (!htab->root.dynamic_sections_created)
7454 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7455 else
7456 {
7457 BFD_ASSERT (sreloc != NULL);
7458 sreloc->size += RELOC_SIZE (htab) * count;
7459 }
7460 }
7461
7462 /* Add relocation REL to the end of relocation section SRELOC. */
7463
7464 static void
7465 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7466 asection *sreloc, Elf_Internal_Rela *rel)
7467 {
7468 bfd_byte *loc;
7469 struct elf32_arm_link_hash_table *htab;
7470
7471 htab = elf32_arm_hash_table (info);
7472 if (!htab->root.dynamic_sections_created
7473 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7474 sreloc = htab->root.irelplt;
7475 if (sreloc == NULL)
7476 abort ();
7477 loc = sreloc->contents;
7478 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7479 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7480 abort ();
7481 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7482 }
7483
7484 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7485 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7486 to .plt. */
7487
7488 static void
7489 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7490 bfd_boolean is_iplt_entry,
7491 union gotplt_union *root_plt,
7492 struct arm_plt_info *arm_plt)
7493 {
7494 struct elf32_arm_link_hash_table *htab;
7495 asection *splt;
7496 asection *sgotplt;
7497
7498 htab = elf32_arm_hash_table (info);
7499
7500 if (is_iplt_entry)
7501 {
7502 splt = htab->root.iplt;
7503 sgotplt = htab->root.igotplt;
7504
7505 /* NaCl uses a special first entry in .iplt too. */
7506 if (htab->nacl_p && splt->size == 0)
7507 splt->size += htab->plt_header_size;
7508
7509 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7510 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7511 }
7512 else
7513 {
7514 splt = htab->root.splt;
7515 sgotplt = htab->root.sgotplt;
7516
7517 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7518 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7519
7520 /* If this is the first .plt entry, make room for the special
7521 first entry. */
7522 if (splt->size == 0)
7523 splt->size += htab->plt_header_size;
7524 }
7525
7526 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7527 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7528 splt->size += PLT_THUMB_STUB_SIZE;
7529 root_plt->offset = splt->size;
7530 splt->size += htab->plt_entry_size;
7531
7532 if (!htab->symbian_p)
7533 {
7534 /* We also need to make an entry in the .got.plt section, which
7535 will be placed in the .got section by the linker script. */
7536 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7537 sgotplt->size += 4;
7538 }
7539 }
7540
7541 static bfd_vma
7542 arm_movw_immediate (bfd_vma value)
7543 {
7544 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7545 }
7546
7547 static bfd_vma
7548 arm_movt_immediate (bfd_vma value)
7549 {
7550 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7551 }
7552
7553 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7554 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7555 Otherwise, DYNINDX is the index of the symbol in the dynamic
7556 symbol table and SYM_VALUE is undefined.
7557
7558 ROOT_PLT points to the offset of the PLT entry from the start of its
7559 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7560 bookkeeping information.
7561
7562 Returns FALSE if there was a problem. */
7563
7564 static bfd_boolean
7565 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7566 union gotplt_union *root_plt,
7567 struct arm_plt_info *arm_plt,
7568 int dynindx, bfd_vma sym_value)
7569 {
7570 struct elf32_arm_link_hash_table *htab;
7571 asection *sgot;
7572 asection *splt;
7573 asection *srel;
7574 bfd_byte *loc;
7575 bfd_vma plt_index;
7576 Elf_Internal_Rela rel;
7577 bfd_vma plt_header_size;
7578 bfd_vma got_header_size;
7579
7580 htab = elf32_arm_hash_table (info);
7581
7582 /* Pick the appropriate sections and sizes. */
7583 if (dynindx == -1)
7584 {
7585 splt = htab->root.iplt;
7586 sgot = htab->root.igotplt;
7587 srel = htab->root.irelplt;
7588
7589 /* There are no reserved entries in .igot.plt, and no special
7590 first entry in .iplt. */
7591 got_header_size = 0;
7592 plt_header_size = 0;
7593 }
7594 else
7595 {
7596 splt = htab->root.splt;
7597 sgot = htab->root.sgotplt;
7598 srel = htab->root.srelplt;
7599
7600 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7601 plt_header_size = htab->plt_header_size;
7602 }
7603 BFD_ASSERT (splt != NULL && srel != NULL);
7604
7605 /* Fill in the entry in the procedure linkage table. */
7606 if (htab->symbian_p)
7607 {
7608 BFD_ASSERT (dynindx >= 0);
7609 put_arm_insn (htab, output_bfd,
7610 elf32_arm_symbian_plt_entry[0],
7611 splt->contents + root_plt->offset);
7612 bfd_put_32 (output_bfd,
7613 elf32_arm_symbian_plt_entry[1],
7614 splt->contents + root_plt->offset + 4);
7615
7616 /* Fill in the entry in the .rel.plt section. */
7617 rel.r_offset = (splt->output_section->vma
7618 + splt->output_offset
7619 + root_plt->offset + 4);
7620 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7621
7622 /* Get the index in the procedure linkage table which
7623 corresponds to this symbol. This is the index of this symbol
7624 in all the symbols for which we are making plt entries. The
7625 first entry in the procedure linkage table is reserved. */
7626 plt_index = ((root_plt->offset - plt_header_size)
7627 / htab->plt_entry_size);
7628 }
7629 else
7630 {
7631 bfd_vma got_offset, got_address, plt_address;
7632 bfd_vma got_displacement, initial_got_entry;
7633 bfd_byte * ptr;
7634
7635 BFD_ASSERT (sgot != NULL);
7636
7637 /* Get the offset into the .(i)got.plt table of the entry that
7638 corresponds to this function. */
7639 got_offset = (arm_plt->got_offset & -2);
7640
7641 /* Get the index in the procedure linkage table which
7642 corresponds to this symbol. This is the index of this symbol
7643 in all the symbols for which we are making plt entries.
7644 After the reserved .got.plt entries, all symbols appear in
7645 the same order as in .plt. */
7646 plt_index = (got_offset - got_header_size) / 4;
7647
7648 /* Calculate the address of the GOT entry. */
7649 got_address = (sgot->output_section->vma
7650 + sgot->output_offset
7651 + got_offset);
7652
7653 /* ...and the address of the PLT entry. */
7654 plt_address = (splt->output_section->vma
7655 + splt->output_offset
7656 + root_plt->offset);
7657
7658 ptr = splt->contents + root_plt->offset;
7659 if (htab->vxworks_p && info->shared)
7660 {
7661 unsigned int i;
7662 bfd_vma val;
7663
7664 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7665 {
7666 val = elf32_arm_vxworks_shared_plt_entry[i];
7667 if (i == 2)
7668 val |= got_address - sgot->output_section->vma;
7669 if (i == 5)
7670 val |= plt_index * RELOC_SIZE (htab);
7671 if (i == 2 || i == 5)
7672 bfd_put_32 (output_bfd, val, ptr);
7673 else
7674 put_arm_insn (htab, output_bfd, val, ptr);
7675 }
7676 }
7677 else if (htab->vxworks_p)
7678 {
7679 unsigned int i;
7680 bfd_vma val;
7681
7682 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7683 {
7684 val = elf32_arm_vxworks_exec_plt_entry[i];
7685 if (i == 2)
7686 val |= got_address;
7687 if (i == 4)
7688 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7689 if (i == 5)
7690 val |= plt_index * RELOC_SIZE (htab);
7691 if (i == 2 || i == 5)
7692 bfd_put_32 (output_bfd, val, ptr);
7693 else
7694 put_arm_insn (htab, output_bfd, val, ptr);
7695 }
7696
7697 loc = (htab->srelplt2->contents
7698 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7699
7700 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7701 referencing the GOT for this PLT entry. */
7702 rel.r_offset = plt_address + 8;
7703 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7704 rel.r_addend = got_offset;
7705 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7706 loc += RELOC_SIZE (htab);
7707
7708 /* Create the R_ARM_ABS32 relocation referencing the
7709 beginning of the PLT for this GOT entry. */
7710 rel.r_offset = got_address;
7711 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7712 rel.r_addend = 0;
7713 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7714 }
7715 else if (htab->nacl_p)
7716 {
7717 /* Calculate the displacement between the PLT slot and the
7718 common tail that's part of the special initial PLT slot. */
7719 int32_t tail_displacement
7720 = ((splt->output_section->vma + splt->output_offset
7721 + ARM_NACL_PLT_TAIL_OFFSET)
7722 - (plt_address + htab->plt_entry_size + 4));
7723 BFD_ASSERT ((tail_displacement & 3) == 0);
7724 tail_displacement >>= 2;
7725
7726 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7727 || (-tail_displacement & 0xff000000) == 0);
7728
7729 /* Calculate the displacement between the PLT slot and the entry
7730 in the GOT. The offset accounts for the value produced by
7731 adding to pc in the penultimate instruction of the PLT stub. */
7732 got_displacement = (got_address
7733 - (plt_address + htab->plt_entry_size));
7734
7735 /* NaCl does not support interworking at all. */
7736 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7737
7738 put_arm_insn (htab, output_bfd,
7739 elf32_arm_nacl_plt_entry[0]
7740 | arm_movw_immediate (got_displacement),
7741 ptr + 0);
7742 put_arm_insn (htab, output_bfd,
7743 elf32_arm_nacl_plt_entry[1]
7744 | arm_movt_immediate (got_displacement),
7745 ptr + 4);
7746 put_arm_insn (htab, output_bfd,
7747 elf32_arm_nacl_plt_entry[2],
7748 ptr + 8);
7749 put_arm_insn (htab, output_bfd,
7750 elf32_arm_nacl_plt_entry[3]
7751 | (tail_displacement & 0x00ffffff),
7752 ptr + 12);
7753 }
7754 else if (using_thumb_only (htab))
7755 {
7756 /* PR ld/16017: Generate thumb only PLT entries. */
7757 if (!using_thumb2 (htab))
7758 {
7759 /* FIXME: We ought to be able to generate thumb-1 PLT
7760 instructions... */
7761 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
7762 output_bfd);
7763 return FALSE;
7764 }
7765
7766 /* Calculate the displacement between the PLT slot and the entry in
7767 the GOT. The 12-byte offset accounts for the value produced by
7768 adding to pc in the 3rd instruction of the PLT stub. */
7769 got_displacement = got_address - (plt_address + 12);
7770
7771 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
7772 instead of 'put_thumb_insn'. */
7773 put_arm_insn (htab, output_bfd,
7774 elf32_thumb2_plt_entry[0]
7775 | ((got_displacement & 0x000000ff) << 16)
7776 | ((got_displacement & 0x00000700) << 20)
7777 | ((got_displacement & 0x00000800) >> 1)
7778 | ((got_displacement & 0x0000f000) >> 12),
7779 ptr + 0);
7780 put_arm_insn (htab, output_bfd,
7781 elf32_thumb2_plt_entry[1]
7782 | ((got_displacement & 0x00ff0000) )
7783 | ((got_displacement & 0x07000000) << 4)
7784 | ((got_displacement & 0x08000000) >> 17)
7785 | ((got_displacement & 0xf0000000) >> 28),
7786 ptr + 4);
7787 put_arm_insn (htab, output_bfd,
7788 elf32_thumb2_plt_entry[2],
7789 ptr + 8);
7790 put_arm_insn (htab, output_bfd,
7791 elf32_thumb2_plt_entry[3],
7792 ptr + 12);
7793 }
7794 else
7795 {
7796 /* Calculate the displacement between the PLT slot and the
7797 entry in the GOT. The eight-byte offset accounts for the
7798 value produced by adding to pc in the first instruction
7799 of the PLT stub. */
7800 got_displacement = got_address - (plt_address + 8);
7801
7802 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7803 {
7804 put_thumb_insn (htab, output_bfd,
7805 elf32_arm_plt_thumb_stub[0], ptr - 4);
7806 put_thumb_insn (htab, output_bfd,
7807 elf32_arm_plt_thumb_stub[1], ptr - 2);
7808 }
7809
7810 if (!elf32_arm_use_long_plt_entry)
7811 {
7812 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7813
7814 put_arm_insn (htab, output_bfd,
7815 elf32_arm_plt_entry_short[0]
7816 | ((got_displacement & 0x0ff00000) >> 20),
7817 ptr + 0);
7818 put_arm_insn (htab, output_bfd,
7819 elf32_arm_plt_entry_short[1]
7820 | ((got_displacement & 0x000ff000) >> 12),
7821 ptr+ 4);
7822 put_arm_insn (htab, output_bfd,
7823 elf32_arm_plt_entry_short[2]
7824 | (got_displacement & 0x00000fff),
7825 ptr + 8);
7826 #ifdef FOUR_WORD_PLT
7827 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
7828 #endif
7829 }
7830 else
7831 {
7832 put_arm_insn (htab, output_bfd,
7833 elf32_arm_plt_entry_long[0]
7834 | ((got_displacement & 0xf0000000) >> 28),
7835 ptr + 0);
7836 put_arm_insn (htab, output_bfd,
7837 elf32_arm_plt_entry_long[1]
7838 | ((got_displacement & 0x0ff00000) >> 20),
7839 ptr + 4);
7840 put_arm_insn (htab, output_bfd,
7841 elf32_arm_plt_entry_long[2]
7842 | ((got_displacement & 0x000ff000) >> 12),
7843 ptr+ 8);
7844 put_arm_insn (htab, output_bfd,
7845 elf32_arm_plt_entry_long[3]
7846 | (got_displacement & 0x00000fff),
7847 ptr + 12);
7848 }
7849 }
7850
7851 /* Fill in the entry in the .rel(a).(i)plt section. */
7852 rel.r_offset = got_address;
7853 rel.r_addend = 0;
7854 if (dynindx == -1)
7855 {
7856 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7857 The dynamic linker or static executable then calls SYM_VALUE
7858 to determine the correct run-time value of the .igot.plt entry. */
7859 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7860 initial_got_entry = sym_value;
7861 }
7862 else
7863 {
7864 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7865 initial_got_entry = (splt->output_section->vma
7866 + splt->output_offset);
7867 }
7868
7869 /* Fill in the entry in the global offset table. */
7870 bfd_put_32 (output_bfd, initial_got_entry,
7871 sgot->contents + got_offset);
7872 }
7873
7874 if (dynindx == -1)
7875 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7876 else
7877 {
7878 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7879 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7880 }
7881
7882 return TRUE;
7883 }
7884
7885 /* Some relocations map to different relocations depending on the
7886 target. Return the real relocation. */
7887
7888 static int
7889 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7890 int r_type)
7891 {
7892 switch (r_type)
7893 {
7894 case R_ARM_TARGET1:
7895 if (globals->target1_is_rel)
7896 return R_ARM_REL32;
7897 else
7898 return R_ARM_ABS32;
7899
7900 case R_ARM_TARGET2:
7901 return globals->target2_reloc;
7902
7903 default:
7904 return r_type;
7905 }
7906 }
7907
7908 /* Return the base VMA address which should be subtracted from real addresses
7909 when resolving @dtpoff relocation.
7910 This is PT_TLS segment p_vaddr. */
7911
7912 static bfd_vma
7913 dtpoff_base (struct bfd_link_info *info)
7914 {
7915 /* If tls_sec is NULL, we should have signalled an error already. */
7916 if (elf_hash_table (info)->tls_sec == NULL)
7917 return 0;
7918 return elf_hash_table (info)->tls_sec->vma;
7919 }
7920
7921 /* Return the relocation value for @tpoff relocation
7922 if STT_TLS virtual address is ADDRESS. */
7923
7924 static bfd_vma
7925 tpoff (struct bfd_link_info *info, bfd_vma address)
7926 {
7927 struct elf_link_hash_table *htab = elf_hash_table (info);
7928 bfd_vma base;
7929
7930 /* If tls_sec is NULL, we should have signalled an error already. */
7931 if (htab->tls_sec == NULL)
7932 return 0;
7933 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7934 return address - htab->tls_sec->vma + base;
7935 }
7936
7937 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7938 VALUE is the relocation value. */
7939
7940 static bfd_reloc_status_type
7941 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7942 {
7943 if (value > 0xfff)
7944 return bfd_reloc_overflow;
7945
7946 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7947 bfd_put_32 (abfd, value, data);
7948 return bfd_reloc_ok;
7949 }
7950
7951 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7952 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7953 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7954
7955 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7956 is to then call final_link_relocate. Return other values in the
7957 case of error.
7958
7959 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7960 the pre-relaxed code. It would be nice if the relocs were updated
7961 to match the optimization. */
7962
7963 static bfd_reloc_status_type
7964 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7965 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7966 Elf_Internal_Rela *rel, unsigned long is_local)
7967 {
7968 unsigned long insn;
7969
7970 switch (ELF32_R_TYPE (rel->r_info))
7971 {
7972 default:
7973 return bfd_reloc_notsupported;
7974
7975 case R_ARM_TLS_GOTDESC:
7976 if (is_local)
7977 insn = 0;
7978 else
7979 {
7980 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7981 if (insn & 1)
7982 insn -= 5; /* THUMB */
7983 else
7984 insn -= 8; /* ARM */
7985 }
7986 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7987 return bfd_reloc_continue;
7988
7989 case R_ARM_THM_TLS_DESCSEQ:
7990 /* Thumb insn. */
7991 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7992 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7993 {
7994 if (is_local)
7995 /* nop */
7996 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7997 }
7998 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7999 {
8000 if (is_local)
8001 /* nop */
8002 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8003 else
8004 /* ldr rx,[ry] */
8005 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8006 }
8007 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8008 {
8009 if (is_local)
8010 /* nop */
8011 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8012 else
8013 /* mov r0, rx */
8014 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8015 contents + rel->r_offset);
8016 }
8017 else
8018 {
8019 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8020 /* It's a 32 bit instruction, fetch the rest of it for
8021 error generation. */
8022 insn = (insn << 16)
8023 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8024 (*_bfd_error_handler)
8025 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8026 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8027 return bfd_reloc_notsupported;
8028 }
8029 break;
8030
8031 case R_ARM_TLS_DESCSEQ:
8032 /* arm insn. */
8033 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8034 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8035 {
8036 if (is_local)
8037 /* mov rx, ry */
8038 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8039 contents + rel->r_offset);
8040 }
8041 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8042 {
8043 if (is_local)
8044 /* nop */
8045 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8046 else
8047 /* ldr rx,[ry] */
8048 bfd_put_32 (input_bfd, insn & 0xfffff000,
8049 contents + rel->r_offset);
8050 }
8051 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8052 {
8053 if (is_local)
8054 /* nop */
8055 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8056 else
8057 /* mov r0, rx */
8058 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8059 contents + rel->r_offset);
8060 }
8061 else
8062 {
8063 (*_bfd_error_handler)
8064 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8065 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8066 return bfd_reloc_notsupported;
8067 }
8068 break;
8069
8070 case R_ARM_TLS_CALL:
8071 /* GD->IE relaxation, turn the instruction into 'nop' or
8072 'ldr r0, [pc,r0]' */
8073 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8074 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8075 break;
8076
8077 case R_ARM_THM_TLS_CALL:
8078 /* GD->IE relaxation. */
8079 if (!is_local)
8080 /* add r0,pc; ldr r0, [r0] */
8081 insn = 0x44786800;
8082 else if (arch_has_thumb2_nop (globals))
8083 /* nop.w */
8084 insn = 0xf3af8000;
8085 else
8086 /* nop; nop */
8087 insn = 0xbf00bf00;
8088
8089 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8090 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8091 break;
8092 }
8093 return bfd_reloc_ok;
8094 }
8095
8096 /* For a given value of n, calculate the value of G_n as required to
8097 deal with group relocations. We return it in the form of an
8098 encoded constant-and-rotation, together with the final residual. If n is
8099 specified as less than zero, then final_residual is filled with the
8100 input value and no further action is performed. */
8101
8102 static bfd_vma
8103 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8104 {
8105 int current_n;
8106 bfd_vma g_n;
8107 bfd_vma encoded_g_n = 0;
8108 bfd_vma residual = value; /* Also known as Y_n. */
8109
8110 for (current_n = 0; current_n <= n; current_n++)
8111 {
8112 int shift;
8113
8114 /* Calculate which part of the value to mask. */
8115 if (residual == 0)
8116 shift = 0;
8117 else
8118 {
8119 int msb;
8120
8121 /* Determine the most significant bit in the residual and
8122 align the resulting value to a 2-bit boundary. */
8123 for (msb = 30; msb >= 0; msb -= 2)
8124 if (residual & (3 << msb))
8125 break;
8126
8127 /* The desired shift is now (msb - 6), or zero, whichever
8128 is the greater. */
8129 shift = msb - 6;
8130 if (shift < 0)
8131 shift = 0;
8132 }
8133
8134 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8135 g_n = residual & (0xff << shift);
8136 encoded_g_n = (g_n >> shift)
8137 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8138
8139 /* Calculate the residual for the next time around. */
8140 residual &= ~g_n;
8141 }
8142
8143 *final_residual = residual;
8144
8145 return encoded_g_n;
8146 }
8147
8148 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8149 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8150
8151 static int
8152 identify_add_or_sub (bfd_vma insn)
8153 {
8154 int opcode = insn & 0x1e00000;
8155
8156 if (opcode == 1 << 23) /* ADD */
8157 return 1;
8158
8159 if (opcode == 1 << 22) /* SUB */
8160 return -1;
8161
8162 return 0;
8163 }
8164
8165 /* Perform a relocation as part of a final link. */
8166
8167 static bfd_reloc_status_type
8168 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8169 bfd * input_bfd,
8170 bfd * output_bfd,
8171 asection * input_section,
8172 bfd_byte * contents,
8173 Elf_Internal_Rela * rel,
8174 bfd_vma value,
8175 struct bfd_link_info * info,
8176 asection * sym_sec,
8177 const char * sym_name,
8178 unsigned char st_type,
8179 enum arm_st_branch_type branch_type,
8180 struct elf_link_hash_entry * h,
8181 bfd_boolean * unresolved_reloc_p,
8182 char ** error_message)
8183 {
8184 unsigned long r_type = howto->type;
8185 unsigned long r_symndx;
8186 bfd_byte * hit_data = contents + rel->r_offset;
8187 bfd_vma * local_got_offsets;
8188 bfd_vma * local_tlsdesc_gotents;
8189 asection * sgot;
8190 asection * splt;
8191 asection * sreloc = NULL;
8192 asection * srelgot;
8193 bfd_vma addend;
8194 bfd_signed_vma signed_addend;
8195 unsigned char dynreloc_st_type;
8196 bfd_vma dynreloc_value;
8197 struct elf32_arm_link_hash_table * globals;
8198 struct elf32_arm_link_hash_entry *eh;
8199 union gotplt_union *root_plt;
8200 struct arm_plt_info *arm_plt;
8201 bfd_vma plt_offset;
8202 bfd_vma gotplt_offset;
8203 bfd_boolean has_iplt_entry;
8204
8205 globals = elf32_arm_hash_table (info);
8206 if (globals == NULL)
8207 return bfd_reloc_notsupported;
8208
8209 BFD_ASSERT (is_arm_elf (input_bfd));
8210
8211 /* Some relocation types map to different relocations depending on the
8212 target. We pick the right one here. */
8213 r_type = arm_real_reloc_type (globals, r_type);
8214
8215 /* It is possible to have linker relaxations on some TLS access
8216 models. Update our information here. */
8217 r_type = elf32_arm_tls_transition (info, r_type, h);
8218
8219 if (r_type != howto->type)
8220 howto = elf32_arm_howto_from_type (r_type);
8221
8222 /* If the start address has been set, then set the EF_ARM_HASENTRY
8223 flag. Setting this more than once is redundant, but the cost is
8224 not too high, and it keeps the code simple.
8225
8226 The test is done here, rather than somewhere else, because the
8227 start address is only set just before the final link commences.
8228
8229 Note - if the user deliberately sets a start address of 0, the
8230 flag will not be set. */
8231 if (bfd_get_start_address (output_bfd) != 0)
8232 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8233
8234 eh = (struct elf32_arm_link_hash_entry *) h;
8235 sgot = globals->root.sgot;
8236 local_got_offsets = elf_local_got_offsets (input_bfd);
8237 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8238
8239 if (globals->root.dynamic_sections_created)
8240 srelgot = globals->root.srelgot;
8241 else
8242 srelgot = NULL;
8243
8244 r_symndx = ELF32_R_SYM (rel->r_info);
8245
8246 if (globals->use_rel)
8247 {
8248 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8249
8250 if (addend & ((howto->src_mask + 1) >> 1))
8251 {
8252 signed_addend = -1;
8253 signed_addend &= ~ howto->src_mask;
8254 signed_addend |= addend;
8255 }
8256 else
8257 signed_addend = addend;
8258 }
8259 else
8260 addend = signed_addend = rel->r_addend;
8261
8262 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8263 are resolving a function call relocation. */
8264 if (using_thumb_only (globals)
8265 && (r_type == R_ARM_THM_CALL
8266 || r_type == R_ARM_THM_JUMP24)
8267 && branch_type == ST_BRANCH_TO_ARM)
8268 branch_type = ST_BRANCH_TO_THUMB;
8269
8270 /* Record the symbol information that should be used in dynamic
8271 relocations. */
8272 dynreloc_st_type = st_type;
8273 dynreloc_value = value;
8274 if (branch_type == ST_BRANCH_TO_THUMB)
8275 dynreloc_value |= 1;
8276
8277 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8278 VALUE appropriately for relocations that we resolve at link time. */
8279 has_iplt_entry = FALSE;
8280 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8281 && root_plt->offset != (bfd_vma) -1)
8282 {
8283 plt_offset = root_plt->offset;
8284 gotplt_offset = arm_plt->got_offset;
8285
8286 if (h == NULL || eh->is_iplt)
8287 {
8288 has_iplt_entry = TRUE;
8289 splt = globals->root.iplt;
8290
8291 /* Populate .iplt entries here, because not all of them will
8292 be seen by finish_dynamic_symbol. The lower bit is set if
8293 we have already populated the entry. */
8294 if (plt_offset & 1)
8295 plt_offset--;
8296 else
8297 {
8298 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8299 -1, dynreloc_value))
8300 root_plt->offset |= 1;
8301 else
8302 return bfd_reloc_notsupported;
8303 }
8304
8305 /* Static relocations always resolve to the .iplt entry. */
8306 st_type = STT_FUNC;
8307 value = (splt->output_section->vma
8308 + splt->output_offset
8309 + plt_offset);
8310 branch_type = ST_BRANCH_TO_ARM;
8311
8312 /* If there are non-call relocations that resolve to the .iplt
8313 entry, then all dynamic ones must too. */
8314 if (arm_plt->noncall_refcount != 0)
8315 {
8316 dynreloc_st_type = st_type;
8317 dynreloc_value = value;
8318 }
8319 }
8320 else
8321 /* We populate the .plt entry in finish_dynamic_symbol. */
8322 splt = globals->root.splt;
8323 }
8324 else
8325 {
8326 splt = NULL;
8327 plt_offset = (bfd_vma) -1;
8328 gotplt_offset = (bfd_vma) -1;
8329 }
8330
8331 switch (r_type)
8332 {
8333 case R_ARM_NONE:
8334 /* We don't need to find a value for this symbol. It's just a
8335 marker. */
8336 *unresolved_reloc_p = FALSE;
8337 return bfd_reloc_ok;
8338
8339 case R_ARM_ABS12:
8340 if (!globals->vxworks_p)
8341 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8342
8343 case R_ARM_PC24:
8344 case R_ARM_ABS32:
8345 case R_ARM_ABS32_NOI:
8346 case R_ARM_REL32:
8347 case R_ARM_REL32_NOI:
8348 case R_ARM_CALL:
8349 case R_ARM_JUMP24:
8350 case R_ARM_XPC25:
8351 case R_ARM_PREL31:
8352 case R_ARM_PLT32:
8353 /* Handle relocations which should use the PLT entry. ABS32/REL32
8354 will use the symbol's value, which may point to a PLT entry, but we
8355 don't need to handle that here. If we created a PLT entry, all
8356 branches in this object should go to it, except if the PLT is too
8357 far away, in which case a long branch stub should be inserted. */
8358 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8359 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8360 && r_type != R_ARM_CALL
8361 && r_type != R_ARM_JUMP24
8362 && r_type != R_ARM_PLT32)
8363 && plt_offset != (bfd_vma) -1)
8364 {
8365 /* If we've created a .plt section, and assigned a PLT entry
8366 to this function, it must either be a STT_GNU_IFUNC reference
8367 or not be known to bind locally. In other cases, we should
8368 have cleared the PLT entry by now. */
8369 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8370
8371 value = (splt->output_section->vma
8372 + splt->output_offset
8373 + plt_offset);
8374 *unresolved_reloc_p = FALSE;
8375 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8376 contents, rel->r_offset, value,
8377 rel->r_addend);
8378 }
8379
8380 /* When generating a shared object or relocatable executable, these
8381 relocations are copied into the output file to be resolved at
8382 run time. */
8383 if ((info->shared || globals->root.is_relocatable_executable)
8384 && (input_section->flags & SEC_ALLOC)
8385 && !(globals->vxworks_p
8386 && strcmp (input_section->output_section->name,
8387 ".tls_vars") == 0)
8388 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8389 || !SYMBOL_CALLS_LOCAL (info, h))
8390 && !(input_bfd == globals->stub_bfd
8391 && strstr (input_section->name, STUB_SUFFIX))
8392 && (h == NULL
8393 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8394 || h->root.type != bfd_link_hash_undefweak)
8395 && r_type != R_ARM_PC24
8396 && r_type != R_ARM_CALL
8397 && r_type != R_ARM_JUMP24
8398 && r_type != R_ARM_PREL31
8399 && r_type != R_ARM_PLT32)
8400 {
8401 Elf_Internal_Rela outrel;
8402 bfd_boolean skip, relocate;
8403
8404 *unresolved_reloc_p = FALSE;
8405
8406 if (sreloc == NULL && globals->root.dynamic_sections_created)
8407 {
8408 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8409 ! globals->use_rel);
8410
8411 if (sreloc == NULL)
8412 return bfd_reloc_notsupported;
8413 }
8414
8415 skip = FALSE;
8416 relocate = FALSE;
8417
8418 outrel.r_addend = addend;
8419 outrel.r_offset =
8420 _bfd_elf_section_offset (output_bfd, info, input_section,
8421 rel->r_offset);
8422 if (outrel.r_offset == (bfd_vma) -1)
8423 skip = TRUE;
8424 else if (outrel.r_offset == (bfd_vma) -2)
8425 skip = TRUE, relocate = TRUE;
8426 outrel.r_offset += (input_section->output_section->vma
8427 + input_section->output_offset);
8428
8429 if (skip)
8430 memset (&outrel, 0, sizeof outrel);
8431 else if (h != NULL
8432 && h->dynindx != -1
8433 && (!info->shared
8434 || !info->symbolic
8435 || !h->def_regular))
8436 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8437 else
8438 {
8439 int symbol;
8440
8441 /* This symbol is local, or marked to become local. */
8442 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8443 if (globals->symbian_p)
8444 {
8445 asection *osec;
8446
8447 /* On Symbian OS, the data segment and text segement
8448 can be relocated independently. Therefore, we
8449 must indicate the segment to which this
8450 relocation is relative. The BPABI allows us to
8451 use any symbol in the right segment; we just use
8452 the section symbol as it is convenient. (We
8453 cannot use the symbol given by "h" directly as it
8454 will not appear in the dynamic symbol table.)
8455
8456 Note that the dynamic linker ignores the section
8457 symbol value, so we don't subtract osec->vma
8458 from the emitted reloc addend. */
8459 if (sym_sec)
8460 osec = sym_sec->output_section;
8461 else
8462 osec = input_section->output_section;
8463 symbol = elf_section_data (osec)->dynindx;
8464 if (symbol == 0)
8465 {
8466 struct elf_link_hash_table *htab = elf_hash_table (info);
8467
8468 if ((osec->flags & SEC_READONLY) == 0
8469 && htab->data_index_section != NULL)
8470 osec = htab->data_index_section;
8471 else
8472 osec = htab->text_index_section;
8473 symbol = elf_section_data (osec)->dynindx;
8474 }
8475 BFD_ASSERT (symbol != 0);
8476 }
8477 else
8478 /* On SVR4-ish systems, the dynamic loader cannot
8479 relocate the text and data segments independently,
8480 so the symbol does not matter. */
8481 symbol = 0;
8482 if (dynreloc_st_type == STT_GNU_IFUNC)
8483 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8484 to the .iplt entry. Instead, every non-call reference
8485 must use an R_ARM_IRELATIVE relocation to obtain the
8486 correct run-time address. */
8487 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8488 else
8489 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8490 if (globals->use_rel)
8491 relocate = TRUE;
8492 else
8493 outrel.r_addend += dynreloc_value;
8494 }
8495
8496 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8497
8498 /* If this reloc is against an external symbol, we do not want to
8499 fiddle with the addend. Otherwise, we need to include the symbol
8500 value so that it becomes an addend for the dynamic reloc. */
8501 if (! relocate)
8502 return bfd_reloc_ok;
8503
8504 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8505 contents, rel->r_offset,
8506 dynreloc_value, (bfd_vma) 0);
8507 }
8508 else switch (r_type)
8509 {
8510 case R_ARM_ABS12:
8511 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8512
8513 case R_ARM_XPC25: /* Arm BLX instruction. */
8514 case R_ARM_CALL:
8515 case R_ARM_JUMP24:
8516 case R_ARM_PC24: /* Arm B/BL instruction. */
8517 case R_ARM_PLT32:
8518 {
8519 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8520
8521 if (r_type == R_ARM_XPC25)
8522 {
8523 /* Check for Arm calling Arm function. */
8524 /* FIXME: Should we translate the instruction into a BL
8525 instruction instead ? */
8526 if (branch_type != ST_BRANCH_TO_THUMB)
8527 (*_bfd_error_handler)
8528 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8529 input_bfd,
8530 h ? h->root.root.string : "(local)");
8531 }
8532 else if (r_type == R_ARM_PC24)
8533 {
8534 /* Check for Arm calling Thumb function. */
8535 if (branch_type == ST_BRANCH_TO_THUMB)
8536 {
8537 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8538 output_bfd, input_section,
8539 hit_data, sym_sec, rel->r_offset,
8540 signed_addend, value,
8541 error_message))
8542 return bfd_reloc_ok;
8543 else
8544 return bfd_reloc_dangerous;
8545 }
8546 }
8547
8548 /* Check if a stub has to be inserted because the
8549 destination is too far or we are changing mode. */
8550 if ( r_type == R_ARM_CALL
8551 || r_type == R_ARM_JUMP24
8552 || r_type == R_ARM_PLT32)
8553 {
8554 enum elf32_arm_stub_type stub_type = arm_stub_none;
8555 struct elf32_arm_link_hash_entry *hash;
8556
8557 hash = (struct elf32_arm_link_hash_entry *) h;
8558 stub_type = arm_type_of_stub (info, input_section, rel,
8559 st_type, &branch_type,
8560 hash, value, sym_sec,
8561 input_bfd, sym_name);
8562
8563 if (stub_type != arm_stub_none)
8564 {
8565 /* The target is out of reach, so redirect the
8566 branch to the local stub for this function. */
8567 stub_entry = elf32_arm_get_stub_entry (input_section,
8568 sym_sec, h,
8569 rel, globals,
8570 stub_type);
8571 {
8572 if (stub_entry != NULL)
8573 value = (stub_entry->stub_offset
8574 + stub_entry->stub_sec->output_offset
8575 + stub_entry->stub_sec->output_section->vma);
8576
8577 if (plt_offset != (bfd_vma) -1)
8578 *unresolved_reloc_p = FALSE;
8579 }
8580 }
8581 else
8582 {
8583 /* If the call goes through a PLT entry, make sure to
8584 check distance to the right destination address. */
8585 if (plt_offset != (bfd_vma) -1)
8586 {
8587 value = (splt->output_section->vma
8588 + splt->output_offset
8589 + plt_offset);
8590 *unresolved_reloc_p = FALSE;
8591 /* The PLT entry is in ARM mode, regardless of the
8592 target function. */
8593 branch_type = ST_BRANCH_TO_ARM;
8594 }
8595 }
8596 }
8597
8598 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8599 where:
8600 S is the address of the symbol in the relocation.
8601 P is address of the instruction being relocated.
8602 A is the addend (extracted from the instruction) in bytes.
8603
8604 S is held in 'value'.
8605 P is the base address of the section containing the
8606 instruction plus the offset of the reloc into that
8607 section, ie:
8608 (input_section->output_section->vma +
8609 input_section->output_offset +
8610 rel->r_offset).
8611 A is the addend, converted into bytes, ie:
8612 (signed_addend * 4)
8613
8614 Note: None of these operations have knowledge of the pipeline
8615 size of the processor, thus it is up to the assembler to
8616 encode this information into the addend. */
8617 value -= (input_section->output_section->vma
8618 + input_section->output_offset);
8619 value -= rel->r_offset;
8620 if (globals->use_rel)
8621 value += (signed_addend << howto->size);
8622 else
8623 /* RELA addends do not have to be adjusted by howto->size. */
8624 value += signed_addend;
8625
8626 signed_addend = value;
8627 signed_addend >>= howto->rightshift;
8628
8629 /* A branch to an undefined weak symbol is turned into a jump to
8630 the next instruction unless a PLT entry will be created.
8631 Do the same for local undefined symbols (but not for STN_UNDEF).
8632 The jump to the next instruction is optimized as a NOP depending
8633 on the architecture. */
8634 if (h ? (h->root.type == bfd_link_hash_undefweak
8635 && plt_offset == (bfd_vma) -1)
8636 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8637 {
8638 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8639
8640 if (arch_has_arm_nop (globals))
8641 value |= 0x0320f000;
8642 else
8643 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8644 }
8645 else
8646 {
8647 /* Perform a signed range check. */
8648 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8649 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8650 return bfd_reloc_overflow;
8651
8652 addend = (value & 2);
8653
8654 value = (signed_addend & howto->dst_mask)
8655 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8656
8657 if (r_type == R_ARM_CALL)
8658 {
8659 /* Set the H bit in the BLX instruction. */
8660 if (branch_type == ST_BRANCH_TO_THUMB)
8661 {
8662 if (addend)
8663 value |= (1 << 24);
8664 else
8665 value &= ~(bfd_vma)(1 << 24);
8666 }
8667
8668 /* Select the correct instruction (BL or BLX). */
8669 /* Only if we are not handling a BL to a stub. In this
8670 case, mode switching is performed by the stub. */
8671 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8672 value |= (1 << 28);
8673 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8674 {
8675 value &= ~(bfd_vma)(1 << 28);
8676 value |= (1 << 24);
8677 }
8678 }
8679 }
8680 }
8681 break;
8682
8683 case R_ARM_ABS32:
8684 value += addend;
8685 if (branch_type == ST_BRANCH_TO_THUMB)
8686 value |= 1;
8687 break;
8688
8689 case R_ARM_ABS32_NOI:
8690 value += addend;
8691 break;
8692
8693 case R_ARM_REL32:
8694 value += addend;
8695 if (branch_type == ST_BRANCH_TO_THUMB)
8696 value |= 1;
8697 value -= (input_section->output_section->vma
8698 + input_section->output_offset + rel->r_offset);
8699 break;
8700
8701 case R_ARM_REL32_NOI:
8702 value += addend;
8703 value -= (input_section->output_section->vma
8704 + input_section->output_offset + rel->r_offset);
8705 break;
8706
8707 case R_ARM_PREL31:
8708 value -= (input_section->output_section->vma
8709 + input_section->output_offset + rel->r_offset);
8710 value += signed_addend;
8711 if (! h || h->root.type != bfd_link_hash_undefweak)
8712 {
8713 /* Check for overflow. */
8714 if ((value ^ (value >> 1)) & (1 << 30))
8715 return bfd_reloc_overflow;
8716 }
8717 value &= 0x7fffffff;
8718 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8719 if (branch_type == ST_BRANCH_TO_THUMB)
8720 value |= 1;
8721 break;
8722 }
8723
8724 bfd_put_32 (input_bfd, value, hit_data);
8725 return bfd_reloc_ok;
8726
8727 case R_ARM_ABS8:
8728 /* PR 16202: Refectch the addend using the correct size. */
8729 if (globals->use_rel)
8730 addend = bfd_get_8 (input_bfd, hit_data);
8731 value += addend;
8732
8733 /* There is no way to tell whether the user intended to use a signed or
8734 unsigned addend. When checking for overflow we accept either,
8735 as specified by the AAELF. */
8736 if ((long) value > 0xff || (long) value < -0x80)
8737 return bfd_reloc_overflow;
8738
8739 bfd_put_8 (input_bfd, value, hit_data);
8740 return bfd_reloc_ok;
8741
8742 case R_ARM_ABS16:
8743 /* PR 16202: Refectch the addend using the correct size. */
8744 if (globals->use_rel)
8745 addend = bfd_get_16 (input_bfd, hit_data);
8746 value += addend;
8747
8748 /* See comment for R_ARM_ABS8. */
8749 if ((long) value > 0xffff || (long) value < -0x8000)
8750 return bfd_reloc_overflow;
8751
8752 bfd_put_16 (input_bfd, value, hit_data);
8753 return bfd_reloc_ok;
8754
8755 case R_ARM_THM_ABS5:
8756 /* Support ldr and str instructions for the thumb. */
8757 if (globals->use_rel)
8758 {
8759 /* Need to refetch addend. */
8760 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8761 /* ??? Need to determine shift amount from operand size. */
8762 addend >>= howto->rightshift;
8763 }
8764 value += addend;
8765
8766 /* ??? Isn't value unsigned? */
8767 if ((long) value > 0x1f || (long) value < -0x10)
8768 return bfd_reloc_overflow;
8769
8770 /* ??? Value needs to be properly shifted into place first. */
8771 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8772 bfd_put_16 (input_bfd, value, hit_data);
8773 return bfd_reloc_ok;
8774
8775 case R_ARM_THM_ALU_PREL_11_0:
8776 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8777 {
8778 bfd_vma insn;
8779 bfd_signed_vma relocation;
8780
8781 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8782 | bfd_get_16 (input_bfd, hit_data + 2);
8783
8784 if (globals->use_rel)
8785 {
8786 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8787 | ((insn & (1 << 26)) >> 15);
8788 if (insn & 0xf00000)
8789 signed_addend = -signed_addend;
8790 }
8791
8792 relocation = value + signed_addend;
8793 relocation -= Pa (input_section->output_section->vma
8794 + input_section->output_offset
8795 + rel->r_offset);
8796
8797 value = abs (relocation);
8798
8799 if (value >= 0x1000)
8800 return bfd_reloc_overflow;
8801
8802 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8803 | ((value & 0x700) << 4)
8804 | ((value & 0x800) << 15);
8805 if (relocation < 0)
8806 insn |= 0xa00000;
8807
8808 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8809 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8810
8811 return bfd_reloc_ok;
8812 }
8813
8814 case R_ARM_THM_PC8:
8815 /* PR 10073: This reloc is not generated by the GNU toolchain,
8816 but it is supported for compatibility with third party libraries
8817 generated by other compilers, specifically the ARM/IAR. */
8818 {
8819 bfd_vma insn;
8820 bfd_signed_vma relocation;
8821
8822 insn = bfd_get_16 (input_bfd, hit_data);
8823
8824 if (globals->use_rel)
8825 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
8826
8827 relocation = value + addend;
8828 relocation -= Pa (input_section->output_section->vma
8829 + input_section->output_offset
8830 + rel->r_offset);
8831
8832 value = abs (relocation);
8833
8834 /* We do not check for overflow of this reloc. Although strictly
8835 speaking this is incorrect, it appears to be necessary in order
8836 to work with IAR generated relocs. Since GCC and GAS do not
8837 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8838 a problem for them. */
8839 value &= 0x3fc;
8840
8841 insn = (insn & 0xff00) | (value >> 2);
8842
8843 bfd_put_16 (input_bfd, insn, hit_data);
8844
8845 return bfd_reloc_ok;
8846 }
8847
8848 case R_ARM_THM_PC12:
8849 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8850 {
8851 bfd_vma insn;
8852 bfd_signed_vma relocation;
8853
8854 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8855 | bfd_get_16 (input_bfd, hit_data + 2);
8856
8857 if (globals->use_rel)
8858 {
8859 signed_addend = insn & 0xfff;
8860 if (!(insn & (1 << 23)))
8861 signed_addend = -signed_addend;
8862 }
8863
8864 relocation = value + signed_addend;
8865 relocation -= Pa (input_section->output_section->vma
8866 + input_section->output_offset
8867 + rel->r_offset);
8868
8869 value = abs (relocation);
8870
8871 if (value >= 0x1000)
8872 return bfd_reloc_overflow;
8873
8874 insn = (insn & 0xff7ff000) | value;
8875 if (relocation >= 0)
8876 insn |= (1 << 23);
8877
8878 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8879 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8880
8881 return bfd_reloc_ok;
8882 }
8883
8884 case R_ARM_THM_XPC22:
8885 case R_ARM_THM_CALL:
8886 case R_ARM_THM_JUMP24:
8887 /* Thumb BL (branch long instruction). */
8888 {
8889 bfd_vma relocation;
8890 bfd_vma reloc_sign;
8891 bfd_boolean overflow = FALSE;
8892 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8893 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8894 bfd_signed_vma reloc_signed_max;
8895 bfd_signed_vma reloc_signed_min;
8896 bfd_vma check;
8897 bfd_signed_vma signed_check;
8898 int bitsize;
8899 const int thumb2 = using_thumb2 (globals);
8900
8901 /* A branch to an undefined weak symbol is turned into a jump to
8902 the next instruction unless a PLT entry will be created.
8903 The jump to the next instruction is optimized as a NOP.W for
8904 Thumb-2 enabled architectures. */
8905 if (h && h->root.type == bfd_link_hash_undefweak
8906 && plt_offset == (bfd_vma) -1)
8907 {
8908 if (arch_has_thumb2_nop (globals))
8909 {
8910 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8911 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8912 }
8913 else
8914 {
8915 bfd_put_16 (input_bfd, 0xe000, hit_data);
8916 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8917 }
8918 return bfd_reloc_ok;
8919 }
8920
8921 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8922 with Thumb-1) involving the J1 and J2 bits. */
8923 if (globals->use_rel)
8924 {
8925 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8926 bfd_vma upper = upper_insn & 0x3ff;
8927 bfd_vma lower = lower_insn & 0x7ff;
8928 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8929 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8930 bfd_vma i1 = j1 ^ s ? 0 : 1;
8931 bfd_vma i2 = j2 ^ s ? 0 : 1;
8932
8933 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8934 /* Sign extend. */
8935 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8936
8937 signed_addend = addend;
8938 }
8939
8940 if (r_type == R_ARM_THM_XPC22)
8941 {
8942 /* Check for Thumb to Thumb call. */
8943 /* FIXME: Should we translate the instruction into a BL
8944 instruction instead ? */
8945 if (branch_type == ST_BRANCH_TO_THUMB)
8946 (*_bfd_error_handler)
8947 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8948 input_bfd,
8949 h ? h->root.root.string : "(local)");
8950 }
8951 else
8952 {
8953 /* If it is not a call to Thumb, assume call to Arm.
8954 If it is a call relative to a section name, then it is not a
8955 function call at all, but rather a long jump. Calls through
8956 the PLT do not require stubs. */
8957 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8958 {
8959 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8960 {
8961 /* Convert BL to BLX. */
8962 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8963 }
8964 else if (( r_type != R_ARM_THM_CALL)
8965 && (r_type != R_ARM_THM_JUMP24))
8966 {
8967 if (elf32_thumb_to_arm_stub
8968 (info, sym_name, input_bfd, output_bfd, input_section,
8969 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8970 error_message))
8971 return bfd_reloc_ok;
8972 else
8973 return bfd_reloc_dangerous;
8974 }
8975 }
8976 else if (branch_type == ST_BRANCH_TO_THUMB
8977 && globals->use_blx
8978 && r_type == R_ARM_THM_CALL)
8979 {
8980 /* Make sure this is a BL. */
8981 lower_insn |= 0x1800;
8982 }
8983 }
8984
8985 enum elf32_arm_stub_type stub_type = arm_stub_none;
8986 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8987 {
8988 /* Check if a stub has to be inserted because the destination
8989 is too far. */
8990 struct elf32_arm_stub_hash_entry *stub_entry;
8991 struct elf32_arm_link_hash_entry *hash;
8992
8993 hash = (struct elf32_arm_link_hash_entry *) h;
8994
8995 stub_type = arm_type_of_stub (info, input_section, rel,
8996 st_type, &branch_type,
8997 hash, value, sym_sec,
8998 input_bfd, sym_name);
8999
9000 if (stub_type != arm_stub_none)
9001 {
9002 /* The target is out of reach or we are changing modes, so
9003 redirect the branch to the local stub for this
9004 function. */
9005 stub_entry = elf32_arm_get_stub_entry (input_section,
9006 sym_sec, h,
9007 rel, globals,
9008 stub_type);
9009 if (stub_entry != NULL)
9010 {
9011 value = (stub_entry->stub_offset
9012 + stub_entry->stub_sec->output_offset
9013 + stub_entry->stub_sec->output_section->vma);
9014
9015 if (plt_offset != (bfd_vma) -1)
9016 *unresolved_reloc_p = FALSE;
9017 }
9018
9019 /* If this call becomes a call to Arm, force BLX. */
9020 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9021 {
9022 if ((stub_entry
9023 && !arm_stub_is_thumb (stub_entry->stub_type))
9024 || branch_type != ST_BRANCH_TO_THUMB)
9025 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9026 }
9027 }
9028 }
9029
9030 /* Handle calls via the PLT. */
9031 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9032 {
9033 value = (splt->output_section->vma
9034 + splt->output_offset
9035 + plt_offset);
9036
9037 if (globals->use_blx
9038 && r_type == R_ARM_THM_CALL
9039 && ! using_thumb_only (globals))
9040 {
9041 /* If the Thumb BLX instruction is available, convert
9042 the BL to a BLX instruction to call the ARM-mode
9043 PLT entry. */
9044 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9045 branch_type = ST_BRANCH_TO_ARM;
9046 }
9047 else
9048 {
9049 if (! using_thumb_only (globals))
9050 /* Target the Thumb stub before the ARM PLT entry. */
9051 value -= PLT_THUMB_STUB_SIZE;
9052 branch_type = ST_BRANCH_TO_THUMB;
9053 }
9054 *unresolved_reloc_p = FALSE;
9055 }
9056
9057 relocation = value + signed_addend;
9058
9059 relocation -= (input_section->output_section->vma
9060 + input_section->output_offset
9061 + rel->r_offset);
9062
9063 check = relocation >> howto->rightshift;
9064
9065 /* If this is a signed value, the rightshift just dropped
9066 leading 1 bits (assuming twos complement). */
9067 if ((bfd_signed_vma) relocation >= 0)
9068 signed_check = check;
9069 else
9070 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9071
9072 /* Calculate the permissable maximum and minimum values for
9073 this relocation according to whether we're relocating for
9074 Thumb-2 or not. */
9075 bitsize = howto->bitsize;
9076 if (!thumb2)
9077 bitsize -= 2;
9078 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9079 reloc_signed_min = ~reloc_signed_max;
9080
9081 /* Assumes two's complement. */
9082 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9083 overflow = TRUE;
9084
9085 if ((lower_insn & 0x5000) == 0x4000)
9086 /* For a BLX instruction, make sure that the relocation is rounded up
9087 to a word boundary. This follows the semantics of the instruction
9088 which specifies that bit 1 of the target address will come from bit
9089 1 of the base address. */
9090 relocation = (relocation + 2) & ~ 3;
9091
9092 /* Put RELOCATION back into the insn. Assumes two's complement.
9093 We use the Thumb-2 encoding, which is safe even if dealing with
9094 a Thumb-1 instruction by virtue of our overflow check above. */
9095 reloc_sign = (signed_check < 0) ? 1 : 0;
9096 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9097 | ((relocation >> 12) & 0x3ff)
9098 | (reloc_sign << 10);
9099 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9100 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9101 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9102 | ((relocation >> 1) & 0x7ff);
9103
9104 /* Put the relocated value back in the object file: */
9105 bfd_put_16 (input_bfd, upper_insn, hit_data);
9106 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9107
9108 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9109 }
9110 break;
9111
9112 case R_ARM_THM_JUMP19:
9113 /* Thumb32 conditional branch instruction. */
9114 {
9115 bfd_vma relocation;
9116 bfd_boolean overflow = FALSE;
9117 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9118 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9119 bfd_signed_vma reloc_signed_max = 0xffffe;
9120 bfd_signed_vma reloc_signed_min = -0x100000;
9121 bfd_signed_vma signed_check;
9122
9123 /* Need to refetch the addend, reconstruct the top three bits,
9124 and squish the two 11 bit pieces together. */
9125 if (globals->use_rel)
9126 {
9127 bfd_vma S = (upper_insn & 0x0400) >> 10;
9128 bfd_vma upper = (upper_insn & 0x003f);
9129 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9130 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9131 bfd_vma lower = (lower_insn & 0x07ff);
9132
9133 upper |= J1 << 6;
9134 upper |= J2 << 7;
9135 upper |= (!S) << 8;
9136 upper -= 0x0100; /* Sign extend. */
9137
9138 addend = (upper << 12) | (lower << 1);
9139 signed_addend = addend;
9140 }
9141
9142 /* Handle calls via the PLT. */
9143 if (plt_offset != (bfd_vma) -1)
9144 {
9145 value = (splt->output_section->vma
9146 + splt->output_offset
9147 + plt_offset);
9148 /* Target the Thumb stub before the ARM PLT entry. */
9149 value -= PLT_THUMB_STUB_SIZE;
9150 *unresolved_reloc_p = FALSE;
9151 }
9152
9153 /* ??? Should handle interworking? GCC might someday try to
9154 use this for tail calls. */
9155
9156 relocation = value + signed_addend;
9157 relocation -= (input_section->output_section->vma
9158 + input_section->output_offset
9159 + rel->r_offset);
9160 signed_check = (bfd_signed_vma) relocation;
9161
9162 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9163 overflow = TRUE;
9164
9165 /* Put RELOCATION back into the insn. */
9166 {
9167 bfd_vma S = (relocation & 0x00100000) >> 20;
9168 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9169 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9170 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9171 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9172
9173 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9174 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9175 }
9176
9177 /* Put the relocated value back in the object file: */
9178 bfd_put_16 (input_bfd, upper_insn, hit_data);
9179 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9180
9181 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9182 }
9183
9184 case R_ARM_THM_JUMP11:
9185 case R_ARM_THM_JUMP8:
9186 case R_ARM_THM_JUMP6:
9187 /* Thumb B (branch) instruction). */
9188 {
9189 bfd_signed_vma relocation;
9190 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9191 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9192 bfd_signed_vma signed_check;
9193
9194 /* CZB cannot jump backward. */
9195 if (r_type == R_ARM_THM_JUMP6)
9196 reloc_signed_min = 0;
9197
9198 if (globals->use_rel)
9199 {
9200 /* Need to refetch addend. */
9201 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9202 if (addend & ((howto->src_mask + 1) >> 1))
9203 {
9204 signed_addend = -1;
9205 signed_addend &= ~ howto->src_mask;
9206 signed_addend |= addend;
9207 }
9208 else
9209 signed_addend = addend;
9210 /* The value in the insn has been right shifted. We need to
9211 undo this, so that we can perform the address calculation
9212 in terms of bytes. */
9213 signed_addend <<= howto->rightshift;
9214 }
9215 relocation = value + signed_addend;
9216
9217 relocation -= (input_section->output_section->vma
9218 + input_section->output_offset
9219 + rel->r_offset);
9220
9221 relocation >>= howto->rightshift;
9222 signed_check = relocation;
9223
9224 if (r_type == R_ARM_THM_JUMP6)
9225 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9226 else
9227 relocation &= howto->dst_mask;
9228 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9229
9230 bfd_put_16 (input_bfd, relocation, hit_data);
9231
9232 /* Assumes two's complement. */
9233 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9234 return bfd_reloc_overflow;
9235
9236 return bfd_reloc_ok;
9237 }
9238
9239 case R_ARM_ALU_PCREL7_0:
9240 case R_ARM_ALU_PCREL15_8:
9241 case R_ARM_ALU_PCREL23_15:
9242 {
9243 bfd_vma insn;
9244 bfd_vma relocation;
9245
9246 insn = bfd_get_32 (input_bfd, hit_data);
9247 if (globals->use_rel)
9248 {
9249 /* Extract the addend. */
9250 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9251 signed_addend = addend;
9252 }
9253 relocation = value + signed_addend;
9254
9255 relocation -= (input_section->output_section->vma
9256 + input_section->output_offset
9257 + rel->r_offset);
9258 insn = (insn & ~0xfff)
9259 | ((howto->bitpos << 7) & 0xf00)
9260 | ((relocation >> howto->bitpos) & 0xff);
9261 bfd_put_32 (input_bfd, value, hit_data);
9262 }
9263 return bfd_reloc_ok;
9264
9265 case R_ARM_GNU_VTINHERIT:
9266 case R_ARM_GNU_VTENTRY:
9267 return bfd_reloc_ok;
9268
9269 case R_ARM_GOTOFF32:
9270 /* Relocation is relative to the start of the
9271 global offset table. */
9272
9273 BFD_ASSERT (sgot != NULL);
9274 if (sgot == NULL)
9275 return bfd_reloc_notsupported;
9276
9277 /* If we are addressing a Thumb function, we need to adjust the
9278 address by one, so that attempts to call the function pointer will
9279 correctly interpret it as Thumb code. */
9280 if (branch_type == ST_BRANCH_TO_THUMB)
9281 value += 1;
9282
9283 /* Note that sgot->output_offset is not involved in this
9284 calculation. We always want the start of .got. If we
9285 define _GLOBAL_OFFSET_TABLE in a different way, as is
9286 permitted by the ABI, we might have to change this
9287 calculation. */
9288 value -= sgot->output_section->vma;
9289 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9290 contents, rel->r_offset, value,
9291 rel->r_addend);
9292
9293 case R_ARM_GOTPC:
9294 /* Use global offset table as symbol value. */
9295 BFD_ASSERT (sgot != NULL);
9296
9297 if (sgot == NULL)
9298 return bfd_reloc_notsupported;
9299
9300 *unresolved_reloc_p = FALSE;
9301 value = sgot->output_section->vma;
9302 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9303 contents, rel->r_offset, value,
9304 rel->r_addend);
9305
9306 case R_ARM_GOT32:
9307 case R_ARM_GOT_PREL:
9308 /* Relocation is to the entry for this symbol in the
9309 global offset table. */
9310 if (sgot == NULL)
9311 return bfd_reloc_notsupported;
9312
9313 if (dynreloc_st_type == STT_GNU_IFUNC
9314 && plt_offset != (bfd_vma) -1
9315 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9316 {
9317 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9318 symbol, and the relocation resolves directly to the runtime
9319 target rather than to the .iplt entry. This means that any
9320 .got entry would be the same value as the .igot.plt entry,
9321 so there's no point creating both. */
9322 sgot = globals->root.igotplt;
9323 value = sgot->output_offset + gotplt_offset;
9324 }
9325 else if (h != NULL)
9326 {
9327 bfd_vma off;
9328
9329 off = h->got.offset;
9330 BFD_ASSERT (off != (bfd_vma) -1);
9331 if ((off & 1) != 0)
9332 {
9333 /* We have already processsed one GOT relocation against
9334 this symbol. */
9335 off &= ~1;
9336 if (globals->root.dynamic_sections_created
9337 && !SYMBOL_REFERENCES_LOCAL (info, h))
9338 *unresolved_reloc_p = FALSE;
9339 }
9340 else
9341 {
9342 Elf_Internal_Rela outrel;
9343
9344 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
9345 {
9346 /* If the symbol doesn't resolve locally in a static
9347 object, we have an undefined reference. If the
9348 symbol doesn't resolve locally in a dynamic object,
9349 it should be resolved by the dynamic linker. */
9350 if (globals->root.dynamic_sections_created)
9351 {
9352 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9353 *unresolved_reloc_p = FALSE;
9354 }
9355 else
9356 outrel.r_info = 0;
9357 outrel.r_addend = 0;
9358 }
9359 else
9360 {
9361 if (dynreloc_st_type == STT_GNU_IFUNC)
9362 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9363 else if (info->shared &&
9364 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9365 || h->root.type != bfd_link_hash_undefweak))
9366 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9367 else
9368 outrel.r_info = 0;
9369 outrel.r_addend = dynreloc_value;
9370 }
9371
9372 /* The GOT entry is initialized to zero by default.
9373 See if we should install a different value. */
9374 if (outrel.r_addend != 0
9375 && (outrel.r_info == 0 || globals->use_rel))
9376 {
9377 bfd_put_32 (output_bfd, outrel.r_addend,
9378 sgot->contents + off);
9379 outrel.r_addend = 0;
9380 }
9381
9382 if (outrel.r_info != 0)
9383 {
9384 outrel.r_offset = (sgot->output_section->vma
9385 + sgot->output_offset
9386 + off);
9387 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9388 }
9389 h->got.offset |= 1;
9390 }
9391 value = sgot->output_offset + off;
9392 }
9393 else
9394 {
9395 bfd_vma off;
9396
9397 BFD_ASSERT (local_got_offsets != NULL &&
9398 local_got_offsets[r_symndx] != (bfd_vma) -1);
9399
9400 off = local_got_offsets[r_symndx];
9401
9402 /* The offset must always be a multiple of 4. We use the
9403 least significant bit to record whether we have already
9404 generated the necessary reloc. */
9405 if ((off & 1) != 0)
9406 off &= ~1;
9407 else
9408 {
9409 if (globals->use_rel)
9410 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9411
9412 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9413 {
9414 Elf_Internal_Rela outrel;
9415
9416 outrel.r_addend = addend + dynreloc_value;
9417 outrel.r_offset = (sgot->output_section->vma
9418 + sgot->output_offset
9419 + off);
9420 if (dynreloc_st_type == STT_GNU_IFUNC)
9421 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9422 else
9423 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9424 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9425 }
9426
9427 local_got_offsets[r_symndx] |= 1;
9428 }
9429
9430 value = sgot->output_offset + off;
9431 }
9432 if (r_type != R_ARM_GOT32)
9433 value += sgot->output_section->vma;
9434
9435 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9436 contents, rel->r_offset, value,
9437 rel->r_addend);
9438
9439 case R_ARM_TLS_LDO32:
9440 value = value - dtpoff_base (info);
9441
9442 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9443 contents, rel->r_offset, value,
9444 rel->r_addend);
9445
9446 case R_ARM_TLS_LDM32:
9447 {
9448 bfd_vma off;
9449
9450 if (sgot == NULL)
9451 abort ();
9452
9453 off = globals->tls_ldm_got.offset;
9454
9455 if ((off & 1) != 0)
9456 off &= ~1;
9457 else
9458 {
9459 /* If we don't know the module number, create a relocation
9460 for it. */
9461 if (info->shared)
9462 {
9463 Elf_Internal_Rela outrel;
9464
9465 if (srelgot == NULL)
9466 abort ();
9467
9468 outrel.r_addend = 0;
9469 outrel.r_offset = (sgot->output_section->vma
9470 + sgot->output_offset + off);
9471 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9472
9473 if (globals->use_rel)
9474 bfd_put_32 (output_bfd, outrel.r_addend,
9475 sgot->contents + off);
9476
9477 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9478 }
9479 else
9480 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9481
9482 globals->tls_ldm_got.offset |= 1;
9483 }
9484
9485 value = sgot->output_section->vma + sgot->output_offset + off
9486 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9487
9488 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9489 contents, rel->r_offset, value,
9490 rel->r_addend);
9491 }
9492
9493 case R_ARM_TLS_CALL:
9494 case R_ARM_THM_TLS_CALL:
9495 case R_ARM_TLS_GD32:
9496 case R_ARM_TLS_IE32:
9497 case R_ARM_TLS_GOTDESC:
9498 case R_ARM_TLS_DESCSEQ:
9499 case R_ARM_THM_TLS_DESCSEQ:
9500 {
9501 bfd_vma off, offplt;
9502 int indx = 0;
9503 char tls_type;
9504
9505 BFD_ASSERT (sgot != NULL);
9506
9507 if (h != NULL)
9508 {
9509 bfd_boolean dyn;
9510 dyn = globals->root.dynamic_sections_created;
9511 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9512 && (!info->shared
9513 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9514 {
9515 *unresolved_reloc_p = FALSE;
9516 indx = h->dynindx;
9517 }
9518 off = h->got.offset;
9519 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9520 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9521 }
9522 else
9523 {
9524 BFD_ASSERT (local_got_offsets != NULL);
9525 off = local_got_offsets[r_symndx];
9526 offplt = local_tlsdesc_gotents[r_symndx];
9527 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9528 }
9529
9530 /* Linker relaxations happens from one of the
9531 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9532 if (ELF32_R_TYPE(rel->r_info) != r_type)
9533 tls_type = GOT_TLS_IE;
9534
9535 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9536
9537 if ((off & 1) != 0)
9538 off &= ~1;
9539 else
9540 {
9541 bfd_boolean need_relocs = FALSE;
9542 Elf_Internal_Rela outrel;
9543 int cur_off = off;
9544
9545 /* The GOT entries have not been initialized yet. Do it
9546 now, and emit any relocations. If both an IE GOT and a
9547 GD GOT are necessary, we emit the GD first. */
9548
9549 if ((info->shared || indx != 0)
9550 && (h == NULL
9551 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9552 || h->root.type != bfd_link_hash_undefweak))
9553 {
9554 need_relocs = TRUE;
9555 BFD_ASSERT (srelgot != NULL);
9556 }
9557
9558 if (tls_type & GOT_TLS_GDESC)
9559 {
9560 bfd_byte *loc;
9561
9562 /* We should have relaxed, unless this is an undefined
9563 weak symbol. */
9564 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9565 || info->shared);
9566 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9567 <= globals->root.sgotplt->size);
9568
9569 outrel.r_addend = 0;
9570 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9571 + globals->root.sgotplt->output_offset
9572 + offplt
9573 + globals->sgotplt_jump_table_size);
9574
9575 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9576 sreloc = globals->root.srelplt;
9577 loc = sreloc->contents;
9578 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9579 BFD_ASSERT (loc + RELOC_SIZE (globals)
9580 <= sreloc->contents + sreloc->size);
9581
9582 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9583
9584 /* For globals, the first word in the relocation gets
9585 the relocation index and the top bit set, or zero,
9586 if we're binding now. For locals, it gets the
9587 symbol's offset in the tls section. */
9588 bfd_put_32 (output_bfd,
9589 !h ? value - elf_hash_table (info)->tls_sec->vma
9590 : info->flags & DF_BIND_NOW ? 0
9591 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9592 globals->root.sgotplt->contents + offplt
9593 + globals->sgotplt_jump_table_size);
9594
9595 /* Second word in the relocation is always zero. */
9596 bfd_put_32 (output_bfd, 0,
9597 globals->root.sgotplt->contents + offplt
9598 + globals->sgotplt_jump_table_size + 4);
9599 }
9600 if (tls_type & GOT_TLS_GD)
9601 {
9602 if (need_relocs)
9603 {
9604 outrel.r_addend = 0;
9605 outrel.r_offset = (sgot->output_section->vma
9606 + sgot->output_offset
9607 + cur_off);
9608 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9609
9610 if (globals->use_rel)
9611 bfd_put_32 (output_bfd, outrel.r_addend,
9612 sgot->contents + cur_off);
9613
9614 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9615
9616 if (indx == 0)
9617 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9618 sgot->contents + cur_off + 4);
9619 else
9620 {
9621 outrel.r_addend = 0;
9622 outrel.r_info = ELF32_R_INFO (indx,
9623 R_ARM_TLS_DTPOFF32);
9624 outrel.r_offset += 4;
9625
9626 if (globals->use_rel)
9627 bfd_put_32 (output_bfd, outrel.r_addend,
9628 sgot->contents + cur_off + 4);
9629
9630 elf32_arm_add_dynreloc (output_bfd, info,
9631 srelgot, &outrel);
9632 }
9633 }
9634 else
9635 {
9636 /* If we are not emitting relocations for a
9637 general dynamic reference, then we must be in a
9638 static link or an executable link with the
9639 symbol binding locally. Mark it as belonging
9640 to module 1, the executable. */
9641 bfd_put_32 (output_bfd, 1,
9642 sgot->contents + cur_off);
9643 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9644 sgot->contents + cur_off + 4);
9645 }
9646
9647 cur_off += 8;
9648 }
9649
9650 if (tls_type & GOT_TLS_IE)
9651 {
9652 if (need_relocs)
9653 {
9654 if (indx == 0)
9655 outrel.r_addend = value - dtpoff_base (info);
9656 else
9657 outrel.r_addend = 0;
9658 outrel.r_offset = (sgot->output_section->vma
9659 + sgot->output_offset
9660 + cur_off);
9661 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9662
9663 if (globals->use_rel)
9664 bfd_put_32 (output_bfd, outrel.r_addend,
9665 sgot->contents + cur_off);
9666
9667 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9668 }
9669 else
9670 bfd_put_32 (output_bfd, tpoff (info, value),
9671 sgot->contents + cur_off);
9672 cur_off += 4;
9673 }
9674
9675 if (h != NULL)
9676 h->got.offset |= 1;
9677 else
9678 local_got_offsets[r_symndx] |= 1;
9679 }
9680
9681 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9682 off += 8;
9683 else if (tls_type & GOT_TLS_GDESC)
9684 off = offplt;
9685
9686 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9687 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9688 {
9689 bfd_signed_vma offset;
9690 /* TLS stubs are arm mode. The original symbol is a
9691 data object, so branch_type is bogus. */
9692 branch_type = ST_BRANCH_TO_ARM;
9693 enum elf32_arm_stub_type stub_type
9694 = arm_type_of_stub (info, input_section, rel,
9695 st_type, &branch_type,
9696 (struct elf32_arm_link_hash_entry *)h,
9697 globals->tls_trampoline, globals->root.splt,
9698 input_bfd, sym_name);
9699
9700 if (stub_type != arm_stub_none)
9701 {
9702 struct elf32_arm_stub_hash_entry *stub_entry
9703 = elf32_arm_get_stub_entry
9704 (input_section, globals->root.splt, 0, rel,
9705 globals, stub_type);
9706 offset = (stub_entry->stub_offset
9707 + stub_entry->stub_sec->output_offset
9708 + stub_entry->stub_sec->output_section->vma);
9709 }
9710 else
9711 offset = (globals->root.splt->output_section->vma
9712 + globals->root.splt->output_offset
9713 + globals->tls_trampoline);
9714
9715 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9716 {
9717 unsigned long inst;
9718
9719 offset -= (input_section->output_section->vma
9720 + input_section->output_offset
9721 + rel->r_offset + 8);
9722
9723 inst = offset >> 2;
9724 inst &= 0x00ffffff;
9725 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9726 }
9727 else
9728 {
9729 /* Thumb blx encodes the offset in a complicated
9730 fashion. */
9731 unsigned upper_insn, lower_insn;
9732 unsigned neg;
9733
9734 offset -= (input_section->output_section->vma
9735 + input_section->output_offset
9736 + rel->r_offset + 4);
9737
9738 if (stub_type != arm_stub_none
9739 && arm_stub_is_thumb (stub_type))
9740 {
9741 lower_insn = 0xd000;
9742 }
9743 else
9744 {
9745 lower_insn = 0xc000;
9746 /* Round up the offset to a word boundary. */
9747 offset = (offset + 2) & ~2;
9748 }
9749
9750 neg = offset < 0;
9751 upper_insn = (0xf000
9752 | ((offset >> 12) & 0x3ff)
9753 | (neg << 10));
9754 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9755 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9756 | ((offset >> 1) & 0x7ff);
9757 bfd_put_16 (input_bfd, upper_insn, hit_data);
9758 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9759 return bfd_reloc_ok;
9760 }
9761 }
9762 /* These relocations needs special care, as besides the fact
9763 they point somewhere in .gotplt, the addend must be
9764 adjusted accordingly depending on the type of instruction
9765 we refer to. */
9766 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9767 {
9768 unsigned long data, insn;
9769 unsigned thumb;
9770
9771 data = bfd_get_32 (input_bfd, hit_data);
9772 thumb = data & 1;
9773 data &= ~1u;
9774
9775 if (thumb)
9776 {
9777 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9778 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9779 insn = (insn << 16)
9780 | bfd_get_16 (input_bfd,
9781 contents + rel->r_offset - data + 2);
9782 if ((insn & 0xf800c000) == 0xf000c000)
9783 /* bl/blx */
9784 value = -6;
9785 else if ((insn & 0xffffff00) == 0x4400)
9786 /* add */
9787 value = -5;
9788 else
9789 {
9790 (*_bfd_error_handler)
9791 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9792 input_bfd, input_section,
9793 (unsigned long)rel->r_offset, insn);
9794 return bfd_reloc_notsupported;
9795 }
9796 }
9797 else
9798 {
9799 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9800
9801 switch (insn >> 24)
9802 {
9803 case 0xeb: /* bl */
9804 case 0xfa: /* blx */
9805 value = -4;
9806 break;
9807
9808 case 0xe0: /* add */
9809 value = -8;
9810 break;
9811
9812 default:
9813 (*_bfd_error_handler)
9814 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9815 input_bfd, input_section,
9816 (unsigned long)rel->r_offset, insn);
9817 return bfd_reloc_notsupported;
9818 }
9819 }
9820
9821 value += ((globals->root.sgotplt->output_section->vma
9822 + globals->root.sgotplt->output_offset + off)
9823 - (input_section->output_section->vma
9824 + input_section->output_offset
9825 + rel->r_offset)
9826 + globals->sgotplt_jump_table_size);
9827 }
9828 else
9829 value = ((globals->root.sgot->output_section->vma
9830 + globals->root.sgot->output_offset + off)
9831 - (input_section->output_section->vma
9832 + input_section->output_offset + rel->r_offset));
9833
9834 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9835 contents, rel->r_offset, value,
9836 rel->r_addend);
9837 }
9838
9839 case R_ARM_TLS_LE32:
9840 if (info->shared && !info->pie)
9841 {
9842 (*_bfd_error_handler)
9843 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9844 input_bfd, input_section,
9845 (long) rel->r_offset, howto->name);
9846 return bfd_reloc_notsupported;
9847 }
9848 else
9849 value = tpoff (info, value);
9850
9851 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9852 contents, rel->r_offset, value,
9853 rel->r_addend);
9854
9855 case R_ARM_V4BX:
9856 if (globals->fix_v4bx)
9857 {
9858 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9859
9860 /* Ensure that we have a BX instruction. */
9861 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9862
9863 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9864 {
9865 /* Branch to veneer. */
9866 bfd_vma glue_addr;
9867 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9868 glue_addr -= input_section->output_section->vma
9869 + input_section->output_offset
9870 + rel->r_offset + 8;
9871 insn = (insn & 0xf0000000) | 0x0a000000
9872 | ((glue_addr >> 2) & 0x00ffffff);
9873 }
9874 else
9875 {
9876 /* Preserve Rm (lowest four bits) and the condition code
9877 (highest four bits). Other bits encode MOV PC,Rm. */
9878 insn = (insn & 0xf000000f) | 0x01a0f000;
9879 }
9880
9881 bfd_put_32 (input_bfd, insn, hit_data);
9882 }
9883 return bfd_reloc_ok;
9884
9885 case R_ARM_MOVW_ABS_NC:
9886 case R_ARM_MOVT_ABS:
9887 case R_ARM_MOVW_PREL_NC:
9888 case R_ARM_MOVT_PREL:
9889 /* Until we properly support segment-base-relative addressing then
9890 we assume the segment base to be zero, as for the group relocations.
9891 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9892 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9893 case R_ARM_MOVW_BREL_NC:
9894 case R_ARM_MOVW_BREL:
9895 case R_ARM_MOVT_BREL:
9896 {
9897 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9898
9899 if (globals->use_rel)
9900 {
9901 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9902 signed_addend = (addend ^ 0x8000) - 0x8000;
9903 }
9904
9905 value += signed_addend;
9906
9907 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9908 value -= (input_section->output_section->vma
9909 + input_section->output_offset + rel->r_offset);
9910
9911 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9912 return bfd_reloc_overflow;
9913
9914 if (branch_type == ST_BRANCH_TO_THUMB)
9915 value |= 1;
9916
9917 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9918 || r_type == R_ARM_MOVT_BREL)
9919 value >>= 16;
9920
9921 insn &= 0xfff0f000;
9922 insn |= value & 0xfff;
9923 insn |= (value & 0xf000) << 4;
9924 bfd_put_32 (input_bfd, insn, hit_data);
9925 }
9926 return bfd_reloc_ok;
9927
9928 case R_ARM_THM_MOVW_ABS_NC:
9929 case R_ARM_THM_MOVT_ABS:
9930 case R_ARM_THM_MOVW_PREL_NC:
9931 case R_ARM_THM_MOVT_PREL:
9932 /* Until we properly support segment-base-relative addressing then
9933 we assume the segment base to be zero, as for the above relocations.
9934 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9935 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9936 as R_ARM_THM_MOVT_ABS. */
9937 case R_ARM_THM_MOVW_BREL_NC:
9938 case R_ARM_THM_MOVW_BREL:
9939 case R_ARM_THM_MOVT_BREL:
9940 {
9941 bfd_vma insn;
9942
9943 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9944 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9945
9946 if (globals->use_rel)
9947 {
9948 addend = ((insn >> 4) & 0xf000)
9949 | ((insn >> 15) & 0x0800)
9950 | ((insn >> 4) & 0x0700)
9951 | (insn & 0x00ff);
9952 signed_addend = (addend ^ 0x8000) - 0x8000;
9953 }
9954
9955 value += signed_addend;
9956
9957 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9958 value -= (input_section->output_section->vma
9959 + input_section->output_offset + rel->r_offset);
9960
9961 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9962 return bfd_reloc_overflow;
9963
9964 if (branch_type == ST_BRANCH_TO_THUMB)
9965 value |= 1;
9966
9967 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9968 || r_type == R_ARM_THM_MOVT_BREL)
9969 value >>= 16;
9970
9971 insn &= 0xfbf08f00;
9972 insn |= (value & 0xf000) << 4;
9973 insn |= (value & 0x0800) << 15;
9974 insn |= (value & 0x0700) << 4;
9975 insn |= (value & 0x00ff);
9976
9977 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9978 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9979 }
9980 return bfd_reloc_ok;
9981
9982 case R_ARM_ALU_PC_G0_NC:
9983 case R_ARM_ALU_PC_G1_NC:
9984 case R_ARM_ALU_PC_G0:
9985 case R_ARM_ALU_PC_G1:
9986 case R_ARM_ALU_PC_G2:
9987 case R_ARM_ALU_SB_G0_NC:
9988 case R_ARM_ALU_SB_G1_NC:
9989 case R_ARM_ALU_SB_G0:
9990 case R_ARM_ALU_SB_G1:
9991 case R_ARM_ALU_SB_G2:
9992 {
9993 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9994 bfd_vma pc = input_section->output_section->vma
9995 + input_section->output_offset + rel->r_offset;
9996 /* sb is the origin of the *segment* containing the symbol. */
9997 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
9998 bfd_vma residual;
9999 bfd_vma g_n;
10000 bfd_signed_vma signed_value;
10001 int group = 0;
10002
10003 /* Determine which group of bits to select. */
10004 switch (r_type)
10005 {
10006 case R_ARM_ALU_PC_G0_NC:
10007 case R_ARM_ALU_PC_G0:
10008 case R_ARM_ALU_SB_G0_NC:
10009 case R_ARM_ALU_SB_G0:
10010 group = 0;
10011 break;
10012
10013 case R_ARM_ALU_PC_G1_NC:
10014 case R_ARM_ALU_PC_G1:
10015 case R_ARM_ALU_SB_G1_NC:
10016 case R_ARM_ALU_SB_G1:
10017 group = 1;
10018 break;
10019
10020 case R_ARM_ALU_PC_G2:
10021 case R_ARM_ALU_SB_G2:
10022 group = 2;
10023 break;
10024
10025 default:
10026 abort ();
10027 }
10028
10029 /* If REL, extract the addend from the insn. If RELA, it will
10030 have already been fetched for us. */
10031 if (globals->use_rel)
10032 {
10033 int negative;
10034 bfd_vma constant = insn & 0xff;
10035 bfd_vma rotation = (insn & 0xf00) >> 8;
10036
10037 if (rotation == 0)
10038 signed_addend = constant;
10039 else
10040 {
10041 /* Compensate for the fact that in the instruction, the
10042 rotation is stored in multiples of 2 bits. */
10043 rotation *= 2;
10044
10045 /* Rotate "constant" right by "rotation" bits. */
10046 signed_addend = (constant >> rotation) |
10047 (constant << (8 * sizeof (bfd_vma) - rotation));
10048 }
10049
10050 /* Determine if the instruction is an ADD or a SUB.
10051 (For REL, this determines the sign of the addend.) */
10052 negative = identify_add_or_sub (insn);
10053 if (negative == 0)
10054 {
10055 (*_bfd_error_handler)
10056 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10057 input_bfd, input_section,
10058 (long) rel->r_offset, howto->name);
10059 return bfd_reloc_overflow;
10060 }
10061
10062 signed_addend *= negative;
10063 }
10064
10065 /* Compute the value (X) to go in the place. */
10066 if (r_type == R_ARM_ALU_PC_G0_NC
10067 || r_type == R_ARM_ALU_PC_G1_NC
10068 || r_type == R_ARM_ALU_PC_G0
10069 || r_type == R_ARM_ALU_PC_G1
10070 || r_type == R_ARM_ALU_PC_G2)
10071 /* PC relative. */
10072 signed_value = value - pc + signed_addend;
10073 else
10074 /* Section base relative. */
10075 signed_value = value - sb + signed_addend;
10076
10077 /* If the target symbol is a Thumb function, then set the
10078 Thumb bit in the address. */
10079 if (branch_type == ST_BRANCH_TO_THUMB)
10080 signed_value |= 1;
10081
10082 /* Calculate the value of the relevant G_n, in encoded
10083 constant-with-rotation format. */
10084 g_n = calculate_group_reloc_mask (abs (signed_value), group,
10085 &residual);
10086
10087 /* Check for overflow if required. */
10088 if ((r_type == R_ARM_ALU_PC_G0
10089 || r_type == R_ARM_ALU_PC_G1
10090 || r_type == R_ARM_ALU_PC_G2
10091 || r_type == R_ARM_ALU_SB_G0
10092 || r_type == R_ARM_ALU_SB_G1
10093 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10094 {
10095 (*_bfd_error_handler)
10096 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10097 input_bfd, input_section,
10098 (long) rel->r_offset, abs (signed_value), howto->name);
10099 return bfd_reloc_overflow;
10100 }
10101
10102 /* Mask out the value and the ADD/SUB part of the opcode; take care
10103 not to destroy the S bit. */
10104 insn &= 0xff1ff000;
10105
10106 /* Set the opcode according to whether the value to go in the
10107 place is negative. */
10108 if (signed_value < 0)
10109 insn |= 1 << 22;
10110 else
10111 insn |= 1 << 23;
10112
10113 /* Encode the offset. */
10114 insn |= g_n;
10115
10116 bfd_put_32 (input_bfd, insn, hit_data);
10117 }
10118 return bfd_reloc_ok;
10119
10120 case R_ARM_LDR_PC_G0:
10121 case R_ARM_LDR_PC_G1:
10122 case R_ARM_LDR_PC_G2:
10123 case R_ARM_LDR_SB_G0:
10124 case R_ARM_LDR_SB_G1:
10125 case R_ARM_LDR_SB_G2:
10126 {
10127 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10128 bfd_vma pc = input_section->output_section->vma
10129 + input_section->output_offset + rel->r_offset;
10130 /* sb is the origin of the *segment* containing the symbol. */
10131 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10132 bfd_vma residual;
10133 bfd_signed_vma signed_value;
10134 int group = 0;
10135
10136 /* Determine which groups of bits to calculate. */
10137 switch (r_type)
10138 {
10139 case R_ARM_LDR_PC_G0:
10140 case R_ARM_LDR_SB_G0:
10141 group = 0;
10142 break;
10143
10144 case R_ARM_LDR_PC_G1:
10145 case R_ARM_LDR_SB_G1:
10146 group = 1;
10147 break;
10148
10149 case R_ARM_LDR_PC_G2:
10150 case R_ARM_LDR_SB_G2:
10151 group = 2;
10152 break;
10153
10154 default:
10155 abort ();
10156 }
10157
10158 /* If REL, extract the addend from the insn. If RELA, it will
10159 have already been fetched for us. */
10160 if (globals->use_rel)
10161 {
10162 int negative = (insn & (1 << 23)) ? 1 : -1;
10163 signed_addend = negative * (insn & 0xfff);
10164 }
10165
10166 /* Compute the value (X) to go in the place. */
10167 if (r_type == R_ARM_LDR_PC_G0
10168 || r_type == R_ARM_LDR_PC_G1
10169 || r_type == R_ARM_LDR_PC_G2)
10170 /* PC relative. */
10171 signed_value = value - pc + signed_addend;
10172 else
10173 /* Section base relative. */
10174 signed_value = value - sb + signed_addend;
10175
10176 /* Calculate the value of the relevant G_{n-1} to obtain
10177 the residual at that stage. */
10178 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10179
10180 /* Check for overflow. */
10181 if (residual >= 0x1000)
10182 {
10183 (*_bfd_error_handler)
10184 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10185 input_bfd, input_section,
10186 (long) rel->r_offset, abs (signed_value), howto->name);
10187 return bfd_reloc_overflow;
10188 }
10189
10190 /* Mask out the value and U bit. */
10191 insn &= 0xff7ff000;
10192
10193 /* Set the U bit if the value to go in the place is non-negative. */
10194 if (signed_value >= 0)
10195 insn |= 1 << 23;
10196
10197 /* Encode the offset. */
10198 insn |= residual;
10199
10200 bfd_put_32 (input_bfd, insn, hit_data);
10201 }
10202 return bfd_reloc_ok;
10203
10204 case R_ARM_LDRS_PC_G0:
10205 case R_ARM_LDRS_PC_G1:
10206 case R_ARM_LDRS_PC_G2:
10207 case R_ARM_LDRS_SB_G0:
10208 case R_ARM_LDRS_SB_G1:
10209 case R_ARM_LDRS_SB_G2:
10210 {
10211 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10212 bfd_vma pc = input_section->output_section->vma
10213 + input_section->output_offset + rel->r_offset;
10214 /* sb is the origin of the *segment* containing the symbol. */
10215 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10216 bfd_vma residual;
10217 bfd_signed_vma signed_value;
10218 int group = 0;
10219
10220 /* Determine which groups of bits to calculate. */
10221 switch (r_type)
10222 {
10223 case R_ARM_LDRS_PC_G0:
10224 case R_ARM_LDRS_SB_G0:
10225 group = 0;
10226 break;
10227
10228 case R_ARM_LDRS_PC_G1:
10229 case R_ARM_LDRS_SB_G1:
10230 group = 1;
10231 break;
10232
10233 case R_ARM_LDRS_PC_G2:
10234 case R_ARM_LDRS_SB_G2:
10235 group = 2;
10236 break;
10237
10238 default:
10239 abort ();
10240 }
10241
10242 /* If REL, extract the addend from the insn. If RELA, it will
10243 have already been fetched for us. */
10244 if (globals->use_rel)
10245 {
10246 int negative = (insn & (1 << 23)) ? 1 : -1;
10247 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10248 }
10249
10250 /* Compute the value (X) to go in the place. */
10251 if (r_type == R_ARM_LDRS_PC_G0
10252 || r_type == R_ARM_LDRS_PC_G1
10253 || r_type == R_ARM_LDRS_PC_G2)
10254 /* PC relative. */
10255 signed_value = value - pc + signed_addend;
10256 else
10257 /* Section base relative. */
10258 signed_value = value - sb + signed_addend;
10259
10260 /* Calculate the value of the relevant G_{n-1} to obtain
10261 the residual at that stage. */
10262 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10263
10264 /* Check for overflow. */
10265 if (residual >= 0x100)
10266 {
10267 (*_bfd_error_handler)
10268 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10269 input_bfd, input_section,
10270 (long) rel->r_offset, abs (signed_value), howto->name);
10271 return bfd_reloc_overflow;
10272 }
10273
10274 /* Mask out the value and U bit. */
10275 insn &= 0xff7ff0f0;
10276
10277 /* Set the U bit if the value to go in the place is non-negative. */
10278 if (signed_value >= 0)
10279 insn |= 1 << 23;
10280
10281 /* Encode the offset. */
10282 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10283
10284 bfd_put_32 (input_bfd, insn, hit_data);
10285 }
10286 return bfd_reloc_ok;
10287
10288 case R_ARM_LDC_PC_G0:
10289 case R_ARM_LDC_PC_G1:
10290 case R_ARM_LDC_PC_G2:
10291 case R_ARM_LDC_SB_G0:
10292 case R_ARM_LDC_SB_G1:
10293 case R_ARM_LDC_SB_G2:
10294 {
10295 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10296 bfd_vma pc = input_section->output_section->vma
10297 + input_section->output_offset + rel->r_offset;
10298 /* sb is the origin of the *segment* containing the symbol. */
10299 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10300 bfd_vma residual;
10301 bfd_signed_vma signed_value;
10302 int group = 0;
10303
10304 /* Determine which groups of bits to calculate. */
10305 switch (r_type)
10306 {
10307 case R_ARM_LDC_PC_G0:
10308 case R_ARM_LDC_SB_G0:
10309 group = 0;
10310 break;
10311
10312 case R_ARM_LDC_PC_G1:
10313 case R_ARM_LDC_SB_G1:
10314 group = 1;
10315 break;
10316
10317 case R_ARM_LDC_PC_G2:
10318 case R_ARM_LDC_SB_G2:
10319 group = 2;
10320 break;
10321
10322 default:
10323 abort ();
10324 }
10325
10326 /* If REL, extract the addend from the insn. If RELA, it will
10327 have already been fetched for us. */
10328 if (globals->use_rel)
10329 {
10330 int negative = (insn & (1 << 23)) ? 1 : -1;
10331 signed_addend = negative * ((insn & 0xff) << 2);
10332 }
10333
10334 /* Compute the value (X) to go in the place. */
10335 if (r_type == R_ARM_LDC_PC_G0
10336 || r_type == R_ARM_LDC_PC_G1
10337 || r_type == R_ARM_LDC_PC_G2)
10338 /* PC relative. */
10339 signed_value = value - pc + signed_addend;
10340 else
10341 /* Section base relative. */
10342 signed_value = value - sb + signed_addend;
10343
10344 /* Calculate the value of the relevant G_{n-1} to obtain
10345 the residual at that stage. */
10346 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10347
10348 /* Check for overflow. (The absolute value to go in the place must be
10349 divisible by four and, after having been divided by four, must
10350 fit in eight bits.) */
10351 if ((residual & 0x3) != 0 || residual >= 0x400)
10352 {
10353 (*_bfd_error_handler)
10354 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10355 input_bfd, input_section,
10356 (long) rel->r_offset, abs (signed_value), howto->name);
10357 return bfd_reloc_overflow;
10358 }
10359
10360 /* Mask out the value and U bit. */
10361 insn &= 0xff7fff00;
10362
10363 /* Set the U bit if the value to go in the place is non-negative. */
10364 if (signed_value >= 0)
10365 insn |= 1 << 23;
10366
10367 /* Encode the offset. */
10368 insn |= residual >> 2;
10369
10370 bfd_put_32 (input_bfd, insn, hit_data);
10371 }
10372 return bfd_reloc_ok;
10373
10374 default:
10375 return bfd_reloc_notsupported;
10376 }
10377 }
10378
10379 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10380 static void
10381 arm_add_to_rel (bfd * abfd,
10382 bfd_byte * address,
10383 reloc_howto_type * howto,
10384 bfd_signed_vma increment)
10385 {
10386 bfd_signed_vma addend;
10387
10388 if (howto->type == R_ARM_THM_CALL
10389 || howto->type == R_ARM_THM_JUMP24)
10390 {
10391 int upper_insn, lower_insn;
10392 int upper, lower;
10393
10394 upper_insn = bfd_get_16 (abfd, address);
10395 lower_insn = bfd_get_16 (abfd, address + 2);
10396 upper = upper_insn & 0x7ff;
10397 lower = lower_insn & 0x7ff;
10398
10399 addend = (upper << 12) | (lower << 1);
10400 addend += increment;
10401 addend >>= 1;
10402
10403 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10404 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10405
10406 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10407 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10408 }
10409 else
10410 {
10411 bfd_vma contents;
10412
10413 contents = bfd_get_32 (abfd, address);
10414
10415 /* Get the (signed) value from the instruction. */
10416 addend = contents & howto->src_mask;
10417 if (addend & ((howto->src_mask + 1) >> 1))
10418 {
10419 bfd_signed_vma mask;
10420
10421 mask = -1;
10422 mask &= ~ howto->src_mask;
10423 addend |= mask;
10424 }
10425
10426 /* Add in the increment, (which is a byte value). */
10427 switch (howto->type)
10428 {
10429 default:
10430 addend += increment;
10431 break;
10432
10433 case R_ARM_PC24:
10434 case R_ARM_PLT32:
10435 case R_ARM_CALL:
10436 case R_ARM_JUMP24:
10437 addend <<= howto->size;
10438 addend += increment;
10439
10440 /* Should we check for overflow here ? */
10441
10442 /* Drop any undesired bits. */
10443 addend >>= howto->rightshift;
10444 break;
10445 }
10446
10447 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10448
10449 bfd_put_32 (abfd, contents, address);
10450 }
10451 }
10452
10453 #define IS_ARM_TLS_RELOC(R_TYPE) \
10454 ((R_TYPE) == R_ARM_TLS_GD32 \
10455 || (R_TYPE) == R_ARM_TLS_LDO32 \
10456 || (R_TYPE) == R_ARM_TLS_LDM32 \
10457 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10458 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10459 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10460 || (R_TYPE) == R_ARM_TLS_LE32 \
10461 || (R_TYPE) == R_ARM_TLS_IE32 \
10462 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10463
10464 /* Specific set of relocations for the gnu tls dialect. */
10465 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10466 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10467 || (R_TYPE) == R_ARM_TLS_CALL \
10468 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10469 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10470 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10471
10472 /* Relocate an ARM ELF section. */
10473
10474 static bfd_boolean
10475 elf32_arm_relocate_section (bfd * output_bfd,
10476 struct bfd_link_info * info,
10477 bfd * input_bfd,
10478 asection * input_section,
10479 bfd_byte * contents,
10480 Elf_Internal_Rela * relocs,
10481 Elf_Internal_Sym * local_syms,
10482 asection ** local_sections)
10483 {
10484 Elf_Internal_Shdr *symtab_hdr;
10485 struct elf_link_hash_entry **sym_hashes;
10486 Elf_Internal_Rela *rel;
10487 Elf_Internal_Rela *relend;
10488 const char *name;
10489 struct elf32_arm_link_hash_table * globals;
10490
10491 globals = elf32_arm_hash_table (info);
10492 if (globals == NULL)
10493 return FALSE;
10494
10495 symtab_hdr = & elf_symtab_hdr (input_bfd);
10496 sym_hashes = elf_sym_hashes (input_bfd);
10497
10498 rel = relocs;
10499 relend = relocs + input_section->reloc_count;
10500 for (; rel < relend; rel++)
10501 {
10502 int r_type;
10503 reloc_howto_type * howto;
10504 unsigned long r_symndx;
10505 Elf_Internal_Sym * sym;
10506 asection * sec;
10507 struct elf_link_hash_entry * h;
10508 bfd_vma relocation;
10509 bfd_reloc_status_type r;
10510 arelent bfd_reloc;
10511 char sym_type;
10512 bfd_boolean unresolved_reloc = FALSE;
10513 char *error_message = NULL;
10514
10515 r_symndx = ELF32_R_SYM (rel->r_info);
10516 r_type = ELF32_R_TYPE (rel->r_info);
10517 r_type = arm_real_reloc_type (globals, r_type);
10518
10519 if ( r_type == R_ARM_GNU_VTENTRY
10520 || r_type == R_ARM_GNU_VTINHERIT)
10521 continue;
10522
10523 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10524 howto = bfd_reloc.howto;
10525
10526 h = NULL;
10527 sym = NULL;
10528 sec = NULL;
10529
10530 if (r_symndx < symtab_hdr->sh_info)
10531 {
10532 sym = local_syms + r_symndx;
10533 sym_type = ELF32_ST_TYPE (sym->st_info);
10534 sec = local_sections[r_symndx];
10535
10536 /* An object file might have a reference to a local
10537 undefined symbol. This is a daft object file, but we
10538 should at least do something about it. V4BX & NONE
10539 relocations do not use the symbol and are explicitly
10540 allowed to use the undefined symbol, so allow those.
10541 Likewise for relocations against STN_UNDEF. */
10542 if (r_type != R_ARM_V4BX
10543 && r_type != R_ARM_NONE
10544 && r_symndx != STN_UNDEF
10545 && bfd_is_und_section (sec)
10546 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10547 {
10548 if (!info->callbacks->undefined_symbol
10549 (info, bfd_elf_string_from_elf_section
10550 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10551 input_bfd, input_section,
10552 rel->r_offset, TRUE))
10553 return FALSE;
10554 }
10555
10556 if (globals->use_rel)
10557 {
10558 relocation = (sec->output_section->vma
10559 + sec->output_offset
10560 + sym->st_value);
10561 if (!info->relocatable
10562 && (sec->flags & SEC_MERGE)
10563 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10564 {
10565 asection *msec;
10566 bfd_vma addend, value;
10567
10568 switch (r_type)
10569 {
10570 case R_ARM_MOVW_ABS_NC:
10571 case R_ARM_MOVT_ABS:
10572 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10573 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10574 addend = (addend ^ 0x8000) - 0x8000;
10575 break;
10576
10577 case R_ARM_THM_MOVW_ABS_NC:
10578 case R_ARM_THM_MOVT_ABS:
10579 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10580 << 16;
10581 value |= bfd_get_16 (input_bfd,
10582 contents + rel->r_offset + 2);
10583 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10584 | ((value & 0x04000000) >> 15);
10585 addend = (addend ^ 0x8000) - 0x8000;
10586 break;
10587
10588 default:
10589 if (howto->rightshift
10590 || (howto->src_mask & (howto->src_mask + 1)))
10591 {
10592 (*_bfd_error_handler)
10593 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10594 input_bfd, input_section,
10595 (long) rel->r_offset, howto->name);
10596 return FALSE;
10597 }
10598
10599 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10600
10601 /* Get the (signed) value from the instruction. */
10602 addend = value & howto->src_mask;
10603 if (addend & ((howto->src_mask + 1) >> 1))
10604 {
10605 bfd_signed_vma mask;
10606
10607 mask = -1;
10608 mask &= ~ howto->src_mask;
10609 addend |= mask;
10610 }
10611 break;
10612 }
10613
10614 msec = sec;
10615 addend =
10616 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10617 - relocation;
10618 addend += msec->output_section->vma + msec->output_offset;
10619
10620 /* Cases here must match those in the preceding
10621 switch statement. */
10622 switch (r_type)
10623 {
10624 case R_ARM_MOVW_ABS_NC:
10625 case R_ARM_MOVT_ABS:
10626 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10627 | (addend & 0xfff);
10628 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10629 break;
10630
10631 case R_ARM_THM_MOVW_ABS_NC:
10632 case R_ARM_THM_MOVT_ABS:
10633 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10634 | (addend & 0xff) | ((addend & 0x0800) << 15);
10635 bfd_put_16 (input_bfd, value >> 16,
10636 contents + rel->r_offset);
10637 bfd_put_16 (input_bfd, value,
10638 contents + rel->r_offset + 2);
10639 break;
10640
10641 default:
10642 value = (value & ~ howto->dst_mask)
10643 | (addend & howto->dst_mask);
10644 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10645 break;
10646 }
10647 }
10648 }
10649 else
10650 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10651 }
10652 else
10653 {
10654 bfd_boolean warned, ignored;
10655
10656 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10657 r_symndx, symtab_hdr, sym_hashes,
10658 h, sec, relocation,
10659 unresolved_reloc, warned, ignored);
10660
10661 sym_type = h->type;
10662 }
10663
10664 if (sec != NULL && discarded_section (sec))
10665 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10666 rel, 1, relend, howto, 0, contents);
10667
10668 if (info->relocatable)
10669 {
10670 /* This is a relocatable link. We don't have to change
10671 anything, unless the reloc is against a section symbol,
10672 in which case we have to adjust according to where the
10673 section symbol winds up in the output section. */
10674 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10675 {
10676 if (globals->use_rel)
10677 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10678 howto, (bfd_signed_vma) sec->output_offset);
10679 else
10680 rel->r_addend += sec->output_offset;
10681 }
10682 continue;
10683 }
10684
10685 if (h != NULL)
10686 name = h->root.root.string;
10687 else
10688 {
10689 name = (bfd_elf_string_from_elf_section
10690 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10691 if (name == NULL || *name == '\0')
10692 name = bfd_section_name (input_bfd, sec);
10693 }
10694
10695 if (r_symndx != STN_UNDEF
10696 && r_type != R_ARM_NONE
10697 && (h == NULL
10698 || h->root.type == bfd_link_hash_defined
10699 || h->root.type == bfd_link_hash_defweak)
10700 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10701 {
10702 (*_bfd_error_handler)
10703 ((sym_type == STT_TLS
10704 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10705 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10706 input_bfd,
10707 input_section,
10708 (long) rel->r_offset,
10709 howto->name,
10710 name);
10711 }
10712
10713 /* We call elf32_arm_final_link_relocate unless we're completely
10714 done, i.e., the relaxation produced the final output we want,
10715 and we won't let anybody mess with it. Also, we have to do
10716 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10717 both in relaxed and non-relaxed cases. */
10718 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10719 || (IS_ARM_TLS_GNU_RELOC (r_type)
10720 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10721 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10722 & GOT_TLS_GDESC)))
10723 {
10724 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10725 contents, rel, h == NULL);
10726 /* This may have been marked unresolved because it came from
10727 a shared library. But we've just dealt with that. */
10728 unresolved_reloc = 0;
10729 }
10730 else
10731 r = bfd_reloc_continue;
10732
10733 if (r == bfd_reloc_continue)
10734 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10735 input_section, contents, rel,
10736 relocation, info, sec, name, sym_type,
10737 (h ? h->target_internal
10738 : ARM_SYM_BRANCH_TYPE (sym)), h,
10739 &unresolved_reloc, &error_message);
10740
10741 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10742 because such sections are not SEC_ALLOC and thus ld.so will
10743 not process them. */
10744 if (unresolved_reloc
10745 && !((input_section->flags & SEC_DEBUGGING) != 0
10746 && h->def_dynamic)
10747 && _bfd_elf_section_offset (output_bfd, info, input_section,
10748 rel->r_offset) != (bfd_vma) -1)
10749 {
10750 (*_bfd_error_handler)
10751 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10752 input_bfd,
10753 input_section,
10754 (long) rel->r_offset,
10755 howto->name,
10756 h->root.root.string);
10757 return FALSE;
10758 }
10759
10760 if (r != bfd_reloc_ok)
10761 {
10762 switch (r)
10763 {
10764 case bfd_reloc_overflow:
10765 /* If the overflowing reloc was to an undefined symbol,
10766 we have already printed one error message and there
10767 is no point complaining again. */
10768 if ((! h ||
10769 h->root.type != bfd_link_hash_undefined)
10770 && (!((*info->callbacks->reloc_overflow)
10771 (info, (h ? &h->root : NULL), name, howto->name,
10772 (bfd_vma) 0, input_bfd, input_section,
10773 rel->r_offset))))
10774 return FALSE;
10775 break;
10776
10777 case bfd_reloc_undefined:
10778 if (!((*info->callbacks->undefined_symbol)
10779 (info, name, input_bfd, input_section,
10780 rel->r_offset, TRUE)))
10781 return FALSE;
10782 break;
10783
10784 case bfd_reloc_outofrange:
10785 error_message = _("out of range");
10786 goto common_error;
10787
10788 case bfd_reloc_notsupported:
10789 error_message = _("unsupported relocation");
10790 goto common_error;
10791
10792 case bfd_reloc_dangerous:
10793 /* error_message should already be set. */
10794 goto common_error;
10795
10796 default:
10797 error_message = _("unknown error");
10798 /* Fall through. */
10799
10800 common_error:
10801 BFD_ASSERT (error_message != NULL);
10802 if (!((*info->callbacks->reloc_dangerous)
10803 (info, error_message, input_bfd, input_section,
10804 rel->r_offset)))
10805 return FALSE;
10806 break;
10807 }
10808 }
10809 }
10810
10811 return TRUE;
10812 }
10813
10814 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10815 adds the edit to the start of the list. (The list must be built in order of
10816 ascending TINDEX: the function's callers are primarily responsible for
10817 maintaining that condition). */
10818
10819 static void
10820 add_unwind_table_edit (arm_unwind_table_edit **head,
10821 arm_unwind_table_edit **tail,
10822 arm_unwind_edit_type type,
10823 asection *linked_section,
10824 unsigned int tindex)
10825 {
10826 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10827 xmalloc (sizeof (arm_unwind_table_edit));
10828
10829 new_edit->type = type;
10830 new_edit->linked_section = linked_section;
10831 new_edit->index = tindex;
10832
10833 if (tindex > 0)
10834 {
10835 new_edit->next = NULL;
10836
10837 if (*tail)
10838 (*tail)->next = new_edit;
10839
10840 (*tail) = new_edit;
10841
10842 if (!*head)
10843 (*head) = new_edit;
10844 }
10845 else
10846 {
10847 new_edit->next = *head;
10848
10849 if (!*tail)
10850 *tail = new_edit;
10851
10852 *head = new_edit;
10853 }
10854 }
10855
10856 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10857
10858 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10859 static void
10860 adjust_exidx_size(asection *exidx_sec, int adjust)
10861 {
10862 asection *out_sec;
10863
10864 if (!exidx_sec->rawsize)
10865 exidx_sec->rawsize = exidx_sec->size;
10866
10867 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10868 out_sec = exidx_sec->output_section;
10869 /* Adjust size of output section. */
10870 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10871 }
10872
10873 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10874 static void
10875 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10876 {
10877 struct _arm_elf_section_data *exidx_arm_data;
10878
10879 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10880 add_unwind_table_edit (
10881 &exidx_arm_data->u.exidx.unwind_edit_list,
10882 &exidx_arm_data->u.exidx.unwind_edit_tail,
10883 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10884
10885 adjust_exidx_size(exidx_sec, 8);
10886 }
10887
10888 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10889 made to those tables, such that:
10890
10891 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10892 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10893 codes which have been inlined into the index).
10894
10895 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10896
10897 The edits are applied when the tables are written
10898 (in elf32_arm_write_section). */
10899
10900 bfd_boolean
10901 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10902 unsigned int num_text_sections,
10903 struct bfd_link_info *info,
10904 bfd_boolean merge_exidx_entries)
10905 {
10906 bfd *inp;
10907 unsigned int last_second_word = 0, i;
10908 asection *last_exidx_sec = NULL;
10909 asection *last_text_sec = NULL;
10910 int last_unwind_type = -1;
10911
10912 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10913 text sections. */
10914 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
10915 {
10916 asection *sec;
10917
10918 for (sec = inp->sections; sec != NULL; sec = sec->next)
10919 {
10920 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10921 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10922
10923 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10924 continue;
10925
10926 if (elf_sec->linked_to)
10927 {
10928 Elf_Internal_Shdr *linked_hdr
10929 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10930 struct _arm_elf_section_data *linked_sec_arm_data
10931 = get_arm_elf_section_data (linked_hdr->bfd_section);
10932
10933 if (linked_sec_arm_data == NULL)
10934 continue;
10935
10936 /* Link this .ARM.exidx section back from the text section it
10937 describes. */
10938 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10939 }
10940 }
10941 }
10942
10943 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10944 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10945 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10946
10947 for (i = 0; i < num_text_sections; i++)
10948 {
10949 asection *sec = text_section_order[i];
10950 asection *exidx_sec;
10951 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10952 struct _arm_elf_section_data *exidx_arm_data;
10953 bfd_byte *contents = NULL;
10954 int deleted_exidx_bytes = 0;
10955 bfd_vma j;
10956 arm_unwind_table_edit *unwind_edit_head = NULL;
10957 arm_unwind_table_edit *unwind_edit_tail = NULL;
10958 Elf_Internal_Shdr *hdr;
10959 bfd *ibfd;
10960
10961 if (arm_data == NULL)
10962 continue;
10963
10964 exidx_sec = arm_data->u.text.arm_exidx_sec;
10965 if (exidx_sec == NULL)
10966 {
10967 /* Section has no unwind data. */
10968 if (last_unwind_type == 0 || !last_exidx_sec)
10969 continue;
10970
10971 /* Ignore zero sized sections. */
10972 if (sec->size == 0)
10973 continue;
10974
10975 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10976 last_unwind_type = 0;
10977 continue;
10978 }
10979
10980 /* Skip /DISCARD/ sections. */
10981 if (bfd_is_abs_section (exidx_sec->output_section))
10982 continue;
10983
10984 hdr = &elf_section_data (exidx_sec)->this_hdr;
10985 if (hdr->sh_type != SHT_ARM_EXIDX)
10986 continue;
10987
10988 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10989 if (exidx_arm_data == NULL)
10990 continue;
10991
10992 ibfd = exidx_sec->owner;
10993
10994 if (hdr->contents != NULL)
10995 contents = hdr->contents;
10996 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10997 /* An error? */
10998 continue;
10999
11000 for (j = 0; j < hdr->sh_size; j += 8)
11001 {
11002 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11003 int unwind_type;
11004 int elide = 0;
11005
11006 /* An EXIDX_CANTUNWIND entry. */
11007 if (second_word == 1)
11008 {
11009 if (last_unwind_type == 0)
11010 elide = 1;
11011 unwind_type = 0;
11012 }
11013 /* Inlined unwinding data. Merge if equal to previous. */
11014 else if ((second_word & 0x80000000) != 0)
11015 {
11016 if (merge_exidx_entries
11017 && last_second_word == second_word && last_unwind_type == 1)
11018 elide = 1;
11019 unwind_type = 1;
11020 last_second_word = second_word;
11021 }
11022 /* Normal table entry. In theory we could merge these too,
11023 but duplicate entries are likely to be much less common. */
11024 else
11025 unwind_type = 2;
11026
11027 if (elide)
11028 {
11029 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11030 DELETE_EXIDX_ENTRY, NULL, j / 8);
11031
11032 deleted_exidx_bytes += 8;
11033 }
11034
11035 last_unwind_type = unwind_type;
11036 }
11037
11038 /* Free contents if we allocated it ourselves. */
11039 if (contents != hdr->contents)
11040 free (contents);
11041
11042 /* Record edits to be applied later (in elf32_arm_write_section). */
11043 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11044 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11045
11046 if (deleted_exidx_bytes > 0)
11047 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11048
11049 last_exidx_sec = exidx_sec;
11050 last_text_sec = sec;
11051 }
11052
11053 /* Add terminating CANTUNWIND entry. */
11054 if (last_exidx_sec && last_unwind_type != 0)
11055 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11056
11057 return TRUE;
11058 }
11059
11060 static bfd_boolean
11061 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11062 bfd *ibfd, const char *name)
11063 {
11064 asection *sec, *osec;
11065
11066 sec = bfd_get_linker_section (ibfd, name);
11067 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11068 return TRUE;
11069
11070 osec = sec->output_section;
11071 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11072 return TRUE;
11073
11074 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11075 sec->output_offset, sec->size))
11076 return FALSE;
11077
11078 return TRUE;
11079 }
11080
11081 static bfd_boolean
11082 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11083 {
11084 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11085 asection *sec, *osec;
11086
11087 if (globals == NULL)
11088 return FALSE;
11089
11090 /* Invoke the regular ELF backend linker to do all the work. */
11091 if (!bfd_elf_final_link (abfd, info))
11092 return FALSE;
11093
11094 /* Process stub sections (eg BE8 encoding, ...). */
11095 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11096 int i;
11097 for (i=0; i<htab->top_id; i++)
11098 {
11099 sec = htab->stub_group[i].stub_sec;
11100 /* Only process it once, in its link_sec slot. */
11101 if (sec && i == htab->stub_group[i].link_sec->id)
11102 {
11103 osec = sec->output_section;
11104 elf32_arm_write_section (abfd, info, sec, sec->contents);
11105 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11106 sec->output_offset, sec->size))
11107 return FALSE;
11108 }
11109 }
11110
11111 /* Write out any glue sections now that we have created all the
11112 stubs. */
11113 if (globals->bfd_of_glue_owner != NULL)
11114 {
11115 if (! elf32_arm_output_glue_section (info, abfd,
11116 globals->bfd_of_glue_owner,
11117 ARM2THUMB_GLUE_SECTION_NAME))
11118 return FALSE;
11119
11120 if (! elf32_arm_output_glue_section (info, abfd,
11121 globals->bfd_of_glue_owner,
11122 THUMB2ARM_GLUE_SECTION_NAME))
11123 return FALSE;
11124
11125 if (! elf32_arm_output_glue_section (info, abfd,
11126 globals->bfd_of_glue_owner,
11127 VFP11_ERRATUM_VENEER_SECTION_NAME))
11128 return FALSE;
11129
11130 if (! elf32_arm_output_glue_section (info, abfd,
11131 globals->bfd_of_glue_owner,
11132 ARM_BX_GLUE_SECTION_NAME))
11133 return FALSE;
11134 }
11135
11136 return TRUE;
11137 }
11138
11139 /* Return a best guess for the machine number based on the attributes. */
11140
11141 static unsigned int
11142 bfd_arm_get_mach_from_attributes (bfd * abfd)
11143 {
11144 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11145
11146 switch (arch)
11147 {
11148 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11149 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11150 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11151
11152 case TAG_CPU_ARCH_V5TE:
11153 {
11154 char * name;
11155
11156 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11157 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11158
11159 if (name)
11160 {
11161 if (strcmp (name, "IWMMXT2") == 0)
11162 return bfd_mach_arm_iWMMXt2;
11163
11164 if (strcmp (name, "IWMMXT") == 0)
11165 return bfd_mach_arm_iWMMXt;
11166
11167 if (strcmp (name, "XSCALE") == 0)
11168 {
11169 int wmmx;
11170
11171 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11172 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11173 switch (wmmx)
11174 {
11175 case 1: return bfd_mach_arm_iWMMXt;
11176 case 2: return bfd_mach_arm_iWMMXt2;
11177 default: return bfd_mach_arm_XScale;
11178 }
11179 }
11180 }
11181
11182 return bfd_mach_arm_5TE;
11183 }
11184
11185 default:
11186 return bfd_mach_arm_unknown;
11187 }
11188 }
11189
11190 /* Set the right machine number. */
11191
11192 static bfd_boolean
11193 elf32_arm_object_p (bfd *abfd)
11194 {
11195 unsigned int mach;
11196
11197 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11198
11199 if (mach == bfd_mach_arm_unknown)
11200 {
11201 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11202 mach = bfd_mach_arm_ep9312;
11203 else
11204 mach = bfd_arm_get_mach_from_attributes (abfd);
11205 }
11206
11207 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11208 return TRUE;
11209 }
11210
11211 /* Function to keep ARM specific flags in the ELF header. */
11212
11213 static bfd_boolean
11214 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11215 {
11216 if (elf_flags_init (abfd)
11217 && elf_elfheader (abfd)->e_flags != flags)
11218 {
11219 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11220 {
11221 if (flags & EF_ARM_INTERWORK)
11222 (*_bfd_error_handler)
11223 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11224 abfd);
11225 else
11226 _bfd_error_handler
11227 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11228 abfd);
11229 }
11230 }
11231 else
11232 {
11233 elf_elfheader (abfd)->e_flags = flags;
11234 elf_flags_init (abfd) = TRUE;
11235 }
11236
11237 return TRUE;
11238 }
11239
11240 /* Copy backend specific data from one object module to another. */
11241
11242 static bfd_boolean
11243 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11244 {
11245 flagword in_flags;
11246 flagword out_flags;
11247
11248 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11249 return TRUE;
11250
11251 in_flags = elf_elfheader (ibfd)->e_flags;
11252 out_flags = elf_elfheader (obfd)->e_flags;
11253
11254 if (elf_flags_init (obfd)
11255 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11256 && in_flags != out_flags)
11257 {
11258 /* Cannot mix APCS26 and APCS32 code. */
11259 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11260 return FALSE;
11261
11262 /* Cannot mix float APCS and non-float APCS code. */
11263 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11264 return FALSE;
11265
11266 /* If the src and dest have different interworking flags
11267 then turn off the interworking bit. */
11268 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11269 {
11270 if (out_flags & EF_ARM_INTERWORK)
11271 _bfd_error_handler
11272 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11273 obfd, ibfd);
11274
11275 in_flags &= ~EF_ARM_INTERWORK;
11276 }
11277
11278 /* Likewise for PIC, though don't warn for this case. */
11279 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11280 in_flags &= ~EF_ARM_PIC;
11281 }
11282
11283 elf_elfheader (obfd)->e_flags = in_flags;
11284 elf_flags_init (obfd) = TRUE;
11285
11286 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
11287 }
11288
11289 /* Values for Tag_ABI_PCS_R9_use. */
11290 enum
11291 {
11292 AEABI_R9_V6,
11293 AEABI_R9_SB,
11294 AEABI_R9_TLS,
11295 AEABI_R9_unused
11296 };
11297
11298 /* Values for Tag_ABI_PCS_RW_data. */
11299 enum
11300 {
11301 AEABI_PCS_RW_data_absolute,
11302 AEABI_PCS_RW_data_PCrel,
11303 AEABI_PCS_RW_data_SBrel,
11304 AEABI_PCS_RW_data_unused
11305 };
11306
11307 /* Values for Tag_ABI_enum_size. */
11308 enum
11309 {
11310 AEABI_enum_unused,
11311 AEABI_enum_short,
11312 AEABI_enum_wide,
11313 AEABI_enum_forced_wide
11314 };
11315
11316 /* Determine whether an object attribute tag takes an integer, a
11317 string or both. */
11318
11319 static int
11320 elf32_arm_obj_attrs_arg_type (int tag)
11321 {
11322 if (tag == Tag_compatibility)
11323 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11324 else if (tag == Tag_nodefaults)
11325 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11326 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11327 return ATTR_TYPE_FLAG_STR_VAL;
11328 else if (tag < 32)
11329 return ATTR_TYPE_FLAG_INT_VAL;
11330 else
11331 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11332 }
11333
11334 /* The ABI defines that Tag_conformance should be emitted first, and that
11335 Tag_nodefaults should be second (if either is defined). This sets those
11336 two positions, and bumps up the position of all the remaining tags to
11337 compensate. */
11338 static int
11339 elf32_arm_obj_attrs_order (int num)
11340 {
11341 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11342 return Tag_conformance;
11343 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11344 return Tag_nodefaults;
11345 if ((num - 2) < Tag_nodefaults)
11346 return num - 2;
11347 if ((num - 1) < Tag_conformance)
11348 return num - 1;
11349 return num;
11350 }
11351
11352 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11353 static bfd_boolean
11354 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11355 {
11356 if ((tag & 127) < 64)
11357 {
11358 _bfd_error_handler
11359 (_("%B: Unknown mandatory EABI object attribute %d"),
11360 abfd, tag);
11361 bfd_set_error (bfd_error_bad_value);
11362 return FALSE;
11363 }
11364 else
11365 {
11366 _bfd_error_handler
11367 (_("Warning: %B: Unknown EABI object attribute %d"),
11368 abfd, tag);
11369 return TRUE;
11370 }
11371 }
11372
11373 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11374 Returns -1 if no architecture could be read. */
11375
11376 static int
11377 get_secondary_compatible_arch (bfd *abfd)
11378 {
11379 obj_attribute *attr =
11380 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11381
11382 /* Note: the tag and its argument below are uleb128 values, though
11383 currently-defined values fit in one byte for each. */
11384 if (attr->s
11385 && attr->s[0] == Tag_CPU_arch
11386 && (attr->s[1] & 128) != 128
11387 && attr->s[2] == 0)
11388 return attr->s[1];
11389
11390 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11391 return -1;
11392 }
11393
11394 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11395 The tag is removed if ARCH is -1. */
11396
11397 static void
11398 set_secondary_compatible_arch (bfd *abfd, int arch)
11399 {
11400 obj_attribute *attr =
11401 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11402
11403 if (arch == -1)
11404 {
11405 attr->s = NULL;
11406 return;
11407 }
11408
11409 /* Note: the tag and its argument below are uleb128 values, though
11410 currently-defined values fit in one byte for each. */
11411 if (!attr->s)
11412 attr->s = (char *) bfd_alloc (abfd, 3);
11413 attr->s[0] = Tag_CPU_arch;
11414 attr->s[1] = arch;
11415 attr->s[2] = '\0';
11416 }
11417
11418 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11419 into account. */
11420
11421 static int
11422 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11423 int newtag, int secondary_compat)
11424 {
11425 #define T(X) TAG_CPU_ARCH_##X
11426 int tagl, tagh, result;
11427 const int v6t2[] =
11428 {
11429 T(V6T2), /* PRE_V4. */
11430 T(V6T2), /* V4. */
11431 T(V6T2), /* V4T. */
11432 T(V6T2), /* V5T. */
11433 T(V6T2), /* V5TE. */
11434 T(V6T2), /* V5TEJ. */
11435 T(V6T2), /* V6. */
11436 T(V7), /* V6KZ. */
11437 T(V6T2) /* V6T2. */
11438 };
11439 const int v6k[] =
11440 {
11441 T(V6K), /* PRE_V4. */
11442 T(V6K), /* V4. */
11443 T(V6K), /* V4T. */
11444 T(V6K), /* V5T. */
11445 T(V6K), /* V5TE. */
11446 T(V6K), /* V5TEJ. */
11447 T(V6K), /* V6. */
11448 T(V6KZ), /* V6KZ. */
11449 T(V7), /* V6T2. */
11450 T(V6K) /* V6K. */
11451 };
11452 const int v7[] =
11453 {
11454 T(V7), /* PRE_V4. */
11455 T(V7), /* V4. */
11456 T(V7), /* V4T. */
11457 T(V7), /* V5T. */
11458 T(V7), /* V5TE. */
11459 T(V7), /* V5TEJ. */
11460 T(V7), /* V6. */
11461 T(V7), /* V6KZ. */
11462 T(V7), /* V6T2. */
11463 T(V7), /* V6K. */
11464 T(V7) /* V7. */
11465 };
11466 const int v6_m[] =
11467 {
11468 -1, /* PRE_V4. */
11469 -1, /* V4. */
11470 T(V6K), /* V4T. */
11471 T(V6K), /* V5T. */
11472 T(V6K), /* V5TE. */
11473 T(V6K), /* V5TEJ. */
11474 T(V6K), /* V6. */
11475 T(V6KZ), /* V6KZ. */
11476 T(V7), /* V6T2. */
11477 T(V6K), /* V6K. */
11478 T(V7), /* V7. */
11479 T(V6_M) /* V6_M. */
11480 };
11481 const int v6s_m[] =
11482 {
11483 -1, /* PRE_V4. */
11484 -1, /* V4. */
11485 T(V6K), /* V4T. */
11486 T(V6K), /* V5T. */
11487 T(V6K), /* V5TE. */
11488 T(V6K), /* V5TEJ. */
11489 T(V6K), /* V6. */
11490 T(V6KZ), /* V6KZ. */
11491 T(V7), /* V6T2. */
11492 T(V6K), /* V6K. */
11493 T(V7), /* V7. */
11494 T(V6S_M), /* V6_M. */
11495 T(V6S_M) /* V6S_M. */
11496 };
11497 const int v7e_m[] =
11498 {
11499 -1, /* PRE_V4. */
11500 -1, /* V4. */
11501 T(V7E_M), /* V4T. */
11502 T(V7E_M), /* V5T. */
11503 T(V7E_M), /* V5TE. */
11504 T(V7E_M), /* V5TEJ. */
11505 T(V7E_M), /* V6. */
11506 T(V7E_M), /* V6KZ. */
11507 T(V7E_M), /* V6T2. */
11508 T(V7E_M), /* V6K. */
11509 T(V7E_M), /* V7. */
11510 T(V7E_M), /* V6_M. */
11511 T(V7E_M), /* V6S_M. */
11512 T(V7E_M) /* V7E_M. */
11513 };
11514 const int v8[] =
11515 {
11516 T(V8), /* PRE_V4. */
11517 T(V8), /* V4. */
11518 T(V8), /* V4T. */
11519 T(V8), /* V5T. */
11520 T(V8), /* V5TE. */
11521 T(V8), /* V5TEJ. */
11522 T(V8), /* V6. */
11523 T(V8), /* V6KZ. */
11524 T(V8), /* V6T2. */
11525 T(V8), /* V6K. */
11526 T(V8), /* V7. */
11527 T(V8), /* V6_M. */
11528 T(V8), /* V6S_M. */
11529 T(V8), /* V7E_M. */
11530 T(V8) /* V8. */
11531 };
11532 const int v4t_plus_v6_m[] =
11533 {
11534 -1, /* PRE_V4. */
11535 -1, /* V4. */
11536 T(V4T), /* V4T. */
11537 T(V5T), /* V5T. */
11538 T(V5TE), /* V5TE. */
11539 T(V5TEJ), /* V5TEJ. */
11540 T(V6), /* V6. */
11541 T(V6KZ), /* V6KZ. */
11542 T(V6T2), /* V6T2. */
11543 T(V6K), /* V6K. */
11544 T(V7), /* V7. */
11545 T(V6_M), /* V6_M. */
11546 T(V6S_M), /* V6S_M. */
11547 T(V7E_M), /* V7E_M. */
11548 T(V8), /* V8. */
11549 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11550 };
11551 const int *comb[] =
11552 {
11553 v6t2,
11554 v6k,
11555 v7,
11556 v6_m,
11557 v6s_m,
11558 v7e_m,
11559 v8,
11560 /* Pseudo-architecture. */
11561 v4t_plus_v6_m
11562 };
11563
11564 /* Check we've not got a higher architecture than we know about. */
11565
11566 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11567 {
11568 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11569 return -1;
11570 }
11571
11572 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11573
11574 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11575 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11576 oldtag = T(V4T_PLUS_V6_M);
11577
11578 /* And override the new tag if we have a Tag_also_compatible_with on the
11579 input. */
11580
11581 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11582 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11583 newtag = T(V4T_PLUS_V6_M);
11584
11585 tagl = (oldtag < newtag) ? oldtag : newtag;
11586 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11587
11588 /* Architectures before V6KZ add features monotonically. */
11589 if (tagh <= TAG_CPU_ARCH_V6KZ)
11590 return result;
11591
11592 result = comb[tagh - T(V6T2)][tagl];
11593
11594 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11595 as the canonical version. */
11596 if (result == T(V4T_PLUS_V6_M))
11597 {
11598 result = T(V4T);
11599 *secondary_compat_out = T(V6_M);
11600 }
11601 else
11602 *secondary_compat_out = -1;
11603
11604 if (result == -1)
11605 {
11606 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11607 ibfd, oldtag, newtag);
11608 return -1;
11609 }
11610
11611 return result;
11612 #undef T
11613 }
11614
11615 /* Query attributes object to see if integer divide instructions may be
11616 present in an object. */
11617 static bfd_boolean
11618 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11619 {
11620 int arch = attr[Tag_CPU_arch].i;
11621 int profile = attr[Tag_CPU_arch_profile].i;
11622
11623 switch (attr[Tag_DIV_use].i)
11624 {
11625 case 0:
11626 /* Integer divide allowed if instruction contained in archetecture. */
11627 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11628 return TRUE;
11629 else if (arch >= TAG_CPU_ARCH_V7E_M)
11630 return TRUE;
11631 else
11632 return FALSE;
11633
11634 case 1:
11635 /* Integer divide explicitly prohibited. */
11636 return FALSE;
11637
11638 default:
11639 /* Unrecognised case - treat as allowing divide everywhere. */
11640 case 2:
11641 /* Integer divide allowed in ARM state. */
11642 return TRUE;
11643 }
11644 }
11645
11646 /* Query attributes object to see if integer divide instructions are
11647 forbidden to be in the object. This is not the inverse of
11648 elf32_arm_attributes_accept_div. */
11649 static bfd_boolean
11650 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11651 {
11652 return attr[Tag_DIV_use].i == 1;
11653 }
11654
11655 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11656 are conflicting attributes. */
11657
11658 static bfd_boolean
11659 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11660 {
11661 obj_attribute *in_attr;
11662 obj_attribute *out_attr;
11663 /* Some tags have 0 = don't care, 1 = strong requirement,
11664 2 = weak requirement. */
11665 static const int order_021[3] = {0, 2, 1};
11666 int i;
11667 bfd_boolean result = TRUE;
11668
11669 /* Skip the linker stubs file. This preserves previous behavior
11670 of accepting unknown attributes in the first input file - but
11671 is that a bug? */
11672 if (ibfd->flags & BFD_LINKER_CREATED)
11673 return TRUE;
11674
11675 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11676 {
11677 /* This is the first object. Copy the attributes. */
11678 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11679
11680 out_attr = elf_known_obj_attributes_proc (obfd);
11681
11682 /* Use the Tag_null value to indicate the attributes have been
11683 initialized. */
11684 out_attr[0].i = 1;
11685
11686 /* We do not output objects with Tag_MPextension_use_legacy - we move
11687 the attribute's value to Tag_MPextension_use. */
11688 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11689 {
11690 if (out_attr[Tag_MPextension_use].i != 0
11691 && out_attr[Tag_MPextension_use_legacy].i
11692 != out_attr[Tag_MPextension_use].i)
11693 {
11694 _bfd_error_handler
11695 (_("Error: %B has both the current and legacy "
11696 "Tag_MPextension_use attributes"), ibfd);
11697 result = FALSE;
11698 }
11699
11700 out_attr[Tag_MPextension_use] =
11701 out_attr[Tag_MPextension_use_legacy];
11702 out_attr[Tag_MPextension_use_legacy].type = 0;
11703 out_attr[Tag_MPextension_use_legacy].i = 0;
11704 }
11705
11706 return result;
11707 }
11708
11709 in_attr = elf_known_obj_attributes_proc (ibfd);
11710 out_attr = elf_known_obj_attributes_proc (obfd);
11711 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11712 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11713 {
11714 /* Ignore mismatches if the object doesn't use floating point. */
11715 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11716 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11717 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11718 {
11719 _bfd_error_handler
11720 (_("error: %B uses VFP register arguments, %B does not"),
11721 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11722 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11723 result = FALSE;
11724 }
11725 }
11726
11727 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11728 {
11729 /* Merge this attribute with existing attributes. */
11730 switch (i)
11731 {
11732 case Tag_CPU_raw_name:
11733 case Tag_CPU_name:
11734 /* These are merged after Tag_CPU_arch. */
11735 break;
11736
11737 case Tag_ABI_optimization_goals:
11738 case Tag_ABI_FP_optimization_goals:
11739 /* Use the first value seen. */
11740 break;
11741
11742 case Tag_CPU_arch:
11743 {
11744 int secondary_compat = -1, secondary_compat_out = -1;
11745 unsigned int saved_out_attr = out_attr[i].i;
11746 static const char *name_table[] = {
11747 /* These aren't real CPU names, but we can't guess
11748 that from the architecture version alone. */
11749 "Pre v4",
11750 "ARM v4",
11751 "ARM v4T",
11752 "ARM v5T",
11753 "ARM v5TE",
11754 "ARM v5TEJ",
11755 "ARM v6",
11756 "ARM v6KZ",
11757 "ARM v6T2",
11758 "ARM v6K",
11759 "ARM v7",
11760 "ARM v6-M",
11761 "ARM v6S-M",
11762 "ARM v8"
11763 };
11764
11765 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11766 secondary_compat = get_secondary_compatible_arch (ibfd);
11767 secondary_compat_out = get_secondary_compatible_arch (obfd);
11768 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11769 &secondary_compat_out,
11770 in_attr[i].i,
11771 secondary_compat);
11772 set_secondary_compatible_arch (obfd, secondary_compat_out);
11773
11774 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11775 if (out_attr[i].i == saved_out_attr)
11776 ; /* Leave the names alone. */
11777 else if (out_attr[i].i == in_attr[i].i)
11778 {
11779 /* The output architecture has been changed to match the
11780 input architecture. Use the input names. */
11781 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11782 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11783 : NULL;
11784 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11785 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11786 : NULL;
11787 }
11788 else
11789 {
11790 out_attr[Tag_CPU_name].s = NULL;
11791 out_attr[Tag_CPU_raw_name].s = NULL;
11792 }
11793
11794 /* If we still don't have a value for Tag_CPU_name,
11795 make one up now. Tag_CPU_raw_name remains blank. */
11796 if (out_attr[Tag_CPU_name].s == NULL
11797 && out_attr[i].i < ARRAY_SIZE (name_table))
11798 out_attr[Tag_CPU_name].s =
11799 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11800 }
11801 break;
11802
11803 case Tag_ARM_ISA_use:
11804 case Tag_THUMB_ISA_use:
11805 case Tag_WMMX_arch:
11806 case Tag_Advanced_SIMD_arch:
11807 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11808 case Tag_ABI_FP_rounding:
11809 case Tag_ABI_FP_exceptions:
11810 case Tag_ABI_FP_user_exceptions:
11811 case Tag_ABI_FP_number_model:
11812 case Tag_FP_HP_extension:
11813 case Tag_CPU_unaligned_access:
11814 case Tag_T2EE_use:
11815 case Tag_MPextension_use:
11816 /* Use the largest value specified. */
11817 if (in_attr[i].i > out_attr[i].i)
11818 out_attr[i].i = in_attr[i].i;
11819 break;
11820
11821 case Tag_ABI_align_preserved:
11822 case Tag_ABI_PCS_RO_data:
11823 /* Use the smallest value specified. */
11824 if (in_attr[i].i < out_attr[i].i)
11825 out_attr[i].i = in_attr[i].i;
11826 break;
11827
11828 case Tag_ABI_align_needed:
11829 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11830 && (in_attr[Tag_ABI_align_preserved].i == 0
11831 || out_attr[Tag_ABI_align_preserved].i == 0))
11832 {
11833 /* This error message should be enabled once all non-conformant
11834 binaries in the toolchain have had the attributes set
11835 properly.
11836 _bfd_error_handler
11837 (_("error: %B: 8-byte data alignment conflicts with %B"),
11838 obfd, ibfd);
11839 result = FALSE; */
11840 }
11841 /* Fall through. */
11842 case Tag_ABI_FP_denormal:
11843 case Tag_ABI_PCS_GOT_use:
11844 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11845 value if greater than 2 (for future-proofing). */
11846 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11847 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11848 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11849 out_attr[i].i = in_attr[i].i;
11850 break;
11851
11852 case Tag_Virtualization_use:
11853 /* The virtualization tag effectively stores two bits of
11854 information: the intended use of TrustZone (in bit 0), and the
11855 intended use of Virtualization (in bit 1). */
11856 if (out_attr[i].i == 0)
11857 out_attr[i].i = in_attr[i].i;
11858 else if (in_attr[i].i != 0
11859 && in_attr[i].i != out_attr[i].i)
11860 {
11861 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11862 out_attr[i].i = 3;
11863 else
11864 {
11865 _bfd_error_handler
11866 (_("error: %B: unable to merge virtualization attributes "
11867 "with %B"),
11868 obfd, ibfd);
11869 result = FALSE;
11870 }
11871 }
11872 break;
11873
11874 case Tag_CPU_arch_profile:
11875 if (out_attr[i].i != in_attr[i].i)
11876 {
11877 /* 0 will merge with anything.
11878 'A' and 'S' merge to 'A'.
11879 'R' and 'S' merge to 'R'.
11880 'M' and 'A|R|S' is an error. */
11881 if (out_attr[i].i == 0
11882 || (out_attr[i].i == 'S'
11883 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11884 out_attr[i].i = in_attr[i].i;
11885 else if (in_attr[i].i == 0
11886 || (in_attr[i].i == 'S'
11887 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11888 ; /* Do nothing. */
11889 else
11890 {
11891 _bfd_error_handler
11892 (_("error: %B: Conflicting architecture profiles %c/%c"),
11893 ibfd,
11894 in_attr[i].i ? in_attr[i].i : '0',
11895 out_attr[i].i ? out_attr[i].i : '0');
11896 result = FALSE;
11897 }
11898 }
11899 break;
11900 case Tag_FP_arch:
11901 {
11902 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11903 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11904 when it's 0. It might mean absence of FP hardware if
11905 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11906
11907 #define VFP_VERSION_COUNT 8
11908 static const struct
11909 {
11910 int ver;
11911 int regs;
11912 } vfp_versions[VFP_VERSION_COUNT] =
11913 {
11914 {0, 0},
11915 {1, 16},
11916 {2, 16},
11917 {3, 32},
11918 {3, 16},
11919 {4, 32},
11920 {4, 16},
11921 {8, 32}
11922 };
11923 int ver;
11924 int regs;
11925 int newval;
11926
11927 /* If the output has no requirement about FP hardware,
11928 follow the requirement of the input. */
11929 if (out_attr[i].i == 0)
11930 {
11931 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11932 out_attr[i].i = in_attr[i].i;
11933 out_attr[Tag_ABI_HardFP_use].i
11934 = in_attr[Tag_ABI_HardFP_use].i;
11935 break;
11936 }
11937 /* If the input has no requirement about FP hardware, do
11938 nothing. */
11939 else if (in_attr[i].i == 0)
11940 {
11941 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11942 break;
11943 }
11944
11945 /* Both the input and the output have nonzero Tag_FP_arch.
11946 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11947
11948 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11949 do nothing. */
11950 if (in_attr[Tag_ABI_HardFP_use].i == 0
11951 && out_attr[Tag_ABI_HardFP_use].i == 0)
11952 ;
11953 /* If the input and the output have different Tag_ABI_HardFP_use,
11954 the combination of them is 3 (SP & DP). */
11955 else if (in_attr[Tag_ABI_HardFP_use].i
11956 != out_attr[Tag_ABI_HardFP_use].i)
11957 out_attr[Tag_ABI_HardFP_use].i = 3;
11958
11959 /* Now we can handle Tag_FP_arch. */
11960
11961 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11962 pick the biggest. */
11963 if (in_attr[i].i >= VFP_VERSION_COUNT
11964 && in_attr[i].i > out_attr[i].i)
11965 {
11966 out_attr[i] = in_attr[i];
11967 break;
11968 }
11969 /* The output uses the superset of input features
11970 (ISA version) and registers. */
11971 ver = vfp_versions[in_attr[i].i].ver;
11972 if (ver < vfp_versions[out_attr[i].i].ver)
11973 ver = vfp_versions[out_attr[i].i].ver;
11974 regs = vfp_versions[in_attr[i].i].regs;
11975 if (regs < vfp_versions[out_attr[i].i].regs)
11976 regs = vfp_versions[out_attr[i].i].regs;
11977 /* This assumes all possible supersets are also a valid
11978 options. */
11979 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
11980 {
11981 if (regs == vfp_versions[newval].regs
11982 && ver == vfp_versions[newval].ver)
11983 break;
11984 }
11985 out_attr[i].i = newval;
11986 }
11987 break;
11988 case Tag_PCS_config:
11989 if (out_attr[i].i == 0)
11990 out_attr[i].i = in_attr[i].i;
11991 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11992 {
11993 /* It's sometimes ok to mix different configs, so this is only
11994 a warning. */
11995 _bfd_error_handler
11996 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11997 }
11998 break;
11999 case Tag_ABI_PCS_R9_use:
12000 if (in_attr[i].i != out_attr[i].i
12001 && out_attr[i].i != AEABI_R9_unused
12002 && in_attr[i].i != AEABI_R9_unused)
12003 {
12004 _bfd_error_handler
12005 (_("error: %B: Conflicting use of R9"), ibfd);
12006 result = FALSE;
12007 }
12008 if (out_attr[i].i == AEABI_R9_unused)
12009 out_attr[i].i = in_attr[i].i;
12010 break;
12011 case Tag_ABI_PCS_RW_data:
12012 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12013 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12014 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12015 {
12016 _bfd_error_handler
12017 (_("error: %B: SB relative addressing conflicts with use of R9"),
12018 ibfd);
12019 result = FALSE;
12020 }
12021 /* Use the smallest value specified. */
12022 if (in_attr[i].i < out_attr[i].i)
12023 out_attr[i].i = in_attr[i].i;
12024 break;
12025 case Tag_ABI_PCS_wchar_t:
12026 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12027 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12028 {
12029 _bfd_error_handler
12030 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12031 ibfd, in_attr[i].i, out_attr[i].i);
12032 }
12033 else if (in_attr[i].i && !out_attr[i].i)
12034 out_attr[i].i = in_attr[i].i;
12035 break;
12036 case Tag_ABI_enum_size:
12037 if (in_attr[i].i != AEABI_enum_unused)
12038 {
12039 if (out_attr[i].i == AEABI_enum_unused
12040 || out_attr[i].i == AEABI_enum_forced_wide)
12041 {
12042 /* The existing object is compatible with anything.
12043 Use whatever requirements the new object has. */
12044 out_attr[i].i = in_attr[i].i;
12045 }
12046 else if (in_attr[i].i != AEABI_enum_forced_wide
12047 && out_attr[i].i != in_attr[i].i
12048 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12049 {
12050 static const char *aeabi_enum_names[] =
12051 { "", "variable-size", "32-bit", "" };
12052 const char *in_name =
12053 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12054 ? aeabi_enum_names[in_attr[i].i]
12055 : "<unknown>";
12056 const char *out_name =
12057 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12058 ? aeabi_enum_names[out_attr[i].i]
12059 : "<unknown>";
12060 _bfd_error_handler
12061 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12062 ibfd, in_name, out_name);
12063 }
12064 }
12065 break;
12066 case Tag_ABI_VFP_args:
12067 /* Aready done. */
12068 break;
12069 case Tag_ABI_WMMX_args:
12070 if (in_attr[i].i != out_attr[i].i)
12071 {
12072 _bfd_error_handler
12073 (_("error: %B uses iWMMXt register arguments, %B does not"),
12074 ibfd, obfd);
12075 result = FALSE;
12076 }
12077 break;
12078 case Tag_compatibility:
12079 /* Merged in target-independent code. */
12080 break;
12081 case Tag_ABI_HardFP_use:
12082 /* This is handled along with Tag_FP_arch. */
12083 break;
12084 case Tag_ABI_FP_16bit_format:
12085 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12086 {
12087 if (in_attr[i].i != out_attr[i].i)
12088 {
12089 _bfd_error_handler
12090 (_("error: fp16 format mismatch between %B and %B"),
12091 ibfd, obfd);
12092 result = FALSE;
12093 }
12094 }
12095 if (in_attr[i].i != 0)
12096 out_attr[i].i = in_attr[i].i;
12097 break;
12098
12099 case Tag_DIV_use:
12100 /* A value of zero on input means that the divide instruction may
12101 be used if available in the base architecture as specified via
12102 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12103 the user did not want divide instructions. A value of 2
12104 explicitly means that divide instructions were allowed in ARM
12105 and Thumb state. */
12106 if (in_attr[i].i == out_attr[i].i)
12107 /* Do nothing. */ ;
12108 else if (elf32_arm_attributes_forbid_div (in_attr)
12109 && !elf32_arm_attributes_accept_div (out_attr))
12110 out_attr[i].i = 1;
12111 else if (elf32_arm_attributes_forbid_div (out_attr)
12112 && elf32_arm_attributes_accept_div (in_attr))
12113 out_attr[i].i = in_attr[i].i;
12114 else if (in_attr[i].i == 2)
12115 out_attr[i].i = in_attr[i].i;
12116 break;
12117
12118 case Tag_MPextension_use_legacy:
12119 /* We don't output objects with Tag_MPextension_use_legacy - we
12120 move the value to Tag_MPextension_use. */
12121 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12122 {
12123 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12124 {
12125 _bfd_error_handler
12126 (_("%B has has both the current and legacy "
12127 "Tag_MPextension_use attributes"),
12128 ibfd);
12129 result = FALSE;
12130 }
12131 }
12132
12133 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12134 out_attr[Tag_MPextension_use] = in_attr[i];
12135
12136 break;
12137
12138 case Tag_nodefaults:
12139 /* This tag is set if it exists, but the value is unused (and is
12140 typically zero). We don't actually need to do anything here -
12141 the merge happens automatically when the type flags are merged
12142 below. */
12143 break;
12144 case Tag_also_compatible_with:
12145 /* Already done in Tag_CPU_arch. */
12146 break;
12147 case Tag_conformance:
12148 /* Keep the attribute if it matches. Throw it away otherwise.
12149 No attribute means no claim to conform. */
12150 if (!in_attr[i].s || !out_attr[i].s
12151 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12152 out_attr[i].s = NULL;
12153 break;
12154
12155 default:
12156 result
12157 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12158 }
12159
12160 /* If out_attr was copied from in_attr then it won't have a type yet. */
12161 if (in_attr[i].type && !out_attr[i].type)
12162 out_attr[i].type = in_attr[i].type;
12163 }
12164
12165 /* Merge Tag_compatibility attributes and any common GNU ones. */
12166 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12167 return FALSE;
12168
12169 /* Check for any attributes not known on ARM. */
12170 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
12171
12172 return result;
12173 }
12174
12175
12176 /* Return TRUE if the two EABI versions are incompatible. */
12177
12178 static bfd_boolean
12179 elf32_arm_versions_compatible (unsigned iver, unsigned over)
12180 {
12181 /* v4 and v5 are the same spec before and after it was released,
12182 so allow mixing them. */
12183 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12184 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12185 return TRUE;
12186
12187 return (iver == over);
12188 }
12189
12190 /* Merge backend specific data from an object file to the output
12191 object file when linking. */
12192
12193 static bfd_boolean
12194 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12195
12196 /* Display the flags field. */
12197
12198 static bfd_boolean
12199 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12200 {
12201 FILE * file = (FILE *) ptr;
12202 unsigned long flags;
12203
12204 BFD_ASSERT (abfd != NULL && ptr != NULL);
12205
12206 /* Print normal ELF private data. */
12207 _bfd_elf_print_private_bfd_data (abfd, ptr);
12208
12209 flags = elf_elfheader (abfd)->e_flags;
12210 /* Ignore init flag - it may not be set, despite the flags field
12211 containing valid data. */
12212
12213 /* xgettext:c-format */
12214 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12215
12216 switch (EF_ARM_EABI_VERSION (flags))
12217 {
12218 case EF_ARM_EABI_UNKNOWN:
12219 /* The following flag bits are GNU extensions and not part of the
12220 official ARM ELF extended ABI. Hence they are only decoded if
12221 the EABI version is not set. */
12222 if (flags & EF_ARM_INTERWORK)
12223 fprintf (file, _(" [interworking enabled]"));
12224
12225 if (flags & EF_ARM_APCS_26)
12226 fprintf (file, " [APCS-26]");
12227 else
12228 fprintf (file, " [APCS-32]");
12229
12230 if (flags & EF_ARM_VFP_FLOAT)
12231 fprintf (file, _(" [VFP float format]"));
12232 else if (flags & EF_ARM_MAVERICK_FLOAT)
12233 fprintf (file, _(" [Maverick float format]"));
12234 else
12235 fprintf (file, _(" [FPA float format]"));
12236
12237 if (flags & EF_ARM_APCS_FLOAT)
12238 fprintf (file, _(" [floats passed in float registers]"));
12239
12240 if (flags & EF_ARM_PIC)
12241 fprintf (file, _(" [position independent]"));
12242
12243 if (flags & EF_ARM_NEW_ABI)
12244 fprintf (file, _(" [new ABI]"));
12245
12246 if (flags & EF_ARM_OLD_ABI)
12247 fprintf (file, _(" [old ABI]"));
12248
12249 if (flags & EF_ARM_SOFT_FLOAT)
12250 fprintf (file, _(" [software FP]"));
12251
12252 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12253 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12254 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12255 | EF_ARM_MAVERICK_FLOAT);
12256 break;
12257
12258 case EF_ARM_EABI_VER1:
12259 fprintf (file, _(" [Version1 EABI]"));
12260
12261 if (flags & EF_ARM_SYMSARESORTED)
12262 fprintf (file, _(" [sorted symbol table]"));
12263 else
12264 fprintf (file, _(" [unsorted symbol table]"));
12265
12266 flags &= ~ EF_ARM_SYMSARESORTED;
12267 break;
12268
12269 case EF_ARM_EABI_VER2:
12270 fprintf (file, _(" [Version2 EABI]"));
12271
12272 if (flags & EF_ARM_SYMSARESORTED)
12273 fprintf (file, _(" [sorted symbol table]"));
12274 else
12275 fprintf (file, _(" [unsorted symbol table]"));
12276
12277 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12278 fprintf (file, _(" [dynamic symbols use segment index]"));
12279
12280 if (flags & EF_ARM_MAPSYMSFIRST)
12281 fprintf (file, _(" [mapping symbols precede others]"));
12282
12283 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12284 | EF_ARM_MAPSYMSFIRST);
12285 break;
12286
12287 case EF_ARM_EABI_VER3:
12288 fprintf (file, _(" [Version3 EABI]"));
12289 break;
12290
12291 case EF_ARM_EABI_VER4:
12292 fprintf (file, _(" [Version4 EABI]"));
12293 goto eabi;
12294
12295 case EF_ARM_EABI_VER5:
12296 fprintf (file, _(" [Version5 EABI]"));
12297
12298 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12299 fprintf (file, _(" [soft-float ABI]"));
12300
12301 if (flags & EF_ARM_ABI_FLOAT_HARD)
12302 fprintf (file, _(" [hard-float ABI]"));
12303
12304 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12305
12306 eabi:
12307 if (flags & EF_ARM_BE8)
12308 fprintf (file, _(" [BE8]"));
12309
12310 if (flags & EF_ARM_LE8)
12311 fprintf (file, _(" [LE8]"));
12312
12313 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12314 break;
12315
12316 default:
12317 fprintf (file, _(" <EABI version unrecognised>"));
12318 break;
12319 }
12320
12321 flags &= ~ EF_ARM_EABIMASK;
12322
12323 if (flags & EF_ARM_RELEXEC)
12324 fprintf (file, _(" [relocatable executable]"));
12325
12326 if (flags & EF_ARM_HASENTRY)
12327 fprintf (file, _(" [has entry point]"));
12328
12329 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12330
12331 if (flags)
12332 fprintf (file, _("<Unrecognised flag bits set>"));
12333
12334 fputc ('\n', file);
12335
12336 return TRUE;
12337 }
12338
12339 static int
12340 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12341 {
12342 switch (ELF_ST_TYPE (elf_sym->st_info))
12343 {
12344 case STT_ARM_TFUNC:
12345 return ELF_ST_TYPE (elf_sym->st_info);
12346
12347 case STT_ARM_16BIT:
12348 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12349 This allows us to distinguish between data used by Thumb instructions
12350 and non-data (which is probably code) inside Thumb regions of an
12351 executable. */
12352 if (type != STT_OBJECT && type != STT_TLS)
12353 return ELF_ST_TYPE (elf_sym->st_info);
12354 break;
12355
12356 default:
12357 break;
12358 }
12359
12360 return type;
12361 }
12362
12363 static asection *
12364 elf32_arm_gc_mark_hook (asection *sec,
12365 struct bfd_link_info *info,
12366 Elf_Internal_Rela *rel,
12367 struct elf_link_hash_entry *h,
12368 Elf_Internal_Sym *sym)
12369 {
12370 if (h != NULL)
12371 switch (ELF32_R_TYPE (rel->r_info))
12372 {
12373 case R_ARM_GNU_VTINHERIT:
12374 case R_ARM_GNU_VTENTRY:
12375 return NULL;
12376 }
12377
12378 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12379 }
12380
12381 /* Update the got entry reference counts for the section being removed. */
12382
12383 static bfd_boolean
12384 elf32_arm_gc_sweep_hook (bfd * abfd,
12385 struct bfd_link_info * info,
12386 asection * sec,
12387 const Elf_Internal_Rela * relocs)
12388 {
12389 Elf_Internal_Shdr *symtab_hdr;
12390 struct elf_link_hash_entry **sym_hashes;
12391 bfd_signed_vma *local_got_refcounts;
12392 const Elf_Internal_Rela *rel, *relend;
12393 struct elf32_arm_link_hash_table * globals;
12394
12395 if (info->relocatable)
12396 return TRUE;
12397
12398 globals = elf32_arm_hash_table (info);
12399 if (globals == NULL)
12400 return FALSE;
12401
12402 elf_section_data (sec)->local_dynrel = NULL;
12403
12404 symtab_hdr = & elf_symtab_hdr (abfd);
12405 sym_hashes = elf_sym_hashes (abfd);
12406 local_got_refcounts = elf_local_got_refcounts (abfd);
12407
12408 check_use_blx (globals);
12409
12410 relend = relocs + sec->reloc_count;
12411 for (rel = relocs; rel < relend; rel++)
12412 {
12413 unsigned long r_symndx;
12414 struct elf_link_hash_entry *h = NULL;
12415 struct elf32_arm_link_hash_entry *eh;
12416 int r_type;
12417 bfd_boolean call_reloc_p;
12418 bfd_boolean may_become_dynamic_p;
12419 bfd_boolean may_need_local_target_p;
12420 union gotplt_union *root_plt;
12421 struct arm_plt_info *arm_plt;
12422
12423 r_symndx = ELF32_R_SYM (rel->r_info);
12424 if (r_symndx >= symtab_hdr->sh_info)
12425 {
12426 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12427 while (h->root.type == bfd_link_hash_indirect
12428 || h->root.type == bfd_link_hash_warning)
12429 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12430 }
12431 eh = (struct elf32_arm_link_hash_entry *) h;
12432
12433 call_reloc_p = FALSE;
12434 may_become_dynamic_p = FALSE;
12435 may_need_local_target_p = FALSE;
12436
12437 r_type = ELF32_R_TYPE (rel->r_info);
12438 r_type = arm_real_reloc_type (globals, r_type);
12439 switch (r_type)
12440 {
12441 case R_ARM_GOT32:
12442 case R_ARM_GOT_PREL:
12443 case R_ARM_TLS_GD32:
12444 case R_ARM_TLS_IE32:
12445 if (h != NULL)
12446 {
12447 if (h->got.refcount > 0)
12448 h->got.refcount -= 1;
12449 }
12450 else if (local_got_refcounts != NULL)
12451 {
12452 if (local_got_refcounts[r_symndx] > 0)
12453 local_got_refcounts[r_symndx] -= 1;
12454 }
12455 break;
12456
12457 case R_ARM_TLS_LDM32:
12458 globals->tls_ldm_got.refcount -= 1;
12459 break;
12460
12461 case R_ARM_PC24:
12462 case R_ARM_PLT32:
12463 case R_ARM_CALL:
12464 case R_ARM_JUMP24:
12465 case R_ARM_PREL31:
12466 case R_ARM_THM_CALL:
12467 case R_ARM_THM_JUMP24:
12468 case R_ARM_THM_JUMP19:
12469 call_reloc_p = TRUE;
12470 may_need_local_target_p = TRUE;
12471 break;
12472
12473 case R_ARM_ABS12:
12474 if (!globals->vxworks_p)
12475 {
12476 may_need_local_target_p = TRUE;
12477 break;
12478 }
12479 /* Fall through. */
12480 case R_ARM_ABS32:
12481 case R_ARM_ABS32_NOI:
12482 case R_ARM_REL32:
12483 case R_ARM_REL32_NOI:
12484 case R_ARM_MOVW_ABS_NC:
12485 case R_ARM_MOVT_ABS:
12486 case R_ARM_MOVW_PREL_NC:
12487 case R_ARM_MOVT_PREL:
12488 case R_ARM_THM_MOVW_ABS_NC:
12489 case R_ARM_THM_MOVT_ABS:
12490 case R_ARM_THM_MOVW_PREL_NC:
12491 case R_ARM_THM_MOVT_PREL:
12492 /* Should the interworking branches be here also? */
12493 if ((info->shared || globals->root.is_relocatable_executable)
12494 && (sec->flags & SEC_ALLOC) != 0)
12495 {
12496 if (h == NULL
12497 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12498 {
12499 call_reloc_p = TRUE;
12500 may_need_local_target_p = TRUE;
12501 }
12502 else
12503 may_become_dynamic_p = TRUE;
12504 }
12505 else
12506 may_need_local_target_p = TRUE;
12507 break;
12508
12509 default:
12510 break;
12511 }
12512
12513 if (may_need_local_target_p
12514 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12515 {
12516 /* If PLT refcount book-keeping is wrong and too low, we'll
12517 see a zero value (going to -1) for the root PLT reference
12518 count. */
12519 if (root_plt->refcount >= 0)
12520 {
12521 BFD_ASSERT (root_plt->refcount != 0);
12522 root_plt->refcount -= 1;
12523 }
12524 else
12525 /* A value of -1 means the symbol has become local, forced
12526 or seeing a hidden definition. Any other negative value
12527 is an error. */
12528 BFD_ASSERT (root_plt->refcount == -1);
12529
12530 if (!call_reloc_p)
12531 arm_plt->noncall_refcount--;
12532
12533 if (r_type == R_ARM_THM_CALL)
12534 arm_plt->maybe_thumb_refcount--;
12535
12536 if (r_type == R_ARM_THM_JUMP24
12537 || r_type == R_ARM_THM_JUMP19)
12538 arm_plt->thumb_refcount--;
12539 }
12540
12541 if (may_become_dynamic_p)
12542 {
12543 struct elf_dyn_relocs **pp;
12544 struct elf_dyn_relocs *p;
12545
12546 if (h != NULL)
12547 pp = &(eh->dyn_relocs);
12548 else
12549 {
12550 Elf_Internal_Sym *isym;
12551
12552 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12553 abfd, r_symndx);
12554 if (isym == NULL)
12555 return FALSE;
12556 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12557 if (pp == NULL)
12558 return FALSE;
12559 }
12560 for (; (p = *pp) != NULL; pp = &p->next)
12561 if (p->sec == sec)
12562 {
12563 /* Everything must go for SEC. */
12564 *pp = p->next;
12565 break;
12566 }
12567 }
12568 }
12569
12570 return TRUE;
12571 }
12572
12573 /* Look through the relocs for a section during the first phase. */
12574
12575 static bfd_boolean
12576 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12577 asection *sec, const Elf_Internal_Rela *relocs)
12578 {
12579 Elf_Internal_Shdr *symtab_hdr;
12580 struct elf_link_hash_entry **sym_hashes;
12581 const Elf_Internal_Rela *rel;
12582 const Elf_Internal_Rela *rel_end;
12583 bfd *dynobj;
12584 asection *sreloc;
12585 struct elf32_arm_link_hash_table *htab;
12586 bfd_boolean call_reloc_p;
12587 bfd_boolean may_become_dynamic_p;
12588 bfd_boolean may_need_local_target_p;
12589 unsigned long nsyms;
12590
12591 if (info->relocatable)
12592 return TRUE;
12593
12594 BFD_ASSERT (is_arm_elf (abfd));
12595
12596 htab = elf32_arm_hash_table (info);
12597 if (htab == NULL)
12598 return FALSE;
12599
12600 sreloc = NULL;
12601
12602 /* Create dynamic sections for relocatable executables so that we can
12603 copy relocations. */
12604 if (htab->root.is_relocatable_executable
12605 && ! htab->root.dynamic_sections_created)
12606 {
12607 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12608 return FALSE;
12609 }
12610
12611 if (htab->root.dynobj == NULL)
12612 htab->root.dynobj = abfd;
12613 if (!create_ifunc_sections (info))
12614 return FALSE;
12615
12616 dynobj = htab->root.dynobj;
12617
12618 symtab_hdr = & elf_symtab_hdr (abfd);
12619 sym_hashes = elf_sym_hashes (abfd);
12620 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12621
12622 rel_end = relocs + sec->reloc_count;
12623 for (rel = relocs; rel < rel_end; rel++)
12624 {
12625 Elf_Internal_Sym *isym;
12626 struct elf_link_hash_entry *h;
12627 struct elf32_arm_link_hash_entry *eh;
12628 unsigned long r_symndx;
12629 int r_type;
12630
12631 r_symndx = ELF32_R_SYM (rel->r_info);
12632 r_type = ELF32_R_TYPE (rel->r_info);
12633 r_type = arm_real_reloc_type (htab, r_type);
12634
12635 if (r_symndx >= nsyms
12636 /* PR 9934: It is possible to have relocations that do not
12637 refer to symbols, thus it is also possible to have an
12638 object file containing relocations but no symbol table. */
12639 && (r_symndx > STN_UNDEF || nsyms > 0))
12640 {
12641 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12642 r_symndx);
12643 return FALSE;
12644 }
12645
12646 h = NULL;
12647 isym = NULL;
12648 if (nsyms > 0)
12649 {
12650 if (r_symndx < symtab_hdr->sh_info)
12651 {
12652 /* A local symbol. */
12653 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12654 abfd, r_symndx);
12655 if (isym == NULL)
12656 return FALSE;
12657 }
12658 else
12659 {
12660 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12661 while (h->root.type == bfd_link_hash_indirect
12662 || h->root.type == bfd_link_hash_warning)
12663 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12664
12665 /* PR15323, ref flags aren't set for references in the
12666 same object. */
12667 h->root.non_ir_ref = 1;
12668 }
12669 }
12670
12671 eh = (struct elf32_arm_link_hash_entry *) h;
12672
12673 call_reloc_p = FALSE;
12674 may_become_dynamic_p = FALSE;
12675 may_need_local_target_p = FALSE;
12676
12677 /* Could be done earlier, if h were already available. */
12678 r_type = elf32_arm_tls_transition (info, r_type, h);
12679 switch (r_type)
12680 {
12681 case R_ARM_GOT32:
12682 case R_ARM_GOT_PREL:
12683 case R_ARM_TLS_GD32:
12684 case R_ARM_TLS_IE32:
12685 case R_ARM_TLS_GOTDESC:
12686 case R_ARM_TLS_DESCSEQ:
12687 case R_ARM_THM_TLS_DESCSEQ:
12688 case R_ARM_TLS_CALL:
12689 case R_ARM_THM_TLS_CALL:
12690 /* This symbol requires a global offset table entry. */
12691 {
12692 int tls_type, old_tls_type;
12693
12694 switch (r_type)
12695 {
12696 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12697
12698 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12699
12700 case R_ARM_TLS_GOTDESC:
12701 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12702 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12703 tls_type = GOT_TLS_GDESC; break;
12704
12705 default: tls_type = GOT_NORMAL; break;
12706 }
12707
12708 if (h != NULL)
12709 {
12710 h->got.refcount++;
12711 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12712 }
12713 else
12714 {
12715 /* This is a global offset table entry for a local symbol. */
12716 if (!elf32_arm_allocate_local_sym_info (abfd))
12717 return FALSE;
12718 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12719 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12720 }
12721
12722 /* If a variable is accessed with both tls methods, two
12723 slots may be created. */
12724 if (GOT_TLS_GD_ANY_P (old_tls_type)
12725 && GOT_TLS_GD_ANY_P (tls_type))
12726 tls_type |= old_tls_type;
12727
12728 /* We will already have issued an error message if there
12729 is a TLS/non-TLS mismatch, based on the symbol
12730 type. So just combine any TLS types needed. */
12731 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12732 && tls_type != GOT_NORMAL)
12733 tls_type |= old_tls_type;
12734
12735 /* If the symbol is accessed in both IE and GDESC
12736 method, we're able to relax. Turn off the GDESC flag,
12737 without messing up with any other kind of tls types
12738 that may be involved. */
12739 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12740 tls_type &= ~GOT_TLS_GDESC;
12741
12742 if (old_tls_type != tls_type)
12743 {
12744 if (h != NULL)
12745 elf32_arm_hash_entry (h)->tls_type = tls_type;
12746 else
12747 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12748 }
12749 }
12750 /* Fall through. */
12751
12752 case R_ARM_TLS_LDM32:
12753 if (r_type == R_ARM_TLS_LDM32)
12754 htab->tls_ldm_got.refcount++;
12755 /* Fall through. */
12756
12757 case R_ARM_GOTOFF32:
12758 case R_ARM_GOTPC:
12759 if (htab->root.sgot == NULL
12760 && !create_got_section (htab->root.dynobj, info))
12761 return FALSE;
12762 break;
12763
12764 case R_ARM_PC24:
12765 case R_ARM_PLT32:
12766 case R_ARM_CALL:
12767 case R_ARM_JUMP24:
12768 case R_ARM_PREL31:
12769 case R_ARM_THM_CALL:
12770 case R_ARM_THM_JUMP24:
12771 case R_ARM_THM_JUMP19:
12772 call_reloc_p = TRUE;
12773 may_need_local_target_p = TRUE;
12774 break;
12775
12776 case R_ARM_ABS12:
12777 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12778 ldr __GOTT_INDEX__ offsets. */
12779 if (!htab->vxworks_p)
12780 {
12781 may_need_local_target_p = TRUE;
12782 break;
12783 }
12784 /* Fall through. */
12785
12786 case R_ARM_MOVW_ABS_NC:
12787 case R_ARM_MOVT_ABS:
12788 case R_ARM_THM_MOVW_ABS_NC:
12789 case R_ARM_THM_MOVT_ABS:
12790 if (info->shared)
12791 {
12792 (*_bfd_error_handler)
12793 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12794 abfd, elf32_arm_howto_table_1[r_type].name,
12795 (h) ? h->root.root.string : "a local symbol");
12796 bfd_set_error (bfd_error_bad_value);
12797 return FALSE;
12798 }
12799
12800 /* Fall through. */
12801 case R_ARM_ABS32:
12802 case R_ARM_ABS32_NOI:
12803 if (h != NULL && info->executable)
12804 {
12805 h->pointer_equality_needed = 1;
12806 }
12807 /* Fall through. */
12808 case R_ARM_REL32:
12809 case R_ARM_REL32_NOI:
12810 case R_ARM_MOVW_PREL_NC:
12811 case R_ARM_MOVT_PREL:
12812 case R_ARM_THM_MOVW_PREL_NC:
12813 case R_ARM_THM_MOVT_PREL:
12814
12815 /* Should the interworking branches be listed here? */
12816 if ((info->shared || htab->root.is_relocatable_executable)
12817 && (sec->flags & SEC_ALLOC) != 0)
12818 {
12819 if (h == NULL
12820 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12821 {
12822 /* In shared libraries and relocatable executables,
12823 we treat local relative references as calls;
12824 see the related SYMBOL_CALLS_LOCAL code in
12825 allocate_dynrelocs. */
12826 call_reloc_p = TRUE;
12827 may_need_local_target_p = TRUE;
12828 }
12829 else
12830 /* We are creating a shared library or relocatable
12831 executable, and this is a reloc against a global symbol,
12832 or a non-PC-relative reloc against a local symbol.
12833 We may need to copy the reloc into the output. */
12834 may_become_dynamic_p = TRUE;
12835 }
12836 else
12837 may_need_local_target_p = TRUE;
12838 break;
12839
12840 /* This relocation describes the C++ object vtable hierarchy.
12841 Reconstruct it for later use during GC. */
12842 case R_ARM_GNU_VTINHERIT:
12843 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12844 return FALSE;
12845 break;
12846
12847 /* This relocation describes which C++ vtable entries are actually
12848 used. Record for later use during GC. */
12849 case R_ARM_GNU_VTENTRY:
12850 BFD_ASSERT (h != NULL);
12851 if (h != NULL
12852 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12853 return FALSE;
12854 break;
12855 }
12856
12857 if (h != NULL)
12858 {
12859 if (call_reloc_p)
12860 /* We may need a .plt entry if the function this reloc
12861 refers to is in a different object, regardless of the
12862 symbol's type. We can't tell for sure yet, because
12863 something later might force the symbol local. */
12864 h->needs_plt = 1;
12865 else if (may_need_local_target_p)
12866 /* If this reloc is in a read-only section, we might
12867 need a copy reloc. We can't check reliably at this
12868 stage whether the section is read-only, as input
12869 sections have not yet been mapped to output sections.
12870 Tentatively set the flag for now, and correct in
12871 adjust_dynamic_symbol. */
12872 h->non_got_ref = 1;
12873 }
12874
12875 if (may_need_local_target_p
12876 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12877 {
12878 union gotplt_union *root_plt;
12879 struct arm_plt_info *arm_plt;
12880 struct arm_local_iplt_info *local_iplt;
12881
12882 if (h != NULL)
12883 {
12884 root_plt = &h->plt;
12885 arm_plt = &eh->plt;
12886 }
12887 else
12888 {
12889 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12890 if (local_iplt == NULL)
12891 return FALSE;
12892 root_plt = &local_iplt->root;
12893 arm_plt = &local_iplt->arm;
12894 }
12895
12896 /* If the symbol is a function that doesn't bind locally,
12897 this relocation will need a PLT entry. */
12898 if (root_plt->refcount != -1)
12899 root_plt->refcount += 1;
12900
12901 if (!call_reloc_p)
12902 arm_plt->noncall_refcount++;
12903
12904 /* It's too early to use htab->use_blx here, so we have to
12905 record possible blx references separately from
12906 relocs that definitely need a thumb stub. */
12907
12908 if (r_type == R_ARM_THM_CALL)
12909 arm_plt->maybe_thumb_refcount += 1;
12910
12911 if (r_type == R_ARM_THM_JUMP24
12912 || r_type == R_ARM_THM_JUMP19)
12913 arm_plt->thumb_refcount += 1;
12914 }
12915
12916 if (may_become_dynamic_p)
12917 {
12918 struct elf_dyn_relocs *p, **head;
12919
12920 /* Create a reloc section in dynobj. */
12921 if (sreloc == NULL)
12922 {
12923 sreloc = _bfd_elf_make_dynamic_reloc_section
12924 (sec, dynobj, 2, abfd, ! htab->use_rel);
12925
12926 if (sreloc == NULL)
12927 return FALSE;
12928
12929 /* BPABI objects never have dynamic relocations mapped. */
12930 if (htab->symbian_p)
12931 {
12932 flagword flags;
12933
12934 flags = bfd_get_section_flags (dynobj, sreloc);
12935 flags &= ~(SEC_LOAD | SEC_ALLOC);
12936 bfd_set_section_flags (dynobj, sreloc, flags);
12937 }
12938 }
12939
12940 /* If this is a global symbol, count the number of
12941 relocations we need for this symbol. */
12942 if (h != NULL)
12943 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12944 else
12945 {
12946 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12947 if (head == NULL)
12948 return FALSE;
12949 }
12950
12951 p = *head;
12952 if (p == NULL || p->sec != sec)
12953 {
12954 bfd_size_type amt = sizeof *p;
12955
12956 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12957 if (p == NULL)
12958 return FALSE;
12959 p->next = *head;
12960 *head = p;
12961 p->sec = sec;
12962 p->count = 0;
12963 p->pc_count = 0;
12964 }
12965
12966 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12967 p->pc_count += 1;
12968 p->count += 1;
12969 }
12970 }
12971
12972 return TRUE;
12973 }
12974
12975 /* Unwinding tables are not referenced directly. This pass marks them as
12976 required if the corresponding code section is marked. */
12977
12978 static bfd_boolean
12979 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12980 elf_gc_mark_hook_fn gc_mark_hook)
12981 {
12982 bfd *sub;
12983 Elf_Internal_Shdr **elf_shdrp;
12984 bfd_boolean again;
12985
12986 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12987
12988 /* Marking EH data may cause additional code sections to be marked,
12989 requiring multiple passes. */
12990 again = TRUE;
12991 while (again)
12992 {
12993 again = FALSE;
12994 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
12995 {
12996 asection *o;
12997
12998 if (! is_arm_elf (sub))
12999 continue;
13000
13001 elf_shdrp = elf_elfsections (sub);
13002 for (o = sub->sections; o != NULL; o = o->next)
13003 {
13004 Elf_Internal_Shdr *hdr;
13005
13006 hdr = &elf_section_data (o)->this_hdr;
13007 if (hdr->sh_type == SHT_ARM_EXIDX
13008 && hdr->sh_link
13009 && hdr->sh_link < elf_numsections (sub)
13010 && !o->gc_mark
13011 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13012 {
13013 again = TRUE;
13014 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13015 return FALSE;
13016 }
13017 }
13018 }
13019 }
13020
13021 return TRUE;
13022 }
13023
13024 /* Treat mapping symbols as special target symbols. */
13025
13026 static bfd_boolean
13027 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13028 {
13029 return bfd_is_arm_special_symbol_name (sym->name,
13030 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13031 }
13032
13033 /* This is a copy of elf_find_function() from elf.c except that
13034 ARM mapping symbols are ignored when looking for function names
13035 and STT_ARM_TFUNC is considered to a function type. */
13036
13037 static bfd_boolean
13038 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13039 asection * section,
13040 asymbol ** symbols,
13041 bfd_vma offset,
13042 const char ** filename_ptr,
13043 const char ** functionname_ptr)
13044 {
13045 const char * filename = NULL;
13046 asymbol * func = NULL;
13047 bfd_vma low_func = 0;
13048 asymbol ** p;
13049
13050 for (p = symbols; *p != NULL; p++)
13051 {
13052 elf_symbol_type *q;
13053
13054 q = (elf_symbol_type *) *p;
13055
13056 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13057 {
13058 default:
13059 break;
13060 case STT_FILE:
13061 filename = bfd_asymbol_name (&q->symbol);
13062 break;
13063 case STT_FUNC:
13064 case STT_ARM_TFUNC:
13065 case STT_NOTYPE:
13066 /* Skip mapping symbols. */
13067 if ((q->symbol.flags & BSF_LOCAL)
13068 && bfd_is_arm_special_symbol_name (q->symbol.name,
13069 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
13070 continue;
13071 /* Fall through. */
13072 if (bfd_get_section (&q->symbol) == section
13073 && q->symbol.value >= low_func
13074 && q->symbol.value <= offset)
13075 {
13076 func = (asymbol *) q;
13077 low_func = q->symbol.value;
13078 }
13079 break;
13080 }
13081 }
13082
13083 if (func == NULL)
13084 return FALSE;
13085
13086 if (filename_ptr)
13087 *filename_ptr = filename;
13088 if (functionname_ptr)
13089 *functionname_ptr = bfd_asymbol_name (func);
13090
13091 return TRUE;
13092 }
13093
13094
13095 /* Find the nearest line to a particular section and offset, for error
13096 reporting. This code is a duplicate of the code in elf.c, except
13097 that it uses arm_elf_find_function. */
13098
13099 static bfd_boolean
13100 elf32_arm_find_nearest_line (bfd * abfd,
13101 asection * section,
13102 asymbol ** symbols,
13103 bfd_vma offset,
13104 const char ** filename_ptr,
13105 const char ** functionname_ptr,
13106 unsigned int * line_ptr)
13107 {
13108 bfd_boolean found = FALSE;
13109
13110 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
13111
13112 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
13113 section, symbols, offset,
13114 filename_ptr, functionname_ptr,
13115 line_ptr, NULL, 0,
13116 & elf_tdata (abfd)->dwarf2_find_line_info))
13117 {
13118 if (!*functionname_ptr)
13119 arm_elf_find_function (abfd, section, symbols, offset,
13120 *filename_ptr ? NULL : filename_ptr,
13121 functionname_ptr);
13122
13123 return TRUE;
13124 }
13125
13126 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13127 & found, filename_ptr,
13128 functionname_ptr, line_ptr,
13129 & elf_tdata (abfd)->line_info))
13130 return FALSE;
13131
13132 if (found && (*functionname_ptr || *line_ptr))
13133 return TRUE;
13134
13135 if (symbols == NULL)
13136 return FALSE;
13137
13138 if (! arm_elf_find_function (abfd, section, symbols, offset,
13139 filename_ptr, functionname_ptr))
13140 return FALSE;
13141
13142 *line_ptr = 0;
13143 return TRUE;
13144 }
13145
13146 static bfd_boolean
13147 elf32_arm_find_inliner_info (bfd * abfd,
13148 const char ** filename_ptr,
13149 const char ** functionname_ptr,
13150 unsigned int * line_ptr)
13151 {
13152 bfd_boolean found;
13153 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13154 functionname_ptr, line_ptr,
13155 & elf_tdata (abfd)->dwarf2_find_line_info);
13156 return found;
13157 }
13158
13159 /* Adjust a symbol defined by a dynamic object and referenced by a
13160 regular object. The current definition is in some section of the
13161 dynamic object, but we're not including those sections. We have to
13162 change the definition to something the rest of the link can
13163 understand. */
13164
13165 static bfd_boolean
13166 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13167 struct elf_link_hash_entry * h)
13168 {
13169 bfd * dynobj;
13170 asection * s;
13171 struct elf32_arm_link_hash_entry * eh;
13172 struct elf32_arm_link_hash_table *globals;
13173
13174 globals = elf32_arm_hash_table (info);
13175 if (globals == NULL)
13176 return FALSE;
13177
13178 dynobj = elf_hash_table (info)->dynobj;
13179
13180 /* Make sure we know what is going on here. */
13181 BFD_ASSERT (dynobj != NULL
13182 && (h->needs_plt
13183 || h->type == STT_GNU_IFUNC
13184 || h->u.weakdef != NULL
13185 || (h->def_dynamic
13186 && h->ref_regular
13187 && !h->def_regular)));
13188
13189 eh = (struct elf32_arm_link_hash_entry *) h;
13190
13191 /* If this is a function, put it in the procedure linkage table. We
13192 will fill in the contents of the procedure linkage table later,
13193 when we know the address of the .got section. */
13194 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13195 {
13196 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13197 symbol binds locally. */
13198 if (h->plt.refcount <= 0
13199 || (h->type != STT_GNU_IFUNC
13200 && (SYMBOL_CALLS_LOCAL (info, h)
13201 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13202 && h->root.type == bfd_link_hash_undefweak))))
13203 {
13204 /* This case can occur if we saw a PLT32 reloc in an input
13205 file, but the symbol was never referred to by a dynamic
13206 object, or if all references were garbage collected. In
13207 such a case, we don't actually need to build a procedure
13208 linkage table, and we can just do a PC24 reloc instead. */
13209 h->plt.offset = (bfd_vma) -1;
13210 eh->plt.thumb_refcount = 0;
13211 eh->plt.maybe_thumb_refcount = 0;
13212 eh->plt.noncall_refcount = 0;
13213 h->needs_plt = 0;
13214 }
13215
13216 return TRUE;
13217 }
13218 else
13219 {
13220 /* It's possible that we incorrectly decided a .plt reloc was
13221 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13222 in check_relocs. We can't decide accurately between function
13223 and non-function syms in check-relocs; Objects loaded later in
13224 the link may change h->type. So fix it now. */
13225 h->plt.offset = (bfd_vma) -1;
13226 eh->plt.thumb_refcount = 0;
13227 eh->plt.maybe_thumb_refcount = 0;
13228 eh->plt.noncall_refcount = 0;
13229 }
13230
13231 /* If this is a weak symbol, and there is a real definition, the
13232 processor independent code will have arranged for us to see the
13233 real definition first, and we can just use the same value. */
13234 if (h->u.weakdef != NULL)
13235 {
13236 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13237 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13238 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13239 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13240 return TRUE;
13241 }
13242
13243 /* If there are no non-GOT references, we do not need a copy
13244 relocation. */
13245 if (!h->non_got_ref)
13246 return TRUE;
13247
13248 /* This is a reference to a symbol defined by a dynamic object which
13249 is not a function. */
13250
13251 /* If we are creating a shared library, we must presume that the
13252 only references to the symbol are via the global offset table.
13253 For such cases we need not do anything here; the relocations will
13254 be handled correctly by relocate_section. Relocatable executables
13255 can reference data in shared objects directly, so we don't need to
13256 do anything here. */
13257 if (info->shared || globals->root.is_relocatable_executable)
13258 return TRUE;
13259
13260 /* We must allocate the symbol in our .dynbss section, which will
13261 become part of the .bss section of the executable. There will be
13262 an entry for this symbol in the .dynsym section. The dynamic
13263 object will contain position independent code, so all references
13264 from the dynamic object to this symbol will go through the global
13265 offset table. The dynamic linker will use the .dynsym entry to
13266 determine the address it must put in the global offset table, so
13267 both the dynamic object and the regular object will refer to the
13268 same memory location for the variable. */
13269 s = bfd_get_linker_section (dynobj, ".dynbss");
13270 BFD_ASSERT (s != NULL);
13271
13272 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13273 copy the initial value out of the dynamic object and into the
13274 runtime process image. We need to remember the offset into the
13275 .rel(a).bss section we are going to use. */
13276 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13277 {
13278 asection *srel;
13279
13280 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13281 elf32_arm_allocate_dynrelocs (info, srel, 1);
13282 h->needs_copy = 1;
13283 }
13284
13285 return _bfd_elf_adjust_dynamic_copy (h, s);
13286 }
13287
13288 /* Allocate space in .plt, .got and associated reloc sections for
13289 dynamic relocs. */
13290
13291 static bfd_boolean
13292 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13293 {
13294 struct bfd_link_info *info;
13295 struct elf32_arm_link_hash_table *htab;
13296 struct elf32_arm_link_hash_entry *eh;
13297 struct elf_dyn_relocs *p;
13298
13299 if (h->root.type == bfd_link_hash_indirect)
13300 return TRUE;
13301
13302 eh = (struct elf32_arm_link_hash_entry *) h;
13303
13304 info = (struct bfd_link_info *) inf;
13305 htab = elf32_arm_hash_table (info);
13306 if (htab == NULL)
13307 return FALSE;
13308
13309 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13310 && h->plt.refcount > 0)
13311 {
13312 /* Make sure this symbol is output as a dynamic symbol.
13313 Undefined weak syms won't yet be marked as dynamic. */
13314 if (h->dynindx == -1
13315 && !h->forced_local)
13316 {
13317 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13318 return FALSE;
13319 }
13320
13321 /* If the call in the PLT entry binds locally, the associated
13322 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13323 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13324 than the .plt section. */
13325 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13326 {
13327 eh->is_iplt = 1;
13328 if (eh->plt.noncall_refcount == 0
13329 && SYMBOL_REFERENCES_LOCAL (info, h))
13330 /* All non-call references can be resolved directly.
13331 This means that they can (and in some cases, must)
13332 resolve directly to the run-time target, rather than
13333 to the PLT. That in turns means that any .got entry
13334 would be equal to the .igot.plt entry, so there's
13335 no point having both. */
13336 h->got.refcount = 0;
13337 }
13338
13339 if (info->shared
13340 || eh->is_iplt
13341 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13342 {
13343 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13344
13345 /* If this symbol is not defined in a regular file, and we are
13346 not generating a shared library, then set the symbol to this
13347 location in the .plt. This is required to make function
13348 pointers compare as equal between the normal executable and
13349 the shared library. */
13350 if (! info->shared
13351 && !h->def_regular)
13352 {
13353 h->root.u.def.section = htab->root.splt;
13354 h->root.u.def.value = h->plt.offset;
13355
13356 /* Make sure the function is not marked as Thumb, in case
13357 it is the target of an ABS32 relocation, which will
13358 point to the PLT entry. */
13359 h->target_internal = ST_BRANCH_TO_ARM;
13360 }
13361
13362 htab->next_tls_desc_index++;
13363
13364 /* VxWorks executables have a second set of relocations for
13365 each PLT entry. They go in a separate relocation section,
13366 which is processed by the kernel loader. */
13367 if (htab->vxworks_p && !info->shared)
13368 {
13369 /* There is a relocation for the initial PLT entry:
13370 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13371 if (h->plt.offset == htab->plt_header_size)
13372 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13373
13374 /* There are two extra relocations for each subsequent
13375 PLT entry: an R_ARM_32 relocation for the GOT entry,
13376 and an R_ARM_32 relocation for the PLT entry. */
13377 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13378 }
13379 }
13380 else
13381 {
13382 h->plt.offset = (bfd_vma) -1;
13383 h->needs_plt = 0;
13384 }
13385 }
13386 else
13387 {
13388 h->plt.offset = (bfd_vma) -1;
13389 h->needs_plt = 0;
13390 }
13391
13392 eh = (struct elf32_arm_link_hash_entry *) h;
13393 eh->tlsdesc_got = (bfd_vma) -1;
13394
13395 if (h->got.refcount > 0)
13396 {
13397 asection *s;
13398 bfd_boolean dyn;
13399 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13400 int indx;
13401
13402 /* Make sure this symbol is output as a dynamic symbol.
13403 Undefined weak syms won't yet be marked as dynamic. */
13404 if (h->dynindx == -1
13405 && !h->forced_local)
13406 {
13407 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13408 return FALSE;
13409 }
13410
13411 if (!htab->symbian_p)
13412 {
13413 s = htab->root.sgot;
13414 h->got.offset = s->size;
13415
13416 if (tls_type == GOT_UNKNOWN)
13417 abort ();
13418
13419 if (tls_type == GOT_NORMAL)
13420 /* Non-TLS symbols need one GOT slot. */
13421 s->size += 4;
13422 else
13423 {
13424 if (tls_type & GOT_TLS_GDESC)
13425 {
13426 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13427 eh->tlsdesc_got
13428 = (htab->root.sgotplt->size
13429 - elf32_arm_compute_jump_table_size (htab));
13430 htab->root.sgotplt->size += 8;
13431 h->got.offset = (bfd_vma) -2;
13432 /* plt.got_offset needs to know there's a TLS_DESC
13433 reloc in the middle of .got.plt. */
13434 htab->num_tls_desc++;
13435 }
13436
13437 if (tls_type & GOT_TLS_GD)
13438 {
13439 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13440 the symbol is both GD and GDESC, got.offset may
13441 have been overwritten. */
13442 h->got.offset = s->size;
13443 s->size += 8;
13444 }
13445
13446 if (tls_type & GOT_TLS_IE)
13447 /* R_ARM_TLS_IE32 needs one GOT slot. */
13448 s->size += 4;
13449 }
13450
13451 dyn = htab->root.dynamic_sections_created;
13452
13453 indx = 0;
13454 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13455 && (!info->shared
13456 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13457 indx = h->dynindx;
13458
13459 if (tls_type != GOT_NORMAL
13460 && (info->shared || indx != 0)
13461 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13462 || h->root.type != bfd_link_hash_undefweak))
13463 {
13464 if (tls_type & GOT_TLS_IE)
13465 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13466
13467 if (tls_type & GOT_TLS_GD)
13468 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13469
13470 if (tls_type & GOT_TLS_GDESC)
13471 {
13472 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13473 /* GDESC needs a trampoline to jump to. */
13474 htab->tls_trampoline = -1;
13475 }
13476
13477 /* Only GD needs it. GDESC just emits one relocation per
13478 2 entries. */
13479 if ((tls_type & GOT_TLS_GD) && indx != 0)
13480 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13481 }
13482 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
13483 {
13484 if (htab->root.dynamic_sections_created)
13485 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13486 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13487 }
13488 else if (h->type == STT_GNU_IFUNC
13489 && eh->plt.noncall_refcount == 0)
13490 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13491 they all resolve dynamically instead. Reserve room for the
13492 GOT entry's R_ARM_IRELATIVE relocation. */
13493 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13494 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13495 || h->root.type != bfd_link_hash_undefweak))
13496 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13497 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13498 }
13499 }
13500 else
13501 h->got.offset = (bfd_vma) -1;
13502
13503 /* Allocate stubs for exported Thumb functions on v4t. */
13504 if (!htab->use_blx && h->dynindx != -1
13505 && h->def_regular
13506 && h->target_internal == ST_BRANCH_TO_THUMB
13507 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13508 {
13509 struct elf_link_hash_entry * th;
13510 struct bfd_link_hash_entry * bh;
13511 struct elf_link_hash_entry * myh;
13512 char name[1024];
13513 asection *s;
13514 bh = NULL;
13515 /* Create a new symbol to regist the real location of the function. */
13516 s = h->root.u.def.section;
13517 sprintf (name, "__real_%s", h->root.root.string);
13518 _bfd_generic_link_add_one_symbol (info, s->owner,
13519 name, BSF_GLOBAL, s,
13520 h->root.u.def.value,
13521 NULL, TRUE, FALSE, &bh);
13522
13523 myh = (struct elf_link_hash_entry *) bh;
13524 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13525 myh->forced_local = 1;
13526 myh->target_internal = ST_BRANCH_TO_THUMB;
13527 eh->export_glue = myh;
13528 th = record_arm_to_thumb_glue (info, h);
13529 /* Point the symbol at the stub. */
13530 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13531 h->target_internal = ST_BRANCH_TO_ARM;
13532 h->root.u.def.section = th->root.u.def.section;
13533 h->root.u.def.value = th->root.u.def.value & ~1;
13534 }
13535
13536 if (eh->dyn_relocs == NULL)
13537 return TRUE;
13538
13539 /* In the shared -Bsymbolic case, discard space allocated for
13540 dynamic pc-relative relocs against symbols which turn out to be
13541 defined in regular objects. For the normal shared case, discard
13542 space for pc-relative relocs that have become local due to symbol
13543 visibility changes. */
13544
13545 if (info->shared || htab->root.is_relocatable_executable)
13546 {
13547 /* The only relocs that use pc_count are R_ARM_REL32 and
13548 R_ARM_REL32_NOI, which will appear on something like
13549 ".long foo - .". We want calls to protected symbols to resolve
13550 directly to the function rather than going via the plt. If people
13551 want function pointer comparisons to work as expected then they
13552 should avoid writing assembly like ".long foo - .". */
13553 if (SYMBOL_CALLS_LOCAL (info, h))
13554 {
13555 struct elf_dyn_relocs **pp;
13556
13557 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13558 {
13559 p->count -= p->pc_count;
13560 p->pc_count = 0;
13561 if (p->count == 0)
13562 *pp = p->next;
13563 else
13564 pp = &p->next;
13565 }
13566 }
13567
13568 if (htab->vxworks_p)
13569 {
13570 struct elf_dyn_relocs **pp;
13571
13572 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13573 {
13574 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13575 *pp = p->next;
13576 else
13577 pp = &p->next;
13578 }
13579 }
13580
13581 /* Also discard relocs on undefined weak syms with non-default
13582 visibility. */
13583 if (eh->dyn_relocs != NULL
13584 && h->root.type == bfd_link_hash_undefweak)
13585 {
13586 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13587 eh->dyn_relocs = NULL;
13588
13589 /* Make sure undefined weak symbols are output as a dynamic
13590 symbol in PIEs. */
13591 else if (h->dynindx == -1
13592 && !h->forced_local)
13593 {
13594 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13595 return FALSE;
13596 }
13597 }
13598
13599 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13600 && h->root.type == bfd_link_hash_new)
13601 {
13602 /* Output absolute symbols so that we can create relocations
13603 against them. For normal symbols we output a relocation
13604 against the section that contains them. */
13605 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13606 return FALSE;
13607 }
13608
13609 }
13610 else
13611 {
13612 /* For the non-shared case, discard space for relocs against
13613 symbols which turn out to need copy relocs or are not
13614 dynamic. */
13615
13616 if (!h->non_got_ref
13617 && ((h->def_dynamic
13618 && !h->def_regular)
13619 || (htab->root.dynamic_sections_created
13620 && (h->root.type == bfd_link_hash_undefweak
13621 || h->root.type == bfd_link_hash_undefined))))
13622 {
13623 /* Make sure this symbol is output as a dynamic symbol.
13624 Undefined weak syms won't yet be marked as dynamic. */
13625 if (h->dynindx == -1
13626 && !h->forced_local)
13627 {
13628 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13629 return FALSE;
13630 }
13631
13632 /* If that succeeded, we know we'll be keeping all the
13633 relocs. */
13634 if (h->dynindx != -1)
13635 goto keep;
13636 }
13637
13638 eh->dyn_relocs = NULL;
13639
13640 keep: ;
13641 }
13642
13643 /* Finally, allocate space. */
13644 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13645 {
13646 asection *sreloc = elf_section_data (p->sec)->sreloc;
13647 if (h->type == STT_GNU_IFUNC
13648 && eh->plt.noncall_refcount == 0
13649 && SYMBOL_REFERENCES_LOCAL (info, h))
13650 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13651 else
13652 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13653 }
13654
13655 return TRUE;
13656 }
13657
13658 /* Find any dynamic relocs that apply to read-only sections. */
13659
13660 static bfd_boolean
13661 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13662 {
13663 struct elf32_arm_link_hash_entry * eh;
13664 struct elf_dyn_relocs * p;
13665
13666 eh = (struct elf32_arm_link_hash_entry *) h;
13667 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13668 {
13669 asection *s = p->sec;
13670
13671 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13672 {
13673 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13674
13675 info->flags |= DF_TEXTREL;
13676
13677 /* Not an error, just cut short the traversal. */
13678 return FALSE;
13679 }
13680 }
13681 return TRUE;
13682 }
13683
13684 void
13685 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13686 int byteswap_code)
13687 {
13688 struct elf32_arm_link_hash_table *globals;
13689
13690 globals = elf32_arm_hash_table (info);
13691 if (globals == NULL)
13692 return;
13693
13694 globals->byteswap_code = byteswap_code;
13695 }
13696
13697 /* Set the sizes of the dynamic sections. */
13698
13699 static bfd_boolean
13700 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13701 struct bfd_link_info * info)
13702 {
13703 bfd * dynobj;
13704 asection * s;
13705 bfd_boolean plt;
13706 bfd_boolean relocs;
13707 bfd *ibfd;
13708 struct elf32_arm_link_hash_table *htab;
13709
13710 htab = elf32_arm_hash_table (info);
13711 if (htab == NULL)
13712 return FALSE;
13713
13714 dynobj = elf_hash_table (info)->dynobj;
13715 BFD_ASSERT (dynobj != NULL);
13716 check_use_blx (htab);
13717
13718 if (elf_hash_table (info)->dynamic_sections_created)
13719 {
13720 /* Set the contents of the .interp section to the interpreter. */
13721 if (info->executable)
13722 {
13723 s = bfd_get_linker_section (dynobj, ".interp");
13724 BFD_ASSERT (s != NULL);
13725 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13726 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13727 }
13728 }
13729
13730 /* Set up .got offsets for local syms, and space for local dynamic
13731 relocs. */
13732 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
13733 {
13734 bfd_signed_vma *local_got;
13735 bfd_signed_vma *end_local_got;
13736 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13737 char *local_tls_type;
13738 bfd_vma *local_tlsdesc_gotent;
13739 bfd_size_type locsymcount;
13740 Elf_Internal_Shdr *symtab_hdr;
13741 asection *srel;
13742 bfd_boolean is_vxworks = htab->vxworks_p;
13743 unsigned int symndx;
13744
13745 if (! is_arm_elf (ibfd))
13746 continue;
13747
13748 for (s = ibfd->sections; s != NULL; s = s->next)
13749 {
13750 struct elf_dyn_relocs *p;
13751
13752 for (p = (struct elf_dyn_relocs *)
13753 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13754 {
13755 if (!bfd_is_abs_section (p->sec)
13756 && bfd_is_abs_section (p->sec->output_section))
13757 {
13758 /* Input section has been discarded, either because
13759 it is a copy of a linkonce section or due to
13760 linker script /DISCARD/, so we'll be discarding
13761 the relocs too. */
13762 }
13763 else if (is_vxworks
13764 && strcmp (p->sec->output_section->name,
13765 ".tls_vars") == 0)
13766 {
13767 /* Relocations in vxworks .tls_vars sections are
13768 handled specially by the loader. */
13769 }
13770 else if (p->count != 0)
13771 {
13772 srel = elf_section_data (p->sec)->sreloc;
13773 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13774 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13775 info->flags |= DF_TEXTREL;
13776 }
13777 }
13778 }
13779
13780 local_got = elf_local_got_refcounts (ibfd);
13781 if (!local_got)
13782 continue;
13783
13784 symtab_hdr = & elf_symtab_hdr (ibfd);
13785 locsymcount = symtab_hdr->sh_info;
13786 end_local_got = local_got + locsymcount;
13787 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13788 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13789 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13790 symndx = 0;
13791 s = htab->root.sgot;
13792 srel = htab->root.srelgot;
13793 for (; local_got < end_local_got;
13794 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13795 ++local_tlsdesc_gotent, ++symndx)
13796 {
13797 *local_tlsdesc_gotent = (bfd_vma) -1;
13798 local_iplt = *local_iplt_ptr;
13799 if (local_iplt != NULL)
13800 {
13801 struct elf_dyn_relocs *p;
13802
13803 if (local_iplt->root.refcount > 0)
13804 {
13805 elf32_arm_allocate_plt_entry (info, TRUE,
13806 &local_iplt->root,
13807 &local_iplt->arm);
13808 if (local_iplt->arm.noncall_refcount == 0)
13809 /* All references to the PLT are calls, so all
13810 non-call references can resolve directly to the
13811 run-time target. This means that the .got entry
13812 would be the same as the .igot.plt entry, so there's
13813 no point creating both. */
13814 *local_got = 0;
13815 }
13816 else
13817 {
13818 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13819 local_iplt->root.offset = (bfd_vma) -1;
13820 }
13821
13822 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13823 {
13824 asection *psrel;
13825
13826 psrel = elf_section_data (p->sec)->sreloc;
13827 if (local_iplt->arm.noncall_refcount == 0)
13828 elf32_arm_allocate_irelocs (info, psrel, p->count);
13829 else
13830 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13831 }
13832 }
13833 if (*local_got > 0)
13834 {
13835 Elf_Internal_Sym *isym;
13836
13837 *local_got = s->size;
13838 if (*local_tls_type & GOT_TLS_GD)
13839 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13840 s->size += 8;
13841 if (*local_tls_type & GOT_TLS_GDESC)
13842 {
13843 *local_tlsdesc_gotent = htab->root.sgotplt->size
13844 - elf32_arm_compute_jump_table_size (htab);
13845 htab->root.sgotplt->size += 8;
13846 *local_got = (bfd_vma) -2;
13847 /* plt.got_offset needs to know there's a TLS_DESC
13848 reloc in the middle of .got.plt. */
13849 htab->num_tls_desc++;
13850 }
13851 if (*local_tls_type & GOT_TLS_IE)
13852 s->size += 4;
13853
13854 if (*local_tls_type & GOT_NORMAL)
13855 {
13856 /* If the symbol is both GD and GDESC, *local_got
13857 may have been overwritten. */
13858 *local_got = s->size;
13859 s->size += 4;
13860 }
13861
13862 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13863 if (isym == NULL)
13864 return FALSE;
13865
13866 /* If all references to an STT_GNU_IFUNC PLT are calls,
13867 then all non-call references, including this GOT entry,
13868 resolve directly to the run-time target. */
13869 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13870 && (local_iplt == NULL
13871 || local_iplt->arm.noncall_refcount == 0))
13872 elf32_arm_allocate_irelocs (info, srel, 1);
13873 else if (info->shared || output_bfd->flags & DYNAMIC)
13874 {
13875 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13876 || *local_tls_type & GOT_TLS_GD)
13877 elf32_arm_allocate_dynrelocs (info, srel, 1);
13878
13879 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13880 {
13881 elf32_arm_allocate_dynrelocs (info,
13882 htab->root.srelplt, 1);
13883 htab->tls_trampoline = -1;
13884 }
13885 }
13886 }
13887 else
13888 *local_got = (bfd_vma) -1;
13889 }
13890 }
13891
13892 if (htab->tls_ldm_got.refcount > 0)
13893 {
13894 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13895 for R_ARM_TLS_LDM32 relocations. */
13896 htab->tls_ldm_got.offset = htab->root.sgot->size;
13897 htab->root.sgot->size += 8;
13898 if (info->shared)
13899 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13900 }
13901 else
13902 htab->tls_ldm_got.offset = -1;
13903
13904 /* Allocate global sym .plt and .got entries, and space for global
13905 sym dynamic relocs. */
13906 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13907
13908 /* Here we rummage through the found bfds to collect glue information. */
13909 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
13910 {
13911 if (! is_arm_elf (ibfd))
13912 continue;
13913
13914 /* Initialise mapping tables for code/data. */
13915 bfd_elf32_arm_init_maps (ibfd);
13916
13917 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13918 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13919 /* xgettext:c-format */
13920 _bfd_error_handler (_("Errors encountered processing file %s"),
13921 ibfd->filename);
13922 }
13923
13924 /* Allocate space for the glue sections now that we've sized them. */
13925 bfd_elf32_arm_allocate_interworking_sections (info);
13926
13927 /* For every jump slot reserved in the sgotplt, reloc_count is
13928 incremented. However, when we reserve space for TLS descriptors,
13929 it's not incremented, so in order to compute the space reserved
13930 for them, it suffices to multiply the reloc count by the jump
13931 slot size. */
13932 if (htab->root.srelplt)
13933 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13934
13935 if (htab->tls_trampoline)
13936 {
13937 if (htab->root.splt->size == 0)
13938 htab->root.splt->size += htab->plt_header_size;
13939
13940 htab->tls_trampoline = htab->root.splt->size;
13941 htab->root.splt->size += htab->plt_entry_size;
13942
13943 /* If we're not using lazy TLS relocations, don't generate the
13944 PLT and GOT entries they require. */
13945 if (!(info->flags & DF_BIND_NOW))
13946 {
13947 htab->dt_tlsdesc_got = htab->root.sgot->size;
13948 htab->root.sgot->size += 4;
13949
13950 htab->dt_tlsdesc_plt = htab->root.splt->size;
13951 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13952 }
13953 }
13954
13955 /* The check_relocs and adjust_dynamic_symbol entry points have
13956 determined the sizes of the various dynamic sections. Allocate
13957 memory for them. */
13958 plt = FALSE;
13959 relocs = FALSE;
13960 for (s = dynobj->sections; s != NULL; s = s->next)
13961 {
13962 const char * name;
13963
13964 if ((s->flags & SEC_LINKER_CREATED) == 0)
13965 continue;
13966
13967 /* It's OK to base decisions on the section name, because none
13968 of the dynobj section names depend upon the input files. */
13969 name = bfd_get_section_name (dynobj, s);
13970
13971 if (s == htab->root.splt)
13972 {
13973 /* Remember whether there is a PLT. */
13974 plt = s->size != 0;
13975 }
13976 else if (CONST_STRNEQ (name, ".rel"))
13977 {
13978 if (s->size != 0)
13979 {
13980 /* Remember whether there are any reloc sections other
13981 than .rel(a).plt and .rela.plt.unloaded. */
13982 if (s != htab->root.srelplt && s != htab->srelplt2)
13983 relocs = TRUE;
13984
13985 /* We use the reloc_count field as a counter if we need
13986 to copy relocs into the output file. */
13987 s->reloc_count = 0;
13988 }
13989 }
13990 else if (s != htab->root.sgot
13991 && s != htab->root.sgotplt
13992 && s != htab->root.iplt
13993 && s != htab->root.igotplt
13994 && s != htab->sdynbss)
13995 {
13996 /* It's not one of our sections, so don't allocate space. */
13997 continue;
13998 }
13999
14000 if (s->size == 0)
14001 {
14002 /* If we don't need this section, strip it from the
14003 output file. This is mostly to handle .rel(a).bss and
14004 .rel(a).plt. We must create both sections in
14005 create_dynamic_sections, because they must be created
14006 before the linker maps input sections to output
14007 sections. The linker does that before
14008 adjust_dynamic_symbol is called, and it is that
14009 function which decides whether anything needs to go
14010 into these sections. */
14011 s->flags |= SEC_EXCLUDE;
14012 continue;
14013 }
14014
14015 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14016 continue;
14017
14018 /* Allocate memory for the section contents. */
14019 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14020 if (s->contents == NULL)
14021 return FALSE;
14022 }
14023
14024 if (elf_hash_table (info)->dynamic_sections_created)
14025 {
14026 /* Add some entries to the .dynamic section. We fill in the
14027 values later, in elf32_arm_finish_dynamic_sections, but we
14028 must add the entries now so that we get the correct size for
14029 the .dynamic section. The DT_DEBUG entry is filled in by the
14030 dynamic linker and used by the debugger. */
14031 #define add_dynamic_entry(TAG, VAL) \
14032 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14033
14034 if (info->executable)
14035 {
14036 if (!add_dynamic_entry (DT_DEBUG, 0))
14037 return FALSE;
14038 }
14039
14040 if (plt)
14041 {
14042 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14043 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14044 || !add_dynamic_entry (DT_PLTREL,
14045 htab->use_rel ? DT_REL : DT_RELA)
14046 || !add_dynamic_entry (DT_JMPREL, 0))
14047 return FALSE;
14048
14049 if (htab->dt_tlsdesc_plt &&
14050 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14051 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14052 return FALSE;
14053 }
14054
14055 if (relocs)
14056 {
14057 if (htab->use_rel)
14058 {
14059 if (!add_dynamic_entry (DT_REL, 0)
14060 || !add_dynamic_entry (DT_RELSZ, 0)
14061 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14062 return FALSE;
14063 }
14064 else
14065 {
14066 if (!add_dynamic_entry (DT_RELA, 0)
14067 || !add_dynamic_entry (DT_RELASZ, 0)
14068 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14069 return FALSE;
14070 }
14071 }
14072
14073 /* If any dynamic relocs apply to a read-only section,
14074 then we need a DT_TEXTREL entry. */
14075 if ((info->flags & DF_TEXTREL) == 0)
14076 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14077 info);
14078
14079 if ((info->flags & DF_TEXTREL) != 0)
14080 {
14081 if (!add_dynamic_entry (DT_TEXTREL, 0))
14082 return FALSE;
14083 }
14084 if (htab->vxworks_p
14085 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14086 return FALSE;
14087 }
14088 #undef add_dynamic_entry
14089
14090 return TRUE;
14091 }
14092
14093 /* Size sections even though they're not dynamic. We use it to setup
14094 _TLS_MODULE_BASE_, if needed. */
14095
14096 static bfd_boolean
14097 elf32_arm_always_size_sections (bfd *output_bfd,
14098 struct bfd_link_info *info)
14099 {
14100 asection *tls_sec;
14101
14102 if (info->relocatable)
14103 return TRUE;
14104
14105 tls_sec = elf_hash_table (info)->tls_sec;
14106
14107 if (tls_sec)
14108 {
14109 struct elf_link_hash_entry *tlsbase;
14110
14111 tlsbase = elf_link_hash_lookup
14112 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14113
14114 if (tlsbase)
14115 {
14116 struct bfd_link_hash_entry *bh = NULL;
14117 const struct elf_backend_data *bed
14118 = get_elf_backend_data (output_bfd);
14119
14120 if (!(_bfd_generic_link_add_one_symbol
14121 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14122 tls_sec, 0, NULL, FALSE,
14123 bed->collect, &bh)))
14124 return FALSE;
14125
14126 tlsbase->type = STT_TLS;
14127 tlsbase = (struct elf_link_hash_entry *)bh;
14128 tlsbase->def_regular = 1;
14129 tlsbase->other = STV_HIDDEN;
14130 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
14131 }
14132 }
14133 return TRUE;
14134 }
14135
14136 /* Finish up dynamic symbol handling. We set the contents of various
14137 dynamic sections here. */
14138
14139 static bfd_boolean
14140 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14141 struct bfd_link_info * info,
14142 struct elf_link_hash_entry * h,
14143 Elf_Internal_Sym * sym)
14144 {
14145 struct elf32_arm_link_hash_table *htab;
14146 struct elf32_arm_link_hash_entry *eh;
14147
14148 htab = elf32_arm_hash_table (info);
14149 if (htab == NULL)
14150 return FALSE;
14151
14152 eh = (struct elf32_arm_link_hash_entry *) h;
14153
14154 if (h->plt.offset != (bfd_vma) -1)
14155 {
14156 if (!eh->is_iplt)
14157 {
14158 BFD_ASSERT (h->dynindx != -1);
14159 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14160 h->dynindx, 0))
14161 return FALSE;
14162 }
14163
14164 if (!h->def_regular)
14165 {
14166 /* Mark the symbol as undefined, rather than as defined in
14167 the .plt section. Leave the value alone. */
14168 sym->st_shndx = SHN_UNDEF;
14169 /* If the symbol is weak, we do need to clear the value.
14170 Otherwise, the PLT entry would provide a definition for
14171 the symbol even if the symbol wasn't defined anywhere,
14172 and so the symbol would never be NULL. */
14173 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
14174 sym->st_value = 0;
14175 }
14176 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14177 {
14178 /* At least one non-call relocation references this .iplt entry,
14179 so the .iplt entry is the function's canonical address. */
14180 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14181 sym->st_target_internal = ST_BRANCH_TO_ARM;
14182 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14183 (output_bfd, htab->root.iplt->output_section));
14184 sym->st_value = (h->plt.offset
14185 + htab->root.iplt->output_section->vma
14186 + htab->root.iplt->output_offset);
14187 }
14188 }
14189
14190 if (h->needs_copy)
14191 {
14192 asection * s;
14193 Elf_Internal_Rela rel;
14194
14195 /* This symbol needs a copy reloc. Set it up. */
14196 BFD_ASSERT (h->dynindx != -1
14197 && (h->root.type == bfd_link_hash_defined
14198 || h->root.type == bfd_link_hash_defweak));
14199
14200 s = htab->srelbss;
14201 BFD_ASSERT (s != NULL);
14202
14203 rel.r_addend = 0;
14204 rel.r_offset = (h->root.u.def.value
14205 + h->root.u.def.section->output_section->vma
14206 + h->root.u.def.section->output_offset);
14207 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14208 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14209 }
14210
14211 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14212 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14213 to the ".got" section. */
14214 if (h == htab->root.hdynamic
14215 || (!htab->vxworks_p && h == htab->root.hgot))
14216 sym->st_shndx = SHN_ABS;
14217
14218 return TRUE;
14219 }
14220
14221 static void
14222 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14223 void *contents,
14224 const unsigned long *template, unsigned count)
14225 {
14226 unsigned ix;
14227
14228 for (ix = 0; ix != count; ix++)
14229 {
14230 unsigned long insn = template[ix];
14231
14232 /* Emit mov pc,rx if bx is not permitted. */
14233 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14234 insn = (insn & 0xf000000f) | 0x01a0f000;
14235 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14236 }
14237 }
14238
14239 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14240 other variants, NaCl needs this entry in a static executable's
14241 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14242 zero. For .iplt really only the last bundle is useful, and .iplt
14243 could have a shorter first entry, with each individual PLT entry's
14244 relative branch calculated differently so it targets the last
14245 bundle instead of the instruction before it (labelled .Lplt_tail
14246 above). But it's simpler to keep the size and layout of PLT0
14247 consistent with the dynamic case, at the cost of some dead code at
14248 the start of .iplt and the one dead store to the stack at the start
14249 of .Lplt_tail. */
14250 static void
14251 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14252 asection *plt, bfd_vma got_displacement)
14253 {
14254 unsigned int i;
14255
14256 put_arm_insn (htab, output_bfd,
14257 elf32_arm_nacl_plt0_entry[0]
14258 | arm_movw_immediate (got_displacement),
14259 plt->contents + 0);
14260 put_arm_insn (htab, output_bfd,
14261 elf32_arm_nacl_plt0_entry[1]
14262 | arm_movt_immediate (got_displacement),
14263 plt->contents + 4);
14264
14265 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14266 put_arm_insn (htab, output_bfd,
14267 elf32_arm_nacl_plt0_entry[i],
14268 plt->contents + (i * 4));
14269 }
14270
14271 /* Finish up the dynamic sections. */
14272
14273 static bfd_boolean
14274 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14275 {
14276 bfd * dynobj;
14277 asection * sgot;
14278 asection * sdyn;
14279 struct elf32_arm_link_hash_table *htab;
14280
14281 htab = elf32_arm_hash_table (info);
14282 if (htab == NULL)
14283 return FALSE;
14284
14285 dynobj = elf_hash_table (info)->dynobj;
14286
14287 sgot = htab->root.sgotplt;
14288 /* A broken linker script might have discarded the dynamic sections.
14289 Catch this here so that we do not seg-fault later on. */
14290 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14291 return FALSE;
14292 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14293
14294 if (elf_hash_table (info)->dynamic_sections_created)
14295 {
14296 asection *splt;
14297 Elf32_External_Dyn *dyncon, *dynconend;
14298
14299 splt = htab->root.splt;
14300 BFD_ASSERT (splt != NULL && sdyn != NULL);
14301 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14302
14303 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14304 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14305
14306 for (; dyncon < dynconend; dyncon++)
14307 {
14308 Elf_Internal_Dyn dyn;
14309 const char * name;
14310 asection * s;
14311
14312 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14313
14314 switch (dyn.d_tag)
14315 {
14316 unsigned int type;
14317
14318 default:
14319 if (htab->vxworks_p
14320 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14321 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14322 break;
14323
14324 case DT_HASH:
14325 name = ".hash";
14326 goto get_vma_if_bpabi;
14327 case DT_STRTAB:
14328 name = ".dynstr";
14329 goto get_vma_if_bpabi;
14330 case DT_SYMTAB:
14331 name = ".dynsym";
14332 goto get_vma_if_bpabi;
14333 case DT_VERSYM:
14334 name = ".gnu.version";
14335 goto get_vma_if_bpabi;
14336 case DT_VERDEF:
14337 name = ".gnu.version_d";
14338 goto get_vma_if_bpabi;
14339 case DT_VERNEED:
14340 name = ".gnu.version_r";
14341 goto get_vma_if_bpabi;
14342
14343 case DT_PLTGOT:
14344 name = ".got";
14345 goto get_vma;
14346 case DT_JMPREL:
14347 name = RELOC_SECTION (htab, ".plt");
14348 get_vma:
14349 s = bfd_get_section_by_name (output_bfd, name);
14350 if (s == NULL)
14351 {
14352 /* PR ld/14397: Issue an error message if a required section is missing. */
14353 (*_bfd_error_handler)
14354 (_("error: required section '%s' not found in the linker script"), name);
14355 bfd_set_error (bfd_error_invalid_operation);
14356 return FALSE;
14357 }
14358 if (!htab->symbian_p)
14359 dyn.d_un.d_ptr = s->vma;
14360 else
14361 /* In the BPABI, tags in the PT_DYNAMIC section point
14362 at the file offset, not the memory address, for the
14363 convenience of the post linker. */
14364 dyn.d_un.d_ptr = s->filepos;
14365 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14366 break;
14367
14368 get_vma_if_bpabi:
14369 if (htab->symbian_p)
14370 goto get_vma;
14371 break;
14372
14373 case DT_PLTRELSZ:
14374 s = htab->root.srelplt;
14375 BFD_ASSERT (s != NULL);
14376 dyn.d_un.d_val = s->size;
14377 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14378 break;
14379
14380 case DT_RELSZ:
14381 case DT_RELASZ:
14382 if (!htab->symbian_p)
14383 {
14384 /* My reading of the SVR4 ABI indicates that the
14385 procedure linkage table relocs (DT_JMPREL) should be
14386 included in the overall relocs (DT_REL). This is
14387 what Solaris does. However, UnixWare can not handle
14388 that case. Therefore, we override the DT_RELSZ entry
14389 here to make it not include the JMPREL relocs. Since
14390 the linker script arranges for .rel(a).plt to follow all
14391 other relocation sections, we don't have to worry
14392 about changing the DT_REL entry. */
14393 s = htab->root.srelplt;
14394 if (s != NULL)
14395 dyn.d_un.d_val -= s->size;
14396 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14397 break;
14398 }
14399 /* Fall through. */
14400
14401 case DT_REL:
14402 case DT_RELA:
14403 /* In the BPABI, the DT_REL tag must point at the file
14404 offset, not the VMA, of the first relocation
14405 section. So, we use code similar to that in
14406 elflink.c, but do not check for SHF_ALLOC on the
14407 relcoation section, since relocations sections are
14408 never allocated under the BPABI. The comments above
14409 about Unixware notwithstanding, we include all of the
14410 relocations here. */
14411 if (htab->symbian_p)
14412 {
14413 unsigned int i;
14414 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14415 ? SHT_REL : SHT_RELA);
14416 dyn.d_un.d_val = 0;
14417 for (i = 1; i < elf_numsections (output_bfd); i++)
14418 {
14419 Elf_Internal_Shdr *hdr
14420 = elf_elfsections (output_bfd)[i];
14421 if (hdr->sh_type == type)
14422 {
14423 if (dyn.d_tag == DT_RELSZ
14424 || dyn.d_tag == DT_RELASZ)
14425 dyn.d_un.d_val += hdr->sh_size;
14426 else if ((ufile_ptr) hdr->sh_offset
14427 <= dyn.d_un.d_val - 1)
14428 dyn.d_un.d_val = hdr->sh_offset;
14429 }
14430 }
14431 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14432 }
14433 break;
14434
14435 case DT_TLSDESC_PLT:
14436 s = htab->root.splt;
14437 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14438 + htab->dt_tlsdesc_plt);
14439 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14440 break;
14441
14442 case DT_TLSDESC_GOT:
14443 s = htab->root.sgot;
14444 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14445 + htab->dt_tlsdesc_got);
14446 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14447 break;
14448
14449 /* Set the bottom bit of DT_INIT/FINI if the
14450 corresponding function is Thumb. */
14451 case DT_INIT:
14452 name = info->init_function;
14453 goto get_sym;
14454 case DT_FINI:
14455 name = info->fini_function;
14456 get_sym:
14457 /* If it wasn't set by elf_bfd_final_link
14458 then there is nothing to adjust. */
14459 if (dyn.d_un.d_val != 0)
14460 {
14461 struct elf_link_hash_entry * eh;
14462
14463 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14464 FALSE, FALSE, TRUE);
14465 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14466 {
14467 dyn.d_un.d_val |= 1;
14468 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14469 }
14470 }
14471 break;
14472 }
14473 }
14474
14475 /* Fill in the first entry in the procedure linkage table. */
14476 if (splt->size > 0 && htab->plt_header_size)
14477 {
14478 const bfd_vma *plt0_entry;
14479 bfd_vma got_address, plt_address, got_displacement;
14480
14481 /* Calculate the addresses of the GOT and PLT. */
14482 got_address = sgot->output_section->vma + sgot->output_offset;
14483 plt_address = splt->output_section->vma + splt->output_offset;
14484
14485 if (htab->vxworks_p)
14486 {
14487 /* The VxWorks GOT is relocated by the dynamic linker.
14488 Therefore, we must emit relocations rather than simply
14489 computing the values now. */
14490 Elf_Internal_Rela rel;
14491
14492 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14493 put_arm_insn (htab, output_bfd, plt0_entry[0],
14494 splt->contents + 0);
14495 put_arm_insn (htab, output_bfd, plt0_entry[1],
14496 splt->contents + 4);
14497 put_arm_insn (htab, output_bfd, plt0_entry[2],
14498 splt->contents + 8);
14499 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14500
14501 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14502 rel.r_offset = plt_address + 12;
14503 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14504 rel.r_addend = 0;
14505 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14506 htab->srelplt2->contents);
14507 }
14508 else if (htab->nacl_p)
14509 arm_nacl_put_plt0 (htab, output_bfd, splt,
14510 got_address + 8 - (plt_address + 16));
14511 else if (using_thumb_only (htab))
14512 {
14513 got_displacement = got_address - (plt_address + 12);
14514
14515 plt0_entry = elf32_thumb2_plt0_entry;
14516 put_arm_insn (htab, output_bfd, plt0_entry[0],
14517 splt->contents + 0);
14518 put_arm_insn (htab, output_bfd, plt0_entry[1],
14519 splt->contents + 4);
14520 put_arm_insn (htab, output_bfd, plt0_entry[2],
14521 splt->contents + 8);
14522
14523 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
14524 }
14525 else
14526 {
14527 got_displacement = got_address - (plt_address + 16);
14528
14529 plt0_entry = elf32_arm_plt0_entry;
14530 put_arm_insn (htab, output_bfd, plt0_entry[0],
14531 splt->contents + 0);
14532 put_arm_insn (htab, output_bfd, plt0_entry[1],
14533 splt->contents + 4);
14534 put_arm_insn (htab, output_bfd, plt0_entry[2],
14535 splt->contents + 8);
14536 put_arm_insn (htab, output_bfd, plt0_entry[3],
14537 splt->contents + 12);
14538
14539 #ifdef FOUR_WORD_PLT
14540 /* The displacement value goes in the otherwise-unused
14541 last word of the second entry. */
14542 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14543 #else
14544 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14545 #endif
14546 }
14547 }
14548
14549 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14550 really seem like the right value. */
14551 if (splt->output_section->owner == output_bfd)
14552 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14553
14554 if (htab->dt_tlsdesc_plt)
14555 {
14556 bfd_vma got_address
14557 = sgot->output_section->vma + sgot->output_offset;
14558 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14559 + htab->root.sgot->output_offset);
14560 bfd_vma plt_address
14561 = splt->output_section->vma + splt->output_offset;
14562
14563 arm_put_trampoline (htab, output_bfd,
14564 splt->contents + htab->dt_tlsdesc_plt,
14565 dl_tlsdesc_lazy_trampoline, 6);
14566
14567 bfd_put_32 (output_bfd,
14568 gotplt_address + htab->dt_tlsdesc_got
14569 - (plt_address + htab->dt_tlsdesc_plt)
14570 - dl_tlsdesc_lazy_trampoline[6],
14571 splt->contents + htab->dt_tlsdesc_plt + 24);
14572 bfd_put_32 (output_bfd,
14573 got_address - (plt_address + htab->dt_tlsdesc_plt)
14574 - dl_tlsdesc_lazy_trampoline[7],
14575 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14576 }
14577
14578 if (htab->tls_trampoline)
14579 {
14580 arm_put_trampoline (htab, output_bfd,
14581 splt->contents + htab->tls_trampoline,
14582 tls_trampoline, 3);
14583 #ifdef FOUR_WORD_PLT
14584 bfd_put_32 (output_bfd, 0x00000000,
14585 splt->contents + htab->tls_trampoline + 12);
14586 #endif
14587 }
14588
14589 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14590 {
14591 /* Correct the .rel(a).plt.unloaded relocations. They will have
14592 incorrect symbol indexes. */
14593 int num_plts;
14594 unsigned char *p;
14595
14596 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14597 / htab->plt_entry_size);
14598 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14599
14600 for (; num_plts; num_plts--)
14601 {
14602 Elf_Internal_Rela rel;
14603
14604 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14605 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14606 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14607 p += RELOC_SIZE (htab);
14608
14609 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14610 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14611 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14612 p += RELOC_SIZE (htab);
14613 }
14614 }
14615 }
14616
14617 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14618 /* NaCl uses a special first entry in .iplt too. */
14619 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14620
14621 /* Fill in the first three entries in the global offset table. */
14622 if (sgot)
14623 {
14624 if (sgot->size > 0)
14625 {
14626 if (sdyn == NULL)
14627 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14628 else
14629 bfd_put_32 (output_bfd,
14630 sdyn->output_section->vma + sdyn->output_offset,
14631 sgot->contents);
14632 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14633 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14634 }
14635
14636 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14637 }
14638
14639 return TRUE;
14640 }
14641
14642 static void
14643 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14644 {
14645 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14646 struct elf32_arm_link_hash_table *globals;
14647
14648 i_ehdrp = elf_elfheader (abfd);
14649
14650 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14651 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14652 else
14653 _bfd_elf_post_process_headers (abfd, link_info);
14654 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14655
14656 if (link_info)
14657 {
14658 globals = elf32_arm_hash_table (link_info);
14659 if (globals != NULL && globals->byteswap_code)
14660 i_ehdrp->e_flags |= EF_ARM_BE8;
14661 }
14662
14663 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14664 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14665 {
14666 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14667 if (abi)
14668 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14669 else
14670 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14671 }
14672 }
14673
14674 static enum elf_reloc_type_class
14675 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14676 const asection *rel_sec ATTRIBUTE_UNUSED,
14677 const Elf_Internal_Rela *rela)
14678 {
14679 switch ((int) ELF32_R_TYPE (rela->r_info))
14680 {
14681 case R_ARM_RELATIVE:
14682 return reloc_class_relative;
14683 case R_ARM_JUMP_SLOT:
14684 return reloc_class_plt;
14685 case R_ARM_COPY:
14686 return reloc_class_copy;
14687 default:
14688 return reloc_class_normal;
14689 }
14690 }
14691
14692 static void
14693 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14694 {
14695 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14696 }
14697
14698 /* Return TRUE if this is an unwinding table entry. */
14699
14700 static bfd_boolean
14701 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14702 {
14703 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14704 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14705 }
14706
14707
14708 /* Set the type and flags for an ARM section. We do this by
14709 the section name, which is a hack, but ought to work. */
14710
14711 static bfd_boolean
14712 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14713 {
14714 const char * name;
14715
14716 name = bfd_get_section_name (abfd, sec);
14717
14718 if (is_arm_elf_unwind_section_name (abfd, name))
14719 {
14720 hdr->sh_type = SHT_ARM_EXIDX;
14721 hdr->sh_flags |= SHF_LINK_ORDER;
14722 }
14723 return TRUE;
14724 }
14725
14726 /* Handle an ARM specific section when reading an object file. This is
14727 called when bfd_section_from_shdr finds a section with an unknown
14728 type. */
14729
14730 static bfd_boolean
14731 elf32_arm_section_from_shdr (bfd *abfd,
14732 Elf_Internal_Shdr * hdr,
14733 const char *name,
14734 int shindex)
14735 {
14736 /* There ought to be a place to keep ELF backend specific flags, but
14737 at the moment there isn't one. We just keep track of the
14738 sections by their name, instead. Fortunately, the ABI gives
14739 names for all the ARM specific sections, so we will probably get
14740 away with this. */
14741 switch (hdr->sh_type)
14742 {
14743 case SHT_ARM_EXIDX:
14744 case SHT_ARM_PREEMPTMAP:
14745 case SHT_ARM_ATTRIBUTES:
14746 break;
14747
14748 default:
14749 return FALSE;
14750 }
14751
14752 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14753 return FALSE;
14754
14755 return TRUE;
14756 }
14757
14758 static _arm_elf_section_data *
14759 get_arm_elf_section_data (asection * sec)
14760 {
14761 if (sec && sec->owner && is_arm_elf (sec->owner))
14762 return elf32_arm_section_data (sec);
14763 else
14764 return NULL;
14765 }
14766
14767 typedef struct
14768 {
14769 void *flaginfo;
14770 struct bfd_link_info *info;
14771 asection *sec;
14772 int sec_shndx;
14773 int (*func) (void *, const char *, Elf_Internal_Sym *,
14774 asection *, struct elf_link_hash_entry *);
14775 } output_arch_syminfo;
14776
14777 enum map_symbol_type
14778 {
14779 ARM_MAP_ARM,
14780 ARM_MAP_THUMB,
14781 ARM_MAP_DATA
14782 };
14783
14784
14785 /* Output a single mapping symbol. */
14786
14787 static bfd_boolean
14788 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14789 enum map_symbol_type type,
14790 bfd_vma offset)
14791 {
14792 static const char *names[3] = {"$a", "$t", "$d"};
14793 Elf_Internal_Sym sym;
14794
14795 sym.st_value = osi->sec->output_section->vma
14796 + osi->sec->output_offset
14797 + offset;
14798 sym.st_size = 0;
14799 sym.st_other = 0;
14800 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14801 sym.st_shndx = osi->sec_shndx;
14802 sym.st_target_internal = 0;
14803 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14804 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14805 }
14806
14807 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14808 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14809
14810 static bfd_boolean
14811 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14812 bfd_boolean is_iplt_entry_p,
14813 union gotplt_union *root_plt,
14814 struct arm_plt_info *arm_plt)
14815 {
14816 struct elf32_arm_link_hash_table *htab;
14817 bfd_vma addr, plt_header_size;
14818
14819 if (root_plt->offset == (bfd_vma) -1)
14820 return TRUE;
14821
14822 htab = elf32_arm_hash_table (osi->info);
14823 if (htab == NULL)
14824 return FALSE;
14825
14826 if (is_iplt_entry_p)
14827 {
14828 osi->sec = htab->root.iplt;
14829 plt_header_size = 0;
14830 }
14831 else
14832 {
14833 osi->sec = htab->root.splt;
14834 plt_header_size = htab->plt_header_size;
14835 }
14836 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14837 (osi->info->output_bfd, osi->sec->output_section));
14838
14839 addr = root_plt->offset & -2;
14840 if (htab->symbian_p)
14841 {
14842 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14843 return FALSE;
14844 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14845 return FALSE;
14846 }
14847 else if (htab->vxworks_p)
14848 {
14849 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14850 return FALSE;
14851 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14852 return FALSE;
14853 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14854 return FALSE;
14855 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14856 return FALSE;
14857 }
14858 else if (htab->nacl_p)
14859 {
14860 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14861 return FALSE;
14862 }
14863 else if (using_thumb_only (htab))
14864 {
14865 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
14866 return FALSE;
14867 }
14868 else
14869 {
14870 bfd_boolean thumb_stub_p;
14871
14872 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14873 if (thumb_stub_p)
14874 {
14875 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14876 return FALSE;
14877 }
14878 #ifdef FOUR_WORD_PLT
14879 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14880 return FALSE;
14881 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14882 return FALSE;
14883 #else
14884 /* A three-word PLT with no Thumb thunk contains only Arm code,
14885 so only need to output a mapping symbol for the first PLT entry and
14886 entries with thumb thunks. */
14887 if (thumb_stub_p || addr == plt_header_size)
14888 {
14889 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14890 return FALSE;
14891 }
14892 #endif
14893 }
14894
14895 return TRUE;
14896 }
14897
14898 /* Output mapping symbols for PLT entries associated with H. */
14899
14900 static bfd_boolean
14901 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14902 {
14903 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14904 struct elf32_arm_link_hash_entry *eh;
14905
14906 if (h->root.type == bfd_link_hash_indirect)
14907 return TRUE;
14908
14909 if (h->root.type == bfd_link_hash_warning)
14910 /* When warning symbols are created, they **replace** the "real"
14911 entry in the hash table, thus we never get to see the real
14912 symbol in a hash traversal. So look at it now. */
14913 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14914
14915 eh = (struct elf32_arm_link_hash_entry *) h;
14916 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14917 &h->plt, &eh->plt);
14918 }
14919
14920 /* Output a single local symbol for a generated stub. */
14921
14922 static bfd_boolean
14923 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14924 bfd_vma offset, bfd_vma size)
14925 {
14926 Elf_Internal_Sym sym;
14927
14928 sym.st_value = osi->sec->output_section->vma
14929 + osi->sec->output_offset
14930 + offset;
14931 sym.st_size = size;
14932 sym.st_other = 0;
14933 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14934 sym.st_shndx = osi->sec_shndx;
14935 sym.st_target_internal = 0;
14936 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14937 }
14938
14939 static bfd_boolean
14940 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14941 void * in_arg)
14942 {
14943 struct elf32_arm_stub_hash_entry *stub_entry;
14944 asection *stub_sec;
14945 bfd_vma addr;
14946 char *stub_name;
14947 output_arch_syminfo *osi;
14948 const insn_sequence *template_sequence;
14949 enum stub_insn_type prev_type;
14950 int size;
14951 int i;
14952 enum map_symbol_type sym_type;
14953
14954 /* Massage our args to the form they really have. */
14955 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14956 osi = (output_arch_syminfo *) in_arg;
14957
14958 stub_sec = stub_entry->stub_sec;
14959
14960 /* Ensure this stub is attached to the current section being
14961 processed. */
14962 if (stub_sec != osi->sec)
14963 return TRUE;
14964
14965 addr = (bfd_vma) stub_entry->stub_offset;
14966 stub_name = stub_entry->output_name;
14967
14968 template_sequence = stub_entry->stub_template;
14969 switch (template_sequence[0].type)
14970 {
14971 case ARM_TYPE:
14972 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14973 return FALSE;
14974 break;
14975 case THUMB16_TYPE:
14976 case THUMB32_TYPE:
14977 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14978 stub_entry->stub_size))
14979 return FALSE;
14980 break;
14981 default:
14982 BFD_FAIL ();
14983 return 0;
14984 }
14985
14986 prev_type = DATA_TYPE;
14987 size = 0;
14988 for (i = 0; i < stub_entry->stub_template_size; i++)
14989 {
14990 switch (template_sequence[i].type)
14991 {
14992 case ARM_TYPE:
14993 sym_type = ARM_MAP_ARM;
14994 break;
14995
14996 case THUMB16_TYPE:
14997 case THUMB32_TYPE:
14998 sym_type = ARM_MAP_THUMB;
14999 break;
15000
15001 case DATA_TYPE:
15002 sym_type = ARM_MAP_DATA;
15003 break;
15004
15005 default:
15006 BFD_FAIL ();
15007 return FALSE;
15008 }
15009
15010 if (template_sequence[i].type != prev_type)
15011 {
15012 prev_type = template_sequence[i].type;
15013 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15014 return FALSE;
15015 }
15016
15017 switch (template_sequence[i].type)
15018 {
15019 case ARM_TYPE:
15020 case THUMB32_TYPE:
15021 size += 4;
15022 break;
15023
15024 case THUMB16_TYPE:
15025 size += 2;
15026 break;
15027
15028 case DATA_TYPE:
15029 size += 4;
15030 break;
15031
15032 default:
15033 BFD_FAIL ();
15034 return FALSE;
15035 }
15036 }
15037
15038 return TRUE;
15039 }
15040
15041 /* Output mapping symbols for linker generated sections,
15042 and for those data-only sections that do not have a
15043 $d. */
15044
15045 static bfd_boolean
15046 elf32_arm_output_arch_local_syms (bfd *output_bfd,
15047 struct bfd_link_info *info,
15048 void *flaginfo,
15049 int (*func) (void *, const char *,
15050 Elf_Internal_Sym *,
15051 asection *,
15052 struct elf_link_hash_entry *))
15053 {
15054 output_arch_syminfo osi;
15055 struct elf32_arm_link_hash_table *htab;
15056 bfd_vma offset;
15057 bfd_size_type size;
15058 bfd *input_bfd;
15059
15060 htab = elf32_arm_hash_table (info);
15061 if (htab == NULL)
15062 return FALSE;
15063
15064 check_use_blx (htab);
15065
15066 osi.flaginfo = flaginfo;
15067 osi.info = info;
15068 osi.func = func;
15069
15070 /* Add a $d mapping symbol to data-only sections that
15071 don't have any mapping symbol. This may result in (harmless) redundant
15072 mapping symbols. */
15073 for (input_bfd = info->input_bfds;
15074 input_bfd != NULL;
15075 input_bfd = input_bfd->link.next)
15076 {
15077 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15078 for (osi.sec = input_bfd->sections;
15079 osi.sec != NULL;
15080 osi.sec = osi.sec->next)
15081 {
15082 if (osi.sec->output_section != NULL
15083 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15084 != 0)
15085 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15086 == SEC_HAS_CONTENTS
15087 && get_arm_elf_section_data (osi.sec) != NULL
15088 && get_arm_elf_section_data (osi.sec)->mapcount == 0
15089 && osi.sec->size > 0
15090 && (osi.sec->flags & SEC_EXCLUDE) == 0)
15091 {
15092 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15093 (output_bfd, osi.sec->output_section);
15094 if (osi.sec_shndx != (int)SHN_BAD)
15095 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15096 }
15097 }
15098 }
15099
15100 /* ARM->Thumb glue. */
15101 if (htab->arm_glue_size > 0)
15102 {
15103 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15104 ARM2THUMB_GLUE_SECTION_NAME);
15105
15106 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15107 (output_bfd, osi.sec->output_section);
15108 if (info->shared || htab->root.is_relocatable_executable
15109 || htab->pic_veneer)
15110 size = ARM2THUMB_PIC_GLUE_SIZE;
15111 else if (htab->use_blx)
15112 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15113 else
15114 size = ARM2THUMB_STATIC_GLUE_SIZE;
15115
15116 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15117 {
15118 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15119 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
15120 }
15121 }
15122
15123 /* Thumb->ARM glue. */
15124 if (htab->thumb_glue_size > 0)
15125 {
15126 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15127 THUMB2ARM_GLUE_SECTION_NAME);
15128
15129 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15130 (output_bfd, osi.sec->output_section);
15131 size = THUMB2ARM_GLUE_SIZE;
15132
15133 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15134 {
15135 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15136 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
15137 }
15138 }
15139
15140 /* ARMv4 BX veneers. */
15141 if (htab->bx_glue_size > 0)
15142 {
15143 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15144 ARM_BX_GLUE_SECTION_NAME);
15145
15146 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15147 (output_bfd, osi.sec->output_section);
15148
15149 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
15150 }
15151
15152 /* Long calls stubs. */
15153 if (htab->stub_bfd && htab->stub_bfd->sections)
15154 {
15155 asection* stub_sec;
15156
15157 for (stub_sec = htab->stub_bfd->sections;
15158 stub_sec != NULL;
15159 stub_sec = stub_sec->next)
15160 {
15161 /* Ignore non-stub sections. */
15162 if (!strstr (stub_sec->name, STUB_SUFFIX))
15163 continue;
15164
15165 osi.sec = stub_sec;
15166
15167 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15168 (output_bfd, osi.sec->output_section);
15169
15170 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15171 }
15172 }
15173
15174 /* Finally, output mapping symbols for the PLT. */
15175 if (htab->root.splt && htab->root.splt->size > 0)
15176 {
15177 osi.sec = htab->root.splt;
15178 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15179 (output_bfd, osi.sec->output_section));
15180
15181 /* Output mapping symbols for the plt header. SymbianOS does not have a
15182 plt header. */
15183 if (htab->vxworks_p)
15184 {
15185 /* VxWorks shared libraries have no PLT header. */
15186 if (!info->shared)
15187 {
15188 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15189 return FALSE;
15190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15191 return FALSE;
15192 }
15193 }
15194 else if (htab->nacl_p)
15195 {
15196 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15197 return FALSE;
15198 }
15199 else if (using_thumb_only (htab))
15200 {
15201 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
15202 return FALSE;
15203 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15204 return FALSE;
15205 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
15206 return FALSE;
15207 }
15208 else if (!htab->symbian_p)
15209 {
15210 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15211 return FALSE;
15212 #ifndef FOUR_WORD_PLT
15213 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
15214 return FALSE;
15215 #endif
15216 }
15217 }
15218 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15219 {
15220 /* NaCl uses a special first entry in .iplt too. */
15221 osi.sec = htab->root.iplt;
15222 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15223 (output_bfd, osi.sec->output_section));
15224 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15225 return FALSE;
15226 }
15227 if ((htab->root.splt && htab->root.splt->size > 0)
15228 || (htab->root.iplt && htab->root.iplt->size > 0))
15229 {
15230 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15231 for (input_bfd = info->input_bfds;
15232 input_bfd != NULL;
15233 input_bfd = input_bfd->link.next)
15234 {
15235 struct arm_local_iplt_info **local_iplt;
15236 unsigned int i, num_syms;
15237
15238 local_iplt = elf32_arm_local_iplt (input_bfd);
15239 if (local_iplt != NULL)
15240 {
15241 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15242 for (i = 0; i < num_syms; i++)
15243 if (local_iplt[i] != NULL
15244 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15245 &local_iplt[i]->root,
15246 &local_iplt[i]->arm))
15247 return FALSE;
15248 }
15249 }
15250 }
15251 if (htab->dt_tlsdesc_plt != 0)
15252 {
15253 /* Mapping symbols for the lazy tls trampoline. */
15254 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15255 return FALSE;
15256
15257 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15258 htab->dt_tlsdesc_plt + 24))
15259 return FALSE;
15260 }
15261 if (htab->tls_trampoline != 0)
15262 {
15263 /* Mapping symbols for the tls trampoline. */
15264 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15265 return FALSE;
15266 #ifdef FOUR_WORD_PLT
15267 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15268 htab->tls_trampoline + 12))
15269 return FALSE;
15270 #endif
15271 }
15272
15273 return TRUE;
15274 }
15275
15276 /* Allocate target specific section data. */
15277
15278 static bfd_boolean
15279 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15280 {
15281 if (!sec->used_by_bfd)
15282 {
15283 _arm_elf_section_data *sdata;
15284 bfd_size_type amt = sizeof (*sdata);
15285
15286 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
15287 if (sdata == NULL)
15288 return FALSE;
15289 sec->used_by_bfd = sdata;
15290 }
15291
15292 return _bfd_elf_new_section_hook (abfd, sec);
15293 }
15294
15295
15296 /* Used to order a list of mapping symbols by address. */
15297
15298 static int
15299 elf32_arm_compare_mapping (const void * a, const void * b)
15300 {
15301 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15302 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15303
15304 if (amap->vma > bmap->vma)
15305 return 1;
15306 else if (amap->vma < bmap->vma)
15307 return -1;
15308 else if (amap->type > bmap->type)
15309 /* Ensure results do not depend on the host qsort for objects with
15310 multiple mapping symbols at the same address by sorting on type
15311 after vma. */
15312 return 1;
15313 else if (amap->type < bmap->type)
15314 return -1;
15315 else
15316 return 0;
15317 }
15318
15319 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15320
15321 static unsigned long
15322 offset_prel31 (unsigned long addr, bfd_vma offset)
15323 {
15324 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15325 }
15326
15327 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15328 relocations. */
15329
15330 static void
15331 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15332 {
15333 unsigned long first_word = bfd_get_32 (output_bfd, from);
15334 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15335
15336 /* High bit of first word is supposed to be zero. */
15337 if ((first_word & 0x80000000ul) == 0)
15338 first_word = offset_prel31 (first_word, offset);
15339
15340 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15341 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15342 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15343 second_word = offset_prel31 (second_word, offset);
15344
15345 bfd_put_32 (output_bfd, first_word, to);
15346 bfd_put_32 (output_bfd, second_word, to + 4);
15347 }
15348
15349 /* Data for make_branch_to_a8_stub(). */
15350
15351 struct a8_branch_to_stub_data
15352 {
15353 asection *writing_section;
15354 bfd_byte *contents;
15355 };
15356
15357
15358 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15359 places for a particular section. */
15360
15361 static bfd_boolean
15362 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15363 void *in_arg)
15364 {
15365 struct elf32_arm_stub_hash_entry *stub_entry;
15366 struct a8_branch_to_stub_data *data;
15367 bfd_byte *contents;
15368 unsigned long branch_insn;
15369 bfd_vma veneered_insn_loc, veneer_entry_loc;
15370 bfd_signed_vma branch_offset;
15371 bfd *abfd;
15372 unsigned int target;
15373
15374 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15375 data = (struct a8_branch_to_stub_data *) in_arg;
15376
15377 if (stub_entry->target_section != data->writing_section
15378 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15379 return TRUE;
15380
15381 contents = data->contents;
15382
15383 veneered_insn_loc = stub_entry->target_section->output_section->vma
15384 + stub_entry->target_section->output_offset
15385 + stub_entry->target_value;
15386
15387 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15388 + stub_entry->stub_sec->output_offset
15389 + stub_entry->stub_offset;
15390
15391 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15392 veneered_insn_loc &= ~3u;
15393
15394 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15395
15396 abfd = stub_entry->target_section->owner;
15397 target = stub_entry->target_value;
15398
15399 /* We attempt to avoid this condition by setting stubs_always_after_branch
15400 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15401 This check is just to be on the safe side... */
15402 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15403 {
15404 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15405 "allocated in unsafe location"), abfd);
15406 return FALSE;
15407 }
15408
15409 switch (stub_entry->stub_type)
15410 {
15411 case arm_stub_a8_veneer_b:
15412 case arm_stub_a8_veneer_b_cond:
15413 branch_insn = 0xf0009000;
15414 goto jump24;
15415
15416 case arm_stub_a8_veneer_blx:
15417 branch_insn = 0xf000e800;
15418 goto jump24;
15419
15420 case arm_stub_a8_veneer_bl:
15421 {
15422 unsigned int i1, j1, i2, j2, s;
15423
15424 branch_insn = 0xf000d000;
15425
15426 jump24:
15427 if (branch_offset < -16777216 || branch_offset > 16777214)
15428 {
15429 /* There's not much we can do apart from complain if this
15430 happens. */
15431 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15432 "of range (input file too large)"), abfd);
15433 return FALSE;
15434 }
15435
15436 /* i1 = not(j1 eor s), so:
15437 not i1 = j1 eor s
15438 j1 = (not i1) eor s. */
15439
15440 branch_insn |= (branch_offset >> 1) & 0x7ff;
15441 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15442 i2 = (branch_offset >> 22) & 1;
15443 i1 = (branch_offset >> 23) & 1;
15444 s = (branch_offset >> 24) & 1;
15445 j1 = (!i1) ^ s;
15446 j2 = (!i2) ^ s;
15447 branch_insn |= j2 << 11;
15448 branch_insn |= j1 << 13;
15449 branch_insn |= s << 26;
15450 }
15451 break;
15452
15453 default:
15454 BFD_FAIL ();
15455 return FALSE;
15456 }
15457
15458 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15459 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15460
15461 return TRUE;
15462 }
15463
15464 /* Do code byteswapping. Return FALSE afterwards so that the section is
15465 written out as normal. */
15466
15467 static bfd_boolean
15468 elf32_arm_write_section (bfd *output_bfd,
15469 struct bfd_link_info *link_info,
15470 asection *sec,
15471 bfd_byte *contents)
15472 {
15473 unsigned int mapcount, errcount;
15474 _arm_elf_section_data *arm_data;
15475 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15476 elf32_arm_section_map *map;
15477 elf32_vfp11_erratum_list *errnode;
15478 bfd_vma ptr;
15479 bfd_vma end;
15480 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15481 bfd_byte tmp;
15482 unsigned int i;
15483
15484 if (globals == NULL)
15485 return FALSE;
15486
15487 /* If this section has not been allocated an _arm_elf_section_data
15488 structure then we cannot record anything. */
15489 arm_data = get_arm_elf_section_data (sec);
15490 if (arm_data == NULL)
15491 return FALSE;
15492
15493 mapcount = arm_data->mapcount;
15494 map = arm_data->map;
15495 errcount = arm_data->erratumcount;
15496
15497 if (errcount != 0)
15498 {
15499 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15500
15501 for (errnode = arm_data->erratumlist; errnode != 0;
15502 errnode = errnode->next)
15503 {
15504 bfd_vma target = errnode->vma - offset;
15505
15506 switch (errnode->type)
15507 {
15508 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15509 {
15510 bfd_vma branch_to_veneer;
15511 /* Original condition code of instruction, plus bit mask for
15512 ARM B instruction. */
15513 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15514 | 0x0a000000;
15515
15516 /* The instruction is before the label. */
15517 target -= 4;
15518
15519 /* Above offset included in -4 below. */
15520 branch_to_veneer = errnode->u.b.veneer->vma
15521 - errnode->vma - 4;
15522
15523 if ((signed) branch_to_veneer < -(1 << 25)
15524 || (signed) branch_to_veneer >= (1 << 25))
15525 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15526 "range"), output_bfd);
15527
15528 insn |= (branch_to_veneer >> 2) & 0xffffff;
15529 contents[endianflip ^ target] = insn & 0xff;
15530 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15531 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15532 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15533 }
15534 break;
15535
15536 case VFP11_ERRATUM_ARM_VENEER:
15537 {
15538 bfd_vma branch_from_veneer;
15539 unsigned int insn;
15540
15541 /* Take size of veneer into account. */
15542 branch_from_veneer = errnode->u.v.branch->vma
15543 - errnode->vma - 12;
15544
15545 if ((signed) branch_from_veneer < -(1 << 25)
15546 || (signed) branch_from_veneer >= (1 << 25))
15547 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15548 "range"), output_bfd);
15549
15550 /* Original instruction. */
15551 insn = errnode->u.v.branch->u.b.vfp_insn;
15552 contents[endianflip ^ target] = insn & 0xff;
15553 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15554 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15555 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15556
15557 /* Branch back to insn after original insn. */
15558 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15559 contents[endianflip ^ (target + 4)] = insn & 0xff;
15560 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15561 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15562 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15563 }
15564 break;
15565
15566 default:
15567 abort ();
15568 }
15569 }
15570 }
15571
15572 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15573 {
15574 arm_unwind_table_edit *edit_node
15575 = arm_data->u.exidx.unwind_edit_list;
15576 /* Now, sec->size is the size of the section we will write. The original
15577 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15578 markers) was sec->rawsize. (This isn't the case if we perform no
15579 edits, then rawsize will be zero and we should use size). */
15580 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15581 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15582 unsigned int in_index, out_index;
15583 bfd_vma add_to_offsets = 0;
15584
15585 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15586 {
15587 if (edit_node)
15588 {
15589 unsigned int edit_index = edit_node->index;
15590
15591 if (in_index < edit_index && in_index * 8 < input_size)
15592 {
15593 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15594 contents + in_index * 8, add_to_offsets);
15595 out_index++;
15596 in_index++;
15597 }
15598 else if (in_index == edit_index
15599 || (in_index * 8 >= input_size
15600 && edit_index == UINT_MAX))
15601 {
15602 switch (edit_node->type)
15603 {
15604 case DELETE_EXIDX_ENTRY:
15605 in_index++;
15606 add_to_offsets += 8;
15607 break;
15608
15609 case INSERT_EXIDX_CANTUNWIND_AT_END:
15610 {
15611 asection *text_sec = edit_node->linked_section;
15612 bfd_vma text_offset = text_sec->output_section->vma
15613 + text_sec->output_offset
15614 + text_sec->size;
15615 bfd_vma exidx_offset = offset + out_index * 8;
15616 unsigned long prel31_offset;
15617
15618 /* Note: this is meant to be equivalent to an
15619 R_ARM_PREL31 relocation. These synthetic
15620 EXIDX_CANTUNWIND markers are not relocated by the
15621 usual BFD method. */
15622 prel31_offset = (text_offset - exidx_offset)
15623 & 0x7ffffffful;
15624
15625 /* First address we can't unwind. */
15626 bfd_put_32 (output_bfd, prel31_offset,
15627 &edited_contents[out_index * 8]);
15628
15629 /* Code for EXIDX_CANTUNWIND. */
15630 bfd_put_32 (output_bfd, 0x1,
15631 &edited_contents[out_index * 8 + 4]);
15632
15633 out_index++;
15634 add_to_offsets -= 8;
15635 }
15636 break;
15637 }
15638
15639 edit_node = edit_node->next;
15640 }
15641 }
15642 else
15643 {
15644 /* No more edits, copy remaining entries verbatim. */
15645 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15646 contents + in_index * 8, add_to_offsets);
15647 out_index++;
15648 in_index++;
15649 }
15650 }
15651
15652 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15653 bfd_set_section_contents (output_bfd, sec->output_section,
15654 edited_contents,
15655 (file_ptr) sec->output_offset, sec->size);
15656
15657 return TRUE;
15658 }
15659
15660 /* Fix code to point to Cortex-A8 erratum stubs. */
15661 if (globals->fix_cortex_a8)
15662 {
15663 struct a8_branch_to_stub_data data;
15664
15665 data.writing_section = sec;
15666 data.contents = contents;
15667
15668 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15669 &data);
15670 }
15671
15672 if (mapcount == 0)
15673 return FALSE;
15674
15675 if (globals->byteswap_code)
15676 {
15677 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15678
15679 ptr = map[0].vma;
15680 for (i = 0; i < mapcount; i++)
15681 {
15682 if (i == mapcount - 1)
15683 end = sec->size;
15684 else
15685 end = map[i + 1].vma;
15686
15687 switch (map[i].type)
15688 {
15689 case 'a':
15690 /* Byte swap code words. */
15691 while (ptr + 3 < end)
15692 {
15693 tmp = contents[ptr];
15694 contents[ptr] = contents[ptr + 3];
15695 contents[ptr + 3] = tmp;
15696 tmp = contents[ptr + 1];
15697 contents[ptr + 1] = contents[ptr + 2];
15698 contents[ptr + 2] = tmp;
15699 ptr += 4;
15700 }
15701 break;
15702
15703 case 't':
15704 /* Byte swap code halfwords. */
15705 while (ptr + 1 < end)
15706 {
15707 tmp = contents[ptr];
15708 contents[ptr] = contents[ptr + 1];
15709 contents[ptr + 1] = tmp;
15710 ptr += 2;
15711 }
15712 break;
15713
15714 case 'd':
15715 /* Leave data alone. */
15716 break;
15717 }
15718 ptr = end;
15719 }
15720 }
15721
15722 free (map);
15723 arm_data->mapcount = -1;
15724 arm_data->mapsize = 0;
15725 arm_data->map = NULL;
15726
15727 return FALSE;
15728 }
15729
15730 /* Mangle thumb function symbols as we read them in. */
15731
15732 static bfd_boolean
15733 elf32_arm_swap_symbol_in (bfd * abfd,
15734 const void *psrc,
15735 const void *pshn,
15736 Elf_Internal_Sym *dst)
15737 {
15738 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15739 return FALSE;
15740
15741 /* New EABI objects mark thumb function symbols by setting the low bit of
15742 the address. */
15743 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15744 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15745 {
15746 if (dst->st_value & 1)
15747 {
15748 dst->st_value &= ~(bfd_vma) 1;
15749 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15750 }
15751 else
15752 dst->st_target_internal = ST_BRANCH_TO_ARM;
15753 }
15754 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15755 {
15756 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15757 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15758 }
15759 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15760 dst->st_target_internal = ST_BRANCH_LONG;
15761 else
15762 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15763
15764 return TRUE;
15765 }
15766
15767
15768 /* Mangle thumb function symbols as we write them out. */
15769
15770 static void
15771 elf32_arm_swap_symbol_out (bfd *abfd,
15772 const Elf_Internal_Sym *src,
15773 void *cdst,
15774 void *shndx)
15775 {
15776 Elf_Internal_Sym newsym;
15777
15778 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15779 of the address set, as per the new EABI. We do this unconditionally
15780 because objcopy does not set the elf header flags until after
15781 it writes out the symbol table. */
15782 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15783 {
15784 newsym = *src;
15785 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15786 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15787 if (newsym.st_shndx != SHN_UNDEF)
15788 {
15789 /* Do this only for defined symbols. At link type, the static
15790 linker will simulate the work of dynamic linker of resolving
15791 symbols and will carry over the thumbness of found symbols to
15792 the output symbol table. It's not clear how it happens, but
15793 the thumbness of undefined symbols can well be different at
15794 runtime, and writing '1' for them will be confusing for users
15795 and possibly for dynamic linker itself.
15796 */
15797 newsym.st_value |= 1;
15798 }
15799
15800 src = &newsym;
15801 }
15802 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15803 }
15804
15805 /* Add the PT_ARM_EXIDX program header. */
15806
15807 static bfd_boolean
15808 elf32_arm_modify_segment_map (bfd *abfd,
15809 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15810 {
15811 struct elf_segment_map *m;
15812 asection *sec;
15813
15814 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15815 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15816 {
15817 /* If there is already a PT_ARM_EXIDX header, then we do not
15818 want to add another one. This situation arises when running
15819 "strip"; the input binary already has the header. */
15820 m = elf_seg_map (abfd);
15821 while (m && m->p_type != PT_ARM_EXIDX)
15822 m = m->next;
15823 if (!m)
15824 {
15825 m = (struct elf_segment_map *)
15826 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15827 if (m == NULL)
15828 return FALSE;
15829 m->p_type = PT_ARM_EXIDX;
15830 m->count = 1;
15831 m->sections[0] = sec;
15832
15833 m->next = elf_seg_map (abfd);
15834 elf_seg_map (abfd) = m;
15835 }
15836 }
15837
15838 return TRUE;
15839 }
15840
15841 /* We may add a PT_ARM_EXIDX program header. */
15842
15843 static int
15844 elf32_arm_additional_program_headers (bfd *abfd,
15845 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15846 {
15847 asection *sec;
15848
15849 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15850 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15851 return 1;
15852 else
15853 return 0;
15854 }
15855
15856 /* Hook called by the linker routine which adds symbols from an object
15857 file. */
15858
15859 static bfd_boolean
15860 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15861 Elf_Internal_Sym *sym, const char **namep,
15862 flagword *flagsp, asection **secp, bfd_vma *valp)
15863 {
15864 if ((abfd->flags & DYNAMIC) == 0
15865 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15866 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15867 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15868
15869 if (elf32_arm_hash_table (info) == NULL)
15870 return FALSE;
15871
15872 if (elf32_arm_hash_table (info)->vxworks_p
15873 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15874 flagsp, secp, valp))
15875 return FALSE;
15876
15877 return TRUE;
15878 }
15879
15880 /* We use this to override swap_symbol_in and swap_symbol_out. */
15881 const struct elf_size_info elf32_arm_size_info =
15882 {
15883 sizeof (Elf32_External_Ehdr),
15884 sizeof (Elf32_External_Phdr),
15885 sizeof (Elf32_External_Shdr),
15886 sizeof (Elf32_External_Rel),
15887 sizeof (Elf32_External_Rela),
15888 sizeof (Elf32_External_Sym),
15889 sizeof (Elf32_External_Dyn),
15890 sizeof (Elf_External_Note),
15891 4,
15892 1,
15893 32, 2,
15894 ELFCLASS32, EV_CURRENT,
15895 bfd_elf32_write_out_phdrs,
15896 bfd_elf32_write_shdrs_and_ehdr,
15897 bfd_elf32_checksum_contents,
15898 bfd_elf32_write_relocs,
15899 elf32_arm_swap_symbol_in,
15900 elf32_arm_swap_symbol_out,
15901 bfd_elf32_slurp_reloc_table,
15902 bfd_elf32_slurp_symbol_table,
15903 bfd_elf32_swap_dyn_in,
15904 bfd_elf32_swap_dyn_out,
15905 bfd_elf32_swap_reloc_in,
15906 bfd_elf32_swap_reloc_out,
15907 bfd_elf32_swap_reloca_in,
15908 bfd_elf32_swap_reloca_out
15909 };
15910
15911 /* Return size of plt0 entry starting at ADDR
15912 or (bfd_vma) -1 if size can not be determined. */
15913
15914 static bfd_vma
15915 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
15916 {
15917 bfd_vma first_word;
15918 bfd_vma plt0_size;
15919
15920 first_word = H_GET_32 (abfd, addr);
15921
15922 if (first_word == elf32_arm_plt0_entry[0])
15923 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
15924 else if (first_word == elf32_thumb2_plt0_entry[0])
15925 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
15926 else
15927 /* We don't yet handle this PLT format. */
15928 return (bfd_vma) -1;
15929
15930 return plt0_size;
15931 }
15932
15933 /* Return size of plt entry starting at offset OFFSET
15934 of plt section located at address START
15935 or (bfd_vma) -1 if size can not be determined. */
15936
15937 static bfd_vma
15938 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
15939 {
15940 bfd_vma first_insn;
15941 bfd_vma plt_size = 0;
15942 const bfd_byte *addr = start + offset;
15943
15944 /* PLT entry size if fixed on Thumb-only platforms. */
15945 if (H_GET_32(abfd, start) == elf32_thumb2_plt0_entry[0])
15946 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
15947
15948 /* Respect Thumb stub if necessary. */
15949 if (H_GET_16(abfd, addr) == elf32_arm_plt_thumb_stub[0])
15950 {
15951 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
15952 }
15953
15954 /* Strip immediate from first add. */
15955 first_insn = H_GET_32(abfd, addr + plt_size) & 0xffffff00;
15956
15957 #ifdef FOUR_WORD_PLT
15958 if (first_insn == elf32_arm_plt_entry[0])
15959 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
15960 #else
15961 if (first_insn == elf32_arm_plt_entry_long[0])
15962 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
15963 else if (first_insn == elf32_arm_plt_entry_short[0])
15964 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
15965 #endif
15966 else
15967 /* We don't yet handle this PLT format. */
15968 return (bfd_vma) -1;
15969
15970 return plt_size;
15971 }
15972
15973 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
15974
15975 static long
15976 elf32_arm_get_synthetic_symtab (bfd *abfd,
15977 long symcount ATTRIBUTE_UNUSED,
15978 asymbol **syms ATTRIBUTE_UNUSED,
15979 long dynsymcount,
15980 asymbol **dynsyms,
15981 asymbol **ret)
15982 {
15983 asection *relplt;
15984 asymbol *s;
15985 arelent *p;
15986 long count, i, n;
15987 size_t size;
15988 Elf_Internal_Shdr *hdr;
15989 char *names;
15990 asection *plt;
15991 bfd_vma offset;
15992 bfd_byte *data;
15993
15994 *ret = NULL;
15995
15996 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
15997 return 0;
15998
15999 if (dynsymcount <= 0)
16000 return 0;
16001
16002 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
16003 if (relplt == NULL)
16004 return 0;
16005
16006 hdr = &elf_section_data (relplt)->this_hdr;
16007 if (hdr->sh_link != elf_dynsymtab (abfd)
16008 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
16009 return 0;
16010
16011 plt = bfd_get_section_by_name (abfd, ".plt");
16012 if (plt == NULL)
16013 return 0;
16014
16015 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
16016 return -1;
16017
16018 data = plt->contents;
16019 if (data == NULL)
16020 {
16021 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
16022 return -1;
16023 bfd_cache_section_contents((asection *) plt, data);
16024 }
16025
16026 count = relplt->size / hdr->sh_entsize;
16027 size = count * sizeof (asymbol);
16028 p = relplt->relocation;
16029 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16030 {
16031 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
16032 if (p->addend != 0)
16033 size += sizeof ("+0x") - 1 + 8;
16034 }
16035
16036 s = *ret = (asymbol *) bfd_malloc (size);
16037 if (s == NULL)
16038 return -1;
16039
16040 offset = elf32_arm_plt0_size (abfd, data);
16041 if (offset == (bfd_vma) -1)
16042 return -1;
16043
16044 names = (char *) (s + count);
16045 p = relplt->relocation;
16046 n = 0;
16047 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16048 {
16049 size_t len;
16050
16051 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
16052 if (plt_size == (bfd_vma) -1)
16053 break;
16054
16055 *s = **p->sym_ptr_ptr;
16056 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
16057 we are defining a symbol, ensure one of them is set. */
16058 if ((s->flags & BSF_LOCAL) == 0)
16059 s->flags |= BSF_GLOBAL;
16060 s->flags |= BSF_SYNTHETIC;
16061 s->section = plt;
16062 s->value = offset;
16063 s->name = names;
16064 s->udata.p = NULL;
16065 len = strlen ((*p->sym_ptr_ptr)->name);
16066 memcpy (names, (*p->sym_ptr_ptr)->name, len);
16067 names += len;
16068 if (p->addend != 0)
16069 {
16070 char buf[30], *a;
16071
16072 memcpy (names, "+0x", sizeof ("+0x") - 1);
16073 names += sizeof ("+0x") - 1;
16074 bfd_sprintf_vma (abfd, buf, p->addend);
16075 for (a = buf; *a == '0'; ++a)
16076 ;
16077 len = strlen (a);
16078 memcpy (names, a, len);
16079 names += len;
16080 }
16081 memcpy (names, "@plt", sizeof ("@plt"));
16082 names += sizeof ("@plt");
16083 ++s, ++n;
16084 offset += plt_size;
16085 }
16086
16087 return n;
16088 }
16089
16090 #define ELF_ARCH bfd_arch_arm
16091 #define ELF_TARGET_ID ARM_ELF_DATA
16092 #define ELF_MACHINE_CODE EM_ARM
16093 #ifdef __QNXTARGET__
16094 #define ELF_MAXPAGESIZE 0x1000
16095 #else
16096 #define ELF_MAXPAGESIZE 0x8000
16097 #endif
16098 #define ELF_MINPAGESIZE 0x1000
16099 #define ELF_COMMONPAGESIZE 0x1000
16100
16101 #define bfd_elf32_mkobject elf32_arm_mkobject
16102
16103 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
16104 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
16105 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
16106 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
16107 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
16108 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_link_hash_table_free
16109 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
16110 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
16111 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
16112 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
16113 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
16114 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
16115 #define bfd_elf32_bfd_final_link elf32_arm_final_link
16116 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
16117
16118 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
16119 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
16120 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
16121 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
16122 #define elf_backend_check_relocs elf32_arm_check_relocs
16123 #define elf_backend_relocate_section elf32_arm_relocate_section
16124 #define elf_backend_write_section elf32_arm_write_section
16125 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
16126 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
16127 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
16128 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
16129 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
16130 #define elf_backend_always_size_sections elf32_arm_always_size_sections
16131 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
16132 #define elf_backend_post_process_headers elf32_arm_post_process_headers
16133 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
16134 #define elf_backend_object_p elf32_arm_object_p
16135 #define elf_backend_fake_sections elf32_arm_fake_sections
16136 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
16137 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16138 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
16139 #define elf_backend_size_info elf32_arm_size_info
16140 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16141 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
16142 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
16143 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
16144 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
16145
16146 #define elf_backend_can_refcount 1
16147 #define elf_backend_can_gc_sections 1
16148 #define elf_backend_plt_readonly 1
16149 #define elf_backend_want_got_plt 1
16150 #define elf_backend_want_plt_sym 0
16151 #define elf_backend_may_use_rel_p 1
16152 #define elf_backend_may_use_rela_p 0
16153 #define elf_backend_default_use_rela_p 0
16154
16155 #define elf_backend_got_header_size 12
16156
16157 #undef elf_backend_obj_attrs_vendor
16158 #define elf_backend_obj_attrs_vendor "aeabi"
16159 #undef elf_backend_obj_attrs_section
16160 #define elf_backend_obj_attrs_section ".ARM.attributes"
16161 #undef elf_backend_obj_attrs_arg_type
16162 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
16163 #undef elf_backend_obj_attrs_section_type
16164 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
16165 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
16166 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
16167
16168 #include "elf32-target.h"
16169
16170 /* Native Client targets. */
16171
16172 #undef TARGET_LITTLE_SYM
16173 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
16174 #undef TARGET_LITTLE_NAME
16175 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
16176 #undef TARGET_BIG_SYM
16177 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
16178 #undef TARGET_BIG_NAME
16179 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
16180
16181 /* Like elf32_arm_link_hash_table_create -- but overrides
16182 appropriately for NaCl. */
16183
16184 static struct bfd_link_hash_table *
16185 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
16186 {
16187 struct bfd_link_hash_table *ret;
16188
16189 ret = elf32_arm_link_hash_table_create (abfd);
16190 if (ret)
16191 {
16192 struct elf32_arm_link_hash_table *htab
16193 = (struct elf32_arm_link_hash_table *) ret;
16194
16195 htab->nacl_p = 1;
16196
16197 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
16198 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
16199 }
16200 return ret;
16201 }
16202
16203 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
16204 really need to use elf32_arm_modify_segment_map. But we do it
16205 anyway just to reduce gratuitous differences with the stock ARM backend. */
16206
16207 static bfd_boolean
16208 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
16209 {
16210 return (elf32_arm_modify_segment_map (abfd, info)
16211 && nacl_modify_segment_map (abfd, info));
16212 }
16213
16214 static void
16215 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
16216 {
16217 elf32_arm_final_write_processing (abfd, linker);
16218 nacl_final_write_processing (abfd, linker);
16219 }
16220
16221 static bfd_vma
16222 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
16223 const arelent *rel ATTRIBUTE_UNUSED)
16224 {
16225 return plt->vma
16226 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
16227 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
16228 }
16229
16230 #undef elf32_bed
16231 #define elf32_bed elf32_arm_nacl_bed
16232 #undef bfd_elf32_bfd_link_hash_table_create
16233 #define bfd_elf32_bfd_link_hash_table_create \
16234 elf32_arm_nacl_link_hash_table_create
16235 #undef elf_backend_plt_alignment
16236 #define elf_backend_plt_alignment 4
16237 #undef elf_backend_modify_segment_map
16238 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
16239 #undef elf_backend_modify_program_headers
16240 #define elf_backend_modify_program_headers nacl_modify_program_headers
16241 #undef elf_backend_final_write_processing
16242 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
16243 #undef bfd_elf32_get_synthetic_symtab
16244 #undef elf_backend_plt_sym_val
16245 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
16246
16247 #undef ELF_MAXPAGESIZE
16248 #define ELF_MAXPAGESIZE 0x10000
16249 #undef ELF_MINPAGESIZE
16250 #undef ELF_COMMONPAGESIZE
16251
16252
16253 #include "elf32-target.h"
16254
16255 /* Reset to defaults. */
16256 #undef elf_backend_plt_alignment
16257 #undef elf_backend_modify_segment_map
16258 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16259 #undef elf_backend_modify_program_headers
16260 #undef elf_backend_final_write_processing
16261 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16262 #undef ELF_MINPAGESIZE
16263 #define ELF_MINPAGESIZE 0x1000
16264 #undef ELF_COMMONPAGESIZE
16265 #define ELF_COMMONPAGESIZE 0x1000
16266
16267
16268 /* VxWorks Targets. */
16269
16270 #undef TARGET_LITTLE_SYM
16271 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
16272 #undef TARGET_LITTLE_NAME
16273 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
16274 #undef TARGET_BIG_SYM
16275 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
16276 #undef TARGET_BIG_NAME
16277 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
16278
16279 /* Like elf32_arm_link_hash_table_create -- but overrides
16280 appropriately for VxWorks. */
16281
16282 static struct bfd_link_hash_table *
16283 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
16284 {
16285 struct bfd_link_hash_table *ret;
16286
16287 ret = elf32_arm_link_hash_table_create (abfd);
16288 if (ret)
16289 {
16290 struct elf32_arm_link_hash_table *htab
16291 = (struct elf32_arm_link_hash_table *) ret;
16292 htab->use_rel = 0;
16293 htab->vxworks_p = 1;
16294 }
16295 return ret;
16296 }
16297
16298 static void
16299 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
16300 {
16301 elf32_arm_final_write_processing (abfd, linker);
16302 elf_vxworks_final_write_processing (abfd, linker);
16303 }
16304
16305 #undef elf32_bed
16306 #define elf32_bed elf32_arm_vxworks_bed
16307
16308 #undef bfd_elf32_bfd_link_hash_table_create
16309 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
16310 #undef elf_backend_final_write_processing
16311 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
16312 #undef elf_backend_emit_relocs
16313 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
16314
16315 #undef elf_backend_may_use_rel_p
16316 #define elf_backend_may_use_rel_p 0
16317 #undef elf_backend_may_use_rela_p
16318 #define elf_backend_may_use_rela_p 1
16319 #undef elf_backend_default_use_rela_p
16320 #define elf_backend_default_use_rela_p 1
16321 #undef elf_backend_want_plt_sym
16322 #define elf_backend_want_plt_sym 1
16323 #undef ELF_MAXPAGESIZE
16324 #define ELF_MAXPAGESIZE 0x1000
16325
16326 #include "elf32-target.h"
16327
16328
16329 /* Merge backend specific data from an object file to the output
16330 object file when linking. */
16331
16332 static bfd_boolean
16333 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
16334 {
16335 flagword out_flags;
16336 flagword in_flags;
16337 bfd_boolean flags_compatible = TRUE;
16338 asection *sec;
16339
16340 /* Check if we have the same endianness. */
16341 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
16342 return FALSE;
16343
16344 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16345 return TRUE;
16346
16347 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16348 return FALSE;
16349
16350 /* The input BFD must have had its flags initialised. */
16351 /* The following seems bogus to me -- The flags are initialized in
16352 the assembler but I don't think an elf_flags_init field is
16353 written into the object. */
16354 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16355
16356 in_flags = elf_elfheader (ibfd)->e_flags;
16357 out_flags = elf_elfheader (obfd)->e_flags;
16358
16359 /* In theory there is no reason why we couldn't handle this. However
16360 in practice it isn't even close to working and there is no real
16361 reason to want it. */
16362 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16363 && !(ibfd->flags & DYNAMIC)
16364 && (in_flags & EF_ARM_BE8))
16365 {
16366 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16367 ibfd);
16368 return FALSE;
16369 }
16370
16371 if (!elf_flags_init (obfd))
16372 {
16373 /* If the input is the default architecture and had the default
16374 flags then do not bother setting the flags for the output
16375 architecture, instead allow future merges to do this. If no
16376 future merges ever set these flags then they will retain their
16377 uninitialised values, which surprise surprise, correspond
16378 to the default values. */
16379 if (bfd_get_arch_info (ibfd)->the_default
16380 && elf_elfheader (ibfd)->e_flags == 0)
16381 return TRUE;
16382
16383 elf_flags_init (obfd) = TRUE;
16384 elf_elfheader (obfd)->e_flags = in_flags;
16385
16386 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16387 && bfd_get_arch_info (obfd)->the_default)
16388 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16389
16390 return TRUE;
16391 }
16392
16393 /* Determine what should happen if the input ARM architecture
16394 does not match the output ARM architecture. */
16395 if (! bfd_arm_merge_machines (ibfd, obfd))
16396 return FALSE;
16397
16398 /* Identical flags must be compatible. */
16399 if (in_flags == out_flags)
16400 return TRUE;
16401
16402 /* Check to see if the input BFD actually contains any sections. If
16403 not, its flags may not have been initialised either, but it
16404 cannot actually cause any incompatiblity. Do not short-circuit
16405 dynamic objects; their section list may be emptied by
16406 elf_link_add_object_symbols.
16407
16408 Also check to see if there are no code sections in the input.
16409 In this case there is no need to check for code specific flags.
16410 XXX - do we need to worry about floating-point format compatability
16411 in data sections ? */
16412 if (!(ibfd->flags & DYNAMIC))
16413 {
16414 bfd_boolean null_input_bfd = TRUE;
16415 bfd_boolean only_data_sections = TRUE;
16416
16417 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16418 {
16419 /* Ignore synthetic glue sections. */
16420 if (strcmp (sec->name, ".glue_7")
16421 && strcmp (sec->name, ".glue_7t"))
16422 {
16423 if ((bfd_get_section_flags (ibfd, sec)
16424 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16425 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16426 only_data_sections = FALSE;
16427
16428 null_input_bfd = FALSE;
16429 break;
16430 }
16431 }
16432
16433 if (null_input_bfd || only_data_sections)
16434 return TRUE;
16435 }
16436
16437 /* Complain about various flag mismatches. */
16438 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16439 EF_ARM_EABI_VERSION (out_flags)))
16440 {
16441 _bfd_error_handler
16442 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16443 ibfd, obfd,
16444 (in_flags & EF_ARM_EABIMASK) >> 24,
16445 (out_flags & EF_ARM_EABIMASK) >> 24);
16446 return FALSE;
16447 }
16448
16449 /* Not sure what needs to be checked for EABI versions >= 1. */
16450 /* VxWorks libraries do not use these flags. */
16451 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16452 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16453 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16454 {
16455 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16456 {
16457 _bfd_error_handler
16458 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16459 ibfd, obfd,
16460 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16461 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16462 flags_compatible = FALSE;
16463 }
16464
16465 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16466 {
16467 if (in_flags & EF_ARM_APCS_FLOAT)
16468 _bfd_error_handler
16469 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16470 ibfd, obfd);
16471 else
16472 _bfd_error_handler
16473 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16474 ibfd, obfd);
16475
16476 flags_compatible = FALSE;
16477 }
16478
16479 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16480 {
16481 if (in_flags & EF_ARM_VFP_FLOAT)
16482 _bfd_error_handler
16483 (_("error: %B uses VFP instructions, whereas %B does not"),
16484 ibfd, obfd);
16485 else
16486 _bfd_error_handler
16487 (_("error: %B uses FPA instructions, whereas %B does not"),
16488 ibfd, obfd);
16489
16490 flags_compatible = FALSE;
16491 }
16492
16493 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16494 {
16495 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16496 _bfd_error_handler
16497 (_("error: %B uses Maverick instructions, whereas %B does not"),
16498 ibfd, obfd);
16499 else
16500 _bfd_error_handler
16501 (_("error: %B does not use Maverick instructions, whereas %B does"),
16502 ibfd, obfd);
16503
16504 flags_compatible = FALSE;
16505 }
16506
16507 #ifdef EF_ARM_SOFT_FLOAT
16508 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16509 {
16510 /* We can allow interworking between code that is VFP format
16511 layout, and uses either soft float or integer regs for
16512 passing floating point arguments and results. We already
16513 know that the APCS_FLOAT flags match; similarly for VFP
16514 flags. */
16515 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16516 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16517 {
16518 if (in_flags & EF_ARM_SOFT_FLOAT)
16519 _bfd_error_handler
16520 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16521 ibfd, obfd);
16522 else
16523 _bfd_error_handler
16524 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16525 ibfd, obfd);
16526
16527 flags_compatible = FALSE;
16528 }
16529 }
16530 #endif
16531
16532 /* Interworking mismatch is only a warning. */
16533 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16534 {
16535 if (in_flags & EF_ARM_INTERWORK)
16536 {
16537 _bfd_error_handler
16538 (_("Warning: %B supports interworking, whereas %B does not"),
16539 ibfd, obfd);
16540 }
16541 else
16542 {
16543 _bfd_error_handler
16544 (_("Warning: %B does not support interworking, whereas %B does"),
16545 ibfd, obfd);
16546 }
16547 }
16548 }
16549
16550 return flags_compatible;
16551 }
16552
16553
16554 /* Symbian OS Targets. */
16555
16556 #undef TARGET_LITTLE_SYM
16557 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
16558 #undef TARGET_LITTLE_NAME
16559 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16560 #undef TARGET_BIG_SYM
16561 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
16562 #undef TARGET_BIG_NAME
16563 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16564
16565 /* Like elf32_arm_link_hash_table_create -- but overrides
16566 appropriately for Symbian OS. */
16567
16568 static struct bfd_link_hash_table *
16569 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16570 {
16571 struct bfd_link_hash_table *ret;
16572
16573 ret = elf32_arm_link_hash_table_create (abfd);
16574 if (ret)
16575 {
16576 struct elf32_arm_link_hash_table *htab
16577 = (struct elf32_arm_link_hash_table *)ret;
16578 /* There is no PLT header for Symbian OS. */
16579 htab->plt_header_size = 0;
16580 /* The PLT entries are each one instruction and one word. */
16581 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16582 htab->symbian_p = 1;
16583 /* Symbian uses armv5t or above, so use_blx is always true. */
16584 htab->use_blx = 1;
16585 htab->root.is_relocatable_executable = 1;
16586 }
16587 return ret;
16588 }
16589
16590 static const struct bfd_elf_special_section
16591 elf32_arm_symbian_special_sections[] =
16592 {
16593 /* In a BPABI executable, the dynamic linking sections do not go in
16594 the loadable read-only segment. The post-linker may wish to
16595 refer to these sections, but they are not part of the final
16596 program image. */
16597 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16598 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16599 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16600 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16601 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16602 /* These sections do not need to be writable as the SymbianOS
16603 postlinker will arrange things so that no dynamic relocation is
16604 required. */
16605 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16606 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16607 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16608 { NULL, 0, 0, 0, 0 }
16609 };
16610
16611 static void
16612 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16613 struct bfd_link_info *link_info)
16614 {
16615 /* BPABI objects are never loaded directly by an OS kernel; they are
16616 processed by a postlinker first, into an OS-specific format. If
16617 the D_PAGED bit is set on the file, BFD will align segments on
16618 page boundaries, so that an OS can directly map the file. With
16619 BPABI objects, that just results in wasted space. In addition,
16620 because we clear the D_PAGED bit, map_sections_to_segments will
16621 recognize that the program headers should not be mapped into any
16622 loadable segment. */
16623 abfd->flags &= ~D_PAGED;
16624 elf32_arm_begin_write_processing (abfd, link_info);
16625 }
16626
16627 static bfd_boolean
16628 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16629 struct bfd_link_info *info)
16630 {
16631 struct elf_segment_map *m;
16632 asection *dynsec;
16633
16634 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16635 segment. However, because the .dynamic section is not marked
16636 with SEC_LOAD, the generic ELF code will not create such a
16637 segment. */
16638 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16639 if (dynsec)
16640 {
16641 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16642 if (m->p_type == PT_DYNAMIC)
16643 break;
16644
16645 if (m == NULL)
16646 {
16647 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16648 m->next = elf_seg_map (abfd);
16649 elf_seg_map (abfd) = m;
16650 }
16651 }
16652
16653 /* Also call the generic arm routine. */
16654 return elf32_arm_modify_segment_map (abfd, info);
16655 }
16656
16657 /* Return address for Ith PLT stub in section PLT, for relocation REL
16658 or (bfd_vma) -1 if it should not be included. */
16659
16660 static bfd_vma
16661 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16662 const arelent *rel ATTRIBUTE_UNUSED)
16663 {
16664 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16665 }
16666
16667
16668 #undef elf32_bed
16669 #define elf32_bed elf32_arm_symbian_bed
16670
16671 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16672 will process them and then discard them. */
16673 #undef ELF_DYNAMIC_SEC_FLAGS
16674 #define ELF_DYNAMIC_SEC_FLAGS \
16675 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16676
16677 #undef elf_backend_emit_relocs
16678
16679 #undef bfd_elf32_bfd_link_hash_table_create
16680 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16681 #undef elf_backend_special_sections
16682 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16683 #undef elf_backend_begin_write_processing
16684 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16685 #undef elf_backend_final_write_processing
16686 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16687
16688 #undef elf_backend_modify_segment_map
16689 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16690
16691 /* There is no .got section for BPABI objects, and hence no header. */
16692 #undef elf_backend_got_header_size
16693 #define elf_backend_got_header_size 0
16694
16695 /* Similarly, there is no .got.plt section. */
16696 #undef elf_backend_want_got_plt
16697 #define elf_backend_want_got_plt 0
16698
16699 #undef elf_backend_plt_sym_val
16700 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16701
16702 #undef elf_backend_may_use_rel_p
16703 #define elf_backend_may_use_rel_p 1
16704 #undef elf_backend_may_use_rela_p
16705 #define elf_backend_may_use_rela_p 0
16706 #undef elf_backend_default_use_rela_p
16707 #define elf_backend_default_use_rela_p 0
16708 #undef elf_backend_want_plt_sym
16709 #define elf_backend_want_plt_sym 0
16710 #undef ELF_MAXPAGESIZE
16711 #define ELF_MAXPAGESIZE 0x8000
16712
16713 #include "elf32-target.h"
GDB Binutils - Deliverables
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