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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998-2013 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 };
1693
1694 /* 160 onwards: */
1695 static reloc_howto_type elf32_arm_howto_table_2[1] =
1696 {
1697 HOWTO (R_ARM_IRELATIVE, /* type */
1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
1710 };
1711
1712 /* 249-255 extended, currently unused, relocations: */
1713 static reloc_howto_type elf32_arm_howto_table_3[4] =
1714 {
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770 };
1771
1772 static reloc_howto_type *
1773 elf32_arm_howto_from_type (unsigned int r_type)
1774 {
1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1776 return &elf32_arm_howto_table_1[r_type];
1777
1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
1781 if (r_type >= R_ARM_RREL32
1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1784
1785 return NULL;
1786 }
1787
1788 static void
1789 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791 {
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796 }
1797
1798 struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804 /* All entries in this list must also be present in elf32_arm_howto_table. */
1805 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1893 };
1894
1895 static reloc_howto_type *
1896 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
1898 {
1899 unsigned int i;
1900
1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1904
1905 return NULL;
1906 }
1907
1908 static reloc_howto_type *
1909 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911 {
1912 unsigned int i;
1913
1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
1929 return NULL;
1930 }
1931
1932 /* Support for core dump NOTE sections. */
1933
1934 static bfd_boolean
1935 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1936 {
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
1945 case 148: /* Linux/ARM 32-bit. */
1946 /* pr_cursig */
1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
1948
1949 /* pr_pid */
1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962 }
1963
1964 static bfd_boolean
1965 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1966 {
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
1972 case 124: /* Linux/ARM elf_prpsinfo. */
1973 elf_tdata (abfd)->core->pid
1974 = bfd_get_32 (abfd, note->descdata + 12);
1975 elf_tdata (abfd)->core->program
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1977 elf_tdata (abfd)->core->command
1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
1984 {
1985 char *command = elf_tdata (abfd)->core->command;
1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993 }
1994
1995 static char *
1996 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998 {
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041 }
2042
2043 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044 #define TARGET_LITTLE_NAME "elf32-littlearm"
2045 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046 #define TARGET_BIG_NAME "elf32-bigarm"
2047
2048 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2050 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2051
2052 typedef unsigned long int insn32;
2053 typedef unsigned short int insn16;
2054
2055 /* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
2057 #define INTERWORK_FLAG(abfd) \
2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
2061
2062 /* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
2065 name can be changed. The only requirement is the %s be present. */
2066 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
2072 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
2075 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
2078 #define STUB_ENTRY_NAME "__%s_veneer"
2079
2080 /* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
2084 static const unsigned long tls_trampoline [] =
2085 {
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089 };
2090
2091 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2092 {
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2100 + dl_tlsdesc_lazy_resolver(GOT) */
2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102 };
2103
2104 #ifdef FOUR_WORD_PLT
2105
2106 /* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
2108 called before the relocation has been set up calls the dynamic
2109 linker first. */
2110 static const bfd_vma elf32_arm_plt0_entry [] =
2111 {
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116 };
2117
2118 /* Subsequent entries in a procedure linkage table look like
2119 this. */
2120 static const bfd_vma elf32_arm_plt_entry [] =
2121 {
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126 };
2127
2128 #else
2129
2130 /* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
2134 static const bfd_vma elf32_arm_plt0_entry [] =
2135 {
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141 };
2142
2143 /* Subsequent entries in a procedure linkage table look like
2144 this. */
2145 static const bfd_vma elf32_arm_plt_entry [] =
2146 {
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150 };
2151
2152 #endif
2153
2154 /* The format of the first entry in the procedure linkage table
2155 for a VxWorks executable. */
2156 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2157 {
2158 0xe52dc008, /* str ip,[sp,#-8]! */
2159 0xe59fc000, /* ldr ip,[pc] */
2160 0xe59cf008, /* ldr pc,[ip,#8] */
2161 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2162 };
2163
2164 /* The format of subsequent entries in a VxWorks executable. */
2165 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2166 {
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xe59cf000, /* ldr pc,[ip] */
2169 0x00000000, /* .long @got */
2170 0xe59fc000, /* ldr ip,[pc] */
2171 0xea000000, /* b _PLT */
2172 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2173 };
2174
2175 /* The format of entries in a VxWorks shared library. */
2176 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2177 {
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe79cf009, /* ldr pc,[ip,r9] */
2180 0x00000000, /* .long @got */
2181 0xe59fc000, /* ldr ip,[pc] */
2182 0xe599f008, /* ldr pc,[r9,#8] */
2183 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2184 };
2185
2186 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2187 #define PLT_THUMB_STUB_SIZE 4
2188 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2189 {
2190 0x4778, /* bx pc */
2191 0x46c0 /* nop */
2192 };
2193
2194 /* The entries in a PLT when using a DLL-based target with multiple
2195 address spaces. */
2196 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2197 {
2198 0xe51ff004, /* ldr pc, [pc, #-4] */
2199 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2200 };
2201
2202 /* The first entry in a procedure linkage table looks like
2203 this. It is set up so that any shared library function that is
2204 called before the relocation has been set up calls the dynamic
2205 linker first. */
2206 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2207 {
2208 /* First bundle: */
2209 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2210 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2211 0xe08cc00f, /* add ip, ip, pc */
2212 0xe52dc008, /* str ip, [sp, #-8]! */
2213 /* Second bundle: */
2214 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2215 0xe59cc000, /* ldr ip, [ip] */
2216 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2217 0xe12fff1c, /* bx ip */
2218 /* Third bundle: */
2219 0xe320f000, /* nop */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2222 /* .Lplt_tail: */
2223 0xe50dc004, /* str ip, [sp, #-4] */
2224 /* Fourth bundle: */
2225 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2226 0xe59cc000, /* ldr ip, [ip] */
2227 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2228 0xe12fff1c, /* bx ip */
2229 };
2230 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2231
2232 /* Subsequent entries in a procedure linkage table look like this. */
2233 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2234 {
2235 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2236 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2237 0xe08cc00f, /* add ip, ip, pc */
2238 0xea000000, /* b .Lplt_tail */
2239 };
2240
2241 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2242 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2243 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2244 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2245 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2246 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2247
2248 enum stub_insn_type
2249 {
2250 THUMB16_TYPE = 1,
2251 THUMB32_TYPE,
2252 ARM_TYPE,
2253 DATA_TYPE
2254 };
2255
2256 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2257 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2258 is inserted in arm_build_one_stub(). */
2259 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2260 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2261 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2262 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2263 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2264 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2265
2266 typedef struct
2267 {
2268 bfd_vma data;
2269 enum stub_insn_type type;
2270 unsigned int r_type;
2271 int reloc_addend;
2272 } insn_sequence;
2273
2274 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2275 to reach the stub if necessary. */
2276 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2277 {
2278 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2279 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2280 };
2281
2282 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2283 available. */
2284 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2285 {
2286 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2287 ARM_INSN (0xe12fff1c), /* bx ip */
2288 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2289 };
2290
2291 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2292 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2293 {
2294 THUMB16_INSN (0xb401), /* push {r0} */
2295 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2296 THUMB16_INSN (0x4684), /* mov ip, r0 */
2297 THUMB16_INSN (0xbc01), /* pop {r0} */
2298 THUMB16_INSN (0x4760), /* bx ip */
2299 THUMB16_INSN (0xbf00), /* nop */
2300 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2301 };
2302
2303 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2304 allowed. */
2305 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2306 {
2307 THUMB16_INSN (0x4778), /* bx pc */
2308 THUMB16_INSN (0x46c0), /* nop */
2309 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2310 ARM_INSN (0xe12fff1c), /* bx ip */
2311 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2312 };
2313
2314 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2315 available. */
2316 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2317 {
2318 THUMB16_INSN (0x4778), /* bx pc */
2319 THUMB16_INSN (0x46c0), /* nop */
2320 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2321 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2322 };
2323
2324 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2325 one, when the destination is close enough. */
2326 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2327 {
2328 THUMB16_INSN (0x4778), /* bx pc */
2329 THUMB16_INSN (0x46c0), /* nop */
2330 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2331 };
2332
2333 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2334 blx to reach the stub if necessary. */
2335 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2336 {
2337 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2338 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2339 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2340 };
2341
2342 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2343 blx to reach the stub if necessary. We can not add into pc;
2344 it is not guaranteed to mode switch (different in ARMv6 and
2345 ARMv7). */
2346 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2347 {
2348 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2349 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2350 ARM_INSN (0xe12fff1c), /* bx ip */
2351 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2352 };
2353
2354 /* V4T ARM -> ARM long branch stub, PIC. */
2355 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2356 {
2357 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2358 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2359 ARM_INSN (0xe12fff1c), /* bx ip */
2360 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2361 };
2362
2363 /* V4T Thumb -> ARM long branch stub, PIC. */
2364 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2365 {
2366 THUMB16_INSN (0x4778), /* bx pc */
2367 THUMB16_INSN (0x46c0), /* nop */
2368 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2369 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2370 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2371 };
2372
2373 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2374 architectures. */
2375 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2376 {
2377 THUMB16_INSN (0xb401), /* push {r0} */
2378 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2379 THUMB16_INSN (0x46fc), /* mov ip, pc */
2380 THUMB16_INSN (0x4484), /* add ip, r0 */
2381 THUMB16_INSN (0xbc01), /* pop {r0} */
2382 THUMB16_INSN (0x4760), /* bx ip */
2383 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2384 };
2385
2386 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2387 allowed. */
2388 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2389 {
2390 THUMB16_INSN (0x4778), /* bx pc */
2391 THUMB16_INSN (0x46c0), /* nop */
2392 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2393 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2394 ARM_INSN (0xe12fff1c), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2396 };
2397
2398 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2399 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2400 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2401 {
2402 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2403 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2404 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2405 };
2406
2407 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2408 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2409 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2410 {
2411 THUMB16_INSN (0x4778), /* bx pc */
2412 THUMB16_INSN (0x46c0), /* nop */
2413 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2414 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2415 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2416 };
2417
2418 /* NaCl ARM -> ARM long branch stub. */
2419 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2420 {
2421 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2422 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2423 ARM_INSN (0xe12fff1c), /* bx ip */
2424 ARM_INSN (0xe320f000), /* nop */
2425 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2426 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2427 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2428 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2429 };
2430
2431 /* NaCl ARM -> ARM long branch stub, PIC. */
2432 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2433 {
2434 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2435 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2436 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2437 ARM_INSN (0xe12fff1c), /* bx ip */
2438 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2439 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2440 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2441 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2442 };
2443
2444
2445 /* Cortex-A8 erratum-workaround stubs. */
2446
2447 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2448 can't use a conditional branch to reach this stub). */
2449
2450 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2451 {
2452 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2453 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2454 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2455 };
2456
2457 /* Stub used for b.w and bl.w instructions. */
2458
2459 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2460 {
2461 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2462 };
2463
2464 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2465 {
2466 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2467 };
2468
2469 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2470 instruction (which switches to ARM mode) to point to this stub. Jump to the
2471 real destination using an ARM-mode branch. */
2472
2473 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2474 {
2475 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2476 };
2477
2478 /* For each section group there can be a specially created linker section
2479 to hold the stubs for that group. The name of the stub section is based
2480 upon the name of another section within that group with the suffix below
2481 applied.
2482
2483 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2484 create what appeared to be a linker stub section when it actually
2485 contained user code/data. For example, consider this fragment:
2486
2487 const char * stubborn_problems[] = { "np" };
2488
2489 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2490 section called:
2491
2492 .data.rel.local.stubborn_problems
2493
2494 This then causes problems in arm32_arm_build_stubs() as it triggers:
2495
2496 // Ignore non-stub sections.
2497 if (!strstr (stub_sec->name, STUB_SUFFIX))
2498 continue;
2499
2500 And so the section would be ignored instead of being processed. Hence
2501 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2502 C identifier. */
2503 #define STUB_SUFFIX ".__stub"
2504
2505 /* One entry per long/short branch stub defined above. */
2506 #define DEF_STUBS \
2507 DEF_STUB(long_branch_any_any) \
2508 DEF_STUB(long_branch_v4t_arm_thumb) \
2509 DEF_STUB(long_branch_thumb_only) \
2510 DEF_STUB(long_branch_v4t_thumb_thumb) \
2511 DEF_STUB(long_branch_v4t_thumb_arm) \
2512 DEF_STUB(short_branch_v4t_thumb_arm) \
2513 DEF_STUB(long_branch_any_arm_pic) \
2514 DEF_STUB(long_branch_any_thumb_pic) \
2515 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2516 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2517 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2518 DEF_STUB(long_branch_thumb_only_pic) \
2519 DEF_STUB(long_branch_any_tls_pic) \
2520 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2521 DEF_STUB(long_branch_arm_nacl) \
2522 DEF_STUB(long_branch_arm_nacl_pic) \
2523 DEF_STUB(a8_veneer_b_cond) \
2524 DEF_STUB(a8_veneer_b) \
2525 DEF_STUB(a8_veneer_bl) \
2526 DEF_STUB(a8_veneer_blx)
2527
2528 #define DEF_STUB(x) arm_stub_##x,
2529 enum elf32_arm_stub_type
2530 {
2531 arm_stub_none,
2532 DEF_STUBS
2533 /* Note the first a8_veneer type */
2534 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2535 };
2536 #undef DEF_STUB
2537
2538 typedef struct
2539 {
2540 const insn_sequence* template_sequence;
2541 int template_size;
2542 } stub_def;
2543
2544 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2545 static const stub_def stub_definitions[] =
2546 {
2547 {NULL, 0},
2548 DEF_STUBS
2549 };
2550
2551 struct elf32_arm_stub_hash_entry
2552 {
2553 /* Base hash table entry structure. */
2554 struct bfd_hash_entry root;
2555
2556 /* The stub section. */
2557 asection *stub_sec;
2558
2559 /* Offset within stub_sec of the beginning of this stub. */
2560 bfd_vma stub_offset;
2561
2562 /* Given the symbol's value and its section we can determine its final
2563 value when building the stubs (so the stub knows where to jump). */
2564 bfd_vma target_value;
2565 asection *target_section;
2566
2567 /* Offset to apply to relocation referencing target_value. */
2568 bfd_vma target_addend;
2569
2570 /* The instruction which caused this stub to be generated (only valid for
2571 Cortex-A8 erratum workaround stubs at present). */
2572 unsigned long orig_insn;
2573
2574 /* The stub type. */
2575 enum elf32_arm_stub_type stub_type;
2576 /* Its encoding size in bytes. */
2577 int stub_size;
2578 /* Its template. */
2579 const insn_sequence *stub_template;
2580 /* The size of the template (number of entries). */
2581 int stub_template_size;
2582
2583 /* The symbol table entry, if any, that this was derived from. */
2584 struct elf32_arm_link_hash_entry *h;
2585
2586 /* Type of branch. */
2587 enum arm_st_branch_type branch_type;
2588
2589 /* Where this stub is being called from, or, in the case of combined
2590 stub sections, the first input section in the group. */
2591 asection *id_sec;
2592
2593 /* The name for the local symbol at the start of this stub. The
2594 stub name in the hash table has to be unique; this does not, so
2595 it can be friendlier. */
2596 char *output_name;
2597 };
2598
2599 /* Used to build a map of a section. This is required for mixed-endian
2600 code/data. */
2601
2602 typedef struct elf32_elf_section_map
2603 {
2604 bfd_vma vma;
2605 char type;
2606 }
2607 elf32_arm_section_map;
2608
2609 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2610
2611 typedef enum
2612 {
2613 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2614 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2615 VFP11_ERRATUM_ARM_VENEER,
2616 VFP11_ERRATUM_THUMB_VENEER
2617 }
2618 elf32_vfp11_erratum_type;
2619
2620 typedef struct elf32_vfp11_erratum_list
2621 {
2622 struct elf32_vfp11_erratum_list *next;
2623 bfd_vma vma;
2624 union
2625 {
2626 struct
2627 {
2628 struct elf32_vfp11_erratum_list *veneer;
2629 unsigned int vfp_insn;
2630 } b;
2631 struct
2632 {
2633 struct elf32_vfp11_erratum_list *branch;
2634 unsigned int id;
2635 } v;
2636 } u;
2637 elf32_vfp11_erratum_type type;
2638 }
2639 elf32_vfp11_erratum_list;
2640
2641 typedef enum
2642 {
2643 DELETE_EXIDX_ENTRY,
2644 INSERT_EXIDX_CANTUNWIND_AT_END
2645 }
2646 arm_unwind_edit_type;
2647
2648 /* A (sorted) list of edits to apply to an unwind table. */
2649 typedef struct arm_unwind_table_edit
2650 {
2651 arm_unwind_edit_type type;
2652 /* Note: we sometimes want to insert an unwind entry corresponding to a
2653 section different from the one we're currently writing out, so record the
2654 (text) section this edit relates to here. */
2655 asection *linked_section;
2656 unsigned int index;
2657 struct arm_unwind_table_edit *next;
2658 }
2659 arm_unwind_table_edit;
2660
2661 typedef struct _arm_elf_section_data
2662 {
2663 /* Information about mapping symbols. */
2664 struct bfd_elf_section_data elf;
2665 unsigned int mapcount;
2666 unsigned int mapsize;
2667 elf32_arm_section_map *map;
2668 /* Information about CPU errata. */
2669 unsigned int erratumcount;
2670 elf32_vfp11_erratum_list *erratumlist;
2671 /* Information about unwind tables. */
2672 union
2673 {
2674 /* Unwind info attached to a text section. */
2675 struct
2676 {
2677 asection *arm_exidx_sec;
2678 } text;
2679
2680 /* Unwind info attached to an .ARM.exidx section. */
2681 struct
2682 {
2683 arm_unwind_table_edit *unwind_edit_list;
2684 arm_unwind_table_edit *unwind_edit_tail;
2685 } exidx;
2686 } u;
2687 }
2688 _arm_elf_section_data;
2689
2690 #define elf32_arm_section_data(sec) \
2691 ((_arm_elf_section_data *) elf_section_data (sec))
2692
2693 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2694 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2695 so may be created multiple times: we use an array of these entries whilst
2696 relaxing which we can refresh easily, then create stubs for each potentially
2697 erratum-triggering instruction once we've settled on a solution. */
2698
2699 struct a8_erratum_fix
2700 {
2701 bfd *input_bfd;
2702 asection *section;
2703 bfd_vma offset;
2704 bfd_vma addend;
2705 unsigned long orig_insn;
2706 char *stub_name;
2707 enum elf32_arm_stub_type stub_type;
2708 enum arm_st_branch_type branch_type;
2709 };
2710
2711 /* A table of relocs applied to branches which might trigger Cortex-A8
2712 erratum. */
2713
2714 struct a8_erratum_reloc
2715 {
2716 bfd_vma from;
2717 bfd_vma destination;
2718 struct elf32_arm_link_hash_entry *hash;
2719 const char *sym_name;
2720 unsigned int r_type;
2721 enum arm_st_branch_type branch_type;
2722 bfd_boolean non_a8_stub;
2723 };
2724
2725 /* The size of the thread control block. */
2726 #define TCB_SIZE 8
2727
2728 /* ARM-specific information about a PLT entry, over and above the usual
2729 gotplt_union. */
2730 struct arm_plt_info
2731 {
2732 /* We reference count Thumb references to a PLT entry separately,
2733 so that we can emit the Thumb trampoline only if needed. */
2734 bfd_signed_vma thumb_refcount;
2735
2736 /* Some references from Thumb code may be eliminated by BL->BLX
2737 conversion, so record them separately. */
2738 bfd_signed_vma maybe_thumb_refcount;
2739
2740 /* How many of the recorded PLT accesses were from non-call relocations.
2741 This information is useful when deciding whether anything takes the
2742 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2743 non-call references to the function should resolve directly to the
2744 real runtime target. */
2745 unsigned int noncall_refcount;
2746
2747 /* Since PLT entries have variable size if the Thumb prologue is
2748 used, we need to record the index into .got.plt instead of
2749 recomputing it from the PLT offset. */
2750 bfd_signed_vma got_offset;
2751 };
2752
2753 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2754 struct arm_local_iplt_info
2755 {
2756 /* The information that is usually found in the generic ELF part of
2757 the hash table entry. */
2758 union gotplt_union root;
2759
2760 /* The information that is usually found in the ARM-specific part of
2761 the hash table entry. */
2762 struct arm_plt_info arm;
2763
2764 /* A list of all potential dynamic relocations against this symbol. */
2765 struct elf_dyn_relocs *dyn_relocs;
2766 };
2767
2768 struct elf_arm_obj_tdata
2769 {
2770 struct elf_obj_tdata root;
2771
2772 /* tls_type for each local got entry. */
2773 char *local_got_tls_type;
2774
2775 /* GOTPLT entries for TLS descriptors. */
2776 bfd_vma *local_tlsdesc_gotent;
2777
2778 /* Information for local symbols that need entries in .iplt. */
2779 struct arm_local_iplt_info **local_iplt;
2780
2781 /* Zero to warn when linking objects with incompatible enum sizes. */
2782 int no_enum_size_warning;
2783
2784 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2785 int no_wchar_size_warning;
2786 };
2787
2788 #define elf_arm_tdata(bfd) \
2789 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2790
2791 #define elf32_arm_local_got_tls_type(bfd) \
2792 (elf_arm_tdata (bfd)->local_got_tls_type)
2793
2794 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2795 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2796
2797 #define elf32_arm_local_iplt(bfd) \
2798 (elf_arm_tdata (bfd)->local_iplt)
2799
2800 #define is_arm_elf(bfd) \
2801 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2802 && elf_tdata (bfd) != NULL \
2803 && elf_object_id (bfd) == ARM_ELF_DATA)
2804
2805 static bfd_boolean
2806 elf32_arm_mkobject (bfd *abfd)
2807 {
2808 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2809 ARM_ELF_DATA);
2810 }
2811
2812 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2813
2814 /* Arm ELF linker hash entry. */
2815 struct elf32_arm_link_hash_entry
2816 {
2817 struct elf_link_hash_entry root;
2818
2819 /* Track dynamic relocs copied for this symbol. */
2820 struct elf_dyn_relocs *dyn_relocs;
2821
2822 /* ARM-specific PLT information. */
2823 struct arm_plt_info plt;
2824
2825 #define GOT_UNKNOWN 0
2826 #define GOT_NORMAL 1
2827 #define GOT_TLS_GD 2
2828 #define GOT_TLS_IE 4
2829 #define GOT_TLS_GDESC 8
2830 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2831 unsigned int tls_type : 8;
2832
2833 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2834 unsigned int is_iplt : 1;
2835
2836 unsigned int unused : 23;
2837
2838 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2839 starting at the end of the jump table. */
2840 bfd_vma tlsdesc_got;
2841
2842 /* The symbol marking the real symbol location for exported thumb
2843 symbols with Arm stubs. */
2844 struct elf_link_hash_entry *export_glue;
2845
2846 /* A pointer to the most recently used stub hash entry against this
2847 symbol. */
2848 struct elf32_arm_stub_hash_entry *stub_cache;
2849 };
2850
2851 /* Traverse an arm ELF linker hash table. */
2852 #define elf32_arm_link_hash_traverse(table, func, info) \
2853 (elf_link_hash_traverse \
2854 (&(table)->root, \
2855 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2856 (info)))
2857
2858 /* Get the ARM elf linker hash table from a link_info structure. */
2859 #define elf32_arm_hash_table(info) \
2860 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2861 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2862
2863 #define arm_stub_hash_lookup(table, string, create, copy) \
2864 ((struct elf32_arm_stub_hash_entry *) \
2865 bfd_hash_lookup ((table), (string), (create), (copy)))
2866
2867 /* Array to keep track of which stub sections have been created, and
2868 information on stub grouping. */
2869 struct map_stub
2870 {
2871 /* This is the section to which stubs in the group will be
2872 attached. */
2873 asection *link_sec;
2874 /* The stub section. */
2875 asection *stub_sec;
2876 };
2877
2878 #define elf32_arm_compute_jump_table_size(htab) \
2879 ((htab)->next_tls_desc_index * 4)
2880
2881 /* ARM ELF linker hash table. */
2882 struct elf32_arm_link_hash_table
2883 {
2884 /* The main hash table. */
2885 struct elf_link_hash_table root;
2886
2887 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2888 bfd_size_type thumb_glue_size;
2889
2890 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2891 bfd_size_type arm_glue_size;
2892
2893 /* The size in bytes of section containing the ARMv4 BX veneers. */
2894 bfd_size_type bx_glue_size;
2895
2896 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2897 veneer has been populated. */
2898 bfd_vma bx_glue_offset[15];
2899
2900 /* The size in bytes of the section containing glue for VFP11 erratum
2901 veneers. */
2902 bfd_size_type vfp11_erratum_glue_size;
2903
2904 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2905 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2906 elf32_arm_write_section(). */
2907 struct a8_erratum_fix *a8_erratum_fixes;
2908 unsigned int num_a8_erratum_fixes;
2909
2910 /* An arbitrary input BFD chosen to hold the glue sections. */
2911 bfd * bfd_of_glue_owner;
2912
2913 /* Nonzero to output a BE8 image. */
2914 int byteswap_code;
2915
2916 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2917 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2918 int target1_is_rel;
2919
2920 /* The relocation to use for R_ARM_TARGET2 relocations. */
2921 int target2_reloc;
2922
2923 /* 0 = Ignore R_ARM_V4BX.
2924 1 = Convert BX to MOV PC.
2925 2 = Generate v4 interworing stubs. */
2926 int fix_v4bx;
2927
2928 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2929 int fix_cortex_a8;
2930
2931 /* Whether we should fix the ARM1176 BLX immediate issue. */
2932 int fix_arm1176;
2933
2934 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2935 int use_blx;
2936
2937 /* What sort of code sequences we should look for which may trigger the
2938 VFP11 denorm erratum. */
2939 bfd_arm_vfp11_fix vfp11_fix;
2940
2941 /* Global counter for the number of fixes we have emitted. */
2942 int num_vfp11_fixes;
2943
2944 /* Nonzero to force PIC branch veneers. */
2945 int pic_veneer;
2946
2947 /* The number of bytes in the initial entry in the PLT. */
2948 bfd_size_type plt_header_size;
2949
2950 /* The number of bytes in the subsequent PLT etries. */
2951 bfd_size_type plt_entry_size;
2952
2953 /* True if the target system is VxWorks. */
2954 int vxworks_p;
2955
2956 /* True if the target system is Symbian OS. */
2957 int symbian_p;
2958
2959 /* True if the target system is Native Client. */
2960 int nacl_p;
2961
2962 /* True if the target uses REL relocations. */
2963 int use_rel;
2964
2965 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2966 bfd_vma next_tls_desc_index;
2967
2968 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2969 bfd_vma num_tls_desc;
2970
2971 /* Short-cuts to get to dynamic linker sections. */
2972 asection *sdynbss;
2973 asection *srelbss;
2974
2975 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2976 asection *srelplt2;
2977
2978 /* The offset into splt of the PLT entry for the TLS descriptor
2979 resolver. Special values are 0, if not necessary (or not found
2980 to be necessary yet), and -1 if needed but not determined
2981 yet. */
2982 bfd_vma dt_tlsdesc_plt;
2983
2984 /* The offset into sgot of the GOT entry used by the PLT entry
2985 above. */
2986 bfd_vma dt_tlsdesc_got;
2987
2988 /* Offset in .plt section of tls_arm_trampoline. */
2989 bfd_vma tls_trampoline;
2990
2991 /* Data for R_ARM_TLS_LDM32 relocations. */
2992 union
2993 {
2994 bfd_signed_vma refcount;
2995 bfd_vma offset;
2996 } tls_ldm_got;
2997
2998 /* Small local sym cache. */
2999 struct sym_cache sym_cache;
3000
3001 /* For convenience in allocate_dynrelocs. */
3002 bfd * obfd;
3003
3004 /* The amount of space used by the reserved portion of the sgotplt
3005 section, plus whatever space is used by the jump slots. */
3006 bfd_vma sgotplt_jump_table_size;
3007
3008 /* The stub hash table. */
3009 struct bfd_hash_table stub_hash_table;
3010
3011 /* Linker stub bfd. */
3012 bfd *stub_bfd;
3013
3014 /* Linker call-backs. */
3015 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3016 void (*layout_sections_again) (void);
3017
3018 /* Array to keep track of which stub sections have been created, and
3019 information on stub grouping. */
3020 struct map_stub *stub_group;
3021
3022 /* Number of elements in stub_group. */
3023 int top_id;
3024
3025 /* Assorted information used by elf32_arm_size_stubs. */
3026 unsigned int bfd_count;
3027 int top_index;
3028 asection **input_list;
3029 };
3030
3031 /* Create an entry in an ARM ELF linker hash table. */
3032
3033 static struct bfd_hash_entry *
3034 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3035 struct bfd_hash_table * table,
3036 const char * string)
3037 {
3038 struct elf32_arm_link_hash_entry * ret =
3039 (struct elf32_arm_link_hash_entry *) entry;
3040
3041 /* Allocate the structure if it has not already been allocated by a
3042 subclass. */
3043 if (ret == NULL)
3044 ret = (struct elf32_arm_link_hash_entry *)
3045 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3046 if (ret == NULL)
3047 return (struct bfd_hash_entry *) ret;
3048
3049 /* Call the allocation method of the superclass. */
3050 ret = ((struct elf32_arm_link_hash_entry *)
3051 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3052 table, string));
3053 if (ret != NULL)
3054 {
3055 ret->dyn_relocs = NULL;
3056 ret->tls_type = GOT_UNKNOWN;
3057 ret->tlsdesc_got = (bfd_vma) -1;
3058 ret->plt.thumb_refcount = 0;
3059 ret->plt.maybe_thumb_refcount = 0;
3060 ret->plt.noncall_refcount = 0;
3061 ret->plt.got_offset = -1;
3062 ret->is_iplt = FALSE;
3063 ret->export_glue = NULL;
3064
3065 ret->stub_cache = NULL;
3066 }
3067
3068 return (struct bfd_hash_entry *) ret;
3069 }
3070
3071 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3072 symbols. */
3073
3074 static bfd_boolean
3075 elf32_arm_allocate_local_sym_info (bfd *abfd)
3076 {
3077 if (elf_local_got_refcounts (abfd) == NULL)
3078 {
3079 bfd_size_type num_syms;
3080 bfd_size_type size;
3081 char *data;
3082
3083 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3084 size = num_syms * (sizeof (bfd_signed_vma)
3085 + sizeof (struct arm_local_iplt_info *)
3086 + sizeof (bfd_vma)
3087 + sizeof (char));
3088 data = bfd_zalloc (abfd, size);
3089 if (data == NULL)
3090 return FALSE;
3091
3092 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3093 data += num_syms * sizeof (bfd_signed_vma);
3094
3095 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3096 data += num_syms * sizeof (struct arm_local_iplt_info *);
3097
3098 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3099 data += num_syms * sizeof (bfd_vma);
3100
3101 elf32_arm_local_got_tls_type (abfd) = data;
3102 }
3103 return TRUE;
3104 }
3105
3106 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3107 to input bfd ABFD. Create the information if it doesn't already exist.
3108 Return null if an allocation fails. */
3109
3110 static struct arm_local_iplt_info *
3111 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3112 {
3113 struct arm_local_iplt_info **ptr;
3114
3115 if (!elf32_arm_allocate_local_sym_info (abfd))
3116 return NULL;
3117
3118 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3119 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (*ptr == NULL)
3121 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3122 return *ptr;
3123 }
3124
3125 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3126 in ABFD's symbol table. If the symbol is global, H points to its
3127 hash table entry, otherwise H is null.
3128
3129 Return true if the symbol does have PLT information. When returning
3130 true, point *ROOT_PLT at the target-independent reference count/offset
3131 union and *ARM_PLT at the ARM-specific information. */
3132
3133 static bfd_boolean
3134 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3135 unsigned long r_symndx, union gotplt_union **root_plt,
3136 struct arm_plt_info **arm_plt)
3137 {
3138 struct arm_local_iplt_info *local_iplt;
3139
3140 if (h != NULL)
3141 {
3142 *root_plt = &h->root.plt;
3143 *arm_plt = &h->plt;
3144 return TRUE;
3145 }
3146
3147 if (elf32_arm_local_iplt (abfd) == NULL)
3148 return FALSE;
3149
3150 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3151 if (local_iplt == NULL)
3152 return FALSE;
3153
3154 *root_plt = &local_iplt->root;
3155 *arm_plt = &local_iplt->arm;
3156 return TRUE;
3157 }
3158
3159 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3160 before it. */
3161
3162 static bfd_boolean
3163 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3164 struct arm_plt_info *arm_plt)
3165 {
3166 struct elf32_arm_link_hash_table *htab;
3167
3168 htab = elf32_arm_hash_table (info);
3169 return (arm_plt->thumb_refcount != 0
3170 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3171 }
3172
3173 /* Return a pointer to the head of the dynamic reloc list that should
3174 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3175 ABFD's symbol table. Return null if an error occurs. */
3176
3177 static struct elf_dyn_relocs **
3178 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3179 Elf_Internal_Sym *isym)
3180 {
3181 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3182 {
3183 struct arm_local_iplt_info *local_iplt;
3184
3185 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3186 if (local_iplt == NULL)
3187 return NULL;
3188 return &local_iplt->dyn_relocs;
3189 }
3190 else
3191 {
3192 /* Track dynamic relocs needed for local syms too.
3193 We really need local syms available to do this
3194 easily. Oh well. */
3195 asection *s;
3196 void *vpp;
3197
3198 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3199 if (s == NULL)
3200 abort ();
3201
3202 vpp = &elf_section_data (s)->local_dynrel;
3203 return (struct elf_dyn_relocs **) vpp;
3204 }
3205 }
3206
3207 /* Initialize an entry in the stub hash table. */
3208
3209 static struct bfd_hash_entry *
3210 stub_hash_newfunc (struct bfd_hash_entry *entry,
3211 struct bfd_hash_table *table,
3212 const char *string)
3213 {
3214 /* Allocate the structure if it has not already been allocated by a
3215 subclass. */
3216 if (entry == NULL)
3217 {
3218 entry = (struct bfd_hash_entry *)
3219 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3220 if (entry == NULL)
3221 return entry;
3222 }
3223
3224 /* Call the allocation method of the superclass. */
3225 entry = bfd_hash_newfunc (entry, table, string);
3226 if (entry != NULL)
3227 {
3228 struct elf32_arm_stub_hash_entry *eh;
3229
3230 /* Initialize the local fields. */
3231 eh = (struct elf32_arm_stub_hash_entry *) entry;
3232 eh->stub_sec = NULL;
3233 eh->stub_offset = 0;
3234 eh->target_value = 0;
3235 eh->target_section = NULL;
3236 eh->target_addend = 0;
3237 eh->orig_insn = 0;
3238 eh->stub_type = arm_stub_none;
3239 eh->stub_size = 0;
3240 eh->stub_template = NULL;
3241 eh->stub_template_size = 0;
3242 eh->h = NULL;
3243 eh->id_sec = NULL;
3244 eh->output_name = NULL;
3245 }
3246
3247 return entry;
3248 }
3249
3250 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3251 shortcuts to them in our hash table. */
3252
3253 static bfd_boolean
3254 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3255 {
3256 struct elf32_arm_link_hash_table *htab;
3257
3258 htab = elf32_arm_hash_table (info);
3259 if (htab == NULL)
3260 return FALSE;
3261
3262 /* BPABI objects never have a GOT, or associated sections. */
3263 if (htab->symbian_p)
3264 return TRUE;
3265
3266 if (! _bfd_elf_create_got_section (dynobj, info))
3267 return FALSE;
3268
3269 return TRUE;
3270 }
3271
3272 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3273
3274 static bfd_boolean
3275 create_ifunc_sections (struct bfd_link_info *info)
3276 {
3277 struct elf32_arm_link_hash_table *htab;
3278 const struct elf_backend_data *bed;
3279 bfd *dynobj;
3280 asection *s;
3281 flagword flags;
3282
3283 htab = elf32_arm_hash_table (info);
3284 dynobj = htab->root.dynobj;
3285 bed = get_elf_backend_data (dynobj);
3286 flags = bed->dynamic_sec_flags;
3287
3288 if (htab->root.iplt == NULL)
3289 {
3290 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3291 flags | SEC_READONLY | SEC_CODE);
3292 if (s == NULL
3293 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3294 return FALSE;
3295 htab->root.iplt = s;
3296 }
3297
3298 if (htab->root.irelplt == NULL)
3299 {
3300 s = bfd_make_section_anyway_with_flags (dynobj,
3301 RELOC_SECTION (htab, ".iplt"),
3302 flags | SEC_READONLY);
3303 if (s == NULL
3304 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3305 return FALSE;
3306 htab->root.irelplt = s;
3307 }
3308
3309 if (htab->root.igotplt == NULL)
3310 {
3311 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3312 if (s == NULL
3313 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3314 return FALSE;
3315 htab->root.igotplt = s;
3316 }
3317 return TRUE;
3318 }
3319
3320 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3321 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3322 hash table. */
3323
3324 static bfd_boolean
3325 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3326 {
3327 struct elf32_arm_link_hash_table *htab;
3328
3329 htab = elf32_arm_hash_table (info);
3330 if (htab == NULL)
3331 return FALSE;
3332
3333 if (!htab->root.sgot && !create_got_section (dynobj, info))
3334 return FALSE;
3335
3336 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3337 return FALSE;
3338
3339 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3340 if (!info->shared)
3341 htab->srelbss = bfd_get_linker_section (dynobj,
3342 RELOC_SECTION (htab, ".bss"));
3343
3344 if (htab->vxworks_p)
3345 {
3346 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3347 return FALSE;
3348
3349 if (info->shared)
3350 {
3351 htab->plt_header_size = 0;
3352 htab->plt_entry_size
3353 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3354 }
3355 else
3356 {
3357 htab->plt_header_size
3358 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3359 htab->plt_entry_size
3360 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3361 }
3362 }
3363
3364 if (!htab->root.splt
3365 || !htab->root.srelplt
3366 || !htab->sdynbss
3367 || (!info->shared && !htab->srelbss))
3368 abort ();
3369
3370 return TRUE;
3371 }
3372
3373 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3374
3375 static void
3376 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3377 struct elf_link_hash_entry *dir,
3378 struct elf_link_hash_entry *ind)
3379 {
3380 struct elf32_arm_link_hash_entry *edir, *eind;
3381
3382 edir = (struct elf32_arm_link_hash_entry *) dir;
3383 eind = (struct elf32_arm_link_hash_entry *) ind;
3384
3385 if (eind->dyn_relocs != NULL)
3386 {
3387 if (edir->dyn_relocs != NULL)
3388 {
3389 struct elf_dyn_relocs **pp;
3390 struct elf_dyn_relocs *p;
3391
3392 /* Add reloc counts against the indirect sym to the direct sym
3393 list. Merge any entries against the same section. */
3394 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3395 {
3396 struct elf_dyn_relocs *q;
3397
3398 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3399 if (q->sec == p->sec)
3400 {
3401 q->pc_count += p->pc_count;
3402 q->count += p->count;
3403 *pp = p->next;
3404 break;
3405 }
3406 if (q == NULL)
3407 pp = &p->next;
3408 }
3409 *pp = edir->dyn_relocs;
3410 }
3411
3412 edir->dyn_relocs = eind->dyn_relocs;
3413 eind->dyn_relocs = NULL;
3414 }
3415
3416 if (ind->root.type == bfd_link_hash_indirect)
3417 {
3418 /* Copy over PLT info. */
3419 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3420 eind->plt.thumb_refcount = 0;
3421 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3422 eind->plt.maybe_thumb_refcount = 0;
3423 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3424 eind->plt.noncall_refcount = 0;
3425
3426 /* We should only allocate a function to .iplt once the final
3427 symbol information is known. */
3428 BFD_ASSERT (!eind->is_iplt);
3429
3430 if (dir->got.refcount <= 0)
3431 {
3432 edir->tls_type = eind->tls_type;
3433 eind->tls_type = GOT_UNKNOWN;
3434 }
3435 }
3436
3437 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3438 }
3439
3440 /* Create an ARM elf linker hash table. */
3441
3442 static struct bfd_link_hash_table *
3443 elf32_arm_link_hash_table_create (bfd *abfd)
3444 {
3445 struct elf32_arm_link_hash_table *ret;
3446 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3447
3448 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3449 if (ret == NULL)
3450 return NULL;
3451
3452 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3453 elf32_arm_link_hash_newfunc,
3454 sizeof (struct elf32_arm_link_hash_entry),
3455 ARM_ELF_DATA))
3456 {
3457 free (ret);
3458 return NULL;
3459 }
3460
3461 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3462 #ifdef FOUR_WORD_PLT
3463 ret->plt_header_size = 16;
3464 ret->plt_entry_size = 16;
3465 #else
3466 ret->plt_header_size = 20;
3467 ret->plt_entry_size = 12;
3468 #endif
3469 ret->use_rel = 1;
3470 ret->obfd = abfd;
3471
3472 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3473 sizeof (struct elf32_arm_stub_hash_entry)))
3474 {
3475 free (ret);
3476 return NULL;
3477 }
3478
3479 return &ret->root.root;
3480 }
3481
3482 /* Free the derived linker hash table. */
3483
3484 static void
3485 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3486 {
3487 struct elf32_arm_link_hash_table *ret
3488 = (struct elf32_arm_link_hash_table *) hash;
3489
3490 bfd_hash_table_free (&ret->stub_hash_table);
3491 _bfd_elf_link_hash_table_free (hash);
3492 }
3493
3494 /* Determine if we're dealing with a Thumb only architecture. */
3495
3496 static bfd_boolean
3497 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3498 {
3499 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3500 Tag_CPU_arch);
3501 int profile;
3502
3503 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3504 return TRUE;
3505
3506 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3507 return FALSE;
3508
3509 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3510 Tag_CPU_arch_profile);
3511
3512 return profile == 'M';
3513 }
3514
3515 /* Determine if we're dealing with a Thumb-2 object. */
3516
3517 static bfd_boolean
3518 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3519 {
3520 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3521 Tag_CPU_arch);
3522 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3523 }
3524
3525 /* Determine what kind of NOPs are available. */
3526
3527 static bfd_boolean
3528 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3529 {
3530 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3531 Tag_CPU_arch);
3532 return arch == TAG_CPU_ARCH_V6T2
3533 || arch == TAG_CPU_ARCH_V6K
3534 || arch == TAG_CPU_ARCH_V7
3535 || arch == TAG_CPU_ARCH_V7E_M;
3536 }
3537
3538 static bfd_boolean
3539 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3540 {
3541 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3542 Tag_CPU_arch);
3543 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3544 || arch == TAG_CPU_ARCH_V7E_M);
3545 }
3546
3547 static bfd_boolean
3548 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3549 {
3550 switch (stub_type)
3551 {
3552 case arm_stub_long_branch_thumb_only:
3553 case arm_stub_long_branch_v4t_thumb_arm:
3554 case arm_stub_short_branch_v4t_thumb_arm:
3555 case arm_stub_long_branch_v4t_thumb_arm_pic:
3556 case arm_stub_long_branch_v4t_thumb_tls_pic:
3557 case arm_stub_long_branch_thumb_only_pic:
3558 return TRUE;
3559 case arm_stub_none:
3560 BFD_FAIL ();
3561 return FALSE;
3562 break;
3563 default:
3564 return FALSE;
3565 }
3566 }
3567
3568 /* Determine the type of stub needed, if any, for a call. */
3569
3570 static enum elf32_arm_stub_type
3571 arm_type_of_stub (struct bfd_link_info *info,
3572 asection *input_sec,
3573 const Elf_Internal_Rela *rel,
3574 unsigned char st_type,
3575 enum arm_st_branch_type *actual_branch_type,
3576 struct elf32_arm_link_hash_entry *hash,
3577 bfd_vma destination,
3578 asection *sym_sec,
3579 bfd *input_bfd,
3580 const char *name)
3581 {
3582 bfd_vma location;
3583 bfd_signed_vma branch_offset;
3584 unsigned int r_type;
3585 struct elf32_arm_link_hash_table * globals;
3586 int thumb2;
3587 int thumb_only;
3588 enum elf32_arm_stub_type stub_type = arm_stub_none;
3589 int use_plt = 0;
3590 enum arm_st_branch_type branch_type = *actual_branch_type;
3591 union gotplt_union *root_plt;
3592 struct arm_plt_info *arm_plt;
3593
3594 if (branch_type == ST_BRANCH_LONG)
3595 return stub_type;
3596
3597 globals = elf32_arm_hash_table (info);
3598 if (globals == NULL)
3599 return stub_type;
3600
3601 thumb_only = using_thumb_only (globals);
3602
3603 thumb2 = using_thumb2 (globals);
3604
3605 /* Determine where the call point is. */
3606 location = (input_sec->output_offset
3607 + input_sec->output_section->vma
3608 + rel->r_offset);
3609
3610 r_type = ELF32_R_TYPE (rel->r_info);
3611
3612 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3613 are considering a function call relocation. */
3614 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3615 && branch_type == ST_BRANCH_TO_ARM)
3616 branch_type = ST_BRANCH_TO_THUMB;
3617
3618 /* For TLS call relocs, it is the caller's responsibility to provide
3619 the address of the appropriate trampoline. */
3620 if (r_type != R_ARM_TLS_CALL
3621 && r_type != R_ARM_THM_TLS_CALL
3622 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3623 &root_plt, &arm_plt)
3624 && root_plt->offset != (bfd_vma) -1)
3625 {
3626 asection *splt;
3627
3628 if (hash == NULL || hash->is_iplt)
3629 splt = globals->root.iplt;
3630 else
3631 splt = globals->root.splt;
3632 if (splt != NULL)
3633 {
3634 use_plt = 1;
3635
3636 /* Note when dealing with PLT entries: the main PLT stub is in
3637 ARM mode, so if the branch is in Thumb mode, another
3638 Thumb->ARM stub will be inserted later just before the ARM
3639 PLT stub. We don't take this extra distance into account
3640 here, because if a long branch stub is needed, we'll add a
3641 Thumb->Arm one and branch directly to the ARM PLT entry
3642 because it avoids spreading offset corrections in several
3643 places. */
3644
3645 destination = (splt->output_section->vma
3646 + splt->output_offset
3647 + root_plt->offset);
3648 st_type = STT_FUNC;
3649 branch_type = ST_BRANCH_TO_ARM;
3650 }
3651 }
3652 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3653 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3654
3655 branch_offset = (bfd_signed_vma)(destination - location);
3656
3657 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3658 || r_type == R_ARM_THM_TLS_CALL)
3659 {
3660 /* Handle cases where:
3661 - this call goes too far (different Thumb/Thumb2 max
3662 distance)
3663 - it's a Thumb->Arm call and blx is not available, or it's a
3664 Thumb->Arm branch (not bl). A stub is needed in this case,
3665 but only if this call is not through a PLT entry. Indeed,
3666 PLT stubs handle mode switching already.
3667 */
3668 if ((!thumb2
3669 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3670 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3671 || (thumb2
3672 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3673 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3674 || (branch_type == ST_BRANCH_TO_ARM
3675 && (((r_type == R_ARM_THM_CALL
3676 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3677 || (r_type == R_ARM_THM_JUMP24))
3678 && !use_plt))
3679 {
3680 if (branch_type == ST_BRANCH_TO_THUMB)
3681 {
3682 /* Thumb to thumb. */
3683 if (!thumb_only)
3684 {
3685 stub_type = (info->shared | globals->pic_veneer)
3686 /* PIC stubs. */
3687 ? ((globals->use_blx
3688 && (r_type == R_ARM_THM_CALL))
3689 /* V5T and above. Stub starts with ARM code, so
3690 we must be able to switch mode before
3691 reaching it, which is only possible for 'bl'
3692 (ie R_ARM_THM_CALL relocation). */
3693 ? arm_stub_long_branch_any_thumb_pic
3694 /* On V4T, use Thumb code only. */
3695 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3696
3697 /* non-PIC stubs. */
3698 : ((globals->use_blx
3699 && (r_type == R_ARM_THM_CALL))
3700 /* V5T and above. */
3701 ? arm_stub_long_branch_any_any
3702 /* V4T. */
3703 : arm_stub_long_branch_v4t_thumb_thumb);
3704 }
3705 else
3706 {
3707 stub_type = (info->shared | globals->pic_veneer)
3708 /* PIC stub. */
3709 ? arm_stub_long_branch_thumb_only_pic
3710 /* non-PIC stub. */
3711 : arm_stub_long_branch_thumb_only;
3712 }
3713 }
3714 else
3715 {
3716 /* Thumb to arm. */
3717 if (sym_sec != NULL
3718 && sym_sec->owner != NULL
3719 && !INTERWORK_FLAG (sym_sec->owner))
3720 {
3721 (*_bfd_error_handler)
3722 (_("%B(%s): warning: interworking not enabled.\n"
3723 " first occurrence: %B: Thumb call to ARM"),
3724 sym_sec->owner, input_bfd, name);
3725 }
3726
3727 stub_type =
3728 (info->shared | globals->pic_veneer)
3729 /* PIC stubs. */
3730 ? (r_type == R_ARM_THM_TLS_CALL
3731 /* TLS PIC stubs */
3732 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3733 : arm_stub_long_branch_v4t_thumb_tls_pic)
3734 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3735 /* V5T PIC and above. */
3736 ? arm_stub_long_branch_any_arm_pic
3737 /* V4T PIC stub. */
3738 : arm_stub_long_branch_v4t_thumb_arm_pic))
3739
3740 /* non-PIC stubs. */
3741 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3742 /* V5T and above. */
3743 ? arm_stub_long_branch_any_any
3744 /* V4T. */
3745 : arm_stub_long_branch_v4t_thumb_arm);
3746
3747 /* Handle v4t short branches. */
3748 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3749 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3750 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3751 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3752 }
3753 }
3754 }
3755 else if (r_type == R_ARM_CALL
3756 || r_type == R_ARM_JUMP24
3757 || r_type == R_ARM_PLT32
3758 || r_type == R_ARM_TLS_CALL)
3759 {
3760 if (branch_type == ST_BRANCH_TO_THUMB)
3761 {
3762 /* Arm to thumb. */
3763
3764 if (sym_sec != NULL
3765 && sym_sec->owner != NULL
3766 && !INTERWORK_FLAG (sym_sec->owner))
3767 {
3768 (*_bfd_error_handler)
3769 (_("%B(%s): warning: interworking not enabled.\n"
3770 " first occurrence: %B: ARM call to Thumb"),
3771 sym_sec->owner, input_bfd, name);
3772 }
3773
3774 /* We have an extra 2-bytes reach because of
3775 the mode change (bit 24 (H) of BLX encoding). */
3776 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3777 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3778 || (r_type == R_ARM_CALL && !globals->use_blx)
3779 || (r_type == R_ARM_JUMP24)
3780 || (r_type == R_ARM_PLT32))
3781 {
3782 stub_type = (info->shared | globals->pic_veneer)
3783 /* PIC stubs. */
3784 ? ((globals->use_blx)
3785 /* V5T and above. */
3786 ? arm_stub_long_branch_any_thumb_pic
3787 /* V4T stub. */
3788 : arm_stub_long_branch_v4t_arm_thumb_pic)
3789
3790 /* non-PIC stubs. */
3791 : ((globals->use_blx)
3792 /* V5T and above. */
3793 ? arm_stub_long_branch_any_any
3794 /* V4T. */
3795 : arm_stub_long_branch_v4t_arm_thumb);
3796 }
3797 }
3798 else
3799 {
3800 /* Arm to arm. */
3801 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3802 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3803 {
3804 stub_type =
3805 (info->shared | globals->pic_veneer)
3806 /* PIC stubs. */
3807 ? (r_type == R_ARM_TLS_CALL
3808 /* TLS PIC Stub */
3809 ? arm_stub_long_branch_any_tls_pic
3810 : (globals->nacl_p
3811 ? arm_stub_long_branch_arm_nacl_pic
3812 : arm_stub_long_branch_any_arm_pic))
3813 /* non-PIC stubs. */
3814 : (globals->nacl_p
3815 ? arm_stub_long_branch_arm_nacl
3816 : arm_stub_long_branch_any_any);
3817 }
3818 }
3819 }
3820
3821 /* If a stub is needed, record the actual destination type. */
3822 if (stub_type != arm_stub_none)
3823 *actual_branch_type = branch_type;
3824
3825 return stub_type;
3826 }
3827
3828 /* Build a name for an entry in the stub hash table. */
3829
3830 static char *
3831 elf32_arm_stub_name (const asection *input_section,
3832 const asection *sym_sec,
3833 const struct elf32_arm_link_hash_entry *hash,
3834 const Elf_Internal_Rela *rel,
3835 enum elf32_arm_stub_type stub_type)
3836 {
3837 char *stub_name;
3838 bfd_size_type len;
3839
3840 if (hash)
3841 {
3842 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3843 stub_name = (char *) bfd_malloc (len);
3844 if (stub_name != NULL)
3845 sprintf (stub_name, "%08x_%s+%x_%d",
3846 input_section->id & 0xffffffff,
3847 hash->root.root.root.string,
3848 (int) rel->r_addend & 0xffffffff,
3849 (int) stub_type);
3850 }
3851 else
3852 {
3853 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3854 stub_name = (char *) bfd_malloc (len);
3855 if (stub_name != NULL)
3856 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3857 input_section->id & 0xffffffff,
3858 sym_sec->id & 0xffffffff,
3859 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3860 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3861 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3862 (int) rel->r_addend & 0xffffffff,
3863 (int) stub_type);
3864 }
3865
3866 return stub_name;
3867 }
3868
3869 /* Look up an entry in the stub hash. Stub entries are cached because
3870 creating the stub name takes a bit of time. */
3871
3872 static struct elf32_arm_stub_hash_entry *
3873 elf32_arm_get_stub_entry (const asection *input_section,
3874 const asection *sym_sec,
3875 struct elf_link_hash_entry *hash,
3876 const Elf_Internal_Rela *rel,
3877 struct elf32_arm_link_hash_table *htab,
3878 enum elf32_arm_stub_type stub_type)
3879 {
3880 struct elf32_arm_stub_hash_entry *stub_entry;
3881 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3882 const asection *id_sec;
3883
3884 if ((input_section->flags & SEC_CODE) == 0)
3885 return NULL;
3886
3887 /* If this input section is part of a group of sections sharing one
3888 stub section, then use the id of the first section in the group.
3889 Stub names need to include a section id, as there may well be
3890 more than one stub used to reach say, printf, and we need to
3891 distinguish between them. */
3892 id_sec = htab->stub_group[input_section->id].link_sec;
3893
3894 if (h != NULL && h->stub_cache != NULL
3895 && h->stub_cache->h == h
3896 && h->stub_cache->id_sec == id_sec
3897 && h->stub_cache->stub_type == stub_type)
3898 {
3899 stub_entry = h->stub_cache;
3900 }
3901 else
3902 {
3903 char *stub_name;
3904
3905 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3906 if (stub_name == NULL)
3907 return NULL;
3908
3909 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3910 stub_name, FALSE, FALSE);
3911 if (h != NULL)
3912 h->stub_cache = stub_entry;
3913
3914 free (stub_name);
3915 }
3916
3917 return stub_entry;
3918 }
3919
3920 /* Find or create a stub section. Returns a pointer to the stub section, and
3921 the section to which the stub section will be attached (in *LINK_SEC_P).
3922 LINK_SEC_P may be NULL. */
3923
3924 static asection *
3925 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3926 struct elf32_arm_link_hash_table *htab)
3927 {
3928 asection *link_sec;
3929 asection *stub_sec;
3930
3931 link_sec = htab->stub_group[section->id].link_sec;
3932 BFD_ASSERT (link_sec != NULL);
3933 stub_sec = htab->stub_group[section->id].stub_sec;
3934
3935 if (stub_sec == NULL)
3936 {
3937 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3938 if (stub_sec == NULL)
3939 {
3940 size_t namelen;
3941 bfd_size_type len;
3942 char *s_name;
3943
3944 namelen = strlen (link_sec->name);
3945 len = namelen + sizeof (STUB_SUFFIX);
3946 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3947 if (s_name == NULL)
3948 return NULL;
3949
3950 memcpy (s_name, link_sec->name, namelen);
3951 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3952 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
3953 htab->nacl_p ? 4 : 3);
3954 if (stub_sec == NULL)
3955 return NULL;
3956 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3957 }
3958 htab->stub_group[section->id].stub_sec = stub_sec;
3959 }
3960
3961 if (link_sec_p)
3962 *link_sec_p = link_sec;
3963
3964 return stub_sec;
3965 }
3966
3967 /* Add a new stub entry to the stub hash. Not all fields of the new
3968 stub entry are initialised. */
3969
3970 static struct elf32_arm_stub_hash_entry *
3971 elf32_arm_add_stub (const char *stub_name,
3972 asection *section,
3973 struct elf32_arm_link_hash_table *htab)
3974 {
3975 asection *link_sec;
3976 asection *stub_sec;
3977 struct elf32_arm_stub_hash_entry *stub_entry;
3978
3979 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3980 if (stub_sec == NULL)
3981 return NULL;
3982
3983 /* Enter this entry into the linker stub hash table. */
3984 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3985 TRUE, FALSE);
3986 if (stub_entry == NULL)
3987 {
3988 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3989 section->owner,
3990 stub_name);
3991 return NULL;
3992 }
3993
3994 stub_entry->stub_sec = stub_sec;
3995 stub_entry->stub_offset = 0;
3996 stub_entry->id_sec = link_sec;
3997
3998 return stub_entry;
3999 }
4000
4001 /* Store an Arm insn into an output section not processed by
4002 elf32_arm_write_section. */
4003
4004 static void
4005 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4006 bfd * output_bfd, bfd_vma val, void * ptr)
4007 {
4008 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4009 bfd_putl32 (val, ptr);
4010 else
4011 bfd_putb32 (val, ptr);
4012 }
4013
4014 /* Store a 16-bit Thumb insn into an output section not processed by
4015 elf32_arm_write_section. */
4016
4017 static void
4018 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4019 bfd * output_bfd, bfd_vma val, void * ptr)
4020 {
4021 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4022 bfd_putl16 (val, ptr);
4023 else
4024 bfd_putb16 (val, ptr);
4025 }
4026
4027 /* If it's possible to change R_TYPE to a more efficient access
4028 model, return the new reloc type. */
4029
4030 static unsigned
4031 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4032 struct elf_link_hash_entry *h)
4033 {
4034 int is_local = (h == NULL);
4035
4036 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4037 return r_type;
4038
4039 /* We do not support relaxations for Old TLS models. */
4040 switch (r_type)
4041 {
4042 case R_ARM_TLS_GOTDESC:
4043 case R_ARM_TLS_CALL:
4044 case R_ARM_THM_TLS_CALL:
4045 case R_ARM_TLS_DESCSEQ:
4046 case R_ARM_THM_TLS_DESCSEQ:
4047 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4048 }
4049
4050 return r_type;
4051 }
4052
4053 static bfd_reloc_status_type elf32_arm_final_link_relocate
4054 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4055 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4056 const char *, unsigned char, enum arm_st_branch_type,
4057 struct elf_link_hash_entry *, bfd_boolean *, char **);
4058
4059 static unsigned int
4060 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4061 {
4062 switch (stub_type)
4063 {
4064 case arm_stub_a8_veneer_b_cond:
4065 case arm_stub_a8_veneer_b:
4066 case arm_stub_a8_veneer_bl:
4067 return 2;
4068
4069 case arm_stub_long_branch_any_any:
4070 case arm_stub_long_branch_v4t_arm_thumb:
4071 case arm_stub_long_branch_thumb_only:
4072 case arm_stub_long_branch_v4t_thumb_thumb:
4073 case arm_stub_long_branch_v4t_thumb_arm:
4074 case arm_stub_short_branch_v4t_thumb_arm:
4075 case arm_stub_long_branch_any_arm_pic:
4076 case arm_stub_long_branch_any_thumb_pic:
4077 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4078 case arm_stub_long_branch_v4t_arm_thumb_pic:
4079 case arm_stub_long_branch_v4t_thumb_arm_pic:
4080 case arm_stub_long_branch_thumb_only_pic:
4081 case arm_stub_long_branch_any_tls_pic:
4082 case arm_stub_long_branch_v4t_thumb_tls_pic:
4083 case arm_stub_a8_veneer_blx:
4084 return 4;
4085
4086 case arm_stub_long_branch_arm_nacl:
4087 case arm_stub_long_branch_arm_nacl_pic:
4088 return 16;
4089
4090 default:
4091 abort (); /* Should be unreachable. */
4092 }
4093 }
4094
4095 static bfd_boolean
4096 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4097 void * in_arg)
4098 {
4099 #define MAXRELOCS 3
4100 struct elf32_arm_stub_hash_entry *stub_entry;
4101 struct elf32_arm_link_hash_table *globals;
4102 struct bfd_link_info *info;
4103 asection *stub_sec;
4104 bfd *stub_bfd;
4105 bfd_byte *loc;
4106 bfd_vma sym_value;
4107 int template_size;
4108 int size;
4109 const insn_sequence *template_sequence;
4110 int i;
4111 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4112 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4113 int nrelocs = 0;
4114
4115 /* Massage our args to the form they really have. */
4116 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4117 info = (struct bfd_link_info *) in_arg;
4118
4119 globals = elf32_arm_hash_table (info);
4120 if (globals == NULL)
4121 return FALSE;
4122
4123 stub_sec = stub_entry->stub_sec;
4124
4125 if ((globals->fix_cortex_a8 < 0)
4126 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4127 /* We have to do less-strictly-aligned fixes last. */
4128 return TRUE;
4129
4130 /* Make a note of the offset within the stubs for this entry. */
4131 stub_entry->stub_offset = stub_sec->size;
4132 loc = stub_sec->contents + stub_entry->stub_offset;
4133
4134 stub_bfd = stub_sec->owner;
4135
4136 /* This is the address of the stub destination. */
4137 sym_value = (stub_entry->target_value
4138 + stub_entry->target_section->output_offset
4139 + stub_entry->target_section->output_section->vma);
4140
4141 template_sequence = stub_entry->stub_template;
4142 template_size = stub_entry->stub_template_size;
4143
4144 size = 0;
4145 for (i = 0; i < template_size; i++)
4146 {
4147 switch (template_sequence[i].type)
4148 {
4149 case THUMB16_TYPE:
4150 {
4151 bfd_vma data = (bfd_vma) template_sequence[i].data;
4152 if (template_sequence[i].reloc_addend != 0)
4153 {
4154 /* We've borrowed the reloc_addend field to mean we should
4155 insert a condition code into this (Thumb-1 branch)
4156 instruction. See THUMB16_BCOND_INSN. */
4157 BFD_ASSERT ((data & 0xff00) == 0xd000);
4158 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4159 }
4160 bfd_put_16 (stub_bfd, data, loc + size);
4161 size += 2;
4162 }
4163 break;
4164
4165 case THUMB32_TYPE:
4166 bfd_put_16 (stub_bfd,
4167 (template_sequence[i].data >> 16) & 0xffff,
4168 loc + size);
4169 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4170 loc + size + 2);
4171 if (template_sequence[i].r_type != R_ARM_NONE)
4172 {
4173 stub_reloc_idx[nrelocs] = i;
4174 stub_reloc_offset[nrelocs++] = size;
4175 }
4176 size += 4;
4177 break;
4178
4179 case ARM_TYPE:
4180 bfd_put_32 (stub_bfd, template_sequence[i].data,
4181 loc + size);
4182 /* Handle cases where the target is encoded within the
4183 instruction. */
4184 if (template_sequence[i].r_type == R_ARM_JUMP24)
4185 {
4186 stub_reloc_idx[nrelocs] = i;
4187 stub_reloc_offset[nrelocs++] = size;
4188 }
4189 size += 4;
4190 break;
4191
4192 case DATA_TYPE:
4193 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4194 stub_reloc_idx[nrelocs] = i;
4195 stub_reloc_offset[nrelocs++] = size;
4196 size += 4;
4197 break;
4198
4199 default:
4200 BFD_FAIL ();
4201 return FALSE;
4202 }
4203 }
4204
4205 stub_sec->size += size;
4206
4207 /* Stub size has already been computed in arm_size_one_stub. Check
4208 consistency. */
4209 BFD_ASSERT (size == stub_entry->stub_size);
4210
4211 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4212 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4213 sym_value |= 1;
4214
4215 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4216 in each stub. */
4217 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4218
4219 for (i = 0; i < nrelocs; i++)
4220 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4221 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4222 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4223 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4224 {
4225 Elf_Internal_Rela rel;
4226 bfd_boolean unresolved_reloc;
4227 char *error_message;
4228 enum arm_st_branch_type branch_type
4229 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4230 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4231 bfd_vma points_to = sym_value + stub_entry->target_addend;
4232
4233 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4234 rel.r_info = ELF32_R_INFO (0,
4235 template_sequence[stub_reloc_idx[i]].r_type);
4236 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4237
4238 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4239 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4240 template should refer back to the instruction after the original
4241 branch. */
4242 points_to = sym_value;
4243
4244 /* There may be unintended consequences if this is not true. */
4245 BFD_ASSERT (stub_entry->h == NULL);
4246
4247 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4248 properly. We should probably use this function unconditionally,
4249 rather than only for certain relocations listed in the enclosing
4250 conditional, for the sake of consistency. */
4251 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4252 (template_sequence[stub_reloc_idx[i]].r_type),
4253 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4254 points_to, info, stub_entry->target_section, "", STT_FUNC,
4255 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4256 &unresolved_reloc, &error_message);
4257 }
4258 else
4259 {
4260 Elf_Internal_Rela rel;
4261 bfd_boolean unresolved_reloc;
4262 char *error_message;
4263 bfd_vma points_to = sym_value + stub_entry->target_addend
4264 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4265
4266 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4267 rel.r_info = ELF32_R_INFO (0,
4268 template_sequence[stub_reloc_idx[i]].r_type);
4269 rel.r_addend = 0;
4270
4271 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4272 (template_sequence[stub_reloc_idx[i]].r_type),
4273 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4274 points_to, info, stub_entry->target_section, "", STT_FUNC,
4275 stub_entry->branch_type,
4276 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4277 &error_message);
4278 }
4279
4280 return TRUE;
4281 #undef MAXRELOCS
4282 }
4283
4284 /* Calculate the template, template size and instruction size for a stub.
4285 Return value is the instruction size. */
4286
4287 static unsigned int
4288 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4289 const insn_sequence **stub_template,
4290 int *stub_template_size)
4291 {
4292 const insn_sequence *template_sequence = NULL;
4293 int template_size = 0, i;
4294 unsigned int size;
4295
4296 template_sequence = stub_definitions[stub_type].template_sequence;
4297 if (stub_template)
4298 *stub_template = template_sequence;
4299
4300 template_size = stub_definitions[stub_type].template_size;
4301 if (stub_template_size)
4302 *stub_template_size = template_size;
4303
4304 size = 0;
4305 for (i = 0; i < template_size; i++)
4306 {
4307 switch (template_sequence[i].type)
4308 {
4309 case THUMB16_TYPE:
4310 size += 2;
4311 break;
4312
4313 case ARM_TYPE:
4314 case THUMB32_TYPE:
4315 case DATA_TYPE:
4316 size += 4;
4317 break;
4318
4319 default:
4320 BFD_FAIL ();
4321 return 0;
4322 }
4323 }
4324
4325 return size;
4326 }
4327
4328 /* As above, but don't actually build the stub. Just bump offset so
4329 we know stub section sizes. */
4330
4331 static bfd_boolean
4332 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4333 void *in_arg ATTRIBUTE_UNUSED)
4334 {
4335 struct elf32_arm_stub_hash_entry *stub_entry;
4336 const insn_sequence *template_sequence;
4337 int template_size, size;
4338
4339 /* Massage our args to the form they really have. */
4340 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4341
4342 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4343 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4344
4345 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4346 &template_size);
4347
4348 stub_entry->stub_size = size;
4349 stub_entry->stub_template = template_sequence;
4350 stub_entry->stub_template_size = template_size;
4351
4352 size = (size + 7) & ~7;
4353 stub_entry->stub_sec->size += size;
4354
4355 return TRUE;
4356 }
4357
4358 /* External entry points for sizing and building linker stubs. */
4359
4360 /* Set up various things so that we can make a list of input sections
4361 for each output section included in the link. Returns -1 on error,
4362 0 when no stubs will be needed, and 1 on success. */
4363
4364 int
4365 elf32_arm_setup_section_lists (bfd *output_bfd,
4366 struct bfd_link_info *info)
4367 {
4368 bfd *input_bfd;
4369 unsigned int bfd_count;
4370 int top_id, top_index;
4371 asection *section;
4372 asection **input_list, **list;
4373 bfd_size_type amt;
4374 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4375
4376 if (htab == NULL)
4377 return 0;
4378 if (! is_elf_hash_table (htab))
4379 return 0;
4380
4381 /* Count the number of input BFDs and find the top input section id. */
4382 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4383 input_bfd != NULL;
4384 input_bfd = input_bfd->link_next)
4385 {
4386 bfd_count += 1;
4387 for (section = input_bfd->sections;
4388 section != NULL;
4389 section = section->next)
4390 {
4391 if (top_id < section->id)
4392 top_id = section->id;
4393 }
4394 }
4395 htab->bfd_count = bfd_count;
4396
4397 amt = sizeof (struct map_stub) * (top_id + 1);
4398 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4399 if (htab->stub_group == NULL)
4400 return -1;
4401 htab->top_id = top_id;
4402
4403 /* We can't use output_bfd->section_count here to find the top output
4404 section index as some sections may have been removed, and
4405 _bfd_strip_section_from_output doesn't renumber the indices. */
4406 for (section = output_bfd->sections, top_index = 0;
4407 section != NULL;
4408 section = section->next)
4409 {
4410 if (top_index < section->index)
4411 top_index = section->index;
4412 }
4413
4414 htab->top_index = top_index;
4415 amt = sizeof (asection *) * (top_index + 1);
4416 input_list = (asection **) bfd_malloc (amt);
4417 htab->input_list = input_list;
4418 if (input_list == NULL)
4419 return -1;
4420
4421 /* For sections we aren't interested in, mark their entries with a
4422 value we can check later. */
4423 list = input_list + top_index;
4424 do
4425 *list = bfd_abs_section_ptr;
4426 while (list-- != input_list);
4427
4428 for (section = output_bfd->sections;
4429 section != NULL;
4430 section = section->next)
4431 {
4432 if ((section->flags & SEC_CODE) != 0)
4433 input_list[section->index] = NULL;
4434 }
4435
4436 return 1;
4437 }
4438
4439 /* The linker repeatedly calls this function for each input section,
4440 in the order that input sections are linked into output sections.
4441 Build lists of input sections to determine groupings between which
4442 we may insert linker stubs. */
4443
4444 void
4445 elf32_arm_next_input_section (struct bfd_link_info *info,
4446 asection *isec)
4447 {
4448 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4449
4450 if (htab == NULL)
4451 return;
4452
4453 if (isec->output_section->index <= htab->top_index)
4454 {
4455 asection **list = htab->input_list + isec->output_section->index;
4456
4457 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4458 {
4459 /* Steal the link_sec pointer for our list. */
4460 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4461 /* This happens to make the list in reverse order,
4462 which we reverse later. */
4463 PREV_SEC (isec) = *list;
4464 *list = isec;
4465 }
4466 }
4467 }
4468
4469 /* See whether we can group stub sections together. Grouping stub
4470 sections may result in fewer stubs. More importantly, we need to
4471 put all .init* and .fini* stubs at the end of the .init or
4472 .fini output sections respectively, because glibc splits the
4473 _init and _fini functions into multiple parts. Putting a stub in
4474 the middle of a function is not a good idea. */
4475
4476 static void
4477 group_sections (struct elf32_arm_link_hash_table *htab,
4478 bfd_size_type stub_group_size,
4479 bfd_boolean stubs_always_after_branch)
4480 {
4481 asection **list = htab->input_list;
4482
4483 do
4484 {
4485 asection *tail = *list;
4486 asection *head;
4487
4488 if (tail == bfd_abs_section_ptr)
4489 continue;
4490
4491 /* Reverse the list: we must avoid placing stubs at the
4492 beginning of the section because the beginning of the text
4493 section may be required for an interrupt vector in bare metal
4494 code. */
4495 #define NEXT_SEC PREV_SEC
4496 head = NULL;
4497 while (tail != NULL)
4498 {
4499 /* Pop from tail. */
4500 asection *item = tail;
4501 tail = PREV_SEC (item);
4502
4503 /* Push on head. */
4504 NEXT_SEC (item) = head;
4505 head = item;
4506 }
4507
4508 while (head != NULL)
4509 {
4510 asection *curr;
4511 asection *next;
4512 bfd_vma stub_group_start = head->output_offset;
4513 bfd_vma end_of_next;
4514
4515 curr = head;
4516 while (NEXT_SEC (curr) != NULL)
4517 {
4518 next = NEXT_SEC (curr);
4519 end_of_next = next->output_offset + next->size;
4520 if (end_of_next - stub_group_start >= stub_group_size)
4521 /* End of NEXT is too far from start, so stop. */
4522 break;
4523 /* Add NEXT to the group. */
4524 curr = next;
4525 }
4526
4527 /* OK, the size from the start to the start of CURR is less
4528 than stub_group_size and thus can be handled by one stub
4529 section. (Or the head section is itself larger than
4530 stub_group_size, in which case we may be toast.)
4531 We should really be keeping track of the total size of
4532 stubs added here, as stubs contribute to the final output
4533 section size. */
4534 do
4535 {
4536 next = NEXT_SEC (head);
4537 /* Set up this stub group. */
4538 htab->stub_group[head->id].link_sec = curr;
4539 }
4540 while (head != curr && (head = next) != NULL);
4541
4542 /* But wait, there's more! Input sections up to stub_group_size
4543 bytes after the stub section can be handled by it too. */
4544 if (!stubs_always_after_branch)
4545 {
4546 stub_group_start = curr->output_offset + curr->size;
4547
4548 while (next != NULL)
4549 {
4550 end_of_next = next->output_offset + next->size;
4551 if (end_of_next - stub_group_start >= stub_group_size)
4552 /* End of NEXT is too far from stubs, so stop. */
4553 break;
4554 /* Add NEXT to the stub group. */
4555 head = next;
4556 next = NEXT_SEC (head);
4557 htab->stub_group[head->id].link_sec = curr;
4558 }
4559 }
4560 head = next;
4561 }
4562 }
4563 while (list++ != htab->input_list + htab->top_index);
4564
4565 free (htab->input_list);
4566 #undef PREV_SEC
4567 #undef NEXT_SEC
4568 }
4569
4570 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4571 erratum fix. */
4572
4573 static int
4574 a8_reloc_compare (const void *a, const void *b)
4575 {
4576 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4577 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4578
4579 if (ra->from < rb->from)
4580 return -1;
4581 else if (ra->from > rb->from)
4582 return 1;
4583 else
4584 return 0;
4585 }
4586
4587 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4588 const char *, char **);
4589
4590 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4591 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4592 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4593 otherwise. */
4594
4595 static bfd_boolean
4596 cortex_a8_erratum_scan (bfd *input_bfd,
4597 struct bfd_link_info *info,
4598 struct a8_erratum_fix **a8_fixes_p,
4599 unsigned int *num_a8_fixes_p,
4600 unsigned int *a8_fix_table_size_p,
4601 struct a8_erratum_reloc *a8_relocs,
4602 unsigned int num_a8_relocs,
4603 unsigned prev_num_a8_fixes,
4604 bfd_boolean *stub_changed_p)
4605 {
4606 asection *section;
4607 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4608 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4609 unsigned int num_a8_fixes = *num_a8_fixes_p;
4610 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4611
4612 if (htab == NULL)
4613 return FALSE;
4614
4615 for (section = input_bfd->sections;
4616 section != NULL;
4617 section = section->next)
4618 {
4619 bfd_byte *contents = NULL;
4620 struct _arm_elf_section_data *sec_data;
4621 unsigned int span;
4622 bfd_vma base_vma;
4623
4624 if (elf_section_type (section) != SHT_PROGBITS
4625 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4626 || (section->flags & SEC_EXCLUDE) != 0
4627 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4628 || (section->output_section == bfd_abs_section_ptr))
4629 continue;
4630
4631 base_vma = section->output_section->vma + section->output_offset;
4632
4633 if (elf_section_data (section)->this_hdr.contents != NULL)
4634 contents = elf_section_data (section)->this_hdr.contents;
4635 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4636 return TRUE;
4637
4638 sec_data = elf32_arm_section_data (section);
4639
4640 for (span = 0; span < sec_data->mapcount; span++)
4641 {
4642 unsigned int span_start = sec_data->map[span].vma;
4643 unsigned int span_end = (span == sec_data->mapcount - 1)
4644 ? section->size : sec_data->map[span + 1].vma;
4645 unsigned int i;
4646 char span_type = sec_data->map[span].type;
4647 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4648
4649 if (span_type != 't')
4650 continue;
4651
4652 /* Span is entirely within a single 4KB region: skip scanning. */
4653 if (((base_vma + span_start) & ~0xfff)
4654 == ((base_vma + span_end) & ~0xfff))
4655 continue;
4656
4657 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4658
4659 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4660 * The branch target is in the same 4KB region as the
4661 first half of the branch.
4662 * The instruction before the branch is a 32-bit
4663 length non-branch instruction. */
4664 for (i = span_start; i < span_end;)
4665 {
4666 unsigned int insn = bfd_getl16 (&contents[i]);
4667 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4668 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4669
4670 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4671 insn_32bit = TRUE;
4672
4673 if (insn_32bit)
4674 {
4675 /* Load the rest of the insn (in manual-friendly order). */
4676 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4677
4678 /* Encoding T4: B<c>.W. */
4679 is_b = (insn & 0xf800d000) == 0xf0009000;
4680 /* Encoding T1: BL<c>.W. */
4681 is_bl = (insn & 0xf800d000) == 0xf000d000;
4682 /* Encoding T2: BLX<c>.W. */
4683 is_blx = (insn & 0xf800d000) == 0xf000c000;
4684 /* Encoding T3: B<c>.W (not permitted in IT block). */
4685 is_bcc = (insn & 0xf800d000) == 0xf0008000
4686 && (insn & 0x07f00000) != 0x03800000;
4687 }
4688
4689 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4690
4691 if (((base_vma + i) & 0xfff) == 0xffe
4692 && insn_32bit
4693 && is_32bit_branch
4694 && last_was_32bit
4695 && ! last_was_branch)
4696 {
4697 bfd_signed_vma offset = 0;
4698 bfd_boolean force_target_arm = FALSE;
4699 bfd_boolean force_target_thumb = FALSE;
4700 bfd_vma target;
4701 enum elf32_arm_stub_type stub_type = arm_stub_none;
4702 struct a8_erratum_reloc key, *found;
4703 bfd_boolean use_plt = FALSE;
4704
4705 key.from = base_vma + i;
4706 found = (struct a8_erratum_reloc *)
4707 bsearch (&key, a8_relocs, num_a8_relocs,
4708 sizeof (struct a8_erratum_reloc),
4709 &a8_reloc_compare);
4710
4711 if (found)
4712 {
4713 char *error_message = NULL;
4714 struct elf_link_hash_entry *entry;
4715
4716 /* We don't care about the error returned from this
4717 function, only if there is glue or not. */
4718 entry = find_thumb_glue (info, found->sym_name,
4719 &error_message);
4720
4721 if (entry)
4722 found->non_a8_stub = TRUE;
4723
4724 /* Keep a simpler condition, for the sake of clarity. */
4725 if (htab->root.splt != NULL && found->hash != NULL
4726 && found->hash->root.plt.offset != (bfd_vma) -1)
4727 use_plt = TRUE;
4728
4729 if (found->r_type == R_ARM_THM_CALL)
4730 {
4731 if (found->branch_type == ST_BRANCH_TO_ARM
4732 || use_plt)
4733 force_target_arm = TRUE;
4734 else
4735 force_target_thumb = TRUE;
4736 }
4737 }
4738
4739 /* Check if we have an offending branch instruction. */
4740
4741 if (found && found->non_a8_stub)
4742 /* We've already made a stub for this instruction, e.g.
4743 it's a long branch or a Thumb->ARM stub. Assume that
4744 stub will suffice to work around the A8 erratum (see
4745 setting of always_after_branch above). */
4746 ;
4747 else if (is_bcc)
4748 {
4749 offset = (insn & 0x7ff) << 1;
4750 offset |= (insn & 0x3f0000) >> 4;
4751 offset |= (insn & 0x2000) ? 0x40000 : 0;
4752 offset |= (insn & 0x800) ? 0x80000 : 0;
4753 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4754 if (offset & 0x100000)
4755 offset |= ~ ((bfd_signed_vma) 0xfffff);
4756 stub_type = arm_stub_a8_veneer_b_cond;
4757 }
4758 else if (is_b || is_bl || is_blx)
4759 {
4760 int s = (insn & 0x4000000) != 0;
4761 int j1 = (insn & 0x2000) != 0;
4762 int j2 = (insn & 0x800) != 0;
4763 int i1 = !(j1 ^ s);
4764 int i2 = !(j2 ^ s);
4765
4766 offset = (insn & 0x7ff) << 1;
4767 offset |= (insn & 0x3ff0000) >> 4;
4768 offset |= i2 << 22;
4769 offset |= i1 << 23;
4770 offset |= s << 24;
4771 if (offset & 0x1000000)
4772 offset |= ~ ((bfd_signed_vma) 0xffffff);
4773
4774 if (is_blx)
4775 offset &= ~ ((bfd_signed_vma) 3);
4776
4777 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4778 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4779 }
4780
4781 if (stub_type != arm_stub_none)
4782 {
4783 bfd_vma pc_for_insn = base_vma + i + 4;
4784
4785 /* The original instruction is a BL, but the target is
4786 an ARM instruction. If we were not making a stub,
4787 the BL would have been converted to a BLX. Use the
4788 BLX stub instead in that case. */
4789 if (htab->use_blx && force_target_arm
4790 && stub_type == arm_stub_a8_veneer_bl)
4791 {
4792 stub_type = arm_stub_a8_veneer_blx;
4793 is_blx = TRUE;
4794 is_bl = FALSE;
4795 }
4796 /* Conversely, if the original instruction was
4797 BLX but the target is Thumb mode, use the BL
4798 stub. */
4799 else if (force_target_thumb
4800 && stub_type == arm_stub_a8_veneer_blx)
4801 {
4802 stub_type = arm_stub_a8_veneer_bl;
4803 is_blx = FALSE;
4804 is_bl = TRUE;
4805 }
4806
4807 if (is_blx)
4808 pc_for_insn &= ~ ((bfd_vma) 3);
4809
4810 /* If we found a relocation, use the proper destination,
4811 not the offset in the (unrelocated) instruction.
4812 Note this is always done if we switched the stub type
4813 above. */
4814 if (found)
4815 offset =
4816 (bfd_signed_vma) (found->destination - pc_for_insn);
4817
4818 /* If the stub will use a Thumb-mode branch to a
4819 PLT target, redirect it to the preceding Thumb
4820 entry point. */
4821 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4822 offset -= PLT_THUMB_STUB_SIZE;
4823
4824 target = pc_for_insn + offset;
4825
4826 /* The BLX stub is ARM-mode code. Adjust the offset to
4827 take the different PC value (+8 instead of +4) into
4828 account. */
4829 if (stub_type == arm_stub_a8_veneer_blx)
4830 offset += 4;
4831
4832 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4833 {
4834 char *stub_name = NULL;
4835
4836 if (num_a8_fixes == a8_fix_table_size)
4837 {
4838 a8_fix_table_size *= 2;
4839 a8_fixes = (struct a8_erratum_fix *)
4840 bfd_realloc (a8_fixes,
4841 sizeof (struct a8_erratum_fix)
4842 * a8_fix_table_size);
4843 }
4844
4845 if (num_a8_fixes < prev_num_a8_fixes)
4846 {
4847 /* If we're doing a subsequent scan,
4848 check if we've found the same fix as
4849 before, and try and reuse the stub
4850 name. */
4851 stub_name = a8_fixes[num_a8_fixes].stub_name;
4852 if ((a8_fixes[num_a8_fixes].section != section)
4853 || (a8_fixes[num_a8_fixes].offset != i))
4854 {
4855 free (stub_name);
4856 stub_name = NULL;
4857 *stub_changed_p = TRUE;
4858 }
4859 }
4860
4861 if (!stub_name)
4862 {
4863 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4864 if (stub_name != NULL)
4865 sprintf (stub_name, "%x:%x", section->id, i);
4866 }
4867
4868 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4869 a8_fixes[num_a8_fixes].section = section;
4870 a8_fixes[num_a8_fixes].offset = i;
4871 a8_fixes[num_a8_fixes].addend = offset;
4872 a8_fixes[num_a8_fixes].orig_insn = insn;
4873 a8_fixes[num_a8_fixes].stub_name = stub_name;
4874 a8_fixes[num_a8_fixes].stub_type = stub_type;
4875 a8_fixes[num_a8_fixes].branch_type =
4876 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4877
4878 num_a8_fixes++;
4879 }
4880 }
4881 }
4882
4883 i += insn_32bit ? 4 : 2;
4884 last_was_32bit = insn_32bit;
4885 last_was_branch = is_32bit_branch;
4886 }
4887 }
4888
4889 if (elf_section_data (section)->this_hdr.contents == NULL)
4890 free (contents);
4891 }
4892
4893 *a8_fixes_p = a8_fixes;
4894 *num_a8_fixes_p = num_a8_fixes;
4895 *a8_fix_table_size_p = a8_fix_table_size;
4896
4897 return FALSE;
4898 }
4899
4900 /* Determine and set the size of the stub section for a final link.
4901
4902 The basic idea here is to examine all the relocations looking for
4903 PC-relative calls to a target that is unreachable with a "bl"
4904 instruction. */
4905
4906 bfd_boolean
4907 elf32_arm_size_stubs (bfd *output_bfd,
4908 bfd *stub_bfd,
4909 struct bfd_link_info *info,
4910 bfd_signed_vma group_size,
4911 asection * (*add_stub_section) (const char *, asection *,
4912 unsigned int),
4913 void (*layout_sections_again) (void))
4914 {
4915 bfd_size_type stub_group_size;
4916 bfd_boolean stubs_always_after_branch;
4917 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4918 struct a8_erratum_fix *a8_fixes = NULL;
4919 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4920 struct a8_erratum_reloc *a8_relocs = NULL;
4921 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4922
4923 if (htab == NULL)
4924 return FALSE;
4925
4926 if (htab->fix_cortex_a8)
4927 {
4928 a8_fixes = (struct a8_erratum_fix *)
4929 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4930 a8_relocs = (struct a8_erratum_reloc *)
4931 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4932 }
4933
4934 /* Propagate mach to stub bfd, because it may not have been
4935 finalized when we created stub_bfd. */
4936 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4937 bfd_get_mach (output_bfd));
4938
4939 /* Stash our params away. */
4940 htab->stub_bfd = stub_bfd;
4941 htab->add_stub_section = add_stub_section;
4942 htab->layout_sections_again = layout_sections_again;
4943 stubs_always_after_branch = group_size < 0;
4944
4945 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4946 as the first half of a 32-bit branch straddling two 4K pages. This is a
4947 crude way of enforcing that. */
4948 if (htab->fix_cortex_a8)
4949 stubs_always_after_branch = 1;
4950
4951 if (group_size < 0)
4952 stub_group_size = -group_size;
4953 else
4954 stub_group_size = group_size;
4955
4956 if (stub_group_size == 1)
4957 {
4958 /* Default values. */
4959 /* Thumb branch range is +-4MB has to be used as the default
4960 maximum size (a given section can contain both ARM and Thumb
4961 code, so the worst case has to be taken into account).
4962
4963 This value is 24K less than that, which allows for 2025
4964 12-byte stubs. If we exceed that, then we will fail to link.
4965 The user will have to relink with an explicit group size
4966 option. */
4967 stub_group_size = 4170000;
4968 }
4969
4970 group_sections (htab, stub_group_size, stubs_always_after_branch);
4971
4972 /* If we're applying the cortex A8 fix, we need to determine the
4973 program header size now, because we cannot change it later --
4974 that could alter section placements. Notice the A8 erratum fix
4975 ends up requiring the section addresses to remain unchanged
4976 modulo the page size. That's something we cannot represent
4977 inside BFD, and we don't want to force the section alignment to
4978 be the page size. */
4979 if (htab->fix_cortex_a8)
4980 (*htab->layout_sections_again) ();
4981
4982 while (1)
4983 {
4984 bfd *input_bfd;
4985 unsigned int bfd_indx;
4986 asection *stub_sec;
4987 bfd_boolean stub_changed = FALSE;
4988 unsigned prev_num_a8_fixes = num_a8_fixes;
4989
4990 num_a8_fixes = 0;
4991 for (input_bfd = info->input_bfds, bfd_indx = 0;
4992 input_bfd != NULL;
4993 input_bfd = input_bfd->link_next, bfd_indx++)
4994 {
4995 Elf_Internal_Shdr *symtab_hdr;
4996 asection *section;
4997 Elf_Internal_Sym *local_syms = NULL;
4998
4999 if (!is_arm_elf (input_bfd))
5000 continue;
5001
5002 num_a8_relocs = 0;
5003
5004 /* We'll need the symbol table in a second. */
5005 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5006 if (symtab_hdr->sh_info == 0)
5007 continue;
5008
5009 /* Walk over each section attached to the input bfd. */
5010 for (section = input_bfd->sections;
5011 section != NULL;
5012 section = section->next)
5013 {
5014 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5015
5016 /* If there aren't any relocs, then there's nothing more
5017 to do. */
5018 if ((section->flags & SEC_RELOC) == 0
5019 || section->reloc_count == 0
5020 || (section->flags & SEC_CODE) == 0)
5021 continue;
5022
5023 /* If this section is a link-once section that will be
5024 discarded, then don't create any stubs. */
5025 if (section->output_section == NULL
5026 || section->output_section->owner != output_bfd)
5027 continue;
5028
5029 /* Get the relocs. */
5030 internal_relocs
5031 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5032 NULL, info->keep_memory);
5033 if (internal_relocs == NULL)
5034 goto error_ret_free_local;
5035
5036 /* Now examine each relocation. */
5037 irela = internal_relocs;
5038 irelaend = irela + section->reloc_count;
5039 for (; irela < irelaend; irela++)
5040 {
5041 unsigned int r_type, r_indx;
5042 enum elf32_arm_stub_type stub_type;
5043 struct elf32_arm_stub_hash_entry *stub_entry;
5044 asection *sym_sec;
5045 bfd_vma sym_value;
5046 bfd_vma destination;
5047 struct elf32_arm_link_hash_entry *hash;
5048 const char *sym_name;
5049 char *stub_name;
5050 const asection *id_sec;
5051 unsigned char st_type;
5052 enum arm_st_branch_type branch_type;
5053 bfd_boolean created_stub = FALSE;
5054
5055 r_type = ELF32_R_TYPE (irela->r_info);
5056 r_indx = ELF32_R_SYM (irela->r_info);
5057
5058 if (r_type >= (unsigned int) R_ARM_max)
5059 {
5060 bfd_set_error (bfd_error_bad_value);
5061 error_ret_free_internal:
5062 if (elf_section_data (section)->relocs == NULL)
5063 free (internal_relocs);
5064 goto error_ret_free_local;
5065 }
5066
5067 hash = NULL;
5068 if (r_indx >= symtab_hdr->sh_info)
5069 hash = elf32_arm_hash_entry
5070 (elf_sym_hashes (input_bfd)
5071 [r_indx - symtab_hdr->sh_info]);
5072
5073 /* Only look for stubs on branch instructions, or
5074 non-relaxed TLSCALL */
5075 if ((r_type != (unsigned int) R_ARM_CALL)
5076 && (r_type != (unsigned int) R_ARM_THM_CALL)
5077 && (r_type != (unsigned int) R_ARM_JUMP24)
5078 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5079 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5080 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5081 && (r_type != (unsigned int) R_ARM_PLT32)
5082 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5083 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5084 && r_type == elf32_arm_tls_transition
5085 (info, r_type, &hash->root)
5086 && ((hash ? hash->tls_type
5087 : (elf32_arm_local_got_tls_type
5088 (input_bfd)[r_indx]))
5089 & GOT_TLS_GDESC) != 0))
5090 continue;
5091
5092 /* Now determine the call target, its name, value,
5093 section. */
5094 sym_sec = NULL;
5095 sym_value = 0;
5096 destination = 0;
5097 sym_name = NULL;
5098
5099 if (r_type == (unsigned int) R_ARM_TLS_CALL
5100 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5101 {
5102 /* A non-relaxed TLS call. The target is the
5103 plt-resident trampoline and nothing to do
5104 with the symbol. */
5105 BFD_ASSERT (htab->tls_trampoline > 0);
5106 sym_sec = htab->root.splt;
5107 sym_value = htab->tls_trampoline;
5108 hash = 0;
5109 st_type = STT_FUNC;
5110 branch_type = ST_BRANCH_TO_ARM;
5111 }
5112 else if (!hash)
5113 {
5114 /* It's a local symbol. */
5115 Elf_Internal_Sym *sym;
5116
5117 if (local_syms == NULL)
5118 {
5119 local_syms
5120 = (Elf_Internal_Sym *) symtab_hdr->contents;
5121 if (local_syms == NULL)
5122 local_syms
5123 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5124 symtab_hdr->sh_info, 0,
5125 NULL, NULL, NULL);
5126 if (local_syms == NULL)
5127 goto error_ret_free_internal;
5128 }
5129
5130 sym = local_syms + r_indx;
5131 if (sym->st_shndx == SHN_UNDEF)
5132 sym_sec = bfd_und_section_ptr;
5133 else if (sym->st_shndx == SHN_ABS)
5134 sym_sec = bfd_abs_section_ptr;
5135 else if (sym->st_shndx == SHN_COMMON)
5136 sym_sec = bfd_com_section_ptr;
5137 else
5138 sym_sec =
5139 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5140
5141 if (!sym_sec)
5142 /* This is an undefined symbol. It can never
5143 be resolved. */
5144 continue;
5145
5146 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5147 sym_value = sym->st_value;
5148 destination = (sym_value + irela->r_addend
5149 + sym_sec->output_offset
5150 + sym_sec->output_section->vma);
5151 st_type = ELF_ST_TYPE (sym->st_info);
5152 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5153 sym_name
5154 = bfd_elf_string_from_elf_section (input_bfd,
5155 symtab_hdr->sh_link,
5156 sym->st_name);
5157 }
5158 else
5159 {
5160 /* It's an external symbol. */
5161 while (hash->root.root.type == bfd_link_hash_indirect
5162 || hash->root.root.type == bfd_link_hash_warning)
5163 hash = ((struct elf32_arm_link_hash_entry *)
5164 hash->root.root.u.i.link);
5165
5166 if (hash->root.root.type == bfd_link_hash_defined
5167 || hash->root.root.type == bfd_link_hash_defweak)
5168 {
5169 sym_sec = hash->root.root.u.def.section;
5170 sym_value = hash->root.root.u.def.value;
5171
5172 struct elf32_arm_link_hash_table *globals =
5173 elf32_arm_hash_table (info);
5174
5175 /* For a destination in a shared library,
5176 use the PLT stub as target address to
5177 decide whether a branch stub is
5178 needed. */
5179 if (globals != NULL
5180 && globals->root.splt != NULL
5181 && hash != NULL
5182 && hash->root.plt.offset != (bfd_vma) -1)
5183 {
5184 sym_sec = globals->root.splt;
5185 sym_value = hash->root.plt.offset;
5186 if (sym_sec->output_section != NULL)
5187 destination = (sym_value
5188 + sym_sec->output_offset
5189 + sym_sec->output_section->vma);
5190 }
5191 else if (sym_sec->output_section != NULL)
5192 destination = (sym_value + irela->r_addend
5193 + sym_sec->output_offset
5194 + sym_sec->output_section->vma);
5195 }
5196 else if ((hash->root.root.type == bfd_link_hash_undefined)
5197 || (hash->root.root.type == bfd_link_hash_undefweak))
5198 {
5199 /* For a shared library, use the PLT stub as
5200 target address to decide whether a long
5201 branch stub is needed.
5202 For absolute code, they cannot be handled. */
5203 struct elf32_arm_link_hash_table *globals =
5204 elf32_arm_hash_table (info);
5205
5206 if (globals != NULL
5207 && globals->root.splt != NULL
5208 && hash != NULL
5209 && hash->root.plt.offset != (bfd_vma) -1)
5210 {
5211 sym_sec = globals->root.splt;
5212 sym_value = hash->root.plt.offset;
5213 if (sym_sec->output_section != NULL)
5214 destination = (sym_value
5215 + sym_sec->output_offset
5216 + sym_sec->output_section->vma);
5217 }
5218 else
5219 continue;
5220 }
5221 else
5222 {
5223 bfd_set_error (bfd_error_bad_value);
5224 goto error_ret_free_internal;
5225 }
5226 st_type = hash->root.type;
5227 branch_type = hash->root.target_internal;
5228 sym_name = hash->root.root.root.string;
5229 }
5230
5231 do
5232 {
5233 /* Determine what (if any) linker stub is needed. */
5234 stub_type = arm_type_of_stub (info, section, irela,
5235 st_type, &branch_type,
5236 hash, destination, sym_sec,
5237 input_bfd, sym_name);
5238 if (stub_type == arm_stub_none)
5239 break;
5240
5241 /* Support for grouping stub sections. */
5242 id_sec = htab->stub_group[section->id].link_sec;
5243
5244 /* Get the name of this stub. */
5245 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5246 irela, stub_type);
5247 if (!stub_name)
5248 goto error_ret_free_internal;
5249
5250 /* We've either created a stub for this reloc already,
5251 or we are about to. */
5252 created_stub = TRUE;
5253
5254 stub_entry = arm_stub_hash_lookup
5255 (&htab->stub_hash_table, stub_name,
5256 FALSE, FALSE);
5257 if (stub_entry != NULL)
5258 {
5259 /* The proper stub has already been created. */
5260 free (stub_name);
5261 stub_entry->target_value = sym_value;
5262 break;
5263 }
5264
5265 stub_entry = elf32_arm_add_stub (stub_name, section,
5266 htab);
5267 if (stub_entry == NULL)
5268 {
5269 free (stub_name);
5270 goto error_ret_free_internal;
5271 }
5272
5273 stub_entry->target_value = sym_value;
5274 stub_entry->target_section = sym_sec;
5275 stub_entry->stub_type = stub_type;
5276 stub_entry->h = hash;
5277 stub_entry->branch_type = branch_type;
5278
5279 if (sym_name == NULL)
5280 sym_name = "unnamed";
5281 stub_entry->output_name = (char *)
5282 bfd_alloc (htab->stub_bfd,
5283 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5284 + strlen (sym_name));
5285 if (stub_entry->output_name == NULL)
5286 {
5287 free (stub_name);
5288 goto error_ret_free_internal;
5289 }
5290
5291 /* For historical reasons, use the existing names for
5292 ARM-to-Thumb and Thumb-to-ARM stubs. */
5293 if ((r_type == (unsigned int) R_ARM_THM_CALL
5294 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5295 && branch_type == ST_BRANCH_TO_ARM)
5296 sprintf (stub_entry->output_name,
5297 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5298 else if ((r_type == (unsigned int) R_ARM_CALL
5299 || r_type == (unsigned int) R_ARM_JUMP24)
5300 && branch_type == ST_BRANCH_TO_THUMB)
5301 sprintf (stub_entry->output_name,
5302 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5303 else
5304 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5305 sym_name);
5306
5307 stub_changed = TRUE;
5308 }
5309 while (0);
5310
5311 /* Look for relocations which might trigger Cortex-A8
5312 erratum. */
5313 if (htab->fix_cortex_a8
5314 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5315 || r_type == (unsigned int) R_ARM_THM_JUMP19
5316 || r_type == (unsigned int) R_ARM_THM_CALL
5317 || r_type == (unsigned int) R_ARM_THM_XPC22))
5318 {
5319 bfd_vma from = section->output_section->vma
5320 + section->output_offset
5321 + irela->r_offset;
5322
5323 if ((from & 0xfff) == 0xffe)
5324 {
5325 /* Found a candidate. Note we haven't checked the
5326 destination is within 4K here: if we do so (and
5327 don't create an entry in a8_relocs) we can't tell
5328 that a branch should have been relocated when
5329 scanning later. */
5330 if (num_a8_relocs == a8_reloc_table_size)
5331 {
5332 a8_reloc_table_size *= 2;
5333 a8_relocs = (struct a8_erratum_reloc *)
5334 bfd_realloc (a8_relocs,
5335 sizeof (struct a8_erratum_reloc)
5336 * a8_reloc_table_size);
5337 }
5338
5339 a8_relocs[num_a8_relocs].from = from;
5340 a8_relocs[num_a8_relocs].destination = destination;
5341 a8_relocs[num_a8_relocs].r_type = r_type;
5342 a8_relocs[num_a8_relocs].branch_type = branch_type;
5343 a8_relocs[num_a8_relocs].sym_name = sym_name;
5344 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5345 a8_relocs[num_a8_relocs].hash = hash;
5346
5347 num_a8_relocs++;
5348 }
5349 }
5350 }
5351
5352 /* We're done with the internal relocs, free them. */
5353 if (elf_section_data (section)->relocs == NULL)
5354 free (internal_relocs);
5355 }
5356
5357 if (htab->fix_cortex_a8)
5358 {
5359 /* Sort relocs which might apply to Cortex-A8 erratum. */
5360 qsort (a8_relocs, num_a8_relocs,
5361 sizeof (struct a8_erratum_reloc),
5362 &a8_reloc_compare);
5363
5364 /* Scan for branches which might trigger Cortex-A8 erratum. */
5365 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5366 &num_a8_fixes, &a8_fix_table_size,
5367 a8_relocs, num_a8_relocs,
5368 prev_num_a8_fixes, &stub_changed)
5369 != 0)
5370 goto error_ret_free_local;
5371 }
5372 }
5373
5374 if (prev_num_a8_fixes != num_a8_fixes)
5375 stub_changed = TRUE;
5376
5377 if (!stub_changed)
5378 break;
5379
5380 /* OK, we've added some stubs. Find out the new size of the
5381 stub sections. */
5382 for (stub_sec = htab->stub_bfd->sections;
5383 stub_sec != NULL;
5384 stub_sec = stub_sec->next)
5385 {
5386 /* Ignore non-stub sections. */
5387 if (!strstr (stub_sec->name, STUB_SUFFIX))
5388 continue;
5389
5390 stub_sec->size = 0;
5391 }
5392
5393 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5394
5395 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5396 if (htab->fix_cortex_a8)
5397 for (i = 0; i < num_a8_fixes; i++)
5398 {
5399 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5400 a8_fixes[i].section, htab);
5401
5402 if (stub_sec == NULL)
5403 goto error_ret_free_local;
5404
5405 stub_sec->size
5406 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5407 NULL);
5408 }
5409
5410
5411 /* Ask the linker to do its stuff. */
5412 (*htab->layout_sections_again) ();
5413 }
5414
5415 /* Add stubs for Cortex-A8 erratum fixes now. */
5416 if (htab->fix_cortex_a8)
5417 {
5418 for (i = 0; i < num_a8_fixes; i++)
5419 {
5420 struct elf32_arm_stub_hash_entry *stub_entry;
5421 char *stub_name = a8_fixes[i].stub_name;
5422 asection *section = a8_fixes[i].section;
5423 unsigned int section_id = a8_fixes[i].section->id;
5424 asection *link_sec = htab->stub_group[section_id].link_sec;
5425 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5426 const insn_sequence *template_sequence;
5427 int template_size, size = 0;
5428
5429 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5430 TRUE, FALSE);
5431 if (stub_entry == NULL)
5432 {
5433 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5434 section->owner,
5435 stub_name);
5436 return FALSE;
5437 }
5438
5439 stub_entry->stub_sec = stub_sec;
5440 stub_entry->stub_offset = 0;
5441 stub_entry->id_sec = link_sec;
5442 stub_entry->stub_type = a8_fixes[i].stub_type;
5443 stub_entry->target_section = a8_fixes[i].section;
5444 stub_entry->target_value = a8_fixes[i].offset;
5445 stub_entry->target_addend = a8_fixes[i].addend;
5446 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5447 stub_entry->branch_type = a8_fixes[i].branch_type;
5448
5449 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5450 &template_sequence,
5451 &template_size);
5452
5453 stub_entry->stub_size = size;
5454 stub_entry->stub_template = template_sequence;
5455 stub_entry->stub_template_size = template_size;
5456 }
5457
5458 /* Stash the Cortex-A8 erratum fix array for use later in
5459 elf32_arm_write_section(). */
5460 htab->a8_erratum_fixes = a8_fixes;
5461 htab->num_a8_erratum_fixes = num_a8_fixes;
5462 }
5463 else
5464 {
5465 htab->a8_erratum_fixes = NULL;
5466 htab->num_a8_erratum_fixes = 0;
5467 }
5468 return TRUE;
5469
5470 error_ret_free_local:
5471 return FALSE;
5472 }
5473
5474 /* Build all the stubs associated with the current output file. The
5475 stubs are kept in a hash table attached to the main linker hash
5476 table. We also set up the .plt entries for statically linked PIC
5477 functions here. This function is called via arm_elf_finish in the
5478 linker. */
5479
5480 bfd_boolean
5481 elf32_arm_build_stubs (struct bfd_link_info *info)
5482 {
5483 asection *stub_sec;
5484 struct bfd_hash_table *table;
5485 struct elf32_arm_link_hash_table *htab;
5486
5487 htab = elf32_arm_hash_table (info);
5488 if (htab == NULL)
5489 return FALSE;
5490
5491 for (stub_sec = htab->stub_bfd->sections;
5492 stub_sec != NULL;
5493 stub_sec = stub_sec->next)
5494 {
5495 bfd_size_type size;
5496
5497 /* Ignore non-stub sections. */
5498 if (!strstr (stub_sec->name, STUB_SUFFIX))
5499 continue;
5500
5501 /* Allocate memory to hold the linker stubs. */
5502 size = stub_sec->size;
5503 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5504 if (stub_sec->contents == NULL && size != 0)
5505 return FALSE;
5506 stub_sec->size = 0;
5507 }
5508
5509 /* Build the stubs as directed by the stub hash table. */
5510 table = &htab->stub_hash_table;
5511 bfd_hash_traverse (table, arm_build_one_stub, info);
5512 if (htab->fix_cortex_a8)
5513 {
5514 /* Place the cortex a8 stubs last. */
5515 htab->fix_cortex_a8 = -1;
5516 bfd_hash_traverse (table, arm_build_one_stub, info);
5517 }
5518
5519 return TRUE;
5520 }
5521
5522 /* Locate the Thumb encoded calling stub for NAME. */
5523
5524 static struct elf_link_hash_entry *
5525 find_thumb_glue (struct bfd_link_info *link_info,
5526 const char *name,
5527 char **error_message)
5528 {
5529 char *tmp_name;
5530 struct elf_link_hash_entry *hash;
5531 struct elf32_arm_link_hash_table *hash_table;
5532
5533 /* We need a pointer to the armelf specific hash table. */
5534 hash_table = elf32_arm_hash_table (link_info);
5535 if (hash_table == NULL)
5536 return NULL;
5537
5538 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5539 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5540
5541 BFD_ASSERT (tmp_name);
5542
5543 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5544
5545 hash = elf_link_hash_lookup
5546 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5547
5548 if (hash == NULL
5549 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5550 tmp_name, name) == -1)
5551 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5552
5553 free (tmp_name);
5554
5555 return hash;
5556 }
5557
5558 /* Locate the ARM encoded calling stub for NAME. */
5559
5560 static struct elf_link_hash_entry *
5561 find_arm_glue (struct bfd_link_info *link_info,
5562 const char *name,
5563 char **error_message)
5564 {
5565 char *tmp_name;
5566 struct elf_link_hash_entry *myh;
5567 struct elf32_arm_link_hash_table *hash_table;
5568
5569 /* We need a pointer to the elfarm specific hash table. */
5570 hash_table = elf32_arm_hash_table (link_info);
5571 if (hash_table == NULL)
5572 return NULL;
5573
5574 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5575 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5576
5577 BFD_ASSERT (tmp_name);
5578
5579 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5580
5581 myh = elf_link_hash_lookup
5582 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5583
5584 if (myh == NULL
5585 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5586 tmp_name, name) == -1)
5587 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5588
5589 free (tmp_name);
5590
5591 return myh;
5592 }
5593
5594 /* ARM->Thumb glue (static images):
5595
5596 .arm
5597 __func_from_arm:
5598 ldr r12, __func_addr
5599 bx r12
5600 __func_addr:
5601 .word func @ behave as if you saw a ARM_32 reloc.
5602
5603 (v5t static images)
5604 .arm
5605 __func_from_arm:
5606 ldr pc, __func_addr
5607 __func_addr:
5608 .word func @ behave as if you saw a ARM_32 reloc.
5609
5610 (relocatable images)
5611 .arm
5612 __func_from_arm:
5613 ldr r12, __func_offset
5614 add r12, r12, pc
5615 bx r12
5616 __func_offset:
5617 .word func - . */
5618
5619 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5620 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5621 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5622 static const insn32 a2t3_func_addr_insn = 0x00000001;
5623
5624 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5625 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5626 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5627
5628 #define ARM2THUMB_PIC_GLUE_SIZE 16
5629 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5630 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5631 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5632
5633 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5634
5635 .thumb .thumb
5636 .align 2 .align 2
5637 __func_from_thumb: __func_from_thumb:
5638 bx pc push {r6, lr}
5639 nop ldr r6, __func_addr
5640 .arm mov lr, pc
5641 b func bx r6
5642 .arm
5643 ;; back_to_thumb
5644 ldmia r13! {r6, lr}
5645 bx lr
5646 __func_addr:
5647 .word func */
5648
5649 #define THUMB2ARM_GLUE_SIZE 8
5650 static const insn16 t2a1_bx_pc_insn = 0x4778;
5651 static const insn16 t2a2_noop_insn = 0x46c0;
5652 static const insn32 t2a3_b_insn = 0xea000000;
5653
5654 #define VFP11_ERRATUM_VENEER_SIZE 8
5655
5656 #define ARM_BX_VENEER_SIZE 12
5657 static const insn32 armbx1_tst_insn = 0xe3100001;
5658 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5659 static const insn32 armbx3_bx_insn = 0xe12fff10;
5660
5661 #ifndef ELFARM_NABI_C_INCLUDED
5662 static void
5663 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5664 {
5665 asection * s;
5666 bfd_byte * contents;
5667
5668 if (size == 0)
5669 {
5670 /* Do not include empty glue sections in the output. */
5671 if (abfd != NULL)
5672 {
5673 s = bfd_get_linker_section (abfd, name);
5674 if (s != NULL)
5675 s->flags |= SEC_EXCLUDE;
5676 }
5677 return;
5678 }
5679
5680 BFD_ASSERT (abfd != NULL);
5681
5682 s = bfd_get_linker_section (abfd, name);
5683 BFD_ASSERT (s != NULL);
5684
5685 contents = (bfd_byte *) bfd_alloc (abfd, size);
5686
5687 BFD_ASSERT (s->size == size);
5688 s->contents = contents;
5689 }
5690
5691 bfd_boolean
5692 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5693 {
5694 struct elf32_arm_link_hash_table * globals;
5695
5696 globals = elf32_arm_hash_table (info);
5697 BFD_ASSERT (globals != NULL);
5698
5699 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5700 globals->arm_glue_size,
5701 ARM2THUMB_GLUE_SECTION_NAME);
5702
5703 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5704 globals->thumb_glue_size,
5705 THUMB2ARM_GLUE_SECTION_NAME);
5706
5707 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5708 globals->vfp11_erratum_glue_size,
5709 VFP11_ERRATUM_VENEER_SECTION_NAME);
5710
5711 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5712 globals->bx_glue_size,
5713 ARM_BX_GLUE_SECTION_NAME);
5714
5715 return TRUE;
5716 }
5717
5718 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5719 returns the symbol identifying the stub. */
5720
5721 static struct elf_link_hash_entry *
5722 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5723 struct elf_link_hash_entry * h)
5724 {
5725 const char * name = h->root.root.string;
5726 asection * s;
5727 char * tmp_name;
5728 struct elf_link_hash_entry * myh;
5729 struct bfd_link_hash_entry * bh;
5730 struct elf32_arm_link_hash_table * globals;
5731 bfd_vma val;
5732 bfd_size_type size;
5733
5734 globals = elf32_arm_hash_table (link_info);
5735 BFD_ASSERT (globals != NULL);
5736 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5737
5738 s = bfd_get_linker_section
5739 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5740
5741 BFD_ASSERT (s != NULL);
5742
5743 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5744 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5745
5746 BFD_ASSERT (tmp_name);
5747
5748 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5749
5750 myh = elf_link_hash_lookup
5751 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5752
5753 if (myh != NULL)
5754 {
5755 /* We've already seen this guy. */
5756 free (tmp_name);
5757 return myh;
5758 }
5759
5760 /* The only trick here is using hash_table->arm_glue_size as the value.
5761 Even though the section isn't allocated yet, this is where we will be
5762 putting it. The +1 on the value marks that the stub has not been
5763 output yet - not that it is a Thumb function. */
5764 bh = NULL;
5765 val = globals->arm_glue_size + 1;
5766 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5767 tmp_name, BSF_GLOBAL, s, val,
5768 NULL, TRUE, FALSE, &bh);
5769
5770 myh = (struct elf_link_hash_entry *) bh;
5771 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5772 myh->forced_local = 1;
5773
5774 free (tmp_name);
5775
5776 if (link_info->shared || globals->root.is_relocatable_executable
5777 || globals->pic_veneer)
5778 size = ARM2THUMB_PIC_GLUE_SIZE;
5779 else if (globals->use_blx)
5780 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5781 else
5782 size = ARM2THUMB_STATIC_GLUE_SIZE;
5783
5784 s->size += size;
5785 globals->arm_glue_size += size;
5786
5787 return myh;
5788 }
5789
5790 /* Allocate space for ARMv4 BX veneers. */
5791
5792 static void
5793 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5794 {
5795 asection * s;
5796 struct elf32_arm_link_hash_table *globals;
5797 char *tmp_name;
5798 struct elf_link_hash_entry *myh;
5799 struct bfd_link_hash_entry *bh;
5800 bfd_vma val;
5801
5802 /* BX PC does not need a veneer. */
5803 if (reg == 15)
5804 return;
5805
5806 globals = elf32_arm_hash_table (link_info);
5807 BFD_ASSERT (globals != NULL);
5808 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5809
5810 /* Check if this veneer has already been allocated. */
5811 if (globals->bx_glue_offset[reg])
5812 return;
5813
5814 s = bfd_get_linker_section
5815 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5816
5817 BFD_ASSERT (s != NULL);
5818
5819 /* Add symbol for veneer. */
5820 tmp_name = (char *)
5821 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5822
5823 BFD_ASSERT (tmp_name);
5824
5825 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5826
5827 myh = elf_link_hash_lookup
5828 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5829
5830 BFD_ASSERT (myh == NULL);
5831
5832 bh = NULL;
5833 val = globals->bx_glue_size;
5834 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5835 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5836 NULL, TRUE, FALSE, &bh);
5837
5838 myh = (struct elf_link_hash_entry *) bh;
5839 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5840 myh->forced_local = 1;
5841
5842 s->size += ARM_BX_VENEER_SIZE;
5843 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5844 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5845 }
5846
5847
5848 /* Add an entry to the code/data map for section SEC. */
5849
5850 static void
5851 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5852 {
5853 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5854 unsigned int newidx;
5855
5856 if (sec_data->map == NULL)
5857 {
5858 sec_data->map = (elf32_arm_section_map *)
5859 bfd_malloc (sizeof (elf32_arm_section_map));
5860 sec_data->mapcount = 0;
5861 sec_data->mapsize = 1;
5862 }
5863
5864 newidx = sec_data->mapcount++;
5865
5866 if (sec_data->mapcount > sec_data->mapsize)
5867 {
5868 sec_data->mapsize *= 2;
5869 sec_data->map = (elf32_arm_section_map *)
5870 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5871 * sizeof (elf32_arm_section_map));
5872 }
5873
5874 if (sec_data->map)
5875 {
5876 sec_data->map[newidx].vma = vma;
5877 sec_data->map[newidx].type = type;
5878 }
5879 }
5880
5881
5882 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5883 veneers are handled for now. */
5884
5885 static bfd_vma
5886 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5887 elf32_vfp11_erratum_list *branch,
5888 bfd *branch_bfd,
5889 asection *branch_sec,
5890 unsigned int offset)
5891 {
5892 asection *s;
5893 struct elf32_arm_link_hash_table *hash_table;
5894 char *tmp_name;
5895 struct elf_link_hash_entry *myh;
5896 struct bfd_link_hash_entry *bh;
5897 bfd_vma val;
5898 struct _arm_elf_section_data *sec_data;
5899 elf32_vfp11_erratum_list *newerr;
5900
5901 hash_table = elf32_arm_hash_table (link_info);
5902 BFD_ASSERT (hash_table != NULL);
5903 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5904
5905 s = bfd_get_linker_section
5906 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5907
5908 sec_data = elf32_arm_section_data (s);
5909
5910 BFD_ASSERT (s != NULL);
5911
5912 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5913 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5914
5915 BFD_ASSERT (tmp_name);
5916
5917 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5918 hash_table->num_vfp11_fixes);
5919
5920 myh = elf_link_hash_lookup
5921 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5922
5923 BFD_ASSERT (myh == NULL);
5924
5925 bh = NULL;
5926 val = hash_table->vfp11_erratum_glue_size;
5927 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5928 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5929 NULL, TRUE, FALSE, &bh);
5930
5931 myh = (struct elf_link_hash_entry *) bh;
5932 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5933 myh->forced_local = 1;
5934
5935 /* Link veneer back to calling location. */
5936 sec_data->erratumcount += 1;
5937 newerr = (elf32_vfp11_erratum_list *)
5938 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5939
5940 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5941 newerr->vma = -1;
5942 newerr->u.v.branch = branch;
5943 newerr->u.v.id = hash_table->num_vfp11_fixes;
5944 branch->u.b.veneer = newerr;
5945
5946 newerr->next = sec_data->erratumlist;
5947 sec_data->erratumlist = newerr;
5948
5949 /* A symbol for the return from the veneer. */
5950 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5951 hash_table->num_vfp11_fixes);
5952
5953 myh = elf_link_hash_lookup
5954 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5955
5956 if (myh != NULL)
5957 abort ();
5958
5959 bh = NULL;
5960 val = offset + 4;
5961 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5962 branch_sec, val, NULL, TRUE, FALSE, &bh);
5963
5964 myh = (struct elf_link_hash_entry *) bh;
5965 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5966 myh->forced_local = 1;
5967
5968 free (tmp_name);
5969
5970 /* Generate a mapping symbol for the veneer section, and explicitly add an
5971 entry for that symbol to the code/data map for the section. */
5972 if (hash_table->vfp11_erratum_glue_size == 0)
5973 {
5974 bh = NULL;
5975 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5976 ever requires this erratum fix. */
5977 _bfd_generic_link_add_one_symbol (link_info,
5978 hash_table->bfd_of_glue_owner, "$a",
5979 BSF_LOCAL, s, 0, NULL,
5980 TRUE, FALSE, &bh);
5981
5982 myh = (struct elf_link_hash_entry *) bh;
5983 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5984 myh->forced_local = 1;
5985
5986 /* The elf32_arm_init_maps function only cares about symbols from input
5987 BFDs. We must make a note of this generated mapping symbol
5988 ourselves so that code byteswapping works properly in
5989 elf32_arm_write_section. */
5990 elf32_arm_section_map_add (s, 'a', 0);
5991 }
5992
5993 s->size += VFP11_ERRATUM_VENEER_SIZE;
5994 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5995 hash_table->num_vfp11_fixes++;
5996
5997 /* The offset of the veneer. */
5998 return val;
5999 }
6000
6001 #define ARM_GLUE_SECTION_FLAGS \
6002 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6003 | SEC_READONLY | SEC_LINKER_CREATED)
6004
6005 /* Create a fake section for use by the ARM backend of the linker. */
6006
6007 static bfd_boolean
6008 arm_make_glue_section (bfd * abfd, const char * name)
6009 {
6010 asection * sec;
6011
6012 sec = bfd_get_linker_section (abfd, name);
6013 if (sec != NULL)
6014 /* Already made. */
6015 return TRUE;
6016
6017 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6018
6019 if (sec == NULL
6020 || !bfd_set_section_alignment (abfd, sec, 2))
6021 return FALSE;
6022
6023 /* Set the gc mark to prevent the section from being removed by garbage
6024 collection, despite the fact that no relocs refer to this section. */
6025 sec->gc_mark = 1;
6026
6027 return TRUE;
6028 }
6029
6030 /* Add the glue sections to ABFD. This function is called from the
6031 linker scripts in ld/emultempl/{armelf}.em. */
6032
6033 bfd_boolean
6034 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6035 struct bfd_link_info *info)
6036 {
6037 /* If we are only performing a partial
6038 link do not bother adding the glue. */
6039 if (info->relocatable)
6040 return TRUE;
6041
6042 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6043 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6044 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6045 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6046 }
6047
6048 /* Select a BFD to be used to hold the sections used by the glue code.
6049 This function is called from the linker scripts in ld/emultempl/
6050 {armelf/pe}.em. */
6051
6052 bfd_boolean
6053 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6054 {
6055 struct elf32_arm_link_hash_table *globals;
6056
6057 /* If we are only performing a partial link
6058 do not bother getting a bfd to hold the glue. */
6059 if (info->relocatable)
6060 return TRUE;
6061
6062 /* Make sure we don't attach the glue sections to a dynamic object. */
6063 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6064
6065 globals = elf32_arm_hash_table (info);
6066 BFD_ASSERT (globals != NULL);
6067
6068 if (globals->bfd_of_glue_owner != NULL)
6069 return TRUE;
6070
6071 /* Save the bfd for later use. */
6072 globals->bfd_of_glue_owner = abfd;
6073
6074 return TRUE;
6075 }
6076
6077 static void
6078 check_use_blx (struct elf32_arm_link_hash_table *globals)
6079 {
6080 int cpu_arch;
6081
6082 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6083 Tag_CPU_arch);
6084
6085 if (globals->fix_arm1176)
6086 {
6087 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6088 globals->use_blx = 1;
6089 }
6090 else
6091 {
6092 if (cpu_arch > TAG_CPU_ARCH_V4T)
6093 globals->use_blx = 1;
6094 }
6095 }
6096
6097 bfd_boolean
6098 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6099 struct bfd_link_info *link_info)
6100 {
6101 Elf_Internal_Shdr *symtab_hdr;
6102 Elf_Internal_Rela *internal_relocs = NULL;
6103 Elf_Internal_Rela *irel, *irelend;
6104 bfd_byte *contents = NULL;
6105
6106 asection *sec;
6107 struct elf32_arm_link_hash_table *globals;
6108
6109 /* If we are only performing a partial link do not bother
6110 to construct any glue. */
6111 if (link_info->relocatable)
6112 return TRUE;
6113
6114 /* Here we have a bfd that is to be included on the link. We have a
6115 hook to do reloc rummaging, before section sizes are nailed down. */
6116 globals = elf32_arm_hash_table (link_info);
6117 BFD_ASSERT (globals != NULL);
6118
6119 check_use_blx (globals);
6120
6121 if (globals->byteswap_code && !bfd_big_endian (abfd))
6122 {
6123 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6124 abfd);
6125 return FALSE;
6126 }
6127
6128 /* PR 5398: If we have not decided to include any loadable sections in
6129 the output then we will not have a glue owner bfd. This is OK, it
6130 just means that there is nothing else for us to do here. */
6131 if (globals->bfd_of_glue_owner == NULL)
6132 return TRUE;
6133
6134 /* Rummage around all the relocs and map the glue vectors. */
6135 sec = abfd->sections;
6136
6137 if (sec == NULL)
6138 return TRUE;
6139
6140 for (; sec != NULL; sec = sec->next)
6141 {
6142 if (sec->reloc_count == 0)
6143 continue;
6144
6145 if ((sec->flags & SEC_EXCLUDE) != 0)
6146 continue;
6147
6148 symtab_hdr = & elf_symtab_hdr (abfd);
6149
6150 /* Load the relocs. */
6151 internal_relocs
6152 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6153
6154 if (internal_relocs == NULL)
6155 goto error_return;
6156
6157 irelend = internal_relocs + sec->reloc_count;
6158 for (irel = internal_relocs; irel < irelend; irel++)
6159 {
6160 long r_type;
6161 unsigned long r_index;
6162
6163 struct elf_link_hash_entry *h;
6164
6165 r_type = ELF32_R_TYPE (irel->r_info);
6166 r_index = ELF32_R_SYM (irel->r_info);
6167
6168 /* These are the only relocation types we care about. */
6169 if ( r_type != R_ARM_PC24
6170 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6171 continue;
6172
6173 /* Get the section contents if we haven't done so already. */
6174 if (contents == NULL)
6175 {
6176 /* Get cached copy if it exists. */
6177 if (elf_section_data (sec)->this_hdr.contents != NULL)
6178 contents = elf_section_data (sec)->this_hdr.contents;
6179 else
6180 {
6181 /* Go get them off disk. */
6182 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6183 goto error_return;
6184 }
6185 }
6186
6187 if (r_type == R_ARM_V4BX)
6188 {
6189 int reg;
6190
6191 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6192 record_arm_bx_glue (link_info, reg);
6193 continue;
6194 }
6195
6196 /* If the relocation is not against a symbol it cannot concern us. */
6197 h = NULL;
6198
6199 /* We don't care about local symbols. */
6200 if (r_index < symtab_hdr->sh_info)
6201 continue;
6202
6203 /* This is an external symbol. */
6204 r_index -= symtab_hdr->sh_info;
6205 h = (struct elf_link_hash_entry *)
6206 elf_sym_hashes (abfd)[r_index];
6207
6208 /* If the relocation is against a static symbol it must be within
6209 the current section and so cannot be a cross ARM/Thumb relocation. */
6210 if (h == NULL)
6211 continue;
6212
6213 /* If the call will go through a PLT entry then we do not need
6214 glue. */
6215 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6216 continue;
6217
6218 switch (r_type)
6219 {
6220 case R_ARM_PC24:
6221 /* This one is a call from arm code. We need to look up
6222 the target of the call. If it is a thumb target, we
6223 insert glue. */
6224 if (h->target_internal == ST_BRANCH_TO_THUMB)
6225 record_arm_to_thumb_glue (link_info, h);
6226 break;
6227
6228 default:
6229 abort ();
6230 }
6231 }
6232
6233 if (contents != NULL
6234 && elf_section_data (sec)->this_hdr.contents != contents)
6235 free (contents);
6236 contents = NULL;
6237
6238 if (internal_relocs != NULL
6239 && elf_section_data (sec)->relocs != internal_relocs)
6240 free (internal_relocs);
6241 internal_relocs = NULL;
6242 }
6243
6244 return TRUE;
6245
6246 error_return:
6247 if (contents != NULL
6248 && elf_section_data (sec)->this_hdr.contents != contents)
6249 free (contents);
6250 if (internal_relocs != NULL
6251 && elf_section_data (sec)->relocs != internal_relocs)
6252 free (internal_relocs);
6253
6254 return FALSE;
6255 }
6256 #endif
6257
6258
6259 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6260
6261 void
6262 bfd_elf32_arm_init_maps (bfd *abfd)
6263 {
6264 Elf_Internal_Sym *isymbuf;
6265 Elf_Internal_Shdr *hdr;
6266 unsigned int i, localsyms;
6267
6268 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6269 if (! is_arm_elf (abfd))
6270 return;
6271
6272 if ((abfd->flags & DYNAMIC) != 0)
6273 return;
6274
6275 hdr = & elf_symtab_hdr (abfd);
6276 localsyms = hdr->sh_info;
6277
6278 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6279 should contain the number of local symbols, which should come before any
6280 global symbols. Mapping symbols are always local. */
6281 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6282 NULL);
6283
6284 /* No internal symbols read? Skip this BFD. */
6285 if (isymbuf == NULL)
6286 return;
6287
6288 for (i = 0; i < localsyms; i++)
6289 {
6290 Elf_Internal_Sym *isym = &isymbuf[i];
6291 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6292 const char *name;
6293
6294 if (sec != NULL
6295 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6296 {
6297 name = bfd_elf_string_from_elf_section (abfd,
6298 hdr->sh_link, isym->st_name);
6299
6300 if (bfd_is_arm_special_symbol_name (name,
6301 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6302 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6303 }
6304 }
6305 }
6306
6307
6308 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6309 say what they wanted. */
6310
6311 void
6312 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6313 {
6314 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6315 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6316
6317 if (globals == NULL)
6318 return;
6319
6320 if (globals->fix_cortex_a8 == -1)
6321 {
6322 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6323 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6324 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6325 || out_attr[Tag_CPU_arch_profile].i == 0))
6326 globals->fix_cortex_a8 = 1;
6327 else
6328 globals->fix_cortex_a8 = 0;
6329 }
6330 }
6331
6332
6333 void
6334 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6335 {
6336 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6337 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6338
6339 if (globals == NULL)
6340 return;
6341 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6342 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6343 {
6344 switch (globals->vfp11_fix)
6345 {
6346 case BFD_ARM_VFP11_FIX_DEFAULT:
6347 case BFD_ARM_VFP11_FIX_NONE:
6348 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6349 break;
6350
6351 default:
6352 /* Give a warning, but do as the user requests anyway. */
6353 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6354 "workaround is not necessary for target architecture"), obfd);
6355 }
6356 }
6357 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6358 /* For earlier architectures, we might need the workaround, but do not
6359 enable it by default. If users is running with broken hardware, they
6360 must enable the erratum fix explicitly. */
6361 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6362 }
6363
6364
6365 enum bfd_arm_vfp11_pipe
6366 {
6367 VFP11_FMAC,
6368 VFP11_LS,
6369 VFP11_DS,
6370 VFP11_BAD
6371 };
6372
6373 /* Return a VFP register number. This is encoded as RX:X for single-precision
6374 registers, or X:RX for double-precision registers, where RX is the group of
6375 four bits in the instruction encoding and X is the single extension bit.
6376 RX and X fields are specified using their lowest (starting) bit. The return
6377 value is:
6378
6379 0...31: single-precision registers s0...s31
6380 32...63: double-precision registers d0...d31.
6381
6382 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6383 encounter VFP3 instructions, so we allow the full range for DP registers. */
6384
6385 static unsigned int
6386 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6387 unsigned int x)
6388 {
6389 if (is_double)
6390 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6391 else
6392 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6393 }
6394
6395 /* Set bits in *WMASK according to a register number REG as encoded by
6396 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6397
6398 static void
6399 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6400 {
6401 if (reg < 32)
6402 *wmask |= 1 << reg;
6403 else if (reg < 48)
6404 *wmask |= 3 << ((reg - 32) * 2);
6405 }
6406
6407 /* Return TRUE if WMASK overwrites anything in REGS. */
6408
6409 static bfd_boolean
6410 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6411 {
6412 int i;
6413
6414 for (i = 0; i < numregs; i++)
6415 {
6416 unsigned int reg = regs[i];
6417
6418 if (reg < 32 && (wmask & (1 << reg)) != 0)
6419 return TRUE;
6420
6421 reg -= 32;
6422
6423 if (reg >= 16)
6424 continue;
6425
6426 if ((wmask & (3 << (reg * 2))) != 0)
6427 return TRUE;
6428 }
6429
6430 return FALSE;
6431 }
6432
6433 /* In this function, we're interested in two things: finding input registers
6434 for VFP data-processing instructions, and finding the set of registers which
6435 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6436 hold the written set, so FLDM etc. are easy to deal with (we're only
6437 interested in 32 SP registers or 16 dp registers, due to the VFP version
6438 implemented by the chip in question). DP registers are marked by setting
6439 both SP registers in the write mask). */
6440
6441 static enum bfd_arm_vfp11_pipe
6442 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6443 int *numregs)
6444 {
6445 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6446 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6447
6448 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6449 {
6450 unsigned int pqrs;
6451 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6452 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6453
6454 pqrs = ((insn & 0x00800000) >> 20)
6455 | ((insn & 0x00300000) >> 19)
6456 | ((insn & 0x00000040) >> 6);
6457
6458 switch (pqrs)
6459 {
6460 case 0: /* fmac[sd]. */
6461 case 1: /* fnmac[sd]. */
6462 case 2: /* fmsc[sd]. */
6463 case 3: /* fnmsc[sd]. */
6464 vpipe = VFP11_FMAC;
6465 bfd_arm_vfp11_write_mask (destmask, fd);
6466 regs[0] = fd;
6467 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6468 regs[2] = fm;
6469 *numregs = 3;
6470 break;
6471
6472 case 4: /* fmul[sd]. */
6473 case 5: /* fnmul[sd]. */
6474 case 6: /* fadd[sd]. */
6475 case 7: /* fsub[sd]. */
6476 vpipe = VFP11_FMAC;
6477 goto vfp_binop;
6478
6479 case 8: /* fdiv[sd]. */
6480 vpipe = VFP11_DS;
6481 vfp_binop:
6482 bfd_arm_vfp11_write_mask (destmask, fd);
6483 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6484 regs[1] = fm;
6485 *numregs = 2;
6486 break;
6487
6488 case 15: /* extended opcode. */
6489 {
6490 unsigned int extn = ((insn >> 15) & 0x1e)
6491 | ((insn >> 7) & 1);
6492
6493 switch (extn)
6494 {
6495 case 0: /* fcpy[sd]. */
6496 case 1: /* fabs[sd]. */
6497 case 2: /* fneg[sd]. */
6498 case 8: /* fcmp[sd]. */
6499 case 9: /* fcmpe[sd]. */
6500 case 10: /* fcmpz[sd]. */
6501 case 11: /* fcmpez[sd]. */
6502 case 16: /* fuito[sd]. */
6503 case 17: /* fsito[sd]. */
6504 case 24: /* ftoui[sd]. */
6505 case 25: /* ftouiz[sd]. */
6506 case 26: /* ftosi[sd]. */
6507 case 27: /* ftosiz[sd]. */
6508 /* These instructions will not bounce due to underflow. */
6509 *numregs = 0;
6510 vpipe = VFP11_FMAC;
6511 break;
6512
6513 case 3: /* fsqrt[sd]. */
6514 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6515 registers to cause the erratum in previous instructions. */
6516 bfd_arm_vfp11_write_mask (destmask, fd);
6517 vpipe = VFP11_DS;
6518 break;
6519
6520 case 15: /* fcvt{ds,sd}. */
6521 {
6522 int rnum = 0;
6523
6524 bfd_arm_vfp11_write_mask (destmask, fd);
6525
6526 /* Only FCVTSD can underflow. */
6527 if ((insn & 0x100) != 0)
6528 regs[rnum++] = fm;
6529
6530 *numregs = rnum;
6531
6532 vpipe = VFP11_FMAC;
6533 }
6534 break;
6535
6536 default:
6537 return VFP11_BAD;
6538 }
6539 }
6540 break;
6541
6542 default:
6543 return VFP11_BAD;
6544 }
6545 }
6546 /* Two-register transfer. */
6547 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6548 {
6549 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6550
6551 if ((insn & 0x100000) == 0)
6552 {
6553 if (is_double)
6554 bfd_arm_vfp11_write_mask (destmask, fm);
6555 else
6556 {
6557 bfd_arm_vfp11_write_mask (destmask, fm);
6558 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6559 }
6560 }
6561
6562 vpipe = VFP11_LS;
6563 }
6564 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6565 {
6566 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6567 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6568
6569 switch (puw)
6570 {
6571 case 0: /* Two-reg transfer. We should catch these above. */
6572 abort ();
6573
6574 case 2: /* fldm[sdx]. */
6575 case 3:
6576 case 5:
6577 {
6578 unsigned int i, offset = insn & 0xff;
6579
6580 if (is_double)
6581 offset >>= 1;
6582
6583 for (i = fd; i < fd + offset; i++)
6584 bfd_arm_vfp11_write_mask (destmask, i);
6585 }
6586 break;
6587
6588 case 4: /* fld[sd]. */
6589 case 6:
6590 bfd_arm_vfp11_write_mask (destmask, fd);
6591 break;
6592
6593 default:
6594 return VFP11_BAD;
6595 }
6596
6597 vpipe = VFP11_LS;
6598 }
6599 /* Single-register transfer. Note L==0. */
6600 else if ((insn & 0x0f100e10) == 0x0e000a10)
6601 {
6602 unsigned int opcode = (insn >> 21) & 7;
6603 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6604
6605 switch (opcode)
6606 {
6607 case 0: /* fmsr/fmdlr. */
6608 case 1: /* fmdhr. */
6609 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6610 destination register. I don't know if this is exactly right,
6611 but it is the conservative choice. */
6612 bfd_arm_vfp11_write_mask (destmask, fn);
6613 break;
6614
6615 case 7: /* fmxr. */
6616 break;
6617 }
6618
6619 vpipe = VFP11_LS;
6620 }
6621
6622 return vpipe;
6623 }
6624
6625
6626 static int elf32_arm_compare_mapping (const void * a, const void * b);
6627
6628
6629 /* Look for potentially-troublesome code sequences which might trigger the
6630 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6631 (available from ARM) for details of the erratum. A short version is
6632 described in ld.texinfo. */
6633
6634 bfd_boolean
6635 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6636 {
6637 asection *sec;
6638 bfd_byte *contents = NULL;
6639 int state = 0;
6640 int regs[3], numregs = 0;
6641 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6642 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6643
6644 if (globals == NULL)
6645 return FALSE;
6646
6647 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6648 The states transition as follows:
6649
6650 0 -> 1 (vector) or 0 -> 2 (scalar)
6651 A VFP FMAC-pipeline instruction has been seen. Fill
6652 regs[0]..regs[numregs-1] with its input operands. Remember this
6653 instruction in 'first_fmac'.
6654
6655 1 -> 2
6656 Any instruction, except for a VFP instruction which overwrites
6657 regs[*].
6658
6659 1 -> 3 [ -> 0 ] or
6660 2 -> 3 [ -> 0 ]
6661 A VFP instruction has been seen which overwrites any of regs[*].
6662 We must make a veneer! Reset state to 0 before examining next
6663 instruction.
6664
6665 2 -> 0
6666 If we fail to match anything in state 2, reset to state 0 and reset
6667 the instruction pointer to the instruction after 'first_fmac'.
6668
6669 If the VFP11 vector mode is in use, there must be at least two unrelated
6670 instructions between anti-dependent VFP11 instructions to properly avoid
6671 triggering the erratum, hence the use of the extra state 1. */
6672
6673 /* If we are only performing a partial link do not bother
6674 to construct any glue. */
6675 if (link_info->relocatable)
6676 return TRUE;
6677
6678 /* Skip if this bfd does not correspond to an ELF image. */
6679 if (! is_arm_elf (abfd))
6680 return TRUE;
6681
6682 /* We should have chosen a fix type by the time we get here. */
6683 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6684
6685 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6686 return TRUE;
6687
6688 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6689 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6690 return TRUE;
6691
6692 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6693 {
6694 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6695 struct _arm_elf_section_data *sec_data;
6696
6697 /* If we don't have executable progbits, we're not interested in this
6698 section. Also skip if section is to be excluded. */
6699 if (elf_section_type (sec) != SHT_PROGBITS
6700 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6701 || (sec->flags & SEC_EXCLUDE) != 0
6702 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6703 || sec->output_section == bfd_abs_section_ptr
6704 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6705 continue;
6706
6707 sec_data = elf32_arm_section_data (sec);
6708
6709 if (sec_data->mapcount == 0)
6710 continue;
6711
6712 if (elf_section_data (sec)->this_hdr.contents != NULL)
6713 contents = elf_section_data (sec)->this_hdr.contents;
6714 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6715 goto error_return;
6716
6717 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6718 elf32_arm_compare_mapping);
6719
6720 for (span = 0; span < sec_data->mapcount; span++)
6721 {
6722 unsigned int span_start = sec_data->map[span].vma;
6723 unsigned int span_end = (span == sec_data->mapcount - 1)
6724 ? sec->size : sec_data->map[span + 1].vma;
6725 char span_type = sec_data->map[span].type;
6726
6727 /* FIXME: Only ARM mode is supported at present. We may need to
6728 support Thumb-2 mode also at some point. */
6729 if (span_type != 'a')
6730 continue;
6731
6732 for (i = span_start; i < span_end;)
6733 {
6734 unsigned int next_i = i + 4;
6735 unsigned int insn = bfd_big_endian (abfd)
6736 ? (contents[i] << 24)
6737 | (contents[i + 1] << 16)
6738 | (contents[i + 2] << 8)
6739 | contents[i + 3]
6740 : (contents[i + 3] << 24)
6741 | (contents[i + 2] << 16)
6742 | (contents[i + 1] << 8)
6743 | contents[i];
6744 unsigned int writemask = 0;
6745 enum bfd_arm_vfp11_pipe vpipe;
6746
6747 switch (state)
6748 {
6749 case 0:
6750 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6751 &numregs);
6752 /* I'm assuming the VFP11 erratum can trigger with denorm
6753 operands on either the FMAC or the DS pipeline. This might
6754 lead to slightly overenthusiastic veneer insertion. */
6755 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6756 {
6757 state = use_vector ? 1 : 2;
6758 first_fmac = i;
6759 veneer_of_insn = insn;
6760 }
6761 break;
6762
6763 case 1:
6764 {
6765 int other_regs[3], other_numregs;
6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6767 other_regs,
6768 &other_numregs);
6769 if (vpipe != VFP11_BAD
6770 && bfd_arm_vfp11_antidependency (writemask, regs,
6771 numregs))
6772 state = 3;
6773 else
6774 state = 2;
6775 }
6776 break;
6777
6778 case 2:
6779 {
6780 int other_regs[3], other_numregs;
6781 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6782 other_regs,
6783 &other_numregs);
6784 if (vpipe != VFP11_BAD
6785 && bfd_arm_vfp11_antidependency (writemask, regs,
6786 numregs))
6787 state = 3;
6788 else
6789 {
6790 state = 0;
6791 next_i = first_fmac + 4;
6792 }
6793 }
6794 break;
6795
6796 case 3:
6797 abort (); /* Should be unreachable. */
6798 }
6799
6800 if (state == 3)
6801 {
6802 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6803 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6804
6805 elf32_arm_section_data (sec)->erratumcount += 1;
6806
6807 newerr->u.b.vfp_insn = veneer_of_insn;
6808
6809 switch (span_type)
6810 {
6811 case 'a':
6812 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6813 break;
6814
6815 default:
6816 abort ();
6817 }
6818
6819 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6820 first_fmac);
6821
6822 newerr->vma = -1;
6823
6824 newerr->next = sec_data->erratumlist;
6825 sec_data->erratumlist = newerr;
6826
6827 state = 0;
6828 }
6829
6830 i = next_i;
6831 }
6832 }
6833
6834 if (contents != NULL
6835 && elf_section_data (sec)->this_hdr.contents != contents)
6836 free (contents);
6837 contents = NULL;
6838 }
6839
6840 return TRUE;
6841
6842 error_return:
6843 if (contents != NULL
6844 && elf_section_data (sec)->this_hdr.contents != contents)
6845 free (contents);
6846
6847 return FALSE;
6848 }
6849
6850 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6851 after sections have been laid out, using specially-named symbols. */
6852
6853 void
6854 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6855 struct bfd_link_info *link_info)
6856 {
6857 asection *sec;
6858 struct elf32_arm_link_hash_table *globals;
6859 char *tmp_name;
6860
6861 if (link_info->relocatable)
6862 return;
6863
6864 /* Skip if this bfd does not correspond to an ELF image. */
6865 if (! is_arm_elf (abfd))
6866 return;
6867
6868 globals = elf32_arm_hash_table (link_info);
6869 if (globals == NULL)
6870 return;
6871
6872 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6873 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6874
6875 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6876 {
6877 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6878 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6879
6880 for (; errnode != NULL; errnode = errnode->next)
6881 {
6882 struct elf_link_hash_entry *myh;
6883 bfd_vma vma;
6884
6885 switch (errnode->type)
6886 {
6887 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6888 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6889 /* Find veneer symbol. */
6890 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6891 errnode->u.b.veneer->u.v.id);
6892
6893 myh = elf_link_hash_lookup
6894 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6895
6896 if (myh == NULL)
6897 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6898 "`%s'"), abfd, tmp_name);
6899
6900 vma = myh->root.u.def.section->output_section->vma
6901 + myh->root.u.def.section->output_offset
6902 + myh->root.u.def.value;
6903
6904 errnode->u.b.veneer->vma = vma;
6905 break;
6906
6907 case VFP11_ERRATUM_ARM_VENEER:
6908 case VFP11_ERRATUM_THUMB_VENEER:
6909 /* Find return location. */
6910 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6911 errnode->u.v.id);
6912
6913 myh = elf_link_hash_lookup
6914 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6915
6916 if (myh == NULL)
6917 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6918 "`%s'"), abfd, tmp_name);
6919
6920 vma = myh->root.u.def.section->output_section->vma
6921 + myh->root.u.def.section->output_offset
6922 + myh->root.u.def.value;
6923
6924 errnode->u.v.branch->vma = vma;
6925 break;
6926
6927 default:
6928 abort ();
6929 }
6930 }
6931 }
6932
6933 free (tmp_name);
6934 }
6935
6936
6937 /* Set target relocation values needed during linking. */
6938
6939 void
6940 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6941 struct bfd_link_info *link_info,
6942 int target1_is_rel,
6943 char * target2_type,
6944 int fix_v4bx,
6945 int use_blx,
6946 bfd_arm_vfp11_fix vfp11_fix,
6947 int no_enum_warn, int no_wchar_warn,
6948 int pic_veneer, int fix_cortex_a8,
6949 int fix_arm1176)
6950 {
6951 struct elf32_arm_link_hash_table *globals;
6952
6953 globals = elf32_arm_hash_table (link_info);
6954 if (globals == NULL)
6955 return;
6956
6957 globals->target1_is_rel = target1_is_rel;
6958 if (strcmp (target2_type, "rel") == 0)
6959 globals->target2_reloc = R_ARM_REL32;
6960 else if (strcmp (target2_type, "abs") == 0)
6961 globals->target2_reloc = R_ARM_ABS32;
6962 else if (strcmp (target2_type, "got-rel") == 0)
6963 globals->target2_reloc = R_ARM_GOT_PREL;
6964 else
6965 {
6966 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6967 target2_type);
6968 }
6969 globals->fix_v4bx = fix_v4bx;
6970 globals->use_blx |= use_blx;
6971 globals->vfp11_fix = vfp11_fix;
6972 globals->pic_veneer = pic_veneer;
6973 globals->fix_cortex_a8 = fix_cortex_a8;
6974 globals->fix_arm1176 = fix_arm1176;
6975
6976 BFD_ASSERT (is_arm_elf (output_bfd));
6977 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6978 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6979 }
6980
6981 /* Replace the target offset of a Thumb bl or b.w instruction. */
6982
6983 static void
6984 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6985 {
6986 bfd_vma upper;
6987 bfd_vma lower;
6988 int reloc_sign;
6989
6990 BFD_ASSERT ((offset & 1) == 0);
6991
6992 upper = bfd_get_16 (abfd, insn);
6993 lower = bfd_get_16 (abfd, insn + 2);
6994 reloc_sign = (offset < 0) ? 1 : 0;
6995 upper = (upper & ~(bfd_vma) 0x7ff)
6996 | ((offset >> 12) & 0x3ff)
6997 | (reloc_sign << 10);
6998 lower = (lower & ~(bfd_vma) 0x2fff)
6999 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7000 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7001 | ((offset >> 1) & 0x7ff);
7002 bfd_put_16 (abfd, upper, insn);
7003 bfd_put_16 (abfd, lower, insn + 2);
7004 }
7005
7006 /* Thumb code calling an ARM function. */
7007
7008 static int
7009 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7010 const char * name,
7011 bfd * input_bfd,
7012 bfd * output_bfd,
7013 asection * input_section,
7014 bfd_byte * hit_data,
7015 asection * sym_sec,
7016 bfd_vma offset,
7017 bfd_signed_vma addend,
7018 bfd_vma val,
7019 char **error_message)
7020 {
7021 asection * s = 0;
7022 bfd_vma my_offset;
7023 long int ret_offset;
7024 struct elf_link_hash_entry * myh;
7025 struct elf32_arm_link_hash_table * globals;
7026
7027 myh = find_thumb_glue (info, name, error_message);
7028 if (myh == NULL)
7029 return FALSE;
7030
7031 globals = elf32_arm_hash_table (info);
7032 BFD_ASSERT (globals != NULL);
7033 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7034
7035 my_offset = myh->root.u.def.value;
7036
7037 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7038 THUMB2ARM_GLUE_SECTION_NAME);
7039
7040 BFD_ASSERT (s != NULL);
7041 BFD_ASSERT (s->contents != NULL);
7042 BFD_ASSERT (s->output_section != NULL);
7043
7044 if ((my_offset & 0x01) == 0x01)
7045 {
7046 if (sym_sec != NULL
7047 && sym_sec->owner != NULL
7048 && !INTERWORK_FLAG (sym_sec->owner))
7049 {
7050 (*_bfd_error_handler)
7051 (_("%B(%s): warning: interworking not enabled.\n"
7052 " first occurrence: %B: Thumb call to ARM"),
7053 sym_sec->owner, input_bfd, name);
7054
7055 return FALSE;
7056 }
7057
7058 --my_offset;
7059 myh->root.u.def.value = my_offset;
7060
7061 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7062 s->contents + my_offset);
7063
7064 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7065 s->contents + my_offset + 2);
7066
7067 ret_offset =
7068 /* Address of destination of the stub. */
7069 ((bfd_signed_vma) val)
7070 - ((bfd_signed_vma)
7071 /* Offset from the start of the current section
7072 to the start of the stubs. */
7073 (s->output_offset
7074 /* Offset of the start of this stub from the start of the stubs. */
7075 + my_offset
7076 /* Address of the start of the current section. */
7077 + s->output_section->vma)
7078 /* The branch instruction is 4 bytes into the stub. */
7079 + 4
7080 /* ARM branches work from the pc of the instruction + 8. */
7081 + 8);
7082
7083 put_arm_insn (globals, output_bfd,
7084 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7085 s->contents + my_offset + 4);
7086 }
7087
7088 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7089
7090 /* Now go back and fix up the original BL insn to point to here. */
7091 ret_offset =
7092 /* Address of where the stub is located. */
7093 (s->output_section->vma + s->output_offset + my_offset)
7094 /* Address of where the BL is located. */
7095 - (input_section->output_section->vma + input_section->output_offset
7096 + offset)
7097 /* Addend in the relocation. */
7098 - addend
7099 /* Biassing for PC-relative addressing. */
7100 - 8;
7101
7102 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7103
7104 return TRUE;
7105 }
7106
7107 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7108
7109 static struct elf_link_hash_entry *
7110 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7111 const char * name,
7112 bfd * input_bfd,
7113 bfd * output_bfd,
7114 asection * sym_sec,
7115 bfd_vma val,
7116 asection * s,
7117 char ** error_message)
7118 {
7119 bfd_vma my_offset;
7120 long int ret_offset;
7121 struct elf_link_hash_entry * myh;
7122 struct elf32_arm_link_hash_table * globals;
7123
7124 myh = find_arm_glue (info, name, error_message);
7125 if (myh == NULL)
7126 return NULL;
7127
7128 globals = elf32_arm_hash_table (info);
7129 BFD_ASSERT (globals != NULL);
7130 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7131
7132 my_offset = myh->root.u.def.value;
7133
7134 if ((my_offset & 0x01) == 0x01)
7135 {
7136 if (sym_sec != NULL
7137 && sym_sec->owner != NULL
7138 && !INTERWORK_FLAG (sym_sec->owner))
7139 {
7140 (*_bfd_error_handler)
7141 (_("%B(%s): warning: interworking not enabled.\n"
7142 " first occurrence: %B: arm call to thumb"),
7143 sym_sec->owner, input_bfd, name);
7144 }
7145
7146 --my_offset;
7147 myh->root.u.def.value = my_offset;
7148
7149 if (info->shared || globals->root.is_relocatable_executable
7150 || globals->pic_veneer)
7151 {
7152 /* For relocatable objects we can't use absolute addresses,
7153 so construct the address from a relative offset. */
7154 /* TODO: If the offset is small it's probably worth
7155 constructing the address with adds. */
7156 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7157 s->contents + my_offset);
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7159 s->contents + my_offset + 4);
7160 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7161 s->contents + my_offset + 8);
7162 /* Adjust the offset by 4 for the position of the add,
7163 and 8 for the pipeline offset. */
7164 ret_offset = (val - (s->output_offset
7165 + s->output_section->vma
7166 + my_offset + 12))
7167 | 1;
7168 bfd_put_32 (output_bfd, ret_offset,
7169 s->contents + my_offset + 12);
7170 }
7171 else if (globals->use_blx)
7172 {
7173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7174 s->contents + my_offset);
7175
7176 /* It's a thumb address. Add the low order bit. */
7177 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7178 s->contents + my_offset + 4);
7179 }
7180 else
7181 {
7182 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7183 s->contents + my_offset);
7184
7185 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7186 s->contents + my_offset + 4);
7187
7188 /* It's a thumb address. Add the low order bit. */
7189 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7190 s->contents + my_offset + 8);
7191
7192 my_offset += 12;
7193 }
7194 }
7195
7196 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7197
7198 return myh;
7199 }
7200
7201 /* Arm code calling a Thumb function. */
7202
7203 static int
7204 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7205 const char * name,
7206 bfd * input_bfd,
7207 bfd * output_bfd,
7208 asection * input_section,
7209 bfd_byte * hit_data,
7210 asection * sym_sec,
7211 bfd_vma offset,
7212 bfd_signed_vma addend,
7213 bfd_vma val,
7214 char **error_message)
7215 {
7216 unsigned long int tmp;
7217 bfd_vma my_offset;
7218 asection * s;
7219 long int ret_offset;
7220 struct elf_link_hash_entry * myh;
7221 struct elf32_arm_link_hash_table * globals;
7222
7223 globals = elf32_arm_hash_table (info);
7224 BFD_ASSERT (globals != NULL);
7225 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7226
7227 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7228 ARM2THUMB_GLUE_SECTION_NAME);
7229 BFD_ASSERT (s != NULL);
7230 BFD_ASSERT (s->contents != NULL);
7231 BFD_ASSERT (s->output_section != NULL);
7232
7233 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7234 sym_sec, val, s, error_message);
7235 if (!myh)
7236 return FALSE;
7237
7238 my_offset = myh->root.u.def.value;
7239 tmp = bfd_get_32 (input_bfd, hit_data);
7240 tmp = tmp & 0xFF000000;
7241
7242 /* Somehow these are both 4 too far, so subtract 8. */
7243 ret_offset = (s->output_offset
7244 + my_offset
7245 + s->output_section->vma
7246 - (input_section->output_offset
7247 + input_section->output_section->vma
7248 + offset + addend)
7249 - 8);
7250
7251 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7252
7253 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7254
7255 return TRUE;
7256 }
7257
7258 /* Populate Arm stub for an exported Thumb function. */
7259
7260 static bfd_boolean
7261 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7262 {
7263 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7264 asection * s;
7265 struct elf_link_hash_entry * myh;
7266 struct elf32_arm_link_hash_entry *eh;
7267 struct elf32_arm_link_hash_table * globals;
7268 asection *sec;
7269 bfd_vma val;
7270 char *error_message;
7271
7272 eh = elf32_arm_hash_entry (h);
7273 /* Allocate stubs for exported Thumb functions on v4t. */
7274 if (eh->export_glue == NULL)
7275 return TRUE;
7276
7277 globals = elf32_arm_hash_table (info);
7278 BFD_ASSERT (globals != NULL);
7279 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7280
7281 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7282 ARM2THUMB_GLUE_SECTION_NAME);
7283 BFD_ASSERT (s != NULL);
7284 BFD_ASSERT (s->contents != NULL);
7285 BFD_ASSERT (s->output_section != NULL);
7286
7287 sec = eh->export_glue->root.u.def.section;
7288
7289 BFD_ASSERT (sec->output_section != NULL);
7290
7291 val = eh->export_glue->root.u.def.value + sec->output_offset
7292 + sec->output_section->vma;
7293
7294 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7295 h->root.u.def.section->owner,
7296 globals->obfd, sec, val, s,
7297 &error_message);
7298 BFD_ASSERT (myh);
7299 return TRUE;
7300 }
7301
7302 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7303
7304 static bfd_vma
7305 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7306 {
7307 bfd_byte *p;
7308 bfd_vma glue_addr;
7309 asection *s;
7310 struct elf32_arm_link_hash_table *globals;
7311
7312 globals = elf32_arm_hash_table (info);
7313 BFD_ASSERT (globals != NULL);
7314 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7315
7316 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7317 ARM_BX_GLUE_SECTION_NAME);
7318 BFD_ASSERT (s != NULL);
7319 BFD_ASSERT (s->contents != NULL);
7320 BFD_ASSERT (s->output_section != NULL);
7321
7322 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7323
7324 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7325
7326 if ((globals->bx_glue_offset[reg] & 1) == 0)
7327 {
7328 p = s->contents + glue_addr;
7329 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7330 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7331 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7332 globals->bx_glue_offset[reg] |= 1;
7333 }
7334
7335 return glue_addr + s->output_section->vma + s->output_offset;
7336 }
7337
7338 /* Generate Arm stubs for exported Thumb symbols. */
7339 static void
7340 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7341 struct bfd_link_info *link_info)
7342 {
7343 struct elf32_arm_link_hash_table * globals;
7344
7345 if (link_info == NULL)
7346 /* Ignore this if we are not called by the ELF backend linker. */
7347 return;
7348
7349 globals = elf32_arm_hash_table (link_info);
7350 if (globals == NULL)
7351 return;
7352
7353 /* If blx is available then exported Thumb symbols are OK and there is
7354 nothing to do. */
7355 if (globals->use_blx)
7356 return;
7357
7358 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7359 link_info);
7360 }
7361
7362 /* Reserve space for COUNT dynamic relocations in relocation selection
7363 SRELOC. */
7364
7365 static void
7366 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7367 bfd_size_type count)
7368 {
7369 struct elf32_arm_link_hash_table *htab;
7370
7371 htab = elf32_arm_hash_table (info);
7372 BFD_ASSERT (htab->root.dynamic_sections_created);
7373 if (sreloc == NULL)
7374 abort ();
7375 sreloc->size += RELOC_SIZE (htab) * count;
7376 }
7377
7378 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7379 dynamic, the relocations should go in SRELOC, otherwise they should
7380 go in the special .rel.iplt section. */
7381
7382 static void
7383 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7384 bfd_size_type count)
7385 {
7386 struct elf32_arm_link_hash_table *htab;
7387
7388 htab = elf32_arm_hash_table (info);
7389 if (!htab->root.dynamic_sections_created)
7390 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7391 else
7392 {
7393 BFD_ASSERT (sreloc != NULL);
7394 sreloc->size += RELOC_SIZE (htab) * count;
7395 }
7396 }
7397
7398 /* Add relocation REL to the end of relocation section SRELOC. */
7399
7400 static void
7401 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7402 asection *sreloc, Elf_Internal_Rela *rel)
7403 {
7404 bfd_byte *loc;
7405 struct elf32_arm_link_hash_table *htab;
7406
7407 htab = elf32_arm_hash_table (info);
7408 if (!htab->root.dynamic_sections_created
7409 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7410 sreloc = htab->root.irelplt;
7411 if (sreloc == NULL)
7412 abort ();
7413 loc = sreloc->contents;
7414 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7415 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7416 abort ();
7417 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7418 }
7419
7420 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7421 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7422 to .plt. */
7423
7424 static void
7425 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7426 bfd_boolean is_iplt_entry,
7427 union gotplt_union *root_plt,
7428 struct arm_plt_info *arm_plt)
7429 {
7430 struct elf32_arm_link_hash_table *htab;
7431 asection *splt;
7432 asection *sgotplt;
7433
7434 htab = elf32_arm_hash_table (info);
7435
7436 if (is_iplt_entry)
7437 {
7438 splt = htab->root.iplt;
7439 sgotplt = htab->root.igotplt;
7440
7441 /* NaCl uses a special first entry in .iplt too. */
7442 if (htab->nacl_p && splt->size == 0)
7443 splt->size += htab->plt_header_size;
7444
7445 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7446 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7447 }
7448 else
7449 {
7450 splt = htab->root.splt;
7451 sgotplt = htab->root.sgotplt;
7452
7453 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7454 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7455
7456 /* If this is the first .plt entry, make room for the special
7457 first entry. */
7458 if (splt->size == 0)
7459 splt->size += htab->plt_header_size;
7460 }
7461
7462 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7463 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7464 splt->size += PLT_THUMB_STUB_SIZE;
7465 root_plt->offset = splt->size;
7466 splt->size += htab->plt_entry_size;
7467
7468 if (!htab->symbian_p)
7469 {
7470 /* We also need to make an entry in the .got.plt section, which
7471 will be placed in the .got section by the linker script. */
7472 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7473 sgotplt->size += 4;
7474 }
7475 }
7476
7477 static bfd_vma
7478 arm_movw_immediate (bfd_vma value)
7479 {
7480 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7481 }
7482
7483 static bfd_vma
7484 arm_movt_immediate (bfd_vma value)
7485 {
7486 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7487 }
7488
7489 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7490 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7491 Otherwise, DYNINDX is the index of the symbol in the dynamic
7492 symbol table and SYM_VALUE is undefined.
7493
7494 ROOT_PLT points to the offset of the PLT entry from the start of its
7495 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7496 bookkeeping information.
7497
7498 Returns FALSE if there was a problem. */
7499
7500 static bfd_boolean
7501 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7502 union gotplt_union *root_plt,
7503 struct arm_plt_info *arm_plt,
7504 int dynindx, bfd_vma sym_value)
7505 {
7506 struct elf32_arm_link_hash_table *htab;
7507 asection *sgot;
7508 asection *splt;
7509 asection *srel;
7510 bfd_byte *loc;
7511 bfd_vma plt_index;
7512 Elf_Internal_Rela rel;
7513 bfd_vma plt_header_size;
7514 bfd_vma got_header_size;
7515
7516 htab = elf32_arm_hash_table (info);
7517
7518 /* Pick the appropriate sections and sizes. */
7519 if (dynindx == -1)
7520 {
7521 splt = htab->root.iplt;
7522 sgot = htab->root.igotplt;
7523 srel = htab->root.irelplt;
7524
7525 /* There are no reserved entries in .igot.plt, and no special
7526 first entry in .iplt. */
7527 got_header_size = 0;
7528 plt_header_size = 0;
7529 }
7530 else
7531 {
7532 splt = htab->root.splt;
7533 sgot = htab->root.sgotplt;
7534 srel = htab->root.srelplt;
7535
7536 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7537 plt_header_size = htab->plt_header_size;
7538 }
7539 BFD_ASSERT (splt != NULL && srel != NULL);
7540
7541 /* Fill in the entry in the procedure linkage table. */
7542 if (htab->symbian_p)
7543 {
7544 BFD_ASSERT (dynindx >= 0);
7545 put_arm_insn (htab, output_bfd,
7546 elf32_arm_symbian_plt_entry[0],
7547 splt->contents + root_plt->offset);
7548 bfd_put_32 (output_bfd,
7549 elf32_arm_symbian_plt_entry[1],
7550 splt->contents + root_plt->offset + 4);
7551
7552 /* Fill in the entry in the .rel.plt section. */
7553 rel.r_offset = (splt->output_section->vma
7554 + splt->output_offset
7555 + root_plt->offset + 4);
7556 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7557
7558 /* Get the index in the procedure linkage table which
7559 corresponds to this symbol. This is the index of this symbol
7560 in all the symbols for which we are making plt entries. The
7561 first entry in the procedure linkage table is reserved. */
7562 plt_index = ((root_plt->offset - plt_header_size)
7563 / htab->plt_entry_size);
7564 }
7565 else
7566 {
7567 bfd_vma got_offset, got_address, plt_address;
7568 bfd_vma got_displacement, initial_got_entry;
7569 bfd_byte * ptr;
7570
7571 BFD_ASSERT (sgot != NULL);
7572
7573 /* Get the offset into the .(i)got.plt table of the entry that
7574 corresponds to this function. */
7575 got_offset = (arm_plt->got_offset & -2);
7576
7577 /* Get the index in the procedure linkage table which
7578 corresponds to this symbol. This is the index of this symbol
7579 in all the symbols for which we are making plt entries.
7580 After the reserved .got.plt entries, all symbols appear in
7581 the same order as in .plt. */
7582 plt_index = (got_offset - got_header_size) / 4;
7583
7584 /* Calculate the address of the GOT entry. */
7585 got_address = (sgot->output_section->vma
7586 + sgot->output_offset
7587 + got_offset);
7588
7589 /* ...and the address of the PLT entry. */
7590 plt_address = (splt->output_section->vma
7591 + splt->output_offset
7592 + root_plt->offset);
7593
7594 ptr = splt->contents + root_plt->offset;
7595 if (htab->vxworks_p && info->shared)
7596 {
7597 unsigned int i;
7598 bfd_vma val;
7599
7600 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7601 {
7602 val = elf32_arm_vxworks_shared_plt_entry[i];
7603 if (i == 2)
7604 val |= got_address - sgot->output_section->vma;
7605 if (i == 5)
7606 val |= plt_index * RELOC_SIZE (htab);
7607 if (i == 2 || i == 5)
7608 bfd_put_32 (output_bfd, val, ptr);
7609 else
7610 put_arm_insn (htab, output_bfd, val, ptr);
7611 }
7612 }
7613 else if (htab->vxworks_p)
7614 {
7615 unsigned int i;
7616 bfd_vma val;
7617
7618 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7619 {
7620 val = elf32_arm_vxworks_exec_plt_entry[i];
7621 if (i == 2)
7622 val |= got_address;
7623 if (i == 4)
7624 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7625 if (i == 5)
7626 val |= plt_index * RELOC_SIZE (htab);
7627 if (i == 2 || i == 5)
7628 bfd_put_32 (output_bfd, val, ptr);
7629 else
7630 put_arm_insn (htab, output_bfd, val, ptr);
7631 }
7632
7633 loc = (htab->srelplt2->contents
7634 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7635
7636 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7637 referencing the GOT for this PLT entry. */
7638 rel.r_offset = plt_address + 8;
7639 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7640 rel.r_addend = got_offset;
7641 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7642 loc += RELOC_SIZE (htab);
7643
7644 /* Create the R_ARM_ABS32 relocation referencing the
7645 beginning of the PLT for this GOT entry. */
7646 rel.r_offset = got_address;
7647 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7648 rel.r_addend = 0;
7649 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7650 }
7651 else if (htab->nacl_p)
7652 {
7653 /* Calculate the displacement between the PLT slot and the
7654 common tail that's part of the special initial PLT slot. */
7655 int32_t tail_displacement
7656 = ((splt->output_section->vma + splt->output_offset
7657 + ARM_NACL_PLT_TAIL_OFFSET)
7658 - (plt_address + htab->plt_entry_size + 4));
7659 BFD_ASSERT ((tail_displacement & 3) == 0);
7660 tail_displacement >>= 2;
7661
7662 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7663 || (-tail_displacement & 0xff000000) == 0);
7664
7665 /* Calculate the displacement between the PLT slot and the entry
7666 in the GOT. The offset accounts for the value produced by
7667 adding to pc in the penultimate instruction of the PLT stub. */
7668 got_displacement = (got_address
7669 - (plt_address + htab->plt_entry_size));
7670
7671 /* NaCl does not support interworking at all. */
7672 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7673
7674 put_arm_insn (htab, output_bfd,
7675 elf32_arm_nacl_plt_entry[0]
7676 | arm_movw_immediate (got_displacement),
7677 ptr + 0);
7678 put_arm_insn (htab, output_bfd,
7679 elf32_arm_nacl_plt_entry[1]
7680 | arm_movt_immediate (got_displacement),
7681 ptr + 4);
7682 put_arm_insn (htab, output_bfd,
7683 elf32_arm_nacl_plt_entry[2],
7684 ptr + 8);
7685 put_arm_insn (htab, output_bfd,
7686 elf32_arm_nacl_plt_entry[3]
7687 | (tail_displacement & 0x00ffffff),
7688 ptr + 12);
7689 }
7690 else if (using_thumb_only (htab))
7691 {
7692 /* PR ld/16017: Do not generate ARM instructions for
7693 the PLT if compiling for a thumb-only target.
7694
7695 FIXME: We ought to be able to generate thumb PLT instructions... */
7696 _bfd_error_handler (_("%B: Warning: thumb mode PLT generation not currently supported"),
7697 output_bfd);
7698 return FALSE;
7699 }
7700 else
7701 {
7702 /* Calculate the displacement between the PLT slot and the
7703 entry in the GOT. The eight-byte offset accounts for the
7704 value produced by adding to pc in the first instruction
7705 of the PLT stub. */
7706 got_displacement = got_address - (plt_address + 8);
7707
7708 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7709
7710 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7711 {
7712 put_thumb_insn (htab, output_bfd,
7713 elf32_arm_plt_thumb_stub[0], ptr - 4);
7714 put_thumb_insn (htab, output_bfd,
7715 elf32_arm_plt_thumb_stub[1], ptr - 2);
7716 }
7717
7718 put_arm_insn (htab, output_bfd,
7719 elf32_arm_plt_entry[0]
7720 | ((got_displacement & 0x0ff00000) >> 20),
7721 ptr + 0);
7722 put_arm_insn (htab, output_bfd,
7723 elf32_arm_plt_entry[1]
7724 | ((got_displacement & 0x000ff000) >> 12),
7725 ptr+ 4);
7726 put_arm_insn (htab, output_bfd,
7727 elf32_arm_plt_entry[2]
7728 | (got_displacement & 0x00000fff),
7729 ptr + 8);
7730 #ifdef FOUR_WORD_PLT
7731 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7732 #endif
7733 }
7734
7735 /* Fill in the entry in the .rel(a).(i)plt section. */
7736 rel.r_offset = got_address;
7737 rel.r_addend = 0;
7738 if (dynindx == -1)
7739 {
7740 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7741 The dynamic linker or static executable then calls SYM_VALUE
7742 to determine the correct run-time value of the .igot.plt entry. */
7743 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7744 initial_got_entry = sym_value;
7745 }
7746 else
7747 {
7748 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7749 initial_got_entry = (splt->output_section->vma
7750 + splt->output_offset);
7751 }
7752
7753 /* Fill in the entry in the global offset table. */
7754 bfd_put_32 (output_bfd, initial_got_entry,
7755 sgot->contents + got_offset);
7756 }
7757
7758 if (dynindx == -1)
7759 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7760 else
7761 {
7762 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7763 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7764 }
7765
7766 return TRUE;
7767 }
7768
7769 /* Some relocations map to different relocations depending on the
7770 target. Return the real relocation. */
7771
7772 static int
7773 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7774 int r_type)
7775 {
7776 switch (r_type)
7777 {
7778 case R_ARM_TARGET1:
7779 if (globals->target1_is_rel)
7780 return R_ARM_REL32;
7781 else
7782 return R_ARM_ABS32;
7783
7784 case R_ARM_TARGET2:
7785 return globals->target2_reloc;
7786
7787 default:
7788 return r_type;
7789 }
7790 }
7791
7792 /* Return the base VMA address which should be subtracted from real addresses
7793 when resolving @dtpoff relocation.
7794 This is PT_TLS segment p_vaddr. */
7795
7796 static bfd_vma
7797 dtpoff_base (struct bfd_link_info *info)
7798 {
7799 /* If tls_sec is NULL, we should have signalled an error already. */
7800 if (elf_hash_table (info)->tls_sec == NULL)
7801 return 0;
7802 return elf_hash_table (info)->tls_sec->vma;
7803 }
7804
7805 /* Return the relocation value for @tpoff relocation
7806 if STT_TLS virtual address is ADDRESS. */
7807
7808 static bfd_vma
7809 tpoff (struct bfd_link_info *info, bfd_vma address)
7810 {
7811 struct elf_link_hash_table *htab = elf_hash_table (info);
7812 bfd_vma base;
7813
7814 /* If tls_sec is NULL, we should have signalled an error already. */
7815 if (htab->tls_sec == NULL)
7816 return 0;
7817 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7818 return address - htab->tls_sec->vma + base;
7819 }
7820
7821 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7822 VALUE is the relocation value. */
7823
7824 static bfd_reloc_status_type
7825 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7826 {
7827 if (value > 0xfff)
7828 return bfd_reloc_overflow;
7829
7830 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7831 bfd_put_32 (abfd, value, data);
7832 return bfd_reloc_ok;
7833 }
7834
7835 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7836 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7837 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7838
7839 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7840 is to then call final_link_relocate. Return other values in the
7841 case of error.
7842
7843 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7844 the pre-relaxed code. It would be nice if the relocs were updated
7845 to match the optimization. */
7846
7847 static bfd_reloc_status_type
7848 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7849 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7850 Elf_Internal_Rela *rel, unsigned long is_local)
7851 {
7852 unsigned long insn;
7853
7854 switch (ELF32_R_TYPE (rel->r_info))
7855 {
7856 default:
7857 return bfd_reloc_notsupported;
7858
7859 case R_ARM_TLS_GOTDESC:
7860 if (is_local)
7861 insn = 0;
7862 else
7863 {
7864 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7865 if (insn & 1)
7866 insn -= 5; /* THUMB */
7867 else
7868 insn -= 8; /* ARM */
7869 }
7870 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7871 return bfd_reloc_continue;
7872
7873 case R_ARM_THM_TLS_DESCSEQ:
7874 /* Thumb insn. */
7875 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7876 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7877 {
7878 if (is_local)
7879 /* nop */
7880 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7881 }
7882 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7883 {
7884 if (is_local)
7885 /* nop */
7886 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7887 else
7888 /* ldr rx,[ry] */
7889 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7890 }
7891 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7892 {
7893 if (is_local)
7894 /* nop */
7895 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7896 else
7897 /* mov r0, rx */
7898 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7899 contents + rel->r_offset);
7900 }
7901 else
7902 {
7903 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7904 /* It's a 32 bit instruction, fetch the rest of it for
7905 error generation. */
7906 insn = (insn << 16)
7907 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7908 (*_bfd_error_handler)
7909 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7910 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7911 return bfd_reloc_notsupported;
7912 }
7913 break;
7914
7915 case R_ARM_TLS_DESCSEQ:
7916 /* arm insn. */
7917 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7918 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7919 {
7920 if (is_local)
7921 /* mov rx, ry */
7922 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7923 contents + rel->r_offset);
7924 }
7925 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7926 {
7927 if (is_local)
7928 /* nop */
7929 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7930 else
7931 /* ldr rx,[ry] */
7932 bfd_put_32 (input_bfd, insn & 0xfffff000,
7933 contents + rel->r_offset);
7934 }
7935 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7936 {
7937 if (is_local)
7938 /* nop */
7939 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7940 else
7941 /* mov r0, rx */
7942 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7943 contents + rel->r_offset);
7944 }
7945 else
7946 {
7947 (*_bfd_error_handler)
7948 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7949 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7950 return bfd_reloc_notsupported;
7951 }
7952 break;
7953
7954 case R_ARM_TLS_CALL:
7955 /* GD->IE relaxation, turn the instruction into 'nop' or
7956 'ldr r0, [pc,r0]' */
7957 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7958 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7959 break;
7960
7961 case R_ARM_THM_TLS_CALL:
7962 /* GD->IE relaxation */
7963 if (!is_local)
7964 /* add r0,pc; ldr r0, [r0] */
7965 insn = 0x44786800;
7966 else if (arch_has_thumb2_nop (globals))
7967 /* nop.w */
7968 insn = 0xf3af8000;
7969 else
7970 /* nop; nop */
7971 insn = 0xbf00bf00;
7972
7973 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7974 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7975 break;
7976 }
7977 return bfd_reloc_ok;
7978 }
7979
7980 /* For a given value of n, calculate the value of G_n as required to
7981 deal with group relocations. We return it in the form of an
7982 encoded constant-and-rotation, together with the final residual. If n is
7983 specified as less than zero, then final_residual is filled with the
7984 input value and no further action is performed. */
7985
7986 static bfd_vma
7987 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7988 {
7989 int current_n;
7990 bfd_vma g_n;
7991 bfd_vma encoded_g_n = 0;
7992 bfd_vma residual = value; /* Also known as Y_n. */
7993
7994 for (current_n = 0; current_n <= n; current_n++)
7995 {
7996 int shift;
7997
7998 /* Calculate which part of the value to mask. */
7999 if (residual == 0)
8000 shift = 0;
8001 else
8002 {
8003 int msb;
8004
8005 /* Determine the most significant bit in the residual and
8006 align the resulting value to a 2-bit boundary. */
8007 for (msb = 30; msb >= 0; msb -= 2)
8008 if (residual & (3 << msb))
8009 break;
8010
8011 /* The desired shift is now (msb - 6), or zero, whichever
8012 is the greater. */
8013 shift = msb - 6;
8014 if (shift < 0)
8015 shift = 0;
8016 }
8017
8018 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8019 g_n = residual & (0xff << shift);
8020 encoded_g_n = (g_n >> shift)
8021 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8022
8023 /* Calculate the residual for the next time around. */
8024 residual &= ~g_n;
8025 }
8026
8027 *final_residual = residual;
8028
8029 return encoded_g_n;
8030 }
8031
8032 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8033 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8034
8035 static int
8036 identify_add_or_sub (bfd_vma insn)
8037 {
8038 int opcode = insn & 0x1e00000;
8039
8040 if (opcode == 1 << 23) /* ADD */
8041 return 1;
8042
8043 if (opcode == 1 << 22) /* SUB */
8044 return -1;
8045
8046 return 0;
8047 }
8048
8049 /* Perform a relocation as part of a final link. */
8050
8051 static bfd_reloc_status_type
8052 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8053 bfd * input_bfd,
8054 bfd * output_bfd,
8055 asection * input_section,
8056 bfd_byte * contents,
8057 Elf_Internal_Rela * rel,
8058 bfd_vma value,
8059 struct bfd_link_info * info,
8060 asection * sym_sec,
8061 const char * sym_name,
8062 unsigned char st_type,
8063 enum arm_st_branch_type branch_type,
8064 struct elf_link_hash_entry * h,
8065 bfd_boolean * unresolved_reloc_p,
8066 char ** error_message)
8067 {
8068 unsigned long r_type = howto->type;
8069 unsigned long r_symndx;
8070 bfd_byte * hit_data = contents + rel->r_offset;
8071 bfd_vma * local_got_offsets;
8072 bfd_vma * local_tlsdesc_gotents;
8073 asection * sgot;
8074 asection * splt;
8075 asection * sreloc = NULL;
8076 asection * srelgot;
8077 bfd_vma addend;
8078 bfd_signed_vma signed_addend;
8079 unsigned char dynreloc_st_type;
8080 bfd_vma dynreloc_value;
8081 struct elf32_arm_link_hash_table * globals;
8082 struct elf32_arm_link_hash_entry *eh;
8083 union gotplt_union *root_plt;
8084 struct arm_plt_info *arm_plt;
8085 bfd_vma plt_offset;
8086 bfd_vma gotplt_offset;
8087 bfd_boolean has_iplt_entry;
8088
8089 globals = elf32_arm_hash_table (info);
8090 if (globals == NULL)
8091 return bfd_reloc_notsupported;
8092
8093 BFD_ASSERT (is_arm_elf (input_bfd));
8094
8095 /* Some relocation types map to different relocations depending on the
8096 target. We pick the right one here. */
8097 r_type = arm_real_reloc_type (globals, r_type);
8098
8099 /* It is possible to have linker relaxations on some TLS access
8100 models. Update our information here. */
8101 r_type = elf32_arm_tls_transition (info, r_type, h);
8102
8103 if (r_type != howto->type)
8104 howto = elf32_arm_howto_from_type (r_type);
8105
8106 /* If the start address has been set, then set the EF_ARM_HASENTRY
8107 flag. Setting this more than once is redundant, but the cost is
8108 not too high, and it keeps the code simple.
8109
8110 The test is done here, rather than somewhere else, because the
8111 start address is only set just before the final link commences.
8112
8113 Note - if the user deliberately sets a start address of 0, the
8114 flag will not be set. */
8115 if (bfd_get_start_address (output_bfd) != 0)
8116 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8117
8118 eh = (struct elf32_arm_link_hash_entry *) h;
8119 sgot = globals->root.sgot;
8120 local_got_offsets = elf_local_got_offsets (input_bfd);
8121 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8122
8123 if (globals->root.dynamic_sections_created)
8124 srelgot = globals->root.srelgot;
8125 else
8126 srelgot = NULL;
8127
8128 r_symndx = ELF32_R_SYM (rel->r_info);
8129
8130 if (globals->use_rel)
8131 {
8132 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8133
8134 if (addend & ((howto->src_mask + 1) >> 1))
8135 {
8136 signed_addend = -1;
8137 signed_addend &= ~ howto->src_mask;
8138 signed_addend |= addend;
8139 }
8140 else
8141 signed_addend = addend;
8142 }
8143 else
8144 addend = signed_addend = rel->r_addend;
8145
8146 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8147 are resolving a function call relocation. */
8148 if (using_thumb_only (globals)
8149 && (r_type == R_ARM_THM_CALL
8150 || r_type == R_ARM_THM_JUMP24)
8151 && branch_type == ST_BRANCH_TO_ARM)
8152 branch_type = ST_BRANCH_TO_THUMB;
8153
8154 /* Record the symbol information that should be used in dynamic
8155 relocations. */
8156 dynreloc_st_type = st_type;
8157 dynreloc_value = value;
8158 if (branch_type == ST_BRANCH_TO_THUMB)
8159 dynreloc_value |= 1;
8160
8161 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8162 VALUE appropriately for relocations that we resolve at link time. */
8163 has_iplt_entry = FALSE;
8164 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8165 && root_plt->offset != (bfd_vma) -1)
8166 {
8167 plt_offset = root_plt->offset;
8168 gotplt_offset = arm_plt->got_offset;
8169
8170 if (h == NULL || eh->is_iplt)
8171 {
8172 has_iplt_entry = TRUE;
8173 splt = globals->root.iplt;
8174
8175 /* Populate .iplt entries here, because not all of them will
8176 be seen by finish_dynamic_symbol. The lower bit is set if
8177 we have already populated the entry. */
8178 if (plt_offset & 1)
8179 plt_offset--;
8180 else
8181 {
8182 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8183 -1, dynreloc_value))
8184 root_plt->offset |= 1;
8185 else
8186 return bfd_reloc_notsupported;
8187 }
8188
8189 /* Static relocations always resolve to the .iplt entry. */
8190 st_type = STT_FUNC;
8191 value = (splt->output_section->vma
8192 + splt->output_offset
8193 + plt_offset);
8194 branch_type = ST_BRANCH_TO_ARM;
8195
8196 /* If there are non-call relocations that resolve to the .iplt
8197 entry, then all dynamic ones must too. */
8198 if (arm_plt->noncall_refcount != 0)
8199 {
8200 dynreloc_st_type = st_type;
8201 dynreloc_value = value;
8202 }
8203 }
8204 else
8205 /* We populate the .plt entry in finish_dynamic_symbol. */
8206 splt = globals->root.splt;
8207 }
8208 else
8209 {
8210 splt = NULL;
8211 plt_offset = (bfd_vma) -1;
8212 gotplt_offset = (bfd_vma) -1;
8213 }
8214
8215 switch (r_type)
8216 {
8217 case R_ARM_NONE:
8218 /* We don't need to find a value for this symbol. It's just a
8219 marker. */
8220 *unresolved_reloc_p = FALSE;
8221 return bfd_reloc_ok;
8222
8223 case R_ARM_ABS12:
8224 if (!globals->vxworks_p)
8225 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8226
8227 case R_ARM_PC24:
8228 case R_ARM_ABS32:
8229 case R_ARM_ABS32_NOI:
8230 case R_ARM_REL32:
8231 case R_ARM_REL32_NOI:
8232 case R_ARM_CALL:
8233 case R_ARM_JUMP24:
8234 case R_ARM_XPC25:
8235 case R_ARM_PREL31:
8236 case R_ARM_PLT32:
8237 /* Handle relocations which should use the PLT entry. ABS32/REL32
8238 will use the symbol's value, which may point to a PLT entry, but we
8239 don't need to handle that here. If we created a PLT entry, all
8240 branches in this object should go to it, except if the PLT is too
8241 far away, in which case a long branch stub should be inserted. */
8242 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8243 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8244 && r_type != R_ARM_CALL
8245 && r_type != R_ARM_JUMP24
8246 && r_type != R_ARM_PLT32)
8247 && plt_offset != (bfd_vma) -1)
8248 {
8249 /* If we've created a .plt section, and assigned a PLT entry
8250 to this function, it must either be a STT_GNU_IFUNC reference
8251 or not be known to bind locally. In other cases, we should
8252 have cleared the PLT entry by now. */
8253 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8254
8255 value = (splt->output_section->vma
8256 + splt->output_offset
8257 + plt_offset);
8258 *unresolved_reloc_p = FALSE;
8259 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8260 contents, rel->r_offset, value,
8261 rel->r_addend);
8262 }
8263
8264 /* When generating a shared object or relocatable executable, these
8265 relocations are copied into the output file to be resolved at
8266 run time. */
8267 if ((info->shared || globals->root.is_relocatable_executable)
8268 && (input_section->flags & SEC_ALLOC)
8269 && !(globals->vxworks_p
8270 && strcmp (input_section->output_section->name,
8271 ".tls_vars") == 0)
8272 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8273 || !SYMBOL_CALLS_LOCAL (info, h))
8274 && !(input_bfd == globals->stub_bfd
8275 && strstr (input_section->name, STUB_SUFFIX))
8276 && (h == NULL
8277 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8278 || h->root.type != bfd_link_hash_undefweak)
8279 && r_type != R_ARM_PC24
8280 && r_type != R_ARM_CALL
8281 && r_type != R_ARM_JUMP24
8282 && r_type != R_ARM_PREL31
8283 && r_type != R_ARM_PLT32)
8284 {
8285 Elf_Internal_Rela outrel;
8286 bfd_boolean skip, relocate;
8287
8288 *unresolved_reloc_p = FALSE;
8289
8290 if (sreloc == NULL && globals->root.dynamic_sections_created)
8291 {
8292 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8293 ! globals->use_rel);
8294
8295 if (sreloc == NULL)
8296 return bfd_reloc_notsupported;
8297 }
8298
8299 skip = FALSE;
8300 relocate = FALSE;
8301
8302 outrel.r_addend = addend;
8303 outrel.r_offset =
8304 _bfd_elf_section_offset (output_bfd, info, input_section,
8305 rel->r_offset);
8306 if (outrel.r_offset == (bfd_vma) -1)
8307 skip = TRUE;
8308 else if (outrel.r_offset == (bfd_vma) -2)
8309 skip = TRUE, relocate = TRUE;
8310 outrel.r_offset += (input_section->output_section->vma
8311 + input_section->output_offset);
8312
8313 if (skip)
8314 memset (&outrel, 0, sizeof outrel);
8315 else if (h != NULL
8316 && h->dynindx != -1
8317 && (!info->shared
8318 || !info->symbolic
8319 || !h->def_regular))
8320 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8321 else
8322 {
8323 int symbol;
8324
8325 /* This symbol is local, or marked to become local. */
8326 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8327 if (globals->symbian_p)
8328 {
8329 asection *osec;
8330
8331 /* On Symbian OS, the data segment and text segement
8332 can be relocated independently. Therefore, we
8333 must indicate the segment to which this
8334 relocation is relative. The BPABI allows us to
8335 use any symbol in the right segment; we just use
8336 the section symbol as it is convenient. (We
8337 cannot use the symbol given by "h" directly as it
8338 will not appear in the dynamic symbol table.)
8339
8340 Note that the dynamic linker ignores the section
8341 symbol value, so we don't subtract osec->vma
8342 from the emitted reloc addend. */
8343 if (sym_sec)
8344 osec = sym_sec->output_section;
8345 else
8346 osec = input_section->output_section;
8347 symbol = elf_section_data (osec)->dynindx;
8348 if (symbol == 0)
8349 {
8350 struct elf_link_hash_table *htab = elf_hash_table (info);
8351
8352 if ((osec->flags & SEC_READONLY) == 0
8353 && htab->data_index_section != NULL)
8354 osec = htab->data_index_section;
8355 else
8356 osec = htab->text_index_section;
8357 symbol = elf_section_data (osec)->dynindx;
8358 }
8359 BFD_ASSERT (symbol != 0);
8360 }
8361 else
8362 /* On SVR4-ish systems, the dynamic loader cannot
8363 relocate the text and data segments independently,
8364 so the symbol does not matter. */
8365 symbol = 0;
8366 if (dynreloc_st_type == STT_GNU_IFUNC)
8367 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8368 to the .iplt entry. Instead, every non-call reference
8369 must use an R_ARM_IRELATIVE relocation to obtain the
8370 correct run-time address. */
8371 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8372 else
8373 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8374 if (globals->use_rel)
8375 relocate = TRUE;
8376 else
8377 outrel.r_addend += dynreloc_value;
8378 }
8379
8380 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8381
8382 /* If this reloc is against an external symbol, we do not want to
8383 fiddle with the addend. Otherwise, we need to include the symbol
8384 value so that it becomes an addend for the dynamic reloc. */
8385 if (! relocate)
8386 return bfd_reloc_ok;
8387
8388 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8389 contents, rel->r_offset,
8390 dynreloc_value, (bfd_vma) 0);
8391 }
8392 else switch (r_type)
8393 {
8394 case R_ARM_ABS12:
8395 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8396
8397 case R_ARM_XPC25: /* Arm BLX instruction. */
8398 case R_ARM_CALL:
8399 case R_ARM_JUMP24:
8400 case R_ARM_PC24: /* Arm B/BL instruction. */
8401 case R_ARM_PLT32:
8402 {
8403 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8404
8405 if (r_type == R_ARM_XPC25)
8406 {
8407 /* Check for Arm calling Arm function. */
8408 /* FIXME: Should we translate the instruction into a BL
8409 instruction instead ? */
8410 if (branch_type != ST_BRANCH_TO_THUMB)
8411 (*_bfd_error_handler)
8412 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8413 input_bfd,
8414 h ? h->root.root.string : "(local)");
8415 }
8416 else if (r_type == R_ARM_PC24)
8417 {
8418 /* Check for Arm calling Thumb function. */
8419 if (branch_type == ST_BRANCH_TO_THUMB)
8420 {
8421 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8422 output_bfd, input_section,
8423 hit_data, sym_sec, rel->r_offset,
8424 signed_addend, value,
8425 error_message))
8426 return bfd_reloc_ok;
8427 else
8428 return bfd_reloc_dangerous;
8429 }
8430 }
8431
8432 /* Check if a stub has to be inserted because the
8433 destination is too far or we are changing mode. */
8434 if ( r_type == R_ARM_CALL
8435 || r_type == R_ARM_JUMP24
8436 || r_type == R_ARM_PLT32)
8437 {
8438 enum elf32_arm_stub_type stub_type = arm_stub_none;
8439 struct elf32_arm_link_hash_entry *hash;
8440
8441 hash = (struct elf32_arm_link_hash_entry *) h;
8442 stub_type = arm_type_of_stub (info, input_section, rel,
8443 st_type, &branch_type,
8444 hash, value, sym_sec,
8445 input_bfd, sym_name);
8446
8447 if (stub_type != arm_stub_none)
8448 {
8449 /* The target is out of reach, so redirect the
8450 branch to the local stub for this function. */
8451 stub_entry = elf32_arm_get_stub_entry (input_section,
8452 sym_sec, h,
8453 rel, globals,
8454 stub_type);
8455 {
8456 if (stub_entry != NULL)
8457 value = (stub_entry->stub_offset
8458 + stub_entry->stub_sec->output_offset
8459 + stub_entry->stub_sec->output_section->vma);
8460
8461 if (plt_offset != (bfd_vma) -1)
8462 *unresolved_reloc_p = FALSE;
8463 }
8464 }
8465 else
8466 {
8467 /* If the call goes through a PLT entry, make sure to
8468 check distance to the right destination address. */
8469 if (plt_offset != (bfd_vma) -1)
8470 {
8471 value = (splt->output_section->vma
8472 + splt->output_offset
8473 + plt_offset);
8474 *unresolved_reloc_p = FALSE;
8475 /* The PLT entry is in ARM mode, regardless of the
8476 target function. */
8477 branch_type = ST_BRANCH_TO_ARM;
8478 }
8479 }
8480 }
8481
8482 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8483 where:
8484 S is the address of the symbol in the relocation.
8485 P is address of the instruction being relocated.
8486 A is the addend (extracted from the instruction) in bytes.
8487
8488 S is held in 'value'.
8489 P is the base address of the section containing the
8490 instruction plus the offset of the reloc into that
8491 section, ie:
8492 (input_section->output_section->vma +
8493 input_section->output_offset +
8494 rel->r_offset).
8495 A is the addend, converted into bytes, ie:
8496 (signed_addend * 4)
8497
8498 Note: None of these operations have knowledge of the pipeline
8499 size of the processor, thus it is up to the assembler to
8500 encode this information into the addend. */
8501 value -= (input_section->output_section->vma
8502 + input_section->output_offset);
8503 value -= rel->r_offset;
8504 if (globals->use_rel)
8505 value += (signed_addend << howto->size);
8506 else
8507 /* RELA addends do not have to be adjusted by howto->size. */
8508 value += signed_addend;
8509
8510 signed_addend = value;
8511 signed_addend >>= howto->rightshift;
8512
8513 /* A branch to an undefined weak symbol is turned into a jump to
8514 the next instruction unless a PLT entry will be created.
8515 Do the same for local undefined symbols (but not for STN_UNDEF).
8516 The jump to the next instruction is optimized as a NOP depending
8517 on the architecture. */
8518 if (h ? (h->root.type == bfd_link_hash_undefweak
8519 && plt_offset == (bfd_vma) -1)
8520 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8521 {
8522 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8523
8524 if (arch_has_arm_nop (globals))
8525 value |= 0x0320f000;
8526 else
8527 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8528 }
8529 else
8530 {
8531 /* Perform a signed range check. */
8532 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8533 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8534 return bfd_reloc_overflow;
8535
8536 addend = (value & 2);
8537
8538 value = (signed_addend & howto->dst_mask)
8539 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8540
8541 if (r_type == R_ARM_CALL)
8542 {
8543 /* Set the H bit in the BLX instruction. */
8544 if (branch_type == ST_BRANCH_TO_THUMB)
8545 {
8546 if (addend)
8547 value |= (1 << 24);
8548 else
8549 value &= ~(bfd_vma)(1 << 24);
8550 }
8551
8552 /* Select the correct instruction (BL or BLX). */
8553 /* Only if we are not handling a BL to a stub. In this
8554 case, mode switching is performed by the stub. */
8555 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8556 value |= (1 << 28);
8557 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8558 {
8559 value &= ~(bfd_vma)(1 << 28);
8560 value |= (1 << 24);
8561 }
8562 }
8563 }
8564 }
8565 break;
8566
8567 case R_ARM_ABS32:
8568 value += addend;
8569 if (branch_type == ST_BRANCH_TO_THUMB)
8570 value |= 1;
8571 break;
8572
8573 case R_ARM_ABS32_NOI:
8574 value += addend;
8575 break;
8576
8577 case R_ARM_REL32:
8578 value += addend;
8579 if (branch_type == ST_BRANCH_TO_THUMB)
8580 value |= 1;
8581 value -= (input_section->output_section->vma
8582 + input_section->output_offset + rel->r_offset);
8583 break;
8584
8585 case R_ARM_REL32_NOI:
8586 value += addend;
8587 value -= (input_section->output_section->vma
8588 + input_section->output_offset + rel->r_offset);
8589 break;
8590
8591 case R_ARM_PREL31:
8592 value -= (input_section->output_section->vma
8593 + input_section->output_offset + rel->r_offset);
8594 value += signed_addend;
8595 if (! h || h->root.type != bfd_link_hash_undefweak)
8596 {
8597 /* Check for overflow. */
8598 if ((value ^ (value >> 1)) & (1 << 30))
8599 return bfd_reloc_overflow;
8600 }
8601 value &= 0x7fffffff;
8602 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8603 if (branch_type == ST_BRANCH_TO_THUMB)
8604 value |= 1;
8605 break;
8606 }
8607
8608 bfd_put_32 (input_bfd, value, hit_data);
8609 return bfd_reloc_ok;
8610
8611 case R_ARM_ABS8:
8612 /* PR 16202: Refectch the addend using the correct size. */
8613 if (globals->use_rel)
8614 addend = bfd_get_8 (input_bfd, hit_data);
8615 value += addend;
8616
8617 /* There is no way to tell whether the user intended to use a signed or
8618 unsigned addend. When checking for overflow we accept either,
8619 as specified by the AAELF. */
8620 if ((long) value > 0xff || (long) value < -0x80)
8621 return bfd_reloc_overflow;
8622
8623 bfd_put_8 (input_bfd, value, hit_data);
8624 return bfd_reloc_ok;
8625
8626 case R_ARM_ABS16:
8627 /* PR 16202: Refectch the addend using the correct size. */
8628 if (globals->use_rel)
8629 addend = bfd_get_16 (input_bfd, hit_data);
8630 value += addend;
8631
8632 /* See comment for R_ARM_ABS8. */
8633 if ((long) value > 0xffff || (long) value < -0x8000)
8634 return bfd_reloc_overflow;
8635
8636 bfd_put_16 (input_bfd, value, hit_data);
8637 return bfd_reloc_ok;
8638
8639 case R_ARM_THM_ABS5:
8640 /* Support ldr and str instructions for the thumb. */
8641 if (globals->use_rel)
8642 {
8643 /* Need to refetch addend. */
8644 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8645 /* ??? Need to determine shift amount from operand size. */
8646 addend >>= howto->rightshift;
8647 }
8648 value += addend;
8649
8650 /* ??? Isn't value unsigned? */
8651 if ((long) value > 0x1f || (long) value < -0x10)
8652 return bfd_reloc_overflow;
8653
8654 /* ??? Value needs to be properly shifted into place first. */
8655 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8656 bfd_put_16 (input_bfd, value, hit_data);
8657 return bfd_reloc_ok;
8658
8659 case R_ARM_THM_ALU_PREL_11_0:
8660 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8661 {
8662 bfd_vma insn;
8663 bfd_signed_vma relocation;
8664
8665 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8666 | bfd_get_16 (input_bfd, hit_data + 2);
8667
8668 if (globals->use_rel)
8669 {
8670 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8671 | ((insn & (1 << 26)) >> 15);
8672 if (insn & 0xf00000)
8673 signed_addend = -signed_addend;
8674 }
8675
8676 relocation = value + signed_addend;
8677 relocation -= Pa (input_section->output_section->vma
8678 + input_section->output_offset
8679 + rel->r_offset);
8680
8681 value = abs (relocation);
8682
8683 if (value >= 0x1000)
8684 return bfd_reloc_overflow;
8685
8686 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8687 | ((value & 0x700) << 4)
8688 | ((value & 0x800) << 15);
8689 if (relocation < 0)
8690 insn |= 0xa00000;
8691
8692 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8693 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8694
8695 return bfd_reloc_ok;
8696 }
8697
8698 case R_ARM_THM_PC8:
8699 /* PR 10073: This reloc is not generated by the GNU toolchain,
8700 but it is supported for compatibility with third party libraries
8701 generated by other compilers, specifically the ARM/IAR. */
8702 {
8703 bfd_vma insn;
8704 bfd_signed_vma relocation;
8705
8706 insn = bfd_get_16 (input_bfd, hit_data);
8707
8708 if (globals->use_rel)
8709 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
8710
8711 relocation = value + addend;
8712 relocation -= Pa (input_section->output_section->vma
8713 + input_section->output_offset
8714 + rel->r_offset);
8715
8716 value = abs (relocation);
8717
8718 /* We do not check for overflow of this reloc. Although strictly
8719 speaking this is incorrect, it appears to be necessary in order
8720 to work with IAR generated relocs. Since GCC and GAS do not
8721 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8722 a problem for them. */
8723 value &= 0x3fc;
8724
8725 insn = (insn & 0xff00) | (value >> 2);
8726
8727 bfd_put_16 (input_bfd, insn, hit_data);
8728
8729 return bfd_reloc_ok;
8730 }
8731
8732 case R_ARM_THM_PC12:
8733 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8734 {
8735 bfd_vma insn;
8736 bfd_signed_vma relocation;
8737
8738 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8739 | bfd_get_16 (input_bfd, hit_data + 2);
8740
8741 if (globals->use_rel)
8742 {
8743 signed_addend = insn & 0xfff;
8744 if (!(insn & (1 << 23)))
8745 signed_addend = -signed_addend;
8746 }
8747
8748 relocation = value + signed_addend;
8749 relocation -= Pa (input_section->output_section->vma
8750 + input_section->output_offset
8751 + rel->r_offset);
8752
8753 value = abs (relocation);
8754
8755 if (value >= 0x1000)
8756 return bfd_reloc_overflow;
8757
8758 insn = (insn & 0xff7ff000) | value;
8759 if (relocation >= 0)
8760 insn |= (1 << 23);
8761
8762 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8763 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8764
8765 return bfd_reloc_ok;
8766 }
8767
8768 case R_ARM_THM_XPC22:
8769 case R_ARM_THM_CALL:
8770 case R_ARM_THM_JUMP24:
8771 /* Thumb BL (branch long instruction). */
8772 {
8773 bfd_vma relocation;
8774 bfd_vma reloc_sign;
8775 bfd_boolean overflow = FALSE;
8776 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8777 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8778 bfd_signed_vma reloc_signed_max;
8779 bfd_signed_vma reloc_signed_min;
8780 bfd_vma check;
8781 bfd_signed_vma signed_check;
8782 int bitsize;
8783 const int thumb2 = using_thumb2 (globals);
8784
8785 /* A branch to an undefined weak symbol is turned into a jump to
8786 the next instruction unless a PLT entry will be created.
8787 The jump to the next instruction is optimized as a NOP.W for
8788 Thumb-2 enabled architectures. */
8789 if (h && h->root.type == bfd_link_hash_undefweak
8790 && plt_offset == (bfd_vma) -1)
8791 {
8792 if (arch_has_thumb2_nop (globals))
8793 {
8794 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8795 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8796 }
8797 else
8798 {
8799 bfd_put_16 (input_bfd, 0xe000, hit_data);
8800 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8801 }
8802 return bfd_reloc_ok;
8803 }
8804
8805 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8806 with Thumb-1) involving the J1 and J2 bits. */
8807 if (globals->use_rel)
8808 {
8809 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8810 bfd_vma upper = upper_insn & 0x3ff;
8811 bfd_vma lower = lower_insn & 0x7ff;
8812 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8813 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8814 bfd_vma i1 = j1 ^ s ? 0 : 1;
8815 bfd_vma i2 = j2 ^ s ? 0 : 1;
8816
8817 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8818 /* Sign extend. */
8819 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8820
8821 signed_addend = addend;
8822 }
8823
8824 if (r_type == R_ARM_THM_XPC22)
8825 {
8826 /* Check for Thumb to Thumb call. */
8827 /* FIXME: Should we translate the instruction into a BL
8828 instruction instead ? */
8829 if (branch_type == ST_BRANCH_TO_THUMB)
8830 (*_bfd_error_handler)
8831 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8832 input_bfd,
8833 h ? h->root.root.string : "(local)");
8834 }
8835 else
8836 {
8837 /* If it is not a call to Thumb, assume call to Arm.
8838 If it is a call relative to a section name, then it is not a
8839 function call at all, but rather a long jump. Calls through
8840 the PLT do not require stubs. */
8841 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8842 {
8843 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8844 {
8845 /* Convert BL to BLX. */
8846 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8847 }
8848 else if (( r_type != R_ARM_THM_CALL)
8849 && (r_type != R_ARM_THM_JUMP24))
8850 {
8851 if (elf32_thumb_to_arm_stub
8852 (info, sym_name, input_bfd, output_bfd, input_section,
8853 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8854 error_message))
8855 return bfd_reloc_ok;
8856 else
8857 return bfd_reloc_dangerous;
8858 }
8859 }
8860 else if (branch_type == ST_BRANCH_TO_THUMB
8861 && globals->use_blx
8862 && r_type == R_ARM_THM_CALL)
8863 {
8864 /* Make sure this is a BL. */
8865 lower_insn |= 0x1800;
8866 }
8867 }
8868
8869 enum elf32_arm_stub_type stub_type = arm_stub_none;
8870 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8871 {
8872 /* Check if a stub has to be inserted because the destination
8873 is too far. */
8874 struct elf32_arm_stub_hash_entry *stub_entry;
8875 struct elf32_arm_link_hash_entry *hash;
8876
8877 hash = (struct elf32_arm_link_hash_entry *) h;
8878
8879 stub_type = arm_type_of_stub (info, input_section, rel,
8880 st_type, &branch_type,
8881 hash, value, sym_sec,
8882 input_bfd, sym_name);
8883
8884 if (stub_type != arm_stub_none)
8885 {
8886 /* The target is out of reach or we are changing modes, so
8887 redirect the branch to the local stub for this
8888 function. */
8889 stub_entry = elf32_arm_get_stub_entry (input_section,
8890 sym_sec, h,
8891 rel, globals,
8892 stub_type);
8893 if (stub_entry != NULL)
8894 {
8895 value = (stub_entry->stub_offset
8896 + stub_entry->stub_sec->output_offset
8897 + stub_entry->stub_sec->output_section->vma);
8898
8899 if (plt_offset != (bfd_vma) -1)
8900 *unresolved_reloc_p = FALSE;
8901 }
8902
8903 /* If this call becomes a call to Arm, force BLX. */
8904 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8905 {
8906 if ((stub_entry
8907 && !arm_stub_is_thumb (stub_entry->stub_type))
8908 || branch_type != ST_BRANCH_TO_THUMB)
8909 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8910 }
8911 }
8912 }
8913
8914 /* Handle calls via the PLT. */
8915 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8916 {
8917 value = (splt->output_section->vma
8918 + splt->output_offset
8919 + plt_offset);
8920
8921 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8922 {
8923 /* If the Thumb BLX instruction is available, convert
8924 the BL to a BLX instruction to call the ARM-mode
8925 PLT entry. */
8926 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8927 branch_type = ST_BRANCH_TO_ARM;
8928 }
8929 else
8930 {
8931 /* Target the Thumb stub before the ARM PLT entry. */
8932 value -= PLT_THUMB_STUB_SIZE;
8933 branch_type = ST_BRANCH_TO_THUMB;
8934 }
8935 *unresolved_reloc_p = FALSE;
8936 }
8937
8938 relocation = value + signed_addend;
8939
8940 relocation -= (input_section->output_section->vma
8941 + input_section->output_offset
8942 + rel->r_offset);
8943
8944 check = relocation >> howto->rightshift;
8945
8946 /* If this is a signed value, the rightshift just dropped
8947 leading 1 bits (assuming twos complement). */
8948 if ((bfd_signed_vma) relocation >= 0)
8949 signed_check = check;
8950 else
8951 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8952
8953 /* Calculate the permissable maximum and minimum values for
8954 this relocation according to whether we're relocating for
8955 Thumb-2 or not. */
8956 bitsize = howto->bitsize;
8957 if (!thumb2)
8958 bitsize -= 2;
8959 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8960 reloc_signed_min = ~reloc_signed_max;
8961
8962 /* Assumes two's complement. */
8963 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8964 overflow = TRUE;
8965
8966 if ((lower_insn & 0x5000) == 0x4000)
8967 /* For a BLX instruction, make sure that the relocation is rounded up
8968 to a word boundary. This follows the semantics of the instruction
8969 which specifies that bit 1 of the target address will come from bit
8970 1 of the base address. */
8971 relocation = (relocation + 2) & ~ 3;
8972
8973 /* Put RELOCATION back into the insn. Assumes two's complement.
8974 We use the Thumb-2 encoding, which is safe even if dealing with
8975 a Thumb-1 instruction by virtue of our overflow check above. */
8976 reloc_sign = (signed_check < 0) ? 1 : 0;
8977 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8978 | ((relocation >> 12) & 0x3ff)
8979 | (reloc_sign << 10);
8980 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8981 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8982 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8983 | ((relocation >> 1) & 0x7ff);
8984
8985 /* Put the relocated value back in the object file: */
8986 bfd_put_16 (input_bfd, upper_insn, hit_data);
8987 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8988
8989 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8990 }
8991 break;
8992
8993 case R_ARM_THM_JUMP19:
8994 /* Thumb32 conditional branch instruction. */
8995 {
8996 bfd_vma relocation;
8997 bfd_boolean overflow = FALSE;
8998 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8999 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9000 bfd_signed_vma reloc_signed_max = 0xffffe;
9001 bfd_signed_vma reloc_signed_min = -0x100000;
9002 bfd_signed_vma signed_check;
9003
9004 /* Need to refetch the addend, reconstruct the top three bits,
9005 and squish the two 11 bit pieces together. */
9006 if (globals->use_rel)
9007 {
9008 bfd_vma S = (upper_insn & 0x0400) >> 10;
9009 bfd_vma upper = (upper_insn & 0x003f);
9010 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9011 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9012 bfd_vma lower = (lower_insn & 0x07ff);
9013
9014 upper |= J1 << 6;
9015 upper |= J2 << 7;
9016 upper |= (!S) << 8;
9017 upper -= 0x0100; /* Sign extend. */
9018
9019 addend = (upper << 12) | (lower << 1);
9020 signed_addend = addend;
9021 }
9022
9023 /* Handle calls via the PLT. */
9024 if (plt_offset != (bfd_vma) -1)
9025 {
9026 value = (splt->output_section->vma
9027 + splt->output_offset
9028 + plt_offset);
9029 /* Target the Thumb stub before the ARM PLT entry. */
9030 value -= PLT_THUMB_STUB_SIZE;
9031 *unresolved_reloc_p = FALSE;
9032 }
9033
9034 /* ??? Should handle interworking? GCC might someday try to
9035 use this for tail calls. */
9036
9037 relocation = value + signed_addend;
9038 relocation -= (input_section->output_section->vma
9039 + input_section->output_offset
9040 + rel->r_offset);
9041 signed_check = (bfd_signed_vma) relocation;
9042
9043 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9044 overflow = TRUE;
9045
9046 /* Put RELOCATION back into the insn. */
9047 {
9048 bfd_vma S = (relocation & 0x00100000) >> 20;
9049 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9050 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9051 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9052 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9053
9054 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9055 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9056 }
9057
9058 /* Put the relocated value back in the object file: */
9059 bfd_put_16 (input_bfd, upper_insn, hit_data);
9060 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9061
9062 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9063 }
9064
9065 case R_ARM_THM_JUMP11:
9066 case R_ARM_THM_JUMP8:
9067 case R_ARM_THM_JUMP6:
9068 /* Thumb B (branch) instruction). */
9069 {
9070 bfd_signed_vma relocation;
9071 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9072 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9073 bfd_signed_vma signed_check;
9074
9075 /* CZB cannot jump backward. */
9076 if (r_type == R_ARM_THM_JUMP6)
9077 reloc_signed_min = 0;
9078
9079 if (globals->use_rel)
9080 {
9081 /* Need to refetch addend. */
9082 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9083 if (addend & ((howto->src_mask + 1) >> 1))
9084 {
9085 signed_addend = -1;
9086 signed_addend &= ~ howto->src_mask;
9087 signed_addend |= addend;
9088 }
9089 else
9090 signed_addend = addend;
9091 /* The value in the insn has been right shifted. We need to
9092 undo this, so that we can perform the address calculation
9093 in terms of bytes. */
9094 signed_addend <<= howto->rightshift;
9095 }
9096 relocation = value + signed_addend;
9097
9098 relocation -= (input_section->output_section->vma
9099 + input_section->output_offset
9100 + rel->r_offset);
9101
9102 relocation >>= howto->rightshift;
9103 signed_check = relocation;
9104
9105 if (r_type == R_ARM_THM_JUMP6)
9106 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9107 else
9108 relocation &= howto->dst_mask;
9109 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9110
9111 bfd_put_16 (input_bfd, relocation, hit_data);
9112
9113 /* Assumes two's complement. */
9114 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9115 return bfd_reloc_overflow;
9116
9117 return bfd_reloc_ok;
9118 }
9119
9120 case R_ARM_ALU_PCREL7_0:
9121 case R_ARM_ALU_PCREL15_8:
9122 case R_ARM_ALU_PCREL23_15:
9123 {
9124 bfd_vma insn;
9125 bfd_vma relocation;
9126
9127 insn = bfd_get_32 (input_bfd, hit_data);
9128 if (globals->use_rel)
9129 {
9130 /* Extract the addend. */
9131 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9132 signed_addend = addend;
9133 }
9134 relocation = value + signed_addend;
9135
9136 relocation -= (input_section->output_section->vma
9137 + input_section->output_offset
9138 + rel->r_offset);
9139 insn = (insn & ~0xfff)
9140 | ((howto->bitpos << 7) & 0xf00)
9141 | ((relocation >> howto->bitpos) & 0xff);
9142 bfd_put_32 (input_bfd, value, hit_data);
9143 }
9144 return bfd_reloc_ok;
9145
9146 case R_ARM_GNU_VTINHERIT:
9147 case R_ARM_GNU_VTENTRY:
9148 return bfd_reloc_ok;
9149
9150 case R_ARM_GOTOFF32:
9151 /* Relocation is relative to the start of the
9152 global offset table. */
9153
9154 BFD_ASSERT (sgot != NULL);
9155 if (sgot == NULL)
9156 return bfd_reloc_notsupported;
9157
9158 /* If we are addressing a Thumb function, we need to adjust the
9159 address by one, so that attempts to call the function pointer will
9160 correctly interpret it as Thumb code. */
9161 if (branch_type == ST_BRANCH_TO_THUMB)
9162 value += 1;
9163
9164 /* Note that sgot->output_offset is not involved in this
9165 calculation. We always want the start of .got. If we
9166 define _GLOBAL_OFFSET_TABLE in a different way, as is
9167 permitted by the ABI, we might have to change this
9168 calculation. */
9169 value -= sgot->output_section->vma;
9170 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9171 contents, rel->r_offset, value,
9172 rel->r_addend);
9173
9174 case R_ARM_GOTPC:
9175 /* Use global offset table as symbol value. */
9176 BFD_ASSERT (sgot != NULL);
9177
9178 if (sgot == NULL)
9179 return bfd_reloc_notsupported;
9180
9181 *unresolved_reloc_p = FALSE;
9182 value = sgot->output_section->vma;
9183 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9184 contents, rel->r_offset, value,
9185 rel->r_addend);
9186
9187 case R_ARM_GOT32:
9188 case R_ARM_GOT_PREL:
9189 /* Relocation is to the entry for this symbol in the
9190 global offset table. */
9191 if (sgot == NULL)
9192 return bfd_reloc_notsupported;
9193
9194 if (dynreloc_st_type == STT_GNU_IFUNC
9195 && plt_offset != (bfd_vma) -1
9196 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9197 {
9198 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9199 symbol, and the relocation resolves directly to the runtime
9200 target rather than to the .iplt entry. This means that any
9201 .got entry would be the same value as the .igot.plt entry,
9202 so there's no point creating both. */
9203 sgot = globals->root.igotplt;
9204 value = sgot->output_offset + gotplt_offset;
9205 }
9206 else if (h != NULL)
9207 {
9208 bfd_vma off;
9209
9210 off = h->got.offset;
9211 BFD_ASSERT (off != (bfd_vma) -1);
9212 if ((off & 1) != 0)
9213 {
9214 /* We have already processsed one GOT relocation against
9215 this symbol. */
9216 off &= ~1;
9217 if (globals->root.dynamic_sections_created
9218 && !SYMBOL_REFERENCES_LOCAL (info, h))
9219 *unresolved_reloc_p = FALSE;
9220 }
9221 else
9222 {
9223 Elf_Internal_Rela outrel;
9224
9225 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
9226 {
9227 /* If the symbol doesn't resolve locally in a static
9228 object, we have an undefined reference. If the
9229 symbol doesn't resolve locally in a dynamic object,
9230 it should be resolved by the dynamic linker. */
9231 if (globals->root.dynamic_sections_created)
9232 {
9233 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9234 *unresolved_reloc_p = FALSE;
9235 }
9236 else
9237 outrel.r_info = 0;
9238 outrel.r_addend = 0;
9239 }
9240 else
9241 {
9242 if (dynreloc_st_type == STT_GNU_IFUNC)
9243 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9244 else if (info->shared &&
9245 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9246 || h->root.type != bfd_link_hash_undefweak))
9247 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9248 else
9249 outrel.r_info = 0;
9250 outrel.r_addend = dynreloc_value;
9251 }
9252
9253 /* The GOT entry is initialized to zero by default.
9254 See if we should install a different value. */
9255 if (outrel.r_addend != 0
9256 && (outrel.r_info == 0 || globals->use_rel))
9257 {
9258 bfd_put_32 (output_bfd, outrel.r_addend,
9259 sgot->contents + off);
9260 outrel.r_addend = 0;
9261 }
9262
9263 if (outrel.r_info != 0)
9264 {
9265 outrel.r_offset = (sgot->output_section->vma
9266 + sgot->output_offset
9267 + off);
9268 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9269 }
9270 h->got.offset |= 1;
9271 }
9272 value = sgot->output_offset + off;
9273 }
9274 else
9275 {
9276 bfd_vma off;
9277
9278 BFD_ASSERT (local_got_offsets != NULL &&
9279 local_got_offsets[r_symndx] != (bfd_vma) -1);
9280
9281 off = local_got_offsets[r_symndx];
9282
9283 /* The offset must always be a multiple of 4. We use the
9284 least significant bit to record whether we have already
9285 generated the necessary reloc. */
9286 if ((off & 1) != 0)
9287 off &= ~1;
9288 else
9289 {
9290 if (globals->use_rel)
9291 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9292
9293 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9294 {
9295 Elf_Internal_Rela outrel;
9296
9297 outrel.r_addend = addend + dynreloc_value;
9298 outrel.r_offset = (sgot->output_section->vma
9299 + sgot->output_offset
9300 + off);
9301 if (dynreloc_st_type == STT_GNU_IFUNC)
9302 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9303 else
9304 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9305 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9306 }
9307
9308 local_got_offsets[r_symndx] |= 1;
9309 }
9310
9311 value = sgot->output_offset + off;
9312 }
9313 if (r_type != R_ARM_GOT32)
9314 value += sgot->output_section->vma;
9315
9316 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9317 contents, rel->r_offset, value,
9318 rel->r_addend);
9319
9320 case R_ARM_TLS_LDO32:
9321 value = value - dtpoff_base (info);
9322
9323 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9324 contents, rel->r_offset, value,
9325 rel->r_addend);
9326
9327 case R_ARM_TLS_LDM32:
9328 {
9329 bfd_vma off;
9330
9331 if (sgot == NULL)
9332 abort ();
9333
9334 off = globals->tls_ldm_got.offset;
9335
9336 if ((off & 1) != 0)
9337 off &= ~1;
9338 else
9339 {
9340 /* If we don't know the module number, create a relocation
9341 for it. */
9342 if (info->shared)
9343 {
9344 Elf_Internal_Rela outrel;
9345
9346 if (srelgot == NULL)
9347 abort ();
9348
9349 outrel.r_addend = 0;
9350 outrel.r_offset = (sgot->output_section->vma
9351 + sgot->output_offset + off);
9352 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9353
9354 if (globals->use_rel)
9355 bfd_put_32 (output_bfd, outrel.r_addend,
9356 sgot->contents + off);
9357
9358 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9359 }
9360 else
9361 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9362
9363 globals->tls_ldm_got.offset |= 1;
9364 }
9365
9366 value = sgot->output_section->vma + sgot->output_offset + off
9367 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9368
9369 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9370 contents, rel->r_offset, value,
9371 rel->r_addend);
9372 }
9373
9374 case R_ARM_TLS_CALL:
9375 case R_ARM_THM_TLS_CALL:
9376 case R_ARM_TLS_GD32:
9377 case R_ARM_TLS_IE32:
9378 case R_ARM_TLS_GOTDESC:
9379 case R_ARM_TLS_DESCSEQ:
9380 case R_ARM_THM_TLS_DESCSEQ:
9381 {
9382 bfd_vma off, offplt;
9383 int indx = 0;
9384 char tls_type;
9385
9386 BFD_ASSERT (sgot != NULL);
9387
9388 if (h != NULL)
9389 {
9390 bfd_boolean dyn;
9391 dyn = globals->root.dynamic_sections_created;
9392 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9393 && (!info->shared
9394 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9395 {
9396 *unresolved_reloc_p = FALSE;
9397 indx = h->dynindx;
9398 }
9399 off = h->got.offset;
9400 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9401 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9402 }
9403 else
9404 {
9405 BFD_ASSERT (local_got_offsets != NULL);
9406 off = local_got_offsets[r_symndx];
9407 offplt = local_tlsdesc_gotents[r_symndx];
9408 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9409 }
9410
9411 /* Linker relaxations happens from one of the
9412 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9413 if (ELF32_R_TYPE(rel->r_info) != r_type)
9414 tls_type = GOT_TLS_IE;
9415
9416 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9417
9418 if ((off & 1) != 0)
9419 off &= ~1;
9420 else
9421 {
9422 bfd_boolean need_relocs = FALSE;
9423 Elf_Internal_Rela outrel;
9424 int cur_off = off;
9425
9426 /* The GOT entries have not been initialized yet. Do it
9427 now, and emit any relocations. If both an IE GOT and a
9428 GD GOT are necessary, we emit the GD first. */
9429
9430 if ((info->shared || indx != 0)
9431 && (h == NULL
9432 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9433 || h->root.type != bfd_link_hash_undefweak))
9434 {
9435 need_relocs = TRUE;
9436 BFD_ASSERT (srelgot != NULL);
9437 }
9438
9439 if (tls_type & GOT_TLS_GDESC)
9440 {
9441 bfd_byte *loc;
9442
9443 /* We should have relaxed, unless this is an undefined
9444 weak symbol. */
9445 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9446 || info->shared);
9447 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9448 <= globals->root.sgotplt->size);
9449
9450 outrel.r_addend = 0;
9451 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9452 + globals->root.sgotplt->output_offset
9453 + offplt
9454 + globals->sgotplt_jump_table_size);
9455
9456 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9457 sreloc = globals->root.srelplt;
9458 loc = sreloc->contents;
9459 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9460 BFD_ASSERT (loc + RELOC_SIZE (globals)
9461 <= sreloc->contents + sreloc->size);
9462
9463 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9464
9465 /* For globals, the first word in the relocation gets
9466 the relocation index and the top bit set, or zero,
9467 if we're binding now. For locals, it gets the
9468 symbol's offset in the tls section. */
9469 bfd_put_32 (output_bfd,
9470 !h ? value - elf_hash_table (info)->tls_sec->vma
9471 : info->flags & DF_BIND_NOW ? 0
9472 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9473 globals->root.sgotplt->contents + offplt
9474 + globals->sgotplt_jump_table_size);
9475
9476 /* Second word in the relocation is always zero. */
9477 bfd_put_32 (output_bfd, 0,
9478 globals->root.sgotplt->contents + offplt
9479 + globals->sgotplt_jump_table_size + 4);
9480 }
9481 if (tls_type & GOT_TLS_GD)
9482 {
9483 if (need_relocs)
9484 {
9485 outrel.r_addend = 0;
9486 outrel.r_offset = (sgot->output_section->vma
9487 + sgot->output_offset
9488 + cur_off);
9489 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9490
9491 if (globals->use_rel)
9492 bfd_put_32 (output_bfd, outrel.r_addend,
9493 sgot->contents + cur_off);
9494
9495 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9496
9497 if (indx == 0)
9498 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9499 sgot->contents + cur_off + 4);
9500 else
9501 {
9502 outrel.r_addend = 0;
9503 outrel.r_info = ELF32_R_INFO (indx,
9504 R_ARM_TLS_DTPOFF32);
9505 outrel.r_offset += 4;
9506
9507 if (globals->use_rel)
9508 bfd_put_32 (output_bfd, outrel.r_addend,
9509 sgot->contents + cur_off + 4);
9510
9511 elf32_arm_add_dynreloc (output_bfd, info,
9512 srelgot, &outrel);
9513 }
9514 }
9515 else
9516 {
9517 /* If we are not emitting relocations for a
9518 general dynamic reference, then we must be in a
9519 static link or an executable link with the
9520 symbol binding locally. Mark it as belonging
9521 to module 1, the executable. */
9522 bfd_put_32 (output_bfd, 1,
9523 sgot->contents + cur_off);
9524 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9525 sgot->contents + cur_off + 4);
9526 }
9527
9528 cur_off += 8;
9529 }
9530
9531 if (tls_type & GOT_TLS_IE)
9532 {
9533 if (need_relocs)
9534 {
9535 if (indx == 0)
9536 outrel.r_addend = value - dtpoff_base (info);
9537 else
9538 outrel.r_addend = 0;
9539 outrel.r_offset = (sgot->output_section->vma
9540 + sgot->output_offset
9541 + cur_off);
9542 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9543
9544 if (globals->use_rel)
9545 bfd_put_32 (output_bfd, outrel.r_addend,
9546 sgot->contents + cur_off);
9547
9548 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9549 }
9550 else
9551 bfd_put_32 (output_bfd, tpoff (info, value),
9552 sgot->contents + cur_off);
9553 cur_off += 4;
9554 }
9555
9556 if (h != NULL)
9557 h->got.offset |= 1;
9558 else
9559 local_got_offsets[r_symndx] |= 1;
9560 }
9561
9562 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9563 off += 8;
9564 else if (tls_type & GOT_TLS_GDESC)
9565 off = offplt;
9566
9567 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9568 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9569 {
9570 bfd_signed_vma offset;
9571 /* TLS stubs are arm mode. The original symbol is a
9572 data object, so branch_type is bogus. */
9573 branch_type = ST_BRANCH_TO_ARM;
9574 enum elf32_arm_stub_type stub_type
9575 = arm_type_of_stub (info, input_section, rel,
9576 st_type, &branch_type,
9577 (struct elf32_arm_link_hash_entry *)h,
9578 globals->tls_trampoline, globals->root.splt,
9579 input_bfd, sym_name);
9580
9581 if (stub_type != arm_stub_none)
9582 {
9583 struct elf32_arm_stub_hash_entry *stub_entry
9584 = elf32_arm_get_stub_entry
9585 (input_section, globals->root.splt, 0, rel,
9586 globals, stub_type);
9587 offset = (stub_entry->stub_offset
9588 + stub_entry->stub_sec->output_offset
9589 + stub_entry->stub_sec->output_section->vma);
9590 }
9591 else
9592 offset = (globals->root.splt->output_section->vma
9593 + globals->root.splt->output_offset
9594 + globals->tls_trampoline);
9595
9596 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9597 {
9598 unsigned long inst;
9599
9600 offset -= (input_section->output_section->vma
9601 + input_section->output_offset
9602 + rel->r_offset + 8);
9603
9604 inst = offset >> 2;
9605 inst &= 0x00ffffff;
9606 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9607 }
9608 else
9609 {
9610 /* Thumb blx encodes the offset in a complicated
9611 fashion. */
9612 unsigned upper_insn, lower_insn;
9613 unsigned neg;
9614
9615 offset -= (input_section->output_section->vma
9616 + input_section->output_offset
9617 + rel->r_offset + 4);
9618
9619 if (stub_type != arm_stub_none
9620 && arm_stub_is_thumb (stub_type))
9621 {
9622 lower_insn = 0xd000;
9623 }
9624 else
9625 {
9626 lower_insn = 0xc000;
9627 /* Round up the offset to a word boundary */
9628 offset = (offset + 2) & ~2;
9629 }
9630
9631 neg = offset < 0;
9632 upper_insn = (0xf000
9633 | ((offset >> 12) & 0x3ff)
9634 | (neg << 10));
9635 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9636 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9637 | ((offset >> 1) & 0x7ff);
9638 bfd_put_16 (input_bfd, upper_insn, hit_data);
9639 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9640 return bfd_reloc_ok;
9641 }
9642 }
9643 /* These relocations needs special care, as besides the fact
9644 they point somewhere in .gotplt, the addend must be
9645 adjusted accordingly depending on the type of instruction
9646 we refer to */
9647 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9648 {
9649 unsigned long data, insn;
9650 unsigned thumb;
9651
9652 data = bfd_get_32 (input_bfd, hit_data);
9653 thumb = data & 1;
9654 data &= ~1u;
9655
9656 if (thumb)
9657 {
9658 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9659 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9660 insn = (insn << 16)
9661 | bfd_get_16 (input_bfd,
9662 contents + rel->r_offset - data + 2);
9663 if ((insn & 0xf800c000) == 0xf000c000)
9664 /* bl/blx */
9665 value = -6;
9666 else if ((insn & 0xffffff00) == 0x4400)
9667 /* add */
9668 value = -5;
9669 else
9670 {
9671 (*_bfd_error_handler)
9672 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9673 input_bfd, input_section,
9674 (unsigned long)rel->r_offset, insn);
9675 return bfd_reloc_notsupported;
9676 }
9677 }
9678 else
9679 {
9680 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9681
9682 switch (insn >> 24)
9683 {
9684 case 0xeb: /* bl */
9685 case 0xfa: /* blx */
9686 value = -4;
9687 break;
9688
9689 case 0xe0: /* add */
9690 value = -8;
9691 break;
9692
9693 default:
9694 (*_bfd_error_handler)
9695 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9696 input_bfd, input_section,
9697 (unsigned long)rel->r_offset, insn);
9698 return bfd_reloc_notsupported;
9699 }
9700 }
9701
9702 value += ((globals->root.sgotplt->output_section->vma
9703 + globals->root.sgotplt->output_offset + off)
9704 - (input_section->output_section->vma
9705 + input_section->output_offset
9706 + rel->r_offset)
9707 + globals->sgotplt_jump_table_size);
9708 }
9709 else
9710 value = ((globals->root.sgot->output_section->vma
9711 + globals->root.sgot->output_offset + off)
9712 - (input_section->output_section->vma
9713 + input_section->output_offset + rel->r_offset));
9714
9715 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9716 contents, rel->r_offset, value,
9717 rel->r_addend);
9718 }
9719
9720 case R_ARM_TLS_LE32:
9721 if (info->shared && !info->pie)
9722 {
9723 (*_bfd_error_handler)
9724 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9725 input_bfd, input_section,
9726 (long) rel->r_offset, howto->name);
9727 return bfd_reloc_notsupported;
9728 }
9729 else
9730 value = tpoff (info, value);
9731
9732 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9733 contents, rel->r_offset, value,
9734 rel->r_addend);
9735
9736 case R_ARM_V4BX:
9737 if (globals->fix_v4bx)
9738 {
9739 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9740
9741 /* Ensure that we have a BX instruction. */
9742 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9743
9744 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9745 {
9746 /* Branch to veneer. */
9747 bfd_vma glue_addr;
9748 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9749 glue_addr -= input_section->output_section->vma
9750 + input_section->output_offset
9751 + rel->r_offset + 8;
9752 insn = (insn & 0xf0000000) | 0x0a000000
9753 | ((glue_addr >> 2) & 0x00ffffff);
9754 }
9755 else
9756 {
9757 /* Preserve Rm (lowest four bits) and the condition code
9758 (highest four bits). Other bits encode MOV PC,Rm. */
9759 insn = (insn & 0xf000000f) | 0x01a0f000;
9760 }
9761
9762 bfd_put_32 (input_bfd, insn, hit_data);
9763 }
9764 return bfd_reloc_ok;
9765
9766 case R_ARM_MOVW_ABS_NC:
9767 case R_ARM_MOVT_ABS:
9768 case R_ARM_MOVW_PREL_NC:
9769 case R_ARM_MOVT_PREL:
9770 /* Until we properly support segment-base-relative addressing then
9771 we assume the segment base to be zero, as for the group relocations.
9772 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9773 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9774 case R_ARM_MOVW_BREL_NC:
9775 case R_ARM_MOVW_BREL:
9776 case R_ARM_MOVT_BREL:
9777 {
9778 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9779
9780 if (globals->use_rel)
9781 {
9782 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9783 signed_addend = (addend ^ 0x8000) - 0x8000;
9784 }
9785
9786 value += signed_addend;
9787
9788 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9789 value -= (input_section->output_section->vma
9790 + input_section->output_offset + rel->r_offset);
9791
9792 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9793 return bfd_reloc_overflow;
9794
9795 if (branch_type == ST_BRANCH_TO_THUMB)
9796 value |= 1;
9797
9798 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9799 || r_type == R_ARM_MOVT_BREL)
9800 value >>= 16;
9801
9802 insn &= 0xfff0f000;
9803 insn |= value & 0xfff;
9804 insn |= (value & 0xf000) << 4;
9805 bfd_put_32 (input_bfd, insn, hit_data);
9806 }
9807 return bfd_reloc_ok;
9808
9809 case R_ARM_THM_MOVW_ABS_NC:
9810 case R_ARM_THM_MOVT_ABS:
9811 case R_ARM_THM_MOVW_PREL_NC:
9812 case R_ARM_THM_MOVT_PREL:
9813 /* Until we properly support segment-base-relative addressing then
9814 we assume the segment base to be zero, as for the above relocations.
9815 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9816 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9817 as R_ARM_THM_MOVT_ABS. */
9818 case R_ARM_THM_MOVW_BREL_NC:
9819 case R_ARM_THM_MOVW_BREL:
9820 case R_ARM_THM_MOVT_BREL:
9821 {
9822 bfd_vma insn;
9823
9824 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9825 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9826
9827 if (globals->use_rel)
9828 {
9829 addend = ((insn >> 4) & 0xf000)
9830 | ((insn >> 15) & 0x0800)
9831 | ((insn >> 4) & 0x0700)
9832 | (insn & 0x00ff);
9833 signed_addend = (addend ^ 0x8000) - 0x8000;
9834 }
9835
9836 value += signed_addend;
9837
9838 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9839 value -= (input_section->output_section->vma
9840 + input_section->output_offset + rel->r_offset);
9841
9842 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9843 return bfd_reloc_overflow;
9844
9845 if (branch_type == ST_BRANCH_TO_THUMB)
9846 value |= 1;
9847
9848 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9849 || r_type == R_ARM_THM_MOVT_BREL)
9850 value >>= 16;
9851
9852 insn &= 0xfbf08f00;
9853 insn |= (value & 0xf000) << 4;
9854 insn |= (value & 0x0800) << 15;
9855 insn |= (value & 0x0700) << 4;
9856 insn |= (value & 0x00ff);
9857
9858 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9859 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9860 }
9861 return bfd_reloc_ok;
9862
9863 case R_ARM_ALU_PC_G0_NC:
9864 case R_ARM_ALU_PC_G1_NC:
9865 case R_ARM_ALU_PC_G0:
9866 case R_ARM_ALU_PC_G1:
9867 case R_ARM_ALU_PC_G2:
9868 case R_ARM_ALU_SB_G0_NC:
9869 case R_ARM_ALU_SB_G1_NC:
9870 case R_ARM_ALU_SB_G0:
9871 case R_ARM_ALU_SB_G1:
9872 case R_ARM_ALU_SB_G2:
9873 {
9874 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9875 bfd_vma pc = input_section->output_section->vma
9876 + input_section->output_offset + rel->r_offset;
9877 /* sb is the origin of the *segment* containing the symbol. */
9878 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
9879 bfd_vma residual;
9880 bfd_vma g_n;
9881 bfd_signed_vma signed_value;
9882 int group = 0;
9883
9884 /* Determine which group of bits to select. */
9885 switch (r_type)
9886 {
9887 case R_ARM_ALU_PC_G0_NC:
9888 case R_ARM_ALU_PC_G0:
9889 case R_ARM_ALU_SB_G0_NC:
9890 case R_ARM_ALU_SB_G0:
9891 group = 0;
9892 break;
9893
9894 case R_ARM_ALU_PC_G1_NC:
9895 case R_ARM_ALU_PC_G1:
9896 case R_ARM_ALU_SB_G1_NC:
9897 case R_ARM_ALU_SB_G1:
9898 group = 1;
9899 break;
9900
9901 case R_ARM_ALU_PC_G2:
9902 case R_ARM_ALU_SB_G2:
9903 group = 2;
9904 break;
9905
9906 default:
9907 abort ();
9908 }
9909
9910 /* If REL, extract the addend from the insn. If RELA, it will
9911 have already been fetched for us. */
9912 if (globals->use_rel)
9913 {
9914 int negative;
9915 bfd_vma constant = insn & 0xff;
9916 bfd_vma rotation = (insn & 0xf00) >> 8;
9917
9918 if (rotation == 0)
9919 signed_addend = constant;
9920 else
9921 {
9922 /* Compensate for the fact that in the instruction, the
9923 rotation is stored in multiples of 2 bits. */
9924 rotation *= 2;
9925
9926 /* Rotate "constant" right by "rotation" bits. */
9927 signed_addend = (constant >> rotation) |
9928 (constant << (8 * sizeof (bfd_vma) - rotation));
9929 }
9930
9931 /* Determine if the instruction is an ADD or a SUB.
9932 (For REL, this determines the sign of the addend.) */
9933 negative = identify_add_or_sub (insn);
9934 if (negative == 0)
9935 {
9936 (*_bfd_error_handler)
9937 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9938 input_bfd, input_section,
9939 (long) rel->r_offset, howto->name);
9940 return bfd_reloc_overflow;
9941 }
9942
9943 signed_addend *= negative;
9944 }
9945
9946 /* Compute the value (X) to go in the place. */
9947 if (r_type == R_ARM_ALU_PC_G0_NC
9948 || r_type == R_ARM_ALU_PC_G1_NC
9949 || r_type == R_ARM_ALU_PC_G0
9950 || r_type == R_ARM_ALU_PC_G1
9951 || r_type == R_ARM_ALU_PC_G2)
9952 /* PC relative. */
9953 signed_value = value - pc + signed_addend;
9954 else
9955 /* Section base relative. */
9956 signed_value = value - sb + signed_addend;
9957
9958 /* If the target symbol is a Thumb function, then set the
9959 Thumb bit in the address. */
9960 if (branch_type == ST_BRANCH_TO_THUMB)
9961 signed_value |= 1;
9962
9963 /* Calculate the value of the relevant G_n, in encoded
9964 constant-with-rotation format. */
9965 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9966 &residual);
9967
9968 /* Check for overflow if required. */
9969 if ((r_type == R_ARM_ALU_PC_G0
9970 || r_type == R_ARM_ALU_PC_G1
9971 || r_type == R_ARM_ALU_PC_G2
9972 || r_type == R_ARM_ALU_SB_G0
9973 || r_type == R_ARM_ALU_SB_G1
9974 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9975 {
9976 (*_bfd_error_handler)
9977 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9978 input_bfd, input_section,
9979 (long) rel->r_offset, abs (signed_value), howto->name);
9980 return bfd_reloc_overflow;
9981 }
9982
9983 /* Mask out the value and the ADD/SUB part of the opcode; take care
9984 not to destroy the S bit. */
9985 insn &= 0xff1ff000;
9986
9987 /* Set the opcode according to whether the value to go in the
9988 place is negative. */
9989 if (signed_value < 0)
9990 insn |= 1 << 22;
9991 else
9992 insn |= 1 << 23;
9993
9994 /* Encode the offset. */
9995 insn |= g_n;
9996
9997 bfd_put_32 (input_bfd, insn, hit_data);
9998 }
9999 return bfd_reloc_ok;
10000
10001 case R_ARM_LDR_PC_G0:
10002 case R_ARM_LDR_PC_G1:
10003 case R_ARM_LDR_PC_G2:
10004 case R_ARM_LDR_SB_G0:
10005 case R_ARM_LDR_SB_G1:
10006 case R_ARM_LDR_SB_G2:
10007 {
10008 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10009 bfd_vma pc = input_section->output_section->vma
10010 + input_section->output_offset + rel->r_offset;
10011 /* sb is the origin of the *segment* containing the symbol. */
10012 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10013 bfd_vma residual;
10014 bfd_signed_vma signed_value;
10015 int group = 0;
10016
10017 /* Determine which groups of bits to calculate. */
10018 switch (r_type)
10019 {
10020 case R_ARM_LDR_PC_G0:
10021 case R_ARM_LDR_SB_G0:
10022 group = 0;
10023 break;
10024
10025 case R_ARM_LDR_PC_G1:
10026 case R_ARM_LDR_SB_G1:
10027 group = 1;
10028 break;
10029
10030 case R_ARM_LDR_PC_G2:
10031 case R_ARM_LDR_SB_G2:
10032 group = 2;
10033 break;
10034
10035 default:
10036 abort ();
10037 }
10038
10039 /* If REL, extract the addend from the insn. If RELA, it will
10040 have already been fetched for us. */
10041 if (globals->use_rel)
10042 {
10043 int negative = (insn & (1 << 23)) ? 1 : -1;
10044 signed_addend = negative * (insn & 0xfff);
10045 }
10046
10047 /* Compute the value (X) to go in the place. */
10048 if (r_type == R_ARM_LDR_PC_G0
10049 || r_type == R_ARM_LDR_PC_G1
10050 || r_type == R_ARM_LDR_PC_G2)
10051 /* PC relative. */
10052 signed_value = value - pc + signed_addend;
10053 else
10054 /* Section base relative. */
10055 signed_value = value - sb + signed_addend;
10056
10057 /* Calculate the value of the relevant G_{n-1} to obtain
10058 the residual at that stage. */
10059 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10060
10061 /* Check for overflow. */
10062 if (residual >= 0x1000)
10063 {
10064 (*_bfd_error_handler)
10065 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10066 input_bfd, input_section,
10067 (long) rel->r_offset, abs (signed_value), howto->name);
10068 return bfd_reloc_overflow;
10069 }
10070
10071 /* Mask out the value and U bit. */
10072 insn &= 0xff7ff000;
10073
10074 /* Set the U bit if the value to go in the place is non-negative. */
10075 if (signed_value >= 0)
10076 insn |= 1 << 23;
10077
10078 /* Encode the offset. */
10079 insn |= residual;
10080
10081 bfd_put_32 (input_bfd, insn, hit_data);
10082 }
10083 return bfd_reloc_ok;
10084
10085 case R_ARM_LDRS_PC_G0:
10086 case R_ARM_LDRS_PC_G1:
10087 case R_ARM_LDRS_PC_G2:
10088 case R_ARM_LDRS_SB_G0:
10089 case R_ARM_LDRS_SB_G1:
10090 case R_ARM_LDRS_SB_G2:
10091 {
10092 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10093 bfd_vma pc = input_section->output_section->vma
10094 + input_section->output_offset + rel->r_offset;
10095 /* sb is the origin of the *segment* containing the symbol. */
10096 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10097 bfd_vma residual;
10098 bfd_signed_vma signed_value;
10099 int group = 0;
10100
10101 /* Determine which groups of bits to calculate. */
10102 switch (r_type)
10103 {
10104 case R_ARM_LDRS_PC_G0:
10105 case R_ARM_LDRS_SB_G0:
10106 group = 0;
10107 break;
10108
10109 case R_ARM_LDRS_PC_G1:
10110 case R_ARM_LDRS_SB_G1:
10111 group = 1;
10112 break;
10113
10114 case R_ARM_LDRS_PC_G2:
10115 case R_ARM_LDRS_SB_G2:
10116 group = 2;
10117 break;
10118
10119 default:
10120 abort ();
10121 }
10122
10123 /* If REL, extract the addend from the insn. If RELA, it will
10124 have already been fetched for us. */
10125 if (globals->use_rel)
10126 {
10127 int negative = (insn & (1 << 23)) ? 1 : -1;
10128 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10129 }
10130
10131 /* Compute the value (X) to go in the place. */
10132 if (r_type == R_ARM_LDRS_PC_G0
10133 || r_type == R_ARM_LDRS_PC_G1
10134 || r_type == R_ARM_LDRS_PC_G2)
10135 /* PC relative. */
10136 signed_value = value - pc + signed_addend;
10137 else
10138 /* Section base relative. */
10139 signed_value = value - sb + signed_addend;
10140
10141 /* Calculate the value of the relevant G_{n-1} to obtain
10142 the residual at that stage. */
10143 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10144
10145 /* Check for overflow. */
10146 if (residual >= 0x100)
10147 {
10148 (*_bfd_error_handler)
10149 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10150 input_bfd, input_section,
10151 (long) rel->r_offset, abs (signed_value), howto->name);
10152 return bfd_reloc_overflow;
10153 }
10154
10155 /* Mask out the value and U bit. */
10156 insn &= 0xff7ff0f0;
10157
10158 /* Set the U bit if the value to go in the place is non-negative. */
10159 if (signed_value >= 0)
10160 insn |= 1 << 23;
10161
10162 /* Encode the offset. */
10163 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10164
10165 bfd_put_32 (input_bfd, insn, hit_data);
10166 }
10167 return bfd_reloc_ok;
10168
10169 case R_ARM_LDC_PC_G0:
10170 case R_ARM_LDC_PC_G1:
10171 case R_ARM_LDC_PC_G2:
10172 case R_ARM_LDC_SB_G0:
10173 case R_ARM_LDC_SB_G1:
10174 case R_ARM_LDC_SB_G2:
10175 {
10176 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10177 bfd_vma pc = input_section->output_section->vma
10178 + input_section->output_offset + rel->r_offset;
10179 /* sb is the origin of the *segment* containing the symbol. */
10180 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10181 bfd_vma residual;
10182 bfd_signed_vma signed_value;
10183 int group = 0;
10184
10185 /* Determine which groups of bits to calculate. */
10186 switch (r_type)
10187 {
10188 case R_ARM_LDC_PC_G0:
10189 case R_ARM_LDC_SB_G0:
10190 group = 0;
10191 break;
10192
10193 case R_ARM_LDC_PC_G1:
10194 case R_ARM_LDC_SB_G1:
10195 group = 1;
10196 break;
10197
10198 case R_ARM_LDC_PC_G2:
10199 case R_ARM_LDC_SB_G2:
10200 group = 2;
10201 break;
10202
10203 default:
10204 abort ();
10205 }
10206
10207 /* If REL, extract the addend from the insn. If RELA, it will
10208 have already been fetched for us. */
10209 if (globals->use_rel)
10210 {
10211 int negative = (insn & (1 << 23)) ? 1 : -1;
10212 signed_addend = negative * ((insn & 0xff) << 2);
10213 }
10214
10215 /* Compute the value (X) to go in the place. */
10216 if (r_type == R_ARM_LDC_PC_G0
10217 || r_type == R_ARM_LDC_PC_G1
10218 || r_type == R_ARM_LDC_PC_G2)
10219 /* PC relative. */
10220 signed_value = value - pc + signed_addend;
10221 else
10222 /* Section base relative. */
10223 signed_value = value - sb + signed_addend;
10224
10225 /* Calculate the value of the relevant G_{n-1} to obtain
10226 the residual at that stage. */
10227 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10228
10229 /* Check for overflow. (The absolute value to go in the place must be
10230 divisible by four and, after having been divided by four, must
10231 fit in eight bits.) */
10232 if ((residual & 0x3) != 0 || residual >= 0x400)
10233 {
10234 (*_bfd_error_handler)
10235 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10236 input_bfd, input_section,
10237 (long) rel->r_offset, abs (signed_value), howto->name);
10238 return bfd_reloc_overflow;
10239 }
10240
10241 /* Mask out the value and U bit. */
10242 insn &= 0xff7fff00;
10243
10244 /* Set the U bit if the value to go in the place is non-negative. */
10245 if (signed_value >= 0)
10246 insn |= 1 << 23;
10247
10248 /* Encode the offset. */
10249 insn |= residual >> 2;
10250
10251 bfd_put_32 (input_bfd, insn, hit_data);
10252 }
10253 return bfd_reloc_ok;
10254
10255 default:
10256 return bfd_reloc_notsupported;
10257 }
10258 }
10259
10260 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10261 static void
10262 arm_add_to_rel (bfd * abfd,
10263 bfd_byte * address,
10264 reloc_howto_type * howto,
10265 bfd_signed_vma increment)
10266 {
10267 bfd_signed_vma addend;
10268
10269 if (howto->type == R_ARM_THM_CALL
10270 || howto->type == R_ARM_THM_JUMP24)
10271 {
10272 int upper_insn, lower_insn;
10273 int upper, lower;
10274
10275 upper_insn = bfd_get_16 (abfd, address);
10276 lower_insn = bfd_get_16 (abfd, address + 2);
10277 upper = upper_insn & 0x7ff;
10278 lower = lower_insn & 0x7ff;
10279
10280 addend = (upper << 12) | (lower << 1);
10281 addend += increment;
10282 addend >>= 1;
10283
10284 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10285 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10286
10287 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10288 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10289 }
10290 else
10291 {
10292 bfd_vma contents;
10293
10294 contents = bfd_get_32 (abfd, address);
10295
10296 /* Get the (signed) value from the instruction. */
10297 addend = contents & howto->src_mask;
10298 if (addend & ((howto->src_mask + 1) >> 1))
10299 {
10300 bfd_signed_vma mask;
10301
10302 mask = -1;
10303 mask &= ~ howto->src_mask;
10304 addend |= mask;
10305 }
10306
10307 /* Add in the increment, (which is a byte value). */
10308 switch (howto->type)
10309 {
10310 default:
10311 addend += increment;
10312 break;
10313
10314 case R_ARM_PC24:
10315 case R_ARM_PLT32:
10316 case R_ARM_CALL:
10317 case R_ARM_JUMP24:
10318 addend <<= howto->size;
10319 addend += increment;
10320
10321 /* Should we check for overflow here ? */
10322
10323 /* Drop any undesired bits. */
10324 addend >>= howto->rightshift;
10325 break;
10326 }
10327
10328 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10329
10330 bfd_put_32 (abfd, contents, address);
10331 }
10332 }
10333
10334 #define IS_ARM_TLS_RELOC(R_TYPE) \
10335 ((R_TYPE) == R_ARM_TLS_GD32 \
10336 || (R_TYPE) == R_ARM_TLS_LDO32 \
10337 || (R_TYPE) == R_ARM_TLS_LDM32 \
10338 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10339 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10340 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10341 || (R_TYPE) == R_ARM_TLS_LE32 \
10342 || (R_TYPE) == R_ARM_TLS_IE32 \
10343 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10344
10345 /* Specific set of relocations for the gnu tls dialect. */
10346 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10347 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10348 || (R_TYPE) == R_ARM_TLS_CALL \
10349 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10350 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10351 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10352
10353 /* Relocate an ARM ELF section. */
10354
10355 static bfd_boolean
10356 elf32_arm_relocate_section (bfd * output_bfd,
10357 struct bfd_link_info * info,
10358 bfd * input_bfd,
10359 asection * input_section,
10360 bfd_byte * contents,
10361 Elf_Internal_Rela * relocs,
10362 Elf_Internal_Sym * local_syms,
10363 asection ** local_sections)
10364 {
10365 Elf_Internal_Shdr *symtab_hdr;
10366 struct elf_link_hash_entry **sym_hashes;
10367 Elf_Internal_Rela *rel;
10368 Elf_Internal_Rela *relend;
10369 const char *name;
10370 struct elf32_arm_link_hash_table * globals;
10371
10372 globals = elf32_arm_hash_table (info);
10373 if (globals == NULL)
10374 return FALSE;
10375
10376 symtab_hdr = & elf_symtab_hdr (input_bfd);
10377 sym_hashes = elf_sym_hashes (input_bfd);
10378
10379 rel = relocs;
10380 relend = relocs + input_section->reloc_count;
10381 for (; rel < relend; rel++)
10382 {
10383 int r_type;
10384 reloc_howto_type * howto;
10385 unsigned long r_symndx;
10386 Elf_Internal_Sym * sym;
10387 asection * sec;
10388 struct elf_link_hash_entry * h;
10389 bfd_vma relocation;
10390 bfd_reloc_status_type r;
10391 arelent bfd_reloc;
10392 char sym_type;
10393 bfd_boolean unresolved_reloc = FALSE;
10394 char *error_message = NULL;
10395
10396 r_symndx = ELF32_R_SYM (rel->r_info);
10397 r_type = ELF32_R_TYPE (rel->r_info);
10398 r_type = arm_real_reloc_type (globals, r_type);
10399
10400 if ( r_type == R_ARM_GNU_VTENTRY
10401 || r_type == R_ARM_GNU_VTINHERIT)
10402 continue;
10403
10404 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10405 howto = bfd_reloc.howto;
10406
10407 h = NULL;
10408 sym = NULL;
10409 sec = NULL;
10410
10411 if (r_symndx < symtab_hdr->sh_info)
10412 {
10413 sym = local_syms + r_symndx;
10414 sym_type = ELF32_ST_TYPE (sym->st_info);
10415 sec = local_sections[r_symndx];
10416
10417 /* An object file might have a reference to a local
10418 undefined symbol. This is a daft object file, but we
10419 should at least do something about it. V4BX & NONE
10420 relocations do not use the symbol and are explicitly
10421 allowed to use the undefined symbol, so allow those.
10422 Likewise for relocations against STN_UNDEF. */
10423 if (r_type != R_ARM_V4BX
10424 && r_type != R_ARM_NONE
10425 && r_symndx != STN_UNDEF
10426 && bfd_is_und_section (sec)
10427 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10428 {
10429 if (!info->callbacks->undefined_symbol
10430 (info, bfd_elf_string_from_elf_section
10431 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10432 input_bfd, input_section,
10433 rel->r_offset, TRUE))
10434 return FALSE;
10435 }
10436
10437 if (globals->use_rel)
10438 {
10439 relocation = (sec->output_section->vma
10440 + sec->output_offset
10441 + sym->st_value);
10442 if (!info->relocatable
10443 && (sec->flags & SEC_MERGE)
10444 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10445 {
10446 asection *msec;
10447 bfd_vma addend, value;
10448
10449 switch (r_type)
10450 {
10451 case R_ARM_MOVW_ABS_NC:
10452 case R_ARM_MOVT_ABS:
10453 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10454 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10455 addend = (addend ^ 0x8000) - 0x8000;
10456 break;
10457
10458 case R_ARM_THM_MOVW_ABS_NC:
10459 case R_ARM_THM_MOVT_ABS:
10460 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10461 << 16;
10462 value |= bfd_get_16 (input_bfd,
10463 contents + rel->r_offset + 2);
10464 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10465 | ((value & 0x04000000) >> 15);
10466 addend = (addend ^ 0x8000) - 0x8000;
10467 break;
10468
10469 default:
10470 if (howto->rightshift
10471 || (howto->src_mask & (howto->src_mask + 1)))
10472 {
10473 (*_bfd_error_handler)
10474 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10475 input_bfd, input_section,
10476 (long) rel->r_offset, howto->name);
10477 return FALSE;
10478 }
10479
10480 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10481
10482 /* Get the (signed) value from the instruction. */
10483 addend = value & howto->src_mask;
10484 if (addend & ((howto->src_mask + 1) >> 1))
10485 {
10486 bfd_signed_vma mask;
10487
10488 mask = -1;
10489 mask &= ~ howto->src_mask;
10490 addend |= mask;
10491 }
10492 break;
10493 }
10494
10495 msec = sec;
10496 addend =
10497 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10498 - relocation;
10499 addend += msec->output_section->vma + msec->output_offset;
10500
10501 /* Cases here must match those in the preceding
10502 switch statement. */
10503 switch (r_type)
10504 {
10505 case R_ARM_MOVW_ABS_NC:
10506 case R_ARM_MOVT_ABS:
10507 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10508 | (addend & 0xfff);
10509 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10510 break;
10511
10512 case R_ARM_THM_MOVW_ABS_NC:
10513 case R_ARM_THM_MOVT_ABS:
10514 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10515 | (addend & 0xff) | ((addend & 0x0800) << 15);
10516 bfd_put_16 (input_bfd, value >> 16,
10517 contents + rel->r_offset);
10518 bfd_put_16 (input_bfd, value,
10519 contents + rel->r_offset + 2);
10520 break;
10521
10522 default:
10523 value = (value & ~ howto->dst_mask)
10524 | (addend & howto->dst_mask);
10525 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10526 break;
10527 }
10528 }
10529 }
10530 else
10531 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10532 }
10533 else
10534 {
10535 bfd_boolean warned, ignored;
10536
10537 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10538 r_symndx, symtab_hdr, sym_hashes,
10539 h, sec, relocation,
10540 unresolved_reloc, warned, ignored);
10541
10542 sym_type = h->type;
10543 }
10544
10545 if (sec != NULL && discarded_section (sec))
10546 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10547 rel, 1, relend, howto, 0, contents);
10548
10549 if (info->relocatable)
10550 {
10551 /* This is a relocatable link. We don't have to change
10552 anything, unless the reloc is against a section symbol,
10553 in which case we have to adjust according to where the
10554 section symbol winds up in the output section. */
10555 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10556 {
10557 if (globals->use_rel)
10558 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10559 howto, (bfd_signed_vma) sec->output_offset);
10560 else
10561 rel->r_addend += sec->output_offset;
10562 }
10563 continue;
10564 }
10565
10566 if (h != NULL)
10567 name = h->root.root.string;
10568 else
10569 {
10570 name = (bfd_elf_string_from_elf_section
10571 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10572 if (name == NULL || *name == '\0')
10573 name = bfd_section_name (input_bfd, sec);
10574 }
10575
10576 if (r_symndx != STN_UNDEF
10577 && r_type != R_ARM_NONE
10578 && (h == NULL
10579 || h->root.type == bfd_link_hash_defined
10580 || h->root.type == bfd_link_hash_defweak)
10581 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10582 {
10583 (*_bfd_error_handler)
10584 ((sym_type == STT_TLS
10585 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10586 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10587 input_bfd,
10588 input_section,
10589 (long) rel->r_offset,
10590 howto->name,
10591 name);
10592 }
10593
10594 /* We call elf32_arm_final_link_relocate unless we're completely
10595 done, i.e., the relaxation produced the final output we want,
10596 and we won't let anybody mess with it. Also, we have to do
10597 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10598 both in relaxed and non-relaxed cases */
10599 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10600 || (IS_ARM_TLS_GNU_RELOC (r_type)
10601 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10602 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10603 & GOT_TLS_GDESC)))
10604 {
10605 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10606 contents, rel, h == NULL);
10607 /* This may have been marked unresolved because it came from
10608 a shared library. But we've just dealt with that. */
10609 unresolved_reloc = 0;
10610 }
10611 else
10612 r = bfd_reloc_continue;
10613
10614 if (r == bfd_reloc_continue)
10615 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10616 input_section, contents, rel,
10617 relocation, info, sec, name, sym_type,
10618 (h ? h->target_internal
10619 : ARM_SYM_BRANCH_TYPE (sym)), h,
10620 &unresolved_reloc, &error_message);
10621
10622 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10623 because such sections are not SEC_ALLOC and thus ld.so will
10624 not process them. */
10625 if (unresolved_reloc
10626 && !((input_section->flags & SEC_DEBUGGING) != 0
10627 && h->def_dynamic)
10628 && _bfd_elf_section_offset (output_bfd, info, input_section,
10629 rel->r_offset) != (bfd_vma) -1)
10630 {
10631 (*_bfd_error_handler)
10632 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10633 input_bfd,
10634 input_section,
10635 (long) rel->r_offset,
10636 howto->name,
10637 h->root.root.string);
10638 return FALSE;
10639 }
10640
10641 if (r != bfd_reloc_ok)
10642 {
10643 switch (r)
10644 {
10645 case bfd_reloc_overflow:
10646 /* If the overflowing reloc was to an undefined symbol,
10647 we have already printed one error message and there
10648 is no point complaining again. */
10649 if ((! h ||
10650 h->root.type != bfd_link_hash_undefined)
10651 && (!((*info->callbacks->reloc_overflow)
10652 (info, (h ? &h->root : NULL), name, howto->name,
10653 (bfd_vma) 0, input_bfd, input_section,
10654 rel->r_offset))))
10655 return FALSE;
10656 break;
10657
10658 case bfd_reloc_undefined:
10659 if (!((*info->callbacks->undefined_symbol)
10660 (info, name, input_bfd, input_section,
10661 rel->r_offset, TRUE)))
10662 return FALSE;
10663 break;
10664
10665 case bfd_reloc_outofrange:
10666 error_message = _("out of range");
10667 goto common_error;
10668
10669 case bfd_reloc_notsupported:
10670 error_message = _("unsupported relocation");
10671 goto common_error;
10672
10673 case bfd_reloc_dangerous:
10674 /* error_message should already be set. */
10675 goto common_error;
10676
10677 default:
10678 error_message = _("unknown error");
10679 /* Fall through. */
10680
10681 common_error:
10682 BFD_ASSERT (error_message != NULL);
10683 if (!((*info->callbacks->reloc_dangerous)
10684 (info, error_message, input_bfd, input_section,
10685 rel->r_offset)))
10686 return FALSE;
10687 break;
10688 }
10689 }
10690 }
10691
10692 return TRUE;
10693 }
10694
10695 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10696 adds the edit to the start of the list. (The list must be built in order of
10697 ascending TINDEX: the function's callers are primarily responsible for
10698 maintaining that condition). */
10699
10700 static void
10701 add_unwind_table_edit (arm_unwind_table_edit **head,
10702 arm_unwind_table_edit **tail,
10703 arm_unwind_edit_type type,
10704 asection *linked_section,
10705 unsigned int tindex)
10706 {
10707 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10708 xmalloc (sizeof (arm_unwind_table_edit));
10709
10710 new_edit->type = type;
10711 new_edit->linked_section = linked_section;
10712 new_edit->index = tindex;
10713
10714 if (tindex > 0)
10715 {
10716 new_edit->next = NULL;
10717
10718 if (*tail)
10719 (*tail)->next = new_edit;
10720
10721 (*tail) = new_edit;
10722
10723 if (!*head)
10724 (*head) = new_edit;
10725 }
10726 else
10727 {
10728 new_edit->next = *head;
10729
10730 if (!*tail)
10731 *tail = new_edit;
10732
10733 *head = new_edit;
10734 }
10735 }
10736
10737 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10738
10739 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10740 static void
10741 adjust_exidx_size(asection *exidx_sec, int adjust)
10742 {
10743 asection *out_sec;
10744
10745 if (!exidx_sec->rawsize)
10746 exidx_sec->rawsize = exidx_sec->size;
10747
10748 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10749 out_sec = exidx_sec->output_section;
10750 /* Adjust size of output section. */
10751 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10752 }
10753
10754 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10755 static void
10756 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10757 {
10758 struct _arm_elf_section_data *exidx_arm_data;
10759
10760 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10761 add_unwind_table_edit (
10762 &exidx_arm_data->u.exidx.unwind_edit_list,
10763 &exidx_arm_data->u.exidx.unwind_edit_tail,
10764 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10765
10766 adjust_exidx_size(exidx_sec, 8);
10767 }
10768
10769 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10770 made to those tables, such that:
10771
10772 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10773 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10774 codes which have been inlined into the index).
10775
10776 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10777
10778 The edits are applied when the tables are written
10779 (in elf32_arm_write_section). */
10780
10781 bfd_boolean
10782 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10783 unsigned int num_text_sections,
10784 struct bfd_link_info *info,
10785 bfd_boolean merge_exidx_entries)
10786 {
10787 bfd *inp;
10788 unsigned int last_second_word = 0, i;
10789 asection *last_exidx_sec = NULL;
10790 asection *last_text_sec = NULL;
10791 int last_unwind_type = -1;
10792
10793 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10794 text sections. */
10795 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10796 {
10797 asection *sec;
10798
10799 for (sec = inp->sections; sec != NULL; sec = sec->next)
10800 {
10801 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10802 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10803
10804 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10805 continue;
10806
10807 if (elf_sec->linked_to)
10808 {
10809 Elf_Internal_Shdr *linked_hdr
10810 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10811 struct _arm_elf_section_data *linked_sec_arm_data
10812 = get_arm_elf_section_data (linked_hdr->bfd_section);
10813
10814 if (linked_sec_arm_data == NULL)
10815 continue;
10816
10817 /* Link this .ARM.exidx section back from the text section it
10818 describes. */
10819 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10820 }
10821 }
10822 }
10823
10824 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10825 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10826 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10827
10828 for (i = 0; i < num_text_sections; i++)
10829 {
10830 asection *sec = text_section_order[i];
10831 asection *exidx_sec;
10832 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10833 struct _arm_elf_section_data *exidx_arm_data;
10834 bfd_byte *contents = NULL;
10835 int deleted_exidx_bytes = 0;
10836 bfd_vma j;
10837 arm_unwind_table_edit *unwind_edit_head = NULL;
10838 arm_unwind_table_edit *unwind_edit_tail = NULL;
10839 Elf_Internal_Shdr *hdr;
10840 bfd *ibfd;
10841
10842 if (arm_data == NULL)
10843 continue;
10844
10845 exidx_sec = arm_data->u.text.arm_exidx_sec;
10846 if (exidx_sec == NULL)
10847 {
10848 /* Section has no unwind data. */
10849 if (last_unwind_type == 0 || !last_exidx_sec)
10850 continue;
10851
10852 /* Ignore zero sized sections. */
10853 if (sec->size == 0)
10854 continue;
10855
10856 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10857 last_unwind_type = 0;
10858 continue;
10859 }
10860
10861 /* Skip /DISCARD/ sections. */
10862 if (bfd_is_abs_section (exidx_sec->output_section))
10863 continue;
10864
10865 hdr = &elf_section_data (exidx_sec)->this_hdr;
10866 if (hdr->sh_type != SHT_ARM_EXIDX)
10867 continue;
10868
10869 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10870 if (exidx_arm_data == NULL)
10871 continue;
10872
10873 ibfd = exidx_sec->owner;
10874
10875 if (hdr->contents != NULL)
10876 contents = hdr->contents;
10877 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10878 /* An error? */
10879 continue;
10880
10881 for (j = 0; j < hdr->sh_size; j += 8)
10882 {
10883 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10884 int unwind_type;
10885 int elide = 0;
10886
10887 /* An EXIDX_CANTUNWIND entry. */
10888 if (second_word == 1)
10889 {
10890 if (last_unwind_type == 0)
10891 elide = 1;
10892 unwind_type = 0;
10893 }
10894 /* Inlined unwinding data. Merge if equal to previous. */
10895 else if ((second_word & 0x80000000) != 0)
10896 {
10897 if (merge_exidx_entries
10898 && last_second_word == second_word && last_unwind_type == 1)
10899 elide = 1;
10900 unwind_type = 1;
10901 last_second_word = second_word;
10902 }
10903 /* Normal table entry. In theory we could merge these too,
10904 but duplicate entries are likely to be much less common. */
10905 else
10906 unwind_type = 2;
10907
10908 if (elide)
10909 {
10910 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10911 DELETE_EXIDX_ENTRY, NULL, j / 8);
10912
10913 deleted_exidx_bytes += 8;
10914 }
10915
10916 last_unwind_type = unwind_type;
10917 }
10918
10919 /* Free contents if we allocated it ourselves. */
10920 if (contents != hdr->contents)
10921 free (contents);
10922
10923 /* Record edits to be applied later (in elf32_arm_write_section). */
10924 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10925 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10926
10927 if (deleted_exidx_bytes > 0)
10928 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10929
10930 last_exidx_sec = exidx_sec;
10931 last_text_sec = sec;
10932 }
10933
10934 /* Add terminating CANTUNWIND entry. */
10935 if (last_exidx_sec && last_unwind_type != 0)
10936 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10937
10938 return TRUE;
10939 }
10940
10941 static bfd_boolean
10942 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10943 bfd *ibfd, const char *name)
10944 {
10945 asection *sec, *osec;
10946
10947 sec = bfd_get_linker_section (ibfd, name);
10948 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10949 return TRUE;
10950
10951 osec = sec->output_section;
10952 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10953 return TRUE;
10954
10955 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10956 sec->output_offset, sec->size))
10957 return FALSE;
10958
10959 return TRUE;
10960 }
10961
10962 static bfd_boolean
10963 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10964 {
10965 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10966 asection *sec, *osec;
10967
10968 if (globals == NULL)
10969 return FALSE;
10970
10971 /* Invoke the regular ELF backend linker to do all the work. */
10972 if (!bfd_elf_final_link (abfd, info))
10973 return FALSE;
10974
10975 /* Process stub sections (eg BE8 encoding, ...). */
10976 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10977 int i;
10978 for (i=0; i<htab->top_id; i++)
10979 {
10980 sec = htab->stub_group[i].stub_sec;
10981 /* Only process it once, in its link_sec slot. */
10982 if (sec && i == htab->stub_group[i].link_sec->id)
10983 {
10984 osec = sec->output_section;
10985 elf32_arm_write_section (abfd, info, sec, sec->contents);
10986 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10987 sec->output_offset, sec->size))
10988 return FALSE;
10989 }
10990 }
10991
10992 /* Write out any glue sections now that we have created all the
10993 stubs. */
10994 if (globals->bfd_of_glue_owner != NULL)
10995 {
10996 if (! elf32_arm_output_glue_section (info, abfd,
10997 globals->bfd_of_glue_owner,
10998 ARM2THUMB_GLUE_SECTION_NAME))
10999 return FALSE;
11000
11001 if (! elf32_arm_output_glue_section (info, abfd,
11002 globals->bfd_of_glue_owner,
11003 THUMB2ARM_GLUE_SECTION_NAME))
11004 return FALSE;
11005
11006 if (! elf32_arm_output_glue_section (info, abfd,
11007 globals->bfd_of_glue_owner,
11008 VFP11_ERRATUM_VENEER_SECTION_NAME))
11009 return FALSE;
11010
11011 if (! elf32_arm_output_glue_section (info, abfd,
11012 globals->bfd_of_glue_owner,
11013 ARM_BX_GLUE_SECTION_NAME))
11014 return FALSE;
11015 }
11016
11017 return TRUE;
11018 }
11019
11020 /* Return a best guess for the machine number based on the attributes. */
11021
11022 static unsigned int
11023 bfd_arm_get_mach_from_attributes (bfd * abfd)
11024 {
11025 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11026
11027 switch (arch)
11028 {
11029 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11030 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11031 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11032
11033 case TAG_CPU_ARCH_V5TE:
11034 {
11035 char * name;
11036
11037 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11038 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11039
11040 if (name)
11041 {
11042 if (strcmp (name, "IWMMXT2") == 0)
11043 return bfd_mach_arm_iWMMXt2;
11044
11045 if (strcmp (name, "IWMMXT") == 0)
11046 return bfd_mach_arm_iWMMXt;
11047
11048 if (strcmp (name, "XSCALE") == 0)
11049 {
11050 int wmmx;
11051
11052 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11053 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11054 switch (wmmx)
11055 {
11056 case 1: return bfd_mach_arm_iWMMXt;
11057 case 2: return bfd_mach_arm_iWMMXt2;
11058 default: return bfd_mach_arm_XScale;
11059 }
11060 }
11061 }
11062
11063 return bfd_mach_arm_5TE;
11064 }
11065
11066 default:
11067 return bfd_mach_arm_unknown;
11068 }
11069 }
11070
11071 /* Set the right machine number. */
11072
11073 static bfd_boolean
11074 elf32_arm_object_p (bfd *abfd)
11075 {
11076 unsigned int mach;
11077
11078 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11079
11080 if (mach == bfd_mach_arm_unknown)
11081 {
11082 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11083 mach = bfd_mach_arm_ep9312;
11084 else
11085 mach = bfd_arm_get_mach_from_attributes (abfd);
11086 }
11087
11088 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11089 return TRUE;
11090 }
11091
11092 /* Function to keep ARM specific flags in the ELF header. */
11093
11094 static bfd_boolean
11095 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11096 {
11097 if (elf_flags_init (abfd)
11098 && elf_elfheader (abfd)->e_flags != flags)
11099 {
11100 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11101 {
11102 if (flags & EF_ARM_INTERWORK)
11103 (*_bfd_error_handler)
11104 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11105 abfd);
11106 else
11107 _bfd_error_handler
11108 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11109 abfd);
11110 }
11111 }
11112 else
11113 {
11114 elf_elfheader (abfd)->e_flags = flags;
11115 elf_flags_init (abfd) = TRUE;
11116 }
11117
11118 return TRUE;
11119 }
11120
11121 /* Copy backend specific data from one object module to another. */
11122
11123 static bfd_boolean
11124 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11125 {
11126 flagword in_flags;
11127 flagword out_flags;
11128
11129 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11130 return TRUE;
11131
11132 in_flags = elf_elfheader (ibfd)->e_flags;
11133 out_flags = elf_elfheader (obfd)->e_flags;
11134
11135 if (elf_flags_init (obfd)
11136 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11137 && in_flags != out_flags)
11138 {
11139 /* Cannot mix APCS26 and APCS32 code. */
11140 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11141 return FALSE;
11142
11143 /* Cannot mix float APCS and non-float APCS code. */
11144 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11145 return FALSE;
11146
11147 /* If the src and dest have different interworking flags
11148 then turn off the interworking bit. */
11149 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11150 {
11151 if (out_flags & EF_ARM_INTERWORK)
11152 _bfd_error_handler
11153 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11154 obfd, ibfd);
11155
11156 in_flags &= ~EF_ARM_INTERWORK;
11157 }
11158
11159 /* Likewise for PIC, though don't warn for this case. */
11160 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11161 in_flags &= ~EF_ARM_PIC;
11162 }
11163
11164 elf_elfheader (obfd)->e_flags = in_flags;
11165 elf_flags_init (obfd) = TRUE;
11166
11167 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
11168 }
11169
11170 /* Values for Tag_ABI_PCS_R9_use. */
11171 enum
11172 {
11173 AEABI_R9_V6,
11174 AEABI_R9_SB,
11175 AEABI_R9_TLS,
11176 AEABI_R9_unused
11177 };
11178
11179 /* Values for Tag_ABI_PCS_RW_data. */
11180 enum
11181 {
11182 AEABI_PCS_RW_data_absolute,
11183 AEABI_PCS_RW_data_PCrel,
11184 AEABI_PCS_RW_data_SBrel,
11185 AEABI_PCS_RW_data_unused
11186 };
11187
11188 /* Values for Tag_ABI_enum_size. */
11189 enum
11190 {
11191 AEABI_enum_unused,
11192 AEABI_enum_short,
11193 AEABI_enum_wide,
11194 AEABI_enum_forced_wide
11195 };
11196
11197 /* Determine whether an object attribute tag takes an integer, a
11198 string or both. */
11199
11200 static int
11201 elf32_arm_obj_attrs_arg_type (int tag)
11202 {
11203 if (tag == Tag_compatibility)
11204 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11205 else if (tag == Tag_nodefaults)
11206 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11207 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11208 return ATTR_TYPE_FLAG_STR_VAL;
11209 else if (tag < 32)
11210 return ATTR_TYPE_FLAG_INT_VAL;
11211 else
11212 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11213 }
11214
11215 /* The ABI defines that Tag_conformance should be emitted first, and that
11216 Tag_nodefaults should be second (if either is defined). This sets those
11217 two positions, and bumps up the position of all the remaining tags to
11218 compensate. */
11219 static int
11220 elf32_arm_obj_attrs_order (int num)
11221 {
11222 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11223 return Tag_conformance;
11224 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11225 return Tag_nodefaults;
11226 if ((num - 2) < Tag_nodefaults)
11227 return num - 2;
11228 if ((num - 1) < Tag_conformance)
11229 return num - 1;
11230 return num;
11231 }
11232
11233 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11234 static bfd_boolean
11235 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11236 {
11237 if ((tag & 127) < 64)
11238 {
11239 _bfd_error_handler
11240 (_("%B: Unknown mandatory EABI object attribute %d"),
11241 abfd, tag);
11242 bfd_set_error (bfd_error_bad_value);
11243 return FALSE;
11244 }
11245 else
11246 {
11247 _bfd_error_handler
11248 (_("Warning: %B: Unknown EABI object attribute %d"),
11249 abfd, tag);
11250 return TRUE;
11251 }
11252 }
11253
11254 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11255 Returns -1 if no architecture could be read. */
11256
11257 static int
11258 get_secondary_compatible_arch (bfd *abfd)
11259 {
11260 obj_attribute *attr =
11261 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11262
11263 /* Note: the tag and its argument below are uleb128 values, though
11264 currently-defined values fit in one byte for each. */
11265 if (attr->s
11266 && attr->s[0] == Tag_CPU_arch
11267 && (attr->s[1] & 128) != 128
11268 && attr->s[2] == 0)
11269 return attr->s[1];
11270
11271 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11272 return -1;
11273 }
11274
11275 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11276 The tag is removed if ARCH is -1. */
11277
11278 static void
11279 set_secondary_compatible_arch (bfd *abfd, int arch)
11280 {
11281 obj_attribute *attr =
11282 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11283
11284 if (arch == -1)
11285 {
11286 attr->s = NULL;
11287 return;
11288 }
11289
11290 /* Note: the tag and its argument below are uleb128 values, though
11291 currently-defined values fit in one byte for each. */
11292 if (!attr->s)
11293 attr->s = (char *) bfd_alloc (abfd, 3);
11294 attr->s[0] = Tag_CPU_arch;
11295 attr->s[1] = arch;
11296 attr->s[2] = '\0';
11297 }
11298
11299 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11300 into account. */
11301
11302 static int
11303 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11304 int newtag, int secondary_compat)
11305 {
11306 #define T(X) TAG_CPU_ARCH_##X
11307 int tagl, tagh, result;
11308 const int v6t2[] =
11309 {
11310 T(V6T2), /* PRE_V4. */
11311 T(V6T2), /* V4. */
11312 T(V6T2), /* V4T. */
11313 T(V6T2), /* V5T. */
11314 T(V6T2), /* V5TE. */
11315 T(V6T2), /* V5TEJ. */
11316 T(V6T2), /* V6. */
11317 T(V7), /* V6KZ. */
11318 T(V6T2) /* V6T2. */
11319 };
11320 const int v6k[] =
11321 {
11322 T(V6K), /* PRE_V4. */
11323 T(V6K), /* V4. */
11324 T(V6K), /* V4T. */
11325 T(V6K), /* V5T. */
11326 T(V6K), /* V5TE. */
11327 T(V6K), /* V5TEJ. */
11328 T(V6K), /* V6. */
11329 T(V6KZ), /* V6KZ. */
11330 T(V7), /* V6T2. */
11331 T(V6K) /* V6K. */
11332 };
11333 const int v7[] =
11334 {
11335 T(V7), /* PRE_V4. */
11336 T(V7), /* V4. */
11337 T(V7), /* V4T. */
11338 T(V7), /* V5T. */
11339 T(V7), /* V5TE. */
11340 T(V7), /* V5TEJ. */
11341 T(V7), /* V6. */
11342 T(V7), /* V6KZ. */
11343 T(V7), /* V6T2. */
11344 T(V7), /* V6K. */
11345 T(V7) /* V7. */
11346 };
11347 const int v6_m[] =
11348 {
11349 -1, /* PRE_V4. */
11350 -1, /* V4. */
11351 T(V6K), /* V4T. */
11352 T(V6K), /* V5T. */
11353 T(V6K), /* V5TE. */
11354 T(V6K), /* V5TEJ. */
11355 T(V6K), /* V6. */
11356 T(V6KZ), /* V6KZ. */
11357 T(V7), /* V6T2. */
11358 T(V6K), /* V6K. */
11359 T(V7), /* V7. */
11360 T(V6_M) /* V6_M. */
11361 };
11362 const int v6s_m[] =
11363 {
11364 -1, /* PRE_V4. */
11365 -1, /* V4. */
11366 T(V6K), /* V4T. */
11367 T(V6K), /* V5T. */
11368 T(V6K), /* V5TE. */
11369 T(V6K), /* V5TEJ. */
11370 T(V6K), /* V6. */
11371 T(V6KZ), /* V6KZ. */
11372 T(V7), /* V6T2. */
11373 T(V6K), /* V6K. */
11374 T(V7), /* V7. */
11375 T(V6S_M), /* V6_M. */
11376 T(V6S_M) /* V6S_M. */
11377 };
11378 const int v7e_m[] =
11379 {
11380 -1, /* PRE_V4. */
11381 -1, /* V4. */
11382 T(V7E_M), /* V4T. */
11383 T(V7E_M), /* V5T. */
11384 T(V7E_M), /* V5TE. */
11385 T(V7E_M), /* V5TEJ. */
11386 T(V7E_M), /* V6. */
11387 T(V7E_M), /* V6KZ. */
11388 T(V7E_M), /* V6T2. */
11389 T(V7E_M), /* V6K. */
11390 T(V7E_M), /* V7. */
11391 T(V7E_M), /* V6_M. */
11392 T(V7E_M), /* V6S_M. */
11393 T(V7E_M) /* V7E_M. */
11394 };
11395 const int v8[] =
11396 {
11397 T(V8), /* PRE_V4. */
11398 T(V8), /* V4. */
11399 T(V8), /* V4T. */
11400 T(V8), /* V5T. */
11401 T(V8), /* V5TE. */
11402 T(V8), /* V5TEJ. */
11403 T(V8), /* V6. */
11404 T(V8), /* V6KZ. */
11405 T(V8), /* V6T2. */
11406 T(V8), /* V6K. */
11407 T(V8), /* V7. */
11408 T(V8), /* V6_M. */
11409 T(V8), /* V6S_M. */
11410 T(V8), /* V7E_M. */
11411 T(V8) /* V8. */
11412 };
11413 const int v4t_plus_v6_m[] =
11414 {
11415 -1, /* PRE_V4. */
11416 -1, /* V4. */
11417 T(V4T), /* V4T. */
11418 T(V5T), /* V5T. */
11419 T(V5TE), /* V5TE. */
11420 T(V5TEJ), /* V5TEJ. */
11421 T(V6), /* V6. */
11422 T(V6KZ), /* V6KZ. */
11423 T(V6T2), /* V6T2. */
11424 T(V6K), /* V6K. */
11425 T(V7), /* V7. */
11426 T(V6_M), /* V6_M. */
11427 T(V6S_M), /* V6S_M. */
11428 T(V7E_M), /* V7E_M. */
11429 T(V8), /* V8. */
11430 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11431 };
11432 const int *comb[] =
11433 {
11434 v6t2,
11435 v6k,
11436 v7,
11437 v6_m,
11438 v6s_m,
11439 v7e_m,
11440 v8,
11441 /* Pseudo-architecture. */
11442 v4t_plus_v6_m
11443 };
11444
11445 /* Check we've not got a higher architecture than we know about. */
11446
11447 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11448 {
11449 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11450 return -1;
11451 }
11452
11453 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11454
11455 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11456 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11457 oldtag = T(V4T_PLUS_V6_M);
11458
11459 /* And override the new tag if we have a Tag_also_compatible_with on the
11460 input. */
11461
11462 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11463 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11464 newtag = T(V4T_PLUS_V6_M);
11465
11466 tagl = (oldtag < newtag) ? oldtag : newtag;
11467 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11468
11469 /* Architectures before V6KZ add features monotonically. */
11470 if (tagh <= TAG_CPU_ARCH_V6KZ)
11471 return result;
11472
11473 result = comb[tagh - T(V6T2)][tagl];
11474
11475 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11476 as the canonical version. */
11477 if (result == T(V4T_PLUS_V6_M))
11478 {
11479 result = T(V4T);
11480 *secondary_compat_out = T(V6_M);
11481 }
11482 else
11483 *secondary_compat_out = -1;
11484
11485 if (result == -1)
11486 {
11487 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11488 ibfd, oldtag, newtag);
11489 return -1;
11490 }
11491
11492 return result;
11493 #undef T
11494 }
11495
11496 /* Query attributes object to see if integer divide instructions may be
11497 present in an object. */
11498 static bfd_boolean
11499 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11500 {
11501 int arch = attr[Tag_CPU_arch].i;
11502 int profile = attr[Tag_CPU_arch_profile].i;
11503
11504 switch (attr[Tag_DIV_use].i)
11505 {
11506 case 0:
11507 /* Integer divide allowed if instruction contained in archetecture. */
11508 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11509 return TRUE;
11510 else if (arch >= TAG_CPU_ARCH_V7E_M)
11511 return TRUE;
11512 else
11513 return FALSE;
11514
11515 case 1:
11516 /* Integer divide explicitly prohibited. */
11517 return FALSE;
11518
11519 default:
11520 /* Unrecognised case - treat as allowing divide everywhere. */
11521 case 2:
11522 /* Integer divide allowed in ARM state. */
11523 return TRUE;
11524 }
11525 }
11526
11527 /* Query attributes object to see if integer divide instructions are
11528 forbidden to be in the object. This is not the inverse of
11529 elf32_arm_attributes_accept_div. */
11530 static bfd_boolean
11531 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11532 {
11533 return attr[Tag_DIV_use].i == 1;
11534 }
11535
11536 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11537 are conflicting attributes. */
11538
11539 static bfd_boolean
11540 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11541 {
11542 obj_attribute *in_attr;
11543 obj_attribute *out_attr;
11544 /* Some tags have 0 = don't care, 1 = strong requirement,
11545 2 = weak requirement. */
11546 static const int order_021[3] = {0, 2, 1};
11547 int i;
11548 bfd_boolean result = TRUE;
11549
11550 /* Skip the linker stubs file. This preserves previous behavior
11551 of accepting unknown attributes in the first input file - but
11552 is that a bug? */
11553 if (ibfd->flags & BFD_LINKER_CREATED)
11554 return TRUE;
11555
11556 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11557 {
11558 /* This is the first object. Copy the attributes. */
11559 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11560
11561 out_attr = elf_known_obj_attributes_proc (obfd);
11562
11563 /* Use the Tag_null value to indicate the attributes have been
11564 initialized. */
11565 out_attr[0].i = 1;
11566
11567 /* We do not output objects with Tag_MPextension_use_legacy - we move
11568 the attribute's value to Tag_MPextension_use. */
11569 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11570 {
11571 if (out_attr[Tag_MPextension_use].i != 0
11572 && out_attr[Tag_MPextension_use_legacy].i
11573 != out_attr[Tag_MPextension_use].i)
11574 {
11575 _bfd_error_handler
11576 (_("Error: %B has both the current and legacy "
11577 "Tag_MPextension_use attributes"), ibfd);
11578 result = FALSE;
11579 }
11580
11581 out_attr[Tag_MPextension_use] =
11582 out_attr[Tag_MPextension_use_legacy];
11583 out_attr[Tag_MPextension_use_legacy].type = 0;
11584 out_attr[Tag_MPextension_use_legacy].i = 0;
11585 }
11586
11587 return result;
11588 }
11589
11590 in_attr = elf_known_obj_attributes_proc (ibfd);
11591 out_attr = elf_known_obj_attributes_proc (obfd);
11592 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11593 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11594 {
11595 /* Ignore mismatches if the object doesn't use floating point. */
11596 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11597 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11598 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11599 {
11600 _bfd_error_handler
11601 (_("error: %B uses VFP register arguments, %B does not"),
11602 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11603 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11604 result = FALSE;
11605 }
11606 }
11607
11608 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11609 {
11610 /* Merge this attribute with existing attributes. */
11611 switch (i)
11612 {
11613 case Tag_CPU_raw_name:
11614 case Tag_CPU_name:
11615 /* These are merged after Tag_CPU_arch. */
11616 break;
11617
11618 case Tag_ABI_optimization_goals:
11619 case Tag_ABI_FP_optimization_goals:
11620 /* Use the first value seen. */
11621 break;
11622
11623 case Tag_CPU_arch:
11624 {
11625 int secondary_compat = -1, secondary_compat_out = -1;
11626 unsigned int saved_out_attr = out_attr[i].i;
11627 static const char *name_table[] = {
11628 /* These aren't real CPU names, but we can't guess
11629 that from the architecture version alone. */
11630 "Pre v4",
11631 "ARM v4",
11632 "ARM v4T",
11633 "ARM v5T",
11634 "ARM v5TE",
11635 "ARM v5TEJ",
11636 "ARM v6",
11637 "ARM v6KZ",
11638 "ARM v6T2",
11639 "ARM v6K",
11640 "ARM v7",
11641 "ARM v6-M",
11642 "ARM v6S-M",
11643 "ARM v8"
11644 };
11645
11646 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11647 secondary_compat = get_secondary_compatible_arch (ibfd);
11648 secondary_compat_out = get_secondary_compatible_arch (obfd);
11649 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11650 &secondary_compat_out,
11651 in_attr[i].i,
11652 secondary_compat);
11653 set_secondary_compatible_arch (obfd, secondary_compat_out);
11654
11655 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11656 if (out_attr[i].i == saved_out_attr)
11657 ; /* Leave the names alone. */
11658 else if (out_attr[i].i == in_attr[i].i)
11659 {
11660 /* The output architecture has been changed to match the
11661 input architecture. Use the input names. */
11662 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11663 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11664 : NULL;
11665 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11666 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11667 : NULL;
11668 }
11669 else
11670 {
11671 out_attr[Tag_CPU_name].s = NULL;
11672 out_attr[Tag_CPU_raw_name].s = NULL;
11673 }
11674
11675 /* If we still don't have a value for Tag_CPU_name,
11676 make one up now. Tag_CPU_raw_name remains blank. */
11677 if (out_attr[Tag_CPU_name].s == NULL
11678 && out_attr[i].i < ARRAY_SIZE (name_table))
11679 out_attr[Tag_CPU_name].s =
11680 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11681 }
11682 break;
11683
11684 case Tag_ARM_ISA_use:
11685 case Tag_THUMB_ISA_use:
11686 case Tag_WMMX_arch:
11687 case Tag_Advanced_SIMD_arch:
11688 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11689 case Tag_ABI_FP_rounding:
11690 case Tag_ABI_FP_exceptions:
11691 case Tag_ABI_FP_user_exceptions:
11692 case Tag_ABI_FP_number_model:
11693 case Tag_FP_HP_extension:
11694 case Tag_CPU_unaligned_access:
11695 case Tag_T2EE_use:
11696 case Tag_MPextension_use:
11697 /* Use the largest value specified. */
11698 if (in_attr[i].i > out_attr[i].i)
11699 out_attr[i].i = in_attr[i].i;
11700 break;
11701
11702 case Tag_ABI_align_preserved:
11703 case Tag_ABI_PCS_RO_data:
11704 /* Use the smallest value specified. */
11705 if (in_attr[i].i < out_attr[i].i)
11706 out_attr[i].i = in_attr[i].i;
11707 break;
11708
11709 case Tag_ABI_align_needed:
11710 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11711 && (in_attr[Tag_ABI_align_preserved].i == 0
11712 || out_attr[Tag_ABI_align_preserved].i == 0))
11713 {
11714 /* This error message should be enabled once all non-conformant
11715 binaries in the toolchain have had the attributes set
11716 properly.
11717 _bfd_error_handler
11718 (_("error: %B: 8-byte data alignment conflicts with %B"),
11719 obfd, ibfd);
11720 result = FALSE; */
11721 }
11722 /* Fall through. */
11723 case Tag_ABI_FP_denormal:
11724 case Tag_ABI_PCS_GOT_use:
11725 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11726 value if greater than 2 (for future-proofing). */
11727 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11728 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11729 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11730 out_attr[i].i = in_attr[i].i;
11731 break;
11732
11733 case Tag_Virtualization_use:
11734 /* The virtualization tag effectively stores two bits of
11735 information: the intended use of TrustZone (in bit 0), and the
11736 intended use of Virtualization (in bit 1). */
11737 if (out_attr[i].i == 0)
11738 out_attr[i].i = in_attr[i].i;
11739 else if (in_attr[i].i != 0
11740 && in_attr[i].i != out_attr[i].i)
11741 {
11742 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11743 out_attr[i].i = 3;
11744 else
11745 {
11746 _bfd_error_handler
11747 (_("error: %B: unable to merge virtualization attributes "
11748 "with %B"),
11749 obfd, ibfd);
11750 result = FALSE;
11751 }
11752 }
11753 break;
11754
11755 case Tag_CPU_arch_profile:
11756 if (out_attr[i].i != in_attr[i].i)
11757 {
11758 /* 0 will merge with anything.
11759 'A' and 'S' merge to 'A'.
11760 'R' and 'S' merge to 'R'.
11761 'M' and 'A|R|S' is an error. */
11762 if (out_attr[i].i == 0
11763 || (out_attr[i].i == 'S'
11764 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11765 out_attr[i].i = in_attr[i].i;
11766 else if (in_attr[i].i == 0
11767 || (in_attr[i].i == 'S'
11768 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11769 ; /* Do nothing. */
11770 else
11771 {
11772 _bfd_error_handler
11773 (_("error: %B: Conflicting architecture profiles %c/%c"),
11774 ibfd,
11775 in_attr[i].i ? in_attr[i].i : '0',
11776 out_attr[i].i ? out_attr[i].i : '0');
11777 result = FALSE;
11778 }
11779 }
11780 break;
11781 case Tag_FP_arch:
11782 {
11783 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11784 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11785 when it's 0. It might mean absence of FP hardware if
11786 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11787
11788 #define VFP_VERSION_COUNT 8
11789 static const struct
11790 {
11791 int ver;
11792 int regs;
11793 } vfp_versions[VFP_VERSION_COUNT] =
11794 {
11795 {0, 0},
11796 {1, 16},
11797 {2, 16},
11798 {3, 32},
11799 {3, 16},
11800 {4, 32},
11801 {4, 16},
11802 {8, 32}
11803 };
11804 int ver;
11805 int regs;
11806 int newval;
11807
11808 /* If the output has no requirement about FP hardware,
11809 follow the requirement of the input. */
11810 if (out_attr[i].i == 0)
11811 {
11812 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11813 out_attr[i].i = in_attr[i].i;
11814 out_attr[Tag_ABI_HardFP_use].i
11815 = in_attr[Tag_ABI_HardFP_use].i;
11816 break;
11817 }
11818 /* If the input has no requirement about FP hardware, do
11819 nothing. */
11820 else if (in_attr[i].i == 0)
11821 {
11822 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11823 break;
11824 }
11825
11826 /* Both the input and the output have nonzero Tag_FP_arch.
11827 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11828
11829 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11830 do nothing. */
11831 if (in_attr[Tag_ABI_HardFP_use].i == 0
11832 && out_attr[Tag_ABI_HardFP_use].i == 0)
11833 ;
11834 /* If the input and the output have different Tag_ABI_HardFP_use,
11835 the combination of them is 3 (SP & DP). */
11836 else if (in_attr[Tag_ABI_HardFP_use].i
11837 != out_attr[Tag_ABI_HardFP_use].i)
11838 out_attr[Tag_ABI_HardFP_use].i = 3;
11839
11840 /* Now we can handle Tag_FP_arch. */
11841
11842 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11843 pick the biggest. */
11844 if (in_attr[i].i >= VFP_VERSION_COUNT
11845 && in_attr[i].i > out_attr[i].i)
11846 {
11847 out_attr[i] = in_attr[i];
11848 break;
11849 }
11850 /* The output uses the superset of input features
11851 (ISA version) and registers. */
11852 ver = vfp_versions[in_attr[i].i].ver;
11853 if (ver < vfp_versions[out_attr[i].i].ver)
11854 ver = vfp_versions[out_attr[i].i].ver;
11855 regs = vfp_versions[in_attr[i].i].regs;
11856 if (regs < vfp_versions[out_attr[i].i].regs)
11857 regs = vfp_versions[out_attr[i].i].regs;
11858 /* This assumes all possible supersets are also a valid
11859 options. */
11860 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
11861 {
11862 if (regs == vfp_versions[newval].regs
11863 && ver == vfp_versions[newval].ver)
11864 break;
11865 }
11866 out_attr[i].i = newval;
11867 }
11868 break;
11869 case Tag_PCS_config:
11870 if (out_attr[i].i == 0)
11871 out_attr[i].i = in_attr[i].i;
11872 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11873 {
11874 /* It's sometimes ok to mix different configs, so this is only
11875 a warning. */
11876 _bfd_error_handler
11877 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11878 }
11879 break;
11880 case Tag_ABI_PCS_R9_use:
11881 if (in_attr[i].i != out_attr[i].i
11882 && out_attr[i].i != AEABI_R9_unused
11883 && in_attr[i].i != AEABI_R9_unused)
11884 {
11885 _bfd_error_handler
11886 (_("error: %B: Conflicting use of R9"), ibfd);
11887 result = FALSE;
11888 }
11889 if (out_attr[i].i == AEABI_R9_unused)
11890 out_attr[i].i = in_attr[i].i;
11891 break;
11892 case Tag_ABI_PCS_RW_data:
11893 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11894 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11895 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11896 {
11897 _bfd_error_handler
11898 (_("error: %B: SB relative addressing conflicts with use of R9"),
11899 ibfd);
11900 result = FALSE;
11901 }
11902 /* Use the smallest value specified. */
11903 if (in_attr[i].i < out_attr[i].i)
11904 out_attr[i].i = in_attr[i].i;
11905 break;
11906 case Tag_ABI_PCS_wchar_t:
11907 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11908 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11909 {
11910 _bfd_error_handler
11911 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11912 ibfd, in_attr[i].i, out_attr[i].i);
11913 }
11914 else if (in_attr[i].i && !out_attr[i].i)
11915 out_attr[i].i = in_attr[i].i;
11916 break;
11917 case Tag_ABI_enum_size:
11918 if (in_attr[i].i != AEABI_enum_unused)
11919 {
11920 if (out_attr[i].i == AEABI_enum_unused
11921 || out_attr[i].i == AEABI_enum_forced_wide)
11922 {
11923 /* The existing object is compatible with anything.
11924 Use whatever requirements the new object has. */
11925 out_attr[i].i = in_attr[i].i;
11926 }
11927 else if (in_attr[i].i != AEABI_enum_forced_wide
11928 && out_attr[i].i != in_attr[i].i
11929 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11930 {
11931 static const char *aeabi_enum_names[] =
11932 { "", "variable-size", "32-bit", "" };
11933 const char *in_name =
11934 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11935 ? aeabi_enum_names[in_attr[i].i]
11936 : "<unknown>";
11937 const char *out_name =
11938 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11939 ? aeabi_enum_names[out_attr[i].i]
11940 : "<unknown>";
11941 _bfd_error_handler
11942 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11943 ibfd, in_name, out_name);
11944 }
11945 }
11946 break;
11947 case Tag_ABI_VFP_args:
11948 /* Aready done. */
11949 break;
11950 case Tag_ABI_WMMX_args:
11951 if (in_attr[i].i != out_attr[i].i)
11952 {
11953 _bfd_error_handler
11954 (_("error: %B uses iWMMXt register arguments, %B does not"),
11955 ibfd, obfd);
11956 result = FALSE;
11957 }
11958 break;
11959 case Tag_compatibility:
11960 /* Merged in target-independent code. */
11961 break;
11962 case Tag_ABI_HardFP_use:
11963 /* This is handled along with Tag_FP_arch. */
11964 break;
11965 case Tag_ABI_FP_16bit_format:
11966 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11967 {
11968 if (in_attr[i].i != out_attr[i].i)
11969 {
11970 _bfd_error_handler
11971 (_("error: fp16 format mismatch between %B and %B"),
11972 ibfd, obfd);
11973 result = FALSE;
11974 }
11975 }
11976 if (in_attr[i].i != 0)
11977 out_attr[i].i = in_attr[i].i;
11978 break;
11979
11980 case Tag_DIV_use:
11981 /* A value of zero on input means that the divide instruction may
11982 be used if available in the base architecture as specified via
11983 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11984 the user did not want divide instructions. A value of 2
11985 explicitly means that divide instructions were allowed in ARM
11986 and Thumb state. */
11987 if (in_attr[i].i == out_attr[i].i)
11988 /* Do nothing. */ ;
11989 else if (elf32_arm_attributes_forbid_div (in_attr)
11990 && !elf32_arm_attributes_accept_div (out_attr))
11991 out_attr[i].i = 1;
11992 else if (elf32_arm_attributes_forbid_div (out_attr)
11993 && elf32_arm_attributes_accept_div (in_attr))
11994 out_attr[i].i = in_attr[i].i;
11995 else if (in_attr[i].i == 2)
11996 out_attr[i].i = in_attr[i].i;
11997 break;
11998
11999 case Tag_MPextension_use_legacy:
12000 /* We don't output objects with Tag_MPextension_use_legacy - we
12001 move the value to Tag_MPextension_use. */
12002 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12003 {
12004 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12005 {
12006 _bfd_error_handler
12007 (_("%B has has both the current and legacy "
12008 "Tag_MPextension_use attributes"),
12009 ibfd);
12010 result = FALSE;
12011 }
12012 }
12013
12014 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12015 out_attr[Tag_MPextension_use] = in_attr[i];
12016
12017 break;
12018
12019 case Tag_nodefaults:
12020 /* This tag is set if it exists, but the value is unused (and is
12021 typically zero). We don't actually need to do anything here -
12022 the merge happens automatically when the type flags are merged
12023 below. */
12024 break;
12025 case Tag_also_compatible_with:
12026 /* Already done in Tag_CPU_arch. */
12027 break;
12028 case Tag_conformance:
12029 /* Keep the attribute if it matches. Throw it away otherwise.
12030 No attribute means no claim to conform. */
12031 if (!in_attr[i].s || !out_attr[i].s
12032 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12033 out_attr[i].s = NULL;
12034 break;
12035
12036 default:
12037 result
12038 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12039 }
12040
12041 /* If out_attr was copied from in_attr then it won't have a type yet. */
12042 if (in_attr[i].type && !out_attr[i].type)
12043 out_attr[i].type = in_attr[i].type;
12044 }
12045
12046 /* Merge Tag_compatibility attributes and any common GNU ones. */
12047 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12048 return FALSE;
12049
12050 /* Check for any attributes not known on ARM. */
12051 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
12052
12053 return result;
12054 }
12055
12056
12057 /* Return TRUE if the two EABI versions are incompatible. */
12058
12059 static bfd_boolean
12060 elf32_arm_versions_compatible (unsigned iver, unsigned over)
12061 {
12062 /* v4 and v5 are the same spec before and after it was released,
12063 so allow mixing them. */
12064 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12065 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12066 return TRUE;
12067
12068 return (iver == over);
12069 }
12070
12071 /* Merge backend specific data from an object file to the output
12072 object file when linking. */
12073
12074 static bfd_boolean
12075 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12076
12077 /* Display the flags field. */
12078
12079 static bfd_boolean
12080 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12081 {
12082 FILE * file = (FILE *) ptr;
12083 unsigned long flags;
12084
12085 BFD_ASSERT (abfd != NULL && ptr != NULL);
12086
12087 /* Print normal ELF private data. */
12088 _bfd_elf_print_private_bfd_data (abfd, ptr);
12089
12090 flags = elf_elfheader (abfd)->e_flags;
12091 /* Ignore init flag - it may not be set, despite the flags field
12092 containing valid data. */
12093
12094 /* xgettext:c-format */
12095 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12096
12097 switch (EF_ARM_EABI_VERSION (flags))
12098 {
12099 case EF_ARM_EABI_UNKNOWN:
12100 /* The following flag bits are GNU extensions and not part of the
12101 official ARM ELF extended ABI. Hence they are only decoded if
12102 the EABI version is not set. */
12103 if (flags & EF_ARM_INTERWORK)
12104 fprintf (file, _(" [interworking enabled]"));
12105
12106 if (flags & EF_ARM_APCS_26)
12107 fprintf (file, " [APCS-26]");
12108 else
12109 fprintf (file, " [APCS-32]");
12110
12111 if (flags & EF_ARM_VFP_FLOAT)
12112 fprintf (file, _(" [VFP float format]"));
12113 else if (flags & EF_ARM_MAVERICK_FLOAT)
12114 fprintf (file, _(" [Maverick float format]"));
12115 else
12116 fprintf (file, _(" [FPA float format]"));
12117
12118 if (flags & EF_ARM_APCS_FLOAT)
12119 fprintf (file, _(" [floats passed in float registers]"));
12120
12121 if (flags & EF_ARM_PIC)
12122 fprintf (file, _(" [position independent]"));
12123
12124 if (flags & EF_ARM_NEW_ABI)
12125 fprintf (file, _(" [new ABI]"));
12126
12127 if (flags & EF_ARM_OLD_ABI)
12128 fprintf (file, _(" [old ABI]"));
12129
12130 if (flags & EF_ARM_SOFT_FLOAT)
12131 fprintf (file, _(" [software FP]"));
12132
12133 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12134 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12135 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12136 | EF_ARM_MAVERICK_FLOAT);
12137 break;
12138
12139 case EF_ARM_EABI_VER1:
12140 fprintf (file, _(" [Version1 EABI]"));
12141
12142 if (flags & EF_ARM_SYMSARESORTED)
12143 fprintf (file, _(" [sorted symbol table]"));
12144 else
12145 fprintf (file, _(" [unsorted symbol table]"));
12146
12147 flags &= ~ EF_ARM_SYMSARESORTED;
12148 break;
12149
12150 case EF_ARM_EABI_VER2:
12151 fprintf (file, _(" [Version2 EABI]"));
12152
12153 if (flags & EF_ARM_SYMSARESORTED)
12154 fprintf (file, _(" [sorted symbol table]"));
12155 else
12156 fprintf (file, _(" [unsorted symbol table]"));
12157
12158 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12159 fprintf (file, _(" [dynamic symbols use segment index]"));
12160
12161 if (flags & EF_ARM_MAPSYMSFIRST)
12162 fprintf (file, _(" [mapping symbols precede others]"));
12163
12164 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12165 | EF_ARM_MAPSYMSFIRST);
12166 break;
12167
12168 case EF_ARM_EABI_VER3:
12169 fprintf (file, _(" [Version3 EABI]"));
12170 break;
12171
12172 case EF_ARM_EABI_VER4:
12173 fprintf (file, _(" [Version4 EABI]"));
12174 goto eabi;
12175
12176 case EF_ARM_EABI_VER5:
12177 fprintf (file, _(" [Version5 EABI]"));
12178
12179 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12180 fprintf (file, _(" [soft-float ABI]"));
12181
12182 if (flags & EF_ARM_ABI_FLOAT_HARD)
12183 fprintf (file, _(" [hard-float ABI]"));
12184
12185 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12186
12187 eabi:
12188 if (flags & EF_ARM_BE8)
12189 fprintf (file, _(" [BE8]"));
12190
12191 if (flags & EF_ARM_LE8)
12192 fprintf (file, _(" [LE8]"));
12193
12194 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12195 break;
12196
12197 default:
12198 fprintf (file, _(" <EABI version unrecognised>"));
12199 break;
12200 }
12201
12202 flags &= ~ EF_ARM_EABIMASK;
12203
12204 if (flags & EF_ARM_RELEXEC)
12205 fprintf (file, _(" [relocatable executable]"));
12206
12207 if (flags & EF_ARM_HASENTRY)
12208 fprintf (file, _(" [has entry point]"));
12209
12210 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12211
12212 if (flags)
12213 fprintf (file, _("<Unrecognised flag bits set>"));
12214
12215 fputc ('\n', file);
12216
12217 return TRUE;
12218 }
12219
12220 static int
12221 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12222 {
12223 switch (ELF_ST_TYPE (elf_sym->st_info))
12224 {
12225 case STT_ARM_TFUNC:
12226 return ELF_ST_TYPE (elf_sym->st_info);
12227
12228 case STT_ARM_16BIT:
12229 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12230 This allows us to distinguish between data used by Thumb instructions
12231 and non-data (which is probably code) inside Thumb regions of an
12232 executable. */
12233 if (type != STT_OBJECT && type != STT_TLS)
12234 return ELF_ST_TYPE (elf_sym->st_info);
12235 break;
12236
12237 default:
12238 break;
12239 }
12240
12241 return type;
12242 }
12243
12244 static asection *
12245 elf32_arm_gc_mark_hook (asection *sec,
12246 struct bfd_link_info *info,
12247 Elf_Internal_Rela *rel,
12248 struct elf_link_hash_entry *h,
12249 Elf_Internal_Sym *sym)
12250 {
12251 if (h != NULL)
12252 switch (ELF32_R_TYPE (rel->r_info))
12253 {
12254 case R_ARM_GNU_VTINHERIT:
12255 case R_ARM_GNU_VTENTRY:
12256 return NULL;
12257 }
12258
12259 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12260 }
12261
12262 /* Update the got entry reference counts for the section being removed. */
12263
12264 static bfd_boolean
12265 elf32_arm_gc_sweep_hook (bfd * abfd,
12266 struct bfd_link_info * info,
12267 asection * sec,
12268 const Elf_Internal_Rela * relocs)
12269 {
12270 Elf_Internal_Shdr *symtab_hdr;
12271 struct elf_link_hash_entry **sym_hashes;
12272 bfd_signed_vma *local_got_refcounts;
12273 const Elf_Internal_Rela *rel, *relend;
12274 struct elf32_arm_link_hash_table * globals;
12275
12276 if (info->relocatable)
12277 return TRUE;
12278
12279 globals = elf32_arm_hash_table (info);
12280 if (globals == NULL)
12281 return FALSE;
12282
12283 elf_section_data (sec)->local_dynrel = NULL;
12284
12285 symtab_hdr = & elf_symtab_hdr (abfd);
12286 sym_hashes = elf_sym_hashes (abfd);
12287 local_got_refcounts = elf_local_got_refcounts (abfd);
12288
12289 check_use_blx (globals);
12290
12291 relend = relocs + sec->reloc_count;
12292 for (rel = relocs; rel < relend; rel++)
12293 {
12294 unsigned long r_symndx;
12295 struct elf_link_hash_entry *h = NULL;
12296 struct elf32_arm_link_hash_entry *eh;
12297 int r_type;
12298 bfd_boolean call_reloc_p;
12299 bfd_boolean may_become_dynamic_p;
12300 bfd_boolean may_need_local_target_p;
12301 union gotplt_union *root_plt;
12302 struct arm_plt_info *arm_plt;
12303
12304 r_symndx = ELF32_R_SYM (rel->r_info);
12305 if (r_symndx >= symtab_hdr->sh_info)
12306 {
12307 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12308 while (h->root.type == bfd_link_hash_indirect
12309 || h->root.type == bfd_link_hash_warning)
12310 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12311 }
12312 eh = (struct elf32_arm_link_hash_entry *) h;
12313
12314 call_reloc_p = FALSE;
12315 may_become_dynamic_p = FALSE;
12316 may_need_local_target_p = FALSE;
12317
12318 r_type = ELF32_R_TYPE (rel->r_info);
12319 r_type = arm_real_reloc_type (globals, r_type);
12320 switch (r_type)
12321 {
12322 case R_ARM_GOT32:
12323 case R_ARM_GOT_PREL:
12324 case R_ARM_TLS_GD32:
12325 case R_ARM_TLS_IE32:
12326 if (h != NULL)
12327 {
12328 if (h->got.refcount > 0)
12329 h->got.refcount -= 1;
12330 }
12331 else if (local_got_refcounts != NULL)
12332 {
12333 if (local_got_refcounts[r_symndx] > 0)
12334 local_got_refcounts[r_symndx] -= 1;
12335 }
12336 break;
12337
12338 case R_ARM_TLS_LDM32:
12339 globals->tls_ldm_got.refcount -= 1;
12340 break;
12341
12342 case R_ARM_PC24:
12343 case R_ARM_PLT32:
12344 case R_ARM_CALL:
12345 case R_ARM_JUMP24:
12346 case R_ARM_PREL31:
12347 case R_ARM_THM_CALL:
12348 case R_ARM_THM_JUMP24:
12349 case R_ARM_THM_JUMP19:
12350 call_reloc_p = TRUE;
12351 may_need_local_target_p = TRUE;
12352 break;
12353
12354 case R_ARM_ABS12:
12355 if (!globals->vxworks_p)
12356 {
12357 may_need_local_target_p = TRUE;
12358 break;
12359 }
12360 /* Fall through. */
12361 case R_ARM_ABS32:
12362 case R_ARM_ABS32_NOI:
12363 case R_ARM_REL32:
12364 case R_ARM_REL32_NOI:
12365 case R_ARM_MOVW_ABS_NC:
12366 case R_ARM_MOVT_ABS:
12367 case R_ARM_MOVW_PREL_NC:
12368 case R_ARM_MOVT_PREL:
12369 case R_ARM_THM_MOVW_ABS_NC:
12370 case R_ARM_THM_MOVT_ABS:
12371 case R_ARM_THM_MOVW_PREL_NC:
12372 case R_ARM_THM_MOVT_PREL:
12373 /* Should the interworking branches be here also? */
12374 if ((info->shared || globals->root.is_relocatable_executable)
12375 && (sec->flags & SEC_ALLOC) != 0)
12376 {
12377 if (h == NULL
12378 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12379 {
12380 call_reloc_p = TRUE;
12381 may_need_local_target_p = TRUE;
12382 }
12383 else
12384 may_become_dynamic_p = TRUE;
12385 }
12386 else
12387 may_need_local_target_p = TRUE;
12388 break;
12389
12390 default:
12391 break;
12392 }
12393
12394 if (may_need_local_target_p
12395 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12396 {
12397 /* If PLT refcount book-keeping is wrong and too low, we'll
12398 see a zero value (going to -1) for the root PLT reference
12399 count. */
12400 if (root_plt->refcount >= 0)
12401 {
12402 BFD_ASSERT (root_plt->refcount != 0);
12403 root_plt->refcount -= 1;
12404 }
12405 else
12406 /* A value of -1 means the symbol has become local, forced
12407 or seeing a hidden definition. Any other negative value
12408 is an error. */
12409 BFD_ASSERT (root_plt->refcount == -1);
12410
12411 if (!call_reloc_p)
12412 arm_plt->noncall_refcount--;
12413
12414 if (r_type == R_ARM_THM_CALL)
12415 arm_plt->maybe_thumb_refcount--;
12416
12417 if (r_type == R_ARM_THM_JUMP24
12418 || r_type == R_ARM_THM_JUMP19)
12419 arm_plt->thumb_refcount--;
12420 }
12421
12422 if (may_become_dynamic_p)
12423 {
12424 struct elf_dyn_relocs **pp;
12425 struct elf_dyn_relocs *p;
12426
12427 if (h != NULL)
12428 pp = &(eh->dyn_relocs);
12429 else
12430 {
12431 Elf_Internal_Sym *isym;
12432
12433 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12434 abfd, r_symndx);
12435 if (isym == NULL)
12436 return FALSE;
12437 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12438 if (pp == NULL)
12439 return FALSE;
12440 }
12441 for (; (p = *pp) != NULL; pp = &p->next)
12442 if (p->sec == sec)
12443 {
12444 /* Everything must go for SEC. */
12445 *pp = p->next;
12446 break;
12447 }
12448 }
12449 }
12450
12451 return TRUE;
12452 }
12453
12454 /* Look through the relocs for a section during the first phase. */
12455
12456 static bfd_boolean
12457 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12458 asection *sec, const Elf_Internal_Rela *relocs)
12459 {
12460 Elf_Internal_Shdr *symtab_hdr;
12461 struct elf_link_hash_entry **sym_hashes;
12462 const Elf_Internal_Rela *rel;
12463 const Elf_Internal_Rela *rel_end;
12464 bfd *dynobj;
12465 asection *sreloc;
12466 struct elf32_arm_link_hash_table *htab;
12467 bfd_boolean call_reloc_p;
12468 bfd_boolean may_become_dynamic_p;
12469 bfd_boolean may_need_local_target_p;
12470 unsigned long nsyms;
12471
12472 if (info->relocatable)
12473 return TRUE;
12474
12475 BFD_ASSERT (is_arm_elf (abfd));
12476
12477 htab = elf32_arm_hash_table (info);
12478 if (htab == NULL)
12479 return FALSE;
12480
12481 sreloc = NULL;
12482
12483 /* Create dynamic sections for relocatable executables so that we can
12484 copy relocations. */
12485 if (htab->root.is_relocatable_executable
12486 && ! htab->root.dynamic_sections_created)
12487 {
12488 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12489 return FALSE;
12490 }
12491
12492 if (htab->root.dynobj == NULL)
12493 htab->root.dynobj = abfd;
12494 if (!create_ifunc_sections (info))
12495 return FALSE;
12496
12497 dynobj = htab->root.dynobj;
12498
12499 symtab_hdr = & elf_symtab_hdr (abfd);
12500 sym_hashes = elf_sym_hashes (abfd);
12501 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12502
12503 rel_end = relocs + sec->reloc_count;
12504 for (rel = relocs; rel < rel_end; rel++)
12505 {
12506 Elf_Internal_Sym *isym;
12507 struct elf_link_hash_entry *h;
12508 struct elf32_arm_link_hash_entry *eh;
12509 unsigned long r_symndx;
12510 int r_type;
12511
12512 r_symndx = ELF32_R_SYM (rel->r_info);
12513 r_type = ELF32_R_TYPE (rel->r_info);
12514 r_type = arm_real_reloc_type (htab, r_type);
12515
12516 if (r_symndx >= nsyms
12517 /* PR 9934: It is possible to have relocations that do not
12518 refer to symbols, thus it is also possible to have an
12519 object file containing relocations but no symbol table. */
12520 && (r_symndx > STN_UNDEF || nsyms > 0))
12521 {
12522 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12523 r_symndx);
12524 return FALSE;
12525 }
12526
12527 h = NULL;
12528 isym = NULL;
12529 if (nsyms > 0)
12530 {
12531 if (r_symndx < symtab_hdr->sh_info)
12532 {
12533 /* A local symbol. */
12534 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12535 abfd, r_symndx);
12536 if (isym == NULL)
12537 return FALSE;
12538 }
12539 else
12540 {
12541 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12542 while (h->root.type == bfd_link_hash_indirect
12543 || h->root.type == bfd_link_hash_warning)
12544 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12545
12546 /* PR15323, ref flags aren't set for references in the
12547 same object. */
12548 h->root.non_ir_ref = 1;
12549 }
12550 }
12551
12552 eh = (struct elf32_arm_link_hash_entry *) h;
12553
12554 call_reloc_p = FALSE;
12555 may_become_dynamic_p = FALSE;
12556 may_need_local_target_p = FALSE;
12557
12558 /* Could be done earlier, if h were already available. */
12559 r_type = elf32_arm_tls_transition (info, r_type, h);
12560 switch (r_type)
12561 {
12562 case R_ARM_GOT32:
12563 case R_ARM_GOT_PREL:
12564 case R_ARM_TLS_GD32:
12565 case R_ARM_TLS_IE32:
12566 case R_ARM_TLS_GOTDESC:
12567 case R_ARM_TLS_DESCSEQ:
12568 case R_ARM_THM_TLS_DESCSEQ:
12569 case R_ARM_TLS_CALL:
12570 case R_ARM_THM_TLS_CALL:
12571 /* This symbol requires a global offset table entry. */
12572 {
12573 int tls_type, old_tls_type;
12574
12575 switch (r_type)
12576 {
12577 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12578
12579 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12580
12581 case R_ARM_TLS_GOTDESC:
12582 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12583 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12584 tls_type = GOT_TLS_GDESC; break;
12585
12586 default: tls_type = GOT_NORMAL; break;
12587 }
12588
12589 if (h != NULL)
12590 {
12591 h->got.refcount++;
12592 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12593 }
12594 else
12595 {
12596 /* This is a global offset table entry for a local symbol. */
12597 if (!elf32_arm_allocate_local_sym_info (abfd))
12598 return FALSE;
12599 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12600 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12601 }
12602
12603 /* If a variable is accessed with both tls methods, two
12604 slots may be created. */
12605 if (GOT_TLS_GD_ANY_P (old_tls_type)
12606 && GOT_TLS_GD_ANY_P (tls_type))
12607 tls_type |= old_tls_type;
12608
12609 /* We will already have issued an error message if there
12610 is a TLS/non-TLS mismatch, based on the symbol
12611 type. So just combine any TLS types needed. */
12612 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12613 && tls_type != GOT_NORMAL)
12614 tls_type |= old_tls_type;
12615
12616 /* If the symbol is accessed in both IE and GDESC
12617 method, we're able to relax. Turn off the GDESC flag,
12618 without messing up with any other kind of tls types
12619 that may be involved */
12620 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12621 tls_type &= ~GOT_TLS_GDESC;
12622
12623 if (old_tls_type != tls_type)
12624 {
12625 if (h != NULL)
12626 elf32_arm_hash_entry (h)->tls_type = tls_type;
12627 else
12628 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12629 }
12630 }
12631 /* Fall through. */
12632
12633 case R_ARM_TLS_LDM32:
12634 if (r_type == R_ARM_TLS_LDM32)
12635 htab->tls_ldm_got.refcount++;
12636 /* Fall through. */
12637
12638 case R_ARM_GOTOFF32:
12639 case R_ARM_GOTPC:
12640 if (htab->root.sgot == NULL
12641 && !create_got_section (htab->root.dynobj, info))
12642 return FALSE;
12643 break;
12644
12645 case R_ARM_PC24:
12646 case R_ARM_PLT32:
12647 case R_ARM_CALL:
12648 case R_ARM_JUMP24:
12649 case R_ARM_PREL31:
12650 case R_ARM_THM_CALL:
12651 case R_ARM_THM_JUMP24:
12652 case R_ARM_THM_JUMP19:
12653 call_reloc_p = TRUE;
12654 may_need_local_target_p = TRUE;
12655 break;
12656
12657 case R_ARM_ABS12:
12658 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12659 ldr __GOTT_INDEX__ offsets. */
12660 if (!htab->vxworks_p)
12661 {
12662 may_need_local_target_p = TRUE;
12663 break;
12664 }
12665 /* Fall through. */
12666
12667 case R_ARM_MOVW_ABS_NC:
12668 case R_ARM_MOVT_ABS:
12669 case R_ARM_THM_MOVW_ABS_NC:
12670 case R_ARM_THM_MOVT_ABS:
12671 if (info->shared)
12672 {
12673 (*_bfd_error_handler)
12674 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12675 abfd, elf32_arm_howto_table_1[r_type].name,
12676 (h) ? h->root.root.string : "a local symbol");
12677 bfd_set_error (bfd_error_bad_value);
12678 return FALSE;
12679 }
12680
12681 /* Fall through. */
12682 case R_ARM_ABS32:
12683 case R_ARM_ABS32_NOI:
12684 case R_ARM_REL32:
12685 case R_ARM_REL32_NOI:
12686 case R_ARM_MOVW_PREL_NC:
12687 case R_ARM_MOVT_PREL:
12688 case R_ARM_THM_MOVW_PREL_NC:
12689 case R_ARM_THM_MOVT_PREL:
12690
12691 /* Should the interworking branches be listed here? */
12692 if ((info->shared || htab->root.is_relocatable_executable)
12693 && (sec->flags & SEC_ALLOC) != 0)
12694 {
12695 if (h == NULL
12696 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12697 {
12698 /* In shared libraries and relocatable executables,
12699 we treat local relative references as calls;
12700 see the related SYMBOL_CALLS_LOCAL code in
12701 allocate_dynrelocs. */
12702 call_reloc_p = TRUE;
12703 may_need_local_target_p = TRUE;
12704 }
12705 else
12706 /* We are creating a shared library or relocatable
12707 executable, and this is a reloc against a global symbol,
12708 or a non-PC-relative reloc against a local symbol.
12709 We may need to copy the reloc into the output. */
12710 may_become_dynamic_p = TRUE;
12711 }
12712 else
12713 may_need_local_target_p = TRUE;
12714 break;
12715
12716 /* This relocation describes the C++ object vtable hierarchy.
12717 Reconstruct it for later use during GC. */
12718 case R_ARM_GNU_VTINHERIT:
12719 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12720 return FALSE;
12721 break;
12722
12723 /* This relocation describes which C++ vtable entries are actually
12724 used. Record for later use during GC. */
12725 case R_ARM_GNU_VTENTRY:
12726 BFD_ASSERT (h != NULL);
12727 if (h != NULL
12728 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12729 return FALSE;
12730 break;
12731 }
12732
12733 if (h != NULL)
12734 {
12735 if (call_reloc_p)
12736 /* We may need a .plt entry if the function this reloc
12737 refers to is in a different object, regardless of the
12738 symbol's type. We can't tell for sure yet, because
12739 something later might force the symbol local. */
12740 h->needs_plt = 1;
12741 else if (may_need_local_target_p)
12742 /* If this reloc is in a read-only section, we might
12743 need a copy reloc. We can't check reliably at this
12744 stage whether the section is read-only, as input
12745 sections have not yet been mapped to output sections.
12746 Tentatively set the flag for now, and correct in
12747 adjust_dynamic_symbol. */
12748 h->non_got_ref = 1;
12749 }
12750
12751 if (may_need_local_target_p
12752 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12753 {
12754 union gotplt_union *root_plt;
12755 struct arm_plt_info *arm_plt;
12756 struct arm_local_iplt_info *local_iplt;
12757
12758 if (h != NULL)
12759 {
12760 root_plt = &h->plt;
12761 arm_plt = &eh->plt;
12762 }
12763 else
12764 {
12765 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12766 if (local_iplt == NULL)
12767 return FALSE;
12768 root_plt = &local_iplt->root;
12769 arm_plt = &local_iplt->arm;
12770 }
12771
12772 /* If the symbol is a function that doesn't bind locally,
12773 this relocation will need a PLT entry. */
12774 if (root_plt->refcount != -1)
12775 root_plt->refcount += 1;
12776
12777 if (!call_reloc_p)
12778 arm_plt->noncall_refcount++;
12779
12780 /* It's too early to use htab->use_blx here, so we have to
12781 record possible blx references separately from
12782 relocs that definitely need a thumb stub. */
12783
12784 if (r_type == R_ARM_THM_CALL)
12785 arm_plt->maybe_thumb_refcount += 1;
12786
12787 if (r_type == R_ARM_THM_JUMP24
12788 || r_type == R_ARM_THM_JUMP19)
12789 arm_plt->thumb_refcount += 1;
12790 }
12791
12792 if (may_become_dynamic_p)
12793 {
12794 struct elf_dyn_relocs *p, **head;
12795
12796 /* Create a reloc section in dynobj. */
12797 if (sreloc == NULL)
12798 {
12799 sreloc = _bfd_elf_make_dynamic_reloc_section
12800 (sec, dynobj, 2, abfd, ! htab->use_rel);
12801
12802 if (sreloc == NULL)
12803 return FALSE;
12804
12805 /* BPABI objects never have dynamic relocations mapped. */
12806 if (htab->symbian_p)
12807 {
12808 flagword flags;
12809
12810 flags = bfd_get_section_flags (dynobj, sreloc);
12811 flags &= ~(SEC_LOAD | SEC_ALLOC);
12812 bfd_set_section_flags (dynobj, sreloc, flags);
12813 }
12814 }
12815
12816 /* If this is a global symbol, count the number of
12817 relocations we need for this symbol. */
12818 if (h != NULL)
12819 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12820 else
12821 {
12822 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12823 if (head == NULL)
12824 return FALSE;
12825 }
12826
12827 p = *head;
12828 if (p == NULL || p->sec != sec)
12829 {
12830 bfd_size_type amt = sizeof *p;
12831
12832 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12833 if (p == NULL)
12834 return FALSE;
12835 p->next = *head;
12836 *head = p;
12837 p->sec = sec;
12838 p->count = 0;
12839 p->pc_count = 0;
12840 }
12841
12842 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12843 p->pc_count += 1;
12844 p->count += 1;
12845 }
12846 }
12847
12848 return TRUE;
12849 }
12850
12851 /* Unwinding tables are not referenced directly. This pass marks them as
12852 required if the corresponding code section is marked. */
12853
12854 static bfd_boolean
12855 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12856 elf_gc_mark_hook_fn gc_mark_hook)
12857 {
12858 bfd *sub;
12859 Elf_Internal_Shdr **elf_shdrp;
12860 bfd_boolean again;
12861
12862 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12863
12864 /* Marking EH data may cause additional code sections to be marked,
12865 requiring multiple passes. */
12866 again = TRUE;
12867 while (again)
12868 {
12869 again = FALSE;
12870 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12871 {
12872 asection *o;
12873
12874 if (! is_arm_elf (sub))
12875 continue;
12876
12877 elf_shdrp = elf_elfsections (sub);
12878 for (o = sub->sections; o != NULL; o = o->next)
12879 {
12880 Elf_Internal_Shdr *hdr;
12881
12882 hdr = &elf_section_data (o)->this_hdr;
12883 if (hdr->sh_type == SHT_ARM_EXIDX
12884 && hdr->sh_link
12885 && hdr->sh_link < elf_numsections (sub)
12886 && !o->gc_mark
12887 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12888 {
12889 again = TRUE;
12890 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12891 return FALSE;
12892 }
12893 }
12894 }
12895 }
12896
12897 return TRUE;
12898 }
12899
12900 /* Treat mapping symbols as special target symbols. */
12901
12902 static bfd_boolean
12903 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12904 {
12905 return bfd_is_arm_special_symbol_name (sym->name,
12906 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12907 }
12908
12909 /* This is a copy of elf_find_function() from elf.c except that
12910 ARM mapping symbols are ignored when looking for function names
12911 and STT_ARM_TFUNC is considered to a function type. */
12912
12913 static bfd_boolean
12914 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12915 asection * section,
12916 asymbol ** symbols,
12917 bfd_vma offset,
12918 const char ** filename_ptr,
12919 const char ** functionname_ptr)
12920 {
12921 const char * filename = NULL;
12922 asymbol * func = NULL;
12923 bfd_vma low_func = 0;
12924 asymbol ** p;
12925
12926 for (p = symbols; *p != NULL; p++)
12927 {
12928 elf_symbol_type *q;
12929
12930 q = (elf_symbol_type *) *p;
12931
12932 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12933 {
12934 default:
12935 break;
12936 case STT_FILE:
12937 filename = bfd_asymbol_name (&q->symbol);
12938 break;
12939 case STT_FUNC:
12940 case STT_ARM_TFUNC:
12941 case STT_NOTYPE:
12942 /* Skip mapping symbols. */
12943 if ((q->symbol.flags & BSF_LOCAL)
12944 && bfd_is_arm_special_symbol_name (q->symbol.name,
12945 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12946 continue;
12947 /* Fall through. */
12948 if (bfd_get_section (&q->symbol) == section
12949 && q->symbol.value >= low_func
12950 && q->symbol.value <= offset)
12951 {
12952 func = (asymbol *) q;
12953 low_func = q->symbol.value;
12954 }
12955 break;
12956 }
12957 }
12958
12959 if (func == NULL)
12960 return FALSE;
12961
12962 if (filename_ptr)
12963 *filename_ptr = filename;
12964 if (functionname_ptr)
12965 *functionname_ptr = bfd_asymbol_name (func);
12966
12967 return TRUE;
12968 }
12969
12970
12971 /* Find the nearest line to a particular section and offset, for error
12972 reporting. This code is a duplicate of the code in elf.c, except
12973 that it uses arm_elf_find_function. */
12974
12975 static bfd_boolean
12976 elf32_arm_find_nearest_line (bfd * abfd,
12977 asection * section,
12978 asymbol ** symbols,
12979 bfd_vma offset,
12980 const char ** filename_ptr,
12981 const char ** functionname_ptr,
12982 unsigned int * line_ptr)
12983 {
12984 bfd_boolean found = FALSE;
12985
12986 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12987
12988 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12989 section, symbols, offset,
12990 filename_ptr, functionname_ptr,
12991 line_ptr, NULL, 0,
12992 & elf_tdata (abfd)->dwarf2_find_line_info))
12993 {
12994 if (!*functionname_ptr)
12995 arm_elf_find_function (abfd, section, symbols, offset,
12996 *filename_ptr ? NULL : filename_ptr,
12997 functionname_ptr);
12998
12999 return TRUE;
13000 }
13001
13002 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13003 & found, filename_ptr,
13004 functionname_ptr, line_ptr,
13005 & elf_tdata (abfd)->line_info))
13006 return FALSE;
13007
13008 if (found && (*functionname_ptr || *line_ptr))
13009 return TRUE;
13010
13011 if (symbols == NULL)
13012 return FALSE;
13013
13014 if (! arm_elf_find_function (abfd, section, symbols, offset,
13015 filename_ptr, functionname_ptr))
13016 return FALSE;
13017
13018 *line_ptr = 0;
13019 return TRUE;
13020 }
13021
13022 static bfd_boolean
13023 elf32_arm_find_inliner_info (bfd * abfd,
13024 const char ** filename_ptr,
13025 const char ** functionname_ptr,
13026 unsigned int * line_ptr)
13027 {
13028 bfd_boolean found;
13029 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13030 functionname_ptr, line_ptr,
13031 & elf_tdata (abfd)->dwarf2_find_line_info);
13032 return found;
13033 }
13034
13035 /* Adjust a symbol defined by a dynamic object and referenced by a
13036 regular object. The current definition is in some section of the
13037 dynamic object, but we're not including those sections. We have to
13038 change the definition to something the rest of the link can
13039 understand. */
13040
13041 static bfd_boolean
13042 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13043 struct elf_link_hash_entry * h)
13044 {
13045 bfd * dynobj;
13046 asection * s;
13047 struct elf32_arm_link_hash_entry * eh;
13048 struct elf32_arm_link_hash_table *globals;
13049
13050 globals = elf32_arm_hash_table (info);
13051 if (globals == NULL)
13052 return FALSE;
13053
13054 dynobj = elf_hash_table (info)->dynobj;
13055
13056 /* Make sure we know what is going on here. */
13057 BFD_ASSERT (dynobj != NULL
13058 && (h->needs_plt
13059 || h->type == STT_GNU_IFUNC
13060 || h->u.weakdef != NULL
13061 || (h->def_dynamic
13062 && h->ref_regular
13063 && !h->def_regular)));
13064
13065 eh = (struct elf32_arm_link_hash_entry *) h;
13066
13067 /* If this is a function, put it in the procedure linkage table. We
13068 will fill in the contents of the procedure linkage table later,
13069 when we know the address of the .got section. */
13070 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13071 {
13072 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13073 symbol binds locally. */
13074 if (h->plt.refcount <= 0
13075 || (h->type != STT_GNU_IFUNC
13076 && (SYMBOL_CALLS_LOCAL (info, h)
13077 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13078 && h->root.type == bfd_link_hash_undefweak))))
13079 {
13080 /* This case can occur if we saw a PLT32 reloc in an input
13081 file, but the symbol was never referred to by a dynamic
13082 object, or if all references were garbage collected. In
13083 such a case, we don't actually need to build a procedure
13084 linkage table, and we can just do a PC24 reloc instead. */
13085 h->plt.offset = (bfd_vma) -1;
13086 eh->plt.thumb_refcount = 0;
13087 eh->plt.maybe_thumb_refcount = 0;
13088 eh->plt.noncall_refcount = 0;
13089 h->needs_plt = 0;
13090 }
13091
13092 return TRUE;
13093 }
13094 else
13095 {
13096 /* It's possible that we incorrectly decided a .plt reloc was
13097 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13098 in check_relocs. We can't decide accurately between function
13099 and non-function syms in check-relocs; Objects loaded later in
13100 the link may change h->type. So fix it now. */
13101 h->plt.offset = (bfd_vma) -1;
13102 eh->plt.thumb_refcount = 0;
13103 eh->plt.maybe_thumb_refcount = 0;
13104 eh->plt.noncall_refcount = 0;
13105 }
13106
13107 /* If this is a weak symbol, and there is a real definition, the
13108 processor independent code will have arranged for us to see the
13109 real definition first, and we can just use the same value. */
13110 if (h->u.weakdef != NULL)
13111 {
13112 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13113 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13114 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13115 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13116 return TRUE;
13117 }
13118
13119 /* If there are no non-GOT references, we do not need a copy
13120 relocation. */
13121 if (!h->non_got_ref)
13122 return TRUE;
13123
13124 /* This is a reference to a symbol defined by a dynamic object which
13125 is not a function. */
13126
13127 /* If we are creating a shared library, we must presume that the
13128 only references to the symbol are via the global offset table.
13129 For such cases we need not do anything here; the relocations will
13130 be handled correctly by relocate_section. Relocatable executables
13131 can reference data in shared objects directly, so we don't need to
13132 do anything here. */
13133 if (info->shared || globals->root.is_relocatable_executable)
13134 return TRUE;
13135
13136 /* We must allocate the symbol in our .dynbss section, which will
13137 become part of the .bss section of the executable. There will be
13138 an entry for this symbol in the .dynsym section. The dynamic
13139 object will contain position independent code, so all references
13140 from the dynamic object to this symbol will go through the global
13141 offset table. The dynamic linker will use the .dynsym entry to
13142 determine the address it must put in the global offset table, so
13143 both the dynamic object and the regular object will refer to the
13144 same memory location for the variable. */
13145 s = bfd_get_linker_section (dynobj, ".dynbss");
13146 BFD_ASSERT (s != NULL);
13147
13148 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13149 copy the initial value out of the dynamic object and into the
13150 runtime process image. We need to remember the offset into the
13151 .rel(a).bss section we are going to use. */
13152 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13153 {
13154 asection *srel;
13155
13156 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13157 elf32_arm_allocate_dynrelocs (info, srel, 1);
13158 h->needs_copy = 1;
13159 }
13160
13161 return _bfd_elf_adjust_dynamic_copy (h, s);
13162 }
13163
13164 /* Allocate space in .plt, .got and associated reloc sections for
13165 dynamic relocs. */
13166
13167 static bfd_boolean
13168 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13169 {
13170 struct bfd_link_info *info;
13171 struct elf32_arm_link_hash_table *htab;
13172 struct elf32_arm_link_hash_entry *eh;
13173 struct elf_dyn_relocs *p;
13174
13175 if (h->root.type == bfd_link_hash_indirect)
13176 return TRUE;
13177
13178 eh = (struct elf32_arm_link_hash_entry *) h;
13179
13180 info = (struct bfd_link_info *) inf;
13181 htab = elf32_arm_hash_table (info);
13182 if (htab == NULL)
13183 return FALSE;
13184
13185 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13186 && h->plt.refcount > 0)
13187 {
13188 /* Make sure this symbol is output as a dynamic symbol.
13189 Undefined weak syms won't yet be marked as dynamic. */
13190 if (h->dynindx == -1
13191 && !h->forced_local)
13192 {
13193 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13194 return FALSE;
13195 }
13196
13197 /* If the call in the PLT entry binds locally, the associated
13198 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13199 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13200 than the .plt section. */
13201 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13202 {
13203 eh->is_iplt = 1;
13204 if (eh->plt.noncall_refcount == 0
13205 && SYMBOL_REFERENCES_LOCAL (info, h))
13206 /* All non-call references can be resolved directly.
13207 This means that they can (and in some cases, must)
13208 resolve directly to the run-time target, rather than
13209 to the PLT. That in turns means that any .got entry
13210 would be equal to the .igot.plt entry, so there's
13211 no point having both. */
13212 h->got.refcount = 0;
13213 }
13214
13215 if (info->shared
13216 || eh->is_iplt
13217 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13218 {
13219 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13220
13221 /* If this symbol is not defined in a regular file, and we are
13222 not generating a shared library, then set the symbol to this
13223 location in the .plt. This is required to make function
13224 pointers compare as equal between the normal executable and
13225 the shared library. */
13226 if (! info->shared
13227 && !h->def_regular)
13228 {
13229 h->root.u.def.section = htab->root.splt;
13230 h->root.u.def.value = h->plt.offset;
13231
13232 /* Make sure the function is not marked as Thumb, in case
13233 it is the target of an ABS32 relocation, which will
13234 point to the PLT entry. */
13235 h->target_internal = ST_BRANCH_TO_ARM;
13236 }
13237
13238 htab->next_tls_desc_index++;
13239
13240 /* VxWorks executables have a second set of relocations for
13241 each PLT entry. They go in a separate relocation section,
13242 which is processed by the kernel loader. */
13243 if (htab->vxworks_p && !info->shared)
13244 {
13245 /* There is a relocation for the initial PLT entry:
13246 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13247 if (h->plt.offset == htab->plt_header_size)
13248 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13249
13250 /* There are two extra relocations for each subsequent
13251 PLT entry: an R_ARM_32 relocation for the GOT entry,
13252 and an R_ARM_32 relocation for the PLT entry. */
13253 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13254 }
13255 }
13256 else
13257 {
13258 h->plt.offset = (bfd_vma) -1;
13259 h->needs_plt = 0;
13260 }
13261 }
13262 else
13263 {
13264 h->plt.offset = (bfd_vma) -1;
13265 h->needs_plt = 0;
13266 }
13267
13268 eh = (struct elf32_arm_link_hash_entry *) h;
13269 eh->tlsdesc_got = (bfd_vma) -1;
13270
13271 if (h->got.refcount > 0)
13272 {
13273 asection *s;
13274 bfd_boolean dyn;
13275 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13276 int indx;
13277
13278 /* Make sure this symbol is output as a dynamic symbol.
13279 Undefined weak syms won't yet be marked as dynamic. */
13280 if (h->dynindx == -1
13281 && !h->forced_local)
13282 {
13283 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13284 return FALSE;
13285 }
13286
13287 if (!htab->symbian_p)
13288 {
13289 s = htab->root.sgot;
13290 h->got.offset = s->size;
13291
13292 if (tls_type == GOT_UNKNOWN)
13293 abort ();
13294
13295 if (tls_type == GOT_NORMAL)
13296 /* Non-TLS symbols need one GOT slot. */
13297 s->size += 4;
13298 else
13299 {
13300 if (tls_type & GOT_TLS_GDESC)
13301 {
13302 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13303 eh->tlsdesc_got
13304 = (htab->root.sgotplt->size
13305 - elf32_arm_compute_jump_table_size (htab));
13306 htab->root.sgotplt->size += 8;
13307 h->got.offset = (bfd_vma) -2;
13308 /* plt.got_offset needs to know there's a TLS_DESC
13309 reloc in the middle of .got.plt. */
13310 htab->num_tls_desc++;
13311 }
13312
13313 if (tls_type & GOT_TLS_GD)
13314 {
13315 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13316 the symbol is both GD and GDESC, got.offset may
13317 have been overwritten. */
13318 h->got.offset = s->size;
13319 s->size += 8;
13320 }
13321
13322 if (tls_type & GOT_TLS_IE)
13323 /* R_ARM_TLS_IE32 needs one GOT slot. */
13324 s->size += 4;
13325 }
13326
13327 dyn = htab->root.dynamic_sections_created;
13328
13329 indx = 0;
13330 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13331 && (!info->shared
13332 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13333 indx = h->dynindx;
13334
13335 if (tls_type != GOT_NORMAL
13336 && (info->shared || indx != 0)
13337 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13338 || h->root.type != bfd_link_hash_undefweak))
13339 {
13340 if (tls_type & GOT_TLS_IE)
13341 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13342
13343 if (tls_type & GOT_TLS_GD)
13344 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13345
13346 if (tls_type & GOT_TLS_GDESC)
13347 {
13348 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13349 /* GDESC needs a trampoline to jump to. */
13350 htab->tls_trampoline = -1;
13351 }
13352
13353 /* Only GD needs it. GDESC just emits one relocation per
13354 2 entries. */
13355 if ((tls_type & GOT_TLS_GD) && indx != 0)
13356 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13357 }
13358 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
13359 {
13360 if (htab->root.dynamic_sections_created)
13361 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13362 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13363 }
13364 else if (h->type == STT_GNU_IFUNC
13365 && eh->plt.noncall_refcount == 0)
13366 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13367 they all resolve dynamically instead. Reserve room for the
13368 GOT entry's R_ARM_IRELATIVE relocation. */
13369 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13370 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13371 || h->root.type != bfd_link_hash_undefweak))
13372 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13373 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13374 }
13375 }
13376 else
13377 h->got.offset = (bfd_vma) -1;
13378
13379 /* Allocate stubs for exported Thumb functions on v4t. */
13380 if (!htab->use_blx && h->dynindx != -1
13381 && h->def_regular
13382 && h->target_internal == ST_BRANCH_TO_THUMB
13383 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13384 {
13385 struct elf_link_hash_entry * th;
13386 struct bfd_link_hash_entry * bh;
13387 struct elf_link_hash_entry * myh;
13388 char name[1024];
13389 asection *s;
13390 bh = NULL;
13391 /* Create a new symbol to regist the real location of the function. */
13392 s = h->root.u.def.section;
13393 sprintf (name, "__real_%s", h->root.root.string);
13394 _bfd_generic_link_add_one_symbol (info, s->owner,
13395 name, BSF_GLOBAL, s,
13396 h->root.u.def.value,
13397 NULL, TRUE, FALSE, &bh);
13398
13399 myh = (struct elf_link_hash_entry *) bh;
13400 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13401 myh->forced_local = 1;
13402 myh->target_internal = ST_BRANCH_TO_THUMB;
13403 eh->export_glue = myh;
13404 th = record_arm_to_thumb_glue (info, h);
13405 /* Point the symbol at the stub. */
13406 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13407 h->target_internal = ST_BRANCH_TO_ARM;
13408 h->root.u.def.section = th->root.u.def.section;
13409 h->root.u.def.value = th->root.u.def.value & ~1;
13410 }
13411
13412 if (eh->dyn_relocs == NULL)
13413 return TRUE;
13414
13415 /* In the shared -Bsymbolic case, discard space allocated for
13416 dynamic pc-relative relocs against symbols which turn out to be
13417 defined in regular objects. For the normal shared case, discard
13418 space for pc-relative relocs that have become local due to symbol
13419 visibility changes. */
13420
13421 if (info->shared || htab->root.is_relocatable_executable)
13422 {
13423 /* The only relocs that use pc_count are R_ARM_REL32 and
13424 R_ARM_REL32_NOI, which will appear on something like
13425 ".long foo - .". We want calls to protected symbols to resolve
13426 directly to the function rather than going via the plt. If people
13427 want function pointer comparisons to work as expected then they
13428 should avoid writing assembly like ".long foo - .". */
13429 if (SYMBOL_CALLS_LOCAL (info, h))
13430 {
13431 struct elf_dyn_relocs **pp;
13432
13433 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13434 {
13435 p->count -= p->pc_count;
13436 p->pc_count = 0;
13437 if (p->count == 0)
13438 *pp = p->next;
13439 else
13440 pp = &p->next;
13441 }
13442 }
13443
13444 if (htab->vxworks_p)
13445 {
13446 struct elf_dyn_relocs **pp;
13447
13448 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13449 {
13450 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13451 *pp = p->next;
13452 else
13453 pp = &p->next;
13454 }
13455 }
13456
13457 /* Also discard relocs on undefined weak syms with non-default
13458 visibility. */
13459 if (eh->dyn_relocs != NULL
13460 && h->root.type == bfd_link_hash_undefweak)
13461 {
13462 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13463 eh->dyn_relocs = NULL;
13464
13465 /* Make sure undefined weak symbols are output as a dynamic
13466 symbol in PIEs. */
13467 else if (h->dynindx == -1
13468 && !h->forced_local)
13469 {
13470 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13471 return FALSE;
13472 }
13473 }
13474
13475 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13476 && h->root.type == bfd_link_hash_new)
13477 {
13478 /* Output absolute symbols so that we can create relocations
13479 against them. For normal symbols we output a relocation
13480 against the section that contains them. */
13481 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13482 return FALSE;
13483 }
13484
13485 }
13486 else
13487 {
13488 /* For the non-shared case, discard space for relocs against
13489 symbols which turn out to need copy relocs or are not
13490 dynamic. */
13491
13492 if (!h->non_got_ref
13493 && ((h->def_dynamic
13494 && !h->def_regular)
13495 || (htab->root.dynamic_sections_created
13496 && (h->root.type == bfd_link_hash_undefweak
13497 || h->root.type == bfd_link_hash_undefined))))
13498 {
13499 /* Make sure this symbol is output as a dynamic symbol.
13500 Undefined weak syms won't yet be marked as dynamic. */
13501 if (h->dynindx == -1
13502 && !h->forced_local)
13503 {
13504 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13505 return FALSE;
13506 }
13507
13508 /* If that succeeded, we know we'll be keeping all the
13509 relocs. */
13510 if (h->dynindx != -1)
13511 goto keep;
13512 }
13513
13514 eh->dyn_relocs = NULL;
13515
13516 keep: ;
13517 }
13518
13519 /* Finally, allocate space. */
13520 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13521 {
13522 asection *sreloc = elf_section_data (p->sec)->sreloc;
13523 if (h->type == STT_GNU_IFUNC
13524 && eh->plt.noncall_refcount == 0
13525 && SYMBOL_REFERENCES_LOCAL (info, h))
13526 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13527 else
13528 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13529 }
13530
13531 return TRUE;
13532 }
13533
13534 /* Find any dynamic relocs that apply to read-only sections. */
13535
13536 static bfd_boolean
13537 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13538 {
13539 struct elf32_arm_link_hash_entry * eh;
13540 struct elf_dyn_relocs * p;
13541
13542 eh = (struct elf32_arm_link_hash_entry *) h;
13543 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13544 {
13545 asection *s = p->sec;
13546
13547 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13548 {
13549 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13550
13551 info->flags |= DF_TEXTREL;
13552
13553 /* Not an error, just cut short the traversal. */
13554 return FALSE;
13555 }
13556 }
13557 return TRUE;
13558 }
13559
13560 void
13561 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13562 int byteswap_code)
13563 {
13564 struct elf32_arm_link_hash_table *globals;
13565
13566 globals = elf32_arm_hash_table (info);
13567 if (globals == NULL)
13568 return;
13569
13570 globals->byteswap_code = byteswap_code;
13571 }
13572
13573 /* Set the sizes of the dynamic sections. */
13574
13575 static bfd_boolean
13576 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13577 struct bfd_link_info * info)
13578 {
13579 bfd * dynobj;
13580 asection * s;
13581 bfd_boolean plt;
13582 bfd_boolean relocs;
13583 bfd *ibfd;
13584 struct elf32_arm_link_hash_table *htab;
13585
13586 htab = elf32_arm_hash_table (info);
13587 if (htab == NULL)
13588 return FALSE;
13589
13590 dynobj = elf_hash_table (info)->dynobj;
13591 BFD_ASSERT (dynobj != NULL);
13592 check_use_blx (htab);
13593
13594 if (elf_hash_table (info)->dynamic_sections_created)
13595 {
13596 /* Set the contents of the .interp section to the interpreter. */
13597 if (info->executable)
13598 {
13599 s = bfd_get_linker_section (dynobj, ".interp");
13600 BFD_ASSERT (s != NULL);
13601 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13602 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13603 }
13604 }
13605
13606 /* Set up .got offsets for local syms, and space for local dynamic
13607 relocs. */
13608 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13609 {
13610 bfd_signed_vma *local_got;
13611 bfd_signed_vma *end_local_got;
13612 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13613 char *local_tls_type;
13614 bfd_vma *local_tlsdesc_gotent;
13615 bfd_size_type locsymcount;
13616 Elf_Internal_Shdr *symtab_hdr;
13617 asection *srel;
13618 bfd_boolean is_vxworks = htab->vxworks_p;
13619 unsigned int symndx;
13620
13621 if (! is_arm_elf (ibfd))
13622 continue;
13623
13624 for (s = ibfd->sections; s != NULL; s = s->next)
13625 {
13626 struct elf_dyn_relocs *p;
13627
13628 for (p = (struct elf_dyn_relocs *)
13629 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13630 {
13631 if (!bfd_is_abs_section (p->sec)
13632 && bfd_is_abs_section (p->sec->output_section))
13633 {
13634 /* Input section has been discarded, either because
13635 it is a copy of a linkonce section or due to
13636 linker script /DISCARD/, so we'll be discarding
13637 the relocs too. */
13638 }
13639 else if (is_vxworks
13640 && strcmp (p->sec->output_section->name,
13641 ".tls_vars") == 0)
13642 {
13643 /* Relocations in vxworks .tls_vars sections are
13644 handled specially by the loader. */
13645 }
13646 else if (p->count != 0)
13647 {
13648 srel = elf_section_data (p->sec)->sreloc;
13649 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13650 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13651 info->flags |= DF_TEXTREL;
13652 }
13653 }
13654 }
13655
13656 local_got = elf_local_got_refcounts (ibfd);
13657 if (!local_got)
13658 continue;
13659
13660 symtab_hdr = & elf_symtab_hdr (ibfd);
13661 locsymcount = symtab_hdr->sh_info;
13662 end_local_got = local_got + locsymcount;
13663 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13664 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13665 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13666 symndx = 0;
13667 s = htab->root.sgot;
13668 srel = htab->root.srelgot;
13669 for (; local_got < end_local_got;
13670 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13671 ++local_tlsdesc_gotent, ++symndx)
13672 {
13673 *local_tlsdesc_gotent = (bfd_vma) -1;
13674 local_iplt = *local_iplt_ptr;
13675 if (local_iplt != NULL)
13676 {
13677 struct elf_dyn_relocs *p;
13678
13679 if (local_iplt->root.refcount > 0)
13680 {
13681 elf32_arm_allocate_plt_entry (info, TRUE,
13682 &local_iplt->root,
13683 &local_iplt->arm);
13684 if (local_iplt->arm.noncall_refcount == 0)
13685 /* All references to the PLT are calls, so all
13686 non-call references can resolve directly to the
13687 run-time target. This means that the .got entry
13688 would be the same as the .igot.plt entry, so there's
13689 no point creating both. */
13690 *local_got = 0;
13691 }
13692 else
13693 {
13694 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13695 local_iplt->root.offset = (bfd_vma) -1;
13696 }
13697
13698 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13699 {
13700 asection *psrel;
13701
13702 psrel = elf_section_data (p->sec)->sreloc;
13703 if (local_iplt->arm.noncall_refcount == 0)
13704 elf32_arm_allocate_irelocs (info, psrel, p->count);
13705 else
13706 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13707 }
13708 }
13709 if (*local_got > 0)
13710 {
13711 Elf_Internal_Sym *isym;
13712
13713 *local_got = s->size;
13714 if (*local_tls_type & GOT_TLS_GD)
13715 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13716 s->size += 8;
13717 if (*local_tls_type & GOT_TLS_GDESC)
13718 {
13719 *local_tlsdesc_gotent = htab->root.sgotplt->size
13720 - elf32_arm_compute_jump_table_size (htab);
13721 htab->root.sgotplt->size += 8;
13722 *local_got = (bfd_vma) -2;
13723 /* plt.got_offset needs to know there's a TLS_DESC
13724 reloc in the middle of .got.plt. */
13725 htab->num_tls_desc++;
13726 }
13727 if (*local_tls_type & GOT_TLS_IE)
13728 s->size += 4;
13729
13730 if (*local_tls_type & GOT_NORMAL)
13731 {
13732 /* If the symbol is both GD and GDESC, *local_got
13733 may have been overwritten. */
13734 *local_got = s->size;
13735 s->size += 4;
13736 }
13737
13738 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13739 if (isym == NULL)
13740 return FALSE;
13741
13742 /* If all references to an STT_GNU_IFUNC PLT are calls,
13743 then all non-call references, including this GOT entry,
13744 resolve directly to the run-time target. */
13745 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13746 && (local_iplt == NULL
13747 || local_iplt->arm.noncall_refcount == 0))
13748 elf32_arm_allocate_irelocs (info, srel, 1);
13749 else if (info->shared || output_bfd->flags & DYNAMIC)
13750 {
13751 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13752 || *local_tls_type & GOT_TLS_GD)
13753 elf32_arm_allocate_dynrelocs (info, srel, 1);
13754
13755 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13756 {
13757 elf32_arm_allocate_dynrelocs (info,
13758 htab->root.srelplt, 1);
13759 htab->tls_trampoline = -1;
13760 }
13761 }
13762 }
13763 else
13764 *local_got = (bfd_vma) -1;
13765 }
13766 }
13767
13768 if (htab->tls_ldm_got.refcount > 0)
13769 {
13770 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13771 for R_ARM_TLS_LDM32 relocations. */
13772 htab->tls_ldm_got.offset = htab->root.sgot->size;
13773 htab->root.sgot->size += 8;
13774 if (info->shared)
13775 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13776 }
13777 else
13778 htab->tls_ldm_got.offset = -1;
13779
13780 /* Allocate global sym .plt and .got entries, and space for global
13781 sym dynamic relocs. */
13782 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13783
13784 /* Here we rummage through the found bfds to collect glue information. */
13785 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13786 {
13787 if (! is_arm_elf (ibfd))
13788 continue;
13789
13790 /* Initialise mapping tables for code/data. */
13791 bfd_elf32_arm_init_maps (ibfd);
13792
13793 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13794 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13795 /* xgettext:c-format */
13796 _bfd_error_handler (_("Errors encountered processing file %s"),
13797 ibfd->filename);
13798 }
13799
13800 /* Allocate space for the glue sections now that we've sized them. */
13801 bfd_elf32_arm_allocate_interworking_sections (info);
13802
13803 /* For every jump slot reserved in the sgotplt, reloc_count is
13804 incremented. However, when we reserve space for TLS descriptors,
13805 it's not incremented, so in order to compute the space reserved
13806 for them, it suffices to multiply the reloc count by the jump
13807 slot size. */
13808 if (htab->root.srelplt)
13809 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13810
13811 if (htab->tls_trampoline)
13812 {
13813 if (htab->root.splt->size == 0)
13814 htab->root.splt->size += htab->plt_header_size;
13815
13816 htab->tls_trampoline = htab->root.splt->size;
13817 htab->root.splt->size += htab->plt_entry_size;
13818
13819 /* If we're not using lazy TLS relocations, don't generate the
13820 PLT and GOT entries they require. */
13821 if (!(info->flags & DF_BIND_NOW))
13822 {
13823 htab->dt_tlsdesc_got = htab->root.sgot->size;
13824 htab->root.sgot->size += 4;
13825
13826 htab->dt_tlsdesc_plt = htab->root.splt->size;
13827 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13828 }
13829 }
13830
13831 /* The check_relocs and adjust_dynamic_symbol entry points have
13832 determined the sizes of the various dynamic sections. Allocate
13833 memory for them. */
13834 plt = FALSE;
13835 relocs = FALSE;
13836 for (s = dynobj->sections; s != NULL; s = s->next)
13837 {
13838 const char * name;
13839
13840 if ((s->flags & SEC_LINKER_CREATED) == 0)
13841 continue;
13842
13843 /* It's OK to base decisions on the section name, because none
13844 of the dynobj section names depend upon the input files. */
13845 name = bfd_get_section_name (dynobj, s);
13846
13847 if (s == htab->root.splt)
13848 {
13849 /* Remember whether there is a PLT. */
13850 plt = s->size != 0;
13851 }
13852 else if (CONST_STRNEQ (name, ".rel"))
13853 {
13854 if (s->size != 0)
13855 {
13856 /* Remember whether there are any reloc sections other
13857 than .rel(a).plt and .rela.plt.unloaded. */
13858 if (s != htab->root.srelplt && s != htab->srelplt2)
13859 relocs = TRUE;
13860
13861 /* We use the reloc_count field as a counter if we need
13862 to copy relocs into the output file. */
13863 s->reloc_count = 0;
13864 }
13865 }
13866 else if (s != htab->root.sgot
13867 && s != htab->root.sgotplt
13868 && s != htab->root.iplt
13869 && s != htab->root.igotplt
13870 && s != htab->sdynbss)
13871 {
13872 /* It's not one of our sections, so don't allocate space. */
13873 continue;
13874 }
13875
13876 if (s->size == 0)
13877 {
13878 /* If we don't need this section, strip it from the
13879 output file. This is mostly to handle .rel(a).bss and
13880 .rel(a).plt. We must create both sections in
13881 create_dynamic_sections, because they must be created
13882 before the linker maps input sections to output
13883 sections. The linker does that before
13884 adjust_dynamic_symbol is called, and it is that
13885 function which decides whether anything needs to go
13886 into these sections. */
13887 s->flags |= SEC_EXCLUDE;
13888 continue;
13889 }
13890
13891 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13892 continue;
13893
13894 /* Allocate memory for the section contents. */
13895 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13896 if (s->contents == NULL)
13897 return FALSE;
13898 }
13899
13900 if (elf_hash_table (info)->dynamic_sections_created)
13901 {
13902 /* Add some entries to the .dynamic section. We fill in the
13903 values later, in elf32_arm_finish_dynamic_sections, but we
13904 must add the entries now so that we get the correct size for
13905 the .dynamic section. The DT_DEBUG entry is filled in by the
13906 dynamic linker and used by the debugger. */
13907 #define add_dynamic_entry(TAG, VAL) \
13908 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13909
13910 if (info->executable)
13911 {
13912 if (!add_dynamic_entry (DT_DEBUG, 0))
13913 return FALSE;
13914 }
13915
13916 if (plt)
13917 {
13918 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13919 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13920 || !add_dynamic_entry (DT_PLTREL,
13921 htab->use_rel ? DT_REL : DT_RELA)
13922 || !add_dynamic_entry (DT_JMPREL, 0))
13923 return FALSE;
13924
13925 if (htab->dt_tlsdesc_plt &&
13926 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13927 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13928 return FALSE;
13929 }
13930
13931 if (relocs)
13932 {
13933 if (htab->use_rel)
13934 {
13935 if (!add_dynamic_entry (DT_REL, 0)
13936 || !add_dynamic_entry (DT_RELSZ, 0)
13937 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13938 return FALSE;
13939 }
13940 else
13941 {
13942 if (!add_dynamic_entry (DT_RELA, 0)
13943 || !add_dynamic_entry (DT_RELASZ, 0)
13944 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13945 return FALSE;
13946 }
13947 }
13948
13949 /* If any dynamic relocs apply to a read-only section,
13950 then we need a DT_TEXTREL entry. */
13951 if ((info->flags & DF_TEXTREL) == 0)
13952 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13953 info);
13954
13955 if ((info->flags & DF_TEXTREL) != 0)
13956 {
13957 if (!add_dynamic_entry (DT_TEXTREL, 0))
13958 return FALSE;
13959 }
13960 if (htab->vxworks_p
13961 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13962 return FALSE;
13963 }
13964 #undef add_dynamic_entry
13965
13966 return TRUE;
13967 }
13968
13969 /* Size sections even though they're not dynamic. We use it to setup
13970 _TLS_MODULE_BASE_, if needed. */
13971
13972 static bfd_boolean
13973 elf32_arm_always_size_sections (bfd *output_bfd,
13974 struct bfd_link_info *info)
13975 {
13976 asection *tls_sec;
13977
13978 if (info->relocatable)
13979 return TRUE;
13980
13981 tls_sec = elf_hash_table (info)->tls_sec;
13982
13983 if (tls_sec)
13984 {
13985 struct elf_link_hash_entry *tlsbase;
13986
13987 tlsbase = elf_link_hash_lookup
13988 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13989
13990 if (tlsbase)
13991 {
13992 struct bfd_link_hash_entry *bh = NULL;
13993 const struct elf_backend_data *bed
13994 = get_elf_backend_data (output_bfd);
13995
13996 if (!(_bfd_generic_link_add_one_symbol
13997 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13998 tls_sec, 0, NULL, FALSE,
13999 bed->collect, &bh)))
14000 return FALSE;
14001
14002 tlsbase->type = STT_TLS;
14003 tlsbase = (struct elf_link_hash_entry *)bh;
14004 tlsbase->def_regular = 1;
14005 tlsbase->other = STV_HIDDEN;
14006 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
14007 }
14008 }
14009 return TRUE;
14010 }
14011
14012 /* Finish up dynamic symbol handling. We set the contents of various
14013 dynamic sections here. */
14014
14015 static bfd_boolean
14016 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14017 struct bfd_link_info * info,
14018 struct elf_link_hash_entry * h,
14019 Elf_Internal_Sym * sym)
14020 {
14021 struct elf32_arm_link_hash_table *htab;
14022 struct elf32_arm_link_hash_entry *eh;
14023
14024 htab = elf32_arm_hash_table (info);
14025 if (htab == NULL)
14026 return FALSE;
14027
14028 eh = (struct elf32_arm_link_hash_entry *) h;
14029
14030 if (h->plt.offset != (bfd_vma) -1)
14031 {
14032 if (!eh->is_iplt)
14033 {
14034 BFD_ASSERT (h->dynindx != -1);
14035 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14036 h->dynindx, 0))
14037 return FALSE;
14038 }
14039
14040 if (!h->def_regular)
14041 {
14042 /* Mark the symbol as undefined, rather than as defined in
14043 the .plt section. Leave the value alone. */
14044 sym->st_shndx = SHN_UNDEF;
14045 /* If the symbol is weak, we do need to clear the value.
14046 Otherwise, the PLT entry would provide a definition for
14047 the symbol even if the symbol wasn't defined anywhere,
14048 and so the symbol would never be NULL. */
14049 if (!h->ref_regular_nonweak)
14050 sym->st_value = 0;
14051 }
14052 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14053 {
14054 /* At least one non-call relocation references this .iplt entry,
14055 so the .iplt entry is the function's canonical address. */
14056 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14057 sym->st_target_internal = ST_BRANCH_TO_ARM;
14058 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14059 (output_bfd, htab->root.iplt->output_section));
14060 sym->st_value = (h->plt.offset
14061 + htab->root.iplt->output_section->vma
14062 + htab->root.iplt->output_offset);
14063 }
14064 }
14065
14066 if (h->needs_copy)
14067 {
14068 asection * s;
14069 Elf_Internal_Rela rel;
14070
14071 /* This symbol needs a copy reloc. Set it up. */
14072 BFD_ASSERT (h->dynindx != -1
14073 && (h->root.type == bfd_link_hash_defined
14074 || h->root.type == bfd_link_hash_defweak));
14075
14076 s = htab->srelbss;
14077 BFD_ASSERT (s != NULL);
14078
14079 rel.r_addend = 0;
14080 rel.r_offset = (h->root.u.def.value
14081 + h->root.u.def.section->output_section->vma
14082 + h->root.u.def.section->output_offset);
14083 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14084 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14085 }
14086
14087 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14088 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14089 to the ".got" section. */
14090 if (h == htab->root.hdynamic
14091 || (!htab->vxworks_p && h == htab->root.hgot))
14092 sym->st_shndx = SHN_ABS;
14093
14094 return TRUE;
14095 }
14096
14097 static void
14098 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14099 void *contents,
14100 const unsigned long *template, unsigned count)
14101 {
14102 unsigned ix;
14103
14104 for (ix = 0; ix != count; ix++)
14105 {
14106 unsigned long insn = template[ix];
14107
14108 /* Emit mov pc,rx if bx is not permitted. */
14109 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14110 insn = (insn & 0xf000000f) | 0x01a0f000;
14111 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14112 }
14113 }
14114
14115 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14116 other variants, NaCl needs this entry in a static executable's
14117 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14118 zero. For .iplt really only the last bundle is useful, and .iplt
14119 could have a shorter first entry, with each individual PLT entry's
14120 relative branch calculated differently so it targets the last
14121 bundle instead of the instruction before it (labelled .Lplt_tail
14122 above). But it's simpler to keep the size and layout of PLT0
14123 consistent with the dynamic case, at the cost of some dead code at
14124 the start of .iplt and the one dead store to the stack at the start
14125 of .Lplt_tail. */
14126 static void
14127 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14128 asection *plt, bfd_vma got_displacement)
14129 {
14130 unsigned int i;
14131
14132 put_arm_insn (htab, output_bfd,
14133 elf32_arm_nacl_plt0_entry[0]
14134 | arm_movw_immediate (got_displacement),
14135 plt->contents + 0);
14136 put_arm_insn (htab, output_bfd,
14137 elf32_arm_nacl_plt0_entry[1]
14138 | arm_movt_immediate (got_displacement),
14139 plt->contents + 4);
14140
14141 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14142 put_arm_insn (htab, output_bfd,
14143 elf32_arm_nacl_plt0_entry[i],
14144 plt->contents + (i * 4));
14145 }
14146
14147 /* Finish up the dynamic sections. */
14148
14149 static bfd_boolean
14150 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14151 {
14152 bfd * dynobj;
14153 asection * sgot;
14154 asection * sdyn;
14155 struct elf32_arm_link_hash_table *htab;
14156
14157 htab = elf32_arm_hash_table (info);
14158 if (htab == NULL)
14159 return FALSE;
14160
14161 dynobj = elf_hash_table (info)->dynobj;
14162
14163 sgot = htab->root.sgotplt;
14164 /* A broken linker script might have discarded the dynamic sections.
14165 Catch this here so that we do not seg-fault later on. */
14166 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14167 return FALSE;
14168 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14169
14170 if (elf_hash_table (info)->dynamic_sections_created)
14171 {
14172 asection *splt;
14173 Elf32_External_Dyn *dyncon, *dynconend;
14174
14175 splt = htab->root.splt;
14176 BFD_ASSERT (splt != NULL && sdyn != NULL);
14177 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14178
14179 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14180 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14181
14182 for (; dyncon < dynconend; dyncon++)
14183 {
14184 Elf_Internal_Dyn dyn;
14185 const char * name;
14186 asection * s;
14187
14188 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14189
14190 switch (dyn.d_tag)
14191 {
14192 unsigned int type;
14193
14194 default:
14195 if (htab->vxworks_p
14196 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14197 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14198 break;
14199
14200 case DT_HASH:
14201 name = ".hash";
14202 goto get_vma_if_bpabi;
14203 case DT_STRTAB:
14204 name = ".dynstr";
14205 goto get_vma_if_bpabi;
14206 case DT_SYMTAB:
14207 name = ".dynsym";
14208 goto get_vma_if_bpabi;
14209 case DT_VERSYM:
14210 name = ".gnu.version";
14211 goto get_vma_if_bpabi;
14212 case DT_VERDEF:
14213 name = ".gnu.version_d";
14214 goto get_vma_if_bpabi;
14215 case DT_VERNEED:
14216 name = ".gnu.version_r";
14217 goto get_vma_if_bpabi;
14218
14219 case DT_PLTGOT:
14220 name = ".got";
14221 goto get_vma;
14222 case DT_JMPREL:
14223 name = RELOC_SECTION (htab, ".plt");
14224 get_vma:
14225 s = bfd_get_section_by_name (output_bfd, name);
14226 if (s == NULL)
14227 {
14228 /* PR ld/14397: Issue an error message if a required section is missing. */
14229 (*_bfd_error_handler)
14230 (_("error: required section '%s' not found in the linker script"), name);
14231 bfd_set_error (bfd_error_invalid_operation);
14232 return FALSE;
14233 }
14234 if (!htab->symbian_p)
14235 dyn.d_un.d_ptr = s->vma;
14236 else
14237 /* In the BPABI, tags in the PT_DYNAMIC section point
14238 at the file offset, not the memory address, for the
14239 convenience of the post linker. */
14240 dyn.d_un.d_ptr = s->filepos;
14241 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14242 break;
14243
14244 get_vma_if_bpabi:
14245 if (htab->symbian_p)
14246 goto get_vma;
14247 break;
14248
14249 case DT_PLTRELSZ:
14250 s = htab->root.srelplt;
14251 BFD_ASSERT (s != NULL);
14252 dyn.d_un.d_val = s->size;
14253 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14254 break;
14255
14256 case DT_RELSZ:
14257 case DT_RELASZ:
14258 if (!htab->symbian_p)
14259 {
14260 /* My reading of the SVR4 ABI indicates that the
14261 procedure linkage table relocs (DT_JMPREL) should be
14262 included in the overall relocs (DT_REL). This is
14263 what Solaris does. However, UnixWare can not handle
14264 that case. Therefore, we override the DT_RELSZ entry
14265 here to make it not include the JMPREL relocs. Since
14266 the linker script arranges for .rel(a).plt to follow all
14267 other relocation sections, we don't have to worry
14268 about changing the DT_REL entry. */
14269 s = htab->root.srelplt;
14270 if (s != NULL)
14271 dyn.d_un.d_val -= s->size;
14272 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14273 break;
14274 }
14275 /* Fall through. */
14276
14277 case DT_REL:
14278 case DT_RELA:
14279 /* In the BPABI, the DT_REL tag must point at the file
14280 offset, not the VMA, of the first relocation
14281 section. So, we use code similar to that in
14282 elflink.c, but do not check for SHF_ALLOC on the
14283 relcoation section, since relocations sections are
14284 never allocated under the BPABI. The comments above
14285 about Unixware notwithstanding, we include all of the
14286 relocations here. */
14287 if (htab->symbian_p)
14288 {
14289 unsigned int i;
14290 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14291 ? SHT_REL : SHT_RELA);
14292 dyn.d_un.d_val = 0;
14293 for (i = 1; i < elf_numsections (output_bfd); i++)
14294 {
14295 Elf_Internal_Shdr *hdr
14296 = elf_elfsections (output_bfd)[i];
14297 if (hdr->sh_type == type)
14298 {
14299 if (dyn.d_tag == DT_RELSZ
14300 || dyn.d_tag == DT_RELASZ)
14301 dyn.d_un.d_val += hdr->sh_size;
14302 else if ((ufile_ptr) hdr->sh_offset
14303 <= dyn.d_un.d_val - 1)
14304 dyn.d_un.d_val = hdr->sh_offset;
14305 }
14306 }
14307 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14308 }
14309 break;
14310
14311 case DT_TLSDESC_PLT:
14312 s = htab->root.splt;
14313 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14314 + htab->dt_tlsdesc_plt);
14315 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14316 break;
14317
14318 case DT_TLSDESC_GOT:
14319 s = htab->root.sgot;
14320 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14321 + htab->dt_tlsdesc_got);
14322 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14323 break;
14324
14325 /* Set the bottom bit of DT_INIT/FINI if the
14326 corresponding function is Thumb. */
14327 case DT_INIT:
14328 name = info->init_function;
14329 goto get_sym;
14330 case DT_FINI:
14331 name = info->fini_function;
14332 get_sym:
14333 /* If it wasn't set by elf_bfd_final_link
14334 then there is nothing to adjust. */
14335 if (dyn.d_un.d_val != 0)
14336 {
14337 struct elf_link_hash_entry * eh;
14338
14339 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14340 FALSE, FALSE, TRUE);
14341 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14342 {
14343 dyn.d_un.d_val |= 1;
14344 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14345 }
14346 }
14347 break;
14348 }
14349 }
14350
14351 /* Fill in the first entry in the procedure linkage table. */
14352 if (splt->size > 0 && htab->plt_header_size)
14353 {
14354 const bfd_vma *plt0_entry;
14355 bfd_vma got_address, plt_address, got_displacement;
14356
14357 /* Calculate the addresses of the GOT and PLT. */
14358 got_address = sgot->output_section->vma + sgot->output_offset;
14359 plt_address = splt->output_section->vma + splt->output_offset;
14360
14361 if (htab->vxworks_p)
14362 {
14363 /* The VxWorks GOT is relocated by the dynamic linker.
14364 Therefore, we must emit relocations rather than simply
14365 computing the values now. */
14366 Elf_Internal_Rela rel;
14367
14368 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14369 put_arm_insn (htab, output_bfd, plt0_entry[0],
14370 splt->contents + 0);
14371 put_arm_insn (htab, output_bfd, plt0_entry[1],
14372 splt->contents + 4);
14373 put_arm_insn (htab, output_bfd, plt0_entry[2],
14374 splt->contents + 8);
14375 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14376
14377 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14378 rel.r_offset = plt_address + 12;
14379 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14380 rel.r_addend = 0;
14381 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14382 htab->srelplt2->contents);
14383 }
14384 else if (htab->nacl_p)
14385 arm_nacl_put_plt0 (htab, output_bfd, splt,
14386 got_address + 8 - (plt_address + 16));
14387 else
14388 {
14389 got_displacement = got_address - (plt_address + 16);
14390
14391 plt0_entry = elf32_arm_plt0_entry;
14392 put_arm_insn (htab, output_bfd, plt0_entry[0],
14393 splt->contents + 0);
14394 put_arm_insn (htab, output_bfd, plt0_entry[1],
14395 splt->contents + 4);
14396 put_arm_insn (htab, output_bfd, plt0_entry[2],
14397 splt->contents + 8);
14398 put_arm_insn (htab, output_bfd, plt0_entry[3],
14399 splt->contents + 12);
14400
14401 #ifdef FOUR_WORD_PLT
14402 /* The displacement value goes in the otherwise-unused
14403 last word of the second entry. */
14404 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14405 #else
14406 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14407 #endif
14408 }
14409 }
14410
14411 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14412 really seem like the right value. */
14413 if (splt->output_section->owner == output_bfd)
14414 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14415
14416 if (htab->dt_tlsdesc_plt)
14417 {
14418 bfd_vma got_address
14419 = sgot->output_section->vma + sgot->output_offset;
14420 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14421 + htab->root.sgot->output_offset);
14422 bfd_vma plt_address
14423 = splt->output_section->vma + splt->output_offset;
14424
14425 arm_put_trampoline (htab, output_bfd,
14426 splt->contents + htab->dt_tlsdesc_plt,
14427 dl_tlsdesc_lazy_trampoline, 6);
14428
14429 bfd_put_32 (output_bfd,
14430 gotplt_address + htab->dt_tlsdesc_got
14431 - (plt_address + htab->dt_tlsdesc_plt)
14432 - dl_tlsdesc_lazy_trampoline[6],
14433 splt->contents + htab->dt_tlsdesc_plt + 24);
14434 bfd_put_32 (output_bfd,
14435 got_address - (plt_address + htab->dt_tlsdesc_plt)
14436 - dl_tlsdesc_lazy_trampoline[7],
14437 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14438 }
14439
14440 if (htab->tls_trampoline)
14441 {
14442 arm_put_trampoline (htab, output_bfd,
14443 splt->contents + htab->tls_trampoline,
14444 tls_trampoline, 3);
14445 #ifdef FOUR_WORD_PLT
14446 bfd_put_32 (output_bfd, 0x00000000,
14447 splt->contents + htab->tls_trampoline + 12);
14448 #endif
14449 }
14450
14451 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14452 {
14453 /* Correct the .rel(a).plt.unloaded relocations. They will have
14454 incorrect symbol indexes. */
14455 int num_plts;
14456 unsigned char *p;
14457
14458 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14459 / htab->plt_entry_size);
14460 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14461
14462 for (; num_plts; num_plts--)
14463 {
14464 Elf_Internal_Rela rel;
14465
14466 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14467 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14468 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14469 p += RELOC_SIZE (htab);
14470
14471 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14472 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14473 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14474 p += RELOC_SIZE (htab);
14475 }
14476 }
14477 }
14478
14479 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14480 /* NaCl uses a special first entry in .iplt too. */
14481 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14482
14483 /* Fill in the first three entries in the global offset table. */
14484 if (sgot)
14485 {
14486 if (sgot->size > 0)
14487 {
14488 if (sdyn == NULL)
14489 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14490 else
14491 bfd_put_32 (output_bfd,
14492 sdyn->output_section->vma + sdyn->output_offset,
14493 sgot->contents);
14494 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14495 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14496 }
14497
14498 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14499 }
14500
14501 return TRUE;
14502 }
14503
14504 static void
14505 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14506 {
14507 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14508 struct elf32_arm_link_hash_table *globals;
14509
14510 i_ehdrp = elf_elfheader (abfd);
14511
14512 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14513 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14514 else
14515 _bfd_elf_post_process_headers (abfd, link_info);
14516 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14517
14518 if (link_info)
14519 {
14520 globals = elf32_arm_hash_table (link_info);
14521 if (globals != NULL && globals->byteswap_code)
14522 i_ehdrp->e_flags |= EF_ARM_BE8;
14523 }
14524
14525 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14526 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14527 {
14528 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14529 if (abi)
14530 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14531 else
14532 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14533 }
14534 }
14535
14536 static enum elf_reloc_type_class
14537 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14538 const asection *rel_sec ATTRIBUTE_UNUSED,
14539 const Elf_Internal_Rela *rela)
14540 {
14541 switch ((int) ELF32_R_TYPE (rela->r_info))
14542 {
14543 case R_ARM_RELATIVE:
14544 return reloc_class_relative;
14545 case R_ARM_JUMP_SLOT:
14546 return reloc_class_plt;
14547 case R_ARM_COPY:
14548 return reloc_class_copy;
14549 default:
14550 return reloc_class_normal;
14551 }
14552 }
14553
14554 static void
14555 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14556 {
14557 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14558 }
14559
14560 /* Return TRUE if this is an unwinding table entry. */
14561
14562 static bfd_boolean
14563 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14564 {
14565 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14566 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14567 }
14568
14569
14570 /* Set the type and flags for an ARM section. We do this by
14571 the section name, which is a hack, but ought to work. */
14572
14573 static bfd_boolean
14574 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14575 {
14576 const char * name;
14577
14578 name = bfd_get_section_name (abfd, sec);
14579
14580 if (is_arm_elf_unwind_section_name (abfd, name))
14581 {
14582 hdr->sh_type = SHT_ARM_EXIDX;
14583 hdr->sh_flags |= SHF_LINK_ORDER;
14584 }
14585 return TRUE;
14586 }
14587
14588 /* Handle an ARM specific section when reading an object file. This is
14589 called when bfd_section_from_shdr finds a section with an unknown
14590 type. */
14591
14592 static bfd_boolean
14593 elf32_arm_section_from_shdr (bfd *abfd,
14594 Elf_Internal_Shdr * hdr,
14595 const char *name,
14596 int shindex)
14597 {
14598 /* There ought to be a place to keep ELF backend specific flags, but
14599 at the moment there isn't one. We just keep track of the
14600 sections by their name, instead. Fortunately, the ABI gives
14601 names for all the ARM specific sections, so we will probably get
14602 away with this. */
14603 switch (hdr->sh_type)
14604 {
14605 case SHT_ARM_EXIDX:
14606 case SHT_ARM_PREEMPTMAP:
14607 case SHT_ARM_ATTRIBUTES:
14608 break;
14609
14610 default:
14611 return FALSE;
14612 }
14613
14614 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14615 return FALSE;
14616
14617 return TRUE;
14618 }
14619
14620 static _arm_elf_section_data *
14621 get_arm_elf_section_data (asection * sec)
14622 {
14623 if (sec && sec->owner && is_arm_elf (sec->owner))
14624 return elf32_arm_section_data (sec);
14625 else
14626 return NULL;
14627 }
14628
14629 typedef struct
14630 {
14631 void *flaginfo;
14632 struct bfd_link_info *info;
14633 asection *sec;
14634 int sec_shndx;
14635 int (*func) (void *, const char *, Elf_Internal_Sym *,
14636 asection *, struct elf_link_hash_entry *);
14637 } output_arch_syminfo;
14638
14639 enum map_symbol_type
14640 {
14641 ARM_MAP_ARM,
14642 ARM_MAP_THUMB,
14643 ARM_MAP_DATA
14644 };
14645
14646
14647 /* Output a single mapping symbol. */
14648
14649 static bfd_boolean
14650 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14651 enum map_symbol_type type,
14652 bfd_vma offset)
14653 {
14654 static const char *names[3] = {"$a", "$t", "$d"};
14655 Elf_Internal_Sym sym;
14656
14657 sym.st_value = osi->sec->output_section->vma
14658 + osi->sec->output_offset
14659 + offset;
14660 sym.st_size = 0;
14661 sym.st_other = 0;
14662 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14663 sym.st_shndx = osi->sec_shndx;
14664 sym.st_target_internal = 0;
14665 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14666 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14667 }
14668
14669 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14670 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14671
14672 static bfd_boolean
14673 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14674 bfd_boolean is_iplt_entry_p,
14675 union gotplt_union *root_plt,
14676 struct arm_plt_info *arm_plt)
14677 {
14678 struct elf32_arm_link_hash_table *htab;
14679 bfd_vma addr, plt_header_size;
14680
14681 if (root_plt->offset == (bfd_vma) -1)
14682 return TRUE;
14683
14684 htab = elf32_arm_hash_table (osi->info);
14685 if (htab == NULL)
14686 return FALSE;
14687
14688 if (is_iplt_entry_p)
14689 {
14690 osi->sec = htab->root.iplt;
14691 plt_header_size = 0;
14692 }
14693 else
14694 {
14695 osi->sec = htab->root.splt;
14696 plt_header_size = htab->plt_header_size;
14697 }
14698 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14699 (osi->info->output_bfd, osi->sec->output_section));
14700
14701 addr = root_plt->offset & -2;
14702 if (htab->symbian_p)
14703 {
14704 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14705 return FALSE;
14706 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14707 return FALSE;
14708 }
14709 else if (htab->vxworks_p)
14710 {
14711 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14712 return FALSE;
14713 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14714 return FALSE;
14715 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14716 return FALSE;
14717 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14718 return FALSE;
14719 }
14720 else if (htab->nacl_p)
14721 {
14722 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14723 return FALSE;
14724 }
14725 else
14726 {
14727 bfd_boolean thumb_stub_p;
14728
14729 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14730 if (thumb_stub_p)
14731 {
14732 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14733 return FALSE;
14734 }
14735 #ifdef FOUR_WORD_PLT
14736 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14737 return FALSE;
14738 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14739 return FALSE;
14740 #else
14741 /* A three-word PLT with no Thumb thunk contains only Arm code,
14742 so only need to output a mapping symbol for the first PLT entry and
14743 entries with thumb thunks. */
14744 if (thumb_stub_p || addr == plt_header_size)
14745 {
14746 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14747 return FALSE;
14748 }
14749 #endif
14750 }
14751
14752 return TRUE;
14753 }
14754
14755 /* Output mapping symbols for PLT entries associated with H. */
14756
14757 static bfd_boolean
14758 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14759 {
14760 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14761 struct elf32_arm_link_hash_entry *eh;
14762
14763 if (h->root.type == bfd_link_hash_indirect)
14764 return TRUE;
14765
14766 if (h->root.type == bfd_link_hash_warning)
14767 /* When warning symbols are created, they **replace** the "real"
14768 entry in the hash table, thus we never get to see the real
14769 symbol in a hash traversal. So look at it now. */
14770 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14771
14772 eh = (struct elf32_arm_link_hash_entry *) h;
14773 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14774 &h->plt, &eh->plt);
14775 }
14776
14777 /* Output a single local symbol for a generated stub. */
14778
14779 static bfd_boolean
14780 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14781 bfd_vma offset, bfd_vma size)
14782 {
14783 Elf_Internal_Sym sym;
14784
14785 sym.st_value = osi->sec->output_section->vma
14786 + osi->sec->output_offset
14787 + offset;
14788 sym.st_size = size;
14789 sym.st_other = 0;
14790 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14791 sym.st_shndx = osi->sec_shndx;
14792 sym.st_target_internal = 0;
14793 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14794 }
14795
14796 static bfd_boolean
14797 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14798 void * in_arg)
14799 {
14800 struct elf32_arm_stub_hash_entry *stub_entry;
14801 asection *stub_sec;
14802 bfd_vma addr;
14803 char *stub_name;
14804 output_arch_syminfo *osi;
14805 const insn_sequence *template_sequence;
14806 enum stub_insn_type prev_type;
14807 int size;
14808 int i;
14809 enum map_symbol_type sym_type;
14810
14811 /* Massage our args to the form they really have. */
14812 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14813 osi = (output_arch_syminfo *) in_arg;
14814
14815 stub_sec = stub_entry->stub_sec;
14816
14817 /* Ensure this stub is attached to the current section being
14818 processed. */
14819 if (stub_sec != osi->sec)
14820 return TRUE;
14821
14822 addr = (bfd_vma) stub_entry->stub_offset;
14823 stub_name = stub_entry->output_name;
14824
14825 template_sequence = stub_entry->stub_template;
14826 switch (template_sequence[0].type)
14827 {
14828 case ARM_TYPE:
14829 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14830 return FALSE;
14831 break;
14832 case THUMB16_TYPE:
14833 case THUMB32_TYPE:
14834 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14835 stub_entry->stub_size))
14836 return FALSE;
14837 break;
14838 default:
14839 BFD_FAIL ();
14840 return 0;
14841 }
14842
14843 prev_type = DATA_TYPE;
14844 size = 0;
14845 for (i = 0; i < stub_entry->stub_template_size; i++)
14846 {
14847 switch (template_sequence[i].type)
14848 {
14849 case ARM_TYPE:
14850 sym_type = ARM_MAP_ARM;
14851 break;
14852
14853 case THUMB16_TYPE:
14854 case THUMB32_TYPE:
14855 sym_type = ARM_MAP_THUMB;
14856 break;
14857
14858 case DATA_TYPE:
14859 sym_type = ARM_MAP_DATA;
14860 break;
14861
14862 default:
14863 BFD_FAIL ();
14864 return FALSE;
14865 }
14866
14867 if (template_sequence[i].type != prev_type)
14868 {
14869 prev_type = template_sequence[i].type;
14870 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14871 return FALSE;
14872 }
14873
14874 switch (template_sequence[i].type)
14875 {
14876 case ARM_TYPE:
14877 case THUMB32_TYPE:
14878 size += 4;
14879 break;
14880
14881 case THUMB16_TYPE:
14882 size += 2;
14883 break;
14884
14885 case DATA_TYPE:
14886 size += 4;
14887 break;
14888
14889 default:
14890 BFD_FAIL ();
14891 return FALSE;
14892 }
14893 }
14894
14895 return TRUE;
14896 }
14897
14898 /* Output mapping symbols for linker generated sections,
14899 and for those data-only sections that do not have a
14900 $d. */
14901
14902 static bfd_boolean
14903 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14904 struct bfd_link_info *info,
14905 void *flaginfo,
14906 int (*func) (void *, const char *,
14907 Elf_Internal_Sym *,
14908 asection *,
14909 struct elf_link_hash_entry *))
14910 {
14911 output_arch_syminfo osi;
14912 struct elf32_arm_link_hash_table *htab;
14913 bfd_vma offset;
14914 bfd_size_type size;
14915 bfd *input_bfd;
14916
14917 htab = elf32_arm_hash_table (info);
14918 if (htab == NULL)
14919 return FALSE;
14920
14921 check_use_blx (htab);
14922
14923 osi.flaginfo = flaginfo;
14924 osi.info = info;
14925 osi.func = func;
14926
14927 /* Add a $d mapping symbol to data-only sections that
14928 don't have any mapping symbol. This may result in (harmless) redundant
14929 mapping symbols. */
14930 for (input_bfd = info->input_bfds;
14931 input_bfd != NULL;
14932 input_bfd = input_bfd->link_next)
14933 {
14934 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14935 for (osi.sec = input_bfd->sections;
14936 osi.sec != NULL;
14937 osi.sec = osi.sec->next)
14938 {
14939 if (osi.sec->output_section != NULL
14940 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14941 != 0)
14942 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14943 == SEC_HAS_CONTENTS
14944 && get_arm_elf_section_data (osi.sec) != NULL
14945 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14946 && osi.sec->size > 0
14947 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14948 {
14949 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14950 (output_bfd, osi.sec->output_section);
14951 if (osi.sec_shndx != (int)SHN_BAD)
14952 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14953 }
14954 }
14955 }
14956
14957 /* ARM->Thumb glue. */
14958 if (htab->arm_glue_size > 0)
14959 {
14960 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14961 ARM2THUMB_GLUE_SECTION_NAME);
14962
14963 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14964 (output_bfd, osi.sec->output_section);
14965 if (info->shared || htab->root.is_relocatable_executable
14966 || htab->pic_veneer)
14967 size = ARM2THUMB_PIC_GLUE_SIZE;
14968 else if (htab->use_blx)
14969 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14970 else
14971 size = ARM2THUMB_STATIC_GLUE_SIZE;
14972
14973 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14974 {
14975 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14976 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14977 }
14978 }
14979
14980 /* Thumb->ARM glue. */
14981 if (htab->thumb_glue_size > 0)
14982 {
14983 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14984 THUMB2ARM_GLUE_SECTION_NAME);
14985
14986 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14987 (output_bfd, osi.sec->output_section);
14988 size = THUMB2ARM_GLUE_SIZE;
14989
14990 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14991 {
14992 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14993 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14994 }
14995 }
14996
14997 /* ARMv4 BX veneers. */
14998 if (htab->bx_glue_size > 0)
14999 {
15000 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15001 ARM_BX_GLUE_SECTION_NAME);
15002
15003 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15004 (output_bfd, osi.sec->output_section);
15005
15006 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
15007 }
15008
15009 /* Long calls stubs. */
15010 if (htab->stub_bfd && htab->stub_bfd->sections)
15011 {
15012 asection* stub_sec;
15013
15014 for (stub_sec = htab->stub_bfd->sections;
15015 stub_sec != NULL;
15016 stub_sec = stub_sec->next)
15017 {
15018 /* Ignore non-stub sections. */
15019 if (!strstr (stub_sec->name, STUB_SUFFIX))
15020 continue;
15021
15022 osi.sec = stub_sec;
15023
15024 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15025 (output_bfd, osi.sec->output_section);
15026
15027 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15028 }
15029 }
15030
15031 /* Finally, output mapping symbols for the PLT. */
15032 if (htab->root.splt && htab->root.splt->size > 0)
15033 {
15034 osi.sec = htab->root.splt;
15035 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15036 (output_bfd, osi.sec->output_section));
15037
15038 /* Output mapping symbols for the plt header. SymbianOS does not have a
15039 plt header. */
15040 if (htab->vxworks_p)
15041 {
15042 /* VxWorks shared libraries have no PLT header. */
15043 if (!info->shared)
15044 {
15045 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15046 return FALSE;
15047 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15048 return FALSE;
15049 }
15050 }
15051 else if (htab->nacl_p)
15052 {
15053 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15054 return FALSE;
15055 }
15056 else if (!htab->symbian_p)
15057 {
15058 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15059 return FALSE;
15060 #ifndef FOUR_WORD_PLT
15061 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
15062 return FALSE;
15063 #endif
15064 }
15065 }
15066 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15067 {
15068 /* NaCl uses a special first entry in .iplt too. */
15069 osi.sec = htab->root.iplt;
15070 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15071 (output_bfd, osi.sec->output_section));
15072 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15073 return FALSE;
15074 }
15075 if ((htab->root.splt && htab->root.splt->size > 0)
15076 || (htab->root.iplt && htab->root.iplt->size > 0))
15077 {
15078 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15079 for (input_bfd = info->input_bfds;
15080 input_bfd != NULL;
15081 input_bfd = input_bfd->link_next)
15082 {
15083 struct arm_local_iplt_info **local_iplt;
15084 unsigned int i, num_syms;
15085
15086 local_iplt = elf32_arm_local_iplt (input_bfd);
15087 if (local_iplt != NULL)
15088 {
15089 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15090 for (i = 0; i < num_syms; i++)
15091 if (local_iplt[i] != NULL
15092 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15093 &local_iplt[i]->root,
15094 &local_iplt[i]->arm))
15095 return FALSE;
15096 }
15097 }
15098 }
15099 if (htab->dt_tlsdesc_plt != 0)
15100 {
15101 /* Mapping symbols for the lazy tls trampoline. */
15102 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15103 return FALSE;
15104
15105 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15106 htab->dt_tlsdesc_plt + 24))
15107 return FALSE;
15108 }
15109 if (htab->tls_trampoline != 0)
15110 {
15111 /* Mapping symbols for the tls trampoline. */
15112 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15113 return FALSE;
15114 #ifdef FOUR_WORD_PLT
15115 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15116 htab->tls_trampoline + 12))
15117 return FALSE;
15118 #endif
15119 }
15120
15121 return TRUE;
15122 }
15123
15124 /* Allocate target specific section data. */
15125
15126 static bfd_boolean
15127 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15128 {
15129 if (!sec->used_by_bfd)
15130 {
15131 _arm_elf_section_data *sdata;
15132 bfd_size_type amt = sizeof (*sdata);
15133
15134 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
15135 if (sdata == NULL)
15136 return FALSE;
15137 sec->used_by_bfd = sdata;
15138 }
15139
15140 return _bfd_elf_new_section_hook (abfd, sec);
15141 }
15142
15143
15144 /* Used to order a list of mapping symbols by address. */
15145
15146 static int
15147 elf32_arm_compare_mapping (const void * a, const void * b)
15148 {
15149 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15150 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15151
15152 if (amap->vma > bmap->vma)
15153 return 1;
15154 else if (amap->vma < bmap->vma)
15155 return -1;
15156 else if (amap->type > bmap->type)
15157 /* Ensure results do not depend on the host qsort for objects with
15158 multiple mapping symbols at the same address by sorting on type
15159 after vma. */
15160 return 1;
15161 else if (amap->type < bmap->type)
15162 return -1;
15163 else
15164 return 0;
15165 }
15166
15167 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15168
15169 static unsigned long
15170 offset_prel31 (unsigned long addr, bfd_vma offset)
15171 {
15172 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15173 }
15174
15175 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15176 relocations. */
15177
15178 static void
15179 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15180 {
15181 unsigned long first_word = bfd_get_32 (output_bfd, from);
15182 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15183
15184 /* High bit of first word is supposed to be zero. */
15185 if ((first_word & 0x80000000ul) == 0)
15186 first_word = offset_prel31 (first_word, offset);
15187
15188 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15189 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15190 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15191 second_word = offset_prel31 (second_word, offset);
15192
15193 bfd_put_32 (output_bfd, first_word, to);
15194 bfd_put_32 (output_bfd, second_word, to + 4);
15195 }
15196
15197 /* Data for make_branch_to_a8_stub(). */
15198
15199 struct a8_branch_to_stub_data
15200 {
15201 asection *writing_section;
15202 bfd_byte *contents;
15203 };
15204
15205
15206 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15207 places for a particular section. */
15208
15209 static bfd_boolean
15210 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15211 void *in_arg)
15212 {
15213 struct elf32_arm_stub_hash_entry *stub_entry;
15214 struct a8_branch_to_stub_data *data;
15215 bfd_byte *contents;
15216 unsigned long branch_insn;
15217 bfd_vma veneered_insn_loc, veneer_entry_loc;
15218 bfd_signed_vma branch_offset;
15219 bfd *abfd;
15220 unsigned int target;
15221
15222 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15223 data = (struct a8_branch_to_stub_data *) in_arg;
15224
15225 if (stub_entry->target_section != data->writing_section
15226 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15227 return TRUE;
15228
15229 contents = data->contents;
15230
15231 veneered_insn_loc = stub_entry->target_section->output_section->vma
15232 + stub_entry->target_section->output_offset
15233 + stub_entry->target_value;
15234
15235 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15236 + stub_entry->stub_sec->output_offset
15237 + stub_entry->stub_offset;
15238
15239 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15240 veneered_insn_loc &= ~3u;
15241
15242 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15243
15244 abfd = stub_entry->target_section->owner;
15245 target = stub_entry->target_value;
15246
15247 /* We attempt to avoid this condition by setting stubs_always_after_branch
15248 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15249 This check is just to be on the safe side... */
15250 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15251 {
15252 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15253 "allocated in unsafe location"), abfd);
15254 return FALSE;
15255 }
15256
15257 switch (stub_entry->stub_type)
15258 {
15259 case arm_stub_a8_veneer_b:
15260 case arm_stub_a8_veneer_b_cond:
15261 branch_insn = 0xf0009000;
15262 goto jump24;
15263
15264 case arm_stub_a8_veneer_blx:
15265 branch_insn = 0xf000e800;
15266 goto jump24;
15267
15268 case arm_stub_a8_veneer_bl:
15269 {
15270 unsigned int i1, j1, i2, j2, s;
15271
15272 branch_insn = 0xf000d000;
15273
15274 jump24:
15275 if (branch_offset < -16777216 || branch_offset > 16777214)
15276 {
15277 /* There's not much we can do apart from complain if this
15278 happens. */
15279 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15280 "of range (input file too large)"), abfd);
15281 return FALSE;
15282 }
15283
15284 /* i1 = not(j1 eor s), so:
15285 not i1 = j1 eor s
15286 j1 = (not i1) eor s. */
15287
15288 branch_insn |= (branch_offset >> 1) & 0x7ff;
15289 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15290 i2 = (branch_offset >> 22) & 1;
15291 i1 = (branch_offset >> 23) & 1;
15292 s = (branch_offset >> 24) & 1;
15293 j1 = (!i1) ^ s;
15294 j2 = (!i2) ^ s;
15295 branch_insn |= j2 << 11;
15296 branch_insn |= j1 << 13;
15297 branch_insn |= s << 26;
15298 }
15299 break;
15300
15301 default:
15302 BFD_FAIL ();
15303 return FALSE;
15304 }
15305
15306 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15307 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15308
15309 return TRUE;
15310 }
15311
15312 /* Do code byteswapping. Return FALSE afterwards so that the section is
15313 written out as normal. */
15314
15315 static bfd_boolean
15316 elf32_arm_write_section (bfd *output_bfd,
15317 struct bfd_link_info *link_info,
15318 asection *sec,
15319 bfd_byte *contents)
15320 {
15321 unsigned int mapcount, errcount;
15322 _arm_elf_section_data *arm_data;
15323 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15324 elf32_arm_section_map *map;
15325 elf32_vfp11_erratum_list *errnode;
15326 bfd_vma ptr;
15327 bfd_vma end;
15328 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15329 bfd_byte tmp;
15330 unsigned int i;
15331
15332 if (globals == NULL)
15333 return FALSE;
15334
15335 /* If this section has not been allocated an _arm_elf_section_data
15336 structure then we cannot record anything. */
15337 arm_data = get_arm_elf_section_data (sec);
15338 if (arm_data == NULL)
15339 return FALSE;
15340
15341 mapcount = arm_data->mapcount;
15342 map = arm_data->map;
15343 errcount = arm_data->erratumcount;
15344
15345 if (errcount != 0)
15346 {
15347 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15348
15349 for (errnode = arm_data->erratumlist; errnode != 0;
15350 errnode = errnode->next)
15351 {
15352 bfd_vma target = errnode->vma - offset;
15353
15354 switch (errnode->type)
15355 {
15356 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15357 {
15358 bfd_vma branch_to_veneer;
15359 /* Original condition code of instruction, plus bit mask for
15360 ARM B instruction. */
15361 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15362 | 0x0a000000;
15363
15364 /* The instruction is before the label. */
15365 target -= 4;
15366
15367 /* Above offset included in -4 below. */
15368 branch_to_veneer = errnode->u.b.veneer->vma
15369 - errnode->vma - 4;
15370
15371 if ((signed) branch_to_veneer < -(1 << 25)
15372 || (signed) branch_to_veneer >= (1 << 25))
15373 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15374 "range"), output_bfd);
15375
15376 insn |= (branch_to_veneer >> 2) & 0xffffff;
15377 contents[endianflip ^ target] = insn & 0xff;
15378 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15379 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15380 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15381 }
15382 break;
15383
15384 case VFP11_ERRATUM_ARM_VENEER:
15385 {
15386 bfd_vma branch_from_veneer;
15387 unsigned int insn;
15388
15389 /* Take size of veneer into account. */
15390 branch_from_veneer = errnode->u.v.branch->vma
15391 - errnode->vma - 12;
15392
15393 if ((signed) branch_from_veneer < -(1 << 25)
15394 || (signed) branch_from_veneer >= (1 << 25))
15395 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15396 "range"), output_bfd);
15397
15398 /* Original instruction. */
15399 insn = errnode->u.v.branch->u.b.vfp_insn;
15400 contents[endianflip ^ target] = insn & 0xff;
15401 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15402 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15403 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15404
15405 /* Branch back to insn after original insn. */
15406 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15407 contents[endianflip ^ (target + 4)] = insn & 0xff;
15408 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15409 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15410 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15411 }
15412 break;
15413
15414 default:
15415 abort ();
15416 }
15417 }
15418 }
15419
15420 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15421 {
15422 arm_unwind_table_edit *edit_node
15423 = arm_data->u.exidx.unwind_edit_list;
15424 /* Now, sec->size is the size of the section we will write. The original
15425 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15426 markers) was sec->rawsize. (This isn't the case if we perform no
15427 edits, then rawsize will be zero and we should use size). */
15428 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15429 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15430 unsigned int in_index, out_index;
15431 bfd_vma add_to_offsets = 0;
15432
15433 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15434 {
15435 if (edit_node)
15436 {
15437 unsigned int edit_index = edit_node->index;
15438
15439 if (in_index < edit_index && in_index * 8 < input_size)
15440 {
15441 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15442 contents + in_index * 8, add_to_offsets);
15443 out_index++;
15444 in_index++;
15445 }
15446 else if (in_index == edit_index
15447 || (in_index * 8 >= input_size
15448 && edit_index == UINT_MAX))
15449 {
15450 switch (edit_node->type)
15451 {
15452 case DELETE_EXIDX_ENTRY:
15453 in_index++;
15454 add_to_offsets += 8;
15455 break;
15456
15457 case INSERT_EXIDX_CANTUNWIND_AT_END:
15458 {
15459 asection *text_sec = edit_node->linked_section;
15460 bfd_vma text_offset = text_sec->output_section->vma
15461 + text_sec->output_offset
15462 + text_sec->size;
15463 bfd_vma exidx_offset = offset + out_index * 8;
15464 unsigned long prel31_offset;
15465
15466 /* Note: this is meant to be equivalent to an
15467 R_ARM_PREL31 relocation. These synthetic
15468 EXIDX_CANTUNWIND markers are not relocated by the
15469 usual BFD method. */
15470 prel31_offset = (text_offset - exidx_offset)
15471 & 0x7ffffffful;
15472
15473 /* First address we can't unwind. */
15474 bfd_put_32 (output_bfd, prel31_offset,
15475 &edited_contents[out_index * 8]);
15476
15477 /* Code for EXIDX_CANTUNWIND. */
15478 bfd_put_32 (output_bfd, 0x1,
15479 &edited_contents[out_index * 8 + 4]);
15480
15481 out_index++;
15482 add_to_offsets -= 8;
15483 }
15484 break;
15485 }
15486
15487 edit_node = edit_node->next;
15488 }
15489 }
15490 else
15491 {
15492 /* No more edits, copy remaining entries verbatim. */
15493 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15494 contents + in_index * 8, add_to_offsets);
15495 out_index++;
15496 in_index++;
15497 }
15498 }
15499
15500 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15501 bfd_set_section_contents (output_bfd, sec->output_section,
15502 edited_contents,
15503 (file_ptr) sec->output_offset, sec->size);
15504
15505 return TRUE;
15506 }
15507
15508 /* Fix code to point to Cortex-A8 erratum stubs. */
15509 if (globals->fix_cortex_a8)
15510 {
15511 struct a8_branch_to_stub_data data;
15512
15513 data.writing_section = sec;
15514 data.contents = contents;
15515
15516 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15517 &data);
15518 }
15519
15520 if (mapcount == 0)
15521 return FALSE;
15522
15523 if (globals->byteswap_code)
15524 {
15525 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15526
15527 ptr = map[0].vma;
15528 for (i = 0; i < mapcount; i++)
15529 {
15530 if (i == mapcount - 1)
15531 end = sec->size;
15532 else
15533 end = map[i + 1].vma;
15534
15535 switch (map[i].type)
15536 {
15537 case 'a':
15538 /* Byte swap code words. */
15539 while (ptr + 3 < end)
15540 {
15541 tmp = contents[ptr];
15542 contents[ptr] = contents[ptr + 3];
15543 contents[ptr + 3] = tmp;
15544 tmp = contents[ptr + 1];
15545 contents[ptr + 1] = contents[ptr + 2];
15546 contents[ptr + 2] = tmp;
15547 ptr += 4;
15548 }
15549 break;
15550
15551 case 't':
15552 /* Byte swap code halfwords. */
15553 while (ptr + 1 < end)
15554 {
15555 tmp = contents[ptr];
15556 contents[ptr] = contents[ptr + 1];
15557 contents[ptr + 1] = tmp;
15558 ptr += 2;
15559 }
15560 break;
15561
15562 case 'd':
15563 /* Leave data alone. */
15564 break;
15565 }
15566 ptr = end;
15567 }
15568 }
15569
15570 free (map);
15571 arm_data->mapcount = -1;
15572 arm_data->mapsize = 0;
15573 arm_data->map = NULL;
15574
15575 return FALSE;
15576 }
15577
15578 /* Mangle thumb function symbols as we read them in. */
15579
15580 static bfd_boolean
15581 elf32_arm_swap_symbol_in (bfd * abfd,
15582 const void *psrc,
15583 const void *pshn,
15584 Elf_Internal_Sym *dst)
15585 {
15586 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15587 return FALSE;
15588
15589 /* New EABI objects mark thumb function symbols by setting the low bit of
15590 the address. */
15591 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15592 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15593 {
15594 if (dst->st_value & 1)
15595 {
15596 dst->st_value &= ~(bfd_vma) 1;
15597 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15598 }
15599 else
15600 dst->st_target_internal = ST_BRANCH_TO_ARM;
15601 }
15602 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15603 {
15604 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15605 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15606 }
15607 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15608 dst->st_target_internal = ST_BRANCH_LONG;
15609 else
15610 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15611
15612 return TRUE;
15613 }
15614
15615
15616 /* Mangle thumb function symbols as we write them out. */
15617
15618 static void
15619 elf32_arm_swap_symbol_out (bfd *abfd,
15620 const Elf_Internal_Sym *src,
15621 void *cdst,
15622 void *shndx)
15623 {
15624 Elf_Internal_Sym newsym;
15625
15626 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15627 of the address set, as per the new EABI. We do this unconditionally
15628 because objcopy does not set the elf header flags until after
15629 it writes out the symbol table. */
15630 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15631 {
15632 newsym = *src;
15633 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15634 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15635 if (newsym.st_shndx != SHN_UNDEF)
15636 {
15637 /* Do this only for defined symbols. At link type, the static
15638 linker will simulate the work of dynamic linker of resolving
15639 symbols and will carry over the thumbness of found symbols to
15640 the output symbol table. It's not clear how it happens, but
15641 the thumbness of undefined symbols can well be different at
15642 runtime, and writing '1' for them will be confusing for users
15643 and possibly for dynamic linker itself.
15644 */
15645 newsym.st_value |= 1;
15646 }
15647
15648 src = &newsym;
15649 }
15650 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15651 }
15652
15653 /* Add the PT_ARM_EXIDX program header. */
15654
15655 static bfd_boolean
15656 elf32_arm_modify_segment_map (bfd *abfd,
15657 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15658 {
15659 struct elf_segment_map *m;
15660 asection *sec;
15661
15662 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15663 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15664 {
15665 /* If there is already a PT_ARM_EXIDX header, then we do not
15666 want to add another one. This situation arises when running
15667 "strip"; the input binary already has the header. */
15668 m = elf_seg_map (abfd);
15669 while (m && m->p_type != PT_ARM_EXIDX)
15670 m = m->next;
15671 if (!m)
15672 {
15673 m = (struct elf_segment_map *)
15674 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15675 if (m == NULL)
15676 return FALSE;
15677 m->p_type = PT_ARM_EXIDX;
15678 m->count = 1;
15679 m->sections[0] = sec;
15680
15681 m->next = elf_seg_map (abfd);
15682 elf_seg_map (abfd) = m;
15683 }
15684 }
15685
15686 return TRUE;
15687 }
15688
15689 /* We may add a PT_ARM_EXIDX program header. */
15690
15691 static int
15692 elf32_arm_additional_program_headers (bfd *abfd,
15693 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15694 {
15695 asection *sec;
15696
15697 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15698 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15699 return 1;
15700 else
15701 return 0;
15702 }
15703
15704 /* Hook called by the linker routine which adds symbols from an object
15705 file. */
15706
15707 static bfd_boolean
15708 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15709 Elf_Internal_Sym *sym, const char **namep,
15710 flagword *flagsp, asection **secp, bfd_vma *valp)
15711 {
15712 if ((abfd->flags & DYNAMIC) == 0
15713 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15714 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15715 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15716
15717 if (elf32_arm_hash_table (info)->vxworks_p
15718 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15719 flagsp, secp, valp))
15720 return FALSE;
15721
15722 return TRUE;
15723 }
15724
15725 /* We use this to override swap_symbol_in and swap_symbol_out. */
15726 const struct elf_size_info elf32_arm_size_info =
15727 {
15728 sizeof (Elf32_External_Ehdr),
15729 sizeof (Elf32_External_Phdr),
15730 sizeof (Elf32_External_Shdr),
15731 sizeof (Elf32_External_Rel),
15732 sizeof (Elf32_External_Rela),
15733 sizeof (Elf32_External_Sym),
15734 sizeof (Elf32_External_Dyn),
15735 sizeof (Elf_External_Note),
15736 4,
15737 1,
15738 32, 2,
15739 ELFCLASS32, EV_CURRENT,
15740 bfd_elf32_write_out_phdrs,
15741 bfd_elf32_write_shdrs_and_ehdr,
15742 bfd_elf32_checksum_contents,
15743 bfd_elf32_write_relocs,
15744 elf32_arm_swap_symbol_in,
15745 elf32_arm_swap_symbol_out,
15746 bfd_elf32_slurp_reloc_table,
15747 bfd_elf32_slurp_symbol_table,
15748 bfd_elf32_swap_dyn_in,
15749 bfd_elf32_swap_dyn_out,
15750 bfd_elf32_swap_reloc_in,
15751 bfd_elf32_swap_reloc_out,
15752 bfd_elf32_swap_reloca_in,
15753 bfd_elf32_swap_reloca_out
15754 };
15755
15756 #define ELF_ARCH bfd_arch_arm
15757 #define ELF_TARGET_ID ARM_ELF_DATA
15758 #define ELF_MACHINE_CODE EM_ARM
15759 #ifdef __QNXTARGET__
15760 #define ELF_MAXPAGESIZE 0x1000
15761 #else
15762 #define ELF_MAXPAGESIZE 0x8000
15763 #endif
15764 #define ELF_MINPAGESIZE 0x1000
15765 #define ELF_COMMONPAGESIZE 0x1000
15766
15767 #define bfd_elf32_mkobject elf32_arm_mkobject
15768
15769 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15770 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15771 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15772 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15773 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15774 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15775 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15776 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15777 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15778 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15779 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15780 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15781 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15782
15783 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15784 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15785 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15786 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15787 #define elf_backend_check_relocs elf32_arm_check_relocs
15788 #define elf_backend_relocate_section elf32_arm_relocate_section
15789 #define elf_backend_write_section elf32_arm_write_section
15790 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15791 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15792 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15793 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15794 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15795 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15796 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15797 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15798 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15799 #define elf_backend_object_p elf32_arm_object_p
15800 #define elf_backend_fake_sections elf32_arm_fake_sections
15801 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15802 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15803 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15804 #define elf_backend_size_info elf32_arm_size_info
15805 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15806 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15807 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15808 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15809 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15810
15811 #define elf_backend_can_refcount 1
15812 #define elf_backend_can_gc_sections 1
15813 #define elf_backend_plt_readonly 1
15814 #define elf_backend_want_got_plt 1
15815 #define elf_backend_want_plt_sym 0
15816 #define elf_backend_may_use_rel_p 1
15817 #define elf_backend_may_use_rela_p 0
15818 #define elf_backend_default_use_rela_p 0
15819
15820 #define elf_backend_got_header_size 12
15821
15822 #undef elf_backend_obj_attrs_vendor
15823 #define elf_backend_obj_attrs_vendor "aeabi"
15824 #undef elf_backend_obj_attrs_section
15825 #define elf_backend_obj_attrs_section ".ARM.attributes"
15826 #undef elf_backend_obj_attrs_arg_type
15827 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15828 #undef elf_backend_obj_attrs_section_type
15829 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15830 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15831 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15832
15833 #include "elf32-target.h"
15834
15835 /* Native Client targets. */
15836
15837 #undef TARGET_LITTLE_SYM
15838 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15839 #undef TARGET_LITTLE_NAME
15840 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15841 #undef TARGET_BIG_SYM
15842 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15843 #undef TARGET_BIG_NAME
15844 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15845
15846 /* Like elf32_arm_link_hash_table_create -- but overrides
15847 appropriately for NaCl. */
15848
15849 static struct bfd_link_hash_table *
15850 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15851 {
15852 struct bfd_link_hash_table *ret;
15853
15854 ret = elf32_arm_link_hash_table_create (abfd);
15855 if (ret)
15856 {
15857 struct elf32_arm_link_hash_table *htab
15858 = (struct elf32_arm_link_hash_table *) ret;
15859
15860 htab->nacl_p = 1;
15861
15862 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15863 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15864 }
15865 return ret;
15866 }
15867
15868 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15869 really need to use elf32_arm_modify_segment_map. But we do it
15870 anyway just to reduce gratuitous differences with the stock ARM backend. */
15871
15872 static bfd_boolean
15873 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15874 {
15875 return (elf32_arm_modify_segment_map (abfd, info)
15876 && nacl_modify_segment_map (abfd, info));
15877 }
15878
15879 static void
15880 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
15881 {
15882 elf32_arm_final_write_processing (abfd, linker);
15883 nacl_final_write_processing (abfd, linker);
15884 }
15885
15886
15887 #undef elf32_bed
15888 #define elf32_bed elf32_arm_nacl_bed
15889 #undef bfd_elf32_bfd_link_hash_table_create
15890 #define bfd_elf32_bfd_link_hash_table_create \
15891 elf32_arm_nacl_link_hash_table_create
15892 #undef elf_backend_plt_alignment
15893 #define elf_backend_plt_alignment 4
15894 #undef elf_backend_modify_segment_map
15895 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15896 #undef elf_backend_modify_program_headers
15897 #define elf_backend_modify_program_headers nacl_modify_program_headers
15898 #undef elf_backend_final_write_processing
15899 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
15900
15901 #undef ELF_MAXPAGESIZE
15902 #define ELF_MAXPAGESIZE 0x10000
15903 #undef ELF_MINPAGESIZE
15904 #undef ELF_COMMONPAGESIZE
15905
15906
15907 #include "elf32-target.h"
15908
15909 /* Reset to defaults. */
15910 #undef elf_backend_plt_alignment
15911 #undef elf_backend_modify_segment_map
15912 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15913 #undef elf_backend_modify_program_headers
15914 #undef elf_backend_final_write_processing
15915 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15916 #undef ELF_MINPAGESIZE
15917 #define ELF_MINPAGESIZE 0x1000
15918 #undef ELF_COMMONPAGESIZE
15919 #define ELF_COMMONPAGESIZE 0x1000
15920
15921
15922 /* VxWorks Targets. */
15923
15924 #undef TARGET_LITTLE_SYM
15925 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15926 #undef TARGET_LITTLE_NAME
15927 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15928 #undef TARGET_BIG_SYM
15929 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15930 #undef TARGET_BIG_NAME
15931 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15932
15933 /* Like elf32_arm_link_hash_table_create -- but overrides
15934 appropriately for VxWorks. */
15935
15936 static struct bfd_link_hash_table *
15937 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15938 {
15939 struct bfd_link_hash_table *ret;
15940
15941 ret = elf32_arm_link_hash_table_create (abfd);
15942 if (ret)
15943 {
15944 struct elf32_arm_link_hash_table *htab
15945 = (struct elf32_arm_link_hash_table *) ret;
15946 htab->use_rel = 0;
15947 htab->vxworks_p = 1;
15948 }
15949 return ret;
15950 }
15951
15952 static void
15953 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15954 {
15955 elf32_arm_final_write_processing (abfd, linker);
15956 elf_vxworks_final_write_processing (abfd, linker);
15957 }
15958
15959 #undef elf32_bed
15960 #define elf32_bed elf32_arm_vxworks_bed
15961
15962 #undef bfd_elf32_bfd_link_hash_table_create
15963 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15964 #undef elf_backend_final_write_processing
15965 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15966 #undef elf_backend_emit_relocs
15967 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15968
15969 #undef elf_backend_may_use_rel_p
15970 #define elf_backend_may_use_rel_p 0
15971 #undef elf_backend_may_use_rela_p
15972 #define elf_backend_may_use_rela_p 1
15973 #undef elf_backend_default_use_rela_p
15974 #define elf_backend_default_use_rela_p 1
15975 #undef elf_backend_want_plt_sym
15976 #define elf_backend_want_plt_sym 1
15977 #undef ELF_MAXPAGESIZE
15978 #define ELF_MAXPAGESIZE 0x1000
15979
15980 #include "elf32-target.h"
15981
15982
15983 /* Merge backend specific data from an object file to the output
15984 object file when linking. */
15985
15986 static bfd_boolean
15987 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15988 {
15989 flagword out_flags;
15990 flagword in_flags;
15991 bfd_boolean flags_compatible = TRUE;
15992 asection *sec;
15993
15994 /* Check if we have the same endianness. */
15995 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15996 return FALSE;
15997
15998 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15999 return TRUE;
16000
16001 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16002 return FALSE;
16003
16004 /* The input BFD must have had its flags initialised. */
16005 /* The following seems bogus to me -- The flags are initialized in
16006 the assembler but I don't think an elf_flags_init field is
16007 written into the object. */
16008 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16009
16010 in_flags = elf_elfheader (ibfd)->e_flags;
16011 out_flags = elf_elfheader (obfd)->e_flags;
16012
16013 /* In theory there is no reason why we couldn't handle this. However
16014 in practice it isn't even close to working and there is no real
16015 reason to want it. */
16016 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16017 && !(ibfd->flags & DYNAMIC)
16018 && (in_flags & EF_ARM_BE8))
16019 {
16020 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16021 ibfd);
16022 return FALSE;
16023 }
16024
16025 if (!elf_flags_init (obfd))
16026 {
16027 /* If the input is the default architecture and had the default
16028 flags then do not bother setting the flags for the output
16029 architecture, instead allow future merges to do this. If no
16030 future merges ever set these flags then they will retain their
16031 uninitialised values, which surprise surprise, correspond
16032 to the default values. */
16033 if (bfd_get_arch_info (ibfd)->the_default
16034 && elf_elfheader (ibfd)->e_flags == 0)
16035 return TRUE;
16036
16037 elf_flags_init (obfd) = TRUE;
16038 elf_elfheader (obfd)->e_flags = in_flags;
16039
16040 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16041 && bfd_get_arch_info (obfd)->the_default)
16042 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16043
16044 return TRUE;
16045 }
16046
16047 /* Determine what should happen if the input ARM architecture
16048 does not match the output ARM architecture. */
16049 if (! bfd_arm_merge_machines (ibfd, obfd))
16050 return FALSE;
16051
16052 /* Identical flags must be compatible. */
16053 if (in_flags == out_flags)
16054 return TRUE;
16055
16056 /* Check to see if the input BFD actually contains any sections. If
16057 not, its flags may not have been initialised either, but it
16058 cannot actually cause any incompatiblity. Do not short-circuit
16059 dynamic objects; their section list may be emptied by
16060 elf_link_add_object_symbols.
16061
16062 Also check to see if there are no code sections in the input.
16063 In this case there is no need to check for code specific flags.
16064 XXX - do we need to worry about floating-point format compatability
16065 in data sections ? */
16066 if (!(ibfd->flags & DYNAMIC))
16067 {
16068 bfd_boolean null_input_bfd = TRUE;
16069 bfd_boolean only_data_sections = TRUE;
16070
16071 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16072 {
16073 /* Ignore synthetic glue sections. */
16074 if (strcmp (sec->name, ".glue_7")
16075 && strcmp (sec->name, ".glue_7t"))
16076 {
16077 if ((bfd_get_section_flags (ibfd, sec)
16078 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16079 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16080 only_data_sections = FALSE;
16081
16082 null_input_bfd = FALSE;
16083 break;
16084 }
16085 }
16086
16087 if (null_input_bfd || only_data_sections)
16088 return TRUE;
16089 }
16090
16091 /* Complain about various flag mismatches. */
16092 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16093 EF_ARM_EABI_VERSION (out_flags)))
16094 {
16095 _bfd_error_handler
16096 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16097 ibfd, obfd,
16098 (in_flags & EF_ARM_EABIMASK) >> 24,
16099 (out_flags & EF_ARM_EABIMASK) >> 24);
16100 return FALSE;
16101 }
16102
16103 /* Not sure what needs to be checked for EABI versions >= 1. */
16104 /* VxWorks libraries do not use these flags. */
16105 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16106 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16107 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16108 {
16109 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16110 {
16111 _bfd_error_handler
16112 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16113 ibfd, obfd,
16114 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16115 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16116 flags_compatible = FALSE;
16117 }
16118
16119 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16120 {
16121 if (in_flags & EF_ARM_APCS_FLOAT)
16122 _bfd_error_handler
16123 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16124 ibfd, obfd);
16125 else
16126 _bfd_error_handler
16127 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16128 ibfd, obfd);
16129
16130 flags_compatible = FALSE;
16131 }
16132
16133 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16134 {
16135 if (in_flags & EF_ARM_VFP_FLOAT)
16136 _bfd_error_handler
16137 (_("error: %B uses VFP instructions, whereas %B does not"),
16138 ibfd, obfd);
16139 else
16140 _bfd_error_handler
16141 (_("error: %B uses FPA instructions, whereas %B does not"),
16142 ibfd, obfd);
16143
16144 flags_compatible = FALSE;
16145 }
16146
16147 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16148 {
16149 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16150 _bfd_error_handler
16151 (_("error: %B uses Maverick instructions, whereas %B does not"),
16152 ibfd, obfd);
16153 else
16154 _bfd_error_handler
16155 (_("error: %B does not use Maverick instructions, whereas %B does"),
16156 ibfd, obfd);
16157
16158 flags_compatible = FALSE;
16159 }
16160
16161 #ifdef EF_ARM_SOFT_FLOAT
16162 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16163 {
16164 /* We can allow interworking between code that is VFP format
16165 layout, and uses either soft float or integer regs for
16166 passing floating point arguments and results. We already
16167 know that the APCS_FLOAT flags match; similarly for VFP
16168 flags. */
16169 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16170 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16171 {
16172 if (in_flags & EF_ARM_SOFT_FLOAT)
16173 _bfd_error_handler
16174 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16175 ibfd, obfd);
16176 else
16177 _bfd_error_handler
16178 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16179 ibfd, obfd);
16180
16181 flags_compatible = FALSE;
16182 }
16183 }
16184 #endif
16185
16186 /* Interworking mismatch is only a warning. */
16187 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16188 {
16189 if (in_flags & EF_ARM_INTERWORK)
16190 {
16191 _bfd_error_handler
16192 (_("Warning: %B supports interworking, whereas %B does not"),
16193 ibfd, obfd);
16194 }
16195 else
16196 {
16197 _bfd_error_handler
16198 (_("Warning: %B does not support interworking, whereas %B does"),
16199 ibfd, obfd);
16200 }
16201 }
16202 }
16203
16204 return flags_compatible;
16205 }
16206
16207
16208 /* Symbian OS Targets. */
16209
16210 #undef TARGET_LITTLE_SYM
16211 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16212 #undef TARGET_LITTLE_NAME
16213 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16214 #undef TARGET_BIG_SYM
16215 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16216 #undef TARGET_BIG_NAME
16217 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16218
16219 /* Like elf32_arm_link_hash_table_create -- but overrides
16220 appropriately for Symbian OS. */
16221
16222 static struct bfd_link_hash_table *
16223 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16224 {
16225 struct bfd_link_hash_table *ret;
16226
16227 ret = elf32_arm_link_hash_table_create (abfd);
16228 if (ret)
16229 {
16230 struct elf32_arm_link_hash_table *htab
16231 = (struct elf32_arm_link_hash_table *)ret;
16232 /* There is no PLT header for Symbian OS. */
16233 htab->plt_header_size = 0;
16234 /* The PLT entries are each one instruction and one word. */
16235 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16236 htab->symbian_p = 1;
16237 /* Symbian uses armv5t or above, so use_blx is always true. */
16238 htab->use_blx = 1;
16239 htab->root.is_relocatable_executable = 1;
16240 }
16241 return ret;
16242 }
16243
16244 static const struct bfd_elf_special_section
16245 elf32_arm_symbian_special_sections[] =
16246 {
16247 /* In a BPABI executable, the dynamic linking sections do not go in
16248 the loadable read-only segment. The post-linker may wish to
16249 refer to these sections, but they are not part of the final
16250 program image. */
16251 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16252 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16253 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16254 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16255 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16256 /* These sections do not need to be writable as the SymbianOS
16257 postlinker will arrange things so that no dynamic relocation is
16258 required. */
16259 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16260 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16261 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16262 { NULL, 0, 0, 0, 0 }
16263 };
16264
16265 static void
16266 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16267 struct bfd_link_info *link_info)
16268 {
16269 /* BPABI objects are never loaded directly by an OS kernel; they are
16270 processed by a postlinker first, into an OS-specific format. If
16271 the D_PAGED bit is set on the file, BFD will align segments on
16272 page boundaries, so that an OS can directly map the file. With
16273 BPABI objects, that just results in wasted space. In addition,
16274 because we clear the D_PAGED bit, map_sections_to_segments will
16275 recognize that the program headers should not be mapped into any
16276 loadable segment. */
16277 abfd->flags &= ~D_PAGED;
16278 elf32_arm_begin_write_processing (abfd, link_info);
16279 }
16280
16281 static bfd_boolean
16282 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16283 struct bfd_link_info *info)
16284 {
16285 struct elf_segment_map *m;
16286 asection *dynsec;
16287
16288 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16289 segment. However, because the .dynamic section is not marked
16290 with SEC_LOAD, the generic ELF code will not create such a
16291 segment. */
16292 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16293 if (dynsec)
16294 {
16295 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16296 if (m->p_type == PT_DYNAMIC)
16297 break;
16298
16299 if (m == NULL)
16300 {
16301 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16302 m->next = elf_seg_map (abfd);
16303 elf_seg_map (abfd) = m;
16304 }
16305 }
16306
16307 /* Also call the generic arm routine. */
16308 return elf32_arm_modify_segment_map (abfd, info);
16309 }
16310
16311 /* Return address for Ith PLT stub in section PLT, for relocation REL
16312 or (bfd_vma) -1 if it should not be included. */
16313
16314 static bfd_vma
16315 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16316 const arelent *rel ATTRIBUTE_UNUSED)
16317 {
16318 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16319 }
16320
16321
16322 #undef elf32_bed
16323 #define elf32_bed elf32_arm_symbian_bed
16324
16325 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16326 will process them and then discard them. */
16327 #undef ELF_DYNAMIC_SEC_FLAGS
16328 #define ELF_DYNAMIC_SEC_FLAGS \
16329 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16330
16331 #undef elf_backend_emit_relocs
16332
16333 #undef bfd_elf32_bfd_link_hash_table_create
16334 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16335 #undef elf_backend_special_sections
16336 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16337 #undef elf_backend_begin_write_processing
16338 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16339 #undef elf_backend_final_write_processing
16340 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16341
16342 #undef elf_backend_modify_segment_map
16343 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16344
16345 /* There is no .got section for BPABI objects, and hence no header. */
16346 #undef elf_backend_got_header_size
16347 #define elf_backend_got_header_size 0
16348
16349 /* Similarly, there is no .got.plt section. */
16350 #undef elf_backend_want_got_plt
16351 #define elf_backend_want_got_plt 0
16352
16353 #undef elf_backend_plt_sym_val
16354 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16355
16356 #undef elf_backend_may_use_rel_p
16357 #define elf_backend_may_use_rel_p 1
16358 #undef elf_backend_may_use_rela_p
16359 #define elf_backend_may_use_rela_p 0
16360 #undef elf_backend_default_use_rela_p
16361 #define elf_backend_default_use_rela_p 0
16362 #undef elf_backend_want_plt_sym
16363 #define elf_backend_want_plt_sym 0
16364 #undef ELF_MAXPAGESIZE
16365 #define ELF_MAXPAGESIZE 0x8000
16366
16367 #include "elf32-target.h"
GDB Binutils - Deliverables
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