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Fix type of .persistent.bss section
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2021 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bool elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 false, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 false, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 false), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 true, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 false, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 true), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 false, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 false, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 false), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 true, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 false, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 true), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 true, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 false, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 true), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 false, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 false, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 false), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 false, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 false, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 false), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 false, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 false, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 false), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 false, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 false, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 false), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 false, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 false, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 false), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 true, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 false, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 true), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 true, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 false, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 true), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 false, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 false, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 false), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 false, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 false, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 false), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 false, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 false, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 false), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 true, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 false, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 true), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 true, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 false, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 true), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 false, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 true, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 false), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 false, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 true, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 false), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 false, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 true, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 false), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 false, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 true, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 false), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 false, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 true, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 false), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 false, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 true, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 false), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 false, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 true, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 false), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 false, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 true, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 false), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 true, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 true, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 true), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 false, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 true, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 false), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 true, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 false, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 true), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 true, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 false, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 true), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 true, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 false, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 true), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 true, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 false, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 true), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 false, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 false, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 false), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 true, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 false, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 true), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 true, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 false, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 true), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 true, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 false, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 true), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 false, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 false, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 false), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 false, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 false, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 false), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 false, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 false, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 false), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 false, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 false, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 false), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 false, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 false, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 false), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 false, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 false, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 false), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 false, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 false, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 true), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 true, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 false, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 true), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 false, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 false, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 false), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 false, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 false, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 false), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 true, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 false, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 true), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 true, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 false, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 true), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 false, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 false, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 false), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 false, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 false, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 false), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 true, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 false, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 true), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 true, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 false, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 true), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 true, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 false, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 true), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 true, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 false, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 true), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 true, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 false, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 true), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 true, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 false, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 true), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 false, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 false, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 false), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 true, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 false, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 false), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 true, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 false, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 true), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 true, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 false, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 true), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 true, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 false, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 true), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 true, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 false, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 true), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 true, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 false, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 true), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 true, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 false, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 true), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 true, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 false, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 true), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 true, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 false, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 true), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 true, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 false, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 true), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 true, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 false, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 true), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 true, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 false, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 true), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 true, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 false, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 true), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 true, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 false, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 true), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 true, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 false, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 true), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 true, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 false, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 true), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 true, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 false, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 true), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 true, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 false, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 true), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 true, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 false, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 true), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 true, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 false, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 true), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 true, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 false, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 true), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 true, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 false, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 true), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 true, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 false, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 true), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 true, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 false, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 true), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 true, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 false, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 true), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 true, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 false, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 true), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 true, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 false, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 true), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 true, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 false, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 true), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 false, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 false, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 false), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 false, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 false, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 false), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 false, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 false, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 false), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 false, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 false, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 false), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 false, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 false, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 false), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 false, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 false, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 false), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 false, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 true, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 false), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 false, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 false, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 false), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 false, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 false, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 false), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 false, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 false, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 false), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 false, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 false, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 false), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 false, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 false, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 false), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 true, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 false, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 true), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 false, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 false, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 false), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 false, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 false, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 false), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 false, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 false, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 false), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 false, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 false, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 false), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 true, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 false, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 true), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 true, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 false, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 true), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 false, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 true, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 false), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 false, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 true, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 false), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 false, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 true, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 false), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 false, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 true, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 false), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 false, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 true, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 false), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 false, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 false, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 false), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 false, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 false, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 false), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 false, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 false, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 false), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 false, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 false, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 false), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 false, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 false, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 false), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 false, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 false, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 false), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 false, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 false, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 false), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 false, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 false, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 false), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 true, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 false, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 true), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 true, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 false, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 true), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 true, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 false, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 true), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 false, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 true, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 false), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 false, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 false, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 false), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 false, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 false, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 false), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 false, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 false, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 false), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 false, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 false, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 false), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 false, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 false, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 false), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 false, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 false, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 false), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 false, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 false, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 false), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 false, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 false, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 false), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 false, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 false, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 false), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 false, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 false, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 false), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 false, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 false, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 false) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bool
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return false;
1989 }
1990 return true;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bool
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return false;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bool
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return false;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return true;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bool elf32_arm_use_long_plt_entry = false;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The first entry in a procedure linkage table looks like
2501 this. It is set up so that any shared library function that is
2502 called before the relocation has been set up calls the dynamic
2503 linker first. */
2504 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505 {
2506 /* First bundle: */
2507 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2508 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2509 0xe08cc00f, /* add ip, ip, pc */
2510 0xe52dc008, /* str ip, [sp, #-8]! */
2511 /* Second bundle: */
2512 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2513 0xe59cc000, /* ldr ip, [ip] */
2514 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2515 0xe12fff1c, /* bx ip */
2516 /* Third bundle: */
2517 0xe320f000, /* nop */
2518 0xe320f000, /* nop */
2519 0xe320f000, /* nop */
2520 /* .Lplt_tail: */
2521 0xe50dc004, /* str ip, [sp, #-4] */
2522 /* Fourth bundle: */
2523 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2524 0xe59cc000, /* ldr ip, [ip] */
2525 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2526 0xe12fff1c, /* bx ip */
2527 };
2528 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2529
2530 /* Subsequent entries in a procedure linkage table look like this. */
2531 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532 {
2533 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2534 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2535 0xe08cc00f, /* add ip, ip, pc */
2536 0xea000000, /* b .Lplt_tail */
2537 };
2538
2539 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2540 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2541 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2542 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2543 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2544 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2545 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2546 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2547
2548 enum stub_insn_type
2549 {
2550 THUMB16_TYPE = 1,
2551 THUMB32_TYPE,
2552 ARM_TYPE,
2553 DATA_TYPE
2554 };
2555
2556 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2557 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2558 is inserted in arm_build_one_stub(). */
2559 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2560 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2561 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2562 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2563 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2564 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2565 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2566 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2567
2568 typedef struct
2569 {
2570 bfd_vma data;
2571 enum stub_insn_type type;
2572 unsigned int r_type;
2573 int reloc_addend;
2574 } insn_sequence;
2575
2576 /* See note [Thumb nop sequence] when adding a veneer. */
2577
2578 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2579 to reach the stub if necessary. */
2580 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2581 {
2582 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2583 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2584 };
2585
2586 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2587 available. */
2588 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2589 {
2590 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2591 ARM_INSN (0xe12fff1c), /* bx ip */
2592 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2593 };
2594
2595 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2596 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2597 {
2598 THUMB16_INSN (0xb401), /* push {r0} */
2599 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2600 THUMB16_INSN (0x4684), /* mov ip, r0 */
2601 THUMB16_INSN (0xbc01), /* pop {r0} */
2602 THUMB16_INSN (0x4760), /* bx ip */
2603 THUMB16_INSN (0xbf00), /* nop */
2604 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2605 };
2606
2607 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2608 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2609 {
2610 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2611 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2612 };
2613
2614 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2615 M-profile architectures. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2617 {
2618 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2619 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2620 THUMB16_INSN (0x4760), /* bx ip */
2621 };
2622
2623 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2624 allowed. */
2625 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2626 {
2627 THUMB16_INSN (0x4778), /* bx pc */
2628 THUMB16_INSN (0xe7fd), /* b .-2 */
2629 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2630 ARM_INSN (0xe12fff1c), /* bx ip */
2631 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2632 };
2633
2634 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2635 available. */
2636 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2637 {
2638 THUMB16_INSN (0x4778), /* bx pc */
2639 THUMB16_INSN (0xe7fd), /* b .-2 */
2640 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2641 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2642 };
2643
2644 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2645 one, when the destination is close enough. */
2646 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2647 {
2648 THUMB16_INSN (0x4778), /* bx pc */
2649 THUMB16_INSN (0xe7fd), /* b .-2 */
2650 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2651 };
2652
2653 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2654 blx to reach the stub if necessary. */
2655 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2656 {
2657 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2658 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2659 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2660 };
2661
2662 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2663 blx to reach the stub if necessary. We can not add into pc;
2664 it is not guaranteed to mode switch (different in ARMv6 and
2665 ARMv7). */
2666 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2667 {
2668 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2669 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2670 ARM_INSN (0xe12fff1c), /* bx ip */
2671 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2672 };
2673
2674 /* V4T ARM -> ARM long branch stub, PIC. */
2675 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2676 {
2677 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2678 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2679 ARM_INSN (0xe12fff1c), /* bx ip */
2680 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2681 };
2682
2683 /* V4T Thumb -> ARM long branch stub, PIC. */
2684 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2685 {
2686 THUMB16_INSN (0x4778), /* bx pc */
2687 THUMB16_INSN (0xe7fd), /* b .-2 */
2688 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2689 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2690 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2691 };
2692
2693 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2694 architectures. */
2695 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2696 {
2697 THUMB16_INSN (0xb401), /* push {r0} */
2698 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2699 THUMB16_INSN (0x46fc), /* mov ip, pc */
2700 THUMB16_INSN (0x4484), /* add ip, r0 */
2701 THUMB16_INSN (0xbc01), /* pop {r0} */
2702 THUMB16_INSN (0x4760), /* bx ip */
2703 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2704 };
2705
2706 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2707 allowed. */
2708 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2709 {
2710 THUMB16_INSN (0x4778), /* bx pc */
2711 THUMB16_INSN (0xe7fd), /* b .-2 */
2712 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2713 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2714 ARM_INSN (0xe12fff1c), /* bx ip */
2715 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2716 };
2717
2718 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2719 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2720 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2721 {
2722 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2723 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2724 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2725 };
2726
2727 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2728 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2729 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2730 {
2731 THUMB16_INSN (0x4778), /* bx pc */
2732 THUMB16_INSN (0xe7fd), /* b .-2 */
2733 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2734 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2735 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2736 };
2737
2738 /* NaCl ARM -> ARM long branch stub. */
2739 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2740 {
2741 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2742 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2743 ARM_INSN (0xe12fff1c), /* bx ip */
2744 ARM_INSN (0xe320f000), /* nop */
2745 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2746 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2747 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2748 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2749 };
2750
2751 /* NaCl ARM -> ARM long branch stub, PIC. */
2752 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2753 {
2754 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2755 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2756 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2757 ARM_INSN (0xe12fff1c), /* bx ip */
2758 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2759 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2760 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2761 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2762 };
2763
2764 /* Stub used for transition to secure state (aka SG veneer). */
2765 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2766 {
2767 THUMB32_INSN (0xe97fe97f), /* sg. */
2768 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2769 };
2770
2771
2772 /* Cortex-A8 erratum-workaround stubs. */
2773
2774 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2775 can't use a conditional branch to reach this stub). */
2776
2777 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2778 {
2779 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2780 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2781 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2782 };
2783
2784 /* Stub used for b.w and bl.w instructions. */
2785
2786 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2787 {
2788 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2789 };
2790
2791 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2792 {
2793 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2794 };
2795
2796 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2797 instruction (which switches to ARM mode) to point to this stub. Jump to the
2798 real destination using an ARM-mode branch. */
2799
2800 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2801 {
2802 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2803 };
2804
2805 /* For each section group there can be a specially created linker section
2806 to hold the stubs for that group. The name of the stub section is based
2807 upon the name of another section within that group with the suffix below
2808 applied.
2809
2810 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2811 create what appeared to be a linker stub section when it actually
2812 contained user code/data. For example, consider this fragment:
2813
2814 const char * stubborn_problems[] = { "np" };
2815
2816 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2817 section called:
2818
2819 .data.rel.local.stubborn_problems
2820
2821 This then causes problems in arm32_arm_build_stubs() as it triggers:
2822
2823 // Ignore non-stub sections.
2824 if (!strstr (stub_sec->name, STUB_SUFFIX))
2825 continue;
2826
2827 And so the section would be ignored instead of being processed. Hence
2828 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2829 C identifier. */
2830 #define STUB_SUFFIX ".__stub"
2831
2832 /* One entry per long/short branch stub defined above. */
2833 #define DEF_STUBS \
2834 DEF_STUB(long_branch_any_any) \
2835 DEF_STUB(long_branch_v4t_arm_thumb) \
2836 DEF_STUB(long_branch_thumb_only) \
2837 DEF_STUB(long_branch_v4t_thumb_thumb) \
2838 DEF_STUB(long_branch_v4t_thumb_arm) \
2839 DEF_STUB(short_branch_v4t_thumb_arm) \
2840 DEF_STUB(long_branch_any_arm_pic) \
2841 DEF_STUB(long_branch_any_thumb_pic) \
2842 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2843 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2844 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2845 DEF_STUB(long_branch_thumb_only_pic) \
2846 DEF_STUB(long_branch_any_tls_pic) \
2847 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2848 DEF_STUB(long_branch_arm_nacl) \
2849 DEF_STUB(long_branch_arm_nacl_pic) \
2850 DEF_STUB(cmse_branch_thumb_only) \
2851 DEF_STUB(a8_veneer_b_cond) \
2852 DEF_STUB(a8_veneer_b) \
2853 DEF_STUB(a8_veneer_bl) \
2854 DEF_STUB(a8_veneer_blx) \
2855 DEF_STUB(long_branch_thumb2_only) \
2856 DEF_STUB(long_branch_thumb2_only_pure)
2857
2858 #define DEF_STUB(x) arm_stub_##x,
2859 enum elf32_arm_stub_type
2860 {
2861 arm_stub_none,
2862 DEF_STUBS
2863 max_stub_type
2864 };
2865 #undef DEF_STUB
2866
2867 /* Note the first a8_veneer type. */
2868 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2869
2870 typedef struct
2871 {
2872 const insn_sequence* template_sequence;
2873 int template_size;
2874 } stub_def;
2875
2876 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2877 static const stub_def stub_definitions[] =
2878 {
2879 {NULL, 0},
2880 DEF_STUBS
2881 };
2882
2883 struct elf32_arm_stub_hash_entry
2884 {
2885 /* Base hash table entry structure. */
2886 struct bfd_hash_entry root;
2887
2888 /* The stub section. */
2889 asection *stub_sec;
2890
2891 /* Offset within stub_sec of the beginning of this stub. */
2892 bfd_vma stub_offset;
2893
2894 /* Given the symbol's value and its section we can determine its final
2895 value when building the stubs (so the stub knows where to jump). */
2896 bfd_vma target_value;
2897 asection *target_section;
2898
2899 /* Same as above but for the source of the branch to the stub. Used for
2900 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2901 such, source section does not need to be recorded since Cortex-A8 erratum
2902 workaround stubs are only generated when both source and target are in the
2903 same section. */
2904 bfd_vma source_value;
2905
2906 /* The instruction which caused this stub to be generated (only valid for
2907 Cortex-A8 erratum workaround stubs at present). */
2908 unsigned long orig_insn;
2909
2910 /* The stub type. */
2911 enum elf32_arm_stub_type stub_type;
2912 /* Its encoding size in bytes. */
2913 int stub_size;
2914 /* Its template. */
2915 const insn_sequence *stub_template;
2916 /* The size of the template (number of entries). */
2917 int stub_template_size;
2918
2919 /* The symbol table entry, if any, that this was derived from. */
2920 struct elf32_arm_link_hash_entry *h;
2921
2922 /* Type of branch. */
2923 enum arm_st_branch_type branch_type;
2924
2925 /* Where this stub is being called from, or, in the case of combined
2926 stub sections, the first input section in the group. */
2927 asection *id_sec;
2928
2929 /* The name for the local symbol at the start of this stub. The
2930 stub name in the hash table has to be unique; this does not, so
2931 it can be friendlier. */
2932 char *output_name;
2933 };
2934
2935 /* Used to build a map of a section. This is required for mixed-endian
2936 code/data. */
2937
2938 typedef struct elf32_elf_section_map
2939 {
2940 bfd_vma vma;
2941 char type;
2942 }
2943 elf32_arm_section_map;
2944
2945 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2946
2947 typedef enum
2948 {
2949 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2950 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2951 VFP11_ERRATUM_ARM_VENEER,
2952 VFP11_ERRATUM_THUMB_VENEER
2953 }
2954 elf32_vfp11_erratum_type;
2955
2956 typedef struct elf32_vfp11_erratum_list
2957 {
2958 struct elf32_vfp11_erratum_list *next;
2959 bfd_vma vma;
2960 union
2961 {
2962 struct
2963 {
2964 struct elf32_vfp11_erratum_list *veneer;
2965 unsigned int vfp_insn;
2966 } b;
2967 struct
2968 {
2969 struct elf32_vfp11_erratum_list *branch;
2970 unsigned int id;
2971 } v;
2972 } u;
2973 elf32_vfp11_erratum_type type;
2974 }
2975 elf32_vfp11_erratum_list;
2976
2977 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2978 veneer. */
2979 typedef enum
2980 {
2981 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2982 STM32L4XX_ERRATUM_VENEER
2983 }
2984 elf32_stm32l4xx_erratum_type;
2985
2986 typedef struct elf32_stm32l4xx_erratum_list
2987 {
2988 struct elf32_stm32l4xx_erratum_list *next;
2989 bfd_vma vma;
2990 union
2991 {
2992 struct
2993 {
2994 struct elf32_stm32l4xx_erratum_list *veneer;
2995 unsigned int insn;
2996 } b;
2997 struct
2998 {
2999 struct elf32_stm32l4xx_erratum_list *branch;
3000 unsigned int id;
3001 } v;
3002 } u;
3003 elf32_stm32l4xx_erratum_type type;
3004 }
3005 elf32_stm32l4xx_erratum_list;
3006
3007 typedef enum
3008 {
3009 DELETE_EXIDX_ENTRY,
3010 INSERT_EXIDX_CANTUNWIND_AT_END
3011 }
3012 arm_unwind_edit_type;
3013
3014 /* A (sorted) list of edits to apply to an unwind table. */
3015 typedef struct arm_unwind_table_edit
3016 {
3017 arm_unwind_edit_type type;
3018 /* Note: we sometimes want to insert an unwind entry corresponding to a
3019 section different from the one we're currently writing out, so record the
3020 (text) section this edit relates to here. */
3021 asection *linked_section;
3022 unsigned int index;
3023 struct arm_unwind_table_edit *next;
3024 }
3025 arm_unwind_table_edit;
3026
3027 typedef struct _arm_elf_section_data
3028 {
3029 /* Information about mapping symbols. */
3030 struct bfd_elf_section_data elf;
3031 unsigned int mapcount;
3032 unsigned int mapsize;
3033 elf32_arm_section_map *map;
3034 /* Information about CPU errata. */
3035 unsigned int erratumcount;
3036 elf32_vfp11_erratum_list *erratumlist;
3037 unsigned int stm32l4xx_erratumcount;
3038 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3039 unsigned int additional_reloc_count;
3040 /* Information about unwind tables. */
3041 union
3042 {
3043 /* Unwind info attached to a text section. */
3044 struct
3045 {
3046 asection *arm_exidx_sec;
3047 } text;
3048
3049 /* Unwind info attached to an .ARM.exidx section. */
3050 struct
3051 {
3052 arm_unwind_table_edit *unwind_edit_list;
3053 arm_unwind_table_edit *unwind_edit_tail;
3054 } exidx;
3055 } u;
3056 }
3057 _arm_elf_section_data;
3058
3059 #define elf32_arm_section_data(sec) \
3060 ((_arm_elf_section_data *) elf_section_data (sec))
3061
3062 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3063 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3064 so may be created multiple times: we use an array of these entries whilst
3065 relaxing which we can refresh easily, then create stubs for each potentially
3066 erratum-triggering instruction once we've settled on a solution. */
3067
3068 struct a8_erratum_fix
3069 {
3070 bfd *input_bfd;
3071 asection *section;
3072 bfd_vma offset;
3073 bfd_vma target_offset;
3074 unsigned long orig_insn;
3075 char *stub_name;
3076 enum elf32_arm_stub_type stub_type;
3077 enum arm_st_branch_type branch_type;
3078 };
3079
3080 /* A table of relocs applied to branches which might trigger Cortex-A8
3081 erratum. */
3082
3083 struct a8_erratum_reloc
3084 {
3085 bfd_vma from;
3086 bfd_vma destination;
3087 struct elf32_arm_link_hash_entry *hash;
3088 const char *sym_name;
3089 unsigned int r_type;
3090 enum arm_st_branch_type branch_type;
3091 bool non_a8_stub;
3092 };
3093
3094 /* The size of the thread control block. */
3095 #define TCB_SIZE 8
3096
3097 /* ARM-specific information about a PLT entry, over and above the usual
3098 gotplt_union. */
3099 struct arm_plt_info
3100 {
3101 /* We reference count Thumb references to a PLT entry separately,
3102 so that we can emit the Thumb trampoline only if needed. */
3103 bfd_signed_vma thumb_refcount;
3104
3105 /* Some references from Thumb code may be eliminated by BL->BLX
3106 conversion, so record them separately. */
3107 bfd_signed_vma maybe_thumb_refcount;
3108
3109 /* How many of the recorded PLT accesses were from non-call relocations.
3110 This information is useful when deciding whether anything takes the
3111 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3112 non-call references to the function should resolve directly to the
3113 real runtime target. */
3114 unsigned int noncall_refcount;
3115
3116 /* Since PLT entries have variable size if the Thumb prologue is
3117 used, we need to record the index into .got.plt instead of
3118 recomputing it from the PLT offset. */
3119 bfd_signed_vma got_offset;
3120 };
3121
3122 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3123 struct arm_local_iplt_info
3124 {
3125 /* The information that is usually found in the generic ELF part of
3126 the hash table entry. */
3127 union gotplt_union root;
3128
3129 /* The information that is usually found in the ARM-specific part of
3130 the hash table entry. */
3131 struct arm_plt_info arm;
3132
3133 /* A list of all potential dynamic relocations against this symbol. */
3134 struct elf_dyn_relocs *dyn_relocs;
3135 };
3136
3137 /* Structure to handle FDPIC support for local functions. */
3138 struct fdpic_local {
3139 unsigned int funcdesc_cnt;
3140 unsigned int gotofffuncdesc_cnt;
3141 int funcdesc_offset;
3142 };
3143
3144 struct elf_arm_obj_tdata
3145 {
3146 struct elf_obj_tdata root;
3147
3148 /* tls_type for each local got entry. */
3149 char *local_got_tls_type;
3150
3151 /* GOTPLT entries for TLS descriptors. */
3152 bfd_vma *local_tlsdesc_gotent;
3153
3154 /* Information for local symbols that need entries in .iplt. */
3155 struct arm_local_iplt_info **local_iplt;
3156
3157 /* Zero to warn when linking objects with incompatible enum sizes. */
3158 int no_enum_size_warning;
3159
3160 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3161 int no_wchar_size_warning;
3162
3163 /* Maintains FDPIC counters and funcdesc info. */
3164 struct fdpic_local *local_fdpic_cnts;
3165 };
3166
3167 #define elf_arm_tdata(bfd) \
3168 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3169
3170 #define elf32_arm_local_got_tls_type(bfd) \
3171 (elf_arm_tdata (bfd)->local_got_tls_type)
3172
3173 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3174 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3175
3176 #define elf32_arm_local_iplt(bfd) \
3177 (elf_arm_tdata (bfd)->local_iplt)
3178
3179 #define elf32_arm_local_fdpic_cnts(bfd) \
3180 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3181
3182 #define is_arm_elf(bfd) \
3183 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3184 && elf_tdata (bfd) != NULL \
3185 && elf_object_id (bfd) == ARM_ELF_DATA)
3186
3187 static bool
3188 elf32_arm_mkobject (bfd *abfd)
3189 {
3190 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3191 ARM_ELF_DATA);
3192 }
3193
3194 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3195
3196 /* Structure to handle FDPIC support for extern functions. */
3197 struct fdpic_global {
3198 unsigned int gotofffuncdesc_cnt;
3199 unsigned int gotfuncdesc_cnt;
3200 unsigned int funcdesc_cnt;
3201 int funcdesc_offset;
3202 int gotfuncdesc_offset;
3203 };
3204
3205 /* Arm ELF linker hash entry. */
3206 struct elf32_arm_link_hash_entry
3207 {
3208 struct elf_link_hash_entry root;
3209
3210 /* ARM-specific PLT information. */
3211 struct arm_plt_info plt;
3212
3213 #define GOT_UNKNOWN 0
3214 #define GOT_NORMAL 1
3215 #define GOT_TLS_GD 2
3216 #define GOT_TLS_IE 4
3217 #define GOT_TLS_GDESC 8
3218 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3219 unsigned int tls_type : 8;
3220
3221 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3222 unsigned int is_iplt : 1;
3223
3224 unsigned int unused : 23;
3225
3226 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3227 starting at the end of the jump table. */
3228 bfd_vma tlsdesc_got;
3229
3230 /* The symbol marking the real symbol location for exported thumb
3231 symbols with Arm stubs. */
3232 struct elf_link_hash_entry *export_glue;
3233
3234 /* A pointer to the most recently used stub hash entry against this
3235 symbol. */
3236 struct elf32_arm_stub_hash_entry *stub_cache;
3237
3238 /* Counter for FDPIC relocations against this symbol. */
3239 struct fdpic_global fdpic_cnts;
3240 };
3241
3242 /* Traverse an arm ELF linker hash table. */
3243 #define elf32_arm_link_hash_traverse(table, func, info) \
3244 (elf_link_hash_traverse \
3245 (&(table)->root, \
3246 (bool (*) (struct elf_link_hash_entry *, void *)) (func), \
3247 (info)))
3248
3249 /* Get the ARM elf linker hash table from a link_info structure. */
3250 #define elf32_arm_hash_table(p) \
3251 ((is_elf_hash_table ((p)->hash) \
3252 && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \
3253 ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3254
3255 #define arm_stub_hash_lookup(table, string, create, copy) \
3256 ((struct elf32_arm_stub_hash_entry *) \
3257 bfd_hash_lookup ((table), (string), (create), (copy)))
3258
3259 /* Array to keep track of which stub sections have been created, and
3260 information on stub grouping. */
3261 struct map_stub
3262 {
3263 /* This is the section to which stubs in the group will be
3264 attached. */
3265 asection *link_sec;
3266 /* The stub section. */
3267 asection *stub_sec;
3268 };
3269
3270 #define elf32_arm_compute_jump_table_size(htab) \
3271 ((htab)->next_tls_desc_index * 4)
3272
3273 /* ARM ELF linker hash table. */
3274 struct elf32_arm_link_hash_table
3275 {
3276 /* The main hash table. */
3277 struct elf_link_hash_table root;
3278
3279 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3280 bfd_size_type thumb_glue_size;
3281
3282 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3283 bfd_size_type arm_glue_size;
3284
3285 /* The size in bytes of section containing the ARMv4 BX veneers. */
3286 bfd_size_type bx_glue_size;
3287
3288 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3289 veneer has been populated. */
3290 bfd_vma bx_glue_offset[15];
3291
3292 /* The size in bytes of the section containing glue for VFP11 erratum
3293 veneers. */
3294 bfd_size_type vfp11_erratum_glue_size;
3295
3296 /* The size in bytes of the section containing glue for STM32L4XX erratum
3297 veneers. */
3298 bfd_size_type stm32l4xx_erratum_glue_size;
3299
3300 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3301 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3302 elf32_arm_write_section(). */
3303 struct a8_erratum_fix *a8_erratum_fixes;
3304 unsigned int num_a8_erratum_fixes;
3305
3306 /* An arbitrary input BFD chosen to hold the glue sections. */
3307 bfd * bfd_of_glue_owner;
3308
3309 /* Nonzero to output a BE8 image. */
3310 int byteswap_code;
3311
3312 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3313 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3314 int target1_is_rel;
3315
3316 /* The relocation to use for R_ARM_TARGET2 relocations. */
3317 int target2_reloc;
3318
3319 /* 0 = Ignore R_ARM_V4BX.
3320 1 = Convert BX to MOV PC.
3321 2 = Generate v4 interworing stubs. */
3322 int fix_v4bx;
3323
3324 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3325 int fix_cortex_a8;
3326
3327 /* Whether we should fix the ARM1176 BLX immediate issue. */
3328 int fix_arm1176;
3329
3330 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3331 int use_blx;
3332
3333 /* What sort of code sequences we should look for which may trigger the
3334 VFP11 denorm erratum. */
3335 bfd_arm_vfp11_fix vfp11_fix;
3336
3337 /* Global counter for the number of fixes we have emitted. */
3338 int num_vfp11_fixes;
3339
3340 /* What sort of code sequences we should look for which may trigger the
3341 STM32L4XX erratum. */
3342 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3343
3344 /* Global counter for the number of fixes we have emitted. */
3345 int num_stm32l4xx_fixes;
3346
3347 /* Nonzero to force PIC branch veneers. */
3348 int pic_veneer;
3349
3350 /* The number of bytes in the initial entry in the PLT. */
3351 bfd_size_type plt_header_size;
3352
3353 /* The number of bytes in the subsequent PLT etries. */
3354 bfd_size_type plt_entry_size;
3355
3356 /* True if the target uses REL relocations. */
3357 bool use_rel;
3358
3359 /* Nonzero if import library must be a secure gateway import library
3360 as per ARMv8-M Security Extensions. */
3361 int cmse_implib;
3362
3363 /* The import library whose symbols' address must remain stable in
3364 the import library generated. */
3365 bfd *in_implib_bfd;
3366
3367 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3368 bfd_vma next_tls_desc_index;
3369
3370 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3371 bfd_vma num_tls_desc;
3372
3373 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3374 asection *srelplt2;
3375
3376 /* Offset in .plt section of tls_arm_trampoline. */
3377 bfd_vma tls_trampoline;
3378
3379 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3380 union
3381 {
3382 bfd_signed_vma refcount;
3383 bfd_vma offset;
3384 } tls_ldm_got;
3385
3386 /* For convenience in allocate_dynrelocs. */
3387 bfd * obfd;
3388
3389 /* The amount of space used by the reserved portion of the sgotplt
3390 section, plus whatever space is used by the jump slots. */
3391 bfd_vma sgotplt_jump_table_size;
3392
3393 /* The stub hash table. */
3394 struct bfd_hash_table stub_hash_table;
3395
3396 /* Linker stub bfd. */
3397 bfd *stub_bfd;
3398
3399 /* Linker call-backs. */
3400 asection * (*add_stub_section) (const char *, asection *, asection *,
3401 unsigned int);
3402 void (*layout_sections_again) (void);
3403
3404 /* Array to keep track of which stub sections have been created, and
3405 information on stub grouping. */
3406 struct map_stub *stub_group;
3407
3408 /* Input stub section holding secure gateway veneers. */
3409 asection *cmse_stub_sec;
3410
3411 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3412 start to be allocated. */
3413 bfd_vma new_cmse_stub_offset;
3414
3415 /* Number of elements in stub_group. */
3416 unsigned int top_id;
3417
3418 /* Assorted information used by elf32_arm_size_stubs. */
3419 unsigned int bfd_count;
3420 unsigned int top_index;
3421 asection **input_list;
3422
3423 /* True if the target system uses FDPIC. */
3424 int fdpic_p;
3425
3426 /* Fixup section. Used for FDPIC. */
3427 asection *srofixup;
3428 };
3429
3430 /* Add an FDPIC read-only fixup. */
3431 static void
3432 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3433 {
3434 bfd_vma fixup_offset;
3435
3436 fixup_offset = srofixup->reloc_count++ * 4;
3437 BFD_ASSERT (fixup_offset < srofixup->size);
3438 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3439 }
3440
3441 static inline int
3442 ctz (unsigned int mask)
3443 {
3444 #if GCC_VERSION >= 3004
3445 return __builtin_ctz (mask);
3446 #else
3447 unsigned int i;
3448
3449 for (i = 0; i < 8 * sizeof (mask); i++)
3450 {
3451 if (mask & 0x1)
3452 break;
3453 mask = (mask >> 1);
3454 }
3455 return i;
3456 #endif
3457 }
3458
3459 static inline int
3460 elf32_arm_popcount (unsigned int mask)
3461 {
3462 #if GCC_VERSION >= 3004
3463 return __builtin_popcount (mask);
3464 #else
3465 unsigned int i;
3466 int sum = 0;
3467
3468 for (i = 0; i < 8 * sizeof (mask); i++)
3469 {
3470 if (mask & 0x1)
3471 sum++;
3472 mask = (mask >> 1);
3473 }
3474 return sum;
3475 #endif
3476 }
3477
3478 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3479 asection *sreloc, Elf_Internal_Rela *rel);
3480
3481 static void
3482 arm_elf_fill_funcdesc(bfd *output_bfd,
3483 struct bfd_link_info *info,
3484 int *funcdesc_offset,
3485 int dynindx,
3486 int offset,
3487 bfd_vma addr,
3488 bfd_vma dynreloc_value,
3489 bfd_vma seg)
3490 {
3491 if ((*funcdesc_offset & 1) == 0)
3492 {
3493 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3494 asection *sgot = globals->root.sgot;
3495
3496 if (bfd_link_pic(info))
3497 {
3498 asection *srelgot = globals->root.srelgot;
3499 Elf_Internal_Rela outrel;
3500
3501 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3502 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3503 outrel.r_addend = 0;
3504
3505 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3506 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3507 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3508 }
3509 else
3510 {
3511 struct elf_link_hash_entry *hgot = globals->root.hgot;
3512 bfd_vma got_value = hgot->root.u.def.value
3513 + hgot->root.u.def.section->output_section->vma
3514 + hgot->root.u.def.section->output_offset;
3515
3516 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3517 sgot->output_section->vma + sgot->output_offset
3518 + offset);
3519 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3520 sgot->output_section->vma + sgot->output_offset
3521 + offset + 4);
3522 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3523 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3524 }
3525 *funcdesc_offset |= 1;
3526 }
3527 }
3528
3529 /* Create an entry in an ARM ELF linker hash table. */
3530
3531 static struct bfd_hash_entry *
3532 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3533 struct bfd_hash_table * table,
3534 const char * string)
3535 {
3536 struct elf32_arm_link_hash_entry * ret =
3537 (struct elf32_arm_link_hash_entry *) entry;
3538
3539 /* Allocate the structure if it has not already been allocated by a
3540 subclass. */
3541 if (ret == NULL)
3542 ret = (struct elf32_arm_link_hash_entry *)
3543 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3544 if (ret == NULL)
3545 return (struct bfd_hash_entry *) ret;
3546
3547 /* Call the allocation method of the superclass. */
3548 ret = ((struct elf32_arm_link_hash_entry *)
3549 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3550 table, string));
3551 if (ret != NULL)
3552 {
3553 ret->tls_type = GOT_UNKNOWN;
3554 ret->tlsdesc_got = (bfd_vma) -1;
3555 ret->plt.thumb_refcount = 0;
3556 ret->plt.maybe_thumb_refcount = 0;
3557 ret->plt.noncall_refcount = 0;
3558 ret->plt.got_offset = -1;
3559 ret->is_iplt = false;
3560 ret->export_glue = NULL;
3561
3562 ret->stub_cache = NULL;
3563
3564 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3565 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3566 ret->fdpic_cnts.funcdesc_cnt = 0;
3567 ret->fdpic_cnts.funcdesc_offset = -1;
3568 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3569 }
3570
3571 return (struct bfd_hash_entry *) ret;
3572 }
3573
3574 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3575 symbols. */
3576
3577 static bool
3578 elf32_arm_allocate_local_sym_info (bfd *abfd)
3579 {
3580 if (elf_local_got_refcounts (abfd) == NULL)
3581 {
3582 bfd_size_type num_syms;
3583 bfd_size_type size;
3584 char *data;
3585
3586 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3587 size = num_syms * (sizeof (bfd_signed_vma)
3588 + sizeof (bfd_vma)
3589 + sizeof (struct arm_local_iplt_info *)
3590 + sizeof (struct fdpic_local)
3591 + sizeof (char));
3592 data = bfd_zalloc (abfd, size);
3593 if (data == NULL)
3594 return false;
3595
3596 /* It is important that these all be allocated in descending
3597 order of required alignment, so that arrays allocated later
3598 will be sufficiently aligned. */
3599 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3600 data += num_syms * sizeof (bfd_signed_vma);
3601
3602 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3603 data += num_syms * sizeof (bfd_vma);
3604
3605 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3606 data += num_syms * sizeof (struct arm_local_iplt_info *);
3607
3608 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3609 data += num_syms * sizeof (struct fdpic_local);
3610
3611 elf32_arm_local_got_tls_type (abfd) = data;
3612 #if GCC_VERSION >= 3000
3613 BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3614 <= __alignof__ (*elf_local_got_refcounts (abfd)));
3615 BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3616 <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3617 BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3618 <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3619 BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3620 <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3621 #endif
3622 }
3623 return true;
3624 }
3625
3626 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3627 to input bfd ABFD. Create the information if it doesn't already exist.
3628 Return null if an allocation fails. */
3629
3630 static struct arm_local_iplt_info *
3631 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3632 {
3633 struct arm_local_iplt_info **ptr;
3634
3635 if (!elf32_arm_allocate_local_sym_info (abfd))
3636 return NULL;
3637
3638 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3639 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3640 if (*ptr == NULL)
3641 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3642 return *ptr;
3643 }
3644
3645 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3646 in ABFD's symbol table. If the symbol is global, H points to its
3647 hash table entry, otherwise H is null.
3648
3649 Return true if the symbol does have PLT information. When returning
3650 true, point *ROOT_PLT at the target-independent reference count/offset
3651 union and *ARM_PLT at the ARM-specific information. */
3652
3653 static bool
3654 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3655 struct elf32_arm_link_hash_entry *h,
3656 unsigned long r_symndx, union gotplt_union **root_plt,
3657 struct arm_plt_info **arm_plt)
3658 {
3659 struct arm_local_iplt_info *local_iplt;
3660
3661 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3662 return false;
3663
3664 if (h != NULL)
3665 {
3666 *root_plt = &h->root.plt;
3667 *arm_plt = &h->plt;
3668 return true;
3669 }
3670
3671 if (elf32_arm_local_iplt (abfd) == NULL)
3672 return false;
3673
3674 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3675 if (local_iplt == NULL)
3676 return false;
3677
3678 *root_plt = &local_iplt->root;
3679 *arm_plt = &local_iplt->arm;
3680 return true;
3681 }
3682
3683 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3684
3685 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3686 before it. */
3687
3688 static bool
3689 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3690 struct arm_plt_info *arm_plt)
3691 {
3692 struct elf32_arm_link_hash_table *htab;
3693
3694 htab = elf32_arm_hash_table (info);
3695
3696 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3697 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3698 }
3699
3700 /* Return a pointer to the head of the dynamic reloc list that should
3701 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3702 ABFD's symbol table. Return null if an error occurs. */
3703
3704 static struct elf_dyn_relocs **
3705 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3706 Elf_Internal_Sym *isym)
3707 {
3708 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3709 {
3710 struct arm_local_iplt_info *local_iplt;
3711
3712 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3713 if (local_iplt == NULL)
3714 return NULL;
3715 return &local_iplt->dyn_relocs;
3716 }
3717 else
3718 {
3719 /* Track dynamic relocs needed for local syms too.
3720 We really need local syms available to do this
3721 easily. Oh well. */
3722 asection *s;
3723 void *vpp;
3724
3725 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3726 if (s == NULL)
3727 abort ();
3728
3729 vpp = &elf_section_data (s)->local_dynrel;
3730 return (struct elf_dyn_relocs **) vpp;
3731 }
3732 }
3733
3734 /* Initialize an entry in the stub hash table. */
3735
3736 static struct bfd_hash_entry *
3737 stub_hash_newfunc (struct bfd_hash_entry *entry,
3738 struct bfd_hash_table *table,
3739 const char *string)
3740 {
3741 /* Allocate the structure if it has not already been allocated by a
3742 subclass. */
3743 if (entry == NULL)
3744 {
3745 entry = (struct bfd_hash_entry *)
3746 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3747 if (entry == NULL)
3748 return entry;
3749 }
3750
3751 /* Call the allocation method of the superclass. */
3752 entry = bfd_hash_newfunc (entry, table, string);
3753 if (entry != NULL)
3754 {
3755 struct elf32_arm_stub_hash_entry *eh;
3756
3757 /* Initialize the local fields. */
3758 eh = (struct elf32_arm_stub_hash_entry *) entry;
3759 eh->stub_sec = NULL;
3760 eh->stub_offset = (bfd_vma) -1;
3761 eh->source_value = 0;
3762 eh->target_value = 0;
3763 eh->target_section = NULL;
3764 eh->orig_insn = 0;
3765 eh->stub_type = arm_stub_none;
3766 eh->stub_size = 0;
3767 eh->stub_template = NULL;
3768 eh->stub_template_size = -1;
3769 eh->h = NULL;
3770 eh->id_sec = NULL;
3771 eh->output_name = NULL;
3772 }
3773
3774 return entry;
3775 }
3776
3777 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3778 shortcuts to them in our hash table. */
3779
3780 static bool
3781 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3782 {
3783 struct elf32_arm_link_hash_table *htab;
3784
3785 htab = elf32_arm_hash_table (info);
3786 if (htab == NULL)
3787 return false;
3788
3789 if (! _bfd_elf_create_got_section (dynobj, info))
3790 return false;
3791
3792 /* Also create .rofixup. */
3793 if (htab->fdpic_p)
3794 {
3795 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3796 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3797 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3798 if (htab->srofixup == NULL
3799 || !bfd_set_section_alignment (htab->srofixup, 2))
3800 return false;
3801 }
3802
3803 return true;
3804 }
3805
3806 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3807
3808 static bool
3809 create_ifunc_sections (struct bfd_link_info *info)
3810 {
3811 struct elf32_arm_link_hash_table *htab;
3812 const struct elf_backend_data *bed;
3813 bfd *dynobj;
3814 asection *s;
3815 flagword flags;
3816
3817 htab = elf32_arm_hash_table (info);
3818 dynobj = htab->root.dynobj;
3819 bed = get_elf_backend_data (dynobj);
3820 flags = bed->dynamic_sec_flags;
3821
3822 if (htab->root.iplt == NULL)
3823 {
3824 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3825 flags | SEC_READONLY | SEC_CODE);
3826 if (s == NULL
3827 || !bfd_set_section_alignment (s, bed->plt_alignment))
3828 return false;
3829 htab->root.iplt = s;
3830 }
3831
3832 if (htab->root.irelplt == NULL)
3833 {
3834 s = bfd_make_section_anyway_with_flags (dynobj,
3835 RELOC_SECTION (htab, ".iplt"),
3836 flags | SEC_READONLY);
3837 if (s == NULL
3838 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3839 return false;
3840 htab->root.irelplt = s;
3841 }
3842
3843 if (htab->root.igotplt == NULL)
3844 {
3845 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3846 if (s == NULL
3847 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3848 return false;
3849 htab->root.igotplt = s;
3850 }
3851 return true;
3852 }
3853
3854 /* Determine if we're dealing with a Thumb only architecture. */
3855
3856 static bool
3857 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3858 {
3859 int arch;
3860 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3861 Tag_CPU_arch_profile);
3862
3863 if (profile)
3864 return profile == 'M';
3865
3866 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3867
3868 /* Force return logic to be reviewed for each new architecture. */
3869 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3870
3871 if (arch == TAG_CPU_ARCH_V6_M
3872 || arch == TAG_CPU_ARCH_V6S_M
3873 || arch == TAG_CPU_ARCH_V7E_M
3874 || arch == TAG_CPU_ARCH_V8M_BASE
3875 || arch == TAG_CPU_ARCH_V8M_MAIN
3876 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3877 return true;
3878
3879 return false;
3880 }
3881
3882 /* Determine if we're dealing with a Thumb-2 object. */
3883
3884 static bool
3885 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3886 {
3887 int arch;
3888 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3889 Tag_THUMB_ISA_use);
3890
3891 if (thumb_isa)
3892 return thumb_isa == 2;
3893
3894 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3895
3896 /* Force return logic to be reviewed for each new architecture. */
3897 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3898
3899 return (arch == TAG_CPU_ARCH_V6T2
3900 || arch == TAG_CPU_ARCH_V7
3901 || arch == TAG_CPU_ARCH_V7E_M
3902 || arch == TAG_CPU_ARCH_V8
3903 || arch == TAG_CPU_ARCH_V8R
3904 || arch == TAG_CPU_ARCH_V8M_MAIN
3905 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3906 }
3907
3908 /* Determine whether Thumb-2 BL instruction is available. */
3909
3910 static bool
3911 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3912 {
3913 int arch =
3914 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3915
3916 /* Force return logic to be reviewed for each new architecture. */
3917 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3918
3919 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3920 return (arch == TAG_CPU_ARCH_V6T2
3921 || arch >= TAG_CPU_ARCH_V7);
3922 }
3923
3924 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3925 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3926 hash table. */
3927
3928 static bool
3929 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3930 {
3931 struct elf32_arm_link_hash_table *htab;
3932
3933 htab = elf32_arm_hash_table (info);
3934 if (htab == NULL)
3935 return false;
3936
3937 if (!htab->root.sgot && !create_got_section (dynobj, info))
3938 return false;
3939
3940 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3941 return false;
3942
3943 if (htab->root.target_os == is_vxworks)
3944 {
3945 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3946 return false;
3947
3948 if (bfd_link_pic (info))
3949 {
3950 htab->plt_header_size = 0;
3951 htab->plt_entry_size
3952 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3953 }
3954 else
3955 {
3956 htab->plt_header_size
3957 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3958 htab->plt_entry_size
3959 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3960 }
3961
3962 if (elf_elfheader (dynobj))
3963 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3964 }
3965 else
3966 {
3967 /* PR ld/16017
3968 Test for thumb only architectures. Note - we cannot just call
3969 using_thumb_only() as the attributes in the output bfd have not been
3970 initialised at this point, so instead we use the input bfd. */
3971 bfd * saved_obfd = htab->obfd;
3972
3973 htab->obfd = dynobj;
3974 if (using_thumb_only (htab))
3975 {
3976 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3977 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3978 }
3979 htab->obfd = saved_obfd;
3980 }
3981
3982 if (htab->fdpic_p) {
3983 htab->plt_header_size = 0;
3984 if (info->flags & DF_BIND_NOW)
3985 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3986 else
3987 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3988 }
3989
3990 if (!htab->root.splt
3991 || !htab->root.srelplt
3992 || !htab->root.sdynbss
3993 || (!bfd_link_pic (info) && !htab->root.srelbss))
3994 abort ();
3995
3996 return true;
3997 }
3998
3999 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4000
4001 static void
4002 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4003 struct elf_link_hash_entry *dir,
4004 struct elf_link_hash_entry *ind)
4005 {
4006 struct elf32_arm_link_hash_entry *edir, *eind;
4007
4008 edir = (struct elf32_arm_link_hash_entry *) dir;
4009 eind = (struct elf32_arm_link_hash_entry *) ind;
4010
4011 if (ind->root.type == bfd_link_hash_indirect)
4012 {
4013 /* Copy over PLT info. */
4014 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4015 eind->plt.thumb_refcount = 0;
4016 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4017 eind->plt.maybe_thumb_refcount = 0;
4018 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4019 eind->plt.noncall_refcount = 0;
4020
4021 /* Copy FDPIC counters. */
4022 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4023 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4024 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4025
4026 /* We should only allocate a function to .iplt once the final
4027 symbol information is known. */
4028 BFD_ASSERT (!eind->is_iplt);
4029
4030 if (dir->got.refcount <= 0)
4031 {
4032 edir->tls_type = eind->tls_type;
4033 eind->tls_type = GOT_UNKNOWN;
4034 }
4035 }
4036
4037 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4038 }
4039
4040 /* Destroy an ARM elf linker hash table. */
4041
4042 static void
4043 elf32_arm_link_hash_table_free (bfd *obfd)
4044 {
4045 struct elf32_arm_link_hash_table *ret
4046 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4047
4048 bfd_hash_table_free (&ret->stub_hash_table);
4049 _bfd_elf_link_hash_table_free (obfd);
4050 }
4051
4052 /* Create an ARM elf linker hash table. */
4053
4054 static struct bfd_link_hash_table *
4055 elf32_arm_link_hash_table_create (bfd *abfd)
4056 {
4057 struct elf32_arm_link_hash_table *ret;
4058 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4059
4060 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4061 if (ret == NULL)
4062 return NULL;
4063
4064 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4065 elf32_arm_link_hash_newfunc,
4066 sizeof (struct elf32_arm_link_hash_entry),
4067 ARM_ELF_DATA))
4068 {
4069 free (ret);
4070 return NULL;
4071 }
4072
4073 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4074 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4075 #ifdef FOUR_WORD_PLT
4076 ret->plt_header_size = 16;
4077 ret->plt_entry_size = 16;
4078 #else
4079 ret->plt_header_size = 20;
4080 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4081 #endif
4082 ret->use_rel = true;
4083 ret->obfd = abfd;
4084 ret->fdpic_p = 0;
4085
4086 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4087 sizeof (struct elf32_arm_stub_hash_entry)))
4088 {
4089 _bfd_elf_link_hash_table_free (abfd);
4090 return NULL;
4091 }
4092 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4093
4094 return &ret->root.root;
4095 }
4096
4097 /* Determine what kind of NOPs are available. */
4098
4099 static bool
4100 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4101 {
4102 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4103 Tag_CPU_arch);
4104
4105 /* Force return logic to be reviewed for each new architecture. */
4106 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4107
4108 return (arch == TAG_CPU_ARCH_V6T2
4109 || arch == TAG_CPU_ARCH_V6K
4110 || arch == TAG_CPU_ARCH_V7
4111 || arch == TAG_CPU_ARCH_V8
4112 || arch == TAG_CPU_ARCH_V8R);
4113 }
4114
4115 static bool
4116 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4117 {
4118 switch (stub_type)
4119 {
4120 case arm_stub_long_branch_thumb_only:
4121 case arm_stub_long_branch_thumb2_only:
4122 case arm_stub_long_branch_thumb2_only_pure:
4123 case arm_stub_long_branch_v4t_thumb_arm:
4124 case arm_stub_short_branch_v4t_thumb_arm:
4125 case arm_stub_long_branch_v4t_thumb_arm_pic:
4126 case arm_stub_long_branch_v4t_thumb_tls_pic:
4127 case arm_stub_long_branch_thumb_only_pic:
4128 case arm_stub_cmse_branch_thumb_only:
4129 return true;
4130 case arm_stub_none:
4131 BFD_FAIL ();
4132 return false;
4133 break;
4134 default:
4135 return false;
4136 }
4137 }
4138
4139 /* Determine the type of stub needed, if any, for a call. */
4140
4141 static enum elf32_arm_stub_type
4142 arm_type_of_stub (struct bfd_link_info *info,
4143 asection *input_sec,
4144 const Elf_Internal_Rela *rel,
4145 unsigned char st_type,
4146 enum arm_st_branch_type *actual_branch_type,
4147 struct elf32_arm_link_hash_entry *hash,
4148 bfd_vma destination,
4149 asection *sym_sec,
4150 bfd *input_bfd,
4151 const char *name)
4152 {
4153 bfd_vma location;
4154 bfd_signed_vma branch_offset;
4155 unsigned int r_type;
4156 struct elf32_arm_link_hash_table * globals;
4157 bool thumb2, thumb2_bl, thumb_only;
4158 enum elf32_arm_stub_type stub_type = arm_stub_none;
4159 int use_plt = 0;
4160 enum arm_st_branch_type branch_type = *actual_branch_type;
4161 union gotplt_union *root_plt;
4162 struct arm_plt_info *arm_plt;
4163 int arch;
4164 int thumb2_movw;
4165
4166 if (branch_type == ST_BRANCH_LONG)
4167 return stub_type;
4168
4169 globals = elf32_arm_hash_table (info);
4170 if (globals == NULL)
4171 return stub_type;
4172
4173 thumb_only = using_thumb_only (globals);
4174 thumb2 = using_thumb2 (globals);
4175 thumb2_bl = using_thumb2_bl (globals);
4176
4177 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4178
4179 /* True for architectures that implement the thumb2 movw instruction. */
4180 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4181
4182 /* Determine where the call point is. */
4183 location = (input_sec->output_offset
4184 + input_sec->output_section->vma
4185 + rel->r_offset);
4186
4187 r_type = ELF32_R_TYPE (rel->r_info);
4188
4189 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4190 are considering a function call relocation. */
4191 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4192 || r_type == R_ARM_THM_JUMP19)
4193 && branch_type == ST_BRANCH_TO_ARM)
4194 branch_type = ST_BRANCH_TO_THUMB;
4195
4196 /* For TLS call relocs, it is the caller's responsibility to provide
4197 the address of the appropriate trampoline. */
4198 if (r_type != R_ARM_TLS_CALL
4199 && r_type != R_ARM_THM_TLS_CALL
4200 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4201 ELF32_R_SYM (rel->r_info), &root_plt,
4202 &arm_plt)
4203 && root_plt->offset != (bfd_vma) -1)
4204 {
4205 asection *splt;
4206
4207 if (hash == NULL || hash->is_iplt)
4208 splt = globals->root.iplt;
4209 else
4210 splt = globals->root.splt;
4211 if (splt != NULL)
4212 {
4213 use_plt = 1;
4214
4215 /* Note when dealing with PLT entries: the main PLT stub is in
4216 ARM mode, so if the branch is in Thumb mode, another
4217 Thumb->ARM stub will be inserted later just before the ARM
4218 PLT stub. If a long branch stub is needed, we'll add a
4219 Thumb->Arm one and branch directly to the ARM PLT entry.
4220 Here, we have to check if a pre-PLT Thumb->ARM stub
4221 is needed and if it will be close enough. */
4222
4223 destination = (splt->output_section->vma
4224 + splt->output_offset
4225 + root_plt->offset);
4226 st_type = STT_FUNC;
4227
4228 /* Thumb branch/call to PLT: it can become a branch to ARM
4229 or to Thumb. We must perform the same checks and
4230 corrections as in elf32_arm_final_link_relocate. */
4231 if ((r_type == R_ARM_THM_CALL)
4232 || (r_type == R_ARM_THM_JUMP24))
4233 {
4234 if (globals->use_blx
4235 && r_type == R_ARM_THM_CALL
4236 && !thumb_only)
4237 {
4238 /* If the Thumb BLX instruction is available, convert
4239 the BL to a BLX instruction to call the ARM-mode
4240 PLT entry. */
4241 branch_type = ST_BRANCH_TO_ARM;
4242 }
4243 else
4244 {
4245 if (!thumb_only)
4246 /* Target the Thumb stub before the ARM PLT entry. */
4247 destination -= PLT_THUMB_STUB_SIZE;
4248 branch_type = ST_BRANCH_TO_THUMB;
4249 }
4250 }
4251 else
4252 {
4253 branch_type = ST_BRANCH_TO_ARM;
4254 }
4255 }
4256 }
4257 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4258 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4259
4260 branch_offset = (bfd_signed_vma)(destination - location);
4261
4262 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4263 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4264 {
4265 /* Handle cases where:
4266 - this call goes too far (different Thumb/Thumb2 max
4267 distance)
4268 - it's a Thumb->Arm call and blx is not available, or it's a
4269 Thumb->Arm branch (not bl). A stub is needed in this case,
4270 but only if this call is not through a PLT entry. Indeed,
4271 PLT stubs handle mode switching already. */
4272 if ((!thumb2_bl
4273 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4274 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4275 || (thumb2_bl
4276 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4277 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4278 || (thumb2
4279 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4280 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4281 && (r_type == R_ARM_THM_JUMP19))
4282 || (branch_type == ST_BRANCH_TO_ARM
4283 && (((r_type == R_ARM_THM_CALL
4284 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4285 || (r_type == R_ARM_THM_JUMP24)
4286 || (r_type == R_ARM_THM_JUMP19))
4287 && !use_plt))
4288 {
4289 /* If we need to insert a Thumb-Thumb long branch stub to a
4290 PLT, use one that branches directly to the ARM PLT
4291 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4292 stub, undo this now. */
4293 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4294 {
4295 branch_type = ST_BRANCH_TO_ARM;
4296 branch_offset += PLT_THUMB_STUB_SIZE;
4297 }
4298
4299 if (branch_type == ST_BRANCH_TO_THUMB)
4300 {
4301 /* Thumb to thumb. */
4302 if (!thumb_only)
4303 {
4304 if (input_sec->flags & SEC_ELF_PURECODE)
4305 _bfd_error_handler
4306 (_("%pB(%pA): warning: long branch veneers used in"
4307 " section with SHF_ARM_PURECODE section"
4308 " attribute is only supported for M-profile"
4309 " targets that implement the movw instruction"),
4310 input_bfd, input_sec);
4311
4312 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4313 /* PIC stubs. */
4314 ? ((globals->use_blx
4315 && (r_type == R_ARM_THM_CALL))
4316 /* V5T and above. Stub starts with ARM code, so
4317 we must be able to switch mode before
4318 reaching it, which is only possible for 'bl'
4319 (ie R_ARM_THM_CALL relocation). */
4320 ? arm_stub_long_branch_any_thumb_pic
4321 /* On V4T, use Thumb code only. */
4322 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4323
4324 /* non-PIC stubs. */
4325 : ((globals->use_blx
4326 && (r_type == R_ARM_THM_CALL))
4327 /* V5T and above. */
4328 ? arm_stub_long_branch_any_any
4329 /* V4T. */
4330 : arm_stub_long_branch_v4t_thumb_thumb);
4331 }
4332 else
4333 {
4334 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4335 stub_type = arm_stub_long_branch_thumb2_only_pure;
4336 else
4337 {
4338 if (input_sec->flags & SEC_ELF_PURECODE)
4339 _bfd_error_handler
4340 (_("%pB(%pA): warning: long branch veneers used in"
4341 " section with SHF_ARM_PURECODE section"
4342 " attribute is only supported for M-profile"
4343 " targets that implement the movw instruction"),
4344 input_bfd, input_sec);
4345
4346 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4347 /* PIC stub. */
4348 ? arm_stub_long_branch_thumb_only_pic
4349 /* non-PIC stub. */
4350 : (thumb2 ? arm_stub_long_branch_thumb2_only
4351 : arm_stub_long_branch_thumb_only);
4352 }
4353 }
4354 }
4355 else
4356 {
4357 if (input_sec->flags & SEC_ELF_PURECODE)
4358 _bfd_error_handler
4359 (_("%pB(%pA): warning: long branch veneers used in"
4360 " section with SHF_ARM_PURECODE section"
4361 " attribute is only supported" " for M-profile"
4362 " targets that implement the movw instruction"),
4363 input_bfd, input_sec);
4364
4365 /* Thumb to arm. */
4366 if (sym_sec != NULL
4367 && sym_sec->owner != NULL
4368 && !INTERWORK_FLAG (sym_sec->owner))
4369 {
4370 _bfd_error_handler
4371 (_("%pB(%s): warning: interworking not enabled;"
4372 " first occurrence: %pB: %s call to %s"),
4373 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4374 }
4375
4376 stub_type =
4377 (bfd_link_pic (info) | globals->pic_veneer)
4378 /* PIC stubs. */
4379 ? (r_type == R_ARM_THM_TLS_CALL
4380 /* TLS PIC stubs. */
4381 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4382 : arm_stub_long_branch_v4t_thumb_tls_pic)
4383 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4384 /* V5T PIC and above. */
4385 ? arm_stub_long_branch_any_arm_pic
4386 /* V4T PIC stub. */
4387 : arm_stub_long_branch_v4t_thumb_arm_pic))
4388
4389 /* non-PIC stubs. */
4390 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4391 /* V5T and above. */
4392 ? arm_stub_long_branch_any_any
4393 /* V4T. */
4394 : arm_stub_long_branch_v4t_thumb_arm);
4395
4396 /* Handle v4t short branches. */
4397 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4398 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4399 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4400 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4401 }
4402 }
4403 }
4404 else if (r_type == R_ARM_CALL
4405 || r_type == R_ARM_JUMP24
4406 || r_type == R_ARM_PLT32
4407 || r_type == R_ARM_TLS_CALL)
4408 {
4409 if (input_sec->flags & SEC_ELF_PURECODE)
4410 _bfd_error_handler
4411 (_("%pB(%pA): warning: long branch veneers used in"
4412 " section with SHF_ARM_PURECODE section"
4413 " attribute is only supported for M-profile"
4414 " targets that implement the movw instruction"),
4415 input_bfd, input_sec);
4416 if (branch_type == ST_BRANCH_TO_THUMB)
4417 {
4418 /* Arm to thumb. */
4419
4420 if (sym_sec != NULL
4421 && sym_sec->owner != NULL
4422 && !INTERWORK_FLAG (sym_sec->owner))
4423 {
4424 _bfd_error_handler
4425 (_("%pB(%s): warning: interworking not enabled;"
4426 " first occurrence: %pB: %s call to %s"),
4427 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4428 }
4429
4430 /* We have an extra 2-bytes reach because of
4431 the mode change (bit 24 (H) of BLX encoding). */
4432 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4433 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4434 || (r_type == R_ARM_CALL && !globals->use_blx)
4435 || (r_type == R_ARM_JUMP24)
4436 || (r_type == R_ARM_PLT32))
4437 {
4438 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4439 /* PIC stubs. */
4440 ? ((globals->use_blx)
4441 /* V5T and above. */
4442 ? arm_stub_long_branch_any_thumb_pic
4443 /* V4T stub. */
4444 : arm_stub_long_branch_v4t_arm_thumb_pic)
4445
4446 /* non-PIC stubs. */
4447 : ((globals->use_blx)
4448 /* V5T and above. */
4449 ? arm_stub_long_branch_any_any
4450 /* V4T. */
4451 : arm_stub_long_branch_v4t_arm_thumb);
4452 }
4453 }
4454 else
4455 {
4456 /* Arm to arm. */
4457 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4458 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4459 {
4460 stub_type =
4461 (bfd_link_pic (info) | globals->pic_veneer)
4462 /* PIC stubs. */
4463 ? (r_type == R_ARM_TLS_CALL
4464 /* TLS PIC Stub. */
4465 ? arm_stub_long_branch_any_tls_pic
4466 : (globals->root.target_os == is_nacl
4467 ? arm_stub_long_branch_arm_nacl_pic
4468 : arm_stub_long_branch_any_arm_pic))
4469 /* non-PIC stubs. */
4470 : (globals->root.target_os == is_nacl
4471 ? arm_stub_long_branch_arm_nacl
4472 : arm_stub_long_branch_any_any);
4473 }
4474 }
4475 }
4476
4477 /* If a stub is needed, record the actual destination type. */
4478 if (stub_type != arm_stub_none)
4479 *actual_branch_type = branch_type;
4480
4481 return stub_type;
4482 }
4483
4484 /* Build a name for an entry in the stub hash table. */
4485
4486 static char *
4487 elf32_arm_stub_name (const asection *input_section,
4488 const asection *sym_sec,
4489 const struct elf32_arm_link_hash_entry *hash,
4490 const Elf_Internal_Rela *rel,
4491 enum elf32_arm_stub_type stub_type)
4492 {
4493 char *stub_name;
4494 bfd_size_type len;
4495
4496 if (hash)
4497 {
4498 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4499 stub_name = (char *) bfd_malloc (len);
4500 if (stub_name != NULL)
4501 sprintf (stub_name, "%08x_%s+%x_%d",
4502 input_section->id & 0xffffffff,
4503 hash->root.root.root.string,
4504 (int) rel->r_addend & 0xffffffff,
4505 (int) stub_type);
4506 }
4507 else
4508 {
4509 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4510 stub_name = (char *) bfd_malloc (len);
4511 if (stub_name != NULL)
4512 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4513 input_section->id & 0xffffffff,
4514 sym_sec->id & 0xffffffff,
4515 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4516 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4517 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4518 (int) rel->r_addend & 0xffffffff,
4519 (int) stub_type);
4520 }
4521
4522 return stub_name;
4523 }
4524
4525 /* Look up an entry in the stub hash. Stub entries are cached because
4526 creating the stub name takes a bit of time. */
4527
4528 static struct elf32_arm_stub_hash_entry *
4529 elf32_arm_get_stub_entry (const asection *input_section,
4530 const asection *sym_sec,
4531 struct elf_link_hash_entry *hash,
4532 const Elf_Internal_Rela *rel,
4533 struct elf32_arm_link_hash_table *htab,
4534 enum elf32_arm_stub_type stub_type)
4535 {
4536 struct elf32_arm_stub_hash_entry *stub_entry;
4537 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4538 const asection *id_sec;
4539
4540 if ((input_section->flags & SEC_CODE) == 0)
4541 return NULL;
4542
4543 /* If the input section is the CMSE stubs one and it needs a long
4544 branch stub to reach it's final destination, give up with an
4545 error message: this is not supported. See PR ld/24709. */
4546 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME)))
4547 {
4548 bfd *output_bfd = htab->obfd;
4549 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4550
4551 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4552 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4553 CMSE_STUB_NAME,
4554 (uint64_t)out_sec->output_section->vma
4555 + out_sec->output_offset,
4556 (uint64_t)sym_sec->output_section->vma
4557 + sym_sec->output_offset
4558 + h->root.root.u.def.value);
4559 /* Exit, rather than leave incompletely processed
4560 relocations. */
4561 xexit(1);
4562 }
4563
4564 /* If this input section is part of a group of sections sharing one
4565 stub section, then use the id of the first section in the group.
4566 Stub names need to include a section id, as there may well be
4567 more than one stub used to reach say, printf, and we need to
4568 distinguish between them. */
4569 BFD_ASSERT (input_section->id <= htab->top_id);
4570 id_sec = htab->stub_group[input_section->id].link_sec;
4571
4572 if (h != NULL && h->stub_cache != NULL
4573 && h->stub_cache->h == h
4574 && h->stub_cache->id_sec == id_sec
4575 && h->stub_cache->stub_type == stub_type)
4576 {
4577 stub_entry = h->stub_cache;
4578 }
4579 else
4580 {
4581 char *stub_name;
4582
4583 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4584 if (stub_name == NULL)
4585 return NULL;
4586
4587 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4588 stub_name, false, false);
4589 if (h != NULL)
4590 h->stub_cache = stub_entry;
4591
4592 free (stub_name);
4593 }
4594
4595 return stub_entry;
4596 }
4597
4598 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4599 section. */
4600
4601 static bool
4602 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4603 {
4604 if (stub_type >= max_stub_type)
4605 abort (); /* Should be unreachable. */
4606
4607 switch (stub_type)
4608 {
4609 case arm_stub_cmse_branch_thumb_only:
4610 return true;
4611
4612 default:
4613 return false;
4614 }
4615
4616 abort (); /* Should be unreachable. */
4617 }
4618
4619 /* Required alignment (as a power of 2) for the dedicated section holding
4620 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4621 with input sections. */
4622
4623 static int
4624 arm_dedicated_stub_output_section_required_alignment
4625 (enum elf32_arm_stub_type stub_type)
4626 {
4627 if (stub_type >= max_stub_type)
4628 abort (); /* Should be unreachable. */
4629
4630 switch (stub_type)
4631 {
4632 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4633 boundary. */
4634 case arm_stub_cmse_branch_thumb_only:
4635 return 5;
4636
4637 default:
4638 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4639 return 0;
4640 }
4641
4642 abort (); /* Should be unreachable. */
4643 }
4644
4645 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4646 NULL if veneers of this type are interspersed with input sections. */
4647
4648 static const char *
4649 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4650 {
4651 if (stub_type >= max_stub_type)
4652 abort (); /* Should be unreachable. */
4653
4654 switch (stub_type)
4655 {
4656 case arm_stub_cmse_branch_thumb_only:
4657 return CMSE_STUB_NAME;
4658
4659 default:
4660 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4661 return NULL;
4662 }
4663
4664 abort (); /* Should be unreachable. */
4665 }
4666
4667 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4668 returns the address of the hash table field in HTAB holding a pointer to the
4669 corresponding input section. Otherwise, returns NULL. */
4670
4671 static asection **
4672 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4673 enum elf32_arm_stub_type stub_type)
4674 {
4675 if (stub_type >= max_stub_type)
4676 abort (); /* Should be unreachable. */
4677
4678 switch (stub_type)
4679 {
4680 case arm_stub_cmse_branch_thumb_only:
4681 return &htab->cmse_stub_sec;
4682
4683 default:
4684 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4685 return NULL;
4686 }
4687
4688 abort (); /* Should be unreachable. */
4689 }
4690
4691 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4692 is the section that branch into veneer and can be NULL if stub should go in
4693 a dedicated output section. Returns a pointer to the stub section, and the
4694 section to which the stub section will be attached (in *LINK_SEC_P).
4695 LINK_SEC_P may be NULL. */
4696
4697 static asection *
4698 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4699 struct elf32_arm_link_hash_table *htab,
4700 enum elf32_arm_stub_type stub_type)
4701 {
4702 asection *link_sec, *out_sec, **stub_sec_p;
4703 const char *stub_sec_prefix;
4704 bool dedicated_output_section =
4705 arm_dedicated_stub_output_section_required (stub_type);
4706 int align;
4707
4708 if (dedicated_output_section)
4709 {
4710 bfd *output_bfd = htab->obfd;
4711 const char *out_sec_name =
4712 arm_dedicated_stub_output_section_name (stub_type);
4713 link_sec = NULL;
4714 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4715 stub_sec_prefix = out_sec_name;
4716 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4717 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4718 if (out_sec == NULL)
4719 {
4720 _bfd_error_handler (_("no address assigned to the veneers output "
4721 "section %s"), out_sec_name);
4722 return NULL;
4723 }
4724 }
4725 else
4726 {
4727 BFD_ASSERT (section->id <= htab->top_id);
4728 link_sec = htab->stub_group[section->id].link_sec;
4729 BFD_ASSERT (link_sec != NULL);
4730 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4731 if (*stub_sec_p == NULL)
4732 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4733 stub_sec_prefix = link_sec->name;
4734 out_sec = link_sec->output_section;
4735 align = htab->root.target_os == is_nacl ? 4 : 3;
4736 }
4737
4738 if (*stub_sec_p == NULL)
4739 {
4740 size_t namelen;
4741 bfd_size_type len;
4742 char *s_name;
4743
4744 namelen = strlen (stub_sec_prefix);
4745 len = namelen + sizeof (STUB_SUFFIX);
4746 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4747 if (s_name == NULL)
4748 return NULL;
4749
4750 memcpy (s_name, stub_sec_prefix, namelen);
4751 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4752 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4753 align);
4754 if (*stub_sec_p == NULL)
4755 return NULL;
4756
4757 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4758 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4759 | SEC_KEEP;
4760 }
4761
4762 if (!dedicated_output_section)
4763 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4764
4765 if (link_sec_p)
4766 *link_sec_p = link_sec;
4767
4768 return *stub_sec_p;
4769 }
4770
4771 /* Add a new stub entry to the stub hash. Not all fields of the new
4772 stub entry are initialised. */
4773
4774 static struct elf32_arm_stub_hash_entry *
4775 elf32_arm_add_stub (const char *stub_name, asection *section,
4776 struct elf32_arm_link_hash_table *htab,
4777 enum elf32_arm_stub_type stub_type)
4778 {
4779 asection *link_sec;
4780 asection *stub_sec;
4781 struct elf32_arm_stub_hash_entry *stub_entry;
4782
4783 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4784 stub_type);
4785 if (stub_sec == NULL)
4786 return NULL;
4787
4788 /* Enter this entry into the linker stub hash table. */
4789 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4790 true, false);
4791 if (stub_entry == NULL)
4792 {
4793 if (section == NULL)
4794 section = stub_sec;
4795 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4796 section->owner, stub_name);
4797 return NULL;
4798 }
4799
4800 stub_entry->stub_sec = stub_sec;
4801 stub_entry->stub_offset = (bfd_vma) -1;
4802 stub_entry->id_sec = link_sec;
4803
4804 return stub_entry;
4805 }
4806
4807 /* Store an Arm insn into an output section not processed by
4808 elf32_arm_write_section. */
4809
4810 static void
4811 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4812 bfd * output_bfd, bfd_vma val, void * ptr)
4813 {
4814 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4815 bfd_putl32 (val, ptr);
4816 else
4817 bfd_putb32 (val, ptr);
4818 }
4819
4820 /* Store a 16-bit Thumb insn into an output section not processed by
4821 elf32_arm_write_section. */
4822
4823 static void
4824 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4825 bfd * output_bfd, bfd_vma val, void * ptr)
4826 {
4827 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4828 bfd_putl16 (val, ptr);
4829 else
4830 bfd_putb16 (val, ptr);
4831 }
4832
4833 /* Store a Thumb2 insn into an output section not processed by
4834 elf32_arm_write_section. */
4835
4836 static void
4837 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4838 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4839 {
4840 /* T2 instructions are 16-bit streamed. */
4841 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4842 {
4843 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4844 bfd_putl16 ((val & 0xffff), ptr + 2);
4845 }
4846 else
4847 {
4848 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4849 bfd_putb16 ((val & 0xffff), ptr + 2);
4850 }
4851 }
4852
4853 /* If it's possible to change R_TYPE to a more efficient access
4854 model, return the new reloc type. */
4855
4856 static unsigned
4857 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4858 struct elf_link_hash_entry *h)
4859 {
4860 int is_local = (h == NULL);
4861
4862 if (bfd_link_dll (info)
4863 || (h && h->root.type == bfd_link_hash_undefweak))
4864 return r_type;
4865
4866 /* We do not support relaxations for Old TLS models. */
4867 switch (r_type)
4868 {
4869 case R_ARM_TLS_GOTDESC:
4870 case R_ARM_TLS_CALL:
4871 case R_ARM_THM_TLS_CALL:
4872 case R_ARM_TLS_DESCSEQ:
4873 case R_ARM_THM_TLS_DESCSEQ:
4874 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4875 }
4876
4877 return r_type;
4878 }
4879
4880 static bfd_reloc_status_type elf32_arm_final_link_relocate
4881 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4882 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4883 const char *, unsigned char, enum arm_st_branch_type,
4884 struct elf_link_hash_entry *, bool *, char **);
4885
4886 static unsigned int
4887 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4888 {
4889 switch (stub_type)
4890 {
4891 case arm_stub_a8_veneer_b_cond:
4892 case arm_stub_a8_veneer_b:
4893 case arm_stub_a8_veneer_bl:
4894 return 2;
4895
4896 case arm_stub_long_branch_any_any:
4897 case arm_stub_long_branch_v4t_arm_thumb:
4898 case arm_stub_long_branch_thumb_only:
4899 case arm_stub_long_branch_thumb2_only:
4900 case arm_stub_long_branch_thumb2_only_pure:
4901 case arm_stub_long_branch_v4t_thumb_thumb:
4902 case arm_stub_long_branch_v4t_thumb_arm:
4903 case arm_stub_short_branch_v4t_thumb_arm:
4904 case arm_stub_long_branch_any_arm_pic:
4905 case arm_stub_long_branch_any_thumb_pic:
4906 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4907 case arm_stub_long_branch_v4t_arm_thumb_pic:
4908 case arm_stub_long_branch_v4t_thumb_arm_pic:
4909 case arm_stub_long_branch_thumb_only_pic:
4910 case arm_stub_long_branch_any_tls_pic:
4911 case arm_stub_long_branch_v4t_thumb_tls_pic:
4912 case arm_stub_cmse_branch_thumb_only:
4913 case arm_stub_a8_veneer_blx:
4914 return 4;
4915
4916 case arm_stub_long_branch_arm_nacl:
4917 case arm_stub_long_branch_arm_nacl_pic:
4918 return 16;
4919
4920 default:
4921 abort (); /* Should be unreachable. */
4922 }
4923 }
4924
4925 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4926 veneering (TRUE) or have their own symbol (FALSE). */
4927
4928 static bool
4929 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4930 {
4931 if (stub_type >= max_stub_type)
4932 abort (); /* Should be unreachable. */
4933
4934 switch (stub_type)
4935 {
4936 case arm_stub_cmse_branch_thumb_only:
4937 return true;
4938
4939 default:
4940 return false;
4941 }
4942
4943 abort (); /* Should be unreachable. */
4944 }
4945
4946 /* Returns the padding needed for the dedicated section used stubs of type
4947 STUB_TYPE. */
4948
4949 static int
4950 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4951 {
4952 if (stub_type >= max_stub_type)
4953 abort (); /* Should be unreachable. */
4954
4955 switch (stub_type)
4956 {
4957 case arm_stub_cmse_branch_thumb_only:
4958 return 32;
4959
4960 default:
4961 return 0;
4962 }
4963
4964 abort (); /* Should be unreachable. */
4965 }
4966
4967 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4968 returns the address of the hash table field in HTAB holding the offset at
4969 which new veneers should be layed out in the stub section. */
4970
4971 static bfd_vma*
4972 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4973 enum elf32_arm_stub_type stub_type)
4974 {
4975 switch (stub_type)
4976 {
4977 case arm_stub_cmse_branch_thumb_only:
4978 return &htab->new_cmse_stub_offset;
4979
4980 default:
4981 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4982 return NULL;
4983 }
4984 }
4985
4986 static bool
4987 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4988 void * in_arg)
4989 {
4990 #define MAXRELOCS 3
4991 bool removed_sg_veneer;
4992 struct elf32_arm_stub_hash_entry *stub_entry;
4993 struct elf32_arm_link_hash_table *globals;
4994 struct bfd_link_info *info;
4995 asection *stub_sec;
4996 bfd *stub_bfd;
4997 bfd_byte *loc;
4998 bfd_vma sym_value;
4999 int template_size;
5000 int size;
5001 const insn_sequence *template_sequence;
5002 int i;
5003 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5004 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5005 int nrelocs = 0;
5006 int just_allocated = 0;
5007
5008 /* Massage our args to the form they really have. */
5009 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5010 info = (struct bfd_link_info *) in_arg;
5011
5012 /* Fail if the target section could not be assigned to an output
5013 section. The user should fix his linker script. */
5014 if (stub_entry->target_section->output_section == NULL
5015 && info->non_contiguous_regions)
5016 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5017 "Retry without --enable-non-contiguous-regions.\n"),
5018 stub_entry->target_section);
5019
5020 globals = elf32_arm_hash_table (info);
5021 if (globals == NULL)
5022 return false;
5023
5024 stub_sec = stub_entry->stub_sec;
5025
5026 if ((globals->fix_cortex_a8 < 0)
5027 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5028 /* We have to do less-strictly-aligned fixes last. */
5029 return true;
5030
5031 /* Assign a slot at the end of section if none assigned yet. */
5032 if (stub_entry->stub_offset == (bfd_vma) -1)
5033 {
5034 stub_entry->stub_offset = stub_sec->size;
5035 just_allocated = 1;
5036 }
5037 loc = stub_sec->contents + stub_entry->stub_offset;
5038
5039 stub_bfd = stub_sec->owner;
5040
5041 /* This is the address of the stub destination. */
5042 sym_value = (stub_entry->target_value
5043 + stub_entry->target_section->output_offset
5044 + stub_entry->target_section->output_section->vma);
5045
5046 template_sequence = stub_entry->stub_template;
5047 template_size = stub_entry->stub_template_size;
5048
5049 size = 0;
5050 for (i = 0; i < template_size; i++)
5051 {
5052 switch (template_sequence[i].type)
5053 {
5054 case THUMB16_TYPE:
5055 {
5056 bfd_vma data = (bfd_vma) template_sequence[i].data;
5057 if (template_sequence[i].reloc_addend != 0)
5058 {
5059 /* We've borrowed the reloc_addend field to mean we should
5060 insert a condition code into this (Thumb-1 branch)
5061 instruction. See THUMB16_BCOND_INSN. */
5062 BFD_ASSERT ((data & 0xff00) == 0xd000);
5063 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5064 }
5065 bfd_put_16 (stub_bfd, data, loc + size);
5066 size += 2;
5067 }
5068 break;
5069
5070 case THUMB32_TYPE:
5071 bfd_put_16 (stub_bfd,
5072 (template_sequence[i].data >> 16) & 0xffff,
5073 loc + size);
5074 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5075 loc + size + 2);
5076 if (template_sequence[i].r_type != R_ARM_NONE)
5077 {
5078 stub_reloc_idx[nrelocs] = i;
5079 stub_reloc_offset[nrelocs++] = size;
5080 }
5081 size += 4;
5082 break;
5083
5084 case ARM_TYPE:
5085 bfd_put_32 (stub_bfd, template_sequence[i].data,
5086 loc + size);
5087 /* Handle cases where the target is encoded within the
5088 instruction. */
5089 if (template_sequence[i].r_type == R_ARM_JUMP24)
5090 {
5091 stub_reloc_idx[nrelocs] = i;
5092 stub_reloc_offset[nrelocs++] = size;
5093 }
5094 size += 4;
5095 break;
5096
5097 case DATA_TYPE:
5098 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5099 stub_reloc_idx[nrelocs] = i;
5100 stub_reloc_offset[nrelocs++] = size;
5101 size += 4;
5102 break;
5103
5104 default:
5105 BFD_FAIL ();
5106 return false;
5107 }
5108 }
5109
5110 if (just_allocated)
5111 stub_sec->size += size;
5112
5113 /* Stub size has already been computed in arm_size_one_stub. Check
5114 consistency. */
5115 BFD_ASSERT (size == stub_entry->stub_size);
5116
5117 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5118 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5119 sym_value |= 1;
5120
5121 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5122 to relocate in each stub. */
5123 removed_sg_veneer =
5124 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5125 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5126
5127 for (i = 0; i < nrelocs; i++)
5128 {
5129 Elf_Internal_Rela rel;
5130 bool unresolved_reloc;
5131 char *error_message;
5132 bfd_vma points_to =
5133 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5134
5135 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5136 rel.r_info = ELF32_R_INFO (0,
5137 template_sequence[stub_reloc_idx[i]].r_type);
5138 rel.r_addend = 0;
5139
5140 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5141 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5142 template should refer back to the instruction after the original
5143 branch. We use target_section as Cortex-A8 erratum workaround stubs
5144 are only generated when both source and target are in the same
5145 section. */
5146 points_to = stub_entry->target_section->output_section->vma
5147 + stub_entry->target_section->output_offset
5148 + stub_entry->source_value;
5149
5150 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5151 (template_sequence[stub_reloc_idx[i]].r_type),
5152 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5153 points_to, info, stub_entry->target_section, "", STT_FUNC,
5154 stub_entry->branch_type,
5155 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5156 &error_message);
5157 }
5158
5159 return true;
5160 #undef MAXRELOCS
5161 }
5162
5163 /* Calculate the template, template size and instruction size for a stub.
5164 Return value is the instruction size. */
5165
5166 static unsigned int
5167 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5168 const insn_sequence **stub_template,
5169 int *stub_template_size)
5170 {
5171 const insn_sequence *template_sequence = NULL;
5172 int template_size = 0, i;
5173 unsigned int size;
5174
5175 template_sequence = stub_definitions[stub_type].template_sequence;
5176 if (stub_template)
5177 *stub_template = template_sequence;
5178
5179 template_size = stub_definitions[stub_type].template_size;
5180 if (stub_template_size)
5181 *stub_template_size = template_size;
5182
5183 size = 0;
5184 for (i = 0; i < template_size; i++)
5185 {
5186 switch (template_sequence[i].type)
5187 {
5188 case THUMB16_TYPE:
5189 size += 2;
5190 break;
5191
5192 case ARM_TYPE:
5193 case THUMB32_TYPE:
5194 case DATA_TYPE:
5195 size += 4;
5196 break;
5197
5198 default:
5199 BFD_FAIL ();
5200 return 0;
5201 }
5202 }
5203
5204 return size;
5205 }
5206
5207 /* As above, but don't actually build the stub. Just bump offset so
5208 we know stub section sizes. */
5209
5210 static bool
5211 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5212 void *in_arg ATTRIBUTE_UNUSED)
5213 {
5214 struct elf32_arm_stub_hash_entry *stub_entry;
5215 const insn_sequence *template_sequence;
5216 int template_size, size;
5217
5218 /* Massage our args to the form they really have. */
5219 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5220
5221 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5222 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5223
5224 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5225 &template_size);
5226
5227 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5228 if (stub_entry->stub_template_size)
5229 {
5230 stub_entry->stub_size = size;
5231 stub_entry->stub_template = template_sequence;
5232 stub_entry->stub_template_size = template_size;
5233 }
5234
5235 /* Already accounted for. */
5236 if (stub_entry->stub_offset != (bfd_vma) -1)
5237 return true;
5238
5239 size = (size + 7) & ~7;
5240 stub_entry->stub_sec->size += size;
5241
5242 return true;
5243 }
5244
5245 /* External entry points for sizing and building linker stubs. */
5246
5247 /* Set up various things so that we can make a list of input sections
5248 for each output section included in the link. Returns -1 on error,
5249 0 when no stubs will be needed, and 1 on success. */
5250
5251 int
5252 elf32_arm_setup_section_lists (bfd *output_bfd,
5253 struct bfd_link_info *info)
5254 {
5255 bfd *input_bfd;
5256 unsigned int bfd_count;
5257 unsigned int top_id, top_index;
5258 asection *section;
5259 asection **input_list, **list;
5260 size_t amt;
5261 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5262
5263 if (htab == NULL)
5264 return 0;
5265
5266 /* Count the number of input BFDs and find the top input section id. */
5267 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5268 input_bfd != NULL;
5269 input_bfd = input_bfd->link.next)
5270 {
5271 bfd_count += 1;
5272 for (section = input_bfd->sections;
5273 section != NULL;
5274 section = section->next)
5275 {
5276 if (top_id < section->id)
5277 top_id = section->id;
5278 }
5279 }
5280 htab->bfd_count = bfd_count;
5281
5282 amt = sizeof (struct map_stub) * (top_id + 1);
5283 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5284 if (htab->stub_group == NULL)
5285 return -1;
5286 htab->top_id = top_id;
5287
5288 /* We can't use output_bfd->section_count here to find the top output
5289 section index as some sections may have been removed, and
5290 _bfd_strip_section_from_output doesn't renumber the indices. */
5291 for (section = output_bfd->sections, top_index = 0;
5292 section != NULL;
5293 section = section->next)
5294 {
5295 if (top_index < section->index)
5296 top_index = section->index;
5297 }
5298
5299 htab->top_index = top_index;
5300 amt = sizeof (asection *) * (top_index + 1);
5301 input_list = (asection **) bfd_malloc (amt);
5302 htab->input_list = input_list;
5303 if (input_list == NULL)
5304 return -1;
5305
5306 /* For sections we aren't interested in, mark their entries with a
5307 value we can check later. */
5308 list = input_list + top_index;
5309 do
5310 *list = bfd_abs_section_ptr;
5311 while (list-- != input_list);
5312
5313 for (section = output_bfd->sections;
5314 section != NULL;
5315 section = section->next)
5316 {
5317 if ((section->flags & SEC_CODE) != 0)
5318 input_list[section->index] = NULL;
5319 }
5320
5321 return 1;
5322 }
5323
5324 /* The linker repeatedly calls this function for each input section,
5325 in the order that input sections are linked into output sections.
5326 Build lists of input sections to determine groupings between which
5327 we may insert linker stubs. */
5328
5329 void
5330 elf32_arm_next_input_section (struct bfd_link_info *info,
5331 asection *isec)
5332 {
5333 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5334
5335 if (htab == NULL)
5336 return;
5337
5338 if (isec->output_section->index <= htab->top_index)
5339 {
5340 asection **list = htab->input_list + isec->output_section->index;
5341
5342 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5343 {
5344 /* Steal the link_sec pointer for our list. */
5345 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5346 /* This happens to make the list in reverse order,
5347 which we reverse later. */
5348 PREV_SEC (isec) = *list;
5349 *list = isec;
5350 }
5351 }
5352 }
5353
5354 /* See whether we can group stub sections together. Grouping stub
5355 sections may result in fewer stubs. More importantly, we need to
5356 put all .init* and .fini* stubs at the end of the .init or
5357 .fini output sections respectively, because glibc splits the
5358 _init and _fini functions into multiple parts. Putting a stub in
5359 the middle of a function is not a good idea. */
5360
5361 static void
5362 group_sections (struct elf32_arm_link_hash_table *htab,
5363 bfd_size_type stub_group_size,
5364 bool stubs_always_after_branch)
5365 {
5366 asection **list = htab->input_list;
5367
5368 do
5369 {
5370 asection *tail = *list;
5371 asection *head;
5372
5373 if (tail == bfd_abs_section_ptr)
5374 continue;
5375
5376 /* Reverse the list: we must avoid placing stubs at the
5377 beginning of the section because the beginning of the text
5378 section may be required for an interrupt vector in bare metal
5379 code. */
5380 #define NEXT_SEC PREV_SEC
5381 head = NULL;
5382 while (tail != NULL)
5383 {
5384 /* Pop from tail. */
5385 asection *item = tail;
5386 tail = PREV_SEC (item);
5387
5388 /* Push on head. */
5389 NEXT_SEC (item) = head;
5390 head = item;
5391 }
5392
5393 while (head != NULL)
5394 {
5395 asection *curr;
5396 asection *next;
5397 bfd_vma stub_group_start = head->output_offset;
5398 bfd_vma end_of_next;
5399
5400 curr = head;
5401 while (NEXT_SEC (curr) != NULL)
5402 {
5403 next = NEXT_SEC (curr);
5404 end_of_next = next->output_offset + next->size;
5405 if (end_of_next - stub_group_start >= stub_group_size)
5406 /* End of NEXT is too far from start, so stop. */
5407 break;
5408 /* Add NEXT to the group. */
5409 curr = next;
5410 }
5411
5412 /* OK, the size from the start to the start of CURR is less
5413 than stub_group_size and thus can be handled by one stub
5414 section. (Or the head section is itself larger than
5415 stub_group_size, in which case we may be toast.)
5416 We should really be keeping track of the total size of
5417 stubs added here, as stubs contribute to the final output
5418 section size. */
5419 do
5420 {
5421 next = NEXT_SEC (head);
5422 /* Set up this stub group. */
5423 htab->stub_group[head->id].link_sec = curr;
5424 }
5425 while (head != curr && (head = next) != NULL);
5426
5427 /* But wait, there's more! Input sections up to stub_group_size
5428 bytes after the stub section can be handled by it too. */
5429 if (!stubs_always_after_branch)
5430 {
5431 stub_group_start = curr->output_offset + curr->size;
5432
5433 while (next != NULL)
5434 {
5435 end_of_next = next->output_offset + next->size;
5436 if (end_of_next - stub_group_start >= stub_group_size)
5437 /* End of NEXT is too far from stubs, so stop. */
5438 break;
5439 /* Add NEXT to the stub group. */
5440 head = next;
5441 next = NEXT_SEC (head);
5442 htab->stub_group[head->id].link_sec = curr;
5443 }
5444 }
5445 head = next;
5446 }
5447 }
5448 while (list++ != htab->input_list + htab->top_index);
5449
5450 free (htab->input_list);
5451 #undef PREV_SEC
5452 #undef NEXT_SEC
5453 }
5454
5455 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5456 erratum fix. */
5457
5458 static int
5459 a8_reloc_compare (const void *a, const void *b)
5460 {
5461 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5462 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5463
5464 if (ra->from < rb->from)
5465 return -1;
5466 else if (ra->from > rb->from)
5467 return 1;
5468 else
5469 return 0;
5470 }
5471
5472 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5473 const char *, char **);
5474
5475 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5476 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5477 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5478 otherwise. */
5479
5480 static bool
5481 cortex_a8_erratum_scan (bfd *input_bfd,
5482 struct bfd_link_info *info,
5483 struct a8_erratum_fix **a8_fixes_p,
5484 unsigned int *num_a8_fixes_p,
5485 unsigned int *a8_fix_table_size_p,
5486 struct a8_erratum_reloc *a8_relocs,
5487 unsigned int num_a8_relocs,
5488 unsigned prev_num_a8_fixes,
5489 bool *stub_changed_p)
5490 {
5491 asection *section;
5492 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5493 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5494 unsigned int num_a8_fixes = *num_a8_fixes_p;
5495 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5496
5497 if (htab == NULL)
5498 return false;
5499
5500 for (section = input_bfd->sections;
5501 section != NULL;
5502 section = section->next)
5503 {
5504 bfd_byte *contents = NULL;
5505 struct _arm_elf_section_data *sec_data;
5506 unsigned int span;
5507 bfd_vma base_vma;
5508
5509 if (elf_section_type (section) != SHT_PROGBITS
5510 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5511 || (section->flags & SEC_EXCLUDE) != 0
5512 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5513 || (section->output_section == bfd_abs_section_ptr))
5514 continue;
5515
5516 base_vma = section->output_section->vma + section->output_offset;
5517
5518 if (elf_section_data (section)->this_hdr.contents != NULL)
5519 contents = elf_section_data (section)->this_hdr.contents;
5520 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5521 return true;
5522
5523 sec_data = elf32_arm_section_data (section);
5524
5525 for (span = 0; span < sec_data->mapcount; span++)
5526 {
5527 unsigned int span_start = sec_data->map[span].vma;
5528 unsigned int span_end = (span == sec_data->mapcount - 1)
5529 ? section->size : sec_data->map[span + 1].vma;
5530 unsigned int i;
5531 char span_type = sec_data->map[span].type;
5532 bool last_was_32bit = false, last_was_branch = false;
5533
5534 if (span_type != 't')
5535 continue;
5536
5537 /* Span is entirely within a single 4KB region: skip scanning. */
5538 if (((base_vma + span_start) & ~0xfff)
5539 == ((base_vma + span_end) & ~0xfff))
5540 continue;
5541
5542 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5543
5544 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5545 * The branch target is in the same 4KB region as the
5546 first half of the branch.
5547 * The instruction before the branch is a 32-bit
5548 length non-branch instruction. */
5549 for (i = span_start; i < span_end;)
5550 {
5551 unsigned int insn = bfd_getl16 (&contents[i]);
5552 bool insn_32bit = false, is_blx = false, is_b = false;
5553 bool is_bl = false, is_bcc = false, is_32bit_branch;
5554
5555 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5556 insn_32bit = true;
5557
5558 if (insn_32bit)
5559 {
5560 /* Load the rest of the insn (in manual-friendly order). */
5561 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5562
5563 /* Encoding T4: B<c>.W. */
5564 is_b = (insn & 0xf800d000) == 0xf0009000;
5565 /* Encoding T1: BL<c>.W. */
5566 is_bl = (insn & 0xf800d000) == 0xf000d000;
5567 /* Encoding T2: BLX<c>.W. */
5568 is_blx = (insn & 0xf800d000) == 0xf000c000;
5569 /* Encoding T3: B<c>.W (not permitted in IT block). */
5570 is_bcc = (insn & 0xf800d000) == 0xf0008000
5571 && (insn & 0x07f00000) != 0x03800000;
5572 }
5573
5574 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5575
5576 if (((base_vma + i) & 0xfff) == 0xffe
5577 && insn_32bit
5578 && is_32bit_branch
5579 && last_was_32bit
5580 && ! last_was_branch)
5581 {
5582 bfd_signed_vma offset = 0;
5583 bool force_target_arm = false;
5584 bool force_target_thumb = false;
5585 bfd_vma target;
5586 enum elf32_arm_stub_type stub_type = arm_stub_none;
5587 struct a8_erratum_reloc key, *found;
5588 bool use_plt = false;
5589
5590 key.from = base_vma + i;
5591 found = (struct a8_erratum_reloc *)
5592 bsearch (&key, a8_relocs, num_a8_relocs,
5593 sizeof (struct a8_erratum_reloc),
5594 &a8_reloc_compare);
5595
5596 if (found)
5597 {
5598 char *error_message = NULL;
5599 struct elf_link_hash_entry *entry;
5600
5601 /* We don't care about the error returned from this
5602 function, only if there is glue or not. */
5603 entry = find_thumb_glue (info, found->sym_name,
5604 &error_message);
5605
5606 if (entry)
5607 found->non_a8_stub = true;
5608
5609 /* Keep a simpler condition, for the sake of clarity. */
5610 if (htab->root.splt != NULL && found->hash != NULL
5611 && found->hash->root.plt.offset != (bfd_vma) -1)
5612 use_plt = true;
5613
5614 if (found->r_type == R_ARM_THM_CALL)
5615 {
5616 if (found->branch_type == ST_BRANCH_TO_ARM
5617 || use_plt)
5618 force_target_arm = true;
5619 else
5620 force_target_thumb = true;
5621 }
5622 }
5623
5624 /* Check if we have an offending branch instruction. */
5625
5626 if (found && found->non_a8_stub)
5627 /* We've already made a stub for this instruction, e.g.
5628 it's a long branch or a Thumb->ARM stub. Assume that
5629 stub will suffice to work around the A8 erratum (see
5630 setting of always_after_branch above). */
5631 ;
5632 else if (is_bcc)
5633 {
5634 offset = (insn & 0x7ff) << 1;
5635 offset |= (insn & 0x3f0000) >> 4;
5636 offset |= (insn & 0x2000) ? 0x40000 : 0;
5637 offset |= (insn & 0x800) ? 0x80000 : 0;
5638 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5639 if (offset & 0x100000)
5640 offset |= ~ ((bfd_signed_vma) 0xfffff);
5641 stub_type = arm_stub_a8_veneer_b_cond;
5642 }
5643 else if (is_b || is_bl || is_blx)
5644 {
5645 int s = (insn & 0x4000000) != 0;
5646 int j1 = (insn & 0x2000) != 0;
5647 int j2 = (insn & 0x800) != 0;
5648 int i1 = !(j1 ^ s);
5649 int i2 = !(j2 ^ s);
5650
5651 offset = (insn & 0x7ff) << 1;
5652 offset |= (insn & 0x3ff0000) >> 4;
5653 offset |= i2 << 22;
5654 offset |= i1 << 23;
5655 offset |= s << 24;
5656 if (offset & 0x1000000)
5657 offset |= ~ ((bfd_signed_vma) 0xffffff);
5658
5659 if (is_blx)
5660 offset &= ~ ((bfd_signed_vma) 3);
5661
5662 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5663 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5664 }
5665
5666 if (stub_type != arm_stub_none)
5667 {
5668 bfd_vma pc_for_insn = base_vma + i + 4;
5669
5670 /* The original instruction is a BL, but the target is
5671 an ARM instruction. If we were not making a stub,
5672 the BL would have been converted to a BLX. Use the
5673 BLX stub instead in that case. */
5674 if (htab->use_blx && force_target_arm
5675 && stub_type == arm_stub_a8_veneer_bl)
5676 {
5677 stub_type = arm_stub_a8_veneer_blx;
5678 is_blx = true;
5679 is_bl = false;
5680 }
5681 /* Conversely, if the original instruction was
5682 BLX but the target is Thumb mode, use the BL
5683 stub. */
5684 else if (force_target_thumb
5685 && stub_type == arm_stub_a8_veneer_blx)
5686 {
5687 stub_type = arm_stub_a8_veneer_bl;
5688 is_blx = false;
5689 is_bl = true;
5690 }
5691
5692 if (is_blx)
5693 pc_for_insn &= ~ ((bfd_vma) 3);
5694
5695 /* If we found a relocation, use the proper destination,
5696 not the offset in the (unrelocated) instruction.
5697 Note this is always done if we switched the stub type
5698 above. */
5699 if (found)
5700 offset =
5701 (bfd_signed_vma) (found->destination - pc_for_insn);
5702
5703 /* If the stub will use a Thumb-mode branch to a
5704 PLT target, redirect it to the preceding Thumb
5705 entry point. */
5706 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5707 offset -= PLT_THUMB_STUB_SIZE;
5708
5709 target = pc_for_insn + offset;
5710
5711 /* The BLX stub is ARM-mode code. Adjust the offset to
5712 take the different PC value (+8 instead of +4) into
5713 account. */
5714 if (stub_type == arm_stub_a8_veneer_blx)
5715 offset += 4;
5716
5717 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5718 {
5719 char *stub_name = NULL;
5720
5721 if (num_a8_fixes == a8_fix_table_size)
5722 {
5723 a8_fix_table_size *= 2;
5724 a8_fixes = (struct a8_erratum_fix *)
5725 bfd_realloc (a8_fixes,
5726 sizeof (struct a8_erratum_fix)
5727 * a8_fix_table_size);
5728 }
5729
5730 if (num_a8_fixes < prev_num_a8_fixes)
5731 {
5732 /* If we're doing a subsequent scan,
5733 check if we've found the same fix as
5734 before, and try and reuse the stub
5735 name. */
5736 stub_name = a8_fixes[num_a8_fixes].stub_name;
5737 if ((a8_fixes[num_a8_fixes].section != section)
5738 || (a8_fixes[num_a8_fixes].offset != i))
5739 {
5740 free (stub_name);
5741 stub_name = NULL;
5742 *stub_changed_p = true;
5743 }
5744 }
5745
5746 if (!stub_name)
5747 {
5748 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5749 if (stub_name != NULL)
5750 sprintf (stub_name, "%x:%x", section->id, i);
5751 }
5752
5753 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5754 a8_fixes[num_a8_fixes].section = section;
5755 a8_fixes[num_a8_fixes].offset = i;
5756 a8_fixes[num_a8_fixes].target_offset =
5757 target - base_vma;
5758 a8_fixes[num_a8_fixes].orig_insn = insn;
5759 a8_fixes[num_a8_fixes].stub_name = stub_name;
5760 a8_fixes[num_a8_fixes].stub_type = stub_type;
5761 a8_fixes[num_a8_fixes].branch_type =
5762 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5763
5764 num_a8_fixes++;
5765 }
5766 }
5767 }
5768
5769 i += insn_32bit ? 4 : 2;
5770 last_was_32bit = insn_32bit;
5771 last_was_branch = is_32bit_branch;
5772 }
5773 }
5774
5775 if (elf_section_data (section)->this_hdr.contents == NULL)
5776 free (contents);
5777 }
5778
5779 *a8_fixes_p = a8_fixes;
5780 *num_a8_fixes_p = num_a8_fixes;
5781 *a8_fix_table_size_p = a8_fix_table_size;
5782
5783 return false;
5784 }
5785
5786 /* Create or update a stub entry depending on whether the stub can already be
5787 found in HTAB. The stub is identified by:
5788 - its type STUB_TYPE
5789 - its source branch (note that several can share the same stub) whose
5790 section and relocation (if any) are given by SECTION and IRELA
5791 respectively
5792 - its target symbol whose input section, hash, name, value and branch type
5793 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5794 respectively
5795
5796 If found, the value of the stub's target symbol is updated from SYM_VALUE
5797 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5798 TRUE and the stub entry is initialized.
5799
5800 Returns the stub that was created or updated, or NULL if an error
5801 occurred. */
5802
5803 static struct elf32_arm_stub_hash_entry *
5804 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5805 enum elf32_arm_stub_type stub_type, asection *section,
5806 Elf_Internal_Rela *irela, asection *sym_sec,
5807 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5808 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5809 bool *new_stub)
5810 {
5811 const asection *id_sec;
5812 char *stub_name;
5813 struct elf32_arm_stub_hash_entry *stub_entry;
5814 unsigned int r_type;
5815 bool sym_claimed = arm_stub_sym_claimed (stub_type);
5816
5817 BFD_ASSERT (stub_type != arm_stub_none);
5818 *new_stub = false;
5819
5820 if (sym_claimed)
5821 stub_name = sym_name;
5822 else
5823 {
5824 BFD_ASSERT (irela);
5825 BFD_ASSERT (section);
5826 BFD_ASSERT (section->id <= htab->top_id);
5827
5828 /* Support for grouping stub sections. */
5829 id_sec = htab->stub_group[section->id].link_sec;
5830
5831 /* Get the name of this stub. */
5832 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5833 stub_type);
5834 if (!stub_name)
5835 return NULL;
5836 }
5837
5838 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5839 false);
5840 /* The proper stub has already been created, just update its value. */
5841 if (stub_entry != NULL)
5842 {
5843 if (!sym_claimed)
5844 free (stub_name);
5845 stub_entry->target_value = sym_value;
5846 return stub_entry;
5847 }
5848
5849 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5850 if (stub_entry == NULL)
5851 {
5852 if (!sym_claimed)
5853 free (stub_name);
5854 return NULL;
5855 }
5856
5857 stub_entry->target_value = sym_value;
5858 stub_entry->target_section = sym_sec;
5859 stub_entry->stub_type = stub_type;
5860 stub_entry->h = hash;
5861 stub_entry->branch_type = branch_type;
5862
5863 if (sym_claimed)
5864 stub_entry->output_name = sym_name;
5865 else
5866 {
5867 if (sym_name == NULL)
5868 sym_name = "unnamed";
5869 stub_entry->output_name = (char *)
5870 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5871 + strlen (sym_name));
5872 if (stub_entry->output_name == NULL)
5873 {
5874 free (stub_name);
5875 return NULL;
5876 }
5877
5878 /* For historical reasons, use the existing names for ARM-to-Thumb and
5879 Thumb-to-ARM stubs. */
5880 r_type = ELF32_R_TYPE (irela->r_info);
5881 if ((r_type == (unsigned int) R_ARM_THM_CALL
5882 || r_type == (unsigned int) R_ARM_THM_JUMP24
5883 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5884 && branch_type == ST_BRANCH_TO_ARM)
5885 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5886 else if ((r_type == (unsigned int) R_ARM_CALL
5887 || r_type == (unsigned int) R_ARM_JUMP24)
5888 && branch_type == ST_BRANCH_TO_THUMB)
5889 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5890 else
5891 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5892 }
5893
5894 *new_stub = true;
5895 return stub_entry;
5896 }
5897
5898 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5899 gateway veneer to transition from non secure to secure state and create them
5900 accordingly.
5901
5902 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5903 defines the conditions that govern Secure Gateway veneer creation for a
5904 given symbol <SYM> as follows:
5905 - it has function type
5906 - it has non local binding
5907 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5908 same type, binding and value as <SYM> (called normal symbol).
5909 An entry function can handle secure state transition itself in which case
5910 its special symbol would have a different value from the normal symbol.
5911
5912 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5913 entry mapping while HTAB gives the name to hash entry mapping.
5914 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5915 created.
5916
5917 The return value gives whether a stub failed to be allocated. */
5918
5919 static bool
5920 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5921 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5922 int *cmse_stub_created)
5923 {
5924 const struct elf_backend_data *bed;
5925 Elf_Internal_Shdr *symtab_hdr;
5926 unsigned i, j, sym_count, ext_start;
5927 Elf_Internal_Sym *cmse_sym, *local_syms;
5928 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5929 enum arm_st_branch_type branch_type;
5930 char *sym_name, *lsym_name;
5931 bfd_vma sym_value;
5932 asection *section;
5933 struct elf32_arm_stub_hash_entry *stub_entry;
5934 bool is_v8m, new_stub, cmse_invalid, ret = true;
5935
5936 bed = get_elf_backend_data (input_bfd);
5937 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5938 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5939 ext_start = symtab_hdr->sh_info;
5940 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5941 && out_attr[Tag_CPU_arch_profile].i == 'M');
5942
5943 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5944 if (local_syms == NULL)
5945 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5946 symtab_hdr->sh_info, 0, NULL, NULL,
5947 NULL);
5948 if (symtab_hdr->sh_info && local_syms == NULL)
5949 return false;
5950
5951 /* Scan symbols. */
5952 for (i = 0; i < sym_count; i++)
5953 {
5954 cmse_invalid = false;
5955
5956 if (i < ext_start)
5957 {
5958 cmse_sym = &local_syms[i];
5959 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5960 symtab_hdr->sh_link,
5961 cmse_sym->st_name);
5962 if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
5963 continue;
5964
5965 /* Special symbol with local binding. */
5966 cmse_invalid = true;
5967 }
5968 else
5969 {
5970 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5971 sym_name = (char *) cmse_hash->root.root.root.string;
5972 if (!startswith (sym_name, CMSE_PREFIX))
5973 continue;
5974
5975 /* Special symbol has incorrect binding or type. */
5976 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5977 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5978 || cmse_hash->root.type != STT_FUNC)
5979 cmse_invalid = true;
5980 }
5981
5982 if (!is_v8m)
5983 {
5984 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5985 "ARMv8-M architecture or later"),
5986 input_bfd, sym_name);
5987 is_v8m = true; /* Avoid multiple warning. */
5988 ret = false;
5989 }
5990
5991 if (cmse_invalid)
5992 {
5993 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5994 " a global or weak function symbol"),
5995 input_bfd, sym_name);
5996 ret = false;
5997 if (i < ext_start)
5998 continue;
5999 }
6000
6001 sym_name += strlen (CMSE_PREFIX);
6002 hash = (struct elf32_arm_link_hash_entry *)
6003 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6004
6005 /* No associated normal symbol or it is neither global nor weak. */
6006 if (!hash
6007 || (hash->root.root.type != bfd_link_hash_defined
6008 && hash->root.root.type != bfd_link_hash_defweak)
6009 || hash->root.type != STT_FUNC)
6010 {
6011 /* Initialize here to avoid warning about use of possibly
6012 uninitialized variable. */
6013 j = 0;
6014
6015 if (!hash)
6016 {
6017 /* Searching for a normal symbol with local binding. */
6018 for (; j < ext_start; j++)
6019 {
6020 lsym_name =
6021 bfd_elf_string_from_elf_section (input_bfd,
6022 symtab_hdr->sh_link,
6023 local_syms[j].st_name);
6024 if (!strcmp (sym_name, lsym_name))
6025 break;
6026 }
6027 }
6028
6029 if (hash || j < ext_start)
6030 {
6031 _bfd_error_handler
6032 (_("%pB: invalid standard symbol `%s'; it must be "
6033 "a global or weak function symbol"),
6034 input_bfd, sym_name);
6035 }
6036 else
6037 _bfd_error_handler
6038 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6039 ret = false;
6040 if (!hash)
6041 continue;
6042 }
6043
6044 sym_value = hash->root.root.u.def.value;
6045 section = hash->root.root.u.def.section;
6046
6047 if (cmse_hash->root.root.u.def.section != section)
6048 {
6049 _bfd_error_handler
6050 (_("%pB: `%s' and its special symbol are in different sections"),
6051 input_bfd, sym_name);
6052 ret = false;
6053 }
6054 if (cmse_hash->root.root.u.def.value != sym_value)
6055 continue; /* Ignore: could be an entry function starting with SG. */
6056
6057 /* If this section is a link-once section that will be discarded, then
6058 don't create any stubs. */
6059 if (section->output_section == NULL)
6060 {
6061 _bfd_error_handler
6062 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6063 continue;
6064 }
6065
6066 if (hash->root.size == 0)
6067 {
6068 _bfd_error_handler
6069 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6070 ret = false;
6071 }
6072
6073 if (!ret)
6074 continue;
6075 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6076 stub_entry
6077 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6078 NULL, NULL, section, hash, sym_name,
6079 sym_value, branch_type, &new_stub);
6080
6081 if (stub_entry == NULL)
6082 ret = false;
6083 else
6084 {
6085 BFD_ASSERT (new_stub);
6086 (*cmse_stub_created)++;
6087 }
6088 }
6089
6090 if (!symtab_hdr->contents)
6091 free (local_syms);
6092 return ret;
6093 }
6094
6095 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6096 code entry function, ie can be called from non secure code without using a
6097 veneer. */
6098
6099 static bool
6100 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6101 {
6102 bfd_byte contents[4];
6103 uint32_t first_insn;
6104 asection *section;
6105 file_ptr offset;
6106 bfd *abfd;
6107
6108 /* Defined symbol of function type. */
6109 if (hash->root.root.type != bfd_link_hash_defined
6110 && hash->root.root.type != bfd_link_hash_defweak)
6111 return false;
6112 if (hash->root.type != STT_FUNC)
6113 return false;
6114
6115 /* Read first instruction. */
6116 section = hash->root.root.u.def.section;
6117 abfd = section->owner;
6118 offset = hash->root.root.u.def.value - section->vma;
6119 if (!bfd_get_section_contents (abfd, section, contents, offset,
6120 sizeof (contents)))
6121 return false;
6122
6123 first_insn = bfd_get_32 (abfd, contents);
6124
6125 /* Starts by SG instruction. */
6126 return first_insn == 0xe97fe97f;
6127 }
6128
6129 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6130 secure gateway veneers (ie. the veneers was not in the input import library)
6131 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6132
6133 static bool
6134 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6135 {
6136 struct elf32_arm_stub_hash_entry *stub_entry;
6137 struct bfd_link_info *info;
6138
6139 /* Massage our args to the form they really have. */
6140 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6141 info = (struct bfd_link_info *) gen_info;
6142
6143 if (info->out_implib_bfd)
6144 return true;
6145
6146 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6147 return true;
6148
6149 if (stub_entry->stub_offset == (bfd_vma) -1)
6150 _bfd_error_handler (" %s", stub_entry->output_name);
6151
6152 return true;
6153 }
6154
6155 /* Set offset of each secure gateway veneers so that its address remain
6156 identical to the one in the input import library referred by
6157 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6158 (present in input import library but absent from the executable being
6159 linked) or if new veneers appeared and there is no output import library
6160 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6161 number of secure gateway veneers found in the input import library.
6162
6163 The function returns whether an error occurred. If no error occurred,
6164 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6165 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6166 veneer observed set for new veneers to be layed out after. */
6167
6168 static bool
6169 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6170 struct elf32_arm_link_hash_table *htab,
6171 int *cmse_stub_created)
6172 {
6173 long symsize;
6174 char *sym_name;
6175 flagword flags;
6176 long i, symcount;
6177 bfd *in_implib_bfd;
6178 asection *stub_out_sec;
6179 bool ret = true;
6180 Elf_Internal_Sym *intsym;
6181 const char *out_sec_name;
6182 bfd_size_type cmse_stub_size;
6183 asymbol **sympp = NULL, *sym;
6184 struct elf32_arm_link_hash_entry *hash;
6185 const insn_sequence *cmse_stub_template;
6186 struct elf32_arm_stub_hash_entry *stub_entry;
6187 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6188 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6189 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6190
6191 /* No input secure gateway import library. */
6192 if (!htab->in_implib_bfd)
6193 return true;
6194
6195 in_implib_bfd = htab->in_implib_bfd;
6196 if (!htab->cmse_implib)
6197 {
6198 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6199 "Gateway import libraries"), in_implib_bfd);
6200 return false;
6201 }
6202
6203 /* Get symbol table size. */
6204 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6205 if (symsize < 0)
6206 return false;
6207
6208 /* Read in the input secure gateway import library's symbol table. */
6209 sympp = (asymbol **) bfd_malloc (symsize);
6210 if (sympp == NULL)
6211 return false;
6212
6213 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6214 if (symcount < 0)
6215 {
6216 ret = false;
6217 goto free_sym_buf;
6218 }
6219
6220 htab->new_cmse_stub_offset = 0;
6221 cmse_stub_size =
6222 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6223 &cmse_stub_template,
6224 &cmse_stub_template_size);
6225 out_sec_name =
6226 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6227 stub_out_sec =
6228 bfd_get_section_by_name (htab->obfd, out_sec_name);
6229 if (stub_out_sec != NULL)
6230 cmse_stub_sec_vma = stub_out_sec->vma;
6231
6232 /* Set addresses of veneers mentionned in input secure gateway import
6233 library's symbol table. */
6234 for (i = 0; i < symcount; i++)
6235 {
6236 sym = sympp[i];
6237 flags = sym->flags;
6238 sym_name = (char *) bfd_asymbol_name (sym);
6239 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6240
6241 if (sym->section != bfd_abs_section_ptr
6242 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6243 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6244 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6245 != ST_BRANCH_TO_THUMB))
6246 {
6247 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6248 "symbol should be absolute, global and "
6249 "refer to Thumb functions"),
6250 in_implib_bfd, sym_name);
6251 ret = false;
6252 continue;
6253 }
6254
6255 veneer_value = bfd_asymbol_value (sym);
6256 stub_offset = veneer_value - cmse_stub_sec_vma;
6257 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6258 false, false);
6259 hash = (struct elf32_arm_link_hash_entry *)
6260 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6261
6262 /* Stub entry should have been created by cmse_scan or the symbol be of
6263 a secure function callable from non secure code. */
6264 if (!stub_entry && !hash)
6265 {
6266 bool new_stub;
6267
6268 _bfd_error_handler
6269 (_("entry function `%s' disappeared from secure code"), sym_name);
6270 hash = (struct elf32_arm_link_hash_entry *)
6271 elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6272 stub_entry
6273 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6274 NULL, NULL, bfd_abs_section_ptr, hash,
6275 sym_name, veneer_value,
6276 ST_BRANCH_TO_THUMB, &new_stub);
6277 if (stub_entry == NULL)
6278 ret = false;
6279 else
6280 {
6281 BFD_ASSERT (new_stub);
6282 new_cmse_stubs_created++;
6283 (*cmse_stub_created)++;
6284 }
6285 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6286 stub_entry->stub_offset = stub_offset;
6287 }
6288 /* Symbol found is not callable from non secure code. */
6289 else if (!stub_entry)
6290 {
6291 if (!cmse_entry_fct_p (hash))
6292 {
6293 _bfd_error_handler (_("`%s' refers to a non entry function"),
6294 sym_name);
6295 ret = false;
6296 }
6297 continue;
6298 }
6299 else
6300 {
6301 /* Only stubs for SG veneers should have been created. */
6302 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6303
6304 /* Check visibility hasn't changed. */
6305 if (!!(flags & BSF_GLOBAL)
6306 != (hash->root.root.type == bfd_link_hash_defined))
6307 _bfd_error_handler
6308 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6309 sym_name);
6310
6311 stub_entry->stub_offset = stub_offset;
6312 }
6313
6314 /* Size should match that of a SG veneer. */
6315 if (intsym->st_size != cmse_stub_size)
6316 {
6317 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6318 in_implib_bfd, sym_name);
6319 ret = false;
6320 }
6321
6322 /* Previous veneer address is before current SG veneer section. */
6323 if (veneer_value < cmse_stub_sec_vma)
6324 {
6325 /* Avoid offset underflow. */
6326 if (stub_entry)
6327 stub_entry->stub_offset = 0;
6328 stub_offset = 0;
6329 ret = false;
6330 }
6331
6332 /* Complain if stub offset not a multiple of stub size. */
6333 if (stub_offset % cmse_stub_size)
6334 {
6335 _bfd_error_handler
6336 (_("offset of veneer for entry function `%s' not a multiple of "
6337 "its size"), sym_name);
6338 ret = false;
6339 }
6340
6341 if (!ret)
6342 continue;
6343
6344 new_cmse_stubs_created--;
6345 if (veneer_value < cmse_stub_array_start)
6346 cmse_stub_array_start = veneer_value;
6347 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6348 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6349 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6350 }
6351
6352 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6353 {
6354 BFD_ASSERT (new_cmse_stubs_created > 0);
6355 _bfd_error_handler
6356 (_("new entry function(s) introduced but no output import library "
6357 "specified:"));
6358 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6359 }
6360
6361 if (cmse_stub_array_start != cmse_stub_sec_vma)
6362 {
6363 _bfd_error_handler
6364 (_("start address of `%s' is different from previous link"),
6365 out_sec_name);
6366 ret = false;
6367 }
6368
6369 free_sym_buf:
6370 free (sympp);
6371 return ret;
6372 }
6373
6374 /* Determine and set the size of the stub section for a final link.
6375
6376 The basic idea here is to examine all the relocations looking for
6377 PC-relative calls to a target that is unreachable with a "bl"
6378 instruction. */
6379
6380 bool
6381 elf32_arm_size_stubs (bfd *output_bfd,
6382 bfd *stub_bfd,
6383 struct bfd_link_info *info,
6384 bfd_signed_vma group_size,
6385 asection * (*add_stub_section) (const char *, asection *,
6386 asection *,
6387 unsigned int),
6388 void (*layout_sections_again) (void))
6389 {
6390 bool ret = true;
6391 obj_attribute *out_attr;
6392 int cmse_stub_created = 0;
6393 bfd_size_type stub_group_size;
6394 bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6395 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6396 struct a8_erratum_fix *a8_fixes = NULL;
6397 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6398 struct a8_erratum_reloc *a8_relocs = NULL;
6399 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6400
6401 if (htab == NULL)
6402 return false;
6403
6404 if (htab->fix_cortex_a8)
6405 {
6406 a8_fixes = (struct a8_erratum_fix *)
6407 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6408 a8_relocs = (struct a8_erratum_reloc *)
6409 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6410 }
6411
6412 /* Propagate mach to stub bfd, because it may not have been
6413 finalized when we created stub_bfd. */
6414 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6415 bfd_get_mach (output_bfd));
6416
6417 /* Stash our params away. */
6418 htab->stub_bfd = stub_bfd;
6419 htab->add_stub_section = add_stub_section;
6420 htab->layout_sections_again = layout_sections_again;
6421 stubs_always_after_branch = group_size < 0;
6422
6423 out_attr = elf_known_obj_attributes_proc (output_bfd);
6424 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6425
6426 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6427 as the first half of a 32-bit branch straddling two 4K pages. This is a
6428 crude way of enforcing that. */
6429 if (htab->fix_cortex_a8)
6430 stubs_always_after_branch = 1;
6431
6432 if (group_size < 0)
6433 stub_group_size = -group_size;
6434 else
6435 stub_group_size = group_size;
6436
6437 if (stub_group_size == 1)
6438 {
6439 /* Default values. */
6440 /* Thumb branch range is +-4MB has to be used as the default
6441 maximum size (a given section can contain both ARM and Thumb
6442 code, so the worst case has to be taken into account).
6443
6444 This value is 24K less than that, which allows for 2025
6445 12-byte stubs. If we exceed that, then we will fail to link.
6446 The user will have to relink with an explicit group size
6447 option. */
6448 stub_group_size = 4170000;
6449 }
6450
6451 group_sections (htab, stub_group_size, stubs_always_after_branch);
6452
6453 /* If we're applying the cortex A8 fix, we need to determine the
6454 program header size now, because we cannot change it later --
6455 that could alter section placements. Notice the A8 erratum fix
6456 ends up requiring the section addresses to remain unchanged
6457 modulo the page size. That's something we cannot represent
6458 inside BFD, and we don't want to force the section alignment to
6459 be the page size. */
6460 if (htab->fix_cortex_a8)
6461 (*htab->layout_sections_again) ();
6462
6463 while (1)
6464 {
6465 bfd *input_bfd;
6466 unsigned int bfd_indx;
6467 asection *stub_sec;
6468 enum elf32_arm_stub_type stub_type;
6469 bool stub_changed = false;
6470 unsigned prev_num_a8_fixes = num_a8_fixes;
6471
6472 num_a8_fixes = 0;
6473 for (input_bfd = info->input_bfds, bfd_indx = 0;
6474 input_bfd != NULL;
6475 input_bfd = input_bfd->link.next, bfd_indx++)
6476 {
6477 Elf_Internal_Shdr *symtab_hdr;
6478 asection *section;
6479 Elf_Internal_Sym *local_syms = NULL;
6480
6481 if (!is_arm_elf (input_bfd))
6482 continue;
6483 if ((input_bfd->flags & DYNAMIC) != 0
6484 && (elf_sym_hashes (input_bfd) == NULL
6485 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6486 continue;
6487
6488 num_a8_relocs = 0;
6489
6490 /* We'll need the symbol table in a second. */
6491 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6492 if (symtab_hdr->sh_info == 0)
6493 continue;
6494
6495 /* Limit scan of symbols to object file whose profile is
6496 Microcontroller to not hinder performance in the general case. */
6497 if (m_profile && first_veneer_scan)
6498 {
6499 struct elf_link_hash_entry **sym_hashes;
6500
6501 sym_hashes = elf_sym_hashes (input_bfd);
6502 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6503 &cmse_stub_created))
6504 goto error_ret_free_local;
6505
6506 if (cmse_stub_created != 0)
6507 stub_changed = true;
6508 }
6509
6510 /* Walk over each section attached to the input bfd. */
6511 for (section = input_bfd->sections;
6512 section != NULL;
6513 section = section->next)
6514 {
6515 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6516
6517 /* If there aren't any relocs, then there's nothing more
6518 to do. */
6519 if ((section->flags & SEC_RELOC) == 0
6520 || section->reloc_count == 0
6521 || (section->flags & SEC_CODE) == 0)
6522 continue;
6523
6524 /* If this section is a link-once section that will be
6525 discarded, then don't create any stubs. */
6526 if (section->output_section == NULL
6527 || section->output_section->owner != output_bfd)
6528 continue;
6529
6530 /* Get the relocs. */
6531 internal_relocs
6532 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6533 NULL, info->keep_memory);
6534 if (internal_relocs == NULL)
6535 goto error_ret_free_local;
6536
6537 /* Now examine each relocation. */
6538 irela = internal_relocs;
6539 irelaend = irela + section->reloc_count;
6540 for (; irela < irelaend; irela++)
6541 {
6542 unsigned int r_type, r_indx;
6543 asection *sym_sec;
6544 bfd_vma sym_value;
6545 bfd_vma destination;
6546 struct elf32_arm_link_hash_entry *hash;
6547 const char *sym_name;
6548 unsigned char st_type;
6549 enum arm_st_branch_type branch_type;
6550 bool created_stub = false;
6551
6552 r_type = ELF32_R_TYPE (irela->r_info);
6553 r_indx = ELF32_R_SYM (irela->r_info);
6554
6555 if (r_type >= (unsigned int) R_ARM_max)
6556 {
6557 bfd_set_error (bfd_error_bad_value);
6558 error_ret_free_internal:
6559 if (elf_section_data (section)->relocs == NULL)
6560 free (internal_relocs);
6561 /* Fall through. */
6562 error_ret_free_local:
6563 if (symtab_hdr->contents != (unsigned char *) local_syms)
6564 free (local_syms);
6565 return false;
6566 }
6567
6568 hash = NULL;
6569 if (r_indx >= symtab_hdr->sh_info)
6570 hash = elf32_arm_hash_entry
6571 (elf_sym_hashes (input_bfd)
6572 [r_indx - symtab_hdr->sh_info]);
6573
6574 /* Only look for stubs on branch instructions, or
6575 non-relaxed TLSCALL */
6576 if ((r_type != (unsigned int) R_ARM_CALL)
6577 && (r_type != (unsigned int) R_ARM_THM_CALL)
6578 && (r_type != (unsigned int) R_ARM_JUMP24)
6579 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6580 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6581 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6582 && (r_type != (unsigned int) R_ARM_PLT32)
6583 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6584 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6585 && r_type == (elf32_arm_tls_transition
6586 (info, r_type,
6587 (struct elf_link_hash_entry *) hash))
6588 && ((hash ? hash->tls_type
6589 : (elf32_arm_local_got_tls_type
6590 (input_bfd)[r_indx]))
6591 & GOT_TLS_GDESC) != 0))
6592 continue;
6593
6594 /* Now determine the call target, its name, value,
6595 section. */
6596 sym_sec = NULL;
6597 sym_value = 0;
6598 destination = 0;
6599 sym_name = NULL;
6600
6601 if (r_type == (unsigned int) R_ARM_TLS_CALL
6602 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6603 {
6604 /* A non-relaxed TLS call. The target is the
6605 plt-resident trampoline and nothing to do
6606 with the symbol. */
6607 BFD_ASSERT (htab->tls_trampoline > 0);
6608 sym_sec = htab->root.splt;
6609 sym_value = htab->tls_trampoline;
6610 hash = 0;
6611 st_type = STT_FUNC;
6612 branch_type = ST_BRANCH_TO_ARM;
6613 }
6614 else if (!hash)
6615 {
6616 /* It's a local symbol. */
6617 Elf_Internal_Sym *sym;
6618
6619 if (local_syms == NULL)
6620 {
6621 local_syms
6622 = (Elf_Internal_Sym *) symtab_hdr->contents;
6623 if (local_syms == NULL)
6624 local_syms
6625 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6626 symtab_hdr->sh_info, 0,
6627 NULL, NULL, NULL);
6628 if (local_syms == NULL)
6629 goto error_ret_free_internal;
6630 }
6631
6632 sym = local_syms + r_indx;
6633 if (sym->st_shndx == SHN_UNDEF)
6634 sym_sec = bfd_und_section_ptr;
6635 else if (sym->st_shndx == SHN_ABS)
6636 sym_sec = bfd_abs_section_ptr;
6637 else if (sym->st_shndx == SHN_COMMON)
6638 sym_sec = bfd_com_section_ptr;
6639 else
6640 sym_sec =
6641 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6642
6643 if (!sym_sec)
6644 /* This is an undefined symbol. It can never
6645 be resolved. */
6646 continue;
6647
6648 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6649 sym_value = sym->st_value;
6650 destination = (sym_value + irela->r_addend
6651 + sym_sec->output_offset
6652 + sym_sec->output_section->vma);
6653 st_type = ELF_ST_TYPE (sym->st_info);
6654 branch_type =
6655 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6656 sym_name
6657 = bfd_elf_string_from_elf_section (input_bfd,
6658 symtab_hdr->sh_link,
6659 sym->st_name);
6660 }
6661 else
6662 {
6663 /* It's an external symbol. */
6664 while (hash->root.root.type == bfd_link_hash_indirect
6665 || hash->root.root.type == bfd_link_hash_warning)
6666 hash = ((struct elf32_arm_link_hash_entry *)
6667 hash->root.root.u.i.link);
6668
6669 if (hash->root.root.type == bfd_link_hash_defined
6670 || hash->root.root.type == bfd_link_hash_defweak)
6671 {
6672 sym_sec = hash->root.root.u.def.section;
6673 sym_value = hash->root.root.u.def.value;
6674
6675 struct elf32_arm_link_hash_table *globals =
6676 elf32_arm_hash_table (info);
6677
6678 /* For a destination in a shared library,
6679 use the PLT stub as target address to
6680 decide whether a branch stub is
6681 needed. */
6682 if (globals != NULL
6683 && globals->root.splt != NULL
6684 && hash != NULL
6685 && hash->root.plt.offset != (bfd_vma) -1)
6686 {
6687 sym_sec = globals->root.splt;
6688 sym_value = hash->root.plt.offset;
6689 if (sym_sec->output_section != NULL)
6690 destination = (sym_value
6691 + sym_sec->output_offset
6692 + sym_sec->output_section->vma);
6693 }
6694 else if (sym_sec->output_section != NULL)
6695 destination = (sym_value + irela->r_addend
6696 + sym_sec->output_offset
6697 + sym_sec->output_section->vma);
6698 }
6699 else if ((hash->root.root.type == bfd_link_hash_undefined)
6700 || (hash->root.root.type == bfd_link_hash_undefweak))
6701 {
6702 /* For a shared library, use the PLT stub as
6703 target address to decide whether a long
6704 branch stub is needed.
6705 For absolute code, they cannot be handled. */
6706 struct elf32_arm_link_hash_table *globals =
6707 elf32_arm_hash_table (info);
6708
6709 if (globals != NULL
6710 && globals->root.splt != NULL
6711 && hash != NULL
6712 && hash->root.plt.offset != (bfd_vma) -1)
6713 {
6714 sym_sec = globals->root.splt;
6715 sym_value = hash->root.plt.offset;
6716 if (sym_sec->output_section != NULL)
6717 destination = (sym_value
6718 + sym_sec->output_offset
6719 + sym_sec->output_section->vma);
6720 }
6721 else
6722 continue;
6723 }
6724 else
6725 {
6726 bfd_set_error (bfd_error_bad_value);
6727 goto error_ret_free_internal;
6728 }
6729 st_type = hash->root.type;
6730 branch_type =
6731 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6732 sym_name = hash->root.root.root.string;
6733 }
6734
6735 do
6736 {
6737 bool new_stub;
6738 struct elf32_arm_stub_hash_entry *stub_entry;
6739
6740 /* Determine what (if any) linker stub is needed. */
6741 stub_type = arm_type_of_stub (info, section, irela,
6742 st_type, &branch_type,
6743 hash, destination, sym_sec,
6744 input_bfd, sym_name);
6745 if (stub_type == arm_stub_none)
6746 break;
6747
6748 /* We've either created a stub for this reloc already,
6749 or we are about to. */
6750 stub_entry =
6751 elf32_arm_create_stub (htab, stub_type, section, irela,
6752 sym_sec, hash,
6753 (char *) sym_name, sym_value,
6754 branch_type, &new_stub);
6755
6756 created_stub = stub_entry != NULL;
6757 if (!created_stub)
6758 goto error_ret_free_internal;
6759 else if (!new_stub)
6760 break;
6761 else
6762 stub_changed = true;
6763 }
6764 while (0);
6765
6766 /* Look for relocations which might trigger Cortex-A8
6767 erratum. */
6768 if (htab->fix_cortex_a8
6769 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6770 || r_type == (unsigned int) R_ARM_THM_JUMP19
6771 || r_type == (unsigned int) R_ARM_THM_CALL
6772 || r_type == (unsigned int) R_ARM_THM_XPC22))
6773 {
6774 bfd_vma from = section->output_section->vma
6775 + section->output_offset
6776 + irela->r_offset;
6777
6778 if ((from & 0xfff) == 0xffe)
6779 {
6780 /* Found a candidate. Note we haven't checked the
6781 destination is within 4K here: if we do so (and
6782 don't create an entry in a8_relocs) we can't tell
6783 that a branch should have been relocated when
6784 scanning later. */
6785 if (num_a8_relocs == a8_reloc_table_size)
6786 {
6787 a8_reloc_table_size *= 2;
6788 a8_relocs = (struct a8_erratum_reloc *)
6789 bfd_realloc (a8_relocs,
6790 sizeof (struct a8_erratum_reloc)
6791 * a8_reloc_table_size);
6792 }
6793
6794 a8_relocs[num_a8_relocs].from = from;
6795 a8_relocs[num_a8_relocs].destination = destination;
6796 a8_relocs[num_a8_relocs].r_type = r_type;
6797 a8_relocs[num_a8_relocs].branch_type = branch_type;
6798 a8_relocs[num_a8_relocs].sym_name = sym_name;
6799 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6800 a8_relocs[num_a8_relocs].hash = hash;
6801
6802 num_a8_relocs++;
6803 }
6804 }
6805 }
6806
6807 /* We're done with the internal relocs, free them. */
6808 if (elf_section_data (section)->relocs == NULL)
6809 free (internal_relocs);
6810 }
6811
6812 if (htab->fix_cortex_a8)
6813 {
6814 /* Sort relocs which might apply to Cortex-A8 erratum. */
6815 qsort (a8_relocs, num_a8_relocs,
6816 sizeof (struct a8_erratum_reloc),
6817 &a8_reloc_compare);
6818
6819 /* Scan for branches which might trigger Cortex-A8 erratum. */
6820 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6821 &num_a8_fixes, &a8_fix_table_size,
6822 a8_relocs, num_a8_relocs,
6823 prev_num_a8_fixes, &stub_changed)
6824 != 0)
6825 goto error_ret_free_local;
6826 }
6827
6828 if (local_syms != NULL
6829 && symtab_hdr->contents != (unsigned char *) local_syms)
6830 {
6831 if (!info->keep_memory)
6832 free (local_syms);
6833 else
6834 symtab_hdr->contents = (unsigned char *) local_syms;
6835 }
6836 }
6837
6838 if (first_veneer_scan
6839 && !set_cmse_veneer_addr_from_implib (info, htab,
6840 &cmse_stub_created))
6841 ret = false;
6842
6843 if (prev_num_a8_fixes != num_a8_fixes)
6844 stub_changed = true;
6845
6846 if (!stub_changed)
6847 break;
6848
6849 /* OK, we've added some stubs. Find out the new size of the
6850 stub sections. */
6851 for (stub_sec = htab->stub_bfd->sections;
6852 stub_sec != NULL;
6853 stub_sec = stub_sec->next)
6854 {
6855 /* Ignore non-stub sections. */
6856 if (!strstr (stub_sec->name, STUB_SUFFIX))
6857 continue;
6858
6859 stub_sec->size = 0;
6860 }
6861
6862 /* Add new SG veneers after those already in the input import
6863 library. */
6864 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6865 stub_type++)
6866 {
6867 bfd_vma *start_offset_p;
6868 asection **stub_sec_p;
6869
6870 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6871 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6872 if (start_offset_p == NULL)
6873 continue;
6874
6875 BFD_ASSERT (stub_sec_p != NULL);
6876 if (*stub_sec_p != NULL)
6877 (*stub_sec_p)->size = *start_offset_p;
6878 }
6879
6880 /* Compute stub section size, considering padding. */
6881 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6882 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6883 stub_type++)
6884 {
6885 int size, padding;
6886 asection **stub_sec_p;
6887
6888 padding = arm_dedicated_stub_section_padding (stub_type);
6889 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6890 /* Skip if no stub input section or no stub section padding
6891 required. */
6892 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6893 continue;
6894 /* Stub section padding required but no dedicated section. */
6895 BFD_ASSERT (stub_sec_p);
6896
6897 size = (*stub_sec_p)->size;
6898 size = (size + padding - 1) & ~(padding - 1);
6899 (*stub_sec_p)->size = size;
6900 }
6901
6902 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6903 if (htab->fix_cortex_a8)
6904 for (i = 0; i < num_a8_fixes; i++)
6905 {
6906 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6907 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6908
6909 if (stub_sec == NULL)
6910 return false;
6911
6912 stub_sec->size
6913 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6914 NULL);
6915 }
6916
6917
6918 /* Ask the linker to do its stuff. */
6919 (*htab->layout_sections_again) ();
6920 first_veneer_scan = false;
6921 }
6922
6923 /* Add stubs for Cortex-A8 erratum fixes now. */
6924 if (htab->fix_cortex_a8)
6925 {
6926 for (i = 0; i < num_a8_fixes; i++)
6927 {
6928 struct elf32_arm_stub_hash_entry *stub_entry;
6929 char *stub_name = a8_fixes[i].stub_name;
6930 asection *section = a8_fixes[i].section;
6931 unsigned int section_id = a8_fixes[i].section->id;
6932 asection *link_sec = htab->stub_group[section_id].link_sec;
6933 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6934 const insn_sequence *template_sequence;
6935 int template_size, size = 0;
6936
6937 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6938 true, false);
6939 if (stub_entry == NULL)
6940 {
6941 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6942 section->owner, stub_name);
6943 return false;
6944 }
6945
6946 stub_entry->stub_sec = stub_sec;
6947 stub_entry->stub_offset = (bfd_vma) -1;
6948 stub_entry->id_sec = link_sec;
6949 stub_entry->stub_type = a8_fixes[i].stub_type;
6950 stub_entry->source_value = a8_fixes[i].offset;
6951 stub_entry->target_section = a8_fixes[i].section;
6952 stub_entry->target_value = a8_fixes[i].target_offset;
6953 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6954 stub_entry->branch_type = a8_fixes[i].branch_type;
6955
6956 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6957 &template_sequence,
6958 &template_size);
6959
6960 stub_entry->stub_size = size;
6961 stub_entry->stub_template = template_sequence;
6962 stub_entry->stub_template_size = template_size;
6963 }
6964
6965 /* Stash the Cortex-A8 erratum fix array for use later in
6966 elf32_arm_write_section(). */
6967 htab->a8_erratum_fixes = a8_fixes;
6968 htab->num_a8_erratum_fixes = num_a8_fixes;
6969 }
6970 else
6971 {
6972 htab->a8_erratum_fixes = NULL;
6973 htab->num_a8_erratum_fixes = 0;
6974 }
6975 return ret;
6976 }
6977
6978 /* Build all the stubs associated with the current output file. The
6979 stubs are kept in a hash table attached to the main linker hash
6980 table. We also set up the .plt entries for statically linked PIC
6981 functions here. This function is called via arm_elf_finish in the
6982 linker. */
6983
6984 bool
6985 elf32_arm_build_stubs (struct bfd_link_info *info)
6986 {
6987 asection *stub_sec;
6988 struct bfd_hash_table *table;
6989 enum elf32_arm_stub_type stub_type;
6990 struct elf32_arm_link_hash_table *htab;
6991
6992 htab = elf32_arm_hash_table (info);
6993 if (htab == NULL)
6994 return false;
6995
6996 for (stub_sec = htab->stub_bfd->sections;
6997 stub_sec != NULL;
6998 stub_sec = stub_sec->next)
6999 {
7000 bfd_size_type size;
7001
7002 /* Ignore non-stub sections. */
7003 if (!strstr (stub_sec->name, STUB_SUFFIX))
7004 continue;
7005
7006 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7007 must at least be done for stub section requiring padding and for SG
7008 veneers to ensure that a non secure code branching to a removed SG
7009 veneer causes an error. */
7010 size = stub_sec->size;
7011 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7012 if (stub_sec->contents == NULL && size != 0)
7013 return false;
7014
7015 stub_sec->size = 0;
7016 }
7017
7018 /* Add new SG veneers after those already in the input import library. */
7019 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7020 {
7021 bfd_vma *start_offset_p;
7022 asection **stub_sec_p;
7023
7024 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7025 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7026 if (start_offset_p == NULL)
7027 continue;
7028
7029 BFD_ASSERT (stub_sec_p != NULL);
7030 if (*stub_sec_p != NULL)
7031 (*stub_sec_p)->size = *start_offset_p;
7032 }
7033
7034 /* Build the stubs as directed by the stub hash table. */
7035 table = &htab->stub_hash_table;
7036 bfd_hash_traverse (table, arm_build_one_stub, info);
7037 if (htab->fix_cortex_a8)
7038 {
7039 /* Place the cortex a8 stubs last. */
7040 htab->fix_cortex_a8 = -1;
7041 bfd_hash_traverse (table, arm_build_one_stub, info);
7042 }
7043
7044 return true;
7045 }
7046
7047 /* Locate the Thumb encoded calling stub for NAME. */
7048
7049 static struct elf_link_hash_entry *
7050 find_thumb_glue (struct bfd_link_info *link_info,
7051 const char *name,
7052 char **error_message)
7053 {
7054 char *tmp_name;
7055 struct elf_link_hash_entry *hash;
7056 struct elf32_arm_link_hash_table *hash_table;
7057
7058 /* We need a pointer to the armelf specific hash table. */
7059 hash_table = elf32_arm_hash_table (link_info);
7060 if (hash_table == NULL)
7061 return NULL;
7062
7063 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7064 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7065
7066 BFD_ASSERT (tmp_name);
7067
7068 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7069
7070 hash = elf_link_hash_lookup
7071 (&(hash_table)->root, tmp_name, false, false, true);
7072
7073 if (hash == NULL
7074 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7075 "Thumb", tmp_name, name) == -1)
7076 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7077
7078 free (tmp_name);
7079
7080 return hash;
7081 }
7082
7083 /* Locate the ARM encoded calling stub for NAME. */
7084
7085 static struct elf_link_hash_entry *
7086 find_arm_glue (struct bfd_link_info *link_info,
7087 const char *name,
7088 char **error_message)
7089 {
7090 char *tmp_name;
7091 struct elf_link_hash_entry *myh;
7092 struct elf32_arm_link_hash_table *hash_table;
7093
7094 /* We need a pointer to the elfarm specific hash table. */
7095 hash_table = elf32_arm_hash_table (link_info);
7096 if (hash_table == NULL)
7097 return NULL;
7098
7099 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7100 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7101 BFD_ASSERT (tmp_name);
7102
7103 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7104
7105 myh = elf_link_hash_lookup
7106 (&(hash_table)->root, tmp_name, false, false, true);
7107
7108 if (myh == NULL
7109 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7110 "ARM", tmp_name, name) == -1)
7111 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7112
7113 free (tmp_name);
7114
7115 return myh;
7116 }
7117
7118 /* ARM->Thumb glue (static images):
7119
7120 .arm
7121 __func_from_arm:
7122 ldr r12, __func_addr
7123 bx r12
7124 __func_addr:
7125 .word func @ behave as if you saw a ARM_32 reloc.
7126
7127 (v5t static images)
7128 .arm
7129 __func_from_arm:
7130 ldr pc, __func_addr
7131 __func_addr:
7132 .word func @ behave as if you saw a ARM_32 reloc.
7133
7134 (relocatable images)
7135 .arm
7136 __func_from_arm:
7137 ldr r12, __func_offset
7138 add r12, r12, pc
7139 bx r12
7140 __func_offset:
7141 .word func - . */
7142
7143 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7144 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7145 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7146 static const insn32 a2t3_func_addr_insn = 0x00000001;
7147
7148 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7149 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7150 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7151
7152 #define ARM2THUMB_PIC_GLUE_SIZE 16
7153 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7154 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7155 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7156
7157 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7158
7159 .thumb .thumb
7160 .align 2 .align 2
7161 __func_from_thumb: __func_from_thumb:
7162 bx pc push {r6, lr}
7163 nop ldr r6, __func_addr
7164 .arm mov lr, pc
7165 b func bx r6
7166 .arm
7167 ;; back_to_thumb
7168 ldmia r13! {r6, lr}
7169 bx lr
7170 __func_addr:
7171 .word func */
7172
7173 #define THUMB2ARM_GLUE_SIZE 8
7174 static const insn16 t2a1_bx_pc_insn = 0x4778;
7175 static const insn16 t2a2_noop_insn = 0x46c0;
7176 static const insn32 t2a3_b_insn = 0xea000000;
7177
7178 #define VFP11_ERRATUM_VENEER_SIZE 8
7179 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7180 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7181
7182 #define ARM_BX_VENEER_SIZE 12
7183 static const insn32 armbx1_tst_insn = 0xe3100001;
7184 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7185 static const insn32 armbx3_bx_insn = 0xe12fff10;
7186
7187 #ifndef ELFARM_NABI_C_INCLUDED
7188 static void
7189 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7190 {
7191 asection * s;
7192 bfd_byte * contents;
7193
7194 if (size == 0)
7195 {
7196 /* Do not include empty glue sections in the output. */
7197 if (abfd != NULL)
7198 {
7199 s = bfd_get_linker_section (abfd, name);
7200 if (s != NULL)
7201 s->flags |= SEC_EXCLUDE;
7202 }
7203 return;
7204 }
7205
7206 BFD_ASSERT (abfd != NULL);
7207
7208 s = bfd_get_linker_section (abfd, name);
7209 BFD_ASSERT (s != NULL);
7210
7211 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7212
7213 BFD_ASSERT (s->size == size);
7214 s->contents = contents;
7215 }
7216
7217 bool
7218 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7219 {
7220 struct elf32_arm_link_hash_table * globals;
7221
7222 globals = elf32_arm_hash_table (info);
7223 BFD_ASSERT (globals != NULL);
7224
7225 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7226 globals->arm_glue_size,
7227 ARM2THUMB_GLUE_SECTION_NAME);
7228
7229 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7230 globals->thumb_glue_size,
7231 THUMB2ARM_GLUE_SECTION_NAME);
7232
7233 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7234 globals->vfp11_erratum_glue_size,
7235 VFP11_ERRATUM_VENEER_SECTION_NAME);
7236
7237 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7238 globals->stm32l4xx_erratum_glue_size,
7239 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7240
7241 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7242 globals->bx_glue_size,
7243 ARM_BX_GLUE_SECTION_NAME);
7244
7245 return true;
7246 }
7247
7248 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7249 returns the symbol identifying the stub. */
7250
7251 static struct elf_link_hash_entry *
7252 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7253 struct elf_link_hash_entry * h)
7254 {
7255 const char * name = h->root.root.string;
7256 asection * s;
7257 char * tmp_name;
7258 struct elf_link_hash_entry * myh;
7259 struct bfd_link_hash_entry * bh;
7260 struct elf32_arm_link_hash_table * globals;
7261 bfd_vma val;
7262 bfd_size_type size;
7263
7264 globals = elf32_arm_hash_table (link_info);
7265 BFD_ASSERT (globals != NULL);
7266 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7267
7268 s = bfd_get_linker_section
7269 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7270
7271 BFD_ASSERT (s != NULL);
7272
7273 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7274 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7275 BFD_ASSERT (tmp_name);
7276
7277 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7278
7279 myh = elf_link_hash_lookup
7280 (&(globals)->root, tmp_name, false, false, true);
7281
7282 if (myh != NULL)
7283 {
7284 /* We've already seen this guy. */
7285 free (tmp_name);
7286 return myh;
7287 }
7288
7289 /* The only trick here is using hash_table->arm_glue_size as the value.
7290 Even though the section isn't allocated yet, this is where we will be
7291 putting it. The +1 on the value marks that the stub has not been
7292 output yet - not that it is a Thumb function. */
7293 bh = NULL;
7294 val = globals->arm_glue_size + 1;
7295 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7296 tmp_name, BSF_GLOBAL, s, val,
7297 NULL, true, false, &bh);
7298
7299 myh = (struct elf_link_hash_entry *) bh;
7300 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7301 myh->forced_local = 1;
7302
7303 free (tmp_name);
7304
7305 if (bfd_link_pic (link_info)
7306 || globals->root.is_relocatable_executable
7307 || globals->pic_veneer)
7308 size = ARM2THUMB_PIC_GLUE_SIZE;
7309 else if (globals->use_blx)
7310 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7311 else
7312 size = ARM2THUMB_STATIC_GLUE_SIZE;
7313
7314 s->size += size;
7315 globals->arm_glue_size += size;
7316
7317 return myh;
7318 }
7319
7320 /* Allocate space for ARMv4 BX veneers. */
7321
7322 static void
7323 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7324 {
7325 asection * s;
7326 struct elf32_arm_link_hash_table *globals;
7327 char *tmp_name;
7328 struct elf_link_hash_entry *myh;
7329 struct bfd_link_hash_entry *bh;
7330 bfd_vma val;
7331
7332 /* BX PC does not need a veneer. */
7333 if (reg == 15)
7334 return;
7335
7336 globals = elf32_arm_hash_table (link_info);
7337 BFD_ASSERT (globals != NULL);
7338 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7339
7340 /* Check if this veneer has already been allocated. */
7341 if (globals->bx_glue_offset[reg])
7342 return;
7343
7344 s = bfd_get_linker_section
7345 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7346
7347 BFD_ASSERT (s != NULL);
7348
7349 /* Add symbol for veneer. */
7350 tmp_name = (char *)
7351 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7352 BFD_ASSERT (tmp_name);
7353
7354 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7355
7356 myh = elf_link_hash_lookup
7357 (&(globals)->root, tmp_name, false, false, false);
7358
7359 BFD_ASSERT (myh == NULL);
7360
7361 bh = NULL;
7362 val = globals->bx_glue_size;
7363 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7364 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7365 NULL, true, false, &bh);
7366
7367 myh = (struct elf_link_hash_entry *) bh;
7368 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7369 myh->forced_local = 1;
7370
7371 s->size += ARM_BX_VENEER_SIZE;
7372 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7373 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7374 }
7375
7376
7377 /* Add an entry to the code/data map for section SEC. */
7378
7379 static void
7380 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7381 {
7382 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7383 unsigned int newidx;
7384
7385 if (sec_data->map == NULL)
7386 {
7387 sec_data->map = (elf32_arm_section_map *)
7388 bfd_malloc (sizeof (elf32_arm_section_map));
7389 sec_data->mapcount = 0;
7390 sec_data->mapsize = 1;
7391 }
7392
7393 newidx = sec_data->mapcount++;
7394
7395 if (sec_data->mapcount > sec_data->mapsize)
7396 {
7397 sec_data->mapsize *= 2;
7398 sec_data->map = (elf32_arm_section_map *)
7399 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7400 * sizeof (elf32_arm_section_map));
7401 }
7402
7403 if (sec_data->map)
7404 {
7405 sec_data->map[newidx].vma = vma;
7406 sec_data->map[newidx].type = type;
7407 }
7408 }
7409
7410
7411 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7412 veneers are handled for now. */
7413
7414 static bfd_vma
7415 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7416 elf32_vfp11_erratum_list *branch,
7417 bfd *branch_bfd,
7418 asection *branch_sec,
7419 unsigned int offset)
7420 {
7421 asection *s;
7422 struct elf32_arm_link_hash_table *hash_table;
7423 char *tmp_name;
7424 struct elf_link_hash_entry *myh;
7425 struct bfd_link_hash_entry *bh;
7426 bfd_vma val;
7427 struct _arm_elf_section_data *sec_data;
7428 elf32_vfp11_erratum_list *newerr;
7429
7430 hash_table = elf32_arm_hash_table (link_info);
7431 BFD_ASSERT (hash_table != NULL);
7432 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7433
7434 s = bfd_get_linker_section
7435 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7436
7437 sec_data = elf32_arm_section_data (s);
7438
7439 BFD_ASSERT (s != NULL);
7440
7441 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7442 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7443 BFD_ASSERT (tmp_name);
7444
7445 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7446 hash_table->num_vfp11_fixes);
7447
7448 myh = elf_link_hash_lookup
7449 (&(hash_table)->root, tmp_name, false, false, false);
7450
7451 BFD_ASSERT (myh == NULL);
7452
7453 bh = NULL;
7454 val = hash_table->vfp11_erratum_glue_size;
7455 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7456 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7457 NULL, true, false, &bh);
7458
7459 myh = (struct elf_link_hash_entry *) bh;
7460 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7461 myh->forced_local = 1;
7462
7463 /* Link veneer back to calling location. */
7464 sec_data->erratumcount += 1;
7465 newerr = (elf32_vfp11_erratum_list *)
7466 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7467
7468 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7469 newerr->vma = -1;
7470 newerr->u.v.branch = branch;
7471 newerr->u.v.id = hash_table->num_vfp11_fixes;
7472 branch->u.b.veneer = newerr;
7473
7474 newerr->next = sec_data->erratumlist;
7475 sec_data->erratumlist = newerr;
7476
7477 /* A symbol for the return from the veneer. */
7478 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7479 hash_table->num_vfp11_fixes);
7480
7481 myh = elf_link_hash_lookup
7482 (&(hash_table)->root, tmp_name, false, false, false);
7483
7484 if (myh != NULL)
7485 abort ();
7486
7487 bh = NULL;
7488 val = offset + 4;
7489 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7490 branch_sec, val, NULL, true, false, &bh);
7491
7492 myh = (struct elf_link_hash_entry *) bh;
7493 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7494 myh->forced_local = 1;
7495
7496 free (tmp_name);
7497
7498 /* Generate a mapping symbol for the veneer section, and explicitly add an
7499 entry for that symbol to the code/data map for the section. */
7500 if (hash_table->vfp11_erratum_glue_size == 0)
7501 {
7502 bh = NULL;
7503 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7504 ever requires this erratum fix. */
7505 _bfd_generic_link_add_one_symbol (link_info,
7506 hash_table->bfd_of_glue_owner, "$a",
7507 BSF_LOCAL, s, 0, NULL,
7508 true, false, &bh);
7509
7510 myh = (struct elf_link_hash_entry *) bh;
7511 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7512 myh->forced_local = 1;
7513
7514 /* The elf32_arm_init_maps function only cares about symbols from input
7515 BFDs. We must make a note of this generated mapping symbol
7516 ourselves so that code byteswapping works properly in
7517 elf32_arm_write_section. */
7518 elf32_arm_section_map_add (s, 'a', 0);
7519 }
7520
7521 s->size += VFP11_ERRATUM_VENEER_SIZE;
7522 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7523 hash_table->num_vfp11_fixes++;
7524
7525 /* The offset of the veneer. */
7526 return val;
7527 }
7528
7529 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7530 veneers need to be handled because used only in Cortex-M. */
7531
7532 static bfd_vma
7533 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7534 elf32_stm32l4xx_erratum_list *branch,
7535 bfd *branch_bfd,
7536 asection *branch_sec,
7537 unsigned int offset,
7538 bfd_size_type veneer_size)
7539 {
7540 asection *s;
7541 struct elf32_arm_link_hash_table *hash_table;
7542 char *tmp_name;
7543 struct elf_link_hash_entry *myh;
7544 struct bfd_link_hash_entry *bh;
7545 bfd_vma val;
7546 struct _arm_elf_section_data *sec_data;
7547 elf32_stm32l4xx_erratum_list *newerr;
7548
7549 hash_table = elf32_arm_hash_table (link_info);
7550 BFD_ASSERT (hash_table != NULL);
7551 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7552
7553 s = bfd_get_linker_section
7554 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7555
7556 BFD_ASSERT (s != NULL);
7557
7558 sec_data = elf32_arm_section_data (s);
7559
7560 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7561 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7562 BFD_ASSERT (tmp_name);
7563
7564 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7565 hash_table->num_stm32l4xx_fixes);
7566
7567 myh = elf_link_hash_lookup
7568 (&(hash_table)->root, tmp_name, false, false, false);
7569
7570 BFD_ASSERT (myh == NULL);
7571
7572 bh = NULL;
7573 val = hash_table->stm32l4xx_erratum_glue_size;
7574 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7575 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7576 NULL, true, false, &bh);
7577
7578 myh = (struct elf_link_hash_entry *) bh;
7579 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7580 myh->forced_local = 1;
7581
7582 /* Link veneer back to calling location. */
7583 sec_data->stm32l4xx_erratumcount += 1;
7584 newerr = (elf32_stm32l4xx_erratum_list *)
7585 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7586
7587 newerr->type = STM32L4XX_ERRATUM_VENEER;
7588 newerr->vma = -1;
7589 newerr->u.v.branch = branch;
7590 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7591 branch->u.b.veneer = newerr;
7592
7593 newerr->next = sec_data->stm32l4xx_erratumlist;
7594 sec_data->stm32l4xx_erratumlist = newerr;
7595
7596 /* A symbol for the return from the veneer. */
7597 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7598 hash_table->num_stm32l4xx_fixes);
7599
7600 myh = elf_link_hash_lookup
7601 (&(hash_table)->root, tmp_name, false, false, false);
7602
7603 if (myh != NULL)
7604 abort ();
7605
7606 bh = NULL;
7607 val = offset + 4;
7608 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7609 branch_sec, val, NULL, true, false, &bh);
7610
7611 myh = (struct elf_link_hash_entry *) bh;
7612 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7613 myh->forced_local = 1;
7614
7615 free (tmp_name);
7616
7617 /* Generate a mapping symbol for the veneer section, and explicitly add an
7618 entry for that symbol to the code/data map for the section. */
7619 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7620 {
7621 bh = NULL;
7622 /* Creates a THUMB symbol since there is no other choice. */
7623 _bfd_generic_link_add_one_symbol (link_info,
7624 hash_table->bfd_of_glue_owner, "$t",
7625 BSF_LOCAL, s, 0, NULL,
7626 true, false, &bh);
7627
7628 myh = (struct elf_link_hash_entry *) bh;
7629 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7630 myh->forced_local = 1;
7631
7632 /* The elf32_arm_init_maps function only cares about symbols from input
7633 BFDs. We must make a note of this generated mapping symbol
7634 ourselves so that code byteswapping works properly in
7635 elf32_arm_write_section. */
7636 elf32_arm_section_map_add (s, 't', 0);
7637 }
7638
7639 s->size += veneer_size;
7640 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7641 hash_table->num_stm32l4xx_fixes++;
7642
7643 /* The offset of the veneer. */
7644 return val;
7645 }
7646
7647 #define ARM_GLUE_SECTION_FLAGS \
7648 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7649 | SEC_READONLY | SEC_LINKER_CREATED)
7650
7651 /* Create a fake section for use by the ARM backend of the linker. */
7652
7653 static bool
7654 arm_make_glue_section (bfd * abfd, const char * name)
7655 {
7656 asection * sec;
7657
7658 sec = bfd_get_linker_section (abfd, name);
7659 if (sec != NULL)
7660 /* Already made. */
7661 return true;
7662
7663 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7664
7665 if (sec == NULL
7666 || !bfd_set_section_alignment (sec, 2))
7667 return false;
7668
7669 /* Set the gc mark to prevent the section from being removed by garbage
7670 collection, despite the fact that no relocs refer to this section. */
7671 sec->gc_mark = 1;
7672
7673 return true;
7674 }
7675
7676 /* Set size of .plt entries. This function is called from the
7677 linker scripts in ld/emultempl/{armelf}.em. */
7678
7679 void
7680 bfd_elf32_arm_use_long_plt (void)
7681 {
7682 elf32_arm_use_long_plt_entry = true;
7683 }
7684
7685 /* Add the glue sections to ABFD. This function is called from the
7686 linker scripts in ld/emultempl/{armelf}.em. */
7687
7688 bool
7689 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7690 struct bfd_link_info *info)
7691 {
7692 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7693 bool dostm32l4xx = globals
7694 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7695 bool addglue;
7696
7697 /* If we are only performing a partial
7698 link do not bother adding the glue. */
7699 if (bfd_link_relocatable (info))
7700 return true;
7701
7702 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7703 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7704 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7705 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7706
7707 if (!dostm32l4xx)
7708 return addglue;
7709
7710 return addglue
7711 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7712 }
7713
7714 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7715 ensures they are not marked for deletion by
7716 strip_excluded_output_sections () when veneers are going to be created
7717 later. Not doing so would trigger assert on empty section size in
7718 lang_size_sections_1 (). */
7719
7720 void
7721 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7722 {
7723 enum elf32_arm_stub_type stub_type;
7724
7725 /* If we are only performing a partial
7726 link do not bother adding the glue. */
7727 if (bfd_link_relocatable (info))
7728 return;
7729
7730 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7731 {
7732 asection *out_sec;
7733 const char *out_sec_name;
7734
7735 if (!arm_dedicated_stub_output_section_required (stub_type))
7736 continue;
7737
7738 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7739 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7740 if (out_sec != NULL)
7741 out_sec->flags |= SEC_KEEP;
7742 }
7743 }
7744
7745 /* Select a BFD to be used to hold the sections used by the glue code.
7746 This function is called from the linker scripts in ld/emultempl/
7747 {armelf/pe}.em. */
7748
7749 bool
7750 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7751 {
7752 struct elf32_arm_link_hash_table *globals;
7753
7754 /* If we are only performing a partial link
7755 do not bother getting a bfd to hold the glue. */
7756 if (bfd_link_relocatable (info))
7757 return true;
7758
7759 /* Make sure we don't attach the glue sections to a dynamic object. */
7760 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7761
7762 globals = elf32_arm_hash_table (info);
7763 BFD_ASSERT (globals != NULL);
7764
7765 if (globals->bfd_of_glue_owner != NULL)
7766 return true;
7767
7768 /* Save the bfd for later use. */
7769 globals->bfd_of_glue_owner = abfd;
7770
7771 return true;
7772 }
7773
7774 static void
7775 check_use_blx (struct elf32_arm_link_hash_table *globals)
7776 {
7777 int cpu_arch;
7778
7779 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7780 Tag_CPU_arch);
7781
7782 if (globals->fix_arm1176)
7783 {
7784 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7785 globals->use_blx = 1;
7786 }
7787 else
7788 {
7789 if (cpu_arch > TAG_CPU_ARCH_V4T)
7790 globals->use_blx = 1;
7791 }
7792 }
7793
7794 bool
7795 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7796 struct bfd_link_info *link_info)
7797 {
7798 Elf_Internal_Shdr *symtab_hdr;
7799 Elf_Internal_Rela *internal_relocs = NULL;
7800 Elf_Internal_Rela *irel, *irelend;
7801 bfd_byte *contents = NULL;
7802
7803 asection *sec;
7804 struct elf32_arm_link_hash_table *globals;
7805
7806 /* If we are only performing a partial link do not bother
7807 to construct any glue. */
7808 if (bfd_link_relocatable (link_info))
7809 return true;
7810
7811 /* Here we have a bfd that is to be included on the link. We have a
7812 hook to do reloc rummaging, before section sizes are nailed down. */
7813 globals = elf32_arm_hash_table (link_info);
7814 BFD_ASSERT (globals != NULL);
7815
7816 check_use_blx (globals);
7817
7818 if (globals->byteswap_code && !bfd_big_endian (abfd))
7819 {
7820 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7821 abfd);
7822 return false;
7823 }
7824
7825 /* PR 5398: If we have not decided to include any loadable sections in
7826 the output then we will not have a glue owner bfd. This is OK, it
7827 just means that there is nothing else for us to do here. */
7828 if (globals->bfd_of_glue_owner == NULL)
7829 return true;
7830
7831 /* Rummage around all the relocs and map the glue vectors. */
7832 sec = abfd->sections;
7833
7834 if (sec == NULL)
7835 return true;
7836
7837 for (; sec != NULL; sec = sec->next)
7838 {
7839 if (sec->reloc_count == 0)
7840 continue;
7841
7842 if ((sec->flags & SEC_EXCLUDE) != 0)
7843 continue;
7844
7845 symtab_hdr = & elf_symtab_hdr (abfd);
7846
7847 /* Load the relocs. */
7848 internal_relocs
7849 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7850
7851 if (internal_relocs == NULL)
7852 goto error_return;
7853
7854 irelend = internal_relocs + sec->reloc_count;
7855 for (irel = internal_relocs; irel < irelend; irel++)
7856 {
7857 long r_type;
7858 unsigned long r_index;
7859
7860 struct elf_link_hash_entry *h;
7861
7862 r_type = ELF32_R_TYPE (irel->r_info);
7863 r_index = ELF32_R_SYM (irel->r_info);
7864
7865 /* These are the only relocation types we care about. */
7866 if ( r_type != R_ARM_PC24
7867 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7868 continue;
7869
7870 /* Get the section contents if we haven't done so already. */
7871 if (contents == NULL)
7872 {
7873 /* Get cached copy if it exists. */
7874 if (elf_section_data (sec)->this_hdr.contents != NULL)
7875 contents = elf_section_data (sec)->this_hdr.contents;
7876 else
7877 {
7878 /* Go get them off disk. */
7879 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7880 goto error_return;
7881 }
7882 }
7883
7884 if (r_type == R_ARM_V4BX)
7885 {
7886 int reg;
7887
7888 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7889 record_arm_bx_glue (link_info, reg);
7890 continue;
7891 }
7892
7893 /* If the relocation is not against a symbol it cannot concern us. */
7894 h = NULL;
7895
7896 /* We don't care about local symbols. */
7897 if (r_index < symtab_hdr->sh_info)
7898 continue;
7899
7900 /* This is an external symbol. */
7901 r_index -= symtab_hdr->sh_info;
7902 h = (struct elf_link_hash_entry *)
7903 elf_sym_hashes (abfd)[r_index];
7904
7905 /* If the relocation is against a static symbol it must be within
7906 the current section and so cannot be a cross ARM/Thumb relocation. */
7907 if (h == NULL)
7908 continue;
7909
7910 /* If the call will go through a PLT entry then we do not need
7911 glue. */
7912 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7913 continue;
7914
7915 switch (r_type)
7916 {
7917 case R_ARM_PC24:
7918 /* This one is a call from arm code. We need to look up
7919 the target of the call. If it is a thumb target, we
7920 insert glue. */
7921 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7922 == ST_BRANCH_TO_THUMB)
7923 record_arm_to_thumb_glue (link_info, h);
7924 break;
7925
7926 default:
7927 abort ();
7928 }
7929 }
7930
7931 if (elf_section_data (sec)->this_hdr.contents != contents)
7932 free (contents);
7933 contents = NULL;
7934
7935 if (elf_section_data (sec)->relocs != internal_relocs)
7936 free (internal_relocs);
7937 internal_relocs = NULL;
7938 }
7939
7940 return true;
7941
7942 error_return:
7943 if (elf_section_data (sec)->this_hdr.contents != contents)
7944 free (contents);
7945 if (elf_section_data (sec)->relocs != internal_relocs)
7946 free (internal_relocs);
7947
7948 return false;
7949 }
7950 #endif
7951
7952
7953 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7954
7955 void
7956 bfd_elf32_arm_init_maps (bfd *abfd)
7957 {
7958 Elf_Internal_Sym *isymbuf;
7959 Elf_Internal_Shdr *hdr;
7960 unsigned int i, localsyms;
7961
7962 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7963 if (! is_arm_elf (abfd))
7964 return;
7965
7966 if ((abfd->flags & DYNAMIC) != 0)
7967 return;
7968
7969 hdr = & elf_symtab_hdr (abfd);
7970 localsyms = hdr->sh_info;
7971
7972 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7973 should contain the number of local symbols, which should come before any
7974 global symbols. Mapping symbols are always local. */
7975 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7976 NULL);
7977
7978 /* No internal symbols read? Skip this BFD. */
7979 if (isymbuf == NULL)
7980 return;
7981
7982 for (i = 0; i < localsyms; i++)
7983 {
7984 Elf_Internal_Sym *isym = &isymbuf[i];
7985 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7986 const char *name;
7987
7988 if (sec != NULL
7989 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7990 {
7991 name = bfd_elf_string_from_elf_section (abfd,
7992 hdr->sh_link, isym->st_name);
7993
7994 if (bfd_is_arm_special_symbol_name (name,
7995 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7996 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7997 }
7998 }
7999 }
8000
8001
8002 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8003 say what they wanted. */
8004
8005 void
8006 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8007 {
8008 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8009 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8010
8011 if (globals == NULL)
8012 return;
8013
8014 if (globals->fix_cortex_a8 == -1)
8015 {
8016 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8017 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8018 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8019 || out_attr[Tag_CPU_arch_profile].i == 0))
8020 globals->fix_cortex_a8 = 1;
8021 else
8022 globals->fix_cortex_a8 = 0;
8023 }
8024 }
8025
8026
8027 void
8028 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8029 {
8030 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8031 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8032
8033 if (globals == NULL)
8034 return;
8035 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8036 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8037 {
8038 switch (globals->vfp11_fix)
8039 {
8040 case BFD_ARM_VFP11_FIX_DEFAULT:
8041 case BFD_ARM_VFP11_FIX_NONE:
8042 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8043 break;
8044
8045 default:
8046 /* Give a warning, but do as the user requests anyway. */
8047 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8048 "workaround is not necessary for target architecture"), obfd);
8049 }
8050 }
8051 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8052 /* For earlier architectures, we might need the workaround, but do not
8053 enable it by default. If users is running with broken hardware, they
8054 must enable the erratum fix explicitly. */
8055 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8056 }
8057
8058 void
8059 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8060 {
8061 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8062 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8063
8064 if (globals == NULL)
8065 return;
8066
8067 /* We assume only Cortex-M4 may require the fix. */
8068 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8069 || out_attr[Tag_CPU_arch_profile].i != 'M')
8070 {
8071 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8072 /* Give a warning, but do as the user requests anyway. */
8073 _bfd_error_handler
8074 (_("%pB: warning: selected STM32L4XX erratum "
8075 "workaround is not necessary for target architecture"), obfd);
8076 }
8077 }
8078
8079 enum bfd_arm_vfp11_pipe
8080 {
8081 VFP11_FMAC,
8082 VFP11_LS,
8083 VFP11_DS,
8084 VFP11_BAD
8085 };
8086
8087 /* Return a VFP register number. This is encoded as RX:X for single-precision
8088 registers, or X:RX for double-precision registers, where RX is the group of
8089 four bits in the instruction encoding and X is the single extension bit.
8090 RX and X fields are specified using their lowest (starting) bit. The return
8091 value is:
8092
8093 0...31: single-precision registers s0...s31
8094 32...63: double-precision registers d0...d31.
8095
8096 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8097 encounter VFP3 instructions, so we allow the full range for DP registers. */
8098
8099 static unsigned int
8100 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8101 unsigned int x)
8102 {
8103 if (is_double)
8104 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8105 else
8106 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8107 }
8108
8109 /* Set bits in *WMASK according to a register number REG as encoded by
8110 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8111
8112 static void
8113 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8114 {
8115 if (reg < 32)
8116 *wmask |= 1 << reg;
8117 else if (reg < 48)
8118 *wmask |= 3 << ((reg - 32) * 2);
8119 }
8120
8121 /* Return TRUE if WMASK overwrites anything in REGS. */
8122
8123 static bool
8124 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8125 {
8126 int i;
8127
8128 for (i = 0; i < numregs; i++)
8129 {
8130 unsigned int reg = regs[i];
8131
8132 if (reg < 32 && (wmask & (1 << reg)) != 0)
8133 return true;
8134
8135 reg -= 32;
8136
8137 if (reg >= 16)
8138 continue;
8139
8140 if ((wmask & (3 << (reg * 2))) != 0)
8141 return true;
8142 }
8143
8144 return false;
8145 }
8146
8147 /* In this function, we're interested in two things: finding input registers
8148 for VFP data-processing instructions, and finding the set of registers which
8149 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8150 hold the written set, so FLDM etc. are easy to deal with (we're only
8151 interested in 32 SP registers or 16 dp registers, due to the VFP version
8152 implemented by the chip in question). DP registers are marked by setting
8153 both SP registers in the write mask). */
8154
8155 static enum bfd_arm_vfp11_pipe
8156 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8157 int *numregs)
8158 {
8159 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8160 bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8161
8162 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8163 {
8164 unsigned int pqrs;
8165 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8166 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8167
8168 pqrs = ((insn & 0x00800000) >> 20)
8169 | ((insn & 0x00300000) >> 19)
8170 | ((insn & 0x00000040) >> 6);
8171
8172 switch (pqrs)
8173 {
8174 case 0: /* fmac[sd]. */
8175 case 1: /* fnmac[sd]. */
8176 case 2: /* fmsc[sd]. */
8177 case 3: /* fnmsc[sd]. */
8178 vpipe = VFP11_FMAC;
8179 bfd_arm_vfp11_write_mask (destmask, fd);
8180 regs[0] = fd;
8181 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8182 regs[2] = fm;
8183 *numregs = 3;
8184 break;
8185
8186 case 4: /* fmul[sd]. */
8187 case 5: /* fnmul[sd]. */
8188 case 6: /* fadd[sd]. */
8189 case 7: /* fsub[sd]. */
8190 vpipe = VFP11_FMAC;
8191 goto vfp_binop;
8192
8193 case 8: /* fdiv[sd]. */
8194 vpipe = VFP11_DS;
8195 vfp_binop:
8196 bfd_arm_vfp11_write_mask (destmask, fd);
8197 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8198 regs[1] = fm;
8199 *numregs = 2;
8200 break;
8201
8202 case 15: /* extended opcode. */
8203 {
8204 unsigned int extn = ((insn >> 15) & 0x1e)
8205 | ((insn >> 7) & 1);
8206
8207 switch (extn)
8208 {
8209 case 0: /* fcpy[sd]. */
8210 case 1: /* fabs[sd]. */
8211 case 2: /* fneg[sd]. */
8212 case 8: /* fcmp[sd]. */
8213 case 9: /* fcmpe[sd]. */
8214 case 10: /* fcmpz[sd]. */
8215 case 11: /* fcmpez[sd]. */
8216 case 16: /* fuito[sd]. */
8217 case 17: /* fsito[sd]. */
8218 case 24: /* ftoui[sd]. */
8219 case 25: /* ftouiz[sd]. */
8220 case 26: /* ftosi[sd]. */
8221 case 27: /* ftosiz[sd]. */
8222 /* These instructions will not bounce due to underflow. */
8223 *numregs = 0;
8224 vpipe = VFP11_FMAC;
8225 break;
8226
8227 case 3: /* fsqrt[sd]. */
8228 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8229 registers to cause the erratum in previous instructions. */
8230 bfd_arm_vfp11_write_mask (destmask, fd);
8231 vpipe = VFP11_DS;
8232 break;
8233
8234 case 15: /* fcvt{ds,sd}. */
8235 {
8236 int rnum = 0;
8237
8238 bfd_arm_vfp11_write_mask (destmask, fd);
8239
8240 /* Only FCVTSD can underflow. */
8241 if ((insn & 0x100) != 0)
8242 regs[rnum++] = fm;
8243
8244 *numregs = rnum;
8245
8246 vpipe = VFP11_FMAC;
8247 }
8248 break;
8249
8250 default:
8251 return VFP11_BAD;
8252 }
8253 }
8254 break;
8255
8256 default:
8257 return VFP11_BAD;
8258 }
8259 }
8260 /* Two-register transfer. */
8261 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8262 {
8263 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8264
8265 if ((insn & 0x100000) == 0)
8266 {
8267 if (is_double)
8268 bfd_arm_vfp11_write_mask (destmask, fm);
8269 else
8270 {
8271 bfd_arm_vfp11_write_mask (destmask, fm);
8272 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8273 }
8274 }
8275
8276 vpipe = VFP11_LS;
8277 }
8278 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8279 {
8280 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8281 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8282
8283 switch (puw)
8284 {
8285 case 0: /* Two-reg transfer. We should catch these above. */
8286 abort ();
8287
8288 case 2: /* fldm[sdx]. */
8289 case 3:
8290 case 5:
8291 {
8292 unsigned int i, offset = insn & 0xff;
8293
8294 if (is_double)
8295 offset >>= 1;
8296
8297 for (i = fd; i < fd + offset; i++)
8298 bfd_arm_vfp11_write_mask (destmask, i);
8299 }
8300 break;
8301
8302 case 4: /* fld[sd]. */
8303 case 6:
8304 bfd_arm_vfp11_write_mask (destmask, fd);
8305 break;
8306
8307 default:
8308 return VFP11_BAD;
8309 }
8310
8311 vpipe = VFP11_LS;
8312 }
8313 /* Single-register transfer. Note L==0. */
8314 else if ((insn & 0x0f100e10) == 0x0e000a10)
8315 {
8316 unsigned int opcode = (insn >> 21) & 7;
8317 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8318
8319 switch (opcode)
8320 {
8321 case 0: /* fmsr/fmdlr. */
8322 case 1: /* fmdhr. */
8323 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8324 destination register. I don't know if this is exactly right,
8325 but it is the conservative choice. */
8326 bfd_arm_vfp11_write_mask (destmask, fn);
8327 break;
8328
8329 case 7: /* fmxr. */
8330 break;
8331 }
8332
8333 vpipe = VFP11_LS;
8334 }
8335
8336 return vpipe;
8337 }
8338
8339
8340 static int elf32_arm_compare_mapping (const void * a, const void * b);
8341
8342
8343 /* Look for potentially-troublesome code sequences which might trigger the
8344 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8345 (available from ARM) for details of the erratum. A short version is
8346 described in ld.texinfo. */
8347
8348 bool
8349 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8350 {
8351 asection *sec;
8352 bfd_byte *contents = NULL;
8353 int state = 0;
8354 int regs[3], numregs = 0;
8355 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8356 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8357
8358 if (globals == NULL)
8359 return false;
8360
8361 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8362 The states transition as follows:
8363
8364 0 -> 1 (vector) or 0 -> 2 (scalar)
8365 A VFP FMAC-pipeline instruction has been seen. Fill
8366 regs[0]..regs[numregs-1] with its input operands. Remember this
8367 instruction in 'first_fmac'.
8368
8369 1 -> 2
8370 Any instruction, except for a VFP instruction which overwrites
8371 regs[*].
8372
8373 1 -> 3 [ -> 0 ] or
8374 2 -> 3 [ -> 0 ]
8375 A VFP instruction has been seen which overwrites any of regs[*].
8376 We must make a veneer! Reset state to 0 before examining next
8377 instruction.
8378
8379 2 -> 0
8380 If we fail to match anything in state 2, reset to state 0 and reset
8381 the instruction pointer to the instruction after 'first_fmac'.
8382
8383 If the VFP11 vector mode is in use, there must be at least two unrelated
8384 instructions between anti-dependent VFP11 instructions to properly avoid
8385 triggering the erratum, hence the use of the extra state 1. */
8386
8387 /* If we are only performing a partial link do not bother
8388 to construct any glue. */
8389 if (bfd_link_relocatable (link_info))
8390 return true;
8391
8392 /* Skip if this bfd does not correspond to an ELF image. */
8393 if (! is_arm_elf (abfd))
8394 return true;
8395
8396 /* We should have chosen a fix type by the time we get here. */
8397 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8398
8399 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8400 return true;
8401
8402 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8403 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8404 return true;
8405
8406 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8407 {
8408 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8409 struct _arm_elf_section_data *sec_data;
8410
8411 /* If we don't have executable progbits, we're not interested in this
8412 section. Also skip if section is to be excluded. */
8413 if (elf_section_type (sec) != SHT_PROGBITS
8414 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8415 || (sec->flags & SEC_EXCLUDE) != 0
8416 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8417 || sec->output_section == bfd_abs_section_ptr
8418 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8419 continue;
8420
8421 sec_data = elf32_arm_section_data (sec);
8422
8423 if (sec_data->mapcount == 0)
8424 continue;
8425
8426 if (elf_section_data (sec)->this_hdr.contents != NULL)
8427 contents = elf_section_data (sec)->this_hdr.contents;
8428 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8429 goto error_return;
8430
8431 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8432 elf32_arm_compare_mapping);
8433
8434 for (span = 0; span < sec_data->mapcount; span++)
8435 {
8436 unsigned int span_start = sec_data->map[span].vma;
8437 unsigned int span_end = (span == sec_data->mapcount - 1)
8438 ? sec->size : sec_data->map[span + 1].vma;
8439 char span_type = sec_data->map[span].type;
8440
8441 /* FIXME: Only ARM mode is supported at present. We may need to
8442 support Thumb-2 mode also at some point. */
8443 if (span_type != 'a')
8444 continue;
8445
8446 for (i = span_start; i < span_end;)
8447 {
8448 unsigned int next_i = i + 4;
8449 unsigned int insn = bfd_big_endian (abfd)
8450 ? (((unsigned) contents[i] << 24)
8451 | (contents[i + 1] << 16)
8452 | (contents[i + 2] << 8)
8453 | contents[i + 3])
8454 : (((unsigned) contents[i + 3] << 24)
8455 | (contents[i + 2] << 16)
8456 | (contents[i + 1] << 8)
8457 | contents[i]);
8458 unsigned int writemask = 0;
8459 enum bfd_arm_vfp11_pipe vpipe;
8460
8461 switch (state)
8462 {
8463 case 0:
8464 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8465 &numregs);
8466 /* I'm assuming the VFP11 erratum can trigger with denorm
8467 operands on either the FMAC or the DS pipeline. This might
8468 lead to slightly overenthusiastic veneer insertion. */
8469 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8470 {
8471 state = use_vector ? 1 : 2;
8472 first_fmac = i;
8473 veneer_of_insn = insn;
8474 }
8475 break;
8476
8477 case 1:
8478 {
8479 int other_regs[3], other_numregs;
8480 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8481 other_regs,
8482 &other_numregs);
8483 if (vpipe != VFP11_BAD
8484 && bfd_arm_vfp11_antidependency (writemask, regs,
8485 numregs))
8486 state = 3;
8487 else
8488 state = 2;
8489 }
8490 break;
8491
8492 case 2:
8493 {
8494 int other_regs[3], other_numregs;
8495 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8496 other_regs,
8497 &other_numregs);
8498 if (vpipe != VFP11_BAD
8499 && bfd_arm_vfp11_antidependency (writemask, regs,
8500 numregs))
8501 state = 3;
8502 else
8503 {
8504 state = 0;
8505 next_i = first_fmac + 4;
8506 }
8507 }
8508 break;
8509
8510 case 3:
8511 abort (); /* Should be unreachable. */
8512 }
8513
8514 if (state == 3)
8515 {
8516 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8517 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8518
8519 elf32_arm_section_data (sec)->erratumcount += 1;
8520
8521 newerr->u.b.vfp_insn = veneer_of_insn;
8522
8523 switch (span_type)
8524 {
8525 case 'a':
8526 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8527 break;
8528
8529 default:
8530 abort ();
8531 }
8532
8533 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8534 first_fmac);
8535
8536 newerr->vma = -1;
8537
8538 newerr->next = sec_data->erratumlist;
8539 sec_data->erratumlist = newerr;
8540
8541 state = 0;
8542 }
8543
8544 i = next_i;
8545 }
8546 }
8547
8548 if (elf_section_data (sec)->this_hdr.contents != contents)
8549 free (contents);
8550 contents = NULL;
8551 }
8552
8553 return true;
8554
8555 error_return:
8556 if (elf_section_data (sec)->this_hdr.contents != contents)
8557 free (contents);
8558
8559 return false;
8560 }
8561
8562 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8563 after sections have been laid out, using specially-named symbols. */
8564
8565 void
8566 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8567 struct bfd_link_info *link_info)
8568 {
8569 asection *sec;
8570 struct elf32_arm_link_hash_table *globals;
8571 char *tmp_name;
8572
8573 if (bfd_link_relocatable (link_info))
8574 return;
8575
8576 /* Skip if this bfd does not correspond to an ELF image. */
8577 if (! is_arm_elf (abfd))
8578 return;
8579
8580 globals = elf32_arm_hash_table (link_info);
8581 if (globals == NULL)
8582 return;
8583
8584 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8585 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8586 BFD_ASSERT (tmp_name);
8587
8588 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8589 {
8590 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8591 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8592
8593 for (; errnode != NULL; errnode = errnode->next)
8594 {
8595 struct elf_link_hash_entry *myh;
8596 bfd_vma vma;
8597
8598 switch (errnode->type)
8599 {
8600 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8601 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8602 /* Find veneer symbol. */
8603 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8604 errnode->u.b.veneer->u.v.id);
8605
8606 myh = elf_link_hash_lookup
8607 (&(globals)->root, tmp_name, false, false, true);
8608
8609 if (myh == NULL)
8610 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8611 abfd, "VFP11", tmp_name);
8612
8613 vma = myh->root.u.def.section->output_section->vma
8614 + myh->root.u.def.section->output_offset
8615 + myh->root.u.def.value;
8616
8617 errnode->u.b.veneer->vma = vma;
8618 break;
8619
8620 case VFP11_ERRATUM_ARM_VENEER:
8621 case VFP11_ERRATUM_THUMB_VENEER:
8622 /* Find return location. */
8623 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8624 errnode->u.v.id);
8625
8626 myh = elf_link_hash_lookup
8627 (&(globals)->root, tmp_name, false, false, true);
8628
8629 if (myh == NULL)
8630 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8631 abfd, "VFP11", tmp_name);
8632
8633 vma = myh->root.u.def.section->output_section->vma
8634 + myh->root.u.def.section->output_offset
8635 + myh->root.u.def.value;
8636
8637 errnode->u.v.branch->vma = vma;
8638 break;
8639
8640 default:
8641 abort ();
8642 }
8643 }
8644 }
8645
8646 free (tmp_name);
8647 }
8648
8649 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8650 return locations after sections have been laid out, using
8651 specially-named symbols. */
8652
8653 void
8654 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8655 struct bfd_link_info *link_info)
8656 {
8657 asection *sec;
8658 struct elf32_arm_link_hash_table *globals;
8659 char *tmp_name;
8660
8661 if (bfd_link_relocatable (link_info))
8662 return;
8663
8664 /* Skip if this bfd does not correspond to an ELF image. */
8665 if (! is_arm_elf (abfd))
8666 return;
8667
8668 globals = elf32_arm_hash_table (link_info);
8669 if (globals == NULL)
8670 return;
8671
8672 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8673 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8674 BFD_ASSERT (tmp_name);
8675
8676 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8677 {
8678 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8679 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8680
8681 for (; errnode != NULL; errnode = errnode->next)
8682 {
8683 struct elf_link_hash_entry *myh;
8684 bfd_vma vma;
8685
8686 switch (errnode->type)
8687 {
8688 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8689 /* Find veneer symbol. */
8690 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8691 errnode->u.b.veneer->u.v.id);
8692
8693 myh = elf_link_hash_lookup
8694 (&(globals)->root, tmp_name, false, false, true);
8695
8696 if (myh == NULL)
8697 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8698 abfd, "STM32L4XX", tmp_name);
8699
8700 vma = myh->root.u.def.section->output_section->vma
8701 + myh->root.u.def.section->output_offset
8702 + myh->root.u.def.value;
8703
8704 errnode->u.b.veneer->vma = vma;
8705 break;
8706
8707 case STM32L4XX_ERRATUM_VENEER:
8708 /* Find return location. */
8709 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8710 errnode->u.v.id);
8711
8712 myh = elf_link_hash_lookup
8713 (&(globals)->root, tmp_name, false, false, true);
8714
8715 if (myh == NULL)
8716 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8717 abfd, "STM32L4XX", tmp_name);
8718
8719 vma = myh->root.u.def.section->output_section->vma
8720 + myh->root.u.def.section->output_offset
8721 + myh->root.u.def.value;
8722
8723 errnode->u.v.branch->vma = vma;
8724 break;
8725
8726 default:
8727 abort ();
8728 }
8729 }
8730 }
8731
8732 free (tmp_name);
8733 }
8734
8735 static inline bool
8736 is_thumb2_ldmia (const insn32 insn)
8737 {
8738 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8739 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8740 return (insn & 0xffd02000) == 0xe8900000;
8741 }
8742
8743 static inline bool
8744 is_thumb2_ldmdb (const insn32 insn)
8745 {
8746 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8747 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8748 return (insn & 0xffd02000) == 0xe9100000;
8749 }
8750
8751 static inline bool
8752 is_thumb2_vldm (const insn32 insn)
8753 {
8754 /* A6.5 Extension register load or store instruction
8755 A7.7.229
8756 We look for SP 32-bit and DP 64-bit registers.
8757 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8758 <list> is consecutive 64-bit registers
8759 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8760 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8761 <list> is consecutive 32-bit registers
8762 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8763 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8764 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8765 return
8766 (((insn & 0xfe100f00) == 0xec100b00) ||
8767 ((insn & 0xfe100f00) == 0xec100a00))
8768 && /* (IA without !). */
8769 (((((insn << 7) >> 28) & 0xd) == 0x4)
8770 /* (IA with !), includes VPOP (when reg number is SP). */
8771 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8772 /* (DB with !). */
8773 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8774 }
8775
8776 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8777 VLDM opcode and:
8778 - computes the number and the mode of memory accesses
8779 - decides if the replacement should be done:
8780 . replaces only if > 8-word accesses
8781 . or (testing purposes only) replaces all accesses. */
8782
8783 static bool
8784 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8785 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8786 {
8787 int nb_words = 0;
8788
8789 /* The field encoding the register list is the same for both LDMIA
8790 and LDMDB encodings. */
8791 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8792 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8793 else if (is_thumb2_vldm (insn))
8794 nb_words = (insn & 0xff);
8795
8796 /* DEFAULT mode accounts for the real bug condition situation,
8797 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8798 return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8799 ? nb_words > 8
8800 : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8801 }
8802
8803 /* Look for potentially-troublesome code sequences which might trigger
8804 the STM STM32L4XX erratum. */
8805
8806 bool
8807 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8808 struct bfd_link_info *link_info)
8809 {
8810 asection *sec;
8811 bfd_byte *contents = NULL;
8812 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8813
8814 if (globals == NULL)
8815 return false;
8816
8817 /* If we are only performing a partial link do not bother
8818 to construct any glue. */
8819 if (bfd_link_relocatable (link_info))
8820 return true;
8821
8822 /* Skip if this bfd does not correspond to an ELF image. */
8823 if (! is_arm_elf (abfd))
8824 return true;
8825
8826 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8827 return true;
8828
8829 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8830 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8831 return true;
8832
8833 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8834 {
8835 unsigned int i, span;
8836 struct _arm_elf_section_data *sec_data;
8837
8838 /* If we don't have executable progbits, we're not interested in this
8839 section. Also skip if section is to be excluded. */
8840 if (elf_section_type (sec) != SHT_PROGBITS
8841 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8842 || (sec->flags & SEC_EXCLUDE) != 0
8843 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8844 || sec->output_section == bfd_abs_section_ptr
8845 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8846 continue;
8847
8848 sec_data = elf32_arm_section_data (sec);
8849
8850 if (sec_data->mapcount == 0)
8851 continue;
8852
8853 if (elf_section_data (sec)->this_hdr.contents != NULL)
8854 contents = elf_section_data (sec)->this_hdr.contents;
8855 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8856 goto error_return;
8857
8858 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8859 elf32_arm_compare_mapping);
8860
8861 for (span = 0; span < sec_data->mapcount; span++)
8862 {
8863 unsigned int span_start = sec_data->map[span].vma;
8864 unsigned int span_end = (span == sec_data->mapcount - 1)
8865 ? sec->size : sec_data->map[span + 1].vma;
8866 char span_type = sec_data->map[span].type;
8867 int itblock_current_pos = 0;
8868
8869 /* Only Thumb2 mode need be supported with this CM4 specific
8870 code, we should not encounter any arm mode eg span_type
8871 != 'a'. */
8872 if (span_type != 't')
8873 continue;
8874
8875 for (i = span_start; i < span_end;)
8876 {
8877 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8878 bool insn_32bit = false;
8879 bool is_ldm = false;
8880 bool is_vldm = false;
8881 bool is_not_last_in_it_block = false;
8882
8883 /* The first 16-bits of all 32-bit thumb2 instructions start
8884 with opcode[15..13]=0b111 and the encoded op1 can be anything
8885 except opcode[12..11]!=0b00.
8886 See 32-bit Thumb instruction encoding. */
8887 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8888 insn_32bit = true;
8889
8890 /* Compute the predicate that tells if the instruction
8891 is concerned by the IT block
8892 - Creates an error if there is a ldm that is not
8893 last in the IT block thus cannot be replaced
8894 - Otherwise we can create a branch at the end of the
8895 IT block, it will be controlled naturally by IT
8896 with the proper pseudo-predicate
8897 - So the only interesting predicate is the one that
8898 tells that we are not on the last item of an IT
8899 block. */
8900 if (itblock_current_pos != 0)
8901 is_not_last_in_it_block = !!--itblock_current_pos;
8902
8903 if (insn_32bit)
8904 {
8905 /* Load the rest of the insn (in manual-friendly order). */
8906 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8907 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8908 is_vldm = is_thumb2_vldm (insn);
8909
8910 /* Veneers are created for (v)ldm depending on
8911 option flags and memory accesses conditions; but
8912 if the instruction is not the last instruction of
8913 an IT block, we cannot create a jump there, so we
8914 bail out. */
8915 if ((is_ldm || is_vldm)
8916 && stm32l4xx_need_create_replacing_stub
8917 (insn, globals->stm32l4xx_fix))
8918 {
8919 if (is_not_last_in_it_block)
8920 {
8921 _bfd_error_handler
8922 /* xgettext:c-format */
8923 (_("%pB(%pA+%#x): error: multiple load detected"
8924 " in non-last IT block instruction:"
8925 " STM32L4XX veneer cannot be generated; "
8926 "use gcc option -mrestrict-it to generate"
8927 " only one instruction per IT block"),
8928 abfd, sec, i);
8929 }
8930 else
8931 {
8932 elf32_stm32l4xx_erratum_list *newerr =
8933 (elf32_stm32l4xx_erratum_list *)
8934 bfd_zmalloc
8935 (sizeof (elf32_stm32l4xx_erratum_list));
8936
8937 elf32_arm_section_data (sec)
8938 ->stm32l4xx_erratumcount += 1;
8939 newerr->u.b.insn = insn;
8940 /* We create only thumb branches. */
8941 newerr->type =
8942 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8943 record_stm32l4xx_erratum_veneer
8944 (link_info, newerr, abfd, sec,
8945 i,
8946 is_ldm ?
8947 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8948 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8949 newerr->vma = -1;
8950 newerr->next = sec_data->stm32l4xx_erratumlist;
8951 sec_data->stm32l4xx_erratumlist = newerr;
8952 }
8953 }
8954 }
8955 else
8956 {
8957 /* A7.7.37 IT p208
8958 IT blocks are only encoded in T1
8959 Encoding T1: IT{x{y{z}}} <firstcond>
8960 1 0 1 1 - 1 1 1 1 - firstcond - mask
8961 if mask = '0000' then see 'related encodings'
8962 We don't deal with UNPREDICTABLE, just ignore these.
8963 There can be no nested IT blocks so an IT block
8964 is naturally a new one for which it is worth
8965 computing its size. */
8966 bool is_newitblock = ((insn & 0xff00) == 0xbf00)
8967 && ((insn & 0x000f) != 0x0000);
8968 /* If we have a new IT block we compute its size. */
8969 if (is_newitblock)
8970 {
8971 /* Compute the number of instructions controlled
8972 by the IT block, it will be used to decide
8973 whether we are inside an IT block or not. */
8974 unsigned int mask = insn & 0x000f;
8975 itblock_current_pos = 4 - ctz (mask);
8976 }
8977 }
8978
8979 i += insn_32bit ? 4 : 2;
8980 }
8981 }
8982
8983 if (elf_section_data (sec)->this_hdr.contents != contents)
8984 free (contents);
8985 contents = NULL;
8986 }
8987
8988 return true;
8989
8990 error_return:
8991 if (elf_section_data (sec)->this_hdr.contents != contents)
8992 free (contents);
8993
8994 return false;
8995 }
8996
8997 /* Set target relocation values needed during linking. */
8998
8999 void
9000 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9001 struct bfd_link_info *link_info,
9002 struct elf32_arm_params *params)
9003 {
9004 struct elf32_arm_link_hash_table *globals;
9005
9006 globals = elf32_arm_hash_table (link_info);
9007 if (globals == NULL)
9008 return;
9009
9010 globals->target1_is_rel = params->target1_is_rel;
9011 if (globals->fdpic_p)
9012 globals->target2_reloc = R_ARM_GOT32;
9013 else if (strcmp (params->target2_type, "rel") == 0)
9014 globals->target2_reloc = R_ARM_REL32;
9015 else if (strcmp (params->target2_type, "abs") == 0)
9016 globals->target2_reloc = R_ARM_ABS32;
9017 else if (strcmp (params->target2_type, "got-rel") == 0)
9018 globals->target2_reloc = R_ARM_GOT_PREL;
9019 else
9020 {
9021 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9022 params->target2_type);
9023 }
9024 globals->fix_v4bx = params->fix_v4bx;
9025 globals->use_blx |= params->use_blx;
9026 globals->vfp11_fix = params->vfp11_denorm_fix;
9027 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9028 if (globals->fdpic_p)
9029 globals->pic_veneer = 1;
9030 else
9031 globals->pic_veneer = params->pic_veneer;
9032 globals->fix_cortex_a8 = params->fix_cortex_a8;
9033 globals->fix_arm1176 = params->fix_arm1176;
9034 globals->cmse_implib = params->cmse_implib;
9035 globals->in_implib_bfd = params->in_implib_bfd;
9036
9037 BFD_ASSERT (is_arm_elf (output_bfd));
9038 elf_arm_tdata (output_bfd)->no_enum_size_warning
9039 = params->no_enum_size_warning;
9040 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9041 = params->no_wchar_size_warning;
9042 }
9043
9044 /* Replace the target offset of a Thumb bl or b.w instruction. */
9045
9046 static void
9047 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9048 {
9049 bfd_vma upper;
9050 bfd_vma lower;
9051 int reloc_sign;
9052
9053 BFD_ASSERT ((offset & 1) == 0);
9054
9055 upper = bfd_get_16 (abfd, insn);
9056 lower = bfd_get_16 (abfd, insn + 2);
9057 reloc_sign = (offset < 0) ? 1 : 0;
9058 upper = (upper & ~(bfd_vma) 0x7ff)
9059 | ((offset >> 12) & 0x3ff)
9060 | (reloc_sign << 10);
9061 lower = (lower & ~(bfd_vma) 0x2fff)
9062 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9063 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9064 | ((offset >> 1) & 0x7ff);
9065 bfd_put_16 (abfd, upper, insn);
9066 bfd_put_16 (abfd, lower, insn + 2);
9067 }
9068
9069 /* Thumb code calling an ARM function. */
9070
9071 static int
9072 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9073 const char * name,
9074 bfd * input_bfd,
9075 bfd * output_bfd,
9076 asection * input_section,
9077 bfd_byte * hit_data,
9078 asection * sym_sec,
9079 bfd_vma offset,
9080 bfd_signed_vma addend,
9081 bfd_vma val,
9082 char **error_message)
9083 {
9084 asection * s = 0;
9085 bfd_vma my_offset;
9086 long int ret_offset;
9087 struct elf_link_hash_entry * myh;
9088 struct elf32_arm_link_hash_table * globals;
9089
9090 myh = find_thumb_glue (info, name, error_message);
9091 if (myh == NULL)
9092 return false;
9093
9094 globals = elf32_arm_hash_table (info);
9095 BFD_ASSERT (globals != NULL);
9096 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9097
9098 my_offset = myh->root.u.def.value;
9099
9100 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9101 THUMB2ARM_GLUE_SECTION_NAME);
9102
9103 BFD_ASSERT (s != NULL);
9104 BFD_ASSERT (s->contents != NULL);
9105 BFD_ASSERT (s->output_section != NULL);
9106
9107 if ((my_offset & 0x01) == 0x01)
9108 {
9109 if (sym_sec != NULL
9110 && sym_sec->owner != NULL
9111 && !INTERWORK_FLAG (sym_sec->owner))
9112 {
9113 _bfd_error_handler
9114 (_("%pB(%s): warning: interworking not enabled;"
9115 " first occurrence: %pB: %s call to %s"),
9116 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9117
9118 return false;
9119 }
9120
9121 --my_offset;
9122 myh->root.u.def.value = my_offset;
9123
9124 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9125 s->contents + my_offset);
9126
9127 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9128 s->contents + my_offset + 2);
9129
9130 ret_offset =
9131 /* Address of destination of the stub. */
9132 ((bfd_signed_vma) val)
9133 - ((bfd_signed_vma)
9134 /* Offset from the start of the current section
9135 to the start of the stubs. */
9136 (s->output_offset
9137 /* Offset of the start of this stub from the start of the stubs. */
9138 + my_offset
9139 /* Address of the start of the current section. */
9140 + s->output_section->vma)
9141 /* The branch instruction is 4 bytes into the stub. */
9142 + 4
9143 /* ARM branches work from the pc of the instruction + 8. */
9144 + 8);
9145
9146 put_arm_insn (globals, output_bfd,
9147 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9148 s->contents + my_offset + 4);
9149 }
9150
9151 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9152
9153 /* Now go back and fix up the original BL insn to point to here. */
9154 ret_offset =
9155 /* Address of where the stub is located. */
9156 (s->output_section->vma + s->output_offset + my_offset)
9157 /* Address of where the BL is located. */
9158 - (input_section->output_section->vma + input_section->output_offset
9159 + offset)
9160 /* Addend in the relocation. */
9161 - addend
9162 /* Biassing for PC-relative addressing. */
9163 - 8;
9164
9165 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9166
9167 return true;
9168 }
9169
9170 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9171
9172 static struct elf_link_hash_entry *
9173 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9174 const char * name,
9175 bfd * input_bfd,
9176 bfd * output_bfd,
9177 asection * sym_sec,
9178 bfd_vma val,
9179 asection * s,
9180 char ** error_message)
9181 {
9182 bfd_vma my_offset;
9183 long int ret_offset;
9184 struct elf_link_hash_entry * myh;
9185 struct elf32_arm_link_hash_table * globals;
9186
9187 myh = find_arm_glue (info, name, error_message);
9188 if (myh == NULL)
9189 return NULL;
9190
9191 globals = elf32_arm_hash_table (info);
9192 BFD_ASSERT (globals != NULL);
9193 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9194
9195 my_offset = myh->root.u.def.value;
9196
9197 if ((my_offset & 0x01) == 0x01)
9198 {
9199 if (sym_sec != NULL
9200 && sym_sec->owner != NULL
9201 && !INTERWORK_FLAG (sym_sec->owner))
9202 {
9203 _bfd_error_handler
9204 (_("%pB(%s): warning: interworking not enabled;"
9205 " first occurrence: %pB: %s call to %s"),
9206 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9207 }
9208
9209 --my_offset;
9210 myh->root.u.def.value = my_offset;
9211
9212 if (bfd_link_pic (info)
9213 || globals->root.is_relocatable_executable
9214 || globals->pic_veneer)
9215 {
9216 /* For relocatable objects we can't use absolute addresses,
9217 so construct the address from a relative offset. */
9218 /* TODO: If the offset is small it's probably worth
9219 constructing the address with adds. */
9220 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9221 s->contents + my_offset);
9222 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9223 s->contents + my_offset + 4);
9224 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9225 s->contents + my_offset + 8);
9226 /* Adjust the offset by 4 for the position of the add,
9227 and 8 for the pipeline offset. */
9228 ret_offset = (val - (s->output_offset
9229 + s->output_section->vma
9230 + my_offset + 12))
9231 | 1;
9232 bfd_put_32 (output_bfd, ret_offset,
9233 s->contents + my_offset + 12);
9234 }
9235 else if (globals->use_blx)
9236 {
9237 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9238 s->contents + my_offset);
9239
9240 /* It's a thumb address. Add the low order bit. */
9241 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9242 s->contents + my_offset + 4);
9243 }
9244 else
9245 {
9246 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9247 s->contents + my_offset);
9248
9249 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9250 s->contents + my_offset + 4);
9251
9252 /* It's a thumb address. Add the low order bit. */
9253 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9254 s->contents + my_offset + 8);
9255
9256 my_offset += 12;
9257 }
9258 }
9259
9260 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9261
9262 return myh;
9263 }
9264
9265 /* Arm code calling a Thumb function. */
9266
9267 static int
9268 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9269 const char * name,
9270 bfd * input_bfd,
9271 bfd * output_bfd,
9272 asection * input_section,
9273 bfd_byte * hit_data,
9274 asection * sym_sec,
9275 bfd_vma offset,
9276 bfd_signed_vma addend,
9277 bfd_vma val,
9278 char **error_message)
9279 {
9280 unsigned long int tmp;
9281 bfd_vma my_offset;
9282 asection * s;
9283 long int ret_offset;
9284 struct elf_link_hash_entry * myh;
9285 struct elf32_arm_link_hash_table * globals;
9286
9287 globals = elf32_arm_hash_table (info);
9288 BFD_ASSERT (globals != NULL);
9289 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9290
9291 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9292 ARM2THUMB_GLUE_SECTION_NAME);
9293 BFD_ASSERT (s != NULL);
9294 BFD_ASSERT (s->contents != NULL);
9295 BFD_ASSERT (s->output_section != NULL);
9296
9297 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9298 sym_sec, val, s, error_message);
9299 if (!myh)
9300 return false;
9301
9302 my_offset = myh->root.u.def.value;
9303 tmp = bfd_get_32 (input_bfd, hit_data);
9304 tmp = tmp & 0xFF000000;
9305
9306 /* Somehow these are both 4 too far, so subtract 8. */
9307 ret_offset = (s->output_offset
9308 + my_offset
9309 + s->output_section->vma
9310 - (input_section->output_offset
9311 + input_section->output_section->vma
9312 + offset + addend)
9313 - 8);
9314
9315 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9316
9317 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9318
9319 return true;
9320 }
9321
9322 /* Populate Arm stub for an exported Thumb function. */
9323
9324 static bool
9325 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9326 {
9327 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9328 asection * s;
9329 struct elf_link_hash_entry * myh;
9330 struct elf32_arm_link_hash_entry *eh;
9331 struct elf32_arm_link_hash_table * globals;
9332 asection *sec;
9333 bfd_vma val;
9334 char *error_message;
9335
9336 eh = elf32_arm_hash_entry (h);
9337 /* Allocate stubs for exported Thumb functions on v4t. */
9338 if (eh->export_glue == NULL)
9339 return true;
9340
9341 globals = elf32_arm_hash_table (info);
9342 BFD_ASSERT (globals != NULL);
9343 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9344
9345 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9346 ARM2THUMB_GLUE_SECTION_NAME);
9347 BFD_ASSERT (s != NULL);
9348 BFD_ASSERT (s->contents != NULL);
9349 BFD_ASSERT (s->output_section != NULL);
9350
9351 sec = eh->export_glue->root.u.def.section;
9352
9353 BFD_ASSERT (sec->output_section != NULL);
9354
9355 val = eh->export_glue->root.u.def.value + sec->output_offset
9356 + sec->output_section->vma;
9357
9358 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9359 h->root.u.def.section->owner,
9360 globals->obfd, sec, val, s,
9361 &error_message);
9362 BFD_ASSERT (myh);
9363 return true;
9364 }
9365
9366 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9367
9368 static bfd_vma
9369 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9370 {
9371 bfd_byte *p;
9372 bfd_vma glue_addr;
9373 asection *s;
9374 struct elf32_arm_link_hash_table *globals;
9375
9376 globals = elf32_arm_hash_table (info);
9377 BFD_ASSERT (globals != NULL);
9378 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9379
9380 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9381 ARM_BX_GLUE_SECTION_NAME);
9382 BFD_ASSERT (s != NULL);
9383 BFD_ASSERT (s->contents != NULL);
9384 BFD_ASSERT (s->output_section != NULL);
9385
9386 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9387
9388 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9389
9390 if ((globals->bx_glue_offset[reg] & 1) == 0)
9391 {
9392 p = s->contents + glue_addr;
9393 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9394 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9395 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9396 globals->bx_glue_offset[reg] |= 1;
9397 }
9398
9399 return glue_addr + s->output_section->vma + s->output_offset;
9400 }
9401
9402 /* Generate Arm stubs for exported Thumb symbols. */
9403 static void
9404 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9405 struct bfd_link_info *link_info)
9406 {
9407 struct elf32_arm_link_hash_table * globals;
9408
9409 if (link_info == NULL)
9410 /* Ignore this if we are not called by the ELF backend linker. */
9411 return;
9412
9413 globals = elf32_arm_hash_table (link_info);
9414 if (globals == NULL)
9415 return;
9416
9417 /* If blx is available then exported Thumb symbols are OK and there is
9418 nothing to do. */
9419 if (globals->use_blx)
9420 return;
9421
9422 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9423 link_info);
9424 }
9425
9426 /* Reserve space for COUNT dynamic relocations in relocation selection
9427 SRELOC. */
9428
9429 static void
9430 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9431 bfd_size_type count)
9432 {
9433 struct elf32_arm_link_hash_table *htab;
9434
9435 htab = elf32_arm_hash_table (info);
9436 BFD_ASSERT (htab->root.dynamic_sections_created);
9437 if (sreloc == NULL)
9438 abort ();
9439 sreloc->size += RELOC_SIZE (htab) * count;
9440 }
9441
9442 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9443 dynamic, the relocations should go in SRELOC, otherwise they should
9444 go in the special .rel.iplt section. */
9445
9446 static void
9447 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9448 bfd_size_type count)
9449 {
9450 struct elf32_arm_link_hash_table *htab;
9451
9452 htab = elf32_arm_hash_table (info);
9453 if (!htab->root.dynamic_sections_created)
9454 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9455 else
9456 {
9457 BFD_ASSERT (sreloc != NULL);
9458 sreloc->size += RELOC_SIZE (htab) * count;
9459 }
9460 }
9461
9462 /* Add relocation REL to the end of relocation section SRELOC. */
9463
9464 static void
9465 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9466 asection *sreloc, Elf_Internal_Rela *rel)
9467 {
9468 bfd_byte *loc;
9469 struct elf32_arm_link_hash_table *htab;
9470
9471 htab = elf32_arm_hash_table (info);
9472 if (!htab->root.dynamic_sections_created
9473 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9474 sreloc = htab->root.irelplt;
9475 if (sreloc == NULL)
9476 abort ();
9477 loc = sreloc->contents;
9478 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9479 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9480 abort ();
9481 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9482 }
9483
9484 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9485 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9486 to .plt. */
9487
9488 static void
9489 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9490 bool is_iplt_entry,
9491 union gotplt_union *root_plt,
9492 struct arm_plt_info *arm_plt)
9493 {
9494 struct elf32_arm_link_hash_table *htab;
9495 asection *splt;
9496 asection *sgotplt;
9497
9498 htab = elf32_arm_hash_table (info);
9499
9500 if (is_iplt_entry)
9501 {
9502 splt = htab->root.iplt;
9503 sgotplt = htab->root.igotplt;
9504
9505 /* NaCl uses a special first entry in .iplt too. */
9506 if (htab->root.target_os == is_nacl && splt->size == 0)
9507 splt->size += htab->plt_header_size;
9508
9509 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9510 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9511 }
9512 else
9513 {
9514 splt = htab->root.splt;
9515 sgotplt = htab->root.sgotplt;
9516
9517 if (htab->fdpic_p)
9518 {
9519 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9520 /* For lazy binding, relocations will be put into .rel.plt, in
9521 .rel.got otherwise. */
9522 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9523 if (info->flags & DF_BIND_NOW)
9524 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9525 else
9526 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9527 }
9528 else
9529 {
9530 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9531 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9532 }
9533
9534 /* If this is the first .plt entry, make room for the special
9535 first entry. */
9536 if (splt->size == 0)
9537 splt->size += htab->plt_header_size;
9538
9539 htab->next_tls_desc_index++;
9540 }
9541
9542 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9543 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9544 splt->size += PLT_THUMB_STUB_SIZE;
9545 root_plt->offset = splt->size;
9546 splt->size += htab->plt_entry_size;
9547
9548 /* We also need to make an entry in the .got.plt section, which
9549 will be placed in the .got section by the linker script. */
9550 if (is_iplt_entry)
9551 arm_plt->got_offset = sgotplt->size;
9552 else
9553 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9554 if (htab->fdpic_p)
9555 /* Function descriptor takes 64 bits in GOT. */
9556 sgotplt->size += 8;
9557 else
9558 sgotplt->size += 4;
9559 }
9560
9561 static bfd_vma
9562 arm_movw_immediate (bfd_vma value)
9563 {
9564 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9565 }
9566
9567 static bfd_vma
9568 arm_movt_immediate (bfd_vma value)
9569 {
9570 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9571 }
9572
9573 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9574 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9575 Otherwise, DYNINDX is the index of the symbol in the dynamic
9576 symbol table and SYM_VALUE is undefined.
9577
9578 ROOT_PLT points to the offset of the PLT entry from the start of its
9579 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9580 bookkeeping information.
9581
9582 Returns FALSE if there was a problem. */
9583
9584 static bool
9585 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9586 union gotplt_union *root_plt,
9587 struct arm_plt_info *arm_plt,
9588 int dynindx, bfd_vma sym_value)
9589 {
9590 struct elf32_arm_link_hash_table *htab;
9591 asection *sgot;
9592 asection *splt;
9593 asection *srel;
9594 bfd_byte *loc;
9595 bfd_vma plt_index;
9596 Elf_Internal_Rela rel;
9597 bfd_vma got_header_size;
9598
9599 htab = elf32_arm_hash_table (info);
9600
9601 /* Pick the appropriate sections and sizes. */
9602 if (dynindx == -1)
9603 {
9604 splt = htab->root.iplt;
9605 sgot = htab->root.igotplt;
9606 srel = htab->root.irelplt;
9607
9608 /* There are no reserved entries in .igot.plt, and no special
9609 first entry in .iplt. */
9610 got_header_size = 0;
9611 }
9612 else
9613 {
9614 splt = htab->root.splt;
9615 sgot = htab->root.sgotplt;
9616 srel = htab->root.srelplt;
9617
9618 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9619 }
9620 BFD_ASSERT (splt != NULL && srel != NULL);
9621
9622 bfd_vma got_offset, got_address, plt_address;
9623 bfd_vma got_displacement, initial_got_entry;
9624 bfd_byte * ptr;
9625
9626 BFD_ASSERT (sgot != NULL);
9627
9628 /* Get the offset into the .(i)got.plt table of the entry that
9629 corresponds to this function. */
9630 got_offset = (arm_plt->got_offset & -2);
9631
9632 /* Get the index in the procedure linkage table which
9633 corresponds to this symbol. This is the index of this symbol
9634 in all the symbols for which we are making plt entries.
9635 After the reserved .got.plt entries, all symbols appear in
9636 the same order as in .plt. */
9637 if (htab->fdpic_p)
9638 /* Function descriptor takes 8 bytes. */
9639 plt_index = (got_offset - got_header_size) / 8;
9640 else
9641 plt_index = (got_offset - got_header_size) / 4;
9642
9643 /* Calculate the address of the GOT entry. */
9644 got_address = (sgot->output_section->vma
9645 + sgot->output_offset
9646 + got_offset);
9647
9648 /* ...and the address of the PLT entry. */
9649 plt_address = (splt->output_section->vma
9650 + splt->output_offset
9651 + root_plt->offset);
9652
9653 ptr = splt->contents + root_plt->offset;
9654 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9655 {
9656 unsigned int i;
9657 bfd_vma val;
9658
9659 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9660 {
9661 val = elf32_arm_vxworks_shared_plt_entry[i];
9662 if (i == 2)
9663 val |= got_address - sgot->output_section->vma;
9664 if (i == 5)
9665 val |= plt_index * RELOC_SIZE (htab);
9666 if (i == 2 || i == 5)
9667 bfd_put_32 (output_bfd, val, ptr);
9668 else
9669 put_arm_insn (htab, output_bfd, val, ptr);
9670 }
9671 }
9672 else if (htab->root.target_os == is_vxworks)
9673 {
9674 unsigned int i;
9675 bfd_vma val;
9676
9677 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9678 {
9679 val = elf32_arm_vxworks_exec_plt_entry[i];
9680 if (i == 2)
9681 val |= got_address;
9682 if (i == 4)
9683 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9684 if (i == 5)
9685 val |= plt_index * RELOC_SIZE (htab);
9686 if (i == 2 || i == 5)
9687 bfd_put_32 (output_bfd, val, ptr);
9688 else
9689 put_arm_insn (htab, output_bfd, val, ptr);
9690 }
9691
9692 loc = (htab->srelplt2->contents
9693 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9694
9695 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9696 referencing the GOT for this PLT entry. */
9697 rel.r_offset = plt_address + 8;
9698 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9699 rel.r_addend = got_offset;
9700 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9701 loc += RELOC_SIZE (htab);
9702
9703 /* Create the R_ARM_ABS32 relocation referencing the
9704 beginning of the PLT for this GOT entry. */
9705 rel.r_offset = got_address;
9706 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9707 rel.r_addend = 0;
9708 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9709 }
9710 else if (htab->root.target_os == is_nacl)
9711 {
9712 /* Calculate the displacement between the PLT slot and the
9713 common tail that's part of the special initial PLT slot. */
9714 int32_t tail_displacement
9715 = ((splt->output_section->vma + splt->output_offset
9716 + ARM_NACL_PLT_TAIL_OFFSET)
9717 - (plt_address + htab->plt_entry_size + 4));
9718 BFD_ASSERT ((tail_displacement & 3) == 0);
9719 tail_displacement >>= 2;
9720
9721 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9722 || (-tail_displacement & 0xff000000) == 0);
9723
9724 /* Calculate the displacement between the PLT slot and the entry
9725 in the GOT. The offset accounts for the value produced by
9726 adding to pc in the penultimate instruction of the PLT stub. */
9727 got_displacement = (got_address
9728 - (plt_address + htab->plt_entry_size));
9729
9730 /* NaCl does not support interworking at all. */
9731 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9732
9733 put_arm_insn (htab, output_bfd,
9734 elf32_arm_nacl_plt_entry[0]
9735 | arm_movw_immediate (got_displacement),
9736 ptr + 0);
9737 put_arm_insn (htab, output_bfd,
9738 elf32_arm_nacl_plt_entry[1]
9739 | arm_movt_immediate (got_displacement),
9740 ptr + 4);
9741 put_arm_insn (htab, output_bfd,
9742 elf32_arm_nacl_plt_entry[2],
9743 ptr + 8);
9744 put_arm_insn (htab, output_bfd,
9745 elf32_arm_nacl_plt_entry[3]
9746 | (tail_displacement & 0x00ffffff),
9747 ptr + 12);
9748 }
9749 else if (htab->fdpic_p)
9750 {
9751 const bfd_vma *plt_entry = using_thumb_only(htab)
9752 ? elf32_arm_fdpic_thumb_plt_entry
9753 : elf32_arm_fdpic_plt_entry;
9754
9755 /* Fill-up Thumb stub if needed. */
9756 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9757 {
9758 put_thumb_insn (htab, output_bfd,
9759 elf32_arm_plt_thumb_stub[0], ptr - 4);
9760 put_thumb_insn (htab, output_bfd,
9761 elf32_arm_plt_thumb_stub[1], ptr - 2);
9762 }
9763 /* As we are using 32 bit instructions even for the Thumb
9764 version, we have to use 'put_arm_insn' instead of
9765 'put_thumb_insn'. */
9766 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9767 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9768 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9769 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9770 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9771
9772 if (!(info->flags & DF_BIND_NOW))
9773 {
9774 /* funcdesc_value_reloc_offset. */
9775 bfd_put_32 (output_bfd,
9776 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9777 ptr + 20);
9778 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9779 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9780 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9781 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9782 }
9783 }
9784 else if (using_thumb_only (htab))
9785 {
9786 /* PR ld/16017: Generate thumb only PLT entries. */
9787 if (!using_thumb2 (htab))
9788 {
9789 /* FIXME: We ought to be able to generate thumb-1 PLT
9790 instructions... */
9791 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9792 output_bfd);
9793 return false;
9794 }
9795
9796 /* Calculate the displacement between the PLT slot and the entry in
9797 the GOT. The 12-byte offset accounts for the value produced by
9798 adding to pc in the 3rd instruction of the PLT stub. */
9799 got_displacement = got_address - (plt_address + 12);
9800
9801 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9802 instead of 'put_thumb_insn'. */
9803 put_arm_insn (htab, output_bfd,
9804 elf32_thumb2_plt_entry[0]
9805 | ((got_displacement & 0x000000ff) << 16)
9806 | ((got_displacement & 0x00000700) << 20)
9807 | ((got_displacement & 0x00000800) >> 1)
9808 | ((got_displacement & 0x0000f000) >> 12),
9809 ptr + 0);
9810 put_arm_insn (htab, output_bfd,
9811 elf32_thumb2_plt_entry[1]
9812 | ((got_displacement & 0x00ff0000) )
9813 | ((got_displacement & 0x07000000) << 4)
9814 | ((got_displacement & 0x08000000) >> 17)
9815 | ((got_displacement & 0xf0000000) >> 28),
9816 ptr + 4);
9817 put_arm_insn (htab, output_bfd,
9818 elf32_thumb2_plt_entry[2],
9819 ptr + 8);
9820 put_arm_insn (htab, output_bfd,
9821 elf32_thumb2_plt_entry[3],
9822 ptr + 12);
9823 }
9824 else
9825 {
9826 /* Calculate the displacement between the PLT slot and the
9827 entry in the GOT. The eight-byte offset accounts for the
9828 value produced by adding to pc in the first instruction
9829 of the PLT stub. */
9830 got_displacement = got_address - (plt_address + 8);
9831
9832 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9833 {
9834 put_thumb_insn (htab, output_bfd,
9835 elf32_arm_plt_thumb_stub[0], ptr - 4);
9836 put_thumb_insn (htab, output_bfd,
9837 elf32_arm_plt_thumb_stub[1], ptr - 2);
9838 }
9839
9840 if (!elf32_arm_use_long_plt_entry)
9841 {
9842 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9843
9844 put_arm_insn (htab, output_bfd,
9845 elf32_arm_plt_entry_short[0]
9846 | ((got_displacement & 0x0ff00000) >> 20),
9847 ptr + 0);
9848 put_arm_insn (htab, output_bfd,
9849 elf32_arm_plt_entry_short[1]
9850 | ((got_displacement & 0x000ff000) >> 12),
9851 ptr+ 4);
9852 put_arm_insn (htab, output_bfd,
9853 elf32_arm_plt_entry_short[2]
9854 | (got_displacement & 0x00000fff),
9855 ptr + 8);
9856 #ifdef FOUR_WORD_PLT
9857 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9858 #endif
9859 }
9860 else
9861 {
9862 put_arm_insn (htab, output_bfd,
9863 elf32_arm_plt_entry_long[0]
9864 | ((got_displacement & 0xf0000000) >> 28),
9865 ptr + 0);
9866 put_arm_insn (htab, output_bfd,
9867 elf32_arm_plt_entry_long[1]
9868 | ((got_displacement & 0x0ff00000) >> 20),
9869 ptr + 4);
9870 put_arm_insn (htab, output_bfd,
9871 elf32_arm_plt_entry_long[2]
9872 | ((got_displacement & 0x000ff000) >> 12),
9873 ptr+ 8);
9874 put_arm_insn (htab, output_bfd,
9875 elf32_arm_plt_entry_long[3]
9876 | (got_displacement & 0x00000fff),
9877 ptr + 12);
9878 }
9879 }
9880
9881 /* Fill in the entry in the .rel(a).(i)plt section. */
9882 rel.r_offset = got_address;
9883 rel.r_addend = 0;
9884 if (dynindx == -1)
9885 {
9886 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9887 The dynamic linker or static executable then calls SYM_VALUE
9888 to determine the correct run-time value of the .igot.plt entry. */
9889 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9890 initial_got_entry = sym_value;
9891 }
9892 else
9893 {
9894 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9895 used by PLT entry. */
9896 if (htab->fdpic_p)
9897 {
9898 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9899 initial_got_entry = 0;
9900 }
9901 else
9902 {
9903 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9904 initial_got_entry = (splt->output_section->vma
9905 + splt->output_offset);
9906
9907 /* PR ld/16017
9908 When thumb only we need to set the LSB for any address that
9909 will be used with an interworking branch instruction. */
9910 if (using_thumb_only (htab))
9911 initial_got_entry |= 1;
9912 }
9913 }
9914
9915 /* Fill in the entry in the global offset table. */
9916 bfd_put_32 (output_bfd, initial_got_entry,
9917 sgot->contents + got_offset);
9918
9919 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9920 {
9921 /* Setup initial funcdesc value. */
9922 /* FIXME: we don't support lazy binding because there is a
9923 race condition between both words getting written and
9924 some other thread attempting to read them. The ARM
9925 architecture does not have an atomic 64 bit load/store
9926 instruction that could be used to prevent it; it is
9927 recommended that threaded FDPIC applications run with the
9928 LD_BIND_NOW environment variable set. */
9929 bfd_put_32(output_bfd, plt_address + 0x18,
9930 sgot->contents + got_offset);
9931 bfd_put_32(output_bfd, -1 /*TODO*/,
9932 sgot->contents + got_offset + 4);
9933 }
9934
9935 if (dynindx == -1)
9936 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9937 else
9938 {
9939 if (htab->fdpic_p)
9940 {
9941 /* For FDPIC we put PLT relocationss into .rel.got when not
9942 lazy binding otherwise we put them in .rel.plt. For now,
9943 we don't support lazy binding so put it in .rel.got. */
9944 if (info->flags & DF_BIND_NOW)
9945 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9946 else
9947 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9948 }
9949 else
9950 {
9951 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9952 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9953 }
9954 }
9955
9956 return true;
9957 }
9958
9959 /* Some relocations map to different relocations depending on the
9960 target. Return the real relocation. */
9961
9962 static int
9963 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9964 int r_type)
9965 {
9966 switch (r_type)
9967 {
9968 case R_ARM_TARGET1:
9969 if (globals->target1_is_rel)
9970 return R_ARM_REL32;
9971 else
9972 return R_ARM_ABS32;
9973
9974 case R_ARM_TARGET2:
9975 return globals->target2_reloc;
9976
9977 default:
9978 return r_type;
9979 }
9980 }
9981
9982 /* Return the base VMA address which should be subtracted from real addresses
9983 when resolving @dtpoff relocation.
9984 This is PT_TLS segment p_vaddr. */
9985
9986 static bfd_vma
9987 dtpoff_base (struct bfd_link_info *info)
9988 {
9989 /* If tls_sec is NULL, we should have signalled an error already. */
9990 if (elf_hash_table (info)->tls_sec == NULL)
9991 return 0;
9992 return elf_hash_table (info)->tls_sec->vma;
9993 }
9994
9995 /* Return the relocation value for @tpoff relocation
9996 if STT_TLS virtual address is ADDRESS. */
9997
9998 static bfd_vma
9999 tpoff (struct bfd_link_info *info, bfd_vma address)
10000 {
10001 struct elf_link_hash_table *htab = elf_hash_table (info);
10002 bfd_vma base;
10003
10004 /* If tls_sec is NULL, we should have signalled an error already. */
10005 if (htab->tls_sec == NULL)
10006 return 0;
10007 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10008 return address - htab->tls_sec->vma + base;
10009 }
10010
10011 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10012 VALUE is the relocation value. */
10013
10014 static bfd_reloc_status_type
10015 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10016 {
10017 if (value > 0xfff)
10018 return bfd_reloc_overflow;
10019
10020 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10021 bfd_put_32 (abfd, value, data);
10022 return bfd_reloc_ok;
10023 }
10024
10025 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10026 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10027 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10028
10029 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10030 is to then call final_link_relocate. Return other values in the
10031 case of error.
10032
10033 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10034 the pre-relaxed code. It would be nice if the relocs were updated
10035 to match the optimization. */
10036
10037 static bfd_reloc_status_type
10038 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10039 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10040 Elf_Internal_Rela *rel, unsigned long is_local)
10041 {
10042 unsigned long insn;
10043
10044 switch (ELF32_R_TYPE (rel->r_info))
10045 {
10046 default:
10047 return bfd_reloc_notsupported;
10048
10049 case R_ARM_TLS_GOTDESC:
10050 if (is_local)
10051 insn = 0;
10052 else
10053 {
10054 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10055 if (insn & 1)
10056 insn -= 5; /* THUMB */
10057 else
10058 insn -= 8; /* ARM */
10059 }
10060 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10061 return bfd_reloc_continue;
10062
10063 case R_ARM_THM_TLS_DESCSEQ:
10064 /* Thumb insn. */
10065 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10066 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10067 {
10068 if (is_local)
10069 /* nop */
10070 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10071 }
10072 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10073 {
10074 if (is_local)
10075 /* nop */
10076 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10077 else
10078 /* ldr rx,[ry] */
10079 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10080 }
10081 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10082 {
10083 if (is_local)
10084 /* nop */
10085 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10086 else
10087 /* mov r0, rx */
10088 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10089 contents + rel->r_offset);
10090 }
10091 else
10092 {
10093 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10094 /* It's a 32 bit instruction, fetch the rest of it for
10095 error generation. */
10096 insn = (insn << 16)
10097 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10098 _bfd_error_handler
10099 /* xgettext:c-format */
10100 (_("%pB(%pA+%#" PRIx64 "): "
10101 "unexpected %s instruction '%#lx' in TLS trampoline"),
10102 input_bfd, input_sec, (uint64_t) rel->r_offset,
10103 "Thumb", insn);
10104 return bfd_reloc_notsupported;
10105 }
10106 break;
10107
10108 case R_ARM_TLS_DESCSEQ:
10109 /* arm insn. */
10110 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10111 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10112 {
10113 if (is_local)
10114 /* mov rx, ry */
10115 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10116 contents + rel->r_offset);
10117 }
10118 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10119 {
10120 if (is_local)
10121 /* nop */
10122 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10123 else
10124 /* ldr rx,[ry] */
10125 bfd_put_32 (input_bfd, insn & 0xfffff000,
10126 contents + rel->r_offset);
10127 }
10128 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10129 {
10130 if (is_local)
10131 /* nop */
10132 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10133 else
10134 /* mov r0, rx */
10135 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10136 contents + rel->r_offset);
10137 }
10138 else
10139 {
10140 _bfd_error_handler
10141 /* xgettext:c-format */
10142 (_("%pB(%pA+%#" PRIx64 "): "
10143 "unexpected %s instruction '%#lx' in TLS trampoline"),
10144 input_bfd, input_sec, (uint64_t) rel->r_offset,
10145 "ARM", insn);
10146 return bfd_reloc_notsupported;
10147 }
10148 break;
10149
10150 case R_ARM_TLS_CALL:
10151 /* GD->IE relaxation, turn the instruction into 'nop' or
10152 'ldr r0, [pc,r0]' */
10153 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10154 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10155 break;
10156
10157 case R_ARM_THM_TLS_CALL:
10158 /* GD->IE relaxation. */
10159 if (!is_local)
10160 /* add r0,pc; ldr r0, [r0] */
10161 insn = 0x44786800;
10162 else if (using_thumb2 (globals))
10163 /* nop.w */
10164 insn = 0xf3af8000;
10165 else
10166 /* nop; nop */
10167 insn = 0xbf00bf00;
10168
10169 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10170 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10171 break;
10172 }
10173 return bfd_reloc_ok;
10174 }
10175
10176 /* For a given value of n, calculate the value of G_n as required to
10177 deal with group relocations. We return it in the form of an
10178 encoded constant-and-rotation, together with the final residual. If n is
10179 specified as less than zero, then final_residual is filled with the
10180 input value and no further action is performed. */
10181
10182 static bfd_vma
10183 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10184 {
10185 int current_n;
10186 bfd_vma g_n;
10187 bfd_vma encoded_g_n = 0;
10188 bfd_vma residual = value; /* Also known as Y_n. */
10189
10190 for (current_n = 0; current_n <= n; current_n++)
10191 {
10192 int shift;
10193
10194 /* Calculate which part of the value to mask. */
10195 if (residual == 0)
10196 shift = 0;
10197 else
10198 {
10199 int msb;
10200
10201 /* Determine the most significant bit in the residual and
10202 align the resulting value to a 2-bit boundary. */
10203 for (msb = 30; msb >= 0; msb -= 2)
10204 if (residual & (3u << msb))
10205 break;
10206
10207 /* The desired shift is now (msb - 6), or zero, whichever
10208 is the greater. */
10209 shift = msb - 6;
10210 if (shift < 0)
10211 shift = 0;
10212 }
10213
10214 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10215 g_n = residual & (0xff << shift);
10216 encoded_g_n = (g_n >> shift)
10217 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10218
10219 /* Calculate the residual for the next time around. */
10220 residual &= ~g_n;
10221 }
10222
10223 *final_residual = residual;
10224
10225 return encoded_g_n;
10226 }
10227
10228 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10229 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10230
10231 static int
10232 identify_add_or_sub (bfd_vma insn)
10233 {
10234 int opcode = insn & 0x1e00000;
10235
10236 if (opcode == 1 << 23) /* ADD */
10237 return 1;
10238
10239 if (opcode == 1 << 22) /* SUB */
10240 return -1;
10241
10242 return 0;
10243 }
10244
10245 /* Perform a relocation as part of a final link. */
10246
10247 static bfd_reloc_status_type
10248 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10249 bfd * input_bfd,
10250 bfd * output_bfd,
10251 asection * input_section,
10252 bfd_byte * contents,
10253 Elf_Internal_Rela * rel,
10254 bfd_vma value,
10255 struct bfd_link_info * info,
10256 asection * sym_sec,
10257 const char * sym_name,
10258 unsigned char st_type,
10259 enum arm_st_branch_type branch_type,
10260 struct elf_link_hash_entry * h,
10261 bool * unresolved_reloc_p,
10262 char ** error_message)
10263 {
10264 unsigned long r_type = howto->type;
10265 unsigned long r_symndx;
10266 bfd_byte * hit_data = contents + rel->r_offset;
10267 bfd_vma * local_got_offsets;
10268 bfd_vma * local_tlsdesc_gotents;
10269 asection * sgot;
10270 asection * splt;
10271 asection * sreloc = NULL;
10272 asection * srelgot;
10273 bfd_vma addend;
10274 bfd_signed_vma signed_addend;
10275 unsigned char dynreloc_st_type;
10276 bfd_vma dynreloc_value;
10277 struct elf32_arm_link_hash_table * globals;
10278 struct elf32_arm_link_hash_entry *eh;
10279 union gotplt_union *root_plt;
10280 struct arm_plt_info *arm_plt;
10281 bfd_vma plt_offset;
10282 bfd_vma gotplt_offset;
10283 bool has_iplt_entry;
10284 bool resolved_to_zero;
10285
10286 globals = elf32_arm_hash_table (info);
10287 if (globals == NULL)
10288 return bfd_reloc_notsupported;
10289
10290 BFD_ASSERT (is_arm_elf (input_bfd));
10291 BFD_ASSERT (howto != NULL);
10292
10293 /* Some relocation types map to different relocations depending on the
10294 target. We pick the right one here. */
10295 r_type = arm_real_reloc_type (globals, r_type);
10296
10297 /* It is possible to have linker relaxations on some TLS access
10298 models. Update our information here. */
10299 r_type = elf32_arm_tls_transition (info, r_type, h);
10300
10301 if (r_type != howto->type)
10302 howto = elf32_arm_howto_from_type (r_type);
10303
10304 eh = (struct elf32_arm_link_hash_entry *) h;
10305 sgot = globals->root.sgot;
10306 local_got_offsets = elf_local_got_offsets (input_bfd);
10307 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10308
10309 if (globals->root.dynamic_sections_created)
10310 srelgot = globals->root.srelgot;
10311 else
10312 srelgot = NULL;
10313
10314 r_symndx = ELF32_R_SYM (rel->r_info);
10315
10316 if (globals->use_rel)
10317 {
10318 bfd_vma sign;
10319
10320 switch (howto->size)
10321 {
10322 case 0: addend = bfd_get_8 (input_bfd, hit_data); break;
10323 case 1: addend = bfd_get_16 (input_bfd, hit_data); break;
10324 case 2: addend = bfd_get_32 (input_bfd, hit_data); break;
10325 default: addend = 0; break;
10326 }
10327 /* Note: the addend and signed_addend calculated here are
10328 incorrect for any split field. */
10329 addend &= howto->src_mask;
10330 sign = howto->src_mask & ~(howto->src_mask >> 1);
10331 signed_addend = (addend ^ sign) - sign;
10332 signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10333 addend <<= howto->rightshift;
10334 }
10335 else
10336 addend = signed_addend = rel->r_addend;
10337
10338 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10339 are resolving a function call relocation. */
10340 if (using_thumb_only (globals)
10341 && (r_type == R_ARM_THM_CALL
10342 || r_type == R_ARM_THM_JUMP24)
10343 && branch_type == ST_BRANCH_TO_ARM)
10344 branch_type = ST_BRANCH_TO_THUMB;
10345
10346 /* Record the symbol information that should be used in dynamic
10347 relocations. */
10348 dynreloc_st_type = st_type;
10349 dynreloc_value = value;
10350 if (branch_type == ST_BRANCH_TO_THUMB)
10351 dynreloc_value |= 1;
10352
10353 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10354 VALUE appropriately for relocations that we resolve at link time. */
10355 has_iplt_entry = false;
10356 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10357 &arm_plt)
10358 && root_plt->offset != (bfd_vma) -1)
10359 {
10360 plt_offset = root_plt->offset;
10361 gotplt_offset = arm_plt->got_offset;
10362
10363 if (h == NULL || eh->is_iplt)
10364 {
10365 has_iplt_entry = true;
10366 splt = globals->root.iplt;
10367
10368 /* Populate .iplt entries here, because not all of them will
10369 be seen by finish_dynamic_symbol. The lower bit is set if
10370 we have already populated the entry. */
10371 if (plt_offset & 1)
10372 plt_offset--;
10373 else
10374 {
10375 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10376 -1, dynreloc_value))
10377 root_plt->offset |= 1;
10378 else
10379 return bfd_reloc_notsupported;
10380 }
10381
10382 /* Static relocations always resolve to the .iplt entry. */
10383 st_type = STT_FUNC;
10384 value = (splt->output_section->vma
10385 + splt->output_offset
10386 + plt_offset);
10387 branch_type = ST_BRANCH_TO_ARM;
10388
10389 /* If there are non-call relocations that resolve to the .iplt
10390 entry, then all dynamic ones must too. */
10391 if (arm_plt->noncall_refcount != 0)
10392 {
10393 dynreloc_st_type = st_type;
10394 dynreloc_value = value;
10395 }
10396 }
10397 else
10398 /* We populate the .plt entry in finish_dynamic_symbol. */
10399 splt = globals->root.splt;
10400 }
10401 else
10402 {
10403 splt = NULL;
10404 plt_offset = (bfd_vma) -1;
10405 gotplt_offset = (bfd_vma) -1;
10406 }
10407
10408 resolved_to_zero = (h != NULL
10409 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10410
10411 switch (r_type)
10412 {
10413 case R_ARM_NONE:
10414 /* We don't need to find a value for this symbol. It's just a
10415 marker. */
10416 *unresolved_reloc_p = false;
10417 return bfd_reloc_ok;
10418
10419 case R_ARM_ABS12:
10420 if (globals->root.target_os != is_vxworks)
10421 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10422 /* Fall through. */
10423
10424 case R_ARM_PC24:
10425 case R_ARM_ABS32:
10426 case R_ARM_ABS32_NOI:
10427 case R_ARM_REL32:
10428 case R_ARM_REL32_NOI:
10429 case R_ARM_CALL:
10430 case R_ARM_JUMP24:
10431 case R_ARM_XPC25:
10432 case R_ARM_PREL31:
10433 case R_ARM_PLT32:
10434 /* Handle relocations which should use the PLT entry. ABS32/REL32
10435 will use the symbol's value, which may point to a PLT entry, but we
10436 don't need to handle that here. If we created a PLT entry, all
10437 branches in this object should go to it, except if the PLT is too
10438 far away, in which case a long branch stub should be inserted. */
10439 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10440 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10441 && r_type != R_ARM_CALL
10442 && r_type != R_ARM_JUMP24
10443 && r_type != R_ARM_PLT32)
10444 && plt_offset != (bfd_vma) -1)
10445 {
10446 /* If we've created a .plt section, and assigned a PLT entry
10447 to this function, it must either be a STT_GNU_IFUNC reference
10448 or not be known to bind locally. In other cases, we should
10449 have cleared the PLT entry by now. */
10450 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10451
10452 value = (splt->output_section->vma
10453 + splt->output_offset
10454 + plt_offset);
10455 *unresolved_reloc_p = false;
10456 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10457 contents, rel->r_offset, value,
10458 rel->r_addend);
10459 }
10460
10461 /* When generating a shared object or relocatable executable, these
10462 relocations are copied into the output file to be resolved at
10463 run time. */
10464 if ((bfd_link_pic (info)
10465 || globals->root.is_relocatable_executable
10466 || globals->fdpic_p)
10467 && (input_section->flags & SEC_ALLOC)
10468 && !(globals->root.target_os == is_vxworks
10469 && strcmp (input_section->output_section->name,
10470 ".tls_vars") == 0)
10471 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10472 || !SYMBOL_CALLS_LOCAL (info, h))
10473 && !(input_bfd == globals->stub_bfd
10474 && strstr (input_section->name, STUB_SUFFIX))
10475 && (h == NULL
10476 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10477 && !resolved_to_zero)
10478 || h->root.type != bfd_link_hash_undefweak)
10479 && r_type != R_ARM_PC24
10480 && r_type != R_ARM_CALL
10481 && r_type != R_ARM_JUMP24
10482 && r_type != R_ARM_PREL31
10483 && r_type != R_ARM_PLT32)
10484 {
10485 Elf_Internal_Rela outrel;
10486 bool skip, relocate;
10487 int isrofixup = 0;
10488
10489 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10490 && !h->def_regular)
10491 {
10492 char *v = _("shared object");
10493
10494 if (bfd_link_executable (info))
10495 v = _("PIE executable");
10496
10497 _bfd_error_handler
10498 (_("%pB: relocation %s against external or undefined symbol `%s'"
10499 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10500 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10501 return bfd_reloc_notsupported;
10502 }
10503
10504 *unresolved_reloc_p = false;
10505
10506 if (sreloc == NULL && globals->root.dynamic_sections_created)
10507 {
10508 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10509 ! globals->use_rel);
10510
10511 if (sreloc == NULL)
10512 return bfd_reloc_notsupported;
10513 }
10514
10515 skip = false;
10516 relocate = false;
10517
10518 outrel.r_addend = addend;
10519 outrel.r_offset =
10520 _bfd_elf_section_offset (output_bfd, info, input_section,
10521 rel->r_offset);
10522 if (outrel.r_offset == (bfd_vma) -1)
10523 skip = true;
10524 else if (outrel.r_offset == (bfd_vma) -2)
10525 skip = true, relocate = true;
10526 outrel.r_offset += (input_section->output_section->vma
10527 + input_section->output_offset);
10528
10529 if (skip)
10530 memset (&outrel, 0, sizeof outrel);
10531 else if (h != NULL
10532 && h->dynindx != -1
10533 && (!bfd_link_pic (info)
10534 || !(bfd_link_pie (info)
10535 || SYMBOLIC_BIND (info, h))
10536 || !h->def_regular))
10537 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10538 else
10539 {
10540 int symbol;
10541
10542 /* This symbol is local, or marked to become local. */
10543 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10544 || (globals->fdpic_p && !bfd_link_pic(info)));
10545 /* On SVR4-ish systems, the dynamic loader cannot
10546 relocate the text and data segments independently,
10547 so the symbol does not matter. */
10548 symbol = 0;
10549 if (dynreloc_st_type == STT_GNU_IFUNC)
10550 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10551 to the .iplt entry. Instead, every non-call reference
10552 must use an R_ARM_IRELATIVE relocation to obtain the
10553 correct run-time address. */
10554 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10555 else if (globals->fdpic_p && !bfd_link_pic(info))
10556 isrofixup = 1;
10557 else
10558 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10559 if (globals->use_rel)
10560 relocate = true;
10561 else
10562 outrel.r_addend += dynreloc_value;
10563 }
10564
10565 if (isrofixup)
10566 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10567 else
10568 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10569
10570 /* If this reloc is against an external symbol, we do not want to
10571 fiddle with the addend. Otherwise, we need to include the symbol
10572 value so that it becomes an addend for the dynamic reloc. */
10573 if (! relocate)
10574 return bfd_reloc_ok;
10575
10576 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10577 contents, rel->r_offset,
10578 dynreloc_value, (bfd_vma) 0);
10579 }
10580 else switch (r_type)
10581 {
10582 case R_ARM_ABS12:
10583 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10584
10585 case R_ARM_XPC25: /* Arm BLX instruction. */
10586 case R_ARM_CALL:
10587 case R_ARM_JUMP24:
10588 case R_ARM_PC24: /* Arm B/BL instruction. */
10589 case R_ARM_PLT32:
10590 {
10591 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10592
10593 if (r_type == R_ARM_XPC25)
10594 {
10595 /* Check for Arm calling Arm function. */
10596 /* FIXME: Should we translate the instruction into a BL
10597 instruction instead ? */
10598 if (branch_type != ST_BRANCH_TO_THUMB)
10599 _bfd_error_handler
10600 (_("\%pB: warning: %s BLX instruction targets"
10601 " %s function '%s'"),
10602 input_bfd, "ARM",
10603 "ARM", h ? h->root.root.string : "(local)");
10604 }
10605 else if (r_type == R_ARM_PC24)
10606 {
10607 /* Check for Arm calling Thumb function. */
10608 if (branch_type == ST_BRANCH_TO_THUMB)
10609 {
10610 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10611 output_bfd, input_section,
10612 hit_data, sym_sec, rel->r_offset,
10613 signed_addend, value,
10614 error_message))
10615 return bfd_reloc_ok;
10616 else
10617 return bfd_reloc_dangerous;
10618 }
10619 }
10620
10621 /* Check if a stub has to be inserted because the
10622 destination is too far or we are changing mode. */
10623 if ( r_type == R_ARM_CALL
10624 || r_type == R_ARM_JUMP24
10625 || r_type == R_ARM_PLT32)
10626 {
10627 enum elf32_arm_stub_type stub_type = arm_stub_none;
10628 struct elf32_arm_link_hash_entry *hash;
10629
10630 hash = (struct elf32_arm_link_hash_entry *) h;
10631 stub_type = arm_type_of_stub (info, input_section, rel,
10632 st_type, &branch_type,
10633 hash, value, sym_sec,
10634 input_bfd, sym_name);
10635
10636 if (stub_type != arm_stub_none)
10637 {
10638 /* The target is out of reach, so redirect the
10639 branch to the local stub for this function. */
10640 stub_entry = elf32_arm_get_stub_entry (input_section,
10641 sym_sec, h,
10642 rel, globals,
10643 stub_type);
10644 {
10645 if (stub_entry != NULL)
10646 value = (stub_entry->stub_offset
10647 + stub_entry->stub_sec->output_offset
10648 + stub_entry->stub_sec->output_section->vma);
10649
10650 if (plt_offset != (bfd_vma) -1)
10651 *unresolved_reloc_p = false;
10652 }
10653 }
10654 else
10655 {
10656 /* If the call goes through a PLT entry, make sure to
10657 check distance to the right destination address. */
10658 if (plt_offset != (bfd_vma) -1)
10659 {
10660 value = (splt->output_section->vma
10661 + splt->output_offset
10662 + plt_offset);
10663 *unresolved_reloc_p = false;
10664 /* The PLT entry is in ARM mode, regardless of the
10665 target function. */
10666 branch_type = ST_BRANCH_TO_ARM;
10667 }
10668 }
10669 }
10670
10671 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10672 where:
10673 S is the address of the symbol in the relocation.
10674 P is address of the instruction being relocated.
10675 A is the addend (extracted from the instruction) in bytes.
10676
10677 S is held in 'value'.
10678 P is the base address of the section containing the
10679 instruction plus the offset of the reloc into that
10680 section, ie:
10681 (input_section->output_section->vma +
10682 input_section->output_offset +
10683 rel->r_offset).
10684 A is the addend, converted into bytes, ie:
10685 (signed_addend * 4)
10686
10687 Note: None of these operations have knowledge of the pipeline
10688 size of the processor, thus it is up to the assembler to
10689 encode this information into the addend. */
10690 value -= (input_section->output_section->vma
10691 + input_section->output_offset);
10692 value -= rel->r_offset;
10693 value += signed_addend;
10694
10695 signed_addend = value;
10696 signed_addend >>= howto->rightshift;
10697
10698 /* A branch to an undefined weak symbol is turned into a jump to
10699 the next instruction unless a PLT entry will be created.
10700 Do the same for local undefined symbols (but not for STN_UNDEF).
10701 The jump to the next instruction is optimized as a NOP depending
10702 on the architecture. */
10703 if (h ? (h->root.type == bfd_link_hash_undefweak
10704 && plt_offset == (bfd_vma) -1)
10705 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10706 {
10707 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10708
10709 if (arch_has_arm_nop (globals))
10710 value |= 0x0320f000;
10711 else
10712 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10713 }
10714 else
10715 {
10716 /* Perform a signed range check. */
10717 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10718 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10719 return bfd_reloc_overflow;
10720
10721 addend = (value & 2);
10722
10723 value = (signed_addend & howto->dst_mask)
10724 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10725
10726 if (r_type == R_ARM_CALL)
10727 {
10728 /* Set the H bit in the BLX instruction. */
10729 if (branch_type == ST_BRANCH_TO_THUMB)
10730 {
10731 if (addend)
10732 value |= (1 << 24);
10733 else
10734 value &= ~(bfd_vma)(1 << 24);
10735 }
10736
10737 /* Select the correct instruction (BL or BLX). */
10738 /* Only if we are not handling a BL to a stub. In this
10739 case, mode switching is performed by the stub. */
10740 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10741 value |= (1 << 28);
10742 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10743 {
10744 value &= ~(bfd_vma)(1 << 28);
10745 value |= (1 << 24);
10746 }
10747 }
10748 }
10749 }
10750 break;
10751
10752 case R_ARM_ABS32:
10753 value += addend;
10754 if (branch_type == ST_BRANCH_TO_THUMB)
10755 value |= 1;
10756 break;
10757
10758 case R_ARM_ABS32_NOI:
10759 value += addend;
10760 break;
10761
10762 case R_ARM_REL32:
10763 value += addend;
10764 if (branch_type == ST_BRANCH_TO_THUMB)
10765 value |= 1;
10766 value -= (input_section->output_section->vma
10767 + input_section->output_offset + rel->r_offset);
10768 break;
10769
10770 case R_ARM_REL32_NOI:
10771 value += addend;
10772 value -= (input_section->output_section->vma
10773 + input_section->output_offset + rel->r_offset);
10774 break;
10775
10776 case R_ARM_PREL31:
10777 value -= (input_section->output_section->vma
10778 + input_section->output_offset + rel->r_offset);
10779 value += signed_addend;
10780 if (! h || h->root.type != bfd_link_hash_undefweak)
10781 {
10782 /* Check for overflow. */
10783 if ((value ^ (value >> 1)) & (1 << 30))
10784 return bfd_reloc_overflow;
10785 }
10786 value &= 0x7fffffff;
10787 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10788 if (branch_type == ST_BRANCH_TO_THUMB)
10789 value |= 1;
10790 break;
10791 }
10792
10793 bfd_put_32 (input_bfd, value, hit_data);
10794 return bfd_reloc_ok;
10795
10796 case R_ARM_ABS8:
10797 value += addend;
10798
10799 /* There is no way to tell whether the user intended to use a signed or
10800 unsigned addend. When checking for overflow we accept either,
10801 as specified by the AAELF. */
10802 if ((long) value > 0xff || (long) value < -0x80)
10803 return bfd_reloc_overflow;
10804
10805 bfd_put_8 (input_bfd, value, hit_data);
10806 return bfd_reloc_ok;
10807
10808 case R_ARM_ABS16:
10809 value += addend;
10810
10811 /* See comment for R_ARM_ABS8. */
10812 if ((long) value > 0xffff || (long) value < -0x8000)
10813 return bfd_reloc_overflow;
10814
10815 bfd_put_16 (input_bfd, value, hit_data);
10816 return bfd_reloc_ok;
10817
10818 case R_ARM_THM_ABS5:
10819 /* Support ldr and str instructions for the thumb. */
10820 if (globals->use_rel)
10821 {
10822 /* Need to refetch addend. */
10823 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10824 /* ??? Need to determine shift amount from operand size. */
10825 addend >>= howto->rightshift;
10826 }
10827 value += addend;
10828
10829 /* ??? Isn't value unsigned? */
10830 if ((long) value > 0x1f || (long) value < -0x10)
10831 return bfd_reloc_overflow;
10832
10833 /* ??? Value needs to be properly shifted into place first. */
10834 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10835 bfd_put_16 (input_bfd, value, hit_data);
10836 return bfd_reloc_ok;
10837
10838 case R_ARM_THM_ALU_PREL_11_0:
10839 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10840 {
10841 bfd_vma insn;
10842 bfd_signed_vma relocation;
10843
10844 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10845 | bfd_get_16 (input_bfd, hit_data + 2);
10846
10847 if (globals->use_rel)
10848 {
10849 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10850 | ((insn & (1 << 26)) >> 15);
10851 if (insn & 0xf00000)
10852 signed_addend = -signed_addend;
10853 }
10854
10855 relocation = value + signed_addend;
10856 relocation -= Pa (input_section->output_section->vma
10857 + input_section->output_offset
10858 + rel->r_offset);
10859
10860 /* PR 21523: Use an absolute value. The user of this reloc will
10861 have already selected an ADD or SUB insn appropriately. */
10862 value = llabs (relocation);
10863
10864 if (value >= 0x1000)
10865 return bfd_reloc_overflow;
10866
10867 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10868 if (branch_type == ST_BRANCH_TO_THUMB)
10869 value |= 1;
10870
10871 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10872 | ((value & 0x700) << 4)
10873 | ((value & 0x800) << 15);
10874 if (relocation < 0)
10875 insn |= 0xa00000;
10876
10877 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10878 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10879
10880 return bfd_reloc_ok;
10881 }
10882
10883 case R_ARM_THM_PC8:
10884 /* PR 10073: This reloc is not generated by the GNU toolchain,
10885 but it is supported for compatibility with third party libraries
10886 generated by other compilers, specifically the ARM/IAR. */
10887 {
10888 bfd_vma insn;
10889 bfd_signed_vma relocation;
10890
10891 insn = bfd_get_16 (input_bfd, hit_data);
10892
10893 if (globals->use_rel)
10894 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10895
10896 relocation = value + addend;
10897 relocation -= Pa (input_section->output_section->vma
10898 + input_section->output_offset
10899 + rel->r_offset);
10900
10901 value = relocation;
10902
10903 /* We do not check for overflow of this reloc. Although strictly
10904 speaking this is incorrect, it appears to be necessary in order
10905 to work with IAR generated relocs. Since GCC and GAS do not
10906 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10907 a problem for them. */
10908 value &= 0x3fc;
10909
10910 insn = (insn & 0xff00) | (value >> 2);
10911
10912 bfd_put_16 (input_bfd, insn, hit_data);
10913
10914 return bfd_reloc_ok;
10915 }
10916
10917 case R_ARM_THM_PC12:
10918 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10919 {
10920 bfd_vma insn;
10921 bfd_signed_vma relocation;
10922
10923 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10924 | bfd_get_16 (input_bfd, hit_data + 2);
10925
10926 if (globals->use_rel)
10927 {
10928 signed_addend = insn & 0xfff;
10929 if (!(insn & (1 << 23)))
10930 signed_addend = -signed_addend;
10931 }
10932
10933 relocation = value + signed_addend;
10934 relocation -= Pa (input_section->output_section->vma
10935 + input_section->output_offset
10936 + rel->r_offset);
10937
10938 value = relocation;
10939
10940 if (value >= 0x1000)
10941 return bfd_reloc_overflow;
10942
10943 insn = (insn & 0xff7ff000) | value;
10944 if (relocation >= 0)
10945 insn |= (1 << 23);
10946
10947 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10948 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10949
10950 return bfd_reloc_ok;
10951 }
10952
10953 case R_ARM_THM_XPC22:
10954 case R_ARM_THM_CALL:
10955 case R_ARM_THM_JUMP24:
10956 /* Thumb BL (branch long instruction). */
10957 {
10958 bfd_vma relocation;
10959 bfd_vma reloc_sign;
10960 bool overflow = false;
10961 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10962 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10963 bfd_signed_vma reloc_signed_max;
10964 bfd_signed_vma reloc_signed_min;
10965 bfd_vma check;
10966 bfd_signed_vma signed_check;
10967 int bitsize;
10968 const int thumb2 = using_thumb2 (globals);
10969 const int thumb2_bl = using_thumb2_bl (globals);
10970
10971 /* A branch to an undefined weak symbol is turned into a jump to
10972 the next instruction unless a PLT entry will be created.
10973 The jump to the next instruction is optimized as a NOP.W for
10974 Thumb-2 enabled architectures. */
10975 if (h && h->root.type == bfd_link_hash_undefweak
10976 && plt_offset == (bfd_vma) -1)
10977 {
10978 if (thumb2)
10979 {
10980 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10981 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10982 }
10983 else
10984 {
10985 bfd_put_16 (input_bfd, 0xe000, hit_data);
10986 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10987 }
10988 return bfd_reloc_ok;
10989 }
10990
10991 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10992 with Thumb-1) involving the J1 and J2 bits. */
10993 if (globals->use_rel)
10994 {
10995 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10996 bfd_vma upper = upper_insn & 0x3ff;
10997 bfd_vma lower = lower_insn & 0x7ff;
10998 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10999 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11000 bfd_vma i1 = j1 ^ s ? 0 : 1;
11001 bfd_vma i2 = j2 ^ s ? 0 : 1;
11002
11003 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11004 /* Sign extend. */
11005 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11006
11007 signed_addend = addend;
11008 }
11009
11010 if (r_type == R_ARM_THM_XPC22)
11011 {
11012 /* Check for Thumb to Thumb call. */
11013 /* FIXME: Should we translate the instruction into a BL
11014 instruction instead ? */
11015 if (branch_type == ST_BRANCH_TO_THUMB)
11016 _bfd_error_handler
11017 (_("%pB: warning: %s BLX instruction targets"
11018 " %s function '%s'"),
11019 input_bfd, "Thumb",
11020 "Thumb", h ? h->root.root.string : "(local)");
11021 }
11022 else
11023 {
11024 /* If it is not a call to Thumb, assume call to Arm.
11025 If it is a call relative to a section name, then it is not a
11026 function call at all, but rather a long jump. Calls through
11027 the PLT do not require stubs. */
11028 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11029 {
11030 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11031 {
11032 /* Convert BL to BLX. */
11033 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11034 }
11035 else if (( r_type != R_ARM_THM_CALL)
11036 && (r_type != R_ARM_THM_JUMP24))
11037 {
11038 if (elf32_thumb_to_arm_stub
11039 (info, sym_name, input_bfd, output_bfd, input_section,
11040 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11041 error_message))
11042 return bfd_reloc_ok;
11043 else
11044 return bfd_reloc_dangerous;
11045 }
11046 }
11047 else if (branch_type == ST_BRANCH_TO_THUMB
11048 && globals->use_blx
11049 && r_type == R_ARM_THM_CALL)
11050 {
11051 /* Make sure this is a BL. */
11052 lower_insn |= 0x1800;
11053 }
11054 }
11055
11056 enum elf32_arm_stub_type stub_type = arm_stub_none;
11057 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11058 {
11059 /* Check if a stub has to be inserted because the destination
11060 is too far. */
11061 struct elf32_arm_stub_hash_entry *stub_entry;
11062 struct elf32_arm_link_hash_entry *hash;
11063
11064 hash = (struct elf32_arm_link_hash_entry *) h;
11065
11066 stub_type = arm_type_of_stub (info, input_section, rel,
11067 st_type, &branch_type,
11068 hash, value, sym_sec,
11069 input_bfd, sym_name);
11070
11071 if (stub_type != arm_stub_none)
11072 {
11073 /* The target is out of reach or we are changing modes, so
11074 redirect the branch to the local stub for this
11075 function. */
11076 stub_entry = elf32_arm_get_stub_entry (input_section,
11077 sym_sec, h,
11078 rel, globals,
11079 stub_type);
11080 if (stub_entry != NULL)
11081 {
11082 value = (stub_entry->stub_offset
11083 + stub_entry->stub_sec->output_offset
11084 + stub_entry->stub_sec->output_section->vma);
11085
11086 if (plt_offset != (bfd_vma) -1)
11087 *unresolved_reloc_p = false;
11088 }
11089
11090 /* If this call becomes a call to Arm, force BLX. */
11091 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11092 {
11093 if ((stub_entry
11094 && !arm_stub_is_thumb (stub_entry->stub_type))
11095 || branch_type != ST_BRANCH_TO_THUMB)
11096 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11097 }
11098 }
11099 }
11100
11101 /* Handle calls via the PLT. */
11102 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11103 {
11104 value = (splt->output_section->vma
11105 + splt->output_offset
11106 + plt_offset);
11107
11108 if (globals->use_blx
11109 && r_type == R_ARM_THM_CALL
11110 && ! using_thumb_only (globals))
11111 {
11112 /* If the Thumb BLX instruction is available, convert
11113 the BL to a BLX instruction to call the ARM-mode
11114 PLT entry. */
11115 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11116 branch_type = ST_BRANCH_TO_ARM;
11117 }
11118 else
11119 {
11120 if (! using_thumb_only (globals))
11121 /* Target the Thumb stub before the ARM PLT entry. */
11122 value -= PLT_THUMB_STUB_SIZE;
11123 branch_type = ST_BRANCH_TO_THUMB;
11124 }
11125 *unresolved_reloc_p = false;
11126 }
11127
11128 relocation = value + signed_addend;
11129
11130 relocation -= (input_section->output_section->vma
11131 + input_section->output_offset
11132 + rel->r_offset);
11133
11134 check = relocation >> howto->rightshift;
11135
11136 /* If this is a signed value, the rightshift just dropped
11137 leading 1 bits (assuming twos complement). */
11138 if ((bfd_signed_vma) relocation >= 0)
11139 signed_check = check;
11140 else
11141 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11142
11143 /* Calculate the permissable maximum and minimum values for
11144 this relocation according to whether we're relocating for
11145 Thumb-2 or not. */
11146 bitsize = howto->bitsize;
11147 if (!thumb2_bl)
11148 bitsize -= 2;
11149 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11150 reloc_signed_min = ~reloc_signed_max;
11151
11152 /* Assumes two's complement. */
11153 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11154 overflow = true;
11155
11156 if ((lower_insn & 0x5000) == 0x4000)
11157 /* For a BLX instruction, make sure that the relocation is rounded up
11158 to a word boundary. This follows the semantics of the instruction
11159 which specifies that bit 1 of the target address will come from bit
11160 1 of the base address. */
11161 relocation = (relocation + 2) & ~ 3;
11162
11163 /* Put RELOCATION back into the insn. Assumes two's complement.
11164 We use the Thumb-2 encoding, which is safe even if dealing with
11165 a Thumb-1 instruction by virtue of our overflow check above. */
11166 reloc_sign = (signed_check < 0) ? 1 : 0;
11167 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11168 | ((relocation >> 12) & 0x3ff)
11169 | (reloc_sign << 10);
11170 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11171 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11172 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11173 | ((relocation >> 1) & 0x7ff);
11174
11175 /* Put the relocated value back in the object file: */
11176 bfd_put_16 (input_bfd, upper_insn, hit_data);
11177 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11178
11179 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11180 }
11181 break;
11182
11183 case R_ARM_THM_JUMP19:
11184 /* Thumb32 conditional branch instruction. */
11185 {
11186 bfd_vma relocation;
11187 bool overflow = false;
11188 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11189 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11190 bfd_signed_vma reloc_signed_max = 0xffffe;
11191 bfd_signed_vma reloc_signed_min = -0x100000;
11192 bfd_signed_vma signed_check;
11193 enum elf32_arm_stub_type stub_type = arm_stub_none;
11194 struct elf32_arm_stub_hash_entry *stub_entry;
11195 struct elf32_arm_link_hash_entry *hash;
11196
11197 /* Need to refetch the addend, reconstruct the top three bits,
11198 and squish the two 11 bit pieces together. */
11199 if (globals->use_rel)
11200 {
11201 bfd_vma S = (upper_insn & 0x0400) >> 10;
11202 bfd_vma upper = (upper_insn & 0x003f);
11203 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11204 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11205 bfd_vma lower = (lower_insn & 0x07ff);
11206
11207 upper |= J1 << 6;
11208 upper |= J2 << 7;
11209 upper |= (!S) << 8;
11210 upper -= 0x0100; /* Sign extend. */
11211
11212 addend = (upper << 12) | (lower << 1);
11213 signed_addend = addend;
11214 }
11215
11216 /* Handle calls via the PLT. */
11217 if (plt_offset != (bfd_vma) -1)
11218 {
11219 value = (splt->output_section->vma
11220 + splt->output_offset
11221 + plt_offset);
11222 /* Target the Thumb stub before the ARM PLT entry. */
11223 value -= PLT_THUMB_STUB_SIZE;
11224 *unresolved_reloc_p = false;
11225 }
11226
11227 hash = (struct elf32_arm_link_hash_entry *)h;
11228
11229 stub_type = arm_type_of_stub (info, input_section, rel,
11230 st_type, &branch_type,
11231 hash, value, sym_sec,
11232 input_bfd, sym_name);
11233 if (stub_type != arm_stub_none)
11234 {
11235 stub_entry = elf32_arm_get_stub_entry (input_section,
11236 sym_sec, h,
11237 rel, globals,
11238 stub_type);
11239 if (stub_entry != NULL)
11240 {
11241 value = (stub_entry->stub_offset
11242 + stub_entry->stub_sec->output_offset
11243 + stub_entry->stub_sec->output_section->vma);
11244 }
11245 }
11246
11247 relocation = value + signed_addend;
11248 relocation -= (input_section->output_section->vma
11249 + input_section->output_offset
11250 + rel->r_offset);
11251 signed_check = (bfd_signed_vma) relocation;
11252
11253 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11254 overflow = true;
11255
11256 /* Put RELOCATION back into the insn. */
11257 {
11258 bfd_vma S = (relocation & 0x00100000) >> 20;
11259 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11260 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11261 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11262 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11263
11264 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11265 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11266 }
11267
11268 /* Put the relocated value back in the object file: */
11269 bfd_put_16 (input_bfd, upper_insn, hit_data);
11270 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11271
11272 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11273 }
11274
11275 case R_ARM_THM_JUMP11:
11276 case R_ARM_THM_JUMP8:
11277 case R_ARM_THM_JUMP6:
11278 /* Thumb B (branch) instruction). */
11279 {
11280 bfd_signed_vma relocation;
11281 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11282 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11283 bfd_signed_vma signed_check;
11284
11285 /* CZB cannot jump backward. */
11286 if (r_type == R_ARM_THM_JUMP6)
11287 {
11288 reloc_signed_min = 0;
11289 if (globals->use_rel)
11290 signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11291 }
11292
11293 relocation = value + signed_addend;
11294
11295 relocation -= (input_section->output_section->vma
11296 + input_section->output_offset
11297 + rel->r_offset);
11298
11299 relocation >>= howto->rightshift;
11300 signed_check = relocation;
11301
11302 if (r_type == R_ARM_THM_JUMP6)
11303 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11304 else
11305 relocation &= howto->dst_mask;
11306 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11307
11308 bfd_put_16 (input_bfd, relocation, hit_data);
11309
11310 /* Assumes two's complement. */
11311 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11312 return bfd_reloc_overflow;
11313
11314 return bfd_reloc_ok;
11315 }
11316
11317 case R_ARM_ALU_PCREL7_0:
11318 case R_ARM_ALU_PCREL15_8:
11319 case R_ARM_ALU_PCREL23_15:
11320 {
11321 bfd_vma insn;
11322 bfd_vma relocation;
11323
11324 insn = bfd_get_32 (input_bfd, hit_data);
11325 if (globals->use_rel)
11326 {
11327 /* Extract the addend. */
11328 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11329 signed_addend = addend;
11330 }
11331 relocation = value + signed_addend;
11332
11333 relocation -= (input_section->output_section->vma
11334 + input_section->output_offset
11335 + rel->r_offset);
11336 insn = (insn & ~0xfff)
11337 | ((howto->bitpos << 7) & 0xf00)
11338 | ((relocation >> howto->bitpos) & 0xff);
11339 bfd_put_32 (input_bfd, value, hit_data);
11340 }
11341 return bfd_reloc_ok;
11342
11343 case R_ARM_GNU_VTINHERIT:
11344 case R_ARM_GNU_VTENTRY:
11345 return bfd_reloc_ok;
11346
11347 case R_ARM_GOTOFF32:
11348 /* Relocation is relative to the start of the
11349 global offset table. */
11350
11351 BFD_ASSERT (sgot != NULL);
11352 if (sgot == NULL)
11353 return bfd_reloc_notsupported;
11354
11355 /* If we are addressing a Thumb function, we need to adjust the
11356 address by one, so that attempts to call the function pointer will
11357 correctly interpret it as Thumb code. */
11358 if (branch_type == ST_BRANCH_TO_THUMB)
11359 value += 1;
11360
11361 /* Note that sgot->output_offset is not involved in this
11362 calculation. We always want the start of .got. If we
11363 define _GLOBAL_OFFSET_TABLE in a different way, as is
11364 permitted by the ABI, we might have to change this
11365 calculation. */
11366 value -= sgot->output_section->vma;
11367 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11368 contents, rel->r_offset, value,
11369 rel->r_addend);
11370
11371 case R_ARM_GOTPC:
11372 /* Use global offset table as symbol value. */
11373 BFD_ASSERT (sgot != NULL);
11374
11375 if (sgot == NULL)
11376 return bfd_reloc_notsupported;
11377
11378 *unresolved_reloc_p = false;
11379 value = sgot->output_section->vma;
11380 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11381 contents, rel->r_offset, value,
11382 rel->r_addend);
11383
11384 case R_ARM_GOT32:
11385 case R_ARM_GOT_PREL:
11386 /* Relocation is to the entry for this symbol in the
11387 global offset table. */
11388 if (sgot == NULL)
11389 return bfd_reloc_notsupported;
11390
11391 if (dynreloc_st_type == STT_GNU_IFUNC
11392 && plt_offset != (bfd_vma) -1
11393 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11394 {
11395 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11396 symbol, and the relocation resolves directly to the runtime
11397 target rather than to the .iplt entry. This means that any
11398 .got entry would be the same value as the .igot.plt entry,
11399 so there's no point creating both. */
11400 sgot = globals->root.igotplt;
11401 value = sgot->output_offset + gotplt_offset;
11402 }
11403 else if (h != NULL)
11404 {
11405 bfd_vma off;
11406
11407 off = h->got.offset;
11408 BFD_ASSERT (off != (bfd_vma) -1);
11409 if ((off & 1) != 0)
11410 {
11411 /* We have already processsed one GOT relocation against
11412 this symbol. */
11413 off &= ~1;
11414 if (globals->root.dynamic_sections_created
11415 && !SYMBOL_REFERENCES_LOCAL (info, h))
11416 *unresolved_reloc_p = false;
11417 }
11418 else
11419 {
11420 Elf_Internal_Rela outrel;
11421 int isrofixup = 0;
11422
11423 if (((h->dynindx != -1) || globals->fdpic_p)
11424 && !SYMBOL_REFERENCES_LOCAL (info, h))
11425 {
11426 /* If the symbol doesn't resolve locally in a static
11427 object, we have an undefined reference. If the
11428 symbol doesn't resolve locally in a dynamic object,
11429 it should be resolved by the dynamic linker. */
11430 if (globals->root.dynamic_sections_created)
11431 {
11432 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11433 *unresolved_reloc_p = false;
11434 }
11435 else
11436 outrel.r_info = 0;
11437 outrel.r_addend = 0;
11438 }
11439 else
11440 {
11441 if (dynreloc_st_type == STT_GNU_IFUNC)
11442 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11443 else if (bfd_link_pic (info)
11444 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11445 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11446 else
11447 {
11448 outrel.r_info = 0;
11449 if (globals->fdpic_p)
11450 isrofixup = 1;
11451 }
11452 outrel.r_addend = dynreloc_value;
11453 }
11454
11455 /* The GOT entry is initialized to zero by default.
11456 See if we should install a different value. */
11457 if (outrel.r_addend != 0
11458 && (globals->use_rel || outrel.r_info == 0))
11459 {
11460 bfd_put_32 (output_bfd, outrel.r_addend,
11461 sgot->contents + off);
11462 outrel.r_addend = 0;
11463 }
11464
11465 if (isrofixup)
11466 arm_elf_add_rofixup (output_bfd,
11467 elf32_arm_hash_table(info)->srofixup,
11468 sgot->output_section->vma
11469 + sgot->output_offset + off);
11470
11471 else if (outrel.r_info != 0)
11472 {
11473 outrel.r_offset = (sgot->output_section->vma
11474 + sgot->output_offset
11475 + off);
11476 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11477 }
11478
11479 h->got.offset |= 1;
11480 }
11481 value = sgot->output_offset + off;
11482 }
11483 else
11484 {
11485 bfd_vma off;
11486
11487 BFD_ASSERT (local_got_offsets != NULL
11488 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11489
11490 off = local_got_offsets[r_symndx];
11491
11492 /* The offset must always be a multiple of 4. We use the
11493 least significant bit to record whether we have already
11494 generated the necessary reloc. */
11495 if ((off & 1) != 0)
11496 off &= ~1;
11497 else
11498 {
11499 Elf_Internal_Rela outrel;
11500 int isrofixup = 0;
11501
11502 if (dynreloc_st_type == STT_GNU_IFUNC)
11503 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11504 else if (bfd_link_pic (info))
11505 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11506 else
11507 {
11508 outrel.r_info = 0;
11509 if (globals->fdpic_p)
11510 isrofixup = 1;
11511 }
11512
11513 /* The GOT entry is initialized to zero by default.
11514 See if we should install a different value. */
11515 if (globals->use_rel || outrel.r_info == 0)
11516 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11517
11518 if (isrofixup)
11519 arm_elf_add_rofixup (output_bfd,
11520 globals->srofixup,
11521 sgot->output_section->vma
11522 + sgot->output_offset + off);
11523
11524 else if (outrel.r_info != 0)
11525 {
11526 outrel.r_addend = addend + dynreloc_value;
11527 outrel.r_offset = (sgot->output_section->vma
11528 + sgot->output_offset
11529 + off);
11530 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11531 }
11532
11533 local_got_offsets[r_symndx] |= 1;
11534 }
11535
11536 value = sgot->output_offset + off;
11537 }
11538 if (r_type != R_ARM_GOT32)
11539 value += sgot->output_section->vma;
11540
11541 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11542 contents, rel->r_offset, value,
11543 rel->r_addend);
11544
11545 case R_ARM_TLS_LDO32:
11546 value = value - dtpoff_base (info);
11547
11548 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11549 contents, rel->r_offset, value,
11550 rel->r_addend);
11551
11552 case R_ARM_TLS_LDM32:
11553 case R_ARM_TLS_LDM32_FDPIC:
11554 {
11555 bfd_vma off;
11556
11557 if (sgot == NULL)
11558 abort ();
11559
11560 off = globals->tls_ldm_got.offset;
11561
11562 if ((off & 1) != 0)
11563 off &= ~1;
11564 else
11565 {
11566 /* If we don't know the module number, create a relocation
11567 for it. */
11568 if (bfd_link_dll (info))
11569 {
11570 Elf_Internal_Rela outrel;
11571
11572 if (srelgot == NULL)
11573 abort ();
11574
11575 outrel.r_addend = 0;
11576 outrel.r_offset = (sgot->output_section->vma
11577 + sgot->output_offset + off);
11578 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11579
11580 if (globals->use_rel)
11581 bfd_put_32 (output_bfd, outrel.r_addend,
11582 sgot->contents + off);
11583
11584 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11585 }
11586 else
11587 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11588
11589 globals->tls_ldm_got.offset |= 1;
11590 }
11591
11592 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11593 {
11594 bfd_put_32(output_bfd,
11595 globals->root.sgot->output_offset + off,
11596 contents + rel->r_offset);
11597
11598 return bfd_reloc_ok;
11599 }
11600 else
11601 {
11602 value = sgot->output_section->vma + sgot->output_offset + off
11603 - (input_section->output_section->vma
11604 + input_section->output_offset + rel->r_offset);
11605
11606 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11607 contents, rel->r_offset, value,
11608 rel->r_addend);
11609 }
11610 }
11611
11612 case R_ARM_TLS_CALL:
11613 case R_ARM_THM_TLS_CALL:
11614 case R_ARM_TLS_GD32:
11615 case R_ARM_TLS_GD32_FDPIC:
11616 case R_ARM_TLS_IE32:
11617 case R_ARM_TLS_IE32_FDPIC:
11618 case R_ARM_TLS_GOTDESC:
11619 case R_ARM_TLS_DESCSEQ:
11620 case R_ARM_THM_TLS_DESCSEQ:
11621 {
11622 bfd_vma off, offplt;
11623 int indx = 0;
11624 char tls_type;
11625
11626 BFD_ASSERT (sgot != NULL);
11627
11628 if (h != NULL)
11629 {
11630 bool dyn;
11631 dyn = globals->root.dynamic_sections_created;
11632 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11633 bfd_link_pic (info),
11634 h)
11635 && (!bfd_link_pic (info)
11636 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11637 {
11638 *unresolved_reloc_p = false;
11639 indx = h->dynindx;
11640 }
11641 off = h->got.offset;
11642 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11643 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11644 }
11645 else
11646 {
11647 BFD_ASSERT (local_got_offsets != NULL);
11648 off = local_got_offsets[r_symndx];
11649 offplt = local_tlsdesc_gotents[r_symndx];
11650 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11651 }
11652
11653 /* Linker relaxations happens from one of the
11654 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11655 if (ELF32_R_TYPE(rel->r_info) != r_type)
11656 tls_type = GOT_TLS_IE;
11657
11658 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11659
11660 if ((off & 1) != 0)
11661 off &= ~1;
11662 else
11663 {
11664 bool need_relocs = false;
11665 Elf_Internal_Rela outrel;
11666 int cur_off = off;
11667
11668 /* The GOT entries have not been initialized yet. Do it
11669 now, and emit any relocations. If both an IE GOT and a
11670 GD GOT are necessary, we emit the GD first. */
11671
11672 if ((bfd_link_dll (info) || indx != 0)
11673 && (h == NULL
11674 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11675 && !resolved_to_zero)
11676 || h->root.type != bfd_link_hash_undefweak))
11677 {
11678 need_relocs = true;
11679 BFD_ASSERT (srelgot != NULL);
11680 }
11681
11682 if (tls_type & GOT_TLS_GDESC)
11683 {
11684 bfd_byte *loc;
11685
11686 /* We should have relaxed, unless this is an undefined
11687 weak symbol. */
11688 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11689 || bfd_link_dll (info));
11690 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11691 <= globals->root.sgotplt->size);
11692
11693 outrel.r_addend = 0;
11694 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11695 + globals->root.sgotplt->output_offset
11696 + offplt
11697 + globals->sgotplt_jump_table_size);
11698
11699 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11700 sreloc = globals->root.srelplt;
11701 loc = sreloc->contents;
11702 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11703 BFD_ASSERT (loc + RELOC_SIZE (globals)
11704 <= sreloc->contents + sreloc->size);
11705
11706 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11707
11708 /* For globals, the first word in the relocation gets
11709 the relocation index and the top bit set, or zero,
11710 if we're binding now. For locals, it gets the
11711 symbol's offset in the tls section. */
11712 bfd_put_32 (output_bfd,
11713 !h ? value - elf_hash_table (info)->tls_sec->vma
11714 : info->flags & DF_BIND_NOW ? 0
11715 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11716 globals->root.sgotplt->contents + offplt
11717 + globals->sgotplt_jump_table_size);
11718
11719 /* Second word in the relocation is always zero. */
11720 bfd_put_32 (output_bfd, 0,
11721 globals->root.sgotplt->contents + offplt
11722 + globals->sgotplt_jump_table_size + 4);
11723 }
11724 if (tls_type & GOT_TLS_GD)
11725 {
11726 if (need_relocs)
11727 {
11728 outrel.r_addend = 0;
11729 outrel.r_offset = (sgot->output_section->vma
11730 + sgot->output_offset
11731 + cur_off);
11732 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11733
11734 if (globals->use_rel)
11735 bfd_put_32 (output_bfd, outrel.r_addend,
11736 sgot->contents + cur_off);
11737
11738 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11739
11740 if (indx == 0)
11741 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11742 sgot->contents + cur_off + 4);
11743 else
11744 {
11745 outrel.r_addend = 0;
11746 outrel.r_info = ELF32_R_INFO (indx,
11747 R_ARM_TLS_DTPOFF32);
11748 outrel.r_offset += 4;
11749
11750 if (globals->use_rel)
11751 bfd_put_32 (output_bfd, outrel.r_addend,
11752 sgot->contents + cur_off + 4);
11753
11754 elf32_arm_add_dynreloc (output_bfd, info,
11755 srelgot, &outrel);
11756 }
11757 }
11758 else
11759 {
11760 /* If we are not emitting relocations for a
11761 general dynamic reference, then we must be in a
11762 static link or an executable link with the
11763 symbol binding locally. Mark it as belonging
11764 to module 1, the executable. */
11765 bfd_put_32 (output_bfd, 1,
11766 sgot->contents + cur_off);
11767 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11768 sgot->contents + cur_off + 4);
11769 }
11770
11771 cur_off += 8;
11772 }
11773
11774 if (tls_type & GOT_TLS_IE)
11775 {
11776 if (need_relocs)
11777 {
11778 if (indx == 0)
11779 outrel.r_addend = value - dtpoff_base (info);
11780 else
11781 outrel.r_addend = 0;
11782 outrel.r_offset = (sgot->output_section->vma
11783 + sgot->output_offset
11784 + cur_off);
11785 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11786
11787 if (globals->use_rel)
11788 bfd_put_32 (output_bfd, outrel.r_addend,
11789 sgot->contents + cur_off);
11790
11791 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11792 }
11793 else
11794 bfd_put_32 (output_bfd, tpoff (info, value),
11795 sgot->contents + cur_off);
11796 cur_off += 4;
11797 }
11798
11799 if (h != NULL)
11800 h->got.offset |= 1;
11801 else
11802 local_got_offsets[r_symndx] |= 1;
11803 }
11804
11805 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11806 off += 8;
11807 else if (tls_type & GOT_TLS_GDESC)
11808 off = offplt;
11809
11810 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11811 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11812 {
11813 bfd_signed_vma offset;
11814 /* TLS stubs are arm mode. The original symbol is a
11815 data object, so branch_type is bogus. */
11816 branch_type = ST_BRANCH_TO_ARM;
11817 enum elf32_arm_stub_type stub_type
11818 = arm_type_of_stub (info, input_section, rel,
11819 st_type, &branch_type,
11820 (struct elf32_arm_link_hash_entry *)h,
11821 globals->tls_trampoline, globals->root.splt,
11822 input_bfd, sym_name);
11823
11824 if (stub_type != arm_stub_none)
11825 {
11826 struct elf32_arm_stub_hash_entry *stub_entry
11827 = elf32_arm_get_stub_entry
11828 (input_section, globals->root.splt, 0, rel,
11829 globals, stub_type);
11830 offset = (stub_entry->stub_offset
11831 + stub_entry->stub_sec->output_offset
11832 + stub_entry->stub_sec->output_section->vma);
11833 }
11834 else
11835 offset = (globals->root.splt->output_section->vma
11836 + globals->root.splt->output_offset
11837 + globals->tls_trampoline);
11838
11839 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11840 {
11841 unsigned long inst;
11842
11843 offset -= (input_section->output_section->vma
11844 + input_section->output_offset
11845 + rel->r_offset + 8);
11846
11847 inst = offset >> 2;
11848 inst &= 0x00ffffff;
11849 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11850 }
11851 else
11852 {
11853 /* Thumb blx encodes the offset in a complicated
11854 fashion. */
11855 unsigned upper_insn, lower_insn;
11856 unsigned neg;
11857
11858 offset -= (input_section->output_section->vma
11859 + input_section->output_offset
11860 + rel->r_offset + 4);
11861
11862 if (stub_type != arm_stub_none
11863 && arm_stub_is_thumb (stub_type))
11864 {
11865 lower_insn = 0xd000;
11866 }
11867 else
11868 {
11869 lower_insn = 0xc000;
11870 /* Round up the offset to a word boundary. */
11871 offset = (offset + 2) & ~2;
11872 }
11873
11874 neg = offset < 0;
11875 upper_insn = (0xf000
11876 | ((offset >> 12) & 0x3ff)
11877 | (neg << 10));
11878 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11879 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11880 | ((offset >> 1) & 0x7ff);
11881 bfd_put_16 (input_bfd, upper_insn, hit_data);
11882 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11883 return bfd_reloc_ok;
11884 }
11885 }
11886 /* These relocations needs special care, as besides the fact
11887 they point somewhere in .gotplt, the addend must be
11888 adjusted accordingly depending on the type of instruction
11889 we refer to. */
11890 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11891 {
11892 unsigned long data, insn;
11893 unsigned thumb;
11894
11895 data = bfd_get_signed_32 (input_bfd, hit_data);
11896 thumb = data & 1;
11897 data &= ~1ul;
11898
11899 if (thumb)
11900 {
11901 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11902 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11903 insn = (insn << 16)
11904 | bfd_get_16 (input_bfd,
11905 contents + rel->r_offset - data + 2);
11906 if ((insn & 0xf800c000) == 0xf000c000)
11907 /* bl/blx */
11908 value = -6;
11909 else if ((insn & 0xffffff00) == 0x4400)
11910 /* add */
11911 value = -5;
11912 else
11913 {
11914 _bfd_error_handler
11915 /* xgettext:c-format */
11916 (_("%pB(%pA+%#" PRIx64 "): "
11917 "unexpected %s instruction '%#lx' "
11918 "referenced by TLS_GOTDESC"),
11919 input_bfd, input_section, (uint64_t) rel->r_offset,
11920 "Thumb", insn);
11921 return bfd_reloc_notsupported;
11922 }
11923 }
11924 else
11925 {
11926 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11927
11928 switch (insn >> 24)
11929 {
11930 case 0xeb: /* bl */
11931 case 0xfa: /* blx */
11932 value = -4;
11933 break;
11934
11935 case 0xe0: /* add */
11936 value = -8;
11937 break;
11938
11939 default:
11940 _bfd_error_handler
11941 /* xgettext:c-format */
11942 (_("%pB(%pA+%#" PRIx64 "): "
11943 "unexpected %s instruction '%#lx' "
11944 "referenced by TLS_GOTDESC"),
11945 input_bfd, input_section, (uint64_t) rel->r_offset,
11946 "ARM", insn);
11947 return bfd_reloc_notsupported;
11948 }
11949 }
11950
11951 value += ((globals->root.sgotplt->output_section->vma
11952 + globals->root.sgotplt->output_offset + off)
11953 - (input_section->output_section->vma
11954 + input_section->output_offset
11955 + rel->r_offset)
11956 + globals->sgotplt_jump_table_size);
11957 }
11958 else
11959 value = ((globals->root.sgot->output_section->vma
11960 + globals->root.sgot->output_offset + off)
11961 - (input_section->output_section->vma
11962 + input_section->output_offset + rel->r_offset));
11963
11964 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
11965 r_type == R_ARM_TLS_IE32_FDPIC))
11966 {
11967 /* For FDPIC relocations, resolve to the offset of the GOT
11968 entry from the start of GOT. */
11969 bfd_put_32(output_bfd,
11970 globals->root.sgot->output_offset + off,
11971 contents + rel->r_offset);
11972
11973 return bfd_reloc_ok;
11974 }
11975 else
11976 {
11977 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11978 contents, rel->r_offset, value,
11979 rel->r_addend);
11980 }
11981 }
11982
11983 case R_ARM_TLS_LE32:
11984 if (bfd_link_dll (info))
11985 {
11986 _bfd_error_handler
11987 /* xgettext:c-format */
11988 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
11989 "in shared object"),
11990 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
11991 return bfd_reloc_notsupported;
11992 }
11993 else
11994 value = tpoff (info, value);
11995
11996 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11997 contents, rel->r_offset, value,
11998 rel->r_addend);
11999
12000 case R_ARM_V4BX:
12001 if (globals->fix_v4bx)
12002 {
12003 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12004
12005 /* Ensure that we have a BX instruction. */
12006 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12007
12008 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12009 {
12010 /* Branch to veneer. */
12011 bfd_vma glue_addr;
12012 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12013 glue_addr -= input_section->output_section->vma
12014 + input_section->output_offset
12015 + rel->r_offset + 8;
12016 insn = (insn & 0xf0000000) | 0x0a000000
12017 | ((glue_addr >> 2) & 0x00ffffff);
12018 }
12019 else
12020 {
12021 /* Preserve Rm (lowest four bits) and the condition code
12022 (highest four bits). Other bits encode MOV PC,Rm. */
12023 insn = (insn & 0xf000000f) | 0x01a0f000;
12024 }
12025
12026 bfd_put_32 (input_bfd, insn, hit_data);
12027 }
12028 return bfd_reloc_ok;
12029
12030 case R_ARM_MOVW_ABS_NC:
12031 case R_ARM_MOVT_ABS:
12032 case R_ARM_MOVW_PREL_NC:
12033 case R_ARM_MOVT_PREL:
12034 /* Until we properly support segment-base-relative addressing then
12035 we assume the segment base to be zero, as for the group relocations.
12036 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12037 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12038 case R_ARM_MOVW_BREL_NC:
12039 case R_ARM_MOVW_BREL:
12040 case R_ARM_MOVT_BREL:
12041 {
12042 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12043
12044 if (globals->use_rel)
12045 {
12046 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12047 signed_addend = (addend ^ 0x8000) - 0x8000;
12048 }
12049
12050 value += signed_addend;
12051
12052 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12053 value -= (input_section->output_section->vma
12054 + input_section->output_offset + rel->r_offset);
12055
12056 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12057 return bfd_reloc_overflow;
12058
12059 if (branch_type == ST_BRANCH_TO_THUMB)
12060 value |= 1;
12061
12062 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12063 || r_type == R_ARM_MOVT_BREL)
12064 value >>= 16;
12065
12066 insn &= 0xfff0f000;
12067 insn |= value & 0xfff;
12068 insn |= (value & 0xf000) << 4;
12069 bfd_put_32 (input_bfd, insn, hit_data);
12070 }
12071 return bfd_reloc_ok;
12072
12073 case R_ARM_THM_MOVW_ABS_NC:
12074 case R_ARM_THM_MOVT_ABS:
12075 case R_ARM_THM_MOVW_PREL_NC:
12076 case R_ARM_THM_MOVT_PREL:
12077 /* Until we properly support segment-base-relative addressing then
12078 we assume the segment base to be zero, as for the above relocations.
12079 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12080 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12081 as R_ARM_THM_MOVT_ABS. */
12082 case R_ARM_THM_MOVW_BREL_NC:
12083 case R_ARM_THM_MOVW_BREL:
12084 case R_ARM_THM_MOVT_BREL:
12085 {
12086 bfd_vma insn;
12087
12088 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12089 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12090
12091 if (globals->use_rel)
12092 {
12093 addend = ((insn >> 4) & 0xf000)
12094 | ((insn >> 15) & 0x0800)
12095 | ((insn >> 4) & 0x0700)
12096 | (insn & 0x00ff);
12097 signed_addend = (addend ^ 0x8000) - 0x8000;
12098 }
12099
12100 value += signed_addend;
12101
12102 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12103 value -= (input_section->output_section->vma
12104 + input_section->output_offset + rel->r_offset);
12105
12106 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12107 return bfd_reloc_overflow;
12108
12109 if (branch_type == ST_BRANCH_TO_THUMB)
12110 value |= 1;
12111
12112 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12113 || r_type == R_ARM_THM_MOVT_BREL)
12114 value >>= 16;
12115
12116 insn &= 0xfbf08f00;
12117 insn |= (value & 0xf000) << 4;
12118 insn |= (value & 0x0800) << 15;
12119 insn |= (value & 0x0700) << 4;
12120 insn |= (value & 0x00ff);
12121
12122 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12123 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12124 }
12125 return bfd_reloc_ok;
12126
12127 case R_ARM_ALU_PC_G0_NC:
12128 case R_ARM_ALU_PC_G1_NC:
12129 case R_ARM_ALU_PC_G0:
12130 case R_ARM_ALU_PC_G1:
12131 case R_ARM_ALU_PC_G2:
12132 case R_ARM_ALU_SB_G0_NC:
12133 case R_ARM_ALU_SB_G1_NC:
12134 case R_ARM_ALU_SB_G0:
12135 case R_ARM_ALU_SB_G1:
12136 case R_ARM_ALU_SB_G2:
12137 {
12138 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12139 bfd_vma pc = input_section->output_section->vma
12140 + input_section->output_offset + rel->r_offset;
12141 /* sb is the origin of the *segment* containing the symbol. */
12142 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12143 bfd_vma residual;
12144 bfd_vma g_n;
12145 bfd_signed_vma signed_value;
12146 int group = 0;
12147
12148 /* Determine which group of bits to select. */
12149 switch (r_type)
12150 {
12151 case R_ARM_ALU_PC_G0_NC:
12152 case R_ARM_ALU_PC_G0:
12153 case R_ARM_ALU_SB_G0_NC:
12154 case R_ARM_ALU_SB_G0:
12155 group = 0;
12156 break;
12157
12158 case R_ARM_ALU_PC_G1_NC:
12159 case R_ARM_ALU_PC_G1:
12160 case R_ARM_ALU_SB_G1_NC:
12161 case R_ARM_ALU_SB_G1:
12162 group = 1;
12163 break;
12164
12165 case R_ARM_ALU_PC_G2:
12166 case R_ARM_ALU_SB_G2:
12167 group = 2;
12168 break;
12169
12170 default:
12171 abort ();
12172 }
12173
12174 /* If REL, extract the addend from the insn. If RELA, it will
12175 have already been fetched for us. */
12176 if (globals->use_rel)
12177 {
12178 int negative;
12179 bfd_vma constant = insn & 0xff;
12180 bfd_vma rotation = (insn & 0xf00) >> 8;
12181
12182 if (rotation == 0)
12183 signed_addend = constant;
12184 else
12185 {
12186 /* Compensate for the fact that in the instruction, the
12187 rotation is stored in multiples of 2 bits. */
12188 rotation *= 2;
12189
12190 /* Rotate "constant" right by "rotation" bits. */
12191 signed_addend = (constant >> rotation) |
12192 (constant << (8 * sizeof (bfd_vma) - rotation));
12193 }
12194
12195 /* Determine if the instruction is an ADD or a SUB.
12196 (For REL, this determines the sign of the addend.) */
12197 negative = identify_add_or_sub (insn);
12198 if (negative == 0)
12199 {
12200 _bfd_error_handler
12201 /* xgettext:c-format */
12202 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12203 "are allowed for ALU group relocations"),
12204 input_bfd, input_section, (uint64_t) rel->r_offset);
12205 return bfd_reloc_overflow;
12206 }
12207
12208 signed_addend *= negative;
12209 }
12210
12211 /* Compute the value (X) to go in the place. */
12212 if (r_type == R_ARM_ALU_PC_G0_NC
12213 || r_type == R_ARM_ALU_PC_G1_NC
12214 || r_type == R_ARM_ALU_PC_G0
12215 || r_type == R_ARM_ALU_PC_G1
12216 || r_type == R_ARM_ALU_PC_G2)
12217 /* PC relative. */
12218 signed_value = value - pc + signed_addend;
12219 else
12220 /* Section base relative. */
12221 signed_value = value - sb + signed_addend;
12222
12223 /* If the target symbol is a Thumb function, then set the
12224 Thumb bit in the address. */
12225 if (branch_type == ST_BRANCH_TO_THUMB)
12226 signed_value |= 1;
12227
12228 /* Calculate the value of the relevant G_n, in encoded
12229 constant-with-rotation format. */
12230 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12231 group, &residual);
12232
12233 /* Check for overflow if required. */
12234 if ((r_type == R_ARM_ALU_PC_G0
12235 || r_type == R_ARM_ALU_PC_G1
12236 || r_type == R_ARM_ALU_PC_G2
12237 || r_type == R_ARM_ALU_SB_G0
12238 || r_type == R_ARM_ALU_SB_G1
12239 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12240 {
12241 _bfd_error_handler
12242 /* xgettext:c-format */
12243 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12244 "splitting %#" PRIx64 " for group relocation %s"),
12245 input_bfd, input_section, (uint64_t) rel->r_offset,
12246 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12247 howto->name);
12248 return bfd_reloc_overflow;
12249 }
12250
12251 /* Mask out the value and the ADD/SUB part of the opcode; take care
12252 not to destroy the S bit. */
12253 insn &= 0xff1ff000;
12254
12255 /* Set the opcode according to whether the value to go in the
12256 place is negative. */
12257 if (signed_value < 0)
12258 insn |= 1 << 22;
12259 else
12260 insn |= 1 << 23;
12261
12262 /* Encode the offset. */
12263 insn |= g_n;
12264
12265 bfd_put_32 (input_bfd, insn, hit_data);
12266 }
12267 return bfd_reloc_ok;
12268
12269 case R_ARM_LDR_PC_G0:
12270 case R_ARM_LDR_PC_G1:
12271 case R_ARM_LDR_PC_G2:
12272 case R_ARM_LDR_SB_G0:
12273 case R_ARM_LDR_SB_G1:
12274 case R_ARM_LDR_SB_G2:
12275 {
12276 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12277 bfd_vma pc = input_section->output_section->vma
12278 + input_section->output_offset + rel->r_offset;
12279 /* sb is the origin of the *segment* containing the symbol. */
12280 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12281 bfd_vma residual;
12282 bfd_signed_vma signed_value;
12283 int group = 0;
12284
12285 /* Determine which groups of bits to calculate. */
12286 switch (r_type)
12287 {
12288 case R_ARM_LDR_PC_G0:
12289 case R_ARM_LDR_SB_G0:
12290 group = 0;
12291 break;
12292
12293 case R_ARM_LDR_PC_G1:
12294 case R_ARM_LDR_SB_G1:
12295 group = 1;
12296 break;
12297
12298 case R_ARM_LDR_PC_G2:
12299 case R_ARM_LDR_SB_G2:
12300 group = 2;
12301 break;
12302
12303 default:
12304 abort ();
12305 }
12306
12307 /* If REL, extract the addend from the insn. If RELA, it will
12308 have already been fetched for us. */
12309 if (globals->use_rel)
12310 {
12311 int negative = (insn & (1 << 23)) ? 1 : -1;
12312 signed_addend = negative * (insn & 0xfff);
12313 }
12314
12315 /* Compute the value (X) to go in the place. */
12316 if (r_type == R_ARM_LDR_PC_G0
12317 || r_type == R_ARM_LDR_PC_G1
12318 || r_type == R_ARM_LDR_PC_G2)
12319 /* PC relative. */
12320 signed_value = value - pc + signed_addend;
12321 else
12322 /* Section base relative. */
12323 signed_value = value - sb + signed_addend;
12324
12325 /* Calculate the value of the relevant G_{n-1} to obtain
12326 the residual at that stage. */
12327 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12328 group - 1, &residual);
12329
12330 /* Check for overflow. */
12331 if (residual >= 0x1000)
12332 {
12333 _bfd_error_handler
12334 /* xgettext:c-format */
12335 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12336 "splitting %#" PRIx64 " for group relocation %s"),
12337 input_bfd, input_section, (uint64_t) rel->r_offset,
12338 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12339 howto->name);
12340 return bfd_reloc_overflow;
12341 }
12342
12343 /* Mask out the value and U bit. */
12344 insn &= 0xff7ff000;
12345
12346 /* Set the U bit if the value to go in the place is non-negative. */
12347 if (signed_value >= 0)
12348 insn |= 1 << 23;
12349
12350 /* Encode the offset. */
12351 insn |= residual;
12352
12353 bfd_put_32 (input_bfd, insn, hit_data);
12354 }
12355 return bfd_reloc_ok;
12356
12357 case R_ARM_LDRS_PC_G0:
12358 case R_ARM_LDRS_PC_G1:
12359 case R_ARM_LDRS_PC_G2:
12360 case R_ARM_LDRS_SB_G0:
12361 case R_ARM_LDRS_SB_G1:
12362 case R_ARM_LDRS_SB_G2:
12363 {
12364 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12365 bfd_vma pc = input_section->output_section->vma
12366 + input_section->output_offset + rel->r_offset;
12367 /* sb is the origin of the *segment* containing the symbol. */
12368 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12369 bfd_vma residual;
12370 bfd_signed_vma signed_value;
12371 int group = 0;
12372
12373 /* Determine which groups of bits to calculate. */
12374 switch (r_type)
12375 {
12376 case R_ARM_LDRS_PC_G0:
12377 case R_ARM_LDRS_SB_G0:
12378 group = 0;
12379 break;
12380
12381 case R_ARM_LDRS_PC_G1:
12382 case R_ARM_LDRS_SB_G1:
12383 group = 1;
12384 break;
12385
12386 case R_ARM_LDRS_PC_G2:
12387 case R_ARM_LDRS_SB_G2:
12388 group = 2;
12389 break;
12390
12391 default:
12392 abort ();
12393 }
12394
12395 /* If REL, extract the addend from the insn. If RELA, it will
12396 have already been fetched for us. */
12397 if (globals->use_rel)
12398 {
12399 int negative = (insn & (1 << 23)) ? 1 : -1;
12400 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12401 }
12402
12403 /* Compute the value (X) to go in the place. */
12404 if (r_type == R_ARM_LDRS_PC_G0
12405 || r_type == R_ARM_LDRS_PC_G1
12406 || r_type == R_ARM_LDRS_PC_G2)
12407 /* PC relative. */
12408 signed_value = value - pc + signed_addend;
12409 else
12410 /* Section base relative. */
12411 signed_value = value - sb + signed_addend;
12412
12413 /* Calculate the value of the relevant G_{n-1} to obtain
12414 the residual at that stage. */
12415 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12416 group - 1, &residual);
12417
12418 /* Check for overflow. */
12419 if (residual >= 0x100)
12420 {
12421 _bfd_error_handler
12422 /* xgettext:c-format */
12423 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12424 "splitting %#" PRIx64 " for group relocation %s"),
12425 input_bfd, input_section, (uint64_t) rel->r_offset,
12426 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12427 howto->name);
12428 return bfd_reloc_overflow;
12429 }
12430
12431 /* Mask out the value and U bit. */
12432 insn &= 0xff7ff0f0;
12433
12434 /* Set the U bit if the value to go in the place is non-negative. */
12435 if (signed_value >= 0)
12436 insn |= 1 << 23;
12437
12438 /* Encode the offset. */
12439 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12440
12441 bfd_put_32 (input_bfd, insn, hit_data);
12442 }
12443 return bfd_reloc_ok;
12444
12445 case R_ARM_LDC_PC_G0:
12446 case R_ARM_LDC_PC_G1:
12447 case R_ARM_LDC_PC_G2:
12448 case R_ARM_LDC_SB_G0:
12449 case R_ARM_LDC_SB_G1:
12450 case R_ARM_LDC_SB_G2:
12451 {
12452 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12453 bfd_vma pc = input_section->output_section->vma
12454 + input_section->output_offset + rel->r_offset;
12455 /* sb is the origin of the *segment* containing the symbol. */
12456 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12457 bfd_vma residual;
12458 bfd_signed_vma signed_value;
12459 int group = 0;
12460
12461 /* Determine which groups of bits to calculate. */
12462 switch (r_type)
12463 {
12464 case R_ARM_LDC_PC_G0:
12465 case R_ARM_LDC_SB_G0:
12466 group = 0;
12467 break;
12468
12469 case R_ARM_LDC_PC_G1:
12470 case R_ARM_LDC_SB_G1:
12471 group = 1;
12472 break;
12473
12474 case R_ARM_LDC_PC_G2:
12475 case R_ARM_LDC_SB_G2:
12476 group = 2;
12477 break;
12478
12479 default:
12480 abort ();
12481 }
12482
12483 /* If REL, extract the addend from the insn. If RELA, it will
12484 have already been fetched for us. */
12485 if (globals->use_rel)
12486 {
12487 int negative = (insn & (1 << 23)) ? 1 : -1;
12488 signed_addend = negative * ((insn & 0xff) << 2);
12489 }
12490
12491 /* Compute the value (X) to go in the place. */
12492 if (r_type == R_ARM_LDC_PC_G0
12493 || r_type == R_ARM_LDC_PC_G1
12494 || r_type == R_ARM_LDC_PC_G2)
12495 /* PC relative. */
12496 signed_value = value - pc + signed_addend;
12497 else
12498 /* Section base relative. */
12499 signed_value = value - sb + signed_addend;
12500
12501 /* Calculate the value of the relevant G_{n-1} to obtain
12502 the residual at that stage. */
12503 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12504 group - 1, &residual);
12505
12506 /* Check for overflow. (The absolute value to go in the place must be
12507 divisible by four and, after having been divided by four, must
12508 fit in eight bits.) */
12509 if ((residual & 0x3) != 0 || residual >= 0x400)
12510 {
12511 _bfd_error_handler
12512 /* xgettext:c-format */
12513 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12514 "splitting %#" PRIx64 " for group relocation %s"),
12515 input_bfd, input_section, (uint64_t) rel->r_offset,
12516 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12517 howto->name);
12518 return bfd_reloc_overflow;
12519 }
12520
12521 /* Mask out the value and U bit. */
12522 insn &= 0xff7fff00;
12523
12524 /* Set the U bit if the value to go in the place is non-negative. */
12525 if (signed_value >= 0)
12526 insn |= 1 << 23;
12527
12528 /* Encode the offset. */
12529 insn |= residual >> 2;
12530
12531 bfd_put_32 (input_bfd, insn, hit_data);
12532 }
12533 return bfd_reloc_ok;
12534
12535 case R_ARM_THM_ALU_ABS_G0_NC:
12536 case R_ARM_THM_ALU_ABS_G1_NC:
12537 case R_ARM_THM_ALU_ABS_G2_NC:
12538 case R_ARM_THM_ALU_ABS_G3_NC:
12539 {
12540 const int shift_array[4] = {0, 8, 16, 24};
12541 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12542 bfd_vma addr = value;
12543 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12544
12545 /* Compute address. */
12546 if (globals->use_rel)
12547 signed_addend = insn & 0xff;
12548 addr += signed_addend;
12549 if (branch_type == ST_BRANCH_TO_THUMB)
12550 addr |= 1;
12551 /* Clean imm8 insn. */
12552 insn &= 0xff00;
12553 /* And update with correct part of address. */
12554 insn |= (addr >> shift) & 0xff;
12555 /* Update insn. */
12556 bfd_put_16 (input_bfd, insn, hit_data);
12557 }
12558
12559 *unresolved_reloc_p = false;
12560 return bfd_reloc_ok;
12561
12562 case R_ARM_GOTOFFFUNCDESC:
12563 {
12564 if (h == NULL)
12565 {
12566 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12567 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12568 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12569 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12570 bfd_vma seg = -1;
12571
12572 if (bfd_link_pic(info) && dynindx == 0)
12573 abort();
12574
12575 /* Resolve relocation. */
12576 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12577 , contents + rel->r_offset);
12578 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12579 not done yet. */
12580 arm_elf_fill_funcdesc(output_bfd, info,
12581 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12582 dynindx, offset, addr, dynreloc_value, seg);
12583 }
12584 else
12585 {
12586 int dynindx;
12587 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12588 bfd_vma addr;
12589 bfd_vma seg = -1;
12590
12591 /* For static binaries, sym_sec can be null. */
12592 if (sym_sec)
12593 {
12594 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12595 addr = dynreloc_value - sym_sec->output_section->vma;
12596 }
12597 else
12598 {
12599 dynindx = 0;
12600 addr = 0;
12601 }
12602
12603 if (bfd_link_pic(info) && dynindx == 0)
12604 abort();
12605
12606 /* This case cannot occur since funcdesc is allocated by
12607 the dynamic loader so we cannot resolve the relocation. */
12608 if (h->dynindx != -1)
12609 abort();
12610
12611 /* Resolve relocation. */
12612 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12613 contents + rel->r_offset);
12614 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12615 arm_elf_fill_funcdesc(output_bfd, info,
12616 &eh->fdpic_cnts.funcdesc_offset,
12617 dynindx, offset, addr, dynreloc_value, seg);
12618 }
12619 }
12620 *unresolved_reloc_p = false;
12621 return bfd_reloc_ok;
12622
12623 case R_ARM_GOTFUNCDESC:
12624 {
12625 if (h != NULL)
12626 {
12627 Elf_Internal_Rela outrel;
12628
12629 /* Resolve relocation. */
12630 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12631 + sgot->output_offset),
12632 contents + rel->r_offset);
12633 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12634 if(h->dynindx == -1)
12635 {
12636 int dynindx;
12637 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12638 bfd_vma addr;
12639 bfd_vma seg = -1;
12640
12641 /* For static binaries sym_sec can be null. */
12642 if (sym_sec)
12643 {
12644 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12645 addr = dynreloc_value - sym_sec->output_section->vma;
12646 }
12647 else
12648 {
12649 dynindx = 0;
12650 addr = 0;
12651 }
12652
12653 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12654 arm_elf_fill_funcdesc(output_bfd, info,
12655 &eh->fdpic_cnts.funcdesc_offset,
12656 dynindx, offset, addr, dynreloc_value, seg);
12657 }
12658
12659 /* Add a dynamic relocation on GOT entry if not already done. */
12660 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12661 {
12662 if (h->dynindx == -1)
12663 {
12664 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12665 if (h->root.type == bfd_link_hash_undefweak)
12666 bfd_put_32(output_bfd, 0, sgot->contents
12667 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12668 else
12669 bfd_put_32(output_bfd, sgot->output_section->vma
12670 + sgot->output_offset
12671 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12672 sgot->contents
12673 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12674 }
12675 else
12676 {
12677 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12678 }
12679 outrel.r_offset = sgot->output_section->vma
12680 + sgot->output_offset
12681 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12682 outrel.r_addend = 0;
12683 if (h->dynindx == -1 && !bfd_link_pic(info))
12684 if (h->root.type == bfd_link_hash_undefweak)
12685 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12686 else
12687 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12688 outrel.r_offset);
12689 else
12690 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12691 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12692 }
12693 }
12694 else
12695 {
12696 /* Such relocation on static function should not have been
12697 emitted by the compiler. */
12698 abort();
12699 }
12700 }
12701 *unresolved_reloc_p = false;
12702 return bfd_reloc_ok;
12703
12704 case R_ARM_FUNCDESC:
12705 {
12706 if (h == NULL)
12707 {
12708 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12709 Elf_Internal_Rela outrel;
12710 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12711 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12712 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12713 bfd_vma seg = -1;
12714
12715 if (bfd_link_pic(info) && dynindx == 0)
12716 abort();
12717
12718 /* Replace static FUNCDESC relocation with a
12719 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12720 executable. */
12721 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12722 outrel.r_offset = input_section->output_section->vma
12723 + input_section->output_offset + rel->r_offset;
12724 outrel.r_addend = 0;
12725 if (bfd_link_pic(info))
12726 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12727 else
12728 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12729
12730 bfd_put_32 (input_bfd, sgot->output_section->vma
12731 + sgot->output_offset + offset, hit_data);
12732
12733 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12734 arm_elf_fill_funcdesc(output_bfd, info,
12735 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12736 dynindx, offset, addr, dynreloc_value, seg);
12737 }
12738 else
12739 {
12740 if (h->dynindx == -1)
12741 {
12742 int dynindx;
12743 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12744 bfd_vma addr;
12745 bfd_vma seg = -1;
12746 Elf_Internal_Rela outrel;
12747
12748 /* For static binaries sym_sec can be null. */
12749 if (sym_sec)
12750 {
12751 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12752 addr = dynreloc_value - sym_sec->output_section->vma;
12753 }
12754 else
12755 {
12756 dynindx = 0;
12757 addr = 0;
12758 }
12759
12760 if (bfd_link_pic(info) && dynindx == 0)
12761 abort();
12762
12763 /* Replace static FUNCDESC relocation with a
12764 R_ARM_RELATIVE dynamic relocation. */
12765 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12766 outrel.r_offset = input_section->output_section->vma
12767 + input_section->output_offset + rel->r_offset;
12768 outrel.r_addend = 0;
12769 if (bfd_link_pic(info))
12770 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12771 else
12772 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12773
12774 bfd_put_32 (input_bfd, sgot->output_section->vma
12775 + sgot->output_offset + offset, hit_data);
12776
12777 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12778 arm_elf_fill_funcdesc(output_bfd, info,
12779 &eh->fdpic_cnts.funcdesc_offset,
12780 dynindx, offset, addr, dynreloc_value, seg);
12781 }
12782 else
12783 {
12784 Elf_Internal_Rela outrel;
12785
12786 /* Add a dynamic relocation. */
12787 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12788 outrel.r_offset = input_section->output_section->vma
12789 + input_section->output_offset + rel->r_offset;
12790 outrel.r_addend = 0;
12791 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12792 }
12793 }
12794 }
12795 *unresolved_reloc_p = false;
12796 return bfd_reloc_ok;
12797
12798 case R_ARM_THM_BF16:
12799 {
12800 bfd_vma relocation;
12801 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12802 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12803
12804 if (globals->use_rel)
12805 {
12806 bfd_vma immA = (upper_insn & 0x001f);
12807 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12808 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12809 addend = (immA << 12);
12810 addend |= (immB << 2);
12811 addend |= (immC << 1);
12812 addend |= 1;
12813 /* Sign extend. */
12814 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12815 }
12816
12817 relocation = value + signed_addend;
12818 relocation -= (input_section->output_section->vma
12819 + input_section->output_offset
12820 + rel->r_offset);
12821
12822 /* Put RELOCATION back into the insn. */
12823 {
12824 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12825 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12826 bfd_vma immC = (relocation & 0x00000002) >> 1;
12827
12828 upper_insn = (upper_insn & 0xffe0) | immA;
12829 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12830 }
12831
12832 /* Put the relocated value back in the object file: */
12833 bfd_put_16 (input_bfd, upper_insn, hit_data);
12834 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12835
12836 return bfd_reloc_ok;
12837 }
12838
12839 case R_ARM_THM_BF12:
12840 {
12841 bfd_vma relocation;
12842 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12843 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12844
12845 if (globals->use_rel)
12846 {
12847 bfd_vma immA = (upper_insn & 0x0001);
12848 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12849 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12850 addend = (immA << 12);
12851 addend |= (immB << 2);
12852 addend |= (immC << 1);
12853 addend |= 1;
12854 /* Sign extend. */
12855 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12856 signed_addend = addend;
12857 }
12858
12859 relocation = value + signed_addend;
12860 relocation -= (input_section->output_section->vma
12861 + input_section->output_offset
12862 + rel->r_offset);
12863
12864 /* Put RELOCATION back into the insn. */
12865 {
12866 bfd_vma immA = (relocation & 0x00001000) >> 12;
12867 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12868 bfd_vma immC = (relocation & 0x00000002) >> 1;
12869
12870 upper_insn = (upper_insn & 0xfffe) | immA;
12871 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12872 }
12873
12874 /* Put the relocated value back in the object file: */
12875 bfd_put_16 (input_bfd, upper_insn, hit_data);
12876 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12877
12878 return bfd_reloc_ok;
12879 }
12880
12881 case R_ARM_THM_BF18:
12882 {
12883 bfd_vma relocation;
12884 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12885 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12886
12887 if (globals->use_rel)
12888 {
12889 bfd_vma immA = (upper_insn & 0x007f);
12890 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12891 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12892 addend = (immA << 12);
12893 addend |= (immB << 2);
12894 addend |= (immC << 1);
12895 addend |= 1;
12896 /* Sign extend. */
12897 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12898 signed_addend = addend;
12899 }
12900
12901 relocation = value + signed_addend;
12902 relocation -= (input_section->output_section->vma
12903 + input_section->output_offset
12904 + rel->r_offset);
12905
12906 /* Put RELOCATION back into the insn. */
12907 {
12908 bfd_vma immA = (relocation & 0x0007f000) >> 12;
12909 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12910 bfd_vma immC = (relocation & 0x00000002) >> 1;
12911
12912 upper_insn = (upper_insn & 0xff80) | immA;
12913 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12914 }
12915
12916 /* Put the relocated value back in the object file: */
12917 bfd_put_16 (input_bfd, upper_insn, hit_data);
12918 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12919
12920 return bfd_reloc_ok;
12921 }
12922
12923 default:
12924 return bfd_reloc_notsupported;
12925 }
12926 }
12927
12928 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12929 static void
12930 arm_add_to_rel (bfd * abfd,
12931 bfd_byte * address,
12932 reloc_howto_type * howto,
12933 bfd_signed_vma increment)
12934 {
12935 bfd_signed_vma addend;
12936
12937 if (howto->type == R_ARM_THM_CALL
12938 || howto->type == R_ARM_THM_JUMP24)
12939 {
12940 int upper_insn, lower_insn;
12941 int upper, lower;
12942
12943 upper_insn = bfd_get_16 (abfd, address);
12944 lower_insn = bfd_get_16 (abfd, address + 2);
12945 upper = upper_insn & 0x7ff;
12946 lower = lower_insn & 0x7ff;
12947
12948 addend = (upper << 12) | (lower << 1);
12949 addend += increment;
12950 addend >>= 1;
12951
12952 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12953 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12954
12955 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12956 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12957 }
12958 else
12959 {
12960 bfd_vma contents;
12961
12962 contents = bfd_get_32 (abfd, address);
12963
12964 /* Get the (signed) value from the instruction. */
12965 addend = contents & howto->src_mask;
12966 if (addend & ((howto->src_mask + 1) >> 1))
12967 {
12968 bfd_signed_vma mask;
12969
12970 mask = -1;
12971 mask &= ~ howto->src_mask;
12972 addend |= mask;
12973 }
12974
12975 /* Add in the increment, (which is a byte value). */
12976 switch (howto->type)
12977 {
12978 default:
12979 addend += increment;
12980 break;
12981
12982 case R_ARM_PC24:
12983 case R_ARM_PLT32:
12984 case R_ARM_CALL:
12985 case R_ARM_JUMP24:
12986 addend <<= howto->size;
12987 addend += increment;
12988
12989 /* Should we check for overflow here ? */
12990
12991 /* Drop any undesired bits. */
12992 addend >>= howto->rightshift;
12993 break;
12994 }
12995
12996 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12997
12998 bfd_put_32 (abfd, contents, address);
12999 }
13000 }
13001
13002 #define IS_ARM_TLS_RELOC(R_TYPE) \
13003 ((R_TYPE) == R_ARM_TLS_GD32 \
13004 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13005 || (R_TYPE) == R_ARM_TLS_LDO32 \
13006 || (R_TYPE) == R_ARM_TLS_LDM32 \
13007 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13008 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13009 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13010 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13011 || (R_TYPE) == R_ARM_TLS_LE32 \
13012 || (R_TYPE) == R_ARM_TLS_IE32 \
13013 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13014 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13015
13016 /* Specific set of relocations for the gnu tls dialect. */
13017 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13018 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13019 || (R_TYPE) == R_ARM_TLS_CALL \
13020 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13021 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13022 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13023
13024 /* Relocate an ARM ELF section. */
13025
13026 static int
13027 elf32_arm_relocate_section (bfd * output_bfd,
13028 struct bfd_link_info * info,
13029 bfd * input_bfd,
13030 asection * input_section,
13031 bfd_byte * contents,
13032 Elf_Internal_Rela * relocs,
13033 Elf_Internal_Sym * local_syms,
13034 asection ** local_sections)
13035 {
13036 Elf_Internal_Shdr *symtab_hdr;
13037 struct elf_link_hash_entry **sym_hashes;
13038 Elf_Internal_Rela *rel;
13039 Elf_Internal_Rela *relend;
13040 const char *name;
13041 struct elf32_arm_link_hash_table * globals;
13042
13043 globals = elf32_arm_hash_table (info);
13044 if (globals == NULL)
13045 return false;
13046
13047 symtab_hdr = & elf_symtab_hdr (input_bfd);
13048 sym_hashes = elf_sym_hashes (input_bfd);
13049
13050 rel = relocs;
13051 relend = relocs + input_section->reloc_count;
13052 for (; rel < relend; rel++)
13053 {
13054 int r_type;
13055 reloc_howto_type * howto;
13056 unsigned long r_symndx;
13057 Elf_Internal_Sym * sym;
13058 asection * sec;
13059 struct elf_link_hash_entry * h;
13060 bfd_vma relocation;
13061 bfd_reloc_status_type r;
13062 arelent bfd_reloc;
13063 char sym_type;
13064 bool unresolved_reloc = false;
13065 char *error_message = NULL;
13066
13067 r_symndx = ELF32_R_SYM (rel->r_info);
13068 r_type = ELF32_R_TYPE (rel->r_info);
13069 r_type = arm_real_reloc_type (globals, r_type);
13070
13071 if ( r_type == R_ARM_GNU_VTENTRY
13072 || r_type == R_ARM_GNU_VTINHERIT)
13073 continue;
13074
13075 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13076
13077 if (howto == NULL)
13078 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13079
13080 h = NULL;
13081 sym = NULL;
13082 sec = NULL;
13083
13084 if (r_symndx < symtab_hdr->sh_info)
13085 {
13086 sym = local_syms + r_symndx;
13087 sym_type = ELF32_ST_TYPE (sym->st_info);
13088 sec = local_sections[r_symndx];
13089
13090 /* An object file might have a reference to a local
13091 undefined symbol. This is a daft object file, but we
13092 should at least do something about it. V4BX & NONE
13093 relocations do not use the symbol and are explicitly
13094 allowed to use the undefined symbol, so allow those.
13095 Likewise for relocations against STN_UNDEF. */
13096 if (r_type != R_ARM_V4BX
13097 && r_type != R_ARM_NONE
13098 && r_symndx != STN_UNDEF
13099 && bfd_is_und_section (sec)
13100 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13101 (*info->callbacks->undefined_symbol)
13102 (info, bfd_elf_string_from_elf_section
13103 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13104 input_bfd, input_section,
13105 rel->r_offset, true);
13106
13107 if (globals->use_rel)
13108 {
13109 relocation = (sec->output_section->vma
13110 + sec->output_offset
13111 + sym->st_value);
13112 if (!bfd_link_relocatable (info)
13113 && (sec->flags & SEC_MERGE)
13114 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13115 {
13116 asection *msec;
13117 bfd_vma addend, value;
13118
13119 switch (r_type)
13120 {
13121 case R_ARM_MOVW_ABS_NC:
13122 case R_ARM_MOVT_ABS:
13123 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13124 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13125 addend = (addend ^ 0x8000) - 0x8000;
13126 break;
13127
13128 case R_ARM_THM_MOVW_ABS_NC:
13129 case R_ARM_THM_MOVT_ABS:
13130 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13131 << 16;
13132 value |= bfd_get_16 (input_bfd,
13133 contents + rel->r_offset + 2);
13134 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13135 | ((value & 0x04000000) >> 15);
13136 addend = (addend ^ 0x8000) - 0x8000;
13137 break;
13138
13139 default:
13140 if (howto->rightshift
13141 || (howto->src_mask & (howto->src_mask + 1)))
13142 {
13143 _bfd_error_handler
13144 /* xgettext:c-format */
13145 (_("%pB(%pA+%#" PRIx64 "): "
13146 "%s relocation against SEC_MERGE section"),
13147 input_bfd, input_section,
13148 (uint64_t) rel->r_offset, howto->name);
13149 return false;
13150 }
13151
13152 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13153
13154 /* Get the (signed) value from the instruction. */
13155 addend = value & howto->src_mask;
13156 if (addend & ((howto->src_mask + 1) >> 1))
13157 {
13158 bfd_signed_vma mask;
13159
13160 mask = -1;
13161 mask &= ~ howto->src_mask;
13162 addend |= mask;
13163 }
13164 break;
13165 }
13166
13167 msec = sec;
13168 addend =
13169 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13170 - relocation;
13171 addend += msec->output_section->vma + msec->output_offset;
13172
13173 /* Cases here must match those in the preceding
13174 switch statement. */
13175 switch (r_type)
13176 {
13177 case R_ARM_MOVW_ABS_NC:
13178 case R_ARM_MOVT_ABS:
13179 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13180 | (addend & 0xfff);
13181 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13182 break;
13183
13184 case R_ARM_THM_MOVW_ABS_NC:
13185 case R_ARM_THM_MOVT_ABS:
13186 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13187 | (addend & 0xff) | ((addend & 0x0800) << 15);
13188 bfd_put_16 (input_bfd, value >> 16,
13189 contents + rel->r_offset);
13190 bfd_put_16 (input_bfd, value,
13191 contents + rel->r_offset + 2);
13192 break;
13193
13194 default:
13195 value = (value & ~ howto->dst_mask)
13196 | (addend & howto->dst_mask);
13197 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13198 break;
13199 }
13200 }
13201 }
13202 else
13203 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13204 }
13205 else
13206 {
13207 bool warned, ignored;
13208
13209 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13210 r_symndx, symtab_hdr, sym_hashes,
13211 h, sec, relocation,
13212 unresolved_reloc, warned, ignored);
13213
13214 sym_type = h->type;
13215 }
13216
13217 if (sec != NULL && discarded_section (sec))
13218 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13219 rel, 1, relend, howto, 0, contents);
13220
13221 if (bfd_link_relocatable (info))
13222 {
13223 /* This is a relocatable link. We don't have to change
13224 anything, unless the reloc is against a section symbol,
13225 in which case we have to adjust according to where the
13226 section symbol winds up in the output section. */
13227 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13228 {
13229 if (globals->use_rel)
13230 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13231 howto, (bfd_signed_vma) sec->output_offset);
13232 else
13233 rel->r_addend += sec->output_offset;
13234 }
13235 continue;
13236 }
13237
13238 if (h != NULL)
13239 name = h->root.root.string;
13240 else
13241 {
13242 name = (bfd_elf_string_from_elf_section
13243 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13244 if (name == NULL || *name == '\0')
13245 name = bfd_section_name (sec);
13246 }
13247
13248 if (r_symndx != STN_UNDEF
13249 && r_type != R_ARM_NONE
13250 && (h == NULL
13251 || h->root.type == bfd_link_hash_defined
13252 || h->root.type == bfd_link_hash_defweak)
13253 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13254 {
13255 _bfd_error_handler
13256 ((sym_type == STT_TLS
13257 /* xgettext:c-format */
13258 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13259 /* xgettext:c-format */
13260 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13261 input_bfd,
13262 input_section,
13263 (uint64_t) rel->r_offset,
13264 howto->name,
13265 name);
13266 }
13267
13268 /* We call elf32_arm_final_link_relocate unless we're completely
13269 done, i.e., the relaxation produced the final output we want,
13270 and we won't let anybody mess with it. Also, we have to do
13271 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13272 both in relaxed and non-relaxed cases. */
13273 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13274 || (IS_ARM_TLS_GNU_RELOC (r_type)
13275 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13276 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13277 & GOT_TLS_GDESC)))
13278 {
13279 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13280 contents, rel, h == NULL);
13281 /* This may have been marked unresolved because it came from
13282 a shared library. But we've just dealt with that. */
13283 unresolved_reloc = 0;
13284 }
13285 else
13286 r = bfd_reloc_continue;
13287
13288 if (r == bfd_reloc_continue)
13289 {
13290 unsigned char branch_type =
13291 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13292 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13293
13294 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13295 input_section, contents, rel,
13296 relocation, info, sec, name,
13297 sym_type, branch_type, h,
13298 &unresolved_reloc,
13299 &error_message);
13300 }
13301
13302 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13303 because such sections are not SEC_ALLOC and thus ld.so will
13304 not process them. */
13305 if (unresolved_reloc
13306 && !((input_section->flags & SEC_DEBUGGING) != 0
13307 && h->def_dynamic)
13308 && _bfd_elf_section_offset (output_bfd, info, input_section,
13309 rel->r_offset) != (bfd_vma) -1)
13310 {
13311 _bfd_error_handler
13312 /* xgettext:c-format */
13313 (_("%pB(%pA+%#" PRIx64 "): "
13314 "unresolvable %s relocation against symbol `%s'"),
13315 input_bfd,
13316 input_section,
13317 (uint64_t) rel->r_offset,
13318 howto->name,
13319 h->root.root.string);
13320 return false;
13321 }
13322
13323 if (r != bfd_reloc_ok)
13324 {
13325 switch (r)
13326 {
13327 case bfd_reloc_overflow:
13328 /* If the overflowing reloc was to an undefined symbol,
13329 we have already printed one error message and there
13330 is no point complaining again. */
13331 if (!h || h->root.type != bfd_link_hash_undefined)
13332 (*info->callbacks->reloc_overflow)
13333 (info, (h ? &h->root : NULL), name, howto->name,
13334 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13335 break;
13336
13337 case bfd_reloc_undefined:
13338 (*info->callbacks->undefined_symbol)
13339 (info, name, input_bfd, input_section, rel->r_offset, true);
13340 break;
13341
13342 case bfd_reloc_outofrange:
13343 error_message = _("out of range");
13344 goto common_error;
13345
13346 case bfd_reloc_notsupported:
13347 error_message = _("unsupported relocation");
13348 goto common_error;
13349
13350 case bfd_reloc_dangerous:
13351 /* error_message should already be set. */
13352 goto common_error;
13353
13354 default:
13355 error_message = _("unknown error");
13356 /* Fall through. */
13357
13358 common_error:
13359 BFD_ASSERT (error_message != NULL);
13360 (*info->callbacks->reloc_dangerous)
13361 (info, error_message, input_bfd, input_section, rel->r_offset);
13362 break;
13363 }
13364 }
13365 }
13366
13367 return true;
13368 }
13369
13370 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13371 adds the edit to the start of the list. (The list must be built in order of
13372 ascending TINDEX: the function's callers are primarily responsible for
13373 maintaining that condition). */
13374
13375 static void
13376 add_unwind_table_edit (arm_unwind_table_edit **head,
13377 arm_unwind_table_edit **tail,
13378 arm_unwind_edit_type type,
13379 asection *linked_section,
13380 unsigned int tindex)
13381 {
13382 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13383 xmalloc (sizeof (arm_unwind_table_edit));
13384
13385 new_edit->type = type;
13386 new_edit->linked_section = linked_section;
13387 new_edit->index = tindex;
13388
13389 if (tindex > 0)
13390 {
13391 new_edit->next = NULL;
13392
13393 if (*tail)
13394 (*tail)->next = new_edit;
13395
13396 (*tail) = new_edit;
13397
13398 if (!*head)
13399 (*head) = new_edit;
13400 }
13401 else
13402 {
13403 new_edit->next = *head;
13404
13405 if (!*tail)
13406 *tail = new_edit;
13407
13408 *head = new_edit;
13409 }
13410 }
13411
13412 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13413
13414 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13415 static void
13416 adjust_exidx_size(asection *exidx_sec, int adjust)
13417 {
13418 asection *out_sec;
13419
13420 if (!exidx_sec->rawsize)
13421 exidx_sec->rawsize = exidx_sec->size;
13422
13423 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13424 out_sec = exidx_sec->output_section;
13425 /* Adjust size of output section. */
13426 bfd_set_section_size (out_sec, out_sec->size +adjust);
13427 }
13428
13429 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13430 static void
13431 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13432 {
13433 struct _arm_elf_section_data *exidx_arm_data;
13434
13435 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13436 add_unwind_table_edit (
13437 &exidx_arm_data->u.exidx.unwind_edit_list,
13438 &exidx_arm_data->u.exidx.unwind_edit_tail,
13439 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13440
13441 exidx_arm_data->additional_reloc_count++;
13442
13443 adjust_exidx_size(exidx_sec, 8);
13444 }
13445
13446 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13447 made to those tables, such that:
13448
13449 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13450 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13451 codes which have been inlined into the index).
13452
13453 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13454
13455 The edits are applied when the tables are written
13456 (in elf32_arm_write_section). */
13457
13458 bool
13459 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13460 unsigned int num_text_sections,
13461 struct bfd_link_info *info,
13462 bool merge_exidx_entries)
13463 {
13464 bfd *inp;
13465 unsigned int last_second_word = 0, i;
13466 asection *last_exidx_sec = NULL;
13467 asection *last_text_sec = NULL;
13468 int last_unwind_type = -1;
13469
13470 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13471 text sections. */
13472 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13473 {
13474 asection *sec;
13475
13476 for (sec = inp->sections; sec != NULL; sec = sec->next)
13477 {
13478 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13479 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13480
13481 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13482 continue;
13483
13484 if (elf_sec->linked_to)
13485 {
13486 Elf_Internal_Shdr *linked_hdr
13487 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13488 struct _arm_elf_section_data *linked_sec_arm_data
13489 = get_arm_elf_section_data (linked_hdr->bfd_section);
13490
13491 if (linked_sec_arm_data == NULL)
13492 continue;
13493
13494 /* Link this .ARM.exidx section back from the text section it
13495 describes. */
13496 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13497 }
13498 }
13499 }
13500
13501 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13502 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13503 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13504
13505 for (i = 0; i < num_text_sections; i++)
13506 {
13507 asection *sec = text_section_order[i];
13508 asection *exidx_sec;
13509 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13510 struct _arm_elf_section_data *exidx_arm_data;
13511 bfd_byte *contents = NULL;
13512 int deleted_exidx_bytes = 0;
13513 bfd_vma j;
13514 arm_unwind_table_edit *unwind_edit_head = NULL;
13515 arm_unwind_table_edit *unwind_edit_tail = NULL;
13516 Elf_Internal_Shdr *hdr;
13517 bfd *ibfd;
13518
13519 if (arm_data == NULL)
13520 continue;
13521
13522 exidx_sec = arm_data->u.text.arm_exidx_sec;
13523 if (exidx_sec == NULL)
13524 {
13525 /* Section has no unwind data. */
13526 if (last_unwind_type == 0 || !last_exidx_sec)
13527 continue;
13528
13529 /* Ignore zero sized sections. */
13530 if (sec->size == 0)
13531 continue;
13532
13533 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13534 last_unwind_type = 0;
13535 continue;
13536 }
13537
13538 /* Skip /DISCARD/ sections. */
13539 if (bfd_is_abs_section (exidx_sec->output_section))
13540 continue;
13541
13542 hdr = &elf_section_data (exidx_sec)->this_hdr;
13543 if (hdr->sh_type != SHT_ARM_EXIDX)
13544 continue;
13545
13546 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13547 if (exidx_arm_data == NULL)
13548 continue;
13549
13550 ibfd = exidx_sec->owner;
13551
13552 if (hdr->contents != NULL)
13553 contents = hdr->contents;
13554 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13555 /* An error? */
13556 continue;
13557
13558 if (last_unwind_type > 0)
13559 {
13560 unsigned int first_word = bfd_get_32 (ibfd, contents);
13561 /* Add cantunwind if first unwind item does not match section
13562 start. */
13563 if (first_word != sec->vma)
13564 {
13565 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13566 last_unwind_type = 0;
13567 }
13568 }
13569
13570 for (j = 0; j < hdr->sh_size; j += 8)
13571 {
13572 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13573 int unwind_type;
13574 int elide = 0;
13575
13576 /* An EXIDX_CANTUNWIND entry. */
13577 if (second_word == 1)
13578 {
13579 if (last_unwind_type == 0)
13580 elide = 1;
13581 unwind_type = 0;
13582 }
13583 /* Inlined unwinding data. Merge if equal to previous. */
13584 else if ((second_word & 0x80000000) != 0)
13585 {
13586 if (merge_exidx_entries
13587 && last_second_word == second_word && last_unwind_type == 1)
13588 elide = 1;
13589 unwind_type = 1;
13590 last_second_word = second_word;
13591 }
13592 /* Normal table entry. In theory we could merge these too,
13593 but duplicate entries are likely to be much less common. */
13594 else
13595 unwind_type = 2;
13596
13597 if (elide && !bfd_link_relocatable (info))
13598 {
13599 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13600 DELETE_EXIDX_ENTRY, NULL, j / 8);
13601
13602 deleted_exidx_bytes += 8;
13603 }
13604
13605 last_unwind_type = unwind_type;
13606 }
13607
13608 /* Free contents if we allocated it ourselves. */
13609 if (contents != hdr->contents)
13610 free (contents);
13611
13612 /* Record edits to be applied later (in elf32_arm_write_section). */
13613 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13614 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13615
13616 if (deleted_exidx_bytes > 0)
13617 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13618
13619 last_exidx_sec = exidx_sec;
13620 last_text_sec = sec;
13621 }
13622
13623 /* Add terminating CANTUNWIND entry. */
13624 if (!bfd_link_relocatable (info) && last_exidx_sec
13625 && last_unwind_type != 0)
13626 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13627
13628 return true;
13629 }
13630
13631 static bool
13632 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13633 bfd *ibfd, const char *name)
13634 {
13635 asection *sec, *osec;
13636
13637 sec = bfd_get_linker_section (ibfd, name);
13638 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13639 return true;
13640
13641 osec = sec->output_section;
13642 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13643 return true;
13644
13645 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13646 sec->output_offset, sec->size))
13647 return false;
13648
13649 return true;
13650 }
13651
13652 static bool
13653 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13654 {
13655 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13656 asection *sec, *osec;
13657
13658 if (globals == NULL)
13659 return false;
13660
13661 /* Invoke the regular ELF backend linker to do all the work. */
13662 if (!bfd_elf_final_link (abfd, info))
13663 return false;
13664
13665 /* Process stub sections (eg BE8 encoding, ...). */
13666 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13667 unsigned int i;
13668 for (i=0; i<htab->top_id; i++)
13669 {
13670 sec = htab->stub_group[i].stub_sec;
13671 /* Only process it once, in its link_sec slot. */
13672 if (sec && i == htab->stub_group[i].link_sec->id)
13673 {
13674 osec = sec->output_section;
13675 elf32_arm_write_section (abfd, info, sec, sec->contents);
13676 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13677 sec->output_offset, sec->size))
13678 return false;
13679 }
13680 }
13681
13682 /* Write out any glue sections now that we have created all the
13683 stubs. */
13684 if (globals->bfd_of_glue_owner != NULL)
13685 {
13686 if (! elf32_arm_output_glue_section (info, abfd,
13687 globals->bfd_of_glue_owner,
13688 ARM2THUMB_GLUE_SECTION_NAME))
13689 return false;
13690
13691 if (! elf32_arm_output_glue_section (info, abfd,
13692 globals->bfd_of_glue_owner,
13693 THUMB2ARM_GLUE_SECTION_NAME))
13694 return false;
13695
13696 if (! elf32_arm_output_glue_section (info, abfd,
13697 globals->bfd_of_glue_owner,
13698 VFP11_ERRATUM_VENEER_SECTION_NAME))
13699 return false;
13700
13701 if (! elf32_arm_output_glue_section (info, abfd,
13702 globals->bfd_of_glue_owner,
13703 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13704 return false;
13705
13706 if (! elf32_arm_output_glue_section (info, abfd,
13707 globals->bfd_of_glue_owner,
13708 ARM_BX_GLUE_SECTION_NAME))
13709 return false;
13710 }
13711
13712 return true;
13713 }
13714
13715 /* Return a best guess for the machine number based on the attributes. */
13716
13717 static unsigned int
13718 bfd_arm_get_mach_from_attributes (bfd * abfd)
13719 {
13720 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13721
13722 switch (arch)
13723 {
13724 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13725 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13726 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13727 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13728
13729 case TAG_CPU_ARCH_V5TE:
13730 {
13731 char * name;
13732
13733 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13734 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13735
13736 if (name)
13737 {
13738 if (strcmp (name, "IWMMXT2") == 0)
13739 return bfd_mach_arm_iWMMXt2;
13740
13741 if (strcmp (name, "IWMMXT") == 0)
13742 return bfd_mach_arm_iWMMXt;
13743
13744 if (strcmp (name, "XSCALE") == 0)
13745 {
13746 int wmmx;
13747
13748 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13749 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13750 switch (wmmx)
13751 {
13752 case 1: return bfd_mach_arm_iWMMXt;
13753 case 2: return bfd_mach_arm_iWMMXt2;
13754 default: return bfd_mach_arm_XScale;
13755 }
13756 }
13757 }
13758
13759 return bfd_mach_arm_5TE;
13760 }
13761
13762 case TAG_CPU_ARCH_V5TEJ:
13763 return bfd_mach_arm_5TEJ;
13764 case TAG_CPU_ARCH_V6:
13765 return bfd_mach_arm_6;
13766 case TAG_CPU_ARCH_V6KZ:
13767 return bfd_mach_arm_6KZ;
13768 case TAG_CPU_ARCH_V6T2:
13769 return bfd_mach_arm_6T2;
13770 case TAG_CPU_ARCH_V6K:
13771 return bfd_mach_arm_6K;
13772 case TAG_CPU_ARCH_V7:
13773 return bfd_mach_arm_7;
13774 case TAG_CPU_ARCH_V6_M:
13775 return bfd_mach_arm_6M;
13776 case TAG_CPU_ARCH_V6S_M:
13777 return bfd_mach_arm_6SM;
13778 case TAG_CPU_ARCH_V7E_M:
13779 return bfd_mach_arm_7EM;
13780 case TAG_CPU_ARCH_V8:
13781 return bfd_mach_arm_8;
13782 case TAG_CPU_ARCH_V8R:
13783 return bfd_mach_arm_8R;
13784 case TAG_CPU_ARCH_V8M_BASE:
13785 return bfd_mach_arm_8M_BASE;
13786 case TAG_CPU_ARCH_V8M_MAIN:
13787 return bfd_mach_arm_8M_MAIN;
13788 case TAG_CPU_ARCH_V8_1M_MAIN:
13789 return bfd_mach_arm_8_1M_MAIN;
13790
13791 default:
13792 /* Force entry to be added for any new known Tag_CPU_arch value. */
13793 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13794
13795 /* Unknown Tag_CPU_arch value. */
13796 return bfd_mach_arm_unknown;
13797 }
13798 }
13799
13800 /* Set the right machine number. */
13801
13802 static bool
13803 elf32_arm_object_p (bfd *abfd)
13804 {
13805 unsigned int mach;
13806
13807 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13808
13809 if (mach == bfd_mach_arm_unknown)
13810 {
13811 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13812 mach = bfd_mach_arm_ep9312;
13813 else
13814 mach = bfd_arm_get_mach_from_attributes (abfd);
13815 }
13816
13817 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13818 return true;
13819 }
13820
13821 /* Function to keep ARM specific flags in the ELF header. */
13822
13823 static bool
13824 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13825 {
13826 if (elf_flags_init (abfd)
13827 && elf_elfheader (abfd)->e_flags != flags)
13828 {
13829 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13830 {
13831 if (flags & EF_ARM_INTERWORK)
13832 _bfd_error_handler
13833 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13834 abfd);
13835 else
13836 _bfd_error_handler
13837 (_("warning: clearing the interworking flag of %pB due to outside request"),
13838 abfd);
13839 }
13840 }
13841 else
13842 {
13843 elf_elfheader (abfd)->e_flags = flags;
13844 elf_flags_init (abfd) = true;
13845 }
13846
13847 return true;
13848 }
13849
13850 /* Copy backend specific data from one object module to another. */
13851
13852 static bool
13853 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13854 {
13855 flagword in_flags;
13856 flagword out_flags;
13857
13858 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13859 return true;
13860
13861 in_flags = elf_elfheader (ibfd)->e_flags;
13862 out_flags = elf_elfheader (obfd)->e_flags;
13863
13864 if (elf_flags_init (obfd)
13865 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13866 && in_flags != out_flags)
13867 {
13868 /* Cannot mix APCS26 and APCS32 code. */
13869 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13870 return false;
13871
13872 /* Cannot mix float APCS and non-float APCS code. */
13873 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13874 return false;
13875
13876 /* If the src and dest have different interworking flags
13877 then turn off the interworking bit. */
13878 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13879 {
13880 if (out_flags & EF_ARM_INTERWORK)
13881 _bfd_error_handler
13882 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13883 obfd, ibfd);
13884
13885 in_flags &= ~EF_ARM_INTERWORK;
13886 }
13887
13888 /* Likewise for PIC, though don't warn for this case. */
13889 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13890 in_flags &= ~EF_ARM_PIC;
13891 }
13892
13893 elf_elfheader (obfd)->e_flags = in_flags;
13894 elf_flags_init (obfd) = true;
13895
13896 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13897 }
13898
13899 /* Values for Tag_ABI_PCS_R9_use. */
13900 enum
13901 {
13902 AEABI_R9_V6,
13903 AEABI_R9_SB,
13904 AEABI_R9_TLS,
13905 AEABI_R9_unused
13906 };
13907
13908 /* Values for Tag_ABI_PCS_RW_data. */
13909 enum
13910 {
13911 AEABI_PCS_RW_data_absolute,
13912 AEABI_PCS_RW_data_PCrel,
13913 AEABI_PCS_RW_data_SBrel,
13914 AEABI_PCS_RW_data_unused
13915 };
13916
13917 /* Values for Tag_ABI_enum_size. */
13918 enum
13919 {
13920 AEABI_enum_unused,
13921 AEABI_enum_short,
13922 AEABI_enum_wide,
13923 AEABI_enum_forced_wide
13924 };
13925
13926 /* Determine whether an object attribute tag takes an integer, a
13927 string or both. */
13928
13929 static int
13930 elf32_arm_obj_attrs_arg_type (int tag)
13931 {
13932 if (tag == Tag_compatibility)
13933 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13934 else if (tag == Tag_nodefaults)
13935 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13936 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13937 return ATTR_TYPE_FLAG_STR_VAL;
13938 else if (tag < 32)
13939 return ATTR_TYPE_FLAG_INT_VAL;
13940 else
13941 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13942 }
13943
13944 /* The ABI defines that Tag_conformance should be emitted first, and that
13945 Tag_nodefaults should be second (if either is defined). This sets those
13946 two positions, and bumps up the position of all the remaining tags to
13947 compensate. */
13948 static int
13949 elf32_arm_obj_attrs_order (int num)
13950 {
13951 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13952 return Tag_conformance;
13953 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13954 return Tag_nodefaults;
13955 if ((num - 2) < Tag_nodefaults)
13956 return num - 2;
13957 if ((num - 1) < Tag_conformance)
13958 return num - 1;
13959 return num;
13960 }
13961
13962 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13963 static bool
13964 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13965 {
13966 if ((tag & 127) < 64)
13967 {
13968 _bfd_error_handler
13969 (_("%pB: unknown mandatory EABI object attribute %d"),
13970 abfd, tag);
13971 bfd_set_error (bfd_error_bad_value);
13972 return false;
13973 }
13974 else
13975 {
13976 _bfd_error_handler
13977 (_("warning: %pB: unknown EABI object attribute %d"),
13978 abfd, tag);
13979 return true;
13980 }
13981 }
13982
13983 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13984 Returns -1 if no architecture could be read. */
13985
13986 static int
13987 get_secondary_compatible_arch (bfd *abfd)
13988 {
13989 obj_attribute *attr =
13990 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13991
13992 /* Note: the tag and its argument below are uleb128 values, though
13993 currently-defined values fit in one byte for each. */
13994 if (attr->s
13995 && attr->s[0] == Tag_CPU_arch
13996 && (attr->s[1] & 128) != 128
13997 && attr->s[2] == 0)
13998 return attr->s[1];
13999
14000 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14001 return -1;
14002 }
14003
14004 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14005 The tag is removed if ARCH is -1. */
14006
14007 static void
14008 set_secondary_compatible_arch (bfd *abfd, int arch)
14009 {
14010 obj_attribute *attr =
14011 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14012
14013 if (arch == -1)
14014 {
14015 attr->s = NULL;
14016 return;
14017 }
14018
14019 /* Note: the tag and its argument below are uleb128 values, though
14020 currently-defined values fit in one byte for each. */
14021 if (!attr->s)
14022 attr->s = (char *) bfd_alloc (abfd, 3);
14023 attr->s[0] = Tag_CPU_arch;
14024 attr->s[1] = arch;
14025 attr->s[2] = '\0';
14026 }
14027
14028 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14029 into account. */
14030
14031 static int
14032 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14033 int newtag, int secondary_compat)
14034 {
14035 #define T(X) TAG_CPU_ARCH_##X
14036 int tagl, tagh, result;
14037 const int v6t2[] =
14038 {
14039 T(V6T2), /* PRE_V4. */
14040 T(V6T2), /* V4. */
14041 T(V6T2), /* V4T. */
14042 T(V6T2), /* V5T. */
14043 T(V6T2), /* V5TE. */
14044 T(V6T2), /* V5TEJ. */
14045 T(V6T2), /* V6. */
14046 T(V7), /* V6KZ. */
14047 T(V6T2) /* V6T2. */
14048 };
14049 const int v6k[] =
14050 {
14051 T(V6K), /* PRE_V4. */
14052 T(V6K), /* V4. */
14053 T(V6K), /* V4T. */
14054 T(V6K), /* V5T. */
14055 T(V6K), /* V5TE. */
14056 T(V6K), /* V5TEJ. */
14057 T(V6K), /* V6. */
14058 T(V6KZ), /* V6KZ. */
14059 T(V7), /* V6T2. */
14060 T(V6K) /* V6K. */
14061 };
14062 const int v7[] =
14063 {
14064 T(V7), /* PRE_V4. */
14065 T(V7), /* V4. */
14066 T(V7), /* V4T. */
14067 T(V7), /* V5T. */
14068 T(V7), /* V5TE. */
14069 T(V7), /* V5TEJ. */
14070 T(V7), /* V6. */
14071 T(V7), /* V6KZ. */
14072 T(V7), /* V6T2. */
14073 T(V7), /* V6K. */
14074 T(V7) /* V7. */
14075 };
14076 const int v6_m[] =
14077 {
14078 -1, /* PRE_V4. */
14079 -1, /* V4. */
14080 T(V6K), /* V4T. */
14081 T(V6K), /* V5T. */
14082 T(V6K), /* V5TE. */
14083 T(V6K), /* V5TEJ. */
14084 T(V6K), /* V6. */
14085 T(V6KZ), /* V6KZ. */
14086 T(V7), /* V6T2. */
14087 T(V6K), /* V6K. */
14088 T(V7), /* V7. */
14089 T(V6_M) /* V6_M. */
14090 };
14091 const int v6s_m[] =
14092 {
14093 -1, /* PRE_V4. */
14094 -1, /* V4. */
14095 T(V6K), /* V4T. */
14096 T(V6K), /* V5T. */
14097 T(V6K), /* V5TE. */
14098 T(V6K), /* V5TEJ. */
14099 T(V6K), /* V6. */
14100 T(V6KZ), /* V6KZ. */
14101 T(V7), /* V6T2. */
14102 T(V6K), /* V6K. */
14103 T(V7), /* V7. */
14104 T(V6S_M), /* V6_M. */
14105 T(V6S_M) /* V6S_M. */
14106 };
14107 const int v7e_m[] =
14108 {
14109 -1, /* PRE_V4. */
14110 -1, /* V4. */
14111 T(V7E_M), /* V4T. */
14112 T(V7E_M), /* V5T. */
14113 T(V7E_M), /* V5TE. */
14114 T(V7E_M), /* V5TEJ. */
14115 T(V7E_M), /* V6. */
14116 T(V7E_M), /* V6KZ. */
14117 T(V7E_M), /* V6T2. */
14118 T(V7E_M), /* V6K. */
14119 T(V7E_M), /* V7. */
14120 T(V7E_M), /* V6_M. */
14121 T(V7E_M), /* V6S_M. */
14122 T(V7E_M) /* V7E_M. */
14123 };
14124 const int v8[] =
14125 {
14126 T(V8), /* PRE_V4. */
14127 T(V8), /* V4. */
14128 T(V8), /* V4T. */
14129 T(V8), /* V5T. */
14130 T(V8), /* V5TE. */
14131 T(V8), /* V5TEJ. */
14132 T(V8), /* V6. */
14133 T(V8), /* V6KZ. */
14134 T(V8), /* V6T2. */
14135 T(V8), /* V6K. */
14136 T(V8), /* V7. */
14137 T(V8), /* V6_M. */
14138 T(V8), /* V6S_M. */
14139 T(V8), /* V7E_M. */
14140 T(V8) /* V8. */
14141 };
14142 const int v8r[] =
14143 {
14144 T(V8R), /* PRE_V4. */
14145 T(V8R), /* V4. */
14146 T(V8R), /* V4T. */
14147 T(V8R), /* V5T. */
14148 T(V8R), /* V5TE. */
14149 T(V8R), /* V5TEJ. */
14150 T(V8R), /* V6. */
14151 T(V8R), /* V6KZ. */
14152 T(V8R), /* V6T2. */
14153 T(V8R), /* V6K. */
14154 T(V8R), /* V7. */
14155 T(V8R), /* V6_M. */
14156 T(V8R), /* V6S_M. */
14157 T(V8R), /* V7E_M. */
14158 T(V8), /* V8. */
14159 T(V8R), /* V8R. */
14160 };
14161 const int v8m_baseline[] =
14162 {
14163 -1, /* PRE_V4. */
14164 -1, /* V4. */
14165 -1, /* V4T. */
14166 -1, /* V5T. */
14167 -1, /* V5TE. */
14168 -1, /* V5TEJ. */
14169 -1, /* V6. */
14170 -1, /* V6KZ. */
14171 -1, /* V6T2. */
14172 -1, /* V6K. */
14173 -1, /* V7. */
14174 T(V8M_BASE), /* V6_M. */
14175 T(V8M_BASE), /* V6S_M. */
14176 -1, /* V7E_M. */
14177 -1, /* V8. */
14178 -1, /* V8R. */
14179 T(V8M_BASE) /* V8-M BASELINE. */
14180 };
14181 const int v8m_mainline[] =
14182 {
14183 -1, /* PRE_V4. */
14184 -1, /* V4. */
14185 -1, /* V4T. */
14186 -1, /* V5T. */
14187 -1, /* V5TE. */
14188 -1, /* V5TEJ. */
14189 -1, /* V6. */
14190 -1, /* V6KZ. */
14191 -1, /* V6T2. */
14192 -1, /* V6K. */
14193 T(V8M_MAIN), /* V7. */
14194 T(V8M_MAIN), /* V6_M. */
14195 T(V8M_MAIN), /* V6S_M. */
14196 T(V8M_MAIN), /* V7E_M. */
14197 -1, /* V8. */
14198 -1, /* V8R. */
14199 T(V8M_MAIN), /* V8-M BASELINE. */
14200 T(V8M_MAIN) /* V8-M MAINLINE. */
14201 };
14202 const int v8_1m_mainline[] =
14203 {
14204 -1, /* PRE_V4. */
14205 -1, /* V4. */
14206 -1, /* V4T. */
14207 -1, /* V5T. */
14208 -1, /* V5TE. */
14209 -1, /* V5TEJ. */
14210 -1, /* V6. */
14211 -1, /* V6KZ. */
14212 -1, /* V6T2. */
14213 -1, /* V6K. */
14214 T(V8_1M_MAIN), /* V7. */
14215 T(V8_1M_MAIN), /* V6_M. */
14216 T(V8_1M_MAIN), /* V6S_M. */
14217 T(V8_1M_MAIN), /* V7E_M. */
14218 -1, /* V8. */
14219 -1, /* V8R. */
14220 T(V8_1M_MAIN), /* V8-M BASELINE. */
14221 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14222 -1, /* Unused (18). */
14223 -1, /* Unused (19). */
14224 -1, /* Unused (20). */
14225 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14226 };
14227 const int v4t_plus_v6_m[] =
14228 {
14229 -1, /* PRE_V4. */
14230 -1, /* V4. */
14231 T(V4T), /* V4T. */
14232 T(V5T), /* V5T. */
14233 T(V5TE), /* V5TE. */
14234 T(V5TEJ), /* V5TEJ. */
14235 T(V6), /* V6. */
14236 T(V6KZ), /* V6KZ. */
14237 T(V6T2), /* V6T2. */
14238 T(V6K), /* V6K. */
14239 T(V7), /* V7. */
14240 T(V6_M), /* V6_M. */
14241 T(V6S_M), /* V6S_M. */
14242 T(V7E_M), /* V7E_M. */
14243 T(V8), /* V8. */
14244 -1, /* V8R. */
14245 T(V8M_BASE), /* V8-M BASELINE. */
14246 T(V8M_MAIN), /* V8-M MAINLINE. */
14247 -1, /* Unused (18). */
14248 -1, /* Unused (19). */
14249 -1, /* Unused (20). */
14250 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14251 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14252 };
14253 const int *comb[] =
14254 {
14255 v6t2,
14256 v6k,
14257 v7,
14258 v6_m,
14259 v6s_m,
14260 v7e_m,
14261 v8,
14262 v8r,
14263 v8m_baseline,
14264 v8m_mainline,
14265 NULL,
14266 NULL,
14267 NULL,
14268 v8_1m_mainline,
14269 /* Pseudo-architecture. */
14270 v4t_plus_v6_m
14271 };
14272
14273 /* Check we've not got a higher architecture than we know about. */
14274
14275 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14276 {
14277 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14278 return -1;
14279 }
14280
14281 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14282
14283 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14284 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14285 oldtag = T(V4T_PLUS_V6_M);
14286
14287 /* And override the new tag if we have a Tag_also_compatible_with on the
14288 input. */
14289
14290 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14291 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14292 newtag = T(V4T_PLUS_V6_M);
14293
14294 tagl = (oldtag < newtag) ? oldtag : newtag;
14295 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14296
14297 /* Architectures before V6KZ add features monotonically. */
14298 if (tagh <= TAG_CPU_ARCH_V6KZ)
14299 return result;
14300
14301 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14302
14303 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14304 as the canonical version. */
14305 if (result == T(V4T_PLUS_V6_M))
14306 {
14307 result = T(V4T);
14308 *secondary_compat_out = T(V6_M);
14309 }
14310 else
14311 *secondary_compat_out = -1;
14312
14313 if (result == -1)
14314 {
14315 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14316 ibfd, oldtag, newtag);
14317 return -1;
14318 }
14319
14320 return result;
14321 #undef T
14322 }
14323
14324 /* Query attributes object to see if integer divide instructions may be
14325 present in an object. */
14326 static bool
14327 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14328 {
14329 int arch = attr[Tag_CPU_arch].i;
14330 int profile = attr[Tag_CPU_arch_profile].i;
14331
14332 switch (attr[Tag_DIV_use].i)
14333 {
14334 case 0:
14335 /* Integer divide allowed if instruction contained in archetecture. */
14336 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14337 return true;
14338 else if (arch >= TAG_CPU_ARCH_V7E_M)
14339 return true;
14340 else
14341 return false;
14342
14343 case 1:
14344 /* Integer divide explicitly prohibited. */
14345 return false;
14346
14347 default:
14348 /* Unrecognised case - treat as allowing divide everywhere. */
14349 case 2:
14350 /* Integer divide allowed in ARM state. */
14351 return true;
14352 }
14353 }
14354
14355 /* Query attributes object to see if integer divide instructions are
14356 forbidden to be in the object. This is not the inverse of
14357 elf32_arm_attributes_accept_div. */
14358 static bool
14359 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14360 {
14361 return attr[Tag_DIV_use].i == 1;
14362 }
14363
14364 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14365 are conflicting attributes. */
14366
14367 static bool
14368 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14369 {
14370 bfd *obfd = info->output_bfd;
14371 obj_attribute *in_attr;
14372 obj_attribute *out_attr;
14373 /* Some tags have 0 = don't care, 1 = strong requirement,
14374 2 = weak requirement. */
14375 static const int order_021[3] = {0, 2, 1};
14376 int i;
14377 bool result = true;
14378 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14379
14380 /* Skip the linker stubs file. This preserves previous behavior
14381 of accepting unknown attributes in the first input file - but
14382 is that a bug? */
14383 if (ibfd->flags & BFD_LINKER_CREATED)
14384 return true;
14385
14386 /* Skip any input that hasn't attribute section.
14387 This enables to link object files without attribute section with
14388 any others. */
14389 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14390 return true;
14391
14392 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14393 {
14394 /* This is the first object. Copy the attributes. */
14395 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14396
14397 out_attr = elf_known_obj_attributes_proc (obfd);
14398
14399 /* Use the Tag_null value to indicate the attributes have been
14400 initialized. */
14401 out_attr[0].i = 1;
14402
14403 /* We do not output objects with Tag_MPextension_use_legacy - we move
14404 the attribute's value to Tag_MPextension_use. */
14405 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14406 {
14407 if (out_attr[Tag_MPextension_use].i != 0
14408 && out_attr[Tag_MPextension_use_legacy].i
14409 != out_attr[Tag_MPextension_use].i)
14410 {
14411 _bfd_error_handler
14412 (_("Error: %pB has both the current and legacy "
14413 "Tag_MPextension_use attributes"), ibfd);
14414 result = false;
14415 }
14416
14417 out_attr[Tag_MPextension_use] =
14418 out_attr[Tag_MPextension_use_legacy];
14419 out_attr[Tag_MPextension_use_legacy].type = 0;
14420 out_attr[Tag_MPextension_use_legacy].i = 0;
14421 }
14422
14423 return result;
14424 }
14425
14426 in_attr = elf_known_obj_attributes_proc (ibfd);
14427 out_attr = elf_known_obj_attributes_proc (obfd);
14428 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14429 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14430 {
14431 /* Ignore mismatches if the object doesn't use floating point or is
14432 floating point ABI independent. */
14433 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14434 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14435 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14436 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14437 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14438 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14439 {
14440 _bfd_error_handler
14441 (_("error: %pB uses VFP register arguments, %pB does not"),
14442 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14443 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14444 result = false;
14445 }
14446 }
14447
14448 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14449 {
14450 /* Merge this attribute with existing attributes. */
14451 switch (i)
14452 {
14453 case Tag_CPU_raw_name:
14454 case Tag_CPU_name:
14455 /* These are merged after Tag_CPU_arch. */
14456 break;
14457
14458 case Tag_ABI_optimization_goals:
14459 case Tag_ABI_FP_optimization_goals:
14460 /* Use the first value seen. */
14461 break;
14462
14463 case Tag_CPU_arch:
14464 {
14465 int secondary_compat = -1, secondary_compat_out = -1;
14466 unsigned int saved_out_attr = out_attr[i].i;
14467 int arch_attr;
14468 static const char *name_table[] =
14469 {
14470 /* These aren't real CPU names, but we can't guess
14471 that from the architecture version alone. */
14472 "Pre v4",
14473 "ARM v4",
14474 "ARM v4T",
14475 "ARM v5T",
14476 "ARM v5TE",
14477 "ARM v5TEJ",
14478 "ARM v6",
14479 "ARM v6KZ",
14480 "ARM v6T2",
14481 "ARM v6K",
14482 "ARM v7",
14483 "ARM v6-M",
14484 "ARM v6S-M",
14485 "ARM v8",
14486 "",
14487 "ARM v8-M.baseline",
14488 "ARM v8-M.mainline",
14489 };
14490
14491 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14492 secondary_compat = get_secondary_compatible_arch (ibfd);
14493 secondary_compat_out = get_secondary_compatible_arch (obfd);
14494 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14495 &secondary_compat_out,
14496 in_attr[i].i,
14497 secondary_compat);
14498
14499 /* Return with error if failed to merge. */
14500 if (arch_attr == -1)
14501 return false;
14502
14503 out_attr[i].i = arch_attr;
14504
14505 set_secondary_compatible_arch (obfd, secondary_compat_out);
14506
14507 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14508 if (out_attr[i].i == saved_out_attr)
14509 ; /* Leave the names alone. */
14510 else if (out_attr[i].i == in_attr[i].i)
14511 {
14512 /* The output architecture has been changed to match the
14513 input architecture. Use the input names. */
14514 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14515 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14516 : NULL;
14517 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14518 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14519 : NULL;
14520 }
14521 else
14522 {
14523 out_attr[Tag_CPU_name].s = NULL;
14524 out_attr[Tag_CPU_raw_name].s = NULL;
14525 }
14526
14527 /* If we still don't have a value for Tag_CPU_name,
14528 make one up now. Tag_CPU_raw_name remains blank. */
14529 if (out_attr[Tag_CPU_name].s == NULL
14530 && out_attr[i].i < ARRAY_SIZE (name_table))
14531 out_attr[Tag_CPU_name].s =
14532 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14533 }
14534 break;
14535
14536 case Tag_ARM_ISA_use:
14537 case Tag_THUMB_ISA_use:
14538 case Tag_WMMX_arch:
14539 case Tag_Advanced_SIMD_arch:
14540 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14541 case Tag_ABI_FP_rounding:
14542 case Tag_ABI_FP_exceptions:
14543 case Tag_ABI_FP_user_exceptions:
14544 case Tag_ABI_FP_number_model:
14545 case Tag_FP_HP_extension:
14546 case Tag_CPU_unaligned_access:
14547 case Tag_T2EE_use:
14548 case Tag_MPextension_use:
14549 case Tag_MVE_arch:
14550 /* Use the largest value specified. */
14551 if (in_attr[i].i > out_attr[i].i)
14552 out_attr[i].i = in_attr[i].i;
14553 break;
14554
14555 case Tag_ABI_align_preserved:
14556 case Tag_ABI_PCS_RO_data:
14557 /* Use the smallest value specified. */
14558 if (in_attr[i].i < out_attr[i].i)
14559 out_attr[i].i = in_attr[i].i;
14560 break;
14561
14562 case Tag_ABI_align_needed:
14563 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14564 && (in_attr[Tag_ABI_align_preserved].i == 0
14565 || out_attr[Tag_ABI_align_preserved].i == 0))
14566 {
14567 /* This error message should be enabled once all non-conformant
14568 binaries in the toolchain have had the attributes set
14569 properly.
14570 _bfd_error_handler
14571 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14572 obfd, ibfd);
14573 result = false; */
14574 }
14575 /* Fall through. */
14576 case Tag_ABI_FP_denormal:
14577 case Tag_ABI_PCS_GOT_use:
14578 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14579 value if greater than 2 (for future-proofing). */
14580 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14581 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14582 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14583 out_attr[i].i = in_attr[i].i;
14584 break;
14585
14586 case Tag_Virtualization_use:
14587 /* The virtualization tag effectively stores two bits of
14588 information: the intended use of TrustZone (in bit 0), and the
14589 intended use of Virtualization (in bit 1). */
14590 if (out_attr[i].i == 0)
14591 out_attr[i].i = in_attr[i].i;
14592 else if (in_attr[i].i != 0
14593 && in_attr[i].i != out_attr[i].i)
14594 {
14595 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14596 out_attr[i].i = 3;
14597 else
14598 {
14599 _bfd_error_handler
14600 (_("error: %pB: unable to merge virtualization attributes "
14601 "with %pB"),
14602 obfd, ibfd);
14603 result = false;
14604 }
14605 }
14606 break;
14607
14608 case Tag_CPU_arch_profile:
14609 if (out_attr[i].i != in_attr[i].i)
14610 {
14611 /* 0 will merge with anything.
14612 'A' and 'S' merge to 'A'.
14613 'R' and 'S' merge to 'R'.
14614 'M' and 'A|R|S' is an error. */
14615 if (out_attr[i].i == 0
14616 || (out_attr[i].i == 'S'
14617 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14618 out_attr[i].i = in_attr[i].i;
14619 else if (in_attr[i].i == 0
14620 || (in_attr[i].i == 'S'
14621 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14622 ; /* Do nothing. */
14623 else
14624 {
14625 _bfd_error_handler
14626 (_("error: %pB: conflicting architecture profiles %c/%c"),
14627 ibfd,
14628 in_attr[i].i ? in_attr[i].i : '0',
14629 out_attr[i].i ? out_attr[i].i : '0');
14630 result = false;
14631 }
14632 }
14633 break;
14634
14635 case Tag_DSP_extension:
14636 /* No need to change output value if any of:
14637 - pre (<=) ARMv5T input architecture (do not have DSP)
14638 - M input profile not ARMv7E-M and do not have DSP. */
14639 if (in_attr[Tag_CPU_arch].i <= 3
14640 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14641 && in_attr[Tag_CPU_arch].i != 13
14642 && in_attr[i].i == 0))
14643 ; /* Do nothing. */
14644 /* Output value should be 0 if DSP part of architecture, ie.
14645 - post (>=) ARMv5te architecture output
14646 - A, R or S profile output or ARMv7E-M output architecture. */
14647 else if (out_attr[Tag_CPU_arch].i >= 4
14648 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14649 || out_attr[Tag_CPU_arch_profile].i == 'R'
14650 || out_attr[Tag_CPU_arch_profile].i == 'S'
14651 || out_attr[Tag_CPU_arch].i == 13))
14652 out_attr[i].i = 0;
14653 /* Otherwise, DSP instructions are added and not part of output
14654 architecture. */
14655 else
14656 out_attr[i].i = 1;
14657 break;
14658
14659 case Tag_FP_arch:
14660 {
14661 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14662 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14663 when it's 0. It might mean absence of FP hardware if
14664 Tag_FP_arch is zero. */
14665
14666 #define VFP_VERSION_COUNT 9
14667 static const struct
14668 {
14669 int ver;
14670 int regs;
14671 } vfp_versions[VFP_VERSION_COUNT] =
14672 {
14673 {0, 0},
14674 {1, 16},
14675 {2, 16},
14676 {3, 32},
14677 {3, 16},
14678 {4, 32},
14679 {4, 16},
14680 {8, 32},
14681 {8, 16}
14682 };
14683 int ver;
14684 int regs;
14685 int newval;
14686
14687 /* If the output has no requirement about FP hardware,
14688 follow the requirement of the input. */
14689 if (out_attr[i].i == 0)
14690 {
14691 /* This assert is still reasonable, we shouldn't
14692 produce the suspicious build attribute
14693 combination (See below for in_attr). */
14694 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14695 out_attr[i].i = in_attr[i].i;
14696 out_attr[Tag_ABI_HardFP_use].i
14697 = in_attr[Tag_ABI_HardFP_use].i;
14698 break;
14699 }
14700 /* If the input has no requirement about FP hardware, do
14701 nothing. */
14702 else if (in_attr[i].i == 0)
14703 {
14704 /* We used to assert that Tag_ABI_HardFP_use was
14705 zero here, but we should never assert when
14706 consuming an object file that has suspicious
14707 build attributes. The single precision variant
14708 of 'no FP architecture' is still 'no FP
14709 architecture', so we just ignore the tag in this
14710 case. */
14711 break;
14712 }
14713
14714 /* Both the input and the output have nonzero Tag_FP_arch.
14715 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14716
14717 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14718 do nothing. */
14719 if (in_attr[Tag_ABI_HardFP_use].i == 0
14720 && out_attr[Tag_ABI_HardFP_use].i == 0)
14721 ;
14722 /* If the input and the output have different Tag_ABI_HardFP_use,
14723 the combination of them is 0 (implied by Tag_FP_arch). */
14724 else if (in_attr[Tag_ABI_HardFP_use].i
14725 != out_attr[Tag_ABI_HardFP_use].i)
14726 out_attr[Tag_ABI_HardFP_use].i = 0;
14727
14728 /* Now we can handle Tag_FP_arch. */
14729
14730 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14731 pick the biggest. */
14732 if (in_attr[i].i >= VFP_VERSION_COUNT
14733 && in_attr[i].i > out_attr[i].i)
14734 {
14735 out_attr[i] = in_attr[i];
14736 break;
14737 }
14738 /* The output uses the superset of input features
14739 (ISA version) and registers. */
14740 ver = vfp_versions[in_attr[i].i].ver;
14741 if (ver < vfp_versions[out_attr[i].i].ver)
14742 ver = vfp_versions[out_attr[i].i].ver;
14743 regs = vfp_versions[in_attr[i].i].regs;
14744 if (regs < vfp_versions[out_attr[i].i].regs)
14745 regs = vfp_versions[out_attr[i].i].regs;
14746 /* This assumes all possible supersets are also a valid
14747 options. */
14748 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14749 {
14750 if (regs == vfp_versions[newval].regs
14751 && ver == vfp_versions[newval].ver)
14752 break;
14753 }
14754 out_attr[i].i = newval;
14755 }
14756 break;
14757 case Tag_PCS_config:
14758 if (out_attr[i].i == 0)
14759 out_attr[i].i = in_attr[i].i;
14760 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14761 {
14762 /* It's sometimes ok to mix different configs, so this is only
14763 a warning. */
14764 _bfd_error_handler
14765 (_("warning: %pB: conflicting platform configuration"), ibfd);
14766 }
14767 break;
14768 case Tag_ABI_PCS_R9_use:
14769 if (in_attr[i].i != out_attr[i].i
14770 && out_attr[i].i != AEABI_R9_unused
14771 && in_attr[i].i != AEABI_R9_unused)
14772 {
14773 _bfd_error_handler
14774 (_("error: %pB: conflicting use of R9"), ibfd);
14775 result = false;
14776 }
14777 if (out_attr[i].i == AEABI_R9_unused)
14778 out_attr[i].i = in_attr[i].i;
14779 break;
14780 case Tag_ABI_PCS_RW_data:
14781 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14782 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14783 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14784 {
14785 _bfd_error_handler
14786 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14787 ibfd);
14788 result = false;
14789 }
14790 /* Use the smallest value specified. */
14791 if (in_attr[i].i < out_attr[i].i)
14792 out_attr[i].i = in_attr[i].i;
14793 break;
14794 case Tag_ABI_PCS_wchar_t:
14795 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14796 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14797 {
14798 _bfd_error_handler
14799 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14800 ibfd, in_attr[i].i, out_attr[i].i);
14801 }
14802 else if (in_attr[i].i && !out_attr[i].i)
14803 out_attr[i].i = in_attr[i].i;
14804 break;
14805 case Tag_ABI_enum_size:
14806 if (in_attr[i].i != AEABI_enum_unused)
14807 {
14808 if (out_attr[i].i == AEABI_enum_unused
14809 || out_attr[i].i == AEABI_enum_forced_wide)
14810 {
14811 /* The existing object is compatible with anything.
14812 Use whatever requirements the new object has. */
14813 out_attr[i].i = in_attr[i].i;
14814 }
14815 else if (in_attr[i].i != AEABI_enum_forced_wide
14816 && out_attr[i].i != in_attr[i].i
14817 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14818 {
14819 static const char *aeabi_enum_names[] =
14820 { "", "variable-size", "32-bit", "" };
14821 const char *in_name =
14822 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14823 ? aeabi_enum_names[in_attr[i].i]
14824 : "<unknown>";
14825 const char *out_name =
14826 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14827 ? aeabi_enum_names[out_attr[i].i]
14828 : "<unknown>";
14829 _bfd_error_handler
14830 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14831 ibfd, in_name, out_name);
14832 }
14833 }
14834 break;
14835 case Tag_ABI_VFP_args:
14836 /* Aready done. */
14837 break;
14838 case Tag_ABI_WMMX_args:
14839 if (in_attr[i].i != out_attr[i].i)
14840 {
14841 _bfd_error_handler
14842 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14843 ibfd, obfd);
14844 result = false;
14845 }
14846 break;
14847 case Tag_compatibility:
14848 /* Merged in target-independent code. */
14849 break;
14850 case Tag_ABI_HardFP_use:
14851 /* This is handled along with Tag_FP_arch. */
14852 break;
14853 case Tag_ABI_FP_16bit_format:
14854 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14855 {
14856 if (in_attr[i].i != out_attr[i].i)
14857 {
14858 _bfd_error_handler
14859 (_("error: fp16 format mismatch between %pB and %pB"),
14860 ibfd, obfd);
14861 result = false;
14862 }
14863 }
14864 if (in_attr[i].i != 0)
14865 out_attr[i].i = in_attr[i].i;
14866 break;
14867
14868 case Tag_DIV_use:
14869 /* A value of zero on input means that the divide instruction may
14870 be used if available in the base architecture as specified via
14871 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14872 the user did not want divide instructions. A value of 2
14873 explicitly means that divide instructions were allowed in ARM
14874 and Thumb state. */
14875 if (in_attr[i].i == out_attr[i].i)
14876 /* Do nothing. */ ;
14877 else if (elf32_arm_attributes_forbid_div (in_attr)
14878 && !elf32_arm_attributes_accept_div (out_attr))
14879 out_attr[i].i = 1;
14880 else if (elf32_arm_attributes_forbid_div (out_attr)
14881 && elf32_arm_attributes_accept_div (in_attr))
14882 out_attr[i].i = in_attr[i].i;
14883 else if (in_attr[i].i == 2)
14884 out_attr[i].i = in_attr[i].i;
14885 break;
14886
14887 case Tag_MPextension_use_legacy:
14888 /* We don't output objects with Tag_MPextension_use_legacy - we
14889 move the value to Tag_MPextension_use. */
14890 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14891 {
14892 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14893 {
14894 _bfd_error_handler
14895 (_("%pB has both the current and legacy "
14896 "Tag_MPextension_use attributes"),
14897 ibfd);
14898 result = false;
14899 }
14900 }
14901
14902 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14903 out_attr[Tag_MPextension_use] = in_attr[i];
14904
14905 break;
14906
14907 case Tag_nodefaults:
14908 /* This tag is set if it exists, but the value is unused (and is
14909 typically zero). We don't actually need to do anything here -
14910 the merge happens automatically when the type flags are merged
14911 below. */
14912 break;
14913 case Tag_also_compatible_with:
14914 /* Already done in Tag_CPU_arch. */
14915 break;
14916 case Tag_conformance:
14917 /* Keep the attribute if it matches. Throw it away otherwise.
14918 No attribute means no claim to conform. */
14919 if (!in_attr[i].s || !out_attr[i].s
14920 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14921 out_attr[i].s = NULL;
14922 break;
14923
14924 default:
14925 result
14926 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14927 }
14928
14929 /* If out_attr was copied from in_attr then it won't have a type yet. */
14930 if (in_attr[i].type && !out_attr[i].type)
14931 out_attr[i].type = in_attr[i].type;
14932 }
14933
14934 /* Merge Tag_compatibility attributes and any common GNU ones. */
14935 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14936 return false;
14937
14938 /* Check for any attributes not known on ARM. */
14939 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14940
14941 return result;
14942 }
14943
14944
14945 /* Return TRUE if the two EABI versions are incompatible. */
14946
14947 static bool
14948 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14949 {
14950 /* v4 and v5 are the same spec before and after it was released,
14951 so allow mixing them. */
14952 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14953 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14954 return true;
14955
14956 return (iver == over);
14957 }
14958
14959 /* Merge backend specific data from an object file to the output
14960 object file when linking. */
14961
14962 static bool
14963 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14964
14965 /* Display the flags field. */
14966
14967 static bool
14968 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14969 {
14970 FILE * file = (FILE *) ptr;
14971 unsigned long flags;
14972
14973 BFD_ASSERT (abfd != NULL && ptr != NULL);
14974
14975 /* Print normal ELF private data. */
14976 _bfd_elf_print_private_bfd_data (abfd, ptr);
14977
14978 flags = elf_elfheader (abfd)->e_flags;
14979 /* Ignore init flag - it may not be set, despite the flags field
14980 containing valid data. */
14981
14982 fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
14983
14984 switch (EF_ARM_EABI_VERSION (flags))
14985 {
14986 case EF_ARM_EABI_UNKNOWN:
14987 /* The following flag bits are GNU extensions and not part of the
14988 official ARM ELF extended ABI. Hence they are only decoded if
14989 the EABI version is not set. */
14990 if (flags & EF_ARM_INTERWORK)
14991 fprintf (file, _(" [interworking enabled]"));
14992
14993 if (flags & EF_ARM_APCS_26)
14994 fprintf (file, " [APCS-26]");
14995 else
14996 fprintf (file, " [APCS-32]");
14997
14998 if (flags & EF_ARM_VFP_FLOAT)
14999 fprintf (file, _(" [VFP float format]"));
15000 else if (flags & EF_ARM_MAVERICK_FLOAT)
15001 fprintf (file, _(" [Maverick float format]"));
15002 else
15003 fprintf (file, _(" [FPA float format]"));
15004
15005 if (flags & EF_ARM_APCS_FLOAT)
15006 fprintf (file, _(" [floats passed in float registers]"));
15007
15008 if (flags & EF_ARM_PIC)
15009 fprintf (file, _(" [position independent]"));
15010
15011 if (flags & EF_ARM_NEW_ABI)
15012 fprintf (file, _(" [new ABI]"));
15013
15014 if (flags & EF_ARM_OLD_ABI)
15015 fprintf (file, _(" [old ABI]"));
15016
15017 if (flags & EF_ARM_SOFT_FLOAT)
15018 fprintf (file, _(" [software FP]"));
15019
15020 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15021 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15022 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15023 | EF_ARM_MAVERICK_FLOAT);
15024 break;
15025
15026 case EF_ARM_EABI_VER1:
15027 fprintf (file, _(" [Version1 EABI]"));
15028
15029 if (flags & EF_ARM_SYMSARESORTED)
15030 fprintf (file, _(" [sorted symbol table]"));
15031 else
15032 fprintf (file, _(" [unsorted symbol table]"));
15033
15034 flags &= ~ EF_ARM_SYMSARESORTED;
15035 break;
15036
15037 case EF_ARM_EABI_VER2:
15038 fprintf (file, _(" [Version2 EABI]"));
15039
15040 if (flags & EF_ARM_SYMSARESORTED)
15041 fprintf (file, _(" [sorted symbol table]"));
15042 else
15043 fprintf (file, _(" [unsorted symbol table]"));
15044
15045 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15046 fprintf (file, _(" [dynamic symbols use segment index]"));
15047
15048 if (flags & EF_ARM_MAPSYMSFIRST)
15049 fprintf (file, _(" [mapping symbols precede others]"));
15050
15051 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15052 | EF_ARM_MAPSYMSFIRST);
15053 break;
15054
15055 case EF_ARM_EABI_VER3:
15056 fprintf (file, _(" [Version3 EABI]"));
15057 break;
15058
15059 case EF_ARM_EABI_VER4:
15060 fprintf (file, _(" [Version4 EABI]"));
15061 goto eabi;
15062
15063 case EF_ARM_EABI_VER5:
15064 fprintf (file, _(" [Version5 EABI]"));
15065
15066 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15067 fprintf (file, _(" [soft-float ABI]"));
15068
15069 if (flags & EF_ARM_ABI_FLOAT_HARD)
15070 fprintf (file, _(" [hard-float ABI]"));
15071
15072 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15073
15074 eabi:
15075 if (flags & EF_ARM_BE8)
15076 fprintf (file, _(" [BE8]"));
15077
15078 if (flags & EF_ARM_LE8)
15079 fprintf (file, _(" [LE8]"));
15080
15081 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15082 break;
15083
15084 default:
15085 fprintf (file, _(" <EABI version unrecognised>"));
15086 break;
15087 }
15088
15089 flags &= ~ EF_ARM_EABIMASK;
15090
15091 if (flags & EF_ARM_RELEXEC)
15092 fprintf (file, _(" [relocatable executable]"));
15093
15094 if (flags & EF_ARM_PIC)
15095 fprintf (file, _(" [position independent]"));
15096
15097 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15098 fprintf (file, _(" [FDPIC ABI supplement]"));
15099
15100 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15101
15102 if (flags)
15103 fprintf (file, _(" <Unrecognised flag bits set>"));
15104
15105 fputc ('\n', file);
15106
15107 return true;
15108 }
15109
15110 static int
15111 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15112 {
15113 switch (ELF_ST_TYPE (elf_sym->st_info))
15114 {
15115 case STT_ARM_TFUNC:
15116 return ELF_ST_TYPE (elf_sym->st_info);
15117
15118 case STT_ARM_16BIT:
15119 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15120 This allows us to distinguish between data used by Thumb instructions
15121 and non-data (which is probably code) inside Thumb regions of an
15122 executable. */
15123 if (type != STT_OBJECT && type != STT_TLS)
15124 return ELF_ST_TYPE (elf_sym->st_info);
15125 break;
15126
15127 default:
15128 break;
15129 }
15130
15131 return type;
15132 }
15133
15134 static asection *
15135 elf32_arm_gc_mark_hook (asection *sec,
15136 struct bfd_link_info *info,
15137 Elf_Internal_Rela *rel,
15138 struct elf_link_hash_entry *h,
15139 Elf_Internal_Sym *sym)
15140 {
15141 if (h != NULL)
15142 switch (ELF32_R_TYPE (rel->r_info))
15143 {
15144 case R_ARM_GNU_VTINHERIT:
15145 case R_ARM_GNU_VTENTRY:
15146 return NULL;
15147 }
15148
15149 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15150 }
15151
15152 /* Look through the relocs for a section during the first phase. */
15153
15154 static bool
15155 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15156 asection *sec, const Elf_Internal_Rela *relocs)
15157 {
15158 Elf_Internal_Shdr *symtab_hdr;
15159 struct elf_link_hash_entry **sym_hashes;
15160 const Elf_Internal_Rela *rel;
15161 const Elf_Internal_Rela *rel_end;
15162 bfd *dynobj;
15163 asection *sreloc;
15164 struct elf32_arm_link_hash_table *htab;
15165 bool call_reloc_p;
15166 bool may_become_dynamic_p;
15167 bool may_need_local_target_p;
15168 unsigned long nsyms;
15169
15170 if (bfd_link_relocatable (info))
15171 return true;
15172
15173 BFD_ASSERT (is_arm_elf (abfd));
15174
15175 htab = elf32_arm_hash_table (info);
15176 if (htab == NULL)
15177 return false;
15178
15179 sreloc = NULL;
15180
15181 /* Create dynamic sections for relocatable executables so that we can
15182 copy relocations. */
15183 if (htab->root.is_relocatable_executable
15184 && ! htab->root.dynamic_sections_created)
15185 {
15186 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15187 return false;
15188 }
15189
15190 if (htab->root.dynobj == NULL)
15191 htab->root.dynobj = abfd;
15192 if (!create_ifunc_sections (info))
15193 return false;
15194
15195 dynobj = htab->root.dynobj;
15196
15197 symtab_hdr = & elf_symtab_hdr (abfd);
15198 sym_hashes = elf_sym_hashes (abfd);
15199 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15200
15201 rel_end = relocs + sec->reloc_count;
15202 for (rel = relocs; rel < rel_end; rel++)
15203 {
15204 Elf_Internal_Sym *isym;
15205 struct elf_link_hash_entry *h;
15206 struct elf32_arm_link_hash_entry *eh;
15207 unsigned int r_symndx;
15208 int r_type;
15209
15210 r_symndx = ELF32_R_SYM (rel->r_info);
15211 r_type = ELF32_R_TYPE (rel->r_info);
15212 r_type = arm_real_reloc_type (htab, r_type);
15213
15214 if (r_symndx >= nsyms
15215 /* PR 9934: It is possible to have relocations that do not
15216 refer to symbols, thus it is also possible to have an
15217 object file containing relocations but no symbol table. */
15218 && (r_symndx > STN_UNDEF || nsyms > 0))
15219 {
15220 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15221 r_symndx);
15222 return false;
15223 }
15224
15225 h = NULL;
15226 isym = NULL;
15227 if (nsyms > 0)
15228 {
15229 if (r_symndx < symtab_hdr->sh_info)
15230 {
15231 /* A local symbol. */
15232 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15233 abfd, r_symndx);
15234 if (isym == NULL)
15235 return false;
15236 }
15237 else
15238 {
15239 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15240 while (h->root.type == bfd_link_hash_indirect
15241 || h->root.type == bfd_link_hash_warning)
15242 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15243 }
15244 }
15245
15246 eh = (struct elf32_arm_link_hash_entry *) h;
15247
15248 call_reloc_p = false;
15249 may_become_dynamic_p = false;
15250 may_need_local_target_p = false;
15251
15252 /* Could be done earlier, if h were already available. */
15253 r_type = elf32_arm_tls_transition (info, r_type, h);
15254 switch (r_type)
15255 {
15256 case R_ARM_GOTOFFFUNCDESC:
15257 {
15258 if (h == NULL)
15259 {
15260 if (!elf32_arm_allocate_local_sym_info (abfd))
15261 return false;
15262 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15263 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15264 }
15265 else
15266 {
15267 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15268 }
15269 }
15270 break;
15271
15272 case R_ARM_GOTFUNCDESC:
15273 {
15274 if (h == NULL)
15275 {
15276 /* Such a relocation is not supposed to be generated
15277 by gcc on a static function. */
15278 /* Anyway if needed it could be handled. */
15279 abort();
15280 }
15281 else
15282 {
15283 eh->fdpic_cnts.gotfuncdesc_cnt++;
15284 }
15285 }
15286 break;
15287
15288 case R_ARM_FUNCDESC:
15289 {
15290 if (h == NULL)
15291 {
15292 if (!elf32_arm_allocate_local_sym_info (abfd))
15293 return false;
15294 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15295 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15296 }
15297 else
15298 {
15299 eh->fdpic_cnts.funcdesc_cnt++;
15300 }
15301 }
15302 break;
15303
15304 case R_ARM_GOT32:
15305 case R_ARM_GOT_PREL:
15306 case R_ARM_TLS_GD32:
15307 case R_ARM_TLS_GD32_FDPIC:
15308 case R_ARM_TLS_IE32:
15309 case R_ARM_TLS_IE32_FDPIC:
15310 case R_ARM_TLS_GOTDESC:
15311 case R_ARM_TLS_DESCSEQ:
15312 case R_ARM_THM_TLS_DESCSEQ:
15313 case R_ARM_TLS_CALL:
15314 case R_ARM_THM_TLS_CALL:
15315 /* This symbol requires a global offset table entry. */
15316 {
15317 int tls_type, old_tls_type;
15318
15319 switch (r_type)
15320 {
15321 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15322 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15323
15324 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15325 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15326
15327 case R_ARM_TLS_GOTDESC:
15328 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15329 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15330 tls_type = GOT_TLS_GDESC; break;
15331
15332 default: tls_type = GOT_NORMAL; break;
15333 }
15334
15335 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15336 info->flags |= DF_STATIC_TLS;
15337
15338 if (h != NULL)
15339 {
15340 h->got.refcount++;
15341 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15342 }
15343 else
15344 {
15345 /* This is a global offset table entry for a local symbol. */
15346 if (!elf32_arm_allocate_local_sym_info (abfd))
15347 return false;
15348 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15349 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15350 }
15351
15352 /* If a variable is accessed with both tls methods, two
15353 slots may be created. */
15354 if (GOT_TLS_GD_ANY_P (old_tls_type)
15355 && GOT_TLS_GD_ANY_P (tls_type))
15356 tls_type |= old_tls_type;
15357
15358 /* We will already have issued an error message if there
15359 is a TLS/non-TLS mismatch, based on the symbol
15360 type. So just combine any TLS types needed. */
15361 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15362 && tls_type != GOT_NORMAL)
15363 tls_type |= old_tls_type;
15364
15365 /* If the symbol is accessed in both IE and GDESC
15366 method, we're able to relax. Turn off the GDESC flag,
15367 without messing up with any other kind of tls types
15368 that may be involved. */
15369 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15370 tls_type &= ~GOT_TLS_GDESC;
15371
15372 if (old_tls_type != tls_type)
15373 {
15374 if (h != NULL)
15375 elf32_arm_hash_entry (h)->tls_type = tls_type;
15376 else
15377 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15378 }
15379 }
15380 /* Fall through. */
15381
15382 case R_ARM_TLS_LDM32:
15383 case R_ARM_TLS_LDM32_FDPIC:
15384 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15385 htab->tls_ldm_got.refcount++;
15386 /* Fall through. */
15387
15388 case R_ARM_GOTOFF32:
15389 case R_ARM_GOTPC:
15390 if (htab->root.sgot == NULL
15391 && !create_got_section (htab->root.dynobj, info))
15392 return false;
15393 break;
15394
15395 case R_ARM_PC24:
15396 case R_ARM_PLT32:
15397 case R_ARM_CALL:
15398 case R_ARM_JUMP24:
15399 case R_ARM_PREL31:
15400 case R_ARM_THM_CALL:
15401 case R_ARM_THM_JUMP24:
15402 case R_ARM_THM_JUMP19:
15403 call_reloc_p = true;
15404 may_need_local_target_p = true;
15405 break;
15406
15407 case R_ARM_ABS12:
15408 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15409 ldr __GOTT_INDEX__ offsets. */
15410 if (htab->root.target_os != is_vxworks)
15411 {
15412 may_need_local_target_p = true;
15413 break;
15414 }
15415 else goto jump_over;
15416
15417 /* Fall through. */
15418
15419 case R_ARM_MOVW_ABS_NC:
15420 case R_ARM_MOVT_ABS:
15421 case R_ARM_THM_MOVW_ABS_NC:
15422 case R_ARM_THM_MOVT_ABS:
15423 if (bfd_link_pic (info))
15424 {
15425 _bfd_error_handler
15426 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15427 abfd, elf32_arm_howto_table_1[r_type].name,
15428 (h) ? h->root.root.string : "a local symbol");
15429 bfd_set_error (bfd_error_bad_value);
15430 return false;
15431 }
15432
15433 /* Fall through. */
15434 case R_ARM_ABS32:
15435 case R_ARM_ABS32_NOI:
15436 jump_over:
15437 if (h != NULL && bfd_link_executable (info))
15438 {
15439 h->pointer_equality_needed = 1;
15440 }
15441 /* Fall through. */
15442 case R_ARM_REL32:
15443 case R_ARM_REL32_NOI:
15444 case R_ARM_MOVW_PREL_NC:
15445 case R_ARM_MOVT_PREL:
15446 case R_ARM_THM_MOVW_PREL_NC:
15447 case R_ARM_THM_MOVT_PREL:
15448
15449 /* Should the interworking branches be listed here? */
15450 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15451 || htab->fdpic_p)
15452 && (sec->flags & SEC_ALLOC) != 0)
15453 {
15454 if (h == NULL
15455 && elf32_arm_howto_from_type (r_type)->pc_relative)
15456 {
15457 /* In shared libraries and relocatable executables,
15458 we treat local relative references as calls;
15459 see the related SYMBOL_CALLS_LOCAL code in
15460 allocate_dynrelocs. */
15461 call_reloc_p = true;
15462 may_need_local_target_p = true;
15463 }
15464 else
15465 /* We are creating a shared library or relocatable
15466 executable, and this is a reloc against a global symbol,
15467 or a non-PC-relative reloc against a local symbol.
15468 We may need to copy the reloc into the output. */
15469 may_become_dynamic_p = true;
15470 }
15471 else
15472 may_need_local_target_p = true;
15473 break;
15474
15475 /* This relocation describes the C++ object vtable hierarchy.
15476 Reconstruct it for later use during GC. */
15477 case R_ARM_GNU_VTINHERIT:
15478 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15479 return false;
15480 break;
15481
15482 /* This relocation describes which C++ vtable entries are actually
15483 used. Record for later use during GC. */
15484 case R_ARM_GNU_VTENTRY:
15485 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15486 return false;
15487 break;
15488 }
15489
15490 if (h != NULL)
15491 {
15492 if (call_reloc_p)
15493 /* We may need a .plt entry if the function this reloc
15494 refers to is in a different object, regardless of the
15495 symbol's type. We can't tell for sure yet, because
15496 something later might force the symbol local. */
15497 h->needs_plt = 1;
15498 else if (may_need_local_target_p)
15499 /* If this reloc is in a read-only section, we might
15500 need a copy reloc. We can't check reliably at this
15501 stage whether the section is read-only, as input
15502 sections have not yet been mapped to output sections.
15503 Tentatively set the flag for now, and correct in
15504 adjust_dynamic_symbol. */
15505 h->non_got_ref = 1;
15506 }
15507
15508 if (may_need_local_target_p
15509 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15510 {
15511 union gotplt_union *root_plt;
15512 struct arm_plt_info *arm_plt;
15513 struct arm_local_iplt_info *local_iplt;
15514
15515 if (h != NULL)
15516 {
15517 root_plt = &h->plt;
15518 arm_plt = &eh->plt;
15519 }
15520 else
15521 {
15522 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15523 if (local_iplt == NULL)
15524 return false;
15525 root_plt = &local_iplt->root;
15526 arm_plt = &local_iplt->arm;
15527 }
15528
15529 /* If the symbol is a function that doesn't bind locally,
15530 this relocation will need a PLT entry. */
15531 if (root_plt->refcount != -1)
15532 root_plt->refcount += 1;
15533
15534 if (!call_reloc_p)
15535 arm_plt->noncall_refcount++;
15536
15537 /* It's too early to use htab->use_blx here, so we have to
15538 record possible blx references separately from
15539 relocs that definitely need a thumb stub. */
15540
15541 if (r_type == R_ARM_THM_CALL)
15542 arm_plt->maybe_thumb_refcount += 1;
15543
15544 if (r_type == R_ARM_THM_JUMP24
15545 || r_type == R_ARM_THM_JUMP19)
15546 arm_plt->thumb_refcount += 1;
15547 }
15548
15549 if (may_become_dynamic_p)
15550 {
15551 struct elf_dyn_relocs *p, **head;
15552
15553 /* Create a reloc section in dynobj. */
15554 if (sreloc == NULL)
15555 {
15556 sreloc = _bfd_elf_make_dynamic_reloc_section
15557 (sec, dynobj, 2, abfd, ! htab->use_rel);
15558
15559 if (sreloc == NULL)
15560 return false;
15561 }
15562
15563 /* If this is a global symbol, count the number of
15564 relocations we need for this symbol. */
15565 if (h != NULL)
15566 head = &h->dyn_relocs;
15567 else
15568 {
15569 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15570 if (head == NULL)
15571 return false;
15572 }
15573
15574 p = *head;
15575 if (p == NULL || p->sec != sec)
15576 {
15577 size_t amt = sizeof *p;
15578
15579 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15580 if (p == NULL)
15581 return false;
15582 p->next = *head;
15583 *head = p;
15584 p->sec = sec;
15585 p->count = 0;
15586 p->pc_count = 0;
15587 }
15588
15589 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15590 p->pc_count += 1;
15591 p->count += 1;
15592 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15593 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15594 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15595 that will become rofixup. */
15596 /* This is due to the fact that we suppose all will become rofixup. */
15597 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15598 _bfd_error_handler
15599 (_("FDPIC does not yet support %s relocation"
15600 " to become dynamic for executable"),
15601 elf32_arm_howto_table_1[r_type].name);
15602 abort();
15603 }
15604 }
15605 }
15606
15607 return true;
15608 }
15609
15610 static void
15611 elf32_arm_update_relocs (asection *o,
15612 struct bfd_elf_section_reloc_data *reldata)
15613 {
15614 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15615 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15616 const struct elf_backend_data *bed;
15617 _arm_elf_section_data *eado;
15618 struct bfd_link_order *p;
15619 bfd_byte *erela_head, *erela;
15620 Elf_Internal_Rela *irela_head, *irela;
15621 Elf_Internal_Shdr *rel_hdr;
15622 bfd *abfd;
15623 unsigned int count;
15624
15625 eado = get_arm_elf_section_data (o);
15626
15627 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15628 return;
15629
15630 abfd = o->owner;
15631 bed = get_elf_backend_data (abfd);
15632 rel_hdr = reldata->hdr;
15633
15634 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15635 {
15636 swap_in = bed->s->swap_reloc_in;
15637 swap_out = bed->s->swap_reloc_out;
15638 }
15639 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15640 {
15641 swap_in = bed->s->swap_reloca_in;
15642 swap_out = bed->s->swap_reloca_out;
15643 }
15644 else
15645 abort ();
15646
15647 erela_head = rel_hdr->contents;
15648 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15649 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15650
15651 erela = erela_head;
15652 irela = irela_head;
15653 count = 0;
15654
15655 for (p = o->map_head.link_order; p; p = p->next)
15656 {
15657 if (p->type == bfd_section_reloc_link_order
15658 || p->type == bfd_symbol_reloc_link_order)
15659 {
15660 (*swap_in) (abfd, erela, irela);
15661 erela += rel_hdr->sh_entsize;
15662 irela++;
15663 count++;
15664 }
15665 else if (p->type == bfd_indirect_link_order)
15666 {
15667 struct bfd_elf_section_reloc_data *input_reldata;
15668 arm_unwind_table_edit *edit_list, *edit_tail;
15669 _arm_elf_section_data *eadi;
15670 bfd_size_type j;
15671 bfd_vma offset;
15672 asection *i;
15673
15674 i = p->u.indirect.section;
15675
15676 eadi = get_arm_elf_section_data (i);
15677 edit_list = eadi->u.exidx.unwind_edit_list;
15678 edit_tail = eadi->u.exidx.unwind_edit_tail;
15679 offset = i->output_offset;
15680
15681 if (eadi->elf.rel.hdr &&
15682 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15683 input_reldata = &eadi->elf.rel;
15684 else if (eadi->elf.rela.hdr &&
15685 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15686 input_reldata = &eadi->elf.rela;
15687 else
15688 abort ();
15689
15690 if (edit_list)
15691 {
15692 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15693 {
15694 arm_unwind_table_edit *edit_node, *edit_next;
15695 bfd_vma bias;
15696 bfd_vma reloc_index;
15697
15698 (*swap_in) (abfd, erela, irela);
15699 reloc_index = (irela->r_offset - offset) / 8;
15700
15701 bias = 0;
15702 edit_node = edit_list;
15703 for (edit_next = edit_list;
15704 edit_next && edit_next->index <= reloc_index;
15705 edit_next = edit_node->next)
15706 {
15707 bias++;
15708 edit_node = edit_next;
15709 }
15710
15711 if (edit_node->type != DELETE_EXIDX_ENTRY
15712 || edit_node->index != reloc_index)
15713 {
15714 irela->r_offset -= bias * 8;
15715 irela++;
15716 count++;
15717 }
15718
15719 erela += rel_hdr->sh_entsize;
15720 }
15721
15722 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15723 {
15724 /* New relocation entity. */
15725 asection *text_sec = edit_tail->linked_section;
15726 asection *text_out = text_sec->output_section;
15727 bfd_vma exidx_offset = offset + i->size - 8;
15728
15729 irela->r_addend = 0;
15730 irela->r_offset = exidx_offset;
15731 irela->r_info = ELF32_R_INFO
15732 (text_out->target_index, R_ARM_PREL31);
15733 irela++;
15734 count++;
15735 }
15736 }
15737 else
15738 {
15739 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15740 {
15741 (*swap_in) (abfd, erela, irela);
15742 erela += rel_hdr->sh_entsize;
15743 irela++;
15744 }
15745
15746 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15747 }
15748 }
15749 }
15750
15751 reldata->count = count;
15752 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15753
15754 erela = erela_head;
15755 irela = irela_head;
15756 while (count > 0)
15757 {
15758 (*swap_out) (abfd, irela, erela);
15759 erela += rel_hdr->sh_entsize;
15760 irela++;
15761 count--;
15762 }
15763
15764 free (irela_head);
15765
15766 /* Hashes are no longer valid. */
15767 free (reldata->hashes);
15768 reldata->hashes = NULL;
15769 }
15770
15771 /* Unwinding tables are not referenced directly. This pass marks them as
15772 required if the corresponding code section is marked. Similarly, ARMv8-M
15773 secure entry functions can only be referenced by SG veneers which are
15774 created after the GC process. They need to be marked in case they reside in
15775 their own section (as would be the case if code was compiled with
15776 -ffunction-sections). */
15777
15778 static bool
15779 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15780 elf_gc_mark_hook_fn gc_mark_hook)
15781 {
15782 bfd *sub;
15783 Elf_Internal_Shdr **elf_shdrp;
15784 asection *cmse_sec;
15785 obj_attribute *out_attr;
15786 Elf_Internal_Shdr *symtab_hdr;
15787 unsigned i, sym_count, ext_start;
15788 const struct elf_backend_data *bed;
15789 struct elf_link_hash_entry **sym_hashes;
15790 struct elf32_arm_link_hash_entry *cmse_hash;
15791 bool again, is_v8m, first_bfd_browse = true;
15792 bool debug_sec_need_to_be_marked = false;
15793 asection *isec;
15794
15795 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15796
15797 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15798 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15799 && out_attr[Tag_CPU_arch_profile].i == 'M';
15800
15801 /* Marking EH data may cause additional code sections to be marked,
15802 requiring multiple passes. */
15803 again = true;
15804 while (again)
15805 {
15806 again = false;
15807 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15808 {
15809 asection *o;
15810
15811 if (! is_arm_elf (sub))
15812 continue;
15813
15814 elf_shdrp = elf_elfsections (sub);
15815 for (o = sub->sections; o != NULL; o = o->next)
15816 {
15817 Elf_Internal_Shdr *hdr;
15818
15819 hdr = &elf_section_data (o)->this_hdr;
15820 if (hdr->sh_type == SHT_ARM_EXIDX
15821 && hdr->sh_link
15822 && hdr->sh_link < elf_numsections (sub)
15823 && !o->gc_mark
15824 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15825 {
15826 again = true;
15827 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15828 return false;
15829 }
15830 }
15831
15832 /* Mark section holding ARMv8-M secure entry functions. We mark all
15833 of them so no need for a second browsing. */
15834 if (is_v8m && first_bfd_browse)
15835 {
15836 sym_hashes = elf_sym_hashes (sub);
15837 bed = get_elf_backend_data (sub);
15838 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15839 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15840 ext_start = symtab_hdr->sh_info;
15841
15842 /* Scan symbols. */
15843 for (i = ext_start; i < sym_count; i++)
15844 {
15845 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15846
15847 /* Assume it is a special symbol. If not, cmse_scan will
15848 warn about it and user can do something about it. */
15849 if (startswith (cmse_hash->root.root.root.string,
15850 CMSE_PREFIX))
15851 {
15852 cmse_sec = cmse_hash->root.root.u.def.section;
15853 if (!cmse_sec->gc_mark
15854 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15855 return false;
15856 /* The debug sections related to these secure entry
15857 functions are marked on enabling below flag. */
15858 debug_sec_need_to_be_marked = true;
15859 }
15860 }
15861
15862 if (debug_sec_need_to_be_marked)
15863 {
15864 /* Looping over all the sections of the object file containing
15865 Armv8-M secure entry functions and marking all the debug
15866 sections. */
15867 for (isec = sub->sections; isec != NULL; isec = isec->next)
15868 {
15869 /* If not a debug sections, skip it. */
15870 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
15871 isec->gc_mark = 1 ;
15872 }
15873 debug_sec_need_to_be_marked = false;
15874 }
15875 }
15876 }
15877 first_bfd_browse = false;
15878 }
15879
15880 return true;
15881 }
15882
15883 /* Treat mapping symbols as special target symbols. */
15884
15885 static bool
15886 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15887 {
15888 return bfd_is_arm_special_symbol_name (sym->name,
15889 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15890 }
15891
15892 /* If the ELF symbol SYM might be a function in SEC, return the
15893 function size and set *CODE_OFF to the function's entry point,
15894 otherwise return zero. */
15895
15896 static bfd_size_type
15897 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
15898 bfd_vma *code_off)
15899 {
15900 bfd_size_type size;
15901
15902 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
15903 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
15904 || sym->section != sec)
15905 return 0;
15906
15907 if (!(sym->flags & BSF_SYNTHETIC))
15908 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
15909 {
15910 case STT_FUNC:
15911 case STT_ARM_TFUNC:
15912 case STT_NOTYPE:
15913 break;
15914 default:
15915 return 0;
15916 }
15917
15918 if ((sym->flags & BSF_LOCAL)
15919 && bfd_is_arm_special_symbol_name (sym->name,
15920 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15921 return 0;
15922
15923 *code_off = sym->value;
15924 size = 0;
15925 if (!(sym->flags & BSF_SYNTHETIC))
15926 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
15927 if (size == 0)
15928 size = 1;
15929 return size;
15930 }
15931
15932 static bool
15933 elf32_arm_find_inliner_info (bfd * abfd,
15934 const char ** filename_ptr,
15935 const char ** functionname_ptr,
15936 unsigned int * line_ptr)
15937 {
15938 bool found;
15939 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15940 functionname_ptr, line_ptr,
15941 & elf_tdata (abfd)->dwarf2_find_line_info);
15942 return found;
15943 }
15944
15945 /* Adjust a symbol defined by a dynamic object and referenced by a
15946 regular object. The current definition is in some section of the
15947 dynamic object, but we're not including those sections. We have to
15948 change the definition to something the rest of the link can
15949 understand. */
15950
15951 static bool
15952 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15953 struct elf_link_hash_entry * h)
15954 {
15955 bfd * dynobj;
15956 asection *s, *srel;
15957 struct elf32_arm_link_hash_entry * eh;
15958 struct elf32_arm_link_hash_table *globals;
15959
15960 globals = elf32_arm_hash_table (info);
15961 if (globals == NULL)
15962 return false;
15963
15964 dynobj = elf_hash_table (info)->dynobj;
15965
15966 /* Make sure we know what is going on here. */
15967 BFD_ASSERT (dynobj != NULL
15968 && (h->needs_plt
15969 || h->type == STT_GNU_IFUNC
15970 || h->is_weakalias
15971 || (h->def_dynamic
15972 && h->ref_regular
15973 && !h->def_regular)));
15974
15975 eh = (struct elf32_arm_link_hash_entry *) h;
15976
15977 /* If this is a function, put it in the procedure linkage table. We
15978 will fill in the contents of the procedure linkage table later,
15979 when we know the address of the .got section. */
15980 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15981 {
15982 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15983 symbol binds locally. */
15984 if (h->plt.refcount <= 0
15985 || (h->type != STT_GNU_IFUNC
15986 && (SYMBOL_CALLS_LOCAL (info, h)
15987 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15988 && h->root.type == bfd_link_hash_undefweak))))
15989 {
15990 /* This case can occur if we saw a PLT32 reloc in an input
15991 file, but the symbol was never referred to by a dynamic
15992 object, or if all references were garbage collected. In
15993 such a case, we don't actually need to build a procedure
15994 linkage table, and we can just do a PC24 reloc instead. */
15995 h->plt.offset = (bfd_vma) -1;
15996 eh->plt.thumb_refcount = 0;
15997 eh->plt.maybe_thumb_refcount = 0;
15998 eh->plt.noncall_refcount = 0;
15999 h->needs_plt = 0;
16000 }
16001
16002 return true;
16003 }
16004 else
16005 {
16006 /* It's possible that we incorrectly decided a .plt reloc was
16007 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16008 in check_relocs. We can't decide accurately between function
16009 and non-function syms in check-relocs; Objects loaded later in
16010 the link may change h->type. So fix it now. */
16011 h->plt.offset = (bfd_vma) -1;
16012 eh->plt.thumb_refcount = 0;
16013 eh->plt.maybe_thumb_refcount = 0;
16014 eh->plt.noncall_refcount = 0;
16015 }
16016
16017 /* If this is a weak symbol, and there is a real definition, the
16018 processor independent code will have arranged for us to see the
16019 real definition first, and we can just use the same value. */
16020 if (h->is_weakalias)
16021 {
16022 struct elf_link_hash_entry *def = weakdef (h);
16023 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16024 h->root.u.def.section = def->root.u.def.section;
16025 h->root.u.def.value = def->root.u.def.value;
16026 return true;
16027 }
16028
16029 /* If there are no non-GOT references, we do not need a copy
16030 relocation. */
16031 if (!h->non_got_ref)
16032 return true;
16033
16034 /* This is a reference to a symbol defined by a dynamic object which
16035 is not a function. */
16036
16037 /* If we are creating a shared library, we must presume that the
16038 only references to the symbol are via the global offset table.
16039 For such cases we need not do anything here; the relocations will
16040 be handled correctly by relocate_section. Relocatable executables
16041 can reference data in shared objects directly, so we don't need to
16042 do anything here. */
16043 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16044 return true;
16045
16046 /* We must allocate the symbol in our .dynbss section, which will
16047 become part of the .bss section of the executable. There will be
16048 an entry for this symbol in the .dynsym section. The dynamic
16049 object will contain position independent code, so all references
16050 from the dynamic object to this symbol will go through the global
16051 offset table. The dynamic linker will use the .dynsym entry to
16052 determine the address it must put in the global offset table, so
16053 both the dynamic object and the regular object will refer to the
16054 same memory location for the variable. */
16055 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16056 linker to copy the initial value out of the dynamic object and into
16057 the runtime process image. We need to remember the offset into the
16058 .rel(a).bss section we are going to use. */
16059 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16060 {
16061 s = globals->root.sdynrelro;
16062 srel = globals->root.sreldynrelro;
16063 }
16064 else
16065 {
16066 s = globals->root.sdynbss;
16067 srel = globals->root.srelbss;
16068 }
16069 if (info->nocopyreloc == 0
16070 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16071 && h->size != 0)
16072 {
16073 elf32_arm_allocate_dynrelocs (info, srel, 1);
16074 h->needs_copy = 1;
16075 }
16076
16077 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16078 }
16079
16080 /* Allocate space in .plt, .got and associated reloc sections for
16081 dynamic relocs. */
16082
16083 static bool
16084 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16085 {
16086 struct bfd_link_info *info;
16087 struct elf32_arm_link_hash_table *htab;
16088 struct elf32_arm_link_hash_entry *eh;
16089 struct elf_dyn_relocs *p;
16090
16091 if (h->root.type == bfd_link_hash_indirect)
16092 return true;
16093
16094 eh = (struct elf32_arm_link_hash_entry *) h;
16095
16096 info = (struct bfd_link_info *) inf;
16097 htab = elf32_arm_hash_table (info);
16098 if (htab == NULL)
16099 return false;
16100
16101 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16102 && h->plt.refcount > 0)
16103 {
16104 /* Make sure this symbol is output as a dynamic symbol.
16105 Undefined weak syms won't yet be marked as dynamic. */
16106 if (h->dynindx == -1 && !h->forced_local
16107 && h->root.type == bfd_link_hash_undefweak)
16108 {
16109 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16110 return false;
16111 }
16112
16113 /* If the call in the PLT entry binds locally, the associated
16114 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16115 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16116 than the .plt section. */
16117 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16118 {
16119 eh->is_iplt = 1;
16120 if (eh->plt.noncall_refcount == 0
16121 && SYMBOL_REFERENCES_LOCAL (info, h))
16122 /* All non-call references can be resolved directly.
16123 This means that they can (and in some cases, must)
16124 resolve directly to the run-time target, rather than
16125 to the PLT. That in turns means that any .got entry
16126 would be equal to the .igot.plt entry, so there's
16127 no point having both. */
16128 h->got.refcount = 0;
16129 }
16130
16131 if (bfd_link_pic (info)
16132 || eh->is_iplt
16133 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16134 {
16135 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16136
16137 /* If this symbol is not defined in a regular file, and we are
16138 not generating a shared library, then set the symbol to this
16139 location in the .plt. This is required to make function
16140 pointers compare as equal between the normal executable and
16141 the shared library. */
16142 if (! bfd_link_pic (info)
16143 && !h->def_regular)
16144 {
16145 h->root.u.def.section = htab->root.splt;
16146 h->root.u.def.value = h->plt.offset;
16147
16148 /* Make sure the function is not marked as Thumb, in case
16149 it is the target of an ABS32 relocation, which will
16150 point to the PLT entry. */
16151 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16152 }
16153
16154 /* VxWorks executables have a second set of relocations for
16155 each PLT entry. They go in a separate relocation section,
16156 which is processed by the kernel loader. */
16157 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16158 {
16159 /* There is a relocation for the initial PLT entry:
16160 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16161 if (h->plt.offset == htab->plt_header_size)
16162 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16163
16164 /* There are two extra relocations for each subsequent
16165 PLT entry: an R_ARM_32 relocation for the GOT entry,
16166 and an R_ARM_32 relocation for the PLT entry. */
16167 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16168 }
16169 }
16170 else
16171 {
16172 h->plt.offset = (bfd_vma) -1;
16173 h->needs_plt = 0;
16174 }
16175 }
16176 else
16177 {
16178 h->plt.offset = (bfd_vma) -1;
16179 h->needs_plt = 0;
16180 }
16181
16182 eh = (struct elf32_arm_link_hash_entry *) h;
16183 eh->tlsdesc_got = (bfd_vma) -1;
16184
16185 if (h->got.refcount > 0)
16186 {
16187 asection *s;
16188 bool dyn;
16189 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16190 int indx;
16191
16192 /* Make sure this symbol is output as a dynamic symbol.
16193 Undefined weak syms won't yet be marked as dynamic. */
16194 if (htab->root.dynamic_sections_created
16195 && h->dynindx == -1
16196 && !h->forced_local
16197 && h->root.type == bfd_link_hash_undefweak)
16198 {
16199 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16200 return false;
16201 }
16202
16203 s = htab->root.sgot;
16204 h->got.offset = s->size;
16205
16206 if (tls_type == GOT_UNKNOWN)
16207 abort ();
16208
16209 if (tls_type == GOT_NORMAL)
16210 /* Non-TLS symbols need one GOT slot. */
16211 s->size += 4;
16212 else
16213 {
16214 if (tls_type & GOT_TLS_GDESC)
16215 {
16216 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16217 eh->tlsdesc_got
16218 = (htab->root.sgotplt->size
16219 - elf32_arm_compute_jump_table_size (htab));
16220 htab->root.sgotplt->size += 8;
16221 h->got.offset = (bfd_vma) -2;
16222 /* plt.got_offset needs to know there's a TLS_DESC
16223 reloc in the middle of .got.plt. */
16224 htab->num_tls_desc++;
16225 }
16226
16227 if (tls_type & GOT_TLS_GD)
16228 {
16229 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16230 consecutive GOT slots. If the symbol is both GD
16231 and GDESC, got.offset may have been
16232 overwritten. */
16233 h->got.offset = s->size;
16234 s->size += 8;
16235 }
16236
16237 if (tls_type & GOT_TLS_IE)
16238 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16239 slot. */
16240 s->size += 4;
16241 }
16242
16243 dyn = htab->root.dynamic_sections_created;
16244
16245 indx = 0;
16246 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16247 && (!bfd_link_pic (info)
16248 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16249 indx = h->dynindx;
16250
16251 if (tls_type != GOT_NORMAL
16252 && (bfd_link_dll (info) || indx != 0)
16253 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16254 || h->root.type != bfd_link_hash_undefweak))
16255 {
16256 if (tls_type & GOT_TLS_IE)
16257 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16258
16259 if (tls_type & GOT_TLS_GD)
16260 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16261
16262 if (tls_type & GOT_TLS_GDESC)
16263 {
16264 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16265 /* GDESC needs a trampoline to jump to. */
16266 htab->tls_trampoline = -1;
16267 }
16268
16269 /* Only GD needs it. GDESC just emits one relocation per
16270 2 entries. */
16271 if ((tls_type & GOT_TLS_GD) && indx != 0)
16272 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16273 }
16274 else if (((indx != -1) || htab->fdpic_p)
16275 && !SYMBOL_REFERENCES_LOCAL (info, h))
16276 {
16277 if (htab->root.dynamic_sections_created)
16278 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16279 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16280 }
16281 else if (h->type == STT_GNU_IFUNC
16282 && eh->plt.noncall_refcount == 0)
16283 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16284 they all resolve dynamically instead. Reserve room for the
16285 GOT entry's R_ARM_IRELATIVE relocation. */
16286 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16287 else if (bfd_link_pic (info)
16288 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16289 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16290 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16291 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16292 /* Reserve room for rofixup for FDPIC executable. */
16293 /* TLS relocs do not need space since they are completely
16294 resolved. */
16295 htab->srofixup->size += 4;
16296 }
16297 else
16298 h->got.offset = (bfd_vma) -1;
16299
16300 /* FDPIC support. */
16301 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16302 {
16303 /* Symbol musn't be exported. */
16304 if (h->dynindx != -1)
16305 abort();
16306
16307 /* We only allocate one function descriptor with its associated
16308 relocation. */
16309 if (eh->fdpic_cnts.funcdesc_offset == -1)
16310 {
16311 asection *s = htab->root.sgot;
16312
16313 eh->fdpic_cnts.funcdesc_offset = s->size;
16314 s->size += 8;
16315 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16316 if (bfd_link_pic(info))
16317 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16318 else
16319 htab->srofixup->size += 8;
16320 }
16321 }
16322
16323 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16324 {
16325 asection *s = htab->root.sgot;
16326
16327 if (htab->root.dynamic_sections_created && h->dynindx == -1
16328 && !h->forced_local)
16329 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16330 return false;
16331
16332 if (h->dynindx == -1)
16333 {
16334 /* We only allocate one function descriptor with its
16335 associated relocation. */
16336 if (eh->fdpic_cnts.funcdesc_offset == -1)
16337 {
16338
16339 eh->fdpic_cnts.funcdesc_offset = s->size;
16340 s->size += 8;
16341 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16342 rofixups. */
16343 if (bfd_link_pic(info))
16344 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16345 else
16346 htab->srofixup->size += 8;
16347 }
16348 }
16349
16350 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16351 R_ARM_RELATIVE/rofixup relocation on it. */
16352 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16353 s->size += 4;
16354 if (h->dynindx == -1 && !bfd_link_pic(info))
16355 htab->srofixup->size += 4;
16356 else
16357 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16358 }
16359
16360 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16361 {
16362 if (htab->root.dynamic_sections_created && h->dynindx == -1
16363 && !h->forced_local)
16364 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16365 return false;
16366
16367 if (h->dynindx == -1)
16368 {
16369 /* We only allocate one function descriptor with its
16370 associated relocation. */
16371 if (eh->fdpic_cnts.funcdesc_offset == -1)
16372 {
16373 asection *s = htab->root.sgot;
16374
16375 eh->fdpic_cnts.funcdesc_offset = s->size;
16376 s->size += 8;
16377 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16378 rofixups. */
16379 if (bfd_link_pic(info))
16380 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16381 else
16382 htab->srofixup->size += 8;
16383 }
16384 }
16385 if (h->dynindx == -1 && !bfd_link_pic(info))
16386 {
16387 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16388 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16389 }
16390 else
16391 {
16392 /* Will need one dynamic reloc per reference. will be either
16393 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16394 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16395 eh->fdpic_cnts.funcdesc_cnt);
16396 }
16397 }
16398
16399 /* Allocate stubs for exported Thumb functions on v4t. */
16400 if (!htab->use_blx && h->dynindx != -1
16401 && h->def_regular
16402 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16403 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16404 {
16405 struct elf_link_hash_entry * th;
16406 struct bfd_link_hash_entry * bh;
16407 struct elf_link_hash_entry * myh;
16408 char name[1024];
16409 asection *s;
16410 bh = NULL;
16411 /* Create a new symbol to regist the real location of the function. */
16412 s = h->root.u.def.section;
16413 sprintf (name, "__real_%s", h->root.root.string);
16414 _bfd_generic_link_add_one_symbol (info, s->owner,
16415 name, BSF_GLOBAL, s,
16416 h->root.u.def.value,
16417 NULL, true, false, &bh);
16418
16419 myh = (struct elf_link_hash_entry *) bh;
16420 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16421 myh->forced_local = 1;
16422 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16423 eh->export_glue = myh;
16424 th = record_arm_to_thumb_glue (info, h);
16425 /* Point the symbol at the stub. */
16426 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16427 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16428 h->root.u.def.section = th->root.u.def.section;
16429 h->root.u.def.value = th->root.u.def.value & ~1;
16430 }
16431
16432 if (h->dyn_relocs == NULL)
16433 return true;
16434
16435 /* In the shared -Bsymbolic case, discard space allocated for
16436 dynamic pc-relative relocs against symbols which turn out to be
16437 defined in regular objects. For the normal shared case, discard
16438 space for pc-relative relocs that have become local due to symbol
16439 visibility changes. */
16440
16441 if (bfd_link_pic (info)
16442 || htab->root.is_relocatable_executable
16443 || htab->fdpic_p)
16444 {
16445 /* Relocs that use pc_count are PC-relative forms, which will appear
16446 on something like ".long foo - ." or "movw REG, foo - .". We want
16447 calls to protected symbols to resolve directly to the function
16448 rather than going via the plt. If people want function pointer
16449 comparisons to work as expected then they should avoid writing
16450 assembly like ".long foo - .". */
16451 if (SYMBOL_CALLS_LOCAL (info, h))
16452 {
16453 struct elf_dyn_relocs **pp;
16454
16455 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16456 {
16457 p->count -= p->pc_count;
16458 p->pc_count = 0;
16459 if (p->count == 0)
16460 *pp = p->next;
16461 else
16462 pp = &p->next;
16463 }
16464 }
16465
16466 if (htab->root.target_os == is_vxworks)
16467 {
16468 struct elf_dyn_relocs **pp;
16469
16470 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16471 {
16472 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16473 *pp = p->next;
16474 else
16475 pp = &p->next;
16476 }
16477 }
16478
16479 /* Also discard relocs on undefined weak syms with non-default
16480 visibility. */
16481 if (h->dyn_relocs != NULL
16482 && h->root.type == bfd_link_hash_undefweak)
16483 {
16484 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16485 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16486 h->dyn_relocs = NULL;
16487
16488 /* Make sure undefined weak symbols are output as a dynamic
16489 symbol in PIEs. */
16490 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16491 && !h->forced_local)
16492 {
16493 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16494 return false;
16495 }
16496 }
16497
16498 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16499 && h->root.type == bfd_link_hash_new)
16500 {
16501 /* Output absolute symbols so that we can create relocations
16502 against them. For normal symbols we output a relocation
16503 against the section that contains them. */
16504 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16505 return false;
16506 }
16507
16508 }
16509 else
16510 {
16511 /* For the non-shared case, discard space for relocs against
16512 symbols which turn out to need copy relocs or are not
16513 dynamic. */
16514
16515 if (!h->non_got_ref
16516 && ((h->def_dynamic
16517 && !h->def_regular)
16518 || (htab->root.dynamic_sections_created
16519 && (h->root.type == bfd_link_hash_undefweak
16520 || h->root.type == bfd_link_hash_undefined))))
16521 {
16522 /* Make sure this symbol is output as a dynamic symbol.
16523 Undefined weak syms won't yet be marked as dynamic. */
16524 if (h->dynindx == -1 && !h->forced_local
16525 && h->root.type == bfd_link_hash_undefweak)
16526 {
16527 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16528 return false;
16529 }
16530
16531 /* If that succeeded, we know we'll be keeping all the
16532 relocs. */
16533 if (h->dynindx != -1)
16534 goto keep;
16535 }
16536
16537 h->dyn_relocs = NULL;
16538
16539 keep: ;
16540 }
16541
16542 /* Finally, allocate space. */
16543 for (p = h->dyn_relocs; p != NULL; p = p->next)
16544 {
16545 asection *sreloc = elf_section_data (p->sec)->sreloc;
16546
16547 if (h->type == STT_GNU_IFUNC
16548 && eh->plt.noncall_refcount == 0
16549 && SYMBOL_REFERENCES_LOCAL (info, h))
16550 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16551 else if (h->dynindx != -1
16552 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16553 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16554 else if (htab->fdpic_p && !bfd_link_pic(info))
16555 htab->srofixup->size += 4 * p->count;
16556 else
16557 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16558 }
16559
16560 return true;
16561 }
16562
16563 void
16564 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16565 int byteswap_code)
16566 {
16567 struct elf32_arm_link_hash_table *globals;
16568
16569 globals = elf32_arm_hash_table (info);
16570 if (globals == NULL)
16571 return;
16572
16573 globals->byteswap_code = byteswap_code;
16574 }
16575
16576 /* Set the sizes of the dynamic sections. */
16577
16578 static bool
16579 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16580 struct bfd_link_info * info)
16581 {
16582 bfd * dynobj;
16583 asection * s;
16584 bool relocs;
16585 bfd *ibfd;
16586 struct elf32_arm_link_hash_table *htab;
16587
16588 htab = elf32_arm_hash_table (info);
16589 if (htab == NULL)
16590 return false;
16591
16592 dynobj = elf_hash_table (info)->dynobj;
16593 BFD_ASSERT (dynobj != NULL);
16594 check_use_blx (htab);
16595
16596 if (elf_hash_table (info)->dynamic_sections_created)
16597 {
16598 /* Set the contents of the .interp section to the interpreter. */
16599 if (bfd_link_executable (info) && !info->nointerp)
16600 {
16601 s = bfd_get_linker_section (dynobj, ".interp");
16602 BFD_ASSERT (s != NULL);
16603 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16604 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16605 }
16606 }
16607
16608 /* Set up .got offsets for local syms, and space for local dynamic
16609 relocs. */
16610 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16611 {
16612 bfd_signed_vma *local_got;
16613 bfd_signed_vma *end_local_got;
16614 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16615 char *local_tls_type;
16616 bfd_vma *local_tlsdesc_gotent;
16617 bfd_size_type locsymcount;
16618 Elf_Internal_Shdr *symtab_hdr;
16619 asection *srel;
16620 unsigned int symndx;
16621 struct fdpic_local *local_fdpic_cnts;
16622
16623 if (! is_arm_elf (ibfd))
16624 continue;
16625
16626 for (s = ibfd->sections; s != NULL; s = s->next)
16627 {
16628 struct elf_dyn_relocs *p;
16629
16630 for (p = (struct elf_dyn_relocs *)
16631 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16632 {
16633 if (!bfd_is_abs_section (p->sec)
16634 && bfd_is_abs_section (p->sec->output_section))
16635 {
16636 /* Input section has been discarded, either because
16637 it is a copy of a linkonce section or due to
16638 linker script /DISCARD/, so we'll be discarding
16639 the relocs too. */
16640 }
16641 else if (htab->root.target_os == is_vxworks
16642 && strcmp (p->sec->output_section->name,
16643 ".tls_vars") == 0)
16644 {
16645 /* Relocations in vxworks .tls_vars sections are
16646 handled specially by the loader. */
16647 }
16648 else if (p->count != 0)
16649 {
16650 srel = elf_section_data (p->sec)->sreloc;
16651 if (htab->fdpic_p && !bfd_link_pic(info))
16652 htab->srofixup->size += 4 * p->count;
16653 else
16654 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16655 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16656 info->flags |= DF_TEXTREL;
16657 }
16658 }
16659 }
16660
16661 local_got = elf_local_got_refcounts (ibfd);
16662 if (!local_got)
16663 continue;
16664
16665 symtab_hdr = & elf_symtab_hdr (ibfd);
16666 locsymcount = symtab_hdr->sh_info;
16667 end_local_got = local_got + locsymcount;
16668 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16669 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16670 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16671 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16672 symndx = 0;
16673 s = htab->root.sgot;
16674 srel = htab->root.srelgot;
16675 for (; local_got < end_local_got;
16676 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16677 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16678 {
16679 *local_tlsdesc_gotent = (bfd_vma) -1;
16680 local_iplt = *local_iplt_ptr;
16681
16682 /* FDPIC support. */
16683 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16684 {
16685 if (local_fdpic_cnts->funcdesc_offset == -1)
16686 {
16687 local_fdpic_cnts->funcdesc_offset = s->size;
16688 s->size += 8;
16689
16690 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16691 if (bfd_link_pic(info))
16692 elf32_arm_allocate_dynrelocs (info, srel, 1);
16693 else
16694 htab->srofixup->size += 8;
16695 }
16696 }
16697
16698 if (local_fdpic_cnts->funcdesc_cnt > 0)
16699 {
16700 if (local_fdpic_cnts->funcdesc_offset == -1)
16701 {
16702 local_fdpic_cnts->funcdesc_offset = s->size;
16703 s->size += 8;
16704
16705 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16706 if (bfd_link_pic(info))
16707 elf32_arm_allocate_dynrelocs (info, srel, 1);
16708 else
16709 htab->srofixup->size += 8;
16710 }
16711
16712 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16713 if (bfd_link_pic(info))
16714 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16715 else
16716 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16717 }
16718
16719 if (local_iplt != NULL)
16720 {
16721 struct elf_dyn_relocs *p;
16722
16723 if (local_iplt->root.refcount > 0)
16724 {
16725 elf32_arm_allocate_plt_entry (info, true,
16726 &local_iplt->root,
16727 &local_iplt->arm);
16728 if (local_iplt->arm.noncall_refcount == 0)
16729 /* All references to the PLT are calls, so all
16730 non-call references can resolve directly to the
16731 run-time target. This means that the .got entry
16732 would be the same as the .igot.plt entry, so there's
16733 no point creating both. */
16734 *local_got = 0;
16735 }
16736 else
16737 {
16738 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16739 local_iplt->root.offset = (bfd_vma) -1;
16740 }
16741
16742 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16743 {
16744 asection *psrel;
16745
16746 psrel = elf_section_data (p->sec)->sreloc;
16747 if (local_iplt->arm.noncall_refcount == 0)
16748 elf32_arm_allocate_irelocs (info, psrel, p->count);
16749 else
16750 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16751 }
16752 }
16753 if (*local_got > 0)
16754 {
16755 Elf_Internal_Sym *isym;
16756
16757 *local_got = s->size;
16758 if (*local_tls_type & GOT_TLS_GD)
16759 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16760 s->size += 8;
16761 if (*local_tls_type & GOT_TLS_GDESC)
16762 {
16763 *local_tlsdesc_gotent = htab->root.sgotplt->size
16764 - elf32_arm_compute_jump_table_size (htab);
16765 htab->root.sgotplt->size += 8;
16766 *local_got = (bfd_vma) -2;
16767 /* plt.got_offset needs to know there's a TLS_DESC
16768 reloc in the middle of .got.plt. */
16769 htab->num_tls_desc++;
16770 }
16771 if (*local_tls_type & GOT_TLS_IE)
16772 s->size += 4;
16773
16774 if (*local_tls_type & GOT_NORMAL)
16775 {
16776 /* If the symbol is both GD and GDESC, *local_got
16777 may have been overwritten. */
16778 *local_got = s->size;
16779 s->size += 4;
16780 }
16781
16782 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16783 symndx);
16784 if (isym == NULL)
16785 return false;
16786
16787 /* If all references to an STT_GNU_IFUNC PLT are calls,
16788 then all non-call references, including this GOT entry,
16789 resolve directly to the run-time target. */
16790 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16791 && (local_iplt == NULL
16792 || local_iplt->arm.noncall_refcount == 0))
16793 elf32_arm_allocate_irelocs (info, srel, 1);
16794 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16795 {
16796 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16797 elf32_arm_allocate_dynrelocs (info, srel, 1);
16798 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16799 htab->srofixup->size += 4;
16800
16801 if ((bfd_link_pic (info) || htab->fdpic_p)
16802 && *local_tls_type & GOT_TLS_GDESC)
16803 {
16804 elf32_arm_allocate_dynrelocs (info,
16805 htab->root.srelplt, 1);
16806 htab->tls_trampoline = -1;
16807 }
16808 }
16809 }
16810 else
16811 *local_got = (bfd_vma) -1;
16812 }
16813 }
16814
16815 if (htab->tls_ldm_got.refcount > 0)
16816 {
16817 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16818 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16819 htab->tls_ldm_got.offset = htab->root.sgot->size;
16820 htab->root.sgot->size += 8;
16821 if (bfd_link_pic (info))
16822 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16823 }
16824 else
16825 htab->tls_ldm_got.offset = -1;
16826
16827 /* At the very end of the .rofixup section is a pointer to the GOT,
16828 reserve space for it. */
16829 if (htab->fdpic_p && htab->srofixup != NULL)
16830 htab->srofixup->size += 4;
16831
16832 /* Allocate global sym .plt and .got entries, and space for global
16833 sym dynamic relocs. */
16834 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16835
16836 /* Here we rummage through the found bfds to collect glue information. */
16837 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16838 {
16839 if (! is_arm_elf (ibfd))
16840 continue;
16841
16842 /* Initialise mapping tables for code/data. */
16843 bfd_elf32_arm_init_maps (ibfd);
16844
16845 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16846 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16847 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16848 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16849 }
16850
16851 /* Allocate space for the glue sections now that we've sized them. */
16852 bfd_elf32_arm_allocate_interworking_sections (info);
16853
16854 /* For every jump slot reserved in the sgotplt, reloc_count is
16855 incremented. However, when we reserve space for TLS descriptors,
16856 it's not incremented, so in order to compute the space reserved
16857 for them, it suffices to multiply the reloc count by the jump
16858 slot size. */
16859 if (htab->root.srelplt)
16860 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16861
16862 if (htab->tls_trampoline)
16863 {
16864 if (htab->root.splt->size == 0)
16865 htab->root.splt->size += htab->plt_header_size;
16866
16867 htab->tls_trampoline = htab->root.splt->size;
16868 htab->root.splt->size += htab->plt_entry_size;
16869
16870 /* If we're not using lazy TLS relocations, don't generate the
16871 PLT and GOT entries they require. */
16872 if ((info->flags & DF_BIND_NOW))
16873 htab->root.tlsdesc_plt = 0;
16874 else
16875 {
16876 htab->root.tlsdesc_got = htab->root.sgot->size;
16877 htab->root.sgot->size += 4;
16878
16879 htab->root.tlsdesc_plt = htab->root.splt->size;
16880 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16881 }
16882 }
16883
16884 /* The check_relocs and adjust_dynamic_symbol entry points have
16885 determined the sizes of the various dynamic sections. Allocate
16886 memory for them. */
16887 relocs = false;
16888 for (s = dynobj->sections; s != NULL; s = s->next)
16889 {
16890 const char * name;
16891
16892 if ((s->flags & SEC_LINKER_CREATED) == 0)
16893 continue;
16894
16895 /* It's OK to base decisions on the section name, because none
16896 of the dynobj section names depend upon the input files. */
16897 name = bfd_section_name (s);
16898
16899 if (s == htab->root.splt)
16900 {
16901 /* Remember whether there is a PLT. */
16902 ;
16903 }
16904 else if (startswith (name, ".rel"))
16905 {
16906 if (s->size != 0)
16907 {
16908 /* Remember whether there are any reloc sections other
16909 than .rel(a).plt and .rela.plt.unloaded. */
16910 if (s != htab->root.srelplt && s != htab->srelplt2)
16911 relocs = true;
16912
16913 /* We use the reloc_count field as a counter if we need
16914 to copy relocs into the output file. */
16915 s->reloc_count = 0;
16916 }
16917 }
16918 else if (s != htab->root.sgot
16919 && s != htab->root.sgotplt
16920 && s != htab->root.iplt
16921 && s != htab->root.igotplt
16922 && s != htab->root.sdynbss
16923 && s != htab->root.sdynrelro
16924 && s != htab->srofixup)
16925 {
16926 /* It's not one of our sections, so don't allocate space. */
16927 continue;
16928 }
16929
16930 if (s->size == 0)
16931 {
16932 /* If we don't need this section, strip it from the
16933 output file. This is mostly to handle .rel(a).bss and
16934 .rel(a).plt. We must create both sections in
16935 create_dynamic_sections, because they must be created
16936 before the linker maps input sections to output
16937 sections. The linker does that before
16938 adjust_dynamic_symbol is called, and it is that
16939 function which decides whether anything needs to go
16940 into these sections. */
16941 s->flags |= SEC_EXCLUDE;
16942 continue;
16943 }
16944
16945 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16946 continue;
16947
16948 /* Allocate memory for the section contents. */
16949 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16950 if (s->contents == NULL)
16951 return false;
16952 }
16953
16954 return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
16955 relocs);
16956 }
16957
16958 /* Size sections even though they're not dynamic. We use it to setup
16959 _TLS_MODULE_BASE_, if needed. */
16960
16961 static bool
16962 elf32_arm_always_size_sections (bfd *output_bfd,
16963 struct bfd_link_info *info)
16964 {
16965 asection *tls_sec;
16966 struct elf32_arm_link_hash_table *htab;
16967
16968 htab = elf32_arm_hash_table (info);
16969
16970 if (bfd_link_relocatable (info))
16971 return true;
16972
16973 tls_sec = elf_hash_table (info)->tls_sec;
16974
16975 if (tls_sec)
16976 {
16977 struct elf_link_hash_entry *tlsbase;
16978
16979 tlsbase = elf_link_hash_lookup
16980 (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
16981
16982 if (tlsbase)
16983 {
16984 struct bfd_link_hash_entry *bh = NULL;
16985 const struct elf_backend_data *bed
16986 = get_elf_backend_data (output_bfd);
16987
16988 if (!(_bfd_generic_link_add_one_symbol
16989 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16990 tls_sec, 0, NULL, false,
16991 bed->collect, &bh)))
16992 return false;
16993
16994 tlsbase->type = STT_TLS;
16995 tlsbase = (struct elf_link_hash_entry *)bh;
16996 tlsbase->def_regular = 1;
16997 tlsbase->other = STV_HIDDEN;
16998 (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
16999 }
17000 }
17001
17002 if (htab->fdpic_p && !bfd_link_relocatable (info)
17003 && !bfd_elf_stack_segment_size (output_bfd, info,
17004 "__stacksize", DEFAULT_STACK_SIZE))
17005 return false;
17006
17007 return true;
17008 }
17009
17010 /* Finish up dynamic symbol handling. We set the contents of various
17011 dynamic sections here. */
17012
17013 static bool
17014 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17015 struct bfd_link_info * info,
17016 struct elf_link_hash_entry * h,
17017 Elf_Internal_Sym * sym)
17018 {
17019 struct elf32_arm_link_hash_table *htab;
17020 struct elf32_arm_link_hash_entry *eh;
17021
17022 htab = elf32_arm_hash_table (info);
17023 if (htab == NULL)
17024 return false;
17025
17026 eh = (struct elf32_arm_link_hash_entry *) h;
17027
17028 if (h->plt.offset != (bfd_vma) -1)
17029 {
17030 if (!eh->is_iplt)
17031 {
17032 BFD_ASSERT (h->dynindx != -1);
17033 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17034 h->dynindx, 0))
17035 return false;
17036 }
17037
17038 if (!h->def_regular)
17039 {
17040 /* Mark the symbol as undefined, rather than as defined in
17041 the .plt section. */
17042 sym->st_shndx = SHN_UNDEF;
17043 /* If the symbol is weak we need to clear the value.
17044 Otherwise, the PLT entry would provide a definition for
17045 the symbol even if the symbol wasn't defined anywhere,
17046 and so the symbol would never be NULL. Leave the value if
17047 there were any relocations where pointer equality matters
17048 (this is a clue for the dynamic linker, to make function
17049 pointer comparisons work between an application and shared
17050 library). */
17051 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17052 sym->st_value = 0;
17053 }
17054 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17055 {
17056 /* At least one non-call relocation references this .iplt entry,
17057 so the .iplt entry is the function's canonical address. */
17058 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17059 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17060 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17061 (output_bfd, htab->root.iplt->output_section));
17062 sym->st_value = (h->plt.offset
17063 + htab->root.iplt->output_section->vma
17064 + htab->root.iplt->output_offset);
17065 }
17066 }
17067
17068 if (h->needs_copy)
17069 {
17070 asection * s;
17071 Elf_Internal_Rela rel;
17072
17073 /* This symbol needs a copy reloc. Set it up. */
17074 BFD_ASSERT (h->dynindx != -1
17075 && (h->root.type == bfd_link_hash_defined
17076 || h->root.type == bfd_link_hash_defweak));
17077
17078 rel.r_addend = 0;
17079 rel.r_offset = (h->root.u.def.value
17080 + h->root.u.def.section->output_section->vma
17081 + h->root.u.def.section->output_offset);
17082 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17083 if (h->root.u.def.section == htab->root.sdynrelro)
17084 s = htab->root.sreldynrelro;
17085 else
17086 s = htab->root.srelbss;
17087 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17088 }
17089
17090 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17091 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17092 it is relative to the ".got" section. */
17093 if (h == htab->root.hdynamic
17094 || (!htab->fdpic_p
17095 && htab->root.target_os != is_vxworks
17096 && h == htab->root.hgot))
17097 sym->st_shndx = SHN_ABS;
17098
17099 return true;
17100 }
17101
17102 static void
17103 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17104 void *contents,
17105 const unsigned long *template, unsigned count)
17106 {
17107 unsigned ix;
17108
17109 for (ix = 0; ix != count; ix++)
17110 {
17111 unsigned long insn = template[ix];
17112
17113 /* Emit mov pc,rx if bx is not permitted. */
17114 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17115 insn = (insn & 0xf000000f) | 0x01a0f000;
17116 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17117 }
17118 }
17119
17120 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17121 other variants, NaCl needs this entry in a static executable's
17122 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17123 zero. For .iplt really only the last bundle is useful, and .iplt
17124 could have a shorter first entry, with each individual PLT entry's
17125 relative branch calculated differently so it targets the last
17126 bundle instead of the instruction before it (labelled .Lplt_tail
17127 above). But it's simpler to keep the size and layout of PLT0
17128 consistent with the dynamic case, at the cost of some dead code at
17129 the start of .iplt and the one dead store to the stack at the start
17130 of .Lplt_tail. */
17131 static void
17132 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17133 asection *plt, bfd_vma got_displacement)
17134 {
17135 unsigned int i;
17136
17137 put_arm_insn (htab, output_bfd,
17138 elf32_arm_nacl_plt0_entry[0]
17139 | arm_movw_immediate (got_displacement),
17140 plt->contents + 0);
17141 put_arm_insn (htab, output_bfd,
17142 elf32_arm_nacl_plt0_entry[1]
17143 | arm_movt_immediate (got_displacement),
17144 plt->contents + 4);
17145
17146 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17147 put_arm_insn (htab, output_bfd,
17148 elf32_arm_nacl_plt0_entry[i],
17149 plt->contents + (i * 4));
17150 }
17151
17152 /* Finish up the dynamic sections. */
17153
17154 static bool
17155 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17156 {
17157 bfd * dynobj;
17158 asection * sgot;
17159 asection * sdyn;
17160 struct elf32_arm_link_hash_table *htab;
17161
17162 htab = elf32_arm_hash_table (info);
17163 if (htab == NULL)
17164 return false;
17165
17166 dynobj = elf_hash_table (info)->dynobj;
17167
17168 sgot = htab->root.sgotplt;
17169 /* A broken linker script might have discarded the dynamic sections.
17170 Catch this here so that we do not seg-fault later on. */
17171 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17172 return false;
17173 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17174
17175 if (elf_hash_table (info)->dynamic_sections_created)
17176 {
17177 asection *splt;
17178 Elf32_External_Dyn *dyncon, *dynconend;
17179
17180 splt = htab->root.splt;
17181 BFD_ASSERT (splt != NULL && sdyn != NULL);
17182 BFD_ASSERT (sgot != NULL);
17183
17184 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17185 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17186
17187 for (; dyncon < dynconend; dyncon++)
17188 {
17189 Elf_Internal_Dyn dyn;
17190 const char * name;
17191 asection * s;
17192
17193 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17194
17195 switch (dyn.d_tag)
17196 {
17197 default:
17198 if (htab->root.target_os == is_vxworks
17199 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17200 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17201 break;
17202
17203 case DT_HASH:
17204 case DT_STRTAB:
17205 case DT_SYMTAB:
17206 case DT_VERSYM:
17207 case DT_VERDEF:
17208 case DT_VERNEED:
17209 break;
17210
17211 case DT_PLTGOT:
17212 name = ".got.plt";
17213 goto get_vma;
17214 case DT_JMPREL:
17215 name = RELOC_SECTION (htab, ".plt");
17216 get_vma:
17217 s = bfd_get_linker_section (dynobj, name);
17218 if (s == NULL)
17219 {
17220 _bfd_error_handler
17221 (_("could not find section %s"), name);
17222 bfd_set_error (bfd_error_invalid_operation);
17223 return false;
17224 }
17225 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17226 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17227 break;
17228
17229 case DT_PLTRELSZ:
17230 s = htab->root.srelplt;
17231 BFD_ASSERT (s != NULL);
17232 dyn.d_un.d_val = s->size;
17233 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17234 break;
17235
17236 case DT_RELSZ:
17237 case DT_RELASZ:
17238 case DT_REL:
17239 case DT_RELA:
17240 break;
17241
17242 case DT_TLSDESC_PLT:
17243 s = htab->root.splt;
17244 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17245 + htab->root.tlsdesc_plt);
17246 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17247 break;
17248
17249 case DT_TLSDESC_GOT:
17250 s = htab->root.sgot;
17251 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17252 + htab->root.tlsdesc_got);
17253 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17254 break;
17255
17256 /* Set the bottom bit of DT_INIT/FINI if the
17257 corresponding function is Thumb. */
17258 case DT_INIT:
17259 name = info->init_function;
17260 goto get_sym;
17261 case DT_FINI:
17262 name = info->fini_function;
17263 get_sym:
17264 /* If it wasn't set by elf_bfd_final_link
17265 then there is nothing to adjust. */
17266 if (dyn.d_un.d_val != 0)
17267 {
17268 struct elf_link_hash_entry * eh;
17269
17270 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17271 false, false, true);
17272 if (eh != NULL
17273 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17274 == ST_BRANCH_TO_THUMB)
17275 {
17276 dyn.d_un.d_val |= 1;
17277 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17278 }
17279 }
17280 break;
17281 }
17282 }
17283
17284 /* Fill in the first entry in the procedure linkage table. */
17285 if (splt->size > 0 && htab->plt_header_size)
17286 {
17287 const bfd_vma *plt0_entry;
17288 bfd_vma got_address, plt_address, got_displacement;
17289
17290 /* Calculate the addresses of the GOT and PLT. */
17291 got_address = sgot->output_section->vma + sgot->output_offset;
17292 plt_address = splt->output_section->vma + splt->output_offset;
17293
17294 if (htab->root.target_os == is_vxworks)
17295 {
17296 /* The VxWorks GOT is relocated by the dynamic linker.
17297 Therefore, we must emit relocations rather than simply
17298 computing the values now. */
17299 Elf_Internal_Rela rel;
17300
17301 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17302 put_arm_insn (htab, output_bfd, plt0_entry[0],
17303 splt->contents + 0);
17304 put_arm_insn (htab, output_bfd, plt0_entry[1],
17305 splt->contents + 4);
17306 put_arm_insn (htab, output_bfd, plt0_entry[2],
17307 splt->contents + 8);
17308 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17309
17310 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17311 rel.r_offset = plt_address + 12;
17312 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17313 rel.r_addend = 0;
17314 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17315 htab->srelplt2->contents);
17316 }
17317 else if (htab->root.target_os == is_nacl)
17318 arm_nacl_put_plt0 (htab, output_bfd, splt,
17319 got_address + 8 - (plt_address + 16));
17320 else if (using_thumb_only (htab))
17321 {
17322 got_displacement = got_address - (plt_address + 12);
17323
17324 plt0_entry = elf32_thumb2_plt0_entry;
17325 put_arm_insn (htab, output_bfd, plt0_entry[0],
17326 splt->contents + 0);
17327 put_arm_insn (htab, output_bfd, plt0_entry[1],
17328 splt->contents + 4);
17329 put_arm_insn (htab, output_bfd, plt0_entry[2],
17330 splt->contents + 8);
17331
17332 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17333 }
17334 else
17335 {
17336 got_displacement = got_address - (plt_address + 16);
17337
17338 plt0_entry = elf32_arm_plt0_entry;
17339 put_arm_insn (htab, output_bfd, plt0_entry[0],
17340 splt->contents + 0);
17341 put_arm_insn (htab, output_bfd, plt0_entry[1],
17342 splt->contents + 4);
17343 put_arm_insn (htab, output_bfd, plt0_entry[2],
17344 splt->contents + 8);
17345 put_arm_insn (htab, output_bfd, plt0_entry[3],
17346 splt->contents + 12);
17347
17348 #ifdef FOUR_WORD_PLT
17349 /* The displacement value goes in the otherwise-unused
17350 last word of the second entry. */
17351 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17352 #else
17353 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17354 #endif
17355 }
17356 }
17357
17358 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17359 really seem like the right value. */
17360 if (splt->output_section->owner == output_bfd)
17361 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17362
17363 if (htab->root.tlsdesc_plt)
17364 {
17365 bfd_vma got_address
17366 = sgot->output_section->vma + sgot->output_offset;
17367 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17368 + htab->root.sgot->output_offset);
17369 bfd_vma plt_address
17370 = splt->output_section->vma + splt->output_offset;
17371
17372 arm_put_trampoline (htab, output_bfd,
17373 splt->contents + htab->root.tlsdesc_plt,
17374 dl_tlsdesc_lazy_trampoline, 6);
17375
17376 bfd_put_32 (output_bfd,
17377 gotplt_address + htab->root.tlsdesc_got
17378 - (plt_address + htab->root.tlsdesc_plt)
17379 - dl_tlsdesc_lazy_trampoline[6],
17380 splt->contents + htab->root.tlsdesc_plt + 24);
17381 bfd_put_32 (output_bfd,
17382 got_address - (plt_address + htab->root.tlsdesc_plt)
17383 - dl_tlsdesc_lazy_trampoline[7],
17384 splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17385 }
17386
17387 if (htab->tls_trampoline)
17388 {
17389 arm_put_trampoline (htab, output_bfd,
17390 splt->contents + htab->tls_trampoline,
17391 tls_trampoline, 3);
17392 #ifdef FOUR_WORD_PLT
17393 bfd_put_32 (output_bfd, 0x00000000,
17394 splt->contents + htab->tls_trampoline + 12);
17395 #endif
17396 }
17397
17398 if (htab->root.target_os == is_vxworks
17399 && !bfd_link_pic (info)
17400 && htab->root.splt->size > 0)
17401 {
17402 /* Correct the .rel(a).plt.unloaded relocations. They will have
17403 incorrect symbol indexes. */
17404 int num_plts;
17405 unsigned char *p;
17406
17407 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17408 / htab->plt_entry_size);
17409 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17410
17411 for (; num_plts; num_plts--)
17412 {
17413 Elf_Internal_Rela rel;
17414
17415 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17416 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17417 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17418 p += RELOC_SIZE (htab);
17419
17420 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17421 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17422 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17423 p += RELOC_SIZE (htab);
17424 }
17425 }
17426 }
17427
17428 if (htab->root.target_os == is_nacl
17429 && htab->root.iplt != NULL
17430 && htab->root.iplt->size > 0)
17431 /* NaCl uses a special first entry in .iplt too. */
17432 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17433
17434 /* Fill in the first three entries in the global offset table. */
17435 if (sgot)
17436 {
17437 if (sgot->size > 0)
17438 {
17439 if (sdyn == NULL)
17440 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17441 else
17442 bfd_put_32 (output_bfd,
17443 sdyn->output_section->vma + sdyn->output_offset,
17444 sgot->contents);
17445 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17446 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17447 }
17448
17449 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17450 }
17451
17452 /* At the very end of the .rofixup section is a pointer to the GOT. */
17453 if (htab->fdpic_p && htab->srofixup != NULL)
17454 {
17455 struct elf_link_hash_entry *hgot = htab->root.hgot;
17456
17457 bfd_vma got_value = hgot->root.u.def.value
17458 + hgot->root.u.def.section->output_section->vma
17459 + hgot->root.u.def.section->output_offset;
17460
17461 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17462
17463 /* Make sure we allocated and generated the same number of fixups. */
17464 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17465 }
17466
17467 return true;
17468 }
17469
17470 static bool
17471 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17472 {
17473 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17474 struct elf32_arm_link_hash_table *globals;
17475 struct elf_segment_map *m;
17476
17477 if (!_bfd_elf_init_file_header (abfd, link_info))
17478 return false;
17479
17480 i_ehdrp = elf_elfheader (abfd);
17481
17482 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17483 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17484 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17485
17486 if (link_info)
17487 {
17488 globals = elf32_arm_hash_table (link_info);
17489 if (globals != NULL && globals->byteswap_code)
17490 i_ehdrp->e_flags |= EF_ARM_BE8;
17491
17492 if (globals->fdpic_p)
17493 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17494 }
17495
17496 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17497 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17498 {
17499 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17500 if (abi == AEABI_VFP_args_vfp)
17501 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17502 else
17503 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17504 }
17505
17506 /* Scan segment to set p_flags attribute if it contains only sections with
17507 SHF_ARM_PURECODE flag. */
17508 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17509 {
17510 unsigned int j;
17511
17512 if (m->count == 0)
17513 continue;
17514 for (j = 0; j < m->count; j++)
17515 {
17516 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17517 break;
17518 }
17519 if (j == m->count)
17520 {
17521 m->p_flags = PF_X;
17522 m->p_flags_valid = 1;
17523 }
17524 }
17525 return true;
17526 }
17527
17528 static enum elf_reloc_type_class
17529 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17530 const asection *rel_sec ATTRIBUTE_UNUSED,
17531 const Elf_Internal_Rela *rela)
17532 {
17533 switch ((int) ELF32_R_TYPE (rela->r_info))
17534 {
17535 case R_ARM_RELATIVE:
17536 return reloc_class_relative;
17537 case R_ARM_JUMP_SLOT:
17538 return reloc_class_plt;
17539 case R_ARM_COPY:
17540 return reloc_class_copy;
17541 case R_ARM_IRELATIVE:
17542 return reloc_class_ifunc;
17543 default:
17544 return reloc_class_normal;
17545 }
17546 }
17547
17548 static void
17549 arm_final_write_processing (bfd *abfd)
17550 {
17551 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17552 }
17553
17554 static bool
17555 elf32_arm_final_write_processing (bfd *abfd)
17556 {
17557 arm_final_write_processing (abfd);
17558 return _bfd_elf_final_write_processing (abfd);
17559 }
17560
17561 /* Return TRUE if this is an unwinding table entry. */
17562
17563 static bool
17564 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17565 {
17566 return (startswith (name, ELF_STRING_ARM_unwind)
17567 || startswith (name, ELF_STRING_ARM_unwind_once));
17568 }
17569
17570
17571 /* Set the type and flags for an ARM section. We do this by
17572 the section name, which is a hack, but ought to work. */
17573
17574 static bool
17575 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17576 {
17577 const char * name;
17578
17579 name = bfd_section_name (sec);
17580
17581 if (is_arm_elf_unwind_section_name (abfd, name))
17582 {
17583 hdr->sh_type = SHT_ARM_EXIDX;
17584 hdr->sh_flags |= SHF_LINK_ORDER;
17585 }
17586
17587 if (sec->flags & SEC_ELF_PURECODE)
17588 hdr->sh_flags |= SHF_ARM_PURECODE;
17589
17590 return true;
17591 }
17592
17593 /* Handle an ARM specific section when reading an object file. This is
17594 called when bfd_section_from_shdr finds a section with an unknown
17595 type. */
17596
17597 static bool
17598 elf32_arm_section_from_shdr (bfd *abfd,
17599 Elf_Internal_Shdr * hdr,
17600 const char *name,
17601 int shindex)
17602 {
17603 /* There ought to be a place to keep ELF backend specific flags, but
17604 at the moment there isn't one. We just keep track of the
17605 sections by their name, instead. Fortunately, the ABI gives
17606 names for all the ARM specific sections, so we will probably get
17607 away with this. */
17608 switch (hdr->sh_type)
17609 {
17610 case SHT_ARM_EXIDX:
17611 case SHT_ARM_PREEMPTMAP:
17612 case SHT_ARM_ATTRIBUTES:
17613 break;
17614
17615 default:
17616 return false;
17617 }
17618
17619 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17620 return false;
17621
17622 return true;
17623 }
17624
17625 static _arm_elf_section_data *
17626 get_arm_elf_section_data (asection * sec)
17627 {
17628 if (sec && sec->owner && is_arm_elf (sec->owner))
17629 return elf32_arm_section_data (sec);
17630 else
17631 return NULL;
17632 }
17633
17634 typedef struct
17635 {
17636 void *flaginfo;
17637 struct bfd_link_info *info;
17638 asection *sec;
17639 int sec_shndx;
17640 int (*func) (void *, const char *, Elf_Internal_Sym *,
17641 asection *, struct elf_link_hash_entry *);
17642 } output_arch_syminfo;
17643
17644 enum map_symbol_type
17645 {
17646 ARM_MAP_ARM,
17647 ARM_MAP_THUMB,
17648 ARM_MAP_DATA
17649 };
17650
17651
17652 /* Output a single mapping symbol. */
17653
17654 static bool
17655 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17656 enum map_symbol_type type,
17657 bfd_vma offset)
17658 {
17659 static const char *names[3] = {"$a", "$t", "$d"};
17660 Elf_Internal_Sym sym;
17661
17662 sym.st_value = osi->sec->output_section->vma
17663 + osi->sec->output_offset
17664 + offset;
17665 sym.st_size = 0;
17666 sym.st_other = 0;
17667 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17668 sym.st_shndx = osi->sec_shndx;
17669 sym.st_target_internal = 0;
17670 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17671 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17672 }
17673
17674 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17675 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17676
17677 static bool
17678 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17679 bool is_iplt_entry_p,
17680 union gotplt_union *root_plt,
17681 struct arm_plt_info *arm_plt)
17682 {
17683 struct elf32_arm_link_hash_table *htab;
17684 bfd_vma addr, plt_header_size;
17685
17686 if (root_plt->offset == (bfd_vma) -1)
17687 return true;
17688
17689 htab = elf32_arm_hash_table (osi->info);
17690 if (htab == NULL)
17691 return false;
17692
17693 if (is_iplt_entry_p)
17694 {
17695 osi->sec = htab->root.iplt;
17696 plt_header_size = 0;
17697 }
17698 else
17699 {
17700 osi->sec = htab->root.splt;
17701 plt_header_size = htab->plt_header_size;
17702 }
17703 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17704 (osi->info->output_bfd, osi->sec->output_section));
17705
17706 addr = root_plt->offset & -2;
17707 if (htab->root.target_os == is_vxworks)
17708 {
17709 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17710 return false;
17711 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17712 return false;
17713 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17714 return false;
17715 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17716 return false;
17717 }
17718 else if (htab->root.target_os == is_nacl)
17719 {
17720 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17721 return false;
17722 }
17723 else if (htab->fdpic_p)
17724 {
17725 enum map_symbol_type type = using_thumb_only(htab)
17726 ? ARM_MAP_THUMB
17727 : ARM_MAP_ARM;
17728
17729 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17730 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17731 return false;
17732 if (!elf32_arm_output_map_sym (osi, type, addr))
17733 return false;
17734 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17735 return false;
17736 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17737 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17738 return false;
17739 }
17740 else if (using_thumb_only (htab))
17741 {
17742 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17743 return false;
17744 }
17745 else
17746 {
17747 bool thumb_stub_p;
17748
17749 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17750 if (thumb_stub_p)
17751 {
17752 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17753 return false;
17754 }
17755 #ifdef FOUR_WORD_PLT
17756 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17757 return false;
17758 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17759 return false;
17760 #else
17761 /* A three-word PLT with no Thumb thunk contains only Arm code,
17762 so only need to output a mapping symbol for the first PLT entry and
17763 entries with thumb thunks. */
17764 if (thumb_stub_p || addr == plt_header_size)
17765 {
17766 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17767 return false;
17768 }
17769 #endif
17770 }
17771
17772 return true;
17773 }
17774
17775 /* Output mapping symbols for PLT entries associated with H. */
17776
17777 static bool
17778 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17779 {
17780 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17781 struct elf32_arm_link_hash_entry *eh;
17782
17783 if (h->root.type == bfd_link_hash_indirect)
17784 return true;
17785
17786 if (h->root.type == bfd_link_hash_warning)
17787 /* When warning symbols are created, they **replace** the "real"
17788 entry in the hash table, thus we never get to see the real
17789 symbol in a hash traversal. So look at it now. */
17790 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17791
17792 eh = (struct elf32_arm_link_hash_entry *) h;
17793 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17794 &h->plt, &eh->plt);
17795 }
17796
17797 /* Bind a veneered symbol to its veneer identified by its hash entry
17798 STUB_ENTRY. The veneered location thus loose its symbol. */
17799
17800 static void
17801 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17802 {
17803 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17804
17805 BFD_ASSERT (hash);
17806 hash->root.root.u.def.section = stub_entry->stub_sec;
17807 hash->root.root.u.def.value = stub_entry->stub_offset;
17808 hash->root.size = stub_entry->stub_size;
17809 }
17810
17811 /* Output a single local symbol for a generated stub. */
17812
17813 static bool
17814 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17815 bfd_vma offset, bfd_vma size)
17816 {
17817 Elf_Internal_Sym sym;
17818
17819 sym.st_value = osi->sec->output_section->vma
17820 + osi->sec->output_offset
17821 + offset;
17822 sym.st_size = size;
17823 sym.st_other = 0;
17824 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17825 sym.st_shndx = osi->sec_shndx;
17826 sym.st_target_internal = 0;
17827 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17828 }
17829
17830 static bool
17831 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17832 void * in_arg)
17833 {
17834 struct elf32_arm_stub_hash_entry *stub_entry;
17835 asection *stub_sec;
17836 bfd_vma addr;
17837 char *stub_name;
17838 output_arch_syminfo *osi;
17839 const insn_sequence *template_sequence;
17840 enum stub_insn_type prev_type;
17841 int size;
17842 int i;
17843 enum map_symbol_type sym_type;
17844
17845 /* Massage our args to the form they really have. */
17846 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17847 osi = (output_arch_syminfo *) in_arg;
17848
17849 stub_sec = stub_entry->stub_sec;
17850
17851 /* Ensure this stub is attached to the current section being
17852 processed. */
17853 if (stub_sec != osi->sec)
17854 return true;
17855
17856 addr = (bfd_vma) stub_entry->stub_offset;
17857 template_sequence = stub_entry->stub_template;
17858
17859 if (arm_stub_sym_claimed (stub_entry->stub_type))
17860 arm_stub_claim_sym (stub_entry);
17861 else
17862 {
17863 stub_name = stub_entry->output_name;
17864 switch (template_sequence[0].type)
17865 {
17866 case ARM_TYPE:
17867 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17868 stub_entry->stub_size))
17869 return false;
17870 break;
17871 case THUMB16_TYPE:
17872 case THUMB32_TYPE:
17873 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17874 stub_entry->stub_size))
17875 return false;
17876 break;
17877 default:
17878 BFD_FAIL ();
17879 return 0;
17880 }
17881 }
17882
17883 prev_type = DATA_TYPE;
17884 size = 0;
17885 for (i = 0; i < stub_entry->stub_template_size; i++)
17886 {
17887 switch (template_sequence[i].type)
17888 {
17889 case ARM_TYPE:
17890 sym_type = ARM_MAP_ARM;
17891 break;
17892
17893 case THUMB16_TYPE:
17894 case THUMB32_TYPE:
17895 sym_type = ARM_MAP_THUMB;
17896 break;
17897
17898 case DATA_TYPE:
17899 sym_type = ARM_MAP_DATA;
17900 break;
17901
17902 default:
17903 BFD_FAIL ();
17904 return false;
17905 }
17906
17907 if (template_sequence[i].type != prev_type)
17908 {
17909 prev_type = template_sequence[i].type;
17910 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17911 return false;
17912 }
17913
17914 switch (template_sequence[i].type)
17915 {
17916 case ARM_TYPE:
17917 case THUMB32_TYPE:
17918 size += 4;
17919 break;
17920
17921 case THUMB16_TYPE:
17922 size += 2;
17923 break;
17924
17925 case DATA_TYPE:
17926 size += 4;
17927 break;
17928
17929 default:
17930 BFD_FAIL ();
17931 return false;
17932 }
17933 }
17934
17935 return true;
17936 }
17937
17938 /* Output mapping symbols for linker generated sections,
17939 and for those data-only sections that do not have a
17940 $d. */
17941
17942 static bool
17943 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17944 struct bfd_link_info *info,
17945 void *flaginfo,
17946 int (*func) (void *, const char *,
17947 Elf_Internal_Sym *,
17948 asection *,
17949 struct elf_link_hash_entry *))
17950 {
17951 output_arch_syminfo osi;
17952 struct elf32_arm_link_hash_table *htab;
17953 bfd_vma offset;
17954 bfd_size_type size;
17955 bfd *input_bfd;
17956
17957 htab = elf32_arm_hash_table (info);
17958 if (htab == NULL)
17959 return false;
17960
17961 check_use_blx (htab);
17962
17963 osi.flaginfo = flaginfo;
17964 osi.info = info;
17965 osi.func = func;
17966
17967 /* Add a $d mapping symbol to data-only sections that
17968 don't have any mapping symbol. This may result in (harmless) redundant
17969 mapping symbols. */
17970 for (input_bfd = info->input_bfds;
17971 input_bfd != NULL;
17972 input_bfd = input_bfd->link.next)
17973 {
17974 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17975 for (osi.sec = input_bfd->sections;
17976 osi.sec != NULL;
17977 osi.sec = osi.sec->next)
17978 {
17979 if (osi.sec->output_section != NULL
17980 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17981 != 0)
17982 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17983 == SEC_HAS_CONTENTS
17984 && get_arm_elf_section_data (osi.sec) != NULL
17985 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17986 && osi.sec->size > 0
17987 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17988 {
17989 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17990 (output_bfd, osi.sec->output_section);
17991 if (osi.sec_shndx != (int)SHN_BAD)
17992 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17993 }
17994 }
17995 }
17996
17997 /* ARM->Thumb glue. */
17998 if (htab->arm_glue_size > 0)
17999 {
18000 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18001 ARM2THUMB_GLUE_SECTION_NAME);
18002
18003 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18004 (output_bfd, osi.sec->output_section);
18005 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18006 || htab->pic_veneer)
18007 size = ARM2THUMB_PIC_GLUE_SIZE;
18008 else if (htab->use_blx)
18009 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18010 else
18011 size = ARM2THUMB_STATIC_GLUE_SIZE;
18012
18013 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18014 {
18015 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18016 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18017 }
18018 }
18019
18020 /* Thumb->ARM glue. */
18021 if (htab->thumb_glue_size > 0)
18022 {
18023 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18024 THUMB2ARM_GLUE_SECTION_NAME);
18025
18026 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18027 (output_bfd, osi.sec->output_section);
18028 size = THUMB2ARM_GLUE_SIZE;
18029
18030 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18031 {
18032 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18033 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18034 }
18035 }
18036
18037 /* ARMv4 BX veneers. */
18038 if (htab->bx_glue_size > 0)
18039 {
18040 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18041 ARM_BX_GLUE_SECTION_NAME);
18042
18043 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18044 (output_bfd, osi.sec->output_section);
18045
18046 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18047 }
18048
18049 /* Long calls stubs. */
18050 if (htab->stub_bfd && htab->stub_bfd->sections)
18051 {
18052 asection* stub_sec;
18053
18054 for (stub_sec = htab->stub_bfd->sections;
18055 stub_sec != NULL;
18056 stub_sec = stub_sec->next)
18057 {
18058 /* Ignore non-stub sections. */
18059 if (!strstr (stub_sec->name, STUB_SUFFIX))
18060 continue;
18061
18062 osi.sec = stub_sec;
18063
18064 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18065 (output_bfd, osi.sec->output_section);
18066
18067 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18068 }
18069 }
18070
18071 /* Finally, output mapping symbols for the PLT. */
18072 if (htab->root.splt && htab->root.splt->size > 0)
18073 {
18074 osi.sec = htab->root.splt;
18075 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18076 (output_bfd, osi.sec->output_section));
18077
18078 /* Output mapping symbols for the plt header. */
18079 if (htab->root.target_os == is_vxworks)
18080 {
18081 /* VxWorks shared libraries have no PLT header. */
18082 if (!bfd_link_pic (info))
18083 {
18084 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18085 return false;
18086 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18087 return false;
18088 }
18089 }
18090 else if (htab->root.target_os == is_nacl)
18091 {
18092 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18093 return false;
18094 }
18095 else if (using_thumb_only (htab) && !htab->fdpic_p)
18096 {
18097 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18098 return false;
18099 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18100 return false;
18101 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18102 return false;
18103 }
18104 else if (!htab->fdpic_p)
18105 {
18106 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18107 return false;
18108 #ifndef FOUR_WORD_PLT
18109 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18110 return false;
18111 #endif
18112 }
18113 }
18114 if (htab->root.target_os == is_nacl
18115 && htab->root.iplt
18116 && htab->root.iplt->size > 0)
18117 {
18118 /* NaCl uses a special first entry in .iplt too. */
18119 osi.sec = htab->root.iplt;
18120 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18121 (output_bfd, osi.sec->output_section));
18122 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18123 return false;
18124 }
18125 if ((htab->root.splt && htab->root.splt->size > 0)
18126 || (htab->root.iplt && htab->root.iplt->size > 0))
18127 {
18128 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18129 for (input_bfd = info->input_bfds;
18130 input_bfd != NULL;
18131 input_bfd = input_bfd->link.next)
18132 {
18133 struct arm_local_iplt_info **local_iplt;
18134 unsigned int i, num_syms;
18135
18136 local_iplt = elf32_arm_local_iplt (input_bfd);
18137 if (local_iplt != NULL)
18138 {
18139 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18140 for (i = 0; i < num_syms; i++)
18141 if (local_iplt[i] != NULL
18142 && !elf32_arm_output_plt_map_1 (&osi, true,
18143 &local_iplt[i]->root,
18144 &local_iplt[i]->arm))
18145 return false;
18146 }
18147 }
18148 }
18149 if (htab->root.tlsdesc_plt != 0)
18150 {
18151 /* Mapping symbols for the lazy tls trampoline. */
18152 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18153 htab->root.tlsdesc_plt))
18154 return false;
18155
18156 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18157 htab->root.tlsdesc_plt + 24))
18158 return false;
18159 }
18160 if (htab->tls_trampoline != 0)
18161 {
18162 /* Mapping symbols for the tls trampoline. */
18163 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18164 return false;
18165 #ifdef FOUR_WORD_PLT
18166 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18167 htab->tls_trampoline + 12))
18168 return false;
18169 #endif
18170 }
18171
18172 return true;
18173 }
18174
18175 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18176 the import library. All SYMCOUNT symbols of ABFD can be examined
18177 from their pointers in SYMS. Pointers of symbols to keep should be
18178 stored continuously at the beginning of that array.
18179
18180 Returns the number of symbols to keep. */
18181
18182 static unsigned int
18183 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18184 struct bfd_link_info *info,
18185 asymbol **syms, long symcount)
18186 {
18187 size_t maxnamelen;
18188 char *cmse_name;
18189 long src_count, dst_count = 0;
18190 struct elf32_arm_link_hash_table *htab;
18191
18192 htab = elf32_arm_hash_table (info);
18193 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18194 symcount = 0;
18195
18196 maxnamelen = 128;
18197 cmse_name = (char *) bfd_malloc (maxnamelen);
18198 BFD_ASSERT (cmse_name);
18199
18200 for (src_count = 0; src_count < symcount; src_count++)
18201 {
18202 struct elf32_arm_link_hash_entry *cmse_hash;
18203 asymbol *sym;
18204 flagword flags;
18205 char *name;
18206 size_t namelen;
18207
18208 sym = syms[src_count];
18209 flags = sym->flags;
18210 name = (char *) bfd_asymbol_name (sym);
18211
18212 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18213 continue;
18214 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18215 continue;
18216
18217 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18218 if (namelen > maxnamelen)
18219 {
18220 cmse_name = (char *)
18221 bfd_realloc (cmse_name, namelen);
18222 maxnamelen = namelen;
18223 }
18224 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18225 cmse_hash = (struct elf32_arm_link_hash_entry *)
18226 elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18227
18228 if (!cmse_hash
18229 || (cmse_hash->root.root.type != bfd_link_hash_defined
18230 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18231 || cmse_hash->root.type != STT_FUNC)
18232 continue;
18233
18234 syms[dst_count++] = sym;
18235 }
18236 free (cmse_name);
18237
18238 syms[dst_count] = NULL;
18239
18240 return dst_count;
18241 }
18242
18243 /* Filter symbols of ABFD to include in the import library. All
18244 SYMCOUNT symbols of ABFD can be examined from their pointers in
18245 SYMS. Pointers of symbols to keep should be stored continuously at
18246 the beginning of that array.
18247
18248 Returns the number of symbols to keep. */
18249
18250 static unsigned int
18251 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18252 struct bfd_link_info *info,
18253 asymbol **syms, long symcount)
18254 {
18255 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18256
18257 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18258 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18259 library to be a relocatable object file. */
18260 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18261 if (globals->cmse_implib)
18262 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18263 else
18264 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18265 }
18266
18267 /* Allocate target specific section data. */
18268
18269 static bool
18270 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18271 {
18272 if (!sec->used_by_bfd)
18273 {
18274 _arm_elf_section_data *sdata;
18275 size_t amt = sizeof (*sdata);
18276
18277 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18278 if (sdata == NULL)
18279 return false;
18280 sec->used_by_bfd = sdata;
18281 }
18282
18283 return _bfd_elf_new_section_hook (abfd, sec);
18284 }
18285
18286
18287 /* Used to order a list of mapping symbols by address. */
18288
18289 static int
18290 elf32_arm_compare_mapping (const void * a, const void * b)
18291 {
18292 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18293 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18294
18295 if (amap->vma > bmap->vma)
18296 return 1;
18297 else if (amap->vma < bmap->vma)
18298 return -1;
18299 else if (amap->type > bmap->type)
18300 /* Ensure results do not depend on the host qsort for objects with
18301 multiple mapping symbols at the same address by sorting on type
18302 after vma. */
18303 return 1;
18304 else if (amap->type < bmap->type)
18305 return -1;
18306 else
18307 return 0;
18308 }
18309
18310 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18311
18312 static unsigned long
18313 offset_prel31 (unsigned long addr, bfd_vma offset)
18314 {
18315 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18316 }
18317
18318 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18319 relocations. */
18320
18321 static void
18322 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18323 {
18324 unsigned long first_word = bfd_get_32 (output_bfd, from);
18325 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18326
18327 /* High bit of first word is supposed to be zero. */
18328 if ((first_word & 0x80000000ul) == 0)
18329 first_word = offset_prel31 (first_word, offset);
18330
18331 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18332 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18333 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18334 second_word = offset_prel31 (second_word, offset);
18335
18336 bfd_put_32 (output_bfd, first_word, to);
18337 bfd_put_32 (output_bfd, second_word, to + 4);
18338 }
18339
18340 /* Data for make_branch_to_a8_stub(). */
18341
18342 struct a8_branch_to_stub_data
18343 {
18344 asection *writing_section;
18345 bfd_byte *contents;
18346 };
18347
18348
18349 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18350 places for a particular section. */
18351
18352 static bool
18353 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18354 void *in_arg)
18355 {
18356 struct elf32_arm_stub_hash_entry *stub_entry;
18357 struct a8_branch_to_stub_data *data;
18358 bfd_byte *contents;
18359 unsigned long branch_insn;
18360 bfd_vma veneered_insn_loc, veneer_entry_loc;
18361 bfd_signed_vma branch_offset;
18362 bfd *abfd;
18363 unsigned int loc;
18364
18365 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18366 data = (struct a8_branch_to_stub_data *) in_arg;
18367
18368 if (stub_entry->target_section != data->writing_section
18369 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18370 return true;
18371
18372 contents = data->contents;
18373
18374 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18375 generated when both source and target are in the same section. */
18376 veneered_insn_loc = stub_entry->target_section->output_section->vma
18377 + stub_entry->target_section->output_offset
18378 + stub_entry->source_value;
18379
18380 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18381 + stub_entry->stub_sec->output_offset
18382 + stub_entry->stub_offset;
18383
18384 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18385 veneered_insn_loc &= ~3u;
18386
18387 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18388
18389 abfd = stub_entry->target_section->owner;
18390 loc = stub_entry->source_value;
18391
18392 /* We attempt to avoid this condition by setting stubs_always_after_branch
18393 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18394 This check is just to be on the safe side... */
18395 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18396 {
18397 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18398 "allocated in unsafe location"), abfd);
18399 return false;
18400 }
18401
18402 switch (stub_entry->stub_type)
18403 {
18404 case arm_stub_a8_veneer_b:
18405 case arm_stub_a8_veneer_b_cond:
18406 branch_insn = 0xf0009000;
18407 goto jump24;
18408
18409 case arm_stub_a8_veneer_blx:
18410 branch_insn = 0xf000e800;
18411 goto jump24;
18412
18413 case arm_stub_a8_veneer_bl:
18414 {
18415 unsigned int i1, j1, i2, j2, s;
18416
18417 branch_insn = 0xf000d000;
18418
18419 jump24:
18420 if (branch_offset < -16777216 || branch_offset > 16777214)
18421 {
18422 /* There's not much we can do apart from complain if this
18423 happens. */
18424 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18425 "of range (input file too large)"), abfd);
18426 return false;
18427 }
18428
18429 /* i1 = not(j1 eor s), so:
18430 not i1 = j1 eor s
18431 j1 = (not i1) eor s. */
18432
18433 branch_insn |= (branch_offset >> 1) & 0x7ff;
18434 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18435 i2 = (branch_offset >> 22) & 1;
18436 i1 = (branch_offset >> 23) & 1;
18437 s = (branch_offset >> 24) & 1;
18438 j1 = (!i1) ^ s;
18439 j2 = (!i2) ^ s;
18440 branch_insn |= j2 << 11;
18441 branch_insn |= j1 << 13;
18442 branch_insn |= s << 26;
18443 }
18444 break;
18445
18446 default:
18447 BFD_FAIL ();
18448 return false;
18449 }
18450
18451 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18452 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18453
18454 return true;
18455 }
18456
18457 /* Beginning of stm32l4xx work-around. */
18458
18459 /* Functions encoding instructions necessary for the emission of the
18460 fix-stm32l4xx-629360.
18461 Encoding is extracted from the
18462 ARM (C) Architecture Reference Manual
18463 ARMv7-A and ARMv7-R edition
18464 ARM DDI 0406C.b (ID072512). */
18465
18466 static inline bfd_vma
18467 create_instruction_branch_absolute (int branch_offset)
18468 {
18469 /* A8.8.18 B (A8-334)
18470 B target_address (Encoding T4). */
18471 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18472 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18473 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18474
18475 int s = ((branch_offset & 0x1000000) >> 24);
18476 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18477 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18478
18479 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18480 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18481
18482 bfd_vma patched_inst = 0xf0009000
18483 | s << 26 /* S. */
18484 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18485 | j1 << 13 /* J1. */
18486 | j2 << 11 /* J2. */
18487 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18488
18489 return patched_inst;
18490 }
18491
18492 static inline bfd_vma
18493 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18494 {
18495 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18496 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18497 bfd_vma patched_inst = 0xe8900000
18498 | (/*W=*/wback << 21)
18499 | (base_reg << 16)
18500 | (reg_mask & 0x0000ffff);
18501
18502 return patched_inst;
18503 }
18504
18505 static inline bfd_vma
18506 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18507 {
18508 /* A8.8.60 LDMDB/LDMEA (A8-402)
18509 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18510 bfd_vma patched_inst = 0xe9100000
18511 | (/*W=*/wback << 21)
18512 | (base_reg << 16)
18513 | (reg_mask & 0x0000ffff);
18514
18515 return patched_inst;
18516 }
18517
18518 static inline bfd_vma
18519 create_instruction_mov (int target_reg, int source_reg)
18520 {
18521 /* A8.8.103 MOV (register) (A8-486)
18522 MOV Rd, Rm (Encoding T1). */
18523 bfd_vma patched_inst = 0x4600
18524 | (target_reg & 0x7)
18525 | ((target_reg & 0x8) >> 3) << 7
18526 | (source_reg << 3);
18527
18528 return patched_inst;
18529 }
18530
18531 static inline bfd_vma
18532 create_instruction_sub (int target_reg, int source_reg, int value)
18533 {
18534 /* A8.8.221 SUB (immediate) (A8-708)
18535 SUB Rd, Rn, #value (Encoding T3). */
18536 bfd_vma patched_inst = 0xf1a00000
18537 | (target_reg << 8)
18538 | (source_reg << 16)
18539 | (/*S=*/0 << 20)
18540 | ((value & 0x800) >> 11) << 26
18541 | ((value & 0x700) >> 8) << 12
18542 | (value & 0x0ff);
18543
18544 return patched_inst;
18545 }
18546
18547 static inline bfd_vma
18548 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18549 int first_reg)
18550 {
18551 /* A8.8.332 VLDM (A8-922)
18552 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18553 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18554 | (/*W=*/wback << 21)
18555 | (base_reg << 16)
18556 | (num_words & 0x000000ff)
18557 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18558 | (first_reg & 0x00000001) << 22;
18559
18560 return patched_inst;
18561 }
18562
18563 static inline bfd_vma
18564 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18565 int first_reg)
18566 {
18567 /* A8.8.332 VLDM (A8-922)
18568 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18569 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18570 | (base_reg << 16)
18571 | (num_words & 0x000000ff)
18572 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18573 | (first_reg & 0x00000001) << 22;
18574
18575 return patched_inst;
18576 }
18577
18578 static inline bfd_vma
18579 create_instruction_udf_w (int value)
18580 {
18581 /* A8.8.247 UDF (A8-758)
18582 Undefined (Encoding T2). */
18583 bfd_vma patched_inst = 0xf7f0a000
18584 | (value & 0x00000fff)
18585 | (value & 0x000f0000) << 16;
18586
18587 return patched_inst;
18588 }
18589
18590 static inline bfd_vma
18591 create_instruction_udf (int value)
18592 {
18593 /* A8.8.247 UDF (A8-758)
18594 Undefined (Encoding T1). */
18595 bfd_vma patched_inst = 0xde00
18596 | (value & 0xff);
18597
18598 return patched_inst;
18599 }
18600
18601 /* Functions writing an instruction in memory, returning the next
18602 memory position to write to. */
18603
18604 static inline bfd_byte *
18605 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18606 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18607 {
18608 put_thumb2_insn (htab, output_bfd, insn, pt);
18609 return pt + 4;
18610 }
18611
18612 static inline bfd_byte *
18613 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18614 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18615 {
18616 put_thumb_insn (htab, output_bfd, insn, pt);
18617 return pt + 2;
18618 }
18619
18620 /* Function filling up a region in memory with T1 and T2 UDFs taking
18621 care of alignment. */
18622
18623 static bfd_byte *
18624 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18625 bfd * output_bfd,
18626 const bfd_byte * const base_stub_contents,
18627 bfd_byte * const from_stub_contents,
18628 const bfd_byte * const end_stub_contents)
18629 {
18630 bfd_byte *current_stub_contents = from_stub_contents;
18631
18632 /* Fill the remaining of the stub with deterministic contents : UDF
18633 instructions.
18634 Check if realignment is needed on modulo 4 frontier using T1, to
18635 further use T2. */
18636 if ((current_stub_contents < end_stub_contents)
18637 && !((current_stub_contents - base_stub_contents) % 2)
18638 && ((current_stub_contents - base_stub_contents) % 4))
18639 current_stub_contents =
18640 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18641 create_instruction_udf (0));
18642
18643 for (; current_stub_contents < end_stub_contents;)
18644 current_stub_contents =
18645 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18646 create_instruction_udf_w (0));
18647
18648 return current_stub_contents;
18649 }
18650
18651 /* Functions writing the stream of instructions equivalent to the
18652 derived sequence for ldmia, ldmdb, vldm respectively. */
18653
18654 static void
18655 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18656 bfd * output_bfd,
18657 const insn32 initial_insn,
18658 const bfd_byte *const initial_insn_addr,
18659 bfd_byte *const base_stub_contents)
18660 {
18661 int wback = (initial_insn & 0x00200000) >> 21;
18662 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18663 int insn_all_registers = initial_insn & 0x0000ffff;
18664 int insn_low_registers, insn_high_registers;
18665 int usable_register_mask;
18666 int nb_registers = elf32_arm_popcount (insn_all_registers);
18667 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18668 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18669 bfd_byte *current_stub_contents = base_stub_contents;
18670
18671 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18672
18673 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18674 smaller than 8 registers load sequences that do not cause the
18675 hardware issue. */
18676 if (nb_registers <= 8)
18677 {
18678 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18679 current_stub_contents =
18680 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18681 initial_insn);
18682
18683 /* B initial_insn_addr+4. */
18684 if (!restore_pc)
18685 current_stub_contents =
18686 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18687 create_instruction_branch_absolute
18688 (initial_insn_addr - current_stub_contents));
18689
18690 /* Fill the remaining of the stub with deterministic contents. */
18691 current_stub_contents =
18692 stm32l4xx_fill_stub_udf (htab, output_bfd,
18693 base_stub_contents, current_stub_contents,
18694 base_stub_contents +
18695 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18696
18697 return;
18698 }
18699
18700 /* - reg_list[13] == 0. */
18701 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18702
18703 /* - reg_list[14] & reg_list[15] != 1. */
18704 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18705
18706 /* - if (wback==1) reg_list[rn] == 0. */
18707 BFD_ASSERT (!wback || !restore_rn);
18708
18709 /* - nb_registers > 8. */
18710 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18711
18712 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18713
18714 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18715 - One with the 7 lowest registers (register mask 0x007F)
18716 This LDM will finally contain between 2 and 7 registers
18717 - One with the 7 highest registers (register mask 0xDF80)
18718 This ldm will finally contain between 2 and 7 registers. */
18719 insn_low_registers = insn_all_registers & 0x007F;
18720 insn_high_registers = insn_all_registers & 0xDF80;
18721
18722 /* A spare register may be needed during this veneer to temporarily
18723 handle the base register. This register will be restored with the
18724 last LDM operation.
18725 The usable register may be any general purpose register (that
18726 excludes PC, SP, LR : register mask is 0x1FFF). */
18727 usable_register_mask = 0x1FFF;
18728
18729 /* Generate the stub function. */
18730 if (wback)
18731 {
18732 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18733 current_stub_contents =
18734 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18735 create_instruction_ldmia
18736 (rn, /*wback=*/1, insn_low_registers));
18737
18738 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18739 current_stub_contents =
18740 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18741 create_instruction_ldmia
18742 (rn, /*wback=*/1, insn_high_registers));
18743 if (!restore_pc)
18744 {
18745 /* B initial_insn_addr+4. */
18746 current_stub_contents =
18747 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18748 create_instruction_branch_absolute
18749 (initial_insn_addr - current_stub_contents));
18750 }
18751 }
18752 else /* if (!wback). */
18753 {
18754 ri = rn;
18755
18756 /* If Rn is not part of the high-register-list, move it there. */
18757 if (!(insn_high_registers & (1 << rn)))
18758 {
18759 /* Choose a Ri in the high-register-list that will be restored. */
18760 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18761
18762 /* MOV Ri, Rn. */
18763 current_stub_contents =
18764 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18765 create_instruction_mov (ri, rn));
18766 }
18767
18768 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18769 current_stub_contents =
18770 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18771 create_instruction_ldmia
18772 (ri, /*wback=*/1, insn_low_registers));
18773
18774 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18775 current_stub_contents =
18776 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18777 create_instruction_ldmia
18778 (ri, /*wback=*/0, insn_high_registers));
18779
18780 if (!restore_pc)
18781 {
18782 /* B initial_insn_addr+4. */
18783 current_stub_contents =
18784 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18785 create_instruction_branch_absolute
18786 (initial_insn_addr - current_stub_contents));
18787 }
18788 }
18789
18790 /* Fill the remaining of the stub with deterministic contents. */
18791 current_stub_contents =
18792 stm32l4xx_fill_stub_udf (htab, output_bfd,
18793 base_stub_contents, current_stub_contents,
18794 base_stub_contents +
18795 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18796 }
18797
18798 static void
18799 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18800 bfd * output_bfd,
18801 const insn32 initial_insn,
18802 const bfd_byte *const initial_insn_addr,
18803 bfd_byte *const base_stub_contents)
18804 {
18805 int wback = (initial_insn & 0x00200000) >> 21;
18806 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18807 int insn_all_registers = initial_insn & 0x0000ffff;
18808 int insn_low_registers, insn_high_registers;
18809 int usable_register_mask;
18810 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18811 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18812 int nb_registers = elf32_arm_popcount (insn_all_registers);
18813 bfd_byte *current_stub_contents = base_stub_contents;
18814
18815 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18816
18817 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18818 smaller than 8 registers load sequences that do not cause the
18819 hardware issue. */
18820 if (nb_registers <= 8)
18821 {
18822 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18823 current_stub_contents =
18824 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18825 initial_insn);
18826
18827 /* B initial_insn_addr+4. */
18828 current_stub_contents =
18829 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18830 create_instruction_branch_absolute
18831 (initial_insn_addr - current_stub_contents));
18832
18833 /* Fill the remaining of the stub with deterministic contents. */
18834 current_stub_contents =
18835 stm32l4xx_fill_stub_udf (htab, output_bfd,
18836 base_stub_contents, current_stub_contents,
18837 base_stub_contents +
18838 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18839
18840 return;
18841 }
18842
18843 /* - reg_list[13] == 0. */
18844 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18845
18846 /* - reg_list[14] & reg_list[15] != 1. */
18847 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18848
18849 /* - if (wback==1) reg_list[rn] == 0. */
18850 BFD_ASSERT (!wback || !restore_rn);
18851
18852 /* - nb_registers > 8. */
18853 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18854
18855 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18856
18857 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18858 - One with the 7 lowest registers (register mask 0x007F)
18859 This LDM will finally contain between 2 and 7 registers
18860 - One with the 7 highest registers (register mask 0xDF80)
18861 This ldm will finally contain between 2 and 7 registers. */
18862 insn_low_registers = insn_all_registers & 0x007F;
18863 insn_high_registers = insn_all_registers & 0xDF80;
18864
18865 /* A spare register may be needed during this veneer to temporarily
18866 handle the base register. This register will be restored with
18867 the last LDM operation.
18868 The usable register may be any general purpose register (that excludes
18869 PC, SP, LR : register mask is 0x1FFF). */
18870 usable_register_mask = 0x1FFF;
18871
18872 /* Generate the stub function. */
18873 if (!wback && !restore_pc && !restore_rn)
18874 {
18875 /* Choose a Ri in the low-register-list that will be restored. */
18876 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18877
18878 /* MOV Ri, Rn. */
18879 current_stub_contents =
18880 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18881 create_instruction_mov (ri, rn));
18882
18883 /* LDMDB Ri!, {R-high-register-list}. */
18884 current_stub_contents =
18885 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18886 create_instruction_ldmdb
18887 (ri, /*wback=*/1, insn_high_registers));
18888
18889 /* LDMDB Ri, {R-low-register-list}. */
18890 current_stub_contents =
18891 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18892 create_instruction_ldmdb
18893 (ri, /*wback=*/0, insn_low_registers));
18894
18895 /* B initial_insn_addr+4. */
18896 current_stub_contents =
18897 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18898 create_instruction_branch_absolute
18899 (initial_insn_addr - current_stub_contents));
18900 }
18901 else if (wback && !restore_pc && !restore_rn)
18902 {
18903 /* LDMDB Rn!, {R-high-register-list}. */
18904 current_stub_contents =
18905 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18906 create_instruction_ldmdb
18907 (rn, /*wback=*/1, insn_high_registers));
18908
18909 /* LDMDB Rn!, {R-low-register-list}. */
18910 current_stub_contents =
18911 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18912 create_instruction_ldmdb
18913 (rn, /*wback=*/1, insn_low_registers));
18914
18915 /* B initial_insn_addr+4. */
18916 current_stub_contents =
18917 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18918 create_instruction_branch_absolute
18919 (initial_insn_addr - current_stub_contents));
18920 }
18921 else if (!wback && restore_pc && !restore_rn)
18922 {
18923 /* Choose a Ri in the high-register-list that will be restored. */
18924 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18925
18926 /* SUB Ri, Rn, #(4*nb_registers). */
18927 current_stub_contents =
18928 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18929 create_instruction_sub (ri, rn, (4 * nb_registers)));
18930
18931 /* LDMIA Ri!, {R-low-register-list}. */
18932 current_stub_contents =
18933 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18934 create_instruction_ldmia
18935 (ri, /*wback=*/1, insn_low_registers));
18936
18937 /* LDMIA Ri, {R-high-register-list}. */
18938 current_stub_contents =
18939 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18940 create_instruction_ldmia
18941 (ri, /*wback=*/0, insn_high_registers));
18942 }
18943 else if (wback && restore_pc && !restore_rn)
18944 {
18945 /* Choose a Ri in the high-register-list that will be restored. */
18946 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18947
18948 /* SUB Rn, Rn, #(4*nb_registers) */
18949 current_stub_contents =
18950 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18951 create_instruction_sub (rn, rn, (4 * nb_registers)));
18952
18953 /* MOV Ri, Rn. */
18954 current_stub_contents =
18955 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18956 create_instruction_mov (ri, rn));
18957
18958 /* LDMIA Ri!, {R-low-register-list}. */
18959 current_stub_contents =
18960 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18961 create_instruction_ldmia
18962 (ri, /*wback=*/1, insn_low_registers));
18963
18964 /* LDMIA Ri, {R-high-register-list}. */
18965 current_stub_contents =
18966 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18967 create_instruction_ldmia
18968 (ri, /*wback=*/0, insn_high_registers));
18969 }
18970 else if (!wback && !restore_pc && restore_rn)
18971 {
18972 ri = rn;
18973 if (!(insn_low_registers & (1 << rn)))
18974 {
18975 /* Choose a Ri in the low-register-list that will be restored. */
18976 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18977
18978 /* MOV Ri, Rn. */
18979 current_stub_contents =
18980 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18981 create_instruction_mov (ri, rn));
18982 }
18983
18984 /* LDMDB Ri!, {R-high-register-list}. */
18985 current_stub_contents =
18986 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18987 create_instruction_ldmdb
18988 (ri, /*wback=*/1, insn_high_registers));
18989
18990 /* LDMDB Ri, {R-low-register-list}. */
18991 current_stub_contents =
18992 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18993 create_instruction_ldmdb
18994 (ri, /*wback=*/0, insn_low_registers));
18995
18996 /* B initial_insn_addr+4. */
18997 current_stub_contents =
18998 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18999 create_instruction_branch_absolute
19000 (initial_insn_addr - current_stub_contents));
19001 }
19002 else if (!wback && restore_pc && restore_rn)
19003 {
19004 ri = rn;
19005 if (!(insn_high_registers & (1 << rn)))
19006 {
19007 /* Choose a Ri in the high-register-list that will be restored. */
19008 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19009 }
19010
19011 /* SUB Ri, Rn, #(4*nb_registers). */
19012 current_stub_contents =
19013 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19014 create_instruction_sub (ri, rn, (4 * nb_registers)));
19015
19016 /* LDMIA Ri!, {R-low-register-list}. */
19017 current_stub_contents =
19018 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19019 create_instruction_ldmia
19020 (ri, /*wback=*/1, insn_low_registers));
19021
19022 /* LDMIA Ri, {R-high-register-list}. */
19023 current_stub_contents =
19024 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19025 create_instruction_ldmia
19026 (ri, /*wback=*/0, insn_high_registers));
19027 }
19028 else if (wback && restore_rn)
19029 {
19030 /* The assembler should not have accepted to encode this. */
19031 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19032 "undefined behavior.\n");
19033 }
19034
19035 /* Fill the remaining of the stub with deterministic contents. */
19036 current_stub_contents =
19037 stm32l4xx_fill_stub_udf (htab, output_bfd,
19038 base_stub_contents, current_stub_contents,
19039 base_stub_contents +
19040 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19041
19042 }
19043
19044 static void
19045 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19046 bfd * output_bfd,
19047 const insn32 initial_insn,
19048 const bfd_byte *const initial_insn_addr,
19049 bfd_byte *const base_stub_contents)
19050 {
19051 int num_words = initial_insn & 0xff;
19052 bfd_byte *current_stub_contents = base_stub_contents;
19053
19054 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19055
19056 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19057 smaller than 8 words load sequences that do not cause the
19058 hardware issue. */
19059 if (num_words <= 8)
19060 {
19061 /* Untouched instruction. */
19062 current_stub_contents =
19063 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19064 initial_insn);
19065
19066 /* B initial_insn_addr+4. */
19067 current_stub_contents =
19068 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19069 create_instruction_branch_absolute
19070 (initial_insn_addr - current_stub_contents));
19071 }
19072 else
19073 {
19074 bool is_dp = /* DP encoding. */
19075 (initial_insn & 0xfe100f00) == 0xec100b00;
19076 bool is_ia_nobang = /* (IA without !). */
19077 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19078 bool is_ia_bang = /* (IA with !) - includes VPOP. */
19079 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19080 bool is_db_bang = /* (DB with !). */
19081 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19082 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19083 /* d = UInt (Vd:D);. */
19084 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19085 | (((unsigned int)initial_insn << 9) >> 31);
19086
19087 /* Compute the number of 8-words chunks needed to split. */
19088 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19089 int chunk;
19090
19091 /* The test coverage has been done assuming the following
19092 hypothesis that exactly one of the previous is_ predicates is
19093 true. */
19094 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19095 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19096
19097 /* We treat the cutting of the words in one pass for all
19098 cases, then we emit the adjustments:
19099
19100 vldm rx, {...}
19101 -> vldm rx!, {8_words_or_less} for each needed 8_word
19102 -> sub rx, rx, #size (list)
19103
19104 vldm rx!, {...}
19105 -> vldm rx!, {8_words_or_less} for each needed 8_word
19106 This also handles vpop instruction (when rx is sp)
19107
19108 vldmd rx!, {...}
19109 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19110 for (chunk = 0; chunk < chunks; ++chunk)
19111 {
19112 bfd_vma new_insn = 0;
19113
19114 if (is_ia_nobang || is_ia_bang)
19115 {
19116 new_insn = create_instruction_vldmia
19117 (base_reg,
19118 is_dp,
19119 /*wback= . */1,
19120 chunks - (chunk + 1) ?
19121 8 : num_words - chunk * 8,
19122 first_reg + chunk * 8);
19123 }
19124 else if (is_db_bang)
19125 {
19126 new_insn = create_instruction_vldmdb
19127 (base_reg,
19128 is_dp,
19129 chunks - (chunk + 1) ?
19130 8 : num_words - chunk * 8,
19131 first_reg + chunk * 8);
19132 }
19133
19134 if (new_insn)
19135 current_stub_contents =
19136 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19137 new_insn);
19138 }
19139
19140 /* Only this case requires the base register compensation
19141 subtract. */
19142 if (is_ia_nobang)
19143 {
19144 current_stub_contents =
19145 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19146 create_instruction_sub
19147 (base_reg, base_reg, 4*num_words));
19148 }
19149
19150 /* B initial_insn_addr+4. */
19151 current_stub_contents =
19152 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19153 create_instruction_branch_absolute
19154 (initial_insn_addr - current_stub_contents));
19155 }
19156
19157 /* Fill the remaining of the stub with deterministic contents. */
19158 current_stub_contents =
19159 stm32l4xx_fill_stub_udf (htab, output_bfd,
19160 base_stub_contents, current_stub_contents,
19161 base_stub_contents +
19162 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19163 }
19164
19165 static void
19166 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19167 bfd * output_bfd,
19168 const insn32 wrong_insn,
19169 const bfd_byte *const wrong_insn_addr,
19170 bfd_byte *const stub_contents)
19171 {
19172 if (is_thumb2_ldmia (wrong_insn))
19173 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19174 wrong_insn, wrong_insn_addr,
19175 stub_contents);
19176 else if (is_thumb2_ldmdb (wrong_insn))
19177 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19178 wrong_insn, wrong_insn_addr,
19179 stub_contents);
19180 else if (is_thumb2_vldm (wrong_insn))
19181 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19182 wrong_insn, wrong_insn_addr,
19183 stub_contents);
19184 }
19185
19186 /* End of stm32l4xx work-around. */
19187
19188
19189 /* Do code byteswapping. Return FALSE afterwards so that the section is
19190 written out as normal. */
19191
19192 static bool
19193 elf32_arm_write_section (bfd *output_bfd,
19194 struct bfd_link_info *link_info,
19195 asection *sec,
19196 bfd_byte *contents)
19197 {
19198 unsigned int mapcount, errcount;
19199 _arm_elf_section_data *arm_data;
19200 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19201 elf32_arm_section_map *map;
19202 elf32_vfp11_erratum_list *errnode;
19203 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19204 bfd_vma ptr;
19205 bfd_vma end;
19206 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19207 bfd_byte tmp;
19208 unsigned int i;
19209
19210 if (globals == NULL)
19211 return false;
19212
19213 /* If this section has not been allocated an _arm_elf_section_data
19214 structure then we cannot record anything. */
19215 arm_data = get_arm_elf_section_data (sec);
19216 if (arm_data == NULL)
19217 return false;
19218
19219 mapcount = arm_data->mapcount;
19220 map = arm_data->map;
19221 errcount = arm_data->erratumcount;
19222
19223 if (errcount != 0)
19224 {
19225 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19226
19227 for (errnode = arm_data->erratumlist; errnode != 0;
19228 errnode = errnode->next)
19229 {
19230 bfd_vma target = errnode->vma - offset;
19231
19232 switch (errnode->type)
19233 {
19234 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19235 {
19236 bfd_vma branch_to_veneer;
19237 /* Original condition code of instruction, plus bit mask for
19238 ARM B instruction. */
19239 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19240 | 0x0a000000;
19241
19242 /* The instruction is before the label. */
19243 target -= 4;
19244
19245 /* Above offset included in -4 below. */
19246 branch_to_veneer = errnode->u.b.veneer->vma
19247 - errnode->vma - 4;
19248
19249 if ((signed) branch_to_veneer < -(1 << 25)
19250 || (signed) branch_to_veneer >= (1 << 25))
19251 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19252 "range"), output_bfd);
19253
19254 insn |= (branch_to_veneer >> 2) & 0xffffff;
19255 contents[endianflip ^ target] = insn & 0xff;
19256 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19257 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19258 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19259 }
19260 break;
19261
19262 case VFP11_ERRATUM_ARM_VENEER:
19263 {
19264 bfd_vma branch_from_veneer;
19265 unsigned int insn;
19266
19267 /* Take size of veneer into account. */
19268 branch_from_veneer = errnode->u.v.branch->vma
19269 - errnode->vma - 12;
19270
19271 if ((signed) branch_from_veneer < -(1 << 25)
19272 || (signed) branch_from_veneer >= (1 << 25))
19273 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19274 "range"), output_bfd);
19275
19276 /* Original instruction. */
19277 insn = errnode->u.v.branch->u.b.vfp_insn;
19278 contents[endianflip ^ target] = insn & 0xff;
19279 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19280 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19281 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19282
19283 /* Branch back to insn after original insn. */
19284 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19285 contents[endianflip ^ (target + 4)] = insn & 0xff;
19286 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19287 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19288 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19289 }
19290 break;
19291
19292 default:
19293 abort ();
19294 }
19295 }
19296 }
19297
19298 if (arm_data->stm32l4xx_erratumcount != 0)
19299 {
19300 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19301 stm32l4xx_errnode != 0;
19302 stm32l4xx_errnode = stm32l4xx_errnode->next)
19303 {
19304 bfd_vma target = stm32l4xx_errnode->vma - offset;
19305
19306 switch (stm32l4xx_errnode->type)
19307 {
19308 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19309 {
19310 unsigned int insn;
19311 bfd_vma branch_to_veneer =
19312 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19313
19314 if ((signed) branch_to_veneer < -(1 << 24)
19315 || (signed) branch_to_veneer >= (1 << 24))
19316 {
19317 bfd_vma out_of_range =
19318 ((signed) branch_to_veneer < -(1 << 24)) ?
19319 - branch_to_veneer - (1 << 24) :
19320 ((signed) branch_to_veneer >= (1 << 24)) ?
19321 branch_to_veneer - (1 << 24) : 0;
19322
19323 _bfd_error_handler
19324 (_("%pB(%#" PRIx64 "): error: "
19325 "cannot create STM32L4XX veneer; "
19326 "jump out of range by %" PRId64 " bytes; "
19327 "cannot encode branch instruction"),
19328 output_bfd,
19329 (uint64_t) (stm32l4xx_errnode->vma - 4),
19330 (int64_t) out_of_range);
19331 continue;
19332 }
19333
19334 insn = create_instruction_branch_absolute
19335 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19336
19337 /* The instruction is before the label. */
19338 target -= 4;
19339
19340 put_thumb2_insn (globals, output_bfd,
19341 (bfd_vma) insn, contents + target);
19342 }
19343 break;
19344
19345 case STM32L4XX_ERRATUM_VENEER:
19346 {
19347 bfd_byte * veneer;
19348 bfd_byte * veneer_r;
19349 unsigned int insn;
19350
19351 veneer = contents + target;
19352 veneer_r = veneer
19353 + stm32l4xx_errnode->u.b.veneer->vma
19354 - stm32l4xx_errnode->vma - 4;
19355
19356 if ((signed) (veneer_r - veneer -
19357 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19358 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19359 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19360 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19361 || (signed) (veneer_r - veneer) >= (1 << 24))
19362 {
19363 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19364 "veneer"), output_bfd);
19365 continue;
19366 }
19367
19368 /* Original instruction. */
19369 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19370
19371 stm32l4xx_create_replacing_stub
19372 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19373 }
19374 break;
19375
19376 default:
19377 abort ();
19378 }
19379 }
19380 }
19381
19382 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19383 {
19384 arm_unwind_table_edit *edit_node
19385 = arm_data->u.exidx.unwind_edit_list;
19386 /* Now, sec->size is the size of the section we will write. The original
19387 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19388 markers) was sec->rawsize. (This isn't the case if we perform no
19389 edits, then rawsize will be zero and we should use size). */
19390 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19391 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19392 unsigned int in_index, out_index;
19393 bfd_vma add_to_offsets = 0;
19394
19395 if (edited_contents == NULL)
19396 return false;
19397 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19398 {
19399 if (edit_node)
19400 {
19401 unsigned int edit_index = edit_node->index;
19402
19403 if (in_index < edit_index && in_index * 8 < input_size)
19404 {
19405 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19406 contents + in_index * 8, add_to_offsets);
19407 out_index++;
19408 in_index++;
19409 }
19410 else if (in_index == edit_index
19411 || (in_index * 8 >= input_size
19412 && edit_index == UINT_MAX))
19413 {
19414 switch (edit_node->type)
19415 {
19416 case DELETE_EXIDX_ENTRY:
19417 in_index++;
19418 add_to_offsets += 8;
19419 break;
19420
19421 case INSERT_EXIDX_CANTUNWIND_AT_END:
19422 {
19423 asection *text_sec = edit_node->linked_section;
19424 bfd_vma text_offset = text_sec->output_section->vma
19425 + text_sec->output_offset
19426 + text_sec->size;
19427 bfd_vma exidx_offset = offset + out_index * 8;
19428 unsigned long prel31_offset;
19429
19430 /* Note: this is meant to be equivalent to an
19431 R_ARM_PREL31 relocation. These synthetic
19432 EXIDX_CANTUNWIND markers are not relocated by the
19433 usual BFD method. */
19434 prel31_offset = (text_offset - exidx_offset)
19435 & 0x7ffffffful;
19436 if (bfd_link_relocatable (link_info))
19437 {
19438 /* Here relocation for new EXIDX_CANTUNWIND is
19439 created, so there is no need to
19440 adjust offset by hand. */
19441 prel31_offset = text_sec->output_offset
19442 + text_sec->size;
19443 }
19444
19445 /* First address we can't unwind. */
19446 bfd_put_32 (output_bfd, prel31_offset,
19447 &edited_contents[out_index * 8]);
19448
19449 /* Code for EXIDX_CANTUNWIND. */
19450 bfd_put_32 (output_bfd, 0x1,
19451 &edited_contents[out_index * 8 + 4]);
19452
19453 out_index++;
19454 add_to_offsets -= 8;
19455 }
19456 break;
19457 }
19458
19459 edit_node = edit_node->next;
19460 }
19461 }
19462 else
19463 {
19464 /* No more edits, copy remaining entries verbatim. */
19465 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19466 contents + in_index * 8, add_to_offsets);
19467 out_index++;
19468 in_index++;
19469 }
19470 }
19471
19472 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19473 bfd_set_section_contents (output_bfd, sec->output_section,
19474 edited_contents,
19475 (file_ptr) sec->output_offset, sec->size);
19476
19477 return true;
19478 }
19479
19480 /* Fix code to point to Cortex-A8 erratum stubs. */
19481 if (globals->fix_cortex_a8)
19482 {
19483 struct a8_branch_to_stub_data data;
19484
19485 data.writing_section = sec;
19486 data.contents = contents;
19487
19488 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19489 & data);
19490 }
19491
19492 if (mapcount == 0)
19493 return false;
19494
19495 if (globals->byteswap_code)
19496 {
19497 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19498
19499 ptr = map[0].vma;
19500 for (i = 0; i < mapcount; i++)
19501 {
19502 if (i == mapcount - 1)
19503 end = sec->size;
19504 else
19505 end = map[i + 1].vma;
19506
19507 switch (map[i].type)
19508 {
19509 case 'a':
19510 /* Byte swap code words. */
19511 while (ptr + 3 < end)
19512 {
19513 tmp = contents[ptr];
19514 contents[ptr] = contents[ptr + 3];
19515 contents[ptr + 3] = tmp;
19516 tmp = contents[ptr + 1];
19517 contents[ptr + 1] = contents[ptr + 2];
19518 contents[ptr + 2] = tmp;
19519 ptr += 4;
19520 }
19521 break;
19522
19523 case 't':
19524 /* Byte swap code halfwords. */
19525 while (ptr + 1 < end)
19526 {
19527 tmp = contents[ptr];
19528 contents[ptr] = contents[ptr + 1];
19529 contents[ptr + 1] = tmp;
19530 ptr += 2;
19531 }
19532 break;
19533
19534 case 'd':
19535 /* Leave data alone. */
19536 break;
19537 }
19538 ptr = end;
19539 }
19540 }
19541
19542 free (map);
19543 arm_data->mapcount = -1;
19544 arm_data->mapsize = 0;
19545 arm_data->map = NULL;
19546
19547 return false;
19548 }
19549
19550 /* Mangle thumb function symbols as we read them in. */
19551
19552 static bool
19553 elf32_arm_swap_symbol_in (bfd * abfd,
19554 const void *psrc,
19555 const void *pshn,
19556 Elf_Internal_Sym *dst)
19557 {
19558 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19559 return false;
19560 dst->st_target_internal = 0;
19561
19562 /* New EABI objects mark thumb function symbols by setting the low bit of
19563 the address. */
19564 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19565 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19566 {
19567 if (dst->st_value & 1)
19568 {
19569 dst->st_value &= ~(bfd_vma) 1;
19570 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19571 ST_BRANCH_TO_THUMB);
19572 }
19573 else
19574 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19575 }
19576 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19577 {
19578 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19579 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19580 }
19581 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19582 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19583 else
19584 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19585
19586 return true;
19587 }
19588
19589
19590 /* Mangle thumb function symbols as we write them out. */
19591
19592 static void
19593 elf32_arm_swap_symbol_out (bfd *abfd,
19594 const Elf_Internal_Sym *src,
19595 void *cdst,
19596 void *shndx)
19597 {
19598 Elf_Internal_Sym newsym;
19599
19600 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19601 of the address set, as per the new EABI. We do this unconditionally
19602 because objcopy does not set the elf header flags until after
19603 it writes out the symbol table. */
19604 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19605 {
19606 newsym = *src;
19607 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19608 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19609 if (newsym.st_shndx != SHN_UNDEF)
19610 {
19611 /* Do this only for defined symbols. At link type, the static
19612 linker will simulate the work of dynamic linker of resolving
19613 symbols and will carry over the thumbness of found symbols to
19614 the output symbol table. It's not clear how it happens, but
19615 the thumbness of undefined symbols can well be different at
19616 runtime, and writing '1' for them will be confusing for users
19617 and possibly for dynamic linker itself.
19618 */
19619 newsym.st_value |= 1;
19620 }
19621
19622 src = &newsym;
19623 }
19624 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19625 }
19626
19627 /* Add the PT_ARM_EXIDX program header. */
19628
19629 static bool
19630 elf32_arm_modify_segment_map (bfd *abfd,
19631 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19632 {
19633 struct elf_segment_map *m;
19634 asection *sec;
19635
19636 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19637 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19638 {
19639 /* If there is already a PT_ARM_EXIDX header, then we do not
19640 want to add another one. This situation arises when running
19641 "strip"; the input binary already has the header. */
19642 m = elf_seg_map (abfd);
19643 while (m && m->p_type != PT_ARM_EXIDX)
19644 m = m->next;
19645 if (!m)
19646 {
19647 m = (struct elf_segment_map *)
19648 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19649 if (m == NULL)
19650 return false;
19651 m->p_type = PT_ARM_EXIDX;
19652 m->count = 1;
19653 m->sections[0] = sec;
19654
19655 m->next = elf_seg_map (abfd);
19656 elf_seg_map (abfd) = m;
19657 }
19658 }
19659
19660 return true;
19661 }
19662
19663 /* We may add a PT_ARM_EXIDX program header. */
19664
19665 static int
19666 elf32_arm_additional_program_headers (bfd *abfd,
19667 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19668 {
19669 asection *sec;
19670
19671 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19672 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19673 return 1;
19674 else
19675 return 0;
19676 }
19677
19678 /* Hook called by the linker routine which adds symbols from an object
19679 file. */
19680
19681 static bool
19682 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19683 Elf_Internal_Sym *sym, const char **namep,
19684 flagword *flagsp, asection **secp, bfd_vma *valp)
19685 {
19686 if (elf32_arm_hash_table (info) == NULL)
19687 return false;
19688
19689 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19690 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19691 flagsp, secp, valp))
19692 return false;
19693
19694 return true;
19695 }
19696
19697 /* We use this to override swap_symbol_in and swap_symbol_out. */
19698 const struct elf_size_info elf32_arm_size_info =
19699 {
19700 sizeof (Elf32_External_Ehdr),
19701 sizeof (Elf32_External_Phdr),
19702 sizeof (Elf32_External_Shdr),
19703 sizeof (Elf32_External_Rel),
19704 sizeof (Elf32_External_Rela),
19705 sizeof (Elf32_External_Sym),
19706 sizeof (Elf32_External_Dyn),
19707 sizeof (Elf_External_Note),
19708 4,
19709 1,
19710 32, 2,
19711 ELFCLASS32, EV_CURRENT,
19712 bfd_elf32_write_out_phdrs,
19713 bfd_elf32_write_shdrs_and_ehdr,
19714 bfd_elf32_checksum_contents,
19715 bfd_elf32_write_relocs,
19716 elf32_arm_swap_symbol_in,
19717 elf32_arm_swap_symbol_out,
19718 bfd_elf32_slurp_reloc_table,
19719 bfd_elf32_slurp_symbol_table,
19720 bfd_elf32_swap_dyn_in,
19721 bfd_elf32_swap_dyn_out,
19722 bfd_elf32_swap_reloc_in,
19723 bfd_elf32_swap_reloc_out,
19724 bfd_elf32_swap_reloca_in,
19725 bfd_elf32_swap_reloca_out
19726 };
19727
19728 static bfd_vma
19729 read_code32 (const bfd *abfd, const bfd_byte *addr)
19730 {
19731 /* V7 BE8 code is always little endian. */
19732 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19733 return bfd_getl32 (addr);
19734
19735 return bfd_get_32 (abfd, addr);
19736 }
19737
19738 static bfd_vma
19739 read_code16 (const bfd *abfd, const bfd_byte *addr)
19740 {
19741 /* V7 BE8 code is always little endian. */
19742 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19743 return bfd_getl16 (addr);
19744
19745 return bfd_get_16 (abfd, addr);
19746 }
19747
19748 /* Return size of plt0 entry starting at ADDR
19749 or (bfd_vma) -1 if size can not be determined. */
19750
19751 static bfd_vma
19752 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19753 {
19754 bfd_vma first_word;
19755 bfd_vma plt0_size;
19756
19757 first_word = read_code32 (abfd, addr);
19758
19759 if (first_word == elf32_arm_plt0_entry[0])
19760 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19761 else if (first_word == elf32_thumb2_plt0_entry[0])
19762 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19763 else
19764 /* We don't yet handle this PLT format. */
19765 return (bfd_vma) -1;
19766
19767 return plt0_size;
19768 }
19769
19770 /* Return size of plt entry starting at offset OFFSET
19771 of plt section located at address START
19772 or (bfd_vma) -1 if size can not be determined. */
19773
19774 static bfd_vma
19775 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19776 {
19777 bfd_vma first_insn;
19778 bfd_vma plt_size = 0;
19779 const bfd_byte *addr = start + offset;
19780
19781 /* PLT entry size if fixed on Thumb-only platforms. */
19782 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19783 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19784
19785 /* Respect Thumb stub if necessary. */
19786 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19787 {
19788 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19789 }
19790
19791 /* Strip immediate from first add. */
19792 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19793
19794 #ifdef FOUR_WORD_PLT
19795 if (first_insn == elf32_arm_plt_entry[0])
19796 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19797 #else
19798 if (first_insn == elf32_arm_plt_entry_long[0])
19799 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19800 else if (first_insn == elf32_arm_plt_entry_short[0])
19801 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19802 #endif
19803 else
19804 /* We don't yet handle this PLT format. */
19805 return (bfd_vma) -1;
19806
19807 return plt_size;
19808 }
19809
19810 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19811
19812 static long
19813 elf32_arm_get_synthetic_symtab (bfd *abfd,
19814 long symcount ATTRIBUTE_UNUSED,
19815 asymbol **syms ATTRIBUTE_UNUSED,
19816 long dynsymcount,
19817 asymbol **dynsyms,
19818 asymbol **ret)
19819 {
19820 asection *relplt;
19821 asymbol *s;
19822 arelent *p;
19823 long count, i, n;
19824 size_t size;
19825 Elf_Internal_Shdr *hdr;
19826 char *names;
19827 asection *plt;
19828 bfd_vma offset;
19829 bfd_byte *data;
19830
19831 *ret = NULL;
19832
19833 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19834 return 0;
19835
19836 if (dynsymcount <= 0)
19837 return 0;
19838
19839 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19840 if (relplt == NULL)
19841 return 0;
19842
19843 hdr = &elf_section_data (relplt)->this_hdr;
19844 if (hdr->sh_link != elf_dynsymtab (abfd)
19845 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19846 return 0;
19847
19848 plt = bfd_get_section_by_name (abfd, ".plt");
19849 if (plt == NULL)
19850 return 0;
19851
19852 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
19853 return -1;
19854
19855 data = plt->contents;
19856 if (data == NULL)
19857 {
19858 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19859 return -1;
19860 bfd_cache_section_contents((asection *) plt, data);
19861 }
19862
19863 count = relplt->size / hdr->sh_entsize;
19864 size = count * sizeof (asymbol);
19865 p = relplt->relocation;
19866 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19867 {
19868 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19869 if (p->addend != 0)
19870 size += sizeof ("+0x") - 1 + 8;
19871 }
19872
19873 s = *ret = (asymbol *) bfd_malloc (size);
19874 if (s == NULL)
19875 return -1;
19876
19877 offset = elf32_arm_plt0_size (abfd, data);
19878 if (offset == (bfd_vma) -1)
19879 return -1;
19880
19881 names = (char *) (s + count);
19882 p = relplt->relocation;
19883 n = 0;
19884 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19885 {
19886 size_t len;
19887
19888 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19889 if (plt_size == (bfd_vma) -1)
19890 break;
19891
19892 *s = **p->sym_ptr_ptr;
19893 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19894 we are defining a symbol, ensure one of them is set. */
19895 if ((s->flags & BSF_LOCAL) == 0)
19896 s->flags |= BSF_GLOBAL;
19897 s->flags |= BSF_SYNTHETIC;
19898 s->section = plt;
19899 s->value = offset;
19900 s->name = names;
19901 s->udata.p = NULL;
19902 len = strlen ((*p->sym_ptr_ptr)->name);
19903 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19904 names += len;
19905 if (p->addend != 0)
19906 {
19907 char buf[30], *a;
19908
19909 memcpy (names, "+0x", sizeof ("+0x") - 1);
19910 names += sizeof ("+0x") - 1;
19911 bfd_sprintf_vma (abfd, buf, p->addend);
19912 for (a = buf; *a == '0'; ++a)
19913 ;
19914 len = strlen (a);
19915 memcpy (names, a, len);
19916 names += len;
19917 }
19918 memcpy (names, "@plt", sizeof ("@plt"));
19919 names += sizeof ("@plt");
19920 ++s, ++n;
19921 offset += plt_size;
19922 }
19923
19924 return n;
19925 }
19926
19927 static bool
19928 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
19929 {
19930 if (hdr->sh_flags & SHF_ARM_PURECODE)
19931 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
19932 return true;
19933 }
19934
19935 static flagword
19936 elf32_arm_lookup_section_flags (char *flag_name)
19937 {
19938 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19939 return SHF_ARM_PURECODE;
19940
19941 return SEC_NO_FLAGS;
19942 }
19943
19944 static unsigned int
19945 elf32_arm_count_additional_relocs (asection *sec)
19946 {
19947 struct _arm_elf_section_data *arm_data;
19948 arm_data = get_arm_elf_section_data (sec);
19949
19950 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19951 }
19952
19953 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19954 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19955 FALSE otherwise. ISECTION is the best guess matching section from the
19956 input bfd IBFD, but it might be NULL. */
19957
19958 static bool
19959 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19960 bfd *obfd ATTRIBUTE_UNUSED,
19961 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19962 Elf_Internal_Shdr *osection)
19963 {
19964 switch (osection->sh_type)
19965 {
19966 case SHT_ARM_EXIDX:
19967 {
19968 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19969 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19970 unsigned i = 0;
19971
19972 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19973 osection->sh_info = 0;
19974
19975 /* The sh_link field must be set to the text section associated with
19976 this index section. Unfortunately the ARM EHABI does not specify
19977 exactly how to determine this association. Our caller does try
19978 to match up OSECTION with its corresponding input section however
19979 so that is a good first guess. */
19980 if (isection != NULL
19981 && osection->bfd_section != NULL
19982 && isection->bfd_section != NULL
19983 && isection->bfd_section->output_section != NULL
19984 && isection->bfd_section->output_section == osection->bfd_section
19985 && iheaders != NULL
19986 && isection->sh_link > 0
19987 && isection->sh_link < elf_numsections (ibfd)
19988 && iheaders[isection->sh_link]->bfd_section != NULL
19989 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19990 )
19991 {
19992 for (i = elf_numsections (obfd); i-- > 0;)
19993 if (oheaders[i]->bfd_section
19994 == iheaders[isection->sh_link]->bfd_section->output_section)
19995 break;
19996 }
19997
19998 if (i == 0)
19999 {
20000 /* Failing that we have to find a matching section ourselves. If
20001 we had the output section name available we could compare that
20002 with input section names. Unfortunately we don't. So instead
20003 we use a simple heuristic and look for the nearest executable
20004 section before this one. */
20005 for (i = elf_numsections (obfd); i-- > 0;)
20006 if (oheaders[i] == osection)
20007 break;
20008 if (i == 0)
20009 break;
20010
20011 while (i-- > 0)
20012 if (oheaders[i]->sh_type == SHT_PROGBITS
20013 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20014 == (SHF_ALLOC | SHF_EXECINSTR))
20015 break;
20016 }
20017
20018 if (i)
20019 {
20020 osection->sh_link = i;
20021 /* If the text section was part of a group
20022 then the index section should be too. */
20023 if (oheaders[i]->sh_flags & SHF_GROUP)
20024 osection->sh_flags |= SHF_GROUP;
20025 return true;
20026 }
20027 }
20028 break;
20029
20030 case SHT_ARM_PREEMPTMAP:
20031 osection->sh_flags = SHF_ALLOC;
20032 break;
20033
20034 case SHT_ARM_ATTRIBUTES:
20035 case SHT_ARM_DEBUGOVERLAY:
20036 case SHT_ARM_OVERLAYSECTION:
20037 default:
20038 break;
20039 }
20040
20041 return false;
20042 }
20043
20044 /* Returns TRUE if NAME is an ARM mapping symbol.
20045 Traditionally the symbols $a, $d and $t have been used.
20046 The ARM ELF standard also defines $x (for A64 code). It also allows a
20047 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20048 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20049 not support them here. $t.x indicates the start of ThumbEE instructions. */
20050
20051 static bool
20052 is_arm_mapping_symbol (const char * name)
20053 {
20054 return name != NULL /* Paranoia. */
20055 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20056 the mapping symbols could have acquired a prefix.
20057 We do not support this here, since such symbols no
20058 longer conform to the ARM ELF ABI. */
20059 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20060 && (name[2] == 0 || name[2] == '.');
20061 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20062 any characters that follow the period are legal characters for the body
20063 of a symbol's name. For now we just assume that this is the case. */
20064 }
20065
20066 /* Make sure that mapping symbols in object files are not removed via the
20067 "strip --strip-unneeded" tool. These symbols are needed in order to
20068 correctly generate interworking veneers, and for byte swapping code
20069 regions. Once an object file has been linked, it is safe to remove the
20070 symbols as they will no longer be needed. */
20071
20072 static void
20073 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20074 {
20075 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20076 && sym->section != bfd_abs_section_ptr
20077 && is_arm_mapping_symbol (sym->name))
20078 sym->flags |= BSF_KEEP;
20079 }
20080
20081 #undef elf_backend_copy_special_section_fields
20082 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20083
20084 #define ELF_ARCH bfd_arch_arm
20085 #define ELF_TARGET_ID ARM_ELF_DATA
20086 #define ELF_MACHINE_CODE EM_ARM
20087 #ifdef __QNXTARGET__
20088 #define ELF_MAXPAGESIZE 0x1000
20089 #else
20090 #define ELF_MAXPAGESIZE 0x10000
20091 #endif
20092 #define ELF_MINPAGESIZE 0x1000
20093 #define ELF_COMMONPAGESIZE 0x1000
20094
20095 #define bfd_elf32_mkobject elf32_arm_mkobject
20096
20097 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20098 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20099 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20100 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20101 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20102 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20103 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20104 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20105 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20106 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20107 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20108 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20109
20110 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20111 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20112 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20113 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20114 #define elf_backend_check_relocs elf32_arm_check_relocs
20115 #define elf_backend_update_relocs elf32_arm_update_relocs
20116 #define elf_backend_relocate_section elf32_arm_relocate_section
20117 #define elf_backend_write_section elf32_arm_write_section
20118 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20119 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20120 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20121 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20122 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20123 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20124 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20125 #define elf_backend_init_file_header elf32_arm_init_file_header
20126 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20127 #define elf_backend_object_p elf32_arm_object_p
20128 #define elf_backend_fake_sections elf32_arm_fake_sections
20129 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20130 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20131 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20132 #define elf_backend_size_info elf32_arm_size_info
20133 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20134 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20135 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20136 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20137 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20138 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20139 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20140 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20141
20142 #define elf_backend_can_refcount 1
20143 #define elf_backend_can_gc_sections 1
20144 #define elf_backend_plt_readonly 1
20145 #define elf_backend_want_got_plt 1
20146 #define elf_backend_want_plt_sym 0
20147 #define elf_backend_want_dynrelro 1
20148 #define elf_backend_may_use_rel_p 1
20149 #define elf_backend_may_use_rela_p 0
20150 #define elf_backend_default_use_rela_p 0
20151 #define elf_backend_dtrel_excludes_plt 1
20152
20153 #define elf_backend_got_header_size 12
20154 #define elf_backend_extern_protected_data 1
20155
20156 #undef elf_backend_obj_attrs_vendor
20157 #define elf_backend_obj_attrs_vendor "aeabi"
20158 #undef elf_backend_obj_attrs_section
20159 #define elf_backend_obj_attrs_section ".ARM.attributes"
20160 #undef elf_backend_obj_attrs_arg_type
20161 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20162 #undef elf_backend_obj_attrs_section_type
20163 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20164 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20165 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20166
20167 #undef elf_backend_section_flags
20168 #define elf_backend_section_flags elf32_arm_section_flags
20169 #undef elf_backend_lookup_section_flags_hook
20170 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20171
20172 #define elf_backend_linux_prpsinfo32_ugid16 true
20173
20174 #include "elf32-target.h"
20175
20176 /* Native Client targets. */
20177
20178 #undef TARGET_LITTLE_SYM
20179 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20180 #undef TARGET_LITTLE_NAME
20181 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20182 #undef TARGET_BIG_SYM
20183 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20184 #undef TARGET_BIG_NAME
20185 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20186
20187 /* Like elf32_arm_link_hash_table_create -- but overrides
20188 appropriately for NaCl. */
20189
20190 static struct bfd_link_hash_table *
20191 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20192 {
20193 struct bfd_link_hash_table *ret;
20194
20195 ret = elf32_arm_link_hash_table_create (abfd);
20196 if (ret)
20197 {
20198 struct elf32_arm_link_hash_table *htab
20199 = (struct elf32_arm_link_hash_table *) ret;
20200
20201 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20202 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20203 }
20204 return ret;
20205 }
20206
20207 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20208 really need to use elf32_arm_modify_segment_map. But we do it
20209 anyway just to reduce gratuitous differences with the stock ARM backend. */
20210
20211 static bool
20212 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20213 {
20214 return (elf32_arm_modify_segment_map (abfd, info)
20215 && nacl_modify_segment_map (abfd, info));
20216 }
20217
20218 static bool
20219 elf32_arm_nacl_final_write_processing (bfd *abfd)
20220 {
20221 arm_final_write_processing (abfd);
20222 return nacl_final_write_processing (abfd);
20223 }
20224
20225 static bfd_vma
20226 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20227 const arelent *rel ATTRIBUTE_UNUSED)
20228 {
20229 return plt->vma
20230 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20231 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20232 }
20233
20234 #undef elf32_bed
20235 #define elf32_bed elf32_arm_nacl_bed
20236 #undef bfd_elf32_bfd_link_hash_table_create
20237 #define bfd_elf32_bfd_link_hash_table_create \
20238 elf32_arm_nacl_link_hash_table_create
20239 #undef elf_backend_plt_alignment
20240 #define elf_backend_plt_alignment 4
20241 #undef elf_backend_modify_segment_map
20242 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20243 #undef elf_backend_modify_headers
20244 #define elf_backend_modify_headers nacl_modify_headers
20245 #undef elf_backend_final_write_processing
20246 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20247 #undef bfd_elf32_get_synthetic_symtab
20248 #undef elf_backend_plt_sym_val
20249 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20250 #undef elf_backend_copy_special_section_fields
20251
20252 #undef ELF_MINPAGESIZE
20253 #undef ELF_COMMONPAGESIZE
20254
20255 #undef ELF_TARGET_OS
20256 #define ELF_TARGET_OS is_nacl
20257
20258 #include "elf32-target.h"
20259
20260 /* Reset to defaults. */
20261 #undef elf_backend_plt_alignment
20262 #undef elf_backend_modify_segment_map
20263 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20264 #undef elf_backend_modify_headers
20265 #undef elf_backend_final_write_processing
20266 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20267 #undef ELF_MINPAGESIZE
20268 #define ELF_MINPAGESIZE 0x1000
20269 #undef ELF_COMMONPAGESIZE
20270 #define ELF_COMMONPAGESIZE 0x1000
20271
20272
20273 /* FDPIC Targets. */
20274
20275 #undef TARGET_LITTLE_SYM
20276 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20277 #undef TARGET_LITTLE_NAME
20278 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20279 #undef TARGET_BIG_SYM
20280 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20281 #undef TARGET_BIG_NAME
20282 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20283 #undef elf_match_priority
20284 #define elf_match_priority 128
20285 #undef ELF_OSABI
20286 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20287
20288 /* Like elf32_arm_link_hash_table_create -- but overrides
20289 appropriately for FDPIC. */
20290
20291 static struct bfd_link_hash_table *
20292 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20293 {
20294 struct bfd_link_hash_table *ret;
20295
20296 ret = elf32_arm_link_hash_table_create (abfd);
20297 if (ret)
20298 {
20299 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20300
20301 htab->fdpic_p = 1;
20302 }
20303 return ret;
20304 }
20305
20306 /* We need dynamic symbols for every section, since segments can
20307 relocate independently. */
20308 static bool
20309 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20310 struct bfd_link_info *info
20311 ATTRIBUTE_UNUSED,
20312 asection *p ATTRIBUTE_UNUSED)
20313 {
20314 switch (elf_section_data (p)->this_hdr.sh_type)
20315 {
20316 case SHT_PROGBITS:
20317 case SHT_NOBITS:
20318 /* If sh_type is yet undecided, assume it could be
20319 SHT_PROGBITS/SHT_NOBITS. */
20320 case SHT_NULL:
20321 return false;
20322
20323 /* There shouldn't be section relative relocations
20324 against any other section. */
20325 default:
20326 return true;
20327 }
20328 }
20329
20330 #undef elf32_bed
20331 #define elf32_bed elf32_arm_fdpic_bed
20332
20333 #undef bfd_elf32_bfd_link_hash_table_create
20334 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20335
20336 #undef elf_backend_omit_section_dynsym
20337 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20338
20339 #undef ELF_TARGET_OS
20340
20341 #include "elf32-target.h"
20342
20343 #undef elf_match_priority
20344 #undef ELF_OSABI
20345 #undef elf_backend_omit_section_dynsym
20346
20347 /* VxWorks Targets. */
20348
20349 #undef TARGET_LITTLE_SYM
20350 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20351 #undef TARGET_LITTLE_NAME
20352 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20353 #undef TARGET_BIG_SYM
20354 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20355 #undef TARGET_BIG_NAME
20356 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20357
20358 /* Like elf32_arm_link_hash_table_create -- but overrides
20359 appropriately for VxWorks. */
20360
20361 static struct bfd_link_hash_table *
20362 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20363 {
20364 struct bfd_link_hash_table *ret;
20365
20366 ret = elf32_arm_link_hash_table_create (abfd);
20367 if (ret)
20368 {
20369 struct elf32_arm_link_hash_table *htab
20370 = (struct elf32_arm_link_hash_table *) ret;
20371 htab->use_rel = 0;
20372 }
20373 return ret;
20374 }
20375
20376 static bool
20377 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20378 {
20379 arm_final_write_processing (abfd);
20380 return elf_vxworks_final_write_processing (abfd);
20381 }
20382
20383 #undef elf32_bed
20384 #define elf32_bed elf32_arm_vxworks_bed
20385
20386 #undef bfd_elf32_bfd_link_hash_table_create
20387 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20388 #undef elf_backend_final_write_processing
20389 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20390 #undef elf_backend_emit_relocs
20391 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20392
20393 #undef elf_backend_may_use_rel_p
20394 #define elf_backend_may_use_rel_p 0
20395 #undef elf_backend_may_use_rela_p
20396 #define elf_backend_may_use_rela_p 1
20397 #undef elf_backend_default_use_rela_p
20398 #define elf_backend_default_use_rela_p 1
20399 #undef elf_backend_want_plt_sym
20400 #define elf_backend_want_plt_sym 1
20401 #undef ELF_MAXPAGESIZE
20402 #define ELF_MAXPAGESIZE 0x1000
20403 #undef ELF_TARGET_OS
20404 #define ELF_TARGET_OS is_vxworks
20405
20406 #include "elf32-target.h"
20407
20408
20409 /* Merge backend specific data from an object file to the output
20410 object file when linking. */
20411
20412 static bool
20413 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20414 {
20415 bfd *obfd = info->output_bfd;
20416 flagword out_flags;
20417 flagword in_flags;
20418 bool flags_compatible = true;
20419 asection *sec;
20420
20421 /* Check if we have the same endianness. */
20422 if (! _bfd_generic_verify_endian_match (ibfd, info))
20423 return false;
20424
20425 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20426 return true;
20427
20428 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20429 return false;
20430
20431 /* The input BFD must have had its flags initialised. */
20432 /* The following seems bogus to me -- The flags are initialized in
20433 the assembler but I don't think an elf_flags_init field is
20434 written into the object. */
20435 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20436
20437 in_flags = elf_elfheader (ibfd)->e_flags;
20438 out_flags = elf_elfheader (obfd)->e_flags;
20439
20440 /* In theory there is no reason why we couldn't handle this. However
20441 in practice it isn't even close to working and there is no real
20442 reason to want it. */
20443 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20444 && !(ibfd->flags & DYNAMIC)
20445 && (in_flags & EF_ARM_BE8))
20446 {
20447 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20448 ibfd);
20449 return false;
20450 }
20451
20452 if (!elf_flags_init (obfd))
20453 {
20454 /* If the input is the default architecture and had the default
20455 flags then do not bother setting the flags for the output
20456 architecture, instead allow future merges to do this. If no
20457 future merges ever set these flags then they will retain their
20458 uninitialised values, which surprise surprise, correspond
20459 to the default values. */
20460 if (bfd_get_arch_info (ibfd)->the_default
20461 && elf_elfheader (ibfd)->e_flags == 0)
20462 return true;
20463
20464 elf_flags_init (obfd) = true;
20465 elf_elfheader (obfd)->e_flags = in_flags;
20466
20467 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20468 && bfd_get_arch_info (obfd)->the_default)
20469 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20470
20471 return true;
20472 }
20473
20474 /* Determine what should happen if the input ARM architecture
20475 does not match the output ARM architecture. */
20476 if (! bfd_arm_merge_machines (ibfd, obfd))
20477 return false;
20478
20479 /* Identical flags must be compatible. */
20480 if (in_flags == out_flags)
20481 return true;
20482
20483 /* Check to see if the input BFD actually contains any sections. If
20484 not, its flags may not have been initialised either, but it
20485 cannot actually cause any incompatiblity. Do not short-circuit
20486 dynamic objects; their section list may be emptied by
20487 elf_link_add_object_symbols.
20488
20489 Also check to see if there are no code sections in the input.
20490 In this case there is no need to check for code specific flags.
20491 XXX - do we need to worry about floating-point format compatability
20492 in data sections ? */
20493 if (!(ibfd->flags & DYNAMIC))
20494 {
20495 bool null_input_bfd = true;
20496 bool only_data_sections = true;
20497
20498 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20499 {
20500 /* Ignore synthetic glue sections. */
20501 if (strcmp (sec->name, ".glue_7")
20502 && strcmp (sec->name, ".glue_7t"))
20503 {
20504 if ((bfd_section_flags (sec)
20505 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20506 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20507 only_data_sections = false;
20508
20509 null_input_bfd = false;
20510 break;
20511 }
20512 }
20513
20514 if (null_input_bfd || only_data_sections)
20515 return true;
20516 }
20517
20518 /* Complain about various flag mismatches. */
20519 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20520 EF_ARM_EABI_VERSION (out_flags)))
20521 {
20522 _bfd_error_handler
20523 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20524 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20525 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20526 return false;
20527 }
20528
20529 /* Not sure what needs to be checked for EABI versions >= 1. */
20530 /* VxWorks libraries do not use these flags. */
20531 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20532 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20533 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20534 {
20535 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20536 {
20537 _bfd_error_handler
20538 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20539 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20540 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20541 flags_compatible = false;
20542 }
20543
20544 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20545 {
20546 if (in_flags & EF_ARM_APCS_FLOAT)
20547 _bfd_error_handler
20548 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20549 ibfd, obfd);
20550 else
20551 _bfd_error_handler
20552 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20553 ibfd, obfd);
20554
20555 flags_compatible = false;
20556 }
20557
20558 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20559 {
20560 if (in_flags & EF_ARM_VFP_FLOAT)
20561 _bfd_error_handler
20562 (_("error: %pB uses %s instructions, whereas %pB does not"),
20563 ibfd, "VFP", obfd);
20564 else
20565 _bfd_error_handler
20566 (_("error: %pB uses %s instructions, whereas %pB does not"),
20567 ibfd, "FPA", obfd);
20568
20569 flags_compatible = false;
20570 }
20571
20572 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20573 {
20574 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20575 _bfd_error_handler
20576 (_("error: %pB uses %s instructions, whereas %pB does not"),
20577 ibfd, "Maverick", obfd);
20578 else
20579 _bfd_error_handler
20580 (_("error: %pB does not use %s instructions, whereas %pB does"),
20581 ibfd, "Maverick", obfd);
20582
20583 flags_compatible = false;
20584 }
20585
20586 #ifdef EF_ARM_SOFT_FLOAT
20587 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20588 {
20589 /* We can allow interworking between code that is VFP format
20590 layout, and uses either soft float or integer regs for
20591 passing floating point arguments and results. We already
20592 know that the APCS_FLOAT flags match; similarly for VFP
20593 flags. */
20594 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20595 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20596 {
20597 if (in_flags & EF_ARM_SOFT_FLOAT)
20598 _bfd_error_handler
20599 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20600 ibfd, obfd);
20601 else
20602 _bfd_error_handler
20603 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20604 ibfd, obfd);
20605
20606 flags_compatible = false;
20607 }
20608 }
20609 #endif
20610
20611 /* Interworking mismatch is only a warning. */
20612 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20613 {
20614 if (in_flags & EF_ARM_INTERWORK)
20615 {
20616 _bfd_error_handler
20617 (_("warning: %pB supports interworking, whereas %pB does not"),
20618 ibfd, obfd);
20619 }
20620 else
20621 {
20622 _bfd_error_handler
20623 (_("warning: %pB does not support interworking, whereas %pB does"),
20624 ibfd, obfd);
20625 }
20626 }
20627 }
20628
20629 return flags_compatible;
20630 }
GDB Binutils - Deliverables
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