1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "libiberty.h"
29 #include "elf-vxworks.h"
31 #include "elf32-arm.h"
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
69 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
70 struct bfd_link_info
*link_info
,
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
78 static reloc_howto_type elf32_arm_howto_table_1
[] =
81 HOWTO (R_ARM_NONE
, /* type */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
85 FALSE
, /* pc_relative */
87 complain_overflow_dont
,/* complain_on_overflow */
88 bfd_elf_generic_reloc
, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE
, /* partial_inplace */
93 FALSE
), /* pcrel_offset */
95 HOWTO (R_ARM_PC24
, /* type */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
99 TRUE
, /* pc_relative */
101 complain_overflow_signed
,/* complain_on_overflow */
102 bfd_elf_generic_reloc
, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE
, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE
), /* pcrel_offset */
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32
, /* type */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
114 FALSE
, /* pc_relative */
116 complain_overflow_bitfield
,/* complain_on_overflow */
117 bfd_elf_generic_reloc
, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE
, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE
), /* pcrel_offset */
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32
, /* type */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
129 TRUE
, /* pc_relative */
131 complain_overflow_bitfield
,/* complain_on_overflow */
132 bfd_elf_generic_reloc
, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE
, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE
), /* pcrel_offset */
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0
, /* type */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
144 TRUE
, /* pc_relative */
146 complain_overflow_dont
,/* complain_on_overflow */
147 bfd_elf_generic_reloc
, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE
, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE
), /* pcrel_offset */
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16
, /* type */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
159 FALSE
, /* pc_relative */
161 complain_overflow_bitfield
,/* complain_on_overflow */
162 bfd_elf_generic_reloc
, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE
, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE
), /* pcrel_offset */
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12
, /* type */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
174 FALSE
, /* pc_relative */
176 complain_overflow_bitfield
,/* complain_on_overflow */
177 bfd_elf_generic_reloc
, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE
, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE
), /* pcrel_offset */
184 HOWTO (R_ARM_THM_ABS5
, /* type */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
188 FALSE
, /* pc_relative */
190 complain_overflow_bitfield
,/* complain_on_overflow */
191 bfd_elf_generic_reloc
, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE
, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE
), /* pcrel_offset */
199 HOWTO (R_ARM_ABS8
, /* type */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
203 FALSE
, /* pc_relative */
205 complain_overflow_bitfield
,/* complain_on_overflow */
206 bfd_elf_generic_reloc
, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE
, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE
), /* pcrel_offset */
213 HOWTO (R_ARM_SBREL32
, /* type */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
217 FALSE
, /* pc_relative */
219 complain_overflow_dont
,/* complain_on_overflow */
220 bfd_elf_generic_reloc
, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE
, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE
), /* pcrel_offset */
227 HOWTO (R_ARM_THM_CALL
, /* type */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
231 TRUE
, /* pc_relative */
233 complain_overflow_signed
,/* complain_on_overflow */
234 bfd_elf_generic_reloc
, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE
, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE
), /* pcrel_offset */
241 HOWTO (R_ARM_THM_PC8
, /* type */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
245 TRUE
, /* pc_relative */
247 complain_overflow_signed
,/* complain_on_overflow */
248 bfd_elf_generic_reloc
, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE
, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE
), /* pcrel_offset */
255 HOWTO (R_ARM_BREL_ADJ
, /* type */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
259 FALSE
, /* pc_relative */
261 complain_overflow_signed
,/* complain_on_overflow */
262 bfd_elf_generic_reloc
, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE
, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE
), /* pcrel_offset */
269 HOWTO (R_ARM_TLS_DESC
, /* type */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
273 FALSE
, /* pc_relative */
275 complain_overflow_bitfield
,/* complain_on_overflow */
276 bfd_elf_generic_reloc
, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE
, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE
), /* pcrel_offset */
283 HOWTO (R_ARM_THM_SWI8
, /* type */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
287 FALSE
, /* pc_relative */
289 complain_overflow_signed
,/* complain_on_overflow */
290 bfd_elf_generic_reloc
, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE
, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE
), /* pcrel_offset */
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25
, /* type */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
302 TRUE
, /* pc_relative */
304 complain_overflow_signed
,/* complain_on_overflow */
305 bfd_elf_generic_reloc
, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE
, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE
), /* pcrel_offset */
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22
, /* type */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
317 TRUE
, /* pc_relative */
319 complain_overflow_signed
,/* complain_on_overflow */
320 bfd_elf_generic_reloc
, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE
, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE
), /* pcrel_offset */
327 /* Dynamic TLS relocations. */
329 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
333 FALSE
, /* pc_relative */
335 complain_overflow_bitfield
,/* complain_on_overflow */
336 bfd_elf_generic_reloc
, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE
, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE
), /* pcrel_offset */
343 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
347 FALSE
, /* pc_relative */
349 complain_overflow_bitfield
,/* complain_on_overflow */
350 bfd_elf_generic_reloc
, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE
, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE
), /* pcrel_offset */
357 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
361 FALSE
, /* pc_relative */
363 complain_overflow_bitfield
,/* complain_on_overflow */
364 bfd_elf_generic_reloc
, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE
, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE
), /* pcrel_offset */
371 /* Relocs used in ARM Linux */
373 HOWTO (R_ARM_COPY
, /* type */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
377 FALSE
, /* pc_relative */
379 complain_overflow_bitfield
,/* complain_on_overflow */
380 bfd_elf_generic_reloc
, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE
, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE
), /* pcrel_offset */
387 HOWTO (R_ARM_GLOB_DAT
, /* type */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
391 FALSE
, /* pc_relative */
393 complain_overflow_bitfield
,/* complain_on_overflow */
394 bfd_elf_generic_reloc
, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE
, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE
), /* pcrel_offset */
401 HOWTO (R_ARM_JUMP_SLOT
, /* type */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
405 FALSE
, /* pc_relative */
407 complain_overflow_bitfield
,/* complain_on_overflow */
408 bfd_elf_generic_reloc
, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE
, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE
), /* pcrel_offset */
415 HOWTO (R_ARM_RELATIVE
, /* type */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
419 FALSE
, /* pc_relative */
421 complain_overflow_bitfield
,/* complain_on_overflow */
422 bfd_elf_generic_reloc
, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE
, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE
), /* pcrel_offset */
429 HOWTO (R_ARM_GOTOFF32
, /* type */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
433 FALSE
, /* pc_relative */
435 complain_overflow_bitfield
,/* complain_on_overflow */
436 bfd_elf_generic_reloc
, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE
, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE
), /* pcrel_offset */
443 HOWTO (R_ARM_GOTPC
, /* type */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
447 TRUE
, /* pc_relative */
449 complain_overflow_bitfield
,/* complain_on_overflow */
450 bfd_elf_generic_reloc
, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE
, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE
), /* pcrel_offset */
457 HOWTO (R_ARM_GOT32
, /* type */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
461 FALSE
, /* pc_relative */
463 complain_overflow_bitfield
,/* complain_on_overflow */
464 bfd_elf_generic_reloc
, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE
, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE
), /* pcrel_offset */
471 HOWTO (R_ARM_PLT32
, /* type */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
475 TRUE
, /* pc_relative */
477 complain_overflow_bitfield
,/* complain_on_overflow */
478 bfd_elf_generic_reloc
, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE
, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE
), /* pcrel_offset */
485 HOWTO (R_ARM_CALL
, /* type */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
489 TRUE
, /* pc_relative */
491 complain_overflow_signed
,/* complain_on_overflow */
492 bfd_elf_generic_reloc
, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE
, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE
), /* pcrel_offset */
499 HOWTO (R_ARM_JUMP24
, /* type */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
503 TRUE
, /* pc_relative */
505 complain_overflow_signed
,/* complain_on_overflow */
506 bfd_elf_generic_reloc
, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE
, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE
), /* pcrel_offset */
513 HOWTO (R_ARM_THM_JUMP24
, /* type */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
517 TRUE
, /* pc_relative */
519 complain_overflow_signed
,/* complain_on_overflow */
520 bfd_elf_generic_reloc
, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE
, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE
), /* pcrel_offset */
527 HOWTO (R_ARM_BASE_ABS
, /* type */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
531 FALSE
, /* pc_relative */
533 complain_overflow_dont
,/* complain_on_overflow */
534 bfd_elf_generic_reloc
, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE
, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE
), /* pcrel_offset */
541 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
545 TRUE
, /* pc_relative */
547 complain_overflow_dont
,/* complain_on_overflow */
548 bfd_elf_generic_reloc
, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE
, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE
), /* pcrel_offset */
555 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
559 TRUE
, /* pc_relative */
561 complain_overflow_dont
,/* complain_on_overflow */
562 bfd_elf_generic_reloc
, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE
, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE
), /* pcrel_offset */
569 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
573 TRUE
, /* pc_relative */
575 complain_overflow_dont
,/* complain_on_overflow */
576 bfd_elf_generic_reloc
, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE
, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE
), /* pcrel_offset */
583 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
587 FALSE
, /* pc_relative */
589 complain_overflow_dont
,/* complain_on_overflow */
590 bfd_elf_generic_reloc
, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE
, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE
), /* pcrel_offset */
597 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
601 FALSE
, /* pc_relative */
603 complain_overflow_dont
,/* complain_on_overflow */
604 bfd_elf_generic_reloc
, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE
, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE
), /* pcrel_offset */
611 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
615 FALSE
, /* pc_relative */
617 complain_overflow_dont
,/* complain_on_overflow */
618 bfd_elf_generic_reloc
, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE
, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE
), /* pcrel_offset */
625 HOWTO (R_ARM_TARGET1
, /* type */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
629 FALSE
, /* pc_relative */
631 complain_overflow_dont
,/* complain_on_overflow */
632 bfd_elf_generic_reloc
, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE
, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE
), /* pcrel_offset */
639 HOWTO (R_ARM_ROSEGREL32
, /* type */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
643 FALSE
, /* pc_relative */
645 complain_overflow_dont
,/* complain_on_overflow */
646 bfd_elf_generic_reloc
, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE
, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE
), /* pcrel_offset */
653 HOWTO (R_ARM_V4BX
, /* type */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
657 FALSE
, /* pc_relative */
659 complain_overflow_dont
,/* complain_on_overflow */
660 bfd_elf_generic_reloc
, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE
, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE
), /* pcrel_offset */
667 HOWTO (R_ARM_TARGET2
, /* type */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
671 FALSE
, /* pc_relative */
673 complain_overflow_signed
,/* complain_on_overflow */
674 bfd_elf_generic_reloc
, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE
, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE
), /* pcrel_offset */
681 HOWTO (R_ARM_PREL31
, /* type */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
685 TRUE
, /* pc_relative */
687 complain_overflow_signed
,/* complain_on_overflow */
688 bfd_elf_generic_reloc
, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE
, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE
), /* pcrel_offset */
695 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
699 FALSE
, /* pc_relative */
701 complain_overflow_dont
,/* complain_on_overflow */
702 bfd_elf_generic_reloc
, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE
, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE
), /* pcrel_offset */
709 HOWTO (R_ARM_MOVT_ABS
, /* type */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
713 FALSE
, /* pc_relative */
715 complain_overflow_bitfield
,/* complain_on_overflow */
716 bfd_elf_generic_reloc
, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE
, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE
), /* pcrel_offset */
723 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
727 TRUE
, /* pc_relative */
729 complain_overflow_dont
,/* complain_on_overflow */
730 bfd_elf_generic_reloc
, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE
, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE
), /* pcrel_offset */
737 HOWTO (R_ARM_MOVT_PREL
, /* type */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
741 TRUE
, /* pc_relative */
743 complain_overflow_bitfield
,/* complain_on_overflow */
744 bfd_elf_generic_reloc
, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE
, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE
), /* pcrel_offset */
751 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
755 FALSE
, /* pc_relative */
757 complain_overflow_dont
,/* complain_on_overflow */
758 bfd_elf_generic_reloc
, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE
, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE
), /* pcrel_offset */
765 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
769 FALSE
, /* pc_relative */
771 complain_overflow_bitfield
,/* complain_on_overflow */
772 bfd_elf_generic_reloc
, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE
, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE
), /* pcrel_offset */
779 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
783 TRUE
, /* pc_relative */
785 complain_overflow_dont
,/* complain_on_overflow */
786 bfd_elf_generic_reloc
, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE
, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE
), /* pcrel_offset */
793 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
797 TRUE
, /* pc_relative */
799 complain_overflow_bitfield
,/* complain_on_overflow */
800 bfd_elf_generic_reloc
, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE
, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE
), /* pcrel_offset */
807 HOWTO (R_ARM_THM_JUMP19
, /* type */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
811 TRUE
, /* pc_relative */
813 complain_overflow_signed
,/* complain_on_overflow */
814 bfd_elf_generic_reloc
, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE
, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE
), /* pcrel_offset */
821 HOWTO (R_ARM_THM_JUMP6
, /* type */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
825 TRUE
, /* pc_relative */
827 complain_overflow_unsigned
,/* complain_on_overflow */
828 bfd_elf_generic_reloc
, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE
, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE
), /* pcrel_offset */
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
838 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
842 TRUE
, /* pc_relative */
844 complain_overflow_dont
,/* complain_on_overflow */
845 bfd_elf_generic_reloc
, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE
, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE
), /* pcrel_offset */
852 HOWTO (R_ARM_THM_PC12
, /* type */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
856 TRUE
, /* pc_relative */
858 complain_overflow_dont
,/* complain_on_overflow */
859 bfd_elf_generic_reloc
, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE
, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE
), /* pcrel_offset */
866 HOWTO (R_ARM_ABS32_NOI
, /* type */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
870 FALSE
, /* pc_relative */
872 complain_overflow_dont
,/* complain_on_overflow */
873 bfd_elf_generic_reloc
, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE
, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE
), /* pcrel_offset */
880 HOWTO (R_ARM_REL32_NOI
, /* type */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
884 TRUE
, /* pc_relative */
886 complain_overflow_dont
,/* complain_on_overflow */
887 bfd_elf_generic_reloc
, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE
, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE
), /* pcrel_offset */
894 /* Group relocations. */
896 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
900 TRUE
, /* pc_relative */
902 complain_overflow_dont
,/* complain_on_overflow */
903 bfd_elf_generic_reloc
, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE
, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE
), /* pcrel_offset */
910 HOWTO (R_ARM_ALU_PC_G0
, /* type */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
914 TRUE
, /* pc_relative */
916 complain_overflow_dont
,/* complain_on_overflow */
917 bfd_elf_generic_reloc
, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE
, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE
), /* pcrel_offset */
924 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
928 TRUE
, /* pc_relative */
930 complain_overflow_dont
,/* complain_on_overflow */
931 bfd_elf_generic_reloc
, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE
, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE
), /* pcrel_offset */
938 HOWTO (R_ARM_ALU_PC_G1
, /* type */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
942 TRUE
, /* pc_relative */
944 complain_overflow_dont
,/* complain_on_overflow */
945 bfd_elf_generic_reloc
, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE
, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE
), /* pcrel_offset */
952 HOWTO (R_ARM_ALU_PC_G2
, /* type */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
956 TRUE
, /* pc_relative */
958 complain_overflow_dont
,/* complain_on_overflow */
959 bfd_elf_generic_reloc
, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE
, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE
), /* pcrel_offset */
966 HOWTO (R_ARM_LDR_PC_G1
, /* type */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
970 TRUE
, /* pc_relative */
972 complain_overflow_dont
,/* complain_on_overflow */
973 bfd_elf_generic_reloc
, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE
, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE
), /* pcrel_offset */
980 HOWTO (R_ARM_LDR_PC_G2
, /* type */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
984 TRUE
, /* pc_relative */
986 complain_overflow_dont
,/* complain_on_overflow */
987 bfd_elf_generic_reloc
, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE
, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE
), /* pcrel_offset */
994 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
998 TRUE
, /* pc_relative */
1000 complain_overflow_dont
,/* complain_on_overflow */
1001 bfd_elf_generic_reloc
, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE
, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE
), /* pcrel_offset */
1008 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1012 TRUE
, /* pc_relative */
1014 complain_overflow_dont
,/* complain_on_overflow */
1015 bfd_elf_generic_reloc
, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE
, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE
), /* pcrel_offset */
1022 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1026 TRUE
, /* pc_relative */
1028 complain_overflow_dont
,/* complain_on_overflow */
1029 bfd_elf_generic_reloc
, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE
, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE
), /* pcrel_offset */
1036 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 TRUE
, /* pc_relative */
1042 complain_overflow_dont
,/* complain_on_overflow */
1043 bfd_elf_generic_reloc
, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE
, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE
), /* pcrel_offset */
1050 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1054 TRUE
, /* pc_relative */
1056 complain_overflow_dont
,/* complain_on_overflow */
1057 bfd_elf_generic_reloc
, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE
, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE
), /* pcrel_offset */
1064 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1068 TRUE
, /* pc_relative */
1070 complain_overflow_dont
,/* complain_on_overflow */
1071 bfd_elf_generic_reloc
, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE
, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE
), /* pcrel_offset */
1078 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1082 TRUE
, /* pc_relative */
1084 complain_overflow_dont
,/* complain_on_overflow */
1085 bfd_elf_generic_reloc
, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE
, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE
), /* pcrel_offset */
1092 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1096 TRUE
, /* pc_relative */
1098 complain_overflow_dont
,/* complain_on_overflow */
1099 bfd_elf_generic_reloc
, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE
, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE
), /* pcrel_offset */
1106 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1110 TRUE
, /* pc_relative */
1112 complain_overflow_dont
,/* complain_on_overflow */
1113 bfd_elf_generic_reloc
, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE
, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE
), /* pcrel_offset */
1120 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1124 TRUE
, /* pc_relative */
1126 complain_overflow_dont
,/* complain_on_overflow */
1127 bfd_elf_generic_reloc
, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE
, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE
), /* pcrel_offset */
1134 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1138 TRUE
, /* pc_relative */
1140 complain_overflow_dont
,/* complain_on_overflow */
1141 bfd_elf_generic_reloc
, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE
, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE
), /* pcrel_offset */
1148 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 TRUE
, /* pc_relative */
1154 complain_overflow_dont
,/* complain_on_overflow */
1155 bfd_elf_generic_reloc
, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE
, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE
), /* pcrel_offset */
1162 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 TRUE
, /* pc_relative */
1168 complain_overflow_dont
,/* complain_on_overflow */
1169 bfd_elf_generic_reloc
, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE
, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE
), /* pcrel_offset */
1176 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 TRUE
, /* pc_relative */
1182 complain_overflow_dont
,/* complain_on_overflow */
1183 bfd_elf_generic_reloc
, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE
, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE
), /* pcrel_offset */
1190 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1194 TRUE
, /* pc_relative */
1196 complain_overflow_dont
,/* complain_on_overflow */
1197 bfd_elf_generic_reloc
, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE
, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE
), /* pcrel_offset */
1204 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 TRUE
, /* pc_relative */
1210 complain_overflow_dont
,/* complain_on_overflow */
1211 bfd_elf_generic_reloc
, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE
, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE
), /* pcrel_offset */
1218 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 TRUE
, /* pc_relative */
1224 complain_overflow_dont
,/* complain_on_overflow */
1225 bfd_elf_generic_reloc
, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE
, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE
), /* pcrel_offset */
1232 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1236 TRUE
, /* pc_relative */
1238 complain_overflow_dont
,/* complain_on_overflow */
1239 bfd_elf_generic_reloc
, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE
, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE
), /* pcrel_offset */
1246 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1250 TRUE
, /* pc_relative */
1252 complain_overflow_dont
,/* complain_on_overflow */
1253 bfd_elf_generic_reloc
, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE
, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE
), /* pcrel_offset */
1260 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1264 TRUE
, /* pc_relative */
1266 complain_overflow_dont
,/* complain_on_overflow */
1267 bfd_elf_generic_reloc
, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE
, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE
), /* pcrel_offset */
1274 /* End of group relocations. */
1276 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1280 FALSE
, /* pc_relative */
1282 complain_overflow_dont
,/* complain_on_overflow */
1283 bfd_elf_generic_reloc
, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE
, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE
), /* pcrel_offset */
1290 HOWTO (R_ARM_MOVT_BREL
, /* type */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1294 FALSE
, /* pc_relative */
1296 complain_overflow_bitfield
,/* complain_on_overflow */
1297 bfd_elf_generic_reloc
, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE
, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE
), /* pcrel_offset */
1304 HOWTO (R_ARM_MOVW_BREL
, /* type */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1308 FALSE
, /* pc_relative */
1310 complain_overflow_dont
,/* complain_on_overflow */
1311 bfd_elf_generic_reloc
, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE
, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE
), /* pcrel_offset */
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1322 FALSE
, /* pc_relative */
1324 complain_overflow_dont
,/* complain_on_overflow */
1325 bfd_elf_generic_reloc
, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE
, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE
), /* pcrel_offset */
1332 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1336 FALSE
, /* pc_relative */
1338 complain_overflow_bitfield
,/* complain_on_overflow */
1339 bfd_elf_generic_reloc
, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE
, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE
), /* pcrel_offset */
1346 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1350 FALSE
, /* pc_relative */
1352 complain_overflow_dont
,/* complain_on_overflow */
1353 bfd_elf_generic_reloc
, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE
, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE
), /* pcrel_offset */
1360 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1364 FALSE
, /* pc_relative */
1366 complain_overflow_bitfield
,/* complain_on_overflow */
1367 NULL
, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE
, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE
), /* pcrel_offset */
1374 HOWTO (R_ARM_TLS_CALL
, /* type */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1378 FALSE
, /* pc_relative */
1380 complain_overflow_dont
,/* complain_on_overflow */
1381 bfd_elf_generic_reloc
, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE
, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE
), /* pcrel_offset */
1388 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 FALSE
, /* pc_relative */
1394 complain_overflow_bitfield
,/* complain_on_overflow */
1395 bfd_elf_generic_reloc
, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE
, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE
), /* pcrel_offset */
1402 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 FALSE
, /* pc_relative */
1408 complain_overflow_dont
,/* complain_on_overflow */
1409 bfd_elf_generic_reloc
, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE
, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE
), /* pcrel_offset */
1416 HOWTO (R_ARM_PLT32_ABS
, /* type */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 FALSE
, /* pc_relative */
1422 complain_overflow_dont
,/* complain_on_overflow */
1423 bfd_elf_generic_reloc
, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE
, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE
), /* pcrel_offset */
1430 HOWTO (R_ARM_GOT_ABS
, /* type */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 FALSE
, /* pc_relative */
1436 complain_overflow_dont
,/* complain_on_overflow */
1437 bfd_elf_generic_reloc
, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE
, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE
), /* pcrel_offset */
1444 HOWTO (R_ARM_GOT_PREL
, /* type */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 TRUE
, /* pc_relative */
1450 complain_overflow_dont
, /* complain_on_overflow */
1451 bfd_elf_generic_reloc
, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE
, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE
), /* pcrel_offset */
1458 HOWTO (R_ARM_GOT_BREL12
, /* type */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 FALSE
, /* pc_relative */
1464 complain_overflow_bitfield
,/* complain_on_overflow */
1465 bfd_elf_generic_reloc
, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE
, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE
), /* pcrel_offset */
1472 HOWTO (R_ARM_GOTOFF12
, /* type */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 FALSE
, /* pc_relative */
1478 complain_overflow_bitfield
,/* complain_on_overflow */
1479 bfd_elf_generic_reloc
, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE
, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE
), /* pcrel_offset */
1486 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 FALSE
, /* pc_relative */
1495 complain_overflow_dont
, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE
, /* partial_inplace */
1501 FALSE
), /* pcrel_offset */
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 FALSE
, /* pc_relative */
1510 complain_overflow_dont
, /* complain_on_overflow */
1511 NULL
, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE
, /* partial_inplace */
1516 FALSE
), /* pcrel_offset */
1518 HOWTO (R_ARM_THM_JUMP11
, /* type */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1522 TRUE
, /* pc_relative */
1524 complain_overflow_signed
, /* complain_on_overflow */
1525 bfd_elf_generic_reloc
, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE
, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE
), /* pcrel_offset */
1532 HOWTO (R_ARM_THM_JUMP8
, /* type */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1536 TRUE
, /* pc_relative */
1538 complain_overflow_signed
, /* complain_on_overflow */
1539 bfd_elf_generic_reloc
, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE
, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE
), /* pcrel_offset */
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32
, /* type */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1551 FALSE
, /* pc_relative */
1553 complain_overflow_bitfield
,/* complain_on_overflow */
1554 NULL
, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE
, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE
), /* pcrel_offset */
1561 HOWTO (R_ARM_TLS_LDM32
, /* type */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1565 FALSE
, /* pc_relative */
1567 complain_overflow_bitfield
,/* complain_on_overflow */
1568 bfd_elf_generic_reloc
, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE
, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE
), /* pcrel_offset */
1575 HOWTO (R_ARM_TLS_LDO32
, /* type */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 FALSE
, /* pc_relative */
1581 complain_overflow_bitfield
,/* complain_on_overflow */
1582 bfd_elf_generic_reloc
, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE
, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE
), /* pcrel_offset */
1589 HOWTO (R_ARM_TLS_IE32
, /* type */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1593 FALSE
, /* pc_relative */
1595 complain_overflow_bitfield
,/* complain_on_overflow */
1596 NULL
, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE
, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE
), /* pcrel_offset */
1603 HOWTO (R_ARM_TLS_LE32
, /* type */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1607 FALSE
, /* pc_relative */
1609 complain_overflow_bitfield
,/* complain_on_overflow */
1610 NULL
, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE
, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE
), /* pcrel_offset */
1617 HOWTO (R_ARM_TLS_LDO12
, /* type */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1621 FALSE
, /* pc_relative */
1623 complain_overflow_bitfield
,/* complain_on_overflow */
1624 bfd_elf_generic_reloc
, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE
, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE
), /* pcrel_offset */
1631 HOWTO (R_ARM_TLS_LE12
, /* type */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1635 FALSE
, /* pc_relative */
1637 complain_overflow_bitfield
,/* complain_on_overflow */
1638 bfd_elf_generic_reloc
, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE
, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE
), /* pcrel_offset */
1645 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1649 FALSE
, /* pc_relative */
1651 complain_overflow_bitfield
,/* complain_on_overflow */
1652 bfd_elf_generic_reloc
, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE
, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE
), /* pcrel_offset */
1659 /* 112-127 private relocations. */
1677 /* R_ARM_ME_TOO, obsolete. */
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1684 FALSE
, /* pc_relative */
1686 complain_overflow_bitfield
,/* complain_on_overflow */
1687 bfd_elf_generic_reloc
, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE
, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE
), /* pcrel_offset */
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1699 FALSE
, /* pc_relative. */
1701 complain_overflow_bitfield
,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc
, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE
, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE
), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1712 FALSE
, /* pc_relative. */
1714 complain_overflow_bitfield
,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc
, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE
, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE
), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1725 FALSE
, /* pc_relative. */
1727 complain_overflow_bitfield
,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc
, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE
, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE
), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1738 FALSE
, /* pc_relative. */
1740 complain_overflow_bitfield
,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc
, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE
, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE
), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16
, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1752 TRUE
, /* pc_relative. */
1754 complain_overflow_dont
,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc
, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE
, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE
), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12
, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1765 TRUE
, /* pc_relative. */
1767 complain_overflow_dont
,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc
, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE
, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE
), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18
, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1778 TRUE
, /* pc_relative. */
1780 complain_overflow_dont
,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc
, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE
, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE
), /* pcrel_offset. */
1790 static reloc_howto_type elf32_arm_howto_table_2
[8] =
1792 HOWTO (R_ARM_IRELATIVE
, /* type */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 FALSE
, /* pc_relative */
1798 complain_overflow_bitfield
,/* complain_on_overflow */
1799 bfd_elf_generic_reloc
, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE
, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE
), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC
, /* type */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 FALSE
, /* pc_relative */
1811 complain_overflow_bitfield
,/* complain_on_overflow */
1812 bfd_elf_generic_reloc
, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE
, /* partial_inplace */
1816 0xffffffff, /* dst_mask */
1817 FALSE
), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC
, /* type */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1822 FALSE
, /* pc_relative */
1824 complain_overflow_bitfield
,/* complain_on_overflow */
1825 bfd_elf_generic_reloc
, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE
, /* partial_inplace */
1829 0xffffffff, /* dst_mask */
1830 FALSE
), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC
, /* type */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1835 FALSE
, /* pc_relative */
1837 complain_overflow_bitfield
,/* complain_on_overflow */
1838 bfd_elf_generic_reloc
, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE
, /* partial_inplace */
1842 0xffffffff, /* dst_mask */
1843 FALSE
), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE
, /* type */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1848 FALSE
, /* pc_relative */
1850 complain_overflow_bitfield
,/* complain_on_overflow */
1851 bfd_elf_generic_reloc
, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE
, /* partial_inplace */
1855 0xffffffff, /* dst_mask */
1856 FALSE
), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC
, /* type */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1861 FALSE
, /* pc_relative */
1863 complain_overflow_bitfield
,/* complain_on_overflow */
1864 bfd_elf_generic_reloc
, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE
, /* partial_inplace */
1868 0xffffffff, /* dst_mask */
1869 FALSE
), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC
, /* type */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1874 FALSE
, /* pc_relative */
1876 complain_overflow_bitfield
,/* complain_on_overflow */
1877 bfd_elf_generic_reloc
, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE
, /* partial_inplace */
1881 0xffffffff, /* dst_mask */
1882 FALSE
), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC
, /* type */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1887 FALSE
, /* pc_relative */
1889 complain_overflow_bitfield
,/* complain_on_overflow */
1890 bfd_elf_generic_reloc
, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE
, /* partial_inplace */
1894 0xffffffff, /* dst_mask */
1895 FALSE
), /* pcrel_offset */
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1901 HOWTO (R_ARM_RREL32
, /* type */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 FALSE
, /* pc_relative */
1907 complain_overflow_dont
,/* complain_on_overflow */
1908 bfd_elf_generic_reloc
, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE
, /* partial_inplace */
1913 FALSE
), /* pcrel_offset */
1915 HOWTO (R_ARM_RABS32
, /* type */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1919 FALSE
, /* pc_relative */
1921 complain_overflow_dont
,/* complain_on_overflow */
1922 bfd_elf_generic_reloc
, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE
, /* partial_inplace */
1927 FALSE
), /* pcrel_offset */
1929 HOWTO (R_ARM_RPC24
, /* type */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1933 FALSE
, /* pc_relative */
1935 complain_overflow_dont
,/* complain_on_overflow */
1936 bfd_elf_generic_reloc
, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE
, /* partial_inplace */
1941 FALSE
), /* pcrel_offset */
1943 HOWTO (R_ARM_RBASE
, /* type */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1947 FALSE
, /* pc_relative */
1949 complain_overflow_dont
,/* complain_on_overflow */
1950 bfd_elf_generic_reloc
, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE
, /* partial_inplace */
1955 FALSE
) /* pcrel_offset */
1958 static reloc_howto_type
*
1959 elf32_arm_howto_from_type (unsigned int r_type
)
1961 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1962 return &elf32_arm_howto_table_1
[r_type
];
1964 if (r_type
>= R_ARM_IRELATIVE
1965 && r_type
< R_ARM_IRELATIVE
+ ARRAY_SIZE (elf32_arm_howto_table_2
))
1966 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1968 if (r_type
>= R_ARM_RREL32
1969 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1970 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1976 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1977 Elf_Internal_Rela
* elf_reloc
)
1979 unsigned int r_type
;
1981 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1982 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1987 bfd_set_error (bfd_error_bad_value
);
1993 struct elf32_arm_reloc_map
1995 bfd_reloc_code_real_type bfd_reloc_val
;
1996 unsigned char elf_reloc_val
;
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
2002 {BFD_RELOC_NONE
, R_ARM_NONE
},
2003 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
2004 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
2005 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
2006 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
2007 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
2008 {BFD_RELOC_32
, R_ARM_ABS32
},
2009 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
2010 {BFD_RELOC_8
, R_ARM_ABS8
},
2011 {BFD_RELOC_16
, R_ARM_ABS16
},
2012 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
2013 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
2020 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
2021 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
2022 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
2023 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
2024 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
2025 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
2026 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
2027 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2028 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
2029 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
2030 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
2031 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
2032 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
2033 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2034 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
2035 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
2036 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
2039 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
2040 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
2041 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
2042 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
2045 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
2046 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
2047 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
2048 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
2049 {BFD_RELOC_ARM_GOTFUNCDESC
, R_ARM_GOTFUNCDESC
},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC
, R_ARM_GOTOFFFUNCDESC
},
2051 {BFD_RELOC_ARM_FUNCDESC
, R_ARM_FUNCDESC
},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE
, R_ARM_FUNCDESC_VALUE
},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC
, R_ARM_TLS_GD32_FDPIC
},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC
, R_ARM_TLS_LDM32_FDPIC
},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC
, R_ARM_TLS_IE32_FDPIC
},
2056 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
2057 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
2058 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
2059 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
2060 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
2061 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
2062 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
2063 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
2067 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
2069 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
2070 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
2071 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
2072 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
2073 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
2074 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
2075 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
2076 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
2077 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
2078 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
2079 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
2081 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
2083 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
2084 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
2085 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
2086 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
2087 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
2088 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
2089 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
2090 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
2091 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
2092 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
2093 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
2094 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
},
2099 {BFD_RELOC_ARM_THUMB_BF17
, R_ARM_THM_BF16
},
2100 {BFD_RELOC_ARM_THUMB_BF13
, R_ARM_THM_BF12
},
2101 {BFD_RELOC_ARM_THUMB_BF19
, R_ARM_THM_BF18
}
2104 static reloc_howto_type
*
2105 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2106 bfd_reloc_code_real_type code
)
2110 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
2111 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
2117 static reloc_howto_type
*
2118 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2123 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
2124 if (elf32_arm_howto_table_1
[i
].name
!= NULL
2125 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
2126 return &elf32_arm_howto_table_1
[i
];
2128 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
2129 if (elf32_arm_howto_table_2
[i
].name
!= NULL
2130 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
2131 return &elf32_arm_howto_table_2
[i
];
2133 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
2134 if (elf32_arm_howto_table_3
[i
].name
!= NULL
2135 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
2136 return &elf32_arm_howto_table_3
[i
];
2141 /* Support for core dump NOTE sections. */
2144 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2149 switch (note
->descsz
)
2154 case 148: /* Linux/ARM 32-bit. */
2156 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2159 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2170 size
, note
->descpos
+ offset
);
2174 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2176 switch (note
->descsz
)
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd
)->core
->pid
2183 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2184 elf_tdata (abfd
)->core
->program
2185 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2186 elf_tdata (abfd
)->core
->command
2187 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2194 char *command
= elf_tdata (abfd
)->core
->command
;
2195 int n
= strlen (command
);
2197 if (0 < n
&& command
[n
- 1] == ' ')
2198 command
[n
- 1] = '\0';
2205 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2215 char data
[124] ATTRIBUTE_NONSTRING
;
2218 va_start (ap
, note_type
);
2219 memset (data
, 0, sizeof (data
));
2220 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION
;
2229 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2235 return elfcore_write_note (abfd
, buf
, bufsiz
,
2236 "CORE", note_type
, data
, sizeof (data
));
2247 va_start (ap
, note_type
);
2248 memset (data
, 0, sizeof (data
));
2249 pid
= va_arg (ap
, long);
2250 bfd_put_32 (abfd
, pid
, data
+ 24);
2251 cursig
= va_arg (ap
, int);
2252 bfd_put_16 (abfd
, cursig
, data
+ 12);
2253 greg
= va_arg (ap
, const void *);
2254 memcpy (data
+ 72, greg
, 72);
2257 return elfcore_write_note (abfd
, buf
, bufsiz
,
2258 "CORE", note_type
, data
, sizeof (data
));
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2272 typedef unsigned long int insn32
;
2273 typedef unsigned short int insn16
;
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2303 #define CMSE_PREFIX "__acle_se_"
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2307 /* The name of the dynamic interpreter. This is put in the .interp
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2314 static const unsigned long tls_trampoline
[] =
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2321 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry
[] =
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry
[] =
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2371 #ifdef FOUR_WORD_PLT
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2377 static const bfd_vma elf32_arm_plt0_entry
[] =
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2385 /* Subsequent entries in a procedure linkage table look like
2387 static const bfd_vma elf32_arm_plt_entry
[] =
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2395 #else /* not FOUR_WORD_PLT */
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2401 static const bfd_vma elf32_arm_plt0_entry
[] =
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short
[] =
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long
[] =
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2429 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2431 #endif /* not FOUR_WORD_PLT */
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2449 static const bfd_vma elf32_thumb2_plt_entry
[] =
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2500 /* The entries in a PLT when using a DLL-based target with multiple
2502 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2512 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579 enum stub_insn_type type
;
2580 unsigned int r_type
;
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2780 /* Cortex-A8 erratum-workaround stubs. */
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2792 /* Stub used for b.w and bl.w instructions. */
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2822 const char * stubborn_problems[] = { "np" };
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2827 .data.rel.local.stubborn_problems
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2838 #define STUB_SUFFIX ".__stub"
2840 /* One entry per long/short branch stub defined above. */
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2880 const insn_sequence
* template_sequence
;
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions
[] =
2891 struct elf32_arm_stub_hash_entry
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root
;
2896 /* The stub section. */
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset
;
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value
;
2905 asection
*target_section
;
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2912 bfd_vma source_value
;
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn
;
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type
;
2920 /* Its encoding size in bytes. */
2923 const insn_sequence
*stub_template
;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size
;
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry
*h
;
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type
;
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2943 /* Used to build a map of a section. This is required for mixed-endian
2946 typedef struct elf32_elf_section_map
2951 elf32_arm_section_map
;
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2959 VFP11_ERRATUM_ARM_VENEER
,
2960 VFP11_ERRATUM_THUMB_VENEER
2962 elf32_vfp11_erratum_type
;
2964 typedef struct elf32_vfp11_erratum_list
2966 struct elf32_vfp11_erratum_list
*next
;
2972 struct elf32_vfp11_erratum_list
*veneer
;
2973 unsigned int vfp_insn
;
2977 struct elf32_vfp11_erratum_list
*branch
;
2981 elf32_vfp11_erratum_type type
;
2983 elf32_vfp11_erratum_list
;
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2990 STM32L4XX_ERRATUM_VENEER
2992 elf32_stm32l4xx_erratum_type
;
2994 typedef struct elf32_stm32l4xx_erratum_list
2996 struct elf32_stm32l4xx_erratum_list
*next
;
3002 struct elf32_stm32l4xx_erratum_list
*veneer
;
3007 struct elf32_stm32l4xx_erratum_list
*branch
;
3011 elf32_stm32l4xx_erratum_type type
;
3013 elf32_stm32l4xx_erratum_list
;
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3020 arm_unwind_edit_type
;
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3025 arm_unwind_edit_type type
;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection
*linked_section
;
3031 struct arm_unwind_table_edit
*next
;
3033 arm_unwind_table_edit
;
3035 typedef struct _arm_elf_section_data
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf
;
3039 unsigned int mapcount
;
3040 unsigned int mapsize
;
3041 elf32_arm_section_map
*map
;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount
;
3044 elf32_vfp11_erratum_list
*erratumlist
;
3045 unsigned int stm32l4xx_erratumcount
;
3046 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
3047 unsigned int additional_reloc_count
;
3048 /* Information about unwind tables. */
3051 /* Unwind info attached to a text section. */
3054 asection
*arm_exidx_sec
;
3057 /* Unwind info attached to an .ARM.exidx section. */
3060 arm_unwind_table_edit
*unwind_edit_list
;
3061 arm_unwind_table_edit
*unwind_edit_tail
;
3065 _arm_elf_section_data
;
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3076 struct a8_erratum_fix
3081 bfd_vma target_offset
;
3082 unsigned long orig_insn
;
3084 enum elf32_arm_stub_type stub_type
;
3085 enum arm_st_branch_type branch_type
;
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3091 struct a8_erratum_reloc
3094 bfd_vma destination
;
3095 struct elf32_arm_link_hash_entry
*hash
;
3096 const char *sym_name
;
3097 unsigned int r_type
;
3098 enum arm_st_branch_type branch_type
;
3099 bfd_boolean non_a8_stub
;
3102 /* The size of the thread control block. */
3105 /* ARM-specific information about a PLT entry, over and above the usual
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount
;
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount
;
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount
;
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset
;
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root
;
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm
;
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs
*dyn_relocs
;
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local
{
3147 unsigned int funcdesc_cnt
;
3148 unsigned int gotofffuncdesc_cnt
;
3149 int funcdesc_offset
;
3152 struct elf_arm_obj_tdata
3154 struct elf_obj_tdata root
;
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type
;
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma
*local_tlsdesc_gotent
;
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info
**local_iplt
;
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning
;
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning
;
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local
*local_fdpic_cnts
;
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3196 elf32_arm_mkobject (bfd
*abfd
)
3198 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global
{
3206 unsigned int gotofffuncdesc_cnt
;
3207 unsigned int gotfuncdesc_cnt
;
3208 unsigned int funcdesc_cnt
;
3209 int funcdesc_offset
;
3210 int gotfuncdesc_offset
;
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3216 struct elf_link_hash_entry root
;
3218 /* ARM-specific PLT information. */
3219 struct arm_plt_info plt
;
3221 #define GOT_UNKNOWN 0
3222 #define GOT_NORMAL 1
3223 #define GOT_TLS_GD 2
3224 #define GOT_TLS_IE 4
3225 #define GOT_TLS_GDESC 8
3226 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3227 unsigned int tls_type
: 8;
3229 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3230 unsigned int is_iplt
: 1;
3232 unsigned int unused
: 23;
3234 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3235 starting at the end of the jump table. */
3236 bfd_vma tlsdesc_got
;
3238 /* The symbol marking the real symbol location for exported thumb
3239 symbols with Arm stubs. */
3240 struct elf_link_hash_entry
*export_glue
;
3242 /* A pointer to the most recently used stub hash entry against this
3244 struct elf32_arm_stub_hash_entry
*stub_cache
;
3246 /* Counter for FDPIC relocations against this symbol. */
3247 struct fdpic_global fdpic_cnts
;
3250 /* Traverse an arm ELF linker hash table. */
3251 #define elf32_arm_link_hash_traverse(table, func, info) \
3252 (elf_link_hash_traverse \
3254 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3257 /* Get the ARM elf linker hash table from a link_info structure. */
3258 #define elf32_arm_hash_table(info) \
3259 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3260 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3262 #define arm_stub_hash_lookup(table, string, create, copy) \
3263 ((struct elf32_arm_stub_hash_entry *) \
3264 bfd_hash_lookup ((table), (string), (create), (copy)))
3266 /* Array to keep track of which stub sections have been created, and
3267 information on stub grouping. */
3270 /* This is the section to which stubs in the group will be
3273 /* The stub section. */
3277 #define elf32_arm_compute_jump_table_size(htab) \
3278 ((htab)->next_tls_desc_index * 4)
3280 /* ARM ELF linker hash table. */
3281 struct elf32_arm_link_hash_table
3283 /* The main hash table. */
3284 struct elf_link_hash_table root
;
3286 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3287 bfd_size_type thumb_glue_size
;
3289 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3290 bfd_size_type arm_glue_size
;
3292 /* The size in bytes of section containing the ARMv4 BX veneers. */
3293 bfd_size_type bx_glue_size
;
3295 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3296 veneer has been populated. */
3297 bfd_vma bx_glue_offset
[15];
3299 /* The size in bytes of the section containing glue for VFP11 erratum
3301 bfd_size_type vfp11_erratum_glue_size
;
3303 /* The size in bytes of the section containing glue for STM32L4XX erratum
3305 bfd_size_type stm32l4xx_erratum_glue_size
;
3307 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3308 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3309 elf32_arm_write_section(). */
3310 struct a8_erratum_fix
*a8_erratum_fixes
;
3311 unsigned int num_a8_erratum_fixes
;
3313 /* An arbitrary input BFD chosen to hold the glue sections. */
3314 bfd
* bfd_of_glue_owner
;
3316 /* Nonzero to output a BE8 image. */
3319 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3320 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3323 /* The relocation to use for R_ARM_TARGET2 relocations. */
3326 /* 0 = Ignore R_ARM_V4BX.
3327 1 = Convert BX to MOV PC.
3328 2 = Generate v4 interworing stubs. */
3331 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3334 /* Whether we should fix the ARM1176 BLX immediate issue. */
3337 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3340 /* What sort of code sequences we should look for which may trigger the
3341 VFP11 denorm erratum. */
3342 bfd_arm_vfp11_fix vfp11_fix
;
3344 /* Global counter for the number of fixes we have emitted. */
3345 int num_vfp11_fixes
;
3347 /* What sort of code sequences we should look for which may trigger the
3348 STM32L4XX erratum. */
3349 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3351 /* Global counter for the number of fixes we have emitted. */
3352 int num_stm32l4xx_fixes
;
3354 /* Nonzero to force PIC branch veneers. */
3357 /* The number of bytes in the initial entry in the PLT. */
3358 bfd_size_type plt_header_size
;
3360 /* The number of bytes in the subsequent PLT etries. */
3361 bfd_size_type plt_entry_size
;
3363 /* True if the target system is VxWorks. */
3366 /* True if the target system is Symbian OS. */
3369 /* True if the target system is Native Client. */
3372 /* True if the target uses REL relocations. */
3373 bfd_boolean use_rel
;
3375 /* Nonzero if import library must be a secure gateway import library
3376 as per ARMv8-M Security Extensions. */
3379 /* The import library whose symbols' address must remain stable in
3380 the import library generated. */
3383 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3384 bfd_vma next_tls_desc_index
;
3386 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3387 bfd_vma num_tls_desc
;
3389 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3392 /* The offset into splt of the PLT entry for the TLS descriptor
3393 resolver. Special values are 0, if not necessary (or not found
3394 to be necessary yet), and -1 if needed but not determined
3396 bfd_vma dt_tlsdesc_plt
;
3398 /* The offset into sgot of the GOT entry used by the PLT entry
3400 bfd_vma dt_tlsdesc_got
;
3402 /* Offset in .plt section of tls_arm_trampoline. */
3403 bfd_vma tls_trampoline
;
3405 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3408 bfd_signed_vma refcount
;
3412 /* Small local sym cache. */
3413 struct sym_cache sym_cache
;
3415 /* For convenience in allocate_dynrelocs. */
3418 /* The amount of space used by the reserved portion of the sgotplt
3419 section, plus whatever space is used by the jump slots. */
3420 bfd_vma sgotplt_jump_table_size
;
3422 /* The stub hash table. */
3423 struct bfd_hash_table stub_hash_table
;
3425 /* Linker stub bfd. */
3428 /* Linker call-backs. */
3429 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3431 void (*layout_sections_again
) (void);
3433 /* Array to keep track of which stub sections have been created, and
3434 information on stub grouping. */
3435 struct map_stub
*stub_group
;
3437 /* Input stub section holding secure gateway veneers. */
3438 asection
*cmse_stub_sec
;
3440 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3441 start to be allocated. */
3442 bfd_vma new_cmse_stub_offset
;
3444 /* Number of elements in stub_group. */
3445 unsigned int top_id
;
3447 /* Assorted information used by elf32_arm_size_stubs. */
3448 unsigned int bfd_count
;
3449 unsigned int top_index
;
3450 asection
**input_list
;
3452 /* True if the target system uses FDPIC. */
3455 /* Fixup section. Used for FDPIC. */
3459 /* Add an FDPIC read-only fixup. */
3461 arm_elf_add_rofixup (bfd
*output_bfd
, asection
*srofixup
, bfd_vma offset
)
3463 bfd_vma fixup_offset
;
3465 fixup_offset
= srofixup
->reloc_count
++ * 4;
3466 BFD_ASSERT (fixup_offset
< srofixup
->size
);
3467 bfd_put_32 (output_bfd
, offset
, srofixup
->contents
+ fixup_offset
);
3471 ctz (unsigned int mask
)
3473 #if GCC_VERSION >= 3004
3474 return __builtin_ctz (mask
);
3478 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3489 elf32_arm_popcount (unsigned int mask
)
3491 #if GCC_VERSION >= 3004
3492 return __builtin_popcount (mask
);
3497 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3507 static void elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
3508 asection
*sreloc
, Elf_Internal_Rela
*rel
);
3511 arm_elf_fill_funcdesc(bfd
*output_bfd
,
3512 struct bfd_link_info
*info
,
3513 int *funcdesc_offset
,
3517 bfd_vma dynreloc_value
,
3520 if ((*funcdesc_offset
& 1) == 0)
3522 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
3523 asection
*sgot
= globals
->root
.sgot
;
3525 if (bfd_link_pic(info
))
3527 asection
*srelgot
= globals
->root
.srelgot
;
3528 Elf_Internal_Rela outrel
;
3530 outrel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
3531 outrel
.r_offset
= sgot
->output_section
->vma
+ sgot
->output_offset
+ offset
;
3532 outrel
.r_addend
= 0;
3534 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
3535 bfd_put_32 (output_bfd
, addr
, sgot
->contents
+ offset
);
3536 bfd_put_32 (output_bfd
, seg
, sgot
->contents
+ offset
+ 4);
3540 struct elf_link_hash_entry
*hgot
= globals
->root
.hgot
;
3541 bfd_vma got_value
= hgot
->root
.u
.def
.value
3542 + hgot
->root
.u
.def
.section
->output_section
->vma
3543 + hgot
->root
.u
.def
.section
->output_offset
;
3545 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3546 sgot
->output_section
->vma
+ sgot
->output_offset
3548 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3549 sgot
->output_section
->vma
+ sgot
->output_offset
3551 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ offset
);
3552 bfd_put_32 (output_bfd
, got_value
, sgot
->contents
+ offset
+ 4);
3554 *funcdesc_offset
|= 1;
3558 /* Create an entry in an ARM ELF linker hash table. */
3560 static struct bfd_hash_entry
*
3561 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3562 struct bfd_hash_table
* table
,
3563 const char * string
)
3565 struct elf32_arm_link_hash_entry
* ret
=
3566 (struct elf32_arm_link_hash_entry
*) entry
;
3568 /* Allocate the structure if it has not already been allocated by a
3571 ret
= (struct elf32_arm_link_hash_entry
*)
3572 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3574 return (struct bfd_hash_entry
*) ret
;
3576 /* Call the allocation method of the superclass. */
3577 ret
= ((struct elf32_arm_link_hash_entry
*)
3578 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3582 ret
->tls_type
= GOT_UNKNOWN
;
3583 ret
->tlsdesc_got
= (bfd_vma
) -1;
3584 ret
->plt
.thumb_refcount
= 0;
3585 ret
->plt
.maybe_thumb_refcount
= 0;
3586 ret
->plt
.noncall_refcount
= 0;
3587 ret
->plt
.got_offset
= -1;
3588 ret
->is_iplt
= FALSE
;
3589 ret
->export_glue
= NULL
;
3591 ret
->stub_cache
= NULL
;
3593 ret
->fdpic_cnts
.gotofffuncdesc_cnt
= 0;
3594 ret
->fdpic_cnts
.gotfuncdesc_cnt
= 0;
3595 ret
->fdpic_cnts
.funcdesc_cnt
= 0;
3596 ret
->fdpic_cnts
.funcdesc_offset
= -1;
3597 ret
->fdpic_cnts
.gotfuncdesc_offset
= -1;
3600 return (struct bfd_hash_entry
*) ret
;
3603 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3607 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3609 if (elf_local_got_refcounts (abfd
) == NULL
)
3611 bfd_size_type num_syms
;
3615 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3616 size
= num_syms
* (sizeof (bfd_signed_vma
)
3617 + sizeof (struct arm_local_iplt_info
*)
3620 + sizeof (struct fdpic_local
));
3621 data
= bfd_zalloc (abfd
, size
);
3625 elf32_arm_local_fdpic_cnts (abfd
) = (struct fdpic_local
*) data
;
3626 data
+= num_syms
* sizeof (struct fdpic_local
);
3628 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3629 data
+= num_syms
* sizeof (bfd_signed_vma
);
3631 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3632 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3634 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3635 data
+= num_syms
* sizeof (bfd_vma
);
3637 elf32_arm_local_got_tls_type (abfd
) = data
;
3642 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3643 to input bfd ABFD. Create the information if it doesn't already exist.
3644 Return null if an allocation fails. */
3646 static struct arm_local_iplt_info
*
3647 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3649 struct arm_local_iplt_info
**ptr
;
3651 if (!elf32_arm_allocate_local_sym_info (abfd
))
3654 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3655 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3657 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3661 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3662 in ABFD's symbol table. If the symbol is global, H points to its
3663 hash table entry, otherwise H is null.
3665 Return true if the symbol does have PLT information. When returning
3666 true, point *ROOT_PLT at the target-independent reference count/offset
3667 union and *ARM_PLT at the ARM-specific information. */
3670 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3671 struct elf32_arm_link_hash_entry
*h
,
3672 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3673 struct arm_plt_info
**arm_plt
)
3675 struct arm_local_iplt_info
*local_iplt
;
3677 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3682 *root_plt
= &h
->root
.plt
;
3687 if (elf32_arm_local_iplt (abfd
) == NULL
)
3690 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3691 if (local_iplt
== NULL
)
3694 *root_plt
= &local_iplt
->root
;
3695 *arm_plt
= &local_iplt
->arm
;
3699 static bfd_boolean
using_thumb_only (struct elf32_arm_link_hash_table
*globals
);
3701 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3705 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3706 struct arm_plt_info
*arm_plt
)
3708 struct elf32_arm_link_hash_table
*htab
;
3710 htab
= elf32_arm_hash_table (info
);
3712 return (!using_thumb_only(htab
) && (arm_plt
->thumb_refcount
!= 0
3713 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0)));
3716 /* Return a pointer to the head of the dynamic reloc list that should
3717 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3718 ABFD's symbol table. Return null if an error occurs. */
3720 static struct elf_dyn_relocs
**
3721 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3722 Elf_Internal_Sym
*isym
)
3724 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3726 struct arm_local_iplt_info
*local_iplt
;
3728 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3729 if (local_iplt
== NULL
)
3731 return &local_iplt
->dyn_relocs
;
3735 /* Track dynamic relocs needed for local syms too.
3736 We really need local syms available to do this
3741 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3745 vpp
= &elf_section_data (s
)->local_dynrel
;
3746 return (struct elf_dyn_relocs
**) vpp
;
3750 /* Initialize an entry in the stub hash table. */
3752 static struct bfd_hash_entry
*
3753 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3754 struct bfd_hash_table
*table
,
3757 /* Allocate the structure if it has not already been allocated by a
3761 entry
= (struct bfd_hash_entry
*)
3762 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3767 /* Call the allocation method of the superclass. */
3768 entry
= bfd_hash_newfunc (entry
, table
, string
);
3771 struct elf32_arm_stub_hash_entry
*eh
;
3773 /* Initialize the local fields. */
3774 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3775 eh
->stub_sec
= NULL
;
3776 eh
->stub_offset
= (bfd_vma
) -1;
3777 eh
->source_value
= 0;
3778 eh
->target_value
= 0;
3779 eh
->target_section
= NULL
;
3781 eh
->stub_type
= arm_stub_none
;
3783 eh
->stub_template
= NULL
;
3784 eh
->stub_template_size
= -1;
3787 eh
->output_name
= NULL
;
3793 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3794 shortcuts to them in our hash table. */
3797 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3799 struct elf32_arm_link_hash_table
*htab
;
3801 htab
= elf32_arm_hash_table (info
);
3805 /* BPABI objects never have a GOT, or associated sections. */
3806 if (htab
->symbian_p
)
3809 if (! _bfd_elf_create_got_section (dynobj
, info
))
3812 /* Also create .rofixup. */
3815 htab
->srofixup
= bfd_make_section_with_flags (dynobj
, ".rofixup",
3816 (SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
3817 | SEC_IN_MEMORY
| SEC_LINKER_CREATED
| SEC_READONLY
));
3818 if (htab
->srofixup
== NULL
3819 || !bfd_set_section_alignment (htab
->srofixup
, 2))
3826 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3829 create_ifunc_sections (struct bfd_link_info
*info
)
3831 struct elf32_arm_link_hash_table
*htab
;
3832 const struct elf_backend_data
*bed
;
3837 htab
= elf32_arm_hash_table (info
);
3838 dynobj
= htab
->root
.dynobj
;
3839 bed
= get_elf_backend_data (dynobj
);
3840 flags
= bed
->dynamic_sec_flags
;
3842 if (htab
->root
.iplt
== NULL
)
3844 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3845 flags
| SEC_READONLY
| SEC_CODE
);
3847 || !bfd_set_section_alignment (s
, bed
->plt_alignment
))
3849 htab
->root
.iplt
= s
;
3852 if (htab
->root
.irelplt
== NULL
)
3854 s
= bfd_make_section_anyway_with_flags (dynobj
,
3855 RELOC_SECTION (htab
, ".iplt"),
3856 flags
| SEC_READONLY
);
3858 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3860 htab
->root
.irelplt
= s
;
3863 if (htab
->root
.igotplt
== NULL
)
3865 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3867 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3869 htab
->root
.igotplt
= s
;
3874 /* Determine if we're dealing with a Thumb only architecture. */
3877 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3880 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3881 Tag_CPU_arch_profile
);
3884 return profile
== 'M';
3886 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3888 /* Force return logic to be reviewed for each new architecture. */
3889 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3891 if (arch
== TAG_CPU_ARCH_V6_M
3892 || arch
== TAG_CPU_ARCH_V6S_M
3893 || arch
== TAG_CPU_ARCH_V7E_M
3894 || arch
== TAG_CPU_ARCH_V8M_BASE
3895 || arch
== TAG_CPU_ARCH_V8M_MAIN
3896 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
)
3902 /* Determine if we're dealing with a Thumb-2 object. */
3905 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3908 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3912 return thumb_isa
== 2;
3914 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3916 /* Force return logic to be reviewed for each new architecture. */
3917 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3919 return (arch
== TAG_CPU_ARCH_V6T2
3920 || arch
== TAG_CPU_ARCH_V7
3921 || arch
== TAG_CPU_ARCH_V7E_M
3922 || arch
== TAG_CPU_ARCH_V8
3923 || arch
== TAG_CPU_ARCH_V8R
3924 || arch
== TAG_CPU_ARCH_V8M_MAIN
3925 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
);
3928 /* Determine whether Thumb-2 BL instruction is available. */
3931 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3934 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3936 /* Force return logic to be reviewed for each new architecture. */
3937 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3939 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3940 return (arch
== TAG_CPU_ARCH_V6T2
3941 || arch
>= TAG_CPU_ARCH_V7
);
3944 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3945 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3949 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3951 struct elf32_arm_link_hash_table
*htab
;
3953 htab
= elf32_arm_hash_table (info
);
3957 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3960 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3963 if (htab
->vxworks_p
)
3965 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3968 if (bfd_link_pic (info
))
3970 htab
->plt_header_size
= 0;
3971 htab
->plt_entry_size
3972 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3976 htab
->plt_header_size
3977 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3978 htab
->plt_entry_size
3979 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3982 if (elf_elfheader (dynobj
))
3983 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3988 Test for thumb only architectures. Note - we cannot just call
3989 using_thumb_only() as the attributes in the output bfd have not been
3990 initialised at this point, so instead we use the input bfd. */
3991 bfd
* saved_obfd
= htab
->obfd
;
3993 htab
->obfd
= dynobj
;
3994 if (using_thumb_only (htab
))
3996 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3997 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3999 htab
->obfd
= saved_obfd
;
4002 if (htab
->fdpic_p
) {
4003 htab
->plt_header_size
= 0;
4004 if (info
->flags
& DF_BIND_NOW
)
4005 htab
->plt_entry_size
= 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry
) - 5);
4007 htab
->plt_entry_size
= 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
);
4010 if (!htab
->root
.splt
4011 || !htab
->root
.srelplt
4012 || !htab
->root
.sdynbss
4013 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
4019 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4022 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
4023 struct elf_link_hash_entry
*dir
,
4024 struct elf_link_hash_entry
*ind
)
4026 struct elf32_arm_link_hash_entry
*edir
, *eind
;
4028 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
4029 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
4031 if (ind
->root
.type
== bfd_link_hash_indirect
)
4033 /* Copy over PLT info. */
4034 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
4035 eind
->plt
.thumb_refcount
= 0;
4036 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
4037 eind
->plt
.maybe_thumb_refcount
= 0;
4038 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
4039 eind
->plt
.noncall_refcount
= 0;
4041 /* Copy FDPIC counters. */
4042 edir
->fdpic_cnts
.gotofffuncdesc_cnt
+= eind
->fdpic_cnts
.gotofffuncdesc_cnt
;
4043 edir
->fdpic_cnts
.gotfuncdesc_cnt
+= eind
->fdpic_cnts
.gotfuncdesc_cnt
;
4044 edir
->fdpic_cnts
.funcdesc_cnt
+= eind
->fdpic_cnts
.funcdesc_cnt
;
4046 /* We should only allocate a function to .iplt once the final
4047 symbol information is known. */
4048 BFD_ASSERT (!eind
->is_iplt
);
4050 if (dir
->got
.refcount
<= 0)
4052 edir
->tls_type
= eind
->tls_type
;
4053 eind
->tls_type
= GOT_UNKNOWN
;
4057 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
4060 /* Destroy an ARM elf linker hash table. */
4063 elf32_arm_link_hash_table_free (bfd
*obfd
)
4065 struct elf32_arm_link_hash_table
*ret
4066 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
4068 bfd_hash_table_free (&ret
->stub_hash_table
);
4069 _bfd_elf_link_hash_table_free (obfd
);
4072 /* Create an ARM elf linker hash table. */
4074 static struct bfd_link_hash_table
*
4075 elf32_arm_link_hash_table_create (bfd
*abfd
)
4077 struct elf32_arm_link_hash_table
*ret
;
4078 size_t amt
= sizeof (struct elf32_arm_link_hash_table
);
4080 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
4084 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
4085 elf32_arm_link_hash_newfunc
,
4086 sizeof (struct elf32_arm_link_hash_entry
),
4093 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
4094 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
4095 #ifdef FOUR_WORD_PLT
4096 ret
->plt_header_size
= 16;
4097 ret
->plt_entry_size
= 16;
4099 ret
->plt_header_size
= 20;
4100 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
4102 ret
->use_rel
= TRUE
;
4106 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
4107 sizeof (struct elf32_arm_stub_hash_entry
)))
4109 _bfd_elf_link_hash_table_free (abfd
);
4112 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
4114 return &ret
->root
.root
;
4117 /* Determine what kind of NOPs are available. */
4120 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
4122 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
4125 /* Force return logic to be reviewed for each new architecture. */
4126 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
4128 return (arch
== TAG_CPU_ARCH_V6T2
4129 || arch
== TAG_CPU_ARCH_V6K
4130 || arch
== TAG_CPU_ARCH_V7
4131 || arch
== TAG_CPU_ARCH_V8
4132 || arch
== TAG_CPU_ARCH_V8R
);
4136 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
4140 case arm_stub_long_branch_thumb_only
:
4141 case arm_stub_long_branch_thumb2_only
:
4142 case arm_stub_long_branch_thumb2_only_pure
:
4143 case arm_stub_long_branch_v4t_thumb_arm
:
4144 case arm_stub_short_branch_v4t_thumb_arm
:
4145 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4146 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4147 case arm_stub_long_branch_thumb_only_pic
:
4148 case arm_stub_cmse_branch_thumb_only
:
4159 /* Determine the type of stub needed, if any, for a call. */
4161 static enum elf32_arm_stub_type
4162 arm_type_of_stub (struct bfd_link_info
*info
,
4163 asection
*input_sec
,
4164 const Elf_Internal_Rela
*rel
,
4165 unsigned char st_type
,
4166 enum arm_st_branch_type
*actual_branch_type
,
4167 struct elf32_arm_link_hash_entry
*hash
,
4168 bfd_vma destination
,
4174 bfd_signed_vma branch_offset
;
4175 unsigned int r_type
;
4176 struct elf32_arm_link_hash_table
* globals
;
4177 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
4178 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4180 enum arm_st_branch_type branch_type
= *actual_branch_type
;
4181 union gotplt_union
*root_plt
;
4182 struct arm_plt_info
*arm_plt
;
4186 if (branch_type
== ST_BRANCH_LONG
)
4189 globals
= elf32_arm_hash_table (info
);
4190 if (globals
== NULL
)
4193 thumb_only
= using_thumb_only (globals
);
4194 thumb2
= using_thumb2 (globals
);
4195 thumb2_bl
= using_thumb2_bl (globals
);
4197 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
4199 /* True for architectures that implement the thumb2 movw instruction. */
4200 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
4202 /* Determine where the call point is. */
4203 location
= (input_sec
->output_offset
4204 + input_sec
->output_section
->vma
4207 r_type
= ELF32_R_TYPE (rel
->r_info
);
4209 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4210 are considering a function call relocation. */
4211 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4212 || r_type
== R_ARM_THM_JUMP19
)
4213 && branch_type
== ST_BRANCH_TO_ARM
)
4214 branch_type
= ST_BRANCH_TO_THUMB
;
4216 /* For TLS call relocs, it is the caller's responsibility to provide
4217 the address of the appropriate trampoline. */
4218 if (r_type
!= R_ARM_TLS_CALL
4219 && r_type
!= R_ARM_THM_TLS_CALL
4220 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
4221 ELF32_R_SYM (rel
->r_info
), &root_plt
,
4223 && root_plt
->offset
!= (bfd_vma
) -1)
4227 if (hash
== NULL
|| hash
->is_iplt
)
4228 splt
= globals
->root
.iplt
;
4230 splt
= globals
->root
.splt
;
4235 /* Note when dealing with PLT entries: the main PLT stub is in
4236 ARM mode, so if the branch is in Thumb mode, another
4237 Thumb->ARM stub will be inserted later just before the ARM
4238 PLT stub. If a long branch stub is needed, we'll add a
4239 Thumb->Arm one and branch directly to the ARM PLT entry.
4240 Here, we have to check if a pre-PLT Thumb->ARM stub
4241 is needed and if it will be close enough. */
4243 destination
= (splt
->output_section
->vma
4244 + splt
->output_offset
4245 + root_plt
->offset
);
4248 /* Thumb branch/call to PLT: it can become a branch to ARM
4249 or to Thumb. We must perform the same checks and
4250 corrections as in elf32_arm_final_link_relocate. */
4251 if ((r_type
== R_ARM_THM_CALL
)
4252 || (r_type
== R_ARM_THM_JUMP24
))
4254 if (globals
->use_blx
4255 && r_type
== R_ARM_THM_CALL
4258 /* If the Thumb BLX instruction is available, convert
4259 the BL to a BLX instruction to call the ARM-mode
4261 branch_type
= ST_BRANCH_TO_ARM
;
4266 /* Target the Thumb stub before the ARM PLT entry. */
4267 destination
-= PLT_THUMB_STUB_SIZE
;
4268 branch_type
= ST_BRANCH_TO_THUMB
;
4273 branch_type
= ST_BRANCH_TO_ARM
;
4277 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4278 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
4280 branch_offset
= (bfd_signed_vma
)(destination
- location
);
4282 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4283 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
4285 /* Handle cases where:
4286 - this call goes too far (different Thumb/Thumb2 max
4288 - it's a Thumb->Arm call and blx is not available, or it's a
4289 Thumb->Arm branch (not bl). A stub is needed in this case,
4290 but only if this call is not through a PLT entry. Indeed,
4291 PLT stubs handle mode switching already. */
4293 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4294 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4296 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4297 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4299 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4300 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4301 && (r_type
== R_ARM_THM_JUMP19
))
4302 || (branch_type
== ST_BRANCH_TO_ARM
4303 && (((r_type
== R_ARM_THM_CALL
4304 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4305 || (r_type
== R_ARM_THM_JUMP24
)
4306 || (r_type
== R_ARM_THM_JUMP19
))
4309 /* If we need to insert a Thumb-Thumb long branch stub to a
4310 PLT, use one that branches directly to the ARM PLT
4311 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4312 stub, undo this now. */
4313 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4315 branch_type
= ST_BRANCH_TO_ARM
;
4316 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4319 if (branch_type
== ST_BRANCH_TO_THUMB
)
4321 /* Thumb to thumb. */
4324 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4326 (_("%pB(%pA): warning: long branch veneers used in"
4327 " section with SHF_ARM_PURECODE section"
4328 " attribute is only supported for M-profile"
4329 " targets that implement the movw instruction"),
4330 input_bfd
, input_sec
);
4332 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4334 ? ((globals
->use_blx
4335 && (r_type
== R_ARM_THM_CALL
))
4336 /* V5T and above. Stub starts with ARM code, so
4337 we must be able to switch mode before
4338 reaching it, which is only possible for 'bl'
4339 (ie R_ARM_THM_CALL relocation). */
4340 ? arm_stub_long_branch_any_thumb_pic
4341 /* On V4T, use Thumb code only. */
4342 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4344 /* non-PIC stubs. */
4345 : ((globals
->use_blx
4346 && (r_type
== R_ARM_THM_CALL
))
4347 /* V5T and above. */
4348 ? arm_stub_long_branch_any_any
4350 : arm_stub_long_branch_v4t_thumb_thumb
);
4354 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4355 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4358 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4360 (_("%pB(%pA): warning: long branch veneers used in"
4361 " section with SHF_ARM_PURECODE section"
4362 " attribute is only supported for M-profile"
4363 " targets that implement the movw instruction"),
4364 input_bfd
, input_sec
);
4366 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4368 ? arm_stub_long_branch_thumb_only_pic
4370 : (thumb2
? arm_stub_long_branch_thumb2_only
4371 : arm_stub_long_branch_thumb_only
);
4377 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4379 (_("%pB(%pA): warning: long branch veneers used in"
4380 " section with SHF_ARM_PURECODE section"
4381 " attribute is only supported" " for M-profile"
4382 " targets that implement the movw instruction"),
4383 input_bfd
, input_sec
);
4387 && sym_sec
->owner
!= NULL
4388 && !INTERWORK_FLAG (sym_sec
->owner
))
4391 (_("%pB(%s): warning: interworking not enabled;"
4392 " first occurrence: %pB: %s call to %s"),
4393 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4397 (bfd_link_pic (info
) | globals
->pic_veneer
)
4399 ? (r_type
== R_ARM_THM_TLS_CALL
4400 /* TLS PIC stubs. */
4401 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4402 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4403 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4404 /* V5T PIC and above. */
4405 ? arm_stub_long_branch_any_arm_pic
4407 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4409 /* non-PIC stubs. */
4410 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4411 /* V5T and above. */
4412 ? arm_stub_long_branch_any_any
4414 : arm_stub_long_branch_v4t_thumb_arm
);
4416 /* Handle v4t short branches. */
4417 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4418 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4419 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4420 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4424 else if (r_type
== R_ARM_CALL
4425 || r_type
== R_ARM_JUMP24
4426 || r_type
== R_ARM_PLT32
4427 || r_type
== R_ARM_TLS_CALL
)
4429 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4431 (_("%pB(%pA): warning: long branch veneers used in"
4432 " section with SHF_ARM_PURECODE section"
4433 " attribute is only supported for M-profile"
4434 " targets that implement the movw instruction"),
4435 input_bfd
, input_sec
);
4436 if (branch_type
== ST_BRANCH_TO_THUMB
)
4441 && sym_sec
->owner
!= NULL
4442 && !INTERWORK_FLAG (sym_sec
->owner
))
4445 (_("%pB(%s): warning: interworking not enabled;"
4446 " first occurrence: %pB: %s call to %s"),
4447 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4450 /* We have an extra 2-bytes reach because of
4451 the mode change (bit 24 (H) of BLX encoding). */
4452 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4453 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4454 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4455 || (r_type
== R_ARM_JUMP24
)
4456 || (r_type
== R_ARM_PLT32
))
4458 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4460 ? ((globals
->use_blx
)
4461 /* V5T and above. */
4462 ? arm_stub_long_branch_any_thumb_pic
4464 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4466 /* non-PIC stubs. */
4467 : ((globals
->use_blx
)
4468 /* V5T and above. */
4469 ? arm_stub_long_branch_any_any
4471 : arm_stub_long_branch_v4t_arm_thumb
);
4477 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4478 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4481 (bfd_link_pic (info
) | globals
->pic_veneer
)
4483 ? (r_type
== R_ARM_TLS_CALL
4485 ? arm_stub_long_branch_any_tls_pic
4487 ? arm_stub_long_branch_arm_nacl_pic
4488 : arm_stub_long_branch_any_arm_pic
))
4489 /* non-PIC stubs. */
4491 ? arm_stub_long_branch_arm_nacl
4492 : arm_stub_long_branch_any_any
);
4497 /* If a stub is needed, record the actual destination type. */
4498 if (stub_type
!= arm_stub_none
)
4499 *actual_branch_type
= branch_type
;
4504 /* Build a name for an entry in the stub hash table. */
4507 elf32_arm_stub_name (const asection
*input_section
,
4508 const asection
*sym_sec
,
4509 const struct elf32_arm_link_hash_entry
*hash
,
4510 const Elf_Internal_Rela
*rel
,
4511 enum elf32_arm_stub_type stub_type
)
4518 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4519 stub_name
= (char *) bfd_malloc (len
);
4520 if (stub_name
!= NULL
)
4521 sprintf (stub_name
, "%08x_%s+%x_%d",
4522 input_section
->id
& 0xffffffff,
4523 hash
->root
.root
.root
.string
,
4524 (int) rel
->r_addend
& 0xffffffff,
4529 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4530 stub_name
= (char *) bfd_malloc (len
);
4531 if (stub_name
!= NULL
)
4532 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4533 input_section
->id
& 0xffffffff,
4534 sym_sec
->id
& 0xffffffff,
4535 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4536 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4537 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4538 (int) rel
->r_addend
& 0xffffffff,
4545 /* Look up an entry in the stub hash. Stub entries are cached because
4546 creating the stub name takes a bit of time. */
4548 static struct elf32_arm_stub_hash_entry
*
4549 elf32_arm_get_stub_entry (const asection
*input_section
,
4550 const asection
*sym_sec
,
4551 struct elf_link_hash_entry
*hash
,
4552 const Elf_Internal_Rela
*rel
,
4553 struct elf32_arm_link_hash_table
*htab
,
4554 enum elf32_arm_stub_type stub_type
)
4556 struct elf32_arm_stub_hash_entry
*stub_entry
;
4557 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4558 const asection
*id_sec
;
4560 if ((input_section
->flags
& SEC_CODE
) == 0)
4563 /* If the input section is the CMSE stubs one and it needs a long
4564 branch stub to reach it's final destination, give up with an
4565 error message: this is not supported. See PR ld/24709. */
4566 if (!strncmp (input_section
->name
, CMSE_STUB_NAME
, strlen(CMSE_STUB_NAME
)))
4568 bfd
*output_bfd
= htab
->obfd
;
4569 asection
*out_sec
= bfd_get_section_by_name (output_bfd
, CMSE_STUB_NAME
);
4571 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4572 "(%#" PRIx64
") from destination (%#" PRIx64
")"),
4574 (uint64_t)out_sec
->output_section
->vma
4575 + out_sec
->output_offset
,
4576 (uint64_t)sym_sec
->output_section
->vma
4577 + sym_sec
->output_offset
4578 + h
->root
.root
.u
.def
.value
);
4579 /* Exit, rather than leave incompletely processed
4584 /* If this input section is part of a group of sections sharing one
4585 stub section, then use the id of the first section in the group.
4586 Stub names need to include a section id, as there may well be
4587 more than one stub used to reach say, printf, and we need to
4588 distinguish between them. */
4589 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4590 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4592 if (h
!= NULL
&& h
->stub_cache
!= NULL
4593 && h
->stub_cache
->h
== h
4594 && h
->stub_cache
->id_sec
== id_sec
4595 && h
->stub_cache
->stub_type
== stub_type
)
4597 stub_entry
= h
->stub_cache
;
4603 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4604 if (stub_name
== NULL
)
4607 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4608 stub_name
, FALSE
, FALSE
);
4610 h
->stub_cache
= stub_entry
;
4618 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4622 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4624 if (stub_type
>= max_stub_type
)
4625 abort (); /* Should be unreachable. */
4629 case arm_stub_cmse_branch_thumb_only
:
4636 abort (); /* Should be unreachable. */
4639 /* Required alignment (as a power of 2) for the dedicated section holding
4640 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4641 with input sections. */
4644 arm_dedicated_stub_output_section_required_alignment
4645 (enum elf32_arm_stub_type stub_type
)
4647 if (stub_type
>= max_stub_type
)
4648 abort (); /* Should be unreachable. */
4652 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4654 case arm_stub_cmse_branch_thumb_only
:
4658 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4662 abort (); /* Should be unreachable. */
4665 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4666 NULL if veneers of this type are interspersed with input sections. */
4669 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4671 if (stub_type
>= max_stub_type
)
4672 abort (); /* Should be unreachable. */
4676 case arm_stub_cmse_branch_thumb_only
:
4677 return CMSE_STUB_NAME
;
4680 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4684 abort (); /* Should be unreachable. */
4687 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4688 returns the address of the hash table field in HTAB holding a pointer to the
4689 corresponding input section. Otherwise, returns NULL. */
4692 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4693 enum elf32_arm_stub_type stub_type
)
4695 if (stub_type
>= max_stub_type
)
4696 abort (); /* Should be unreachable. */
4700 case arm_stub_cmse_branch_thumb_only
:
4701 return &htab
->cmse_stub_sec
;
4704 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4708 abort (); /* Should be unreachable. */
4711 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4712 is the section that branch into veneer and can be NULL if stub should go in
4713 a dedicated output section. Returns a pointer to the stub section, and the
4714 section to which the stub section will be attached (in *LINK_SEC_P).
4715 LINK_SEC_P may be NULL. */
4718 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4719 struct elf32_arm_link_hash_table
*htab
,
4720 enum elf32_arm_stub_type stub_type
)
4722 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4723 const char *stub_sec_prefix
;
4724 bfd_boolean dedicated_output_section
=
4725 arm_dedicated_stub_output_section_required (stub_type
);
4728 if (dedicated_output_section
)
4730 bfd
*output_bfd
= htab
->obfd
;
4731 const char *out_sec_name
=
4732 arm_dedicated_stub_output_section_name (stub_type
);
4734 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4735 stub_sec_prefix
= out_sec_name
;
4736 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4737 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4738 if (out_sec
== NULL
)
4740 _bfd_error_handler (_("no address assigned to the veneers output "
4741 "section %s"), out_sec_name
);
4747 BFD_ASSERT (section
->id
<= htab
->top_id
);
4748 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4749 BFD_ASSERT (link_sec
!= NULL
);
4750 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4751 if (*stub_sec_p
== NULL
)
4752 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4753 stub_sec_prefix
= link_sec
->name
;
4754 out_sec
= link_sec
->output_section
;
4755 align
= htab
->nacl_p
? 4 : 3;
4758 if (*stub_sec_p
== NULL
)
4764 namelen
= strlen (stub_sec_prefix
);
4765 len
= namelen
+ sizeof (STUB_SUFFIX
);
4766 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4770 memcpy (s_name
, stub_sec_prefix
, namelen
);
4771 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4772 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4774 if (*stub_sec_p
== NULL
)
4777 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4778 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4782 if (!dedicated_output_section
)
4783 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4786 *link_sec_p
= link_sec
;
4791 /* Add a new stub entry to the stub hash. Not all fields of the new
4792 stub entry are initialised. */
4794 static struct elf32_arm_stub_hash_entry
*
4795 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4796 struct elf32_arm_link_hash_table
*htab
,
4797 enum elf32_arm_stub_type stub_type
)
4801 struct elf32_arm_stub_hash_entry
*stub_entry
;
4803 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4805 if (stub_sec
== NULL
)
4808 /* Enter this entry into the linker stub hash table. */
4809 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4811 if (stub_entry
== NULL
)
4813 if (section
== NULL
)
4815 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4816 section
->owner
, stub_name
);
4820 stub_entry
->stub_sec
= stub_sec
;
4821 stub_entry
->stub_offset
= (bfd_vma
) -1;
4822 stub_entry
->id_sec
= link_sec
;
4827 /* Store an Arm insn into an output section not processed by
4828 elf32_arm_write_section. */
4831 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4832 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4834 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4835 bfd_putl32 (val
, ptr
);
4837 bfd_putb32 (val
, ptr
);
4840 /* Store a 16-bit Thumb insn into an output section not processed by
4841 elf32_arm_write_section. */
4844 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4845 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4847 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4848 bfd_putl16 (val
, ptr
);
4850 bfd_putb16 (val
, ptr
);
4853 /* Store a Thumb2 insn into an output section not processed by
4854 elf32_arm_write_section. */
4857 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4858 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4860 /* T2 instructions are 16-bit streamed. */
4861 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4863 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4864 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4868 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4869 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4873 /* If it's possible to change R_TYPE to a more efficient access
4874 model, return the new reloc type. */
4877 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4878 struct elf_link_hash_entry
*h
)
4880 int is_local
= (h
== NULL
);
4882 if (bfd_link_dll (info
)
4883 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4886 /* We do not support relaxations for Old TLS models. */
4889 case R_ARM_TLS_GOTDESC
:
4890 case R_ARM_TLS_CALL
:
4891 case R_ARM_THM_TLS_CALL
:
4892 case R_ARM_TLS_DESCSEQ
:
4893 case R_ARM_THM_TLS_DESCSEQ
:
4894 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4900 static bfd_reloc_status_type elf32_arm_final_link_relocate
4901 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4902 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4903 const char *, unsigned char, enum arm_st_branch_type
,
4904 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4907 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4911 case arm_stub_a8_veneer_b_cond
:
4912 case arm_stub_a8_veneer_b
:
4913 case arm_stub_a8_veneer_bl
:
4916 case arm_stub_long_branch_any_any
:
4917 case arm_stub_long_branch_v4t_arm_thumb
:
4918 case arm_stub_long_branch_thumb_only
:
4919 case arm_stub_long_branch_thumb2_only
:
4920 case arm_stub_long_branch_thumb2_only_pure
:
4921 case arm_stub_long_branch_v4t_thumb_thumb
:
4922 case arm_stub_long_branch_v4t_thumb_arm
:
4923 case arm_stub_short_branch_v4t_thumb_arm
:
4924 case arm_stub_long_branch_any_arm_pic
:
4925 case arm_stub_long_branch_any_thumb_pic
:
4926 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4927 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4928 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4929 case arm_stub_long_branch_thumb_only_pic
:
4930 case arm_stub_long_branch_any_tls_pic
:
4931 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4932 case arm_stub_cmse_branch_thumb_only
:
4933 case arm_stub_a8_veneer_blx
:
4936 case arm_stub_long_branch_arm_nacl
:
4937 case arm_stub_long_branch_arm_nacl_pic
:
4941 abort (); /* Should be unreachable. */
4945 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4946 veneering (TRUE) or have their own symbol (FALSE). */
4949 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4951 if (stub_type
>= max_stub_type
)
4952 abort (); /* Should be unreachable. */
4956 case arm_stub_cmse_branch_thumb_only
:
4963 abort (); /* Should be unreachable. */
4966 /* Returns the padding needed for the dedicated section used stubs of type
4970 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4972 if (stub_type
>= max_stub_type
)
4973 abort (); /* Should be unreachable. */
4977 case arm_stub_cmse_branch_thumb_only
:
4984 abort (); /* Should be unreachable. */
4987 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4988 returns the address of the hash table field in HTAB holding the offset at
4989 which new veneers should be layed out in the stub section. */
4992 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
4993 enum elf32_arm_stub_type stub_type
)
4997 case arm_stub_cmse_branch_thumb_only
:
4998 return &htab
->new_cmse_stub_offset
;
5001 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
5007 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
5011 bfd_boolean removed_sg_veneer
;
5012 struct elf32_arm_stub_hash_entry
*stub_entry
;
5013 struct elf32_arm_link_hash_table
*globals
;
5014 struct bfd_link_info
*info
;
5021 const insn_sequence
*template_sequence
;
5023 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
5024 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
5026 int just_allocated
= 0;
5028 /* Massage our args to the form they really have. */
5029 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5030 info
= (struct bfd_link_info
*) in_arg
;
5032 /* Fail if the target section could not be assigned to an output
5033 section. The user should fix his linker script. */
5034 if (stub_entry
->target_section
->output_section
== NULL
5035 && info
->non_contiguous_regions
)
5036 info
->callbacks
->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5037 "Retry without --enable-non-contiguous-regions.\n"),
5038 stub_entry
->target_section
);
5040 globals
= elf32_arm_hash_table (info
);
5041 if (globals
== NULL
)
5044 stub_sec
= stub_entry
->stub_sec
;
5046 if ((globals
->fix_cortex_a8
< 0)
5047 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
5048 /* We have to do less-strictly-aligned fixes last. */
5051 /* Assign a slot at the end of section if none assigned yet. */
5052 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5054 stub_entry
->stub_offset
= stub_sec
->size
;
5057 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
5059 stub_bfd
= stub_sec
->owner
;
5061 /* This is the address of the stub destination. */
5062 sym_value
= (stub_entry
->target_value
5063 + stub_entry
->target_section
->output_offset
5064 + stub_entry
->target_section
->output_section
->vma
);
5066 template_sequence
= stub_entry
->stub_template
;
5067 template_size
= stub_entry
->stub_template_size
;
5070 for (i
= 0; i
< template_size
; i
++)
5072 switch (template_sequence
[i
].type
)
5076 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
5077 if (template_sequence
[i
].reloc_addend
!= 0)
5079 /* We've borrowed the reloc_addend field to mean we should
5080 insert a condition code into this (Thumb-1 branch)
5081 instruction. See THUMB16_BCOND_INSN. */
5082 BFD_ASSERT ((data
& 0xff00) == 0xd000);
5083 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
5085 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
5091 bfd_put_16 (stub_bfd
,
5092 (template_sequence
[i
].data
>> 16) & 0xffff,
5094 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
5096 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
5098 stub_reloc_idx
[nrelocs
] = i
;
5099 stub_reloc_offset
[nrelocs
++] = size
;
5105 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
5107 /* Handle cases where the target is encoded within the
5109 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
5111 stub_reloc_idx
[nrelocs
] = i
;
5112 stub_reloc_offset
[nrelocs
++] = size
;
5118 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
5119 stub_reloc_idx
[nrelocs
] = i
;
5120 stub_reloc_offset
[nrelocs
++] = size
;
5131 stub_sec
->size
+= size
;
5133 /* Stub size has already been computed in arm_size_one_stub. Check
5135 BFD_ASSERT (size
== stub_entry
->stub_size
);
5137 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5138 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
5141 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5142 to relocate in each stub. */
5144 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
5145 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
5147 for (i
= 0; i
< nrelocs
; i
++)
5149 Elf_Internal_Rela rel
;
5150 bfd_boolean unresolved_reloc
;
5151 char *error_message
;
5153 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
5155 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
5156 rel
.r_info
= ELF32_R_INFO (0,
5157 template_sequence
[stub_reloc_idx
[i
]].r_type
);
5160 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
5161 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5162 template should refer back to the instruction after the original
5163 branch. We use target_section as Cortex-A8 erratum workaround stubs
5164 are only generated when both source and target are in the same
5166 points_to
= stub_entry
->target_section
->output_section
->vma
5167 + stub_entry
->target_section
->output_offset
5168 + stub_entry
->source_value
;
5170 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5171 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
5172 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
5173 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
5174 stub_entry
->branch_type
,
5175 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
5183 /* Calculate the template, template size and instruction size for a stub.
5184 Return value is the instruction size. */
5187 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
5188 const insn_sequence
**stub_template
,
5189 int *stub_template_size
)
5191 const insn_sequence
*template_sequence
= NULL
;
5192 int template_size
= 0, i
;
5195 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
5197 *stub_template
= template_sequence
;
5199 template_size
= stub_definitions
[stub_type
].template_size
;
5200 if (stub_template_size
)
5201 *stub_template_size
= template_size
;
5204 for (i
= 0; i
< template_size
; i
++)
5206 switch (template_sequence
[i
].type
)
5227 /* As above, but don't actually build the stub. Just bump offset so
5228 we know stub section sizes. */
5231 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
5232 void *in_arg ATTRIBUTE_UNUSED
)
5234 struct elf32_arm_stub_hash_entry
*stub_entry
;
5235 const insn_sequence
*template_sequence
;
5236 int template_size
, size
;
5238 /* Massage our args to the form they really have. */
5239 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5241 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
5242 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
5244 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
5247 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5248 if (stub_entry
->stub_template_size
)
5250 stub_entry
->stub_size
= size
;
5251 stub_entry
->stub_template
= template_sequence
;
5252 stub_entry
->stub_template_size
= template_size
;
5255 /* Already accounted for. */
5256 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
5259 size
= (size
+ 7) & ~7;
5260 stub_entry
->stub_sec
->size
+= size
;
5265 /* External entry points for sizing and building linker stubs. */
5267 /* Set up various things so that we can make a list of input sections
5268 for each output section included in the link. Returns -1 on error,
5269 0 when no stubs will be needed, and 1 on success. */
5272 elf32_arm_setup_section_lists (bfd
*output_bfd
,
5273 struct bfd_link_info
*info
)
5276 unsigned int bfd_count
;
5277 unsigned int top_id
, top_index
;
5279 asection
**input_list
, **list
;
5281 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5285 if (! is_elf_hash_table (htab
))
5288 /* Count the number of input BFDs and find the top input section id. */
5289 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
5291 input_bfd
= input_bfd
->link
.next
)
5294 for (section
= input_bfd
->sections
;
5296 section
= section
->next
)
5298 if (top_id
< section
->id
)
5299 top_id
= section
->id
;
5302 htab
->bfd_count
= bfd_count
;
5304 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
5305 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
5306 if (htab
->stub_group
== NULL
)
5308 htab
->top_id
= top_id
;
5310 /* We can't use output_bfd->section_count here to find the top output
5311 section index as some sections may have been removed, and
5312 _bfd_strip_section_from_output doesn't renumber the indices. */
5313 for (section
= output_bfd
->sections
, top_index
= 0;
5315 section
= section
->next
)
5317 if (top_index
< section
->index
)
5318 top_index
= section
->index
;
5321 htab
->top_index
= top_index
;
5322 amt
= sizeof (asection
*) * (top_index
+ 1);
5323 input_list
= (asection
**) bfd_malloc (amt
);
5324 htab
->input_list
= input_list
;
5325 if (input_list
== NULL
)
5328 /* For sections we aren't interested in, mark their entries with a
5329 value we can check later. */
5330 list
= input_list
+ top_index
;
5332 *list
= bfd_abs_section_ptr
;
5333 while (list
-- != input_list
);
5335 for (section
= output_bfd
->sections
;
5337 section
= section
->next
)
5339 if ((section
->flags
& SEC_CODE
) != 0)
5340 input_list
[section
->index
] = NULL
;
5346 /* The linker repeatedly calls this function for each input section,
5347 in the order that input sections are linked into output sections.
5348 Build lists of input sections to determine groupings between which
5349 we may insert linker stubs. */
5352 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5355 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5360 if (isec
->output_section
->index
<= htab
->top_index
)
5362 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5364 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5366 /* Steal the link_sec pointer for our list. */
5367 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5368 /* This happens to make the list in reverse order,
5369 which we reverse later. */
5370 PREV_SEC (isec
) = *list
;
5376 /* See whether we can group stub sections together. Grouping stub
5377 sections may result in fewer stubs. More importantly, we need to
5378 put all .init* and .fini* stubs at the end of the .init or
5379 .fini output sections respectively, because glibc splits the
5380 _init and _fini functions into multiple parts. Putting a stub in
5381 the middle of a function is not a good idea. */
5384 group_sections (struct elf32_arm_link_hash_table
*htab
,
5385 bfd_size_type stub_group_size
,
5386 bfd_boolean stubs_always_after_branch
)
5388 asection
**list
= htab
->input_list
;
5392 asection
*tail
= *list
;
5395 if (tail
== bfd_abs_section_ptr
)
5398 /* Reverse the list: we must avoid placing stubs at the
5399 beginning of the section because the beginning of the text
5400 section may be required for an interrupt vector in bare metal
5402 #define NEXT_SEC PREV_SEC
5404 while (tail
!= NULL
)
5406 /* Pop from tail. */
5407 asection
*item
= tail
;
5408 tail
= PREV_SEC (item
);
5411 NEXT_SEC (item
) = head
;
5415 while (head
!= NULL
)
5419 bfd_vma stub_group_start
= head
->output_offset
;
5420 bfd_vma end_of_next
;
5423 while (NEXT_SEC (curr
) != NULL
)
5425 next
= NEXT_SEC (curr
);
5426 end_of_next
= next
->output_offset
+ next
->size
;
5427 if (end_of_next
- stub_group_start
>= stub_group_size
)
5428 /* End of NEXT is too far from start, so stop. */
5430 /* Add NEXT to the group. */
5434 /* OK, the size from the start to the start of CURR is less
5435 than stub_group_size and thus can be handled by one stub
5436 section. (Or the head section is itself larger than
5437 stub_group_size, in which case we may be toast.)
5438 We should really be keeping track of the total size of
5439 stubs added here, as stubs contribute to the final output
5443 next
= NEXT_SEC (head
);
5444 /* Set up this stub group. */
5445 htab
->stub_group
[head
->id
].link_sec
= curr
;
5447 while (head
!= curr
&& (head
= next
) != NULL
);
5449 /* But wait, there's more! Input sections up to stub_group_size
5450 bytes after the stub section can be handled by it too. */
5451 if (!stubs_always_after_branch
)
5453 stub_group_start
= curr
->output_offset
+ curr
->size
;
5455 while (next
!= NULL
)
5457 end_of_next
= next
->output_offset
+ next
->size
;
5458 if (end_of_next
- stub_group_start
>= stub_group_size
)
5459 /* End of NEXT is too far from stubs, so stop. */
5461 /* Add NEXT to the stub group. */
5463 next
= NEXT_SEC (head
);
5464 htab
->stub_group
[head
->id
].link_sec
= curr
;
5470 while (list
++ != htab
->input_list
+ htab
->top_index
);
5472 free (htab
->input_list
);
5477 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5481 a8_reloc_compare (const void *a
, const void *b
)
5483 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5484 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5486 if (ra
->from
< rb
->from
)
5488 else if (ra
->from
> rb
->from
)
5494 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5495 const char *, char **);
5497 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5498 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5499 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5503 cortex_a8_erratum_scan (bfd
*input_bfd
,
5504 struct bfd_link_info
*info
,
5505 struct a8_erratum_fix
**a8_fixes_p
,
5506 unsigned int *num_a8_fixes_p
,
5507 unsigned int *a8_fix_table_size_p
,
5508 struct a8_erratum_reloc
*a8_relocs
,
5509 unsigned int num_a8_relocs
,
5510 unsigned prev_num_a8_fixes
,
5511 bfd_boolean
*stub_changed_p
)
5514 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5515 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5516 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5517 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5522 for (section
= input_bfd
->sections
;
5524 section
= section
->next
)
5526 bfd_byte
*contents
= NULL
;
5527 struct _arm_elf_section_data
*sec_data
;
5531 if (elf_section_type (section
) != SHT_PROGBITS
5532 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5533 || (section
->flags
& SEC_EXCLUDE
) != 0
5534 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5535 || (section
->output_section
== bfd_abs_section_ptr
))
5538 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5540 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5541 contents
= elf_section_data (section
)->this_hdr
.contents
;
5542 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5545 sec_data
= elf32_arm_section_data (section
);
5547 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5549 unsigned int span_start
= sec_data
->map
[span
].vma
;
5550 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5551 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5553 char span_type
= sec_data
->map
[span
].type
;
5554 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5556 if (span_type
!= 't')
5559 /* Span is entirely within a single 4KB region: skip scanning. */
5560 if (((base_vma
+ span_start
) & ~0xfff)
5561 == ((base_vma
+ span_end
) & ~0xfff))
5564 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5566 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5567 * The branch target is in the same 4KB region as the
5568 first half of the branch.
5569 * The instruction before the branch is a 32-bit
5570 length non-branch instruction. */
5571 for (i
= span_start
; i
< span_end
;)
5573 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5574 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5575 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5577 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5582 /* Load the rest of the insn (in manual-friendly order). */
5583 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5585 /* Encoding T4: B<c>.W. */
5586 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5587 /* Encoding T1: BL<c>.W. */
5588 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5589 /* Encoding T2: BLX<c>.W. */
5590 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5591 /* Encoding T3: B<c>.W (not permitted in IT block). */
5592 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5593 && (insn
& 0x07f00000) != 0x03800000;
5596 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5598 if (((base_vma
+ i
) & 0xfff) == 0xffe
5602 && ! last_was_branch
)
5604 bfd_signed_vma offset
= 0;
5605 bfd_boolean force_target_arm
= FALSE
;
5606 bfd_boolean force_target_thumb
= FALSE
;
5608 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5609 struct a8_erratum_reloc key
, *found
;
5610 bfd_boolean use_plt
= FALSE
;
5612 key
.from
= base_vma
+ i
;
5613 found
= (struct a8_erratum_reloc
*)
5614 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5615 sizeof (struct a8_erratum_reloc
),
5620 char *error_message
= NULL
;
5621 struct elf_link_hash_entry
*entry
;
5623 /* We don't care about the error returned from this
5624 function, only if there is glue or not. */
5625 entry
= find_thumb_glue (info
, found
->sym_name
,
5629 found
->non_a8_stub
= TRUE
;
5631 /* Keep a simpler condition, for the sake of clarity. */
5632 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5633 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5636 if (found
->r_type
== R_ARM_THM_CALL
)
5638 if (found
->branch_type
== ST_BRANCH_TO_ARM
5640 force_target_arm
= TRUE
;
5642 force_target_thumb
= TRUE
;
5646 /* Check if we have an offending branch instruction. */
5648 if (found
&& found
->non_a8_stub
)
5649 /* We've already made a stub for this instruction, e.g.
5650 it's a long branch or a Thumb->ARM stub. Assume that
5651 stub will suffice to work around the A8 erratum (see
5652 setting of always_after_branch above). */
5656 offset
= (insn
& 0x7ff) << 1;
5657 offset
|= (insn
& 0x3f0000) >> 4;
5658 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5659 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5660 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5661 if (offset
& 0x100000)
5662 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5663 stub_type
= arm_stub_a8_veneer_b_cond
;
5665 else if (is_b
|| is_bl
|| is_blx
)
5667 int s
= (insn
& 0x4000000) != 0;
5668 int j1
= (insn
& 0x2000) != 0;
5669 int j2
= (insn
& 0x800) != 0;
5673 offset
= (insn
& 0x7ff) << 1;
5674 offset
|= (insn
& 0x3ff0000) >> 4;
5678 if (offset
& 0x1000000)
5679 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5682 offset
&= ~ ((bfd_signed_vma
) 3);
5684 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5685 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5688 if (stub_type
!= arm_stub_none
)
5690 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5692 /* The original instruction is a BL, but the target is
5693 an ARM instruction. If we were not making a stub,
5694 the BL would have been converted to a BLX. Use the
5695 BLX stub instead in that case. */
5696 if (htab
->use_blx
&& force_target_arm
5697 && stub_type
== arm_stub_a8_veneer_bl
)
5699 stub_type
= arm_stub_a8_veneer_blx
;
5703 /* Conversely, if the original instruction was
5704 BLX but the target is Thumb mode, use the BL
5706 else if (force_target_thumb
5707 && stub_type
== arm_stub_a8_veneer_blx
)
5709 stub_type
= arm_stub_a8_veneer_bl
;
5715 pc_for_insn
&= ~ ((bfd_vma
) 3);
5717 /* If we found a relocation, use the proper destination,
5718 not the offset in the (unrelocated) instruction.
5719 Note this is always done if we switched the stub type
5723 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5725 /* If the stub will use a Thumb-mode branch to a
5726 PLT target, redirect it to the preceding Thumb
5728 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5729 offset
-= PLT_THUMB_STUB_SIZE
;
5731 target
= pc_for_insn
+ offset
;
5733 /* The BLX stub is ARM-mode code. Adjust the offset to
5734 take the different PC value (+8 instead of +4) into
5736 if (stub_type
== arm_stub_a8_veneer_blx
)
5739 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5741 char *stub_name
= NULL
;
5743 if (num_a8_fixes
== a8_fix_table_size
)
5745 a8_fix_table_size
*= 2;
5746 a8_fixes
= (struct a8_erratum_fix
*)
5747 bfd_realloc (a8_fixes
,
5748 sizeof (struct a8_erratum_fix
)
5749 * a8_fix_table_size
);
5752 if (num_a8_fixes
< prev_num_a8_fixes
)
5754 /* If we're doing a subsequent scan,
5755 check if we've found the same fix as
5756 before, and try and reuse the stub
5758 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5759 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5760 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5764 *stub_changed_p
= TRUE
;
5770 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5771 if (stub_name
!= NULL
)
5772 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5775 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5776 a8_fixes
[num_a8_fixes
].section
= section
;
5777 a8_fixes
[num_a8_fixes
].offset
= i
;
5778 a8_fixes
[num_a8_fixes
].target_offset
=
5780 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5781 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5782 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5783 a8_fixes
[num_a8_fixes
].branch_type
=
5784 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5791 i
+= insn_32bit
? 4 : 2;
5792 last_was_32bit
= insn_32bit
;
5793 last_was_branch
= is_32bit_branch
;
5797 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5801 *a8_fixes_p
= a8_fixes
;
5802 *num_a8_fixes_p
= num_a8_fixes
;
5803 *a8_fix_table_size_p
= a8_fix_table_size
;
5808 /* Create or update a stub entry depending on whether the stub can already be
5809 found in HTAB. The stub is identified by:
5810 - its type STUB_TYPE
5811 - its source branch (note that several can share the same stub) whose
5812 section and relocation (if any) are given by SECTION and IRELA
5814 - its target symbol whose input section, hash, name, value and branch type
5815 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5818 If found, the value of the stub's target symbol is updated from SYM_VALUE
5819 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5820 TRUE and the stub entry is initialized.
5822 Returns the stub that was created or updated, or NULL if an error
5825 static struct elf32_arm_stub_hash_entry
*
5826 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5827 enum elf32_arm_stub_type stub_type
, asection
*section
,
5828 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5829 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5830 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5831 bfd_boolean
*new_stub
)
5833 const asection
*id_sec
;
5835 struct elf32_arm_stub_hash_entry
*stub_entry
;
5836 unsigned int r_type
;
5837 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5839 BFD_ASSERT (stub_type
!= arm_stub_none
);
5843 stub_name
= sym_name
;
5847 BFD_ASSERT (section
);
5848 BFD_ASSERT (section
->id
<= htab
->top_id
);
5850 /* Support for grouping stub sections. */
5851 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5853 /* Get the name of this stub. */
5854 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5860 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5862 /* The proper stub has already been created, just update its value. */
5863 if (stub_entry
!= NULL
)
5867 stub_entry
->target_value
= sym_value
;
5871 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5872 if (stub_entry
== NULL
)
5879 stub_entry
->target_value
= sym_value
;
5880 stub_entry
->target_section
= sym_sec
;
5881 stub_entry
->stub_type
= stub_type
;
5882 stub_entry
->h
= hash
;
5883 stub_entry
->branch_type
= branch_type
;
5886 stub_entry
->output_name
= sym_name
;
5889 if (sym_name
== NULL
)
5890 sym_name
= "unnamed";
5891 stub_entry
->output_name
= (char *)
5892 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5893 + strlen (sym_name
));
5894 if (stub_entry
->output_name
== NULL
)
5900 /* For historical reasons, use the existing names for ARM-to-Thumb and
5901 Thumb-to-ARM stubs. */
5902 r_type
= ELF32_R_TYPE (irela
->r_info
);
5903 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5904 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5905 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5906 && branch_type
== ST_BRANCH_TO_ARM
)
5907 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5908 else if ((r_type
== (unsigned int) R_ARM_CALL
5909 || r_type
== (unsigned int) R_ARM_JUMP24
)
5910 && branch_type
== ST_BRANCH_TO_THUMB
)
5911 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5913 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5920 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5921 gateway veneer to transition from non secure to secure state and create them
5924 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5925 defines the conditions that govern Secure Gateway veneer creation for a
5926 given symbol <SYM> as follows:
5927 - it has function type
5928 - it has non local binding
5929 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5930 same type, binding and value as <SYM> (called normal symbol).
5931 An entry function can handle secure state transition itself in which case
5932 its special symbol would have a different value from the normal symbol.
5934 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5935 entry mapping while HTAB gives the name to hash entry mapping.
5936 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5939 The return value gives whether a stub failed to be allocated. */
5942 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5943 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5944 int *cmse_stub_created
)
5946 const struct elf_backend_data
*bed
;
5947 Elf_Internal_Shdr
*symtab_hdr
;
5948 unsigned i
, j
, sym_count
, ext_start
;
5949 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5950 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5951 enum arm_st_branch_type branch_type
;
5952 char *sym_name
, *lsym_name
;
5955 struct elf32_arm_stub_hash_entry
*stub_entry
;
5956 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5958 bed
= get_elf_backend_data (input_bfd
);
5959 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5960 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5961 ext_start
= symtab_hdr
->sh_info
;
5962 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5963 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5965 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5966 if (local_syms
== NULL
)
5967 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5968 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5970 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5974 for (i
= 0; i
< sym_count
; i
++)
5976 cmse_invalid
= FALSE
;
5980 cmse_sym
= &local_syms
[i
];
5981 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5982 symtab_hdr
->sh_link
,
5984 if (!sym_name
|| !CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
5987 /* Special symbol with local binding. */
5988 cmse_invalid
= TRUE
;
5992 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5993 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5994 if (!CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
5997 /* Special symbol has incorrect binding or type. */
5998 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5999 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6000 || cmse_hash
->root
.type
!= STT_FUNC
)
6001 cmse_invalid
= TRUE
;
6006 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6007 "ARMv8-M architecture or later"),
6008 input_bfd
, sym_name
);
6009 is_v8m
= TRUE
; /* Avoid multiple warning. */
6015 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6016 " a global or weak function symbol"),
6017 input_bfd
, sym_name
);
6023 sym_name
+= strlen (CMSE_PREFIX
);
6024 hash
= (struct elf32_arm_link_hash_entry
*)
6025 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6027 /* No associated normal symbol or it is neither global nor weak. */
6029 || (hash
->root
.root
.type
!= bfd_link_hash_defined
6030 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6031 || hash
->root
.type
!= STT_FUNC
)
6033 /* Initialize here to avoid warning about use of possibly
6034 uninitialized variable. */
6039 /* Searching for a normal symbol with local binding. */
6040 for (; j
< ext_start
; j
++)
6043 bfd_elf_string_from_elf_section (input_bfd
,
6044 symtab_hdr
->sh_link
,
6045 local_syms
[j
].st_name
);
6046 if (!strcmp (sym_name
, lsym_name
))
6051 if (hash
|| j
< ext_start
)
6054 (_("%pB: invalid standard symbol `%s'; it must be "
6055 "a global or weak function symbol"),
6056 input_bfd
, sym_name
);
6060 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
6066 sym_value
= hash
->root
.root
.u
.def
.value
;
6067 section
= hash
->root
.root
.u
.def
.section
;
6069 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
6072 (_("%pB: `%s' and its special symbol are in different sections"),
6073 input_bfd
, sym_name
);
6076 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
6077 continue; /* Ignore: could be an entry function starting with SG. */
6079 /* If this section is a link-once section that will be discarded, then
6080 don't create any stubs. */
6081 if (section
->output_section
== NULL
)
6084 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
6088 if (hash
->root
.size
== 0)
6091 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
6097 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6099 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6100 NULL
, NULL
, section
, hash
, sym_name
,
6101 sym_value
, branch_type
, &new_stub
);
6103 if (stub_entry
== NULL
)
6107 BFD_ASSERT (new_stub
);
6108 (*cmse_stub_created
)++;
6112 if (!symtab_hdr
->contents
)
6117 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6118 code entry function, ie can be called from non secure code without using a
6122 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
6124 bfd_byte contents
[4];
6125 uint32_t first_insn
;
6130 /* Defined symbol of function type. */
6131 if (hash
->root
.root
.type
!= bfd_link_hash_defined
6132 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6134 if (hash
->root
.type
!= STT_FUNC
)
6137 /* Read first instruction. */
6138 section
= hash
->root
.root
.u
.def
.section
;
6139 abfd
= section
->owner
;
6140 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
6141 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
6145 first_insn
= bfd_get_32 (abfd
, contents
);
6147 /* Starts by SG instruction. */
6148 return first_insn
== 0xe97fe97f;
6151 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6152 secure gateway veneers (ie. the veneers was not in the input import library)
6153 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6156 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
6158 struct elf32_arm_stub_hash_entry
*stub_entry
;
6159 struct bfd_link_info
*info
;
6161 /* Massage our args to the form they really have. */
6162 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
6163 info
= (struct bfd_link_info
*) gen_info
;
6165 if (info
->out_implib_bfd
)
6168 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
6171 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
6172 _bfd_error_handler (" %s", stub_entry
->output_name
);
6177 /* Set offset of each secure gateway veneers so that its address remain
6178 identical to the one in the input import library referred by
6179 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6180 (present in input import library but absent from the executable being
6181 linked) or if new veneers appeared and there is no output import library
6182 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6183 number of secure gateway veneers found in the input import library.
6185 The function returns whether an error occurred. If no error occurred,
6186 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6187 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6188 veneer observed set for new veneers to be layed out after. */
6191 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
6192 struct elf32_arm_link_hash_table
*htab
,
6193 int *cmse_stub_created
)
6200 asection
*stub_out_sec
;
6201 bfd_boolean ret
= TRUE
;
6202 Elf_Internal_Sym
*intsym
;
6203 const char *out_sec_name
;
6204 bfd_size_type cmse_stub_size
;
6205 asymbol
**sympp
= NULL
, *sym
;
6206 struct elf32_arm_link_hash_entry
*hash
;
6207 const insn_sequence
*cmse_stub_template
;
6208 struct elf32_arm_stub_hash_entry
*stub_entry
;
6209 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
6210 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
6211 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
6213 /* No input secure gateway import library. */
6214 if (!htab
->in_implib_bfd
)
6217 in_implib_bfd
= htab
->in_implib_bfd
;
6218 if (!htab
->cmse_implib
)
6220 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6221 "Gateway import libraries"), in_implib_bfd
);
6225 /* Get symbol table size. */
6226 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
6230 /* Read in the input secure gateway import library's symbol table. */
6231 sympp
= (asymbol
**) bfd_malloc (symsize
);
6235 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
6242 htab
->new_cmse_stub_offset
= 0;
6244 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
6245 &cmse_stub_template
,
6246 &cmse_stub_template_size
);
6248 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
6250 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
6251 if (stub_out_sec
!= NULL
)
6252 cmse_stub_sec_vma
= stub_out_sec
->vma
;
6254 /* Set addresses of veneers mentionned in input secure gateway import
6255 library's symbol table. */
6256 for (i
= 0; i
< symcount
; i
++)
6260 sym_name
= (char *) bfd_asymbol_name (sym
);
6261 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
6263 if (sym
->section
!= bfd_abs_section_ptr
6264 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
6265 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
6266 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
6267 != ST_BRANCH_TO_THUMB
))
6269 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6270 "symbol should be absolute, global and "
6271 "refer to Thumb functions"),
6272 in_implib_bfd
, sym_name
);
6277 veneer_value
= bfd_asymbol_value (sym
);
6278 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
6279 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
6281 hash
= (struct elf32_arm_link_hash_entry
*)
6282 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6284 /* Stub entry should have been created by cmse_scan or the symbol be of
6285 a secure function callable from non secure code. */
6286 if (!stub_entry
&& !hash
)
6288 bfd_boolean new_stub
;
6291 (_("entry function `%s' disappeared from secure code"), sym_name
);
6292 hash
= (struct elf32_arm_link_hash_entry
*)
6293 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
6295 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6296 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
6297 sym_name
, veneer_value
,
6298 ST_BRANCH_TO_THUMB
, &new_stub
);
6299 if (stub_entry
== NULL
)
6303 BFD_ASSERT (new_stub
);
6304 new_cmse_stubs_created
++;
6305 (*cmse_stub_created
)++;
6307 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
6308 stub_entry
->stub_offset
= stub_offset
;
6310 /* Symbol found is not callable from non secure code. */
6311 else if (!stub_entry
)
6313 if (!cmse_entry_fct_p (hash
))
6315 _bfd_error_handler (_("`%s' refers to a non entry function"),
6323 /* Only stubs for SG veneers should have been created. */
6324 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6326 /* Check visibility hasn't changed. */
6327 if (!!(flags
& BSF_GLOBAL
)
6328 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6330 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6333 stub_entry
->stub_offset
= stub_offset
;
6336 /* Size should match that of a SG veneer. */
6337 if (intsym
->st_size
!= cmse_stub_size
)
6339 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6340 in_implib_bfd
, sym_name
);
6344 /* Previous veneer address is before current SG veneer section. */
6345 if (veneer_value
< cmse_stub_sec_vma
)
6347 /* Avoid offset underflow. */
6349 stub_entry
->stub_offset
= 0;
6354 /* Complain if stub offset not a multiple of stub size. */
6355 if (stub_offset
% cmse_stub_size
)
6358 (_("offset of veneer for entry function `%s' not a multiple of "
6359 "its size"), sym_name
);
6366 new_cmse_stubs_created
--;
6367 if (veneer_value
< cmse_stub_array_start
)
6368 cmse_stub_array_start
= veneer_value
;
6369 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6370 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6371 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6374 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6376 BFD_ASSERT (new_cmse_stubs_created
> 0);
6378 (_("new entry function(s) introduced but no output import library "
6380 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6383 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6386 (_("start address of `%s' is different from previous link"),
6396 /* Determine and set the size of the stub section for a final link.
6398 The basic idea here is to examine all the relocations looking for
6399 PC-relative calls to a target that is unreachable with a "bl"
6403 elf32_arm_size_stubs (bfd
*output_bfd
,
6405 struct bfd_link_info
*info
,
6406 bfd_signed_vma group_size
,
6407 asection
* (*add_stub_section
) (const char *, asection
*,
6410 void (*layout_sections_again
) (void))
6412 bfd_boolean ret
= TRUE
;
6413 obj_attribute
*out_attr
;
6414 int cmse_stub_created
= 0;
6415 bfd_size_type stub_group_size
;
6416 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6417 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6418 struct a8_erratum_fix
*a8_fixes
= NULL
;
6419 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6420 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6421 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6426 if (htab
->fix_cortex_a8
)
6428 a8_fixes
= (struct a8_erratum_fix
*)
6429 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6430 a8_relocs
= (struct a8_erratum_reloc
*)
6431 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6434 /* Propagate mach to stub bfd, because it may not have been
6435 finalized when we created stub_bfd. */
6436 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6437 bfd_get_mach (output_bfd
));
6439 /* Stash our params away. */
6440 htab
->stub_bfd
= stub_bfd
;
6441 htab
->add_stub_section
= add_stub_section
;
6442 htab
->layout_sections_again
= layout_sections_again
;
6443 stubs_always_after_branch
= group_size
< 0;
6445 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6446 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6448 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6449 as the first half of a 32-bit branch straddling two 4K pages. This is a
6450 crude way of enforcing that. */
6451 if (htab
->fix_cortex_a8
)
6452 stubs_always_after_branch
= 1;
6455 stub_group_size
= -group_size
;
6457 stub_group_size
= group_size
;
6459 if (stub_group_size
== 1)
6461 /* Default values. */
6462 /* Thumb branch range is +-4MB has to be used as the default
6463 maximum size (a given section can contain both ARM and Thumb
6464 code, so the worst case has to be taken into account).
6466 This value is 24K less than that, which allows for 2025
6467 12-byte stubs. If we exceed that, then we will fail to link.
6468 The user will have to relink with an explicit group size
6470 stub_group_size
= 4170000;
6473 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6475 /* If we're applying the cortex A8 fix, we need to determine the
6476 program header size now, because we cannot change it later --
6477 that could alter section placements. Notice the A8 erratum fix
6478 ends up requiring the section addresses to remain unchanged
6479 modulo the page size. That's something we cannot represent
6480 inside BFD, and we don't want to force the section alignment to
6481 be the page size. */
6482 if (htab
->fix_cortex_a8
)
6483 (*htab
->layout_sections_again
) ();
6488 unsigned int bfd_indx
;
6490 enum elf32_arm_stub_type stub_type
;
6491 bfd_boolean stub_changed
= FALSE
;
6492 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6495 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6497 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6499 Elf_Internal_Shdr
*symtab_hdr
;
6501 Elf_Internal_Sym
*local_syms
= NULL
;
6503 if (!is_arm_elf (input_bfd
))
6505 if ((input_bfd
->flags
& DYNAMIC
) != 0
6506 && (elf_sym_hashes (input_bfd
) == NULL
6507 || (elf_dyn_lib_class (input_bfd
) & DYN_AS_NEEDED
) != 0))
6512 /* We'll need the symbol table in a second. */
6513 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6514 if (symtab_hdr
->sh_info
== 0)
6517 /* Limit scan of symbols to object file whose profile is
6518 Microcontroller to not hinder performance in the general case. */
6519 if (m_profile
&& first_veneer_scan
)
6521 struct elf_link_hash_entry
**sym_hashes
;
6523 sym_hashes
= elf_sym_hashes (input_bfd
);
6524 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6525 &cmse_stub_created
))
6526 goto error_ret_free_local
;
6528 if (cmse_stub_created
!= 0)
6529 stub_changed
= TRUE
;
6532 /* Walk over each section attached to the input bfd. */
6533 for (section
= input_bfd
->sections
;
6535 section
= section
->next
)
6537 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6539 /* If there aren't any relocs, then there's nothing more
6541 if ((section
->flags
& SEC_RELOC
) == 0
6542 || section
->reloc_count
== 0
6543 || (section
->flags
& SEC_CODE
) == 0)
6546 /* If this section is a link-once section that will be
6547 discarded, then don't create any stubs. */
6548 if (section
->output_section
== NULL
6549 || section
->output_section
->owner
!= output_bfd
)
6552 /* Get the relocs. */
6554 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6555 NULL
, info
->keep_memory
);
6556 if (internal_relocs
== NULL
)
6557 goto error_ret_free_local
;
6559 /* Now examine each relocation. */
6560 irela
= internal_relocs
;
6561 irelaend
= irela
+ section
->reloc_count
;
6562 for (; irela
< irelaend
; irela
++)
6564 unsigned int r_type
, r_indx
;
6567 bfd_vma destination
;
6568 struct elf32_arm_link_hash_entry
*hash
;
6569 const char *sym_name
;
6570 unsigned char st_type
;
6571 enum arm_st_branch_type branch_type
;
6572 bfd_boolean created_stub
= FALSE
;
6574 r_type
= ELF32_R_TYPE (irela
->r_info
);
6575 r_indx
= ELF32_R_SYM (irela
->r_info
);
6577 if (r_type
>= (unsigned int) R_ARM_max
)
6579 bfd_set_error (bfd_error_bad_value
);
6580 error_ret_free_internal
:
6581 if (elf_section_data (section
)->relocs
== NULL
)
6582 free (internal_relocs
);
6584 error_ret_free_local
:
6585 if (symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6591 if (r_indx
>= symtab_hdr
->sh_info
)
6592 hash
= elf32_arm_hash_entry
6593 (elf_sym_hashes (input_bfd
)
6594 [r_indx
- symtab_hdr
->sh_info
]);
6596 /* Only look for stubs on branch instructions, or
6597 non-relaxed TLSCALL */
6598 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6599 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6600 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6601 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6602 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6603 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6604 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6605 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6606 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6607 && r_type
== elf32_arm_tls_transition
6608 (info
, r_type
, &hash
->root
)
6609 && ((hash
? hash
->tls_type
6610 : (elf32_arm_local_got_tls_type
6611 (input_bfd
)[r_indx
]))
6612 & GOT_TLS_GDESC
) != 0))
6615 /* Now determine the call target, its name, value,
6622 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6623 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6625 /* A non-relaxed TLS call. The target is the
6626 plt-resident trampoline and nothing to do
6628 BFD_ASSERT (htab
->tls_trampoline
> 0);
6629 sym_sec
= htab
->root
.splt
;
6630 sym_value
= htab
->tls_trampoline
;
6633 branch_type
= ST_BRANCH_TO_ARM
;
6637 /* It's a local symbol. */
6638 Elf_Internal_Sym
*sym
;
6640 if (local_syms
== NULL
)
6643 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6644 if (local_syms
== NULL
)
6646 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6647 symtab_hdr
->sh_info
, 0,
6649 if (local_syms
== NULL
)
6650 goto error_ret_free_internal
;
6653 sym
= local_syms
+ r_indx
;
6654 if (sym
->st_shndx
== SHN_UNDEF
)
6655 sym_sec
= bfd_und_section_ptr
;
6656 else if (sym
->st_shndx
== SHN_ABS
)
6657 sym_sec
= bfd_abs_section_ptr
;
6658 else if (sym
->st_shndx
== SHN_COMMON
)
6659 sym_sec
= bfd_com_section_ptr
;
6662 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6665 /* This is an undefined symbol. It can never
6669 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6670 sym_value
= sym
->st_value
;
6671 destination
= (sym_value
+ irela
->r_addend
6672 + sym_sec
->output_offset
6673 + sym_sec
->output_section
->vma
);
6674 st_type
= ELF_ST_TYPE (sym
->st_info
);
6676 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6678 = bfd_elf_string_from_elf_section (input_bfd
,
6679 symtab_hdr
->sh_link
,
6684 /* It's an external symbol. */
6685 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6686 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6687 hash
= ((struct elf32_arm_link_hash_entry
*)
6688 hash
->root
.root
.u
.i
.link
);
6690 if (hash
->root
.root
.type
== bfd_link_hash_defined
6691 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6693 sym_sec
= hash
->root
.root
.u
.def
.section
;
6694 sym_value
= hash
->root
.root
.u
.def
.value
;
6696 struct elf32_arm_link_hash_table
*globals
=
6697 elf32_arm_hash_table (info
);
6699 /* For a destination in a shared library,
6700 use the PLT stub as target address to
6701 decide whether a branch stub is
6704 && globals
->root
.splt
!= NULL
6706 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6708 sym_sec
= globals
->root
.splt
;
6709 sym_value
= hash
->root
.plt
.offset
;
6710 if (sym_sec
->output_section
!= NULL
)
6711 destination
= (sym_value
6712 + sym_sec
->output_offset
6713 + sym_sec
->output_section
->vma
);
6715 else if (sym_sec
->output_section
!= NULL
)
6716 destination
= (sym_value
+ irela
->r_addend
6717 + sym_sec
->output_offset
6718 + sym_sec
->output_section
->vma
);
6720 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6721 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6723 /* For a shared library, use the PLT stub as
6724 target address to decide whether a long
6725 branch stub is needed.
6726 For absolute code, they cannot be handled. */
6727 struct elf32_arm_link_hash_table
*globals
=
6728 elf32_arm_hash_table (info
);
6731 && globals
->root
.splt
!= NULL
6733 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6735 sym_sec
= globals
->root
.splt
;
6736 sym_value
= hash
->root
.plt
.offset
;
6737 if (sym_sec
->output_section
!= NULL
)
6738 destination
= (sym_value
6739 + sym_sec
->output_offset
6740 + sym_sec
->output_section
->vma
);
6747 bfd_set_error (bfd_error_bad_value
);
6748 goto error_ret_free_internal
;
6750 st_type
= hash
->root
.type
;
6752 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6753 sym_name
= hash
->root
.root
.root
.string
;
6758 bfd_boolean new_stub
;
6759 struct elf32_arm_stub_hash_entry
*stub_entry
;
6761 /* Determine what (if any) linker stub is needed. */
6762 stub_type
= arm_type_of_stub (info
, section
, irela
,
6763 st_type
, &branch_type
,
6764 hash
, destination
, sym_sec
,
6765 input_bfd
, sym_name
);
6766 if (stub_type
== arm_stub_none
)
6769 /* We've either created a stub for this reloc already,
6770 or we are about to. */
6772 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6774 (char *) sym_name
, sym_value
,
6775 branch_type
, &new_stub
);
6777 created_stub
= stub_entry
!= NULL
;
6779 goto error_ret_free_internal
;
6783 stub_changed
= TRUE
;
6787 /* Look for relocations which might trigger Cortex-A8
6789 if (htab
->fix_cortex_a8
6790 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6791 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6792 || r_type
== (unsigned int) R_ARM_THM_CALL
6793 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6795 bfd_vma from
= section
->output_section
->vma
6796 + section
->output_offset
6799 if ((from
& 0xfff) == 0xffe)
6801 /* Found a candidate. Note we haven't checked the
6802 destination is within 4K here: if we do so (and
6803 don't create an entry in a8_relocs) we can't tell
6804 that a branch should have been relocated when
6806 if (num_a8_relocs
== a8_reloc_table_size
)
6808 a8_reloc_table_size
*= 2;
6809 a8_relocs
= (struct a8_erratum_reloc
*)
6810 bfd_realloc (a8_relocs
,
6811 sizeof (struct a8_erratum_reloc
)
6812 * a8_reloc_table_size
);
6815 a8_relocs
[num_a8_relocs
].from
= from
;
6816 a8_relocs
[num_a8_relocs
].destination
= destination
;
6817 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6818 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6819 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6820 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6821 a8_relocs
[num_a8_relocs
].hash
= hash
;
6828 /* We're done with the internal relocs, free them. */
6829 if (elf_section_data (section
)->relocs
== NULL
)
6830 free (internal_relocs
);
6833 if (htab
->fix_cortex_a8
)
6835 /* Sort relocs which might apply to Cortex-A8 erratum. */
6836 qsort (a8_relocs
, num_a8_relocs
,
6837 sizeof (struct a8_erratum_reloc
),
6840 /* Scan for branches which might trigger Cortex-A8 erratum. */
6841 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6842 &num_a8_fixes
, &a8_fix_table_size
,
6843 a8_relocs
, num_a8_relocs
,
6844 prev_num_a8_fixes
, &stub_changed
)
6846 goto error_ret_free_local
;
6849 if (local_syms
!= NULL
6850 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6852 if (!info
->keep_memory
)
6855 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6859 if (first_veneer_scan
6860 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6861 &cmse_stub_created
))
6864 if (prev_num_a8_fixes
!= num_a8_fixes
)
6865 stub_changed
= TRUE
;
6870 /* OK, we've added some stubs. Find out the new size of the
6872 for (stub_sec
= htab
->stub_bfd
->sections
;
6874 stub_sec
= stub_sec
->next
)
6876 /* Ignore non-stub sections. */
6877 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6883 /* Add new SG veneers after those already in the input import
6885 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6888 bfd_vma
*start_offset_p
;
6889 asection
**stub_sec_p
;
6891 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6892 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6893 if (start_offset_p
== NULL
)
6896 BFD_ASSERT (stub_sec_p
!= NULL
);
6897 if (*stub_sec_p
!= NULL
)
6898 (*stub_sec_p
)->size
= *start_offset_p
;
6901 /* Compute stub section size, considering padding. */
6902 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6903 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6907 asection
**stub_sec_p
;
6909 padding
= arm_dedicated_stub_section_padding (stub_type
);
6910 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6911 /* Skip if no stub input section or no stub section padding
6913 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6915 /* Stub section padding required but no dedicated section. */
6916 BFD_ASSERT (stub_sec_p
);
6918 size
= (*stub_sec_p
)->size
;
6919 size
= (size
+ padding
- 1) & ~(padding
- 1);
6920 (*stub_sec_p
)->size
= size
;
6923 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6924 if (htab
->fix_cortex_a8
)
6925 for (i
= 0; i
< num_a8_fixes
; i
++)
6927 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6928 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6930 if (stub_sec
== NULL
)
6934 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6939 /* Ask the linker to do its stuff. */
6940 (*htab
->layout_sections_again
) ();
6941 first_veneer_scan
= FALSE
;
6944 /* Add stubs for Cortex-A8 erratum fixes now. */
6945 if (htab
->fix_cortex_a8
)
6947 for (i
= 0; i
< num_a8_fixes
; i
++)
6949 struct elf32_arm_stub_hash_entry
*stub_entry
;
6950 char *stub_name
= a8_fixes
[i
].stub_name
;
6951 asection
*section
= a8_fixes
[i
].section
;
6952 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6953 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6954 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6955 const insn_sequence
*template_sequence
;
6956 int template_size
, size
= 0;
6958 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6960 if (stub_entry
== NULL
)
6962 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6963 section
->owner
, stub_name
);
6967 stub_entry
->stub_sec
= stub_sec
;
6968 stub_entry
->stub_offset
= (bfd_vma
) -1;
6969 stub_entry
->id_sec
= link_sec
;
6970 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6971 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6972 stub_entry
->target_section
= a8_fixes
[i
].section
;
6973 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6974 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6975 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6977 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6981 stub_entry
->stub_size
= size
;
6982 stub_entry
->stub_template
= template_sequence
;
6983 stub_entry
->stub_template_size
= template_size
;
6986 /* Stash the Cortex-A8 erratum fix array for use later in
6987 elf32_arm_write_section(). */
6988 htab
->a8_erratum_fixes
= a8_fixes
;
6989 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6993 htab
->a8_erratum_fixes
= NULL
;
6994 htab
->num_a8_erratum_fixes
= 0;
6999 /* Build all the stubs associated with the current output file. The
7000 stubs are kept in a hash table attached to the main linker hash
7001 table. We also set up the .plt entries for statically linked PIC
7002 functions here. This function is called via arm_elf_finish in the
7006 elf32_arm_build_stubs (struct bfd_link_info
*info
)
7009 struct bfd_hash_table
*table
;
7010 enum elf32_arm_stub_type stub_type
;
7011 struct elf32_arm_link_hash_table
*htab
;
7013 htab
= elf32_arm_hash_table (info
);
7017 for (stub_sec
= htab
->stub_bfd
->sections
;
7019 stub_sec
= stub_sec
->next
)
7023 /* Ignore non-stub sections. */
7024 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
7027 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7028 must at least be done for stub section requiring padding and for SG
7029 veneers to ensure that a non secure code branching to a removed SG
7030 veneer causes an error. */
7031 size
= stub_sec
->size
;
7032 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
7033 if (stub_sec
->contents
== NULL
&& size
!= 0)
7039 /* Add new SG veneers after those already in the input import library. */
7040 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7042 bfd_vma
*start_offset_p
;
7043 asection
**stub_sec_p
;
7045 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
7046 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
7047 if (start_offset_p
== NULL
)
7050 BFD_ASSERT (stub_sec_p
!= NULL
);
7051 if (*stub_sec_p
!= NULL
)
7052 (*stub_sec_p
)->size
= *start_offset_p
;
7055 /* Build the stubs as directed by the stub hash table. */
7056 table
= &htab
->stub_hash_table
;
7057 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7058 if (htab
->fix_cortex_a8
)
7060 /* Place the cortex a8 stubs last. */
7061 htab
->fix_cortex_a8
= -1;
7062 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7068 /* Locate the Thumb encoded calling stub for NAME. */
7070 static struct elf_link_hash_entry
*
7071 find_thumb_glue (struct bfd_link_info
*link_info
,
7073 char **error_message
)
7076 struct elf_link_hash_entry
*hash
;
7077 struct elf32_arm_link_hash_table
*hash_table
;
7079 /* We need a pointer to the armelf specific hash table. */
7080 hash_table
= elf32_arm_hash_table (link_info
);
7081 if (hash_table
== NULL
)
7084 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7085 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
7087 BFD_ASSERT (tmp_name
);
7089 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
7091 hash
= elf_link_hash_lookup
7092 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7095 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7096 "Thumb", tmp_name
, name
) == -1)
7097 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7104 /* Locate the ARM encoded calling stub for NAME. */
7106 static struct elf_link_hash_entry
*
7107 find_arm_glue (struct bfd_link_info
*link_info
,
7109 char **error_message
)
7112 struct elf_link_hash_entry
*myh
;
7113 struct elf32_arm_link_hash_table
*hash_table
;
7115 /* We need a pointer to the elfarm specific hash table. */
7116 hash_table
= elf32_arm_hash_table (link_info
);
7117 if (hash_table
== NULL
)
7120 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7121 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7122 BFD_ASSERT (tmp_name
);
7124 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7126 myh
= elf_link_hash_lookup
7127 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7130 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7131 "ARM", tmp_name
, name
) == -1)
7132 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7139 /* ARM->Thumb glue (static images):
7143 ldr r12, __func_addr
7146 .word func @ behave as if you saw a ARM_32 reloc.
7153 .word func @ behave as if you saw a ARM_32 reloc.
7155 (relocatable images)
7158 ldr r12, __func_offset
7164 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7165 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
7166 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
7167 static const insn32 a2t3_func_addr_insn
= 0x00000001;
7169 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7170 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
7171 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
7173 #define ARM2THUMB_PIC_GLUE_SIZE 16
7174 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
7175 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
7176 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
7178 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7182 __func_from_thumb: __func_from_thumb:
7184 nop ldr r6, __func_addr
7194 #define THUMB2ARM_GLUE_SIZE 8
7195 static const insn16 t2a1_bx_pc_insn
= 0x4778;
7196 static const insn16 t2a2_noop_insn
= 0x46c0;
7197 static const insn32 t2a3_b_insn
= 0xea000000;
7199 #define VFP11_ERRATUM_VENEER_SIZE 8
7200 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7201 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7203 #define ARM_BX_VENEER_SIZE 12
7204 static const insn32 armbx1_tst_insn
= 0xe3100001;
7205 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
7206 static const insn32 armbx3_bx_insn
= 0xe12fff10;
7208 #ifndef ELFARM_NABI_C_INCLUDED
7210 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
7213 bfd_byte
* contents
;
7217 /* Do not include empty glue sections in the output. */
7220 s
= bfd_get_linker_section (abfd
, name
);
7222 s
->flags
|= SEC_EXCLUDE
;
7227 BFD_ASSERT (abfd
!= NULL
);
7229 s
= bfd_get_linker_section (abfd
, name
);
7230 BFD_ASSERT (s
!= NULL
);
7232 contents
= (bfd_byte
*) bfd_zalloc (abfd
, size
);
7234 BFD_ASSERT (s
->size
== size
);
7235 s
->contents
= contents
;
7239 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
7241 struct elf32_arm_link_hash_table
* globals
;
7243 globals
= elf32_arm_hash_table (info
);
7244 BFD_ASSERT (globals
!= NULL
);
7246 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7247 globals
->arm_glue_size
,
7248 ARM2THUMB_GLUE_SECTION_NAME
);
7250 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7251 globals
->thumb_glue_size
,
7252 THUMB2ARM_GLUE_SECTION_NAME
);
7254 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7255 globals
->vfp11_erratum_glue_size
,
7256 VFP11_ERRATUM_VENEER_SECTION_NAME
);
7258 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7259 globals
->stm32l4xx_erratum_glue_size
,
7260 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7262 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7263 globals
->bx_glue_size
,
7264 ARM_BX_GLUE_SECTION_NAME
);
7269 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7270 returns the symbol identifying the stub. */
7272 static struct elf_link_hash_entry
*
7273 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
7274 struct elf_link_hash_entry
* h
)
7276 const char * name
= h
->root
.root
.string
;
7279 struct elf_link_hash_entry
* myh
;
7280 struct bfd_link_hash_entry
* bh
;
7281 struct elf32_arm_link_hash_table
* globals
;
7285 globals
= elf32_arm_hash_table (link_info
);
7286 BFD_ASSERT (globals
!= NULL
);
7287 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7289 s
= bfd_get_linker_section
7290 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
7292 BFD_ASSERT (s
!= NULL
);
7294 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7295 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7296 BFD_ASSERT (tmp_name
);
7298 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7300 myh
= elf_link_hash_lookup
7301 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7305 /* We've already seen this guy. */
7310 /* The only trick here is using hash_table->arm_glue_size as the value.
7311 Even though the section isn't allocated yet, this is where we will be
7312 putting it. The +1 on the value marks that the stub has not been
7313 output yet - not that it is a Thumb function. */
7315 val
= globals
->arm_glue_size
+ 1;
7316 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7317 tmp_name
, BSF_GLOBAL
, s
, val
,
7318 NULL
, TRUE
, FALSE
, &bh
);
7320 myh
= (struct elf_link_hash_entry
*) bh
;
7321 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7322 myh
->forced_local
= 1;
7326 if (bfd_link_pic (link_info
)
7327 || globals
->root
.is_relocatable_executable
7328 || globals
->pic_veneer
)
7329 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7330 else if (globals
->use_blx
)
7331 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7333 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7336 globals
->arm_glue_size
+= size
;
7341 /* Allocate space for ARMv4 BX veneers. */
7344 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7347 struct elf32_arm_link_hash_table
*globals
;
7349 struct elf_link_hash_entry
*myh
;
7350 struct bfd_link_hash_entry
*bh
;
7353 /* BX PC does not need a veneer. */
7357 globals
= elf32_arm_hash_table (link_info
);
7358 BFD_ASSERT (globals
!= NULL
);
7359 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7361 /* Check if this veneer has already been allocated. */
7362 if (globals
->bx_glue_offset
[reg
])
7365 s
= bfd_get_linker_section
7366 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7368 BFD_ASSERT (s
!= NULL
);
7370 /* Add symbol for veneer. */
7372 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7373 BFD_ASSERT (tmp_name
);
7375 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7377 myh
= elf_link_hash_lookup
7378 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7380 BFD_ASSERT (myh
== NULL
);
7383 val
= globals
->bx_glue_size
;
7384 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7385 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7386 NULL
, TRUE
, FALSE
, &bh
);
7388 myh
= (struct elf_link_hash_entry
*) bh
;
7389 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7390 myh
->forced_local
= 1;
7392 s
->size
+= ARM_BX_VENEER_SIZE
;
7393 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7394 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7398 /* Add an entry to the code/data map for section SEC. */
7401 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7403 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7404 unsigned int newidx
;
7406 if (sec_data
->map
== NULL
)
7408 sec_data
->map
= (elf32_arm_section_map
*)
7409 bfd_malloc (sizeof (elf32_arm_section_map
));
7410 sec_data
->mapcount
= 0;
7411 sec_data
->mapsize
= 1;
7414 newidx
= sec_data
->mapcount
++;
7416 if (sec_data
->mapcount
> sec_data
->mapsize
)
7418 sec_data
->mapsize
*= 2;
7419 sec_data
->map
= (elf32_arm_section_map
*)
7420 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7421 * sizeof (elf32_arm_section_map
));
7426 sec_data
->map
[newidx
].vma
= vma
;
7427 sec_data
->map
[newidx
].type
= type
;
7432 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7433 veneers are handled for now. */
7436 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7437 elf32_vfp11_erratum_list
*branch
,
7439 asection
*branch_sec
,
7440 unsigned int offset
)
7443 struct elf32_arm_link_hash_table
*hash_table
;
7445 struct elf_link_hash_entry
*myh
;
7446 struct bfd_link_hash_entry
*bh
;
7448 struct _arm_elf_section_data
*sec_data
;
7449 elf32_vfp11_erratum_list
*newerr
;
7451 hash_table
= elf32_arm_hash_table (link_info
);
7452 BFD_ASSERT (hash_table
!= NULL
);
7453 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7455 s
= bfd_get_linker_section
7456 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7458 sec_data
= elf32_arm_section_data (s
);
7460 BFD_ASSERT (s
!= NULL
);
7462 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7463 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7464 BFD_ASSERT (tmp_name
);
7466 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7467 hash_table
->num_vfp11_fixes
);
7469 myh
= elf_link_hash_lookup
7470 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7472 BFD_ASSERT (myh
== NULL
);
7475 val
= hash_table
->vfp11_erratum_glue_size
;
7476 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7477 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7478 NULL
, TRUE
, FALSE
, &bh
);
7480 myh
= (struct elf_link_hash_entry
*) bh
;
7481 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7482 myh
->forced_local
= 1;
7484 /* Link veneer back to calling location. */
7485 sec_data
->erratumcount
+= 1;
7486 newerr
= (elf32_vfp11_erratum_list
*)
7487 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7489 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7491 newerr
->u
.v
.branch
= branch
;
7492 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7493 branch
->u
.b
.veneer
= newerr
;
7495 newerr
->next
= sec_data
->erratumlist
;
7496 sec_data
->erratumlist
= newerr
;
7498 /* A symbol for the return from the veneer. */
7499 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7500 hash_table
->num_vfp11_fixes
);
7502 myh
= elf_link_hash_lookup
7503 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7510 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7511 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7513 myh
= (struct elf_link_hash_entry
*) bh
;
7514 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7515 myh
->forced_local
= 1;
7519 /* Generate a mapping symbol for the veneer section, and explicitly add an
7520 entry for that symbol to the code/data map for the section. */
7521 if (hash_table
->vfp11_erratum_glue_size
== 0)
7524 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7525 ever requires this erratum fix. */
7526 _bfd_generic_link_add_one_symbol (link_info
,
7527 hash_table
->bfd_of_glue_owner
, "$a",
7528 BSF_LOCAL
, s
, 0, NULL
,
7531 myh
= (struct elf_link_hash_entry
*) bh
;
7532 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7533 myh
->forced_local
= 1;
7535 /* The elf32_arm_init_maps function only cares about symbols from input
7536 BFDs. We must make a note of this generated mapping symbol
7537 ourselves so that code byteswapping works properly in
7538 elf32_arm_write_section. */
7539 elf32_arm_section_map_add (s
, 'a', 0);
7542 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7543 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7544 hash_table
->num_vfp11_fixes
++;
7546 /* The offset of the veneer. */
7550 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7551 veneers need to be handled because used only in Cortex-M. */
7554 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7555 elf32_stm32l4xx_erratum_list
*branch
,
7557 asection
*branch_sec
,
7558 unsigned int offset
,
7559 bfd_size_type veneer_size
)
7562 struct elf32_arm_link_hash_table
*hash_table
;
7564 struct elf_link_hash_entry
*myh
;
7565 struct bfd_link_hash_entry
*bh
;
7567 struct _arm_elf_section_data
*sec_data
;
7568 elf32_stm32l4xx_erratum_list
*newerr
;
7570 hash_table
= elf32_arm_hash_table (link_info
);
7571 BFD_ASSERT (hash_table
!= NULL
);
7572 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7574 s
= bfd_get_linker_section
7575 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7577 BFD_ASSERT (s
!= NULL
);
7579 sec_data
= elf32_arm_section_data (s
);
7581 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7582 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7583 BFD_ASSERT (tmp_name
);
7585 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7586 hash_table
->num_stm32l4xx_fixes
);
7588 myh
= elf_link_hash_lookup
7589 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7591 BFD_ASSERT (myh
== NULL
);
7594 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7595 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7596 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7597 NULL
, TRUE
, FALSE
, &bh
);
7599 myh
= (struct elf_link_hash_entry
*) bh
;
7600 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7601 myh
->forced_local
= 1;
7603 /* Link veneer back to calling location. */
7604 sec_data
->stm32l4xx_erratumcount
+= 1;
7605 newerr
= (elf32_stm32l4xx_erratum_list
*)
7606 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7608 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7610 newerr
->u
.v
.branch
= branch
;
7611 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7612 branch
->u
.b
.veneer
= newerr
;
7614 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7615 sec_data
->stm32l4xx_erratumlist
= newerr
;
7617 /* A symbol for the return from the veneer. */
7618 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7619 hash_table
->num_stm32l4xx_fixes
);
7621 myh
= elf_link_hash_lookup
7622 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7629 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7630 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7632 myh
= (struct elf_link_hash_entry
*) bh
;
7633 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7634 myh
->forced_local
= 1;
7638 /* Generate a mapping symbol for the veneer section, and explicitly add an
7639 entry for that symbol to the code/data map for the section. */
7640 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7643 /* Creates a THUMB symbol since there is no other choice. */
7644 _bfd_generic_link_add_one_symbol (link_info
,
7645 hash_table
->bfd_of_glue_owner
, "$t",
7646 BSF_LOCAL
, s
, 0, NULL
,
7649 myh
= (struct elf_link_hash_entry
*) bh
;
7650 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7651 myh
->forced_local
= 1;
7653 /* The elf32_arm_init_maps function only cares about symbols from input
7654 BFDs. We must make a note of this generated mapping symbol
7655 ourselves so that code byteswapping works properly in
7656 elf32_arm_write_section. */
7657 elf32_arm_section_map_add (s
, 't', 0);
7660 s
->size
+= veneer_size
;
7661 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7662 hash_table
->num_stm32l4xx_fixes
++;
7664 /* The offset of the veneer. */
7668 #define ARM_GLUE_SECTION_FLAGS \
7669 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7670 | SEC_READONLY | SEC_LINKER_CREATED)
7672 /* Create a fake section for use by the ARM backend of the linker. */
7675 arm_make_glue_section (bfd
* abfd
, const char * name
)
7679 sec
= bfd_get_linker_section (abfd
, name
);
7684 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7687 || !bfd_set_section_alignment (sec
, 2))
7690 /* Set the gc mark to prevent the section from being removed by garbage
7691 collection, despite the fact that no relocs refer to this section. */
7697 /* Set size of .plt entries. This function is called from the
7698 linker scripts in ld/emultempl/{armelf}.em. */
7701 bfd_elf32_arm_use_long_plt (void)
7703 elf32_arm_use_long_plt_entry
= TRUE
;
7706 /* Add the glue sections to ABFD. This function is called from the
7707 linker scripts in ld/emultempl/{armelf}.em. */
7710 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7711 struct bfd_link_info
*info
)
7713 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7714 bfd_boolean dostm32l4xx
= globals
7715 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7716 bfd_boolean addglue
;
7718 /* If we are only performing a partial
7719 link do not bother adding the glue. */
7720 if (bfd_link_relocatable (info
))
7723 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7724 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7725 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7726 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7732 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7735 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7736 ensures they are not marked for deletion by
7737 strip_excluded_output_sections () when veneers are going to be created
7738 later. Not doing so would trigger assert on empty section size in
7739 lang_size_sections_1 (). */
7742 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7744 enum elf32_arm_stub_type stub_type
;
7746 /* If we are only performing a partial
7747 link do not bother adding the glue. */
7748 if (bfd_link_relocatable (info
))
7751 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7754 const char *out_sec_name
;
7756 if (!arm_dedicated_stub_output_section_required (stub_type
))
7759 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7760 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7761 if (out_sec
!= NULL
)
7762 out_sec
->flags
|= SEC_KEEP
;
7766 /* Select a BFD to be used to hold the sections used by the glue code.
7767 This function is called from the linker scripts in ld/emultempl/
7771 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7773 struct elf32_arm_link_hash_table
*globals
;
7775 /* If we are only performing a partial link
7776 do not bother getting a bfd to hold the glue. */
7777 if (bfd_link_relocatable (info
))
7780 /* Make sure we don't attach the glue sections to a dynamic object. */
7781 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7783 globals
= elf32_arm_hash_table (info
);
7784 BFD_ASSERT (globals
!= NULL
);
7786 if (globals
->bfd_of_glue_owner
!= NULL
)
7789 /* Save the bfd for later use. */
7790 globals
->bfd_of_glue_owner
= abfd
;
7796 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7800 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7803 if (globals
->fix_arm1176
)
7805 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7806 globals
->use_blx
= 1;
7810 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7811 globals
->use_blx
= 1;
7816 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7817 struct bfd_link_info
*link_info
)
7819 Elf_Internal_Shdr
*symtab_hdr
;
7820 Elf_Internal_Rela
*internal_relocs
= NULL
;
7821 Elf_Internal_Rela
*irel
, *irelend
;
7822 bfd_byte
*contents
= NULL
;
7825 struct elf32_arm_link_hash_table
*globals
;
7827 /* If we are only performing a partial link do not bother
7828 to construct any glue. */
7829 if (bfd_link_relocatable (link_info
))
7832 /* Here we have a bfd that is to be included on the link. We have a
7833 hook to do reloc rummaging, before section sizes are nailed down. */
7834 globals
= elf32_arm_hash_table (link_info
);
7835 BFD_ASSERT (globals
!= NULL
);
7837 check_use_blx (globals
);
7839 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7841 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7846 /* PR 5398: If we have not decided to include any loadable sections in
7847 the output then we will not have a glue owner bfd. This is OK, it
7848 just means that there is nothing else for us to do here. */
7849 if (globals
->bfd_of_glue_owner
== NULL
)
7852 /* Rummage around all the relocs and map the glue vectors. */
7853 sec
= abfd
->sections
;
7858 for (; sec
!= NULL
; sec
= sec
->next
)
7860 if (sec
->reloc_count
== 0)
7863 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7866 symtab_hdr
= & elf_symtab_hdr (abfd
);
7868 /* Load the relocs. */
7870 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7872 if (internal_relocs
== NULL
)
7875 irelend
= internal_relocs
+ sec
->reloc_count
;
7876 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7879 unsigned long r_index
;
7881 struct elf_link_hash_entry
*h
;
7883 r_type
= ELF32_R_TYPE (irel
->r_info
);
7884 r_index
= ELF32_R_SYM (irel
->r_info
);
7886 /* These are the only relocation types we care about. */
7887 if ( r_type
!= R_ARM_PC24
7888 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7891 /* Get the section contents if we haven't done so already. */
7892 if (contents
== NULL
)
7894 /* Get cached copy if it exists. */
7895 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7896 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7899 /* Go get them off disk. */
7900 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7905 if (r_type
== R_ARM_V4BX
)
7909 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7910 record_arm_bx_glue (link_info
, reg
);
7914 /* If the relocation is not against a symbol it cannot concern us. */
7917 /* We don't care about local symbols. */
7918 if (r_index
< symtab_hdr
->sh_info
)
7921 /* This is an external symbol. */
7922 r_index
-= symtab_hdr
->sh_info
;
7923 h
= (struct elf_link_hash_entry
*)
7924 elf_sym_hashes (abfd
)[r_index
];
7926 /* If the relocation is against a static symbol it must be within
7927 the current section and so cannot be a cross ARM/Thumb relocation. */
7931 /* If the call will go through a PLT entry then we do not need
7933 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7939 /* This one is a call from arm code. We need to look up
7940 the target of the call. If it is a thumb target, we
7942 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7943 == ST_BRANCH_TO_THUMB
)
7944 record_arm_to_thumb_glue (link_info
, h
);
7952 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7956 if (elf_section_data (sec
)->relocs
!= internal_relocs
)
7957 free (internal_relocs
);
7958 internal_relocs
= NULL
;
7964 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7966 if (elf_section_data (sec
)->relocs
!= internal_relocs
)
7967 free (internal_relocs
);
7974 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7977 bfd_elf32_arm_init_maps (bfd
*abfd
)
7979 Elf_Internal_Sym
*isymbuf
;
7980 Elf_Internal_Shdr
*hdr
;
7981 unsigned int i
, localsyms
;
7983 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7984 if (! is_arm_elf (abfd
))
7987 if ((abfd
->flags
& DYNAMIC
) != 0)
7990 hdr
= & elf_symtab_hdr (abfd
);
7991 localsyms
= hdr
->sh_info
;
7993 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7994 should contain the number of local symbols, which should come before any
7995 global symbols. Mapping symbols are always local. */
7996 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7999 /* No internal symbols read? Skip this BFD. */
8000 if (isymbuf
== NULL
)
8003 for (i
= 0; i
< localsyms
; i
++)
8005 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
8006 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
8010 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
8012 name
= bfd_elf_string_from_elf_section (abfd
,
8013 hdr
->sh_link
, isym
->st_name
);
8015 if (bfd_is_arm_special_symbol_name (name
,
8016 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
8017 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
8023 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8024 say what they wanted. */
8027 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8029 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8030 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8032 if (globals
== NULL
)
8035 if (globals
->fix_cortex_a8
== -1)
8037 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8038 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
8039 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
8040 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
8041 globals
->fix_cortex_a8
= 1;
8043 globals
->fix_cortex_a8
= 0;
8049 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8051 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8052 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8054 if (globals
== NULL
)
8056 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8057 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
8059 switch (globals
->vfp11_fix
)
8061 case BFD_ARM_VFP11_FIX_DEFAULT
:
8062 case BFD_ARM_VFP11_FIX_NONE
:
8063 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8067 /* Give a warning, but do as the user requests anyway. */
8068 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8069 "workaround is not necessary for target architecture"), obfd
);
8072 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
8073 /* For earlier architectures, we might need the workaround, but do not
8074 enable it by default. If users is running with broken hardware, they
8075 must enable the erratum fix explicitly. */
8076 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8080 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8082 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8083 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8085 if (globals
== NULL
)
8088 /* We assume only Cortex-M4 may require the fix. */
8089 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
8090 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
8092 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
8093 /* Give a warning, but do as the user requests anyway. */
8095 (_("%pB: warning: selected STM32L4XX erratum "
8096 "workaround is not necessary for target architecture"), obfd
);
8100 enum bfd_arm_vfp11_pipe
8108 /* Return a VFP register number. This is encoded as RX:X for single-precision
8109 registers, or X:RX for double-precision registers, where RX is the group of
8110 four bits in the instruction encoding and X is the single extension bit.
8111 RX and X fields are specified using their lowest (starting) bit. The return
8114 0...31: single-precision registers s0...s31
8115 32...63: double-precision registers d0...d31.
8117 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8118 encounter VFP3 instructions, so we allow the full range for DP registers. */
8121 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
8125 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
8127 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
8130 /* Set bits in *WMASK according to a register number REG as encoded by
8131 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8134 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
8139 *wmask
|= 3 << ((reg
- 32) * 2);
8142 /* Return TRUE if WMASK overwrites anything in REGS. */
8145 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
8149 for (i
= 0; i
< numregs
; i
++)
8151 unsigned int reg
= regs
[i
];
8153 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
8161 if ((wmask
& (3 << (reg
* 2))) != 0)
8168 /* In this function, we're interested in two things: finding input registers
8169 for VFP data-processing instructions, and finding the set of registers which
8170 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8171 hold the written set, so FLDM etc. are easy to deal with (we're only
8172 interested in 32 SP registers or 16 dp registers, due to the VFP version
8173 implemented by the chip in question). DP registers are marked by setting
8174 both SP registers in the write mask). */
8176 static enum bfd_arm_vfp11_pipe
8177 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
8180 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
8181 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
8183 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8186 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8187 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8189 pqrs
= ((insn
& 0x00800000) >> 20)
8190 | ((insn
& 0x00300000) >> 19)
8191 | ((insn
& 0x00000040) >> 6);
8195 case 0: /* fmac[sd]. */
8196 case 1: /* fnmac[sd]. */
8197 case 2: /* fmsc[sd]. */
8198 case 3: /* fnmsc[sd]. */
8200 bfd_arm_vfp11_write_mask (destmask
, fd
);
8202 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8207 case 4: /* fmul[sd]. */
8208 case 5: /* fnmul[sd]. */
8209 case 6: /* fadd[sd]. */
8210 case 7: /* fsub[sd]. */
8214 case 8: /* fdiv[sd]. */
8217 bfd_arm_vfp11_write_mask (destmask
, fd
);
8218 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8223 case 15: /* extended opcode. */
8225 unsigned int extn
= ((insn
>> 15) & 0x1e)
8226 | ((insn
>> 7) & 1);
8230 case 0: /* fcpy[sd]. */
8231 case 1: /* fabs[sd]. */
8232 case 2: /* fneg[sd]. */
8233 case 8: /* fcmp[sd]. */
8234 case 9: /* fcmpe[sd]. */
8235 case 10: /* fcmpz[sd]. */
8236 case 11: /* fcmpez[sd]. */
8237 case 16: /* fuito[sd]. */
8238 case 17: /* fsito[sd]. */
8239 case 24: /* ftoui[sd]. */
8240 case 25: /* ftouiz[sd]. */
8241 case 26: /* ftosi[sd]. */
8242 case 27: /* ftosiz[sd]. */
8243 /* These instructions will not bounce due to underflow. */
8248 case 3: /* fsqrt[sd]. */
8249 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8250 registers to cause the erratum in previous instructions. */
8251 bfd_arm_vfp11_write_mask (destmask
, fd
);
8255 case 15: /* fcvt{ds,sd}. */
8259 bfd_arm_vfp11_write_mask (destmask
, fd
);
8261 /* Only FCVTSD can underflow. */
8262 if ((insn
& 0x100) != 0)
8281 /* Two-register transfer. */
8282 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
8284 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8286 if ((insn
& 0x100000) == 0)
8289 bfd_arm_vfp11_write_mask (destmask
, fm
);
8292 bfd_arm_vfp11_write_mask (destmask
, fm
);
8293 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
8299 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
8301 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8302 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
8306 case 0: /* Two-reg transfer. We should catch these above. */
8309 case 2: /* fldm[sdx]. */
8313 unsigned int i
, offset
= insn
& 0xff;
8318 for (i
= fd
; i
< fd
+ offset
; i
++)
8319 bfd_arm_vfp11_write_mask (destmask
, i
);
8323 case 4: /* fld[sd]. */
8325 bfd_arm_vfp11_write_mask (destmask
, fd
);
8334 /* Single-register transfer. Note L==0. */
8335 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8337 unsigned int opcode
= (insn
>> 21) & 7;
8338 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8342 case 0: /* fmsr/fmdlr. */
8343 case 1: /* fmdhr. */
8344 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8345 destination register. I don't know if this is exactly right,
8346 but it is the conservative choice. */
8347 bfd_arm_vfp11_write_mask (destmask
, fn
);
8361 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8364 /* Look for potentially-troublesome code sequences which might trigger the
8365 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8366 (available from ARM) for details of the erratum. A short version is
8367 described in ld.texinfo. */
8370 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8373 bfd_byte
*contents
= NULL
;
8375 int regs
[3], numregs
= 0;
8376 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8377 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8379 if (globals
== NULL
)
8382 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8383 The states transition as follows:
8385 0 -> 1 (vector) or 0 -> 2 (scalar)
8386 A VFP FMAC-pipeline instruction has been seen. Fill
8387 regs[0]..regs[numregs-1] with its input operands. Remember this
8388 instruction in 'first_fmac'.
8391 Any instruction, except for a VFP instruction which overwrites
8396 A VFP instruction has been seen which overwrites any of regs[*].
8397 We must make a veneer! Reset state to 0 before examining next
8401 If we fail to match anything in state 2, reset to state 0 and reset
8402 the instruction pointer to the instruction after 'first_fmac'.
8404 If the VFP11 vector mode is in use, there must be at least two unrelated
8405 instructions between anti-dependent VFP11 instructions to properly avoid
8406 triggering the erratum, hence the use of the extra state 1. */
8408 /* If we are only performing a partial link do not bother
8409 to construct any glue. */
8410 if (bfd_link_relocatable (link_info
))
8413 /* Skip if this bfd does not correspond to an ELF image. */
8414 if (! is_arm_elf (abfd
))
8417 /* We should have chosen a fix type by the time we get here. */
8418 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8420 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8423 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8424 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8427 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8429 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8430 struct _arm_elf_section_data
*sec_data
;
8432 /* If we don't have executable progbits, we're not interested in this
8433 section. Also skip if section is to be excluded. */
8434 if (elf_section_type (sec
) != SHT_PROGBITS
8435 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8436 || (sec
->flags
& SEC_EXCLUDE
) != 0
8437 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8438 || sec
->output_section
== bfd_abs_section_ptr
8439 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8442 sec_data
= elf32_arm_section_data (sec
);
8444 if (sec_data
->mapcount
== 0)
8447 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8448 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8449 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8452 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8453 elf32_arm_compare_mapping
);
8455 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8457 unsigned int span_start
= sec_data
->map
[span
].vma
;
8458 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8459 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8460 char span_type
= sec_data
->map
[span
].type
;
8462 /* FIXME: Only ARM mode is supported at present. We may need to
8463 support Thumb-2 mode also at some point. */
8464 if (span_type
!= 'a')
8467 for (i
= span_start
; i
< span_end
;)
8469 unsigned int next_i
= i
+ 4;
8470 unsigned int insn
= bfd_big_endian (abfd
)
8471 ? (((unsigned) contents
[i
] << 24)
8472 | (contents
[i
+ 1] << 16)
8473 | (contents
[i
+ 2] << 8)
8475 : (((unsigned) contents
[i
+ 3] << 24)
8476 | (contents
[i
+ 2] << 16)
8477 | (contents
[i
+ 1] << 8)
8479 unsigned int writemask
= 0;
8480 enum bfd_arm_vfp11_pipe vpipe
;
8485 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8487 /* I'm assuming the VFP11 erratum can trigger with denorm
8488 operands on either the FMAC or the DS pipeline. This might
8489 lead to slightly overenthusiastic veneer insertion. */
8490 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8492 state
= use_vector
? 1 : 2;
8494 veneer_of_insn
= insn
;
8500 int other_regs
[3], other_numregs
;
8501 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8504 if (vpipe
!= VFP11_BAD
8505 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8515 int other_regs
[3], other_numregs
;
8516 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8519 if (vpipe
!= VFP11_BAD
8520 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8526 next_i
= first_fmac
+ 4;
8532 abort (); /* Should be unreachable. */
8537 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8538 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8540 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8542 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8547 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8554 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8559 newerr
->next
= sec_data
->erratumlist
;
8560 sec_data
->erratumlist
= newerr
;
8569 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8577 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8583 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8584 after sections have been laid out, using specially-named symbols. */
8587 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8588 struct bfd_link_info
*link_info
)
8591 struct elf32_arm_link_hash_table
*globals
;
8594 if (bfd_link_relocatable (link_info
))
8597 /* Skip if this bfd does not correspond to an ELF image. */
8598 if (! is_arm_elf (abfd
))
8601 globals
= elf32_arm_hash_table (link_info
);
8602 if (globals
== NULL
)
8605 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8606 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8607 BFD_ASSERT (tmp_name
);
8609 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8611 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8612 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8614 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8616 struct elf_link_hash_entry
*myh
;
8619 switch (errnode
->type
)
8621 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8622 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8623 /* Find veneer symbol. */
8624 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8625 errnode
->u
.b
.veneer
->u
.v
.id
);
8627 myh
= elf_link_hash_lookup
8628 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8631 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8632 abfd
, "VFP11", tmp_name
);
8634 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8635 + myh
->root
.u
.def
.section
->output_offset
8636 + myh
->root
.u
.def
.value
;
8638 errnode
->u
.b
.veneer
->vma
= vma
;
8641 case VFP11_ERRATUM_ARM_VENEER
:
8642 case VFP11_ERRATUM_THUMB_VENEER
:
8643 /* Find return location. */
8644 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8647 myh
= elf_link_hash_lookup
8648 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8651 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8652 abfd
, "VFP11", tmp_name
);
8654 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8655 + myh
->root
.u
.def
.section
->output_offset
8656 + myh
->root
.u
.def
.value
;
8658 errnode
->u
.v
.branch
->vma
= vma
;
8670 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8671 return locations after sections have been laid out, using
8672 specially-named symbols. */
8675 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8676 struct bfd_link_info
*link_info
)
8679 struct elf32_arm_link_hash_table
*globals
;
8682 if (bfd_link_relocatable (link_info
))
8685 /* Skip if this bfd does not correspond to an ELF image. */
8686 if (! is_arm_elf (abfd
))
8689 globals
= elf32_arm_hash_table (link_info
);
8690 if (globals
== NULL
)
8693 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8694 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8695 BFD_ASSERT (tmp_name
);
8697 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8699 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8700 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8702 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8704 struct elf_link_hash_entry
*myh
;
8707 switch (errnode
->type
)
8709 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8710 /* Find veneer symbol. */
8711 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8712 errnode
->u
.b
.veneer
->u
.v
.id
);
8714 myh
= elf_link_hash_lookup
8715 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8718 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8719 abfd
, "STM32L4XX", tmp_name
);
8721 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8722 + myh
->root
.u
.def
.section
->output_offset
8723 + myh
->root
.u
.def
.value
;
8725 errnode
->u
.b
.veneer
->vma
= vma
;
8728 case STM32L4XX_ERRATUM_VENEER
:
8729 /* Find return location. */
8730 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8733 myh
= elf_link_hash_lookup
8734 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8737 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8738 abfd
, "STM32L4XX", tmp_name
);
8740 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8741 + myh
->root
.u
.def
.section
->output_offset
8742 + myh
->root
.u
.def
.value
;
8744 errnode
->u
.v
.branch
->vma
= vma
;
8756 static inline bfd_boolean
8757 is_thumb2_ldmia (const insn32 insn
)
8759 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8760 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8761 return (insn
& 0xffd02000) == 0xe8900000;
8764 static inline bfd_boolean
8765 is_thumb2_ldmdb (const insn32 insn
)
8767 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8768 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8769 return (insn
& 0xffd02000) == 0xe9100000;
8772 static inline bfd_boolean
8773 is_thumb2_vldm (const insn32 insn
)
8775 /* A6.5 Extension register load or store instruction
8777 We look for SP 32-bit and DP 64-bit registers.
8778 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8779 <list> is consecutive 64-bit registers
8780 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8781 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8782 <list> is consecutive 32-bit registers
8783 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8784 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8785 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8787 (((insn
& 0xfe100f00) == 0xec100b00) ||
8788 ((insn
& 0xfe100f00) == 0xec100a00))
8789 && /* (IA without !). */
8790 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8791 /* (IA with !), includes VPOP (when reg number is SP). */
8792 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8794 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8797 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8799 - computes the number and the mode of memory accesses
8800 - decides if the replacement should be done:
8801 . replaces only if > 8-word accesses
8802 . or (testing purposes only) replaces all accesses. */
8805 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8806 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8810 /* The field encoding the register list is the same for both LDMIA
8811 and LDMDB encodings. */
8812 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8813 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8814 else if (is_thumb2_vldm (insn
))
8815 nb_words
= (insn
& 0xff);
8817 /* DEFAULT mode accounts for the real bug condition situation,
8818 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8820 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8821 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8824 /* Look for potentially-troublesome code sequences which might trigger
8825 the STM STM32L4XX erratum. */
8828 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8829 struct bfd_link_info
*link_info
)
8832 bfd_byte
*contents
= NULL
;
8833 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8835 if (globals
== NULL
)
8838 /* If we are only performing a partial link do not bother
8839 to construct any glue. */
8840 if (bfd_link_relocatable (link_info
))
8843 /* Skip if this bfd does not correspond to an ELF image. */
8844 if (! is_arm_elf (abfd
))
8847 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8850 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8851 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8854 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8856 unsigned int i
, span
;
8857 struct _arm_elf_section_data
*sec_data
;
8859 /* If we don't have executable progbits, we're not interested in this
8860 section. Also skip if section is to be excluded. */
8861 if (elf_section_type (sec
) != SHT_PROGBITS
8862 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8863 || (sec
->flags
& SEC_EXCLUDE
) != 0
8864 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8865 || sec
->output_section
== bfd_abs_section_ptr
8866 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8869 sec_data
= elf32_arm_section_data (sec
);
8871 if (sec_data
->mapcount
== 0)
8874 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8875 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8876 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8879 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8880 elf32_arm_compare_mapping
);
8882 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8884 unsigned int span_start
= sec_data
->map
[span
].vma
;
8885 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8886 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8887 char span_type
= sec_data
->map
[span
].type
;
8888 int itblock_current_pos
= 0;
8890 /* Only Thumb2 mode need be supported with this CM4 specific
8891 code, we should not encounter any arm mode eg span_type
8893 if (span_type
!= 't')
8896 for (i
= span_start
; i
< span_end
;)
8898 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8899 bfd_boolean insn_32bit
= FALSE
;
8900 bfd_boolean is_ldm
= FALSE
;
8901 bfd_boolean is_vldm
= FALSE
;
8902 bfd_boolean is_not_last_in_it_block
= FALSE
;
8904 /* The first 16-bits of all 32-bit thumb2 instructions start
8905 with opcode[15..13]=0b111 and the encoded op1 can be anything
8906 except opcode[12..11]!=0b00.
8907 See 32-bit Thumb instruction encoding. */
8908 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8911 /* Compute the predicate that tells if the instruction
8912 is concerned by the IT block
8913 - Creates an error if there is a ldm that is not
8914 last in the IT block thus cannot be replaced
8915 - Otherwise we can create a branch at the end of the
8916 IT block, it will be controlled naturally by IT
8917 with the proper pseudo-predicate
8918 - So the only interesting predicate is the one that
8919 tells that we are not on the last item of an IT
8921 if (itblock_current_pos
!= 0)
8922 is_not_last_in_it_block
= !!--itblock_current_pos
;
8926 /* Load the rest of the insn (in manual-friendly order). */
8927 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8928 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8929 is_vldm
= is_thumb2_vldm (insn
);
8931 /* Veneers are created for (v)ldm depending on
8932 option flags and memory accesses conditions; but
8933 if the instruction is not the last instruction of
8934 an IT block, we cannot create a jump there, so we
8936 if ((is_ldm
|| is_vldm
)
8937 && stm32l4xx_need_create_replacing_stub
8938 (insn
, globals
->stm32l4xx_fix
))
8940 if (is_not_last_in_it_block
)
8943 /* xgettext:c-format */
8944 (_("%pB(%pA+%#x): error: multiple load detected"
8945 " in non-last IT block instruction:"
8946 " STM32L4XX veneer cannot be generated; "
8947 "use gcc option -mrestrict-it to generate"
8948 " only one instruction per IT block"),
8953 elf32_stm32l4xx_erratum_list
*newerr
=
8954 (elf32_stm32l4xx_erratum_list
*)
8956 (sizeof (elf32_stm32l4xx_erratum_list
));
8958 elf32_arm_section_data (sec
)
8959 ->stm32l4xx_erratumcount
+= 1;
8960 newerr
->u
.b
.insn
= insn
;
8961 /* We create only thumb branches. */
8963 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8964 record_stm32l4xx_erratum_veneer
8965 (link_info
, newerr
, abfd
, sec
,
8968 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8969 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8971 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8972 sec_data
->stm32l4xx_erratumlist
= newerr
;
8979 IT blocks are only encoded in T1
8980 Encoding T1: IT{x{y{z}}} <firstcond>
8981 1 0 1 1 - 1 1 1 1 - firstcond - mask
8982 if mask = '0000' then see 'related encodings'
8983 We don't deal with UNPREDICTABLE, just ignore these.
8984 There can be no nested IT blocks so an IT block
8985 is naturally a new one for which it is worth
8986 computing its size. */
8987 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
8988 && ((insn
& 0x000f) != 0x0000);
8989 /* If we have a new IT block we compute its size. */
8992 /* Compute the number of instructions controlled
8993 by the IT block, it will be used to decide
8994 whether we are inside an IT block or not. */
8995 unsigned int mask
= insn
& 0x000f;
8996 itblock_current_pos
= 4 - ctz (mask
);
9000 i
+= insn_32bit
? 4 : 2;
9004 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9012 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9018 /* Set target relocation values needed during linking. */
9021 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
9022 struct bfd_link_info
*link_info
,
9023 struct elf32_arm_params
*params
)
9025 struct elf32_arm_link_hash_table
*globals
;
9027 globals
= elf32_arm_hash_table (link_info
);
9028 if (globals
== NULL
)
9031 globals
->target1_is_rel
= params
->target1_is_rel
;
9032 if (globals
->fdpic_p
)
9033 globals
->target2_reloc
= R_ARM_GOT32
;
9034 else if (strcmp (params
->target2_type
, "rel") == 0)
9035 globals
->target2_reloc
= R_ARM_REL32
;
9036 else if (strcmp (params
->target2_type
, "abs") == 0)
9037 globals
->target2_reloc
= R_ARM_ABS32
;
9038 else if (strcmp (params
->target2_type
, "got-rel") == 0)
9039 globals
->target2_reloc
= R_ARM_GOT_PREL
;
9042 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9043 params
->target2_type
);
9045 globals
->fix_v4bx
= params
->fix_v4bx
;
9046 globals
->use_blx
|= params
->use_blx
;
9047 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
9048 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
9049 if (globals
->fdpic_p
)
9050 globals
->pic_veneer
= 1;
9052 globals
->pic_veneer
= params
->pic_veneer
;
9053 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
9054 globals
->fix_arm1176
= params
->fix_arm1176
;
9055 globals
->cmse_implib
= params
->cmse_implib
;
9056 globals
->in_implib_bfd
= params
->in_implib_bfd
;
9058 BFD_ASSERT (is_arm_elf (output_bfd
));
9059 elf_arm_tdata (output_bfd
)->no_enum_size_warning
9060 = params
->no_enum_size_warning
;
9061 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
9062 = params
->no_wchar_size_warning
;
9065 /* Replace the target offset of a Thumb bl or b.w instruction. */
9068 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
9074 BFD_ASSERT ((offset
& 1) == 0);
9076 upper
= bfd_get_16 (abfd
, insn
);
9077 lower
= bfd_get_16 (abfd
, insn
+ 2);
9078 reloc_sign
= (offset
< 0) ? 1 : 0;
9079 upper
= (upper
& ~(bfd_vma
) 0x7ff)
9080 | ((offset
>> 12) & 0x3ff)
9081 | (reloc_sign
<< 10);
9082 lower
= (lower
& ~(bfd_vma
) 0x2fff)
9083 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
9084 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
9085 | ((offset
>> 1) & 0x7ff);
9086 bfd_put_16 (abfd
, upper
, insn
);
9087 bfd_put_16 (abfd
, lower
, insn
+ 2);
9090 /* Thumb code calling an ARM function. */
9093 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
9097 asection
* input_section
,
9098 bfd_byte
* hit_data
,
9101 bfd_signed_vma addend
,
9103 char **error_message
)
9107 long int ret_offset
;
9108 struct elf_link_hash_entry
* myh
;
9109 struct elf32_arm_link_hash_table
* globals
;
9111 myh
= find_thumb_glue (info
, name
, error_message
);
9115 globals
= elf32_arm_hash_table (info
);
9116 BFD_ASSERT (globals
!= NULL
);
9117 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9119 my_offset
= myh
->root
.u
.def
.value
;
9121 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9122 THUMB2ARM_GLUE_SECTION_NAME
);
9124 BFD_ASSERT (s
!= NULL
);
9125 BFD_ASSERT (s
->contents
!= NULL
);
9126 BFD_ASSERT (s
->output_section
!= NULL
);
9128 if ((my_offset
& 0x01) == 0x01)
9131 && sym_sec
->owner
!= NULL
9132 && !INTERWORK_FLAG (sym_sec
->owner
))
9135 (_("%pB(%s): warning: interworking not enabled;"
9136 " first occurrence: %pB: %s call to %s"),
9137 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
9143 myh
->root
.u
.def
.value
= my_offset
;
9145 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
9146 s
->contents
+ my_offset
);
9148 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
9149 s
->contents
+ my_offset
+ 2);
9152 /* Address of destination of the stub. */
9153 ((bfd_signed_vma
) val
)
9155 /* Offset from the start of the current section
9156 to the start of the stubs. */
9158 /* Offset of the start of this stub from the start of the stubs. */
9160 /* Address of the start of the current section. */
9161 + s
->output_section
->vma
)
9162 /* The branch instruction is 4 bytes into the stub. */
9164 /* ARM branches work from the pc of the instruction + 8. */
9167 put_arm_insn (globals
, output_bfd
,
9168 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
9169 s
->contents
+ my_offset
+ 4);
9172 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
9174 /* Now go back and fix up the original BL insn to point to here. */
9176 /* Address of where the stub is located. */
9177 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
9178 /* Address of where the BL is located. */
9179 - (input_section
->output_section
->vma
+ input_section
->output_offset
9181 /* Addend in the relocation. */
9183 /* Biassing for PC-relative addressing. */
9186 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
9191 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9193 static struct elf_link_hash_entry
*
9194 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
9201 char ** error_message
)
9204 long int ret_offset
;
9205 struct elf_link_hash_entry
* myh
;
9206 struct elf32_arm_link_hash_table
* globals
;
9208 myh
= find_arm_glue (info
, name
, error_message
);
9212 globals
= elf32_arm_hash_table (info
);
9213 BFD_ASSERT (globals
!= NULL
);
9214 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9216 my_offset
= myh
->root
.u
.def
.value
;
9218 if ((my_offset
& 0x01) == 0x01)
9221 && sym_sec
->owner
!= NULL
9222 && !INTERWORK_FLAG (sym_sec
->owner
))
9225 (_("%pB(%s): warning: interworking not enabled;"
9226 " first occurrence: %pB: %s call to %s"),
9227 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
9231 myh
->root
.u
.def
.value
= my_offset
;
9233 if (bfd_link_pic (info
)
9234 || globals
->root
.is_relocatable_executable
9235 || globals
->pic_veneer
)
9237 /* For relocatable objects we can't use absolute addresses,
9238 so construct the address from a relative offset. */
9239 /* TODO: If the offset is small it's probably worth
9240 constructing the address with adds. */
9241 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
9242 s
->contents
+ my_offset
);
9243 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
9244 s
->contents
+ my_offset
+ 4);
9245 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
9246 s
->contents
+ my_offset
+ 8);
9247 /* Adjust the offset by 4 for the position of the add,
9248 and 8 for the pipeline offset. */
9249 ret_offset
= (val
- (s
->output_offset
9250 + s
->output_section
->vma
9253 bfd_put_32 (output_bfd
, ret_offset
,
9254 s
->contents
+ my_offset
+ 12);
9256 else if (globals
->use_blx
)
9258 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
9259 s
->contents
+ my_offset
);
9261 /* It's a thumb address. Add the low order bit. */
9262 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
9263 s
->contents
+ my_offset
+ 4);
9267 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
9268 s
->contents
+ my_offset
);
9270 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
9271 s
->contents
+ my_offset
+ 4);
9273 /* It's a thumb address. Add the low order bit. */
9274 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
9275 s
->contents
+ my_offset
+ 8);
9281 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
9286 /* Arm code calling a Thumb function. */
9289 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
9293 asection
* input_section
,
9294 bfd_byte
* hit_data
,
9297 bfd_signed_vma addend
,
9299 char **error_message
)
9301 unsigned long int tmp
;
9304 long int ret_offset
;
9305 struct elf_link_hash_entry
* myh
;
9306 struct elf32_arm_link_hash_table
* globals
;
9308 globals
= elf32_arm_hash_table (info
);
9309 BFD_ASSERT (globals
!= NULL
);
9310 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9312 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9313 ARM2THUMB_GLUE_SECTION_NAME
);
9314 BFD_ASSERT (s
!= NULL
);
9315 BFD_ASSERT (s
->contents
!= NULL
);
9316 BFD_ASSERT (s
->output_section
!= NULL
);
9318 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
9319 sym_sec
, val
, s
, error_message
);
9323 my_offset
= myh
->root
.u
.def
.value
;
9324 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9325 tmp
= tmp
& 0xFF000000;
9327 /* Somehow these are both 4 too far, so subtract 8. */
9328 ret_offset
= (s
->output_offset
9330 + s
->output_section
->vma
9331 - (input_section
->output_offset
9332 + input_section
->output_section
->vma
9336 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9338 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9343 /* Populate Arm stub for an exported Thumb function. */
9346 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9348 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9350 struct elf_link_hash_entry
* myh
;
9351 struct elf32_arm_link_hash_entry
*eh
;
9352 struct elf32_arm_link_hash_table
* globals
;
9355 char *error_message
;
9357 eh
= elf32_arm_hash_entry (h
);
9358 /* Allocate stubs for exported Thumb functions on v4t. */
9359 if (eh
->export_glue
== NULL
)
9362 globals
= elf32_arm_hash_table (info
);
9363 BFD_ASSERT (globals
!= NULL
);
9364 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9366 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9367 ARM2THUMB_GLUE_SECTION_NAME
);
9368 BFD_ASSERT (s
!= NULL
);
9369 BFD_ASSERT (s
->contents
!= NULL
);
9370 BFD_ASSERT (s
->output_section
!= NULL
);
9372 sec
= eh
->export_glue
->root
.u
.def
.section
;
9374 BFD_ASSERT (sec
->output_section
!= NULL
);
9376 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9377 + sec
->output_section
->vma
;
9379 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9380 h
->root
.u
.def
.section
->owner
,
9381 globals
->obfd
, sec
, val
, s
,
9387 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9390 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9395 struct elf32_arm_link_hash_table
*globals
;
9397 globals
= elf32_arm_hash_table (info
);
9398 BFD_ASSERT (globals
!= NULL
);
9399 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9401 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9402 ARM_BX_GLUE_SECTION_NAME
);
9403 BFD_ASSERT (s
!= NULL
);
9404 BFD_ASSERT (s
->contents
!= NULL
);
9405 BFD_ASSERT (s
->output_section
!= NULL
);
9407 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9409 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9411 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9413 p
= s
->contents
+ glue_addr
;
9414 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9415 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9416 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9417 globals
->bx_glue_offset
[reg
] |= 1;
9420 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9423 /* Generate Arm stubs for exported Thumb symbols. */
9425 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9426 struct bfd_link_info
*link_info
)
9428 struct elf32_arm_link_hash_table
* globals
;
9430 if (link_info
== NULL
)
9431 /* Ignore this if we are not called by the ELF backend linker. */
9434 globals
= elf32_arm_hash_table (link_info
);
9435 if (globals
== NULL
)
9438 /* If blx is available then exported Thumb symbols are OK and there is
9440 if (globals
->use_blx
)
9443 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9447 /* Reserve space for COUNT dynamic relocations in relocation selection
9451 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9452 bfd_size_type count
)
9454 struct elf32_arm_link_hash_table
*htab
;
9456 htab
= elf32_arm_hash_table (info
);
9457 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9460 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9463 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9464 dynamic, the relocations should go in SRELOC, otherwise they should
9465 go in the special .rel.iplt section. */
9468 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9469 bfd_size_type count
)
9471 struct elf32_arm_link_hash_table
*htab
;
9473 htab
= elf32_arm_hash_table (info
);
9474 if (!htab
->root
.dynamic_sections_created
)
9475 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9478 BFD_ASSERT (sreloc
!= NULL
);
9479 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9483 /* Add relocation REL to the end of relocation section SRELOC. */
9486 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9487 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9490 struct elf32_arm_link_hash_table
*htab
;
9492 htab
= elf32_arm_hash_table (info
);
9493 if (!htab
->root
.dynamic_sections_created
9494 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9495 sreloc
= htab
->root
.irelplt
;
9498 loc
= sreloc
->contents
;
9499 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9500 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9502 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9505 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9506 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9510 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9511 bfd_boolean is_iplt_entry
,
9512 union gotplt_union
*root_plt
,
9513 struct arm_plt_info
*arm_plt
)
9515 struct elf32_arm_link_hash_table
*htab
;
9519 htab
= elf32_arm_hash_table (info
);
9523 splt
= htab
->root
.iplt
;
9524 sgotplt
= htab
->root
.igotplt
;
9526 /* NaCl uses a special first entry in .iplt too. */
9527 if (htab
->nacl_p
&& splt
->size
== 0)
9528 splt
->size
+= htab
->plt_header_size
;
9530 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9531 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9535 splt
= htab
->root
.splt
;
9536 sgotplt
= htab
->root
.sgotplt
;
9540 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9541 /* For lazy binding, relocations will be put into .rel.plt, in
9542 .rel.got otherwise. */
9543 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9544 if (info
->flags
& DF_BIND_NOW
)
9545 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
9547 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9551 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9552 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9555 /* If this is the first .plt entry, make room for the special
9557 if (splt
->size
== 0)
9558 splt
->size
+= htab
->plt_header_size
;
9560 htab
->next_tls_desc_index
++;
9563 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9564 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9565 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9566 root_plt
->offset
= splt
->size
;
9567 splt
->size
+= htab
->plt_entry_size
;
9569 if (!htab
->symbian_p
)
9571 /* We also need to make an entry in the .got.plt section, which
9572 will be placed in the .got section by the linker script. */
9574 arm_plt
->got_offset
= sgotplt
->size
;
9576 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9578 /* Function descriptor takes 64 bits in GOT. */
9586 arm_movw_immediate (bfd_vma value
)
9588 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9592 arm_movt_immediate (bfd_vma value
)
9594 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9597 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9598 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9599 Otherwise, DYNINDX is the index of the symbol in the dynamic
9600 symbol table and SYM_VALUE is undefined.
9602 ROOT_PLT points to the offset of the PLT entry from the start of its
9603 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9604 bookkeeping information.
9606 Returns FALSE if there was a problem. */
9609 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9610 union gotplt_union
*root_plt
,
9611 struct arm_plt_info
*arm_plt
,
9612 int dynindx
, bfd_vma sym_value
)
9614 struct elf32_arm_link_hash_table
*htab
;
9620 Elf_Internal_Rela rel
;
9621 bfd_vma plt_header_size
;
9622 bfd_vma got_header_size
;
9624 htab
= elf32_arm_hash_table (info
);
9626 /* Pick the appropriate sections and sizes. */
9629 splt
= htab
->root
.iplt
;
9630 sgot
= htab
->root
.igotplt
;
9631 srel
= htab
->root
.irelplt
;
9633 /* There are no reserved entries in .igot.plt, and no special
9634 first entry in .iplt. */
9635 got_header_size
= 0;
9636 plt_header_size
= 0;
9640 splt
= htab
->root
.splt
;
9641 sgot
= htab
->root
.sgotplt
;
9642 srel
= htab
->root
.srelplt
;
9644 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9645 plt_header_size
= htab
->plt_header_size
;
9647 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9649 /* Fill in the entry in the procedure linkage table. */
9650 if (htab
->symbian_p
)
9652 BFD_ASSERT (dynindx
>= 0);
9653 put_arm_insn (htab
, output_bfd
,
9654 elf32_arm_symbian_plt_entry
[0],
9655 splt
->contents
+ root_plt
->offset
);
9656 bfd_put_32 (output_bfd
,
9657 elf32_arm_symbian_plt_entry
[1],
9658 splt
->contents
+ root_plt
->offset
+ 4);
9660 /* Fill in the entry in the .rel.plt section. */
9661 rel
.r_offset
= (splt
->output_section
->vma
9662 + splt
->output_offset
9663 + root_plt
->offset
+ 4);
9664 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9666 /* Get the index in the procedure linkage table which
9667 corresponds to this symbol. This is the index of this symbol
9668 in all the symbols for which we are making plt entries. The
9669 first entry in the procedure linkage table is reserved. */
9670 plt_index
= ((root_plt
->offset
- plt_header_size
)
9671 / htab
->plt_entry_size
);
9675 bfd_vma got_offset
, got_address
, plt_address
;
9676 bfd_vma got_displacement
, initial_got_entry
;
9679 BFD_ASSERT (sgot
!= NULL
);
9681 /* Get the offset into the .(i)got.plt table of the entry that
9682 corresponds to this function. */
9683 got_offset
= (arm_plt
->got_offset
& -2);
9685 /* Get the index in the procedure linkage table which
9686 corresponds to this symbol. This is the index of this symbol
9687 in all the symbols for which we are making plt entries.
9688 After the reserved .got.plt entries, all symbols appear in
9689 the same order as in .plt. */
9691 /* Function descriptor takes 8 bytes. */
9692 plt_index
= (got_offset
- got_header_size
) / 8;
9694 plt_index
= (got_offset
- got_header_size
) / 4;
9696 /* Calculate the address of the GOT entry. */
9697 got_address
= (sgot
->output_section
->vma
9698 + sgot
->output_offset
9701 /* ...and the address of the PLT entry. */
9702 plt_address
= (splt
->output_section
->vma
9703 + splt
->output_offset
9704 + root_plt
->offset
);
9706 ptr
= splt
->contents
+ root_plt
->offset
;
9707 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9712 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9714 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9716 val
|= got_address
- sgot
->output_section
->vma
;
9718 val
|= plt_index
* RELOC_SIZE (htab
);
9719 if (i
== 2 || i
== 5)
9720 bfd_put_32 (output_bfd
, val
, ptr
);
9722 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9725 else if (htab
->vxworks_p
)
9730 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9732 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9736 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9738 val
|= plt_index
* RELOC_SIZE (htab
);
9739 if (i
== 2 || i
== 5)
9740 bfd_put_32 (output_bfd
, val
, ptr
);
9742 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9745 loc
= (htab
->srelplt2
->contents
9746 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9748 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9749 referencing the GOT for this PLT entry. */
9750 rel
.r_offset
= plt_address
+ 8;
9751 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9752 rel
.r_addend
= got_offset
;
9753 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9754 loc
+= RELOC_SIZE (htab
);
9756 /* Create the R_ARM_ABS32 relocation referencing the
9757 beginning of the PLT for this GOT entry. */
9758 rel
.r_offset
= got_address
;
9759 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9761 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9763 else if (htab
->nacl_p
)
9765 /* Calculate the displacement between the PLT slot and the
9766 common tail that's part of the special initial PLT slot. */
9767 int32_t tail_displacement
9768 = ((splt
->output_section
->vma
+ splt
->output_offset
9769 + ARM_NACL_PLT_TAIL_OFFSET
)
9770 - (plt_address
+ htab
->plt_entry_size
+ 4));
9771 BFD_ASSERT ((tail_displacement
& 3) == 0);
9772 tail_displacement
>>= 2;
9774 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9775 || (-tail_displacement
& 0xff000000) == 0);
9777 /* Calculate the displacement between the PLT slot and the entry
9778 in the GOT. The offset accounts for the value produced by
9779 adding to pc in the penultimate instruction of the PLT stub. */
9780 got_displacement
= (got_address
9781 - (plt_address
+ htab
->plt_entry_size
));
9783 /* NaCl does not support interworking at all. */
9784 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9786 put_arm_insn (htab
, output_bfd
,
9787 elf32_arm_nacl_plt_entry
[0]
9788 | arm_movw_immediate (got_displacement
),
9790 put_arm_insn (htab
, output_bfd
,
9791 elf32_arm_nacl_plt_entry
[1]
9792 | arm_movt_immediate (got_displacement
),
9794 put_arm_insn (htab
, output_bfd
,
9795 elf32_arm_nacl_plt_entry
[2],
9797 put_arm_insn (htab
, output_bfd
,
9798 elf32_arm_nacl_plt_entry
[3]
9799 | (tail_displacement
& 0x00ffffff),
9802 else if (htab
->fdpic_p
)
9804 const bfd_vma
*plt_entry
= using_thumb_only(htab
)
9805 ? elf32_arm_fdpic_thumb_plt_entry
9806 : elf32_arm_fdpic_plt_entry
;
9808 /* Fill-up Thumb stub if needed. */
9809 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9811 put_thumb_insn (htab
, output_bfd
,
9812 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9813 put_thumb_insn (htab
, output_bfd
,
9814 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9816 /* As we are using 32 bit instructions even for the Thumb
9817 version, we have to use 'put_arm_insn' instead of
9818 'put_thumb_insn'. */
9819 put_arm_insn(htab
, output_bfd
, plt_entry
[0], ptr
+ 0);
9820 put_arm_insn(htab
, output_bfd
, plt_entry
[1], ptr
+ 4);
9821 put_arm_insn(htab
, output_bfd
, plt_entry
[2], ptr
+ 8);
9822 put_arm_insn(htab
, output_bfd
, plt_entry
[3], ptr
+ 12);
9823 bfd_put_32 (output_bfd
, got_offset
, ptr
+ 16);
9825 if (!(info
->flags
& DF_BIND_NOW
))
9827 /* funcdesc_value_reloc_offset. */
9828 bfd_put_32 (output_bfd
,
9829 htab
->root
.srelplt
->reloc_count
* RELOC_SIZE (htab
),
9831 put_arm_insn(htab
, output_bfd
, plt_entry
[6], ptr
+ 24);
9832 put_arm_insn(htab
, output_bfd
, plt_entry
[7], ptr
+ 28);
9833 put_arm_insn(htab
, output_bfd
, plt_entry
[8], ptr
+ 32);
9834 put_arm_insn(htab
, output_bfd
, plt_entry
[9], ptr
+ 36);
9837 else if (using_thumb_only (htab
))
9839 /* PR ld/16017: Generate thumb only PLT entries. */
9840 if (!using_thumb2 (htab
))
9842 /* FIXME: We ought to be able to generate thumb-1 PLT
9844 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9849 /* Calculate the displacement between the PLT slot and the entry in
9850 the GOT. The 12-byte offset accounts for the value produced by
9851 adding to pc in the 3rd instruction of the PLT stub. */
9852 got_displacement
= got_address
- (plt_address
+ 12);
9854 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9855 instead of 'put_thumb_insn'. */
9856 put_arm_insn (htab
, output_bfd
,
9857 elf32_thumb2_plt_entry
[0]
9858 | ((got_displacement
& 0x000000ff) << 16)
9859 | ((got_displacement
& 0x00000700) << 20)
9860 | ((got_displacement
& 0x00000800) >> 1)
9861 | ((got_displacement
& 0x0000f000) >> 12),
9863 put_arm_insn (htab
, output_bfd
,
9864 elf32_thumb2_plt_entry
[1]
9865 | ((got_displacement
& 0x00ff0000) )
9866 | ((got_displacement
& 0x07000000) << 4)
9867 | ((got_displacement
& 0x08000000) >> 17)
9868 | ((got_displacement
& 0xf0000000) >> 28),
9870 put_arm_insn (htab
, output_bfd
,
9871 elf32_thumb2_plt_entry
[2],
9873 put_arm_insn (htab
, output_bfd
,
9874 elf32_thumb2_plt_entry
[3],
9879 /* Calculate the displacement between the PLT slot and the
9880 entry in the GOT. The eight-byte offset accounts for the
9881 value produced by adding to pc in the first instruction
9883 got_displacement
= got_address
- (plt_address
+ 8);
9885 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9887 put_thumb_insn (htab
, output_bfd
,
9888 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9889 put_thumb_insn (htab
, output_bfd
,
9890 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9893 if (!elf32_arm_use_long_plt_entry
)
9895 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9897 put_arm_insn (htab
, output_bfd
,
9898 elf32_arm_plt_entry_short
[0]
9899 | ((got_displacement
& 0x0ff00000) >> 20),
9901 put_arm_insn (htab
, output_bfd
,
9902 elf32_arm_plt_entry_short
[1]
9903 | ((got_displacement
& 0x000ff000) >> 12),
9905 put_arm_insn (htab
, output_bfd
,
9906 elf32_arm_plt_entry_short
[2]
9907 | (got_displacement
& 0x00000fff),
9909 #ifdef FOUR_WORD_PLT
9910 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9915 put_arm_insn (htab
, output_bfd
,
9916 elf32_arm_plt_entry_long
[0]
9917 | ((got_displacement
& 0xf0000000) >> 28),
9919 put_arm_insn (htab
, output_bfd
,
9920 elf32_arm_plt_entry_long
[1]
9921 | ((got_displacement
& 0x0ff00000) >> 20),
9923 put_arm_insn (htab
, output_bfd
,
9924 elf32_arm_plt_entry_long
[2]
9925 | ((got_displacement
& 0x000ff000) >> 12),
9927 put_arm_insn (htab
, output_bfd
,
9928 elf32_arm_plt_entry_long
[3]
9929 | (got_displacement
& 0x00000fff),
9934 /* Fill in the entry in the .rel(a).(i)plt section. */
9935 rel
.r_offset
= got_address
;
9939 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9940 The dynamic linker or static executable then calls SYM_VALUE
9941 to determine the correct run-time value of the .igot.plt entry. */
9942 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9943 initial_got_entry
= sym_value
;
9947 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9948 used by PLT entry. */
9951 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
9952 initial_got_entry
= 0;
9956 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9957 initial_got_entry
= (splt
->output_section
->vma
9958 + splt
->output_offset
);
9961 When thumb only we need to set the LSB for any address that
9962 will be used with an interworking branch instruction. */
9963 if (using_thumb_only (htab
))
9964 initial_got_entry
|= 1;
9968 /* Fill in the entry in the global offset table. */
9969 bfd_put_32 (output_bfd
, initial_got_entry
,
9970 sgot
->contents
+ got_offset
);
9972 if (htab
->fdpic_p
&& !(info
->flags
& DF_BIND_NOW
))
9974 /* Setup initial funcdesc value. */
9975 /* FIXME: we don't support lazy binding because there is a
9976 race condition between both words getting written and
9977 some other thread attempting to read them. The ARM
9978 architecture does not have an atomic 64 bit load/store
9979 instruction that could be used to prevent it; it is
9980 recommended that threaded FDPIC applications run with the
9981 LD_BIND_NOW environment variable set. */
9982 bfd_put_32(output_bfd
, plt_address
+ 0x18,
9983 sgot
->contents
+ got_offset
);
9984 bfd_put_32(output_bfd
, -1 /*TODO*/,
9985 sgot
->contents
+ got_offset
+ 4);
9990 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9995 /* For FDPIC we put PLT relocationss into .rel.got when not
9996 lazy binding otherwise we put them in .rel.plt. For now,
9997 we don't support lazy binding so put it in .rel.got. */
9998 if (info
->flags
& DF_BIND_NOW
)
9999 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelgot
, &rel
);
10001 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelplt
, &rel
);
10005 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
10006 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
10013 /* Some relocations map to different relocations depending on the
10014 target. Return the real relocation. */
10017 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
10022 case R_ARM_TARGET1
:
10023 if (globals
->target1_is_rel
)
10024 return R_ARM_REL32
;
10026 return R_ARM_ABS32
;
10028 case R_ARM_TARGET2
:
10029 return globals
->target2_reloc
;
10036 /* Return the base VMA address which should be subtracted from real addresses
10037 when resolving @dtpoff relocation.
10038 This is PT_TLS segment p_vaddr. */
10041 dtpoff_base (struct bfd_link_info
*info
)
10043 /* If tls_sec is NULL, we should have signalled an error already. */
10044 if (elf_hash_table (info
)->tls_sec
== NULL
)
10046 return elf_hash_table (info
)->tls_sec
->vma
;
10049 /* Return the relocation value for @tpoff relocation
10050 if STT_TLS virtual address is ADDRESS. */
10053 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
10055 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10058 /* If tls_sec is NULL, we should have signalled an error already. */
10059 if (htab
->tls_sec
== NULL
)
10061 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
10062 return address
- htab
->tls_sec
->vma
+ base
;
10065 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10066 VALUE is the relocation value. */
10068 static bfd_reloc_status_type
10069 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
10072 return bfd_reloc_overflow
;
10074 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
10075 bfd_put_32 (abfd
, value
, data
);
10076 return bfd_reloc_ok
;
10079 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10080 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10081 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10083 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10084 is to then call final_link_relocate. Return other values in the
10087 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10088 the pre-relaxed code. It would be nice if the relocs were updated
10089 to match the optimization. */
10091 static bfd_reloc_status_type
10092 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
10093 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
10094 Elf_Internal_Rela
*rel
, unsigned long is_local
)
10096 unsigned long insn
;
10098 switch (ELF32_R_TYPE (rel
->r_info
))
10101 return bfd_reloc_notsupported
;
10103 case R_ARM_TLS_GOTDESC
:
10108 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10110 insn
-= 5; /* THUMB */
10112 insn
-= 8; /* ARM */
10114 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10115 return bfd_reloc_continue
;
10117 case R_ARM_THM_TLS_DESCSEQ
:
10119 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
10120 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
10124 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10126 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10130 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10133 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
10135 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
10139 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10142 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
10143 contents
+ rel
->r_offset
);
10147 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10148 /* It's a 32 bit instruction, fetch the rest of it for
10149 error generation. */
10150 insn
= (insn
<< 16)
10151 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
10153 /* xgettext:c-format */
10154 (_("%pB(%pA+%#" PRIx64
"): "
10155 "unexpected %s instruction '%#lx' in TLS trampoline"),
10156 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10158 return bfd_reloc_notsupported
;
10162 case R_ARM_TLS_DESCSEQ
:
10164 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10165 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10169 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
10170 contents
+ rel
->r_offset
);
10172 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10176 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10179 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
10180 contents
+ rel
->r_offset
);
10182 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
10186 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10189 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
10190 contents
+ rel
->r_offset
);
10195 /* xgettext:c-format */
10196 (_("%pB(%pA+%#" PRIx64
"): "
10197 "unexpected %s instruction '%#lx' in TLS trampoline"),
10198 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10200 return bfd_reloc_notsupported
;
10204 case R_ARM_TLS_CALL
:
10205 /* GD->IE relaxation, turn the instruction into 'nop' or
10206 'ldr r0, [pc,r0]' */
10207 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
10208 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10211 case R_ARM_THM_TLS_CALL
:
10212 /* GD->IE relaxation. */
10214 /* add r0,pc; ldr r0, [r0] */
10216 else if (using_thumb2 (globals
))
10223 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
10224 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
10227 return bfd_reloc_ok
;
10230 /* For a given value of n, calculate the value of G_n as required to
10231 deal with group relocations. We return it in the form of an
10232 encoded constant-and-rotation, together with the final residual. If n is
10233 specified as less than zero, then final_residual is filled with the
10234 input value and no further action is performed. */
10237 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
10241 bfd_vma encoded_g_n
= 0;
10242 bfd_vma residual
= value
; /* Also known as Y_n. */
10244 for (current_n
= 0; current_n
<= n
; current_n
++)
10248 /* Calculate which part of the value to mask. */
10255 /* Determine the most significant bit in the residual and
10256 align the resulting value to a 2-bit boundary. */
10257 for (msb
= 30; msb
>= 0; msb
-= 2)
10258 if (residual
& (3 << msb
))
10261 /* The desired shift is now (msb - 6), or zero, whichever
10268 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10269 g_n
= residual
& (0xff << shift
);
10270 encoded_g_n
= (g_n
>> shift
)
10271 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
10273 /* Calculate the residual for the next time around. */
10277 *final_residual
= residual
;
10279 return encoded_g_n
;
10282 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10283 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10286 identify_add_or_sub (bfd_vma insn
)
10288 int opcode
= insn
& 0x1e00000;
10290 if (opcode
== 1 << 23) /* ADD */
10293 if (opcode
== 1 << 22) /* SUB */
10299 /* Perform a relocation as part of a final link. */
10301 static bfd_reloc_status_type
10302 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
10305 asection
* input_section
,
10306 bfd_byte
* contents
,
10307 Elf_Internal_Rela
* rel
,
10309 struct bfd_link_info
* info
,
10310 asection
* sym_sec
,
10311 const char * sym_name
,
10312 unsigned char st_type
,
10313 enum arm_st_branch_type branch_type
,
10314 struct elf_link_hash_entry
* h
,
10315 bfd_boolean
* unresolved_reloc_p
,
10316 char ** error_message
)
10318 unsigned long r_type
= howto
->type
;
10319 unsigned long r_symndx
;
10320 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
10321 bfd_vma
* local_got_offsets
;
10322 bfd_vma
* local_tlsdesc_gotents
;
10325 asection
* sreloc
= NULL
;
10326 asection
* srelgot
;
10328 bfd_signed_vma signed_addend
;
10329 unsigned char dynreloc_st_type
;
10330 bfd_vma dynreloc_value
;
10331 struct elf32_arm_link_hash_table
* globals
;
10332 struct elf32_arm_link_hash_entry
*eh
;
10333 union gotplt_union
*root_plt
;
10334 struct arm_plt_info
*arm_plt
;
10335 bfd_vma plt_offset
;
10336 bfd_vma gotplt_offset
;
10337 bfd_boolean has_iplt_entry
;
10338 bfd_boolean resolved_to_zero
;
10340 globals
= elf32_arm_hash_table (info
);
10341 if (globals
== NULL
)
10342 return bfd_reloc_notsupported
;
10344 BFD_ASSERT (is_arm_elf (input_bfd
));
10345 BFD_ASSERT (howto
!= NULL
);
10347 /* Some relocation types map to different relocations depending on the
10348 target. We pick the right one here. */
10349 r_type
= arm_real_reloc_type (globals
, r_type
);
10351 /* It is possible to have linker relaxations on some TLS access
10352 models. Update our information here. */
10353 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
10355 if (r_type
!= howto
->type
)
10356 howto
= elf32_arm_howto_from_type (r_type
);
10358 eh
= (struct elf32_arm_link_hash_entry
*) h
;
10359 sgot
= globals
->root
.sgot
;
10360 local_got_offsets
= elf_local_got_offsets (input_bfd
);
10361 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
10363 if (globals
->root
.dynamic_sections_created
)
10364 srelgot
= globals
->root
.srelgot
;
10368 r_symndx
= ELF32_R_SYM (rel
->r_info
);
10370 if (globals
->use_rel
)
10372 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
10374 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10376 signed_addend
= -1;
10377 signed_addend
&= ~ howto
->src_mask
;
10378 signed_addend
|= addend
;
10381 signed_addend
= addend
;
10384 addend
= signed_addend
= rel
->r_addend
;
10386 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10387 are resolving a function call relocation. */
10388 if (using_thumb_only (globals
)
10389 && (r_type
== R_ARM_THM_CALL
10390 || r_type
== R_ARM_THM_JUMP24
)
10391 && branch_type
== ST_BRANCH_TO_ARM
)
10392 branch_type
= ST_BRANCH_TO_THUMB
;
10394 /* Record the symbol information that should be used in dynamic
10396 dynreloc_st_type
= st_type
;
10397 dynreloc_value
= value
;
10398 if (branch_type
== ST_BRANCH_TO_THUMB
)
10399 dynreloc_value
|= 1;
10401 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10402 VALUE appropriately for relocations that we resolve at link time. */
10403 has_iplt_entry
= FALSE
;
10404 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
10406 && root_plt
->offset
!= (bfd_vma
) -1)
10408 plt_offset
= root_plt
->offset
;
10409 gotplt_offset
= arm_plt
->got_offset
;
10411 if (h
== NULL
|| eh
->is_iplt
)
10413 has_iplt_entry
= TRUE
;
10414 splt
= globals
->root
.iplt
;
10416 /* Populate .iplt entries here, because not all of them will
10417 be seen by finish_dynamic_symbol. The lower bit is set if
10418 we have already populated the entry. */
10419 if (plt_offset
& 1)
10423 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10424 -1, dynreloc_value
))
10425 root_plt
->offset
|= 1;
10427 return bfd_reloc_notsupported
;
10430 /* Static relocations always resolve to the .iplt entry. */
10431 st_type
= STT_FUNC
;
10432 value
= (splt
->output_section
->vma
10433 + splt
->output_offset
10435 branch_type
= ST_BRANCH_TO_ARM
;
10437 /* If there are non-call relocations that resolve to the .iplt
10438 entry, then all dynamic ones must too. */
10439 if (arm_plt
->noncall_refcount
!= 0)
10441 dynreloc_st_type
= st_type
;
10442 dynreloc_value
= value
;
10446 /* We populate the .plt entry in finish_dynamic_symbol. */
10447 splt
= globals
->root
.splt
;
10452 plt_offset
= (bfd_vma
) -1;
10453 gotplt_offset
= (bfd_vma
) -1;
10456 resolved_to_zero
= (h
!= NULL
10457 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10462 /* We don't need to find a value for this symbol. It's just a
10464 *unresolved_reloc_p
= FALSE
;
10465 return bfd_reloc_ok
;
10468 if (!globals
->vxworks_p
)
10469 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10470 /* Fall through. */
10474 case R_ARM_ABS32_NOI
:
10476 case R_ARM_REL32_NOI
:
10482 /* Handle relocations which should use the PLT entry. ABS32/REL32
10483 will use the symbol's value, which may point to a PLT entry, but we
10484 don't need to handle that here. If we created a PLT entry, all
10485 branches in this object should go to it, except if the PLT is too
10486 far away, in which case a long branch stub should be inserted. */
10487 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10488 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10489 && r_type
!= R_ARM_CALL
10490 && r_type
!= R_ARM_JUMP24
10491 && r_type
!= R_ARM_PLT32
)
10492 && plt_offset
!= (bfd_vma
) -1)
10494 /* If we've created a .plt section, and assigned a PLT entry
10495 to this function, it must either be a STT_GNU_IFUNC reference
10496 or not be known to bind locally. In other cases, we should
10497 have cleared the PLT entry by now. */
10498 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10500 value
= (splt
->output_section
->vma
10501 + splt
->output_offset
10503 *unresolved_reloc_p
= FALSE
;
10504 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10505 contents
, rel
->r_offset
, value
,
10509 /* When generating a shared object or relocatable executable, these
10510 relocations are copied into the output file to be resolved at
10512 if ((bfd_link_pic (info
)
10513 || globals
->root
.is_relocatable_executable
10514 || globals
->fdpic_p
)
10515 && (input_section
->flags
& SEC_ALLOC
)
10516 && !(globals
->vxworks_p
10517 && strcmp (input_section
->output_section
->name
,
10519 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10520 || !SYMBOL_CALLS_LOCAL (info
, h
))
10521 && !(input_bfd
== globals
->stub_bfd
10522 && strstr (input_section
->name
, STUB_SUFFIX
))
10524 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10525 && !resolved_to_zero
)
10526 || h
->root
.type
!= bfd_link_hash_undefweak
)
10527 && r_type
!= R_ARM_PC24
10528 && r_type
!= R_ARM_CALL
10529 && r_type
!= R_ARM_JUMP24
10530 && r_type
!= R_ARM_PREL31
10531 && r_type
!= R_ARM_PLT32
)
10533 Elf_Internal_Rela outrel
;
10534 bfd_boolean skip
, relocate
;
10537 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10538 && !h
->def_regular
)
10540 char *v
= _("shared object");
10542 if (bfd_link_executable (info
))
10543 v
= _("PIE executable");
10546 (_("%pB: relocation %s against external or undefined symbol `%s'"
10547 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10548 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10549 return bfd_reloc_notsupported
;
10552 *unresolved_reloc_p
= FALSE
;
10554 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10556 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10557 ! globals
->use_rel
);
10559 if (sreloc
== NULL
)
10560 return bfd_reloc_notsupported
;
10566 outrel
.r_addend
= addend
;
10568 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10570 if (outrel
.r_offset
== (bfd_vma
) -1)
10572 else if (outrel
.r_offset
== (bfd_vma
) -2)
10573 skip
= TRUE
, relocate
= TRUE
;
10574 outrel
.r_offset
+= (input_section
->output_section
->vma
10575 + input_section
->output_offset
);
10578 memset (&outrel
, 0, sizeof outrel
);
10580 && h
->dynindx
!= -1
10581 && (!bfd_link_pic (info
)
10582 || !(bfd_link_pie (info
)
10583 || SYMBOLIC_BIND (info
, h
))
10584 || !h
->def_regular
))
10585 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10590 /* This symbol is local, or marked to become local. */
10591 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
10592 || (globals
->fdpic_p
&& !bfd_link_pic(info
)));
10593 if (globals
->symbian_p
)
10597 /* On Symbian OS, the data segment and text segement
10598 can be relocated independently. Therefore, we
10599 must indicate the segment to which this
10600 relocation is relative. The BPABI allows us to
10601 use any symbol in the right segment; we just use
10602 the section symbol as it is convenient. (We
10603 cannot use the symbol given by "h" directly as it
10604 will not appear in the dynamic symbol table.)
10606 Note that the dynamic linker ignores the section
10607 symbol value, so we don't subtract osec->vma
10608 from the emitted reloc addend. */
10610 osec
= sym_sec
->output_section
;
10612 osec
= input_section
->output_section
;
10613 symbol
= elf_section_data (osec
)->dynindx
;
10616 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10618 if ((osec
->flags
& SEC_READONLY
) == 0
10619 && htab
->data_index_section
!= NULL
)
10620 osec
= htab
->data_index_section
;
10622 osec
= htab
->text_index_section
;
10623 symbol
= elf_section_data (osec
)->dynindx
;
10625 BFD_ASSERT (symbol
!= 0);
10628 /* On SVR4-ish systems, the dynamic loader cannot
10629 relocate the text and data segments independently,
10630 so the symbol does not matter. */
10632 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10633 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10634 to the .iplt entry. Instead, every non-call reference
10635 must use an R_ARM_IRELATIVE relocation to obtain the
10636 correct run-time address. */
10637 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10638 else if (globals
->fdpic_p
&& !bfd_link_pic(info
))
10641 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10642 if (globals
->use_rel
)
10645 outrel
.r_addend
+= dynreloc_value
;
10649 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
10651 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10653 /* If this reloc is against an external symbol, we do not want to
10654 fiddle with the addend. Otherwise, we need to include the symbol
10655 value so that it becomes an addend for the dynamic reloc. */
10657 return bfd_reloc_ok
;
10659 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10660 contents
, rel
->r_offset
,
10661 dynreloc_value
, (bfd_vma
) 0);
10663 else switch (r_type
)
10666 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10668 case R_ARM_XPC25
: /* Arm BLX instruction. */
10671 case R_ARM_PC24
: /* Arm B/BL instruction. */
10674 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10676 if (r_type
== R_ARM_XPC25
)
10678 /* Check for Arm calling Arm function. */
10679 /* FIXME: Should we translate the instruction into a BL
10680 instruction instead ? */
10681 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10683 (_("\%pB: warning: %s BLX instruction targets"
10684 " %s function '%s'"),
10686 "ARM", h
? h
->root
.root
.string
: "(local)");
10688 else if (r_type
== R_ARM_PC24
)
10690 /* Check for Arm calling Thumb function. */
10691 if (branch_type
== ST_BRANCH_TO_THUMB
)
10693 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10694 output_bfd
, input_section
,
10695 hit_data
, sym_sec
, rel
->r_offset
,
10696 signed_addend
, value
,
10698 return bfd_reloc_ok
;
10700 return bfd_reloc_dangerous
;
10704 /* Check if a stub has to be inserted because the
10705 destination is too far or we are changing mode. */
10706 if ( r_type
== R_ARM_CALL
10707 || r_type
== R_ARM_JUMP24
10708 || r_type
== R_ARM_PLT32
)
10710 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10711 struct elf32_arm_link_hash_entry
*hash
;
10713 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10714 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10715 st_type
, &branch_type
,
10716 hash
, value
, sym_sec
,
10717 input_bfd
, sym_name
);
10719 if (stub_type
!= arm_stub_none
)
10721 /* The target is out of reach, so redirect the
10722 branch to the local stub for this function. */
10723 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10728 if (stub_entry
!= NULL
)
10729 value
= (stub_entry
->stub_offset
10730 + stub_entry
->stub_sec
->output_offset
10731 + stub_entry
->stub_sec
->output_section
->vma
);
10733 if (plt_offset
!= (bfd_vma
) -1)
10734 *unresolved_reloc_p
= FALSE
;
10739 /* If the call goes through a PLT entry, make sure to
10740 check distance to the right destination address. */
10741 if (plt_offset
!= (bfd_vma
) -1)
10743 value
= (splt
->output_section
->vma
10744 + splt
->output_offset
10746 *unresolved_reloc_p
= FALSE
;
10747 /* The PLT entry is in ARM mode, regardless of the
10748 target function. */
10749 branch_type
= ST_BRANCH_TO_ARM
;
10754 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10756 S is the address of the symbol in the relocation.
10757 P is address of the instruction being relocated.
10758 A is the addend (extracted from the instruction) in bytes.
10760 S is held in 'value'.
10761 P is the base address of the section containing the
10762 instruction plus the offset of the reloc into that
10764 (input_section->output_section->vma +
10765 input_section->output_offset +
10767 A is the addend, converted into bytes, ie:
10768 (signed_addend * 4)
10770 Note: None of these operations have knowledge of the pipeline
10771 size of the processor, thus it is up to the assembler to
10772 encode this information into the addend. */
10773 value
-= (input_section
->output_section
->vma
10774 + input_section
->output_offset
);
10775 value
-= rel
->r_offset
;
10776 if (globals
->use_rel
)
10777 value
+= (signed_addend
<< howto
->size
);
10779 /* RELA addends do not have to be adjusted by howto->size. */
10780 value
+= signed_addend
;
10782 signed_addend
= value
;
10783 signed_addend
>>= howto
->rightshift
;
10785 /* A branch to an undefined weak symbol is turned into a jump to
10786 the next instruction unless a PLT entry will be created.
10787 Do the same for local undefined symbols (but not for STN_UNDEF).
10788 The jump to the next instruction is optimized as a NOP depending
10789 on the architecture. */
10790 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10791 && plt_offset
== (bfd_vma
) -1)
10792 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10794 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10796 if (arch_has_arm_nop (globals
))
10797 value
|= 0x0320f000;
10799 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10803 /* Perform a signed range check. */
10804 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10805 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10806 return bfd_reloc_overflow
;
10808 addend
= (value
& 2);
10810 value
= (signed_addend
& howto
->dst_mask
)
10811 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10813 if (r_type
== R_ARM_CALL
)
10815 /* Set the H bit in the BLX instruction. */
10816 if (branch_type
== ST_BRANCH_TO_THUMB
)
10819 value
|= (1 << 24);
10821 value
&= ~(bfd_vma
)(1 << 24);
10824 /* Select the correct instruction (BL or BLX). */
10825 /* Only if we are not handling a BL to a stub. In this
10826 case, mode switching is performed by the stub. */
10827 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10828 value
|= (1 << 28);
10829 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10831 value
&= ~(bfd_vma
)(1 << 28);
10832 value
|= (1 << 24);
10841 if (branch_type
== ST_BRANCH_TO_THUMB
)
10845 case R_ARM_ABS32_NOI
:
10851 if (branch_type
== ST_BRANCH_TO_THUMB
)
10853 value
-= (input_section
->output_section
->vma
10854 + input_section
->output_offset
+ rel
->r_offset
);
10857 case R_ARM_REL32_NOI
:
10859 value
-= (input_section
->output_section
->vma
10860 + input_section
->output_offset
+ rel
->r_offset
);
10864 value
-= (input_section
->output_section
->vma
10865 + input_section
->output_offset
+ rel
->r_offset
);
10866 value
+= signed_addend
;
10867 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10869 /* Check for overflow. */
10870 if ((value
^ (value
>> 1)) & (1 << 30))
10871 return bfd_reloc_overflow
;
10873 value
&= 0x7fffffff;
10874 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10875 if (branch_type
== ST_BRANCH_TO_THUMB
)
10880 bfd_put_32 (input_bfd
, value
, hit_data
);
10881 return bfd_reloc_ok
;
10884 /* PR 16202: Refectch the addend using the correct size. */
10885 if (globals
->use_rel
)
10886 addend
= bfd_get_8 (input_bfd
, hit_data
);
10889 /* There is no way to tell whether the user intended to use a signed or
10890 unsigned addend. When checking for overflow we accept either,
10891 as specified by the AAELF. */
10892 if ((long) value
> 0xff || (long) value
< -0x80)
10893 return bfd_reloc_overflow
;
10895 bfd_put_8 (input_bfd
, value
, hit_data
);
10896 return bfd_reloc_ok
;
10899 /* PR 16202: Refectch the addend using the correct size. */
10900 if (globals
->use_rel
)
10901 addend
= bfd_get_16 (input_bfd
, hit_data
);
10904 /* See comment for R_ARM_ABS8. */
10905 if ((long) value
> 0xffff || (long) value
< -0x8000)
10906 return bfd_reloc_overflow
;
10908 bfd_put_16 (input_bfd
, value
, hit_data
);
10909 return bfd_reloc_ok
;
10911 case R_ARM_THM_ABS5
:
10912 /* Support ldr and str instructions for the thumb. */
10913 if (globals
->use_rel
)
10915 /* Need to refetch addend. */
10916 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10917 /* ??? Need to determine shift amount from operand size. */
10918 addend
>>= howto
->rightshift
;
10922 /* ??? Isn't value unsigned? */
10923 if ((long) value
> 0x1f || (long) value
< -0x10)
10924 return bfd_reloc_overflow
;
10926 /* ??? Value needs to be properly shifted into place first. */
10927 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10928 bfd_put_16 (input_bfd
, value
, hit_data
);
10929 return bfd_reloc_ok
;
10931 case R_ARM_THM_ALU_PREL_11_0
:
10932 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10935 bfd_signed_vma relocation
;
10937 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10938 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10940 if (globals
->use_rel
)
10942 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10943 | ((insn
& (1 << 26)) >> 15);
10944 if (insn
& 0xf00000)
10945 signed_addend
= -signed_addend
;
10948 relocation
= value
+ signed_addend
;
10949 relocation
-= Pa (input_section
->output_section
->vma
10950 + input_section
->output_offset
10953 /* PR 21523: Use an absolute value. The user of this reloc will
10954 have already selected an ADD or SUB insn appropriately. */
10955 value
= llabs (relocation
);
10957 if (value
>= 0x1000)
10958 return bfd_reloc_overflow
;
10960 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10961 if (branch_type
== ST_BRANCH_TO_THUMB
)
10964 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10965 | ((value
& 0x700) << 4)
10966 | ((value
& 0x800) << 15);
10967 if (relocation
< 0)
10970 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10971 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10973 return bfd_reloc_ok
;
10976 case R_ARM_THM_PC8
:
10977 /* PR 10073: This reloc is not generated by the GNU toolchain,
10978 but it is supported for compatibility with third party libraries
10979 generated by other compilers, specifically the ARM/IAR. */
10982 bfd_signed_vma relocation
;
10984 insn
= bfd_get_16 (input_bfd
, hit_data
);
10986 if (globals
->use_rel
)
10987 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10989 relocation
= value
+ addend
;
10990 relocation
-= Pa (input_section
->output_section
->vma
10991 + input_section
->output_offset
10994 value
= relocation
;
10996 /* We do not check for overflow of this reloc. Although strictly
10997 speaking this is incorrect, it appears to be necessary in order
10998 to work with IAR generated relocs. Since GCC and GAS do not
10999 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
11000 a problem for them. */
11003 insn
= (insn
& 0xff00) | (value
>> 2);
11005 bfd_put_16 (input_bfd
, insn
, hit_data
);
11007 return bfd_reloc_ok
;
11010 case R_ARM_THM_PC12
:
11011 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11014 bfd_signed_vma relocation
;
11016 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
11017 | bfd_get_16 (input_bfd
, hit_data
+ 2);
11019 if (globals
->use_rel
)
11021 signed_addend
= insn
& 0xfff;
11022 if (!(insn
& (1 << 23)))
11023 signed_addend
= -signed_addend
;
11026 relocation
= value
+ signed_addend
;
11027 relocation
-= Pa (input_section
->output_section
->vma
11028 + input_section
->output_offset
11031 value
= relocation
;
11033 if (value
>= 0x1000)
11034 return bfd_reloc_overflow
;
11036 insn
= (insn
& 0xff7ff000) | value
;
11037 if (relocation
>= 0)
11040 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11041 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11043 return bfd_reloc_ok
;
11046 case R_ARM_THM_XPC22
:
11047 case R_ARM_THM_CALL
:
11048 case R_ARM_THM_JUMP24
:
11049 /* Thumb BL (branch long instruction). */
11051 bfd_vma relocation
;
11052 bfd_vma reloc_sign
;
11053 bfd_boolean overflow
= FALSE
;
11054 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11055 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11056 bfd_signed_vma reloc_signed_max
;
11057 bfd_signed_vma reloc_signed_min
;
11059 bfd_signed_vma signed_check
;
11061 const int thumb2
= using_thumb2 (globals
);
11062 const int thumb2_bl
= using_thumb2_bl (globals
);
11064 /* A branch to an undefined weak symbol is turned into a jump to
11065 the next instruction unless a PLT entry will be created.
11066 The jump to the next instruction is optimized as a NOP.W for
11067 Thumb-2 enabled architectures. */
11068 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
11069 && plt_offset
== (bfd_vma
) -1)
11073 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
11074 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
11078 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
11079 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
11081 return bfd_reloc_ok
;
11084 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11085 with Thumb-1) involving the J1 and J2 bits. */
11086 if (globals
->use_rel
)
11088 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
11089 bfd_vma upper
= upper_insn
& 0x3ff;
11090 bfd_vma lower
= lower_insn
& 0x7ff;
11091 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
11092 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
11093 bfd_vma i1
= j1
^ s
? 0 : 1;
11094 bfd_vma i2
= j2
^ s
? 0 : 1;
11096 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
11098 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
11100 signed_addend
= addend
;
11103 if (r_type
== R_ARM_THM_XPC22
)
11105 /* Check for Thumb to Thumb call. */
11106 /* FIXME: Should we translate the instruction into a BL
11107 instruction instead ? */
11108 if (branch_type
== ST_BRANCH_TO_THUMB
)
11110 (_("%pB: warning: %s BLX instruction targets"
11111 " %s function '%s'"),
11112 input_bfd
, "Thumb",
11113 "Thumb", h
? h
->root
.root
.string
: "(local)");
11117 /* If it is not a call to Thumb, assume call to Arm.
11118 If it is a call relative to a section name, then it is not a
11119 function call at all, but rather a long jump. Calls through
11120 the PLT do not require stubs. */
11121 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
11123 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
11125 /* Convert BL to BLX. */
11126 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11128 else if (( r_type
!= R_ARM_THM_CALL
)
11129 && (r_type
!= R_ARM_THM_JUMP24
))
11131 if (elf32_thumb_to_arm_stub
11132 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
11133 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
11135 return bfd_reloc_ok
;
11137 return bfd_reloc_dangerous
;
11140 else if (branch_type
== ST_BRANCH_TO_THUMB
11141 && globals
->use_blx
11142 && r_type
== R_ARM_THM_CALL
)
11144 /* Make sure this is a BL. */
11145 lower_insn
|= 0x1800;
11149 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11150 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
11152 /* Check if a stub has to be inserted because the destination
11154 struct elf32_arm_stub_hash_entry
*stub_entry
;
11155 struct elf32_arm_link_hash_entry
*hash
;
11157 hash
= (struct elf32_arm_link_hash_entry
*) h
;
11159 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11160 st_type
, &branch_type
,
11161 hash
, value
, sym_sec
,
11162 input_bfd
, sym_name
);
11164 if (stub_type
!= arm_stub_none
)
11166 /* The target is out of reach or we are changing modes, so
11167 redirect the branch to the local stub for this
11169 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11173 if (stub_entry
!= NULL
)
11175 value
= (stub_entry
->stub_offset
11176 + stub_entry
->stub_sec
->output_offset
11177 + stub_entry
->stub_sec
->output_section
->vma
);
11179 if (plt_offset
!= (bfd_vma
) -1)
11180 *unresolved_reloc_p
= FALSE
;
11183 /* If this call becomes a call to Arm, force BLX. */
11184 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
11187 && !arm_stub_is_thumb (stub_entry
->stub_type
))
11188 || branch_type
!= ST_BRANCH_TO_THUMB
)
11189 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11194 /* Handle calls via the PLT. */
11195 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
11197 value
= (splt
->output_section
->vma
11198 + splt
->output_offset
11201 if (globals
->use_blx
11202 && r_type
== R_ARM_THM_CALL
11203 && ! using_thumb_only (globals
))
11205 /* If the Thumb BLX instruction is available, convert
11206 the BL to a BLX instruction to call the ARM-mode
11208 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11209 branch_type
= ST_BRANCH_TO_ARM
;
11213 if (! using_thumb_only (globals
))
11214 /* Target the Thumb stub before the ARM PLT entry. */
11215 value
-= PLT_THUMB_STUB_SIZE
;
11216 branch_type
= ST_BRANCH_TO_THUMB
;
11218 *unresolved_reloc_p
= FALSE
;
11221 relocation
= value
+ signed_addend
;
11223 relocation
-= (input_section
->output_section
->vma
11224 + input_section
->output_offset
11227 check
= relocation
>> howto
->rightshift
;
11229 /* If this is a signed value, the rightshift just dropped
11230 leading 1 bits (assuming twos complement). */
11231 if ((bfd_signed_vma
) relocation
>= 0)
11232 signed_check
= check
;
11234 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
11236 /* Calculate the permissable maximum and minimum values for
11237 this relocation according to whether we're relocating for
11239 bitsize
= howto
->bitsize
;
11242 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
11243 reloc_signed_min
= ~reloc_signed_max
;
11245 /* Assumes two's complement. */
11246 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11249 if ((lower_insn
& 0x5000) == 0x4000)
11250 /* For a BLX instruction, make sure that the relocation is rounded up
11251 to a word boundary. This follows the semantics of the instruction
11252 which specifies that bit 1 of the target address will come from bit
11253 1 of the base address. */
11254 relocation
= (relocation
+ 2) & ~ 3;
11256 /* Put RELOCATION back into the insn. Assumes two's complement.
11257 We use the Thumb-2 encoding, which is safe even if dealing with
11258 a Thumb-1 instruction by virtue of our overflow check above. */
11259 reloc_sign
= (signed_check
< 0) ? 1 : 0;
11260 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
11261 | ((relocation
>> 12) & 0x3ff)
11262 | (reloc_sign
<< 10);
11263 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
11264 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
11265 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
11266 | ((relocation
>> 1) & 0x7ff);
11268 /* Put the relocated value back in the object file: */
11269 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11270 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11272 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11276 case R_ARM_THM_JUMP19
:
11277 /* Thumb32 conditional branch instruction. */
11279 bfd_vma relocation
;
11280 bfd_boolean overflow
= FALSE
;
11281 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11282 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11283 bfd_signed_vma reloc_signed_max
= 0xffffe;
11284 bfd_signed_vma reloc_signed_min
= -0x100000;
11285 bfd_signed_vma signed_check
;
11286 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11287 struct elf32_arm_stub_hash_entry
*stub_entry
;
11288 struct elf32_arm_link_hash_entry
*hash
;
11290 /* Need to refetch the addend, reconstruct the top three bits,
11291 and squish the two 11 bit pieces together. */
11292 if (globals
->use_rel
)
11294 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
11295 bfd_vma upper
= (upper_insn
& 0x003f);
11296 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
11297 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
11298 bfd_vma lower
= (lower_insn
& 0x07ff);
11302 upper
|= (!S
) << 8;
11303 upper
-= 0x0100; /* Sign extend. */
11305 addend
= (upper
<< 12) | (lower
<< 1);
11306 signed_addend
= addend
;
11309 /* Handle calls via the PLT. */
11310 if (plt_offset
!= (bfd_vma
) -1)
11312 value
= (splt
->output_section
->vma
11313 + splt
->output_offset
11315 /* Target the Thumb stub before the ARM PLT entry. */
11316 value
-= PLT_THUMB_STUB_SIZE
;
11317 *unresolved_reloc_p
= FALSE
;
11320 hash
= (struct elf32_arm_link_hash_entry
*)h
;
11322 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11323 st_type
, &branch_type
,
11324 hash
, value
, sym_sec
,
11325 input_bfd
, sym_name
);
11326 if (stub_type
!= arm_stub_none
)
11328 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11332 if (stub_entry
!= NULL
)
11334 value
= (stub_entry
->stub_offset
11335 + stub_entry
->stub_sec
->output_offset
11336 + stub_entry
->stub_sec
->output_section
->vma
);
11340 relocation
= value
+ signed_addend
;
11341 relocation
-= (input_section
->output_section
->vma
11342 + input_section
->output_offset
11344 signed_check
= (bfd_signed_vma
) relocation
;
11346 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11349 /* Put RELOCATION back into the insn. */
11351 bfd_vma S
= (relocation
& 0x00100000) >> 20;
11352 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
11353 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
11354 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
11355 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
11357 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
11358 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
11361 /* Put the relocated value back in the object file: */
11362 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11363 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11365 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11368 case R_ARM_THM_JUMP11
:
11369 case R_ARM_THM_JUMP8
:
11370 case R_ARM_THM_JUMP6
:
11371 /* Thumb B (branch) instruction). */
11373 bfd_signed_vma relocation
;
11374 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
11375 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
11376 bfd_signed_vma signed_check
;
11378 /* CZB cannot jump backward. */
11379 if (r_type
== R_ARM_THM_JUMP6
)
11380 reloc_signed_min
= 0;
11382 if (globals
->use_rel
)
11384 /* Need to refetch addend. */
11385 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
11386 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11388 signed_addend
= -1;
11389 signed_addend
&= ~ howto
->src_mask
;
11390 signed_addend
|= addend
;
11393 signed_addend
= addend
;
11394 /* The value in the insn has been right shifted. We need to
11395 undo this, so that we can perform the address calculation
11396 in terms of bytes. */
11397 signed_addend
<<= howto
->rightshift
;
11399 relocation
= value
+ signed_addend
;
11401 relocation
-= (input_section
->output_section
->vma
11402 + input_section
->output_offset
11405 relocation
>>= howto
->rightshift
;
11406 signed_check
= relocation
;
11408 if (r_type
== R_ARM_THM_JUMP6
)
11409 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
11411 relocation
&= howto
->dst_mask
;
11412 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
11414 bfd_put_16 (input_bfd
, relocation
, hit_data
);
11416 /* Assumes two's complement. */
11417 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11418 return bfd_reloc_overflow
;
11420 return bfd_reloc_ok
;
11423 case R_ARM_ALU_PCREL7_0
:
11424 case R_ARM_ALU_PCREL15_8
:
11425 case R_ARM_ALU_PCREL23_15
:
11428 bfd_vma relocation
;
11430 insn
= bfd_get_32 (input_bfd
, hit_data
);
11431 if (globals
->use_rel
)
11433 /* Extract the addend. */
11434 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11435 signed_addend
= addend
;
11437 relocation
= value
+ signed_addend
;
11439 relocation
-= (input_section
->output_section
->vma
11440 + input_section
->output_offset
11442 insn
= (insn
& ~0xfff)
11443 | ((howto
->bitpos
<< 7) & 0xf00)
11444 | ((relocation
>> howto
->bitpos
) & 0xff);
11445 bfd_put_32 (input_bfd
, value
, hit_data
);
11447 return bfd_reloc_ok
;
11449 case R_ARM_GNU_VTINHERIT
:
11450 case R_ARM_GNU_VTENTRY
:
11451 return bfd_reloc_ok
;
11453 case R_ARM_GOTOFF32
:
11454 /* Relocation is relative to the start of the
11455 global offset table. */
11457 BFD_ASSERT (sgot
!= NULL
);
11459 return bfd_reloc_notsupported
;
11461 /* If we are addressing a Thumb function, we need to adjust the
11462 address by one, so that attempts to call the function pointer will
11463 correctly interpret it as Thumb code. */
11464 if (branch_type
== ST_BRANCH_TO_THUMB
)
11467 /* Note that sgot->output_offset is not involved in this
11468 calculation. We always want the start of .got. If we
11469 define _GLOBAL_OFFSET_TABLE in a different way, as is
11470 permitted by the ABI, we might have to change this
11472 value
-= sgot
->output_section
->vma
;
11473 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11474 contents
, rel
->r_offset
, value
,
11478 /* Use global offset table as symbol value. */
11479 BFD_ASSERT (sgot
!= NULL
);
11482 return bfd_reloc_notsupported
;
11484 *unresolved_reloc_p
= FALSE
;
11485 value
= sgot
->output_section
->vma
;
11486 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11487 contents
, rel
->r_offset
, value
,
11491 case R_ARM_GOT_PREL
:
11492 /* Relocation is to the entry for this symbol in the
11493 global offset table. */
11495 return bfd_reloc_notsupported
;
11497 if (dynreloc_st_type
== STT_GNU_IFUNC
11498 && plt_offset
!= (bfd_vma
) -1
11499 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11501 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11502 symbol, and the relocation resolves directly to the runtime
11503 target rather than to the .iplt entry. This means that any
11504 .got entry would be the same value as the .igot.plt entry,
11505 so there's no point creating both. */
11506 sgot
= globals
->root
.igotplt
;
11507 value
= sgot
->output_offset
+ gotplt_offset
;
11509 else if (h
!= NULL
)
11513 off
= h
->got
.offset
;
11514 BFD_ASSERT (off
!= (bfd_vma
) -1);
11515 if ((off
& 1) != 0)
11517 /* We have already processsed one GOT relocation against
11520 if (globals
->root
.dynamic_sections_created
11521 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11522 *unresolved_reloc_p
= FALSE
;
11526 Elf_Internal_Rela outrel
;
11529 if (((h
->dynindx
!= -1) || globals
->fdpic_p
)
11530 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11532 /* If the symbol doesn't resolve locally in a static
11533 object, we have an undefined reference. If the
11534 symbol doesn't resolve locally in a dynamic object,
11535 it should be resolved by the dynamic linker. */
11536 if (globals
->root
.dynamic_sections_created
)
11538 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11539 *unresolved_reloc_p
= FALSE
;
11543 outrel
.r_addend
= 0;
11547 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11548 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11549 else if (bfd_link_pic (info
)
11550 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
11551 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11555 if (globals
->fdpic_p
)
11558 outrel
.r_addend
= dynreloc_value
;
11561 /* The GOT entry is initialized to zero by default.
11562 See if we should install a different value. */
11563 if (outrel
.r_addend
!= 0
11564 && (globals
->use_rel
|| outrel
.r_info
== 0))
11566 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11567 sgot
->contents
+ off
);
11568 outrel
.r_addend
= 0;
11572 arm_elf_add_rofixup (output_bfd
,
11573 elf32_arm_hash_table(info
)->srofixup
,
11574 sgot
->output_section
->vma
11575 + sgot
->output_offset
+ off
);
11577 else if (outrel
.r_info
!= 0)
11579 outrel
.r_offset
= (sgot
->output_section
->vma
11580 + sgot
->output_offset
11582 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11585 h
->got
.offset
|= 1;
11587 value
= sgot
->output_offset
+ off
;
11593 BFD_ASSERT (local_got_offsets
!= NULL
11594 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11596 off
= local_got_offsets
[r_symndx
];
11598 /* The offset must always be a multiple of 4. We use the
11599 least significant bit to record whether we have already
11600 generated the necessary reloc. */
11601 if ((off
& 1) != 0)
11605 Elf_Internal_Rela outrel
;
11608 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11609 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11610 else if (bfd_link_pic (info
))
11611 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11615 if (globals
->fdpic_p
)
11619 /* The GOT entry is initialized to zero by default.
11620 See if we should install a different value. */
11621 if (globals
->use_rel
|| outrel
.r_info
== 0)
11622 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11625 arm_elf_add_rofixup (output_bfd
,
11627 sgot
->output_section
->vma
11628 + sgot
->output_offset
+ off
);
11630 else if (outrel
.r_info
!= 0)
11632 outrel
.r_addend
= addend
+ dynreloc_value
;
11633 outrel
.r_offset
= (sgot
->output_section
->vma
11634 + sgot
->output_offset
11636 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11639 local_got_offsets
[r_symndx
] |= 1;
11642 value
= sgot
->output_offset
+ off
;
11644 if (r_type
!= R_ARM_GOT32
)
11645 value
+= sgot
->output_section
->vma
;
11647 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11648 contents
, rel
->r_offset
, value
,
11651 case R_ARM_TLS_LDO32
:
11652 value
= value
- dtpoff_base (info
);
11654 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11655 contents
, rel
->r_offset
, value
,
11658 case R_ARM_TLS_LDM32
:
11659 case R_ARM_TLS_LDM32_FDPIC
:
11666 off
= globals
->tls_ldm_got
.offset
;
11668 if ((off
& 1) != 0)
11672 /* If we don't know the module number, create a relocation
11674 if (bfd_link_dll (info
))
11676 Elf_Internal_Rela outrel
;
11678 if (srelgot
== NULL
)
11681 outrel
.r_addend
= 0;
11682 outrel
.r_offset
= (sgot
->output_section
->vma
11683 + sgot
->output_offset
+ off
);
11684 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11686 if (globals
->use_rel
)
11687 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11688 sgot
->contents
+ off
);
11690 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11693 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11695 globals
->tls_ldm_got
.offset
|= 1;
11698 if (r_type
== R_ARM_TLS_LDM32_FDPIC
)
11700 bfd_put_32(output_bfd
,
11701 globals
->root
.sgot
->output_offset
+ off
,
11702 contents
+ rel
->r_offset
);
11704 return bfd_reloc_ok
;
11708 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11709 - (input_section
->output_section
->vma
11710 + input_section
->output_offset
+ rel
->r_offset
);
11712 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11713 contents
, rel
->r_offset
, value
,
11718 case R_ARM_TLS_CALL
:
11719 case R_ARM_THM_TLS_CALL
:
11720 case R_ARM_TLS_GD32
:
11721 case R_ARM_TLS_GD32_FDPIC
:
11722 case R_ARM_TLS_IE32
:
11723 case R_ARM_TLS_IE32_FDPIC
:
11724 case R_ARM_TLS_GOTDESC
:
11725 case R_ARM_TLS_DESCSEQ
:
11726 case R_ARM_THM_TLS_DESCSEQ
:
11728 bfd_vma off
, offplt
;
11732 BFD_ASSERT (sgot
!= NULL
);
11737 dyn
= globals
->root
.dynamic_sections_created
;
11738 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11739 bfd_link_pic (info
),
11741 && (!bfd_link_pic (info
)
11742 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11744 *unresolved_reloc_p
= FALSE
;
11747 off
= h
->got
.offset
;
11748 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11749 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11753 BFD_ASSERT (local_got_offsets
!= NULL
);
11754 off
= local_got_offsets
[r_symndx
];
11755 offplt
= local_tlsdesc_gotents
[r_symndx
];
11756 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11759 /* Linker relaxations happens from one of the
11760 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11761 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11762 tls_type
= GOT_TLS_IE
;
11764 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11766 if ((off
& 1) != 0)
11770 bfd_boolean need_relocs
= FALSE
;
11771 Elf_Internal_Rela outrel
;
11774 /* The GOT entries have not been initialized yet. Do it
11775 now, and emit any relocations. If both an IE GOT and a
11776 GD GOT are necessary, we emit the GD first. */
11778 if ((bfd_link_dll (info
) || indx
!= 0)
11780 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11781 && !resolved_to_zero
)
11782 || h
->root
.type
!= bfd_link_hash_undefweak
))
11784 need_relocs
= TRUE
;
11785 BFD_ASSERT (srelgot
!= NULL
);
11788 if (tls_type
& GOT_TLS_GDESC
)
11792 /* We should have relaxed, unless this is an undefined
11794 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11795 || bfd_link_dll (info
));
11796 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11797 <= globals
->root
.sgotplt
->size
);
11799 outrel
.r_addend
= 0;
11800 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11801 + globals
->root
.sgotplt
->output_offset
11803 + globals
->sgotplt_jump_table_size
);
11805 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11806 sreloc
= globals
->root
.srelplt
;
11807 loc
= sreloc
->contents
;
11808 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11809 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11810 <= sreloc
->contents
+ sreloc
->size
);
11812 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11814 /* For globals, the first word in the relocation gets
11815 the relocation index and the top bit set, or zero,
11816 if we're binding now. For locals, it gets the
11817 symbol's offset in the tls section. */
11818 bfd_put_32 (output_bfd
,
11819 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11820 : info
->flags
& DF_BIND_NOW
? 0
11821 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11822 globals
->root
.sgotplt
->contents
+ offplt
11823 + globals
->sgotplt_jump_table_size
);
11825 /* Second word in the relocation is always zero. */
11826 bfd_put_32 (output_bfd
, 0,
11827 globals
->root
.sgotplt
->contents
+ offplt
11828 + globals
->sgotplt_jump_table_size
+ 4);
11830 if (tls_type
& GOT_TLS_GD
)
11834 outrel
.r_addend
= 0;
11835 outrel
.r_offset
= (sgot
->output_section
->vma
11836 + sgot
->output_offset
11838 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11840 if (globals
->use_rel
)
11841 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11842 sgot
->contents
+ cur_off
);
11844 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11847 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11848 sgot
->contents
+ cur_off
+ 4);
11851 outrel
.r_addend
= 0;
11852 outrel
.r_info
= ELF32_R_INFO (indx
,
11853 R_ARM_TLS_DTPOFF32
);
11854 outrel
.r_offset
+= 4;
11856 if (globals
->use_rel
)
11857 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11858 sgot
->contents
+ cur_off
+ 4);
11860 elf32_arm_add_dynreloc (output_bfd
, info
,
11866 /* If we are not emitting relocations for a
11867 general dynamic reference, then we must be in a
11868 static link or an executable link with the
11869 symbol binding locally. Mark it as belonging
11870 to module 1, the executable. */
11871 bfd_put_32 (output_bfd
, 1,
11872 sgot
->contents
+ cur_off
);
11873 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11874 sgot
->contents
+ cur_off
+ 4);
11880 if (tls_type
& GOT_TLS_IE
)
11885 outrel
.r_addend
= value
- dtpoff_base (info
);
11887 outrel
.r_addend
= 0;
11888 outrel
.r_offset
= (sgot
->output_section
->vma
11889 + sgot
->output_offset
11891 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11893 if (globals
->use_rel
)
11894 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11895 sgot
->contents
+ cur_off
);
11897 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11900 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11901 sgot
->contents
+ cur_off
);
11906 h
->got
.offset
|= 1;
11908 local_got_offsets
[r_symndx
] |= 1;
11911 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
&& r_type
!= R_ARM_TLS_GD32_FDPIC
)
11913 else if (tls_type
& GOT_TLS_GDESC
)
11916 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11917 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11919 bfd_signed_vma offset
;
11920 /* TLS stubs are arm mode. The original symbol is a
11921 data object, so branch_type is bogus. */
11922 branch_type
= ST_BRANCH_TO_ARM
;
11923 enum elf32_arm_stub_type stub_type
11924 = arm_type_of_stub (info
, input_section
, rel
,
11925 st_type
, &branch_type
,
11926 (struct elf32_arm_link_hash_entry
*)h
,
11927 globals
->tls_trampoline
, globals
->root
.splt
,
11928 input_bfd
, sym_name
);
11930 if (stub_type
!= arm_stub_none
)
11932 struct elf32_arm_stub_hash_entry
*stub_entry
11933 = elf32_arm_get_stub_entry
11934 (input_section
, globals
->root
.splt
, 0, rel
,
11935 globals
, stub_type
);
11936 offset
= (stub_entry
->stub_offset
11937 + stub_entry
->stub_sec
->output_offset
11938 + stub_entry
->stub_sec
->output_section
->vma
);
11941 offset
= (globals
->root
.splt
->output_section
->vma
11942 + globals
->root
.splt
->output_offset
11943 + globals
->tls_trampoline
);
11945 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11947 unsigned long inst
;
11949 offset
-= (input_section
->output_section
->vma
11950 + input_section
->output_offset
11951 + rel
->r_offset
+ 8);
11953 inst
= offset
>> 2;
11954 inst
&= 0x00ffffff;
11955 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11959 /* Thumb blx encodes the offset in a complicated
11961 unsigned upper_insn
, lower_insn
;
11964 offset
-= (input_section
->output_section
->vma
11965 + input_section
->output_offset
11966 + rel
->r_offset
+ 4);
11968 if (stub_type
!= arm_stub_none
11969 && arm_stub_is_thumb (stub_type
))
11971 lower_insn
= 0xd000;
11975 lower_insn
= 0xc000;
11976 /* Round up the offset to a word boundary. */
11977 offset
= (offset
+ 2) & ~2;
11981 upper_insn
= (0xf000
11982 | ((offset
>> 12) & 0x3ff)
11984 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11985 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11986 | ((offset
>> 1) & 0x7ff);
11987 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11988 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11989 return bfd_reloc_ok
;
11992 /* These relocations needs special care, as besides the fact
11993 they point somewhere in .gotplt, the addend must be
11994 adjusted accordingly depending on the type of instruction
11996 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11998 unsigned long data
, insn
;
12001 data
= bfd_get_signed_32 (input_bfd
, hit_data
);
12007 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
12008 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
12009 insn
= (insn
<< 16)
12010 | bfd_get_16 (input_bfd
,
12011 contents
+ rel
->r_offset
- data
+ 2);
12012 if ((insn
& 0xf800c000) == 0xf000c000)
12015 else if ((insn
& 0xffffff00) == 0x4400)
12021 /* xgettext:c-format */
12022 (_("%pB(%pA+%#" PRIx64
"): "
12023 "unexpected %s instruction '%#lx' "
12024 "referenced by TLS_GOTDESC"),
12025 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12027 return bfd_reloc_notsupported
;
12032 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
12034 switch (insn
>> 24)
12036 case 0xeb: /* bl */
12037 case 0xfa: /* blx */
12041 case 0xe0: /* add */
12047 /* xgettext:c-format */
12048 (_("%pB(%pA+%#" PRIx64
"): "
12049 "unexpected %s instruction '%#lx' "
12050 "referenced by TLS_GOTDESC"),
12051 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12053 return bfd_reloc_notsupported
;
12057 value
+= ((globals
->root
.sgotplt
->output_section
->vma
12058 + globals
->root
.sgotplt
->output_offset
+ off
)
12059 - (input_section
->output_section
->vma
12060 + input_section
->output_offset
12062 + globals
->sgotplt_jump_table_size
);
12065 value
= ((globals
->root
.sgot
->output_section
->vma
12066 + globals
->root
.sgot
->output_offset
+ off
)
12067 - (input_section
->output_section
->vma
12068 + input_section
->output_offset
+ rel
->r_offset
));
12070 if (globals
->fdpic_p
&& (r_type
== R_ARM_TLS_GD32_FDPIC
||
12071 r_type
== R_ARM_TLS_IE32_FDPIC
))
12073 /* For FDPIC relocations, resolve to the offset of the GOT
12074 entry from the start of GOT. */
12075 bfd_put_32(output_bfd
,
12076 globals
->root
.sgot
->output_offset
+ off
,
12077 contents
+ rel
->r_offset
);
12079 return bfd_reloc_ok
;
12083 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12084 contents
, rel
->r_offset
, value
,
12089 case R_ARM_TLS_LE32
:
12090 if (bfd_link_dll (info
))
12093 /* xgettext:c-format */
12094 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
12095 "in shared object"),
12096 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
12097 return bfd_reloc_notsupported
;
12100 value
= tpoff (info
, value
);
12102 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12103 contents
, rel
->r_offset
, value
,
12107 if (globals
->fix_v4bx
)
12109 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12111 /* Ensure that we have a BX instruction. */
12112 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
12114 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
12116 /* Branch to veneer. */
12118 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
12119 glue_addr
-= input_section
->output_section
->vma
12120 + input_section
->output_offset
12121 + rel
->r_offset
+ 8;
12122 insn
= (insn
& 0xf0000000) | 0x0a000000
12123 | ((glue_addr
>> 2) & 0x00ffffff);
12127 /* Preserve Rm (lowest four bits) and the condition code
12128 (highest four bits). Other bits encode MOV PC,Rm. */
12129 insn
= (insn
& 0xf000000f) | 0x01a0f000;
12132 bfd_put_32 (input_bfd
, insn
, hit_data
);
12134 return bfd_reloc_ok
;
12136 case R_ARM_MOVW_ABS_NC
:
12137 case R_ARM_MOVT_ABS
:
12138 case R_ARM_MOVW_PREL_NC
:
12139 case R_ARM_MOVT_PREL
:
12140 /* Until we properly support segment-base-relative addressing then
12141 we assume the segment base to be zero, as for the group relocations.
12142 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12143 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12144 case R_ARM_MOVW_BREL_NC
:
12145 case R_ARM_MOVW_BREL
:
12146 case R_ARM_MOVT_BREL
:
12148 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12150 if (globals
->use_rel
)
12152 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
12153 signed_addend
= (addend
^ 0x8000) - 0x8000;
12156 value
+= signed_addend
;
12158 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
12159 value
-= (input_section
->output_section
->vma
12160 + input_section
->output_offset
+ rel
->r_offset
);
12162 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
12163 return bfd_reloc_overflow
;
12165 if (branch_type
== ST_BRANCH_TO_THUMB
)
12168 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
12169 || r_type
== R_ARM_MOVT_BREL
)
12172 insn
&= 0xfff0f000;
12173 insn
|= value
& 0xfff;
12174 insn
|= (value
& 0xf000) << 4;
12175 bfd_put_32 (input_bfd
, insn
, hit_data
);
12177 return bfd_reloc_ok
;
12179 case R_ARM_THM_MOVW_ABS_NC
:
12180 case R_ARM_THM_MOVT_ABS
:
12181 case R_ARM_THM_MOVW_PREL_NC
:
12182 case R_ARM_THM_MOVT_PREL
:
12183 /* Until we properly support segment-base-relative addressing then
12184 we assume the segment base to be zero, as for the above relocations.
12185 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12186 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12187 as R_ARM_THM_MOVT_ABS. */
12188 case R_ARM_THM_MOVW_BREL_NC
:
12189 case R_ARM_THM_MOVW_BREL
:
12190 case R_ARM_THM_MOVT_BREL
:
12194 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
12195 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
12197 if (globals
->use_rel
)
12199 addend
= ((insn
>> 4) & 0xf000)
12200 | ((insn
>> 15) & 0x0800)
12201 | ((insn
>> 4) & 0x0700)
12203 signed_addend
= (addend
^ 0x8000) - 0x8000;
12206 value
+= signed_addend
;
12208 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
12209 value
-= (input_section
->output_section
->vma
12210 + input_section
->output_offset
+ rel
->r_offset
);
12212 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
12213 return bfd_reloc_overflow
;
12215 if (branch_type
== ST_BRANCH_TO_THUMB
)
12218 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
12219 || r_type
== R_ARM_THM_MOVT_BREL
)
12222 insn
&= 0xfbf08f00;
12223 insn
|= (value
& 0xf000) << 4;
12224 insn
|= (value
& 0x0800) << 15;
12225 insn
|= (value
& 0x0700) << 4;
12226 insn
|= (value
& 0x00ff);
12228 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
12229 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
12231 return bfd_reloc_ok
;
12233 case R_ARM_ALU_PC_G0_NC
:
12234 case R_ARM_ALU_PC_G1_NC
:
12235 case R_ARM_ALU_PC_G0
:
12236 case R_ARM_ALU_PC_G1
:
12237 case R_ARM_ALU_PC_G2
:
12238 case R_ARM_ALU_SB_G0_NC
:
12239 case R_ARM_ALU_SB_G1_NC
:
12240 case R_ARM_ALU_SB_G0
:
12241 case R_ARM_ALU_SB_G1
:
12242 case R_ARM_ALU_SB_G2
:
12244 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12245 bfd_vma pc
= input_section
->output_section
->vma
12246 + input_section
->output_offset
+ rel
->r_offset
;
12247 /* sb is the origin of the *segment* containing the symbol. */
12248 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12251 bfd_signed_vma signed_value
;
12254 /* Determine which group of bits to select. */
12257 case R_ARM_ALU_PC_G0_NC
:
12258 case R_ARM_ALU_PC_G0
:
12259 case R_ARM_ALU_SB_G0_NC
:
12260 case R_ARM_ALU_SB_G0
:
12264 case R_ARM_ALU_PC_G1_NC
:
12265 case R_ARM_ALU_PC_G1
:
12266 case R_ARM_ALU_SB_G1_NC
:
12267 case R_ARM_ALU_SB_G1
:
12271 case R_ARM_ALU_PC_G2
:
12272 case R_ARM_ALU_SB_G2
:
12280 /* If REL, extract the addend from the insn. If RELA, it will
12281 have already been fetched for us. */
12282 if (globals
->use_rel
)
12285 bfd_vma constant
= insn
& 0xff;
12286 bfd_vma rotation
= (insn
& 0xf00) >> 8;
12289 signed_addend
= constant
;
12292 /* Compensate for the fact that in the instruction, the
12293 rotation is stored in multiples of 2 bits. */
12296 /* Rotate "constant" right by "rotation" bits. */
12297 signed_addend
= (constant
>> rotation
) |
12298 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
12301 /* Determine if the instruction is an ADD or a SUB.
12302 (For REL, this determines the sign of the addend.) */
12303 negative
= identify_add_or_sub (insn
);
12307 /* xgettext:c-format */
12308 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
12309 "are allowed for ALU group relocations"),
12310 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
12311 return bfd_reloc_overflow
;
12314 signed_addend
*= negative
;
12317 /* Compute the value (X) to go in the place. */
12318 if (r_type
== R_ARM_ALU_PC_G0_NC
12319 || r_type
== R_ARM_ALU_PC_G1_NC
12320 || r_type
== R_ARM_ALU_PC_G0
12321 || r_type
== R_ARM_ALU_PC_G1
12322 || r_type
== R_ARM_ALU_PC_G2
)
12324 signed_value
= value
- pc
+ signed_addend
;
12326 /* Section base relative. */
12327 signed_value
= value
- sb
+ signed_addend
;
12329 /* If the target symbol is a Thumb function, then set the
12330 Thumb bit in the address. */
12331 if (branch_type
== ST_BRANCH_TO_THUMB
)
12334 /* Calculate the value of the relevant G_n, in encoded
12335 constant-with-rotation format. */
12336 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12339 /* Check for overflow if required. */
12340 if ((r_type
== R_ARM_ALU_PC_G0
12341 || r_type
== R_ARM_ALU_PC_G1
12342 || r_type
== R_ARM_ALU_PC_G2
12343 || r_type
== R_ARM_ALU_SB_G0
12344 || r_type
== R_ARM_ALU_SB_G1
12345 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
12348 /* xgettext:c-format */
12349 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12350 "splitting %#" PRIx64
" for group relocation %s"),
12351 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12352 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12354 return bfd_reloc_overflow
;
12357 /* Mask out the value and the ADD/SUB part of the opcode; take care
12358 not to destroy the S bit. */
12359 insn
&= 0xff1ff000;
12361 /* Set the opcode according to whether the value to go in the
12362 place is negative. */
12363 if (signed_value
< 0)
12368 /* Encode the offset. */
12371 bfd_put_32 (input_bfd
, insn
, hit_data
);
12373 return bfd_reloc_ok
;
12375 case R_ARM_LDR_PC_G0
:
12376 case R_ARM_LDR_PC_G1
:
12377 case R_ARM_LDR_PC_G2
:
12378 case R_ARM_LDR_SB_G0
:
12379 case R_ARM_LDR_SB_G1
:
12380 case R_ARM_LDR_SB_G2
:
12382 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12383 bfd_vma pc
= input_section
->output_section
->vma
12384 + input_section
->output_offset
+ rel
->r_offset
;
12385 /* sb is the origin of the *segment* containing the symbol. */
12386 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12388 bfd_signed_vma signed_value
;
12391 /* Determine which groups of bits to calculate. */
12394 case R_ARM_LDR_PC_G0
:
12395 case R_ARM_LDR_SB_G0
:
12399 case R_ARM_LDR_PC_G1
:
12400 case R_ARM_LDR_SB_G1
:
12404 case R_ARM_LDR_PC_G2
:
12405 case R_ARM_LDR_SB_G2
:
12413 /* If REL, extract the addend from the insn. If RELA, it will
12414 have already been fetched for us. */
12415 if (globals
->use_rel
)
12417 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12418 signed_addend
= negative
* (insn
& 0xfff);
12421 /* Compute the value (X) to go in the place. */
12422 if (r_type
== R_ARM_LDR_PC_G0
12423 || r_type
== R_ARM_LDR_PC_G1
12424 || r_type
== R_ARM_LDR_PC_G2
)
12426 signed_value
= value
- pc
+ signed_addend
;
12428 /* Section base relative. */
12429 signed_value
= value
- sb
+ signed_addend
;
12431 /* Calculate the value of the relevant G_{n-1} to obtain
12432 the residual at that stage. */
12433 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12434 group
- 1, &residual
);
12436 /* Check for overflow. */
12437 if (residual
>= 0x1000)
12440 /* xgettext:c-format */
12441 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12442 "splitting %#" PRIx64
" for group relocation %s"),
12443 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12444 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12446 return bfd_reloc_overflow
;
12449 /* Mask out the value and U bit. */
12450 insn
&= 0xff7ff000;
12452 /* Set the U bit if the value to go in the place is non-negative. */
12453 if (signed_value
>= 0)
12456 /* Encode the offset. */
12459 bfd_put_32 (input_bfd
, insn
, hit_data
);
12461 return bfd_reloc_ok
;
12463 case R_ARM_LDRS_PC_G0
:
12464 case R_ARM_LDRS_PC_G1
:
12465 case R_ARM_LDRS_PC_G2
:
12466 case R_ARM_LDRS_SB_G0
:
12467 case R_ARM_LDRS_SB_G1
:
12468 case R_ARM_LDRS_SB_G2
:
12470 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12471 bfd_vma pc
= input_section
->output_section
->vma
12472 + input_section
->output_offset
+ rel
->r_offset
;
12473 /* sb is the origin of the *segment* containing the symbol. */
12474 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12476 bfd_signed_vma signed_value
;
12479 /* Determine which groups of bits to calculate. */
12482 case R_ARM_LDRS_PC_G0
:
12483 case R_ARM_LDRS_SB_G0
:
12487 case R_ARM_LDRS_PC_G1
:
12488 case R_ARM_LDRS_SB_G1
:
12492 case R_ARM_LDRS_PC_G2
:
12493 case R_ARM_LDRS_SB_G2
:
12501 /* If REL, extract the addend from the insn. If RELA, it will
12502 have already been fetched for us. */
12503 if (globals
->use_rel
)
12505 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12506 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12509 /* Compute the value (X) to go in the place. */
12510 if (r_type
== R_ARM_LDRS_PC_G0
12511 || r_type
== R_ARM_LDRS_PC_G1
12512 || r_type
== R_ARM_LDRS_PC_G2
)
12514 signed_value
= value
- pc
+ signed_addend
;
12516 /* Section base relative. */
12517 signed_value
= value
- sb
+ signed_addend
;
12519 /* Calculate the value of the relevant G_{n-1} to obtain
12520 the residual at that stage. */
12521 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12522 group
- 1, &residual
);
12524 /* Check for overflow. */
12525 if (residual
>= 0x100)
12528 /* xgettext:c-format */
12529 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12530 "splitting %#" PRIx64
" for group relocation %s"),
12531 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12532 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12534 return bfd_reloc_overflow
;
12537 /* Mask out the value and U bit. */
12538 insn
&= 0xff7ff0f0;
12540 /* Set the U bit if the value to go in the place is non-negative. */
12541 if (signed_value
>= 0)
12544 /* Encode the offset. */
12545 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12547 bfd_put_32 (input_bfd
, insn
, hit_data
);
12549 return bfd_reloc_ok
;
12551 case R_ARM_LDC_PC_G0
:
12552 case R_ARM_LDC_PC_G1
:
12553 case R_ARM_LDC_PC_G2
:
12554 case R_ARM_LDC_SB_G0
:
12555 case R_ARM_LDC_SB_G1
:
12556 case R_ARM_LDC_SB_G2
:
12558 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12559 bfd_vma pc
= input_section
->output_section
->vma
12560 + input_section
->output_offset
+ rel
->r_offset
;
12561 /* sb is the origin of the *segment* containing the symbol. */
12562 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12564 bfd_signed_vma signed_value
;
12567 /* Determine which groups of bits to calculate. */
12570 case R_ARM_LDC_PC_G0
:
12571 case R_ARM_LDC_SB_G0
:
12575 case R_ARM_LDC_PC_G1
:
12576 case R_ARM_LDC_SB_G1
:
12580 case R_ARM_LDC_PC_G2
:
12581 case R_ARM_LDC_SB_G2
:
12589 /* If REL, extract the addend from the insn. If RELA, it will
12590 have already been fetched for us. */
12591 if (globals
->use_rel
)
12593 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12594 signed_addend
= negative
* ((insn
& 0xff) << 2);
12597 /* Compute the value (X) to go in the place. */
12598 if (r_type
== R_ARM_LDC_PC_G0
12599 || r_type
== R_ARM_LDC_PC_G1
12600 || r_type
== R_ARM_LDC_PC_G2
)
12602 signed_value
= value
- pc
+ signed_addend
;
12604 /* Section base relative. */
12605 signed_value
= value
- sb
+ signed_addend
;
12607 /* Calculate the value of the relevant G_{n-1} to obtain
12608 the residual at that stage. */
12609 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12610 group
- 1, &residual
);
12612 /* Check for overflow. (The absolute value to go in the place must be
12613 divisible by four and, after having been divided by four, must
12614 fit in eight bits.) */
12615 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12618 /* xgettext:c-format */
12619 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12620 "splitting %#" PRIx64
" for group relocation %s"),
12621 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12622 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12624 return bfd_reloc_overflow
;
12627 /* Mask out the value and U bit. */
12628 insn
&= 0xff7fff00;
12630 /* Set the U bit if the value to go in the place is non-negative. */
12631 if (signed_value
>= 0)
12634 /* Encode the offset. */
12635 insn
|= residual
>> 2;
12637 bfd_put_32 (input_bfd
, insn
, hit_data
);
12639 return bfd_reloc_ok
;
12641 case R_ARM_THM_ALU_ABS_G0_NC
:
12642 case R_ARM_THM_ALU_ABS_G1_NC
:
12643 case R_ARM_THM_ALU_ABS_G2_NC
:
12644 case R_ARM_THM_ALU_ABS_G3_NC
:
12646 const int shift_array
[4] = {0, 8, 16, 24};
12647 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12648 bfd_vma addr
= value
;
12649 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12651 /* Compute address. */
12652 if (globals
->use_rel
)
12653 signed_addend
= insn
& 0xff;
12654 addr
+= signed_addend
;
12655 if (branch_type
== ST_BRANCH_TO_THUMB
)
12657 /* Clean imm8 insn. */
12659 /* And update with correct part of address. */
12660 insn
|= (addr
>> shift
) & 0xff;
12662 bfd_put_16 (input_bfd
, insn
, hit_data
);
12665 *unresolved_reloc_p
= FALSE
;
12666 return bfd_reloc_ok
;
12668 case R_ARM_GOTOFFFUNCDESC
:
12672 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12673 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12674 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12675 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12678 if (bfd_link_pic(info
) && dynindx
== 0)
12681 /* Resolve relocation. */
12682 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
)
12683 , contents
+ rel
->r_offset
);
12684 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12686 arm_elf_fill_funcdesc(output_bfd
, info
,
12687 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12688 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12693 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12697 /* For static binaries, sym_sec can be null. */
12700 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12701 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12709 if (bfd_link_pic(info
) && dynindx
== 0)
12712 /* This case cannot occur since funcdesc is allocated by
12713 the dynamic loader so we cannot resolve the relocation. */
12714 if (h
->dynindx
!= -1)
12717 /* Resolve relocation. */
12718 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
),
12719 contents
+ rel
->r_offset
);
12720 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12721 arm_elf_fill_funcdesc(output_bfd
, info
,
12722 &eh
->fdpic_cnts
.funcdesc_offset
,
12723 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12726 *unresolved_reloc_p
= FALSE
;
12727 return bfd_reloc_ok
;
12729 case R_ARM_GOTFUNCDESC
:
12733 Elf_Internal_Rela outrel
;
12735 /* Resolve relocation. */
12736 bfd_put_32(output_bfd
, ((eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1)
12737 + sgot
->output_offset
),
12738 contents
+ rel
->r_offset
);
12739 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12740 if(h
->dynindx
== -1)
12743 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12747 /* For static binaries sym_sec can be null. */
12750 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12751 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12759 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12760 arm_elf_fill_funcdesc(output_bfd
, info
,
12761 &eh
->fdpic_cnts
.funcdesc_offset
,
12762 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12765 /* Add a dynamic relocation on GOT entry if not already done. */
12766 if ((eh
->fdpic_cnts
.gotfuncdesc_offset
& 1) == 0)
12768 if (h
->dynindx
== -1)
12770 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12771 if (h
->root
.type
== bfd_link_hash_undefweak
)
12772 bfd_put_32(output_bfd
, 0, sgot
->contents
12773 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12775 bfd_put_32(output_bfd
, sgot
->output_section
->vma
12776 + sgot
->output_offset
12777 + (eh
->fdpic_cnts
.funcdesc_offset
& ~1),
12779 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12783 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12785 outrel
.r_offset
= sgot
->output_section
->vma
12786 + sgot
->output_offset
12787 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1);
12788 outrel
.r_addend
= 0;
12789 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
12790 if (h
->root
.type
== bfd_link_hash_undefweak
)
12791 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, -1);
12793 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
12796 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12797 eh
->fdpic_cnts
.gotfuncdesc_offset
|= 1;
12802 /* Such relocation on static function should not have been
12803 emitted by the compiler. */
12807 *unresolved_reloc_p
= FALSE
;
12808 return bfd_reloc_ok
;
12810 case R_ARM_FUNCDESC
:
12814 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12815 Elf_Internal_Rela outrel
;
12816 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12817 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12818 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12821 if (bfd_link_pic(info
) && dynindx
== 0)
12824 /* Replace static FUNCDESC relocation with a
12825 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12827 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12828 outrel
.r_offset
= input_section
->output_section
->vma
12829 + input_section
->output_offset
+ rel
->r_offset
;
12830 outrel
.r_addend
= 0;
12831 if (bfd_link_pic(info
))
12832 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12834 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12836 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12837 + sgot
->output_offset
+ offset
, hit_data
);
12839 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12840 arm_elf_fill_funcdesc(output_bfd
, info
,
12841 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12842 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12846 if (h
->dynindx
== -1)
12849 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12852 Elf_Internal_Rela outrel
;
12854 /* For static binaries sym_sec can be null. */
12857 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12858 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12866 if (bfd_link_pic(info
) && dynindx
== 0)
12869 /* Replace static FUNCDESC relocation with a
12870 R_ARM_RELATIVE dynamic relocation. */
12871 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12872 outrel
.r_offset
= input_section
->output_section
->vma
12873 + input_section
->output_offset
+ rel
->r_offset
;
12874 outrel
.r_addend
= 0;
12875 if (bfd_link_pic(info
))
12876 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12878 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12880 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12881 + sgot
->output_offset
+ offset
, hit_data
);
12883 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12884 arm_elf_fill_funcdesc(output_bfd
, info
,
12885 &eh
->fdpic_cnts
.funcdesc_offset
,
12886 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12890 Elf_Internal_Rela outrel
;
12892 /* Add a dynamic relocation. */
12893 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12894 outrel
.r_offset
= input_section
->output_section
->vma
12895 + input_section
->output_offset
+ rel
->r_offset
;
12896 outrel
.r_addend
= 0;
12897 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12901 *unresolved_reloc_p
= FALSE
;
12902 return bfd_reloc_ok
;
12904 case R_ARM_THM_BF16
:
12906 bfd_vma relocation
;
12907 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12908 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12910 if (globals
->use_rel
)
12912 bfd_vma immA
= (upper_insn
& 0x001f);
12913 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12914 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12915 addend
= (immA
<< 12);
12916 addend
|= (immB
<< 2);
12917 addend
|= (immC
<< 1);
12920 signed_addend
= (addend
& 0x10000) ? addend
- (1 << 17) : addend
;
12923 relocation
= value
+ signed_addend
;
12924 relocation
-= (input_section
->output_section
->vma
12925 + input_section
->output_offset
12928 /* Put RELOCATION back into the insn. */
12930 bfd_vma immA
= (relocation
& 0x0001f000) >> 12;
12931 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
12932 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
12934 upper_insn
= (upper_insn
& 0xffe0) | immA
;
12935 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
12938 /* Put the relocated value back in the object file: */
12939 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12940 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12942 return bfd_reloc_ok
;
12945 case R_ARM_THM_BF12
:
12947 bfd_vma relocation
;
12948 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12949 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12951 if (globals
->use_rel
)
12953 bfd_vma immA
= (upper_insn
& 0x0001);
12954 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12955 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12956 addend
= (immA
<< 12);
12957 addend
|= (immB
<< 2);
12958 addend
|= (immC
<< 1);
12961 addend
= (addend
& 0x1000) ? addend
- (1 << 13) : addend
;
12962 signed_addend
= addend
;
12965 relocation
= value
+ signed_addend
;
12966 relocation
-= (input_section
->output_section
->vma
12967 + input_section
->output_offset
12970 /* Put RELOCATION back into the insn. */
12972 bfd_vma immA
= (relocation
& 0x00001000) >> 12;
12973 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
12974 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
12976 upper_insn
= (upper_insn
& 0xfffe) | immA
;
12977 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
12980 /* Put the relocated value back in the object file: */
12981 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12982 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12984 return bfd_reloc_ok
;
12987 case R_ARM_THM_BF18
:
12989 bfd_vma relocation
;
12990 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12991 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12993 if (globals
->use_rel
)
12995 bfd_vma immA
= (upper_insn
& 0x007f);
12996 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12997 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12998 addend
= (immA
<< 12);
12999 addend
|= (immB
<< 2);
13000 addend
|= (immC
<< 1);
13003 addend
= (addend
& 0x40000) ? addend
- (1 << 19) : addend
;
13004 signed_addend
= addend
;
13007 relocation
= value
+ signed_addend
;
13008 relocation
-= (input_section
->output_section
->vma
13009 + input_section
->output_offset
13012 /* Put RELOCATION back into the insn. */
13014 bfd_vma immA
= (relocation
& 0x0007f000) >> 12;
13015 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
13016 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
13018 upper_insn
= (upper_insn
& 0xff80) | immA
;
13019 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
13022 /* Put the relocated value back in the object file: */
13023 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
13024 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
13026 return bfd_reloc_ok
;
13030 return bfd_reloc_notsupported
;
13034 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13036 arm_add_to_rel (bfd
* abfd
,
13037 bfd_byte
* address
,
13038 reloc_howto_type
* howto
,
13039 bfd_signed_vma increment
)
13041 bfd_signed_vma addend
;
13043 if (howto
->type
== R_ARM_THM_CALL
13044 || howto
->type
== R_ARM_THM_JUMP24
)
13046 int upper_insn
, lower_insn
;
13049 upper_insn
= bfd_get_16 (abfd
, address
);
13050 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
13051 upper
= upper_insn
& 0x7ff;
13052 lower
= lower_insn
& 0x7ff;
13054 addend
= (upper
<< 12) | (lower
<< 1);
13055 addend
+= increment
;
13058 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
13059 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
13061 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
13062 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
13068 contents
= bfd_get_32 (abfd
, address
);
13070 /* Get the (signed) value from the instruction. */
13071 addend
= contents
& howto
->src_mask
;
13072 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13074 bfd_signed_vma mask
;
13077 mask
&= ~ howto
->src_mask
;
13081 /* Add in the increment, (which is a byte value). */
13082 switch (howto
->type
)
13085 addend
+= increment
;
13092 addend
<<= howto
->size
;
13093 addend
+= increment
;
13095 /* Should we check for overflow here ? */
13097 /* Drop any undesired bits. */
13098 addend
>>= howto
->rightshift
;
13102 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
13104 bfd_put_32 (abfd
, contents
, address
);
13108 #define IS_ARM_TLS_RELOC(R_TYPE) \
13109 ((R_TYPE) == R_ARM_TLS_GD32 \
13110 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13111 || (R_TYPE) == R_ARM_TLS_LDO32 \
13112 || (R_TYPE) == R_ARM_TLS_LDM32 \
13113 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13114 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13115 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13116 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13117 || (R_TYPE) == R_ARM_TLS_LE32 \
13118 || (R_TYPE) == R_ARM_TLS_IE32 \
13119 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13120 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13122 /* Specific set of relocations for the gnu tls dialect. */
13123 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13124 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13125 || (R_TYPE) == R_ARM_TLS_CALL \
13126 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13127 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13128 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13130 /* Relocate an ARM ELF section. */
13133 elf32_arm_relocate_section (bfd
* output_bfd
,
13134 struct bfd_link_info
* info
,
13136 asection
* input_section
,
13137 bfd_byte
* contents
,
13138 Elf_Internal_Rela
* relocs
,
13139 Elf_Internal_Sym
* local_syms
,
13140 asection
** local_sections
)
13142 Elf_Internal_Shdr
*symtab_hdr
;
13143 struct elf_link_hash_entry
**sym_hashes
;
13144 Elf_Internal_Rela
*rel
;
13145 Elf_Internal_Rela
*relend
;
13147 struct elf32_arm_link_hash_table
* globals
;
13149 globals
= elf32_arm_hash_table (info
);
13150 if (globals
== NULL
)
13153 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
13154 sym_hashes
= elf_sym_hashes (input_bfd
);
13157 relend
= relocs
+ input_section
->reloc_count
;
13158 for (; rel
< relend
; rel
++)
13161 reloc_howto_type
* howto
;
13162 unsigned long r_symndx
;
13163 Elf_Internal_Sym
* sym
;
13165 struct elf_link_hash_entry
* h
;
13166 bfd_vma relocation
;
13167 bfd_reloc_status_type r
;
13170 bfd_boolean unresolved_reloc
= FALSE
;
13171 char *error_message
= NULL
;
13173 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13174 r_type
= ELF32_R_TYPE (rel
->r_info
);
13175 r_type
= arm_real_reloc_type (globals
, r_type
);
13177 if ( r_type
== R_ARM_GNU_VTENTRY
13178 || r_type
== R_ARM_GNU_VTINHERIT
)
13181 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
13184 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
13190 if (r_symndx
< symtab_hdr
->sh_info
)
13192 sym
= local_syms
+ r_symndx
;
13193 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
13194 sec
= local_sections
[r_symndx
];
13196 /* An object file might have a reference to a local
13197 undefined symbol. This is a daft object file, but we
13198 should at least do something about it. V4BX & NONE
13199 relocations do not use the symbol and are explicitly
13200 allowed to use the undefined symbol, so allow those.
13201 Likewise for relocations against STN_UNDEF. */
13202 if (r_type
!= R_ARM_V4BX
13203 && r_type
!= R_ARM_NONE
13204 && r_symndx
!= STN_UNDEF
13205 && bfd_is_und_section (sec
)
13206 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
13207 (*info
->callbacks
->undefined_symbol
)
13208 (info
, bfd_elf_string_from_elf_section
13209 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
13210 input_bfd
, input_section
,
13211 rel
->r_offset
, TRUE
);
13213 if (globals
->use_rel
)
13215 relocation
= (sec
->output_section
->vma
13216 + sec
->output_offset
13218 if (!bfd_link_relocatable (info
)
13219 && (sec
->flags
& SEC_MERGE
)
13220 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13223 bfd_vma addend
, value
;
13227 case R_ARM_MOVW_ABS_NC
:
13228 case R_ARM_MOVT_ABS
:
13229 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13230 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
13231 addend
= (addend
^ 0x8000) - 0x8000;
13234 case R_ARM_THM_MOVW_ABS_NC
:
13235 case R_ARM_THM_MOVT_ABS
:
13236 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
13238 value
|= bfd_get_16 (input_bfd
,
13239 contents
+ rel
->r_offset
+ 2);
13240 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
13241 | ((value
& 0x04000000) >> 15);
13242 addend
= (addend
^ 0x8000) - 0x8000;
13246 if (howto
->rightshift
13247 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
13250 /* xgettext:c-format */
13251 (_("%pB(%pA+%#" PRIx64
"): "
13252 "%s relocation against SEC_MERGE section"),
13253 input_bfd
, input_section
,
13254 (uint64_t) rel
->r_offset
, howto
->name
);
13258 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13260 /* Get the (signed) value from the instruction. */
13261 addend
= value
& howto
->src_mask
;
13262 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13264 bfd_signed_vma mask
;
13267 mask
&= ~ howto
->src_mask
;
13275 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
13277 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
13279 /* Cases here must match those in the preceding
13280 switch statement. */
13283 case R_ARM_MOVW_ABS_NC
:
13284 case R_ARM_MOVT_ABS
:
13285 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
13286 | (addend
& 0xfff);
13287 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13290 case R_ARM_THM_MOVW_ABS_NC
:
13291 case R_ARM_THM_MOVT_ABS
:
13292 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
13293 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
13294 bfd_put_16 (input_bfd
, value
>> 16,
13295 contents
+ rel
->r_offset
);
13296 bfd_put_16 (input_bfd
, value
,
13297 contents
+ rel
->r_offset
+ 2);
13301 value
= (value
& ~ howto
->dst_mask
)
13302 | (addend
& howto
->dst_mask
);
13303 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13309 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
13313 bfd_boolean warned
, ignored
;
13315 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
13316 r_symndx
, symtab_hdr
, sym_hashes
,
13317 h
, sec
, relocation
,
13318 unresolved_reloc
, warned
, ignored
);
13320 sym_type
= h
->type
;
13323 if (sec
!= NULL
&& discarded_section (sec
))
13324 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
13325 rel
, 1, relend
, howto
, 0, contents
);
13327 if (bfd_link_relocatable (info
))
13329 /* This is a relocatable link. We don't have to change
13330 anything, unless the reloc is against a section symbol,
13331 in which case we have to adjust according to where the
13332 section symbol winds up in the output section. */
13333 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13335 if (globals
->use_rel
)
13336 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
13337 howto
, (bfd_signed_vma
) sec
->output_offset
);
13339 rel
->r_addend
+= sec
->output_offset
;
13345 name
= h
->root
.root
.string
;
13348 name
= (bfd_elf_string_from_elf_section
13349 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
13350 if (name
== NULL
|| *name
== '\0')
13351 name
= bfd_section_name (sec
);
13354 if (r_symndx
!= STN_UNDEF
13355 && r_type
!= R_ARM_NONE
13357 || h
->root
.type
== bfd_link_hash_defined
13358 || h
->root
.type
== bfd_link_hash_defweak
)
13359 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
13362 ((sym_type
== STT_TLS
13363 /* xgettext:c-format */
13364 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
13365 /* xgettext:c-format */
13366 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
13369 (uint64_t) rel
->r_offset
,
13374 /* We call elf32_arm_final_link_relocate unless we're completely
13375 done, i.e., the relaxation produced the final output we want,
13376 and we won't let anybody mess with it. Also, we have to do
13377 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13378 both in relaxed and non-relaxed cases. */
13379 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
13380 || (IS_ARM_TLS_GNU_RELOC (r_type
)
13381 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
13382 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
13385 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
13386 contents
, rel
, h
== NULL
);
13387 /* This may have been marked unresolved because it came from
13388 a shared library. But we've just dealt with that. */
13389 unresolved_reloc
= 0;
13392 r
= bfd_reloc_continue
;
13394 if (r
== bfd_reloc_continue
)
13396 unsigned char branch_type
=
13397 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
13398 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
13400 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
13401 input_section
, contents
, rel
,
13402 relocation
, info
, sec
, name
,
13403 sym_type
, branch_type
, h
,
13408 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13409 because such sections are not SEC_ALLOC and thus ld.so will
13410 not process them. */
13411 if (unresolved_reloc
13412 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
13414 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
13415 rel
->r_offset
) != (bfd_vma
) -1)
13418 /* xgettext:c-format */
13419 (_("%pB(%pA+%#" PRIx64
"): "
13420 "unresolvable %s relocation against symbol `%s'"),
13423 (uint64_t) rel
->r_offset
,
13425 h
->root
.root
.string
);
13429 if (r
!= bfd_reloc_ok
)
13433 case bfd_reloc_overflow
:
13434 /* If the overflowing reloc was to an undefined symbol,
13435 we have already printed one error message and there
13436 is no point complaining again. */
13437 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
13438 (*info
->callbacks
->reloc_overflow
)
13439 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
13440 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
13443 case bfd_reloc_undefined
:
13444 (*info
->callbacks
->undefined_symbol
)
13445 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
13448 case bfd_reloc_outofrange
:
13449 error_message
= _("out of range");
13452 case bfd_reloc_notsupported
:
13453 error_message
= _("unsupported relocation");
13456 case bfd_reloc_dangerous
:
13457 /* error_message should already be set. */
13461 error_message
= _("unknown error");
13462 /* Fall through. */
13465 BFD_ASSERT (error_message
!= NULL
);
13466 (*info
->callbacks
->reloc_dangerous
)
13467 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
13476 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13477 adds the edit to the start of the list. (The list must be built in order of
13478 ascending TINDEX: the function's callers are primarily responsible for
13479 maintaining that condition). */
13482 add_unwind_table_edit (arm_unwind_table_edit
**head
,
13483 arm_unwind_table_edit
**tail
,
13484 arm_unwind_edit_type type
,
13485 asection
*linked_section
,
13486 unsigned int tindex
)
13488 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
13489 xmalloc (sizeof (arm_unwind_table_edit
));
13491 new_edit
->type
= type
;
13492 new_edit
->linked_section
= linked_section
;
13493 new_edit
->index
= tindex
;
13497 new_edit
->next
= NULL
;
13500 (*tail
)->next
= new_edit
;
13502 (*tail
) = new_edit
;
13505 (*head
) = new_edit
;
13509 new_edit
->next
= *head
;
13518 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
13520 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13522 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
13526 if (!exidx_sec
->rawsize
)
13527 exidx_sec
->rawsize
= exidx_sec
->size
;
13529 bfd_set_section_size (exidx_sec
, exidx_sec
->size
+ adjust
);
13530 out_sec
= exidx_sec
->output_section
;
13531 /* Adjust size of output section. */
13532 bfd_set_section_size (out_sec
, out_sec
->size
+adjust
);
13535 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13537 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
13539 struct _arm_elf_section_data
*exidx_arm_data
;
13541 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13542 add_unwind_table_edit (
13543 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
13544 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
13545 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
13547 exidx_arm_data
->additional_reloc_count
++;
13549 adjust_exidx_size(exidx_sec
, 8);
13552 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13553 made to those tables, such that:
13555 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13556 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13557 codes which have been inlined into the index).
13559 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13561 The edits are applied when the tables are written
13562 (in elf32_arm_write_section). */
13565 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
13566 unsigned int num_text_sections
,
13567 struct bfd_link_info
*info
,
13568 bfd_boolean merge_exidx_entries
)
13571 unsigned int last_second_word
= 0, i
;
13572 asection
*last_exidx_sec
= NULL
;
13573 asection
*last_text_sec
= NULL
;
13574 int last_unwind_type
= -1;
13576 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13578 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
13582 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
13584 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
13585 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
13587 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
13590 if (elf_sec
->linked_to
)
13592 Elf_Internal_Shdr
*linked_hdr
13593 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
13594 struct _arm_elf_section_data
*linked_sec_arm_data
13595 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
13597 if (linked_sec_arm_data
== NULL
)
13600 /* Link this .ARM.exidx section back from the text section it
13602 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
13607 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13608 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13609 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13611 for (i
= 0; i
< num_text_sections
; i
++)
13613 asection
*sec
= text_section_order
[i
];
13614 asection
*exidx_sec
;
13615 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
13616 struct _arm_elf_section_data
*exidx_arm_data
;
13617 bfd_byte
*contents
= NULL
;
13618 int deleted_exidx_bytes
= 0;
13620 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
13621 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
13622 Elf_Internal_Shdr
*hdr
;
13625 if (arm_data
== NULL
)
13628 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
13629 if (exidx_sec
== NULL
)
13631 /* Section has no unwind data. */
13632 if (last_unwind_type
== 0 || !last_exidx_sec
)
13635 /* Ignore zero sized sections. */
13636 if (sec
->size
== 0)
13639 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13640 last_unwind_type
= 0;
13644 /* Skip /DISCARD/ sections. */
13645 if (bfd_is_abs_section (exidx_sec
->output_section
))
13648 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
13649 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
13652 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13653 if (exidx_arm_data
== NULL
)
13656 ibfd
= exidx_sec
->owner
;
13658 if (hdr
->contents
!= NULL
)
13659 contents
= hdr
->contents
;
13660 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
13664 if (last_unwind_type
> 0)
13666 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
13667 /* Add cantunwind if first unwind item does not match section
13669 if (first_word
!= sec
->vma
)
13671 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
13672 last_unwind_type
= 0;
13676 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
13678 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
13682 /* An EXIDX_CANTUNWIND entry. */
13683 if (second_word
== 1)
13685 if (last_unwind_type
== 0)
13689 /* Inlined unwinding data. Merge if equal to previous. */
13690 else if ((second_word
& 0x80000000) != 0)
13692 if (merge_exidx_entries
13693 && last_second_word
== second_word
&& last_unwind_type
== 1)
13696 last_second_word
= second_word
;
13698 /* Normal table entry. In theory we could merge these too,
13699 but duplicate entries are likely to be much less common. */
13703 if (elide
&& !bfd_link_relocatable (info
))
13705 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
13706 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
13708 deleted_exidx_bytes
+= 8;
13711 last_unwind_type
= unwind_type
;
13714 /* Free contents if we allocated it ourselves. */
13715 if (contents
!= hdr
->contents
)
13718 /* Record edits to be applied later (in elf32_arm_write_section). */
13719 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
13720 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
13722 if (deleted_exidx_bytes
> 0)
13723 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
13725 last_exidx_sec
= exidx_sec
;
13726 last_text_sec
= sec
;
13729 /* Add terminating CANTUNWIND entry. */
13730 if (!bfd_link_relocatable (info
) && last_exidx_sec
13731 && last_unwind_type
!= 0)
13732 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13738 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
13739 bfd
*ibfd
, const char *name
)
13741 asection
*sec
, *osec
;
13743 sec
= bfd_get_linker_section (ibfd
, name
);
13744 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
13747 osec
= sec
->output_section
;
13748 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
13751 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
13752 sec
->output_offset
, sec
->size
))
13759 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
13761 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
13762 asection
*sec
, *osec
;
13764 if (globals
== NULL
)
13767 /* Invoke the regular ELF backend linker to do all the work. */
13768 if (!bfd_elf_final_link (abfd
, info
))
13771 /* Process stub sections (eg BE8 encoding, ...). */
13772 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
13774 for (i
=0; i
<htab
->top_id
; i
++)
13776 sec
= htab
->stub_group
[i
].stub_sec
;
13777 /* Only process it once, in its link_sec slot. */
13778 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
13780 osec
= sec
->output_section
;
13781 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
13782 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
13783 sec
->output_offset
, sec
->size
))
13788 /* Write out any glue sections now that we have created all the
13790 if (globals
->bfd_of_glue_owner
!= NULL
)
13792 if (! elf32_arm_output_glue_section (info
, abfd
,
13793 globals
->bfd_of_glue_owner
,
13794 ARM2THUMB_GLUE_SECTION_NAME
))
13797 if (! elf32_arm_output_glue_section (info
, abfd
,
13798 globals
->bfd_of_glue_owner
,
13799 THUMB2ARM_GLUE_SECTION_NAME
))
13802 if (! elf32_arm_output_glue_section (info
, abfd
,
13803 globals
->bfd_of_glue_owner
,
13804 VFP11_ERRATUM_VENEER_SECTION_NAME
))
13807 if (! elf32_arm_output_glue_section (info
, abfd
,
13808 globals
->bfd_of_glue_owner
,
13809 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
13812 if (! elf32_arm_output_glue_section (info
, abfd
,
13813 globals
->bfd_of_glue_owner
,
13814 ARM_BX_GLUE_SECTION_NAME
))
13821 /* Return a best guess for the machine number based on the attributes. */
13823 static unsigned int
13824 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
13826 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
13830 case TAG_CPU_ARCH_PRE_V4
: return bfd_mach_arm_3M
;
13831 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
13832 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
13833 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
13835 case TAG_CPU_ARCH_V5TE
:
13839 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13840 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
13844 if (strcmp (name
, "IWMMXT2") == 0)
13845 return bfd_mach_arm_iWMMXt2
;
13847 if (strcmp (name
, "IWMMXT") == 0)
13848 return bfd_mach_arm_iWMMXt
;
13850 if (strcmp (name
, "XSCALE") == 0)
13854 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13855 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13858 case 1: return bfd_mach_arm_iWMMXt
;
13859 case 2: return bfd_mach_arm_iWMMXt2
;
13860 default: return bfd_mach_arm_XScale
;
13865 return bfd_mach_arm_5TE
;
13868 case TAG_CPU_ARCH_V5TEJ
:
13869 return bfd_mach_arm_5TEJ
;
13870 case TAG_CPU_ARCH_V6
:
13871 return bfd_mach_arm_6
;
13872 case TAG_CPU_ARCH_V6KZ
:
13873 return bfd_mach_arm_6KZ
;
13874 case TAG_CPU_ARCH_V6T2
:
13875 return bfd_mach_arm_6T2
;
13876 case TAG_CPU_ARCH_V6K
:
13877 return bfd_mach_arm_6K
;
13878 case TAG_CPU_ARCH_V7
:
13879 return bfd_mach_arm_7
;
13880 case TAG_CPU_ARCH_V6_M
:
13881 return bfd_mach_arm_6M
;
13882 case TAG_CPU_ARCH_V6S_M
:
13883 return bfd_mach_arm_6SM
;
13884 case TAG_CPU_ARCH_V7E_M
:
13885 return bfd_mach_arm_7EM
;
13886 case TAG_CPU_ARCH_V8
:
13887 return bfd_mach_arm_8
;
13888 case TAG_CPU_ARCH_V8R
:
13889 return bfd_mach_arm_8R
;
13890 case TAG_CPU_ARCH_V8M_BASE
:
13891 return bfd_mach_arm_8M_BASE
;
13892 case TAG_CPU_ARCH_V8M_MAIN
:
13893 return bfd_mach_arm_8M_MAIN
;
13894 case TAG_CPU_ARCH_V8_1M_MAIN
:
13895 return bfd_mach_arm_8_1M_MAIN
;
13898 /* Force entry to be added for any new known Tag_CPU_arch value. */
13899 BFD_ASSERT (arch
> MAX_TAG_CPU_ARCH
);
13901 /* Unknown Tag_CPU_arch value. */
13902 return bfd_mach_arm_unknown
;
13906 /* Set the right machine number. */
13909 elf32_arm_object_p (bfd
*abfd
)
13913 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13915 if (mach
== bfd_mach_arm_unknown
)
13917 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13918 mach
= bfd_mach_arm_ep9312
;
13920 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13923 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13927 /* Function to keep ARM specific flags in the ELF header. */
13930 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13932 if (elf_flags_init (abfd
)
13933 && elf_elfheader (abfd
)->e_flags
!= flags
)
13935 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13937 if (flags
& EF_ARM_INTERWORK
)
13939 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13943 (_("warning: clearing the interworking flag of %pB due to outside request"),
13949 elf_elfheader (abfd
)->e_flags
= flags
;
13950 elf_flags_init (abfd
) = TRUE
;
13956 /* Copy backend specific data from one object module to another. */
13959 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13962 flagword out_flags
;
13964 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13967 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13968 out_flags
= elf_elfheader (obfd
)->e_flags
;
13970 if (elf_flags_init (obfd
)
13971 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
13972 && in_flags
!= out_flags
)
13974 /* Cannot mix APCS26 and APCS32 code. */
13975 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
13978 /* Cannot mix float APCS and non-float APCS code. */
13979 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
13982 /* If the src and dest have different interworking flags
13983 then turn off the interworking bit. */
13984 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
13986 if (out_flags
& EF_ARM_INTERWORK
)
13988 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13991 in_flags
&= ~EF_ARM_INTERWORK
;
13994 /* Likewise for PIC, though don't warn for this case. */
13995 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
13996 in_flags
&= ~EF_ARM_PIC
;
13999 elf_elfheader (obfd
)->e_flags
= in_flags
;
14000 elf_flags_init (obfd
) = TRUE
;
14002 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
14005 /* Values for Tag_ABI_PCS_R9_use. */
14014 /* Values for Tag_ABI_PCS_RW_data. */
14017 AEABI_PCS_RW_data_absolute
,
14018 AEABI_PCS_RW_data_PCrel
,
14019 AEABI_PCS_RW_data_SBrel
,
14020 AEABI_PCS_RW_data_unused
14023 /* Values for Tag_ABI_enum_size. */
14029 AEABI_enum_forced_wide
14032 /* Determine whether an object attribute tag takes an integer, a
14036 elf32_arm_obj_attrs_arg_type (int tag
)
14038 if (tag
== Tag_compatibility
)
14039 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
14040 else if (tag
== Tag_nodefaults
)
14041 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
14042 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
14043 return ATTR_TYPE_FLAG_STR_VAL
;
14045 return ATTR_TYPE_FLAG_INT_VAL
;
14047 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
14050 /* The ABI defines that Tag_conformance should be emitted first, and that
14051 Tag_nodefaults should be second (if either is defined). This sets those
14052 two positions, and bumps up the position of all the remaining tags to
14055 elf32_arm_obj_attrs_order (int num
)
14057 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
14058 return Tag_conformance
;
14059 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
14060 return Tag_nodefaults
;
14061 if ((num
- 2) < Tag_nodefaults
)
14063 if ((num
- 1) < Tag_conformance
)
14068 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14070 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
14072 if ((tag
& 127) < 64)
14075 (_("%pB: unknown mandatory EABI object attribute %d"),
14077 bfd_set_error (bfd_error_bad_value
);
14083 (_("warning: %pB: unknown EABI object attribute %d"),
14089 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14090 Returns -1 if no architecture could be read. */
14093 get_secondary_compatible_arch (bfd
*abfd
)
14095 obj_attribute
*attr
=
14096 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14098 /* Note: the tag and its argument below are uleb128 values, though
14099 currently-defined values fit in one byte for each. */
14101 && attr
->s
[0] == Tag_CPU_arch
14102 && (attr
->s
[1] & 128) != 128
14103 && attr
->s
[2] == 0)
14106 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14110 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14111 The tag is removed if ARCH is -1. */
14114 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
14116 obj_attribute
*attr
=
14117 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14125 /* Note: the tag and its argument below are uleb128 values, though
14126 currently-defined values fit in one byte for each. */
14128 attr
->s
= (char *) bfd_alloc (abfd
, 3);
14129 attr
->s
[0] = Tag_CPU_arch
;
14134 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14138 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
14139 int newtag
, int secondary_compat
)
14141 #define T(X) TAG_CPU_ARCH_##X
14142 int tagl
, tagh
, result
;
14145 T(V6T2
), /* PRE_V4. */
14147 T(V6T2
), /* V4T. */
14148 T(V6T2
), /* V5T. */
14149 T(V6T2
), /* V5TE. */
14150 T(V6T2
), /* V5TEJ. */
14153 T(V6T2
) /* V6T2. */
14157 T(V6K
), /* PRE_V4. */
14161 T(V6K
), /* V5TE. */
14162 T(V6K
), /* V5TEJ. */
14164 T(V6KZ
), /* V6KZ. */
14170 T(V7
), /* PRE_V4. */
14175 T(V7
), /* V5TEJ. */
14188 T(V6K
), /* V5TE. */
14189 T(V6K
), /* V5TEJ. */
14191 T(V6KZ
), /* V6KZ. */
14195 T(V6_M
) /* V6_M. */
14197 const int v6s_m
[] =
14203 T(V6K
), /* V5TE. */
14204 T(V6K
), /* V5TEJ. */
14206 T(V6KZ
), /* V6KZ. */
14210 T(V6S_M
), /* V6_M. */
14211 T(V6S_M
) /* V6S_M. */
14213 const int v7e_m
[] =
14217 T(V7E_M
), /* V4T. */
14218 T(V7E_M
), /* V5T. */
14219 T(V7E_M
), /* V5TE. */
14220 T(V7E_M
), /* V5TEJ. */
14221 T(V7E_M
), /* V6. */
14222 T(V7E_M
), /* V6KZ. */
14223 T(V7E_M
), /* V6T2. */
14224 T(V7E_M
), /* V6K. */
14225 T(V7E_M
), /* V7. */
14226 T(V7E_M
), /* V6_M. */
14227 T(V7E_M
), /* V6S_M. */
14228 T(V7E_M
) /* V7E_M. */
14232 T(V8
), /* PRE_V4. */
14237 T(V8
), /* V5TEJ. */
14244 T(V8
), /* V6S_M. */
14245 T(V8
), /* V7E_M. */
14250 T(V8R
), /* PRE_V4. */
14254 T(V8R
), /* V5TE. */
14255 T(V8R
), /* V5TEJ. */
14257 T(V8R
), /* V6KZ. */
14258 T(V8R
), /* V6T2. */
14261 T(V8R
), /* V6_M. */
14262 T(V8R
), /* V6S_M. */
14263 T(V8R
), /* V7E_M. */
14267 const int v8m_baseline
[] =
14280 T(V8M_BASE
), /* V6_M. */
14281 T(V8M_BASE
), /* V6S_M. */
14285 T(V8M_BASE
) /* V8-M BASELINE. */
14287 const int v8m_mainline
[] =
14299 T(V8M_MAIN
), /* V7. */
14300 T(V8M_MAIN
), /* V6_M. */
14301 T(V8M_MAIN
), /* V6S_M. */
14302 T(V8M_MAIN
), /* V7E_M. */
14305 T(V8M_MAIN
), /* V8-M BASELINE. */
14306 T(V8M_MAIN
) /* V8-M MAINLINE. */
14308 const int v8_1m_mainline
[] =
14320 T(V8_1M_MAIN
), /* V7. */
14321 T(V8_1M_MAIN
), /* V6_M. */
14322 T(V8_1M_MAIN
), /* V6S_M. */
14323 T(V8_1M_MAIN
), /* V7E_M. */
14326 T(V8_1M_MAIN
), /* V8-M BASELINE. */
14327 T(V8_1M_MAIN
), /* V8-M MAINLINE. */
14328 -1, /* Unused (18). */
14329 -1, /* Unused (19). */
14330 -1, /* Unused (20). */
14331 T(V8_1M_MAIN
) /* V8.1-M MAINLINE. */
14333 const int v4t_plus_v6_m
[] =
14339 T(V5TE
), /* V5TE. */
14340 T(V5TEJ
), /* V5TEJ. */
14342 T(V6KZ
), /* V6KZ. */
14343 T(V6T2
), /* V6T2. */
14346 T(V6_M
), /* V6_M. */
14347 T(V6S_M
), /* V6S_M. */
14348 T(V7E_M
), /* V7E_M. */
14351 T(V8M_BASE
), /* V8-M BASELINE. */
14352 T(V8M_MAIN
), /* V8-M MAINLINE. */
14353 -1, /* Unused (18). */
14354 -1, /* Unused (19). */
14355 -1, /* Unused (20). */
14356 T(V8_1M_MAIN
), /* V8.1-M MAINLINE. */
14357 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
14359 const int *comb
[] =
14375 /* Pseudo-architecture. */
14379 /* Check we've not got a higher architecture than we know about. */
14381 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
14383 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
14387 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14389 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
14390 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
14391 oldtag
= T(V4T_PLUS_V6_M
);
14393 /* And override the new tag if we have a Tag_also_compatible_with on the
14396 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
14397 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
14398 newtag
= T(V4T_PLUS_V6_M
);
14400 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
14401 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
14403 /* Architectures before V6KZ add features monotonically. */
14404 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
14407 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
14409 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14410 as the canonical version. */
14411 if (result
== T(V4T_PLUS_V6_M
))
14414 *secondary_compat_out
= T(V6_M
);
14417 *secondary_compat_out
= -1;
14421 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14422 ibfd
, oldtag
, newtag
);
14430 /* Query attributes object to see if integer divide instructions may be
14431 present in an object. */
14433 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
14435 int arch
= attr
[Tag_CPU_arch
].i
;
14436 int profile
= attr
[Tag_CPU_arch_profile
].i
;
14438 switch (attr
[Tag_DIV_use
].i
)
14441 /* Integer divide allowed if instruction contained in archetecture. */
14442 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
14444 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
14450 /* Integer divide explicitly prohibited. */
14454 /* Unrecognised case - treat as allowing divide everywhere. */
14456 /* Integer divide allowed in ARM state. */
14461 /* Query attributes object to see if integer divide instructions are
14462 forbidden to be in the object. This is not the inverse of
14463 elf32_arm_attributes_accept_div. */
14465 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
14467 return attr
[Tag_DIV_use
].i
== 1;
14470 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14471 are conflicting attributes. */
14474 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
14476 bfd
*obfd
= info
->output_bfd
;
14477 obj_attribute
*in_attr
;
14478 obj_attribute
*out_attr
;
14479 /* Some tags have 0 = don't care, 1 = strong requirement,
14480 2 = weak requirement. */
14481 static const int order_021
[3] = {0, 2, 1};
14483 bfd_boolean result
= TRUE
;
14484 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
14486 /* Skip the linker stubs file. This preserves previous behavior
14487 of accepting unknown attributes in the first input file - but
14489 if (ibfd
->flags
& BFD_LINKER_CREATED
)
14492 /* Skip any input that hasn't attribute section.
14493 This enables to link object files without attribute section with
14495 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
14498 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
14500 /* This is the first object. Copy the attributes. */
14501 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
14503 out_attr
= elf_known_obj_attributes_proc (obfd
);
14505 /* Use the Tag_null value to indicate the attributes have been
14509 /* We do not output objects with Tag_MPextension_use_legacy - we move
14510 the attribute's value to Tag_MPextension_use. */
14511 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
14513 if (out_attr
[Tag_MPextension_use
].i
!= 0
14514 && out_attr
[Tag_MPextension_use_legacy
].i
14515 != out_attr
[Tag_MPextension_use
].i
)
14518 (_("Error: %pB has both the current and legacy "
14519 "Tag_MPextension_use attributes"), ibfd
);
14523 out_attr
[Tag_MPextension_use
] =
14524 out_attr
[Tag_MPextension_use_legacy
];
14525 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
14526 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
14532 in_attr
= elf_known_obj_attributes_proc (ibfd
);
14533 out_attr
= elf_known_obj_attributes_proc (obfd
);
14534 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14535 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
14537 /* Ignore mismatches if the object doesn't use floating point or is
14538 floating point ABI independent. */
14539 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
14540 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14541 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
14542 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
14543 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14544 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
14547 (_("error: %pB uses VFP register arguments, %pB does not"),
14548 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
14549 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
14554 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
14556 /* Merge this attribute with existing attributes. */
14559 case Tag_CPU_raw_name
:
14561 /* These are merged after Tag_CPU_arch. */
14564 case Tag_ABI_optimization_goals
:
14565 case Tag_ABI_FP_optimization_goals
:
14566 /* Use the first value seen. */
14571 int secondary_compat
= -1, secondary_compat_out
= -1;
14572 unsigned int saved_out_attr
= out_attr
[i
].i
;
14574 static const char *name_table
[] =
14576 /* These aren't real CPU names, but we can't guess
14577 that from the architecture version alone. */
14593 "ARM v8-M.baseline",
14594 "ARM v8-M.mainline",
14597 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14598 secondary_compat
= get_secondary_compatible_arch (ibfd
);
14599 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
14600 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
14601 &secondary_compat_out
,
14605 /* Return with error if failed to merge. */
14606 if (arch_attr
== -1)
14609 out_attr
[i
].i
= arch_attr
;
14611 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
14613 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14614 if (out_attr
[i
].i
== saved_out_attr
)
14615 ; /* Leave the names alone. */
14616 else if (out_attr
[i
].i
== in_attr
[i
].i
)
14618 /* The output architecture has been changed to match the
14619 input architecture. Use the input names. */
14620 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
14621 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
14623 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
14624 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
14629 out_attr
[Tag_CPU_name
].s
= NULL
;
14630 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
14633 /* If we still don't have a value for Tag_CPU_name,
14634 make one up now. Tag_CPU_raw_name remains blank. */
14635 if (out_attr
[Tag_CPU_name
].s
== NULL
14636 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
14637 out_attr
[Tag_CPU_name
].s
=
14638 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
14642 case Tag_ARM_ISA_use
:
14643 case Tag_THUMB_ISA_use
:
14644 case Tag_WMMX_arch
:
14645 case Tag_Advanced_SIMD_arch
:
14646 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14647 case Tag_ABI_FP_rounding
:
14648 case Tag_ABI_FP_exceptions
:
14649 case Tag_ABI_FP_user_exceptions
:
14650 case Tag_ABI_FP_number_model
:
14651 case Tag_FP_HP_extension
:
14652 case Tag_CPU_unaligned_access
:
14654 case Tag_MPextension_use
:
14656 /* Use the largest value specified. */
14657 if (in_attr
[i
].i
> out_attr
[i
].i
)
14658 out_attr
[i
].i
= in_attr
[i
].i
;
14661 case Tag_ABI_align_preserved
:
14662 case Tag_ABI_PCS_RO_data
:
14663 /* Use the smallest value specified. */
14664 if (in_attr
[i
].i
< out_attr
[i
].i
)
14665 out_attr
[i
].i
= in_attr
[i
].i
;
14668 case Tag_ABI_align_needed
:
14669 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
14670 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
14671 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
14673 /* This error message should be enabled once all non-conformant
14674 binaries in the toolchain have had the attributes set
14677 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14681 /* Fall through. */
14682 case Tag_ABI_FP_denormal
:
14683 case Tag_ABI_PCS_GOT_use
:
14684 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14685 value if greater than 2 (for future-proofing). */
14686 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
14687 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
14688 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
14689 out_attr
[i
].i
= in_attr
[i
].i
;
14692 case Tag_Virtualization_use
:
14693 /* The virtualization tag effectively stores two bits of
14694 information: the intended use of TrustZone (in bit 0), and the
14695 intended use of Virtualization (in bit 1). */
14696 if (out_attr
[i
].i
== 0)
14697 out_attr
[i
].i
= in_attr
[i
].i
;
14698 else if (in_attr
[i
].i
!= 0
14699 && in_attr
[i
].i
!= out_attr
[i
].i
)
14701 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
14706 (_("error: %pB: unable to merge virtualization attributes "
14714 case Tag_CPU_arch_profile
:
14715 if (out_attr
[i
].i
!= in_attr
[i
].i
)
14717 /* 0 will merge with anything.
14718 'A' and 'S' merge to 'A'.
14719 'R' and 'S' merge to 'R'.
14720 'M' and 'A|R|S' is an error. */
14721 if (out_attr
[i
].i
== 0
14722 || (out_attr
[i
].i
== 'S'
14723 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
14724 out_attr
[i
].i
= in_attr
[i
].i
;
14725 else if (in_attr
[i
].i
== 0
14726 || (in_attr
[i
].i
== 'S'
14727 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
14728 ; /* Do nothing. */
14732 (_("error: %pB: conflicting architecture profiles %c/%c"),
14734 in_attr
[i
].i
? in_attr
[i
].i
: '0',
14735 out_attr
[i
].i
? out_attr
[i
].i
: '0');
14741 case Tag_DSP_extension
:
14742 /* No need to change output value if any of:
14743 - pre (<=) ARMv5T input architecture (do not have DSP)
14744 - M input profile not ARMv7E-M and do not have DSP. */
14745 if (in_attr
[Tag_CPU_arch
].i
<= 3
14746 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
14747 && in_attr
[Tag_CPU_arch
].i
!= 13
14748 && in_attr
[i
].i
== 0))
14749 ; /* Do nothing. */
14750 /* Output value should be 0 if DSP part of architecture, ie.
14751 - post (>=) ARMv5te architecture output
14752 - A, R or S profile output or ARMv7E-M output architecture. */
14753 else if (out_attr
[Tag_CPU_arch
].i
>= 4
14754 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
14755 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
14756 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
14757 || out_attr
[Tag_CPU_arch
].i
== 13))
14759 /* Otherwise, DSP instructions are added and not part of output
14767 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14768 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14769 when it's 0. It might mean absence of FP hardware if
14770 Tag_FP_arch is zero. */
14772 #define VFP_VERSION_COUNT 9
14773 static const struct
14777 } vfp_versions
[VFP_VERSION_COUNT
] =
14793 /* If the output has no requirement about FP hardware,
14794 follow the requirement of the input. */
14795 if (out_attr
[i
].i
== 0)
14797 /* This assert is still reasonable, we shouldn't
14798 produce the suspicious build attribute
14799 combination (See below for in_attr). */
14800 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
14801 out_attr
[i
].i
= in_attr
[i
].i
;
14802 out_attr
[Tag_ABI_HardFP_use
].i
14803 = in_attr
[Tag_ABI_HardFP_use
].i
;
14806 /* If the input has no requirement about FP hardware, do
14808 else if (in_attr
[i
].i
== 0)
14810 /* We used to assert that Tag_ABI_HardFP_use was
14811 zero here, but we should never assert when
14812 consuming an object file that has suspicious
14813 build attributes. The single precision variant
14814 of 'no FP architecture' is still 'no FP
14815 architecture', so we just ignore the tag in this
14820 /* Both the input and the output have nonzero Tag_FP_arch.
14821 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14823 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14825 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
14826 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
14828 /* If the input and the output have different Tag_ABI_HardFP_use,
14829 the combination of them is 0 (implied by Tag_FP_arch). */
14830 else if (in_attr
[Tag_ABI_HardFP_use
].i
14831 != out_attr
[Tag_ABI_HardFP_use
].i
)
14832 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
14834 /* Now we can handle Tag_FP_arch. */
14836 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14837 pick the biggest. */
14838 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
14839 && in_attr
[i
].i
> out_attr
[i
].i
)
14841 out_attr
[i
] = in_attr
[i
];
14844 /* The output uses the superset of input features
14845 (ISA version) and registers. */
14846 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
14847 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
14848 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
14849 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
14850 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
14851 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
14852 /* This assumes all possible supersets are also a valid
14854 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
14856 if (regs
== vfp_versions
[newval
].regs
14857 && ver
== vfp_versions
[newval
].ver
)
14860 out_attr
[i
].i
= newval
;
14863 case Tag_PCS_config
:
14864 if (out_attr
[i
].i
== 0)
14865 out_attr
[i
].i
= in_attr
[i
].i
;
14866 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
14868 /* It's sometimes ok to mix different configs, so this is only
14871 (_("warning: %pB: conflicting platform configuration"), ibfd
);
14874 case Tag_ABI_PCS_R9_use
:
14875 if (in_attr
[i
].i
!= out_attr
[i
].i
14876 && out_attr
[i
].i
!= AEABI_R9_unused
14877 && in_attr
[i
].i
!= AEABI_R9_unused
)
14880 (_("error: %pB: conflicting use of R9"), ibfd
);
14883 if (out_attr
[i
].i
== AEABI_R9_unused
)
14884 out_attr
[i
].i
= in_attr
[i
].i
;
14886 case Tag_ABI_PCS_RW_data
:
14887 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
14888 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
14889 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
14892 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14896 /* Use the smallest value specified. */
14897 if (in_attr
[i
].i
< out_attr
[i
].i
)
14898 out_attr
[i
].i
= in_attr
[i
].i
;
14900 case Tag_ABI_PCS_wchar_t
:
14901 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
14902 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
14905 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14906 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
14908 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
14909 out_attr
[i
].i
= in_attr
[i
].i
;
14911 case Tag_ABI_enum_size
:
14912 if (in_attr
[i
].i
!= AEABI_enum_unused
)
14914 if (out_attr
[i
].i
== AEABI_enum_unused
14915 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
14917 /* The existing object is compatible with anything.
14918 Use whatever requirements the new object has. */
14919 out_attr
[i
].i
= in_attr
[i
].i
;
14921 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14922 && out_attr
[i
].i
!= in_attr
[i
].i
14923 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14925 static const char *aeabi_enum_names
[] =
14926 { "", "variable-size", "32-bit", "" };
14927 const char *in_name
=
14928 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14929 ? aeabi_enum_names
[in_attr
[i
].i
]
14931 const char *out_name
=
14932 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14933 ? aeabi_enum_names
[out_attr
[i
].i
]
14936 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14937 ibfd
, in_name
, out_name
);
14941 case Tag_ABI_VFP_args
:
14944 case Tag_ABI_WMMX_args
:
14945 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14948 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14953 case Tag_compatibility
:
14954 /* Merged in target-independent code. */
14956 case Tag_ABI_HardFP_use
:
14957 /* This is handled along with Tag_FP_arch. */
14959 case Tag_ABI_FP_16bit_format
:
14960 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14962 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14965 (_("error: fp16 format mismatch between %pB and %pB"),
14970 if (in_attr
[i
].i
!= 0)
14971 out_attr
[i
].i
= in_attr
[i
].i
;
14975 /* A value of zero on input means that the divide instruction may
14976 be used if available in the base architecture as specified via
14977 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14978 the user did not want divide instructions. A value of 2
14979 explicitly means that divide instructions were allowed in ARM
14980 and Thumb state. */
14981 if (in_attr
[i
].i
== out_attr
[i
].i
)
14982 /* Do nothing. */ ;
14983 else if (elf32_arm_attributes_forbid_div (in_attr
)
14984 && !elf32_arm_attributes_accept_div (out_attr
))
14986 else if (elf32_arm_attributes_forbid_div (out_attr
)
14987 && elf32_arm_attributes_accept_div (in_attr
))
14988 out_attr
[i
].i
= in_attr
[i
].i
;
14989 else if (in_attr
[i
].i
== 2)
14990 out_attr
[i
].i
= in_attr
[i
].i
;
14993 case Tag_MPextension_use_legacy
:
14994 /* We don't output objects with Tag_MPextension_use_legacy - we
14995 move the value to Tag_MPextension_use. */
14996 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
14998 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
15001 (_("%pB has both the current and legacy "
15002 "Tag_MPextension_use attributes"),
15008 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
15009 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
15013 case Tag_nodefaults
:
15014 /* This tag is set if it exists, but the value is unused (and is
15015 typically zero). We don't actually need to do anything here -
15016 the merge happens automatically when the type flags are merged
15019 case Tag_also_compatible_with
:
15020 /* Already done in Tag_CPU_arch. */
15022 case Tag_conformance
:
15023 /* Keep the attribute if it matches. Throw it away otherwise.
15024 No attribute means no claim to conform. */
15025 if (!in_attr
[i
].s
|| !out_attr
[i
].s
15026 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
15027 out_attr
[i
].s
= NULL
;
15032 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
15035 /* If out_attr was copied from in_attr then it won't have a type yet. */
15036 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
15037 out_attr
[i
].type
= in_attr
[i
].type
;
15040 /* Merge Tag_compatibility attributes and any common GNU ones. */
15041 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
15044 /* Check for any attributes not known on ARM. */
15045 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
15051 /* Return TRUE if the two EABI versions are incompatible. */
15054 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
15056 /* v4 and v5 are the same spec before and after it was released,
15057 so allow mixing them. */
15058 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
15059 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
15062 return (iver
== over
);
15065 /* Merge backend specific data from an object file to the output
15066 object file when linking. */
15069 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
15071 /* Display the flags field. */
15074 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
15076 FILE * file
= (FILE *) ptr
;
15077 unsigned long flags
;
15079 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
15081 /* Print normal ELF private data. */
15082 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
15084 flags
= elf_elfheader (abfd
)->e_flags
;
15085 /* Ignore init flag - it may not be set, despite the flags field
15086 containing valid data. */
15088 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
15090 switch (EF_ARM_EABI_VERSION (flags
))
15092 case EF_ARM_EABI_UNKNOWN
:
15093 /* The following flag bits are GNU extensions and not part of the
15094 official ARM ELF extended ABI. Hence they are only decoded if
15095 the EABI version is not set. */
15096 if (flags
& EF_ARM_INTERWORK
)
15097 fprintf (file
, _(" [interworking enabled]"));
15099 if (flags
& EF_ARM_APCS_26
)
15100 fprintf (file
, " [APCS-26]");
15102 fprintf (file
, " [APCS-32]");
15104 if (flags
& EF_ARM_VFP_FLOAT
)
15105 fprintf (file
, _(" [VFP float format]"));
15106 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
15107 fprintf (file
, _(" [Maverick float format]"));
15109 fprintf (file
, _(" [FPA float format]"));
15111 if (flags
& EF_ARM_APCS_FLOAT
)
15112 fprintf (file
, _(" [floats passed in float registers]"));
15114 if (flags
& EF_ARM_PIC
)
15115 fprintf (file
, _(" [position independent]"));
15117 if (flags
& EF_ARM_NEW_ABI
)
15118 fprintf (file
, _(" [new ABI]"));
15120 if (flags
& EF_ARM_OLD_ABI
)
15121 fprintf (file
, _(" [old ABI]"));
15123 if (flags
& EF_ARM_SOFT_FLOAT
)
15124 fprintf (file
, _(" [software FP]"));
15126 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
15127 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
15128 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
15129 | EF_ARM_MAVERICK_FLOAT
);
15132 case EF_ARM_EABI_VER1
:
15133 fprintf (file
, _(" [Version1 EABI]"));
15135 if (flags
& EF_ARM_SYMSARESORTED
)
15136 fprintf (file
, _(" [sorted symbol table]"));
15138 fprintf (file
, _(" [unsorted symbol table]"));
15140 flags
&= ~ EF_ARM_SYMSARESORTED
;
15143 case EF_ARM_EABI_VER2
:
15144 fprintf (file
, _(" [Version2 EABI]"));
15146 if (flags
& EF_ARM_SYMSARESORTED
)
15147 fprintf (file
, _(" [sorted symbol table]"));
15149 fprintf (file
, _(" [unsorted symbol table]"));
15151 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
15152 fprintf (file
, _(" [dynamic symbols use segment index]"));
15154 if (flags
& EF_ARM_MAPSYMSFIRST
)
15155 fprintf (file
, _(" [mapping symbols precede others]"));
15157 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
15158 | EF_ARM_MAPSYMSFIRST
);
15161 case EF_ARM_EABI_VER3
:
15162 fprintf (file
, _(" [Version3 EABI]"));
15165 case EF_ARM_EABI_VER4
:
15166 fprintf (file
, _(" [Version4 EABI]"));
15169 case EF_ARM_EABI_VER5
:
15170 fprintf (file
, _(" [Version5 EABI]"));
15172 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
15173 fprintf (file
, _(" [soft-float ABI]"));
15175 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
15176 fprintf (file
, _(" [hard-float ABI]"));
15178 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
15181 if (flags
& EF_ARM_BE8
)
15182 fprintf (file
, _(" [BE8]"));
15184 if (flags
& EF_ARM_LE8
)
15185 fprintf (file
, _(" [LE8]"));
15187 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
15191 fprintf (file
, _(" <EABI version unrecognised>"));
15195 flags
&= ~ EF_ARM_EABIMASK
;
15197 if (flags
& EF_ARM_RELEXEC
)
15198 fprintf (file
, _(" [relocatable executable]"));
15200 if (flags
& EF_ARM_PIC
)
15201 fprintf (file
, _(" [position independent]"));
15203 if (elf_elfheader (abfd
)->e_ident
[EI_OSABI
] == ELFOSABI_ARM_FDPIC
)
15204 fprintf (file
, _(" [FDPIC ABI supplement]"));
15206 flags
&= ~ (EF_ARM_RELEXEC
| EF_ARM_PIC
);
15209 fprintf (file
, _("<Unrecognised flag bits set>"));
15211 fputc ('\n', file
);
15217 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
15219 switch (ELF_ST_TYPE (elf_sym
->st_info
))
15221 case STT_ARM_TFUNC
:
15222 return ELF_ST_TYPE (elf_sym
->st_info
);
15224 case STT_ARM_16BIT
:
15225 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15226 This allows us to distinguish between data used by Thumb instructions
15227 and non-data (which is probably code) inside Thumb regions of an
15229 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
15230 return ELF_ST_TYPE (elf_sym
->st_info
);
15241 elf32_arm_gc_mark_hook (asection
*sec
,
15242 struct bfd_link_info
*info
,
15243 Elf_Internal_Rela
*rel
,
15244 struct elf_link_hash_entry
*h
,
15245 Elf_Internal_Sym
*sym
)
15248 switch (ELF32_R_TYPE (rel
->r_info
))
15250 case R_ARM_GNU_VTINHERIT
:
15251 case R_ARM_GNU_VTENTRY
:
15255 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
15258 /* Look through the relocs for a section during the first phase. */
15261 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
15262 asection
*sec
, const Elf_Internal_Rela
*relocs
)
15264 Elf_Internal_Shdr
*symtab_hdr
;
15265 struct elf_link_hash_entry
**sym_hashes
;
15266 const Elf_Internal_Rela
*rel
;
15267 const Elf_Internal_Rela
*rel_end
;
15270 struct elf32_arm_link_hash_table
*htab
;
15271 bfd_boolean call_reloc_p
;
15272 bfd_boolean may_become_dynamic_p
;
15273 bfd_boolean may_need_local_target_p
;
15274 unsigned long nsyms
;
15276 if (bfd_link_relocatable (info
))
15279 BFD_ASSERT (is_arm_elf (abfd
));
15281 htab
= elf32_arm_hash_table (info
);
15287 /* Create dynamic sections for relocatable executables so that we can
15288 copy relocations. */
15289 if (htab
->root
.is_relocatable_executable
15290 && ! htab
->root
.dynamic_sections_created
)
15292 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
15296 if (htab
->root
.dynobj
== NULL
)
15297 htab
->root
.dynobj
= abfd
;
15298 if (!create_ifunc_sections (info
))
15301 dynobj
= htab
->root
.dynobj
;
15303 symtab_hdr
= & elf_symtab_hdr (abfd
);
15304 sym_hashes
= elf_sym_hashes (abfd
);
15305 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
15307 rel_end
= relocs
+ sec
->reloc_count
;
15308 for (rel
= relocs
; rel
< rel_end
; rel
++)
15310 Elf_Internal_Sym
*isym
;
15311 struct elf_link_hash_entry
*h
;
15312 struct elf32_arm_link_hash_entry
*eh
;
15313 unsigned int r_symndx
;
15316 r_symndx
= ELF32_R_SYM (rel
->r_info
);
15317 r_type
= ELF32_R_TYPE (rel
->r_info
);
15318 r_type
= arm_real_reloc_type (htab
, r_type
);
15320 if (r_symndx
>= nsyms
15321 /* PR 9934: It is possible to have relocations that do not
15322 refer to symbols, thus it is also possible to have an
15323 object file containing relocations but no symbol table. */
15324 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
15326 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
15335 if (r_symndx
< symtab_hdr
->sh_info
)
15337 /* A local symbol. */
15338 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
15345 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
15346 while (h
->root
.type
== bfd_link_hash_indirect
15347 || h
->root
.type
== bfd_link_hash_warning
)
15348 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15352 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15354 call_reloc_p
= FALSE
;
15355 may_become_dynamic_p
= FALSE
;
15356 may_need_local_target_p
= FALSE
;
15358 /* Could be done earlier, if h were already available. */
15359 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
15362 case R_ARM_GOTOFFFUNCDESC
:
15366 if (!elf32_arm_allocate_local_sym_info (abfd
))
15368 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].gotofffuncdesc_cnt
+= 1;
15369 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15373 eh
->fdpic_cnts
.gotofffuncdesc_cnt
++;
15378 case R_ARM_GOTFUNCDESC
:
15382 /* Such a relocation is not supposed to be generated
15383 by gcc on a static function. */
15384 /* Anyway if needed it could be handled. */
15389 eh
->fdpic_cnts
.gotfuncdesc_cnt
++;
15394 case R_ARM_FUNCDESC
:
15398 if (!elf32_arm_allocate_local_sym_info (abfd
))
15400 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_cnt
+= 1;
15401 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15405 eh
->fdpic_cnts
.funcdesc_cnt
++;
15411 case R_ARM_GOT_PREL
:
15412 case R_ARM_TLS_GD32
:
15413 case R_ARM_TLS_GD32_FDPIC
:
15414 case R_ARM_TLS_IE32
:
15415 case R_ARM_TLS_IE32_FDPIC
:
15416 case R_ARM_TLS_GOTDESC
:
15417 case R_ARM_TLS_DESCSEQ
:
15418 case R_ARM_THM_TLS_DESCSEQ
:
15419 case R_ARM_TLS_CALL
:
15420 case R_ARM_THM_TLS_CALL
:
15421 /* This symbol requires a global offset table entry. */
15423 int tls_type
, old_tls_type
;
15427 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
15428 case R_ARM_TLS_GD32_FDPIC
: tls_type
= GOT_TLS_GD
; break;
15430 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
15431 case R_ARM_TLS_IE32_FDPIC
: tls_type
= GOT_TLS_IE
; break;
15433 case R_ARM_TLS_GOTDESC
:
15434 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
15435 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
15436 tls_type
= GOT_TLS_GDESC
; break;
15438 default: tls_type
= GOT_NORMAL
; break;
15441 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
15442 info
->flags
|= DF_STATIC_TLS
;
15447 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15451 /* This is a global offset table entry for a local symbol. */
15452 if (!elf32_arm_allocate_local_sym_info (abfd
))
15454 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
15455 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
15458 /* If a variable is accessed with both tls methods, two
15459 slots may be created. */
15460 if (GOT_TLS_GD_ANY_P (old_tls_type
)
15461 && GOT_TLS_GD_ANY_P (tls_type
))
15462 tls_type
|= old_tls_type
;
15464 /* We will already have issued an error message if there
15465 is a TLS/non-TLS mismatch, based on the symbol
15466 type. So just combine any TLS types needed. */
15467 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
15468 && tls_type
!= GOT_NORMAL
)
15469 tls_type
|= old_tls_type
;
15471 /* If the symbol is accessed in both IE and GDESC
15472 method, we're able to relax. Turn off the GDESC flag,
15473 without messing up with any other kind of tls types
15474 that may be involved. */
15475 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
15476 tls_type
&= ~GOT_TLS_GDESC
;
15478 if (old_tls_type
!= tls_type
)
15481 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
15483 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
15486 /* Fall through. */
15488 case R_ARM_TLS_LDM32
:
15489 case R_ARM_TLS_LDM32_FDPIC
:
15490 if (r_type
== R_ARM_TLS_LDM32
|| r_type
== R_ARM_TLS_LDM32_FDPIC
)
15491 htab
->tls_ldm_got
.refcount
++;
15492 /* Fall through. */
15494 case R_ARM_GOTOFF32
:
15496 if (htab
->root
.sgot
== NULL
15497 && !create_got_section (htab
->root
.dynobj
, info
))
15506 case R_ARM_THM_CALL
:
15507 case R_ARM_THM_JUMP24
:
15508 case R_ARM_THM_JUMP19
:
15509 call_reloc_p
= TRUE
;
15510 may_need_local_target_p
= TRUE
;
15514 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15515 ldr __GOTT_INDEX__ offsets. */
15516 if (!htab
->vxworks_p
)
15518 may_need_local_target_p
= TRUE
;
15521 else goto jump_over
;
15523 /* Fall through. */
15525 case R_ARM_MOVW_ABS_NC
:
15526 case R_ARM_MOVT_ABS
:
15527 case R_ARM_THM_MOVW_ABS_NC
:
15528 case R_ARM_THM_MOVT_ABS
:
15529 if (bfd_link_pic (info
))
15532 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15533 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
15534 (h
) ? h
->root
.root
.string
: "a local symbol");
15535 bfd_set_error (bfd_error_bad_value
);
15539 /* Fall through. */
15541 case R_ARM_ABS32_NOI
:
15543 if (h
!= NULL
&& bfd_link_executable (info
))
15545 h
->pointer_equality_needed
= 1;
15547 /* Fall through. */
15549 case R_ARM_REL32_NOI
:
15550 case R_ARM_MOVW_PREL_NC
:
15551 case R_ARM_MOVT_PREL
:
15552 case R_ARM_THM_MOVW_PREL_NC
:
15553 case R_ARM_THM_MOVT_PREL
:
15555 /* Should the interworking branches be listed here? */
15556 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
15558 && (sec
->flags
& SEC_ALLOC
) != 0)
15561 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
15563 /* In shared libraries and relocatable executables,
15564 we treat local relative references as calls;
15565 see the related SYMBOL_CALLS_LOCAL code in
15566 allocate_dynrelocs. */
15567 call_reloc_p
= TRUE
;
15568 may_need_local_target_p
= TRUE
;
15571 /* We are creating a shared library or relocatable
15572 executable, and this is a reloc against a global symbol,
15573 or a non-PC-relative reloc against a local symbol.
15574 We may need to copy the reloc into the output. */
15575 may_become_dynamic_p
= TRUE
;
15578 may_need_local_target_p
= TRUE
;
15581 /* This relocation describes the C++ object vtable hierarchy.
15582 Reconstruct it for later use during GC. */
15583 case R_ARM_GNU_VTINHERIT
:
15584 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
15588 /* This relocation describes which C++ vtable entries are actually
15589 used. Record for later use during GC. */
15590 case R_ARM_GNU_VTENTRY
:
15591 if (!bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
15599 /* We may need a .plt entry if the function this reloc
15600 refers to is in a different object, regardless of the
15601 symbol's type. We can't tell for sure yet, because
15602 something later might force the symbol local. */
15604 else if (may_need_local_target_p
)
15605 /* If this reloc is in a read-only section, we might
15606 need a copy reloc. We can't check reliably at this
15607 stage whether the section is read-only, as input
15608 sections have not yet been mapped to output sections.
15609 Tentatively set the flag for now, and correct in
15610 adjust_dynamic_symbol. */
15611 h
->non_got_ref
= 1;
15614 if (may_need_local_target_p
15615 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
15617 union gotplt_union
*root_plt
;
15618 struct arm_plt_info
*arm_plt
;
15619 struct arm_local_iplt_info
*local_iplt
;
15623 root_plt
= &h
->plt
;
15624 arm_plt
= &eh
->plt
;
15628 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
15629 if (local_iplt
== NULL
)
15631 root_plt
= &local_iplt
->root
;
15632 arm_plt
= &local_iplt
->arm
;
15635 /* If the symbol is a function that doesn't bind locally,
15636 this relocation will need a PLT entry. */
15637 if (root_plt
->refcount
!= -1)
15638 root_plt
->refcount
+= 1;
15641 arm_plt
->noncall_refcount
++;
15643 /* It's too early to use htab->use_blx here, so we have to
15644 record possible blx references separately from
15645 relocs that definitely need a thumb stub. */
15647 if (r_type
== R_ARM_THM_CALL
)
15648 arm_plt
->maybe_thumb_refcount
+= 1;
15650 if (r_type
== R_ARM_THM_JUMP24
15651 || r_type
== R_ARM_THM_JUMP19
)
15652 arm_plt
->thumb_refcount
+= 1;
15655 if (may_become_dynamic_p
)
15657 struct elf_dyn_relocs
*p
, **head
;
15659 /* Create a reloc section in dynobj. */
15660 if (sreloc
== NULL
)
15662 sreloc
= _bfd_elf_make_dynamic_reloc_section
15663 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
15665 if (sreloc
== NULL
)
15668 /* BPABI objects never have dynamic relocations mapped. */
15669 if (htab
->symbian_p
)
15673 flags
= bfd_section_flags (sreloc
);
15674 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
15675 bfd_set_section_flags (sreloc
, flags
);
15679 /* If this is a global symbol, count the number of
15680 relocations we need for this symbol. */
15682 head
= &h
->dyn_relocs
;
15685 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
15691 if (p
== NULL
|| p
->sec
!= sec
)
15693 size_t amt
= sizeof *p
;
15695 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
15705 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
15708 if (h
== NULL
&& htab
->fdpic_p
&& !bfd_link_pic(info
)
15709 && r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_ABS32_NOI
) {
15710 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15711 that will become rofixup. */
15712 /* This is due to the fact that we suppose all will become rofixup. */
15713 fprintf(stderr
, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type
);
15715 (_("FDPIC does not yet support %s relocation"
15716 " to become dynamic for executable"),
15717 elf32_arm_howto_table_1
[r_type
].name
);
15727 elf32_arm_update_relocs (asection
*o
,
15728 struct bfd_elf_section_reloc_data
*reldata
)
15730 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
15731 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
15732 const struct elf_backend_data
*bed
;
15733 _arm_elf_section_data
*eado
;
15734 struct bfd_link_order
*p
;
15735 bfd_byte
*erela_head
, *erela
;
15736 Elf_Internal_Rela
*irela_head
, *irela
;
15737 Elf_Internal_Shdr
*rel_hdr
;
15739 unsigned int count
;
15741 eado
= get_arm_elf_section_data (o
);
15743 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
15747 bed
= get_elf_backend_data (abfd
);
15748 rel_hdr
= reldata
->hdr
;
15750 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
15752 swap_in
= bed
->s
->swap_reloc_in
;
15753 swap_out
= bed
->s
->swap_reloc_out
;
15755 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
15757 swap_in
= bed
->s
->swap_reloca_in
;
15758 swap_out
= bed
->s
->swap_reloca_out
;
15763 erela_head
= rel_hdr
->contents
;
15764 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
15765 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
15767 erela
= erela_head
;
15768 irela
= irela_head
;
15771 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
15773 if (p
->type
== bfd_section_reloc_link_order
15774 || p
->type
== bfd_symbol_reloc_link_order
)
15776 (*swap_in
) (abfd
, erela
, irela
);
15777 erela
+= rel_hdr
->sh_entsize
;
15781 else if (p
->type
== bfd_indirect_link_order
)
15783 struct bfd_elf_section_reloc_data
*input_reldata
;
15784 arm_unwind_table_edit
*edit_list
, *edit_tail
;
15785 _arm_elf_section_data
*eadi
;
15790 i
= p
->u
.indirect
.section
;
15792 eadi
= get_arm_elf_section_data (i
);
15793 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
15794 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
15795 offset
= i
->output_offset
;
15797 if (eadi
->elf
.rel
.hdr
&&
15798 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15799 input_reldata
= &eadi
->elf
.rel
;
15800 else if (eadi
->elf
.rela
.hdr
&&
15801 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15802 input_reldata
= &eadi
->elf
.rela
;
15808 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15810 arm_unwind_table_edit
*edit_node
, *edit_next
;
15812 bfd_vma reloc_index
;
15814 (*swap_in
) (abfd
, erela
, irela
);
15815 reloc_index
= (irela
->r_offset
- offset
) / 8;
15818 edit_node
= edit_list
;
15819 for (edit_next
= edit_list
;
15820 edit_next
&& edit_next
->index
<= reloc_index
;
15821 edit_next
= edit_node
->next
)
15824 edit_node
= edit_next
;
15827 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
15828 || edit_node
->index
!= reloc_index
)
15830 irela
->r_offset
-= bias
* 8;
15835 erela
+= rel_hdr
->sh_entsize
;
15838 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
15840 /* New relocation entity. */
15841 asection
*text_sec
= edit_tail
->linked_section
;
15842 asection
*text_out
= text_sec
->output_section
;
15843 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
15845 irela
->r_addend
= 0;
15846 irela
->r_offset
= exidx_offset
;
15847 irela
->r_info
= ELF32_R_INFO
15848 (text_out
->target_index
, R_ARM_PREL31
);
15855 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15857 (*swap_in
) (abfd
, erela
, irela
);
15858 erela
+= rel_hdr
->sh_entsize
;
15862 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
15867 reldata
->count
= count
;
15868 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
15870 erela
= erela_head
;
15871 irela
= irela_head
;
15874 (*swap_out
) (abfd
, irela
, erela
);
15875 erela
+= rel_hdr
->sh_entsize
;
15882 /* Hashes are no longer valid. */
15883 free (reldata
->hashes
);
15884 reldata
->hashes
= NULL
;
15887 /* Unwinding tables are not referenced directly. This pass marks them as
15888 required if the corresponding code section is marked. Similarly, ARMv8-M
15889 secure entry functions can only be referenced by SG veneers which are
15890 created after the GC process. They need to be marked in case they reside in
15891 their own section (as would be the case if code was compiled with
15892 -ffunction-sections). */
15895 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
15896 elf_gc_mark_hook_fn gc_mark_hook
)
15899 Elf_Internal_Shdr
**elf_shdrp
;
15900 asection
*cmse_sec
;
15901 obj_attribute
*out_attr
;
15902 Elf_Internal_Shdr
*symtab_hdr
;
15903 unsigned i
, sym_count
, ext_start
;
15904 const struct elf_backend_data
*bed
;
15905 struct elf_link_hash_entry
**sym_hashes
;
15906 struct elf32_arm_link_hash_entry
*cmse_hash
;
15907 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
15908 bfd_boolean debug_sec_need_to_be_marked
= FALSE
;
15911 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
15913 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
15914 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
15915 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
15917 /* Marking EH data may cause additional code sections to be marked,
15918 requiring multiple passes. */
15923 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
15927 if (! is_arm_elf (sub
))
15930 elf_shdrp
= elf_elfsections (sub
);
15931 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
15933 Elf_Internal_Shdr
*hdr
;
15935 hdr
= &elf_section_data (o
)->this_hdr
;
15936 if (hdr
->sh_type
== SHT_ARM_EXIDX
15938 && hdr
->sh_link
< elf_numsections (sub
)
15940 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
15943 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
15948 /* Mark section holding ARMv8-M secure entry functions. We mark all
15949 of them so no need for a second browsing. */
15950 if (is_v8m
&& first_bfd_browse
)
15952 sym_hashes
= elf_sym_hashes (sub
);
15953 bed
= get_elf_backend_data (sub
);
15954 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
15955 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
15956 ext_start
= symtab_hdr
->sh_info
;
15958 /* Scan symbols. */
15959 for (i
= ext_start
; i
< sym_count
; i
++)
15961 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
15963 /* Assume it is a special symbol. If not, cmse_scan will
15964 warn about it and user can do something about it. */
15965 if (CONST_STRNEQ (cmse_hash
->root
.root
.root
.string
,
15968 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
15969 if (!cmse_sec
->gc_mark
15970 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
15972 /* The debug sections related to these secure entry
15973 functions are marked on enabling below flag. */
15974 debug_sec_need_to_be_marked
= TRUE
;
15978 if (debug_sec_need_to_be_marked
)
15980 /* Looping over all the sections of the object file containing
15981 Armv8-M secure entry functions and marking all the debug
15983 for (isec
= sub
->sections
; isec
!= NULL
; isec
= isec
->next
)
15985 /* If not a debug sections, skip it. */
15986 if (!isec
->gc_mark
&& (isec
->flags
& SEC_DEBUGGING
))
15987 isec
->gc_mark
= 1 ;
15989 debug_sec_need_to_be_marked
= FALSE
;
15993 first_bfd_browse
= FALSE
;
15999 /* Treat mapping symbols as special target symbols. */
16002 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
16004 return bfd_is_arm_special_symbol_name (sym
->name
,
16005 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
16008 /* If the ELF symbol SYM might be a function in SEC, return the
16009 function size and set *CODE_OFF to the function's entry point,
16010 otherwise return zero. */
16012 static bfd_size_type
16013 elf32_arm_maybe_function_sym (const asymbol
*sym
, asection
*sec
,
16016 bfd_size_type size
;
16018 if ((sym
->flags
& (BSF_SECTION_SYM
| BSF_FILE
| BSF_OBJECT
16019 | BSF_THREAD_LOCAL
| BSF_RELC
| BSF_SRELC
)) != 0
16020 || sym
->section
!= sec
)
16023 if (!(sym
->flags
& BSF_SYNTHETIC
))
16024 switch (ELF_ST_TYPE (((elf_symbol_type
*) sym
)->internal_elf_sym
.st_info
))
16027 case STT_ARM_TFUNC
:
16034 if ((sym
->flags
& BSF_LOCAL
)
16035 && bfd_is_arm_special_symbol_name (sym
->name
,
16036 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
16039 *code_off
= sym
->value
;
16041 if (!(sym
->flags
& BSF_SYNTHETIC
))
16042 size
= ((elf_symbol_type
*) sym
)->internal_elf_sym
.st_size
;
16049 elf32_arm_find_inliner_info (bfd
* abfd
,
16050 const char ** filename_ptr
,
16051 const char ** functionname_ptr
,
16052 unsigned int * line_ptr
)
16055 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
16056 functionname_ptr
, line_ptr
,
16057 & elf_tdata (abfd
)->dwarf2_find_line_info
);
16061 /* Adjust a symbol defined by a dynamic object and referenced by a
16062 regular object. The current definition is in some section of the
16063 dynamic object, but we're not including those sections. We have to
16064 change the definition to something the rest of the link can
16068 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
16069 struct elf_link_hash_entry
* h
)
16072 asection
*s
, *srel
;
16073 struct elf32_arm_link_hash_entry
* eh
;
16074 struct elf32_arm_link_hash_table
*globals
;
16076 globals
= elf32_arm_hash_table (info
);
16077 if (globals
== NULL
)
16080 dynobj
= elf_hash_table (info
)->dynobj
;
16082 /* Make sure we know what is going on here. */
16083 BFD_ASSERT (dynobj
!= NULL
16085 || h
->type
== STT_GNU_IFUNC
16089 && !h
->def_regular
)));
16091 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16093 /* If this is a function, put it in the procedure linkage table. We
16094 will fill in the contents of the procedure linkage table later,
16095 when we know the address of the .got section. */
16096 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
16098 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16099 symbol binds locally. */
16100 if (h
->plt
.refcount
<= 0
16101 || (h
->type
!= STT_GNU_IFUNC
16102 && (SYMBOL_CALLS_LOCAL (info
, h
)
16103 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16104 && h
->root
.type
== bfd_link_hash_undefweak
))))
16106 /* This case can occur if we saw a PLT32 reloc in an input
16107 file, but the symbol was never referred to by a dynamic
16108 object, or if all references were garbage collected. In
16109 such a case, we don't actually need to build a procedure
16110 linkage table, and we can just do a PC24 reloc instead. */
16111 h
->plt
.offset
= (bfd_vma
) -1;
16112 eh
->plt
.thumb_refcount
= 0;
16113 eh
->plt
.maybe_thumb_refcount
= 0;
16114 eh
->plt
.noncall_refcount
= 0;
16122 /* It's possible that we incorrectly decided a .plt reloc was
16123 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16124 in check_relocs. We can't decide accurately between function
16125 and non-function syms in check-relocs; Objects loaded later in
16126 the link may change h->type. So fix it now. */
16127 h
->plt
.offset
= (bfd_vma
) -1;
16128 eh
->plt
.thumb_refcount
= 0;
16129 eh
->plt
.maybe_thumb_refcount
= 0;
16130 eh
->plt
.noncall_refcount
= 0;
16133 /* If this is a weak symbol, and there is a real definition, the
16134 processor independent code will have arranged for us to see the
16135 real definition first, and we can just use the same value. */
16136 if (h
->is_weakalias
)
16138 struct elf_link_hash_entry
*def
= weakdef (h
);
16139 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
16140 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
16141 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
16145 /* If there are no non-GOT references, we do not need a copy
16147 if (!h
->non_got_ref
)
16150 /* This is a reference to a symbol defined by a dynamic object which
16151 is not a function. */
16153 /* If we are creating a shared library, we must presume that the
16154 only references to the symbol are via the global offset table.
16155 For such cases we need not do anything here; the relocations will
16156 be handled correctly by relocate_section. Relocatable executables
16157 can reference data in shared objects directly, so we don't need to
16158 do anything here. */
16159 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
16162 /* We must allocate the symbol in our .dynbss section, which will
16163 become part of the .bss section of the executable. There will be
16164 an entry for this symbol in the .dynsym section. The dynamic
16165 object will contain position independent code, so all references
16166 from the dynamic object to this symbol will go through the global
16167 offset table. The dynamic linker will use the .dynsym entry to
16168 determine the address it must put in the global offset table, so
16169 both the dynamic object and the regular object will refer to the
16170 same memory location for the variable. */
16171 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16172 linker to copy the initial value out of the dynamic object and into
16173 the runtime process image. We need to remember the offset into the
16174 .rel(a).bss section we are going to use. */
16175 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
16177 s
= globals
->root
.sdynrelro
;
16178 srel
= globals
->root
.sreldynrelro
;
16182 s
= globals
->root
.sdynbss
;
16183 srel
= globals
->root
.srelbss
;
16185 if (info
->nocopyreloc
== 0
16186 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
16189 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16193 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
16196 /* Allocate space in .plt, .got and associated reloc sections for
16200 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
16202 struct bfd_link_info
*info
;
16203 struct elf32_arm_link_hash_table
*htab
;
16204 struct elf32_arm_link_hash_entry
*eh
;
16205 struct elf_dyn_relocs
*p
;
16207 if (h
->root
.type
== bfd_link_hash_indirect
)
16210 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16212 info
= (struct bfd_link_info
*) inf
;
16213 htab
= elf32_arm_hash_table (info
);
16217 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
16218 && h
->plt
.refcount
> 0)
16220 /* Make sure this symbol is output as a dynamic symbol.
16221 Undefined weak syms won't yet be marked as dynamic. */
16222 if (h
->dynindx
== -1 && !h
->forced_local
16223 && h
->root
.type
== bfd_link_hash_undefweak
)
16225 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16229 /* If the call in the PLT entry binds locally, the associated
16230 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16231 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16232 than the .plt section. */
16233 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
16236 if (eh
->plt
.noncall_refcount
== 0
16237 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16238 /* All non-call references can be resolved directly.
16239 This means that they can (and in some cases, must)
16240 resolve directly to the run-time target, rather than
16241 to the PLT. That in turns means that any .got entry
16242 would be equal to the .igot.plt entry, so there's
16243 no point having both. */
16244 h
->got
.refcount
= 0;
16247 if (bfd_link_pic (info
)
16249 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
16251 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
16253 /* If this symbol is not defined in a regular file, and we are
16254 not generating a shared library, then set the symbol to this
16255 location in the .plt. This is required to make function
16256 pointers compare as equal between the normal executable and
16257 the shared library. */
16258 if (! bfd_link_pic (info
)
16259 && !h
->def_regular
)
16261 h
->root
.u
.def
.section
= htab
->root
.splt
;
16262 h
->root
.u
.def
.value
= h
->plt
.offset
;
16264 /* Make sure the function is not marked as Thumb, in case
16265 it is the target of an ABS32 relocation, which will
16266 point to the PLT entry. */
16267 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16270 /* VxWorks executables have a second set of relocations for
16271 each PLT entry. They go in a separate relocation section,
16272 which is processed by the kernel loader. */
16273 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
16275 /* There is a relocation for the initial PLT entry:
16276 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16277 if (h
->plt
.offset
== htab
->plt_header_size
)
16278 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
16280 /* There are two extra relocations for each subsequent
16281 PLT entry: an R_ARM_32 relocation for the GOT entry,
16282 and an R_ARM_32 relocation for the PLT entry. */
16283 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
16288 h
->plt
.offset
= (bfd_vma
) -1;
16294 h
->plt
.offset
= (bfd_vma
) -1;
16298 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16299 eh
->tlsdesc_got
= (bfd_vma
) -1;
16301 if (h
->got
.refcount
> 0)
16305 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
16308 /* Make sure this symbol is output as a dynamic symbol.
16309 Undefined weak syms won't yet be marked as dynamic. */
16310 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1 && !h
->forced_local
16311 && h
->root
.type
== bfd_link_hash_undefweak
)
16313 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16317 if (!htab
->symbian_p
)
16319 s
= htab
->root
.sgot
;
16320 h
->got
.offset
= s
->size
;
16322 if (tls_type
== GOT_UNKNOWN
)
16325 if (tls_type
== GOT_NORMAL
)
16326 /* Non-TLS symbols need one GOT slot. */
16330 if (tls_type
& GOT_TLS_GDESC
)
16332 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16334 = (htab
->root
.sgotplt
->size
16335 - elf32_arm_compute_jump_table_size (htab
));
16336 htab
->root
.sgotplt
->size
+= 8;
16337 h
->got
.offset
= (bfd_vma
) -2;
16338 /* plt.got_offset needs to know there's a TLS_DESC
16339 reloc in the middle of .got.plt. */
16340 htab
->num_tls_desc
++;
16343 if (tls_type
& GOT_TLS_GD
)
16345 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16346 consecutive GOT slots. If the symbol is both GD
16347 and GDESC, got.offset may have been
16349 h
->got
.offset
= s
->size
;
16353 if (tls_type
& GOT_TLS_IE
)
16354 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16359 dyn
= htab
->root
.dynamic_sections_created
;
16362 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
16363 bfd_link_pic (info
),
16365 && (!bfd_link_pic (info
)
16366 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
16369 if (tls_type
!= GOT_NORMAL
16370 && (bfd_link_dll (info
) || indx
!= 0)
16371 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16372 || h
->root
.type
!= bfd_link_hash_undefweak
))
16374 if (tls_type
& GOT_TLS_IE
)
16375 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16377 if (tls_type
& GOT_TLS_GD
)
16378 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16380 if (tls_type
& GOT_TLS_GDESC
)
16382 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
16383 /* GDESC needs a trampoline to jump to. */
16384 htab
->tls_trampoline
= -1;
16387 /* Only GD needs it. GDESC just emits one relocation per
16389 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
16390 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16392 else if (((indx
!= -1) || htab
->fdpic_p
)
16393 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
16395 if (htab
->root
.dynamic_sections_created
)
16396 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16397 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16399 else if (h
->type
== STT_GNU_IFUNC
16400 && eh
->plt
.noncall_refcount
== 0)
16401 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16402 they all resolve dynamically instead. Reserve room for the
16403 GOT entry's R_ARM_IRELATIVE relocation. */
16404 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
16405 else if (bfd_link_pic (info
)
16406 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16407 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16408 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16409 else if (htab
->fdpic_p
&& tls_type
== GOT_NORMAL
)
16410 /* Reserve room for rofixup for FDPIC executable. */
16411 /* TLS relocs do not need space since they are completely
16413 htab
->srofixup
->size
+= 4;
16417 h
->got
.offset
= (bfd_vma
) -1;
16419 /* FDPIC support. */
16420 if (eh
->fdpic_cnts
.gotofffuncdesc_cnt
> 0)
16422 /* Symbol musn't be exported. */
16423 if (h
->dynindx
!= -1)
16426 /* We only allocate one function descriptor with its associated relocation. */
16427 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16429 asection
*s
= htab
->root
.sgot
;
16431 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16433 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16434 if (bfd_link_pic(info
))
16435 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16437 htab
->srofixup
->size
+= 8;
16441 if (eh
->fdpic_cnts
.gotfuncdesc_cnt
> 0)
16443 asection
*s
= htab
->root
.sgot
;
16445 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16446 && !h
->forced_local
)
16447 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16450 if (h
->dynindx
== -1)
16452 /* We only allocate one function descriptor with its associated relocation. q */
16453 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16456 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16458 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16459 if (bfd_link_pic(info
))
16460 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16462 htab
->srofixup
->size
+= 8;
16466 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16467 R_ARM_RELATIVE/rofixup relocation on it. */
16468 eh
->fdpic_cnts
.gotfuncdesc_offset
= s
->size
;
16470 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16471 htab
->srofixup
->size
+= 4;
16473 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16476 if (eh
->fdpic_cnts
.funcdesc_cnt
> 0)
16478 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16479 && !h
->forced_local
)
16480 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16483 if (h
->dynindx
== -1)
16485 /* We only allocate one function descriptor with its associated relocation. */
16486 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16488 asection
*s
= htab
->root
.sgot
;
16490 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16492 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16493 if (bfd_link_pic(info
))
16494 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16496 htab
->srofixup
->size
+= 8;
16499 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16501 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16502 htab
->srofixup
->size
+= 4 * eh
->fdpic_cnts
.funcdesc_cnt
;
16506 /* Will need one dynamic reloc per reference. will be either
16507 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16508 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
,
16509 eh
->fdpic_cnts
.funcdesc_cnt
);
16513 /* Allocate stubs for exported Thumb functions on v4t. */
16514 if (!htab
->use_blx
&& h
->dynindx
!= -1
16516 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
16517 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
16519 struct elf_link_hash_entry
* th
;
16520 struct bfd_link_hash_entry
* bh
;
16521 struct elf_link_hash_entry
* myh
;
16525 /* Create a new symbol to regist the real location of the function. */
16526 s
= h
->root
.u
.def
.section
;
16527 sprintf (name
, "__real_%s", h
->root
.root
.string
);
16528 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
16529 name
, BSF_GLOBAL
, s
,
16530 h
->root
.u
.def
.value
,
16531 NULL
, TRUE
, FALSE
, &bh
);
16533 myh
= (struct elf_link_hash_entry
*) bh
;
16534 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16535 myh
->forced_local
= 1;
16536 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
16537 eh
->export_glue
= myh
;
16538 th
= record_arm_to_thumb_glue (info
, h
);
16539 /* Point the symbol at the stub. */
16540 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
16541 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16542 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
16543 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
16546 if (h
->dyn_relocs
== NULL
)
16549 /* In the shared -Bsymbolic case, discard space allocated for
16550 dynamic pc-relative relocs against symbols which turn out to be
16551 defined in regular objects. For the normal shared case, discard
16552 space for pc-relative relocs that have become local due to symbol
16553 visibility changes. */
16555 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
|| htab
->fdpic_p
)
16557 /* Relocs that use pc_count are PC-relative forms, which will appear
16558 on something like ".long foo - ." or "movw REG, foo - .". We want
16559 calls to protected symbols to resolve directly to the function
16560 rather than going via the plt. If people want function pointer
16561 comparisons to work as expected then they should avoid writing
16562 assembly like ".long foo - .". */
16563 if (SYMBOL_CALLS_LOCAL (info
, h
))
16565 struct elf_dyn_relocs
**pp
;
16567 for (pp
= &h
->dyn_relocs
; (p
= *pp
) != NULL
; )
16569 p
->count
-= p
->pc_count
;
16578 if (htab
->vxworks_p
)
16580 struct elf_dyn_relocs
**pp
;
16582 for (pp
= &h
->dyn_relocs
; (p
= *pp
) != NULL
; )
16584 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
16591 /* Also discard relocs on undefined weak syms with non-default
16593 if (h
->dyn_relocs
!= NULL
16594 && h
->root
.type
== bfd_link_hash_undefweak
)
16596 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16597 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16598 h
->dyn_relocs
= NULL
;
16600 /* Make sure undefined weak symbols are output as a dynamic
16602 else if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16603 && !h
->forced_local
)
16605 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16610 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
16611 && h
->root
.type
== bfd_link_hash_new
)
16613 /* Output absolute symbols so that we can create relocations
16614 against them. For normal symbols we output a relocation
16615 against the section that contains them. */
16616 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16623 /* For the non-shared case, discard space for relocs against
16624 symbols which turn out to need copy relocs or are not
16627 if (!h
->non_got_ref
16628 && ((h
->def_dynamic
16629 && !h
->def_regular
)
16630 || (htab
->root
.dynamic_sections_created
16631 && (h
->root
.type
== bfd_link_hash_undefweak
16632 || h
->root
.type
== bfd_link_hash_undefined
))))
16634 /* Make sure this symbol is output as a dynamic symbol.
16635 Undefined weak syms won't yet be marked as dynamic. */
16636 if (h
->dynindx
== -1 && !h
->forced_local
16637 && h
->root
.type
== bfd_link_hash_undefweak
)
16639 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16643 /* If that succeeded, we know we'll be keeping all the
16645 if (h
->dynindx
!= -1)
16649 h
->dyn_relocs
= NULL
;
16654 /* Finally, allocate space. */
16655 for (p
= h
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16657 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
16659 if (h
->type
== STT_GNU_IFUNC
16660 && eh
->plt
.noncall_refcount
== 0
16661 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16662 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
16663 else if (h
->dynindx
!= -1 && (!bfd_link_pic(info
) || !info
->symbolic
|| !h
->def_regular
))
16664 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16665 else if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16666 htab
->srofixup
->size
+= 4 * p
->count
;
16668 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16675 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
16678 struct elf32_arm_link_hash_table
*globals
;
16680 globals
= elf32_arm_hash_table (info
);
16681 if (globals
== NULL
)
16684 globals
->byteswap_code
= byteswap_code
;
16687 /* Set the sizes of the dynamic sections. */
16690 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
16691 struct bfd_link_info
* info
)
16696 bfd_boolean relocs
;
16698 struct elf32_arm_link_hash_table
*htab
;
16700 htab
= elf32_arm_hash_table (info
);
16704 dynobj
= elf_hash_table (info
)->dynobj
;
16705 BFD_ASSERT (dynobj
!= NULL
);
16706 check_use_blx (htab
);
16708 if (elf_hash_table (info
)->dynamic_sections_created
)
16710 /* Set the contents of the .interp section to the interpreter. */
16711 if (bfd_link_executable (info
) && !info
->nointerp
)
16713 s
= bfd_get_linker_section (dynobj
, ".interp");
16714 BFD_ASSERT (s
!= NULL
);
16715 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
16716 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
16720 /* Set up .got offsets for local syms, and space for local dynamic
16722 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16724 bfd_signed_vma
*local_got
;
16725 bfd_signed_vma
*end_local_got
;
16726 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
16727 char *local_tls_type
;
16728 bfd_vma
*local_tlsdesc_gotent
;
16729 bfd_size_type locsymcount
;
16730 Elf_Internal_Shdr
*symtab_hdr
;
16732 bfd_boolean is_vxworks
= htab
->vxworks_p
;
16733 unsigned int symndx
;
16734 struct fdpic_local
*local_fdpic_cnts
;
16736 if (! is_arm_elf (ibfd
))
16739 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
16741 struct elf_dyn_relocs
*p
;
16743 for (p
= (struct elf_dyn_relocs
*)
16744 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
16746 if (!bfd_is_abs_section (p
->sec
)
16747 && bfd_is_abs_section (p
->sec
->output_section
))
16749 /* Input section has been discarded, either because
16750 it is a copy of a linkonce section or due to
16751 linker script /DISCARD/, so we'll be discarding
16754 else if (is_vxworks
16755 && strcmp (p
->sec
->output_section
->name
,
16758 /* Relocations in vxworks .tls_vars sections are
16759 handled specially by the loader. */
16761 else if (p
->count
!= 0)
16763 srel
= elf_section_data (p
->sec
)->sreloc
;
16764 if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16765 htab
->srofixup
->size
+= 4 * p
->count
;
16767 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
16768 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
16769 info
->flags
|= DF_TEXTREL
;
16774 local_got
= elf_local_got_refcounts (ibfd
);
16778 symtab_hdr
= & elf_symtab_hdr (ibfd
);
16779 locsymcount
= symtab_hdr
->sh_info
;
16780 end_local_got
= local_got
+ locsymcount
;
16781 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
16782 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
16783 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
16784 local_fdpic_cnts
= elf32_arm_local_fdpic_cnts (ibfd
);
16786 s
= htab
->root
.sgot
;
16787 srel
= htab
->root
.srelgot
;
16788 for (; local_got
< end_local_got
;
16789 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
16790 ++local_tlsdesc_gotent
, ++symndx
, ++local_fdpic_cnts
)
16792 *local_tlsdesc_gotent
= (bfd_vma
) -1;
16793 local_iplt
= *local_iplt_ptr
;
16795 /* FDPIC support. */
16796 if (local_fdpic_cnts
->gotofffuncdesc_cnt
> 0)
16798 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16800 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16803 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16804 if (bfd_link_pic(info
))
16805 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16807 htab
->srofixup
->size
+= 8;
16811 if (local_fdpic_cnts
->funcdesc_cnt
> 0)
16813 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16815 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16818 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16819 if (bfd_link_pic(info
))
16820 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16822 htab
->srofixup
->size
+= 8;
16825 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16826 if (bfd_link_pic(info
))
16827 elf32_arm_allocate_dynrelocs (info
, srel
, local_fdpic_cnts
->funcdesc_cnt
);
16829 htab
->srofixup
->size
+= 4 * local_fdpic_cnts
->funcdesc_cnt
;
16832 if (local_iplt
!= NULL
)
16834 struct elf_dyn_relocs
*p
;
16836 if (local_iplt
->root
.refcount
> 0)
16838 elf32_arm_allocate_plt_entry (info
, TRUE
,
16841 if (local_iplt
->arm
.noncall_refcount
== 0)
16842 /* All references to the PLT are calls, so all
16843 non-call references can resolve directly to the
16844 run-time target. This means that the .got entry
16845 would be the same as the .igot.plt entry, so there's
16846 no point creating both. */
16851 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
16852 local_iplt
->root
.offset
= (bfd_vma
) -1;
16855 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16859 psrel
= elf_section_data (p
->sec
)->sreloc
;
16860 if (local_iplt
->arm
.noncall_refcount
== 0)
16861 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
16863 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
16866 if (*local_got
> 0)
16868 Elf_Internal_Sym
*isym
;
16870 *local_got
= s
->size
;
16871 if (*local_tls_type
& GOT_TLS_GD
)
16872 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16874 if (*local_tls_type
& GOT_TLS_GDESC
)
16876 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
16877 - elf32_arm_compute_jump_table_size (htab
);
16878 htab
->root
.sgotplt
->size
+= 8;
16879 *local_got
= (bfd_vma
) -2;
16880 /* plt.got_offset needs to know there's a TLS_DESC
16881 reloc in the middle of .got.plt. */
16882 htab
->num_tls_desc
++;
16884 if (*local_tls_type
& GOT_TLS_IE
)
16887 if (*local_tls_type
& GOT_NORMAL
)
16889 /* If the symbol is both GD and GDESC, *local_got
16890 may have been overwritten. */
16891 *local_got
= s
->size
;
16895 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
16899 /* If all references to an STT_GNU_IFUNC PLT are calls,
16900 then all non-call references, including this GOT entry,
16901 resolve directly to the run-time target. */
16902 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
16903 && (local_iplt
== NULL
16904 || local_iplt
->arm
.noncall_refcount
== 0))
16905 elf32_arm_allocate_irelocs (info
, srel
, 1);
16906 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
|| htab
->fdpic_p
)
16908 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
)))
16909 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16910 else if (htab
->fdpic_p
&& *local_tls_type
& GOT_NORMAL
)
16911 htab
->srofixup
->size
+= 4;
16913 if ((bfd_link_pic (info
) || htab
->fdpic_p
)
16914 && *local_tls_type
& GOT_TLS_GDESC
)
16916 elf32_arm_allocate_dynrelocs (info
,
16917 htab
->root
.srelplt
, 1);
16918 htab
->tls_trampoline
= -1;
16923 *local_got
= (bfd_vma
) -1;
16927 if (htab
->tls_ldm_got
.refcount
> 0)
16929 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16930 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16931 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
16932 htab
->root
.sgot
->size
+= 8;
16933 if (bfd_link_pic (info
))
16934 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16937 htab
->tls_ldm_got
.offset
= -1;
16939 /* At the very end of the .rofixup section is a pointer to the GOT,
16940 reserve space for it. */
16941 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
16942 htab
->srofixup
->size
+= 4;
16944 /* Allocate global sym .plt and .got entries, and space for global
16945 sym dynamic relocs. */
16946 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
16948 /* Here we rummage through the found bfds to collect glue information. */
16949 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16951 if (! is_arm_elf (ibfd
))
16954 /* Initialise mapping tables for code/data. */
16955 bfd_elf32_arm_init_maps (ibfd
);
16957 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
16958 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
16959 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
16960 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
16963 /* Allocate space for the glue sections now that we've sized them. */
16964 bfd_elf32_arm_allocate_interworking_sections (info
);
16966 /* For every jump slot reserved in the sgotplt, reloc_count is
16967 incremented. However, when we reserve space for TLS descriptors,
16968 it's not incremented, so in order to compute the space reserved
16969 for them, it suffices to multiply the reloc count by the jump
16971 if (htab
->root
.srelplt
)
16972 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
16974 if (htab
->tls_trampoline
)
16976 if (htab
->root
.splt
->size
== 0)
16977 htab
->root
.splt
->size
+= htab
->plt_header_size
;
16979 htab
->tls_trampoline
= htab
->root
.splt
->size
;
16980 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
16982 /* If we're not using lazy TLS relocations, don't generate the
16983 PLT and GOT entries they require. */
16984 if (!(info
->flags
& DF_BIND_NOW
))
16986 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
16987 htab
->root
.sgot
->size
+= 4;
16989 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
16990 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
16994 /* The check_relocs and adjust_dynamic_symbol entry points have
16995 determined the sizes of the various dynamic sections. Allocate
16996 memory for them. */
16999 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
17003 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
17006 /* It's OK to base decisions on the section name, because none
17007 of the dynobj section names depend upon the input files. */
17008 name
= bfd_section_name (s
);
17010 if (s
== htab
->root
.splt
)
17012 /* Remember whether there is a PLT. */
17013 plt
= s
->size
!= 0;
17015 else if (CONST_STRNEQ (name
, ".rel"))
17019 /* Remember whether there are any reloc sections other
17020 than .rel(a).plt and .rela.plt.unloaded. */
17021 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
17024 /* We use the reloc_count field as a counter if we need
17025 to copy relocs into the output file. */
17026 s
->reloc_count
= 0;
17029 else if (s
!= htab
->root
.sgot
17030 && s
!= htab
->root
.sgotplt
17031 && s
!= htab
->root
.iplt
17032 && s
!= htab
->root
.igotplt
17033 && s
!= htab
->root
.sdynbss
17034 && s
!= htab
->root
.sdynrelro
17035 && s
!= htab
->srofixup
)
17037 /* It's not one of our sections, so don't allocate space. */
17043 /* If we don't need this section, strip it from the
17044 output file. This is mostly to handle .rel(a).bss and
17045 .rel(a).plt. We must create both sections in
17046 create_dynamic_sections, because they must be created
17047 before the linker maps input sections to output
17048 sections. The linker does that before
17049 adjust_dynamic_symbol is called, and it is that
17050 function which decides whether anything needs to go
17051 into these sections. */
17052 s
->flags
|= SEC_EXCLUDE
;
17056 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
17059 /* Allocate memory for the section contents. */
17060 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
17061 if (s
->contents
== NULL
)
17065 if (elf_hash_table (info
)->dynamic_sections_created
)
17067 /* Add some entries to the .dynamic section. We fill in the
17068 values later, in elf32_arm_finish_dynamic_sections, but we
17069 must add the entries now so that we get the correct size for
17070 the .dynamic section. The DT_DEBUG entry is filled in by the
17071 dynamic linker and used by the debugger. */
17072 #define add_dynamic_entry(TAG, VAL) \
17073 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17075 if (bfd_link_executable (info
))
17077 if (!add_dynamic_entry (DT_DEBUG
, 0))
17083 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
17084 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
17085 || !add_dynamic_entry (DT_PLTREL
,
17086 htab
->use_rel
? DT_REL
: DT_RELA
)
17087 || !add_dynamic_entry (DT_JMPREL
, 0))
17090 if (htab
->dt_tlsdesc_plt
17091 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
17092 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
17100 if (!add_dynamic_entry (DT_REL
, 0)
17101 || !add_dynamic_entry (DT_RELSZ
, 0)
17102 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
17107 if (!add_dynamic_entry (DT_RELA
, 0)
17108 || !add_dynamic_entry (DT_RELASZ
, 0)
17109 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
17114 /* If any dynamic relocs apply to a read-only section,
17115 then we need a DT_TEXTREL entry. */
17116 if ((info
->flags
& DF_TEXTREL
) == 0)
17117 elf_link_hash_traverse (&htab
->root
,
17118 _bfd_elf_maybe_set_textrel
, info
);
17120 if ((info
->flags
& DF_TEXTREL
) != 0)
17122 if (!add_dynamic_entry (DT_TEXTREL
, 0))
17125 if (htab
->vxworks_p
17126 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
17129 #undef add_dynamic_entry
17134 /* Size sections even though they're not dynamic. We use it to setup
17135 _TLS_MODULE_BASE_, if needed. */
17138 elf32_arm_always_size_sections (bfd
*output_bfd
,
17139 struct bfd_link_info
*info
)
17142 struct elf32_arm_link_hash_table
*htab
;
17144 htab
= elf32_arm_hash_table (info
);
17146 if (bfd_link_relocatable (info
))
17149 tls_sec
= elf_hash_table (info
)->tls_sec
;
17153 struct elf_link_hash_entry
*tlsbase
;
17155 tlsbase
= elf_link_hash_lookup
17156 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
17160 struct bfd_link_hash_entry
*bh
= NULL
;
17161 const struct elf_backend_data
*bed
17162 = get_elf_backend_data (output_bfd
);
17164 if (!(_bfd_generic_link_add_one_symbol
17165 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
17166 tls_sec
, 0, NULL
, FALSE
,
17167 bed
->collect
, &bh
)))
17170 tlsbase
->type
= STT_TLS
;
17171 tlsbase
= (struct elf_link_hash_entry
*)bh
;
17172 tlsbase
->def_regular
= 1;
17173 tlsbase
->other
= STV_HIDDEN
;
17174 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
17178 if (htab
->fdpic_p
&& !bfd_link_relocatable (info
)
17179 && !bfd_elf_stack_segment_size (output_bfd
, info
,
17180 "__stacksize", DEFAULT_STACK_SIZE
))
17186 /* Finish up dynamic symbol handling. We set the contents of various
17187 dynamic sections here. */
17190 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
17191 struct bfd_link_info
* info
,
17192 struct elf_link_hash_entry
* h
,
17193 Elf_Internal_Sym
* sym
)
17195 struct elf32_arm_link_hash_table
*htab
;
17196 struct elf32_arm_link_hash_entry
*eh
;
17198 htab
= elf32_arm_hash_table (info
);
17202 eh
= (struct elf32_arm_link_hash_entry
*) h
;
17204 if (h
->plt
.offset
!= (bfd_vma
) -1)
17208 BFD_ASSERT (h
->dynindx
!= -1);
17209 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
17214 if (!h
->def_regular
)
17216 /* Mark the symbol as undefined, rather than as defined in
17217 the .plt section. */
17218 sym
->st_shndx
= SHN_UNDEF
;
17219 /* If the symbol is weak we need to clear the value.
17220 Otherwise, the PLT entry would provide a definition for
17221 the symbol even if the symbol wasn't defined anywhere,
17222 and so the symbol would never be NULL. Leave the value if
17223 there were any relocations where pointer equality matters
17224 (this is a clue for the dynamic linker, to make function
17225 pointer comparisons work between an application and shared
17227 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
17230 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
17232 /* At least one non-call relocation references this .iplt entry,
17233 so the .iplt entry is the function's canonical address. */
17234 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
17235 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
17236 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
17237 (output_bfd
, htab
->root
.iplt
->output_section
));
17238 sym
->st_value
= (h
->plt
.offset
17239 + htab
->root
.iplt
->output_section
->vma
17240 + htab
->root
.iplt
->output_offset
);
17247 Elf_Internal_Rela rel
;
17249 /* This symbol needs a copy reloc. Set it up. */
17250 BFD_ASSERT (h
->dynindx
!= -1
17251 && (h
->root
.type
== bfd_link_hash_defined
17252 || h
->root
.type
== bfd_link_hash_defweak
));
17255 rel
.r_offset
= (h
->root
.u
.def
.value
17256 + h
->root
.u
.def
.section
->output_section
->vma
17257 + h
->root
.u
.def
.section
->output_offset
);
17258 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
17259 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
17260 s
= htab
->root
.sreldynrelro
;
17262 s
= htab
->root
.srelbss
;
17263 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
17266 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17267 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17268 it is relative to the ".got" section. */
17269 if (h
== htab
->root
.hdynamic
17270 || (!htab
->fdpic_p
&& !htab
->vxworks_p
&& h
== htab
->root
.hgot
))
17271 sym
->st_shndx
= SHN_ABS
;
17277 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17279 const unsigned long *template, unsigned count
)
17283 for (ix
= 0; ix
!= count
; ix
++)
17285 unsigned long insn
= template[ix
];
17287 /* Emit mov pc,rx if bx is not permitted. */
17288 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
17289 insn
= (insn
& 0xf000000f) | 0x01a0f000;
17290 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
17294 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17295 other variants, NaCl needs this entry in a static executable's
17296 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17297 zero. For .iplt really only the last bundle is useful, and .iplt
17298 could have a shorter first entry, with each individual PLT entry's
17299 relative branch calculated differently so it targets the last
17300 bundle instead of the instruction before it (labelled .Lplt_tail
17301 above). But it's simpler to keep the size and layout of PLT0
17302 consistent with the dynamic case, at the cost of some dead code at
17303 the start of .iplt and the one dead store to the stack at the start
17306 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17307 asection
*plt
, bfd_vma got_displacement
)
17311 put_arm_insn (htab
, output_bfd
,
17312 elf32_arm_nacl_plt0_entry
[0]
17313 | arm_movw_immediate (got_displacement
),
17314 plt
->contents
+ 0);
17315 put_arm_insn (htab
, output_bfd
,
17316 elf32_arm_nacl_plt0_entry
[1]
17317 | arm_movt_immediate (got_displacement
),
17318 plt
->contents
+ 4);
17320 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
17321 put_arm_insn (htab
, output_bfd
,
17322 elf32_arm_nacl_plt0_entry
[i
],
17323 plt
->contents
+ (i
* 4));
17326 /* Finish up the dynamic sections. */
17329 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
17334 struct elf32_arm_link_hash_table
*htab
;
17336 htab
= elf32_arm_hash_table (info
);
17340 dynobj
= elf_hash_table (info
)->dynobj
;
17342 sgot
= htab
->root
.sgotplt
;
17343 /* A broken linker script might have discarded the dynamic sections.
17344 Catch this here so that we do not seg-fault later on. */
17345 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
17347 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
17349 if (elf_hash_table (info
)->dynamic_sections_created
)
17352 Elf32_External_Dyn
*dyncon
, *dynconend
;
17354 splt
= htab
->root
.splt
;
17355 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
17356 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
17358 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
17359 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
17361 for (; dyncon
< dynconend
; dyncon
++)
17363 Elf_Internal_Dyn dyn
;
17367 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
17374 if (htab
->vxworks_p
17375 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
17376 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17381 goto get_vma_if_bpabi
;
17384 goto get_vma_if_bpabi
;
17387 goto get_vma_if_bpabi
;
17389 name
= ".gnu.version";
17390 goto get_vma_if_bpabi
;
17392 name
= ".gnu.version_d";
17393 goto get_vma_if_bpabi
;
17395 name
= ".gnu.version_r";
17396 goto get_vma_if_bpabi
;
17399 name
= htab
->symbian_p
? ".got" : ".got.plt";
17402 name
= RELOC_SECTION (htab
, ".plt");
17404 s
= bfd_get_linker_section (dynobj
, name
);
17408 (_("could not find section %s"), name
);
17409 bfd_set_error (bfd_error_invalid_operation
);
17412 if (!htab
->symbian_p
)
17413 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
17415 /* In the BPABI, tags in the PT_DYNAMIC section point
17416 at the file offset, not the memory address, for the
17417 convenience of the post linker. */
17418 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
17419 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17423 if (htab
->symbian_p
)
17428 s
= htab
->root
.srelplt
;
17429 BFD_ASSERT (s
!= NULL
);
17430 dyn
.d_un
.d_val
= s
->size
;
17431 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17438 /* In the BPABI, the DT_REL tag must point at the file
17439 offset, not the VMA, of the first relocation
17440 section. So, we use code similar to that in
17441 elflink.c, but do not check for SHF_ALLOC on the
17442 relocation section, since relocation sections are
17443 never allocated under the BPABI. PLT relocs are also
17445 if (htab
->symbian_p
)
17448 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
17449 ? SHT_REL
: SHT_RELA
);
17450 dyn
.d_un
.d_val
= 0;
17451 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
17453 Elf_Internal_Shdr
*hdr
17454 = elf_elfsections (output_bfd
)[i
];
17455 if (hdr
->sh_type
== type
)
17457 if (dyn
.d_tag
== DT_RELSZ
17458 || dyn
.d_tag
== DT_RELASZ
)
17459 dyn
.d_un
.d_val
+= hdr
->sh_size
;
17460 else if ((ufile_ptr
) hdr
->sh_offset
17461 <= dyn
.d_un
.d_val
- 1)
17462 dyn
.d_un
.d_val
= hdr
->sh_offset
;
17465 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17469 case DT_TLSDESC_PLT
:
17470 s
= htab
->root
.splt
;
17471 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17472 + htab
->dt_tlsdesc_plt
);
17473 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17476 case DT_TLSDESC_GOT
:
17477 s
= htab
->root
.sgot
;
17478 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17479 + htab
->dt_tlsdesc_got
);
17480 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17483 /* Set the bottom bit of DT_INIT/FINI if the
17484 corresponding function is Thumb. */
17486 name
= info
->init_function
;
17489 name
= info
->fini_function
;
17491 /* If it wasn't set by elf_bfd_final_link
17492 then there is nothing to adjust. */
17493 if (dyn
.d_un
.d_val
!= 0)
17495 struct elf_link_hash_entry
* eh
;
17497 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
17498 FALSE
, FALSE
, TRUE
);
17500 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
17501 == ST_BRANCH_TO_THUMB
)
17503 dyn
.d_un
.d_val
|= 1;
17504 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17511 /* Fill in the first entry in the procedure linkage table. */
17512 if (splt
->size
> 0 && htab
->plt_header_size
)
17514 const bfd_vma
*plt0_entry
;
17515 bfd_vma got_address
, plt_address
, got_displacement
;
17517 /* Calculate the addresses of the GOT and PLT. */
17518 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
17519 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
17521 if (htab
->vxworks_p
)
17523 /* The VxWorks GOT is relocated by the dynamic linker.
17524 Therefore, we must emit relocations rather than simply
17525 computing the values now. */
17526 Elf_Internal_Rela rel
;
17528 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
17529 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17530 splt
->contents
+ 0);
17531 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17532 splt
->contents
+ 4);
17533 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17534 splt
->contents
+ 8);
17535 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
17537 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17538 rel
.r_offset
= plt_address
+ 12;
17539 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17541 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
17542 htab
->srelplt2
->contents
);
17544 else if (htab
->nacl_p
)
17545 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
17546 got_address
+ 8 - (plt_address
+ 16));
17547 else if (using_thumb_only (htab
))
17549 got_displacement
= got_address
- (plt_address
+ 12);
17551 plt0_entry
= elf32_thumb2_plt0_entry
;
17552 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17553 splt
->contents
+ 0);
17554 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17555 splt
->contents
+ 4);
17556 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17557 splt
->contents
+ 8);
17559 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
17563 got_displacement
= got_address
- (plt_address
+ 16);
17565 plt0_entry
= elf32_arm_plt0_entry
;
17566 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17567 splt
->contents
+ 0);
17568 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17569 splt
->contents
+ 4);
17570 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17571 splt
->contents
+ 8);
17572 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
17573 splt
->contents
+ 12);
17575 #ifdef FOUR_WORD_PLT
17576 /* The displacement value goes in the otherwise-unused
17577 last word of the second entry. */
17578 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
17580 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
17585 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17586 really seem like the right value. */
17587 if (splt
->output_section
->owner
== output_bfd
)
17588 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
17590 if (htab
->dt_tlsdesc_plt
)
17592 bfd_vma got_address
17593 = sgot
->output_section
->vma
+ sgot
->output_offset
;
17594 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
17595 + htab
->root
.sgot
->output_offset
);
17596 bfd_vma plt_address
17597 = splt
->output_section
->vma
+ splt
->output_offset
;
17599 arm_put_trampoline (htab
, output_bfd
,
17600 splt
->contents
+ htab
->dt_tlsdesc_plt
,
17601 dl_tlsdesc_lazy_trampoline
, 6);
17603 bfd_put_32 (output_bfd
,
17604 gotplt_address
+ htab
->dt_tlsdesc_got
17605 - (plt_address
+ htab
->dt_tlsdesc_plt
)
17606 - dl_tlsdesc_lazy_trampoline
[6],
17607 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
17608 bfd_put_32 (output_bfd
,
17609 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
17610 - dl_tlsdesc_lazy_trampoline
[7],
17611 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
17614 if (htab
->tls_trampoline
)
17616 arm_put_trampoline (htab
, output_bfd
,
17617 splt
->contents
+ htab
->tls_trampoline
,
17618 tls_trampoline
, 3);
17619 #ifdef FOUR_WORD_PLT
17620 bfd_put_32 (output_bfd
, 0x00000000,
17621 splt
->contents
+ htab
->tls_trampoline
+ 12);
17625 if (htab
->vxworks_p
17626 && !bfd_link_pic (info
)
17627 && htab
->root
.splt
->size
> 0)
17629 /* Correct the .rel(a).plt.unloaded relocations. They will have
17630 incorrect symbol indexes. */
17634 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
17635 / htab
->plt_entry_size
);
17636 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
17638 for (; num_plts
; num_plts
--)
17640 Elf_Internal_Rela rel
;
17642 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17643 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17644 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17645 p
+= RELOC_SIZE (htab
);
17647 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17648 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
17649 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17650 p
+= RELOC_SIZE (htab
);
17655 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
17656 /* NaCl uses a special first entry in .iplt too. */
17657 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
17659 /* Fill in the first three entries in the global offset table. */
17662 if (sgot
->size
> 0)
17665 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
17667 bfd_put_32 (output_bfd
,
17668 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
17670 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
17671 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
17674 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
17677 /* At the very end of the .rofixup section is a pointer to the GOT. */
17678 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17680 struct elf_link_hash_entry
*hgot
= htab
->root
.hgot
;
17682 bfd_vma got_value
= hgot
->root
.u
.def
.value
17683 + hgot
->root
.u
.def
.section
->output_section
->vma
17684 + hgot
->root
.u
.def
.section
->output_offset
;
17686 arm_elf_add_rofixup(output_bfd
, htab
->srofixup
, got_value
);
17688 /* Make sure we allocated and generated the same number of fixups. */
17689 BFD_ASSERT (htab
->srofixup
->reloc_count
* 4 == htab
->srofixup
->size
);
17696 elf32_arm_init_file_header (bfd
*abfd
, struct bfd_link_info
*link_info
)
17698 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
17699 struct elf32_arm_link_hash_table
*globals
;
17700 struct elf_segment_map
*m
;
17702 if (!_bfd_elf_init_file_header (abfd
, link_info
))
17705 i_ehdrp
= elf_elfheader (abfd
);
17707 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
17708 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
17709 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
17713 globals
= elf32_arm_hash_table (link_info
);
17714 if (globals
!= NULL
&& globals
->byteswap_code
)
17715 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
17717 if (globals
->fdpic_p
)
17718 i_ehdrp
->e_ident
[EI_OSABI
] |= ELFOSABI_ARM_FDPIC
;
17721 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
17722 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
17724 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
17725 if (abi
== AEABI_VFP_args_vfp
)
17726 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
17728 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
17731 /* Scan segment to set p_flags attribute if it contains only sections with
17732 SHF_ARM_PURECODE flag. */
17733 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
17739 for (j
= 0; j
< m
->count
; j
++)
17741 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
17747 m
->p_flags_valid
= 1;
17753 static enum elf_reloc_type_class
17754 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
17755 const asection
*rel_sec ATTRIBUTE_UNUSED
,
17756 const Elf_Internal_Rela
*rela
)
17758 switch ((int) ELF32_R_TYPE (rela
->r_info
))
17760 case R_ARM_RELATIVE
:
17761 return reloc_class_relative
;
17762 case R_ARM_JUMP_SLOT
:
17763 return reloc_class_plt
;
17765 return reloc_class_copy
;
17766 case R_ARM_IRELATIVE
:
17767 return reloc_class_ifunc
;
17769 return reloc_class_normal
;
17774 arm_final_write_processing (bfd
*abfd
)
17776 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
17780 elf32_arm_final_write_processing (bfd
*abfd
)
17782 arm_final_write_processing (abfd
);
17783 return _bfd_elf_final_write_processing (abfd
);
17786 /* Return TRUE if this is an unwinding table entry. */
17789 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
17791 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
17792 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
17796 /* Set the type and flags for an ARM section. We do this by
17797 the section name, which is a hack, but ought to work. */
17800 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
17804 name
= bfd_section_name (sec
);
17806 if (is_arm_elf_unwind_section_name (abfd
, name
))
17808 hdr
->sh_type
= SHT_ARM_EXIDX
;
17809 hdr
->sh_flags
|= SHF_LINK_ORDER
;
17812 if (sec
->flags
& SEC_ELF_PURECODE
)
17813 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
17818 /* Handle an ARM specific section when reading an object file. This is
17819 called when bfd_section_from_shdr finds a section with an unknown
17823 elf32_arm_section_from_shdr (bfd
*abfd
,
17824 Elf_Internal_Shdr
* hdr
,
17828 /* There ought to be a place to keep ELF backend specific flags, but
17829 at the moment there isn't one. We just keep track of the
17830 sections by their name, instead. Fortunately, the ABI gives
17831 names for all the ARM specific sections, so we will probably get
17833 switch (hdr
->sh_type
)
17835 case SHT_ARM_EXIDX
:
17836 case SHT_ARM_PREEMPTMAP
:
17837 case SHT_ARM_ATTRIBUTES
:
17844 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
17850 static _arm_elf_section_data
*
17851 get_arm_elf_section_data (asection
* sec
)
17853 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
17854 return elf32_arm_section_data (sec
);
17862 struct bfd_link_info
*info
;
17865 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
17866 asection
*, struct elf_link_hash_entry
*);
17867 } output_arch_syminfo
;
17869 enum map_symbol_type
17877 /* Output a single mapping symbol. */
17880 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
17881 enum map_symbol_type type
,
17884 static const char *names
[3] = {"$a", "$t", "$d"};
17885 Elf_Internal_Sym sym
;
17887 sym
.st_value
= osi
->sec
->output_section
->vma
17888 + osi
->sec
->output_offset
17892 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
17893 sym
.st_shndx
= osi
->sec_shndx
;
17894 sym
.st_target_internal
= 0;
17895 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
17896 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
17899 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17900 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17903 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
17904 bfd_boolean is_iplt_entry_p
,
17905 union gotplt_union
*root_plt
,
17906 struct arm_plt_info
*arm_plt
)
17908 struct elf32_arm_link_hash_table
*htab
;
17909 bfd_vma addr
, plt_header_size
;
17911 if (root_plt
->offset
== (bfd_vma
) -1)
17914 htab
= elf32_arm_hash_table (osi
->info
);
17918 if (is_iplt_entry_p
)
17920 osi
->sec
= htab
->root
.iplt
;
17921 plt_header_size
= 0;
17925 osi
->sec
= htab
->root
.splt
;
17926 plt_header_size
= htab
->plt_header_size
;
17928 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
17929 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
17931 addr
= root_plt
->offset
& -2;
17932 if (htab
->symbian_p
)
17934 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17936 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
17939 else if (htab
->vxworks_p
)
17941 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17943 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
17945 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
17947 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
17950 else if (htab
->nacl_p
)
17952 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17955 else if (htab
->fdpic_p
)
17957 enum map_symbol_type type
= using_thumb_only(htab
)
17961 if (elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
))
17962 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
17964 if (!elf32_arm_output_map_sym (osi
, type
, addr
))
17966 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 16))
17968 if (htab
->plt_entry_size
== 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
))
17969 if (!elf32_arm_output_map_sym (osi
, type
, addr
+ 24))
17972 else if (using_thumb_only (htab
))
17974 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
17979 bfd_boolean thumb_stub_p
;
17981 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
17984 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
17987 #ifdef FOUR_WORD_PLT
17988 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17990 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
17993 /* A three-word PLT with no Thumb thunk contains only Arm code,
17994 so only need to output a mapping symbol for the first PLT entry and
17995 entries with thumb thunks. */
17996 if (thumb_stub_p
|| addr
== plt_header_size
)
17998 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18007 /* Output mapping symbols for PLT entries associated with H. */
18010 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
18012 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
18013 struct elf32_arm_link_hash_entry
*eh
;
18015 if (h
->root
.type
== bfd_link_hash_indirect
)
18018 if (h
->root
.type
== bfd_link_hash_warning
)
18019 /* When warning symbols are created, they **replace** the "real"
18020 entry in the hash table, thus we never get to see the real
18021 symbol in a hash traversal. So look at it now. */
18022 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
18024 eh
= (struct elf32_arm_link_hash_entry
*) h
;
18025 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
18026 &h
->plt
, &eh
->plt
);
18029 /* Bind a veneered symbol to its veneer identified by its hash entry
18030 STUB_ENTRY. The veneered location thus loose its symbol. */
18033 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
18035 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
18038 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
18039 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
18040 hash
->root
.size
= stub_entry
->stub_size
;
18043 /* Output a single local symbol for a generated stub. */
18046 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
18047 bfd_vma offset
, bfd_vma size
)
18049 Elf_Internal_Sym sym
;
18051 sym
.st_value
= osi
->sec
->output_section
->vma
18052 + osi
->sec
->output_offset
18054 sym
.st_size
= size
;
18056 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
18057 sym
.st_shndx
= osi
->sec_shndx
;
18058 sym
.st_target_internal
= 0;
18059 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
18063 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
18066 struct elf32_arm_stub_hash_entry
*stub_entry
;
18067 asection
*stub_sec
;
18070 output_arch_syminfo
*osi
;
18071 const insn_sequence
*template_sequence
;
18072 enum stub_insn_type prev_type
;
18075 enum map_symbol_type sym_type
;
18077 /* Massage our args to the form they really have. */
18078 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18079 osi
= (output_arch_syminfo
*) in_arg
;
18081 stub_sec
= stub_entry
->stub_sec
;
18083 /* Ensure this stub is attached to the current section being
18085 if (stub_sec
!= osi
->sec
)
18088 addr
= (bfd_vma
) stub_entry
->stub_offset
;
18089 template_sequence
= stub_entry
->stub_template
;
18091 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
18092 arm_stub_claim_sym (stub_entry
);
18095 stub_name
= stub_entry
->output_name
;
18096 switch (template_sequence
[0].type
)
18099 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
18100 stub_entry
->stub_size
))
18105 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
18106 stub_entry
->stub_size
))
18115 prev_type
= DATA_TYPE
;
18117 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
18119 switch (template_sequence
[i
].type
)
18122 sym_type
= ARM_MAP_ARM
;
18127 sym_type
= ARM_MAP_THUMB
;
18131 sym_type
= ARM_MAP_DATA
;
18139 if (template_sequence
[i
].type
!= prev_type
)
18141 prev_type
= template_sequence
[i
].type
;
18142 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
18146 switch (template_sequence
[i
].type
)
18170 /* Output mapping symbols for linker generated sections,
18171 and for those data-only sections that do not have a
18175 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
18176 struct bfd_link_info
*info
,
18178 int (*func
) (void *, const char *,
18179 Elf_Internal_Sym
*,
18181 struct elf_link_hash_entry
*))
18183 output_arch_syminfo osi
;
18184 struct elf32_arm_link_hash_table
*htab
;
18186 bfd_size_type size
;
18189 htab
= elf32_arm_hash_table (info
);
18193 check_use_blx (htab
);
18195 osi
.flaginfo
= flaginfo
;
18199 /* Add a $d mapping symbol to data-only sections that
18200 don't have any mapping symbol. This may result in (harmless) redundant
18201 mapping symbols. */
18202 for (input_bfd
= info
->input_bfds
;
18204 input_bfd
= input_bfd
->link
.next
)
18206 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
18207 for (osi
.sec
= input_bfd
->sections
;
18209 osi
.sec
= osi
.sec
->next
)
18211 if (osi
.sec
->output_section
!= NULL
18212 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
18214 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
18215 == SEC_HAS_CONTENTS
18216 && get_arm_elf_section_data (osi
.sec
) != NULL
18217 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
18218 && osi
.sec
->size
> 0
18219 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
18221 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18222 (output_bfd
, osi
.sec
->output_section
);
18223 if (osi
.sec_shndx
!= (int)SHN_BAD
)
18224 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
18229 /* ARM->Thumb glue. */
18230 if (htab
->arm_glue_size
> 0)
18232 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18233 ARM2THUMB_GLUE_SECTION_NAME
);
18235 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18236 (output_bfd
, osi
.sec
->output_section
);
18237 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
18238 || htab
->pic_veneer
)
18239 size
= ARM2THUMB_PIC_GLUE_SIZE
;
18240 else if (htab
->use_blx
)
18241 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
18243 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
18245 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
18247 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
18248 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
18252 /* Thumb->ARM glue. */
18253 if (htab
->thumb_glue_size
> 0)
18255 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18256 THUMB2ARM_GLUE_SECTION_NAME
);
18258 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18259 (output_bfd
, osi
.sec
->output_section
);
18260 size
= THUMB2ARM_GLUE_SIZE
;
18262 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
18264 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
18265 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
18269 /* ARMv4 BX veneers. */
18270 if (htab
->bx_glue_size
> 0)
18272 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18273 ARM_BX_GLUE_SECTION_NAME
);
18275 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18276 (output_bfd
, osi
.sec
->output_section
);
18278 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
18281 /* Long calls stubs. */
18282 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
18284 asection
* stub_sec
;
18286 for (stub_sec
= htab
->stub_bfd
->sections
;
18288 stub_sec
= stub_sec
->next
)
18290 /* Ignore non-stub sections. */
18291 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
18294 osi
.sec
= stub_sec
;
18296 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18297 (output_bfd
, osi
.sec
->output_section
);
18299 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
18303 /* Finally, output mapping symbols for the PLT. */
18304 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18306 osi
.sec
= htab
->root
.splt
;
18307 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18308 (output_bfd
, osi
.sec
->output_section
));
18310 /* Output mapping symbols for the plt header. SymbianOS does not have a
18312 if (htab
->vxworks_p
)
18314 /* VxWorks shared libraries have no PLT header. */
18315 if (!bfd_link_pic (info
))
18317 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18319 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18323 else if (htab
->nacl_p
)
18325 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18328 else if (using_thumb_only (htab
) && !htab
->fdpic_p
)
18330 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
18332 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18334 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
18337 else if (!htab
->symbian_p
&& !htab
->fdpic_p
)
18339 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18341 #ifndef FOUR_WORD_PLT
18342 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
18347 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
18349 /* NaCl uses a special first entry in .iplt too. */
18350 osi
.sec
= htab
->root
.iplt
;
18351 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18352 (output_bfd
, osi
.sec
->output_section
));
18353 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18356 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18357 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
18359 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
18360 for (input_bfd
= info
->input_bfds
;
18362 input_bfd
= input_bfd
->link
.next
)
18364 struct arm_local_iplt_info
**local_iplt
;
18365 unsigned int i
, num_syms
;
18367 local_iplt
= elf32_arm_local_iplt (input_bfd
);
18368 if (local_iplt
!= NULL
)
18370 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
18371 for (i
= 0; i
< num_syms
; i
++)
18372 if (local_iplt
[i
] != NULL
18373 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
18374 &local_iplt
[i
]->root
,
18375 &local_iplt
[i
]->arm
))
18380 if (htab
->dt_tlsdesc_plt
!= 0)
18382 /* Mapping symbols for the lazy tls trampoline. */
18383 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
18386 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18387 htab
->dt_tlsdesc_plt
+ 24))
18390 if (htab
->tls_trampoline
!= 0)
18392 /* Mapping symbols for the tls trampoline. */
18393 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
18395 #ifdef FOUR_WORD_PLT
18396 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18397 htab
->tls_trampoline
+ 12))
18405 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18406 the import library. All SYMCOUNT symbols of ABFD can be examined
18407 from their pointers in SYMS. Pointers of symbols to keep should be
18408 stored continuously at the beginning of that array.
18410 Returns the number of symbols to keep. */
18412 static unsigned int
18413 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18414 struct bfd_link_info
*info
,
18415 asymbol
**syms
, long symcount
)
18419 long src_count
, dst_count
= 0;
18420 struct elf32_arm_link_hash_table
*htab
;
18422 htab
= elf32_arm_hash_table (info
);
18423 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
18427 cmse_name
= (char *) bfd_malloc (maxnamelen
);
18428 BFD_ASSERT (cmse_name
);
18430 for (src_count
= 0; src_count
< symcount
; src_count
++)
18432 struct elf32_arm_link_hash_entry
*cmse_hash
;
18438 sym
= syms
[src_count
];
18439 flags
= sym
->flags
;
18440 name
= (char *) bfd_asymbol_name (sym
);
18442 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
18444 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
18447 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
18448 if (namelen
> maxnamelen
)
18450 cmse_name
= (char *)
18451 bfd_realloc (cmse_name
, namelen
);
18452 maxnamelen
= namelen
;
18454 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
18455 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
18456 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
18459 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
18460 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
18461 || cmse_hash
->root
.type
!= STT_FUNC
)
18464 syms
[dst_count
++] = sym
;
18468 syms
[dst_count
] = NULL
;
18473 /* Filter symbols of ABFD to include in the import library. All
18474 SYMCOUNT symbols of ABFD can be examined from their pointers in
18475 SYMS. Pointers of symbols to keep should be stored continuously at
18476 the beginning of that array.
18478 Returns the number of symbols to keep. */
18480 static unsigned int
18481 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18482 struct bfd_link_info
*info
,
18483 asymbol
**syms
, long symcount
)
18485 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
18487 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18488 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18489 library to be a relocatable object file. */
18490 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
18491 if (globals
->cmse_implib
)
18492 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
18494 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
18497 /* Allocate target specific section data. */
18500 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
18502 if (!sec
->used_by_bfd
)
18504 _arm_elf_section_data
*sdata
;
18505 size_t amt
= sizeof (*sdata
);
18507 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
18510 sec
->used_by_bfd
= sdata
;
18513 return _bfd_elf_new_section_hook (abfd
, sec
);
18517 /* Used to order a list of mapping symbols by address. */
18520 elf32_arm_compare_mapping (const void * a
, const void * b
)
18522 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
18523 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
18525 if (amap
->vma
> bmap
->vma
)
18527 else if (amap
->vma
< bmap
->vma
)
18529 else if (amap
->type
> bmap
->type
)
18530 /* Ensure results do not depend on the host qsort for objects with
18531 multiple mapping symbols at the same address by sorting on type
18534 else if (amap
->type
< bmap
->type
)
18540 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18542 static unsigned long
18543 offset_prel31 (unsigned long addr
, bfd_vma offset
)
18545 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
18548 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18552 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
18554 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
18555 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
18557 /* High bit of first word is supposed to be zero. */
18558 if ((first_word
& 0x80000000ul
) == 0)
18559 first_word
= offset_prel31 (first_word
, offset
);
18561 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18562 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18563 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
18564 second_word
= offset_prel31 (second_word
, offset
);
18566 bfd_put_32 (output_bfd
, first_word
, to
);
18567 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
18570 /* Data for make_branch_to_a8_stub(). */
18572 struct a8_branch_to_stub_data
18574 asection
*writing_section
;
18575 bfd_byte
*contents
;
18579 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18580 places for a particular section. */
18583 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
18586 struct elf32_arm_stub_hash_entry
*stub_entry
;
18587 struct a8_branch_to_stub_data
*data
;
18588 bfd_byte
*contents
;
18589 unsigned long branch_insn
;
18590 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
18591 bfd_signed_vma branch_offset
;
18595 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18596 data
= (struct a8_branch_to_stub_data
*) in_arg
;
18598 if (stub_entry
->target_section
!= data
->writing_section
18599 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
18602 contents
= data
->contents
;
18604 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18605 generated when both source and target are in the same section. */
18606 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
18607 + stub_entry
->target_section
->output_offset
18608 + stub_entry
->source_value
;
18610 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
18611 + stub_entry
->stub_sec
->output_offset
18612 + stub_entry
->stub_offset
;
18614 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
18615 veneered_insn_loc
&= ~3u;
18617 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
18619 abfd
= stub_entry
->target_section
->owner
;
18620 loc
= stub_entry
->source_value
;
18622 /* We attempt to avoid this condition by setting stubs_always_after_branch
18623 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18624 This check is just to be on the safe side... */
18625 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
18627 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18628 "allocated in unsafe location"), abfd
);
18632 switch (stub_entry
->stub_type
)
18634 case arm_stub_a8_veneer_b
:
18635 case arm_stub_a8_veneer_b_cond
:
18636 branch_insn
= 0xf0009000;
18639 case arm_stub_a8_veneer_blx
:
18640 branch_insn
= 0xf000e800;
18643 case arm_stub_a8_veneer_bl
:
18645 unsigned int i1
, j1
, i2
, j2
, s
;
18647 branch_insn
= 0xf000d000;
18650 if (branch_offset
< -16777216 || branch_offset
> 16777214)
18652 /* There's not much we can do apart from complain if this
18654 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18655 "of range (input file too large)"), abfd
);
18659 /* i1 = not(j1 eor s), so:
18661 j1 = (not i1) eor s. */
18663 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
18664 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
18665 i2
= (branch_offset
>> 22) & 1;
18666 i1
= (branch_offset
>> 23) & 1;
18667 s
= (branch_offset
>> 24) & 1;
18670 branch_insn
|= j2
<< 11;
18671 branch_insn
|= j1
<< 13;
18672 branch_insn
|= s
<< 26;
18681 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
18682 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
18687 /* Beginning of stm32l4xx work-around. */
18689 /* Functions encoding instructions necessary for the emission of the
18690 fix-stm32l4xx-629360.
18691 Encoding is extracted from the
18692 ARM (C) Architecture Reference Manual
18693 ARMv7-A and ARMv7-R edition
18694 ARM DDI 0406C.b (ID072512). */
18696 static inline bfd_vma
18697 create_instruction_branch_absolute (int branch_offset
)
18699 /* A8.8.18 B (A8-334)
18700 B target_address (Encoding T4). */
18701 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18702 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18703 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18705 int s
= ((branch_offset
& 0x1000000) >> 24);
18706 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
18707 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
18709 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
18710 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18712 bfd_vma patched_inst
= 0xf0009000
18714 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
18715 | j1
<< 13 /* J1. */
18716 | j2
<< 11 /* J2. */
18717 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
18719 return patched_inst
;
18722 static inline bfd_vma
18723 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
18725 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18726 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18727 bfd_vma patched_inst
= 0xe8900000
18728 | (/*W=*/wback
<< 21)
18730 | (reg_mask
& 0x0000ffff);
18732 return patched_inst
;
18735 static inline bfd_vma
18736 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
18738 /* A8.8.60 LDMDB/LDMEA (A8-402)
18739 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18740 bfd_vma patched_inst
= 0xe9100000
18741 | (/*W=*/wback
<< 21)
18743 | (reg_mask
& 0x0000ffff);
18745 return patched_inst
;
18748 static inline bfd_vma
18749 create_instruction_mov (int target_reg
, int source_reg
)
18751 /* A8.8.103 MOV (register) (A8-486)
18752 MOV Rd, Rm (Encoding T1). */
18753 bfd_vma patched_inst
= 0x4600
18754 | (target_reg
& 0x7)
18755 | ((target_reg
& 0x8) >> 3) << 7
18756 | (source_reg
<< 3);
18758 return patched_inst
;
18761 static inline bfd_vma
18762 create_instruction_sub (int target_reg
, int source_reg
, int value
)
18764 /* A8.8.221 SUB (immediate) (A8-708)
18765 SUB Rd, Rn, #value (Encoding T3). */
18766 bfd_vma patched_inst
= 0xf1a00000
18767 | (target_reg
<< 8)
18768 | (source_reg
<< 16)
18770 | ((value
& 0x800) >> 11) << 26
18771 | ((value
& 0x700) >> 8) << 12
18774 return patched_inst
;
18777 static inline bfd_vma
18778 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
18781 /* A8.8.332 VLDM (A8-922)
18782 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18783 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
18784 | (/*W=*/wback
<< 21)
18786 | (num_words
& 0x000000ff)
18787 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
18788 | (first_reg
& 0x00000001) << 22;
18790 return patched_inst
;
18793 static inline bfd_vma
18794 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
18797 /* A8.8.332 VLDM (A8-922)
18798 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18799 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
18801 | (num_words
& 0x000000ff)
18802 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
18803 | (first_reg
& 0x00000001) << 22;
18805 return patched_inst
;
18808 static inline bfd_vma
18809 create_instruction_udf_w (int value
)
18811 /* A8.8.247 UDF (A8-758)
18812 Undefined (Encoding T2). */
18813 bfd_vma patched_inst
= 0xf7f0a000
18814 | (value
& 0x00000fff)
18815 | (value
& 0x000f0000) << 16;
18817 return patched_inst
;
18820 static inline bfd_vma
18821 create_instruction_udf (int value
)
18823 /* A8.8.247 UDF (A8-758)
18824 Undefined (Encoding T1). */
18825 bfd_vma patched_inst
= 0xde00
18828 return patched_inst
;
18831 /* Functions writing an instruction in memory, returning the next
18832 memory position to write to. */
18834 static inline bfd_byte
*
18835 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
18836 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18838 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
18842 static inline bfd_byte
*
18843 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
18844 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18846 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
18850 /* Function filling up a region in memory with T1 and T2 UDFs taking
18851 care of alignment. */
18854 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
18856 const bfd_byte
* const base_stub_contents
,
18857 bfd_byte
* const from_stub_contents
,
18858 const bfd_byte
* const end_stub_contents
)
18860 bfd_byte
*current_stub_contents
= from_stub_contents
;
18862 /* Fill the remaining of the stub with deterministic contents : UDF
18864 Check if realignment is needed on modulo 4 frontier using T1, to
18866 if ((current_stub_contents
< end_stub_contents
)
18867 && !((current_stub_contents
- base_stub_contents
) % 2)
18868 && ((current_stub_contents
- base_stub_contents
) % 4))
18869 current_stub_contents
=
18870 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18871 create_instruction_udf (0));
18873 for (; current_stub_contents
< end_stub_contents
;)
18874 current_stub_contents
=
18875 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18876 create_instruction_udf_w (0));
18878 return current_stub_contents
;
18881 /* Functions writing the stream of instructions equivalent to the
18882 derived sequence for ldmia, ldmdb, vldm respectively. */
18885 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
18887 const insn32 initial_insn
,
18888 const bfd_byte
*const initial_insn_addr
,
18889 bfd_byte
*const base_stub_contents
)
18891 int wback
= (initial_insn
& 0x00200000) >> 21;
18892 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
18893 int insn_all_registers
= initial_insn
& 0x0000ffff;
18894 int insn_low_registers
, insn_high_registers
;
18895 int usable_register_mask
;
18896 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
18897 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
18898 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
18899 bfd_byte
*current_stub_contents
= base_stub_contents
;
18901 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
18903 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18904 smaller than 8 registers load sequences that do not cause the
18906 if (nb_registers
<= 8)
18908 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18909 current_stub_contents
=
18910 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18913 /* B initial_insn_addr+4. */
18915 current_stub_contents
=
18916 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18917 create_instruction_branch_absolute
18918 (initial_insn_addr
- current_stub_contents
));
18920 /* Fill the remaining of the stub with deterministic contents. */
18921 current_stub_contents
=
18922 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18923 base_stub_contents
, current_stub_contents
,
18924 base_stub_contents
+
18925 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18930 /* - reg_list[13] == 0. */
18931 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
18933 /* - reg_list[14] & reg_list[15] != 1. */
18934 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
18936 /* - if (wback==1) reg_list[rn] == 0. */
18937 BFD_ASSERT (!wback
|| !restore_rn
);
18939 /* - nb_registers > 8. */
18940 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
18942 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18944 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18945 - One with the 7 lowest registers (register mask 0x007F)
18946 This LDM will finally contain between 2 and 7 registers
18947 - One with the 7 highest registers (register mask 0xDF80)
18948 This ldm will finally contain between 2 and 7 registers. */
18949 insn_low_registers
= insn_all_registers
& 0x007F;
18950 insn_high_registers
= insn_all_registers
& 0xDF80;
18952 /* A spare register may be needed during this veneer to temporarily
18953 handle the base register. This register will be restored with the
18954 last LDM operation.
18955 The usable register may be any general purpose register (that
18956 excludes PC, SP, LR : register mask is 0x1FFF). */
18957 usable_register_mask
= 0x1FFF;
18959 /* Generate the stub function. */
18962 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18963 current_stub_contents
=
18964 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18965 create_instruction_ldmia
18966 (rn
, /*wback=*/1, insn_low_registers
));
18968 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18969 current_stub_contents
=
18970 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18971 create_instruction_ldmia
18972 (rn
, /*wback=*/1, insn_high_registers
));
18975 /* B initial_insn_addr+4. */
18976 current_stub_contents
=
18977 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18978 create_instruction_branch_absolute
18979 (initial_insn_addr
- current_stub_contents
));
18982 else /* if (!wback). */
18986 /* If Rn is not part of the high-register-list, move it there. */
18987 if (!(insn_high_registers
& (1 << rn
)))
18989 /* Choose a Ri in the high-register-list that will be restored. */
18990 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18993 current_stub_contents
=
18994 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18995 create_instruction_mov (ri
, rn
));
18998 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18999 current_stub_contents
=
19000 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19001 create_instruction_ldmia
19002 (ri
, /*wback=*/1, insn_low_registers
));
19004 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19005 current_stub_contents
=
19006 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19007 create_instruction_ldmia
19008 (ri
, /*wback=*/0, insn_high_registers
));
19012 /* B initial_insn_addr+4. */
19013 current_stub_contents
=
19014 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19015 create_instruction_branch_absolute
19016 (initial_insn_addr
- current_stub_contents
));
19020 /* Fill the remaining of the stub with deterministic contents. */
19021 current_stub_contents
=
19022 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19023 base_stub_contents
, current_stub_contents
,
19024 base_stub_contents
+
19025 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19029 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
19031 const insn32 initial_insn
,
19032 const bfd_byte
*const initial_insn_addr
,
19033 bfd_byte
*const base_stub_contents
)
19035 int wback
= (initial_insn
& 0x00200000) >> 21;
19036 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
19037 int insn_all_registers
= initial_insn
& 0x0000ffff;
19038 int insn_low_registers
, insn_high_registers
;
19039 int usable_register_mask
;
19040 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
19041 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
19042 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
19043 bfd_byte
*current_stub_contents
= base_stub_contents
;
19045 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
19047 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19048 smaller than 8 registers load sequences that do not cause the
19050 if (nb_registers
<= 8)
19052 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19053 current_stub_contents
=
19054 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19057 /* B initial_insn_addr+4. */
19058 current_stub_contents
=
19059 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19060 create_instruction_branch_absolute
19061 (initial_insn_addr
- current_stub_contents
));
19063 /* Fill the remaining of the stub with deterministic contents. */
19064 current_stub_contents
=
19065 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19066 base_stub_contents
, current_stub_contents
,
19067 base_stub_contents
+
19068 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19073 /* - reg_list[13] == 0. */
19074 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
19076 /* - reg_list[14] & reg_list[15] != 1. */
19077 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19079 /* - if (wback==1) reg_list[rn] == 0. */
19080 BFD_ASSERT (!wback
|| !restore_rn
);
19082 /* - nb_registers > 8. */
19083 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19085 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19087 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19088 - One with the 7 lowest registers (register mask 0x007F)
19089 This LDM will finally contain between 2 and 7 registers
19090 - One with the 7 highest registers (register mask 0xDF80)
19091 This ldm will finally contain between 2 and 7 registers. */
19092 insn_low_registers
= insn_all_registers
& 0x007F;
19093 insn_high_registers
= insn_all_registers
& 0xDF80;
19095 /* A spare register may be needed during this veneer to temporarily
19096 handle the base register. This register will be restored with
19097 the last LDM operation.
19098 The usable register may be any general purpose register (that excludes
19099 PC, SP, LR : register mask is 0x1FFF). */
19100 usable_register_mask
= 0x1FFF;
19102 /* Generate the stub function. */
19103 if (!wback
&& !restore_pc
&& !restore_rn
)
19105 /* Choose a Ri in the low-register-list that will be restored. */
19106 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19109 current_stub_contents
=
19110 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19111 create_instruction_mov (ri
, rn
));
19113 /* LDMDB Ri!, {R-high-register-list}. */
19114 current_stub_contents
=
19115 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19116 create_instruction_ldmdb
19117 (ri
, /*wback=*/1, insn_high_registers
));
19119 /* LDMDB Ri, {R-low-register-list}. */
19120 current_stub_contents
=
19121 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19122 create_instruction_ldmdb
19123 (ri
, /*wback=*/0, insn_low_registers
));
19125 /* B initial_insn_addr+4. */
19126 current_stub_contents
=
19127 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19128 create_instruction_branch_absolute
19129 (initial_insn_addr
- current_stub_contents
));
19131 else if (wback
&& !restore_pc
&& !restore_rn
)
19133 /* LDMDB Rn!, {R-high-register-list}. */
19134 current_stub_contents
=
19135 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19136 create_instruction_ldmdb
19137 (rn
, /*wback=*/1, insn_high_registers
));
19139 /* LDMDB Rn!, {R-low-register-list}. */
19140 current_stub_contents
=
19141 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19142 create_instruction_ldmdb
19143 (rn
, /*wback=*/1, insn_low_registers
));
19145 /* B initial_insn_addr+4. */
19146 current_stub_contents
=
19147 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19148 create_instruction_branch_absolute
19149 (initial_insn_addr
- current_stub_contents
));
19151 else if (!wback
&& restore_pc
&& !restore_rn
)
19153 /* Choose a Ri in the high-register-list that will be restored. */
19154 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19156 /* SUB Ri, Rn, #(4*nb_registers). */
19157 current_stub_contents
=
19158 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19159 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19161 /* LDMIA Ri!, {R-low-register-list}. */
19162 current_stub_contents
=
19163 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19164 create_instruction_ldmia
19165 (ri
, /*wback=*/1, insn_low_registers
));
19167 /* LDMIA Ri, {R-high-register-list}. */
19168 current_stub_contents
=
19169 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19170 create_instruction_ldmia
19171 (ri
, /*wback=*/0, insn_high_registers
));
19173 else if (wback
&& restore_pc
&& !restore_rn
)
19175 /* Choose a Ri in the high-register-list that will be restored. */
19176 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19178 /* SUB Rn, Rn, #(4*nb_registers) */
19179 current_stub_contents
=
19180 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19181 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
19184 current_stub_contents
=
19185 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19186 create_instruction_mov (ri
, rn
));
19188 /* LDMIA Ri!, {R-low-register-list}. */
19189 current_stub_contents
=
19190 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19191 create_instruction_ldmia
19192 (ri
, /*wback=*/1, insn_low_registers
));
19194 /* LDMIA Ri, {R-high-register-list}. */
19195 current_stub_contents
=
19196 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19197 create_instruction_ldmia
19198 (ri
, /*wback=*/0, insn_high_registers
));
19200 else if (!wback
&& !restore_pc
&& restore_rn
)
19203 if (!(insn_low_registers
& (1 << rn
)))
19205 /* Choose a Ri in the low-register-list that will be restored. */
19206 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19209 current_stub_contents
=
19210 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19211 create_instruction_mov (ri
, rn
));
19214 /* LDMDB Ri!, {R-high-register-list}. */
19215 current_stub_contents
=
19216 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19217 create_instruction_ldmdb
19218 (ri
, /*wback=*/1, insn_high_registers
));
19220 /* LDMDB Ri, {R-low-register-list}. */
19221 current_stub_contents
=
19222 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19223 create_instruction_ldmdb
19224 (ri
, /*wback=*/0, insn_low_registers
));
19226 /* B initial_insn_addr+4. */
19227 current_stub_contents
=
19228 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19229 create_instruction_branch_absolute
19230 (initial_insn_addr
- current_stub_contents
));
19232 else if (!wback
&& restore_pc
&& restore_rn
)
19235 if (!(insn_high_registers
& (1 << rn
)))
19237 /* Choose a Ri in the high-register-list that will be restored. */
19238 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19241 /* SUB Ri, Rn, #(4*nb_registers). */
19242 current_stub_contents
=
19243 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19244 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19246 /* LDMIA Ri!, {R-low-register-list}. */
19247 current_stub_contents
=
19248 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19249 create_instruction_ldmia
19250 (ri
, /*wback=*/1, insn_low_registers
));
19252 /* LDMIA Ri, {R-high-register-list}. */
19253 current_stub_contents
=
19254 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19255 create_instruction_ldmia
19256 (ri
, /*wback=*/0, insn_high_registers
));
19258 else if (wback
&& restore_rn
)
19260 /* The assembler should not have accepted to encode this. */
19261 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19262 "undefined behavior.\n");
19265 /* Fill the remaining of the stub with deterministic contents. */
19266 current_stub_contents
=
19267 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19268 base_stub_contents
, current_stub_contents
,
19269 base_stub_contents
+
19270 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19275 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
19277 const insn32 initial_insn
,
19278 const bfd_byte
*const initial_insn_addr
,
19279 bfd_byte
*const base_stub_contents
)
19281 int num_words
= initial_insn
& 0xff;
19282 bfd_byte
*current_stub_contents
= base_stub_contents
;
19284 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
19286 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19287 smaller than 8 words load sequences that do not cause the
19289 if (num_words
<= 8)
19291 /* Untouched instruction. */
19292 current_stub_contents
=
19293 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19296 /* B initial_insn_addr+4. */
19297 current_stub_contents
=
19298 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19299 create_instruction_branch_absolute
19300 (initial_insn_addr
- current_stub_contents
));
19304 bfd_boolean is_dp
= /* DP encoding. */
19305 (initial_insn
& 0xfe100f00) == 0xec100b00;
19306 bfd_boolean is_ia_nobang
= /* (IA without !). */
19307 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
19308 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
19309 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
19310 bfd_boolean is_db_bang
= /* (DB with !). */
19311 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
19312 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
19313 /* d = UInt (Vd:D);. */
19314 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
19315 | (((unsigned int)initial_insn
<< 9) >> 31);
19317 /* Compute the number of 8-words chunks needed to split. */
19318 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
19321 /* The test coverage has been done assuming the following
19322 hypothesis that exactly one of the previous is_ predicates is
19324 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
19325 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
19327 /* We treat the cutting of the words in one pass for all
19328 cases, then we emit the adjustments:
19331 -> vldm rx!, {8_words_or_less} for each needed 8_word
19332 -> sub rx, rx, #size (list)
19335 -> vldm rx!, {8_words_or_less} for each needed 8_word
19336 This also handles vpop instruction (when rx is sp)
19339 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19340 for (chunk
= 0; chunk
< chunks
; ++chunk
)
19342 bfd_vma new_insn
= 0;
19344 if (is_ia_nobang
|| is_ia_bang
)
19346 new_insn
= create_instruction_vldmia
19350 chunks
- (chunk
+ 1) ?
19351 8 : num_words
- chunk
* 8,
19352 first_reg
+ chunk
* 8);
19354 else if (is_db_bang
)
19356 new_insn
= create_instruction_vldmdb
19359 chunks
- (chunk
+ 1) ?
19360 8 : num_words
- chunk
* 8,
19361 first_reg
+ chunk
* 8);
19365 current_stub_contents
=
19366 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19370 /* Only this case requires the base register compensation
19374 current_stub_contents
=
19375 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19376 create_instruction_sub
19377 (base_reg
, base_reg
, 4*num_words
));
19380 /* B initial_insn_addr+4. */
19381 current_stub_contents
=
19382 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19383 create_instruction_branch_absolute
19384 (initial_insn_addr
- current_stub_contents
));
19387 /* Fill the remaining of the stub with deterministic contents. */
19388 current_stub_contents
=
19389 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19390 base_stub_contents
, current_stub_contents
,
19391 base_stub_contents
+
19392 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
19396 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
19398 const insn32 wrong_insn
,
19399 const bfd_byte
*const wrong_insn_addr
,
19400 bfd_byte
*const stub_contents
)
19402 if (is_thumb2_ldmia (wrong_insn
))
19403 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
19404 wrong_insn
, wrong_insn_addr
,
19406 else if (is_thumb2_ldmdb (wrong_insn
))
19407 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
19408 wrong_insn
, wrong_insn_addr
,
19410 else if (is_thumb2_vldm (wrong_insn
))
19411 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
19412 wrong_insn
, wrong_insn_addr
,
19416 /* End of stm32l4xx work-around. */
19419 /* Do code byteswapping. Return FALSE afterwards so that the section is
19420 written out as normal. */
19423 elf32_arm_write_section (bfd
*output_bfd
,
19424 struct bfd_link_info
*link_info
,
19426 bfd_byte
*contents
)
19428 unsigned int mapcount
, errcount
;
19429 _arm_elf_section_data
*arm_data
;
19430 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
19431 elf32_arm_section_map
*map
;
19432 elf32_vfp11_erratum_list
*errnode
;
19433 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
19436 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
19440 if (globals
== NULL
)
19443 /* If this section has not been allocated an _arm_elf_section_data
19444 structure then we cannot record anything. */
19445 arm_data
= get_arm_elf_section_data (sec
);
19446 if (arm_data
== NULL
)
19449 mapcount
= arm_data
->mapcount
;
19450 map
= arm_data
->map
;
19451 errcount
= arm_data
->erratumcount
;
19455 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
19457 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
19458 errnode
= errnode
->next
)
19460 bfd_vma target
= errnode
->vma
- offset
;
19462 switch (errnode
->type
)
19464 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
19466 bfd_vma branch_to_veneer
;
19467 /* Original condition code of instruction, plus bit mask for
19468 ARM B instruction. */
19469 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
19472 /* The instruction is before the label. */
19475 /* Above offset included in -4 below. */
19476 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
19477 - errnode
->vma
- 4;
19479 if ((signed) branch_to_veneer
< -(1 << 25)
19480 || (signed) branch_to_veneer
>= (1 << 25))
19481 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19482 "range"), output_bfd
);
19484 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
19485 contents
[endianflip
^ target
] = insn
& 0xff;
19486 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19487 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19488 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19492 case VFP11_ERRATUM_ARM_VENEER
:
19494 bfd_vma branch_from_veneer
;
19497 /* Take size of veneer into account. */
19498 branch_from_veneer
= errnode
->u
.v
.branch
->vma
19499 - errnode
->vma
- 12;
19501 if ((signed) branch_from_veneer
< -(1 << 25)
19502 || (signed) branch_from_veneer
>= (1 << 25))
19503 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19504 "range"), output_bfd
);
19506 /* Original instruction. */
19507 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
19508 contents
[endianflip
^ target
] = insn
& 0xff;
19509 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19510 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19511 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19513 /* Branch back to insn after original insn. */
19514 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
19515 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
19516 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
19517 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
19518 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
19528 if (arm_data
->stm32l4xx_erratumcount
!= 0)
19530 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
19531 stm32l4xx_errnode
!= 0;
19532 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
19534 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
19536 switch (stm32l4xx_errnode
->type
)
19538 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
19541 bfd_vma branch_to_veneer
=
19542 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
19544 if ((signed) branch_to_veneer
< -(1 << 24)
19545 || (signed) branch_to_veneer
>= (1 << 24))
19547 bfd_vma out_of_range
=
19548 ((signed) branch_to_veneer
< -(1 << 24)) ?
19549 - branch_to_veneer
- (1 << 24) :
19550 ((signed) branch_to_veneer
>= (1 << 24)) ?
19551 branch_to_veneer
- (1 << 24) : 0;
19554 (_("%pB(%#" PRIx64
"): error: "
19555 "cannot create STM32L4XX veneer; "
19556 "jump out of range by %" PRId64
" bytes; "
19557 "cannot encode branch instruction"),
19559 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
19560 (int64_t) out_of_range
);
19564 insn
= create_instruction_branch_absolute
19565 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
19567 /* The instruction is before the label. */
19570 put_thumb2_insn (globals
, output_bfd
,
19571 (bfd_vma
) insn
, contents
+ target
);
19575 case STM32L4XX_ERRATUM_VENEER
:
19578 bfd_byte
* veneer_r
;
19581 veneer
= contents
+ target
;
19583 + stm32l4xx_errnode
->u
.b
.veneer
->vma
19584 - stm32l4xx_errnode
->vma
- 4;
19586 if ((signed) (veneer_r
- veneer
-
19587 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
19588 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
19589 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
19590 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
19591 || (signed) (veneer_r
- veneer
) >= (1 << 24))
19593 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19594 "veneer"), output_bfd
);
19598 /* Original instruction. */
19599 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
19601 stm32l4xx_create_replacing_stub
19602 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
19612 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
19614 arm_unwind_table_edit
*edit_node
19615 = arm_data
->u
.exidx
.unwind_edit_list
;
19616 /* Now, sec->size is the size of the section we will write. The original
19617 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19618 markers) was sec->rawsize. (This isn't the case if we perform no
19619 edits, then rawsize will be zero and we should use size). */
19620 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
19621 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
19622 unsigned int in_index
, out_index
;
19623 bfd_vma add_to_offsets
= 0;
19625 if (edited_contents
== NULL
)
19627 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
19631 unsigned int edit_index
= edit_node
->index
;
19633 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
19635 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19636 contents
+ in_index
* 8, add_to_offsets
);
19640 else if (in_index
== edit_index
19641 || (in_index
* 8 >= input_size
19642 && edit_index
== UINT_MAX
))
19644 switch (edit_node
->type
)
19646 case DELETE_EXIDX_ENTRY
:
19648 add_to_offsets
+= 8;
19651 case INSERT_EXIDX_CANTUNWIND_AT_END
:
19653 asection
*text_sec
= edit_node
->linked_section
;
19654 bfd_vma text_offset
= text_sec
->output_section
->vma
19655 + text_sec
->output_offset
19657 bfd_vma exidx_offset
= offset
+ out_index
* 8;
19658 unsigned long prel31_offset
;
19660 /* Note: this is meant to be equivalent to an
19661 R_ARM_PREL31 relocation. These synthetic
19662 EXIDX_CANTUNWIND markers are not relocated by the
19663 usual BFD method. */
19664 prel31_offset
= (text_offset
- exidx_offset
)
19666 if (bfd_link_relocatable (link_info
))
19668 /* Here relocation for new EXIDX_CANTUNWIND is
19669 created, so there is no need to
19670 adjust offset by hand. */
19671 prel31_offset
= text_sec
->output_offset
19675 /* First address we can't unwind. */
19676 bfd_put_32 (output_bfd
, prel31_offset
,
19677 &edited_contents
[out_index
* 8]);
19679 /* Code for EXIDX_CANTUNWIND. */
19680 bfd_put_32 (output_bfd
, 0x1,
19681 &edited_contents
[out_index
* 8 + 4]);
19684 add_to_offsets
-= 8;
19689 edit_node
= edit_node
->next
;
19694 /* No more edits, copy remaining entries verbatim. */
19695 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19696 contents
+ in_index
* 8, add_to_offsets
);
19702 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
19703 bfd_set_section_contents (output_bfd
, sec
->output_section
,
19705 (file_ptr
) sec
->output_offset
, sec
->size
);
19710 /* Fix code to point to Cortex-A8 erratum stubs. */
19711 if (globals
->fix_cortex_a8
)
19713 struct a8_branch_to_stub_data data
;
19715 data
.writing_section
= sec
;
19716 data
.contents
= contents
;
19718 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
19725 if (globals
->byteswap_code
)
19727 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
19730 for (i
= 0; i
< mapcount
; i
++)
19732 if (i
== mapcount
- 1)
19735 end
= map
[i
+ 1].vma
;
19737 switch (map
[i
].type
)
19740 /* Byte swap code words. */
19741 while (ptr
+ 3 < end
)
19743 tmp
= contents
[ptr
];
19744 contents
[ptr
] = contents
[ptr
+ 3];
19745 contents
[ptr
+ 3] = tmp
;
19746 tmp
= contents
[ptr
+ 1];
19747 contents
[ptr
+ 1] = contents
[ptr
+ 2];
19748 contents
[ptr
+ 2] = tmp
;
19754 /* Byte swap code halfwords. */
19755 while (ptr
+ 1 < end
)
19757 tmp
= contents
[ptr
];
19758 contents
[ptr
] = contents
[ptr
+ 1];
19759 contents
[ptr
+ 1] = tmp
;
19765 /* Leave data alone. */
19773 arm_data
->mapcount
= -1;
19774 arm_data
->mapsize
= 0;
19775 arm_data
->map
= NULL
;
19780 /* Mangle thumb function symbols as we read them in. */
19783 elf32_arm_swap_symbol_in (bfd
* abfd
,
19786 Elf_Internal_Sym
*dst
)
19788 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
19790 dst
->st_target_internal
= 0;
19792 /* New EABI objects mark thumb function symbols by setting the low bit of
19794 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
19795 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
19797 if (dst
->st_value
& 1)
19799 dst
->st_value
&= ~(bfd_vma
) 1;
19800 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
19801 ST_BRANCH_TO_THUMB
);
19804 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
19806 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
19808 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
19809 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
19811 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
19812 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
19814 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
19820 /* Mangle thumb function symbols as we write them out. */
19823 elf32_arm_swap_symbol_out (bfd
*abfd
,
19824 const Elf_Internal_Sym
*src
,
19828 Elf_Internal_Sym newsym
;
19830 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19831 of the address set, as per the new EABI. We do this unconditionally
19832 because objcopy does not set the elf header flags until after
19833 it writes out the symbol table. */
19834 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
19837 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
19838 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
19839 if (newsym
.st_shndx
!= SHN_UNDEF
)
19841 /* Do this only for defined symbols. At link type, the static
19842 linker will simulate the work of dynamic linker of resolving
19843 symbols and will carry over the thumbness of found symbols to
19844 the output symbol table. It's not clear how it happens, but
19845 the thumbness of undefined symbols can well be different at
19846 runtime, and writing '1' for them will be confusing for users
19847 and possibly for dynamic linker itself.
19849 newsym
.st_value
|= 1;
19854 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
19857 /* Add the PT_ARM_EXIDX program header. */
19860 elf32_arm_modify_segment_map (bfd
*abfd
,
19861 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19863 struct elf_segment_map
*m
;
19866 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19867 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19869 /* If there is already a PT_ARM_EXIDX header, then we do not
19870 want to add another one. This situation arises when running
19871 "strip"; the input binary already has the header. */
19872 m
= elf_seg_map (abfd
);
19873 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
19877 m
= (struct elf_segment_map
*)
19878 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
19881 m
->p_type
= PT_ARM_EXIDX
;
19883 m
->sections
[0] = sec
;
19885 m
->next
= elf_seg_map (abfd
);
19886 elf_seg_map (abfd
) = m
;
19893 /* We may add a PT_ARM_EXIDX program header. */
19896 elf32_arm_additional_program_headers (bfd
*abfd
,
19897 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19901 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19902 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19908 /* Hook called by the linker routine which adds symbols from an object
19912 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
19913 Elf_Internal_Sym
*sym
, const char **namep
,
19914 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
19916 if (elf32_arm_hash_table (info
) == NULL
)
19919 if (elf32_arm_hash_table (info
)->vxworks_p
19920 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
19921 flagsp
, secp
, valp
))
19927 /* We use this to override swap_symbol_in and swap_symbol_out. */
19928 const struct elf_size_info elf32_arm_size_info
=
19930 sizeof (Elf32_External_Ehdr
),
19931 sizeof (Elf32_External_Phdr
),
19932 sizeof (Elf32_External_Shdr
),
19933 sizeof (Elf32_External_Rel
),
19934 sizeof (Elf32_External_Rela
),
19935 sizeof (Elf32_External_Sym
),
19936 sizeof (Elf32_External_Dyn
),
19937 sizeof (Elf_External_Note
),
19941 ELFCLASS32
, EV_CURRENT
,
19942 bfd_elf32_write_out_phdrs
,
19943 bfd_elf32_write_shdrs_and_ehdr
,
19944 bfd_elf32_checksum_contents
,
19945 bfd_elf32_write_relocs
,
19946 elf32_arm_swap_symbol_in
,
19947 elf32_arm_swap_symbol_out
,
19948 bfd_elf32_slurp_reloc_table
,
19949 bfd_elf32_slurp_symbol_table
,
19950 bfd_elf32_swap_dyn_in
,
19951 bfd_elf32_swap_dyn_out
,
19952 bfd_elf32_swap_reloc_in
,
19953 bfd_elf32_swap_reloc_out
,
19954 bfd_elf32_swap_reloca_in
,
19955 bfd_elf32_swap_reloca_out
19959 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
19961 /* V7 BE8 code is always little endian. */
19962 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
19963 return bfd_getl32 (addr
);
19965 return bfd_get_32 (abfd
, addr
);
19969 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
19971 /* V7 BE8 code is always little endian. */
19972 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
19973 return bfd_getl16 (addr
);
19975 return bfd_get_16 (abfd
, addr
);
19978 /* Return size of plt0 entry starting at ADDR
19979 or (bfd_vma) -1 if size can not be determined. */
19982 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
19984 bfd_vma first_word
;
19987 first_word
= read_code32 (abfd
, addr
);
19989 if (first_word
== elf32_arm_plt0_entry
[0])
19990 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
19991 else if (first_word
== elf32_thumb2_plt0_entry
[0])
19992 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
19994 /* We don't yet handle this PLT format. */
19995 return (bfd_vma
) -1;
20000 /* Return size of plt entry starting at offset OFFSET
20001 of plt section located at address START
20002 or (bfd_vma) -1 if size can not be determined. */
20005 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
20007 bfd_vma first_insn
;
20008 bfd_vma plt_size
= 0;
20009 const bfd_byte
*addr
= start
+ offset
;
20011 /* PLT entry size if fixed on Thumb-only platforms. */
20012 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
20013 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
20015 /* Respect Thumb stub if necessary. */
20016 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
20018 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
20021 /* Strip immediate from first add. */
20022 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
20024 #ifdef FOUR_WORD_PLT
20025 if (first_insn
== elf32_arm_plt_entry
[0])
20026 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
20028 if (first_insn
== elf32_arm_plt_entry_long
[0])
20029 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
20030 else if (first_insn
== elf32_arm_plt_entry_short
[0])
20031 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
20034 /* We don't yet handle this PLT format. */
20035 return (bfd_vma
) -1;
20040 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20043 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
20044 long symcount ATTRIBUTE_UNUSED
,
20045 asymbol
**syms ATTRIBUTE_UNUSED
,
20055 Elf_Internal_Shdr
*hdr
;
20063 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
20066 if (dynsymcount
<= 0)
20069 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
20070 if (relplt
== NULL
)
20073 hdr
= &elf_section_data (relplt
)->this_hdr
;
20074 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
20075 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
20078 plt
= bfd_get_section_by_name (abfd
, ".plt");
20082 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
20085 data
= plt
->contents
;
20088 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
20090 bfd_cache_section_contents((asection
*) plt
, data
);
20093 count
= relplt
->size
/ hdr
->sh_entsize
;
20094 size
= count
* sizeof (asymbol
);
20095 p
= relplt
->relocation
;
20096 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20098 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
20099 if (p
->addend
!= 0)
20100 size
+= sizeof ("+0x") - 1 + 8;
20103 s
= *ret
= (asymbol
*) bfd_malloc (size
);
20107 offset
= elf32_arm_plt0_size (abfd
, data
);
20108 if (offset
== (bfd_vma
) -1)
20111 names
= (char *) (s
+ count
);
20112 p
= relplt
->relocation
;
20114 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20118 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
20119 if (plt_size
== (bfd_vma
) -1)
20122 *s
= **p
->sym_ptr_ptr
;
20123 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20124 we are defining a symbol, ensure one of them is set. */
20125 if ((s
->flags
& BSF_LOCAL
) == 0)
20126 s
->flags
|= BSF_GLOBAL
;
20127 s
->flags
|= BSF_SYNTHETIC
;
20132 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
20133 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
20135 if (p
->addend
!= 0)
20139 memcpy (names
, "+0x", sizeof ("+0x") - 1);
20140 names
+= sizeof ("+0x") - 1;
20141 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
20142 for (a
= buf
; *a
== '0'; ++a
)
20145 memcpy (names
, a
, len
);
20148 memcpy (names
, "@plt", sizeof ("@plt"));
20149 names
+= sizeof ("@plt");
20151 offset
+= plt_size
;
20158 elf32_arm_section_flags (const Elf_Internal_Shdr
*hdr
)
20160 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
20161 hdr
->bfd_section
->flags
|= SEC_ELF_PURECODE
;
20166 elf32_arm_lookup_section_flags (char *flag_name
)
20168 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
20169 return SHF_ARM_PURECODE
;
20171 return SEC_NO_FLAGS
;
20174 static unsigned int
20175 elf32_arm_count_additional_relocs (asection
*sec
)
20177 struct _arm_elf_section_data
*arm_data
;
20178 arm_data
= get_arm_elf_section_data (sec
);
20180 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
20183 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20184 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20185 FALSE otherwise. ISECTION is the best guess matching section from the
20186 input bfd IBFD, but it might be NULL. */
20189 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
20190 bfd
*obfd ATTRIBUTE_UNUSED
,
20191 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
20192 Elf_Internal_Shdr
*osection
)
20194 switch (osection
->sh_type
)
20196 case SHT_ARM_EXIDX
:
20198 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
20199 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
20202 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
20203 osection
->sh_info
= 0;
20205 /* The sh_link field must be set to the text section associated with
20206 this index section. Unfortunately the ARM EHABI does not specify
20207 exactly how to determine this association. Our caller does try
20208 to match up OSECTION with its corresponding input section however
20209 so that is a good first guess. */
20210 if (isection
!= NULL
20211 && osection
->bfd_section
!= NULL
20212 && isection
->bfd_section
!= NULL
20213 && isection
->bfd_section
->output_section
!= NULL
20214 && isection
->bfd_section
->output_section
== osection
->bfd_section
20215 && iheaders
!= NULL
20216 && isection
->sh_link
> 0
20217 && isection
->sh_link
< elf_numsections (ibfd
)
20218 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
20219 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
20222 for (i
= elf_numsections (obfd
); i
-- > 0;)
20223 if (oheaders
[i
]->bfd_section
20224 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
20230 /* Failing that we have to find a matching section ourselves. If
20231 we had the output section name available we could compare that
20232 with input section names. Unfortunately we don't. So instead
20233 we use a simple heuristic and look for the nearest executable
20234 section before this one. */
20235 for (i
= elf_numsections (obfd
); i
-- > 0;)
20236 if (oheaders
[i
] == osection
)
20242 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
20243 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
20244 == (SHF_ALLOC
| SHF_EXECINSTR
))
20250 osection
->sh_link
= i
;
20251 /* If the text section was part of a group
20252 then the index section should be too. */
20253 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
20254 osection
->sh_flags
|= SHF_GROUP
;
20260 case SHT_ARM_PREEMPTMAP
:
20261 osection
->sh_flags
= SHF_ALLOC
;
20264 case SHT_ARM_ATTRIBUTES
:
20265 case SHT_ARM_DEBUGOVERLAY
:
20266 case SHT_ARM_OVERLAYSECTION
:
20274 /* Returns TRUE if NAME is an ARM mapping symbol.
20275 Traditionally the symbols $a, $d and $t have been used.
20276 The ARM ELF standard also defines $x (for A64 code). It also allows a
20277 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20278 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20279 not support them here. $t.x indicates the start of ThumbEE instructions. */
20282 is_arm_mapping_symbol (const char * name
)
20284 return name
!= NULL
/* Paranoia. */
20285 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20286 the mapping symbols could have acquired a prefix.
20287 We do not support this here, since such symbols no
20288 longer conform to the ARM ELF ABI. */
20289 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
20290 && (name
[2] == 0 || name
[2] == '.');
20291 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20292 any characters that follow the period are legal characters for the body
20293 of a symbol's name. For now we just assume that this is the case. */
20296 /* Make sure that mapping symbols in object files are not removed via the
20297 "strip --strip-unneeded" tool. These symbols are needed in order to
20298 correctly generate interworking veneers, and for byte swapping code
20299 regions. Once an object file has been linked, it is safe to remove the
20300 symbols as they will no longer be needed. */
20303 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
20305 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
20306 && sym
->section
!= bfd_abs_section_ptr
20307 && is_arm_mapping_symbol (sym
->name
))
20308 sym
->flags
|= BSF_KEEP
;
20311 #undef elf_backend_copy_special_section_fields
20312 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20314 #define ELF_ARCH bfd_arch_arm
20315 #define ELF_TARGET_ID ARM_ELF_DATA
20316 #define ELF_MACHINE_CODE EM_ARM
20317 #ifdef __QNXTARGET__
20318 #define ELF_MAXPAGESIZE 0x1000
20320 #define ELF_MAXPAGESIZE 0x10000
20322 #define ELF_MINPAGESIZE 0x1000
20323 #define ELF_COMMONPAGESIZE 0x1000
20325 #define bfd_elf32_mkobject elf32_arm_mkobject
20327 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20328 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20329 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20330 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20331 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20332 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20333 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20334 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20335 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20336 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20337 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20338 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20340 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20341 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20342 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20343 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20344 #define elf_backend_check_relocs elf32_arm_check_relocs
20345 #define elf_backend_update_relocs elf32_arm_update_relocs
20346 #define elf_backend_relocate_section elf32_arm_relocate_section
20347 #define elf_backend_write_section elf32_arm_write_section
20348 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20349 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20350 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20351 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20352 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20353 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20354 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20355 #define elf_backend_init_file_header elf32_arm_init_file_header
20356 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20357 #define elf_backend_object_p elf32_arm_object_p
20358 #define elf_backend_fake_sections elf32_arm_fake_sections
20359 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20360 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20361 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20362 #define elf_backend_size_info elf32_arm_size_info
20363 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20364 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20365 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20366 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20367 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20368 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20369 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20370 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20372 #define elf_backend_can_refcount 1
20373 #define elf_backend_can_gc_sections 1
20374 #define elf_backend_plt_readonly 1
20375 #define elf_backend_want_got_plt 1
20376 #define elf_backend_want_plt_sym 0
20377 #define elf_backend_want_dynrelro 1
20378 #define elf_backend_may_use_rel_p 1
20379 #define elf_backend_may_use_rela_p 0
20380 #define elf_backend_default_use_rela_p 0
20381 #define elf_backend_dtrel_excludes_plt 1
20383 #define elf_backend_got_header_size 12
20384 #define elf_backend_extern_protected_data 1
20386 #undef elf_backend_obj_attrs_vendor
20387 #define elf_backend_obj_attrs_vendor "aeabi"
20388 #undef elf_backend_obj_attrs_section
20389 #define elf_backend_obj_attrs_section ".ARM.attributes"
20390 #undef elf_backend_obj_attrs_arg_type
20391 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20392 #undef elf_backend_obj_attrs_section_type
20393 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20394 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20395 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20397 #undef elf_backend_section_flags
20398 #define elf_backend_section_flags elf32_arm_section_flags
20399 #undef elf_backend_lookup_section_flags_hook
20400 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20402 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20404 #include "elf32-target.h"
20406 /* Native Client targets. */
20408 #undef TARGET_LITTLE_SYM
20409 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20410 #undef TARGET_LITTLE_NAME
20411 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20412 #undef TARGET_BIG_SYM
20413 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20414 #undef TARGET_BIG_NAME
20415 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20417 /* Like elf32_arm_link_hash_table_create -- but overrides
20418 appropriately for NaCl. */
20420 static struct bfd_link_hash_table
*
20421 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
20423 struct bfd_link_hash_table
*ret
;
20425 ret
= elf32_arm_link_hash_table_create (abfd
);
20428 struct elf32_arm_link_hash_table
*htab
20429 = (struct elf32_arm_link_hash_table
*) ret
;
20433 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
20434 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
20439 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20440 really need to use elf32_arm_modify_segment_map. But we do it
20441 anyway just to reduce gratuitous differences with the stock ARM backend. */
20444 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
20446 return (elf32_arm_modify_segment_map (abfd
, info
)
20447 && nacl_modify_segment_map (abfd
, info
));
20451 elf32_arm_nacl_final_write_processing (bfd
*abfd
)
20453 arm_final_write_processing (abfd
);
20454 return nacl_final_write_processing (abfd
);
20458 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
20459 const arelent
*rel ATTRIBUTE_UNUSED
)
20462 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
20463 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
20467 #define elf32_bed elf32_arm_nacl_bed
20468 #undef bfd_elf32_bfd_link_hash_table_create
20469 #define bfd_elf32_bfd_link_hash_table_create \
20470 elf32_arm_nacl_link_hash_table_create
20471 #undef elf_backend_plt_alignment
20472 #define elf_backend_plt_alignment 4
20473 #undef elf_backend_modify_segment_map
20474 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20475 #undef elf_backend_modify_headers
20476 #define elf_backend_modify_headers nacl_modify_headers
20477 #undef elf_backend_final_write_processing
20478 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20479 #undef bfd_elf32_get_synthetic_symtab
20480 #undef elf_backend_plt_sym_val
20481 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20482 #undef elf_backend_copy_special_section_fields
20484 #undef ELF_MINPAGESIZE
20485 #undef ELF_COMMONPAGESIZE
20488 #include "elf32-target.h"
20490 /* Reset to defaults. */
20491 #undef elf_backend_plt_alignment
20492 #undef elf_backend_modify_segment_map
20493 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20494 #undef elf_backend_modify_headers
20495 #undef elf_backend_final_write_processing
20496 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20497 #undef ELF_MINPAGESIZE
20498 #define ELF_MINPAGESIZE 0x1000
20499 #undef ELF_COMMONPAGESIZE
20500 #define ELF_COMMONPAGESIZE 0x1000
20503 /* FDPIC Targets. */
20505 #undef TARGET_LITTLE_SYM
20506 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20507 #undef TARGET_LITTLE_NAME
20508 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20509 #undef TARGET_BIG_SYM
20510 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20511 #undef TARGET_BIG_NAME
20512 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20513 #undef elf_match_priority
20514 #define elf_match_priority 128
20516 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20518 /* Like elf32_arm_link_hash_table_create -- but overrides
20519 appropriately for FDPIC. */
20521 static struct bfd_link_hash_table
*
20522 elf32_arm_fdpic_link_hash_table_create (bfd
*abfd
)
20524 struct bfd_link_hash_table
*ret
;
20526 ret
= elf32_arm_link_hash_table_create (abfd
);
20529 struct elf32_arm_link_hash_table
*htab
= (struct elf32_arm_link_hash_table
*) ret
;
20536 /* We need dynamic symbols for every section, since segments can
20537 relocate independently. */
20539 elf32_arm_fdpic_omit_section_dynsym (bfd
*output_bfd ATTRIBUTE_UNUSED
,
20540 struct bfd_link_info
*info
20542 asection
*p ATTRIBUTE_UNUSED
)
20544 switch (elf_section_data (p
)->this_hdr
.sh_type
)
20548 /* If sh_type is yet undecided, assume it could be
20549 SHT_PROGBITS/SHT_NOBITS. */
20553 /* There shouldn't be section relative relocations
20554 against any other section. */
20561 #define elf32_bed elf32_arm_fdpic_bed
20563 #undef bfd_elf32_bfd_link_hash_table_create
20564 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20566 #undef elf_backend_omit_section_dynsym
20567 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20569 #include "elf32-target.h"
20571 #undef elf_match_priority
20573 #undef elf_backend_omit_section_dynsym
20575 /* VxWorks Targets. */
20577 #undef TARGET_LITTLE_SYM
20578 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20579 #undef TARGET_LITTLE_NAME
20580 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20581 #undef TARGET_BIG_SYM
20582 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20583 #undef TARGET_BIG_NAME
20584 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20586 /* Like elf32_arm_link_hash_table_create -- but overrides
20587 appropriately for VxWorks. */
20589 static struct bfd_link_hash_table
*
20590 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
20592 struct bfd_link_hash_table
*ret
;
20594 ret
= elf32_arm_link_hash_table_create (abfd
);
20597 struct elf32_arm_link_hash_table
*htab
20598 = (struct elf32_arm_link_hash_table
*) ret
;
20600 htab
->vxworks_p
= 1;
20606 elf32_arm_vxworks_final_write_processing (bfd
*abfd
)
20608 arm_final_write_processing (abfd
);
20609 return elf_vxworks_final_write_processing (abfd
);
20613 #define elf32_bed elf32_arm_vxworks_bed
20615 #undef bfd_elf32_bfd_link_hash_table_create
20616 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20617 #undef elf_backend_final_write_processing
20618 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20619 #undef elf_backend_emit_relocs
20620 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20622 #undef elf_backend_may_use_rel_p
20623 #define elf_backend_may_use_rel_p 0
20624 #undef elf_backend_may_use_rela_p
20625 #define elf_backend_may_use_rela_p 1
20626 #undef elf_backend_default_use_rela_p
20627 #define elf_backend_default_use_rela_p 1
20628 #undef elf_backend_want_plt_sym
20629 #define elf_backend_want_plt_sym 1
20630 #undef ELF_MAXPAGESIZE
20631 #define ELF_MAXPAGESIZE 0x1000
20633 #include "elf32-target.h"
20636 /* Merge backend specific data from an object file to the output
20637 object file when linking. */
20640 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
20642 bfd
*obfd
= info
->output_bfd
;
20643 flagword out_flags
;
20645 bfd_boolean flags_compatible
= TRUE
;
20648 /* Check if we have the same endianness. */
20649 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
20652 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
20655 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
20658 /* The input BFD must have had its flags initialised. */
20659 /* The following seems bogus to me -- The flags are initialized in
20660 the assembler but I don't think an elf_flags_init field is
20661 written into the object. */
20662 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20664 in_flags
= elf_elfheader (ibfd
)->e_flags
;
20665 out_flags
= elf_elfheader (obfd
)->e_flags
;
20667 /* In theory there is no reason why we couldn't handle this. However
20668 in practice it isn't even close to working and there is no real
20669 reason to want it. */
20670 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
20671 && !(ibfd
->flags
& DYNAMIC
)
20672 && (in_flags
& EF_ARM_BE8
))
20674 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20679 if (!elf_flags_init (obfd
))
20681 /* If the input is the default architecture and had the default
20682 flags then do not bother setting the flags for the output
20683 architecture, instead allow future merges to do this. If no
20684 future merges ever set these flags then they will retain their
20685 uninitialised values, which surprise surprise, correspond
20686 to the default values. */
20687 if (bfd_get_arch_info (ibfd
)->the_default
20688 && elf_elfheader (ibfd
)->e_flags
== 0)
20691 elf_flags_init (obfd
) = TRUE
;
20692 elf_elfheader (obfd
)->e_flags
= in_flags
;
20694 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
20695 && bfd_get_arch_info (obfd
)->the_default
)
20696 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
20701 /* Determine what should happen if the input ARM architecture
20702 does not match the output ARM architecture. */
20703 if (! bfd_arm_merge_machines (ibfd
, obfd
))
20706 /* Identical flags must be compatible. */
20707 if (in_flags
== out_flags
)
20710 /* Check to see if the input BFD actually contains any sections. If
20711 not, its flags may not have been initialised either, but it
20712 cannot actually cause any incompatiblity. Do not short-circuit
20713 dynamic objects; their section list may be emptied by
20714 elf_link_add_object_symbols.
20716 Also check to see if there are no code sections in the input.
20717 In this case there is no need to check for code specific flags.
20718 XXX - do we need to worry about floating-point format compatability
20719 in data sections ? */
20720 if (!(ibfd
->flags
& DYNAMIC
))
20722 bfd_boolean null_input_bfd
= TRUE
;
20723 bfd_boolean only_data_sections
= TRUE
;
20725 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
20727 /* Ignore synthetic glue sections. */
20728 if (strcmp (sec
->name
, ".glue_7")
20729 && strcmp (sec
->name
, ".glue_7t"))
20731 if ((bfd_section_flags (sec
)
20732 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20733 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20734 only_data_sections
= FALSE
;
20736 null_input_bfd
= FALSE
;
20741 if (null_input_bfd
|| only_data_sections
)
20745 /* Complain about various flag mismatches. */
20746 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
20747 EF_ARM_EABI_VERSION (out_flags
)))
20750 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20751 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
20752 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
20756 /* Not sure what needs to be checked for EABI versions >= 1. */
20757 /* VxWorks libraries do not use these flags. */
20758 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
20759 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
20760 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
20762 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
20765 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20766 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
20767 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
20768 flags_compatible
= FALSE
;
20771 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
20773 if (in_flags
& EF_ARM_APCS_FLOAT
)
20775 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20779 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20782 flags_compatible
= FALSE
;
20785 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
20787 if (in_flags
& EF_ARM_VFP_FLOAT
)
20789 (_("error: %pB uses %s instructions, whereas %pB does not"),
20790 ibfd
, "VFP", obfd
);
20793 (_("error: %pB uses %s instructions, whereas %pB does not"),
20794 ibfd
, "FPA", obfd
);
20796 flags_compatible
= FALSE
;
20799 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
20801 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
20803 (_("error: %pB uses %s instructions, whereas %pB does not"),
20804 ibfd
, "Maverick", obfd
);
20807 (_("error: %pB does not use %s instructions, whereas %pB does"),
20808 ibfd
, "Maverick", obfd
);
20810 flags_compatible
= FALSE
;
20813 #ifdef EF_ARM_SOFT_FLOAT
20814 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
20816 /* We can allow interworking between code that is VFP format
20817 layout, and uses either soft float or integer regs for
20818 passing floating point arguments and results. We already
20819 know that the APCS_FLOAT flags match; similarly for VFP
20821 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
20822 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
20824 if (in_flags
& EF_ARM_SOFT_FLOAT
)
20826 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20830 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20833 flags_compatible
= FALSE
;
20838 /* Interworking mismatch is only a warning. */
20839 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
20841 if (in_flags
& EF_ARM_INTERWORK
)
20844 (_("warning: %pB supports interworking, whereas %pB does not"),
20850 (_("warning: %pB does not support interworking, whereas %pB does"),
20856 return flags_compatible
;
20860 /* Symbian OS Targets. */
20862 #undef TARGET_LITTLE_SYM
20863 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20864 #undef TARGET_LITTLE_NAME
20865 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20866 #undef TARGET_BIG_SYM
20867 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20868 #undef TARGET_BIG_NAME
20869 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20871 /* Like elf32_arm_link_hash_table_create -- but overrides
20872 appropriately for Symbian OS. */
20874 static struct bfd_link_hash_table
*
20875 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
20877 struct bfd_link_hash_table
*ret
;
20879 ret
= elf32_arm_link_hash_table_create (abfd
);
20882 struct elf32_arm_link_hash_table
*htab
20883 = (struct elf32_arm_link_hash_table
*)ret
;
20884 /* There is no PLT header for Symbian OS. */
20885 htab
->plt_header_size
= 0;
20886 /* The PLT entries are each one instruction and one word. */
20887 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
20888 htab
->symbian_p
= 1;
20889 /* Symbian uses armv5t or above, so use_blx is always true. */
20891 htab
->root
.is_relocatable_executable
= 1;
20896 static const struct bfd_elf_special_section
20897 elf32_arm_symbian_special_sections
[] =
20899 /* In a BPABI executable, the dynamic linking sections do not go in
20900 the loadable read-only segment. The post-linker may wish to
20901 refer to these sections, but they are not part of the final
20903 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
20904 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
20905 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
20906 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
20907 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
20908 /* These sections do not need to be writable as the SymbianOS
20909 postlinker will arrange things so that no dynamic relocation is
20911 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
20912 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
20913 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
20914 { NULL
, 0, 0, 0, 0 }
20918 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
20919 struct bfd_link_info
*link_info
)
20921 /* BPABI objects are never loaded directly by an OS kernel; they are
20922 processed by a postlinker first, into an OS-specific format. If
20923 the D_PAGED bit is set on the file, BFD will align segments on
20924 page boundaries, so that an OS can directly map the file. With
20925 BPABI objects, that just results in wasted space. In addition,
20926 because we clear the D_PAGED bit, map_sections_to_segments will
20927 recognize that the program headers should not be mapped into any
20928 loadable segment. */
20929 abfd
->flags
&= ~D_PAGED
;
20930 elf32_arm_begin_write_processing (abfd
, link_info
);
20934 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
20935 struct bfd_link_info
*info
)
20937 struct elf_segment_map
*m
;
20940 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20941 segment. However, because the .dynamic section is not marked
20942 with SEC_LOAD, the generic ELF code will not create such a
20944 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
20947 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
20948 if (m
->p_type
== PT_DYNAMIC
)
20953 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
20954 m
->next
= elf_seg_map (abfd
);
20955 elf_seg_map (abfd
) = m
;
20959 /* Also call the generic arm routine. */
20960 return elf32_arm_modify_segment_map (abfd
, info
);
20963 /* Return address for Ith PLT stub in section PLT, for relocation REL
20964 or (bfd_vma) -1 if it should not be included. */
20967 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
20968 const arelent
*rel ATTRIBUTE_UNUSED
)
20970 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
20974 #define elf32_bed elf32_arm_symbian_bed
20976 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20977 will process them and then discard them. */
20978 #undef ELF_DYNAMIC_SEC_FLAGS
20979 #define ELF_DYNAMIC_SEC_FLAGS \
20980 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20982 #undef elf_backend_emit_relocs
20984 #undef bfd_elf32_bfd_link_hash_table_create
20985 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20986 #undef elf_backend_special_sections
20987 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20988 #undef elf_backend_begin_write_processing
20989 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20990 #undef elf_backend_final_write_processing
20991 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20993 #undef elf_backend_modify_segment_map
20994 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20996 /* There is no .got section for BPABI objects, and hence no header. */
20997 #undef elf_backend_got_header_size
20998 #define elf_backend_got_header_size 0
21000 /* Similarly, there is no .got.plt section. */
21001 #undef elf_backend_want_got_plt
21002 #define elf_backend_want_got_plt 0
21004 #undef elf_backend_plt_sym_val
21005 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21007 #undef elf_backend_may_use_rel_p
21008 #define elf_backend_may_use_rel_p 1
21009 #undef elf_backend_may_use_rela_p
21010 #define elf_backend_may_use_rela_p 0
21011 #undef elf_backend_default_use_rela_p
21012 #define elf_backend_default_use_rela_p 0
21013 #undef elf_backend_want_plt_sym
21014 #define elf_backend_want_plt_sym 0
21015 #undef elf_backend_dtrel_excludes_plt
21016 #define elf_backend_dtrel_excludes_plt 0
21017 #undef ELF_MAXPAGESIZE
21018 #define ELF_MAXPAGESIZE 0x8000
21020 #include "elf32-target.h"