1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2019 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "libiberty.h"
29 #include "elf-vxworks.h"
31 #include "elf32-arm.h"
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
69 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
70 struct bfd_link_info
*link_info
,
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
78 static reloc_howto_type elf32_arm_howto_table_1
[] =
81 HOWTO (R_ARM_NONE
, /* type */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
85 FALSE
, /* pc_relative */
87 complain_overflow_dont
,/* complain_on_overflow */
88 bfd_elf_generic_reloc
, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE
, /* partial_inplace */
93 FALSE
), /* pcrel_offset */
95 HOWTO (R_ARM_PC24
, /* type */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
99 TRUE
, /* pc_relative */
101 complain_overflow_signed
,/* complain_on_overflow */
102 bfd_elf_generic_reloc
, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE
, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE
), /* pcrel_offset */
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32
, /* type */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
114 FALSE
, /* pc_relative */
116 complain_overflow_bitfield
,/* complain_on_overflow */
117 bfd_elf_generic_reloc
, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE
, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE
), /* pcrel_offset */
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32
, /* type */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
129 TRUE
, /* pc_relative */
131 complain_overflow_bitfield
,/* complain_on_overflow */
132 bfd_elf_generic_reloc
, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE
, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE
), /* pcrel_offset */
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0
, /* type */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
144 TRUE
, /* pc_relative */
146 complain_overflow_dont
,/* complain_on_overflow */
147 bfd_elf_generic_reloc
, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE
, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE
), /* pcrel_offset */
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16
, /* type */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
159 FALSE
, /* pc_relative */
161 complain_overflow_bitfield
,/* complain_on_overflow */
162 bfd_elf_generic_reloc
, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE
, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE
), /* pcrel_offset */
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12
, /* type */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
174 FALSE
, /* pc_relative */
176 complain_overflow_bitfield
,/* complain_on_overflow */
177 bfd_elf_generic_reloc
, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE
, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE
), /* pcrel_offset */
184 HOWTO (R_ARM_THM_ABS5
, /* type */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
188 FALSE
, /* pc_relative */
190 complain_overflow_bitfield
,/* complain_on_overflow */
191 bfd_elf_generic_reloc
, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE
, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE
), /* pcrel_offset */
199 HOWTO (R_ARM_ABS8
, /* type */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
203 FALSE
, /* pc_relative */
205 complain_overflow_bitfield
,/* complain_on_overflow */
206 bfd_elf_generic_reloc
, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE
, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE
), /* pcrel_offset */
213 HOWTO (R_ARM_SBREL32
, /* type */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
217 FALSE
, /* pc_relative */
219 complain_overflow_dont
,/* complain_on_overflow */
220 bfd_elf_generic_reloc
, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE
, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE
), /* pcrel_offset */
227 HOWTO (R_ARM_THM_CALL
, /* type */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
231 TRUE
, /* pc_relative */
233 complain_overflow_signed
,/* complain_on_overflow */
234 bfd_elf_generic_reloc
, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE
, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE
), /* pcrel_offset */
241 HOWTO (R_ARM_THM_PC8
, /* type */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
245 TRUE
, /* pc_relative */
247 complain_overflow_signed
,/* complain_on_overflow */
248 bfd_elf_generic_reloc
, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE
, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE
), /* pcrel_offset */
255 HOWTO (R_ARM_BREL_ADJ
, /* type */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
259 FALSE
, /* pc_relative */
261 complain_overflow_signed
,/* complain_on_overflow */
262 bfd_elf_generic_reloc
, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE
, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE
), /* pcrel_offset */
269 HOWTO (R_ARM_TLS_DESC
, /* type */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
273 FALSE
, /* pc_relative */
275 complain_overflow_bitfield
,/* complain_on_overflow */
276 bfd_elf_generic_reloc
, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE
, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE
), /* pcrel_offset */
283 HOWTO (R_ARM_THM_SWI8
, /* type */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
287 FALSE
, /* pc_relative */
289 complain_overflow_signed
,/* complain_on_overflow */
290 bfd_elf_generic_reloc
, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE
, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE
), /* pcrel_offset */
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25
, /* type */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
302 TRUE
, /* pc_relative */
304 complain_overflow_signed
,/* complain_on_overflow */
305 bfd_elf_generic_reloc
, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE
, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE
), /* pcrel_offset */
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22
, /* type */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
317 TRUE
, /* pc_relative */
319 complain_overflow_signed
,/* complain_on_overflow */
320 bfd_elf_generic_reloc
, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE
, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE
), /* pcrel_offset */
327 /* Dynamic TLS relocations. */
329 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
333 FALSE
, /* pc_relative */
335 complain_overflow_bitfield
,/* complain_on_overflow */
336 bfd_elf_generic_reloc
, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE
, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE
), /* pcrel_offset */
343 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
347 FALSE
, /* pc_relative */
349 complain_overflow_bitfield
,/* complain_on_overflow */
350 bfd_elf_generic_reloc
, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE
, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE
), /* pcrel_offset */
357 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
361 FALSE
, /* pc_relative */
363 complain_overflow_bitfield
,/* complain_on_overflow */
364 bfd_elf_generic_reloc
, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE
, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE
), /* pcrel_offset */
371 /* Relocs used in ARM Linux */
373 HOWTO (R_ARM_COPY
, /* type */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
377 FALSE
, /* pc_relative */
379 complain_overflow_bitfield
,/* complain_on_overflow */
380 bfd_elf_generic_reloc
, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE
, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE
), /* pcrel_offset */
387 HOWTO (R_ARM_GLOB_DAT
, /* type */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
391 FALSE
, /* pc_relative */
393 complain_overflow_bitfield
,/* complain_on_overflow */
394 bfd_elf_generic_reloc
, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE
, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE
), /* pcrel_offset */
401 HOWTO (R_ARM_JUMP_SLOT
, /* type */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
405 FALSE
, /* pc_relative */
407 complain_overflow_bitfield
,/* complain_on_overflow */
408 bfd_elf_generic_reloc
, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE
, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE
), /* pcrel_offset */
415 HOWTO (R_ARM_RELATIVE
, /* type */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
419 FALSE
, /* pc_relative */
421 complain_overflow_bitfield
,/* complain_on_overflow */
422 bfd_elf_generic_reloc
, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE
, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE
), /* pcrel_offset */
429 HOWTO (R_ARM_GOTOFF32
, /* type */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
433 FALSE
, /* pc_relative */
435 complain_overflow_bitfield
,/* complain_on_overflow */
436 bfd_elf_generic_reloc
, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE
, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE
), /* pcrel_offset */
443 HOWTO (R_ARM_GOTPC
, /* type */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
447 TRUE
, /* pc_relative */
449 complain_overflow_bitfield
,/* complain_on_overflow */
450 bfd_elf_generic_reloc
, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE
, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE
), /* pcrel_offset */
457 HOWTO (R_ARM_GOT32
, /* type */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
461 FALSE
, /* pc_relative */
463 complain_overflow_bitfield
,/* complain_on_overflow */
464 bfd_elf_generic_reloc
, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE
, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE
), /* pcrel_offset */
471 HOWTO (R_ARM_PLT32
, /* type */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
475 TRUE
, /* pc_relative */
477 complain_overflow_bitfield
,/* complain_on_overflow */
478 bfd_elf_generic_reloc
, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE
, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE
), /* pcrel_offset */
485 HOWTO (R_ARM_CALL
, /* type */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
489 TRUE
, /* pc_relative */
491 complain_overflow_signed
,/* complain_on_overflow */
492 bfd_elf_generic_reloc
, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE
, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE
), /* pcrel_offset */
499 HOWTO (R_ARM_JUMP24
, /* type */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
503 TRUE
, /* pc_relative */
505 complain_overflow_signed
,/* complain_on_overflow */
506 bfd_elf_generic_reloc
, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE
, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE
), /* pcrel_offset */
513 HOWTO (R_ARM_THM_JUMP24
, /* type */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
517 TRUE
, /* pc_relative */
519 complain_overflow_signed
,/* complain_on_overflow */
520 bfd_elf_generic_reloc
, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE
, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE
), /* pcrel_offset */
527 HOWTO (R_ARM_BASE_ABS
, /* type */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
531 FALSE
, /* pc_relative */
533 complain_overflow_dont
,/* complain_on_overflow */
534 bfd_elf_generic_reloc
, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE
, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE
), /* pcrel_offset */
541 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
545 TRUE
, /* pc_relative */
547 complain_overflow_dont
,/* complain_on_overflow */
548 bfd_elf_generic_reloc
, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE
, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE
), /* pcrel_offset */
555 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
559 TRUE
, /* pc_relative */
561 complain_overflow_dont
,/* complain_on_overflow */
562 bfd_elf_generic_reloc
, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE
, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE
), /* pcrel_offset */
569 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
573 TRUE
, /* pc_relative */
575 complain_overflow_dont
,/* complain_on_overflow */
576 bfd_elf_generic_reloc
, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE
, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE
), /* pcrel_offset */
583 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
587 FALSE
, /* pc_relative */
589 complain_overflow_dont
,/* complain_on_overflow */
590 bfd_elf_generic_reloc
, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE
, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE
), /* pcrel_offset */
597 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
601 FALSE
, /* pc_relative */
603 complain_overflow_dont
,/* complain_on_overflow */
604 bfd_elf_generic_reloc
, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE
, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE
), /* pcrel_offset */
611 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
615 FALSE
, /* pc_relative */
617 complain_overflow_dont
,/* complain_on_overflow */
618 bfd_elf_generic_reloc
, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE
, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE
), /* pcrel_offset */
625 HOWTO (R_ARM_TARGET1
, /* type */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
629 FALSE
, /* pc_relative */
631 complain_overflow_dont
,/* complain_on_overflow */
632 bfd_elf_generic_reloc
, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE
, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE
), /* pcrel_offset */
639 HOWTO (R_ARM_ROSEGREL32
, /* type */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
643 FALSE
, /* pc_relative */
645 complain_overflow_dont
,/* complain_on_overflow */
646 bfd_elf_generic_reloc
, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE
, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE
), /* pcrel_offset */
653 HOWTO (R_ARM_V4BX
, /* type */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
657 FALSE
, /* pc_relative */
659 complain_overflow_dont
,/* complain_on_overflow */
660 bfd_elf_generic_reloc
, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE
, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE
), /* pcrel_offset */
667 HOWTO (R_ARM_TARGET2
, /* type */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
671 FALSE
, /* pc_relative */
673 complain_overflow_signed
,/* complain_on_overflow */
674 bfd_elf_generic_reloc
, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE
, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE
), /* pcrel_offset */
681 HOWTO (R_ARM_PREL31
, /* type */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
685 TRUE
, /* pc_relative */
687 complain_overflow_signed
,/* complain_on_overflow */
688 bfd_elf_generic_reloc
, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE
, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE
), /* pcrel_offset */
695 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
699 FALSE
, /* pc_relative */
701 complain_overflow_dont
,/* complain_on_overflow */
702 bfd_elf_generic_reloc
, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE
, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE
), /* pcrel_offset */
709 HOWTO (R_ARM_MOVT_ABS
, /* type */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
713 FALSE
, /* pc_relative */
715 complain_overflow_bitfield
,/* complain_on_overflow */
716 bfd_elf_generic_reloc
, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE
, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE
), /* pcrel_offset */
723 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
727 TRUE
, /* pc_relative */
729 complain_overflow_dont
,/* complain_on_overflow */
730 bfd_elf_generic_reloc
, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE
, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE
), /* pcrel_offset */
737 HOWTO (R_ARM_MOVT_PREL
, /* type */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
741 TRUE
, /* pc_relative */
743 complain_overflow_bitfield
,/* complain_on_overflow */
744 bfd_elf_generic_reloc
, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE
, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE
), /* pcrel_offset */
751 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
755 FALSE
, /* pc_relative */
757 complain_overflow_dont
,/* complain_on_overflow */
758 bfd_elf_generic_reloc
, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE
, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE
), /* pcrel_offset */
765 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
769 FALSE
, /* pc_relative */
771 complain_overflow_bitfield
,/* complain_on_overflow */
772 bfd_elf_generic_reloc
, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE
, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE
), /* pcrel_offset */
779 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
783 TRUE
, /* pc_relative */
785 complain_overflow_dont
,/* complain_on_overflow */
786 bfd_elf_generic_reloc
, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE
, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE
), /* pcrel_offset */
793 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
797 TRUE
, /* pc_relative */
799 complain_overflow_bitfield
,/* complain_on_overflow */
800 bfd_elf_generic_reloc
, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE
, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE
), /* pcrel_offset */
807 HOWTO (R_ARM_THM_JUMP19
, /* type */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
811 TRUE
, /* pc_relative */
813 complain_overflow_signed
,/* complain_on_overflow */
814 bfd_elf_generic_reloc
, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE
, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE
), /* pcrel_offset */
821 HOWTO (R_ARM_THM_JUMP6
, /* type */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
825 TRUE
, /* pc_relative */
827 complain_overflow_unsigned
,/* complain_on_overflow */
828 bfd_elf_generic_reloc
, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE
, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE
), /* pcrel_offset */
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
838 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
842 TRUE
, /* pc_relative */
844 complain_overflow_dont
,/* complain_on_overflow */
845 bfd_elf_generic_reloc
, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE
, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE
), /* pcrel_offset */
852 HOWTO (R_ARM_THM_PC12
, /* type */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
856 TRUE
, /* pc_relative */
858 complain_overflow_dont
,/* complain_on_overflow */
859 bfd_elf_generic_reloc
, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE
, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE
), /* pcrel_offset */
866 HOWTO (R_ARM_ABS32_NOI
, /* type */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
870 FALSE
, /* pc_relative */
872 complain_overflow_dont
,/* complain_on_overflow */
873 bfd_elf_generic_reloc
, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE
, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE
), /* pcrel_offset */
880 HOWTO (R_ARM_REL32_NOI
, /* type */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
884 TRUE
, /* pc_relative */
886 complain_overflow_dont
,/* complain_on_overflow */
887 bfd_elf_generic_reloc
, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE
, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE
), /* pcrel_offset */
894 /* Group relocations. */
896 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
900 TRUE
, /* pc_relative */
902 complain_overflow_dont
,/* complain_on_overflow */
903 bfd_elf_generic_reloc
, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE
, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE
), /* pcrel_offset */
910 HOWTO (R_ARM_ALU_PC_G0
, /* type */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
914 TRUE
, /* pc_relative */
916 complain_overflow_dont
,/* complain_on_overflow */
917 bfd_elf_generic_reloc
, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE
, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE
), /* pcrel_offset */
924 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
928 TRUE
, /* pc_relative */
930 complain_overflow_dont
,/* complain_on_overflow */
931 bfd_elf_generic_reloc
, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE
, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE
), /* pcrel_offset */
938 HOWTO (R_ARM_ALU_PC_G1
, /* type */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
942 TRUE
, /* pc_relative */
944 complain_overflow_dont
,/* complain_on_overflow */
945 bfd_elf_generic_reloc
, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE
, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE
), /* pcrel_offset */
952 HOWTO (R_ARM_ALU_PC_G2
, /* type */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
956 TRUE
, /* pc_relative */
958 complain_overflow_dont
,/* complain_on_overflow */
959 bfd_elf_generic_reloc
, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE
, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE
), /* pcrel_offset */
966 HOWTO (R_ARM_LDR_PC_G1
, /* type */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
970 TRUE
, /* pc_relative */
972 complain_overflow_dont
,/* complain_on_overflow */
973 bfd_elf_generic_reloc
, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE
, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE
), /* pcrel_offset */
980 HOWTO (R_ARM_LDR_PC_G2
, /* type */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
984 TRUE
, /* pc_relative */
986 complain_overflow_dont
,/* complain_on_overflow */
987 bfd_elf_generic_reloc
, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE
, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE
), /* pcrel_offset */
994 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
998 TRUE
, /* pc_relative */
1000 complain_overflow_dont
,/* complain_on_overflow */
1001 bfd_elf_generic_reloc
, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE
, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE
), /* pcrel_offset */
1008 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1012 TRUE
, /* pc_relative */
1014 complain_overflow_dont
,/* complain_on_overflow */
1015 bfd_elf_generic_reloc
, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE
, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE
), /* pcrel_offset */
1022 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1026 TRUE
, /* pc_relative */
1028 complain_overflow_dont
,/* complain_on_overflow */
1029 bfd_elf_generic_reloc
, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE
, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE
), /* pcrel_offset */
1036 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 TRUE
, /* pc_relative */
1042 complain_overflow_dont
,/* complain_on_overflow */
1043 bfd_elf_generic_reloc
, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE
, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE
), /* pcrel_offset */
1050 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1054 TRUE
, /* pc_relative */
1056 complain_overflow_dont
,/* complain_on_overflow */
1057 bfd_elf_generic_reloc
, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE
, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE
), /* pcrel_offset */
1064 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1068 TRUE
, /* pc_relative */
1070 complain_overflow_dont
,/* complain_on_overflow */
1071 bfd_elf_generic_reloc
, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE
, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE
), /* pcrel_offset */
1078 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1082 TRUE
, /* pc_relative */
1084 complain_overflow_dont
,/* complain_on_overflow */
1085 bfd_elf_generic_reloc
, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE
, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE
), /* pcrel_offset */
1092 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1096 TRUE
, /* pc_relative */
1098 complain_overflow_dont
,/* complain_on_overflow */
1099 bfd_elf_generic_reloc
, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE
, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE
), /* pcrel_offset */
1106 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1110 TRUE
, /* pc_relative */
1112 complain_overflow_dont
,/* complain_on_overflow */
1113 bfd_elf_generic_reloc
, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE
, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE
), /* pcrel_offset */
1120 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1124 TRUE
, /* pc_relative */
1126 complain_overflow_dont
,/* complain_on_overflow */
1127 bfd_elf_generic_reloc
, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE
, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE
), /* pcrel_offset */
1134 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1138 TRUE
, /* pc_relative */
1140 complain_overflow_dont
,/* complain_on_overflow */
1141 bfd_elf_generic_reloc
, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE
, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE
), /* pcrel_offset */
1148 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 TRUE
, /* pc_relative */
1154 complain_overflow_dont
,/* complain_on_overflow */
1155 bfd_elf_generic_reloc
, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE
, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE
), /* pcrel_offset */
1162 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 TRUE
, /* pc_relative */
1168 complain_overflow_dont
,/* complain_on_overflow */
1169 bfd_elf_generic_reloc
, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE
, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE
), /* pcrel_offset */
1176 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 TRUE
, /* pc_relative */
1182 complain_overflow_dont
,/* complain_on_overflow */
1183 bfd_elf_generic_reloc
, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE
, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE
), /* pcrel_offset */
1190 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1194 TRUE
, /* pc_relative */
1196 complain_overflow_dont
,/* complain_on_overflow */
1197 bfd_elf_generic_reloc
, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE
, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE
), /* pcrel_offset */
1204 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 TRUE
, /* pc_relative */
1210 complain_overflow_dont
,/* complain_on_overflow */
1211 bfd_elf_generic_reloc
, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE
, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE
), /* pcrel_offset */
1218 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 TRUE
, /* pc_relative */
1224 complain_overflow_dont
,/* complain_on_overflow */
1225 bfd_elf_generic_reloc
, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE
, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE
), /* pcrel_offset */
1232 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1236 TRUE
, /* pc_relative */
1238 complain_overflow_dont
,/* complain_on_overflow */
1239 bfd_elf_generic_reloc
, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE
, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE
), /* pcrel_offset */
1246 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1250 TRUE
, /* pc_relative */
1252 complain_overflow_dont
,/* complain_on_overflow */
1253 bfd_elf_generic_reloc
, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE
, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE
), /* pcrel_offset */
1260 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1264 TRUE
, /* pc_relative */
1266 complain_overflow_dont
,/* complain_on_overflow */
1267 bfd_elf_generic_reloc
, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE
, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE
), /* pcrel_offset */
1274 /* End of group relocations. */
1276 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1280 FALSE
, /* pc_relative */
1282 complain_overflow_dont
,/* complain_on_overflow */
1283 bfd_elf_generic_reloc
, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE
, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE
), /* pcrel_offset */
1290 HOWTO (R_ARM_MOVT_BREL
, /* type */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1294 FALSE
, /* pc_relative */
1296 complain_overflow_bitfield
,/* complain_on_overflow */
1297 bfd_elf_generic_reloc
, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE
, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE
), /* pcrel_offset */
1304 HOWTO (R_ARM_MOVW_BREL
, /* type */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1308 FALSE
, /* pc_relative */
1310 complain_overflow_dont
,/* complain_on_overflow */
1311 bfd_elf_generic_reloc
, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE
, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE
), /* pcrel_offset */
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1322 FALSE
, /* pc_relative */
1324 complain_overflow_dont
,/* complain_on_overflow */
1325 bfd_elf_generic_reloc
, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE
, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE
), /* pcrel_offset */
1332 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1336 FALSE
, /* pc_relative */
1338 complain_overflow_bitfield
,/* complain_on_overflow */
1339 bfd_elf_generic_reloc
, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE
, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE
), /* pcrel_offset */
1346 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1350 FALSE
, /* pc_relative */
1352 complain_overflow_dont
,/* complain_on_overflow */
1353 bfd_elf_generic_reloc
, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE
, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE
), /* pcrel_offset */
1360 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1364 FALSE
, /* pc_relative */
1366 complain_overflow_bitfield
,/* complain_on_overflow */
1367 NULL
, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE
, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE
), /* pcrel_offset */
1374 HOWTO (R_ARM_TLS_CALL
, /* type */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1378 FALSE
, /* pc_relative */
1380 complain_overflow_dont
,/* complain_on_overflow */
1381 bfd_elf_generic_reloc
, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE
, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE
), /* pcrel_offset */
1388 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 FALSE
, /* pc_relative */
1394 complain_overflow_bitfield
,/* complain_on_overflow */
1395 bfd_elf_generic_reloc
, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE
, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE
), /* pcrel_offset */
1402 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 FALSE
, /* pc_relative */
1408 complain_overflow_dont
,/* complain_on_overflow */
1409 bfd_elf_generic_reloc
, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE
, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE
), /* pcrel_offset */
1416 HOWTO (R_ARM_PLT32_ABS
, /* type */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 FALSE
, /* pc_relative */
1422 complain_overflow_dont
,/* complain_on_overflow */
1423 bfd_elf_generic_reloc
, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE
, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE
), /* pcrel_offset */
1430 HOWTO (R_ARM_GOT_ABS
, /* type */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 FALSE
, /* pc_relative */
1436 complain_overflow_dont
,/* complain_on_overflow */
1437 bfd_elf_generic_reloc
, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE
, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE
), /* pcrel_offset */
1444 HOWTO (R_ARM_GOT_PREL
, /* type */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 TRUE
, /* pc_relative */
1450 complain_overflow_dont
, /* complain_on_overflow */
1451 bfd_elf_generic_reloc
, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE
, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE
), /* pcrel_offset */
1458 HOWTO (R_ARM_GOT_BREL12
, /* type */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 FALSE
, /* pc_relative */
1464 complain_overflow_bitfield
,/* complain_on_overflow */
1465 bfd_elf_generic_reloc
, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE
, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE
), /* pcrel_offset */
1472 HOWTO (R_ARM_GOTOFF12
, /* type */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 FALSE
, /* pc_relative */
1478 complain_overflow_bitfield
,/* complain_on_overflow */
1479 bfd_elf_generic_reloc
, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE
, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE
), /* pcrel_offset */
1486 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 FALSE
, /* pc_relative */
1495 complain_overflow_dont
, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE
, /* partial_inplace */
1501 FALSE
), /* pcrel_offset */
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 FALSE
, /* pc_relative */
1510 complain_overflow_dont
, /* complain_on_overflow */
1511 NULL
, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE
, /* partial_inplace */
1516 FALSE
), /* pcrel_offset */
1518 HOWTO (R_ARM_THM_JUMP11
, /* type */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1522 TRUE
, /* pc_relative */
1524 complain_overflow_signed
, /* complain_on_overflow */
1525 bfd_elf_generic_reloc
, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE
, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE
), /* pcrel_offset */
1532 HOWTO (R_ARM_THM_JUMP8
, /* type */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1536 TRUE
, /* pc_relative */
1538 complain_overflow_signed
, /* complain_on_overflow */
1539 bfd_elf_generic_reloc
, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE
, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE
), /* pcrel_offset */
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32
, /* type */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1551 FALSE
, /* pc_relative */
1553 complain_overflow_bitfield
,/* complain_on_overflow */
1554 NULL
, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE
, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE
), /* pcrel_offset */
1561 HOWTO (R_ARM_TLS_LDM32
, /* type */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1565 FALSE
, /* pc_relative */
1567 complain_overflow_bitfield
,/* complain_on_overflow */
1568 bfd_elf_generic_reloc
, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE
, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE
), /* pcrel_offset */
1575 HOWTO (R_ARM_TLS_LDO32
, /* type */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 FALSE
, /* pc_relative */
1581 complain_overflow_bitfield
,/* complain_on_overflow */
1582 bfd_elf_generic_reloc
, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE
, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE
), /* pcrel_offset */
1589 HOWTO (R_ARM_TLS_IE32
, /* type */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1593 FALSE
, /* pc_relative */
1595 complain_overflow_bitfield
,/* complain_on_overflow */
1596 NULL
, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE
, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE
), /* pcrel_offset */
1603 HOWTO (R_ARM_TLS_LE32
, /* type */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1607 FALSE
, /* pc_relative */
1609 complain_overflow_bitfield
,/* complain_on_overflow */
1610 NULL
, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE
, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE
), /* pcrel_offset */
1617 HOWTO (R_ARM_TLS_LDO12
, /* type */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1621 FALSE
, /* pc_relative */
1623 complain_overflow_bitfield
,/* complain_on_overflow */
1624 bfd_elf_generic_reloc
, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE
, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE
), /* pcrel_offset */
1631 HOWTO (R_ARM_TLS_LE12
, /* type */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1635 FALSE
, /* pc_relative */
1637 complain_overflow_bitfield
,/* complain_on_overflow */
1638 bfd_elf_generic_reloc
, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE
, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE
), /* pcrel_offset */
1645 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1649 FALSE
, /* pc_relative */
1651 complain_overflow_bitfield
,/* complain_on_overflow */
1652 bfd_elf_generic_reloc
, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE
, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE
), /* pcrel_offset */
1659 /* 112-127 private relocations. */
1677 /* R_ARM_ME_TOO, obsolete. */
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1684 FALSE
, /* pc_relative */
1686 complain_overflow_bitfield
,/* complain_on_overflow */
1687 bfd_elf_generic_reloc
, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE
, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE
), /* pcrel_offset */
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1699 FALSE
, /* pc_relative. */
1701 complain_overflow_bitfield
,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc
, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE
, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE
), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1712 FALSE
, /* pc_relative. */
1714 complain_overflow_bitfield
,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc
, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE
, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE
), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1725 FALSE
, /* pc_relative. */
1727 complain_overflow_bitfield
,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc
, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE
, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE
), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1738 FALSE
, /* pc_relative. */
1740 complain_overflow_bitfield
,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc
, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE
, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE
), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16
, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1752 TRUE
, /* pc_relative. */
1754 complain_overflow_dont
,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc
, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE
, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE
), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12
, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1765 TRUE
, /* pc_relative. */
1767 complain_overflow_dont
,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc
, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE
, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE
), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18
, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1778 TRUE
, /* pc_relative. */
1780 complain_overflow_dont
,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc
, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE
, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE
), /* pcrel_offset. */
1790 static reloc_howto_type elf32_arm_howto_table_2
[8] =
1792 HOWTO (R_ARM_IRELATIVE
, /* type */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 FALSE
, /* pc_relative */
1798 complain_overflow_bitfield
,/* complain_on_overflow */
1799 bfd_elf_generic_reloc
, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE
, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE
), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC
, /* type */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 FALSE
, /* pc_relative */
1811 complain_overflow_bitfield
,/* complain_on_overflow */
1812 bfd_elf_generic_reloc
, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE
, /* partial_inplace */
1816 0xffffffff, /* dst_mask */
1817 FALSE
), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC
, /* type */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1822 FALSE
, /* pc_relative */
1824 complain_overflow_bitfield
,/* complain_on_overflow */
1825 bfd_elf_generic_reloc
, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE
, /* partial_inplace */
1829 0xffffffff, /* dst_mask */
1830 FALSE
), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC
, /* type */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1835 FALSE
, /* pc_relative */
1837 complain_overflow_bitfield
,/* complain_on_overflow */
1838 bfd_elf_generic_reloc
, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE
, /* partial_inplace */
1842 0xffffffff, /* dst_mask */
1843 FALSE
), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE
, /* type */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1848 FALSE
, /* pc_relative */
1850 complain_overflow_bitfield
,/* complain_on_overflow */
1851 bfd_elf_generic_reloc
, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE
, /* partial_inplace */
1855 0xffffffff, /* dst_mask */
1856 FALSE
), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC
, /* type */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1861 FALSE
, /* pc_relative */
1863 complain_overflow_bitfield
,/* complain_on_overflow */
1864 bfd_elf_generic_reloc
, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE
, /* partial_inplace */
1868 0xffffffff, /* dst_mask */
1869 FALSE
), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC
, /* type */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1874 FALSE
, /* pc_relative */
1876 complain_overflow_bitfield
,/* complain_on_overflow */
1877 bfd_elf_generic_reloc
, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE
, /* partial_inplace */
1881 0xffffffff, /* dst_mask */
1882 FALSE
), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC
, /* type */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1887 FALSE
, /* pc_relative */
1889 complain_overflow_bitfield
,/* complain_on_overflow */
1890 bfd_elf_generic_reloc
, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE
, /* partial_inplace */
1894 0xffffffff, /* dst_mask */
1895 FALSE
), /* pcrel_offset */
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1901 HOWTO (R_ARM_RREL32
, /* type */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 FALSE
, /* pc_relative */
1907 complain_overflow_dont
,/* complain_on_overflow */
1908 bfd_elf_generic_reloc
, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE
, /* partial_inplace */
1913 FALSE
), /* pcrel_offset */
1915 HOWTO (R_ARM_RABS32
, /* type */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1919 FALSE
, /* pc_relative */
1921 complain_overflow_dont
,/* complain_on_overflow */
1922 bfd_elf_generic_reloc
, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE
, /* partial_inplace */
1927 FALSE
), /* pcrel_offset */
1929 HOWTO (R_ARM_RPC24
, /* type */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1933 FALSE
, /* pc_relative */
1935 complain_overflow_dont
,/* complain_on_overflow */
1936 bfd_elf_generic_reloc
, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE
, /* partial_inplace */
1941 FALSE
), /* pcrel_offset */
1943 HOWTO (R_ARM_RBASE
, /* type */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1947 FALSE
, /* pc_relative */
1949 complain_overflow_dont
,/* complain_on_overflow */
1950 bfd_elf_generic_reloc
, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE
, /* partial_inplace */
1955 FALSE
) /* pcrel_offset */
1958 static reloc_howto_type
*
1959 elf32_arm_howto_from_type (unsigned int r_type
)
1961 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1962 return &elf32_arm_howto_table_1
[r_type
];
1964 if (r_type
>= R_ARM_IRELATIVE
1965 && r_type
< R_ARM_IRELATIVE
+ ARRAY_SIZE (elf32_arm_howto_table_2
))
1966 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1968 if (r_type
>= R_ARM_RREL32
1969 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1970 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1976 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1977 Elf_Internal_Rela
* elf_reloc
)
1979 unsigned int r_type
;
1981 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1982 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1987 bfd_set_error (bfd_error_bad_value
);
1993 struct elf32_arm_reloc_map
1995 bfd_reloc_code_real_type bfd_reloc_val
;
1996 unsigned char elf_reloc_val
;
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
2002 {BFD_RELOC_NONE
, R_ARM_NONE
},
2003 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
2004 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
2005 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
2006 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
2007 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
2008 {BFD_RELOC_32
, R_ARM_ABS32
},
2009 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
2010 {BFD_RELOC_8
, R_ARM_ABS8
},
2011 {BFD_RELOC_16
, R_ARM_ABS16
},
2012 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
2013 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
2020 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
2021 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
2022 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
2023 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
2024 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
2025 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
2026 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
2027 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2028 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
2029 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
2030 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
2031 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
2032 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
2033 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2034 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
2035 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
2036 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
2039 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
2040 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
2041 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
2042 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
2045 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
2046 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
2047 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
2048 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
2049 {BFD_RELOC_ARM_GOTFUNCDESC
, R_ARM_GOTFUNCDESC
},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC
, R_ARM_GOTOFFFUNCDESC
},
2051 {BFD_RELOC_ARM_FUNCDESC
, R_ARM_FUNCDESC
},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE
, R_ARM_FUNCDESC_VALUE
},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC
, R_ARM_TLS_GD32_FDPIC
},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC
, R_ARM_TLS_LDM32_FDPIC
},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC
, R_ARM_TLS_IE32_FDPIC
},
2056 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
2057 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
2058 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
2059 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
2060 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
2061 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
2062 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
2063 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
2067 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
2069 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
2070 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
2071 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
2072 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
2073 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
2074 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
2075 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
2076 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
2077 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
2078 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
2079 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
2081 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
2083 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
2084 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
2085 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
2086 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
2087 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
2088 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
2089 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
2090 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
2091 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
2092 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
2093 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
2094 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
},
2099 {BFD_RELOC_ARM_THUMB_BF17
, R_ARM_THM_BF16
},
2100 {BFD_RELOC_ARM_THUMB_BF13
, R_ARM_THM_BF12
},
2101 {BFD_RELOC_ARM_THUMB_BF19
, R_ARM_THM_BF18
}
2104 static reloc_howto_type
*
2105 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2106 bfd_reloc_code_real_type code
)
2110 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
2111 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
2117 static reloc_howto_type
*
2118 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2123 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
2124 if (elf32_arm_howto_table_1
[i
].name
!= NULL
2125 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
2126 return &elf32_arm_howto_table_1
[i
];
2128 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
2129 if (elf32_arm_howto_table_2
[i
].name
!= NULL
2130 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
2131 return &elf32_arm_howto_table_2
[i
];
2133 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
2134 if (elf32_arm_howto_table_3
[i
].name
!= NULL
2135 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
2136 return &elf32_arm_howto_table_3
[i
];
2141 /* Support for core dump NOTE sections. */
2144 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2149 switch (note
->descsz
)
2154 case 148: /* Linux/ARM 32-bit. */
2156 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2159 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2170 size
, note
->descpos
+ offset
);
2174 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2176 switch (note
->descsz
)
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd
)->core
->pid
2183 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2184 elf_tdata (abfd
)->core
->program
2185 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2186 elf_tdata (abfd
)->core
->command
2187 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2194 char *command
= elf_tdata (abfd
)->core
->command
;
2195 int n
= strlen (command
);
2197 if (0 < n
&& command
[n
- 1] == ' ')
2198 command
[n
- 1] = '\0';
2205 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2215 char data
[124] ATTRIBUTE_NONSTRING
;
2218 va_start (ap
, note_type
);
2219 memset (data
, 0, sizeof (data
));
2220 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION
;
2229 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2235 return elfcore_write_note (abfd
, buf
, bufsiz
,
2236 "CORE", note_type
, data
, sizeof (data
));
2247 va_start (ap
, note_type
);
2248 memset (data
, 0, sizeof (data
));
2249 pid
= va_arg (ap
, long);
2250 bfd_put_32 (abfd
, pid
, data
+ 24);
2251 cursig
= va_arg (ap
, int);
2252 bfd_put_16 (abfd
, cursig
, data
+ 12);
2253 greg
= va_arg (ap
, const void *);
2254 memcpy (data
+ 72, greg
, 72);
2257 return elfcore_write_note (abfd
, buf
, bufsiz
,
2258 "CORE", note_type
, data
, sizeof (data
));
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2272 typedef unsigned long int insn32
;
2273 typedef unsigned short int insn16
;
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2303 #define CMSE_PREFIX "__acle_se_"
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2307 /* The name of the dynamic interpreter. This is put in the .interp
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2314 static const unsigned long tls_trampoline
[] =
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2321 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry
[] =
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry
[] =
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2371 #ifdef FOUR_WORD_PLT
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2377 static const bfd_vma elf32_arm_plt0_entry
[] =
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2385 /* Subsequent entries in a procedure linkage table look like
2387 static const bfd_vma elf32_arm_plt_entry
[] =
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2395 #else /* not FOUR_WORD_PLT */
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2401 static const bfd_vma elf32_arm_plt0_entry
[] =
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short
[] =
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long
[] =
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2429 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2431 #endif /* not FOUR_WORD_PLT */
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2449 static const bfd_vma elf32_thumb2_plt_entry
[] =
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fdf000 /* ldr.w pc, [ip] */
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2500 /* The entries in a PLT when using a DLL-based target with multiple
2502 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2512 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579 enum stub_insn_type type
;
2580 unsigned int r_type
;
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2780 /* Cortex-A8 erratum-workaround stubs. */
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2792 /* Stub used for b.w and bl.w instructions. */
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2822 const char * stubborn_problems[] = { "np" };
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2827 .data.rel.local.stubborn_problems
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2838 #define STUB_SUFFIX ".__stub"
2840 /* One entry per long/short branch stub defined above. */
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2880 const insn_sequence
* template_sequence
;
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions
[] =
2891 struct elf32_arm_stub_hash_entry
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root
;
2896 /* The stub section. */
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset
;
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value
;
2905 asection
*target_section
;
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2912 bfd_vma source_value
;
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn
;
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type
;
2920 /* Its encoding size in bytes. */
2923 const insn_sequence
*stub_template
;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size
;
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry
*h
;
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type
;
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2943 /* Used to build a map of a section. This is required for mixed-endian
2946 typedef struct elf32_elf_section_map
2951 elf32_arm_section_map
;
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2959 VFP11_ERRATUM_ARM_VENEER
,
2960 VFP11_ERRATUM_THUMB_VENEER
2962 elf32_vfp11_erratum_type
;
2964 typedef struct elf32_vfp11_erratum_list
2966 struct elf32_vfp11_erratum_list
*next
;
2972 struct elf32_vfp11_erratum_list
*veneer
;
2973 unsigned int vfp_insn
;
2977 struct elf32_vfp11_erratum_list
*branch
;
2981 elf32_vfp11_erratum_type type
;
2983 elf32_vfp11_erratum_list
;
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2990 STM32L4XX_ERRATUM_VENEER
2992 elf32_stm32l4xx_erratum_type
;
2994 typedef struct elf32_stm32l4xx_erratum_list
2996 struct elf32_stm32l4xx_erratum_list
*next
;
3002 struct elf32_stm32l4xx_erratum_list
*veneer
;
3007 struct elf32_stm32l4xx_erratum_list
*branch
;
3011 elf32_stm32l4xx_erratum_type type
;
3013 elf32_stm32l4xx_erratum_list
;
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3020 arm_unwind_edit_type
;
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3025 arm_unwind_edit_type type
;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection
*linked_section
;
3031 struct arm_unwind_table_edit
*next
;
3033 arm_unwind_table_edit
;
3035 typedef struct _arm_elf_section_data
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf
;
3039 unsigned int mapcount
;
3040 unsigned int mapsize
;
3041 elf32_arm_section_map
*map
;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount
;
3044 elf32_vfp11_erratum_list
*erratumlist
;
3045 unsigned int stm32l4xx_erratumcount
;
3046 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
3047 unsigned int additional_reloc_count
;
3048 /* Information about unwind tables. */
3051 /* Unwind info attached to a text section. */
3054 asection
*arm_exidx_sec
;
3057 /* Unwind info attached to an .ARM.exidx section. */
3060 arm_unwind_table_edit
*unwind_edit_list
;
3061 arm_unwind_table_edit
*unwind_edit_tail
;
3065 _arm_elf_section_data
;
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3076 struct a8_erratum_fix
3081 bfd_vma target_offset
;
3082 unsigned long orig_insn
;
3084 enum elf32_arm_stub_type stub_type
;
3085 enum arm_st_branch_type branch_type
;
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3091 struct a8_erratum_reloc
3094 bfd_vma destination
;
3095 struct elf32_arm_link_hash_entry
*hash
;
3096 const char *sym_name
;
3097 unsigned int r_type
;
3098 enum arm_st_branch_type branch_type
;
3099 bfd_boolean non_a8_stub
;
3102 /* The size of the thread control block. */
3105 /* ARM-specific information about a PLT entry, over and above the usual
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount
;
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount
;
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount
;
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset
;
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root
;
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm
;
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs
*dyn_relocs
;
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local
{
3147 unsigned int funcdesc_cnt
;
3148 unsigned int gotofffuncdesc_cnt
;
3149 int funcdesc_offset
;
3152 struct elf_arm_obj_tdata
3154 struct elf_obj_tdata root
;
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type
;
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma
*local_tlsdesc_gotent
;
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info
**local_iplt
;
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning
;
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning
;
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local
*local_fdpic_cnts
;
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3196 elf32_arm_mkobject (bfd
*abfd
)
3198 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global
{
3206 unsigned int gotofffuncdesc_cnt
;
3207 unsigned int gotfuncdesc_cnt
;
3208 unsigned int funcdesc_cnt
;
3209 int funcdesc_offset
;
3210 int gotfuncdesc_offset
;
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3216 struct elf_link_hash_entry root
;
3218 /* Track dynamic relocs copied for this symbol. */
3219 struct elf_dyn_relocs
*dyn_relocs
;
3221 /* ARM-specific PLT information. */
3222 struct arm_plt_info plt
;
3224 #define GOT_UNKNOWN 0
3225 #define GOT_NORMAL 1
3226 #define GOT_TLS_GD 2
3227 #define GOT_TLS_IE 4
3228 #define GOT_TLS_GDESC 8
3229 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3230 unsigned int tls_type
: 8;
3232 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3233 unsigned int is_iplt
: 1;
3235 unsigned int unused
: 23;
3237 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3238 starting at the end of the jump table. */
3239 bfd_vma tlsdesc_got
;
3241 /* The symbol marking the real symbol location for exported thumb
3242 symbols with Arm stubs. */
3243 struct elf_link_hash_entry
*export_glue
;
3245 /* A pointer to the most recently used stub hash entry against this
3247 struct elf32_arm_stub_hash_entry
*stub_cache
;
3249 /* Counter for FDPIC relocations against this symbol. */
3250 struct fdpic_global fdpic_cnts
;
3253 /* Traverse an arm ELF linker hash table. */
3254 #define elf32_arm_link_hash_traverse(table, func, info) \
3255 (elf_link_hash_traverse \
3257 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3260 /* Get the ARM elf linker hash table from a link_info structure. */
3261 #define elf32_arm_hash_table(info) \
3262 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3263 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3265 #define arm_stub_hash_lookup(table, string, create, copy) \
3266 ((struct elf32_arm_stub_hash_entry *) \
3267 bfd_hash_lookup ((table), (string), (create), (copy)))
3269 /* Array to keep track of which stub sections have been created, and
3270 information on stub grouping. */
3273 /* This is the section to which stubs in the group will be
3276 /* The stub section. */
3280 #define elf32_arm_compute_jump_table_size(htab) \
3281 ((htab)->next_tls_desc_index * 4)
3283 /* ARM ELF linker hash table. */
3284 struct elf32_arm_link_hash_table
3286 /* The main hash table. */
3287 struct elf_link_hash_table root
;
3289 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3290 bfd_size_type thumb_glue_size
;
3292 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3293 bfd_size_type arm_glue_size
;
3295 /* The size in bytes of section containing the ARMv4 BX veneers. */
3296 bfd_size_type bx_glue_size
;
3298 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3299 veneer has been populated. */
3300 bfd_vma bx_glue_offset
[15];
3302 /* The size in bytes of the section containing glue for VFP11 erratum
3304 bfd_size_type vfp11_erratum_glue_size
;
3306 /* The size in bytes of the section containing glue for STM32L4XX erratum
3308 bfd_size_type stm32l4xx_erratum_glue_size
;
3310 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3311 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3312 elf32_arm_write_section(). */
3313 struct a8_erratum_fix
*a8_erratum_fixes
;
3314 unsigned int num_a8_erratum_fixes
;
3316 /* An arbitrary input BFD chosen to hold the glue sections. */
3317 bfd
* bfd_of_glue_owner
;
3319 /* Nonzero to output a BE8 image. */
3322 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3323 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3326 /* The relocation to use for R_ARM_TARGET2 relocations. */
3329 /* 0 = Ignore R_ARM_V4BX.
3330 1 = Convert BX to MOV PC.
3331 2 = Generate v4 interworing stubs. */
3334 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3337 /* Whether we should fix the ARM1176 BLX immediate issue. */
3340 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3343 /* What sort of code sequences we should look for which may trigger the
3344 VFP11 denorm erratum. */
3345 bfd_arm_vfp11_fix vfp11_fix
;
3347 /* Global counter for the number of fixes we have emitted. */
3348 int num_vfp11_fixes
;
3350 /* What sort of code sequences we should look for which may trigger the
3351 STM32L4XX erratum. */
3352 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3354 /* Global counter for the number of fixes we have emitted. */
3355 int num_stm32l4xx_fixes
;
3357 /* Nonzero to force PIC branch veneers. */
3360 /* The number of bytes in the initial entry in the PLT. */
3361 bfd_size_type plt_header_size
;
3363 /* The number of bytes in the subsequent PLT etries. */
3364 bfd_size_type plt_entry_size
;
3366 /* True if the target system is VxWorks. */
3369 /* True if the target system is Symbian OS. */
3372 /* True if the target system is Native Client. */
3375 /* True if the target uses REL relocations. */
3376 bfd_boolean use_rel
;
3378 /* Nonzero if import library must be a secure gateway import library
3379 as per ARMv8-M Security Extensions. */
3382 /* The import library whose symbols' address must remain stable in
3383 the import library generated. */
3386 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3387 bfd_vma next_tls_desc_index
;
3389 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3390 bfd_vma num_tls_desc
;
3392 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3395 /* The offset into splt of the PLT entry for the TLS descriptor
3396 resolver. Special values are 0, if not necessary (or not found
3397 to be necessary yet), and -1 if needed but not determined
3399 bfd_vma dt_tlsdesc_plt
;
3401 /* The offset into sgot of the GOT entry used by the PLT entry
3403 bfd_vma dt_tlsdesc_got
;
3405 /* Offset in .plt section of tls_arm_trampoline. */
3406 bfd_vma tls_trampoline
;
3408 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3411 bfd_signed_vma refcount
;
3415 /* Small local sym cache. */
3416 struct sym_cache sym_cache
;
3418 /* For convenience in allocate_dynrelocs. */
3421 /* The amount of space used by the reserved portion of the sgotplt
3422 section, plus whatever space is used by the jump slots. */
3423 bfd_vma sgotplt_jump_table_size
;
3425 /* The stub hash table. */
3426 struct bfd_hash_table stub_hash_table
;
3428 /* Linker stub bfd. */
3431 /* Linker call-backs. */
3432 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3434 void (*layout_sections_again
) (void);
3436 /* Array to keep track of which stub sections have been created, and
3437 information on stub grouping. */
3438 struct map_stub
*stub_group
;
3440 /* Input stub section holding secure gateway veneers. */
3441 asection
*cmse_stub_sec
;
3443 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3444 start to be allocated. */
3445 bfd_vma new_cmse_stub_offset
;
3447 /* Number of elements in stub_group. */
3448 unsigned int top_id
;
3450 /* Assorted information used by elf32_arm_size_stubs. */
3451 unsigned int bfd_count
;
3452 unsigned int top_index
;
3453 asection
**input_list
;
3455 /* True if the target system uses FDPIC. */
3458 /* Fixup section. Used for FDPIC. */
3462 /* Add an FDPIC read-only fixup. */
3464 arm_elf_add_rofixup (bfd
*output_bfd
, asection
*srofixup
, bfd_vma offset
)
3466 bfd_vma fixup_offset
;
3468 fixup_offset
= srofixup
->reloc_count
++ * 4;
3469 BFD_ASSERT (fixup_offset
< srofixup
->size
);
3470 bfd_put_32 (output_bfd
, offset
, srofixup
->contents
+ fixup_offset
);
3474 ctz (unsigned int mask
)
3476 #if GCC_VERSION >= 3004
3477 return __builtin_ctz (mask
);
3481 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3492 elf32_arm_popcount (unsigned int mask
)
3494 #if GCC_VERSION >= 3004
3495 return __builtin_popcount (mask
);
3500 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3510 static void elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
3511 asection
*sreloc
, Elf_Internal_Rela
*rel
);
3514 arm_elf_fill_funcdesc(bfd
*output_bfd
,
3515 struct bfd_link_info
*info
,
3516 int *funcdesc_offset
,
3520 bfd_vma dynreloc_value
,
3523 if ((*funcdesc_offset
& 1) == 0)
3525 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
3526 asection
*sgot
= globals
->root
.sgot
;
3528 if (bfd_link_pic(info
))
3530 asection
*srelgot
= globals
->root
.srelgot
;
3531 Elf_Internal_Rela outrel
;
3533 outrel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
3534 outrel
.r_offset
= sgot
->output_section
->vma
+ sgot
->output_offset
+ offset
;
3535 outrel
.r_addend
= 0;
3537 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
3538 bfd_put_32 (output_bfd
, addr
, sgot
->contents
+ offset
);
3539 bfd_put_32 (output_bfd
, seg
, sgot
->contents
+ offset
+ 4);
3543 struct elf_link_hash_entry
*hgot
= globals
->root
.hgot
;
3544 bfd_vma got_value
= hgot
->root
.u
.def
.value
3545 + hgot
->root
.u
.def
.section
->output_section
->vma
3546 + hgot
->root
.u
.def
.section
->output_offset
;
3548 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3549 sgot
->output_section
->vma
+ sgot
->output_offset
3551 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3552 sgot
->output_section
->vma
+ sgot
->output_offset
3554 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ offset
);
3555 bfd_put_32 (output_bfd
, got_value
, sgot
->contents
+ offset
+ 4);
3557 *funcdesc_offset
|= 1;
3561 /* Create an entry in an ARM ELF linker hash table. */
3563 static struct bfd_hash_entry
*
3564 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3565 struct bfd_hash_table
* table
,
3566 const char * string
)
3568 struct elf32_arm_link_hash_entry
* ret
=
3569 (struct elf32_arm_link_hash_entry
*) entry
;
3571 /* Allocate the structure if it has not already been allocated by a
3574 ret
= (struct elf32_arm_link_hash_entry
*)
3575 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3577 return (struct bfd_hash_entry
*) ret
;
3579 /* Call the allocation method of the superclass. */
3580 ret
= ((struct elf32_arm_link_hash_entry
*)
3581 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3585 ret
->dyn_relocs
= NULL
;
3586 ret
->tls_type
= GOT_UNKNOWN
;
3587 ret
->tlsdesc_got
= (bfd_vma
) -1;
3588 ret
->plt
.thumb_refcount
= 0;
3589 ret
->plt
.maybe_thumb_refcount
= 0;
3590 ret
->plt
.noncall_refcount
= 0;
3591 ret
->plt
.got_offset
= -1;
3592 ret
->is_iplt
= FALSE
;
3593 ret
->export_glue
= NULL
;
3595 ret
->stub_cache
= NULL
;
3597 ret
->fdpic_cnts
.gotofffuncdesc_cnt
= 0;
3598 ret
->fdpic_cnts
.gotfuncdesc_cnt
= 0;
3599 ret
->fdpic_cnts
.funcdesc_cnt
= 0;
3600 ret
->fdpic_cnts
.funcdesc_offset
= -1;
3601 ret
->fdpic_cnts
.gotfuncdesc_offset
= -1;
3604 return (struct bfd_hash_entry
*) ret
;
3607 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3611 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3613 if (elf_local_got_refcounts (abfd
) == NULL
)
3615 bfd_size_type num_syms
;
3619 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3620 size
= num_syms
* (sizeof (bfd_signed_vma
)
3621 + sizeof (struct arm_local_iplt_info
*)
3624 + sizeof (struct fdpic_local
));
3625 data
= bfd_zalloc (abfd
, size
);
3629 elf32_arm_local_fdpic_cnts (abfd
) = (struct fdpic_local
*) data
;
3630 data
+= num_syms
* sizeof (struct fdpic_local
);
3632 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3633 data
+= num_syms
* sizeof (bfd_signed_vma
);
3635 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3636 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3638 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3639 data
+= num_syms
* sizeof (bfd_vma
);
3641 elf32_arm_local_got_tls_type (abfd
) = data
;
3646 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3647 to input bfd ABFD. Create the information if it doesn't already exist.
3648 Return null if an allocation fails. */
3650 static struct arm_local_iplt_info
*
3651 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3653 struct arm_local_iplt_info
**ptr
;
3655 if (!elf32_arm_allocate_local_sym_info (abfd
))
3658 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3659 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3661 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3665 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3666 in ABFD's symbol table. If the symbol is global, H points to its
3667 hash table entry, otherwise H is null.
3669 Return true if the symbol does have PLT information. When returning
3670 true, point *ROOT_PLT at the target-independent reference count/offset
3671 union and *ARM_PLT at the ARM-specific information. */
3674 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3675 struct elf32_arm_link_hash_entry
*h
,
3676 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3677 struct arm_plt_info
**arm_plt
)
3679 struct arm_local_iplt_info
*local_iplt
;
3681 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3686 *root_plt
= &h
->root
.plt
;
3691 if (elf32_arm_local_iplt (abfd
) == NULL
)
3694 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3695 if (local_iplt
== NULL
)
3698 *root_plt
= &local_iplt
->root
;
3699 *arm_plt
= &local_iplt
->arm
;
3703 static bfd_boolean
using_thumb_only (struct elf32_arm_link_hash_table
*globals
);
3705 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3709 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3710 struct arm_plt_info
*arm_plt
)
3712 struct elf32_arm_link_hash_table
*htab
;
3714 htab
= elf32_arm_hash_table (info
);
3716 return (!using_thumb_only(htab
) && (arm_plt
->thumb_refcount
!= 0
3717 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0)));
3720 /* Return a pointer to the head of the dynamic reloc list that should
3721 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3722 ABFD's symbol table. Return null if an error occurs. */
3724 static struct elf_dyn_relocs
**
3725 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3726 Elf_Internal_Sym
*isym
)
3728 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3730 struct arm_local_iplt_info
*local_iplt
;
3732 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3733 if (local_iplt
== NULL
)
3735 return &local_iplt
->dyn_relocs
;
3739 /* Track dynamic relocs needed for local syms too.
3740 We really need local syms available to do this
3745 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3749 vpp
= &elf_section_data (s
)->local_dynrel
;
3750 return (struct elf_dyn_relocs
**) vpp
;
3754 /* Initialize an entry in the stub hash table. */
3756 static struct bfd_hash_entry
*
3757 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3758 struct bfd_hash_table
*table
,
3761 /* Allocate the structure if it has not already been allocated by a
3765 entry
= (struct bfd_hash_entry
*)
3766 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3771 /* Call the allocation method of the superclass. */
3772 entry
= bfd_hash_newfunc (entry
, table
, string
);
3775 struct elf32_arm_stub_hash_entry
*eh
;
3777 /* Initialize the local fields. */
3778 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3779 eh
->stub_sec
= NULL
;
3780 eh
->stub_offset
= (bfd_vma
) -1;
3781 eh
->source_value
= 0;
3782 eh
->target_value
= 0;
3783 eh
->target_section
= NULL
;
3785 eh
->stub_type
= arm_stub_none
;
3787 eh
->stub_template
= NULL
;
3788 eh
->stub_template_size
= -1;
3791 eh
->output_name
= NULL
;
3797 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3798 shortcuts to them in our hash table. */
3801 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3803 struct elf32_arm_link_hash_table
*htab
;
3805 htab
= elf32_arm_hash_table (info
);
3809 /* BPABI objects never have a GOT, or associated sections. */
3810 if (htab
->symbian_p
)
3813 if (! _bfd_elf_create_got_section (dynobj
, info
))
3816 /* Also create .rofixup. */
3819 htab
->srofixup
= bfd_make_section_with_flags (dynobj
, ".rofixup",
3820 (SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
3821 | SEC_IN_MEMORY
| SEC_LINKER_CREATED
| SEC_READONLY
));
3822 if (htab
->srofixup
== NULL
3823 || !bfd_set_section_alignment (htab
->srofixup
, 2))
3830 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3833 create_ifunc_sections (struct bfd_link_info
*info
)
3835 struct elf32_arm_link_hash_table
*htab
;
3836 const struct elf_backend_data
*bed
;
3841 htab
= elf32_arm_hash_table (info
);
3842 dynobj
= htab
->root
.dynobj
;
3843 bed
= get_elf_backend_data (dynobj
);
3844 flags
= bed
->dynamic_sec_flags
;
3846 if (htab
->root
.iplt
== NULL
)
3848 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3849 flags
| SEC_READONLY
| SEC_CODE
);
3851 || !bfd_set_section_alignment (s
, bed
->plt_alignment
))
3853 htab
->root
.iplt
= s
;
3856 if (htab
->root
.irelplt
== NULL
)
3858 s
= bfd_make_section_anyway_with_flags (dynobj
,
3859 RELOC_SECTION (htab
, ".iplt"),
3860 flags
| SEC_READONLY
);
3862 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3864 htab
->root
.irelplt
= s
;
3867 if (htab
->root
.igotplt
== NULL
)
3869 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3871 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3873 htab
->root
.igotplt
= s
;
3878 /* Determine if we're dealing with a Thumb only architecture. */
3881 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3884 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3885 Tag_CPU_arch_profile
);
3888 return profile
== 'M';
3890 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3892 /* Force return logic to be reviewed for each new architecture. */
3893 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3895 if (arch
== TAG_CPU_ARCH_V6_M
3896 || arch
== TAG_CPU_ARCH_V6S_M
3897 || arch
== TAG_CPU_ARCH_V7E_M
3898 || arch
== TAG_CPU_ARCH_V8M_BASE
3899 || arch
== TAG_CPU_ARCH_V8M_MAIN
3900 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
)
3906 /* Determine if we're dealing with a Thumb-2 object. */
3909 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3912 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3916 return thumb_isa
== 2;
3918 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3920 /* Force return logic to be reviewed for each new architecture. */
3921 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3923 return (arch
== TAG_CPU_ARCH_V6T2
3924 || arch
== TAG_CPU_ARCH_V7
3925 || arch
== TAG_CPU_ARCH_V7E_M
3926 || arch
== TAG_CPU_ARCH_V8
3927 || arch
== TAG_CPU_ARCH_V8R
3928 || arch
== TAG_CPU_ARCH_V8M_MAIN
3929 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
);
3932 /* Determine whether Thumb-2 BL instruction is available. */
3935 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3938 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3940 /* Force return logic to be reviewed for each new architecture. */
3941 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3943 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3944 return (arch
== TAG_CPU_ARCH_V6T2
3945 || arch
>= TAG_CPU_ARCH_V7
);
3948 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3949 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3953 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3955 struct elf32_arm_link_hash_table
*htab
;
3957 htab
= elf32_arm_hash_table (info
);
3961 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3964 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3967 if (htab
->vxworks_p
)
3969 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3972 if (bfd_link_pic (info
))
3974 htab
->plt_header_size
= 0;
3975 htab
->plt_entry_size
3976 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3980 htab
->plt_header_size
3981 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3982 htab
->plt_entry_size
3983 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3986 if (elf_elfheader (dynobj
))
3987 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3992 Test for thumb only architectures. Note - we cannot just call
3993 using_thumb_only() as the attributes in the output bfd have not been
3994 initialised at this point, so instead we use the input bfd. */
3995 bfd
* saved_obfd
= htab
->obfd
;
3997 htab
->obfd
= dynobj
;
3998 if (using_thumb_only (htab
))
4000 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
4001 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
4003 htab
->obfd
= saved_obfd
;
4006 if (htab
->fdpic_p
) {
4007 htab
->plt_header_size
= 0;
4008 if (info
->flags
& DF_BIND_NOW
)
4009 htab
->plt_entry_size
= 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry
) - 5);
4011 htab
->plt_entry_size
= 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
);
4014 if (!htab
->root
.splt
4015 || !htab
->root
.srelplt
4016 || !htab
->root
.sdynbss
4017 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
4023 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4026 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
4027 struct elf_link_hash_entry
*dir
,
4028 struct elf_link_hash_entry
*ind
)
4030 struct elf32_arm_link_hash_entry
*edir
, *eind
;
4032 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
4033 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
4035 if (eind
->dyn_relocs
!= NULL
)
4037 if (edir
->dyn_relocs
!= NULL
)
4039 struct elf_dyn_relocs
**pp
;
4040 struct elf_dyn_relocs
*p
;
4042 /* Add reloc counts against the indirect sym to the direct sym
4043 list. Merge any entries against the same section. */
4044 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
4046 struct elf_dyn_relocs
*q
;
4048 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
4049 if (q
->sec
== p
->sec
)
4051 q
->pc_count
+= p
->pc_count
;
4052 q
->count
+= p
->count
;
4059 *pp
= edir
->dyn_relocs
;
4062 edir
->dyn_relocs
= eind
->dyn_relocs
;
4063 eind
->dyn_relocs
= NULL
;
4066 if (ind
->root
.type
== bfd_link_hash_indirect
)
4068 /* Copy over PLT info. */
4069 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
4070 eind
->plt
.thumb_refcount
= 0;
4071 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
4072 eind
->plt
.maybe_thumb_refcount
= 0;
4073 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
4074 eind
->plt
.noncall_refcount
= 0;
4076 /* Copy FDPIC counters. */
4077 edir
->fdpic_cnts
.gotofffuncdesc_cnt
+= eind
->fdpic_cnts
.gotofffuncdesc_cnt
;
4078 edir
->fdpic_cnts
.gotfuncdesc_cnt
+= eind
->fdpic_cnts
.gotfuncdesc_cnt
;
4079 edir
->fdpic_cnts
.funcdesc_cnt
+= eind
->fdpic_cnts
.funcdesc_cnt
;
4081 /* We should only allocate a function to .iplt once the final
4082 symbol information is known. */
4083 BFD_ASSERT (!eind
->is_iplt
);
4085 if (dir
->got
.refcount
<= 0)
4087 edir
->tls_type
= eind
->tls_type
;
4088 eind
->tls_type
= GOT_UNKNOWN
;
4092 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
4095 /* Destroy an ARM elf linker hash table. */
4098 elf32_arm_link_hash_table_free (bfd
*obfd
)
4100 struct elf32_arm_link_hash_table
*ret
4101 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
4103 bfd_hash_table_free (&ret
->stub_hash_table
);
4104 _bfd_elf_link_hash_table_free (obfd
);
4107 /* Create an ARM elf linker hash table. */
4109 static struct bfd_link_hash_table
*
4110 elf32_arm_link_hash_table_create (bfd
*abfd
)
4112 struct elf32_arm_link_hash_table
*ret
;
4113 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
4115 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
4119 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
4120 elf32_arm_link_hash_newfunc
,
4121 sizeof (struct elf32_arm_link_hash_entry
),
4128 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
4129 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
4130 #ifdef FOUR_WORD_PLT
4131 ret
->plt_header_size
= 16;
4132 ret
->plt_entry_size
= 16;
4134 ret
->plt_header_size
= 20;
4135 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
4137 ret
->use_rel
= TRUE
;
4141 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
4142 sizeof (struct elf32_arm_stub_hash_entry
)))
4144 _bfd_elf_link_hash_table_free (abfd
);
4147 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
4149 return &ret
->root
.root
;
4152 /* Determine what kind of NOPs are available. */
4155 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
4157 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
4160 /* Force return logic to be reviewed for each new architecture. */
4161 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
4163 return (arch
== TAG_CPU_ARCH_V6T2
4164 || arch
== TAG_CPU_ARCH_V6K
4165 || arch
== TAG_CPU_ARCH_V7
4166 || arch
== TAG_CPU_ARCH_V8
4167 || arch
== TAG_CPU_ARCH_V8R
);
4171 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
4175 case arm_stub_long_branch_thumb_only
:
4176 case arm_stub_long_branch_thumb2_only
:
4177 case arm_stub_long_branch_thumb2_only_pure
:
4178 case arm_stub_long_branch_v4t_thumb_arm
:
4179 case arm_stub_short_branch_v4t_thumb_arm
:
4180 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4181 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4182 case arm_stub_long_branch_thumb_only_pic
:
4183 case arm_stub_cmse_branch_thumb_only
:
4194 /* Determine the type of stub needed, if any, for a call. */
4196 static enum elf32_arm_stub_type
4197 arm_type_of_stub (struct bfd_link_info
*info
,
4198 asection
*input_sec
,
4199 const Elf_Internal_Rela
*rel
,
4200 unsigned char st_type
,
4201 enum arm_st_branch_type
*actual_branch_type
,
4202 struct elf32_arm_link_hash_entry
*hash
,
4203 bfd_vma destination
,
4209 bfd_signed_vma branch_offset
;
4210 unsigned int r_type
;
4211 struct elf32_arm_link_hash_table
* globals
;
4212 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
4213 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4215 enum arm_st_branch_type branch_type
= *actual_branch_type
;
4216 union gotplt_union
*root_plt
;
4217 struct arm_plt_info
*arm_plt
;
4221 if (branch_type
== ST_BRANCH_LONG
)
4224 globals
= elf32_arm_hash_table (info
);
4225 if (globals
== NULL
)
4228 thumb_only
= using_thumb_only (globals
);
4229 thumb2
= using_thumb2 (globals
);
4230 thumb2_bl
= using_thumb2_bl (globals
);
4232 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
4234 /* True for architectures that implement the thumb2 movw instruction. */
4235 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
4237 /* Determine where the call point is. */
4238 location
= (input_sec
->output_offset
4239 + input_sec
->output_section
->vma
4242 r_type
= ELF32_R_TYPE (rel
->r_info
);
4244 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4245 are considering a function call relocation. */
4246 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4247 || r_type
== R_ARM_THM_JUMP19
)
4248 && branch_type
== ST_BRANCH_TO_ARM
)
4249 branch_type
= ST_BRANCH_TO_THUMB
;
4251 /* For TLS call relocs, it is the caller's responsibility to provide
4252 the address of the appropriate trampoline. */
4253 if (r_type
!= R_ARM_TLS_CALL
4254 && r_type
!= R_ARM_THM_TLS_CALL
4255 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
4256 ELF32_R_SYM (rel
->r_info
), &root_plt
,
4258 && root_plt
->offset
!= (bfd_vma
) -1)
4262 if (hash
== NULL
|| hash
->is_iplt
)
4263 splt
= globals
->root
.iplt
;
4265 splt
= globals
->root
.splt
;
4270 /* Note when dealing with PLT entries: the main PLT stub is in
4271 ARM mode, so if the branch is in Thumb mode, another
4272 Thumb->ARM stub will be inserted later just before the ARM
4273 PLT stub. If a long branch stub is needed, we'll add a
4274 Thumb->Arm one and branch directly to the ARM PLT entry.
4275 Here, we have to check if a pre-PLT Thumb->ARM stub
4276 is needed and if it will be close enough. */
4278 destination
= (splt
->output_section
->vma
4279 + splt
->output_offset
4280 + root_plt
->offset
);
4283 /* Thumb branch/call to PLT: it can become a branch to ARM
4284 or to Thumb. We must perform the same checks and
4285 corrections as in elf32_arm_final_link_relocate. */
4286 if ((r_type
== R_ARM_THM_CALL
)
4287 || (r_type
== R_ARM_THM_JUMP24
))
4289 if (globals
->use_blx
4290 && r_type
== R_ARM_THM_CALL
4293 /* If the Thumb BLX instruction is available, convert
4294 the BL to a BLX instruction to call the ARM-mode
4296 branch_type
= ST_BRANCH_TO_ARM
;
4301 /* Target the Thumb stub before the ARM PLT entry. */
4302 destination
-= PLT_THUMB_STUB_SIZE
;
4303 branch_type
= ST_BRANCH_TO_THUMB
;
4308 branch_type
= ST_BRANCH_TO_ARM
;
4312 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4313 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
4315 branch_offset
= (bfd_signed_vma
)(destination
- location
);
4317 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4318 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
4320 /* Handle cases where:
4321 - this call goes too far (different Thumb/Thumb2 max
4323 - it's a Thumb->Arm call and blx is not available, or it's a
4324 Thumb->Arm branch (not bl). A stub is needed in this case,
4325 but only if this call is not through a PLT entry. Indeed,
4326 PLT stubs handle mode switching already. */
4328 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4329 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4331 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4332 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4334 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4335 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4336 && (r_type
== R_ARM_THM_JUMP19
))
4337 || (branch_type
== ST_BRANCH_TO_ARM
4338 && (((r_type
== R_ARM_THM_CALL
4339 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4340 || (r_type
== R_ARM_THM_JUMP24
)
4341 || (r_type
== R_ARM_THM_JUMP19
))
4344 /* If we need to insert a Thumb-Thumb long branch stub to a
4345 PLT, use one that branches directly to the ARM PLT
4346 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4347 stub, undo this now. */
4348 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4350 branch_type
= ST_BRANCH_TO_ARM
;
4351 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4354 if (branch_type
== ST_BRANCH_TO_THUMB
)
4356 /* Thumb to thumb. */
4359 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4361 (_("%pB(%pA): warning: long branch veneers used in"
4362 " section with SHF_ARM_PURECODE section"
4363 " attribute is only supported for M-profile"
4364 " targets that implement the movw instruction"),
4365 input_bfd
, input_sec
);
4367 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4369 ? ((globals
->use_blx
4370 && (r_type
== R_ARM_THM_CALL
))
4371 /* V5T and above. Stub starts with ARM code, so
4372 we must be able to switch mode before
4373 reaching it, which is only possible for 'bl'
4374 (ie R_ARM_THM_CALL relocation). */
4375 ? arm_stub_long_branch_any_thumb_pic
4376 /* On V4T, use Thumb code only. */
4377 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4379 /* non-PIC stubs. */
4380 : ((globals
->use_blx
4381 && (r_type
== R_ARM_THM_CALL
))
4382 /* V5T and above. */
4383 ? arm_stub_long_branch_any_any
4385 : arm_stub_long_branch_v4t_thumb_thumb
);
4389 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4390 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4393 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4395 (_("%pB(%pA): warning: long branch veneers used in"
4396 " section with SHF_ARM_PURECODE section"
4397 " attribute is only supported for M-profile"
4398 " targets that implement the movw instruction"),
4399 input_bfd
, input_sec
);
4401 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4403 ? arm_stub_long_branch_thumb_only_pic
4405 : (thumb2
? arm_stub_long_branch_thumb2_only
4406 : arm_stub_long_branch_thumb_only
);
4412 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4414 (_("%pB(%pA): warning: long branch veneers used in"
4415 " section with SHF_ARM_PURECODE section"
4416 " attribute is only supported" " for M-profile"
4417 " targets that implement the movw instruction"),
4418 input_bfd
, input_sec
);
4422 && sym_sec
->owner
!= NULL
4423 && !INTERWORK_FLAG (sym_sec
->owner
))
4426 (_("%pB(%s): warning: interworking not enabled;"
4427 " first occurrence: %pB: %s call to %s"),
4428 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4432 (bfd_link_pic (info
) | globals
->pic_veneer
)
4434 ? (r_type
== R_ARM_THM_TLS_CALL
4435 /* TLS PIC stubs. */
4436 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4437 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4438 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4439 /* V5T PIC and above. */
4440 ? arm_stub_long_branch_any_arm_pic
4442 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4444 /* non-PIC stubs. */
4445 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4446 /* V5T and above. */
4447 ? arm_stub_long_branch_any_any
4449 : arm_stub_long_branch_v4t_thumb_arm
);
4451 /* Handle v4t short branches. */
4452 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4453 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4454 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4455 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4459 else if (r_type
== R_ARM_CALL
4460 || r_type
== R_ARM_JUMP24
4461 || r_type
== R_ARM_PLT32
4462 || r_type
== R_ARM_TLS_CALL
)
4464 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4466 (_("%pB(%pA): warning: long branch veneers used in"
4467 " section with SHF_ARM_PURECODE section"
4468 " attribute is only supported for M-profile"
4469 " targets that implement the movw instruction"),
4470 input_bfd
, input_sec
);
4471 if (branch_type
== ST_BRANCH_TO_THUMB
)
4476 && sym_sec
->owner
!= NULL
4477 && !INTERWORK_FLAG (sym_sec
->owner
))
4480 (_("%pB(%s): warning: interworking not enabled;"
4481 " first occurrence: %pB: %s call to %s"),
4482 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4485 /* We have an extra 2-bytes reach because of
4486 the mode change (bit 24 (H) of BLX encoding). */
4487 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4488 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4489 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4490 || (r_type
== R_ARM_JUMP24
)
4491 || (r_type
== R_ARM_PLT32
))
4493 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4495 ? ((globals
->use_blx
)
4496 /* V5T and above. */
4497 ? arm_stub_long_branch_any_thumb_pic
4499 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4501 /* non-PIC stubs. */
4502 : ((globals
->use_blx
)
4503 /* V5T and above. */
4504 ? arm_stub_long_branch_any_any
4506 : arm_stub_long_branch_v4t_arm_thumb
);
4512 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4513 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4516 (bfd_link_pic (info
) | globals
->pic_veneer
)
4518 ? (r_type
== R_ARM_TLS_CALL
4520 ? arm_stub_long_branch_any_tls_pic
4522 ? arm_stub_long_branch_arm_nacl_pic
4523 : arm_stub_long_branch_any_arm_pic
))
4524 /* non-PIC stubs. */
4526 ? arm_stub_long_branch_arm_nacl
4527 : arm_stub_long_branch_any_any
);
4532 /* If a stub is needed, record the actual destination type. */
4533 if (stub_type
!= arm_stub_none
)
4534 *actual_branch_type
= branch_type
;
4539 /* Build a name for an entry in the stub hash table. */
4542 elf32_arm_stub_name (const asection
*input_section
,
4543 const asection
*sym_sec
,
4544 const struct elf32_arm_link_hash_entry
*hash
,
4545 const Elf_Internal_Rela
*rel
,
4546 enum elf32_arm_stub_type stub_type
)
4553 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4554 stub_name
= (char *) bfd_malloc (len
);
4555 if (stub_name
!= NULL
)
4556 sprintf (stub_name
, "%08x_%s+%x_%d",
4557 input_section
->id
& 0xffffffff,
4558 hash
->root
.root
.root
.string
,
4559 (int) rel
->r_addend
& 0xffffffff,
4564 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4565 stub_name
= (char *) bfd_malloc (len
);
4566 if (stub_name
!= NULL
)
4567 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4568 input_section
->id
& 0xffffffff,
4569 sym_sec
->id
& 0xffffffff,
4570 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4571 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4572 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4573 (int) rel
->r_addend
& 0xffffffff,
4580 /* Look up an entry in the stub hash. Stub entries are cached because
4581 creating the stub name takes a bit of time. */
4583 static struct elf32_arm_stub_hash_entry
*
4584 elf32_arm_get_stub_entry (const asection
*input_section
,
4585 const asection
*sym_sec
,
4586 struct elf_link_hash_entry
*hash
,
4587 const Elf_Internal_Rela
*rel
,
4588 struct elf32_arm_link_hash_table
*htab
,
4589 enum elf32_arm_stub_type stub_type
)
4591 struct elf32_arm_stub_hash_entry
*stub_entry
;
4592 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4593 const asection
*id_sec
;
4595 if ((input_section
->flags
& SEC_CODE
) == 0)
4598 /* If the input section is the CMSE stubs one and it needs a long
4599 branch stub to reach it's final destination, give up with an
4600 error message: this is not supported. See PR ld/24709. */
4601 if (!strncmp (input_section
->name
, CMSE_STUB_NAME
, strlen(CMSE_STUB_NAME
)))
4603 bfd
*output_bfd
= htab
->obfd
;
4604 asection
*out_sec
= bfd_get_section_by_name (output_bfd
, CMSE_STUB_NAME
);
4606 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4607 "(%#" PRIx64
") from destination (%#" PRIx64
")"),
4609 (uint64_t)out_sec
->output_section
->vma
4610 + out_sec
->output_offset
,
4611 (uint64_t)sym_sec
->output_section
->vma
4612 + sym_sec
->output_offset
4613 + h
->root
.root
.u
.def
.value
);
4614 /* Exit, rather than leave incompletely processed
4619 /* If this input section is part of a group of sections sharing one
4620 stub section, then use the id of the first section in the group.
4621 Stub names need to include a section id, as there may well be
4622 more than one stub used to reach say, printf, and we need to
4623 distinguish between them. */
4624 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4625 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4627 if (h
!= NULL
&& h
->stub_cache
!= NULL
4628 && h
->stub_cache
->h
== h
4629 && h
->stub_cache
->id_sec
== id_sec
4630 && h
->stub_cache
->stub_type
== stub_type
)
4632 stub_entry
= h
->stub_cache
;
4638 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4639 if (stub_name
== NULL
)
4642 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4643 stub_name
, FALSE
, FALSE
);
4645 h
->stub_cache
= stub_entry
;
4653 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4657 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4659 if (stub_type
>= max_stub_type
)
4660 abort (); /* Should be unreachable. */
4664 case arm_stub_cmse_branch_thumb_only
:
4671 abort (); /* Should be unreachable. */
4674 /* Required alignment (as a power of 2) for the dedicated section holding
4675 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4676 with input sections. */
4679 arm_dedicated_stub_output_section_required_alignment
4680 (enum elf32_arm_stub_type stub_type
)
4682 if (stub_type
>= max_stub_type
)
4683 abort (); /* Should be unreachable. */
4687 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4689 case arm_stub_cmse_branch_thumb_only
:
4693 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4697 abort (); /* Should be unreachable. */
4700 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4701 NULL if veneers of this type are interspersed with input sections. */
4704 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4706 if (stub_type
>= max_stub_type
)
4707 abort (); /* Should be unreachable. */
4711 case arm_stub_cmse_branch_thumb_only
:
4712 return CMSE_STUB_NAME
;
4715 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4719 abort (); /* Should be unreachable. */
4722 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4723 returns the address of the hash table field in HTAB holding a pointer to the
4724 corresponding input section. Otherwise, returns NULL. */
4727 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4728 enum elf32_arm_stub_type stub_type
)
4730 if (stub_type
>= max_stub_type
)
4731 abort (); /* Should be unreachable. */
4735 case arm_stub_cmse_branch_thumb_only
:
4736 return &htab
->cmse_stub_sec
;
4739 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4743 abort (); /* Should be unreachable. */
4746 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4747 is the section that branch into veneer and can be NULL if stub should go in
4748 a dedicated output section. Returns a pointer to the stub section, and the
4749 section to which the stub section will be attached (in *LINK_SEC_P).
4750 LINK_SEC_P may be NULL. */
4753 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4754 struct elf32_arm_link_hash_table
*htab
,
4755 enum elf32_arm_stub_type stub_type
)
4757 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4758 const char *stub_sec_prefix
;
4759 bfd_boolean dedicated_output_section
=
4760 arm_dedicated_stub_output_section_required (stub_type
);
4763 if (dedicated_output_section
)
4765 bfd
*output_bfd
= htab
->obfd
;
4766 const char *out_sec_name
=
4767 arm_dedicated_stub_output_section_name (stub_type
);
4769 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4770 stub_sec_prefix
= out_sec_name
;
4771 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4772 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4773 if (out_sec
== NULL
)
4775 _bfd_error_handler (_("no address assigned to the veneers output "
4776 "section %s"), out_sec_name
);
4782 BFD_ASSERT (section
->id
<= htab
->top_id
);
4783 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4784 BFD_ASSERT (link_sec
!= NULL
);
4785 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4786 if (*stub_sec_p
== NULL
)
4787 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4788 stub_sec_prefix
= link_sec
->name
;
4789 out_sec
= link_sec
->output_section
;
4790 align
= htab
->nacl_p
? 4 : 3;
4793 if (*stub_sec_p
== NULL
)
4799 namelen
= strlen (stub_sec_prefix
);
4800 len
= namelen
+ sizeof (STUB_SUFFIX
);
4801 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4805 memcpy (s_name
, stub_sec_prefix
, namelen
);
4806 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4807 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4809 if (*stub_sec_p
== NULL
)
4812 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4813 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4817 if (!dedicated_output_section
)
4818 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4821 *link_sec_p
= link_sec
;
4826 /* Add a new stub entry to the stub hash. Not all fields of the new
4827 stub entry are initialised. */
4829 static struct elf32_arm_stub_hash_entry
*
4830 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4831 struct elf32_arm_link_hash_table
*htab
,
4832 enum elf32_arm_stub_type stub_type
)
4836 struct elf32_arm_stub_hash_entry
*stub_entry
;
4838 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4840 if (stub_sec
== NULL
)
4843 /* Enter this entry into the linker stub hash table. */
4844 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4846 if (stub_entry
== NULL
)
4848 if (section
== NULL
)
4850 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4851 section
->owner
, stub_name
);
4855 stub_entry
->stub_sec
= stub_sec
;
4856 stub_entry
->stub_offset
= (bfd_vma
) -1;
4857 stub_entry
->id_sec
= link_sec
;
4862 /* Store an Arm insn into an output section not processed by
4863 elf32_arm_write_section. */
4866 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4867 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4869 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4870 bfd_putl32 (val
, ptr
);
4872 bfd_putb32 (val
, ptr
);
4875 /* Store a 16-bit Thumb insn into an output section not processed by
4876 elf32_arm_write_section. */
4879 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4880 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4882 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4883 bfd_putl16 (val
, ptr
);
4885 bfd_putb16 (val
, ptr
);
4888 /* Store a Thumb2 insn into an output section not processed by
4889 elf32_arm_write_section. */
4892 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4893 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4895 /* T2 instructions are 16-bit streamed. */
4896 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4898 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4899 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4903 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4904 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4908 /* If it's possible to change R_TYPE to a more efficient access
4909 model, return the new reloc type. */
4912 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4913 struct elf_link_hash_entry
*h
)
4915 int is_local
= (h
== NULL
);
4917 if (bfd_link_dll (info
)
4918 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4921 /* We do not support relaxations for Old TLS models. */
4924 case R_ARM_TLS_GOTDESC
:
4925 case R_ARM_TLS_CALL
:
4926 case R_ARM_THM_TLS_CALL
:
4927 case R_ARM_TLS_DESCSEQ
:
4928 case R_ARM_THM_TLS_DESCSEQ
:
4929 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4935 static bfd_reloc_status_type elf32_arm_final_link_relocate
4936 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4937 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4938 const char *, unsigned char, enum arm_st_branch_type
,
4939 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4942 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4946 case arm_stub_a8_veneer_b_cond
:
4947 case arm_stub_a8_veneer_b
:
4948 case arm_stub_a8_veneer_bl
:
4951 case arm_stub_long_branch_any_any
:
4952 case arm_stub_long_branch_v4t_arm_thumb
:
4953 case arm_stub_long_branch_thumb_only
:
4954 case arm_stub_long_branch_thumb2_only
:
4955 case arm_stub_long_branch_thumb2_only_pure
:
4956 case arm_stub_long_branch_v4t_thumb_thumb
:
4957 case arm_stub_long_branch_v4t_thumb_arm
:
4958 case arm_stub_short_branch_v4t_thumb_arm
:
4959 case arm_stub_long_branch_any_arm_pic
:
4960 case arm_stub_long_branch_any_thumb_pic
:
4961 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4962 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4963 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4964 case arm_stub_long_branch_thumb_only_pic
:
4965 case arm_stub_long_branch_any_tls_pic
:
4966 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4967 case arm_stub_cmse_branch_thumb_only
:
4968 case arm_stub_a8_veneer_blx
:
4971 case arm_stub_long_branch_arm_nacl
:
4972 case arm_stub_long_branch_arm_nacl_pic
:
4976 abort (); /* Should be unreachable. */
4980 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4981 veneering (TRUE) or have their own symbol (FALSE). */
4984 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4986 if (stub_type
>= max_stub_type
)
4987 abort (); /* Should be unreachable. */
4991 case arm_stub_cmse_branch_thumb_only
:
4998 abort (); /* Should be unreachable. */
5001 /* Returns the padding needed for the dedicated section used stubs of type
5005 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
5007 if (stub_type
>= max_stub_type
)
5008 abort (); /* Should be unreachable. */
5012 case arm_stub_cmse_branch_thumb_only
:
5019 abort (); /* Should be unreachable. */
5022 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5023 returns the address of the hash table field in HTAB holding the offset at
5024 which new veneers should be layed out in the stub section. */
5027 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
5028 enum elf32_arm_stub_type stub_type
)
5032 case arm_stub_cmse_branch_thumb_only
:
5033 return &htab
->new_cmse_stub_offset
;
5036 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
5042 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
5046 bfd_boolean removed_sg_veneer
;
5047 struct elf32_arm_stub_hash_entry
*stub_entry
;
5048 struct elf32_arm_link_hash_table
*globals
;
5049 struct bfd_link_info
*info
;
5056 const insn_sequence
*template_sequence
;
5058 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
5059 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
5061 int just_allocated
= 0;
5063 /* Massage our args to the form they really have. */
5064 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5065 info
= (struct bfd_link_info
*) in_arg
;
5067 globals
= elf32_arm_hash_table (info
);
5068 if (globals
== NULL
)
5071 stub_sec
= stub_entry
->stub_sec
;
5073 if ((globals
->fix_cortex_a8
< 0)
5074 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
5075 /* We have to do less-strictly-aligned fixes last. */
5078 /* Assign a slot at the end of section if none assigned yet. */
5079 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5081 stub_entry
->stub_offset
= stub_sec
->size
;
5084 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
5086 stub_bfd
= stub_sec
->owner
;
5088 /* This is the address of the stub destination. */
5089 sym_value
= (stub_entry
->target_value
5090 + stub_entry
->target_section
->output_offset
5091 + stub_entry
->target_section
->output_section
->vma
);
5093 template_sequence
= stub_entry
->stub_template
;
5094 template_size
= stub_entry
->stub_template_size
;
5097 for (i
= 0; i
< template_size
; i
++)
5099 switch (template_sequence
[i
].type
)
5103 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
5104 if (template_sequence
[i
].reloc_addend
!= 0)
5106 /* We've borrowed the reloc_addend field to mean we should
5107 insert a condition code into this (Thumb-1 branch)
5108 instruction. See THUMB16_BCOND_INSN. */
5109 BFD_ASSERT ((data
& 0xff00) == 0xd000);
5110 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
5112 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
5118 bfd_put_16 (stub_bfd
,
5119 (template_sequence
[i
].data
>> 16) & 0xffff,
5121 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
5123 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
5125 stub_reloc_idx
[nrelocs
] = i
;
5126 stub_reloc_offset
[nrelocs
++] = size
;
5132 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
5134 /* Handle cases where the target is encoded within the
5136 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
5138 stub_reloc_idx
[nrelocs
] = i
;
5139 stub_reloc_offset
[nrelocs
++] = size
;
5145 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
5146 stub_reloc_idx
[nrelocs
] = i
;
5147 stub_reloc_offset
[nrelocs
++] = size
;
5158 stub_sec
->size
+= size
;
5160 /* Stub size has already been computed in arm_size_one_stub. Check
5162 BFD_ASSERT (size
== stub_entry
->stub_size
);
5164 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5165 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
5168 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5169 to relocate in each stub. */
5171 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
5172 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
5174 for (i
= 0; i
< nrelocs
; i
++)
5176 Elf_Internal_Rela rel
;
5177 bfd_boolean unresolved_reloc
;
5178 char *error_message
;
5180 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
5182 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
5183 rel
.r_info
= ELF32_R_INFO (0,
5184 template_sequence
[stub_reloc_idx
[i
]].r_type
);
5187 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
5188 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5189 template should refer back to the instruction after the original
5190 branch. We use target_section as Cortex-A8 erratum workaround stubs
5191 are only generated when both source and target are in the same
5193 points_to
= stub_entry
->target_section
->output_section
->vma
5194 + stub_entry
->target_section
->output_offset
5195 + stub_entry
->source_value
;
5197 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5198 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
5199 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
5200 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
5201 stub_entry
->branch_type
,
5202 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
5210 /* Calculate the template, template size and instruction size for a stub.
5211 Return value is the instruction size. */
5214 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
5215 const insn_sequence
**stub_template
,
5216 int *stub_template_size
)
5218 const insn_sequence
*template_sequence
= NULL
;
5219 int template_size
= 0, i
;
5222 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
5224 *stub_template
= template_sequence
;
5226 template_size
= stub_definitions
[stub_type
].template_size
;
5227 if (stub_template_size
)
5228 *stub_template_size
= template_size
;
5231 for (i
= 0; i
< template_size
; i
++)
5233 switch (template_sequence
[i
].type
)
5254 /* As above, but don't actually build the stub. Just bump offset so
5255 we know stub section sizes. */
5258 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
5259 void *in_arg ATTRIBUTE_UNUSED
)
5261 struct elf32_arm_stub_hash_entry
*stub_entry
;
5262 const insn_sequence
*template_sequence
;
5263 int template_size
, size
;
5265 /* Massage our args to the form they really have. */
5266 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5268 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
5269 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
5271 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
5274 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5275 if (stub_entry
->stub_template_size
)
5277 stub_entry
->stub_size
= size
;
5278 stub_entry
->stub_template
= template_sequence
;
5279 stub_entry
->stub_template_size
= template_size
;
5282 /* Already accounted for. */
5283 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
5286 size
= (size
+ 7) & ~7;
5287 stub_entry
->stub_sec
->size
+= size
;
5292 /* External entry points for sizing and building linker stubs. */
5294 /* Set up various things so that we can make a list of input sections
5295 for each output section included in the link. Returns -1 on error,
5296 0 when no stubs will be needed, and 1 on success. */
5299 elf32_arm_setup_section_lists (bfd
*output_bfd
,
5300 struct bfd_link_info
*info
)
5303 unsigned int bfd_count
;
5304 unsigned int top_id
, top_index
;
5306 asection
**input_list
, **list
;
5308 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5312 if (! is_elf_hash_table (htab
))
5315 /* Count the number of input BFDs and find the top input section id. */
5316 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
5318 input_bfd
= input_bfd
->link
.next
)
5321 for (section
= input_bfd
->sections
;
5323 section
= section
->next
)
5325 if (top_id
< section
->id
)
5326 top_id
= section
->id
;
5329 htab
->bfd_count
= bfd_count
;
5331 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
5332 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
5333 if (htab
->stub_group
== NULL
)
5335 htab
->top_id
= top_id
;
5337 /* We can't use output_bfd->section_count here to find the top output
5338 section index as some sections may have been removed, and
5339 _bfd_strip_section_from_output doesn't renumber the indices. */
5340 for (section
= output_bfd
->sections
, top_index
= 0;
5342 section
= section
->next
)
5344 if (top_index
< section
->index
)
5345 top_index
= section
->index
;
5348 htab
->top_index
= top_index
;
5349 amt
= sizeof (asection
*) * (top_index
+ 1);
5350 input_list
= (asection
**) bfd_malloc (amt
);
5351 htab
->input_list
= input_list
;
5352 if (input_list
== NULL
)
5355 /* For sections we aren't interested in, mark their entries with a
5356 value we can check later. */
5357 list
= input_list
+ top_index
;
5359 *list
= bfd_abs_section_ptr
;
5360 while (list
-- != input_list
);
5362 for (section
= output_bfd
->sections
;
5364 section
= section
->next
)
5366 if ((section
->flags
& SEC_CODE
) != 0)
5367 input_list
[section
->index
] = NULL
;
5373 /* The linker repeatedly calls this function for each input section,
5374 in the order that input sections are linked into output sections.
5375 Build lists of input sections to determine groupings between which
5376 we may insert linker stubs. */
5379 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5382 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5387 if (isec
->output_section
->index
<= htab
->top_index
)
5389 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5391 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5393 /* Steal the link_sec pointer for our list. */
5394 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5395 /* This happens to make the list in reverse order,
5396 which we reverse later. */
5397 PREV_SEC (isec
) = *list
;
5403 /* See whether we can group stub sections together. Grouping stub
5404 sections may result in fewer stubs. More importantly, we need to
5405 put all .init* and .fini* stubs at the end of the .init or
5406 .fini output sections respectively, because glibc splits the
5407 _init and _fini functions into multiple parts. Putting a stub in
5408 the middle of a function is not a good idea. */
5411 group_sections (struct elf32_arm_link_hash_table
*htab
,
5412 bfd_size_type stub_group_size
,
5413 bfd_boolean stubs_always_after_branch
)
5415 asection
**list
= htab
->input_list
;
5419 asection
*tail
= *list
;
5422 if (tail
== bfd_abs_section_ptr
)
5425 /* Reverse the list: we must avoid placing stubs at the
5426 beginning of the section because the beginning of the text
5427 section may be required for an interrupt vector in bare metal
5429 #define NEXT_SEC PREV_SEC
5431 while (tail
!= NULL
)
5433 /* Pop from tail. */
5434 asection
*item
= tail
;
5435 tail
= PREV_SEC (item
);
5438 NEXT_SEC (item
) = head
;
5442 while (head
!= NULL
)
5446 bfd_vma stub_group_start
= head
->output_offset
;
5447 bfd_vma end_of_next
;
5450 while (NEXT_SEC (curr
) != NULL
)
5452 next
= NEXT_SEC (curr
);
5453 end_of_next
= next
->output_offset
+ next
->size
;
5454 if (end_of_next
- stub_group_start
>= stub_group_size
)
5455 /* End of NEXT is too far from start, so stop. */
5457 /* Add NEXT to the group. */
5461 /* OK, the size from the start to the start of CURR is less
5462 than stub_group_size and thus can be handled by one stub
5463 section. (Or the head section is itself larger than
5464 stub_group_size, in which case we may be toast.)
5465 We should really be keeping track of the total size of
5466 stubs added here, as stubs contribute to the final output
5470 next
= NEXT_SEC (head
);
5471 /* Set up this stub group. */
5472 htab
->stub_group
[head
->id
].link_sec
= curr
;
5474 while (head
!= curr
&& (head
= next
) != NULL
);
5476 /* But wait, there's more! Input sections up to stub_group_size
5477 bytes after the stub section can be handled by it too. */
5478 if (!stubs_always_after_branch
)
5480 stub_group_start
= curr
->output_offset
+ curr
->size
;
5482 while (next
!= NULL
)
5484 end_of_next
= next
->output_offset
+ next
->size
;
5485 if (end_of_next
- stub_group_start
>= stub_group_size
)
5486 /* End of NEXT is too far from stubs, so stop. */
5488 /* Add NEXT to the stub group. */
5490 next
= NEXT_SEC (head
);
5491 htab
->stub_group
[head
->id
].link_sec
= curr
;
5497 while (list
++ != htab
->input_list
+ htab
->top_index
);
5499 free (htab
->input_list
);
5504 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5508 a8_reloc_compare (const void *a
, const void *b
)
5510 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5511 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5513 if (ra
->from
< rb
->from
)
5515 else if (ra
->from
> rb
->from
)
5521 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5522 const char *, char **);
5524 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5525 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5526 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5530 cortex_a8_erratum_scan (bfd
*input_bfd
,
5531 struct bfd_link_info
*info
,
5532 struct a8_erratum_fix
**a8_fixes_p
,
5533 unsigned int *num_a8_fixes_p
,
5534 unsigned int *a8_fix_table_size_p
,
5535 struct a8_erratum_reloc
*a8_relocs
,
5536 unsigned int num_a8_relocs
,
5537 unsigned prev_num_a8_fixes
,
5538 bfd_boolean
*stub_changed_p
)
5541 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5542 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5543 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5544 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5549 for (section
= input_bfd
->sections
;
5551 section
= section
->next
)
5553 bfd_byte
*contents
= NULL
;
5554 struct _arm_elf_section_data
*sec_data
;
5558 if (elf_section_type (section
) != SHT_PROGBITS
5559 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5560 || (section
->flags
& SEC_EXCLUDE
) != 0
5561 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5562 || (section
->output_section
== bfd_abs_section_ptr
))
5565 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5567 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5568 contents
= elf_section_data (section
)->this_hdr
.contents
;
5569 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5572 sec_data
= elf32_arm_section_data (section
);
5574 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5576 unsigned int span_start
= sec_data
->map
[span
].vma
;
5577 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5578 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5580 char span_type
= sec_data
->map
[span
].type
;
5581 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5583 if (span_type
!= 't')
5586 /* Span is entirely within a single 4KB region: skip scanning. */
5587 if (((base_vma
+ span_start
) & ~0xfff)
5588 == ((base_vma
+ span_end
) & ~0xfff))
5591 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5593 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5594 * The branch target is in the same 4KB region as the
5595 first half of the branch.
5596 * The instruction before the branch is a 32-bit
5597 length non-branch instruction. */
5598 for (i
= span_start
; i
< span_end
;)
5600 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5601 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5602 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5604 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5609 /* Load the rest of the insn (in manual-friendly order). */
5610 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5612 /* Encoding T4: B<c>.W. */
5613 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5614 /* Encoding T1: BL<c>.W. */
5615 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5616 /* Encoding T2: BLX<c>.W. */
5617 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5618 /* Encoding T3: B<c>.W (not permitted in IT block). */
5619 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5620 && (insn
& 0x07f00000) != 0x03800000;
5623 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5625 if (((base_vma
+ i
) & 0xfff) == 0xffe
5629 && ! last_was_branch
)
5631 bfd_signed_vma offset
= 0;
5632 bfd_boolean force_target_arm
= FALSE
;
5633 bfd_boolean force_target_thumb
= FALSE
;
5635 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5636 struct a8_erratum_reloc key
, *found
;
5637 bfd_boolean use_plt
= FALSE
;
5639 key
.from
= base_vma
+ i
;
5640 found
= (struct a8_erratum_reloc
*)
5641 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5642 sizeof (struct a8_erratum_reloc
),
5647 char *error_message
= NULL
;
5648 struct elf_link_hash_entry
*entry
;
5650 /* We don't care about the error returned from this
5651 function, only if there is glue or not. */
5652 entry
= find_thumb_glue (info
, found
->sym_name
,
5656 found
->non_a8_stub
= TRUE
;
5658 /* Keep a simpler condition, for the sake of clarity. */
5659 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5660 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5663 if (found
->r_type
== R_ARM_THM_CALL
)
5665 if (found
->branch_type
== ST_BRANCH_TO_ARM
5667 force_target_arm
= TRUE
;
5669 force_target_thumb
= TRUE
;
5673 /* Check if we have an offending branch instruction. */
5675 if (found
&& found
->non_a8_stub
)
5676 /* We've already made a stub for this instruction, e.g.
5677 it's a long branch or a Thumb->ARM stub. Assume that
5678 stub will suffice to work around the A8 erratum (see
5679 setting of always_after_branch above). */
5683 offset
= (insn
& 0x7ff) << 1;
5684 offset
|= (insn
& 0x3f0000) >> 4;
5685 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5686 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5687 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5688 if (offset
& 0x100000)
5689 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5690 stub_type
= arm_stub_a8_veneer_b_cond
;
5692 else if (is_b
|| is_bl
|| is_blx
)
5694 int s
= (insn
& 0x4000000) != 0;
5695 int j1
= (insn
& 0x2000) != 0;
5696 int j2
= (insn
& 0x800) != 0;
5700 offset
= (insn
& 0x7ff) << 1;
5701 offset
|= (insn
& 0x3ff0000) >> 4;
5705 if (offset
& 0x1000000)
5706 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5709 offset
&= ~ ((bfd_signed_vma
) 3);
5711 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5712 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5715 if (stub_type
!= arm_stub_none
)
5717 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5719 /* The original instruction is a BL, but the target is
5720 an ARM instruction. If we were not making a stub,
5721 the BL would have been converted to a BLX. Use the
5722 BLX stub instead in that case. */
5723 if (htab
->use_blx
&& force_target_arm
5724 && stub_type
== arm_stub_a8_veneer_bl
)
5726 stub_type
= arm_stub_a8_veneer_blx
;
5730 /* Conversely, if the original instruction was
5731 BLX but the target is Thumb mode, use the BL
5733 else if (force_target_thumb
5734 && stub_type
== arm_stub_a8_veneer_blx
)
5736 stub_type
= arm_stub_a8_veneer_bl
;
5742 pc_for_insn
&= ~ ((bfd_vma
) 3);
5744 /* If we found a relocation, use the proper destination,
5745 not the offset in the (unrelocated) instruction.
5746 Note this is always done if we switched the stub type
5750 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5752 /* If the stub will use a Thumb-mode branch to a
5753 PLT target, redirect it to the preceding Thumb
5755 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5756 offset
-= PLT_THUMB_STUB_SIZE
;
5758 target
= pc_for_insn
+ offset
;
5760 /* The BLX stub is ARM-mode code. Adjust the offset to
5761 take the different PC value (+8 instead of +4) into
5763 if (stub_type
== arm_stub_a8_veneer_blx
)
5766 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5768 char *stub_name
= NULL
;
5770 if (num_a8_fixes
== a8_fix_table_size
)
5772 a8_fix_table_size
*= 2;
5773 a8_fixes
= (struct a8_erratum_fix
*)
5774 bfd_realloc (a8_fixes
,
5775 sizeof (struct a8_erratum_fix
)
5776 * a8_fix_table_size
);
5779 if (num_a8_fixes
< prev_num_a8_fixes
)
5781 /* If we're doing a subsequent scan,
5782 check if we've found the same fix as
5783 before, and try and reuse the stub
5785 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5786 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5787 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5791 *stub_changed_p
= TRUE
;
5797 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5798 if (stub_name
!= NULL
)
5799 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5802 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5803 a8_fixes
[num_a8_fixes
].section
= section
;
5804 a8_fixes
[num_a8_fixes
].offset
= i
;
5805 a8_fixes
[num_a8_fixes
].target_offset
=
5807 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5808 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5809 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5810 a8_fixes
[num_a8_fixes
].branch_type
=
5811 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5818 i
+= insn_32bit
? 4 : 2;
5819 last_was_32bit
= insn_32bit
;
5820 last_was_branch
= is_32bit_branch
;
5824 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5828 *a8_fixes_p
= a8_fixes
;
5829 *num_a8_fixes_p
= num_a8_fixes
;
5830 *a8_fix_table_size_p
= a8_fix_table_size
;
5835 /* Create or update a stub entry depending on whether the stub can already be
5836 found in HTAB. The stub is identified by:
5837 - its type STUB_TYPE
5838 - its source branch (note that several can share the same stub) whose
5839 section and relocation (if any) are given by SECTION and IRELA
5841 - its target symbol whose input section, hash, name, value and branch type
5842 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5845 If found, the value of the stub's target symbol is updated from SYM_VALUE
5846 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5847 TRUE and the stub entry is initialized.
5849 Returns the stub that was created or updated, or NULL if an error
5852 static struct elf32_arm_stub_hash_entry
*
5853 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5854 enum elf32_arm_stub_type stub_type
, asection
*section
,
5855 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5856 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5857 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5858 bfd_boolean
*new_stub
)
5860 const asection
*id_sec
;
5862 struct elf32_arm_stub_hash_entry
*stub_entry
;
5863 unsigned int r_type
;
5864 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5866 BFD_ASSERT (stub_type
!= arm_stub_none
);
5870 stub_name
= sym_name
;
5874 BFD_ASSERT (section
);
5875 BFD_ASSERT (section
->id
<= htab
->top_id
);
5877 /* Support for grouping stub sections. */
5878 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5880 /* Get the name of this stub. */
5881 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5887 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5889 /* The proper stub has already been created, just update its value. */
5890 if (stub_entry
!= NULL
)
5894 stub_entry
->target_value
= sym_value
;
5898 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5899 if (stub_entry
== NULL
)
5906 stub_entry
->target_value
= sym_value
;
5907 stub_entry
->target_section
= sym_sec
;
5908 stub_entry
->stub_type
= stub_type
;
5909 stub_entry
->h
= hash
;
5910 stub_entry
->branch_type
= branch_type
;
5913 stub_entry
->output_name
= sym_name
;
5916 if (sym_name
== NULL
)
5917 sym_name
= "unnamed";
5918 stub_entry
->output_name
= (char *)
5919 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5920 + strlen (sym_name
));
5921 if (stub_entry
->output_name
== NULL
)
5927 /* For historical reasons, use the existing names for ARM-to-Thumb and
5928 Thumb-to-ARM stubs. */
5929 r_type
= ELF32_R_TYPE (irela
->r_info
);
5930 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5931 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5932 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5933 && branch_type
== ST_BRANCH_TO_ARM
)
5934 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5935 else if ((r_type
== (unsigned int) R_ARM_CALL
5936 || r_type
== (unsigned int) R_ARM_JUMP24
)
5937 && branch_type
== ST_BRANCH_TO_THUMB
)
5938 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5940 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5947 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5948 gateway veneer to transition from non secure to secure state and create them
5951 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5952 defines the conditions that govern Secure Gateway veneer creation for a
5953 given symbol <SYM> as follows:
5954 - it has function type
5955 - it has non local binding
5956 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5957 same type, binding and value as <SYM> (called normal symbol).
5958 An entry function can handle secure state transition itself in which case
5959 its special symbol would have a different value from the normal symbol.
5961 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5962 entry mapping while HTAB gives the name to hash entry mapping.
5963 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5966 The return value gives whether a stub failed to be allocated. */
5969 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5970 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5971 int *cmse_stub_created
)
5973 const struct elf_backend_data
*bed
;
5974 Elf_Internal_Shdr
*symtab_hdr
;
5975 unsigned i
, j
, sym_count
, ext_start
;
5976 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5977 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5978 enum arm_st_branch_type branch_type
;
5979 char *sym_name
, *lsym_name
;
5982 struct elf32_arm_stub_hash_entry
*stub_entry
;
5983 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5985 bed
= get_elf_backend_data (input_bfd
);
5986 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5987 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5988 ext_start
= symtab_hdr
->sh_info
;
5989 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5990 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5992 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5993 if (local_syms
== NULL
)
5994 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5995 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5997 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
6001 for (i
= 0; i
< sym_count
; i
++)
6003 cmse_invalid
= FALSE
;
6007 cmse_sym
= &local_syms
[i
];
6008 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
6009 symtab_hdr
->sh_link
,
6011 if (!sym_name
|| !CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
6014 /* Special symbol with local binding. */
6015 cmse_invalid
= TRUE
;
6019 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
6020 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
6021 if (!CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
6024 /* Special symbol has incorrect binding or type. */
6025 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
6026 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6027 || cmse_hash
->root
.type
!= STT_FUNC
)
6028 cmse_invalid
= TRUE
;
6033 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6034 "ARMv8-M architecture or later"),
6035 input_bfd
, sym_name
);
6036 is_v8m
= TRUE
; /* Avoid multiple warning. */
6042 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6043 " a global or weak function symbol"),
6044 input_bfd
, sym_name
);
6050 sym_name
+= strlen (CMSE_PREFIX
);
6051 hash
= (struct elf32_arm_link_hash_entry
*)
6052 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6054 /* No associated normal symbol or it is neither global nor weak. */
6056 || (hash
->root
.root
.type
!= bfd_link_hash_defined
6057 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6058 || hash
->root
.type
!= STT_FUNC
)
6060 /* Initialize here to avoid warning about use of possibly
6061 uninitialized variable. */
6066 /* Searching for a normal symbol with local binding. */
6067 for (; j
< ext_start
; j
++)
6070 bfd_elf_string_from_elf_section (input_bfd
,
6071 symtab_hdr
->sh_link
,
6072 local_syms
[j
].st_name
);
6073 if (!strcmp (sym_name
, lsym_name
))
6078 if (hash
|| j
< ext_start
)
6081 (_("%pB: invalid standard symbol `%s'; it must be "
6082 "a global or weak function symbol"),
6083 input_bfd
, sym_name
);
6087 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
6093 sym_value
= hash
->root
.root
.u
.def
.value
;
6094 section
= hash
->root
.root
.u
.def
.section
;
6096 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
6099 (_("%pB: `%s' and its special symbol are in different sections"),
6100 input_bfd
, sym_name
);
6103 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
6104 continue; /* Ignore: could be an entry function starting with SG. */
6106 /* If this section is a link-once section that will be discarded, then
6107 don't create any stubs. */
6108 if (section
->output_section
== NULL
)
6111 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
6115 if (hash
->root
.size
== 0)
6118 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
6124 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6126 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6127 NULL
, NULL
, section
, hash
, sym_name
,
6128 sym_value
, branch_type
, &new_stub
);
6130 if (stub_entry
== NULL
)
6134 BFD_ASSERT (new_stub
);
6135 (*cmse_stub_created
)++;
6139 if (!symtab_hdr
->contents
)
6144 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6145 code entry function, ie can be called from non secure code without using a
6149 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
6151 bfd_byte contents
[4];
6152 uint32_t first_insn
;
6157 /* Defined symbol of function type. */
6158 if (hash
->root
.root
.type
!= bfd_link_hash_defined
6159 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6161 if (hash
->root
.type
!= STT_FUNC
)
6164 /* Read first instruction. */
6165 section
= hash
->root
.root
.u
.def
.section
;
6166 abfd
= section
->owner
;
6167 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
6168 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
6172 first_insn
= bfd_get_32 (abfd
, contents
);
6174 /* Starts by SG instruction. */
6175 return first_insn
== 0xe97fe97f;
6178 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6179 secure gateway veneers (ie. the veneers was not in the input import library)
6180 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6183 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
6185 struct elf32_arm_stub_hash_entry
*stub_entry
;
6186 struct bfd_link_info
*info
;
6188 /* Massage our args to the form they really have. */
6189 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
6190 info
= (struct bfd_link_info
*) gen_info
;
6192 if (info
->out_implib_bfd
)
6195 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
6198 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
6199 _bfd_error_handler (" %s", stub_entry
->output_name
);
6204 /* Set offset of each secure gateway veneers so that its address remain
6205 identical to the one in the input import library referred by
6206 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6207 (present in input import library but absent from the executable being
6208 linked) or if new veneers appeared and there is no output import library
6209 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6210 number of secure gateway veneers found in the input import library.
6212 The function returns whether an error occurred. If no error occurred,
6213 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6214 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6215 veneer observed set for new veneers to be layed out after. */
6218 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
6219 struct elf32_arm_link_hash_table
*htab
,
6220 int *cmse_stub_created
)
6227 asection
*stub_out_sec
;
6228 bfd_boolean ret
= TRUE
;
6229 Elf_Internal_Sym
*intsym
;
6230 const char *out_sec_name
;
6231 bfd_size_type cmse_stub_size
;
6232 asymbol
**sympp
= NULL
, *sym
;
6233 struct elf32_arm_link_hash_entry
*hash
;
6234 const insn_sequence
*cmse_stub_template
;
6235 struct elf32_arm_stub_hash_entry
*stub_entry
;
6236 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
6237 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
6238 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
6240 /* No input secure gateway import library. */
6241 if (!htab
->in_implib_bfd
)
6244 in_implib_bfd
= htab
->in_implib_bfd
;
6245 if (!htab
->cmse_implib
)
6247 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6248 "Gateway import libraries"), in_implib_bfd
);
6252 /* Get symbol table size. */
6253 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
6257 /* Read in the input secure gateway import library's symbol table. */
6258 sympp
= (asymbol
**) xmalloc (symsize
);
6259 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
6266 htab
->new_cmse_stub_offset
= 0;
6268 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
6269 &cmse_stub_template
,
6270 &cmse_stub_template_size
);
6272 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
6274 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
6275 if (stub_out_sec
!= NULL
)
6276 cmse_stub_sec_vma
= stub_out_sec
->vma
;
6278 /* Set addresses of veneers mentionned in input secure gateway import
6279 library's symbol table. */
6280 for (i
= 0; i
< symcount
; i
++)
6284 sym_name
= (char *) bfd_asymbol_name (sym
);
6285 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
6287 if (sym
->section
!= bfd_abs_section_ptr
6288 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
6289 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
6290 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
6291 != ST_BRANCH_TO_THUMB
))
6293 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6294 "symbol should be absolute, global and "
6295 "refer to Thumb functions"),
6296 in_implib_bfd
, sym_name
);
6301 veneer_value
= bfd_asymbol_value (sym
);
6302 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
6303 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
6305 hash
= (struct elf32_arm_link_hash_entry
*)
6306 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6308 /* Stub entry should have been created by cmse_scan or the symbol be of
6309 a secure function callable from non secure code. */
6310 if (!stub_entry
&& !hash
)
6312 bfd_boolean new_stub
;
6315 (_("entry function `%s' disappeared from secure code"), sym_name
);
6316 hash
= (struct elf32_arm_link_hash_entry
*)
6317 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
6319 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6320 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
6321 sym_name
, veneer_value
,
6322 ST_BRANCH_TO_THUMB
, &new_stub
);
6323 if (stub_entry
== NULL
)
6327 BFD_ASSERT (new_stub
);
6328 new_cmse_stubs_created
++;
6329 (*cmse_stub_created
)++;
6331 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
6332 stub_entry
->stub_offset
= stub_offset
;
6334 /* Symbol found is not callable from non secure code. */
6335 else if (!stub_entry
)
6337 if (!cmse_entry_fct_p (hash
))
6339 _bfd_error_handler (_("`%s' refers to a non entry function"),
6347 /* Only stubs for SG veneers should have been created. */
6348 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6350 /* Check visibility hasn't changed. */
6351 if (!!(flags
& BSF_GLOBAL
)
6352 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6354 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6357 stub_entry
->stub_offset
= stub_offset
;
6360 /* Size should match that of a SG veneer. */
6361 if (intsym
->st_size
!= cmse_stub_size
)
6363 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6364 in_implib_bfd
, sym_name
);
6368 /* Previous veneer address is before current SG veneer section. */
6369 if (veneer_value
< cmse_stub_sec_vma
)
6371 /* Avoid offset underflow. */
6373 stub_entry
->stub_offset
= 0;
6378 /* Complain if stub offset not a multiple of stub size. */
6379 if (stub_offset
% cmse_stub_size
)
6382 (_("offset of veneer for entry function `%s' not a multiple of "
6383 "its size"), sym_name
);
6390 new_cmse_stubs_created
--;
6391 if (veneer_value
< cmse_stub_array_start
)
6392 cmse_stub_array_start
= veneer_value
;
6393 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6394 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6395 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6398 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6400 BFD_ASSERT (new_cmse_stubs_created
> 0);
6402 (_("new entry function(s) introduced but no output import library "
6404 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6407 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6410 (_("start address of `%s' is different from previous link"),
6420 /* Determine and set the size of the stub section for a final link.
6422 The basic idea here is to examine all the relocations looking for
6423 PC-relative calls to a target that is unreachable with a "bl"
6427 elf32_arm_size_stubs (bfd
*output_bfd
,
6429 struct bfd_link_info
*info
,
6430 bfd_signed_vma group_size
,
6431 asection
* (*add_stub_section
) (const char *, asection
*,
6434 void (*layout_sections_again
) (void))
6436 bfd_boolean ret
= TRUE
;
6437 obj_attribute
*out_attr
;
6438 int cmse_stub_created
= 0;
6439 bfd_size_type stub_group_size
;
6440 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6441 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6442 struct a8_erratum_fix
*a8_fixes
= NULL
;
6443 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6444 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6445 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6450 if (htab
->fix_cortex_a8
)
6452 a8_fixes
= (struct a8_erratum_fix
*)
6453 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6454 a8_relocs
= (struct a8_erratum_reloc
*)
6455 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6458 /* Propagate mach to stub bfd, because it may not have been
6459 finalized when we created stub_bfd. */
6460 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6461 bfd_get_mach (output_bfd
));
6463 /* Stash our params away. */
6464 htab
->stub_bfd
= stub_bfd
;
6465 htab
->add_stub_section
= add_stub_section
;
6466 htab
->layout_sections_again
= layout_sections_again
;
6467 stubs_always_after_branch
= group_size
< 0;
6469 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6470 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6472 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6473 as the first half of a 32-bit branch straddling two 4K pages. This is a
6474 crude way of enforcing that. */
6475 if (htab
->fix_cortex_a8
)
6476 stubs_always_after_branch
= 1;
6479 stub_group_size
= -group_size
;
6481 stub_group_size
= group_size
;
6483 if (stub_group_size
== 1)
6485 /* Default values. */
6486 /* Thumb branch range is +-4MB has to be used as the default
6487 maximum size (a given section can contain both ARM and Thumb
6488 code, so the worst case has to be taken into account).
6490 This value is 24K less than that, which allows for 2025
6491 12-byte stubs. If we exceed that, then we will fail to link.
6492 The user will have to relink with an explicit group size
6494 stub_group_size
= 4170000;
6497 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6499 /* If we're applying the cortex A8 fix, we need to determine the
6500 program header size now, because we cannot change it later --
6501 that could alter section placements. Notice the A8 erratum fix
6502 ends up requiring the section addresses to remain unchanged
6503 modulo the page size. That's something we cannot represent
6504 inside BFD, and we don't want to force the section alignment to
6505 be the page size. */
6506 if (htab
->fix_cortex_a8
)
6507 (*htab
->layout_sections_again
) ();
6512 unsigned int bfd_indx
;
6514 enum elf32_arm_stub_type stub_type
;
6515 bfd_boolean stub_changed
= FALSE
;
6516 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6519 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6521 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6523 Elf_Internal_Shdr
*symtab_hdr
;
6525 Elf_Internal_Sym
*local_syms
= NULL
;
6527 if (!is_arm_elf (input_bfd
)
6528 || (elf_dyn_lib_class (input_bfd
) & DYN_AS_NEEDED
) != 0)
6533 /* We'll need the symbol table in a second. */
6534 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6535 if (symtab_hdr
->sh_info
== 0)
6538 /* Limit scan of symbols to object file whose profile is
6539 Microcontroller to not hinder performance in the general case. */
6540 if (m_profile
&& first_veneer_scan
)
6542 struct elf_link_hash_entry
**sym_hashes
;
6544 sym_hashes
= elf_sym_hashes (input_bfd
);
6545 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6546 &cmse_stub_created
))
6547 goto error_ret_free_local
;
6549 if (cmse_stub_created
!= 0)
6550 stub_changed
= TRUE
;
6553 /* Walk over each section attached to the input bfd. */
6554 for (section
= input_bfd
->sections
;
6556 section
= section
->next
)
6558 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6560 /* If there aren't any relocs, then there's nothing more
6562 if ((section
->flags
& SEC_RELOC
) == 0
6563 || section
->reloc_count
== 0
6564 || (section
->flags
& SEC_CODE
) == 0)
6567 /* If this section is a link-once section that will be
6568 discarded, then don't create any stubs. */
6569 if (section
->output_section
== NULL
6570 || section
->output_section
->owner
!= output_bfd
)
6573 /* Get the relocs. */
6575 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6576 NULL
, info
->keep_memory
);
6577 if (internal_relocs
== NULL
)
6578 goto error_ret_free_local
;
6580 /* Now examine each relocation. */
6581 irela
= internal_relocs
;
6582 irelaend
= irela
+ section
->reloc_count
;
6583 for (; irela
< irelaend
; irela
++)
6585 unsigned int r_type
, r_indx
;
6588 bfd_vma destination
;
6589 struct elf32_arm_link_hash_entry
*hash
;
6590 const char *sym_name
;
6591 unsigned char st_type
;
6592 enum arm_st_branch_type branch_type
;
6593 bfd_boolean created_stub
= FALSE
;
6595 r_type
= ELF32_R_TYPE (irela
->r_info
);
6596 r_indx
= ELF32_R_SYM (irela
->r_info
);
6598 if (r_type
>= (unsigned int) R_ARM_max
)
6600 bfd_set_error (bfd_error_bad_value
);
6601 error_ret_free_internal
:
6602 if (elf_section_data (section
)->relocs
== NULL
)
6603 free (internal_relocs
);
6605 error_ret_free_local
:
6606 if (local_syms
!= NULL
6607 && (symtab_hdr
->contents
6608 != (unsigned char *) local_syms
))
6614 if (r_indx
>= symtab_hdr
->sh_info
)
6615 hash
= elf32_arm_hash_entry
6616 (elf_sym_hashes (input_bfd
)
6617 [r_indx
- symtab_hdr
->sh_info
]);
6619 /* Only look for stubs on branch instructions, or
6620 non-relaxed TLSCALL */
6621 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6622 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6623 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6624 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6625 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6626 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6627 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6628 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6629 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6630 && r_type
== elf32_arm_tls_transition
6631 (info
, r_type
, &hash
->root
)
6632 && ((hash
? hash
->tls_type
6633 : (elf32_arm_local_got_tls_type
6634 (input_bfd
)[r_indx
]))
6635 & GOT_TLS_GDESC
) != 0))
6638 /* Now determine the call target, its name, value,
6645 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6646 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6648 /* A non-relaxed TLS call. The target is the
6649 plt-resident trampoline and nothing to do
6651 BFD_ASSERT (htab
->tls_trampoline
> 0);
6652 sym_sec
= htab
->root
.splt
;
6653 sym_value
= htab
->tls_trampoline
;
6656 branch_type
= ST_BRANCH_TO_ARM
;
6660 /* It's a local symbol. */
6661 Elf_Internal_Sym
*sym
;
6663 if (local_syms
== NULL
)
6666 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6667 if (local_syms
== NULL
)
6669 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6670 symtab_hdr
->sh_info
, 0,
6672 if (local_syms
== NULL
)
6673 goto error_ret_free_internal
;
6676 sym
= local_syms
+ r_indx
;
6677 if (sym
->st_shndx
== SHN_UNDEF
)
6678 sym_sec
= bfd_und_section_ptr
;
6679 else if (sym
->st_shndx
== SHN_ABS
)
6680 sym_sec
= bfd_abs_section_ptr
;
6681 else if (sym
->st_shndx
== SHN_COMMON
)
6682 sym_sec
= bfd_com_section_ptr
;
6685 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6688 /* This is an undefined symbol. It can never
6692 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6693 sym_value
= sym
->st_value
;
6694 destination
= (sym_value
+ irela
->r_addend
6695 + sym_sec
->output_offset
6696 + sym_sec
->output_section
->vma
);
6697 st_type
= ELF_ST_TYPE (sym
->st_info
);
6699 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6701 = bfd_elf_string_from_elf_section (input_bfd
,
6702 symtab_hdr
->sh_link
,
6707 /* It's an external symbol. */
6708 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6709 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6710 hash
= ((struct elf32_arm_link_hash_entry
*)
6711 hash
->root
.root
.u
.i
.link
);
6713 if (hash
->root
.root
.type
== bfd_link_hash_defined
6714 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6716 sym_sec
= hash
->root
.root
.u
.def
.section
;
6717 sym_value
= hash
->root
.root
.u
.def
.value
;
6719 struct elf32_arm_link_hash_table
*globals
=
6720 elf32_arm_hash_table (info
);
6722 /* For a destination in a shared library,
6723 use the PLT stub as target address to
6724 decide whether a branch stub is
6727 && globals
->root
.splt
!= NULL
6729 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6731 sym_sec
= globals
->root
.splt
;
6732 sym_value
= hash
->root
.plt
.offset
;
6733 if (sym_sec
->output_section
!= NULL
)
6734 destination
= (sym_value
6735 + sym_sec
->output_offset
6736 + sym_sec
->output_section
->vma
);
6738 else if (sym_sec
->output_section
!= NULL
)
6739 destination
= (sym_value
+ irela
->r_addend
6740 + sym_sec
->output_offset
6741 + sym_sec
->output_section
->vma
);
6743 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6744 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6746 /* For a shared library, use the PLT stub as
6747 target address to decide whether a long
6748 branch stub is needed.
6749 For absolute code, they cannot be handled. */
6750 struct elf32_arm_link_hash_table
*globals
=
6751 elf32_arm_hash_table (info
);
6754 && globals
->root
.splt
!= NULL
6756 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6758 sym_sec
= globals
->root
.splt
;
6759 sym_value
= hash
->root
.plt
.offset
;
6760 if (sym_sec
->output_section
!= NULL
)
6761 destination
= (sym_value
6762 + sym_sec
->output_offset
6763 + sym_sec
->output_section
->vma
);
6770 bfd_set_error (bfd_error_bad_value
);
6771 goto error_ret_free_internal
;
6773 st_type
= hash
->root
.type
;
6775 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6776 sym_name
= hash
->root
.root
.root
.string
;
6781 bfd_boolean new_stub
;
6782 struct elf32_arm_stub_hash_entry
*stub_entry
;
6784 /* Determine what (if any) linker stub is needed. */
6785 stub_type
= arm_type_of_stub (info
, section
, irela
,
6786 st_type
, &branch_type
,
6787 hash
, destination
, sym_sec
,
6788 input_bfd
, sym_name
);
6789 if (stub_type
== arm_stub_none
)
6792 /* We've either created a stub for this reloc already,
6793 or we are about to. */
6795 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6797 (char *) sym_name
, sym_value
,
6798 branch_type
, &new_stub
);
6800 created_stub
= stub_entry
!= NULL
;
6802 goto error_ret_free_internal
;
6806 stub_changed
= TRUE
;
6810 /* Look for relocations which might trigger Cortex-A8
6812 if (htab
->fix_cortex_a8
6813 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6814 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6815 || r_type
== (unsigned int) R_ARM_THM_CALL
6816 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6818 bfd_vma from
= section
->output_section
->vma
6819 + section
->output_offset
6822 if ((from
& 0xfff) == 0xffe)
6824 /* Found a candidate. Note we haven't checked the
6825 destination is within 4K here: if we do so (and
6826 don't create an entry in a8_relocs) we can't tell
6827 that a branch should have been relocated when
6829 if (num_a8_relocs
== a8_reloc_table_size
)
6831 a8_reloc_table_size
*= 2;
6832 a8_relocs
= (struct a8_erratum_reloc
*)
6833 bfd_realloc (a8_relocs
,
6834 sizeof (struct a8_erratum_reloc
)
6835 * a8_reloc_table_size
);
6838 a8_relocs
[num_a8_relocs
].from
= from
;
6839 a8_relocs
[num_a8_relocs
].destination
= destination
;
6840 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6841 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6842 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6843 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6844 a8_relocs
[num_a8_relocs
].hash
= hash
;
6851 /* We're done with the internal relocs, free them. */
6852 if (elf_section_data (section
)->relocs
== NULL
)
6853 free (internal_relocs
);
6856 if (htab
->fix_cortex_a8
)
6858 /* Sort relocs which might apply to Cortex-A8 erratum. */
6859 qsort (a8_relocs
, num_a8_relocs
,
6860 sizeof (struct a8_erratum_reloc
),
6863 /* Scan for branches which might trigger Cortex-A8 erratum. */
6864 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6865 &num_a8_fixes
, &a8_fix_table_size
,
6866 a8_relocs
, num_a8_relocs
,
6867 prev_num_a8_fixes
, &stub_changed
)
6869 goto error_ret_free_local
;
6872 if (local_syms
!= NULL
6873 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6875 if (!info
->keep_memory
)
6878 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6882 if (first_veneer_scan
6883 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6884 &cmse_stub_created
))
6887 if (prev_num_a8_fixes
!= num_a8_fixes
)
6888 stub_changed
= TRUE
;
6893 /* OK, we've added some stubs. Find out the new size of the
6895 for (stub_sec
= htab
->stub_bfd
->sections
;
6897 stub_sec
= stub_sec
->next
)
6899 /* Ignore non-stub sections. */
6900 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6906 /* Add new SG veneers after those already in the input import
6908 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6911 bfd_vma
*start_offset_p
;
6912 asection
**stub_sec_p
;
6914 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6915 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6916 if (start_offset_p
== NULL
)
6919 BFD_ASSERT (stub_sec_p
!= NULL
);
6920 if (*stub_sec_p
!= NULL
)
6921 (*stub_sec_p
)->size
= *start_offset_p
;
6924 /* Compute stub section size, considering padding. */
6925 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6926 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6930 asection
**stub_sec_p
;
6932 padding
= arm_dedicated_stub_section_padding (stub_type
);
6933 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6934 /* Skip if no stub input section or no stub section padding
6936 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6938 /* Stub section padding required but no dedicated section. */
6939 BFD_ASSERT (stub_sec_p
);
6941 size
= (*stub_sec_p
)->size
;
6942 size
= (size
+ padding
- 1) & ~(padding
- 1);
6943 (*stub_sec_p
)->size
= size
;
6946 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6947 if (htab
->fix_cortex_a8
)
6948 for (i
= 0; i
< num_a8_fixes
; i
++)
6950 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6951 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6953 if (stub_sec
== NULL
)
6957 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6962 /* Ask the linker to do its stuff. */
6963 (*htab
->layout_sections_again
) ();
6964 first_veneer_scan
= FALSE
;
6967 /* Add stubs for Cortex-A8 erratum fixes now. */
6968 if (htab
->fix_cortex_a8
)
6970 for (i
= 0; i
< num_a8_fixes
; i
++)
6972 struct elf32_arm_stub_hash_entry
*stub_entry
;
6973 char *stub_name
= a8_fixes
[i
].stub_name
;
6974 asection
*section
= a8_fixes
[i
].section
;
6975 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6976 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6977 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6978 const insn_sequence
*template_sequence
;
6979 int template_size
, size
= 0;
6981 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6983 if (stub_entry
== NULL
)
6985 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6986 section
->owner
, stub_name
);
6990 stub_entry
->stub_sec
= stub_sec
;
6991 stub_entry
->stub_offset
= (bfd_vma
) -1;
6992 stub_entry
->id_sec
= link_sec
;
6993 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6994 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6995 stub_entry
->target_section
= a8_fixes
[i
].section
;
6996 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6997 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6998 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
7000 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
7004 stub_entry
->stub_size
= size
;
7005 stub_entry
->stub_template
= template_sequence
;
7006 stub_entry
->stub_template_size
= template_size
;
7009 /* Stash the Cortex-A8 erratum fix array for use later in
7010 elf32_arm_write_section(). */
7011 htab
->a8_erratum_fixes
= a8_fixes
;
7012 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
7016 htab
->a8_erratum_fixes
= NULL
;
7017 htab
->num_a8_erratum_fixes
= 0;
7022 /* Build all the stubs associated with the current output file. The
7023 stubs are kept in a hash table attached to the main linker hash
7024 table. We also set up the .plt entries for statically linked PIC
7025 functions here. This function is called via arm_elf_finish in the
7029 elf32_arm_build_stubs (struct bfd_link_info
*info
)
7032 struct bfd_hash_table
*table
;
7033 enum elf32_arm_stub_type stub_type
;
7034 struct elf32_arm_link_hash_table
*htab
;
7036 htab
= elf32_arm_hash_table (info
);
7040 for (stub_sec
= htab
->stub_bfd
->sections
;
7042 stub_sec
= stub_sec
->next
)
7046 /* Ignore non-stub sections. */
7047 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
7050 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7051 must at least be done for stub section requiring padding and for SG
7052 veneers to ensure that a non secure code branching to a removed SG
7053 veneer causes an error. */
7054 size
= stub_sec
->size
;
7055 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
7056 if (stub_sec
->contents
== NULL
&& size
!= 0)
7062 /* Add new SG veneers after those already in the input import library. */
7063 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7065 bfd_vma
*start_offset_p
;
7066 asection
**stub_sec_p
;
7068 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
7069 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
7070 if (start_offset_p
== NULL
)
7073 BFD_ASSERT (stub_sec_p
!= NULL
);
7074 if (*stub_sec_p
!= NULL
)
7075 (*stub_sec_p
)->size
= *start_offset_p
;
7078 /* Build the stubs as directed by the stub hash table. */
7079 table
= &htab
->stub_hash_table
;
7080 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7081 if (htab
->fix_cortex_a8
)
7083 /* Place the cortex a8 stubs last. */
7084 htab
->fix_cortex_a8
= -1;
7085 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7091 /* Locate the Thumb encoded calling stub for NAME. */
7093 static struct elf_link_hash_entry
*
7094 find_thumb_glue (struct bfd_link_info
*link_info
,
7096 char **error_message
)
7099 struct elf_link_hash_entry
*hash
;
7100 struct elf32_arm_link_hash_table
*hash_table
;
7102 /* We need a pointer to the armelf specific hash table. */
7103 hash_table
= elf32_arm_hash_table (link_info
);
7104 if (hash_table
== NULL
)
7107 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7108 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
7110 BFD_ASSERT (tmp_name
);
7112 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
7114 hash
= elf_link_hash_lookup
7115 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7118 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7119 "Thumb", tmp_name
, name
) == -1)
7120 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7127 /* Locate the ARM encoded calling stub for NAME. */
7129 static struct elf_link_hash_entry
*
7130 find_arm_glue (struct bfd_link_info
*link_info
,
7132 char **error_message
)
7135 struct elf_link_hash_entry
*myh
;
7136 struct elf32_arm_link_hash_table
*hash_table
;
7138 /* We need a pointer to the elfarm specific hash table. */
7139 hash_table
= elf32_arm_hash_table (link_info
);
7140 if (hash_table
== NULL
)
7143 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7144 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7146 BFD_ASSERT (tmp_name
);
7148 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7150 myh
= elf_link_hash_lookup
7151 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7154 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7155 "ARM", tmp_name
, name
) == -1)
7156 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7163 /* ARM->Thumb glue (static images):
7167 ldr r12, __func_addr
7170 .word func @ behave as if you saw a ARM_32 reloc.
7177 .word func @ behave as if you saw a ARM_32 reloc.
7179 (relocatable images)
7182 ldr r12, __func_offset
7188 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7189 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
7190 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
7191 static const insn32 a2t3_func_addr_insn
= 0x00000001;
7193 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7194 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
7195 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
7197 #define ARM2THUMB_PIC_GLUE_SIZE 16
7198 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
7199 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
7200 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
7202 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7206 __func_from_thumb: __func_from_thumb:
7208 nop ldr r6, __func_addr
7218 #define THUMB2ARM_GLUE_SIZE 8
7219 static const insn16 t2a1_bx_pc_insn
= 0x4778;
7220 static const insn16 t2a2_noop_insn
= 0x46c0;
7221 static const insn32 t2a3_b_insn
= 0xea000000;
7223 #define VFP11_ERRATUM_VENEER_SIZE 8
7224 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7225 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7227 #define ARM_BX_VENEER_SIZE 12
7228 static const insn32 armbx1_tst_insn
= 0xe3100001;
7229 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
7230 static const insn32 armbx3_bx_insn
= 0xe12fff10;
7232 #ifndef ELFARM_NABI_C_INCLUDED
7234 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
7237 bfd_byte
* contents
;
7241 /* Do not include empty glue sections in the output. */
7244 s
= bfd_get_linker_section (abfd
, name
);
7246 s
->flags
|= SEC_EXCLUDE
;
7251 BFD_ASSERT (abfd
!= NULL
);
7253 s
= bfd_get_linker_section (abfd
, name
);
7254 BFD_ASSERT (s
!= NULL
);
7256 contents
= (bfd_byte
*) bfd_zalloc (abfd
, size
);
7258 BFD_ASSERT (s
->size
== size
);
7259 s
->contents
= contents
;
7263 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
7265 struct elf32_arm_link_hash_table
* globals
;
7267 globals
= elf32_arm_hash_table (info
);
7268 BFD_ASSERT (globals
!= NULL
);
7270 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7271 globals
->arm_glue_size
,
7272 ARM2THUMB_GLUE_SECTION_NAME
);
7274 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7275 globals
->thumb_glue_size
,
7276 THUMB2ARM_GLUE_SECTION_NAME
);
7278 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7279 globals
->vfp11_erratum_glue_size
,
7280 VFP11_ERRATUM_VENEER_SECTION_NAME
);
7282 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7283 globals
->stm32l4xx_erratum_glue_size
,
7284 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7286 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7287 globals
->bx_glue_size
,
7288 ARM_BX_GLUE_SECTION_NAME
);
7293 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7294 returns the symbol identifying the stub. */
7296 static struct elf_link_hash_entry
*
7297 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
7298 struct elf_link_hash_entry
* h
)
7300 const char * name
= h
->root
.root
.string
;
7303 struct elf_link_hash_entry
* myh
;
7304 struct bfd_link_hash_entry
* bh
;
7305 struct elf32_arm_link_hash_table
* globals
;
7309 globals
= elf32_arm_hash_table (link_info
);
7310 BFD_ASSERT (globals
!= NULL
);
7311 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7313 s
= bfd_get_linker_section
7314 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
7316 BFD_ASSERT (s
!= NULL
);
7318 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7319 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7321 BFD_ASSERT (tmp_name
);
7323 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7325 myh
= elf_link_hash_lookup
7326 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7330 /* We've already seen this guy. */
7335 /* The only trick here is using hash_table->arm_glue_size as the value.
7336 Even though the section isn't allocated yet, this is where we will be
7337 putting it. The +1 on the value marks that the stub has not been
7338 output yet - not that it is a Thumb function. */
7340 val
= globals
->arm_glue_size
+ 1;
7341 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7342 tmp_name
, BSF_GLOBAL
, s
, val
,
7343 NULL
, TRUE
, FALSE
, &bh
);
7345 myh
= (struct elf_link_hash_entry
*) bh
;
7346 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7347 myh
->forced_local
= 1;
7351 if (bfd_link_pic (link_info
)
7352 || globals
->root
.is_relocatable_executable
7353 || globals
->pic_veneer
)
7354 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7355 else if (globals
->use_blx
)
7356 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7358 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7361 globals
->arm_glue_size
+= size
;
7366 /* Allocate space for ARMv4 BX veneers. */
7369 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7372 struct elf32_arm_link_hash_table
*globals
;
7374 struct elf_link_hash_entry
*myh
;
7375 struct bfd_link_hash_entry
*bh
;
7378 /* BX PC does not need a veneer. */
7382 globals
= elf32_arm_hash_table (link_info
);
7383 BFD_ASSERT (globals
!= NULL
);
7384 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7386 /* Check if this veneer has already been allocated. */
7387 if (globals
->bx_glue_offset
[reg
])
7390 s
= bfd_get_linker_section
7391 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7393 BFD_ASSERT (s
!= NULL
);
7395 /* Add symbol for veneer. */
7397 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7399 BFD_ASSERT (tmp_name
);
7401 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7403 myh
= elf_link_hash_lookup
7404 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7406 BFD_ASSERT (myh
== NULL
);
7409 val
= globals
->bx_glue_size
;
7410 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7411 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7412 NULL
, TRUE
, FALSE
, &bh
);
7414 myh
= (struct elf_link_hash_entry
*) bh
;
7415 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7416 myh
->forced_local
= 1;
7418 s
->size
+= ARM_BX_VENEER_SIZE
;
7419 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7420 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7424 /* Add an entry to the code/data map for section SEC. */
7427 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7429 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7430 unsigned int newidx
;
7432 if (sec_data
->map
== NULL
)
7434 sec_data
->map
= (elf32_arm_section_map
*)
7435 bfd_malloc (sizeof (elf32_arm_section_map
));
7436 sec_data
->mapcount
= 0;
7437 sec_data
->mapsize
= 1;
7440 newidx
= sec_data
->mapcount
++;
7442 if (sec_data
->mapcount
> sec_data
->mapsize
)
7444 sec_data
->mapsize
*= 2;
7445 sec_data
->map
= (elf32_arm_section_map
*)
7446 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7447 * sizeof (elf32_arm_section_map
));
7452 sec_data
->map
[newidx
].vma
= vma
;
7453 sec_data
->map
[newidx
].type
= type
;
7458 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7459 veneers are handled for now. */
7462 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7463 elf32_vfp11_erratum_list
*branch
,
7465 asection
*branch_sec
,
7466 unsigned int offset
)
7469 struct elf32_arm_link_hash_table
*hash_table
;
7471 struct elf_link_hash_entry
*myh
;
7472 struct bfd_link_hash_entry
*bh
;
7474 struct _arm_elf_section_data
*sec_data
;
7475 elf32_vfp11_erratum_list
*newerr
;
7477 hash_table
= elf32_arm_hash_table (link_info
);
7478 BFD_ASSERT (hash_table
!= NULL
);
7479 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7481 s
= bfd_get_linker_section
7482 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7484 sec_data
= elf32_arm_section_data (s
);
7486 BFD_ASSERT (s
!= NULL
);
7488 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7489 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7491 BFD_ASSERT (tmp_name
);
7493 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7494 hash_table
->num_vfp11_fixes
);
7496 myh
= elf_link_hash_lookup
7497 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7499 BFD_ASSERT (myh
== NULL
);
7502 val
= hash_table
->vfp11_erratum_glue_size
;
7503 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7504 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7505 NULL
, TRUE
, FALSE
, &bh
);
7507 myh
= (struct elf_link_hash_entry
*) bh
;
7508 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7509 myh
->forced_local
= 1;
7511 /* Link veneer back to calling location. */
7512 sec_data
->erratumcount
+= 1;
7513 newerr
= (elf32_vfp11_erratum_list
*)
7514 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7516 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7518 newerr
->u
.v
.branch
= branch
;
7519 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7520 branch
->u
.b
.veneer
= newerr
;
7522 newerr
->next
= sec_data
->erratumlist
;
7523 sec_data
->erratumlist
= newerr
;
7525 /* A symbol for the return from the veneer. */
7526 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7527 hash_table
->num_vfp11_fixes
);
7529 myh
= elf_link_hash_lookup
7530 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7537 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7538 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7540 myh
= (struct elf_link_hash_entry
*) bh
;
7541 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7542 myh
->forced_local
= 1;
7546 /* Generate a mapping symbol for the veneer section, and explicitly add an
7547 entry for that symbol to the code/data map for the section. */
7548 if (hash_table
->vfp11_erratum_glue_size
== 0)
7551 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7552 ever requires this erratum fix. */
7553 _bfd_generic_link_add_one_symbol (link_info
,
7554 hash_table
->bfd_of_glue_owner
, "$a",
7555 BSF_LOCAL
, s
, 0, NULL
,
7558 myh
= (struct elf_link_hash_entry
*) bh
;
7559 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7560 myh
->forced_local
= 1;
7562 /* The elf32_arm_init_maps function only cares about symbols from input
7563 BFDs. We must make a note of this generated mapping symbol
7564 ourselves so that code byteswapping works properly in
7565 elf32_arm_write_section. */
7566 elf32_arm_section_map_add (s
, 'a', 0);
7569 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7570 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7571 hash_table
->num_vfp11_fixes
++;
7573 /* The offset of the veneer. */
7577 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7578 veneers need to be handled because used only in Cortex-M. */
7581 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7582 elf32_stm32l4xx_erratum_list
*branch
,
7584 asection
*branch_sec
,
7585 unsigned int offset
,
7586 bfd_size_type veneer_size
)
7589 struct elf32_arm_link_hash_table
*hash_table
;
7591 struct elf_link_hash_entry
*myh
;
7592 struct bfd_link_hash_entry
*bh
;
7594 struct _arm_elf_section_data
*sec_data
;
7595 elf32_stm32l4xx_erratum_list
*newerr
;
7597 hash_table
= elf32_arm_hash_table (link_info
);
7598 BFD_ASSERT (hash_table
!= NULL
);
7599 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7601 s
= bfd_get_linker_section
7602 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7604 BFD_ASSERT (s
!= NULL
);
7606 sec_data
= elf32_arm_section_data (s
);
7608 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7609 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7611 BFD_ASSERT (tmp_name
);
7613 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7614 hash_table
->num_stm32l4xx_fixes
);
7616 myh
= elf_link_hash_lookup
7617 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7619 BFD_ASSERT (myh
== NULL
);
7622 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7623 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7624 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7625 NULL
, TRUE
, FALSE
, &bh
);
7627 myh
= (struct elf_link_hash_entry
*) bh
;
7628 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7629 myh
->forced_local
= 1;
7631 /* Link veneer back to calling location. */
7632 sec_data
->stm32l4xx_erratumcount
+= 1;
7633 newerr
= (elf32_stm32l4xx_erratum_list
*)
7634 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7636 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7638 newerr
->u
.v
.branch
= branch
;
7639 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7640 branch
->u
.b
.veneer
= newerr
;
7642 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7643 sec_data
->stm32l4xx_erratumlist
= newerr
;
7645 /* A symbol for the return from the veneer. */
7646 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7647 hash_table
->num_stm32l4xx_fixes
);
7649 myh
= elf_link_hash_lookup
7650 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7657 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7658 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7660 myh
= (struct elf_link_hash_entry
*) bh
;
7661 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7662 myh
->forced_local
= 1;
7666 /* Generate a mapping symbol for the veneer section, and explicitly add an
7667 entry for that symbol to the code/data map for the section. */
7668 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7671 /* Creates a THUMB symbol since there is no other choice. */
7672 _bfd_generic_link_add_one_symbol (link_info
,
7673 hash_table
->bfd_of_glue_owner
, "$t",
7674 BSF_LOCAL
, s
, 0, NULL
,
7677 myh
= (struct elf_link_hash_entry
*) bh
;
7678 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7679 myh
->forced_local
= 1;
7681 /* The elf32_arm_init_maps function only cares about symbols from input
7682 BFDs. We must make a note of this generated mapping symbol
7683 ourselves so that code byteswapping works properly in
7684 elf32_arm_write_section. */
7685 elf32_arm_section_map_add (s
, 't', 0);
7688 s
->size
+= veneer_size
;
7689 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7690 hash_table
->num_stm32l4xx_fixes
++;
7692 /* The offset of the veneer. */
7696 #define ARM_GLUE_SECTION_FLAGS \
7697 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7698 | SEC_READONLY | SEC_LINKER_CREATED)
7700 /* Create a fake section for use by the ARM backend of the linker. */
7703 arm_make_glue_section (bfd
* abfd
, const char * name
)
7707 sec
= bfd_get_linker_section (abfd
, name
);
7712 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7715 || !bfd_set_section_alignment (sec
, 2))
7718 /* Set the gc mark to prevent the section from being removed by garbage
7719 collection, despite the fact that no relocs refer to this section. */
7725 /* Set size of .plt entries. This function is called from the
7726 linker scripts in ld/emultempl/{armelf}.em. */
7729 bfd_elf32_arm_use_long_plt (void)
7731 elf32_arm_use_long_plt_entry
= TRUE
;
7734 /* Add the glue sections to ABFD. This function is called from the
7735 linker scripts in ld/emultempl/{armelf}.em. */
7738 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7739 struct bfd_link_info
*info
)
7741 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7742 bfd_boolean dostm32l4xx
= globals
7743 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7744 bfd_boolean addglue
;
7746 /* If we are only performing a partial
7747 link do not bother adding the glue. */
7748 if (bfd_link_relocatable (info
))
7751 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7752 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7753 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7754 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7760 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7763 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7764 ensures they are not marked for deletion by
7765 strip_excluded_output_sections () when veneers are going to be created
7766 later. Not doing so would trigger assert on empty section size in
7767 lang_size_sections_1 (). */
7770 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7772 enum elf32_arm_stub_type stub_type
;
7774 /* If we are only performing a partial
7775 link do not bother adding the glue. */
7776 if (bfd_link_relocatable (info
))
7779 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7782 const char *out_sec_name
;
7784 if (!arm_dedicated_stub_output_section_required (stub_type
))
7787 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7788 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7789 if (out_sec
!= NULL
)
7790 out_sec
->flags
|= SEC_KEEP
;
7794 /* Select a BFD to be used to hold the sections used by the glue code.
7795 This function is called from the linker scripts in ld/emultempl/
7799 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7801 struct elf32_arm_link_hash_table
*globals
;
7803 /* If we are only performing a partial link
7804 do not bother getting a bfd to hold the glue. */
7805 if (bfd_link_relocatable (info
))
7808 /* Make sure we don't attach the glue sections to a dynamic object. */
7809 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7811 globals
= elf32_arm_hash_table (info
);
7812 BFD_ASSERT (globals
!= NULL
);
7814 if (globals
->bfd_of_glue_owner
!= NULL
)
7817 /* Save the bfd for later use. */
7818 globals
->bfd_of_glue_owner
= abfd
;
7824 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7828 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7831 if (globals
->fix_arm1176
)
7833 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7834 globals
->use_blx
= 1;
7838 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7839 globals
->use_blx
= 1;
7844 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7845 struct bfd_link_info
*link_info
)
7847 Elf_Internal_Shdr
*symtab_hdr
;
7848 Elf_Internal_Rela
*internal_relocs
= NULL
;
7849 Elf_Internal_Rela
*irel
, *irelend
;
7850 bfd_byte
*contents
= NULL
;
7853 struct elf32_arm_link_hash_table
*globals
;
7855 /* If we are only performing a partial link do not bother
7856 to construct any glue. */
7857 if (bfd_link_relocatable (link_info
))
7860 /* Here we have a bfd that is to be included on the link. We have a
7861 hook to do reloc rummaging, before section sizes are nailed down. */
7862 globals
= elf32_arm_hash_table (link_info
);
7863 BFD_ASSERT (globals
!= NULL
);
7865 check_use_blx (globals
);
7867 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7869 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7874 /* PR 5398: If we have not decided to include any loadable sections in
7875 the output then we will not have a glue owner bfd. This is OK, it
7876 just means that there is nothing else for us to do here. */
7877 if (globals
->bfd_of_glue_owner
== NULL
)
7880 /* Rummage around all the relocs and map the glue vectors. */
7881 sec
= abfd
->sections
;
7886 for (; sec
!= NULL
; sec
= sec
->next
)
7888 if (sec
->reloc_count
== 0)
7891 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7894 symtab_hdr
= & elf_symtab_hdr (abfd
);
7896 /* Load the relocs. */
7898 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7900 if (internal_relocs
== NULL
)
7903 irelend
= internal_relocs
+ sec
->reloc_count
;
7904 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7907 unsigned long r_index
;
7909 struct elf_link_hash_entry
*h
;
7911 r_type
= ELF32_R_TYPE (irel
->r_info
);
7912 r_index
= ELF32_R_SYM (irel
->r_info
);
7914 /* These are the only relocation types we care about. */
7915 if ( r_type
!= R_ARM_PC24
7916 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7919 /* Get the section contents if we haven't done so already. */
7920 if (contents
== NULL
)
7922 /* Get cached copy if it exists. */
7923 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7924 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7927 /* Go get them off disk. */
7928 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7933 if (r_type
== R_ARM_V4BX
)
7937 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7938 record_arm_bx_glue (link_info
, reg
);
7942 /* If the relocation is not against a symbol it cannot concern us. */
7945 /* We don't care about local symbols. */
7946 if (r_index
< symtab_hdr
->sh_info
)
7949 /* This is an external symbol. */
7950 r_index
-= symtab_hdr
->sh_info
;
7951 h
= (struct elf_link_hash_entry
*)
7952 elf_sym_hashes (abfd
)[r_index
];
7954 /* If the relocation is against a static symbol it must be within
7955 the current section and so cannot be a cross ARM/Thumb relocation. */
7959 /* If the call will go through a PLT entry then we do not need
7961 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7967 /* This one is a call from arm code. We need to look up
7968 the target of the call. If it is a thumb target, we
7970 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7971 == ST_BRANCH_TO_THUMB
)
7972 record_arm_to_thumb_glue (link_info
, h
);
7980 if (contents
!= NULL
7981 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7985 if (internal_relocs
!= NULL
7986 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7987 free (internal_relocs
);
7988 internal_relocs
= NULL
;
7994 if (contents
!= NULL
7995 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7997 if (internal_relocs
!= NULL
7998 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7999 free (internal_relocs
);
8006 /* Initialise maps of ARM/Thumb/data for input BFDs. */
8009 bfd_elf32_arm_init_maps (bfd
*abfd
)
8011 Elf_Internal_Sym
*isymbuf
;
8012 Elf_Internal_Shdr
*hdr
;
8013 unsigned int i
, localsyms
;
8015 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8016 if (! is_arm_elf (abfd
))
8019 if ((abfd
->flags
& DYNAMIC
) != 0)
8022 hdr
= & elf_symtab_hdr (abfd
);
8023 localsyms
= hdr
->sh_info
;
8025 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8026 should contain the number of local symbols, which should come before any
8027 global symbols. Mapping symbols are always local. */
8028 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
8031 /* No internal symbols read? Skip this BFD. */
8032 if (isymbuf
== NULL
)
8035 for (i
= 0; i
< localsyms
; i
++)
8037 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
8038 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
8042 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
8044 name
= bfd_elf_string_from_elf_section (abfd
,
8045 hdr
->sh_link
, isym
->st_name
);
8047 if (bfd_is_arm_special_symbol_name (name
,
8048 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
8049 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
8055 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8056 say what they wanted. */
8059 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8061 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8062 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8064 if (globals
== NULL
)
8067 if (globals
->fix_cortex_a8
== -1)
8069 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8070 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
8071 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
8072 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
8073 globals
->fix_cortex_a8
= 1;
8075 globals
->fix_cortex_a8
= 0;
8081 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8083 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8084 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8086 if (globals
== NULL
)
8088 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8089 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
8091 switch (globals
->vfp11_fix
)
8093 case BFD_ARM_VFP11_FIX_DEFAULT
:
8094 case BFD_ARM_VFP11_FIX_NONE
:
8095 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8099 /* Give a warning, but do as the user requests anyway. */
8100 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8101 "workaround is not necessary for target architecture"), obfd
);
8104 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
8105 /* For earlier architectures, we might need the workaround, but do not
8106 enable it by default. If users is running with broken hardware, they
8107 must enable the erratum fix explicitly. */
8108 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8112 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8114 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8115 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8117 if (globals
== NULL
)
8120 /* We assume only Cortex-M4 may require the fix. */
8121 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
8122 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
8124 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
8125 /* Give a warning, but do as the user requests anyway. */
8127 (_("%pB: warning: selected STM32L4XX erratum "
8128 "workaround is not necessary for target architecture"), obfd
);
8132 enum bfd_arm_vfp11_pipe
8140 /* Return a VFP register number. This is encoded as RX:X for single-precision
8141 registers, or X:RX for double-precision registers, where RX is the group of
8142 four bits in the instruction encoding and X is the single extension bit.
8143 RX and X fields are specified using their lowest (starting) bit. The return
8146 0...31: single-precision registers s0...s31
8147 32...63: double-precision registers d0...d31.
8149 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8150 encounter VFP3 instructions, so we allow the full range for DP registers. */
8153 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
8157 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
8159 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
8162 /* Set bits in *WMASK according to a register number REG as encoded by
8163 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8166 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
8171 *wmask
|= 3 << ((reg
- 32) * 2);
8174 /* Return TRUE if WMASK overwrites anything in REGS. */
8177 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
8181 for (i
= 0; i
< numregs
; i
++)
8183 unsigned int reg
= regs
[i
];
8185 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
8193 if ((wmask
& (3 << (reg
* 2))) != 0)
8200 /* In this function, we're interested in two things: finding input registers
8201 for VFP data-processing instructions, and finding the set of registers which
8202 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8203 hold the written set, so FLDM etc. are easy to deal with (we're only
8204 interested in 32 SP registers or 16 dp registers, due to the VFP version
8205 implemented by the chip in question). DP registers are marked by setting
8206 both SP registers in the write mask). */
8208 static enum bfd_arm_vfp11_pipe
8209 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
8212 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
8213 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
8215 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8218 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8219 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8221 pqrs
= ((insn
& 0x00800000) >> 20)
8222 | ((insn
& 0x00300000) >> 19)
8223 | ((insn
& 0x00000040) >> 6);
8227 case 0: /* fmac[sd]. */
8228 case 1: /* fnmac[sd]. */
8229 case 2: /* fmsc[sd]. */
8230 case 3: /* fnmsc[sd]. */
8232 bfd_arm_vfp11_write_mask (destmask
, fd
);
8234 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8239 case 4: /* fmul[sd]. */
8240 case 5: /* fnmul[sd]. */
8241 case 6: /* fadd[sd]. */
8242 case 7: /* fsub[sd]. */
8246 case 8: /* fdiv[sd]. */
8249 bfd_arm_vfp11_write_mask (destmask
, fd
);
8250 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8255 case 15: /* extended opcode. */
8257 unsigned int extn
= ((insn
>> 15) & 0x1e)
8258 | ((insn
>> 7) & 1);
8262 case 0: /* fcpy[sd]. */
8263 case 1: /* fabs[sd]. */
8264 case 2: /* fneg[sd]. */
8265 case 8: /* fcmp[sd]. */
8266 case 9: /* fcmpe[sd]. */
8267 case 10: /* fcmpz[sd]. */
8268 case 11: /* fcmpez[sd]. */
8269 case 16: /* fuito[sd]. */
8270 case 17: /* fsito[sd]. */
8271 case 24: /* ftoui[sd]. */
8272 case 25: /* ftouiz[sd]. */
8273 case 26: /* ftosi[sd]. */
8274 case 27: /* ftosiz[sd]. */
8275 /* These instructions will not bounce due to underflow. */
8280 case 3: /* fsqrt[sd]. */
8281 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8282 registers to cause the erratum in previous instructions. */
8283 bfd_arm_vfp11_write_mask (destmask
, fd
);
8287 case 15: /* fcvt{ds,sd}. */
8291 bfd_arm_vfp11_write_mask (destmask
, fd
);
8293 /* Only FCVTSD can underflow. */
8294 if ((insn
& 0x100) != 0)
8313 /* Two-register transfer. */
8314 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
8316 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8318 if ((insn
& 0x100000) == 0)
8321 bfd_arm_vfp11_write_mask (destmask
, fm
);
8324 bfd_arm_vfp11_write_mask (destmask
, fm
);
8325 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
8331 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
8333 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8334 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
8338 case 0: /* Two-reg transfer. We should catch these above. */
8341 case 2: /* fldm[sdx]. */
8345 unsigned int i
, offset
= insn
& 0xff;
8350 for (i
= fd
; i
< fd
+ offset
; i
++)
8351 bfd_arm_vfp11_write_mask (destmask
, i
);
8355 case 4: /* fld[sd]. */
8357 bfd_arm_vfp11_write_mask (destmask
, fd
);
8366 /* Single-register transfer. Note L==0. */
8367 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8369 unsigned int opcode
= (insn
>> 21) & 7;
8370 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8374 case 0: /* fmsr/fmdlr. */
8375 case 1: /* fmdhr. */
8376 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8377 destination register. I don't know if this is exactly right,
8378 but it is the conservative choice. */
8379 bfd_arm_vfp11_write_mask (destmask
, fn
);
8393 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8396 /* Look for potentially-troublesome code sequences which might trigger the
8397 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8398 (available from ARM) for details of the erratum. A short version is
8399 described in ld.texinfo. */
8402 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8405 bfd_byte
*contents
= NULL
;
8407 int regs
[3], numregs
= 0;
8408 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8409 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8411 if (globals
== NULL
)
8414 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8415 The states transition as follows:
8417 0 -> 1 (vector) or 0 -> 2 (scalar)
8418 A VFP FMAC-pipeline instruction has been seen. Fill
8419 regs[0]..regs[numregs-1] with its input operands. Remember this
8420 instruction in 'first_fmac'.
8423 Any instruction, except for a VFP instruction which overwrites
8428 A VFP instruction has been seen which overwrites any of regs[*].
8429 We must make a veneer! Reset state to 0 before examining next
8433 If we fail to match anything in state 2, reset to state 0 and reset
8434 the instruction pointer to the instruction after 'first_fmac'.
8436 If the VFP11 vector mode is in use, there must be at least two unrelated
8437 instructions between anti-dependent VFP11 instructions to properly avoid
8438 triggering the erratum, hence the use of the extra state 1. */
8440 /* If we are only performing a partial link do not bother
8441 to construct any glue. */
8442 if (bfd_link_relocatable (link_info
))
8445 /* Skip if this bfd does not correspond to an ELF image. */
8446 if (! is_arm_elf (abfd
))
8449 /* We should have chosen a fix type by the time we get here. */
8450 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8452 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8455 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8456 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8459 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8461 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8462 struct _arm_elf_section_data
*sec_data
;
8464 /* If we don't have executable progbits, we're not interested in this
8465 section. Also skip if section is to be excluded. */
8466 if (elf_section_type (sec
) != SHT_PROGBITS
8467 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8468 || (sec
->flags
& SEC_EXCLUDE
) != 0
8469 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8470 || sec
->output_section
== bfd_abs_section_ptr
8471 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8474 sec_data
= elf32_arm_section_data (sec
);
8476 if (sec_data
->mapcount
== 0)
8479 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8480 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8481 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8484 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8485 elf32_arm_compare_mapping
);
8487 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8489 unsigned int span_start
= sec_data
->map
[span
].vma
;
8490 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8491 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8492 char span_type
= sec_data
->map
[span
].type
;
8494 /* FIXME: Only ARM mode is supported at present. We may need to
8495 support Thumb-2 mode also at some point. */
8496 if (span_type
!= 'a')
8499 for (i
= span_start
; i
< span_end
;)
8501 unsigned int next_i
= i
+ 4;
8502 unsigned int insn
= bfd_big_endian (abfd
)
8503 ? (contents
[i
] << 24)
8504 | (contents
[i
+ 1] << 16)
8505 | (contents
[i
+ 2] << 8)
8507 : (contents
[i
+ 3] << 24)
8508 | (contents
[i
+ 2] << 16)
8509 | (contents
[i
+ 1] << 8)
8511 unsigned int writemask
= 0;
8512 enum bfd_arm_vfp11_pipe vpipe
;
8517 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8519 /* I'm assuming the VFP11 erratum can trigger with denorm
8520 operands on either the FMAC or the DS pipeline. This might
8521 lead to slightly overenthusiastic veneer insertion. */
8522 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8524 state
= use_vector
? 1 : 2;
8526 veneer_of_insn
= insn
;
8532 int other_regs
[3], other_numregs
;
8533 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8536 if (vpipe
!= VFP11_BAD
8537 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8547 int other_regs
[3], other_numregs
;
8548 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8551 if (vpipe
!= VFP11_BAD
8552 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8558 next_i
= first_fmac
+ 4;
8564 abort (); /* Should be unreachable. */
8569 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8570 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8572 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8574 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8579 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8586 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8591 newerr
->next
= sec_data
->erratumlist
;
8592 sec_data
->erratumlist
= newerr
;
8601 if (contents
!= NULL
8602 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8610 if (contents
!= NULL
8611 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8617 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8618 after sections have been laid out, using specially-named symbols. */
8621 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8622 struct bfd_link_info
*link_info
)
8625 struct elf32_arm_link_hash_table
*globals
;
8628 if (bfd_link_relocatable (link_info
))
8631 /* Skip if this bfd does not correspond to an ELF image. */
8632 if (! is_arm_elf (abfd
))
8635 globals
= elf32_arm_hash_table (link_info
);
8636 if (globals
== NULL
)
8639 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8640 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8642 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8644 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8645 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8647 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8649 struct elf_link_hash_entry
*myh
;
8652 switch (errnode
->type
)
8654 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8655 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8656 /* Find veneer symbol. */
8657 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8658 errnode
->u
.b
.veneer
->u
.v
.id
);
8660 myh
= elf_link_hash_lookup
8661 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8664 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8665 abfd
, "VFP11", tmp_name
);
8667 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8668 + myh
->root
.u
.def
.section
->output_offset
8669 + myh
->root
.u
.def
.value
;
8671 errnode
->u
.b
.veneer
->vma
= vma
;
8674 case VFP11_ERRATUM_ARM_VENEER
:
8675 case VFP11_ERRATUM_THUMB_VENEER
:
8676 /* Find return location. */
8677 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8680 myh
= elf_link_hash_lookup
8681 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8684 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8685 abfd
, "VFP11", tmp_name
);
8687 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8688 + myh
->root
.u
.def
.section
->output_offset
8689 + myh
->root
.u
.def
.value
;
8691 errnode
->u
.v
.branch
->vma
= vma
;
8703 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8704 return locations after sections have been laid out, using
8705 specially-named symbols. */
8708 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8709 struct bfd_link_info
*link_info
)
8712 struct elf32_arm_link_hash_table
*globals
;
8715 if (bfd_link_relocatable (link_info
))
8718 /* Skip if this bfd does not correspond to an ELF image. */
8719 if (! is_arm_elf (abfd
))
8722 globals
= elf32_arm_hash_table (link_info
);
8723 if (globals
== NULL
)
8726 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8727 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8729 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8731 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8732 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8734 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8736 struct elf_link_hash_entry
*myh
;
8739 switch (errnode
->type
)
8741 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8742 /* Find veneer symbol. */
8743 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8744 errnode
->u
.b
.veneer
->u
.v
.id
);
8746 myh
= elf_link_hash_lookup
8747 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8750 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8751 abfd
, "STM32L4XX", tmp_name
);
8753 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8754 + myh
->root
.u
.def
.section
->output_offset
8755 + myh
->root
.u
.def
.value
;
8757 errnode
->u
.b
.veneer
->vma
= vma
;
8760 case STM32L4XX_ERRATUM_VENEER
:
8761 /* Find return location. */
8762 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8765 myh
= elf_link_hash_lookup
8766 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8769 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8770 abfd
, "STM32L4XX", tmp_name
);
8772 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8773 + myh
->root
.u
.def
.section
->output_offset
8774 + myh
->root
.u
.def
.value
;
8776 errnode
->u
.v
.branch
->vma
= vma
;
8788 static inline bfd_boolean
8789 is_thumb2_ldmia (const insn32 insn
)
8791 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8792 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8793 return (insn
& 0xffd02000) == 0xe8900000;
8796 static inline bfd_boolean
8797 is_thumb2_ldmdb (const insn32 insn
)
8799 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8800 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8801 return (insn
& 0xffd02000) == 0xe9100000;
8804 static inline bfd_boolean
8805 is_thumb2_vldm (const insn32 insn
)
8807 /* A6.5 Extension register load or store instruction
8809 We look for SP 32-bit and DP 64-bit registers.
8810 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8811 <list> is consecutive 64-bit registers
8812 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8813 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8814 <list> is consecutive 32-bit registers
8815 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8816 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8817 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8819 (((insn
& 0xfe100f00) == 0xec100b00) ||
8820 ((insn
& 0xfe100f00) == 0xec100a00))
8821 && /* (IA without !). */
8822 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8823 /* (IA with !), includes VPOP (when reg number is SP). */
8824 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8826 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8829 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8831 - computes the number and the mode of memory accesses
8832 - decides if the replacement should be done:
8833 . replaces only if > 8-word accesses
8834 . or (testing purposes only) replaces all accesses. */
8837 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8838 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8842 /* The field encoding the register list is the same for both LDMIA
8843 and LDMDB encodings. */
8844 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8845 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8846 else if (is_thumb2_vldm (insn
))
8847 nb_words
= (insn
& 0xff);
8849 /* DEFAULT mode accounts for the real bug condition situation,
8850 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8852 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8853 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8856 /* Look for potentially-troublesome code sequences which might trigger
8857 the STM STM32L4XX erratum. */
8860 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8861 struct bfd_link_info
*link_info
)
8864 bfd_byte
*contents
= NULL
;
8865 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8867 if (globals
== NULL
)
8870 /* If we are only performing a partial link do not bother
8871 to construct any glue. */
8872 if (bfd_link_relocatable (link_info
))
8875 /* Skip if this bfd does not correspond to an ELF image. */
8876 if (! is_arm_elf (abfd
))
8879 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8882 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8883 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8886 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8888 unsigned int i
, span
;
8889 struct _arm_elf_section_data
*sec_data
;
8891 /* If we don't have executable progbits, we're not interested in this
8892 section. Also skip if section is to be excluded. */
8893 if (elf_section_type (sec
) != SHT_PROGBITS
8894 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8895 || (sec
->flags
& SEC_EXCLUDE
) != 0
8896 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8897 || sec
->output_section
== bfd_abs_section_ptr
8898 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8901 sec_data
= elf32_arm_section_data (sec
);
8903 if (sec_data
->mapcount
== 0)
8906 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8907 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8908 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8911 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8912 elf32_arm_compare_mapping
);
8914 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8916 unsigned int span_start
= sec_data
->map
[span
].vma
;
8917 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8918 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8919 char span_type
= sec_data
->map
[span
].type
;
8920 int itblock_current_pos
= 0;
8922 /* Only Thumb2 mode need be supported with this CM4 specific
8923 code, we should not encounter any arm mode eg span_type
8925 if (span_type
!= 't')
8928 for (i
= span_start
; i
< span_end
;)
8930 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8931 bfd_boolean insn_32bit
= FALSE
;
8932 bfd_boolean is_ldm
= FALSE
;
8933 bfd_boolean is_vldm
= FALSE
;
8934 bfd_boolean is_not_last_in_it_block
= FALSE
;
8936 /* The first 16-bits of all 32-bit thumb2 instructions start
8937 with opcode[15..13]=0b111 and the encoded op1 can be anything
8938 except opcode[12..11]!=0b00.
8939 See 32-bit Thumb instruction encoding. */
8940 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8943 /* Compute the predicate that tells if the instruction
8944 is concerned by the IT block
8945 - Creates an error if there is a ldm that is not
8946 last in the IT block thus cannot be replaced
8947 - Otherwise we can create a branch at the end of the
8948 IT block, it will be controlled naturally by IT
8949 with the proper pseudo-predicate
8950 - So the only interesting predicate is the one that
8951 tells that we are not on the last item of an IT
8953 if (itblock_current_pos
!= 0)
8954 is_not_last_in_it_block
= !!--itblock_current_pos
;
8958 /* Load the rest of the insn (in manual-friendly order). */
8959 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8960 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8961 is_vldm
= is_thumb2_vldm (insn
);
8963 /* Veneers are created for (v)ldm depending on
8964 option flags and memory accesses conditions; but
8965 if the instruction is not the last instruction of
8966 an IT block, we cannot create a jump there, so we
8968 if ((is_ldm
|| is_vldm
)
8969 && stm32l4xx_need_create_replacing_stub
8970 (insn
, globals
->stm32l4xx_fix
))
8972 if (is_not_last_in_it_block
)
8975 /* xgettext:c-format */
8976 (_("%pB(%pA+%#x): error: multiple load detected"
8977 " in non-last IT block instruction:"
8978 " STM32L4XX veneer cannot be generated; "
8979 "use gcc option -mrestrict-it to generate"
8980 " only one instruction per IT block"),
8985 elf32_stm32l4xx_erratum_list
*newerr
=
8986 (elf32_stm32l4xx_erratum_list
*)
8988 (sizeof (elf32_stm32l4xx_erratum_list
));
8990 elf32_arm_section_data (sec
)
8991 ->stm32l4xx_erratumcount
+= 1;
8992 newerr
->u
.b
.insn
= insn
;
8993 /* We create only thumb branches. */
8995 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8996 record_stm32l4xx_erratum_veneer
8997 (link_info
, newerr
, abfd
, sec
,
9000 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
9001 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
9003 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
9004 sec_data
->stm32l4xx_erratumlist
= newerr
;
9011 IT blocks are only encoded in T1
9012 Encoding T1: IT{x{y{z}}} <firstcond>
9013 1 0 1 1 - 1 1 1 1 - firstcond - mask
9014 if mask = '0000' then see 'related encodings'
9015 We don't deal with UNPREDICTABLE, just ignore these.
9016 There can be no nested IT blocks so an IT block
9017 is naturally a new one for which it is worth
9018 computing its size. */
9019 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
9020 && ((insn
& 0x000f) != 0x0000);
9021 /* If we have a new IT block we compute its size. */
9024 /* Compute the number of instructions controlled
9025 by the IT block, it will be used to decide
9026 whether we are inside an IT block or not. */
9027 unsigned int mask
= insn
& 0x000f;
9028 itblock_current_pos
= 4 - ctz (mask
);
9032 i
+= insn_32bit
? 4 : 2;
9036 if (contents
!= NULL
9037 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9045 if (contents
!= NULL
9046 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9052 /* Set target relocation values needed during linking. */
9055 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
9056 struct bfd_link_info
*link_info
,
9057 struct elf32_arm_params
*params
)
9059 struct elf32_arm_link_hash_table
*globals
;
9061 globals
= elf32_arm_hash_table (link_info
);
9062 if (globals
== NULL
)
9065 globals
->target1_is_rel
= params
->target1_is_rel
;
9066 if (globals
->fdpic_p
)
9067 globals
->target2_reloc
= R_ARM_GOT32
;
9068 else if (strcmp (params
->target2_type
, "rel") == 0)
9069 globals
->target2_reloc
= R_ARM_REL32
;
9070 else if (strcmp (params
->target2_type
, "abs") == 0)
9071 globals
->target2_reloc
= R_ARM_ABS32
;
9072 else if (strcmp (params
->target2_type
, "got-rel") == 0)
9073 globals
->target2_reloc
= R_ARM_GOT_PREL
;
9076 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9077 params
->target2_type
);
9079 globals
->fix_v4bx
= params
->fix_v4bx
;
9080 globals
->use_blx
|= params
->use_blx
;
9081 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
9082 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
9083 if (globals
->fdpic_p
)
9084 globals
->pic_veneer
= 1;
9086 globals
->pic_veneer
= params
->pic_veneer
;
9087 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
9088 globals
->fix_arm1176
= params
->fix_arm1176
;
9089 globals
->cmse_implib
= params
->cmse_implib
;
9090 globals
->in_implib_bfd
= params
->in_implib_bfd
;
9092 BFD_ASSERT (is_arm_elf (output_bfd
));
9093 elf_arm_tdata (output_bfd
)->no_enum_size_warning
9094 = params
->no_enum_size_warning
;
9095 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
9096 = params
->no_wchar_size_warning
;
9099 /* Replace the target offset of a Thumb bl or b.w instruction. */
9102 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
9108 BFD_ASSERT ((offset
& 1) == 0);
9110 upper
= bfd_get_16 (abfd
, insn
);
9111 lower
= bfd_get_16 (abfd
, insn
+ 2);
9112 reloc_sign
= (offset
< 0) ? 1 : 0;
9113 upper
= (upper
& ~(bfd_vma
) 0x7ff)
9114 | ((offset
>> 12) & 0x3ff)
9115 | (reloc_sign
<< 10);
9116 lower
= (lower
& ~(bfd_vma
) 0x2fff)
9117 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
9118 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
9119 | ((offset
>> 1) & 0x7ff);
9120 bfd_put_16 (abfd
, upper
, insn
);
9121 bfd_put_16 (abfd
, lower
, insn
+ 2);
9124 /* Thumb code calling an ARM function. */
9127 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
9131 asection
* input_section
,
9132 bfd_byte
* hit_data
,
9135 bfd_signed_vma addend
,
9137 char **error_message
)
9141 long int ret_offset
;
9142 struct elf_link_hash_entry
* myh
;
9143 struct elf32_arm_link_hash_table
* globals
;
9145 myh
= find_thumb_glue (info
, name
, error_message
);
9149 globals
= elf32_arm_hash_table (info
);
9150 BFD_ASSERT (globals
!= NULL
);
9151 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9153 my_offset
= myh
->root
.u
.def
.value
;
9155 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9156 THUMB2ARM_GLUE_SECTION_NAME
);
9158 BFD_ASSERT (s
!= NULL
);
9159 BFD_ASSERT (s
->contents
!= NULL
);
9160 BFD_ASSERT (s
->output_section
!= NULL
);
9162 if ((my_offset
& 0x01) == 0x01)
9165 && sym_sec
->owner
!= NULL
9166 && !INTERWORK_FLAG (sym_sec
->owner
))
9169 (_("%pB(%s): warning: interworking not enabled;"
9170 " first occurrence: %pB: %s call to %s"),
9171 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
9177 myh
->root
.u
.def
.value
= my_offset
;
9179 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
9180 s
->contents
+ my_offset
);
9182 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
9183 s
->contents
+ my_offset
+ 2);
9186 /* Address of destination of the stub. */
9187 ((bfd_signed_vma
) val
)
9189 /* Offset from the start of the current section
9190 to the start of the stubs. */
9192 /* Offset of the start of this stub from the start of the stubs. */
9194 /* Address of the start of the current section. */
9195 + s
->output_section
->vma
)
9196 /* The branch instruction is 4 bytes into the stub. */
9198 /* ARM branches work from the pc of the instruction + 8. */
9201 put_arm_insn (globals
, output_bfd
,
9202 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
9203 s
->contents
+ my_offset
+ 4);
9206 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
9208 /* Now go back and fix up the original BL insn to point to here. */
9210 /* Address of where the stub is located. */
9211 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
9212 /* Address of where the BL is located. */
9213 - (input_section
->output_section
->vma
+ input_section
->output_offset
9215 /* Addend in the relocation. */
9217 /* Biassing for PC-relative addressing. */
9220 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
9225 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9227 static struct elf_link_hash_entry
*
9228 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
9235 char ** error_message
)
9238 long int ret_offset
;
9239 struct elf_link_hash_entry
* myh
;
9240 struct elf32_arm_link_hash_table
* globals
;
9242 myh
= find_arm_glue (info
, name
, error_message
);
9246 globals
= elf32_arm_hash_table (info
);
9247 BFD_ASSERT (globals
!= NULL
);
9248 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9250 my_offset
= myh
->root
.u
.def
.value
;
9252 if ((my_offset
& 0x01) == 0x01)
9255 && sym_sec
->owner
!= NULL
9256 && !INTERWORK_FLAG (sym_sec
->owner
))
9259 (_("%pB(%s): warning: interworking not enabled;"
9260 " first occurrence: %pB: %s call to %s"),
9261 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
9265 myh
->root
.u
.def
.value
= my_offset
;
9267 if (bfd_link_pic (info
)
9268 || globals
->root
.is_relocatable_executable
9269 || globals
->pic_veneer
)
9271 /* For relocatable objects we can't use absolute addresses,
9272 so construct the address from a relative offset. */
9273 /* TODO: If the offset is small it's probably worth
9274 constructing the address with adds. */
9275 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
9276 s
->contents
+ my_offset
);
9277 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
9278 s
->contents
+ my_offset
+ 4);
9279 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
9280 s
->contents
+ my_offset
+ 8);
9281 /* Adjust the offset by 4 for the position of the add,
9282 and 8 for the pipeline offset. */
9283 ret_offset
= (val
- (s
->output_offset
9284 + s
->output_section
->vma
9287 bfd_put_32 (output_bfd
, ret_offset
,
9288 s
->contents
+ my_offset
+ 12);
9290 else if (globals
->use_blx
)
9292 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
9293 s
->contents
+ my_offset
);
9295 /* It's a thumb address. Add the low order bit. */
9296 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
9297 s
->contents
+ my_offset
+ 4);
9301 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
9302 s
->contents
+ my_offset
);
9304 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
9305 s
->contents
+ my_offset
+ 4);
9307 /* It's a thumb address. Add the low order bit. */
9308 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
9309 s
->contents
+ my_offset
+ 8);
9315 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
9320 /* Arm code calling a Thumb function. */
9323 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
9327 asection
* input_section
,
9328 bfd_byte
* hit_data
,
9331 bfd_signed_vma addend
,
9333 char **error_message
)
9335 unsigned long int tmp
;
9338 long int ret_offset
;
9339 struct elf_link_hash_entry
* myh
;
9340 struct elf32_arm_link_hash_table
* globals
;
9342 globals
= elf32_arm_hash_table (info
);
9343 BFD_ASSERT (globals
!= NULL
);
9344 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9346 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9347 ARM2THUMB_GLUE_SECTION_NAME
);
9348 BFD_ASSERT (s
!= NULL
);
9349 BFD_ASSERT (s
->contents
!= NULL
);
9350 BFD_ASSERT (s
->output_section
!= NULL
);
9352 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
9353 sym_sec
, val
, s
, error_message
);
9357 my_offset
= myh
->root
.u
.def
.value
;
9358 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9359 tmp
= tmp
& 0xFF000000;
9361 /* Somehow these are both 4 too far, so subtract 8. */
9362 ret_offset
= (s
->output_offset
9364 + s
->output_section
->vma
9365 - (input_section
->output_offset
9366 + input_section
->output_section
->vma
9370 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9372 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9377 /* Populate Arm stub for an exported Thumb function. */
9380 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9382 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9384 struct elf_link_hash_entry
* myh
;
9385 struct elf32_arm_link_hash_entry
*eh
;
9386 struct elf32_arm_link_hash_table
* globals
;
9389 char *error_message
;
9391 eh
= elf32_arm_hash_entry (h
);
9392 /* Allocate stubs for exported Thumb functions on v4t. */
9393 if (eh
->export_glue
== NULL
)
9396 globals
= elf32_arm_hash_table (info
);
9397 BFD_ASSERT (globals
!= NULL
);
9398 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9400 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9401 ARM2THUMB_GLUE_SECTION_NAME
);
9402 BFD_ASSERT (s
!= NULL
);
9403 BFD_ASSERT (s
->contents
!= NULL
);
9404 BFD_ASSERT (s
->output_section
!= NULL
);
9406 sec
= eh
->export_glue
->root
.u
.def
.section
;
9408 BFD_ASSERT (sec
->output_section
!= NULL
);
9410 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9411 + sec
->output_section
->vma
;
9413 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9414 h
->root
.u
.def
.section
->owner
,
9415 globals
->obfd
, sec
, val
, s
,
9421 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9424 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9429 struct elf32_arm_link_hash_table
*globals
;
9431 globals
= elf32_arm_hash_table (info
);
9432 BFD_ASSERT (globals
!= NULL
);
9433 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9435 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9436 ARM_BX_GLUE_SECTION_NAME
);
9437 BFD_ASSERT (s
!= NULL
);
9438 BFD_ASSERT (s
->contents
!= NULL
);
9439 BFD_ASSERT (s
->output_section
!= NULL
);
9441 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9443 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9445 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9447 p
= s
->contents
+ glue_addr
;
9448 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9449 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9450 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9451 globals
->bx_glue_offset
[reg
] |= 1;
9454 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9457 /* Generate Arm stubs for exported Thumb symbols. */
9459 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9460 struct bfd_link_info
*link_info
)
9462 struct elf32_arm_link_hash_table
* globals
;
9464 if (link_info
== NULL
)
9465 /* Ignore this if we are not called by the ELF backend linker. */
9468 globals
= elf32_arm_hash_table (link_info
);
9469 if (globals
== NULL
)
9472 /* If blx is available then exported Thumb symbols are OK and there is
9474 if (globals
->use_blx
)
9477 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9481 /* Reserve space for COUNT dynamic relocations in relocation selection
9485 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9486 bfd_size_type count
)
9488 struct elf32_arm_link_hash_table
*htab
;
9490 htab
= elf32_arm_hash_table (info
);
9491 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9494 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9497 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9498 dynamic, the relocations should go in SRELOC, otherwise they should
9499 go in the special .rel.iplt section. */
9502 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9503 bfd_size_type count
)
9505 struct elf32_arm_link_hash_table
*htab
;
9507 htab
= elf32_arm_hash_table (info
);
9508 if (!htab
->root
.dynamic_sections_created
)
9509 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9512 BFD_ASSERT (sreloc
!= NULL
);
9513 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9517 /* Add relocation REL to the end of relocation section SRELOC. */
9520 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9521 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9524 struct elf32_arm_link_hash_table
*htab
;
9526 htab
= elf32_arm_hash_table (info
);
9527 if (!htab
->root
.dynamic_sections_created
9528 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9529 sreloc
= htab
->root
.irelplt
;
9532 loc
= sreloc
->contents
;
9533 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9534 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9536 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9539 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9540 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9544 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9545 bfd_boolean is_iplt_entry
,
9546 union gotplt_union
*root_plt
,
9547 struct arm_plt_info
*arm_plt
)
9549 struct elf32_arm_link_hash_table
*htab
;
9553 htab
= elf32_arm_hash_table (info
);
9557 splt
= htab
->root
.iplt
;
9558 sgotplt
= htab
->root
.igotplt
;
9560 /* NaCl uses a special first entry in .iplt too. */
9561 if (htab
->nacl_p
&& splt
->size
== 0)
9562 splt
->size
+= htab
->plt_header_size
;
9564 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9565 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9569 splt
= htab
->root
.splt
;
9570 sgotplt
= htab
->root
.sgotplt
;
9574 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9575 /* For lazy binding, relocations will be put into .rel.plt, in
9576 .rel.got otherwise. */
9577 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9578 if (info
->flags
& DF_BIND_NOW
)
9579 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
9581 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9585 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9586 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9589 /* If this is the first .plt entry, make room for the special
9591 if (splt
->size
== 0)
9592 splt
->size
+= htab
->plt_header_size
;
9594 htab
->next_tls_desc_index
++;
9597 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9598 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9599 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9600 root_plt
->offset
= splt
->size
;
9601 splt
->size
+= htab
->plt_entry_size
;
9603 if (!htab
->symbian_p
)
9605 /* We also need to make an entry in the .got.plt section, which
9606 will be placed in the .got section by the linker script. */
9608 arm_plt
->got_offset
= sgotplt
->size
;
9610 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9612 /* Function descriptor takes 64 bits in GOT. */
9620 arm_movw_immediate (bfd_vma value
)
9622 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9626 arm_movt_immediate (bfd_vma value
)
9628 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9631 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9632 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9633 Otherwise, DYNINDX is the index of the symbol in the dynamic
9634 symbol table and SYM_VALUE is undefined.
9636 ROOT_PLT points to the offset of the PLT entry from the start of its
9637 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9638 bookkeeping information.
9640 Returns FALSE if there was a problem. */
9643 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9644 union gotplt_union
*root_plt
,
9645 struct arm_plt_info
*arm_plt
,
9646 int dynindx
, bfd_vma sym_value
)
9648 struct elf32_arm_link_hash_table
*htab
;
9654 Elf_Internal_Rela rel
;
9655 bfd_vma plt_header_size
;
9656 bfd_vma got_header_size
;
9658 htab
= elf32_arm_hash_table (info
);
9660 /* Pick the appropriate sections and sizes. */
9663 splt
= htab
->root
.iplt
;
9664 sgot
= htab
->root
.igotplt
;
9665 srel
= htab
->root
.irelplt
;
9667 /* There are no reserved entries in .igot.plt, and no special
9668 first entry in .iplt. */
9669 got_header_size
= 0;
9670 plt_header_size
= 0;
9674 splt
= htab
->root
.splt
;
9675 sgot
= htab
->root
.sgotplt
;
9676 srel
= htab
->root
.srelplt
;
9678 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9679 plt_header_size
= htab
->plt_header_size
;
9681 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9683 /* Fill in the entry in the procedure linkage table. */
9684 if (htab
->symbian_p
)
9686 BFD_ASSERT (dynindx
>= 0);
9687 put_arm_insn (htab
, output_bfd
,
9688 elf32_arm_symbian_plt_entry
[0],
9689 splt
->contents
+ root_plt
->offset
);
9690 bfd_put_32 (output_bfd
,
9691 elf32_arm_symbian_plt_entry
[1],
9692 splt
->contents
+ root_plt
->offset
+ 4);
9694 /* Fill in the entry in the .rel.plt section. */
9695 rel
.r_offset
= (splt
->output_section
->vma
9696 + splt
->output_offset
9697 + root_plt
->offset
+ 4);
9698 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9700 /* Get the index in the procedure linkage table which
9701 corresponds to this symbol. This is the index of this symbol
9702 in all the symbols for which we are making plt entries. The
9703 first entry in the procedure linkage table is reserved. */
9704 plt_index
= ((root_plt
->offset
- plt_header_size
)
9705 / htab
->plt_entry_size
);
9709 bfd_vma got_offset
, got_address
, plt_address
;
9710 bfd_vma got_displacement
, initial_got_entry
;
9713 BFD_ASSERT (sgot
!= NULL
);
9715 /* Get the offset into the .(i)got.plt table of the entry that
9716 corresponds to this function. */
9717 got_offset
= (arm_plt
->got_offset
& -2);
9719 /* Get the index in the procedure linkage table which
9720 corresponds to this symbol. This is the index of this symbol
9721 in all the symbols for which we are making plt entries.
9722 After the reserved .got.plt entries, all symbols appear in
9723 the same order as in .plt. */
9725 /* Function descriptor takes 8 bytes. */
9726 plt_index
= (got_offset
- got_header_size
) / 8;
9728 plt_index
= (got_offset
- got_header_size
) / 4;
9730 /* Calculate the address of the GOT entry. */
9731 got_address
= (sgot
->output_section
->vma
9732 + sgot
->output_offset
9735 /* ...and the address of the PLT entry. */
9736 plt_address
= (splt
->output_section
->vma
9737 + splt
->output_offset
9738 + root_plt
->offset
);
9740 ptr
= splt
->contents
+ root_plt
->offset
;
9741 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9746 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9748 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9750 val
|= got_address
- sgot
->output_section
->vma
;
9752 val
|= plt_index
* RELOC_SIZE (htab
);
9753 if (i
== 2 || i
== 5)
9754 bfd_put_32 (output_bfd
, val
, ptr
);
9756 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9759 else if (htab
->vxworks_p
)
9764 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9766 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9770 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9772 val
|= plt_index
* RELOC_SIZE (htab
);
9773 if (i
== 2 || i
== 5)
9774 bfd_put_32 (output_bfd
, val
, ptr
);
9776 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9779 loc
= (htab
->srelplt2
->contents
9780 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9782 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9783 referencing the GOT for this PLT entry. */
9784 rel
.r_offset
= plt_address
+ 8;
9785 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9786 rel
.r_addend
= got_offset
;
9787 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9788 loc
+= RELOC_SIZE (htab
);
9790 /* Create the R_ARM_ABS32 relocation referencing the
9791 beginning of the PLT for this GOT entry. */
9792 rel
.r_offset
= got_address
;
9793 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9795 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9797 else if (htab
->nacl_p
)
9799 /* Calculate the displacement between the PLT slot and the
9800 common tail that's part of the special initial PLT slot. */
9801 int32_t tail_displacement
9802 = ((splt
->output_section
->vma
+ splt
->output_offset
9803 + ARM_NACL_PLT_TAIL_OFFSET
)
9804 - (plt_address
+ htab
->plt_entry_size
+ 4));
9805 BFD_ASSERT ((tail_displacement
& 3) == 0);
9806 tail_displacement
>>= 2;
9808 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9809 || (-tail_displacement
& 0xff000000) == 0);
9811 /* Calculate the displacement between the PLT slot and the entry
9812 in the GOT. The offset accounts for the value produced by
9813 adding to pc in the penultimate instruction of the PLT stub. */
9814 got_displacement
= (got_address
9815 - (plt_address
+ htab
->plt_entry_size
));
9817 /* NaCl does not support interworking at all. */
9818 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9820 put_arm_insn (htab
, output_bfd
,
9821 elf32_arm_nacl_plt_entry
[0]
9822 | arm_movw_immediate (got_displacement
),
9824 put_arm_insn (htab
, output_bfd
,
9825 elf32_arm_nacl_plt_entry
[1]
9826 | arm_movt_immediate (got_displacement
),
9828 put_arm_insn (htab
, output_bfd
,
9829 elf32_arm_nacl_plt_entry
[2],
9831 put_arm_insn (htab
, output_bfd
,
9832 elf32_arm_nacl_plt_entry
[3]
9833 | (tail_displacement
& 0x00ffffff),
9836 else if (htab
->fdpic_p
)
9838 const bfd_vma
*plt_entry
= using_thumb_only(htab
)
9839 ? elf32_arm_fdpic_thumb_plt_entry
9840 : elf32_arm_fdpic_plt_entry
;
9842 /* Fill-up Thumb stub if needed. */
9843 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9845 put_thumb_insn (htab
, output_bfd
,
9846 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9847 put_thumb_insn (htab
, output_bfd
,
9848 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9850 /* As we are using 32 bit instructions even for the Thumb
9851 version, we have to use 'put_arm_insn' instead of
9852 'put_thumb_insn'. */
9853 put_arm_insn(htab
, output_bfd
, plt_entry
[0], ptr
+ 0);
9854 put_arm_insn(htab
, output_bfd
, plt_entry
[1], ptr
+ 4);
9855 put_arm_insn(htab
, output_bfd
, plt_entry
[2], ptr
+ 8);
9856 put_arm_insn(htab
, output_bfd
, plt_entry
[3], ptr
+ 12);
9857 bfd_put_32 (output_bfd
, got_offset
, ptr
+ 16);
9859 if (!(info
->flags
& DF_BIND_NOW
))
9861 /* funcdesc_value_reloc_offset. */
9862 bfd_put_32 (output_bfd
,
9863 htab
->root
.srelplt
->reloc_count
* RELOC_SIZE (htab
),
9865 put_arm_insn(htab
, output_bfd
, plt_entry
[6], ptr
+ 24);
9866 put_arm_insn(htab
, output_bfd
, plt_entry
[7], ptr
+ 28);
9867 put_arm_insn(htab
, output_bfd
, plt_entry
[8], ptr
+ 32);
9868 put_arm_insn(htab
, output_bfd
, plt_entry
[9], ptr
+ 36);
9871 else if (using_thumb_only (htab
))
9873 /* PR ld/16017: Generate thumb only PLT entries. */
9874 if (!using_thumb2 (htab
))
9876 /* FIXME: We ought to be able to generate thumb-1 PLT
9878 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9883 /* Calculate the displacement between the PLT slot and the entry in
9884 the GOT. The 12-byte offset accounts for the value produced by
9885 adding to pc in the 3rd instruction of the PLT stub. */
9886 got_displacement
= got_address
- (plt_address
+ 12);
9888 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9889 instead of 'put_thumb_insn'. */
9890 put_arm_insn (htab
, output_bfd
,
9891 elf32_thumb2_plt_entry
[0]
9892 | ((got_displacement
& 0x000000ff) << 16)
9893 | ((got_displacement
& 0x00000700) << 20)
9894 | ((got_displacement
& 0x00000800) >> 1)
9895 | ((got_displacement
& 0x0000f000) >> 12),
9897 put_arm_insn (htab
, output_bfd
,
9898 elf32_thumb2_plt_entry
[1]
9899 | ((got_displacement
& 0x00ff0000) )
9900 | ((got_displacement
& 0x07000000) << 4)
9901 | ((got_displacement
& 0x08000000) >> 17)
9902 | ((got_displacement
& 0xf0000000) >> 28),
9904 put_arm_insn (htab
, output_bfd
,
9905 elf32_thumb2_plt_entry
[2],
9907 put_arm_insn (htab
, output_bfd
,
9908 elf32_thumb2_plt_entry
[3],
9913 /* Calculate the displacement between the PLT slot and the
9914 entry in the GOT. The eight-byte offset accounts for the
9915 value produced by adding to pc in the first instruction
9917 got_displacement
= got_address
- (plt_address
+ 8);
9919 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9921 put_thumb_insn (htab
, output_bfd
,
9922 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9923 put_thumb_insn (htab
, output_bfd
,
9924 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9927 if (!elf32_arm_use_long_plt_entry
)
9929 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9931 put_arm_insn (htab
, output_bfd
,
9932 elf32_arm_plt_entry_short
[0]
9933 | ((got_displacement
& 0x0ff00000) >> 20),
9935 put_arm_insn (htab
, output_bfd
,
9936 elf32_arm_plt_entry_short
[1]
9937 | ((got_displacement
& 0x000ff000) >> 12),
9939 put_arm_insn (htab
, output_bfd
,
9940 elf32_arm_plt_entry_short
[2]
9941 | (got_displacement
& 0x00000fff),
9943 #ifdef FOUR_WORD_PLT
9944 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9949 put_arm_insn (htab
, output_bfd
,
9950 elf32_arm_plt_entry_long
[0]
9951 | ((got_displacement
& 0xf0000000) >> 28),
9953 put_arm_insn (htab
, output_bfd
,
9954 elf32_arm_plt_entry_long
[1]
9955 | ((got_displacement
& 0x0ff00000) >> 20),
9957 put_arm_insn (htab
, output_bfd
,
9958 elf32_arm_plt_entry_long
[2]
9959 | ((got_displacement
& 0x000ff000) >> 12),
9961 put_arm_insn (htab
, output_bfd
,
9962 elf32_arm_plt_entry_long
[3]
9963 | (got_displacement
& 0x00000fff),
9968 /* Fill in the entry in the .rel(a).(i)plt section. */
9969 rel
.r_offset
= got_address
;
9973 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9974 The dynamic linker or static executable then calls SYM_VALUE
9975 to determine the correct run-time value of the .igot.plt entry. */
9976 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9977 initial_got_entry
= sym_value
;
9981 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9982 used by PLT entry. */
9985 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
9986 initial_got_entry
= 0;
9990 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9991 initial_got_entry
= (splt
->output_section
->vma
9992 + splt
->output_offset
);
9996 /* Fill in the entry in the global offset table. */
9997 bfd_put_32 (output_bfd
, initial_got_entry
,
9998 sgot
->contents
+ got_offset
);
10000 if (htab
->fdpic_p
&& !(info
->flags
& DF_BIND_NOW
))
10002 /* Setup initial funcdesc value. */
10003 /* FIXME: we don't support lazy binding because there is a
10004 race condition between both words getting written and
10005 some other thread attempting to read them. The ARM
10006 architecture does not have an atomic 64 bit load/store
10007 instruction that could be used to prevent it; it is
10008 recommended that threaded FDPIC applications run with the
10009 LD_BIND_NOW environment variable set. */
10010 bfd_put_32(output_bfd
, plt_address
+ 0x18,
10011 sgot
->contents
+ got_offset
);
10012 bfd_put_32(output_bfd
, -1 /*TODO*/,
10013 sgot
->contents
+ got_offset
+ 4);
10018 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
10023 /* For FDPIC we put PLT relocationss into .rel.got when not
10024 lazy binding otherwise we put them in .rel.plt. For now,
10025 we don't support lazy binding so put it in .rel.got. */
10026 if (info
->flags
& DF_BIND_NOW
)
10027 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelgot
, &rel
);
10029 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelplt
, &rel
);
10033 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
10034 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
10041 /* Some relocations map to different relocations depending on the
10042 target. Return the real relocation. */
10045 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
10050 case R_ARM_TARGET1
:
10051 if (globals
->target1_is_rel
)
10052 return R_ARM_REL32
;
10054 return R_ARM_ABS32
;
10056 case R_ARM_TARGET2
:
10057 return globals
->target2_reloc
;
10064 /* Return the base VMA address which should be subtracted from real addresses
10065 when resolving @dtpoff relocation.
10066 This is PT_TLS segment p_vaddr. */
10069 dtpoff_base (struct bfd_link_info
*info
)
10071 /* If tls_sec is NULL, we should have signalled an error already. */
10072 if (elf_hash_table (info
)->tls_sec
== NULL
)
10074 return elf_hash_table (info
)->tls_sec
->vma
;
10077 /* Return the relocation value for @tpoff relocation
10078 if STT_TLS virtual address is ADDRESS. */
10081 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
10083 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10086 /* If tls_sec is NULL, we should have signalled an error already. */
10087 if (htab
->tls_sec
== NULL
)
10089 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
10090 return address
- htab
->tls_sec
->vma
+ base
;
10093 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10094 VALUE is the relocation value. */
10096 static bfd_reloc_status_type
10097 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
10100 return bfd_reloc_overflow
;
10102 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
10103 bfd_put_32 (abfd
, value
, data
);
10104 return bfd_reloc_ok
;
10107 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10108 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10109 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10111 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10112 is to then call final_link_relocate. Return other values in the
10115 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10116 the pre-relaxed code. It would be nice if the relocs were updated
10117 to match the optimization. */
10119 static bfd_reloc_status_type
10120 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
10121 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
10122 Elf_Internal_Rela
*rel
, unsigned long is_local
)
10124 unsigned long insn
;
10126 switch (ELF32_R_TYPE (rel
->r_info
))
10129 return bfd_reloc_notsupported
;
10131 case R_ARM_TLS_GOTDESC
:
10136 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10138 insn
-= 5; /* THUMB */
10140 insn
-= 8; /* ARM */
10142 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10143 return bfd_reloc_continue
;
10145 case R_ARM_THM_TLS_DESCSEQ
:
10147 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
10148 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
10152 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10154 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10158 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10161 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
10163 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
10167 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10170 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
10171 contents
+ rel
->r_offset
);
10175 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10176 /* It's a 32 bit instruction, fetch the rest of it for
10177 error generation. */
10178 insn
= (insn
<< 16)
10179 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
10181 /* xgettext:c-format */
10182 (_("%pB(%pA+%#" PRIx64
"): "
10183 "unexpected %s instruction '%#lx' in TLS trampoline"),
10184 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10186 return bfd_reloc_notsupported
;
10190 case R_ARM_TLS_DESCSEQ
:
10192 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10193 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10197 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
10198 contents
+ rel
->r_offset
);
10200 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10204 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10207 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
10208 contents
+ rel
->r_offset
);
10210 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
10214 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10217 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
10218 contents
+ rel
->r_offset
);
10223 /* xgettext:c-format */
10224 (_("%pB(%pA+%#" PRIx64
"): "
10225 "unexpected %s instruction '%#lx' in TLS trampoline"),
10226 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10228 return bfd_reloc_notsupported
;
10232 case R_ARM_TLS_CALL
:
10233 /* GD->IE relaxation, turn the instruction into 'nop' or
10234 'ldr r0, [pc,r0]' */
10235 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
10236 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10239 case R_ARM_THM_TLS_CALL
:
10240 /* GD->IE relaxation. */
10242 /* add r0,pc; ldr r0, [r0] */
10244 else if (using_thumb2 (globals
))
10251 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
10252 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
10255 return bfd_reloc_ok
;
10258 /* For a given value of n, calculate the value of G_n as required to
10259 deal with group relocations. We return it in the form of an
10260 encoded constant-and-rotation, together with the final residual. If n is
10261 specified as less than zero, then final_residual is filled with the
10262 input value and no further action is performed. */
10265 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
10269 bfd_vma encoded_g_n
= 0;
10270 bfd_vma residual
= value
; /* Also known as Y_n. */
10272 for (current_n
= 0; current_n
<= n
; current_n
++)
10276 /* Calculate which part of the value to mask. */
10283 /* Determine the most significant bit in the residual and
10284 align the resulting value to a 2-bit boundary. */
10285 for (msb
= 30; msb
>= 0; msb
-= 2)
10286 if (residual
& (3 << msb
))
10289 /* The desired shift is now (msb - 6), or zero, whichever
10296 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10297 g_n
= residual
& (0xff << shift
);
10298 encoded_g_n
= (g_n
>> shift
)
10299 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
10301 /* Calculate the residual for the next time around. */
10305 *final_residual
= residual
;
10307 return encoded_g_n
;
10310 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10311 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10314 identify_add_or_sub (bfd_vma insn
)
10316 int opcode
= insn
& 0x1e00000;
10318 if (opcode
== 1 << 23) /* ADD */
10321 if (opcode
== 1 << 22) /* SUB */
10327 /* Perform a relocation as part of a final link. */
10329 static bfd_reloc_status_type
10330 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
10333 asection
* input_section
,
10334 bfd_byte
* contents
,
10335 Elf_Internal_Rela
* rel
,
10337 struct bfd_link_info
* info
,
10338 asection
* sym_sec
,
10339 const char * sym_name
,
10340 unsigned char st_type
,
10341 enum arm_st_branch_type branch_type
,
10342 struct elf_link_hash_entry
* h
,
10343 bfd_boolean
* unresolved_reloc_p
,
10344 char ** error_message
)
10346 unsigned long r_type
= howto
->type
;
10347 unsigned long r_symndx
;
10348 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
10349 bfd_vma
* local_got_offsets
;
10350 bfd_vma
* local_tlsdesc_gotents
;
10353 asection
* sreloc
= NULL
;
10354 asection
* srelgot
;
10356 bfd_signed_vma signed_addend
;
10357 unsigned char dynreloc_st_type
;
10358 bfd_vma dynreloc_value
;
10359 struct elf32_arm_link_hash_table
* globals
;
10360 struct elf32_arm_link_hash_entry
*eh
;
10361 union gotplt_union
*root_plt
;
10362 struct arm_plt_info
*arm_plt
;
10363 bfd_vma plt_offset
;
10364 bfd_vma gotplt_offset
;
10365 bfd_boolean has_iplt_entry
;
10366 bfd_boolean resolved_to_zero
;
10368 globals
= elf32_arm_hash_table (info
);
10369 if (globals
== NULL
)
10370 return bfd_reloc_notsupported
;
10372 BFD_ASSERT (is_arm_elf (input_bfd
));
10373 BFD_ASSERT (howto
!= NULL
);
10375 /* Some relocation types map to different relocations depending on the
10376 target. We pick the right one here. */
10377 r_type
= arm_real_reloc_type (globals
, r_type
);
10379 /* It is possible to have linker relaxations on some TLS access
10380 models. Update our information here. */
10381 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
10383 if (r_type
!= howto
->type
)
10384 howto
= elf32_arm_howto_from_type (r_type
);
10386 eh
= (struct elf32_arm_link_hash_entry
*) h
;
10387 sgot
= globals
->root
.sgot
;
10388 local_got_offsets
= elf_local_got_offsets (input_bfd
);
10389 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
10391 if (globals
->root
.dynamic_sections_created
)
10392 srelgot
= globals
->root
.srelgot
;
10396 r_symndx
= ELF32_R_SYM (rel
->r_info
);
10398 if (globals
->use_rel
)
10400 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
10402 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10404 signed_addend
= -1;
10405 signed_addend
&= ~ howto
->src_mask
;
10406 signed_addend
|= addend
;
10409 signed_addend
= addend
;
10412 addend
= signed_addend
= rel
->r_addend
;
10414 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10415 are resolving a function call relocation. */
10416 if (using_thumb_only (globals
)
10417 && (r_type
== R_ARM_THM_CALL
10418 || r_type
== R_ARM_THM_JUMP24
)
10419 && branch_type
== ST_BRANCH_TO_ARM
)
10420 branch_type
= ST_BRANCH_TO_THUMB
;
10422 /* Record the symbol information that should be used in dynamic
10424 dynreloc_st_type
= st_type
;
10425 dynreloc_value
= value
;
10426 if (branch_type
== ST_BRANCH_TO_THUMB
)
10427 dynreloc_value
|= 1;
10429 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10430 VALUE appropriately for relocations that we resolve at link time. */
10431 has_iplt_entry
= FALSE
;
10432 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
10434 && root_plt
->offset
!= (bfd_vma
) -1)
10436 plt_offset
= root_plt
->offset
;
10437 gotplt_offset
= arm_plt
->got_offset
;
10439 if (h
== NULL
|| eh
->is_iplt
)
10441 has_iplt_entry
= TRUE
;
10442 splt
= globals
->root
.iplt
;
10444 /* Populate .iplt entries here, because not all of them will
10445 be seen by finish_dynamic_symbol. The lower bit is set if
10446 we have already populated the entry. */
10447 if (plt_offset
& 1)
10451 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10452 -1, dynreloc_value
))
10453 root_plt
->offset
|= 1;
10455 return bfd_reloc_notsupported
;
10458 /* Static relocations always resolve to the .iplt entry. */
10459 st_type
= STT_FUNC
;
10460 value
= (splt
->output_section
->vma
10461 + splt
->output_offset
10463 branch_type
= ST_BRANCH_TO_ARM
;
10465 /* If there are non-call relocations that resolve to the .iplt
10466 entry, then all dynamic ones must too. */
10467 if (arm_plt
->noncall_refcount
!= 0)
10469 dynreloc_st_type
= st_type
;
10470 dynreloc_value
= value
;
10474 /* We populate the .plt entry in finish_dynamic_symbol. */
10475 splt
= globals
->root
.splt
;
10480 plt_offset
= (bfd_vma
) -1;
10481 gotplt_offset
= (bfd_vma
) -1;
10484 resolved_to_zero
= (h
!= NULL
10485 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10490 /* We don't need to find a value for this symbol. It's just a
10492 *unresolved_reloc_p
= FALSE
;
10493 return bfd_reloc_ok
;
10496 if (!globals
->vxworks_p
)
10497 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10498 /* Fall through. */
10502 case R_ARM_ABS32_NOI
:
10504 case R_ARM_REL32_NOI
:
10510 /* Handle relocations which should use the PLT entry. ABS32/REL32
10511 will use the symbol's value, which may point to a PLT entry, but we
10512 don't need to handle that here. If we created a PLT entry, all
10513 branches in this object should go to it, except if the PLT is too
10514 far away, in which case a long branch stub should be inserted. */
10515 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10516 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10517 && r_type
!= R_ARM_CALL
10518 && r_type
!= R_ARM_JUMP24
10519 && r_type
!= R_ARM_PLT32
)
10520 && plt_offset
!= (bfd_vma
) -1)
10522 /* If we've created a .plt section, and assigned a PLT entry
10523 to this function, it must either be a STT_GNU_IFUNC reference
10524 or not be known to bind locally. In other cases, we should
10525 have cleared the PLT entry by now. */
10526 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10528 value
= (splt
->output_section
->vma
10529 + splt
->output_offset
10531 *unresolved_reloc_p
= FALSE
;
10532 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10533 contents
, rel
->r_offset
, value
,
10537 /* When generating a shared object or relocatable executable, these
10538 relocations are copied into the output file to be resolved at
10540 if ((bfd_link_pic (info
)
10541 || globals
->root
.is_relocatable_executable
10542 || globals
->fdpic_p
)
10543 && (input_section
->flags
& SEC_ALLOC
)
10544 && !(globals
->vxworks_p
10545 && strcmp (input_section
->output_section
->name
,
10547 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10548 || !SYMBOL_CALLS_LOCAL (info
, h
))
10549 && !(input_bfd
== globals
->stub_bfd
10550 && strstr (input_section
->name
, STUB_SUFFIX
))
10552 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10553 && !resolved_to_zero
)
10554 || h
->root
.type
!= bfd_link_hash_undefweak
)
10555 && r_type
!= R_ARM_PC24
10556 && r_type
!= R_ARM_CALL
10557 && r_type
!= R_ARM_JUMP24
10558 && r_type
!= R_ARM_PREL31
10559 && r_type
!= R_ARM_PLT32
)
10561 Elf_Internal_Rela outrel
;
10562 bfd_boolean skip
, relocate
;
10565 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10566 && !h
->def_regular
)
10568 char *v
= _("shared object");
10570 if (bfd_link_executable (info
))
10571 v
= _("PIE executable");
10574 (_("%pB: relocation %s against external or undefined symbol `%s'"
10575 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10576 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10577 return bfd_reloc_notsupported
;
10580 *unresolved_reloc_p
= FALSE
;
10582 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10584 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10585 ! globals
->use_rel
);
10587 if (sreloc
== NULL
)
10588 return bfd_reloc_notsupported
;
10594 outrel
.r_addend
= addend
;
10596 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10598 if (outrel
.r_offset
== (bfd_vma
) -1)
10600 else if (outrel
.r_offset
== (bfd_vma
) -2)
10601 skip
= TRUE
, relocate
= TRUE
;
10602 outrel
.r_offset
+= (input_section
->output_section
->vma
10603 + input_section
->output_offset
);
10606 memset (&outrel
, 0, sizeof outrel
);
10608 && h
->dynindx
!= -1
10609 && (!bfd_link_pic (info
)
10610 || !(bfd_link_pie (info
)
10611 || SYMBOLIC_BIND (info
, h
))
10612 || !h
->def_regular
))
10613 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10618 /* This symbol is local, or marked to become local. */
10619 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
10620 || (globals
->fdpic_p
&& !bfd_link_pic(info
)));
10621 if (globals
->symbian_p
)
10625 /* On Symbian OS, the data segment and text segement
10626 can be relocated independently. Therefore, we
10627 must indicate the segment to which this
10628 relocation is relative. The BPABI allows us to
10629 use any symbol in the right segment; we just use
10630 the section symbol as it is convenient. (We
10631 cannot use the symbol given by "h" directly as it
10632 will not appear in the dynamic symbol table.)
10634 Note that the dynamic linker ignores the section
10635 symbol value, so we don't subtract osec->vma
10636 from the emitted reloc addend. */
10638 osec
= sym_sec
->output_section
;
10640 osec
= input_section
->output_section
;
10641 symbol
= elf_section_data (osec
)->dynindx
;
10644 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10646 if ((osec
->flags
& SEC_READONLY
) == 0
10647 && htab
->data_index_section
!= NULL
)
10648 osec
= htab
->data_index_section
;
10650 osec
= htab
->text_index_section
;
10651 symbol
= elf_section_data (osec
)->dynindx
;
10653 BFD_ASSERT (symbol
!= 0);
10656 /* On SVR4-ish systems, the dynamic loader cannot
10657 relocate the text and data segments independently,
10658 so the symbol does not matter. */
10660 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10661 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10662 to the .iplt entry. Instead, every non-call reference
10663 must use an R_ARM_IRELATIVE relocation to obtain the
10664 correct run-time address. */
10665 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10666 else if (globals
->fdpic_p
&& !bfd_link_pic(info
))
10669 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10670 if (globals
->use_rel
)
10673 outrel
.r_addend
+= dynreloc_value
;
10677 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
10679 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10681 /* If this reloc is against an external symbol, we do not want to
10682 fiddle with the addend. Otherwise, we need to include the symbol
10683 value so that it becomes an addend for the dynamic reloc. */
10685 return bfd_reloc_ok
;
10687 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10688 contents
, rel
->r_offset
,
10689 dynreloc_value
, (bfd_vma
) 0);
10691 else switch (r_type
)
10694 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10696 case R_ARM_XPC25
: /* Arm BLX instruction. */
10699 case R_ARM_PC24
: /* Arm B/BL instruction. */
10702 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10704 if (r_type
== R_ARM_XPC25
)
10706 /* Check for Arm calling Arm function. */
10707 /* FIXME: Should we translate the instruction into a BL
10708 instruction instead ? */
10709 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10711 (_("\%pB: warning: %s BLX instruction targets"
10712 " %s function '%s'"),
10714 "ARM", h
? h
->root
.root
.string
: "(local)");
10716 else if (r_type
== R_ARM_PC24
)
10718 /* Check for Arm calling Thumb function. */
10719 if (branch_type
== ST_BRANCH_TO_THUMB
)
10721 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10722 output_bfd
, input_section
,
10723 hit_data
, sym_sec
, rel
->r_offset
,
10724 signed_addend
, value
,
10726 return bfd_reloc_ok
;
10728 return bfd_reloc_dangerous
;
10732 /* Check if a stub has to be inserted because the
10733 destination is too far or we are changing mode. */
10734 if ( r_type
== R_ARM_CALL
10735 || r_type
== R_ARM_JUMP24
10736 || r_type
== R_ARM_PLT32
)
10738 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10739 struct elf32_arm_link_hash_entry
*hash
;
10741 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10742 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10743 st_type
, &branch_type
,
10744 hash
, value
, sym_sec
,
10745 input_bfd
, sym_name
);
10747 if (stub_type
!= arm_stub_none
)
10749 /* The target is out of reach, so redirect the
10750 branch to the local stub for this function. */
10751 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10756 if (stub_entry
!= NULL
)
10757 value
= (stub_entry
->stub_offset
10758 + stub_entry
->stub_sec
->output_offset
10759 + stub_entry
->stub_sec
->output_section
->vma
);
10761 if (plt_offset
!= (bfd_vma
) -1)
10762 *unresolved_reloc_p
= FALSE
;
10767 /* If the call goes through a PLT entry, make sure to
10768 check distance to the right destination address. */
10769 if (plt_offset
!= (bfd_vma
) -1)
10771 value
= (splt
->output_section
->vma
10772 + splt
->output_offset
10774 *unresolved_reloc_p
= FALSE
;
10775 /* The PLT entry is in ARM mode, regardless of the
10776 target function. */
10777 branch_type
= ST_BRANCH_TO_ARM
;
10782 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10784 S is the address of the symbol in the relocation.
10785 P is address of the instruction being relocated.
10786 A is the addend (extracted from the instruction) in bytes.
10788 S is held in 'value'.
10789 P is the base address of the section containing the
10790 instruction plus the offset of the reloc into that
10792 (input_section->output_section->vma +
10793 input_section->output_offset +
10795 A is the addend, converted into bytes, ie:
10796 (signed_addend * 4)
10798 Note: None of these operations have knowledge of the pipeline
10799 size of the processor, thus it is up to the assembler to
10800 encode this information into the addend. */
10801 value
-= (input_section
->output_section
->vma
10802 + input_section
->output_offset
);
10803 value
-= rel
->r_offset
;
10804 if (globals
->use_rel
)
10805 value
+= (signed_addend
<< howto
->size
);
10807 /* RELA addends do not have to be adjusted by howto->size. */
10808 value
+= signed_addend
;
10810 signed_addend
= value
;
10811 signed_addend
>>= howto
->rightshift
;
10813 /* A branch to an undefined weak symbol is turned into a jump to
10814 the next instruction unless a PLT entry will be created.
10815 Do the same for local undefined symbols (but not for STN_UNDEF).
10816 The jump to the next instruction is optimized as a NOP depending
10817 on the architecture. */
10818 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10819 && plt_offset
== (bfd_vma
) -1)
10820 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10822 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10824 if (arch_has_arm_nop (globals
))
10825 value
|= 0x0320f000;
10827 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10831 /* Perform a signed range check. */
10832 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10833 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10834 return bfd_reloc_overflow
;
10836 addend
= (value
& 2);
10838 value
= (signed_addend
& howto
->dst_mask
)
10839 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10841 if (r_type
== R_ARM_CALL
)
10843 /* Set the H bit in the BLX instruction. */
10844 if (branch_type
== ST_BRANCH_TO_THUMB
)
10847 value
|= (1 << 24);
10849 value
&= ~(bfd_vma
)(1 << 24);
10852 /* Select the correct instruction (BL or BLX). */
10853 /* Only if we are not handling a BL to a stub. In this
10854 case, mode switching is performed by the stub. */
10855 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10856 value
|= (1 << 28);
10857 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10859 value
&= ~(bfd_vma
)(1 << 28);
10860 value
|= (1 << 24);
10869 if (branch_type
== ST_BRANCH_TO_THUMB
)
10873 case R_ARM_ABS32_NOI
:
10879 if (branch_type
== ST_BRANCH_TO_THUMB
)
10881 value
-= (input_section
->output_section
->vma
10882 + input_section
->output_offset
+ rel
->r_offset
);
10885 case R_ARM_REL32_NOI
:
10887 value
-= (input_section
->output_section
->vma
10888 + input_section
->output_offset
+ rel
->r_offset
);
10892 value
-= (input_section
->output_section
->vma
10893 + input_section
->output_offset
+ rel
->r_offset
);
10894 value
+= signed_addend
;
10895 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10897 /* Check for overflow. */
10898 if ((value
^ (value
>> 1)) & (1 << 30))
10899 return bfd_reloc_overflow
;
10901 value
&= 0x7fffffff;
10902 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10903 if (branch_type
== ST_BRANCH_TO_THUMB
)
10908 bfd_put_32 (input_bfd
, value
, hit_data
);
10909 return bfd_reloc_ok
;
10912 /* PR 16202: Refectch the addend using the correct size. */
10913 if (globals
->use_rel
)
10914 addend
= bfd_get_8 (input_bfd
, hit_data
);
10917 /* There is no way to tell whether the user intended to use a signed or
10918 unsigned addend. When checking for overflow we accept either,
10919 as specified by the AAELF. */
10920 if ((long) value
> 0xff || (long) value
< -0x80)
10921 return bfd_reloc_overflow
;
10923 bfd_put_8 (input_bfd
, value
, hit_data
);
10924 return bfd_reloc_ok
;
10927 /* PR 16202: Refectch the addend using the correct size. */
10928 if (globals
->use_rel
)
10929 addend
= bfd_get_16 (input_bfd
, hit_data
);
10932 /* See comment for R_ARM_ABS8. */
10933 if ((long) value
> 0xffff || (long) value
< -0x8000)
10934 return bfd_reloc_overflow
;
10936 bfd_put_16 (input_bfd
, value
, hit_data
);
10937 return bfd_reloc_ok
;
10939 case R_ARM_THM_ABS5
:
10940 /* Support ldr and str instructions for the thumb. */
10941 if (globals
->use_rel
)
10943 /* Need to refetch addend. */
10944 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10945 /* ??? Need to determine shift amount from operand size. */
10946 addend
>>= howto
->rightshift
;
10950 /* ??? Isn't value unsigned? */
10951 if ((long) value
> 0x1f || (long) value
< -0x10)
10952 return bfd_reloc_overflow
;
10954 /* ??? Value needs to be properly shifted into place first. */
10955 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10956 bfd_put_16 (input_bfd
, value
, hit_data
);
10957 return bfd_reloc_ok
;
10959 case R_ARM_THM_ALU_PREL_11_0
:
10960 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10963 bfd_signed_vma relocation
;
10965 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10966 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10968 if (globals
->use_rel
)
10970 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10971 | ((insn
& (1 << 26)) >> 15);
10972 if (insn
& 0xf00000)
10973 signed_addend
= -signed_addend
;
10976 relocation
= value
+ signed_addend
;
10977 relocation
-= Pa (input_section
->output_section
->vma
10978 + input_section
->output_offset
10981 /* PR 21523: Use an absolute value. The user of this reloc will
10982 have already selected an ADD or SUB insn appropriately. */
10983 value
= llabs (relocation
);
10985 if (value
>= 0x1000)
10986 return bfd_reloc_overflow
;
10988 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10989 if (branch_type
== ST_BRANCH_TO_THUMB
)
10992 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10993 | ((value
& 0x700) << 4)
10994 | ((value
& 0x800) << 15);
10995 if (relocation
< 0)
10998 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10999 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11001 return bfd_reloc_ok
;
11004 case R_ARM_THM_PC8
:
11005 /* PR 10073: This reloc is not generated by the GNU toolchain,
11006 but it is supported for compatibility with third party libraries
11007 generated by other compilers, specifically the ARM/IAR. */
11010 bfd_signed_vma relocation
;
11012 insn
= bfd_get_16 (input_bfd
, hit_data
);
11014 if (globals
->use_rel
)
11015 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
11017 relocation
= value
+ addend
;
11018 relocation
-= Pa (input_section
->output_section
->vma
11019 + input_section
->output_offset
11022 value
= relocation
;
11024 /* We do not check for overflow of this reloc. Although strictly
11025 speaking this is incorrect, it appears to be necessary in order
11026 to work with IAR generated relocs. Since GCC and GAS do not
11027 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
11028 a problem for them. */
11031 insn
= (insn
& 0xff00) | (value
>> 2);
11033 bfd_put_16 (input_bfd
, insn
, hit_data
);
11035 return bfd_reloc_ok
;
11038 case R_ARM_THM_PC12
:
11039 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11042 bfd_signed_vma relocation
;
11044 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
11045 | bfd_get_16 (input_bfd
, hit_data
+ 2);
11047 if (globals
->use_rel
)
11049 signed_addend
= insn
& 0xfff;
11050 if (!(insn
& (1 << 23)))
11051 signed_addend
= -signed_addend
;
11054 relocation
= value
+ signed_addend
;
11055 relocation
-= Pa (input_section
->output_section
->vma
11056 + input_section
->output_offset
11059 value
= relocation
;
11061 if (value
>= 0x1000)
11062 return bfd_reloc_overflow
;
11064 insn
= (insn
& 0xff7ff000) | value
;
11065 if (relocation
>= 0)
11068 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11069 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11071 return bfd_reloc_ok
;
11074 case R_ARM_THM_XPC22
:
11075 case R_ARM_THM_CALL
:
11076 case R_ARM_THM_JUMP24
:
11077 /* Thumb BL (branch long instruction). */
11079 bfd_vma relocation
;
11080 bfd_vma reloc_sign
;
11081 bfd_boolean overflow
= FALSE
;
11082 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11083 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11084 bfd_signed_vma reloc_signed_max
;
11085 bfd_signed_vma reloc_signed_min
;
11087 bfd_signed_vma signed_check
;
11089 const int thumb2
= using_thumb2 (globals
);
11090 const int thumb2_bl
= using_thumb2_bl (globals
);
11092 /* A branch to an undefined weak symbol is turned into a jump to
11093 the next instruction unless a PLT entry will be created.
11094 The jump to the next instruction is optimized as a NOP.W for
11095 Thumb-2 enabled architectures. */
11096 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
11097 && plt_offset
== (bfd_vma
) -1)
11101 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
11102 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
11106 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
11107 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
11109 return bfd_reloc_ok
;
11112 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11113 with Thumb-1) involving the J1 and J2 bits. */
11114 if (globals
->use_rel
)
11116 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
11117 bfd_vma upper
= upper_insn
& 0x3ff;
11118 bfd_vma lower
= lower_insn
& 0x7ff;
11119 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
11120 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
11121 bfd_vma i1
= j1
^ s
? 0 : 1;
11122 bfd_vma i2
= j2
^ s
? 0 : 1;
11124 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
11126 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
11128 signed_addend
= addend
;
11131 if (r_type
== R_ARM_THM_XPC22
)
11133 /* Check for Thumb to Thumb call. */
11134 /* FIXME: Should we translate the instruction into a BL
11135 instruction instead ? */
11136 if (branch_type
== ST_BRANCH_TO_THUMB
)
11138 (_("%pB: warning: %s BLX instruction targets"
11139 " %s function '%s'"),
11140 input_bfd
, "Thumb",
11141 "Thumb", h
? h
->root
.root
.string
: "(local)");
11145 /* If it is not a call to Thumb, assume call to Arm.
11146 If it is a call relative to a section name, then it is not a
11147 function call at all, but rather a long jump. Calls through
11148 the PLT do not require stubs. */
11149 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
11151 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
11153 /* Convert BL to BLX. */
11154 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11156 else if (( r_type
!= R_ARM_THM_CALL
)
11157 && (r_type
!= R_ARM_THM_JUMP24
))
11159 if (elf32_thumb_to_arm_stub
11160 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
11161 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
11163 return bfd_reloc_ok
;
11165 return bfd_reloc_dangerous
;
11168 else if (branch_type
== ST_BRANCH_TO_THUMB
11169 && globals
->use_blx
11170 && r_type
== R_ARM_THM_CALL
)
11172 /* Make sure this is a BL. */
11173 lower_insn
|= 0x1800;
11177 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11178 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
11180 /* Check if a stub has to be inserted because the destination
11182 struct elf32_arm_stub_hash_entry
*stub_entry
;
11183 struct elf32_arm_link_hash_entry
*hash
;
11185 hash
= (struct elf32_arm_link_hash_entry
*) h
;
11187 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11188 st_type
, &branch_type
,
11189 hash
, value
, sym_sec
,
11190 input_bfd
, sym_name
);
11192 if (stub_type
!= arm_stub_none
)
11194 /* The target is out of reach or we are changing modes, so
11195 redirect the branch to the local stub for this
11197 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11201 if (stub_entry
!= NULL
)
11203 value
= (stub_entry
->stub_offset
11204 + stub_entry
->stub_sec
->output_offset
11205 + stub_entry
->stub_sec
->output_section
->vma
);
11207 if (plt_offset
!= (bfd_vma
) -1)
11208 *unresolved_reloc_p
= FALSE
;
11211 /* If this call becomes a call to Arm, force BLX. */
11212 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
11215 && !arm_stub_is_thumb (stub_entry
->stub_type
))
11216 || branch_type
!= ST_BRANCH_TO_THUMB
)
11217 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11222 /* Handle calls via the PLT. */
11223 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
11225 value
= (splt
->output_section
->vma
11226 + splt
->output_offset
11229 if (globals
->use_blx
11230 && r_type
== R_ARM_THM_CALL
11231 && ! using_thumb_only (globals
))
11233 /* If the Thumb BLX instruction is available, convert
11234 the BL to a BLX instruction to call the ARM-mode
11236 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11237 branch_type
= ST_BRANCH_TO_ARM
;
11241 if (! using_thumb_only (globals
))
11242 /* Target the Thumb stub before the ARM PLT entry. */
11243 value
-= PLT_THUMB_STUB_SIZE
;
11244 branch_type
= ST_BRANCH_TO_THUMB
;
11246 *unresolved_reloc_p
= FALSE
;
11249 relocation
= value
+ signed_addend
;
11251 relocation
-= (input_section
->output_section
->vma
11252 + input_section
->output_offset
11255 check
= relocation
>> howto
->rightshift
;
11257 /* If this is a signed value, the rightshift just dropped
11258 leading 1 bits (assuming twos complement). */
11259 if ((bfd_signed_vma
) relocation
>= 0)
11260 signed_check
= check
;
11262 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
11264 /* Calculate the permissable maximum and minimum values for
11265 this relocation according to whether we're relocating for
11267 bitsize
= howto
->bitsize
;
11270 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
11271 reloc_signed_min
= ~reloc_signed_max
;
11273 /* Assumes two's complement. */
11274 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11277 if ((lower_insn
& 0x5000) == 0x4000)
11278 /* For a BLX instruction, make sure that the relocation is rounded up
11279 to a word boundary. This follows the semantics of the instruction
11280 which specifies that bit 1 of the target address will come from bit
11281 1 of the base address. */
11282 relocation
= (relocation
+ 2) & ~ 3;
11284 /* Put RELOCATION back into the insn. Assumes two's complement.
11285 We use the Thumb-2 encoding, which is safe even if dealing with
11286 a Thumb-1 instruction by virtue of our overflow check above. */
11287 reloc_sign
= (signed_check
< 0) ? 1 : 0;
11288 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
11289 | ((relocation
>> 12) & 0x3ff)
11290 | (reloc_sign
<< 10);
11291 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
11292 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
11293 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
11294 | ((relocation
>> 1) & 0x7ff);
11296 /* Put the relocated value back in the object file: */
11297 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11298 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11300 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11304 case R_ARM_THM_JUMP19
:
11305 /* Thumb32 conditional branch instruction. */
11307 bfd_vma relocation
;
11308 bfd_boolean overflow
= FALSE
;
11309 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11310 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11311 bfd_signed_vma reloc_signed_max
= 0xffffe;
11312 bfd_signed_vma reloc_signed_min
= -0x100000;
11313 bfd_signed_vma signed_check
;
11314 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11315 struct elf32_arm_stub_hash_entry
*stub_entry
;
11316 struct elf32_arm_link_hash_entry
*hash
;
11318 /* Need to refetch the addend, reconstruct the top three bits,
11319 and squish the two 11 bit pieces together. */
11320 if (globals
->use_rel
)
11322 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
11323 bfd_vma upper
= (upper_insn
& 0x003f);
11324 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
11325 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
11326 bfd_vma lower
= (lower_insn
& 0x07ff);
11330 upper
|= (!S
) << 8;
11331 upper
-= 0x0100; /* Sign extend. */
11333 addend
= (upper
<< 12) | (lower
<< 1);
11334 signed_addend
= addend
;
11337 /* Handle calls via the PLT. */
11338 if (plt_offset
!= (bfd_vma
) -1)
11340 value
= (splt
->output_section
->vma
11341 + splt
->output_offset
11343 /* Target the Thumb stub before the ARM PLT entry. */
11344 value
-= PLT_THUMB_STUB_SIZE
;
11345 *unresolved_reloc_p
= FALSE
;
11348 hash
= (struct elf32_arm_link_hash_entry
*)h
;
11350 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11351 st_type
, &branch_type
,
11352 hash
, value
, sym_sec
,
11353 input_bfd
, sym_name
);
11354 if (stub_type
!= arm_stub_none
)
11356 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11360 if (stub_entry
!= NULL
)
11362 value
= (stub_entry
->stub_offset
11363 + stub_entry
->stub_sec
->output_offset
11364 + stub_entry
->stub_sec
->output_section
->vma
);
11368 relocation
= value
+ signed_addend
;
11369 relocation
-= (input_section
->output_section
->vma
11370 + input_section
->output_offset
11372 signed_check
= (bfd_signed_vma
) relocation
;
11374 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11377 /* Put RELOCATION back into the insn. */
11379 bfd_vma S
= (relocation
& 0x00100000) >> 20;
11380 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
11381 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
11382 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
11383 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
11385 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
11386 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
11389 /* Put the relocated value back in the object file: */
11390 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11391 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11393 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11396 case R_ARM_THM_JUMP11
:
11397 case R_ARM_THM_JUMP8
:
11398 case R_ARM_THM_JUMP6
:
11399 /* Thumb B (branch) instruction). */
11401 bfd_signed_vma relocation
;
11402 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
11403 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
11404 bfd_signed_vma signed_check
;
11406 /* CZB cannot jump backward. */
11407 if (r_type
== R_ARM_THM_JUMP6
)
11408 reloc_signed_min
= 0;
11410 if (globals
->use_rel
)
11412 /* Need to refetch addend. */
11413 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
11414 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11416 signed_addend
= -1;
11417 signed_addend
&= ~ howto
->src_mask
;
11418 signed_addend
|= addend
;
11421 signed_addend
= addend
;
11422 /* The value in the insn has been right shifted. We need to
11423 undo this, so that we can perform the address calculation
11424 in terms of bytes. */
11425 signed_addend
<<= howto
->rightshift
;
11427 relocation
= value
+ signed_addend
;
11429 relocation
-= (input_section
->output_section
->vma
11430 + input_section
->output_offset
11433 relocation
>>= howto
->rightshift
;
11434 signed_check
= relocation
;
11436 if (r_type
== R_ARM_THM_JUMP6
)
11437 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
11439 relocation
&= howto
->dst_mask
;
11440 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
11442 bfd_put_16 (input_bfd
, relocation
, hit_data
);
11444 /* Assumes two's complement. */
11445 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11446 return bfd_reloc_overflow
;
11448 return bfd_reloc_ok
;
11451 case R_ARM_ALU_PCREL7_0
:
11452 case R_ARM_ALU_PCREL15_8
:
11453 case R_ARM_ALU_PCREL23_15
:
11456 bfd_vma relocation
;
11458 insn
= bfd_get_32 (input_bfd
, hit_data
);
11459 if (globals
->use_rel
)
11461 /* Extract the addend. */
11462 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11463 signed_addend
= addend
;
11465 relocation
= value
+ signed_addend
;
11467 relocation
-= (input_section
->output_section
->vma
11468 + input_section
->output_offset
11470 insn
= (insn
& ~0xfff)
11471 | ((howto
->bitpos
<< 7) & 0xf00)
11472 | ((relocation
>> howto
->bitpos
) & 0xff);
11473 bfd_put_32 (input_bfd
, value
, hit_data
);
11475 return bfd_reloc_ok
;
11477 case R_ARM_GNU_VTINHERIT
:
11478 case R_ARM_GNU_VTENTRY
:
11479 return bfd_reloc_ok
;
11481 case R_ARM_GOTOFF32
:
11482 /* Relocation is relative to the start of the
11483 global offset table. */
11485 BFD_ASSERT (sgot
!= NULL
);
11487 return bfd_reloc_notsupported
;
11489 /* If we are addressing a Thumb function, we need to adjust the
11490 address by one, so that attempts to call the function pointer will
11491 correctly interpret it as Thumb code. */
11492 if (branch_type
== ST_BRANCH_TO_THUMB
)
11495 /* Note that sgot->output_offset is not involved in this
11496 calculation. We always want the start of .got. If we
11497 define _GLOBAL_OFFSET_TABLE in a different way, as is
11498 permitted by the ABI, we might have to change this
11500 value
-= sgot
->output_section
->vma
;
11501 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11502 contents
, rel
->r_offset
, value
,
11506 /* Use global offset table as symbol value. */
11507 BFD_ASSERT (sgot
!= NULL
);
11510 return bfd_reloc_notsupported
;
11512 *unresolved_reloc_p
= FALSE
;
11513 value
= sgot
->output_section
->vma
;
11514 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11515 contents
, rel
->r_offset
, value
,
11519 case R_ARM_GOT_PREL
:
11520 /* Relocation is to the entry for this symbol in the
11521 global offset table. */
11523 return bfd_reloc_notsupported
;
11525 if (dynreloc_st_type
== STT_GNU_IFUNC
11526 && plt_offset
!= (bfd_vma
) -1
11527 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11529 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11530 symbol, and the relocation resolves directly to the runtime
11531 target rather than to the .iplt entry. This means that any
11532 .got entry would be the same value as the .igot.plt entry,
11533 so there's no point creating both. */
11534 sgot
= globals
->root
.igotplt
;
11535 value
= sgot
->output_offset
+ gotplt_offset
;
11537 else if (h
!= NULL
)
11541 off
= h
->got
.offset
;
11542 BFD_ASSERT (off
!= (bfd_vma
) -1);
11543 if ((off
& 1) != 0)
11545 /* We have already processsed one GOT relocation against
11548 if (globals
->root
.dynamic_sections_created
11549 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11550 *unresolved_reloc_p
= FALSE
;
11554 Elf_Internal_Rela outrel
;
11557 if (((h
->dynindx
!= -1) || globals
->fdpic_p
)
11558 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11560 /* If the symbol doesn't resolve locally in a static
11561 object, we have an undefined reference. If the
11562 symbol doesn't resolve locally in a dynamic object,
11563 it should be resolved by the dynamic linker. */
11564 if (globals
->root
.dynamic_sections_created
)
11566 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11567 *unresolved_reloc_p
= FALSE
;
11571 outrel
.r_addend
= 0;
11575 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11576 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11577 else if (bfd_link_pic (info
)
11578 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11579 || h
->root
.type
!= bfd_link_hash_undefweak
))
11580 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11584 if (globals
->fdpic_p
)
11587 outrel
.r_addend
= dynreloc_value
;
11590 /* The GOT entry is initialized to zero by default.
11591 See if we should install a different value. */
11592 if (outrel
.r_addend
!= 0
11593 && (globals
->use_rel
|| outrel
.r_info
== 0))
11595 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11596 sgot
->contents
+ off
);
11597 outrel
.r_addend
= 0;
11601 arm_elf_add_rofixup (output_bfd
,
11602 elf32_arm_hash_table(info
)->srofixup
,
11603 sgot
->output_section
->vma
11604 + sgot
->output_offset
+ off
);
11606 else if (outrel
.r_info
!= 0)
11608 outrel
.r_offset
= (sgot
->output_section
->vma
11609 + sgot
->output_offset
11611 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11614 h
->got
.offset
|= 1;
11616 value
= sgot
->output_offset
+ off
;
11622 BFD_ASSERT (local_got_offsets
!= NULL
11623 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11625 off
= local_got_offsets
[r_symndx
];
11627 /* The offset must always be a multiple of 4. We use the
11628 least significant bit to record whether we have already
11629 generated the necessary reloc. */
11630 if ((off
& 1) != 0)
11634 Elf_Internal_Rela outrel
;
11637 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11638 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11639 else if (bfd_link_pic (info
))
11640 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11644 if (globals
->fdpic_p
)
11648 /* The GOT entry is initialized to zero by default.
11649 See if we should install a different value. */
11650 if (globals
->use_rel
|| outrel
.r_info
== 0)
11651 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11654 arm_elf_add_rofixup (output_bfd
,
11656 sgot
->output_section
->vma
11657 + sgot
->output_offset
+ off
);
11659 else if (outrel
.r_info
!= 0)
11661 outrel
.r_addend
= addend
+ dynreloc_value
;
11662 outrel
.r_offset
= (sgot
->output_section
->vma
11663 + sgot
->output_offset
11665 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11668 local_got_offsets
[r_symndx
] |= 1;
11671 value
= sgot
->output_offset
+ off
;
11673 if (r_type
!= R_ARM_GOT32
)
11674 value
+= sgot
->output_section
->vma
;
11676 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11677 contents
, rel
->r_offset
, value
,
11680 case R_ARM_TLS_LDO32
:
11681 value
= value
- dtpoff_base (info
);
11683 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11684 contents
, rel
->r_offset
, value
,
11687 case R_ARM_TLS_LDM32
:
11688 case R_ARM_TLS_LDM32_FDPIC
:
11695 off
= globals
->tls_ldm_got
.offset
;
11697 if ((off
& 1) != 0)
11701 /* If we don't know the module number, create a relocation
11703 if (bfd_link_dll (info
))
11705 Elf_Internal_Rela outrel
;
11707 if (srelgot
== NULL
)
11710 outrel
.r_addend
= 0;
11711 outrel
.r_offset
= (sgot
->output_section
->vma
11712 + sgot
->output_offset
+ off
);
11713 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11715 if (globals
->use_rel
)
11716 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11717 sgot
->contents
+ off
);
11719 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11722 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11724 globals
->tls_ldm_got
.offset
|= 1;
11727 if (r_type
== R_ARM_TLS_LDM32_FDPIC
)
11729 bfd_put_32(output_bfd
,
11730 globals
->root
.sgot
->output_offset
+ off
,
11731 contents
+ rel
->r_offset
);
11733 return bfd_reloc_ok
;
11737 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11738 - (input_section
->output_section
->vma
11739 + input_section
->output_offset
+ rel
->r_offset
);
11741 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11742 contents
, rel
->r_offset
, value
,
11747 case R_ARM_TLS_CALL
:
11748 case R_ARM_THM_TLS_CALL
:
11749 case R_ARM_TLS_GD32
:
11750 case R_ARM_TLS_GD32_FDPIC
:
11751 case R_ARM_TLS_IE32
:
11752 case R_ARM_TLS_IE32_FDPIC
:
11753 case R_ARM_TLS_GOTDESC
:
11754 case R_ARM_TLS_DESCSEQ
:
11755 case R_ARM_THM_TLS_DESCSEQ
:
11757 bfd_vma off
, offplt
;
11761 BFD_ASSERT (sgot
!= NULL
);
11766 dyn
= globals
->root
.dynamic_sections_created
;
11767 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11768 bfd_link_pic (info
),
11770 && (!bfd_link_pic (info
)
11771 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11773 *unresolved_reloc_p
= FALSE
;
11776 off
= h
->got
.offset
;
11777 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11778 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11782 BFD_ASSERT (local_got_offsets
!= NULL
);
11783 off
= local_got_offsets
[r_symndx
];
11784 offplt
= local_tlsdesc_gotents
[r_symndx
];
11785 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11788 /* Linker relaxations happens from one of the
11789 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11790 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11791 tls_type
= GOT_TLS_IE
;
11793 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11795 if ((off
& 1) != 0)
11799 bfd_boolean need_relocs
= FALSE
;
11800 Elf_Internal_Rela outrel
;
11803 /* The GOT entries have not been initialized yet. Do it
11804 now, and emit any relocations. If both an IE GOT and a
11805 GD GOT are necessary, we emit the GD first. */
11807 if ((bfd_link_dll (info
) || indx
!= 0)
11809 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11810 && !resolved_to_zero
)
11811 || h
->root
.type
!= bfd_link_hash_undefweak
))
11813 need_relocs
= TRUE
;
11814 BFD_ASSERT (srelgot
!= NULL
);
11817 if (tls_type
& GOT_TLS_GDESC
)
11821 /* We should have relaxed, unless this is an undefined
11823 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11824 || bfd_link_dll (info
));
11825 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11826 <= globals
->root
.sgotplt
->size
);
11828 outrel
.r_addend
= 0;
11829 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11830 + globals
->root
.sgotplt
->output_offset
11832 + globals
->sgotplt_jump_table_size
);
11834 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11835 sreloc
= globals
->root
.srelplt
;
11836 loc
= sreloc
->contents
;
11837 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11838 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11839 <= sreloc
->contents
+ sreloc
->size
);
11841 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11843 /* For globals, the first word in the relocation gets
11844 the relocation index and the top bit set, or zero,
11845 if we're binding now. For locals, it gets the
11846 symbol's offset in the tls section. */
11847 bfd_put_32 (output_bfd
,
11848 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11849 : info
->flags
& DF_BIND_NOW
? 0
11850 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11851 globals
->root
.sgotplt
->contents
+ offplt
11852 + globals
->sgotplt_jump_table_size
);
11854 /* Second word in the relocation is always zero. */
11855 bfd_put_32 (output_bfd
, 0,
11856 globals
->root
.sgotplt
->contents
+ offplt
11857 + globals
->sgotplt_jump_table_size
+ 4);
11859 if (tls_type
& GOT_TLS_GD
)
11863 outrel
.r_addend
= 0;
11864 outrel
.r_offset
= (sgot
->output_section
->vma
11865 + sgot
->output_offset
11867 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11869 if (globals
->use_rel
)
11870 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11871 sgot
->contents
+ cur_off
);
11873 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11876 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11877 sgot
->contents
+ cur_off
+ 4);
11880 outrel
.r_addend
= 0;
11881 outrel
.r_info
= ELF32_R_INFO (indx
,
11882 R_ARM_TLS_DTPOFF32
);
11883 outrel
.r_offset
+= 4;
11885 if (globals
->use_rel
)
11886 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11887 sgot
->contents
+ cur_off
+ 4);
11889 elf32_arm_add_dynreloc (output_bfd
, info
,
11895 /* If we are not emitting relocations for a
11896 general dynamic reference, then we must be in a
11897 static link or an executable link with the
11898 symbol binding locally. Mark it as belonging
11899 to module 1, the executable. */
11900 bfd_put_32 (output_bfd
, 1,
11901 sgot
->contents
+ cur_off
);
11902 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11903 sgot
->contents
+ cur_off
+ 4);
11909 if (tls_type
& GOT_TLS_IE
)
11914 outrel
.r_addend
= value
- dtpoff_base (info
);
11916 outrel
.r_addend
= 0;
11917 outrel
.r_offset
= (sgot
->output_section
->vma
11918 + sgot
->output_offset
11920 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11922 if (globals
->use_rel
)
11923 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11924 sgot
->contents
+ cur_off
);
11926 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11929 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11930 sgot
->contents
+ cur_off
);
11935 h
->got
.offset
|= 1;
11937 local_got_offsets
[r_symndx
] |= 1;
11940 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
&& r_type
!= R_ARM_TLS_GD32_FDPIC
)
11942 else if (tls_type
& GOT_TLS_GDESC
)
11945 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11946 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11948 bfd_signed_vma offset
;
11949 /* TLS stubs are arm mode. The original symbol is a
11950 data object, so branch_type is bogus. */
11951 branch_type
= ST_BRANCH_TO_ARM
;
11952 enum elf32_arm_stub_type stub_type
11953 = arm_type_of_stub (info
, input_section
, rel
,
11954 st_type
, &branch_type
,
11955 (struct elf32_arm_link_hash_entry
*)h
,
11956 globals
->tls_trampoline
, globals
->root
.splt
,
11957 input_bfd
, sym_name
);
11959 if (stub_type
!= arm_stub_none
)
11961 struct elf32_arm_stub_hash_entry
*stub_entry
11962 = elf32_arm_get_stub_entry
11963 (input_section
, globals
->root
.splt
, 0, rel
,
11964 globals
, stub_type
);
11965 offset
= (stub_entry
->stub_offset
11966 + stub_entry
->stub_sec
->output_offset
11967 + stub_entry
->stub_sec
->output_section
->vma
);
11970 offset
= (globals
->root
.splt
->output_section
->vma
11971 + globals
->root
.splt
->output_offset
11972 + globals
->tls_trampoline
);
11974 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11976 unsigned long inst
;
11978 offset
-= (input_section
->output_section
->vma
11979 + input_section
->output_offset
11980 + rel
->r_offset
+ 8);
11982 inst
= offset
>> 2;
11983 inst
&= 0x00ffffff;
11984 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11988 /* Thumb blx encodes the offset in a complicated
11990 unsigned upper_insn
, lower_insn
;
11993 offset
-= (input_section
->output_section
->vma
11994 + input_section
->output_offset
11995 + rel
->r_offset
+ 4);
11997 if (stub_type
!= arm_stub_none
11998 && arm_stub_is_thumb (stub_type
))
12000 lower_insn
= 0xd000;
12004 lower_insn
= 0xc000;
12005 /* Round up the offset to a word boundary. */
12006 offset
= (offset
+ 2) & ~2;
12010 upper_insn
= (0xf000
12011 | ((offset
>> 12) & 0x3ff)
12013 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
12014 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
12015 | ((offset
>> 1) & 0x7ff);
12016 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12017 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12018 return bfd_reloc_ok
;
12021 /* These relocations needs special care, as besides the fact
12022 they point somewhere in .gotplt, the addend must be
12023 adjusted accordingly depending on the type of instruction
12025 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
12027 unsigned long data
, insn
;
12030 data
= bfd_get_signed_32 (input_bfd
, hit_data
);
12036 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
12037 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
12038 insn
= (insn
<< 16)
12039 | bfd_get_16 (input_bfd
,
12040 contents
+ rel
->r_offset
- data
+ 2);
12041 if ((insn
& 0xf800c000) == 0xf000c000)
12044 else if ((insn
& 0xffffff00) == 0x4400)
12050 /* xgettext:c-format */
12051 (_("%pB(%pA+%#" PRIx64
"): "
12052 "unexpected %s instruction '%#lx' "
12053 "referenced by TLS_GOTDESC"),
12054 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12056 return bfd_reloc_notsupported
;
12061 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
12063 switch (insn
>> 24)
12065 case 0xeb: /* bl */
12066 case 0xfa: /* blx */
12070 case 0xe0: /* add */
12076 /* xgettext:c-format */
12077 (_("%pB(%pA+%#" PRIx64
"): "
12078 "unexpected %s instruction '%#lx' "
12079 "referenced by TLS_GOTDESC"),
12080 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12082 return bfd_reloc_notsupported
;
12086 value
+= ((globals
->root
.sgotplt
->output_section
->vma
12087 + globals
->root
.sgotplt
->output_offset
+ off
)
12088 - (input_section
->output_section
->vma
12089 + input_section
->output_offset
12091 + globals
->sgotplt_jump_table_size
);
12094 value
= ((globals
->root
.sgot
->output_section
->vma
12095 + globals
->root
.sgot
->output_offset
+ off
)
12096 - (input_section
->output_section
->vma
12097 + input_section
->output_offset
+ rel
->r_offset
));
12099 if (globals
->fdpic_p
&& (r_type
== R_ARM_TLS_GD32_FDPIC
||
12100 r_type
== R_ARM_TLS_IE32_FDPIC
))
12102 /* For FDPIC relocations, resolve to the offset of the GOT
12103 entry from the start of GOT. */
12104 bfd_put_32(output_bfd
,
12105 globals
->root
.sgot
->output_offset
+ off
,
12106 contents
+ rel
->r_offset
);
12108 return bfd_reloc_ok
;
12112 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12113 contents
, rel
->r_offset
, value
,
12118 case R_ARM_TLS_LE32
:
12119 if (bfd_link_dll (info
))
12122 /* xgettext:c-format */
12123 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
12124 "in shared object"),
12125 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
12126 return bfd_reloc_notsupported
;
12129 value
= tpoff (info
, value
);
12131 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12132 contents
, rel
->r_offset
, value
,
12136 if (globals
->fix_v4bx
)
12138 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12140 /* Ensure that we have a BX instruction. */
12141 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
12143 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
12145 /* Branch to veneer. */
12147 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
12148 glue_addr
-= input_section
->output_section
->vma
12149 + input_section
->output_offset
12150 + rel
->r_offset
+ 8;
12151 insn
= (insn
& 0xf0000000) | 0x0a000000
12152 | ((glue_addr
>> 2) & 0x00ffffff);
12156 /* Preserve Rm (lowest four bits) and the condition code
12157 (highest four bits). Other bits encode MOV PC,Rm. */
12158 insn
= (insn
& 0xf000000f) | 0x01a0f000;
12161 bfd_put_32 (input_bfd
, insn
, hit_data
);
12163 return bfd_reloc_ok
;
12165 case R_ARM_MOVW_ABS_NC
:
12166 case R_ARM_MOVT_ABS
:
12167 case R_ARM_MOVW_PREL_NC
:
12168 case R_ARM_MOVT_PREL
:
12169 /* Until we properly support segment-base-relative addressing then
12170 we assume the segment base to be zero, as for the group relocations.
12171 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12172 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12173 case R_ARM_MOVW_BREL_NC
:
12174 case R_ARM_MOVW_BREL
:
12175 case R_ARM_MOVT_BREL
:
12177 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12179 if (globals
->use_rel
)
12181 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
12182 signed_addend
= (addend
^ 0x8000) - 0x8000;
12185 value
+= signed_addend
;
12187 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
12188 value
-= (input_section
->output_section
->vma
12189 + input_section
->output_offset
+ rel
->r_offset
);
12191 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
12192 return bfd_reloc_overflow
;
12194 if (branch_type
== ST_BRANCH_TO_THUMB
)
12197 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
12198 || r_type
== R_ARM_MOVT_BREL
)
12201 insn
&= 0xfff0f000;
12202 insn
|= value
& 0xfff;
12203 insn
|= (value
& 0xf000) << 4;
12204 bfd_put_32 (input_bfd
, insn
, hit_data
);
12206 return bfd_reloc_ok
;
12208 case R_ARM_THM_MOVW_ABS_NC
:
12209 case R_ARM_THM_MOVT_ABS
:
12210 case R_ARM_THM_MOVW_PREL_NC
:
12211 case R_ARM_THM_MOVT_PREL
:
12212 /* Until we properly support segment-base-relative addressing then
12213 we assume the segment base to be zero, as for the above relocations.
12214 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12215 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12216 as R_ARM_THM_MOVT_ABS. */
12217 case R_ARM_THM_MOVW_BREL_NC
:
12218 case R_ARM_THM_MOVW_BREL
:
12219 case R_ARM_THM_MOVT_BREL
:
12223 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
12224 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
12226 if (globals
->use_rel
)
12228 addend
= ((insn
>> 4) & 0xf000)
12229 | ((insn
>> 15) & 0x0800)
12230 | ((insn
>> 4) & 0x0700)
12232 signed_addend
= (addend
^ 0x8000) - 0x8000;
12235 value
+= signed_addend
;
12237 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
12238 value
-= (input_section
->output_section
->vma
12239 + input_section
->output_offset
+ rel
->r_offset
);
12241 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
12242 return bfd_reloc_overflow
;
12244 if (branch_type
== ST_BRANCH_TO_THUMB
)
12247 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
12248 || r_type
== R_ARM_THM_MOVT_BREL
)
12251 insn
&= 0xfbf08f00;
12252 insn
|= (value
& 0xf000) << 4;
12253 insn
|= (value
& 0x0800) << 15;
12254 insn
|= (value
& 0x0700) << 4;
12255 insn
|= (value
& 0x00ff);
12257 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
12258 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
12260 return bfd_reloc_ok
;
12262 case R_ARM_ALU_PC_G0_NC
:
12263 case R_ARM_ALU_PC_G1_NC
:
12264 case R_ARM_ALU_PC_G0
:
12265 case R_ARM_ALU_PC_G1
:
12266 case R_ARM_ALU_PC_G2
:
12267 case R_ARM_ALU_SB_G0_NC
:
12268 case R_ARM_ALU_SB_G1_NC
:
12269 case R_ARM_ALU_SB_G0
:
12270 case R_ARM_ALU_SB_G1
:
12271 case R_ARM_ALU_SB_G2
:
12273 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12274 bfd_vma pc
= input_section
->output_section
->vma
12275 + input_section
->output_offset
+ rel
->r_offset
;
12276 /* sb is the origin of the *segment* containing the symbol. */
12277 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12280 bfd_signed_vma signed_value
;
12283 /* Determine which group of bits to select. */
12286 case R_ARM_ALU_PC_G0_NC
:
12287 case R_ARM_ALU_PC_G0
:
12288 case R_ARM_ALU_SB_G0_NC
:
12289 case R_ARM_ALU_SB_G0
:
12293 case R_ARM_ALU_PC_G1_NC
:
12294 case R_ARM_ALU_PC_G1
:
12295 case R_ARM_ALU_SB_G1_NC
:
12296 case R_ARM_ALU_SB_G1
:
12300 case R_ARM_ALU_PC_G2
:
12301 case R_ARM_ALU_SB_G2
:
12309 /* If REL, extract the addend from the insn. If RELA, it will
12310 have already been fetched for us. */
12311 if (globals
->use_rel
)
12314 bfd_vma constant
= insn
& 0xff;
12315 bfd_vma rotation
= (insn
& 0xf00) >> 8;
12318 signed_addend
= constant
;
12321 /* Compensate for the fact that in the instruction, the
12322 rotation is stored in multiples of 2 bits. */
12325 /* Rotate "constant" right by "rotation" bits. */
12326 signed_addend
= (constant
>> rotation
) |
12327 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
12330 /* Determine if the instruction is an ADD or a SUB.
12331 (For REL, this determines the sign of the addend.) */
12332 negative
= identify_add_or_sub (insn
);
12336 /* xgettext:c-format */
12337 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
12338 "are allowed for ALU group relocations"),
12339 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
12340 return bfd_reloc_overflow
;
12343 signed_addend
*= negative
;
12346 /* Compute the value (X) to go in the place. */
12347 if (r_type
== R_ARM_ALU_PC_G0_NC
12348 || r_type
== R_ARM_ALU_PC_G1_NC
12349 || r_type
== R_ARM_ALU_PC_G0
12350 || r_type
== R_ARM_ALU_PC_G1
12351 || r_type
== R_ARM_ALU_PC_G2
)
12353 signed_value
= value
- pc
+ signed_addend
;
12355 /* Section base relative. */
12356 signed_value
= value
- sb
+ signed_addend
;
12358 /* If the target symbol is a Thumb function, then set the
12359 Thumb bit in the address. */
12360 if (branch_type
== ST_BRANCH_TO_THUMB
)
12363 /* Calculate the value of the relevant G_n, in encoded
12364 constant-with-rotation format. */
12365 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12368 /* Check for overflow if required. */
12369 if ((r_type
== R_ARM_ALU_PC_G0
12370 || r_type
== R_ARM_ALU_PC_G1
12371 || r_type
== R_ARM_ALU_PC_G2
12372 || r_type
== R_ARM_ALU_SB_G0
12373 || r_type
== R_ARM_ALU_SB_G1
12374 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
12377 /* xgettext:c-format */
12378 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12379 "splitting %#" PRIx64
" for group relocation %s"),
12380 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12381 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12383 return bfd_reloc_overflow
;
12386 /* Mask out the value and the ADD/SUB part of the opcode; take care
12387 not to destroy the S bit. */
12388 insn
&= 0xff1ff000;
12390 /* Set the opcode according to whether the value to go in the
12391 place is negative. */
12392 if (signed_value
< 0)
12397 /* Encode the offset. */
12400 bfd_put_32 (input_bfd
, insn
, hit_data
);
12402 return bfd_reloc_ok
;
12404 case R_ARM_LDR_PC_G0
:
12405 case R_ARM_LDR_PC_G1
:
12406 case R_ARM_LDR_PC_G2
:
12407 case R_ARM_LDR_SB_G0
:
12408 case R_ARM_LDR_SB_G1
:
12409 case R_ARM_LDR_SB_G2
:
12411 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12412 bfd_vma pc
= input_section
->output_section
->vma
12413 + input_section
->output_offset
+ rel
->r_offset
;
12414 /* sb is the origin of the *segment* containing the symbol. */
12415 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12417 bfd_signed_vma signed_value
;
12420 /* Determine which groups of bits to calculate. */
12423 case R_ARM_LDR_PC_G0
:
12424 case R_ARM_LDR_SB_G0
:
12428 case R_ARM_LDR_PC_G1
:
12429 case R_ARM_LDR_SB_G1
:
12433 case R_ARM_LDR_PC_G2
:
12434 case R_ARM_LDR_SB_G2
:
12442 /* If REL, extract the addend from the insn. If RELA, it will
12443 have already been fetched for us. */
12444 if (globals
->use_rel
)
12446 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12447 signed_addend
= negative
* (insn
& 0xfff);
12450 /* Compute the value (X) to go in the place. */
12451 if (r_type
== R_ARM_LDR_PC_G0
12452 || r_type
== R_ARM_LDR_PC_G1
12453 || r_type
== R_ARM_LDR_PC_G2
)
12455 signed_value
= value
- pc
+ signed_addend
;
12457 /* Section base relative. */
12458 signed_value
= value
- sb
+ signed_addend
;
12460 /* Calculate the value of the relevant G_{n-1} to obtain
12461 the residual at that stage. */
12462 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12463 group
- 1, &residual
);
12465 /* Check for overflow. */
12466 if (residual
>= 0x1000)
12469 /* xgettext:c-format */
12470 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12471 "splitting %#" PRIx64
" for group relocation %s"),
12472 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12473 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12475 return bfd_reloc_overflow
;
12478 /* Mask out the value and U bit. */
12479 insn
&= 0xff7ff000;
12481 /* Set the U bit if the value to go in the place is non-negative. */
12482 if (signed_value
>= 0)
12485 /* Encode the offset. */
12488 bfd_put_32 (input_bfd
, insn
, hit_data
);
12490 return bfd_reloc_ok
;
12492 case R_ARM_LDRS_PC_G0
:
12493 case R_ARM_LDRS_PC_G1
:
12494 case R_ARM_LDRS_PC_G2
:
12495 case R_ARM_LDRS_SB_G0
:
12496 case R_ARM_LDRS_SB_G1
:
12497 case R_ARM_LDRS_SB_G2
:
12499 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12500 bfd_vma pc
= input_section
->output_section
->vma
12501 + input_section
->output_offset
+ rel
->r_offset
;
12502 /* sb is the origin of the *segment* containing the symbol. */
12503 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12505 bfd_signed_vma signed_value
;
12508 /* Determine which groups of bits to calculate. */
12511 case R_ARM_LDRS_PC_G0
:
12512 case R_ARM_LDRS_SB_G0
:
12516 case R_ARM_LDRS_PC_G1
:
12517 case R_ARM_LDRS_SB_G1
:
12521 case R_ARM_LDRS_PC_G2
:
12522 case R_ARM_LDRS_SB_G2
:
12530 /* If REL, extract the addend from the insn. If RELA, it will
12531 have already been fetched for us. */
12532 if (globals
->use_rel
)
12534 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12535 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12538 /* Compute the value (X) to go in the place. */
12539 if (r_type
== R_ARM_LDRS_PC_G0
12540 || r_type
== R_ARM_LDRS_PC_G1
12541 || r_type
== R_ARM_LDRS_PC_G2
)
12543 signed_value
= value
- pc
+ signed_addend
;
12545 /* Section base relative. */
12546 signed_value
= value
- sb
+ signed_addend
;
12548 /* Calculate the value of the relevant G_{n-1} to obtain
12549 the residual at that stage. */
12550 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12551 group
- 1, &residual
);
12553 /* Check for overflow. */
12554 if (residual
>= 0x100)
12557 /* xgettext:c-format */
12558 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12559 "splitting %#" PRIx64
" for group relocation %s"),
12560 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12561 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12563 return bfd_reloc_overflow
;
12566 /* Mask out the value and U bit. */
12567 insn
&= 0xff7ff0f0;
12569 /* Set the U bit if the value to go in the place is non-negative. */
12570 if (signed_value
>= 0)
12573 /* Encode the offset. */
12574 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12576 bfd_put_32 (input_bfd
, insn
, hit_data
);
12578 return bfd_reloc_ok
;
12580 case R_ARM_LDC_PC_G0
:
12581 case R_ARM_LDC_PC_G1
:
12582 case R_ARM_LDC_PC_G2
:
12583 case R_ARM_LDC_SB_G0
:
12584 case R_ARM_LDC_SB_G1
:
12585 case R_ARM_LDC_SB_G2
:
12587 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12588 bfd_vma pc
= input_section
->output_section
->vma
12589 + input_section
->output_offset
+ rel
->r_offset
;
12590 /* sb is the origin of the *segment* containing the symbol. */
12591 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12593 bfd_signed_vma signed_value
;
12596 /* Determine which groups of bits to calculate. */
12599 case R_ARM_LDC_PC_G0
:
12600 case R_ARM_LDC_SB_G0
:
12604 case R_ARM_LDC_PC_G1
:
12605 case R_ARM_LDC_SB_G1
:
12609 case R_ARM_LDC_PC_G2
:
12610 case R_ARM_LDC_SB_G2
:
12618 /* If REL, extract the addend from the insn. If RELA, it will
12619 have already been fetched for us. */
12620 if (globals
->use_rel
)
12622 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12623 signed_addend
= negative
* ((insn
& 0xff) << 2);
12626 /* Compute the value (X) to go in the place. */
12627 if (r_type
== R_ARM_LDC_PC_G0
12628 || r_type
== R_ARM_LDC_PC_G1
12629 || r_type
== R_ARM_LDC_PC_G2
)
12631 signed_value
= value
- pc
+ signed_addend
;
12633 /* Section base relative. */
12634 signed_value
= value
- sb
+ signed_addend
;
12636 /* Calculate the value of the relevant G_{n-1} to obtain
12637 the residual at that stage. */
12638 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12639 group
- 1, &residual
);
12641 /* Check for overflow. (The absolute value to go in the place must be
12642 divisible by four and, after having been divided by four, must
12643 fit in eight bits.) */
12644 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12647 /* xgettext:c-format */
12648 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12649 "splitting %#" PRIx64
" for group relocation %s"),
12650 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12651 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12653 return bfd_reloc_overflow
;
12656 /* Mask out the value and U bit. */
12657 insn
&= 0xff7fff00;
12659 /* Set the U bit if the value to go in the place is non-negative. */
12660 if (signed_value
>= 0)
12663 /* Encode the offset. */
12664 insn
|= residual
>> 2;
12666 bfd_put_32 (input_bfd
, insn
, hit_data
);
12668 return bfd_reloc_ok
;
12670 case R_ARM_THM_ALU_ABS_G0_NC
:
12671 case R_ARM_THM_ALU_ABS_G1_NC
:
12672 case R_ARM_THM_ALU_ABS_G2_NC
:
12673 case R_ARM_THM_ALU_ABS_G3_NC
:
12675 const int shift_array
[4] = {0, 8, 16, 24};
12676 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12677 bfd_vma addr
= value
;
12678 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12680 /* Compute address. */
12681 if (globals
->use_rel
)
12682 signed_addend
= insn
& 0xff;
12683 addr
+= signed_addend
;
12684 if (branch_type
== ST_BRANCH_TO_THUMB
)
12686 /* Clean imm8 insn. */
12688 /* And update with correct part of address. */
12689 insn
|= (addr
>> shift
) & 0xff;
12691 bfd_put_16 (input_bfd
, insn
, hit_data
);
12694 *unresolved_reloc_p
= FALSE
;
12695 return bfd_reloc_ok
;
12697 case R_ARM_GOTOFFFUNCDESC
:
12701 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12702 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12703 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12704 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12707 if (bfd_link_pic(info
) && dynindx
== 0)
12710 /* Resolve relocation. */
12711 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
)
12712 , contents
+ rel
->r_offset
);
12713 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12715 arm_elf_fill_funcdesc(output_bfd
, info
,
12716 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12717 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12722 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12726 /* For static binaries, sym_sec can be null. */
12729 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12730 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12738 if (bfd_link_pic(info
) && dynindx
== 0)
12741 /* This case cannot occur since funcdesc is allocated by
12742 the dynamic loader so we cannot resolve the relocation. */
12743 if (h
->dynindx
!= -1)
12746 /* Resolve relocation. */
12747 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
),
12748 contents
+ rel
->r_offset
);
12749 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12750 arm_elf_fill_funcdesc(output_bfd
, info
,
12751 &eh
->fdpic_cnts
.funcdesc_offset
,
12752 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12755 *unresolved_reloc_p
= FALSE
;
12756 return bfd_reloc_ok
;
12758 case R_ARM_GOTFUNCDESC
:
12762 Elf_Internal_Rela outrel
;
12764 /* Resolve relocation. */
12765 bfd_put_32(output_bfd
, ((eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1)
12766 + sgot
->output_offset
),
12767 contents
+ rel
->r_offset
);
12768 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12769 if(h
->dynindx
== -1)
12772 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12776 /* For static binaries sym_sec can be null. */
12779 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12780 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12788 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12789 arm_elf_fill_funcdesc(output_bfd
, info
,
12790 &eh
->fdpic_cnts
.funcdesc_offset
,
12791 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12794 /* Add a dynamic relocation on GOT entry if not already done. */
12795 if ((eh
->fdpic_cnts
.gotfuncdesc_offset
& 1) == 0)
12797 if (h
->dynindx
== -1)
12799 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12800 if (h
->root
.type
== bfd_link_hash_undefweak
)
12801 bfd_put_32(output_bfd
, 0, sgot
->contents
12802 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12804 bfd_put_32(output_bfd
, sgot
->output_section
->vma
12805 + sgot
->output_offset
12806 + (eh
->fdpic_cnts
.funcdesc_offset
& ~1),
12808 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12812 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12814 outrel
.r_offset
= sgot
->output_section
->vma
12815 + sgot
->output_offset
12816 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1);
12817 outrel
.r_addend
= 0;
12818 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
12819 if (h
->root
.type
== bfd_link_hash_undefweak
)
12820 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, -1);
12822 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
12825 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12826 eh
->fdpic_cnts
.gotfuncdesc_offset
|= 1;
12831 /* Such relocation on static function should not have been
12832 emitted by the compiler. */
12836 *unresolved_reloc_p
= FALSE
;
12837 return bfd_reloc_ok
;
12839 case R_ARM_FUNCDESC
:
12843 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12844 Elf_Internal_Rela outrel
;
12845 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12846 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12847 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12850 if (bfd_link_pic(info
) && dynindx
== 0)
12853 /* Replace static FUNCDESC relocation with a
12854 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12856 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12857 outrel
.r_offset
= input_section
->output_section
->vma
12858 + input_section
->output_offset
+ rel
->r_offset
;
12859 outrel
.r_addend
= 0;
12860 if (bfd_link_pic(info
))
12861 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12863 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12865 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12866 + sgot
->output_offset
+ offset
, hit_data
);
12868 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12869 arm_elf_fill_funcdesc(output_bfd
, info
,
12870 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12871 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12875 if (h
->dynindx
== -1)
12878 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12881 Elf_Internal_Rela outrel
;
12883 /* For static binaries sym_sec can be null. */
12886 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12887 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12895 if (bfd_link_pic(info
) && dynindx
== 0)
12898 /* Replace static FUNCDESC relocation with a
12899 R_ARM_RELATIVE dynamic relocation. */
12900 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12901 outrel
.r_offset
= input_section
->output_section
->vma
12902 + input_section
->output_offset
+ rel
->r_offset
;
12903 outrel
.r_addend
= 0;
12904 if (bfd_link_pic(info
))
12905 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12907 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12909 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12910 + sgot
->output_offset
+ offset
, hit_data
);
12912 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12913 arm_elf_fill_funcdesc(output_bfd
, info
,
12914 &eh
->fdpic_cnts
.funcdesc_offset
,
12915 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12919 Elf_Internal_Rela outrel
;
12921 /* Add a dynamic relocation. */
12922 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12923 outrel
.r_offset
= input_section
->output_section
->vma
12924 + input_section
->output_offset
+ rel
->r_offset
;
12925 outrel
.r_addend
= 0;
12926 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12930 *unresolved_reloc_p
= FALSE
;
12931 return bfd_reloc_ok
;
12933 case R_ARM_THM_BF16
:
12935 bfd_vma relocation
;
12936 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12937 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12939 if (globals
->use_rel
)
12941 bfd_vma immA
= (upper_insn
& 0x001f);
12942 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12943 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12944 addend
= (immA
<< 12);
12945 addend
|= (immB
<< 2);
12946 addend
|= (immC
<< 1);
12949 signed_addend
= (addend
& 0x10000) ? addend
- (1 << 17) : addend
;
12952 relocation
= value
+ signed_addend
;
12953 relocation
-= (input_section
->output_section
->vma
12954 + input_section
->output_offset
12957 /* Put RELOCATION back into the insn. */
12959 bfd_vma immA
= (relocation
& 0x0001f000) >> 12;
12960 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
12961 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
12963 upper_insn
= (upper_insn
& 0xffe0) | immA
;
12964 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
12967 /* Put the relocated value back in the object file: */
12968 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12969 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12971 return bfd_reloc_ok
;
12974 case R_ARM_THM_BF12
:
12976 bfd_vma relocation
;
12977 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12978 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12980 if (globals
->use_rel
)
12982 bfd_vma immA
= (upper_insn
& 0x0001);
12983 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12984 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12985 addend
= (immA
<< 12);
12986 addend
|= (immB
<< 2);
12987 addend
|= (immC
<< 1);
12990 addend
= (addend
& 0x1000) ? addend
- (1 << 13) : addend
;
12991 signed_addend
= addend
;
12994 relocation
= value
+ signed_addend
;
12995 relocation
-= (input_section
->output_section
->vma
12996 + input_section
->output_offset
12999 /* Put RELOCATION back into the insn. */
13001 bfd_vma immA
= (relocation
& 0x00001000) >> 12;
13002 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
13003 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
13005 upper_insn
= (upper_insn
& 0xfffe) | immA
;
13006 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
13009 /* Put the relocated value back in the object file: */
13010 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
13011 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
13013 return bfd_reloc_ok
;
13016 case R_ARM_THM_BF18
:
13018 bfd_vma relocation
;
13019 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
13020 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
13022 if (globals
->use_rel
)
13024 bfd_vma immA
= (upper_insn
& 0x007f);
13025 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
13026 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
13027 addend
= (immA
<< 12);
13028 addend
|= (immB
<< 2);
13029 addend
|= (immC
<< 1);
13032 addend
= (addend
& 0x40000) ? addend
- (1 << 19) : addend
;
13033 signed_addend
= addend
;
13036 relocation
= value
+ signed_addend
;
13037 relocation
-= (input_section
->output_section
->vma
13038 + input_section
->output_offset
13041 /* Put RELOCATION back into the insn. */
13043 bfd_vma immA
= (relocation
& 0x0007f000) >> 12;
13044 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
13045 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
13047 upper_insn
= (upper_insn
& 0xff80) | immA
;
13048 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
13051 /* Put the relocated value back in the object file: */
13052 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
13053 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
13055 return bfd_reloc_ok
;
13059 return bfd_reloc_notsupported
;
13063 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13065 arm_add_to_rel (bfd
* abfd
,
13066 bfd_byte
* address
,
13067 reloc_howto_type
* howto
,
13068 bfd_signed_vma increment
)
13070 bfd_signed_vma addend
;
13072 if (howto
->type
== R_ARM_THM_CALL
13073 || howto
->type
== R_ARM_THM_JUMP24
)
13075 int upper_insn
, lower_insn
;
13078 upper_insn
= bfd_get_16 (abfd
, address
);
13079 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
13080 upper
= upper_insn
& 0x7ff;
13081 lower
= lower_insn
& 0x7ff;
13083 addend
= (upper
<< 12) | (lower
<< 1);
13084 addend
+= increment
;
13087 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
13088 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
13090 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
13091 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
13097 contents
= bfd_get_32 (abfd
, address
);
13099 /* Get the (signed) value from the instruction. */
13100 addend
= contents
& howto
->src_mask
;
13101 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13103 bfd_signed_vma mask
;
13106 mask
&= ~ howto
->src_mask
;
13110 /* Add in the increment, (which is a byte value). */
13111 switch (howto
->type
)
13114 addend
+= increment
;
13121 addend
<<= howto
->size
;
13122 addend
+= increment
;
13124 /* Should we check for overflow here ? */
13126 /* Drop any undesired bits. */
13127 addend
>>= howto
->rightshift
;
13131 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
13133 bfd_put_32 (abfd
, contents
, address
);
13137 #define IS_ARM_TLS_RELOC(R_TYPE) \
13138 ((R_TYPE) == R_ARM_TLS_GD32 \
13139 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13140 || (R_TYPE) == R_ARM_TLS_LDO32 \
13141 || (R_TYPE) == R_ARM_TLS_LDM32 \
13142 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13143 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13144 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13145 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13146 || (R_TYPE) == R_ARM_TLS_LE32 \
13147 || (R_TYPE) == R_ARM_TLS_IE32 \
13148 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13149 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13151 /* Specific set of relocations for the gnu tls dialect. */
13152 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13153 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13154 || (R_TYPE) == R_ARM_TLS_CALL \
13155 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13156 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13157 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13159 /* Relocate an ARM ELF section. */
13162 elf32_arm_relocate_section (bfd
* output_bfd
,
13163 struct bfd_link_info
* info
,
13165 asection
* input_section
,
13166 bfd_byte
* contents
,
13167 Elf_Internal_Rela
* relocs
,
13168 Elf_Internal_Sym
* local_syms
,
13169 asection
** local_sections
)
13171 Elf_Internal_Shdr
*symtab_hdr
;
13172 struct elf_link_hash_entry
**sym_hashes
;
13173 Elf_Internal_Rela
*rel
;
13174 Elf_Internal_Rela
*relend
;
13176 struct elf32_arm_link_hash_table
* globals
;
13178 globals
= elf32_arm_hash_table (info
);
13179 if (globals
== NULL
)
13182 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
13183 sym_hashes
= elf_sym_hashes (input_bfd
);
13186 relend
= relocs
+ input_section
->reloc_count
;
13187 for (; rel
< relend
; rel
++)
13190 reloc_howto_type
* howto
;
13191 unsigned long r_symndx
;
13192 Elf_Internal_Sym
* sym
;
13194 struct elf_link_hash_entry
* h
;
13195 bfd_vma relocation
;
13196 bfd_reloc_status_type r
;
13199 bfd_boolean unresolved_reloc
= FALSE
;
13200 char *error_message
= NULL
;
13202 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13203 r_type
= ELF32_R_TYPE (rel
->r_info
);
13204 r_type
= arm_real_reloc_type (globals
, r_type
);
13206 if ( r_type
== R_ARM_GNU_VTENTRY
13207 || r_type
== R_ARM_GNU_VTINHERIT
)
13210 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
13213 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
13219 if (r_symndx
< symtab_hdr
->sh_info
)
13221 sym
= local_syms
+ r_symndx
;
13222 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
13223 sec
= local_sections
[r_symndx
];
13225 /* An object file might have a reference to a local
13226 undefined symbol. This is a daft object file, but we
13227 should at least do something about it. V4BX & NONE
13228 relocations do not use the symbol and are explicitly
13229 allowed to use the undefined symbol, so allow those.
13230 Likewise for relocations against STN_UNDEF. */
13231 if (r_type
!= R_ARM_V4BX
13232 && r_type
!= R_ARM_NONE
13233 && r_symndx
!= STN_UNDEF
13234 && bfd_is_und_section (sec
)
13235 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
13236 (*info
->callbacks
->undefined_symbol
)
13237 (info
, bfd_elf_string_from_elf_section
13238 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
13239 input_bfd
, input_section
,
13240 rel
->r_offset
, TRUE
);
13242 if (globals
->use_rel
)
13244 relocation
= (sec
->output_section
->vma
13245 + sec
->output_offset
13247 if (!bfd_link_relocatable (info
)
13248 && (sec
->flags
& SEC_MERGE
)
13249 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13252 bfd_vma addend
, value
;
13256 case R_ARM_MOVW_ABS_NC
:
13257 case R_ARM_MOVT_ABS
:
13258 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13259 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
13260 addend
= (addend
^ 0x8000) - 0x8000;
13263 case R_ARM_THM_MOVW_ABS_NC
:
13264 case R_ARM_THM_MOVT_ABS
:
13265 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
13267 value
|= bfd_get_16 (input_bfd
,
13268 contents
+ rel
->r_offset
+ 2);
13269 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
13270 | ((value
& 0x04000000) >> 15);
13271 addend
= (addend
^ 0x8000) - 0x8000;
13275 if (howto
->rightshift
13276 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
13279 /* xgettext:c-format */
13280 (_("%pB(%pA+%#" PRIx64
"): "
13281 "%s relocation against SEC_MERGE section"),
13282 input_bfd
, input_section
,
13283 (uint64_t) rel
->r_offset
, howto
->name
);
13287 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13289 /* Get the (signed) value from the instruction. */
13290 addend
= value
& howto
->src_mask
;
13291 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13293 bfd_signed_vma mask
;
13296 mask
&= ~ howto
->src_mask
;
13304 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
13306 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
13308 /* Cases here must match those in the preceding
13309 switch statement. */
13312 case R_ARM_MOVW_ABS_NC
:
13313 case R_ARM_MOVT_ABS
:
13314 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
13315 | (addend
& 0xfff);
13316 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13319 case R_ARM_THM_MOVW_ABS_NC
:
13320 case R_ARM_THM_MOVT_ABS
:
13321 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
13322 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
13323 bfd_put_16 (input_bfd
, value
>> 16,
13324 contents
+ rel
->r_offset
);
13325 bfd_put_16 (input_bfd
, value
,
13326 contents
+ rel
->r_offset
+ 2);
13330 value
= (value
& ~ howto
->dst_mask
)
13331 | (addend
& howto
->dst_mask
);
13332 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13338 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
13342 bfd_boolean warned
, ignored
;
13344 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
13345 r_symndx
, symtab_hdr
, sym_hashes
,
13346 h
, sec
, relocation
,
13347 unresolved_reloc
, warned
, ignored
);
13349 sym_type
= h
->type
;
13352 if (sec
!= NULL
&& discarded_section (sec
))
13353 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
13354 rel
, 1, relend
, howto
, 0, contents
);
13356 if (bfd_link_relocatable (info
))
13358 /* This is a relocatable link. We don't have to change
13359 anything, unless the reloc is against a section symbol,
13360 in which case we have to adjust according to where the
13361 section symbol winds up in the output section. */
13362 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13364 if (globals
->use_rel
)
13365 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
13366 howto
, (bfd_signed_vma
) sec
->output_offset
);
13368 rel
->r_addend
+= sec
->output_offset
;
13374 name
= h
->root
.root
.string
;
13377 name
= (bfd_elf_string_from_elf_section
13378 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
13379 if (name
== NULL
|| *name
== '\0')
13380 name
= bfd_section_name (sec
);
13383 if (r_symndx
!= STN_UNDEF
13384 && r_type
!= R_ARM_NONE
13386 || h
->root
.type
== bfd_link_hash_defined
13387 || h
->root
.type
== bfd_link_hash_defweak
)
13388 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
13391 ((sym_type
== STT_TLS
13392 /* xgettext:c-format */
13393 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
13394 /* xgettext:c-format */
13395 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
13398 (uint64_t) rel
->r_offset
,
13403 /* We call elf32_arm_final_link_relocate unless we're completely
13404 done, i.e., the relaxation produced the final output we want,
13405 and we won't let anybody mess with it. Also, we have to do
13406 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13407 both in relaxed and non-relaxed cases. */
13408 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
13409 || (IS_ARM_TLS_GNU_RELOC (r_type
)
13410 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
13411 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
13414 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
13415 contents
, rel
, h
== NULL
);
13416 /* This may have been marked unresolved because it came from
13417 a shared library. But we've just dealt with that. */
13418 unresolved_reloc
= 0;
13421 r
= bfd_reloc_continue
;
13423 if (r
== bfd_reloc_continue
)
13425 unsigned char branch_type
=
13426 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
13427 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
13429 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
13430 input_section
, contents
, rel
,
13431 relocation
, info
, sec
, name
,
13432 sym_type
, branch_type
, h
,
13437 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13438 because such sections are not SEC_ALLOC and thus ld.so will
13439 not process them. */
13440 if (unresolved_reloc
13441 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
13443 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
13444 rel
->r_offset
) != (bfd_vma
) -1)
13447 /* xgettext:c-format */
13448 (_("%pB(%pA+%#" PRIx64
"): "
13449 "unresolvable %s relocation against symbol `%s'"),
13452 (uint64_t) rel
->r_offset
,
13454 h
->root
.root
.string
);
13458 if (r
!= bfd_reloc_ok
)
13462 case bfd_reloc_overflow
:
13463 /* If the overflowing reloc was to an undefined symbol,
13464 we have already printed one error message and there
13465 is no point complaining again. */
13466 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
13467 (*info
->callbacks
->reloc_overflow
)
13468 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
13469 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
13472 case bfd_reloc_undefined
:
13473 (*info
->callbacks
->undefined_symbol
)
13474 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
13477 case bfd_reloc_outofrange
:
13478 error_message
= _("out of range");
13481 case bfd_reloc_notsupported
:
13482 error_message
= _("unsupported relocation");
13485 case bfd_reloc_dangerous
:
13486 /* error_message should already be set. */
13490 error_message
= _("unknown error");
13491 /* Fall through. */
13494 BFD_ASSERT (error_message
!= NULL
);
13495 (*info
->callbacks
->reloc_dangerous
)
13496 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
13505 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13506 adds the edit to the start of the list. (The list must be built in order of
13507 ascending TINDEX: the function's callers are primarily responsible for
13508 maintaining that condition). */
13511 add_unwind_table_edit (arm_unwind_table_edit
**head
,
13512 arm_unwind_table_edit
**tail
,
13513 arm_unwind_edit_type type
,
13514 asection
*linked_section
,
13515 unsigned int tindex
)
13517 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
13518 xmalloc (sizeof (arm_unwind_table_edit
));
13520 new_edit
->type
= type
;
13521 new_edit
->linked_section
= linked_section
;
13522 new_edit
->index
= tindex
;
13526 new_edit
->next
= NULL
;
13529 (*tail
)->next
= new_edit
;
13531 (*tail
) = new_edit
;
13534 (*head
) = new_edit
;
13538 new_edit
->next
= *head
;
13547 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
13549 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13551 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
13555 if (!exidx_sec
->rawsize
)
13556 exidx_sec
->rawsize
= exidx_sec
->size
;
13558 bfd_set_section_size (exidx_sec
, exidx_sec
->size
+ adjust
);
13559 out_sec
= exidx_sec
->output_section
;
13560 /* Adjust size of output section. */
13561 bfd_set_section_size (out_sec
, out_sec
->size
+adjust
);
13564 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13566 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
13568 struct _arm_elf_section_data
*exidx_arm_data
;
13570 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13571 add_unwind_table_edit (
13572 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
13573 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
13574 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
13576 exidx_arm_data
->additional_reloc_count
++;
13578 adjust_exidx_size(exidx_sec
, 8);
13581 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13582 made to those tables, such that:
13584 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13585 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13586 codes which have been inlined into the index).
13588 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13590 The edits are applied when the tables are written
13591 (in elf32_arm_write_section). */
13594 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
13595 unsigned int num_text_sections
,
13596 struct bfd_link_info
*info
,
13597 bfd_boolean merge_exidx_entries
)
13600 unsigned int last_second_word
= 0, i
;
13601 asection
*last_exidx_sec
= NULL
;
13602 asection
*last_text_sec
= NULL
;
13603 int last_unwind_type
= -1;
13605 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13607 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
13611 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
13613 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
13614 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
13616 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
13619 if (elf_sec
->linked_to
)
13621 Elf_Internal_Shdr
*linked_hdr
13622 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
13623 struct _arm_elf_section_data
*linked_sec_arm_data
13624 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
13626 if (linked_sec_arm_data
== NULL
)
13629 /* Link this .ARM.exidx section back from the text section it
13631 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
13636 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13637 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13638 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13640 for (i
= 0; i
< num_text_sections
; i
++)
13642 asection
*sec
= text_section_order
[i
];
13643 asection
*exidx_sec
;
13644 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
13645 struct _arm_elf_section_data
*exidx_arm_data
;
13646 bfd_byte
*contents
= NULL
;
13647 int deleted_exidx_bytes
= 0;
13649 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
13650 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
13651 Elf_Internal_Shdr
*hdr
;
13654 if (arm_data
== NULL
)
13657 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
13658 if (exidx_sec
== NULL
)
13660 /* Section has no unwind data. */
13661 if (last_unwind_type
== 0 || !last_exidx_sec
)
13664 /* Ignore zero sized sections. */
13665 if (sec
->size
== 0)
13668 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13669 last_unwind_type
= 0;
13673 /* Skip /DISCARD/ sections. */
13674 if (bfd_is_abs_section (exidx_sec
->output_section
))
13677 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
13678 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
13681 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13682 if (exidx_arm_data
== NULL
)
13685 ibfd
= exidx_sec
->owner
;
13687 if (hdr
->contents
!= NULL
)
13688 contents
= hdr
->contents
;
13689 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
13693 if (last_unwind_type
> 0)
13695 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
13696 /* Add cantunwind if first unwind item does not match section
13698 if (first_word
!= sec
->vma
)
13700 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
13701 last_unwind_type
= 0;
13705 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
13707 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
13711 /* An EXIDX_CANTUNWIND entry. */
13712 if (second_word
== 1)
13714 if (last_unwind_type
== 0)
13718 /* Inlined unwinding data. Merge if equal to previous. */
13719 else if ((second_word
& 0x80000000) != 0)
13721 if (merge_exidx_entries
13722 && last_second_word
== second_word
&& last_unwind_type
== 1)
13725 last_second_word
= second_word
;
13727 /* Normal table entry. In theory we could merge these too,
13728 but duplicate entries are likely to be much less common. */
13732 if (elide
&& !bfd_link_relocatable (info
))
13734 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
13735 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
13737 deleted_exidx_bytes
+= 8;
13740 last_unwind_type
= unwind_type
;
13743 /* Free contents if we allocated it ourselves. */
13744 if (contents
!= hdr
->contents
)
13747 /* Record edits to be applied later (in elf32_arm_write_section). */
13748 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
13749 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
13751 if (deleted_exidx_bytes
> 0)
13752 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
13754 last_exidx_sec
= exidx_sec
;
13755 last_text_sec
= sec
;
13758 /* Add terminating CANTUNWIND entry. */
13759 if (!bfd_link_relocatable (info
) && last_exidx_sec
13760 && last_unwind_type
!= 0)
13761 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13767 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
13768 bfd
*ibfd
, const char *name
)
13770 asection
*sec
, *osec
;
13772 sec
= bfd_get_linker_section (ibfd
, name
);
13773 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
13776 osec
= sec
->output_section
;
13777 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
13780 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
13781 sec
->output_offset
, sec
->size
))
13788 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
13790 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
13791 asection
*sec
, *osec
;
13793 if (globals
== NULL
)
13796 /* Invoke the regular ELF backend linker to do all the work. */
13797 if (!bfd_elf_final_link (abfd
, info
))
13800 /* Process stub sections (eg BE8 encoding, ...). */
13801 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
13803 for (i
=0; i
<htab
->top_id
; i
++)
13805 sec
= htab
->stub_group
[i
].stub_sec
;
13806 /* Only process it once, in its link_sec slot. */
13807 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
13809 osec
= sec
->output_section
;
13810 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
13811 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
13812 sec
->output_offset
, sec
->size
))
13817 /* Write out any glue sections now that we have created all the
13819 if (globals
->bfd_of_glue_owner
!= NULL
)
13821 if (! elf32_arm_output_glue_section (info
, abfd
,
13822 globals
->bfd_of_glue_owner
,
13823 ARM2THUMB_GLUE_SECTION_NAME
))
13826 if (! elf32_arm_output_glue_section (info
, abfd
,
13827 globals
->bfd_of_glue_owner
,
13828 THUMB2ARM_GLUE_SECTION_NAME
))
13831 if (! elf32_arm_output_glue_section (info
, abfd
,
13832 globals
->bfd_of_glue_owner
,
13833 VFP11_ERRATUM_VENEER_SECTION_NAME
))
13836 if (! elf32_arm_output_glue_section (info
, abfd
,
13837 globals
->bfd_of_glue_owner
,
13838 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
13841 if (! elf32_arm_output_glue_section (info
, abfd
,
13842 globals
->bfd_of_glue_owner
,
13843 ARM_BX_GLUE_SECTION_NAME
))
13850 /* Return a best guess for the machine number based on the attributes. */
13852 static unsigned int
13853 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
13855 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
13859 case TAG_CPU_ARCH_PRE_V4
: return bfd_mach_arm_3M
;
13860 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
13861 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
13862 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
13864 case TAG_CPU_ARCH_V5TE
:
13868 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13869 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
13873 if (strcmp (name
, "IWMMXT2") == 0)
13874 return bfd_mach_arm_iWMMXt2
;
13876 if (strcmp (name
, "IWMMXT") == 0)
13877 return bfd_mach_arm_iWMMXt
;
13879 if (strcmp (name
, "XSCALE") == 0)
13883 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13884 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13887 case 1: return bfd_mach_arm_iWMMXt
;
13888 case 2: return bfd_mach_arm_iWMMXt2
;
13889 default: return bfd_mach_arm_XScale
;
13894 return bfd_mach_arm_5TE
;
13897 case TAG_CPU_ARCH_V5TEJ
:
13898 return bfd_mach_arm_5TEJ
;
13899 case TAG_CPU_ARCH_V6
:
13900 return bfd_mach_arm_6
;
13901 case TAG_CPU_ARCH_V6KZ
:
13902 return bfd_mach_arm_6KZ
;
13903 case TAG_CPU_ARCH_V6T2
:
13904 return bfd_mach_arm_6T2
;
13905 case TAG_CPU_ARCH_V6K
:
13906 return bfd_mach_arm_6K
;
13907 case TAG_CPU_ARCH_V7
:
13908 return bfd_mach_arm_7
;
13909 case TAG_CPU_ARCH_V6_M
:
13910 return bfd_mach_arm_6M
;
13911 case TAG_CPU_ARCH_V6S_M
:
13912 return bfd_mach_arm_6SM
;
13913 case TAG_CPU_ARCH_V7E_M
:
13914 return bfd_mach_arm_7EM
;
13915 case TAG_CPU_ARCH_V8
:
13916 return bfd_mach_arm_8
;
13917 case TAG_CPU_ARCH_V8R
:
13918 return bfd_mach_arm_8R
;
13919 case TAG_CPU_ARCH_V8M_BASE
:
13920 return bfd_mach_arm_8M_BASE
;
13921 case TAG_CPU_ARCH_V8M_MAIN
:
13922 return bfd_mach_arm_8M_MAIN
;
13923 case TAG_CPU_ARCH_V8_1M_MAIN
:
13924 return bfd_mach_arm_8_1M_MAIN
;
13927 /* Force entry to be added for any new known Tag_CPU_arch value. */
13928 BFD_ASSERT (arch
> MAX_TAG_CPU_ARCH
);
13930 /* Unknown Tag_CPU_arch value. */
13931 return bfd_mach_arm_unknown
;
13935 /* Set the right machine number. */
13938 elf32_arm_object_p (bfd
*abfd
)
13942 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13944 if (mach
== bfd_mach_arm_unknown
)
13946 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13947 mach
= bfd_mach_arm_ep9312
;
13949 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13952 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13956 /* Function to keep ARM specific flags in the ELF header. */
13959 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13961 if (elf_flags_init (abfd
)
13962 && elf_elfheader (abfd
)->e_flags
!= flags
)
13964 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13966 if (flags
& EF_ARM_INTERWORK
)
13968 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13972 (_("warning: clearing the interworking flag of %pB due to outside request"),
13978 elf_elfheader (abfd
)->e_flags
= flags
;
13979 elf_flags_init (abfd
) = TRUE
;
13985 /* Copy backend specific data from one object module to another. */
13988 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13991 flagword out_flags
;
13993 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13996 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13997 out_flags
= elf_elfheader (obfd
)->e_flags
;
13999 if (elf_flags_init (obfd
)
14000 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
14001 && in_flags
!= out_flags
)
14003 /* Cannot mix APCS26 and APCS32 code. */
14004 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
14007 /* Cannot mix float APCS and non-float APCS code. */
14008 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
14011 /* If the src and dest have different interworking flags
14012 then turn off the interworking bit. */
14013 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
14015 if (out_flags
& EF_ARM_INTERWORK
)
14017 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
14020 in_flags
&= ~EF_ARM_INTERWORK
;
14023 /* Likewise for PIC, though don't warn for this case. */
14024 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
14025 in_flags
&= ~EF_ARM_PIC
;
14028 elf_elfheader (obfd
)->e_flags
= in_flags
;
14029 elf_flags_init (obfd
) = TRUE
;
14031 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
14034 /* Values for Tag_ABI_PCS_R9_use. */
14043 /* Values for Tag_ABI_PCS_RW_data. */
14046 AEABI_PCS_RW_data_absolute
,
14047 AEABI_PCS_RW_data_PCrel
,
14048 AEABI_PCS_RW_data_SBrel
,
14049 AEABI_PCS_RW_data_unused
14052 /* Values for Tag_ABI_enum_size. */
14058 AEABI_enum_forced_wide
14061 /* Determine whether an object attribute tag takes an integer, a
14065 elf32_arm_obj_attrs_arg_type (int tag
)
14067 if (tag
== Tag_compatibility
)
14068 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
14069 else if (tag
== Tag_nodefaults
)
14070 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
14071 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
14072 return ATTR_TYPE_FLAG_STR_VAL
;
14074 return ATTR_TYPE_FLAG_INT_VAL
;
14076 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
14079 /* The ABI defines that Tag_conformance should be emitted first, and that
14080 Tag_nodefaults should be second (if either is defined). This sets those
14081 two positions, and bumps up the position of all the remaining tags to
14084 elf32_arm_obj_attrs_order (int num
)
14086 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
14087 return Tag_conformance
;
14088 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
14089 return Tag_nodefaults
;
14090 if ((num
- 2) < Tag_nodefaults
)
14092 if ((num
- 1) < Tag_conformance
)
14097 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14099 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
14101 if ((tag
& 127) < 64)
14104 (_("%pB: unknown mandatory EABI object attribute %d"),
14106 bfd_set_error (bfd_error_bad_value
);
14112 (_("warning: %pB: unknown EABI object attribute %d"),
14118 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14119 Returns -1 if no architecture could be read. */
14122 get_secondary_compatible_arch (bfd
*abfd
)
14124 obj_attribute
*attr
=
14125 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14127 /* Note: the tag and its argument below are uleb128 values, though
14128 currently-defined values fit in one byte for each. */
14130 && attr
->s
[0] == Tag_CPU_arch
14131 && (attr
->s
[1] & 128) != 128
14132 && attr
->s
[2] == 0)
14135 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14139 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14140 The tag is removed if ARCH is -1. */
14143 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
14145 obj_attribute
*attr
=
14146 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14154 /* Note: the tag and its argument below are uleb128 values, though
14155 currently-defined values fit in one byte for each. */
14157 attr
->s
= (char *) bfd_alloc (abfd
, 3);
14158 attr
->s
[0] = Tag_CPU_arch
;
14163 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14167 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
14168 int newtag
, int secondary_compat
)
14170 #define T(X) TAG_CPU_ARCH_##X
14171 int tagl
, tagh
, result
;
14174 T(V6T2
), /* PRE_V4. */
14176 T(V6T2
), /* V4T. */
14177 T(V6T2
), /* V5T. */
14178 T(V6T2
), /* V5TE. */
14179 T(V6T2
), /* V5TEJ. */
14182 T(V6T2
) /* V6T2. */
14186 T(V6K
), /* PRE_V4. */
14190 T(V6K
), /* V5TE. */
14191 T(V6K
), /* V5TEJ. */
14193 T(V6KZ
), /* V6KZ. */
14199 T(V7
), /* PRE_V4. */
14204 T(V7
), /* V5TEJ. */
14217 T(V6K
), /* V5TE. */
14218 T(V6K
), /* V5TEJ. */
14220 T(V6KZ
), /* V6KZ. */
14224 T(V6_M
) /* V6_M. */
14226 const int v6s_m
[] =
14232 T(V6K
), /* V5TE. */
14233 T(V6K
), /* V5TEJ. */
14235 T(V6KZ
), /* V6KZ. */
14239 T(V6S_M
), /* V6_M. */
14240 T(V6S_M
) /* V6S_M. */
14242 const int v7e_m
[] =
14246 T(V7E_M
), /* V4T. */
14247 T(V7E_M
), /* V5T. */
14248 T(V7E_M
), /* V5TE. */
14249 T(V7E_M
), /* V5TEJ. */
14250 T(V7E_M
), /* V6. */
14251 T(V7E_M
), /* V6KZ. */
14252 T(V7E_M
), /* V6T2. */
14253 T(V7E_M
), /* V6K. */
14254 T(V7E_M
), /* V7. */
14255 T(V7E_M
), /* V6_M. */
14256 T(V7E_M
), /* V6S_M. */
14257 T(V7E_M
) /* V7E_M. */
14261 T(V8
), /* PRE_V4. */
14266 T(V8
), /* V5TEJ. */
14273 T(V8
), /* V6S_M. */
14274 T(V8
), /* V7E_M. */
14279 T(V8R
), /* PRE_V4. */
14283 T(V8R
), /* V5TE. */
14284 T(V8R
), /* V5TEJ. */
14286 T(V8R
), /* V6KZ. */
14287 T(V8R
), /* V6T2. */
14290 T(V8R
), /* V6_M. */
14291 T(V8R
), /* V6S_M. */
14292 T(V8R
), /* V7E_M. */
14296 const int v8m_baseline
[] =
14309 T(V8M_BASE
), /* V6_M. */
14310 T(V8M_BASE
), /* V6S_M. */
14314 T(V8M_BASE
) /* V8-M BASELINE. */
14316 const int v8m_mainline
[] =
14328 T(V8M_MAIN
), /* V7. */
14329 T(V8M_MAIN
), /* V6_M. */
14330 T(V8M_MAIN
), /* V6S_M. */
14331 T(V8M_MAIN
), /* V7E_M. */
14334 T(V8M_MAIN
), /* V8-M BASELINE. */
14335 T(V8M_MAIN
) /* V8-M MAINLINE. */
14337 const int v8_1m_mainline
[] =
14349 T(V8_1M_MAIN
), /* V7. */
14350 T(V8_1M_MAIN
), /* V6_M. */
14351 T(V8_1M_MAIN
), /* V6S_M. */
14352 T(V8_1M_MAIN
), /* V7E_M. */
14355 T(V8_1M_MAIN
), /* V8-M BASELINE. */
14356 T(V8_1M_MAIN
), /* V8-M MAINLINE. */
14357 -1, /* Unused (18). */
14358 -1, /* Unused (19). */
14359 -1, /* Unused (20). */
14360 T(V8_1M_MAIN
) /* V8.1-M MAINLINE. */
14362 const int v4t_plus_v6_m
[] =
14368 T(V5TE
), /* V5TE. */
14369 T(V5TEJ
), /* V5TEJ. */
14371 T(V6KZ
), /* V6KZ. */
14372 T(V6T2
), /* V6T2. */
14375 T(V6_M
), /* V6_M. */
14376 T(V6S_M
), /* V6S_M. */
14377 T(V7E_M
), /* V7E_M. */
14380 T(V8M_BASE
), /* V8-M BASELINE. */
14381 T(V8M_MAIN
), /* V8-M MAINLINE. */
14382 -1, /* Unused (18). */
14383 -1, /* Unused (19). */
14384 -1, /* Unused (20). */
14385 T(V8_1M_MAIN
), /* V8.1-M MAINLINE. */
14386 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
14388 const int *comb
[] =
14404 /* Pseudo-architecture. */
14408 /* Check we've not got a higher architecture than we know about. */
14410 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
14412 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
14416 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14418 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
14419 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
14420 oldtag
= T(V4T_PLUS_V6_M
);
14422 /* And override the new tag if we have a Tag_also_compatible_with on the
14425 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
14426 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
14427 newtag
= T(V4T_PLUS_V6_M
);
14429 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
14430 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
14432 /* Architectures before V6KZ add features monotonically. */
14433 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
14436 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
14438 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14439 as the canonical version. */
14440 if (result
== T(V4T_PLUS_V6_M
))
14443 *secondary_compat_out
= T(V6_M
);
14446 *secondary_compat_out
= -1;
14450 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14451 ibfd
, oldtag
, newtag
);
14459 /* Query attributes object to see if integer divide instructions may be
14460 present in an object. */
14462 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
14464 int arch
= attr
[Tag_CPU_arch
].i
;
14465 int profile
= attr
[Tag_CPU_arch_profile
].i
;
14467 switch (attr
[Tag_DIV_use
].i
)
14470 /* Integer divide allowed if instruction contained in archetecture. */
14471 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
14473 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
14479 /* Integer divide explicitly prohibited. */
14483 /* Unrecognised case - treat as allowing divide everywhere. */
14485 /* Integer divide allowed in ARM state. */
14490 /* Query attributes object to see if integer divide instructions are
14491 forbidden to be in the object. This is not the inverse of
14492 elf32_arm_attributes_accept_div. */
14494 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
14496 return attr
[Tag_DIV_use
].i
== 1;
14499 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14500 are conflicting attributes. */
14503 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
14505 bfd
*obfd
= info
->output_bfd
;
14506 obj_attribute
*in_attr
;
14507 obj_attribute
*out_attr
;
14508 /* Some tags have 0 = don't care, 1 = strong requirement,
14509 2 = weak requirement. */
14510 static const int order_021
[3] = {0, 2, 1};
14512 bfd_boolean result
= TRUE
;
14513 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
14515 /* Skip the linker stubs file. This preserves previous behavior
14516 of accepting unknown attributes in the first input file - but
14518 if (ibfd
->flags
& BFD_LINKER_CREATED
)
14521 /* Skip any input that hasn't attribute section.
14522 This enables to link object files without attribute section with
14524 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
14527 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
14529 /* This is the first object. Copy the attributes. */
14530 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
14532 out_attr
= elf_known_obj_attributes_proc (obfd
);
14534 /* Use the Tag_null value to indicate the attributes have been
14538 /* We do not output objects with Tag_MPextension_use_legacy - we move
14539 the attribute's value to Tag_MPextension_use. */
14540 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
14542 if (out_attr
[Tag_MPextension_use
].i
!= 0
14543 && out_attr
[Tag_MPextension_use_legacy
].i
14544 != out_attr
[Tag_MPextension_use
].i
)
14547 (_("Error: %pB has both the current and legacy "
14548 "Tag_MPextension_use attributes"), ibfd
);
14552 out_attr
[Tag_MPextension_use
] =
14553 out_attr
[Tag_MPextension_use_legacy
];
14554 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
14555 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
14561 in_attr
= elf_known_obj_attributes_proc (ibfd
);
14562 out_attr
= elf_known_obj_attributes_proc (obfd
);
14563 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14564 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
14566 /* Ignore mismatches if the object doesn't use floating point or is
14567 floating point ABI independent. */
14568 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
14569 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14570 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
14571 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
14572 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14573 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
14576 (_("error: %pB uses VFP register arguments, %pB does not"),
14577 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
14578 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
14583 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
14585 /* Merge this attribute with existing attributes. */
14588 case Tag_CPU_raw_name
:
14590 /* These are merged after Tag_CPU_arch. */
14593 case Tag_ABI_optimization_goals
:
14594 case Tag_ABI_FP_optimization_goals
:
14595 /* Use the first value seen. */
14600 int secondary_compat
= -1, secondary_compat_out
= -1;
14601 unsigned int saved_out_attr
= out_attr
[i
].i
;
14603 static const char *name_table
[] =
14605 /* These aren't real CPU names, but we can't guess
14606 that from the architecture version alone. */
14622 "ARM v8-M.baseline",
14623 "ARM v8-M.mainline",
14626 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14627 secondary_compat
= get_secondary_compatible_arch (ibfd
);
14628 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
14629 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
14630 &secondary_compat_out
,
14634 /* Return with error if failed to merge. */
14635 if (arch_attr
== -1)
14638 out_attr
[i
].i
= arch_attr
;
14640 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
14642 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14643 if (out_attr
[i
].i
== saved_out_attr
)
14644 ; /* Leave the names alone. */
14645 else if (out_attr
[i
].i
== in_attr
[i
].i
)
14647 /* The output architecture has been changed to match the
14648 input architecture. Use the input names. */
14649 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
14650 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
14652 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
14653 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
14658 out_attr
[Tag_CPU_name
].s
= NULL
;
14659 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
14662 /* If we still don't have a value for Tag_CPU_name,
14663 make one up now. Tag_CPU_raw_name remains blank. */
14664 if (out_attr
[Tag_CPU_name
].s
== NULL
14665 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
14666 out_attr
[Tag_CPU_name
].s
=
14667 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
14671 case Tag_ARM_ISA_use
:
14672 case Tag_THUMB_ISA_use
:
14673 case Tag_WMMX_arch
:
14674 case Tag_Advanced_SIMD_arch
:
14675 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14676 case Tag_ABI_FP_rounding
:
14677 case Tag_ABI_FP_exceptions
:
14678 case Tag_ABI_FP_user_exceptions
:
14679 case Tag_ABI_FP_number_model
:
14680 case Tag_FP_HP_extension
:
14681 case Tag_CPU_unaligned_access
:
14683 case Tag_MPextension_use
:
14685 /* Use the largest value specified. */
14686 if (in_attr
[i
].i
> out_attr
[i
].i
)
14687 out_attr
[i
].i
= in_attr
[i
].i
;
14690 case Tag_ABI_align_preserved
:
14691 case Tag_ABI_PCS_RO_data
:
14692 /* Use the smallest value specified. */
14693 if (in_attr
[i
].i
< out_attr
[i
].i
)
14694 out_attr
[i
].i
= in_attr
[i
].i
;
14697 case Tag_ABI_align_needed
:
14698 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
14699 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
14700 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
14702 /* This error message should be enabled once all non-conformant
14703 binaries in the toolchain have had the attributes set
14706 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14710 /* Fall through. */
14711 case Tag_ABI_FP_denormal
:
14712 case Tag_ABI_PCS_GOT_use
:
14713 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14714 value if greater than 2 (for future-proofing). */
14715 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
14716 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
14717 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
14718 out_attr
[i
].i
= in_attr
[i
].i
;
14721 case Tag_Virtualization_use
:
14722 /* The virtualization tag effectively stores two bits of
14723 information: the intended use of TrustZone (in bit 0), and the
14724 intended use of Virtualization (in bit 1). */
14725 if (out_attr
[i
].i
== 0)
14726 out_attr
[i
].i
= in_attr
[i
].i
;
14727 else if (in_attr
[i
].i
!= 0
14728 && in_attr
[i
].i
!= out_attr
[i
].i
)
14730 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
14735 (_("error: %pB: unable to merge virtualization attributes "
14743 case Tag_CPU_arch_profile
:
14744 if (out_attr
[i
].i
!= in_attr
[i
].i
)
14746 /* 0 will merge with anything.
14747 'A' and 'S' merge to 'A'.
14748 'R' and 'S' merge to 'R'.
14749 'M' and 'A|R|S' is an error. */
14750 if (out_attr
[i
].i
== 0
14751 || (out_attr
[i
].i
== 'S'
14752 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
14753 out_attr
[i
].i
= in_attr
[i
].i
;
14754 else if (in_attr
[i
].i
== 0
14755 || (in_attr
[i
].i
== 'S'
14756 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
14757 ; /* Do nothing. */
14761 (_("error: %pB: conflicting architecture profiles %c/%c"),
14763 in_attr
[i
].i
? in_attr
[i
].i
: '0',
14764 out_attr
[i
].i
? out_attr
[i
].i
: '0');
14770 case Tag_DSP_extension
:
14771 /* No need to change output value if any of:
14772 - pre (<=) ARMv5T input architecture (do not have DSP)
14773 - M input profile not ARMv7E-M and do not have DSP. */
14774 if (in_attr
[Tag_CPU_arch
].i
<= 3
14775 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
14776 && in_attr
[Tag_CPU_arch
].i
!= 13
14777 && in_attr
[i
].i
== 0))
14778 ; /* Do nothing. */
14779 /* Output value should be 0 if DSP part of architecture, ie.
14780 - post (>=) ARMv5te architecture output
14781 - A, R or S profile output or ARMv7E-M output architecture. */
14782 else if (out_attr
[Tag_CPU_arch
].i
>= 4
14783 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
14784 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
14785 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
14786 || out_attr
[Tag_CPU_arch
].i
== 13))
14788 /* Otherwise, DSP instructions are added and not part of output
14796 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14797 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14798 when it's 0. It might mean absence of FP hardware if
14799 Tag_FP_arch is zero. */
14801 #define VFP_VERSION_COUNT 9
14802 static const struct
14806 } vfp_versions
[VFP_VERSION_COUNT
] =
14822 /* If the output has no requirement about FP hardware,
14823 follow the requirement of the input. */
14824 if (out_attr
[i
].i
== 0)
14826 /* This assert is still reasonable, we shouldn't
14827 produce the suspicious build attribute
14828 combination (See below for in_attr). */
14829 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
14830 out_attr
[i
].i
= in_attr
[i
].i
;
14831 out_attr
[Tag_ABI_HardFP_use
].i
14832 = in_attr
[Tag_ABI_HardFP_use
].i
;
14835 /* If the input has no requirement about FP hardware, do
14837 else if (in_attr
[i
].i
== 0)
14839 /* We used to assert that Tag_ABI_HardFP_use was
14840 zero here, but we should never assert when
14841 consuming an object file that has suspicious
14842 build attributes. The single precision variant
14843 of 'no FP architecture' is still 'no FP
14844 architecture', so we just ignore the tag in this
14849 /* Both the input and the output have nonzero Tag_FP_arch.
14850 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14852 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14854 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
14855 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
14857 /* If the input and the output have different Tag_ABI_HardFP_use,
14858 the combination of them is 0 (implied by Tag_FP_arch). */
14859 else if (in_attr
[Tag_ABI_HardFP_use
].i
14860 != out_attr
[Tag_ABI_HardFP_use
].i
)
14861 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
14863 /* Now we can handle Tag_FP_arch. */
14865 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14866 pick the biggest. */
14867 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
14868 && in_attr
[i
].i
> out_attr
[i
].i
)
14870 out_attr
[i
] = in_attr
[i
];
14873 /* The output uses the superset of input features
14874 (ISA version) and registers. */
14875 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
14876 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
14877 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
14878 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
14879 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
14880 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
14881 /* This assumes all possible supersets are also a valid
14883 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
14885 if (regs
== vfp_versions
[newval
].regs
14886 && ver
== vfp_versions
[newval
].ver
)
14889 out_attr
[i
].i
= newval
;
14892 case Tag_PCS_config
:
14893 if (out_attr
[i
].i
== 0)
14894 out_attr
[i
].i
= in_attr
[i
].i
;
14895 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
14897 /* It's sometimes ok to mix different configs, so this is only
14900 (_("warning: %pB: conflicting platform configuration"), ibfd
);
14903 case Tag_ABI_PCS_R9_use
:
14904 if (in_attr
[i
].i
!= out_attr
[i
].i
14905 && out_attr
[i
].i
!= AEABI_R9_unused
14906 && in_attr
[i
].i
!= AEABI_R9_unused
)
14909 (_("error: %pB: conflicting use of R9"), ibfd
);
14912 if (out_attr
[i
].i
== AEABI_R9_unused
)
14913 out_attr
[i
].i
= in_attr
[i
].i
;
14915 case Tag_ABI_PCS_RW_data
:
14916 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
14917 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
14918 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
14921 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14925 /* Use the smallest value specified. */
14926 if (in_attr
[i
].i
< out_attr
[i
].i
)
14927 out_attr
[i
].i
= in_attr
[i
].i
;
14929 case Tag_ABI_PCS_wchar_t
:
14930 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
14931 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
14934 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14935 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
14937 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
14938 out_attr
[i
].i
= in_attr
[i
].i
;
14940 case Tag_ABI_enum_size
:
14941 if (in_attr
[i
].i
!= AEABI_enum_unused
)
14943 if (out_attr
[i
].i
== AEABI_enum_unused
14944 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
14946 /* The existing object is compatible with anything.
14947 Use whatever requirements the new object has. */
14948 out_attr
[i
].i
= in_attr
[i
].i
;
14950 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14951 && out_attr
[i
].i
!= in_attr
[i
].i
14952 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14954 static const char *aeabi_enum_names
[] =
14955 { "", "variable-size", "32-bit", "" };
14956 const char *in_name
=
14957 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14958 ? aeabi_enum_names
[in_attr
[i
].i
]
14960 const char *out_name
=
14961 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14962 ? aeabi_enum_names
[out_attr
[i
].i
]
14965 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14966 ibfd
, in_name
, out_name
);
14970 case Tag_ABI_VFP_args
:
14973 case Tag_ABI_WMMX_args
:
14974 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14977 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14982 case Tag_compatibility
:
14983 /* Merged in target-independent code. */
14985 case Tag_ABI_HardFP_use
:
14986 /* This is handled along with Tag_FP_arch. */
14988 case Tag_ABI_FP_16bit_format
:
14989 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14991 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14994 (_("error: fp16 format mismatch between %pB and %pB"),
14999 if (in_attr
[i
].i
!= 0)
15000 out_attr
[i
].i
= in_attr
[i
].i
;
15004 /* A value of zero on input means that the divide instruction may
15005 be used if available in the base architecture as specified via
15006 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15007 the user did not want divide instructions. A value of 2
15008 explicitly means that divide instructions were allowed in ARM
15009 and Thumb state. */
15010 if (in_attr
[i
].i
== out_attr
[i
].i
)
15011 /* Do nothing. */ ;
15012 else if (elf32_arm_attributes_forbid_div (in_attr
)
15013 && !elf32_arm_attributes_accept_div (out_attr
))
15015 else if (elf32_arm_attributes_forbid_div (out_attr
)
15016 && elf32_arm_attributes_accept_div (in_attr
))
15017 out_attr
[i
].i
= in_attr
[i
].i
;
15018 else if (in_attr
[i
].i
== 2)
15019 out_attr
[i
].i
= in_attr
[i
].i
;
15022 case Tag_MPextension_use_legacy
:
15023 /* We don't output objects with Tag_MPextension_use_legacy - we
15024 move the value to Tag_MPextension_use. */
15025 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
15027 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
15030 (_("%pB has both the current and legacy "
15031 "Tag_MPextension_use attributes"),
15037 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
15038 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
15042 case Tag_nodefaults
:
15043 /* This tag is set if it exists, but the value is unused (and is
15044 typically zero). We don't actually need to do anything here -
15045 the merge happens automatically when the type flags are merged
15048 case Tag_also_compatible_with
:
15049 /* Already done in Tag_CPU_arch. */
15051 case Tag_conformance
:
15052 /* Keep the attribute if it matches. Throw it away otherwise.
15053 No attribute means no claim to conform. */
15054 if (!in_attr
[i
].s
|| !out_attr
[i
].s
15055 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
15056 out_attr
[i
].s
= NULL
;
15061 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
15064 /* If out_attr was copied from in_attr then it won't have a type yet. */
15065 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
15066 out_attr
[i
].type
= in_attr
[i
].type
;
15069 /* Merge Tag_compatibility attributes and any common GNU ones. */
15070 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
15073 /* Check for any attributes not known on ARM. */
15074 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
15080 /* Return TRUE if the two EABI versions are incompatible. */
15083 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
15085 /* v4 and v5 are the same spec before and after it was released,
15086 so allow mixing them. */
15087 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
15088 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
15091 return (iver
== over
);
15094 /* Merge backend specific data from an object file to the output
15095 object file when linking. */
15098 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
15100 /* Display the flags field. */
15103 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
15105 FILE * file
= (FILE *) ptr
;
15106 unsigned long flags
;
15108 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
15110 /* Print normal ELF private data. */
15111 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
15113 flags
= elf_elfheader (abfd
)->e_flags
;
15114 /* Ignore init flag - it may not be set, despite the flags field
15115 containing valid data. */
15117 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
15119 switch (EF_ARM_EABI_VERSION (flags
))
15121 case EF_ARM_EABI_UNKNOWN
:
15122 /* The following flag bits are GNU extensions and not part of the
15123 official ARM ELF extended ABI. Hence they are only decoded if
15124 the EABI version is not set. */
15125 if (flags
& EF_ARM_INTERWORK
)
15126 fprintf (file
, _(" [interworking enabled]"));
15128 if (flags
& EF_ARM_APCS_26
)
15129 fprintf (file
, " [APCS-26]");
15131 fprintf (file
, " [APCS-32]");
15133 if (flags
& EF_ARM_VFP_FLOAT
)
15134 fprintf (file
, _(" [VFP float format]"));
15135 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
15136 fprintf (file
, _(" [Maverick float format]"));
15138 fprintf (file
, _(" [FPA float format]"));
15140 if (flags
& EF_ARM_APCS_FLOAT
)
15141 fprintf (file
, _(" [floats passed in float registers]"));
15143 if (flags
& EF_ARM_PIC
)
15144 fprintf (file
, _(" [position independent]"));
15146 if (flags
& EF_ARM_NEW_ABI
)
15147 fprintf (file
, _(" [new ABI]"));
15149 if (flags
& EF_ARM_OLD_ABI
)
15150 fprintf (file
, _(" [old ABI]"));
15152 if (flags
& EF_ARM_SOFT_FLOAT
)
15153 fprintf (file
, _(" [software FP]"));
15155 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
15156 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
15157 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
15158 | EF_ARM_MAVERICK_FLOAT
);
15161 case EF_ARM_EABI_VER1
:
15162 fprintf (file
, _(" [Version1 EABI]"));
15164 if (flags
& EF_ARM_SYMSARESORTED
)
15165 fprintf (file
, _(" [sorted symbol table]"));
15167 fprintf (file
, _(" [unsorted symbol table]"));
15169 flags
&= ~ EF_ARM_SYMSARESORTED
;
15172 case EF_ARM_EABI_VER2
:
15173 fprintf (file
, _(" [Version2 EABI]"));
15175 if (flags
& EF_ARM_SYMSARESORTED
)
15176 fprintf (file
, _(" [sorted symbol table]"));
15178 fprintf (file
, _(" [unsorted symbol table]"));
15180 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
15181 fprintf (file
, _(" [dynamic symbols use segment index]"));
15183 if (flags
& EF_ARM_MAPSYMSFIRST
)
15184 fprintf (file
, _(" [mapping symbols precede others]"));
15186 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
15187 | EF_ARM_MAPSYMSFIRST
);
15190 case EF_ARM_EABI_VER3
:
15191 fprintf (file
, _(" [Version3 EABI]"));
15194 case EF_ARM_EABI_VER4
:
15195 fprintf (file
, _(" [Version4 EABI]"));
15198 case EF_ARM_EABI_VER5
:
15199 fprintf (file
, _(" [Version5 EABI]"));
15201 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
15202 fprintf (file
, _(" [soft-float ABI]"));
15204 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
15205 fprintf (file
, _(" [hard-float ABI]"));
15207 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
15210 if (flags
& EF_ARM_BE8
)
15211 fprintf (file
, _(" [BE8]"));
15213 if (flags
& EF_ARM_LE8
)
15214 fprintf (file
, _(" [LE8]"));
15216 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
15220 fprintf (file
, _(" <EABI version unrecognised>"));
15224 flags
&= ~ EF_ARM_EABIMASK
;
15226 if (flags
& EF_ARM_RELEXEC
)
15227 fprintf (file
, _(" [relocatable executable]"));
15229 if (flags
& EF_ARM_PIC
)
15230 fprintf (file
, _(" [position independent]"));
15232 if (elf_elfheader (abfd
)->e_ident
[EI_OSABI
] == ELFOSABI_ARM_FDPIC
)
15233 fprintf (file
, _(" [FDPIC ABI supplement]"));
15235 flags
&= ~ (EF_ARM_RELEXEC
| EF_ARM_PIC
);
15238 fprintf (file
, _("<Unrecognised flag bits set>"));
15240 fputc ('\n', file
);
15246 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
15248 switch (ELF_ST_TYPE (elf_sym
->st_info
))
15250 case STT_ARM_TFUNC
:
15251 return ELF_ST_TYPE (elf_sym
->st_info
);
15253 case STT_ARM_16BIT
:
15254 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15255 This allows us to distinguish between data used by Thumb instructions
15256 and non-data (which is probably code) inside Thumb regions of an
15258 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
15259 return ELF_ST_TYPE (elf_sym
->st_info
);
15270 elf32_arm_gc_mark_hook (asection
*sec
,
15271 struct bfd_link_info
*info
,
15272 Elf_Internal_Rela
*rel
,
15273 struct elf_link_hash_entry
*h
,
15274 Elf_Internal_Sym
*sym
)
15277 switch (ELF32_R_TYPE (rel
->r_info
))
15279 case R_ARM_GNU_VTINHERIT
:
15280 case R_ARM_GNU_VTENTRY
:
15284 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
15287 /* Look through the relocs for a section during the first phase. */
15290 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
15291 asection
*sec
, const Elf_Internal_Rela
*relocs
)
15293 Elf_Internal_Shdr
*symtab_hdr
;
15294 struct elf_link_hash_entry
**sym_hashes
;
15295 const Elf_Internal_Rela
*rel
;
15296 const Elf_Internal_Rela
*rel_end
;
15299 struct elf32_arm_link_hash_table
*htab
;
15300 bfd_boolean call_reloc_p
;
15301 bfd_boolean may_become_dynamic_p
;
15302 bfd_boolean may_need_local_target_p
;
15303 unsigned long nsyms
;
15305 if (bfd_link_relocatable (info
))
15308 BFD_ASSERT (is_arm_elf (abfd
));
15310 htab
= elf32_arm_hash_table (info
);
15316 /* Create dynamic sections for relocatable executables so that we can
15317 copy relocations. */
15318 if (htab
->root
.is_relocatable_executable
15319 && ! htab
->root
.dynamic_sections_created
)
15321 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
15325 if (htab
->root
.dynobj
== NULL
)
15326 htab
->root
.dynobj
= abfd
;
15327 if (!create_ifunc_sections (info
))
15330 dynobj
= htab
->root
.dynobj
;
15332 symtab_hdr
= & elf_symtab_hdr (abfd
);
15333 sym_hashes
= elf_sym_hashes (abfd
);
15334 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
15336 rel_end
= relocs
+ sec
->reloc_count
;
15337 for (rel
= relocs
; rel
< rel_end
; rel
++)
15339 Elf_Internal_Sym
*isym
;
15340 struct elf_link_hash_entry
*h
;
15341 struct elf32_arm_link_hash_entry
*eh
;
15342 unsigned int r_symndx
;
15345 r_symndx
= ELF32_R_SYM (rel
->r_info
);
15346 r_type
= ELF32_R_TYPE (rel
->r_info
);
15347 r_type
= arm_real_reloc_type (htab
, r_type
);
15349 if (r_symndx
>= nsyms
15350 /* PR 9934: It is possible to have relocations that do not
15351 refer to symbols, thus it is also possible to have an
15352 object file containing relocations but no symbol table. */
15353 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
15355 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
15364 if (r_symndx
< symtab_hdr
->sh_info
)
15366 /* A local symbol. */
15367 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
15374 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
15375 while (h
->root
.type
== bfd_link_hash_indirect
15376 || h
->root
.type
== bfd_link_hash_warning
)
15377 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15381 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15383 call_reloc_p
= FALSE
;
15384 may_become_dynamic_p
= FALSE
;
15385 may_need_local_target_p
= FALSE
;
15387 /* Could be done earlier, if h were already available. */
15388 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
15391 case R_ARM_GOTOFFFUNCDESC
:
15395 if (!elf32_arm_allocate_local_sym_info (abfd
))
15397 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].gotofffuncdesc_cnt
+= 1;
15398 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15402 eh
->fdpic_cnts
.gotofffuncdesc_cnt
++;
15407 case R_ARM_GOTFUNCDESC
:
15411 /* Such a relocation is not supposed to be generated
15412 by gcc on a static function. */
15413 /* Anyway if needed it could be handled. */
15418 eh
->fdpic_cnts
.gotfuncdesc_cnt
++;
15423 case R_ARM_FUNCDESC
:
15427 if (!elf32_arm_allocate_local_sym_info (abfd
))
15429 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_cnt
+= 1;
15430 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15434 eh
->fdpic_cnts
.funcdesc_cnt
++;
15440 case R_ARM_GOT_PREL
:
15441 case R_ARM_TLS_GD32
:
15442 case R_ARM_TLS_GD32_FDPIC
:
15443 case R_ARM_TLS_IE32
:
15444 case R_ARM_TLS_IE32_FDPIC
:
15445 case R_ARM_TLS_GOTDESC
:
15446 case R_ARM_TLS_DESCSEQ
:
15447 case R_ARM_THM_TLS_DESCSEQ
:
15448 case R_ARM_TLS_CALL
:
15449 case R_ARM_THM_TLS_CALL
:
15450 /* This symbol requires a global offset table entry. */
15452 int tls_type
, old_tls_type
;
15456 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
15457 case R_ARM_TLS_GD32_FDPIC
: tls_type
= GOT_TLS_GD
; break;
15459 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
15460 case R_ARM_TLS_IE32_FDPIC
: tls_type
= GOT_TLS_IE
; break;
15462 case R_ARM_TLS_GOTDESC
:
15463 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
15464 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
15465 tls_type
= GOT_TLS_GDESC
; break;
15467 default: tls_type
= GOT_NORMAL
; break;
15470 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
15471 info
->flags
|= DF_STATIC_TLS
;
15476 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15480 /* This is a global offset table entry for a local symbol. */
15481 if (!elf32_arm_allocate_local_sym_info (abfd
))
15483 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
15484 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
15487 /* If a variable is accessed with both tls methods, two
15488 slots may be created. */
15489 if (GOT_TLS_GD_ANY_P (old_tls_type
)
15490 && GOT_TLS_GD_ANY_P (tls_type
))
15491 tls_type
|= old_tls_type
;
15493 /* We will already have issued an error message if there
15494 is a TLS/non-TLS mismatch, based on the symbol
15495 type. So just combine any TLS types needed. */
15496 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
15497 && tls_type
!= GOT_NORMAL
)
15498 tls_type
|= old_tls_type
;
15500 /* If the symbol is accessed in both IE and GDESC
15501 method, we're able to relax. Turn off the GDESC flag,
15502 without messing up with any other kind of tls types
15503 that may be involved. */
15504 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
15505 tls_type
&= ~GOT_TLS_GDESC
;
15507 if (old_tls_type
!= tls_type
)
15510 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
15512 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
15515 /* Fall through. */
15517 case R_ARM_TLS_LDM32
:
15518 case R_ARM_TLS_LDM32_FDPIC
:
15519 if (r_type
== R_ARM_TLS_LDM32
|| r_type
== R_ARM_TLS_LDM32_FDPIC
)
15520 htab
->tls_ldm_got
.refcount
++;
15521 /* Fall through. */
15523 case R_ARM_GOTOFF32
:
15525 if (htab
->root
.sgot
== NULL
15526 && !create_got_section (htab
->root
.dynobj
, info
))
15535 case R_ARM_THM_CALL
:
15536 case R_ARM_THM_JUMP24
:
15537 case R_ARM_THM_JUMP19
:
15538 call_reloc_p
= TRUE
;
15539 may_need_local_target_p
= TRUE
;
15543 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15544 ldr __GOTT_INDEX__ offsets. */
15545 if (!htab
->vxworks_p
)
15547 may_need_local_target_p
= TRUE
;
15550 else goto jump_over
;
15552 /* Fall through. */
15554 case R_ARM_MOVW_ABS_NC
:
15555 case R_ARM_MOVT_ABS
:
15556 case R_ARM_THM_MOVW_ABS_NC
:
15557 case R_ARM_THM_MOVT_ABS
:
15558 if (bfd_link_pic (info
))
15561 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15562 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
15563 (h
) ? h
->root
.root
.string
: "a local symbol");
15564 bfd_set_error (bfd_error_bad_value
);
15568 /* Fall through. */
15570 case R_ARM_ABS32_NOI
:
15572 if (h
!= NULL
&& bfd_link_executable (info
))
15574 h
->pointer_equality_needed
= 1;
15576 /* Fall through. */
15578 case R_ARM_REL32_NOI
:
15579 case R_ARM_MOVW_PREL_NC
:
15580 case R_ARM_MOVT_PREL
:
15581 case R_ARM_THM_MOVW_PREL_NC
:
15582 case R_ARM_THM_MOVT_PREL
:
15584 /* Should the interworking branches be listed here? */
15585 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
15587 && (sec
->flags
& SEC_ALLOC
) != 0)
15590 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
15592 /* In shared libraries and relocatable executables,
15593 we treat local relative references as calls;
15594 see the related SYMBOL_CALLS_LOCAL code in
15595 allocate_dynrelocs. */
15596 call_reloc_p
= TRUE
;
15597 may_need_local_target_p
= TRUE
;
15600 /* We are creating a shared library or relocatable
15601 executable, and this is a reloc against a global symbol,
15602 or a non-PC-relative reloc against a local symbol.
15603 We may need to copy the reloc into the output. */
15604 may_become_dynamic_p
= TRUE
;
15607 may_need_local_target_p
= TRUE
;
15610 /* This relocation describes the C++ object vtable hierarchy.
15611 Reconstruct it for later use during GC. */
15612 case R_ARM_GNU_VTINHERIT
:
15613 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
15617 /* This relocation describes which C++ vtable entries are actually
15618 used. Record for later use during GC. */
15619 case R_ARM_GNU_VTENTRY
:
15620 if (!bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
15628 /* We may need a .plt entry if the function this reloc
15629 refers to is in a different object, regardless of the
15630 symbol's type. We can't tell for sure yet, because
15631 something later might force the symbol local. */
15633 else if (may_need_local_target_p
)
15634 /* If this reloc is in a read-only section, we might
15635 need a copy reloc. We can't check reliably at this
15636 stage whether the section is read-only, as input
15637 sections have not yet been mapped to output sections.
15638 Tentatively set the flag for now, and correct in
15639 adjust_dynamic_symbol. */
15640 h
->non_got_ref
= 1;
15643 if (may_need_local_target_p
15644 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
15646 union gotplt_union
*root_plt
;
15647 struct arm_plt_info
*arm_plt
;
15648 struct arm_local_iplt_info
*local_iplt
;
15652 root_plt
= &h
->plt
;
15653 arm_plt
= &eh
->plt
;
15657 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
15658 if (local_iplt
== NULL
)
15660 root_plt
= &local_iplt
->root
;
15661 arm_plt
= &local_iplt
->arm
;
15664 /* If the symbol is a function that doesn't bind locally,
15665 this relocation will need a PLT entry. */
15666 if (root_plt
->refcount
!= -1)
15667 root_plt
->refcount
+= 1;
15670 arm_plt
->noncall_refcount
++;
15672 /* It's too early to use htab->use_blx here, so we have to
15673 record possible blx references separately from
15674 relocs that definitely need a thumb stub. */
15676 if (r_type
== R_ARM_THM_CALL
)
15677 arm_plt
->maybe_thumb_refcount
+= 1;
15679 if (r_type
== R_ARM_THM_JUMP24
15680 || r_type
== R_ARM_THM_JUMP19
)
15681 arm_plt
->thumb_refcount
+= 1;
15684 if (may_become_dynamic_p
)
15686 struct elf_dyn_relocs
*p
, **head
;
15688 /* Create a reloc section in dynobj. */
15689 if (sreloc
== NULL
)
15691 sreloc
= _bfd_elf_make_dynamic_reloc_section
15692 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
15694 if (sreloc
== NULL
)
15697 /* BPABI objects never have dynamic relocations mapped. */
15698 if (htab
->symbian_p
)
15702 flags
= bfd_section_flags (sreloc
);
15703 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
15704 bfd_set_section_flags (sreloc
, flags
);
15708 /* If this is a global symbol, count the number of
15709 relocations we need for this symbol. */
15711 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
15714 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
15720 if (p
== NULL
|| p
->sec
!= sec
)
15722 bfd_size_type amt
= sizeof *p
;
15724 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
15734 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
15737 if (h
== NULL
&& htab
->fdpic_p
&& !bfd_link_pic(info
)
15738 && r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_ABS32_NOI
) {
15739 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15740 that will become rofixup. */
15741 /* This is due to the fact that we suppose all will become rofixup. */
15742 fprintf(stderr
, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type
);
15744 (_("FDPIC does not yet support %s relocation"
15745 " to become dynamic for executable"),
15746 elf32_arm_howto_table_1
[r_type
].name
);
15756 elf32_arm_update_relocs (asection
*o
,
15757 struct bfd_elf_section_reloc_data
*reldata
)
15759 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
15760 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
15761 const struct elf_backend_data
*bed
;
15762 _arm_elf_section_data
*eado
;
15763 struct bfd_link_order
*p
;
15764 bfd_byte
*erela_head
, *erela
;
15765 Elf_Internal_Rela
*irela_head
, *irela
;
15766 Elf_Internal_Shdr
*rel_hdr
;
15768 unsigned int count
;
15770 eado
= get_arm_elf_section_data (o
);
15772 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
15776 bed
= get_elf_backend_data (abfd
);
15777 rel_hdr
= reldata
->hdr
;
15779 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
15781 swap_in
= bed
->s
->swap_reloc_in
;
15782 swap_out
= bed
->s
->swap_reloc_out
;
15784 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
15786 swap_in
= bed
->s
->swap_reloca_in
;
15787 swap_out
= bed
->s
->swap_reloca_out
;
15792 erela_head
= rel_hdr
->contents
;
15793 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
15794 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
15796 erela
= erela_head
;
15797 irela
= irela_head
;
15800 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
15802 if (p
->type
== bfd_section_reloc_link_order
15803 || p
->type
== bfd_symbol_reloc_link_order
)
15805 (*swap_in
) (abfd
, erela
, irela
);
15806 erela
+= rel_hdr
->sh_entsize
;
15810 else if (p
->type
== bfd_indirect_link_order
)
15812 struct bfd_elf_section_reloc_data
*input_reldata
;
15813 arm_unwind_table_edit
*edit_list
, *edit_tail
;
15814 _arm_elf_section_data
*eadi
;
15819 i
= p
->u
.indirect
.section
;
15821 eadi
= get_arm_elf_section_data (i
);
15822 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
15823 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
15824 offset
= i
->output_offset
;
15826 if (eadi
->elf
.rel
.hdr
&&
15827 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15828 input_reldata
= &eadi
->elf
.rel
;
15829 else if (eadi
->elf
.rela
.hdr
&&
15830 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15831 input_reldata
= &eadi
->elf
.rela
;
15837 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15839 arm_unwind_table_edit
*edit_node
, *edit_next
;
15841 bfd_vma reloc_index
;
15843 (*swap_in
) (abfd
, erela
, irela
);
15844 reloc_index
= (irela
->r_offset
- offset
) / 8;
15847 edit_node
= edit_list
;
15848 for (edit_next
= edit_list
;
15849 edit_next
&& edit_next
->index
<= reloc_index
;
15850 edit_next
= edit_node
->next
)
15853 edit_node
= edit_next
;
15856 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
15857 || edit_node
->index
!= reloc_index
)
15859 irela
->r_offset
-= bias
* 8;
15864 erela
+= rel_hdr
->sh_entsize
;
15867 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
15869 /* New relocation entity. */
15870 asection
*text_sec
= edit_tail
->linked_section
;
15871 asection
*text_out
= text_sec
->output_section
;
15872 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
15874 irela
->r_addend
= 0;
15875 irela
->r_offset
= exidx_offset
;
15876 irela
->r_info
= ELF32_R_INFO
15877 (text_out
->target_index
, R_ARM_PREL31
);
15884 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15886 (*swap_in
) (abfd
, erela
, irela
);
15887 erela
+= rel_hdr
->sh_entsize
;
15891 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
15896 reldata
->count
= count
;
15897 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
15899 erela
= erela_head
;
15900 irela
= irela_head
;
15903 (*swap_out
) (abfd
, irela
, erela
);
15904 erela
+= rel_hdr
->sh_entsize
;
15911 /* Hashes are no longer valid. */
15912 free (reldata
->hashes
);
15913 reldata
->hashes
= NULL
;
15916 /* Unwinding tables are not referenced directly. This pass marks them as
15917 required if the corresponding code section is marked. Similarly, ARMv8-M
15918 secure entry functions can only be referenced by SG veneers which are
15919 created after the GC process. They need to be marked in case they reside in
15920 their own section (as would be the case if code was compiled with
15921 -ffunction-sections). */
15924 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
15925 elf_gc_mark_hook_fn gc_mark_hook
)
15928 Elf_Internal_Shdr
**elf_shdrp
;
15929 asection
*cmse_sec
;
15930 obj_attribute
*out_attr
;
15931 Elf_Internal_Shdr
*symtab_hdr
;
15932 unsigned i
, sym_count
, ext_start
;
15933 const struct elf_backend_data
*bed
;
15934 struct elf_link_hash_entry
**sym_hashes
;
15935 struct elf32_arm_link_hash_entry
*cmse_hash
;
15936 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
15937 bfd_boolean debug_sec_need_to_be_marked
= FALSE
;
15940 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
15942 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
15943 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
15944 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
15946 /* Marking EH data may cause additional code sections to be marked,
15947 requiring multiple passes. */
15952 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
15956 if (! is_arm_elf (sub
))
15959 elf_shdrp
= elf_elfsections (sub
);
15960 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
15962 Elf_Internal_Shdr
*hdr
;
15964 hdr
= &elf_section_data (o
)->this_hdr
;
15965 if (hdr
->sh_type
== SHT_ARM_EXIDX
15967 && hdr
->sh_link
< elf_numsections (sub
)
15969 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
15972 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
15977 /* Mark section holding ARMv8-M secure entry functions. We mark all
15978 of them so no need for a second browsing. */
15979 if (is_v8m
&& first_bfd_browse
)
15981 sym_hashes
= elf_sym_hashes (sub
);
15982 bed
= get_elf_backend_data (sub
);
15983 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
15984 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
15985 ext_start
= symtab_hdr
->sh_info
;
15987 /* Scan symbols. */
15988 for (i
= ext_start
; i
< sym_count
; i
++)
15990 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
15992 /* Assume it is a special symbol. If not, cmse_scan will
15993 warn about it and user can do something about it. */
15994 if (CONST_STRNEQ (cmse_hash
->root
.root
.root
.string
,
15997 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
15998 if (!cmse_sec
->gc_mark
15999 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
16001 /* The debug sections related to these secure entry
16002 functions are marked on enabling below flag. */
16003 debug_sec_need_to_be_marked
= TRUE
;
16007 if (debug_sec_need_to_be_marked
)
16009 /* Looping over all the sections of the object file containing
16010 Armv8-M secure entry functions and marking all the debug
16012 for (isec
= sub
->sections
; isec
!= NULL
; isec
= isec
->next
)
16014 /* If not a debug sections, skip it. */
16015 if (!isec
->gc_mark
&& (isec
->flags
& SEC_DEBUGGING
))
16016 isec
->gc_mark
= 1 ;
16018 debug_sec_need_to_be_marked
= FALSE
;
16022 first_bfd_browse
= FALSE
;
16028 /* Treat mapping symbols as special target symbols. */
16031 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
16033 return bfd_is_arm_special_symbol_name (sym
->name
,
16034 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
16037 /* This is a version of _bfd_elf_find_function() from dwarf2.c except that
16038 ARM mapping symbols are ignored when looking for function names
16039 and STT_ARM_TFUNC is considered to a function type. */
16042 arm_elf_find_function (bfd
* abfd
,
16043 asymbol
** symbols
,
16044 asection
* section
,
16046 const char ** filename_ptr
,
16047 const char ** functionname_ptr
)
16049 const char * filename
= NULL
;
16050 asymbol
* func
= NULL
;
16051 bfd_vma low_func
= 0;
16054 if (symbols
== NULL
)
16057 if (bfd_get_flavour (abfd
) != bfd_target_elf_flavour
)
16060 for (p
= symbols
; *p
!= NULL
; p
++)
16062 elf_symbol_type
*q
;
16064 q
= (elf_symbol_type
*) *p
;
16066 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
16071 filename
= bfd_asymbol_name (&q
->symbol
);
16074 case STT_ARM_TFUNC
:
16076 /* Skip mapping symbols. */
16077 if ((q
->symbol
.flags
& BSF_LOCAL
)
16078 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
16079 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
16081 /* Fall through. */
16082 if (bfd_asymbol_section (&q
->symbol
) == section
16083 && q
->symbol
.value
>= low_func
16084 && q
->symbol
.value
<= offset
)
16086 func
= (asymbol
*) q
;
16087 low_func
= q
->symbol
.value
;
16097 *filename_ptr
= filename
;
16098 if (functionname_ptr
)
16099 *functionname_ptr
= bfd_asymbol_name (func
);
16105 /* Find the nearest line to a particular section and offset, for error
16106 reporting. This code is a duplicate of the code in elf.c, except
16107 that it uses arm_elf_find_function. */
16110 elf32_arm_find_nearest_line (bfd
* abfd
,
16111 asymbol
** symbols
,
16112 asection
* section
,
16114 const char ** filename_ptr
,
16115 const char ** functionname_ptr
,
16116 unsigned int * line_ptr
,
16117 unsigned int * discriminator_ptr
)
16119 bfd_boolean found
= FALSE
;
16121 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
16122 filename_ptr
, functionname_ptr
,
16123 line_ptr
, discriminator_ptr
,
16124 dwarf_debug_sections
,
16125 & elf_tdata (abfd
)->dwarf2_find_line_info
))
16127 if (!*functionname_ptr
)
16128 arm_elf_find_function (abfd
, symbols
, section
, offset
,
16129 *filename_ptr
? NULL
: filename_ptr
,
16135 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
16138 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
16139 & found
, filename_ptr
,
16140 functionname_ptr
, line_ptr
,
16141 & elf_tdata (abfd
)->line_info
))
16144 if (found
&& (*functionname_ptr
|| *line_ptr
))
16147 if (symbols
== NULL
)
16150 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
16151 filename_ptr
, functionname_ptr
))
16159 elf32_arm_find_inliner_info (bfd
* abfd
,
16160 const char ** filename_ptr
,
16161 const char ** functionname_ptr
,
16162 unsigned int * line_ptr
)
16165 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
16166 functionname_ptr
, line_ptr
,
16167 & elf_tdata (abfd
)->dwarf2_find_line_info
);
16171 /* Find dynamic relocs for H that apply to read-only sections. */
16174 readonly_dynrelocs (struct elf_link_hash_entry
*h
)
16176 struct elf_dyn_relocs
*p
;
16178 for (p
= elf32_arm_hash_entry (h
)->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16180 asection
*s
= p
->sec
->output_section
;
16182 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
16188 /* Adjust a symbol defined by a dynamic object and referenced by a
16189 regular object. The current definition is in some section of the
16190 dynamic object, but we're not including those sections. We have to
16191 change the definition to something the rest of the link can
16195 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
16196 struct elf_link_hash_entry
* h
)
16199 asection
*s
, *srel
;
16200 struct elf32_arm_link_hash_entry
* eh
;
16201 struct elf32_arm_link_hash_table
*globals
;
16203 globals
= elf32_arm_hash_table (info
);
16204 if (globals
== NULL
)
16207 dynobj
= elf_hash_table (info
)->dynobj
;
16209 /* Make sure we know what is going on here. */
16210 BFD_ASSERT (dynobj
!= NULL
16212 || h
->type
== STT_GNU_IFUNC
16216 && !h
->def_regular
)));
16218 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16220 /* If this is a function, put it in the procedure linkage table. We
16221 will fill in the contents of the procedure linkage table later,
16222 when we know the address of the .got section. */
16223 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
16225 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16226 symbol binds locally. */
16227 if (h
->plt
.refcount
<= 0
16228 || (h
->type
!= STT_GNU_IFUNC
16229 && (SYMBOL_CALLS_LOCAL (info
, h
)
16230 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16231 && h
->root
.type
== bfd_link_hash_undefweak
))))
16233 /* This case can occur if we saw a PLT32 reloc in an input
16234 file, but the symbol was never referred to by a dynamic
16235 object, or if all references were garbage collected. In
16236 such a case, we don't actually need to build a procedure
16237 linkage table, and we can just do a PC24 reloc instead. */
16238 h
->plt
.offset
= (bfd_vma
) -1;
16239 eh
->plt
.thumb_refcount
= 0;
16240 eh
->plt
.maybe_thumb_refcount
= 0;
16241 eh
->plt
.noncall_refcount
= 0;
16249 /* It's possible that we incorrectly decided a .plt reloc was
16250 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16251 in check_relocs. We can't decide accurately between function
16252 and non-function syms in check-relocs; Objects loaded later in
16253 the link may change h->type. So fix it now. */
16254 h
->plt
.offset
= (bfd_vma
) -1;
16255 eh
->plt
.thumb_refcount
= 0;
16256 eh
->plt
.maybe_thumb_refcount
= 0;
16257 eh
->plt
.noncall_refcount
= 0;
16260 /* If this is a weak symbol, and there is a real definition, the
16261 processor independent code will have arranged for us to see the
16262 real definition first, and we can just use the same value. */
16263 if (h
->is_weakalias
)
16265 struct elf_link_hash_entry
*def
= weakdef (h
);
16266 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
16267 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
16268 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
16272 /* If there are no non-GOT references, we do not need a copy
16274 if (!h
->non_got_ref
)
16277 /* This is a reference to a symbol defined by a dynamic object which
16278 is not a function. */
16280 /* If we are creating a shared library, we must presume that the
16281 only references to the symbol are via the global offset table.
16282 For such cases we need not do anything here; the relocations will
16283 be handled correctly by relocate_section. Relocatable executables
16284 can reference data in shared objects directly, so we don't need to
16285 do anything here. */
16286 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
16289 /* We must allocate the symbol in our .dynbss section, which will
16290 become part of the .bss section of the executable. There will be
16291 an entry for this symbol in the .dynsym section. The dynamic
16292 object will contain position independent code, so all references
16293 from the dynamic object to this symbol will go through the global
16294 offset table. The dynamic linker will use the .dynsym entry to
16295 determine the address it must put in the global offset table, so
16296 both the dynamic object and the regular object will refer to the
16297 same memory location for the variable. */
16298 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16299 linker to copy the initial value out of the dynamic object and into
16300 the runtime process image. We need to remember the offset into the
16301 .rel(a).bss section we are going to use. */
16302 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
16304 s
= globals
->root
.sdynrelro
;
16305 srel
= globals
->root
.sreldynrelro
;
16309 s
= globals
->root
.sdynbss
;
16310 srel
= globals
->root
.srelbss
;
16312 if (info
->nocopyreloc
== 0
16313 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
16316 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16320 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
16323 /* Allocate space in .plt, .got and associated reloc sections for
16327 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
16329 struct bfd_link_info
*info
;
16330 struct elf32_arm_link_hash_table
*htab
;
16331 struct elf32_arm_link_hash_entry
*eh
;
16332 struct elf_dyn_relocs
*p
;
16334 if (h
->root
.type
== bfd_link_hash_indirect
)
16337 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16339 info
= (struct bfd_link_info
*) inf
;
16340 htab
= elf32_arm_hash_table (info
);
16344 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
16345 && h
->plt
.refcount
> 0)
16347 /* Make sure this symbol is output as a dynamic symbol.
16348 Undefined weak syms won't yet be marked as dynamic. */
16349 if (h
->dynindx
== -1 && !h
->forced_local
16350 && h
->root
.type
== bfd_link_hash_undefweak
)
16352 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16356 /* If the call in the PLT entry binds locally, the associated
16357 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16358 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16359 than the .plt section. */
16360 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
16363 if (eh
->plt
.noncall_refcount
== 0
16364 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16365 /* All non-call references can be resolved directly.
16366 This means that they can (and in some cases, must)
16367 resolve directly to the run-time target, rather than
16368 to the PLT. That in turns means that any .got entry
16369 would be equal to the .igot.plt entry, so there's
16370 no point having both. */
16371 h
->got
.refcount
= 0;
16374 if (bfd_link_pic (info
)
16376 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
16378 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
16380 /* If this symbol is not defined in a regular file, and we are
16381 not generating a shared library, then set the symbol to this
16382 location in the .plt. This is required to make function
16383 pointers compare as equal between the normal executable and
16384 the shared library. */
16385 if (! bfd_link_pic (info
)
16386 && !h
->def_regular
)
16388 h
->root
.u
.def
.section
= htab
->root
.splt
;
16389 h
->root
.u
.def
.value
= h
->plt
.offset
;
16391 /* Make sure the function is not marked as Thumb, in case
16392 it is the target of an ABS32 relocation, which will
16393 point to the PLT entry. */
16394 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16397 /* VxWorks executables have a second set of relocations for
16398 each PLT entry. They go in a separate relocation section,
16399 which is processed by the kernel loader. */
16400 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
16402 /* There is a relocation for the initial PLT entry:
16403 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16404 if (h
->plt
.offset
== htab
->plt_header_size
)
16405 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
16407 /* There are two extra relocations for each subsequent
16408 PLT entry: an R_ARM_32 relocation for the GOT entry,
16409 and an R_ARM_32 relocation for the PLT entry. */
16410 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
16415 h
->plt
.offset
= (bfd_vma
) -1;
16421 h
->plt
.offset
= (bfd_vma
) -1;
16425 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16426 eh
->tlsdesc_got
= (bfd_vma
) -1;
16428 if (h
->got
.refcount
> 0)
16432 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
16435 /* Make sure this symbol is output as a dynamic symbol.
16436 Undefined weak syms won't yet be marked as dynamic. */
16437 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1 && !h
->forced_local
16438 && h
->root
.type
== bfd_link_hash_undefweak
)
16440 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16444 if (!htab
->symbian_p
)
16446 s
= htab
->root
.sgot
;
16447 h
->got
.offset
= s
->size
;
16449 if (tls_type
== GOT_UNKNOWN
)
16452 if (tls_type
== GOT_NORMAL
)
16453 /* Non-TLS symbols need one GOT slot. */
16457 if (tls_type
& GOT_TLS_GDESC
)
16459 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16461 = (htab
->root
.sgotplt
->size
16462 - elf32_arm_compute_jump_table_size (htab
));
16463 htab
->root
.sgotplt
->size
+= 8;
16464 h
->got
.offset
= (bfd_vma
) -2;
16465 /* plt.got_offset needs to know there's a TLS_DESC
16466 reloc in the middle of .got.plt. */
16467 htab
->num_tls_desc
++;
16470 if (tls_type
& GOT_TLS_GD
)
16472 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16473 consecutive GOT slots. If the symbol is both GD
16474 and GDESC, got.offset may have been
16476 h
->got
.offset
= s
->size
;
16480 if (tls_type
& GOT_TLS_IE
)
16481 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16486 dyn
= htab
->root
.dynamic_sections_created
;
16489 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
16490 bfd_link_pic (info
),
16492 && (!bfd_link_pic (info
)
16493 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
16496 if (tls_type
!= GOT_NORMAL
16497 && (bfd_link_dll (info
) || indx
!= 0)
16498 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16499 || h
->root
.type
!= bfd_link_hash_undefweak
))
16501 if (tls_type
& GOT_TLS_IE
)
16502 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16504 if (tls_type
& GOT_TLS_GD
)
16505 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16507 if (tls_type
& GOT_TLS_GDESC
)
16509 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
16510 /* GDESC needs a trampoline to jump to. */
16511 htab
->tls_trampoline
= -1;
16514 /* Only GD needs it. GDESC just emits one relocation per
16516 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
16517 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16519 else if (((indx
!= -1) || htab
->fdpic_p
)
16520 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
16522 if (htab
->root
.dynamic_sections_created
)
16523 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16524 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16526 else if (h
->type
== STT_GNU_IFUNC
16527 && eh
->plt
.noncall_refcount
== 0)
16528 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16529 they all resolve dynamically instead. Reserve room for the
16530 GOT entry's R_ARM_IRELATIVE relocation. */
16531 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
16532 else if (bfd_link_pic (info
)
16533 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16534 || h
->root
.type
!= bfd_link_hash_undefweak
))
16535 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16536 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16537 else if (htab
->fdpic_p
&& tls_type
== GOT_NORMAL
)
16538 /* Reserve room for rofixup for FDPIC executable. */
16539 /* TLS relocs do not need space since they are completely
16541 htab
->srofixup
->size
+= 4;
16545 h
->got
.offset
= (bfd_vma
) -1;
16547 /* FDPIC support. */
16548 if (eh
->fdpic_cnts
.gotofffuncdesc_cnt
> 0)
16550 /* Symbol musn't be exported. */
16551 if (h
->dynindx
!= -1)
16554 /* We only allocate one function descriptor with its associated relocation. */
16555 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16557 asection
*s
= htab
->root
.sgot
;
16559 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16561 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16562 if (bfd_link_pic(info
))
16563 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16565 htab
->srofixup
->size
+= 8;
16569 if (eh
->fdpic_cnts
.gotfuncdesc_cnt
> 0)
16571 asection
*s
= htab
->root
.sgot
;
16573 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16574 && !h
->forced_local
)
16575 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16578 if (h
->dynindx
== -1)
16580 /* We only allocate one function descriptor with its associated relocation. q */
16581 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16584 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16586 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16587 if (bfd_link_pic(info
))
16588 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16590 htab
->srofixup
->size
+= 8;
16594 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16595 R_ARM_RELATIVE/rofixup relocation on it. */
16596 eh
->fdpic_cnts
.gotfuncdesc_offset
= s
->size
;
16598 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16599 htab
->srofixup
->size
+= 4;
16601 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16604 if (eh
->fdpic_cnts
.funcdesc_cnt
> 0)
16606 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16607 && !h
->forced_local
)
16608 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16611 if (h
->dynindx
== -1)
16613 /* We only allocate one function descriptor with its associated relocation. */
16614 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16616 asection
*s
= htab
->root
.sgot
;
16618 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16620 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16621 if (bfd_link_pic(info
))
16622 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16624 htab
->srofixup
->size
+= 8;
16627 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16629 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16630 htab
->srofixup
->size
+= 4 * eh
->fdpic_cnts
.funcdesc_cnt
;
16634 /* Will need one dynamic reloc per reference. will be either
16635 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16636 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
,
16637 eh
->fdpic_cnts
.funcdesc_cnt
);
16641 /* Allocate stubs for exported Thumb functions on v4t. */
16642 if (!htab
->use_blx
&& h
->dynindx
!= -1
16644 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
16645 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
16647 struct elf_link_hash_entry
* th
;
16648 struct bfd_link_hash_entry
* bh
;
16649 struct elf_link_hash_entry
* myh
;
16653 /* Create a new symbol to regist the real location of the function. */
16654 s
= h
->root
.u
.def
.section
;
16655 sprintf (name
, "__real_%s", h
->root
.root
.string
);
16656 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
16657 name
, BSF_GLOBAL
, s
,
16658 h
->root
.u
.def
.value
,
16659 NULL
, TRUE
, FALSE
, &bh
);
16661 myh
= (struct elf_link_hash_entry
*) bh
;
16662 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16663 myh
->forced_local
= 1;
16664 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
16665 eh
->export_glue
= myh
;
16666 th
= record_arm_to_thumb_glue (info
, h
);
16667 /* Point the symbol at the stub. */
16668 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
16669 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16670 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
16671 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
16674 if (eh
->dyn_relocs
== NULL
)
16677 /* In the shared -Bsymbolic case, discard space allocated for
16678 dynamic pc-relative relocs against symbols which turn out to be
16679 defined in regular objects. For the normal shared case, discard
16680 space for pc-relative relocs that have become local due to symbol
16681 visibility changes. */
16683 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
|| htab
->fdpic_p
)
16685 /* Relocs that use pc_count are PC-relative forms, which will appear
16686 on something like ".long foo - ." or "movw REG, foo - .". We want
16687 calls to protected symbols to resolve directly to the function
16688 rather than going via the plt. If people want function pointer
16689 comparisons to work as expected then they should avoid writing
16690 assembly like ".long foo - .". */
16691 if (SYMBOL_CALLS_LOCAL (info
, h
))
16693 struct elf_dyn_relocs
**pp
;
16695 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
16697 p
->count
-= p
->pc_count
;
16706 if (htab
->vxworks_p
)
16708 struct elf_dyn_relocs
**pp
;
16710 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
16712 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
16719 /* Also discard relocs on undefined weak syms with non-default
16721 if (eh
->dyn_relocs
!= NULL
16722 && h
->root
.type
== bfd_link_hash_undefweak
)
16724 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16725 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16726 eh
->dyn_relocs
= NULL
;
16728 /* Make sure undefined weak symbols are output as a dynamic
16730 else if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16731 && !h
->forced_local
)
16733 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16738 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
16739 && h
->root
.type
== bfd_link_hash_new
)
16741 /* Output absolute symbols so that we can create relocations
16742 against them. For normal symbols we output a relocation
16743 against the section that contains them. */
16744 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16751 /* For the non-shared case, discard space for relocs against
16752 symbols which turn out to need copy relocs or are not
16755 if (!h
->non_got_ref
16756 && ((h
->def_dynamic
16757 && !h
->def_regular
)
16758 || (htab
->root
.dynamic_sections_created
16759 && (h
->root
.type
== bfd_link_hash_undefweak
16760 || h
->root
.type
== bfd_link_hash_undefined
))))
16762 /* Make sure this symbol is output as a dynamic symbol.
16763 Undefined weak syms won't yet be marked as dynamic. */
16764 if (h
->dynindx
== -1 && !h
->forced_local
16765 && h
->root
.type
== bfd_link_hash_undefweak
)
16767 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16771 /* If that succeeded, we know we'll be keeping all the
16773 if (h
->dynindx
!= -1)
16777 eh
->dyn_relocs
= NULL
;
16782 /* Finally, allocate space. */
16783 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16785 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
16787 if (h
->type
== STT_GNU_IFUNC
16788 && eh
->plt
.noncall_refcount
== 0
16789 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16790 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
16791 else if (h
->dynindx
!= -1 && (!bfd_link_pic(info
) || !info
->symbolic
|| !h
->def_regular
))
16792 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16793 else if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16794 htab
->srofixup
->size
+= 4 * p
->count
;
16796 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16802 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16803 read-only sections. */
16806 maybe_set_textrel (struct elf_link_hash_entry
*h
, void *info_p
)
16810 if (h
->root
.type
== bfd_link_hash_indirect
)
16813 sec
= readonly_dynrelocs (h
);
16816 struct bfd_link_info
*info
= (struct bfd_link_info
*) info_p
;
16818 info
->flags
|= DF_TEXTREL
;
16819 info
->callbacks
->minfo
16820 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16821 sec
->owner
, h
->root
.root
.string
, sec
);
16823 /* Not an error, just cut short the traversal. */
16831 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
16834 struct elf32_arm_link_hash_table
*globals
;
16836 globals
= elf32_arm_hash_table (info
);
16837 if (globals
== NULL
)
16840 globals
->byteswap_code
= byteswap_code
;
16843 /* Set the sizes of the dynamic sections. */
16846 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
16847 struct bfd_link_info
* info
)
16852 bfd_boolean relocs
;
16854 struct elf32_arm_link_hash_table
*htab
;
16856 htab
= elf32_arm_hash_table (info
);
16860 dynobj
= elf_hash_table (info
)->dynobj
;
16861 BFD_ASSERT (dynobj
!= NULL
);
16862 check_use_blx (htab
);
16864 if (elf_hash_table (info
)->dynamic_sections_created
)
16866 /* Set the contents of the .interp section to the interpreter. */
16867 if (bfd_link_executable (info
) && !info
->nointerp
)
16869 s
= bfd_get_linker_section (dynobj
, ".interp");
16870 BFD_ASSERT (s
!= NULL
);
16871 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
16872 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
16876 /* Set up .got offsets for local syms, and space for local dynamic
16878 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16880 bfd_signed_vma
*local_got
;
16881 bfd_signed_vma
*end_local_got
;
16882 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
16883 char *local_tls_type
;
16884 bfd_vma
*local_tlsdesc_gotent
;
16885 bfd_size_type locsymcount
;
16886 Elf_Internal_Shdr
*symtab_hdr
;
16888 bfd_boolean is_vxworks
= htab
->vxworks_p
;
16889 unsigned int symndx
;
16890 struct fdpic_local
*local_fdpic_cnts
;
16892 if (! is_arm_elf (ibfd
))
16895 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
16897 struct elf_dyn_relocs
*p
;
16899 for (p
= (struct elf_dyn_relocs
*)
16900 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
16902 if (!bfd_is_abs_section (p
->sec
)
16903 && bfd_is_abs_section (p
->sec
->output_section
))
16905 /* Input section has been discarded, either because
16906 it is a copy of a linkonce section or due to
16907 linker script /DISCARD/, so we'll be discarding
16910 else if (is_vxworks
16911 && strcmp (p
->sec
->output_section
->name
,
16914 /* Relocations in vxworks .tls_vars sections are
16915 handled specially by the loader. */
16917 else if (p
->count
!= 0)
16919 srel
= elf_section_data (p
->sec
)->sreloc
;
16920 if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16921 htab
->srofixup
->size
+= 4 * p
->count
;
16923 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
16924 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
16925 info
->flags
|= DF_TEXTREL
;
16930 local_got
= elf_local_got_refcounts (ibfd
);
16934 symtab_hdr
= & elf_symtab_hdr (ibfd
);
16935 locsymcount
= symtab_hdr
->sh_info
;
16936 end_local_got
= local_got
+ locsymcount
;
16937 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
16938 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
16939 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
16940 local_fdpic_cnts
= elf32_arm_local_fdpic_cnts (ibfd
);
16942 s
= htab
->root
.sgot
;
16943 srel
= htab
->root
.srelgot
;
16944 for (; local_got
< end_local_got
;
16945 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
16946 ++local_tlsdesc_gotent
, ++symndx
, ++local_fdpic_cnts
)
16948 *local_tlsdesc_gotent
= (bfd_vma
) -1;
16949 local_iplt
= *local_iplt_ptr
;
16951 /* FDPIC support. */
16952 if (local_fdpic_cnts
->gotofffuncdesc_cnt
> 0)
16954 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16956 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16959 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16960 if (bfd_link_pic(info
))
16961 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16963 htab
->srofixup
->size
+= 8;
16967 if (local_fdpic_cnts
->funcdesc_cnt
> 0)
16969 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16971 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16974 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16975 if (bfd_link_pic(info
))
16976 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16978 htab
->srofixup
->size
+= 8;
16981 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16982 if (bfd_link_pic(info
))
16983 elf32_arm_allocate_dynrelocs (info
, srel
, local_fdpic_cnts
->funcdesc_cnt
);
16985 htab
->srofixup
->size
+= 4 * local_fdpic_cnts
->funcdesc_cnt
;
16988 if (local_iplt
!= NULL
)
16990 struct elf_dyn_relocs
*p
;
16992 if (local_iplt
->root
.refcount
> 0)
16994 elf32_arm_allocate_plt_entry (info
, TRUE
,
16997 if (local_iplt
->arm
.noncall_refcount
== 0)
16998 /* All references to the PLT are calls, so all
16999 non-call references can resolve directly to the
17000 run-time target. This means that the .got entry
17001 would be the same as the .igot.plt entry, so there's
17002 no point creating both. */
17007 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
17008 local_iplt
->root
.offset
= (bfd_vma
) -1;
17011 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
17015 psrel
= elf_section_data (p
->sec
)->sreloc
;
17016 if (local_iplt
->arm
.noncall_refcount
== 0)
17017 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
17019 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
17022 if (*local_got
> 0)
17024 Elf_Internal_Sym
*isym
;
17026 *local_got
= s
->size
;
17027 if (*local_tls_type
& GOT_TLS_GD
)
17028 /* TLS_GD relocs need an 8-byte structure in the GOT. */
17030 if (*local_tls_type
& GOT_TLS_GDESC
)
17032 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
17033 - elf32_arm_compute_jump_table_size (htab
);
17034 htab
->root
.sgotplt
->size
+= 8;
17035 *local_got
= (bfd_vma
) -2;
17036 /* plt.got_offset needs to know there's a TLS_DESC
17037 reloc in the middle of .got.plt. */
17038 htab
->num_tls_desc
++;
17040 if (*local_tls_type
& GOT_TLS_IE
)
17043 if (*local_tls_type
& GOT_NORMAL
)
17045 /* If the symbol is both GD and GDESC, *local_got
17046 may have been overwritten. */
17047 *local_got
= s
->size
;
17051 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
17055 /* If all references to an STT_GNU_IFUNC PLT are calls,
17056 then all non-call references, including this GOT entry,
17057 resolve directly to the run-time target. */
17058 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
17059 && (local_iplt
== NULL
17060 || local_iplt
->arm
.noncall_refcount
== 0))
17061 elf32_arm_allocate_irelocs (info
, srel
, 1);
17062 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
|| htab
->fdpic_p
)
17064 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
)))
17065 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
17066 else if (htab
->fdpic_p
&& *local_tls_type
& GOT_NORMAL
)
17067 htab
->srofixup
->size
+= 4;
17069 if ((bfd_link_pic (info
) || htab
->fdpic_p
)
17070 && *local_tls_type
& GOT_TLS_GDESC
)
17072 elf32_arm_allocate_dynrelocs (info
,
17073 htab
->root
.srelplt
, 1);
17074 htab
->tls_trampoline
= -1;
17079 *local_got
= (bfd_vma
) -1;
17083 if (htab
->tls_ldm_got
.refcount
> 0)
17085 /* Allocate two GOT entries and one dynamic relocation (if necessary)
17086 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
17087 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
17088 htab
->root
.sgot
->size
+= 8;
17089 if (bfd_link_pic (info
))
17090 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
17093 htab
->tls_ldm_got
.offset
= -1;
17095 /* At the very end of the .rofixup section is a pointer to the GOT,
17096 reserve space for it. */
17097 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17098 htab
->srofixup
->size
+= 4;
17100 /* Allocate global sym .plt and .got entries, and space for global
17101 sym dynamic relocs. */
17102 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
17104 /* Here we rummage through the found bfds to collect glue information. */
17105 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
17107 if (! is_arm_elf (ibfd
))
17110 /* Initialise mapping tables for code/data. */
17111 bfd_elf32_arm_init_maps (ibfd
);
17113 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
17114 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
17115 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
17116 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
17119 /* Allocate space for the glue sections now that we've sized them. */
17120 bfd_elf32_arm_allocate_interworking_sections (info
);
17122 /* For every jump slot reserved in the sgotplt, reloc_count is
17123 incremented. However, when we reserve space for TLS descriptors,
17124 it's not incremented, so in order to compute the space reserved
17125 for them, it suffices to multiply the reloc count by the jump
17127 if (htab
->root
.srelplt
)
17128 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
17130 if (htab
->tls_trampoline
)
17132 if (htab
->root
.splt
->size
== 0)
17133 htab
->root
.splt
->size
+= htab
->plt_header_size
;
17135 htab
->tls_trampoline
= htab
->root
.splt
->size
;
17136 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
17138 /* If we're not using lazy TLS relocations, don't generate the
17139 PLT and GOT entries they require. */
17140 if (!(info
->flags
& DF_BIND_NOW
))
17142 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
17143 htab
->root
.sgot
->size
+= 4;
17145 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
17146 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
17150 /* The check_relocs and adjust_dynamic_symbol entry points have
17151 determined the sizes of the various dynamic sections. Allocate
17152 memory for them. */
17155 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
17159 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
17162 /* It's OK to base decisions on the section name, because none
17163 of the dynobj section names depend upon the input files. */
17164 name
= bfd_section_name (s
);
17166 if (s
== htab
->root
.splt
)
17168 /* Remember whether there is a PLT. */
17169 plt
= s
->size
!= 0;
17171 else if (CONST_STRNEQ (name
, ".rel"))
17175 /* Remember whether there are any reloc sections other
17176 than .rel(a).plt and .rela.plt.unloaded. */
17177 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
17180 /* We use the reloc_count field as a counter if we need
17181 to copy relocs into the output file. */
17182 s
->reloc_count
= 0;
17185 else if (s
!= htab
->root
.sgot
17186 && s
!= htab
->root
.sgotplt
17187 && s
!= htab
->root
.iplt
17188 && s
!= htab
->root
.igotplt
17189 && s
!= htab
->root
.sdynbss
17190 && s
!= htab
->root
.sdynrelro
17191 && s
!= htab
->srofixup
)
17193 /* It's not one of our sections, so don't allocate space. */
17199 /* If we don't need this section, strip it from the
17200 output file. This is mostly to handle .rel(a).bss and
17201 .rel(a).plt. We must create both sections in
17202 create_dynamic_sections, because they must be created
17203 before the linker maps input sections to output
17204 sections. The linker does that before
17205 adjust_dynamic_symbol is called, and it is that
17206 function which decides whether anything needs to go
17207 into these sections. */
17208 s
->flags
|= SEC_EXCLUDE
;
17212 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
17215 /* Allocate memory for the section contents. */
17216 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
17217 if (s
->contents
== NULL
)
17221 if (elf_hash_table (info
)->dynamic_sections_created
)
17223 /* Add some entries to the .dynamic section. We fill in the
17224 values later, in elf32_arm_finish_dynamic_sections, but we
17225 must add the entries now so that we get the correct size for
17226 the .dynamic section. The DT_DEBUG entry is filled in by the
17227 dynamic linker and used by the debugger. */
17228 #define add_dynamic_entry(TAG, VAL) \
17229 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17231 if (bfd_link_executable (info
))
17233 if (!add_dynamic_entry (DT_DEBUG
, 0))
17239 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
17240 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
17241 || !add_dynamic_entry (DT_PLTREL
,
17242 htab
->use_rel
? DT_REL
: DT_RELA
)
17243 || !add_dynamic_entry (DT_JMPREL
, 0))
17246 if (htab
->dt_tlsdesc_plt
17247 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
17248 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
17256 if (!add_dynamic_entry (DT_REL
, 0)
17257 || !add_dynamic_entry (DT_RELSZ
, 0)
17258 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
17263 if (!add_dynamic_entry (DT_RELA
, 0)
17264 || !add_dynamic_entry (DT_RELASZ
, 0)
17265 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
17270 /* If any dynamic relocs apply to a read-only section,
17271 then we need a DT_TEXTREL entry. */
17272 if ((info
->flags
& DF_TEXTREL
) == 0)
17273 elf_link_hash_traverse (&htab
->root
, maybe_set_textrel
, info
);
17275 if ((info
->flags
& DF_TEXTREL
) != 0)
17277 if (!add_dynamic_entry (DT_TEXTREL
, 0))
17280 if (htab
->vxworks_p
17281 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
17284 #undef add_dynamic_entry
17289 /* Size sections even though they're not dynamic. We use it to setup
17290 _TLS_MODULE_BASE_, if needed. */
17293 elf32_arm_always_size_sections (bfd
*output_bfd
,
17294 struct bfd_link_info
*info
)
17297 struct elf32_arm_link_hash_table
*htab
;
17299 htab
= elf32_arm_hash_table (info
);
17301 if (bfd_link_relocatable (info
))
17304 tls_sec
= elf_hash_table (info
)->tls_sec
;
17308 struct elf_link_hash_entry
*tlsbase
;
17310 tlsbase
= elf_link_hash_lookup
17311 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
17315 struct bfd_link_hash_entry
*bh
= NULL
;
17316 const struct elf_backend_data
*bed
17317 = get_elf_backend_data (output_bfd
);
17319 if (!(_bfd_generic_link_add_one_symbol
17320 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
17321 tls_sec
, 0, NULL
, FALSE
,
17322 bed
->collect
, &bh
)))
17325 tlsbase
->type
= STT_TLS
;
17326 tlsbase
= (struct elf_link_hash_entry
*)bh
;
17327 tlsbase
->def_regular
= 1;
17328 tlsbase
->other
= STV_HIDDEN
;
17329 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
17333 if (htab
->fdpic_p
&& !bfd_link_relocatable (info
)
17334 && !bfd_elf_stack_segment_size (output_bfd
, info
,
17335 "__stacksize", DEFAULT_STACK_SIZE
))
17341 /* Finish up dynamic symbol handling. We set the contents of various
17342 dynamic sections here. */
17345 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
17346 struct bfd_link_info
* info
,
17347 struct elf_link_hash_entry
* h
,
17348 Elf_Internal_Sym
* sym
)
17350 struct elf32_arm_link_hash_table
*htab
;
17351 struct elf32_arm_link_hash_entry
*eh
;
17353 htab
= elf32_arm_hash_table (info
);
17357 eh
= (struct elf32_arm_link_hash_entry
*) h
;
17359 if (h
->plt
.offset
!= (bfd_vma
) -1)
17363 BFD_ASSERT (h
->dynindx
!= -1);
17364 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
17369 if (!h
->def_regular
)
17371 /* Mark the symbol as undefined, rather than as defined in
17372 the .plt section. */
17373 sym
->st_shndx
= SHN_UNDEF
;
17374 /* If the symbol is weak we need to clear the value.
17375 Otherwise, the PLT entry would provide a definition for
17376 the symbol even if the symbol wasn't defined anywhere,
17377 and so the symbol would never be NULL. Leave the value if
17378 there were any relocations where pointer equality matters
17379 (this is a clue for the dynamic linker, to make function
17380 pointer comparisons work between an application and shared
17382 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
17385 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
17387 /* At least one non-call relocation references this .iplt entry,
17388 so the .iplt entry is the function's canonical address. */
17389 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
17390 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
17391 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
17392 (output_bfd
, htab
->root
.iplt
->output_section
));
17393 sym
->st_value
= (h
->plt
.offset
17394 + htab
->root
.iplt
->output_section
->vma
17395 + htab
->root
.iplt
->output_offset
);
17402 Elf_Internal_Rela rel
;
17404 /* This symbol needs a copy reloc. Set it up. */
17405 BFD_ASSERT (h
->dynindx
!= -1
17406 && (h
->root
.type
== bfd_link_hash_defined
17407 || h
->root
.type
== bfd_link_hash_defweak
));
17410 rel
.r_offset
= (h
->root
.u
.def
.value
17411 + h
->root
.u
.def
.section
->output_section
->vma
17412 + h
->root
.u
.def
.section
->output_offset
);
17413 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
17414 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
17415 s
= htab
->root
.sreldynrelro
;
17417 s
= htab
->root
.srelbss
;
17418 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
17421 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17422 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17423 it is relative to the ".got" section. */
17424 if (h
== htab
->root
.hdynamic
17425 || (!htab
->fdpic_p
&& !htab
->vxworks_p
&& h
== htab
->root
.hgot
))
17426 sym
->st_shndx
= SHN_ABS
;
17432 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17434 const unsigned long *template, unsigned count
)
17438 for (ix
= 0; ix
!= count
; ix
++)
17440 unsigned long insn
= template[ix
];
17442 /* Emit mov pc,rx if bx is not permitted. */
17443 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
17444 insn
= (insn
& 0xf000000f) | 0x01a0f000;
17445 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
17449 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17450 other variants, NaCl needs this entry in a static executable's
17451 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17452 zero. For .iplt really only the last bundle is useful, and .iplt
17453 could have a shorter first entry, with each individual PLT entry's
17454 relative branch calculated differently so it targets the last
17455 bundle instead of the instruction before it (labelled .Lplt_tail
17456 above). But it's simpler to keep the size and layout of PLT0
17457 consistent with the dynamic case, at the cost of some dead code at
17458 the start of .iplt and the one dead store to the stack at the start
17461 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17462 asection
*plt
, bfd_vma got_displacement
)
17466 put_arm_insn (htab
, output_bfd
,
17467 elf32_arm_nacl_plt0_entry
[0]
17468 | arm_movw_immediate (got_displacement
),
17469 plt
->contents
+ 0);
17470 put_arm_insn (htab
, output_bfd
,
17471 elf32_arm_nacl_plt0_entry
[1]
17472 | arm_movt_immediate (got_displacement
),
17473 plt
->contents
+ 4);
17475 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
17476 put_arm_insn (htab
, output_bfd
,
17477 elf32_arm_nacl_plt0_entry
[i
],
17478 plt
->contents
+ (i
* 4));
17481 /* Finish up the dynamic sections. */
17484 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
17489 struct elf32_arm_link_hash_table
*htab
;
17491 htab
= elf32_arm_hash_table (info
);
17495 dynobj
= elf_hash_table (info
)->dynobj
;
17497 sgot
= htab
->root
.sgotplt
;
17498 /* A broken linker script might have discarded the dynamic sections.
17499 Catch this here so that we do not seg-fault later on. */
17500 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
17502 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
17504 if (elf_hash_table (info
)->dynamic_sections_created
)
17507 Elf32_External_Dyn
*dyncon
, *dynconend
;
17509 splt
= htab
->root
.splt
;
17510 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
17511 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
17513 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
17514 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
17516 for (; dyncon
< dynconend
; dyncon
++)
17518 Elf_Internal_Dyn dyn
;
17522 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
17529 if (htab
->vxworks_p
17530 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
17531 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17536 goto get_vma_if_bpabi
;
17539 goto get_vma_if_bpabi
;
17542 goto get_vma_if_bpabi
;
17544 name
= ".gnu.version";
17545 goto get_vma_if_bpabi
;
17547 name
= ".gnu.version_d";
17548 goto get_vma_if_bpabi
;
17550 name
= ".gnu.version_r";
17551 goto get_vma_if_bpabi
;
17554 name
= htab
->symbian_p
? ".got" : ".got.plt";
17557 name
= RELOC_SECTION (htab
, ".plt");
17559 s
= bfd_get_linker_section (dynobj
, name
);
17563 (_("could not find section %s"), name
);
17564 bfd_set_error (bfd_error_invalid_operation
);
17567 if (!htab
->symbian_p
)
17568 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
17570 /* In the BPABI, tags in the PT_DYNAMIC section point
17571 at the file offset, not the memory address, for the
17572 convenience of the post linker. */
17573 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
17574 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17578 if (htab
->symbian_p
)
17583 s
= htab
->root
.srelplt
;
17584 BFD_ASSERT (s
!= NULL
);
17585 dyn
.d_un
.d_val
= s
->size
;
17586 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17593 /* In the BPABI, the DT_REL tag must point at the file
17594 offset, not the VMA, of the first relocation
17595 section. So, we use code similar to that in
17596 elflink.c, but do not check for SHF_ALLOC on the
17597 relocation section, since relocation sections are
17598 never allocated under the BPABI. PLT relocs are also
17600 if (htab
->symbian_p
)
17603 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
17604 ? SHT_REL
: SHT_RELA
);
17605 dyn
.d_un
.d_val
= 0;
17606 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
17608 Elf_Internal_Shdr
*hdr
17609 = elf_elfsections (output_bfd
)[i
];
17610 if (hdr
->sh_type
== type
)
17612 if (dyn
.d_tag
== DT_RELSZ
17613 || dyn
.d_tag
== DT_RELASZ
)
17614 dyn
.d_un
.d_val
+= hdr
->sh_size
;
17615 else if ((ufile_ptr
) hdr
->sh_offset
17616 <= dyn
.d_un
.d_val
- 1)
17617 dyn
.d_un
.d_val
= hdr
->sh_offset
;
17620 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17624 case DT_TLSDESC_PLT
:
17625 s
= htab
->root
.splt
;
17626 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17627 + htab
->dt_tlsdesc_plt
);
17628 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17631 case DT_TLSDESC_GOT
:
17632 s
= htab
->root
.sgot
;
17633 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17634 + htab
->dt_tlsdesc_got
);
17635 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17638 /* Set the bottom bit of DT_INIT/FINI if the
17639 corresponding function is Thumb. */
17641 name
= info
->init_function
;
17644 name
= info
->fini_function
;
17646 /* If it wasn't set by elf_bfd_final_link
17647 then there is nothing to adjust. */
17648 if (dyn
.d_un
.d_val
!= 0)
17650 struct elf_link_hash_entry
* eh
;
17652 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
17653 FALSE
, FALSE
, TRUE
);
17655 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
17656 == ST_BRANCH_TO_THUMB
)
17658 dyn
.d_un
.d_val
|= 1;
17659 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17666 /* Fill in the first entry in the procedure linkage table. */
17667 if (splt
->size
> 0 && htab
->plt_header_size
)
17669 const bfd_vma
*plt0_entry
;
17670 bfd_vma got_address
, plt_address
, got_displacement
;
17672 /* Calculate the addresses of the GOT and PLT. */
17673 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
17674 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
17676 if (htab
->vxworks_p
)
17678 /* The VxWorks GOT is relocated by the dynamic linker.
17679 Therefore, we must emit relocations rather than simply
17680 computing the values now. */
17681 Elf_Internal_Rela rel
;
17683 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
17684 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17685 splt
->contents
+ 0);
17686 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17687 splt
->contents
+ 4);
17688 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17689 splt
->contents
+ 8);
17690 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
17692 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17693 rel
.r_offset
= plt_address
+ 12;
17694 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17696 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
17697 htab
->srelplt2
->contents
);
17699 else if (htab
->nacl_p
)
17700 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
17701 got_address
+ 8 - (plt_address
+ 16));
17702 else if (using_thumb_only (htab
))
17704 got_displacement
= got_address
- (plt_address
+ 12);
17706 plt0_entry
= elf32_thumb2_plt0_entry
;
17707 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17708 splt
->contents
+ 0);
17709 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17710 splt
->contents
+ 4);
17711 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17712 splt
->contents
+ 8);
17714 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
17718 got_displacement
= got_address
- (plt_address
+ 16);
17720 plt0_entry
= elf32_arm_plt0_entry
;
17721 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17722 splt
->contents
+ 0);
17723 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17724 splt
->contents
+ 4);
17725 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17726 splt
->contents
+ 8);
17727 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
17728 splt
->contents
+ 12);
17730 #ifdef FOUR_WORD_PLT
17731 /* The displacement value goes in the otherwise-unused
17732 last word of the second entry. */
17733 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
17735 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
17740 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17741 really seem like the right value. */
17742 if (splt
->output_section
->owner
== output_bfd
)
17743 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
17745 if (htab
->dt_tlsdesc_plt
)
17747 bfd_vma got_address
17748 = sgot
->output_section
->vma
+ sgot
->output_offset
;
17749 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
17750 + htab
->root
.sgot
->output_offset
);
17751 bfd_vma plt_address
17752 = splt
->output_section
->vma
+ splt
->output_offset
;
17754 arm_put_trampoline (htab
, output_bfd
,
17755 splt
->contents
+ htab
->dt_tlsdesc_plt
,
17756 dl_tlsdesc_lazy_trampoline
, 6);
17758 bfd_put_32 (output_bfd
,
17759 gotplt_address
+ htab
->dt_tlsdesc_got
17760 - (plt_address
+ htab
->dt_tlsdesc_plt
)
17761 - dl_tlsdesc_lazy_trampoline
[6],
17762 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
17763 bfd_put_32 (output_bfd
,
17764 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
17765 - dl_tlsdesc_lazy_trampoline
[7],
17766 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
17769 if (htab
->tls_trampoline
)
17771 arm_put_trampoline (htab
, output_bfd
,
17772 splt
->contents
+ htab
->tls_trampoline
,
17773 tls_trampoline
, 3);
17774 #ifdef FOUR_WORD_PLT
17775 bfd_put_32 (output_bfd
, 0x00000000,
17776 splt
->contents
+ htab
->tls_trampoline
+ 12);
17780 if (htab
->vxworks_p
17781 && !bfd_link_pic (info
)
17782 && htab
->root
.splt
->size
> 0)
17784 /* Correct the .rel(a).plt.unloaded relocations. They will have
17785 incorrect symbol indexes. */
17789 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
17790 / htab
->plt_entry_size
);
17791 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
17793 for (; num_plts
; num_plts
--)
17795 Elf_Internal_Rela rel
;
17797 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17798 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17799 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17800 p
+= RELOC_SIZE (htab
);
17802 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17803 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
17804 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17805 p
+= RELOC_SIZE (htab
);
17810 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
17811 /* NaCl uses a special first entry in .iplt too. */
17812 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
17814 /* Fill in the first three entries in the global offset table. */
17817 if (sgot
->size
> 0)
17820 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
17822 bfd_put_32 (output_bfd
,
17823 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
17825 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
17826 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
17829 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
17832 /* At the very end of the .rofixup section is a pointer to the GOT. */
17833 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17835 struct elf_link_hash_entry
*hgot
= htab
->root
.hgot
;
17837 bfd_vma got_value
= hgot
->root
.u
.def
.value
17838 + hgot
->root
.u
.def
.section
->output_section
->vma
17839 + hgot
->root
.u
.def
.section
->output_offset
;
17841 arm_elf_add_rofixup(output_bfd
, htab
->srofixup
, got_value
);
17843 /* Make sure we allocated and generated the same number of fixups. */
17844 BFD_ASSERT (htab
->srofixup
->reloc_count
* 4 == htab
->srofixup
->size
);
17851 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
17853 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
17854 struct elf32_arm_link_hash_table
*globals
;
17855 struct elf_segment_map
*m
;
17857 i_ehdrp
= elf_elfheader (abfd
);
17859 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
17860 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
17862 _bfd_elf_post_process_headers (abfd
, link_info
);
17863 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
17867 globals
= elf32_arm_hash_table (link_info
);
17868 if (globals
!= NULL
&& globals
->byteswap_code
)
17869 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
17871 if (globals
->fdpic_p
)
17872 i_ehdrp
->e_ident
[EI_OSABI
] |= ELFOSABI_ARM_FDPIC
;
17875 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
17876 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
17878 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
17879 if (abi
== AEABI_VFP_args_vfp
)
17880 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
17882 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
17885 /* Scan segment to set p_flags attribute if it contains only sections with
17886 SHF_ARM_PURECODE flag. */
17887 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
17893 for (j
= 0; j
< m
->count
; j
++)
17895 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
17901 m
->p_flags_valid
= 1;
17906 static enum elf_reloc_type_class
17907 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
17908 const asection
*rel_sec ATTRIBUTE_UNUSED
,
17909 const Elf_Internal_Rela
*rela
)
17911 switch ((int) ELF32_R_TYPE (rela
->r_info
))
17913 case R_ARM_RELATIVE
:
17914 return reloc_class_relative
;
17915 case R_ARM_JUMP_SLOT
:
17916 return reloc_class_plt
;
17918 return reloc_class_copy
;
17919 case R_ARM_IRELATIVE
:
17920 return reloc_class_ifunc
;
17922 return reloc_class_normal
;
17927 arm_final_write_processing (bfd
*abfd
)
17929 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
17933 elf32_arm_final_write_processing (bfd
*abfd
)
17935 arm_final_write_processing (abfd
);
17936 return _bfd_elf_final_write_processing (abfd
);
17939 /* Return TRUE if this is an unwinding table entry. */
17942 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
17944 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
17945 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
17949 /* Set the type and flags for an ARM section. We do this by
17950 the section name, which is a hack, but ought to work. */
17953 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
17957 name
= bfd_section_name (sec
);
17959 if (is_arm_elf_unwind_section_name (abfd
, name
))
17961 hdr
->sh_type
= SHT_ARM_EXIDX
;
17962 hdr
->sh_flags
|= SHF_LINK_ORDER
;
17965 if (sec
->flags
& SEC_ELF_PURECODE
)
17966 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
17971 /* Handle an ARM specific section when reading an object file. This is
17972 called when bfd_section_from_shdr finds a section with an unknown
17976 elf32_arm_section_from_shdr (bfd
*abfd
,
17977 Elf_Internal_Shdr
* hdr
,
17981 /* There ought to be a place to keep ELF backend specific flags, but
17982 at the moment there isn't one. We just keep track of the
17983 sections by their name, instead. Fortunately, the ABI gives
17984 names for all the ARM specific sections, so we will probably get
17986 switch (hdr
->sh_type
)
17988 case SHT_ARM_EXIDX
:
17989 case SHT_ARM_PREEMPTMAP
:
17990 case SHT_ARM_ATTRIBUTES
:
17997 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
18003 static _arm_elf_section_data
*
18004 get_arm_elf_section_data (asection
* sec
)
18006 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
18007 return elf32_arm_section_data (sec
);
18015 struct bfd_link_info
*info
;
18018 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
18019 asection
*, struct elf_link_hash_entry
*);
18020 } output_arch_syminfo
;
18022 enum map_symbol_type
18030 /* Output a single mapping symbol. */
18033 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
18034 enum map_symbol_type type
,
18037 static const char *names
[3] = {"$a", "$t", "$d"};
18038 Elf_Internal_Sym sym
;
18040 sym
.st_value
= osi
->sec
->output_section
->vma
18041 + osi
->sec
->output_offset
18045 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
18046 sym
.st_shndx
= osi
->sec_shndx
;
18047 sym
.st_target_internal
= 0;
18048 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
18049 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
18052 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
18053 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
18056 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
18057 bfd_boolean is_iplt_entry_p
,
18058 union gotplt_union
*root_plt
,
18059 struct arm_plt_info
*arm_plt
)
18061 struct elf32_arm_link_hash_table
*htab
;
18062 bfd_vma addr
, plt_header_size
;
18064 if (root_plt
->offset
== (bfd_vma
) -1)
18067 htab
= elf32_arm_hash_table (osi
->info
);
18071 if (is_iplt_entry_p
)
18073 osi
->sec
= htab
->root
.iplt
;
18074 plt_header_size
= 0;
18078 osi
->sec
= htab
->root
.splt
;
18079 plt_header_size
= htab
->plt_header_size
;
18081 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
18082 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
18084 addr
= root_plt
->offset
& -2;
18085 if (htab
->symbian_p
)
18087 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18089 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
18092 else if (htab
->vxworks_p
)
18094 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18096 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
18098 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
18100 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
18103 else if (htab
->nacl_p
)
18105 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18108 else if (htab
->fdpic_p
)
18110 enum map_symbol_type type
= using_thumb_only(htab
)
18114 if (elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
))
18115 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
18117 if (!elf32_arm_output_map_sym (osi
, type
, addr
))
18119 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 16))
18121 if (htab
->plt_entry_size
== 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
))
18122 if (!elf32_arm_output_map_sym (osi
, type
, addr
+ 24))
18125 else if (using_thumb_only (htab
))
18127 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
18132 bfd_boolean thumb_stub_p
;
18134 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
18137 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
18140 #ifdef FOUR_WORD_PLT
18141 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18143 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
18146 /* A three-word PLT with no Thumb thunk contains only Arm code,
18147 so only need to output a mapping symbol for the first PLT entry and
18148 entries with thumb thunks. */
18149 if (thumb_stub_p
|| addr
== plt_header_size
)
18151 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18160 /* Output mapping symbols for PLT entries associated with H. */
18163 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
18165 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
18166 struct elf32_arm_link_hash_entry
*eh
;
18168 if (h
->root
.type
== bfd_link_hash_indirect
)
18171 if (h
->root
.type
== bfd_link_hash_warning
)
18172 /* When warning symbols are created, they **replace** the "real"
18173 entry in the hash table, thus we never get to see the real
18174 symbol in a hash traversal. So look at it now. */
18175 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
18177 eh
= (struct elf32_arm_link_hash_entry
*) h
;
18178 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
18179 &h
->plt
, &eh
->plt
);
18182 /* Bind a veneered symbol to its veneer identified by its hash entry
18183 STUB_ENTRY. The veneered location thus loose its symbol. */
18186 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
18188 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
18191 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
18192 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
18193 hash
->root
.size
= stub_entry
->stub_size
;
18196 /* Output a single local symbol for a generated stub. */
18199 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
18200 bfd_vma offset
, bfd_vma size
)
18202 Elf_Internal_Sym sym
;
18204 sym
.st_value
= osi
->sec
->output_section
->vma
18205 + osi
->sec
->output_offset
18207 sym
.st_size
= size
;
18209 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
18210 sym
.st_shndx
= osi
->sec_shndx
;
18211 sym
.st_target_internal
= 0;
18212 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
18216 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
18219 struct elf32_arm_stub_hash_entry
*stub_entry
;
18220 asection
*stub_sec
;
18223 output_arch_syminfo
*osi
;
18224 const insn_sequence
*template_sequence
;
18225 enum stub_insn_type prev_type
;
18228 enum map_symbol_type sym_type
;
18230 /* Massage our args to the form they really have. */
18231 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18232 osi
= (output_arch_syminfo
*) in_arg
;
18234 stub_sec
= stub_entry
->stub_sec
;
18236 /* Ensure this stub is attached to the current section being
18238 if (stub_sec
!= osi
->sec
)
18241 addr
= (bfd_vma
) stub_entry
->stub_offset
;
18242 template_sequence
= stub_entry
->stub_template
;
18244 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
18245 arm_stub_claim_sym (stub_entry
);
18248 stub_name
= stub_entry
->output_name
;
18249 switch (template_sequence
[0].type
)
18252 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
18253 stub_entry
->stub_size
))
18258 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
18259 stub_entry
->stub_size
))
18268 prev_type
= DATA_TYPE
;
18270 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
18272 switch (template_sequence
[i
].type
)
18275 sym_type
= ARM_MAP_ARM
;
18280 sym_type
= ARM_MAP_THUMB
;
18284 sym_type
= ARM_MAP_DATA
;
18292 if (template_sequence
[i
].type
!= prev_type
)
18294 prev_type
= template_sequence
[i
].type
;
18295 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
18299 switch (template_sequence
[i
].type
)
18323 /* Output mapping symbols for linker generated sections,
18324 and for those data-only sections that do not have a
18328 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
18329 struct bfd_link_info
*info
,
18331 int (*func
) (void *, const char *,
18332 Elf_Internal_Sym
*,
18334 struct elf_link_hash_entry
*))
18336 output_arch_syminfo osi
;
18337 struct elf32_arm_link_hash_table
*htab
;
18339 bfd_size_type size
;
18342 htab
= elf32_arm_hash_table (info
);
18346 check_use_blx (htab
);
18348 osi
.flaginfo
= flaginfo
;
18352 /* Add a $d mapping symbol to data-only sections that
18353 don't have any mapping symbol. This may result in (harmless) redundant
18354 mapping symbols. */
18355 for (input_bfd
= info
->input_bfds
;
18357 input_bfd
= input_bfd
->link
.next
)
18359 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
18360 for (osi
.sec
= input_bfd
->sections
;
18362 osi
.sec
= osi
.sec
->next
)
18364 if (osi
.sec
->output_section
!= NULL
18365 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
18367 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
18368 == SEC_HAS_CONTENTS
18369 && get_arm_elf_section_data (osi
.sec
) != NULL
18370 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
18371 && osi
.sec
->size
> 0
18372 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
18374 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18375 (output_bfd
, osi
.sec
->output_section
);
18376 if (osi
.sec_shndx
!= (int)SHN_BAD
)
18377 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
18382 /* ARM->Thumb glue. */
18383 if (htab
->arm_glue_size
> 0)
18385 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18386 ARM2THUMB_GLUE_SECTION_NAME
);
18388 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18389 (output_bfd
, osi
.sec
->output_section
);
18390 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
18391 || htab
->pic_veneer
)
18392 size
= ARM2THUMB_PIC_GLUE_SIZE
;
18393 else if (htab
->use_blx
)
18394 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
18396 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
18398 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
18400 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
18401 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
18405 /* Thumb->ARM glue. */
18406 if (htab
->thumb_glue_size
> 0)
18408 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18409 THUMB2ARM_GLUE_SECTION_NAME
);
18411 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18412 (output_bfd
, osi
.sec
->output_section
);
18413 size
= THUMB2ARM_GLUE_SIZE
;
18415 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
18417 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
18418 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
18422 /* ARMv4 BX veneers. */
18423 if (htab
->bx_glue_size
> 0)
18425 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18426 ARM_BX_GLUE_SECTION_NAME
);
18428 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18429 (output_bfd
, osi
.sec
->output_section
);
18431 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
18434 /* Long calls stubs. */
18435 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
18437 asection
* stub_sec
;
18439 for (stub_sec
= htab
->stub_bfd
->sections
;
18441 stub_sec
= stub_sec
->next
)
18443 /* Ignore non-stub sections. */
18444 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
18447 osi
.sec
= stub_sec
;
18449 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18450 (output_bfd
, osi
.sec
->output_section
);
18452 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
18456 /* Finally, output mapping symbols for the PLT. */
18457 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18459 osi
.sec
= htab
->root
.splt
;
18460 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18461 (output_bfd
, osi
.sec
->output_section
));
18463 /* Output mapping symbols for the plt header. SymbianOS does not have a
18465 if (htab
->vxworks_p
)
18467 /* VxWorks shared libraries have no PLT header. */
18468 if (!bfd_link_pic (info
))
18470 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18472 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18476 else if (htab
->nacl_p
)
18478 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18481 else if (using_thumb_only (htab
) && !htab
->fdpic_p
)
18483 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
18485 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18487 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
18490 else if (!htab
->symbian_p
&& !htab
->fdpic_p
)
18492 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18494 #ifndef FOUR_WORD_PLT
18495 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
18500 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
18502 /* NaCl uses a special first entry in .iplt too. */
18503 osi
.sec
= htab
->root
.iplt
;
18504 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18505 (output_bfd
, osi
.sec
->output_section
));
18506 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18509 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18510 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
18512 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
18513 for (input_bfd
= info
->input_bfds
;
18515 input_bfd
= input_bfd
->link
.next
)
18517 struct arm_local_iplt_info
**local_iplt
;
18518 unsigned int i
, num_syms
;
18520 local_iplt
= elf32_arm_local_iplt (input_bfd
);
18521 if (local_iplt
!= NULL
)
18523 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
18524 for (i
= 0; i
< num_syms
; i
++)
18525 if (local_iplt
[i
] != NULL
18526 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
18527 &local_iplt
[i
]->root
,
18528 &local_iplt
[i
]->arm
))
18533 if (htab
->dt_tlsdesc_plt
!= 0)
18535 /* Mapping symbols for the lazy tls trampoline. */
18536 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
18539 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18540 htab
->dt_tlsdesc_plt
+ 24))
18543 if (htab
->tls_trampoline
!= 0)
18545 /* Mapping symbols for the tls trampoline. */
18546 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
18548 #ifdef FOUR_WORD_PLT
18549 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18550 htab
->tls_trampoline
+ 12))
18558 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18559 the import library. All SYMCOUNT symbols of ABFD can be examined
18560 from their pointers in SYMS. Pointers of symbols to keep should be
18561 stored continuously at the beginning of that array.
18563 Returns the number of symbols to keep. */
18565 static unsigned int
18566 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18567 struct bfd_link_info
*info
,
18568 asymbol
**syms
, long symcount
)
18572 long src_count
, dst_count
= 0;
18573 struct elf32_arm_link_hash_table
*htab
;
18575 htab
= elf32_arm_hash_table (info
);
18576 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
18580 cmse_name
= (char *) bfd_malloc (maxnamelen
);
18581 for (src_count
= 0; src_count
< symcount
; src_count
++)
18583 struct elf32_arm_link_hash_entry
*cmse_hash
;
18589 sym
= syms
[src_count
];
18590 flags
= sym
->flags
;
18591 name
= (char *) bfd_asymbol_name (sym
);
18593 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
18595 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
18598 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
18599 if (namelen
> maxnamelen
)
18601 cmse_name
= (char *)
18602 bfd_realloc (cmse_name
, namelen
);
18603 maxnamelen
= namelen
;
18605 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
18606 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
18607 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
18610 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
18611 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
18612 || cmse_hash
->root
.type
!= STT_FUNC
)
18615 syms
[dst_count
++] = sym
;
18619 syms
[dst_count
] = NULL
;
18624 /* Filter symbols of ABFD to include in the import library. All
18625 SYMCOUNT symbols of ABFD can be examined from their pointers in
18626 SYMS. Pointers of symbols to keep should be stored continuously at
18627 the beginning of that array.
18629 Returns the number of symbols to keep. */
18631 static unsigned int
18632 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18633 struct bfd_link_info
*info
,
18634 asymbol
**syms
, long symcount
)
18636 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
18638 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18639 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18640 library to be a relocatable object file. */
18641 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
18642 if (globals
->cmse_implib
)
18643 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
18645 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
18648 /* Allocate target specific section data. */
18651 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
18653 if (!sec
->used_by_bfd
)
18655 _arm_elf_section_data
*sdata
;
18656 bfd_size_type amt
= sizeof (*sdata
);
18658 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
18661 sec
->used_by_bfd
= sdata
;
18664 return _bfd_elf_new_section_hook (abfd
, sec
);
18668 /* Used to order a list of mapping symbols by address. */
18671 elf32_arm_compare_mapping (const void * a
, const void * b
)
18673 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
18674 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
18676 if (amap
->vma
> bmap
->vma
)
18678 else if (amap
->vma
< bmap
->vma
)
18680 else if (amap
->type
> bmap
->type
)
18681 /* Ensure results do not depend on the host qsort for objects with
18682 multiple mapping symbols at the same address by sorting on type
18685 else if (amap
->type
< bmap
->type
)
18691 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18693 static unsigned long
18694 offset_prel31 (unsigned long addr
, bfd_vma offset
)
18696 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
18699 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18703 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
18705 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
18706 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
18708 /* High bit of first word is supposed to be zero. */
18709 if ((first_word
& 0x80000000ul
) == 0)
18710 first_word
= offset_prel31 (first_word
, offset
);
18712 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18713 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18714 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
18715 second_word
= offset_prel31 (second_word
, offset
);
18717 bfd_put_32 (output_bfd
, first_word
, to
);
18718 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
18721 /* Data for make_branch_to_a8_stub(). */
18723 struct a8_branch_to_stub_data
18725 asection
*writing_section
;
18726 bfd_byte
*contents
;
18730 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18731 places for a particular section. */
18734 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
18737 struct elf32_arm_stub_hash_entry
*stub_entry
;
18738 struct a8_branch_to_stub_data
*data
;
18739 bfd_byte
*contents
;
18740 unsigned long branch_insn
;
18741 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
18742 bfd_signed_vma branch_offset
;
18746 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18747 data
= (struct a8_branch_to_stub_data
*) in_arg
;
18749 if (stub_entry
->target_section
!= data
->writing_section
18750 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
18753 contents
= data
->contents
;
18755 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18756 generated when both source and target are in the same section. */
18757 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
18758 + stub_entry
->target_section
->output_offset
18759 + stub_entry
->source_value
;
18761 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
18762 + stub_entry
->stub_sec
->output_offset
18763 + stub_entry
->stub_offset
;
18765 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
18766 veneered_insn_loc
&= ~3u;
18768 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
18770 abfd
= stub_entry
->target_section
->owner
;
18771 loc
= stub_entry
->source_value
;
18773 /* We attempt to avoid this condition by setting stubs_always_after_branch
18774 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18775 This check is just to be on the safe side... */
18776 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
18778 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18779 "allocated in unsafe location"), abfd
);
18783 switch (stub_entry
->stub_type
)
18785 case arm_stub_a8_veneer_b
:
18786 case arm_stub_a8_veneer_b_cond
:
18787 branch_insn
= 0xf0009000;
18790 case arm_stub_a8_veneer_blx
:
18791 branch_insn
= 0xf000e800;
18794 case arm_stub_a8_veneer_bl
:
18796 unsigned int i1
, j1
, i2
, j2
, s
;
18798 branch_insn
= 0xf000d000;
18801 if (branch_offset
< -16777216 || branch_offset
> 16777214)
18803 /* There's not much we can do apart from complain if this
18805 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18806 "of range (input file too large)"), abfd
);
18810 /* i1 = not(j1 eor s), so:
18812 j1 = (not i1) eor s. */
18814 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
18815 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
18816 i2
= (branch_offset
>> 22) & 1;
18817 i1
= (branch_offset
>> 23) & 1;
18818 s
= (branch_offset
>> 24) & 1;
18821 branch_insn
|= j2
<< 11;
18822 branch_insn
|= j1
<< 13;
18823 branch_insn
|= s
<< 26;
18832 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
18833 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
18838 /* Beginning of stm32l4xx work-around. */
18840 /* Functions encoding instructions necessary for the emission of the
18841 fix-stm32l4xx-629360.
18842 Encoding is extracted from the
18843 ARM (C) Architecture Reference Manual
18844 ARMv7-A and ARMv7-R edition
18845 ARM DDI 0406C.b (ID072512). */
18847 static inline bfd_vma
18848 create_instruction_branch_absolute (int branch_offset
)
18850 /* A8.8.18 B (A8-334)
18851 B target_address (Encoding T4). */
18852 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18853 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18854 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18856 int s
= ((branch_offset
& 0x1000000) >> 24);
18857 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
18858 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
18860 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
18861 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18863 bfd_vma patched_inst
= 0xf0009000
18865 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
18866 | j1
<< 13 /* J1. */
18867 | j2
<< 11 /* J2. */
18868 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
18870 return patched_inst
;
18873 static inline bfd_vma
18874 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
18876 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18877 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18878 bfd_vma patched_inst
= 0xe8900000
18879 | (/*W=*/wback
<< 21)
18881 | (reg_mask
& 0x0000ffff);
18883 return patched_inst
;
18886 static inline bfd_vma
18887 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
18889 /* A8.8.60 LDMDB/LDMEA (A8-402)
18890 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18891 bfd_vma patched_inst
= 0xe9100000
18892 | (/*W=*/wback
<< 21)
18894 | (reg_mask
& 0x0000ffff);
18896 return patched_inst
;
18899 static inline bfd_vma
18900 create_instruction_mov (int target_reg
, int source_reg
)
18902 /* A8.8.103 MOV (register) (A8-486)
18903 MOV Rd, Rm (Encoding T1). */
18904 bfd_vma patched_inst
= 0x4600
18905 | (target_reg
& 0x7)
18906 | ((target_reg
& 0x8) >> 3) << 7
18907 | (source_reg
<< 3);
18909 return patched_inst
;
18912 static inline bfd_vma
18913 create_instruction_sub (int target_reg
, int source_reg
, int value
)
18915 /* A8.8.221 SUB (immediate) (A8-708)
18916 SUB Rd, Rn, #value (Encoding T3). */
18917 bfd_vma patched_inst
= 0xf1a00000
18918 | (target_reg
<< 8)
18919 | (source_reg
<< 16)
18921 | ((value
& 0x800) >> 11) << 26
18922 | ((value
& 0x700) >> 8) << 12
18925 return patched_inst
;
18928 static inline bfd_vma
18929 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
18932 /* A8.8.332 VLDM (A8-922)
18933 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18934 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
18935 | (/*W=*/wback
<< 21)
18937 | (num_words
& 0x000000ff)
18938 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
18939 | (first_reg
& 0x00000001) << 22;
18941 return patched_inst
;
18944 static inline bfd_vma
18945 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
18948 /* A8.8.332 VLDM (A8-922)
18949 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18950 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
18952 | (num_words
& 0x000000ff)
18953 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
18954 | (first_reg
& 0x00000001) << 22;
18956 return patched_inst
;
18959 static inline bfd_vma
18960 create_instruction_udf_w (int value
)
18962 /* A8.8.247 UDF (A8-758)
18963 Undefined (Encoding T2). */
18964 bfd_vma patched_inst
= 0xf7f0a000
18965 | (value
& 0x00000fff)
18966 | (value
& 0x000f0000) << 16;
18968 return patched_inst
;
18971 static inline bfd_vma
18972 create_instruction_udf (int value
)
18974 /* A8.8.247 UDF (A8-758)
18975 Undefined (Encoding T1). */
18976 bfd_vma patched_inst
= 0xde00
18979 return patched_inst
;
18982 /* Functions writing an instruction in memory, returning the next
18983 memory position to write to. */
18985 static inline bfd_byte
*
18986 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
18987 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18989 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
18993 static inline bfd_byte
*
18994 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
18995 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18997 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
19001 /* Function filling up a region in memory with T1 and T2 UDFs taking
19002 care of alignment. */
19005 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
19007 const bfd_byte
* const base_stub_contents
,
19008 bfd_byte
* const from_stub_contents
,
19009 const bfd_byte
* const end_stub_contents
)
19011 bfd_byte
*current_stub_contents
= from_stub_contents
;
19013 /* Fill the remaining of the stub with deterministic contents : UDF
19015 Check if realignment is needed on modulo 4 frontier using T1, to
19017 if ((current_stub_contents
< end_stub_contents
)
19018 && !((current_stub_contents
- base_stub_contents
) % 2)
19019 && ((current_stub_contents
- base_stub_contents
) % 4))
19020 current_stub_contents
=
19021 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19022 create_instruction_udf (0));
19024 for (; current_stub_contents
< end_stub_contents
;)
19025 current_stub_contents
=
19026 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19027 create_instruction_udf_w (0));
19029 return current_stub_contents
;
19032 /* Functions writing the stream of instructions equivalent to the
19033 derived sequence for ldmia, ldmdb, vldm respectively. */
19036 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
19038 const insn32 initial_insn
,
19039 const bfd_byte
*const initial_insn_addr
,
19040 bfd_byte
*const base_stub_contents
)
19042 int wback
= (initial_insn
& 0x00200000) >> 21;
19043 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
19044 int insn_all_registers
= initial_insn
& 0x0000ffff;
19045 int insn_low_registers
, insn_high_registers
;
19046 int usable_register_mask
;
19047 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
19048 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
19049 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
19050 bfd_byte
*current_stub_contents
= base_stub_contents
;
19052 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
19054 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19055 smaller than 8 registers load sequences that do not cause the
19057 if (nb_registers
<= 8)
19059 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19060 current_stub_contents
=
19061 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19064 /* B initial_insn_addr+4. */
19066 current_stub_contents
=
19067 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19068 create_instruction_branch_absolute
19069 (initial_insn_addr
- current_stub_contents
));
19071 /* Fill the remaining of the stub with deterministic contents. */
19072 current_stub_contents
=
19073 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19074 base_stub_contents
, current_stub_contents
,
19075 base_stub_contents
+
19076 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19081 /* - reg_list[13] == 0. */
19082 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
19084 /* - reg_list[14] & reg_list[15] != 1. */
19085 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19087 /* - if (wback==1) reg_list[rn] == 0. */
19088 BFD_ASSERT (!wback
|| !restore_rn
);
19090 /* - nb_registers > 8. */
19091 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19093 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19095 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
19096 - One with the 7 lowest registers (register mask 0x007F)
19097 This LDM will finally contain between 2 and 7 registers
19098 - One with the 7 highest registers (register mask 0xDF80)
19099 This ldm will finally contain between 2 and 7 registers. */
19100 insn_low_registers
= insn_all_registers
& 0x007F;
19101 insn_high_registers
= insn_all_registers
& 0xDF80;
19103 /* A spare register may be needed during this veneer to temporarily
19104 handle the base register. This register will be restored with the
19105 last LDM operation.
19106 The usable register may be any general purpose register (that
19107 excludes PC, SP, LR : register mask is 0x1FFF). */
19108 usable_register_mask
= 0x1FFF;
19110 /* Generate the stub function. */
19113 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
19114 current_stub_contents
=
19115 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19116 create_instruction_ldmia
19117 (rn
, /*wback=*/1, insn_low_registers
));
19119 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
19120 current_stub_contents
=
19121 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19122 create_instruction_ldmia
19123 (rn
, /*wback=*/1, insn_high_registers
));
19126 /* B initial_insn_addr+4. */
19127 current_stub_contents
=
19128 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19129 create_instruction_branch_absolute
19130 (initial_insn_addr
- current_stub_contents
));
19133 else /* if (!wback). */
19137 /* If Rn is not part of the high-register-list, move it there. */
19138 if (!(insn_high_registers
& (1 << rn
)))
19140 /* Choose a Ri in the high-register-list that will be restored. */
19141 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19144 current_stub_contents
=
19145 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19146 create_instruction_mov (ri
, rn
));
19149 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
19150 current_stub_contents
=
19151 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19152 create_instruction_ldmia
19153 (ri
, /*wback=*/1, insn_low_registers
));
19155 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19156 current_stub_contents
=
19157 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19158 create_instruction_ldmia
19159 (ri
, /*wback=*/0, insn_high_registers
));
19163 /* B initial_insn_addr+4. */
19164 current_stub_contents
=
19165 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19166 create_instruction_branch_absolute
19167 (initial_insn_addr
- current_stub_contents
));
19171 /* Fill the remaining of the stub with deterministic contents. */
19172 current_stub_contents
=
19173 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19174 base_stub_contents
, current_stub_contents
,
19175 base_stub_contents
+
19176 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19180 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
19182 const insn32 initial_insn
,
19183 const bfd_byte
*const initial_insn_addr
,
19184 bfd_byte
*const base_stub_contents
)
19186 int wback
= (initial_insn
& 0x00200000) >> 21;
19187 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
19188 int insn_all_registers
= initial_insn
& 0x0000ffff;
19189 int insn_low_registers
, insn_high_registers
;
19190 int usable_register_mask
;
19191 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
19192 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
19193 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
19194 bfd_byte
*current_stub_contents
= base_stub_contents
;
19196 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
19198 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19199 smaller than 8 registers load sequences that do not cause the
19201 if (nb_registers
<= 8)
19203 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19204 current_stub_contents
=
19205 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19208 /* B initial_insn_addr+4. */
19209 current_stub_contents
=
19210 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19211 create_instruction_branch_absolute
19212 (initial_insn_addr
- current_stub_contents
));
19214 /* Fill the remaining of the stub with deterministic contents. */
19215 current_stub_contents
=
19216 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19217 base_stub_contents
, current_stub_contents
,
19218 base_stub_contents
+
19219 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19224 /* - reg_list[13] == 0. */
19225 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
19227 /* - reg_list[14] & reg_list[15] != 1. */
19228 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19230 /* - if (wback==1) reg_list[rn] == 0. */
19231 BFD_ASSERT (!wback
|| !restore_rn
);
19233 /* - nb_registers > 8. */
19234 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19236 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19238 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19239 - One with the 7 lowest registers (register mask 0x007F)
19240 This LDM will finally contain between 2 and 7 registers
19241 - One with the 7 highest registers (register mask 0xDF80)
19242 This ldm will finally contain between 2 and 7 registers. */
19243 insn_low_registers
= insn_all_registers
& 0x007F;
19244 insn_high_registers
= insn_all_registers
& 0xDF80;
19246 /* A spare register may be needed during this veneer to temporarily
19247 handle the base register. This register will be restored with
19248 the last LDM operation.
19249 The usable register may be any general purpose register (that excludes
19250 PC, SP, LR : register mask is 0x1FFF). */
19251 usable_register_mask
= 0x1FFF;
19253 /* Generate the stub function. */
19254 if (!wback
&& !restore_pc
&& !restore_rn
)
19256 /* Choose a Ri in the low-register-list that will be restored. */
19257 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19260 current_stub_contents
=
19261 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19262 create_instruction_mov (ri
, rn
));
19264 /* LDMDB Ri!, {R-high-register-list}. */
19265 current_stub_contents
=
19266 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19267 create_instruction_ldmdb
19268 (ri
, /*wback=*/1, insn_high_registers
));
19270 /* LDMDB Ri, {R-low-register-list}. */
19271 current_stub_contents
=
19272 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19273 create_instruction_ldmdb
19274 (ri
, /*wback=*/0, insn_low_registers
));
19276 /* B initial_insn_addr+4. */
19277 current_stub_contents
=
19278 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19279 create_instruction_branch_absolute
19280 (initial_insn_addr
- current_stub_contents
));
19282 else if (wback
&& !restore_pc
&& !restore_rn
)
19284 /* LDMDB Rn!, {R-high-register-list}. */
19285 current_stub_contents
=
19286 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19287 create_instruction_ldmdb
19288 (rn
, /*wback=*/1, insn_high_registers
));
19290 /* LDMDB Rn!, {R-low-register-list}. */
19291 current_stub_contents
=
19292 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19293 create_instruction_ldmdb
19294 (rn
, /*wback=*/1, insn_low_registers
));
19296 /* B initial_insn_addr+4. */
19297 current_stub_contents
=
19298 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19299 create_instruction_branch_absolute
19300 (initial_insn_addr
- current_stub_contents
));
19302 else if (!wback
&& restore_pc
&& !restore_rn
)
19304 /* Choose a Ri in the high-register-list that will be restored. */
19305 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19307 /* SUB Ri, Rn, #(4*nb_registers). */
19308 current_stub_contents
=
19309 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19310 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19312 /* LDMIA Ri!, {R-low-register-list}. */
19313 current_stub_contents
=
19314 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19315 create_instruction_ldmia
19316 (ri
, /*wback=*/1, insn_low_registers
));
19318 /* LDMIA Ri, {R-high-register-list}. */
19319 current_stub_contents
=
19320 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19321 create_instruction_ldmia
19322 (ri
, /*wback=*/0, insn_high_registers
));
19324 else if (wback
&& restore_pc
&& !restore_rn
)
19326 /* Choose a Ri in the high-register-list that will be restored. */
19327 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19329 /* SUB Rn, Rn, #(4*nb_registers) */
19330 current_stub_contents
=
19331 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19332 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
19335 current_stub_contents
=
19336 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19337 create_instruction_mov (ri
, rn
));
19339 /* LDMIA Ri!, {R-low-register-list}. */
19340 current_stub_contents
=
19341 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19342 create_instruction_ldmia
19343 (ri
, /*wback=*/1, insn_low_registers
));
19345 /* LDMIA Ri, {R-high-register-list}. */
19346 current_stub_contents
=
19347 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19348 create_instruction_ldmia
19349 (ri
, /*wback=*/0, insn_high_registers
));
19351 else if (!wback
&& !restore_pc
&& restore_rn
)
19354 if (!(insn_low_registers
& (1 << rn
)))
19356 /* Choose a Ri in the low-register-list that will be restored. */
19357 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19360 current_stub_contents
=
19361 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19362 create_instruction_mov (ri
, rn
));
19365 /* LDMDB Ri!, {R-high-register-list}. */
19366 current_stub_contents
=
19367 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19368 create_instruction_ldmdb
19369 (ri
, /*wback=*/1, insn_high_registers
));
19371 /* LDMDB Ri, {R-low-register-list}. */
19372 current_stub_contents
=
19373 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19374 create_instruction_ldmdb
19375 (ri
, /*wback=*/0, insn_low_registers
));
19377 /* B initial_insn_addr+4. */
19378 current_stub_contents
=
19379 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19380 create_instruction_branch_absolute
19381 (initial_insn_addr
- current_stub_contents
));
19383 else if (!wback
&& restore_pc
&& restore_rn
)
19386 if (!(insn_high_registers
& (1 << rn
)))
19388 /* Choose a Ri in the high-register-list that will be restored. */
19389 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19392 /* SUB Ri, Rn, #(4*nb_registers). */
19393 current_stub_contents
=
19394 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19395 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19397 /* LDMIA Ri!, {R-low-register-list}. */
19398 current_stub_contents
=
19399 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19400 create_instruction_ldmia
19401 (ri
, /*wback=*/1, insn_low_registers
));
19403 /* LDMIA Ri, {R-high-register-list}. */
19404 current_stub_contents
=
19405 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19406 create_instruction_ldmia
19407 (ri
, /*wback=*/0, insn_high_registers
));
19409 else if (wback
&& restore_rn
)
19411 /* The assembler should not have accepted to encode this. */
19412 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19413 "undefined behavior.\n");
19416 /* Fill the remaining of the stub with deterministic contents. */
19417 current_stub_contents
=
19418 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19419 base_stub_contents
, current_stub_contents
,
19420 base_stub_contents
+
19421 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19426 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
19428 const insn32 initial_insn
,
19429 const bfd_byte
*const initial_insn_addr
,
19430 bfd_byte
*const base_stub_contents
)
19432 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
19433 bfd_byte
*current_stub_contents
= base_stub_contents
;
19435 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
19437 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19438 smaller than 8 words load sequences that do not cause the
19440 if (num_words
<= 8)
19442 /* Untouched instruction. */
19443 current_stub_contents
=
19444 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19447 /* B initial_insn_addr+4. */
19448 current_stub_contents
=
19449 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19450 create_instruction_branch_absolute
19451 (initial_insn_addr
- current_stub_contents
));
19455 bfd_boolean is_dp
= /* DP encoding. */
19456 (initial_insn
& 0xfe100f00) == 0xec100b00;
19457 bfd_boolean is_ia_nobang
= /* (IA without !). */
19458 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
19459 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
19460 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
19461 bfd_boolean is_db_bang
= /* (DB with !). */
19462 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
19463 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
19464 /* d = UInt (Vd:D);. */
19465 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
19466 | (((unsigned int)initial_insn
<< 9) >> 31);
19468 /* Compute the number of 8-words chunks needed to split. */
19469 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
19472 /* The test coverage has been done assuming the following
19473 hypothesis that exactly one of the previous is_ predicates is
19475 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
19476 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
19478 /* We treat the cutting of the words in one pass for all
19479 cases, then we emit the adjustments:
19482 -> vldm rx!, {8_words_or_less} for each needed 8_word
19483 -> sub rx, rx, #size (list)
19486 -> vldm rx!, {8_words_or_less} for each needed 8_word
19487 This also handles vpop instruction (when rx is sp)
19490 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19491 for (chunk
= 0; chunk
< chunks
; ++chunk
)
19493 bfd_vma new_insn
= 0;
19495 if (is_ia_nobang
|| is_ia_bang
)
19497 new_insn
= create_instruction_vldmia
19501 chunks
- (chunk
+ 1) ?
19502 8 : num_words
- chunk
* 8,
19503 first_reg
+ chunk
* 8);
19505 else if (is_db_bang
)
19507 new_insn
= create_instruction_vldmdb
19510 chunks
- (chunk
+ 1) ?
19511 8 : num_words
- chunk
* 8,
19512 first_reg
+ chunk
* 8);
19516 current_stub_contents
=
19517 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19521 /* Only this case requires the base register compensation
19525 current_stub_contents
=
19526 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19527 create_instruction_sub
19528 (base_reg
, base_reg
, 4*num_words
));
19531 /* B initial_insn_addr+4. */
19532 current_stub_contents
=
19533 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19534 create_instruction_branch_absolute
19535 (initial_insn_addr
- current_stub_contents
));
19538 /* Fill the remaining of the stub with deterministic contents. */
19539 current_stub_contents
=
19540 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19541 base_stub_contents
, current_stub_contents
,
19542 base_stub_contents
+
19543 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
19547 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
19549 const insn32 wrong_insn
,
19550 const bfd_byte
*const wrong_insn_addr
,
19551 bfd_byte
*const stub_contents
)
19553 if (is_thumb2_ldmia (wrong_insn
))
19554 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
19555 wrong_insn
, wrong_insn_addr
,
19557 else if (is_thumb2_ldmdb (wrong_insn
))
19558 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
19559 wrong_insn
, wrong_insn_addr
,
19561 else if (is_thumb2_vldm (wrong_insn
))
19562 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
19563 wrong_insn
, wrong_insn_addr
,
19567 /* End of stm32l4xx work-around. */
19570 /* Do code byteswapping. Return FALSE afterwards so that the section is
19571 written out as normal. */
19574 elf32_arm_write_section (bfd
*output_bfd
,
19575 struct bfd_link_info
*link_info
,
19577 bfd_byte
*contents
)
19579 unsigned int mapcount
, errcount
;
19580 _arm_elf_section_data
*arm_data
;
19581 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
19582 elf32_arm_section_map
*map
;
19583 elf32_vfp11_erratum_list
*errnode
;
19584 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
19587 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
19591 if (globals
== NULL
)
19594 /* If this section has not been allocated an _arm_elf_section_data
19595 structure then we cannot record anything. */
19596 arm_data
= get_arm_elf_section_data (sec
);
19597 if (arm_data
== NULL
)
19600 mapcount
= arm_data
->mapcount
;
19601 map
= arm_data
->map
;
19602 errcount
= arm_data
->erratumcount
;
19606 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
19608 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
19609 errnode
= errnode
->next
)
19611 bfd_vma target
= errnode
->vma
- offset
;
19613 switch (errnode
->type
)
19615 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
19617 bfd_vma branch_to_veneer
;
19618 /* Original condition code of instruction, plus bit mask for
19619 ARM B instruction. */
19620 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
19623 /* The instruction is before the label. */
19626 /* Above offset included in -4 below. */
19627 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
19628 - errnode
->vma
- 4;
19630 if ((signed) branch_to_veneer
< -(1 << 25)
19631 || (signed) branch_to_veneer
>= (1 << 25))
19632 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19633 "range"), output_bfd
);
19635 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
19636 contents
[endianflip
^ target
] = insn
& 0xff;
19637 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19638 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19639 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19643 case VFP11_ERRATUM_ARM_VENEER
:
19645 bfd_vma branch_from_veneer
;
19648 /* Take size of veneer into account. */
19649 branch_from_veneer
= errnode
->u
.v
.branch
->vma
19650 - errnode
->vma
- 12;
19652 if ((signed) branch_from_veneer
< -(1 << 25)
19653 || (signed) branch_from_veneer
>= (1 << 25))
19654 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19655 "range"), output_bfd
);
19657 /* Original instruction. */
19658 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
19659 contents
[endianflip
^ target
] = insn
& 0xff;
19660 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19661 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19662 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19664 /* Branch back to insn after original insn. */
19665 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
19666 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
19667 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
19668 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
19669 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
19679 if (arm_data
->stm32l4xx_erratumcount
!= 0)
19681 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
19682 stm32l4xx_errnode
!= 0;
19683 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
19685 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
19687 switch (stm32l4xx_errnode
->type
)
19689 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
19692 bfd_vma branch_to_veneer
=
19693 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
19695 if ((signed) branch_to_veneer
< -(1 << 24)
19696 || (signed) branch_to_veneer
>= (1 << 24))
19698 bfd_vma out_of_range
=
19699 ((signed) branch_to_veneer
< -(1 << 24)) ?
19700 - branch_to_veneer
- (1 << 24) :
19701 ((signed) branch_to_veneer
>= (1 << 24)) ?
19702 branch_to_veneer
- (1 << 24) : 0;
19705 (_("%pB(%#" PRIx64
"): error: "
19706 "cannot create STM32L4XX veneer; "
19707 "jump out of range by %" PRId64
" bytes; "
19708 "cannot encode branch instruction"),
19710 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
19711 (int64_t) out_of_range
);
19715 insn
= create_instruction_branch_absolute
19716 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
19718 /* The instruction is before the label. */
19721 put_thumb2_insn (globals
, output_bfd
,
19722 (bfd_vma
) insn
, contents
+ target
);
19726 case STM32L4XX_ERRATUM_VENEER
:
19729 bfd_byte
* veneer_r
;
19732 veneer
= contents
+ target
;
19734 + stm32l4xx_errnode
->u
.b
.veneer
->vma
19735 - stm32l4xx_errnode
->vma
- 4;
19737 if ((signed) (veneer_r
- veneer
-
19738 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
19739 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
19740 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
19741 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
19742 || (signed) (veneer_r
- veneer
) >= (1 << 24))
19744 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19745 "veneer"), output_bfd
);
19749 /* Original instruction. */
19750 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
19752 stm32l4xx_create_replacing_stub
19753 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
19763 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
19765 arm_unwind_table_edit
*edit_node
19766 = arm_data
->u
.exidx
.unwind_edit_list
;
19767 /* Now, sec->size is the size of the section we will write. The original
19768 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19769 markers) was sec->rawsize. (This isn't the case if we perform no
19770 edits, then rawsize will be zero and we should use size). */
19771 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
19772 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
19773 unsigned int in_index
, out_index
;
19774 bfd_vma add_to_offsets
= 0;
19776 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
19780 unsigned int edit_index
= edit_node
->index
;
19782 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
19784 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19785 contents
+ in_index
* 8, add_to_offsets
);
19789 else if (in_index
== edit_index
19790 || (in_index
* 8 >= input_size
19791 && edit_index
== UINT_MAX
))
19793 switch (edit_node
->type
)
19795 case DELETE_EXIDX_ENTRY
:
19797 add_to_offsets
+= 8;
19800 case INSERT_EXIDX_CANTUNWIND_AT_END
:
19802 asection
*text_sec
= edit_node
->linked_section
;
19803 bfd_vma text_offset
= text_sec
->output_section
->vma
19804 + text_sec
->output_offset
19806 bfd_vma exidx_offset
= offset
+ out_index
* 8;
19807 unsigned long prel31_offset
;
19809 /* Note: this is meant to be equivalent to an
19810 R_ARM_PREL31 relocation. These synthetic
19811 EXIDX_CANTUNWIND markers are not relocated by the
19812 usual BFD method. */
19813 prel31_offset
= (text_offset
- exidx_offset
)
19815 if (bfd_link_relocatable (link_info
))
19817 /* Here relocation for new EXIDX_CANTUNWIND is
19818 created, so there is no need to
19819 adjust offset by hand. */
19820 prel31_offset
= text_sec
->output_offset
19824 /* First address we can't unwind. */
19825 bfd_put_32 (output_bfd
, prel31_offset
,
19826 &edited_contents
[out_index
* 8]);
19828 /* Code for EXIDX_CANTUNWIND. */
19829 bfd_put_32 (output_bfd
, 0x1,
19830 &edited_contents
[out_index
* 8 + 4]);
19833 add_to_offsets
-= 8;
19838 edit_node
= edit_node
->next
;
19843 /* No more edits, copy remaining entries verbatim. */
19844 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19845 contents
+ in_index
* 8, add_to_offsets
);
19851 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
19852 bfd_set_section_contents (output_bfd
, sec
->output_section
,
19854 (file_ptr
) sec
->output_offset
, sec
->size
);
19859 /* Fix code to point to Cortex-A8 erratum stubs. */
19860 if (globals
->fix_cortex_a8
)
19862 struct a8_branch_to_stub_data data
;
19864 data
.writing_section
= sec
;
19865 data
.contents
= contents
;
19867 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
19874 if (globals
->byteswap_code
)
19876 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
19879 for (i
= 0; i
< mapcount
; i
++)
19881 if (i
== mapcount
- 1)
19884 end
= map
[i
+ 1].vma
;
19886 switch (map
[i
].type
)
19889 /* Byte swap code words. */
19890 while (ptr
+ 3 < end
)
19892 tmp
= contents
[ptr
];
19893 contents
[ptr
] = contents
[ptr
+ 3];
19894 contents
[ptr
+ 3] = tmp
;
19895 tmp
= contents
[ptr
+ 1];
19896 contents
[ptr
+ 1] = contents
[ptr
+ 2];
19897 contents
[ptr
+ 2] = tmp
;
19903 /* Byte swap code halfwords. */
19904 while (ptr
+ 1 < end
)
19906 tmp
= contents
[ptr
];
19907 contents
[ptr
] = contents
[ptr
+ 1];
19908 contents
[ptr
+ 1] = tmp
;
19914 /* Leave data alone. */
19922 arm_data
->mapcount
= -1;
19923 arm_data
->mapsize
= 0;
19924 arm_data
->map
= NULL
;
19929 /* Mangle thumb function symbols as we read them in. */
19932 elf32_arm_swap_symbol_in (bfd
* abfd
,
19935 Elf_Internal_Sym
*dst
)
19937 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
19939 dst
->st_target_internal
= 0;
19941 /* New EABI objects mark thumb function symbols by setting the low bit of
19943 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
19944 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
19946 if (dst
->st_value
& 1)
19948 dst
->st_value
&= ~(bfd_vma
) 1;
19949 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
19950 ST_BRANCH_TO_THUMB
);
19953 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
19955 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
19957 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
19958 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
19960 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
19961 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
19963 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
19969 /* Mangle thumb function symbols as we write them out. */
19972 elf32_arm_swap_symbol_out (bfd
*abfd
,
19973 const Elf_Internal_Sym
*src
,
19977 Elf_Internal_Sym newsym
;
19979 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19980 of the address set, as per the new EABI. We do this unconditionally
19981 because objcopy does not set the elf header flags until after
19982 it writes out the symbol table. */
19983 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
19986 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
19987 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
19988 if (newsym
.st_shndx
!= SHN_UNDEF
)
19990 /* Do this only for defined symbols. At link type, the static
19991 linker will simulate the work of dynamic linker of resolving
19992 symbols and will carry over the thumbness of found symbols to
19993 the output symbol table. It's not clear how it happens, but
19994 the thumbness of undefined symbols can well be different at
19995 runtime, and writing '1' for them will be confusing for users
19996 and possibly for dynamic linker itself.
19998 newsym
.st_value
|= 1;
20003 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
20006 /* Add the PT_ARM_EXIDX program header. */
20009 elf32_arm_modify_segment_map (bfd
*abfd
,
20010 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
20012 struct elf_segment_map
*m
;
20015 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
20016 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
20018 /* If there is already a PT_ARM_EXIDX header, then we do not
20019 want to add another one. This situation arises when running
20020 "strip"; the input binary already has the header. */
20021 m
= elf_seg_map (abfd
);
20022 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
20026 m
= (struct elf_segment_map
*)
20027 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
20030 m
->p_type
= PT_ARM_EXIDX
;
20032 m
->sections
[0] = sec
;
20034 m
->next
= elf_seg_map (abfd
);
20035 elf_seg_map (abfd
) = m
;
20042 /* We may add a PT_ARM_EXIDX program header. */
20045 elf32_arm_additional_program_headers (bfd
*abfd
,
20046 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
20050 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
20051 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
20057 /* Hook called by the linker routine which adds symbols from an object
20061 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
20062 Elf_Internal_Sym
*sym
, const char **namep
,
20063 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
20065 if (elf32_arm_hash_table (info
) == NULL
)
20068 if (elf32_arm_hash_table (info
)->vxworks_p
20069 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
20070 flagsp
, secp
, valp
))
20076 /* We use this to override swap_symbol_in and swap_symbol_out. */
20077 const struct elf_size_info elf32_arm_size_info
=
20079 sizeof (Elf32_External_Ehdr
),
20080 sizeof (Elf32_External_Phdr
),
20081 sizeof (Elf32_External_Shdr
),
20082 sizeof (Elf32_External_Rel
),
20083 sizeof (Elf32_External_Rela
),
20084 sizeof (Elf32_External_Sym
),
20085 sizeof (Elf32_External_Dyn
),
20086 sizeof (Elf_External_Note
),
20090 ELFCLASS32
, EV_CURRENT
,
20091 bfd_elf32_write_out_phdrs
,
20092 bfd_elf32_write_shdrs_and_ehdr
,
20093 bfd_elf32_checksum_contents
,
20094 bfd_elf32_write_relocs
,
20095 elf32_arm_swap_symbol_in
,
20096 elf32_arm_swap_symbol_out
,
20097 bfd_elf32_slurp_reloc_table
,
20098 bfd_elf32_slurp_symbol_table
,
20099 bfd_elf32_swap_dyn_in
,
20100 bfd_elf32_swap_dyn_out
,
20101 bfd_elf32_swap_reloc_in
,
20102 bfd_elf32_swap_reloc_out
,
20103 bfd_elf32_swap_reloca_in
,
20104 bfd_elf32_swap_reloca_out
20108 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
20110 /* V7 BE8 code is always little endian. */
20111 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
20112 return bfd_getl32 (addr
);
20114 return bfd_get_32 (abfd
, addr
);
20118 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
20120 /* V7 BE8 code is always little endian. */
20121 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
20122 return bfd_getl16 (addr
);
20124 return bfd_get_16 (abfd
, addr
);
20127 /* Return size of plt0 entry starting at ADDR
20128 or (bfd_vma) -1 if size can not be determined. */
20131 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
20133 bfd_vma first_word
;
20136 first_word
= read_code32 (abfd
, addr
);
20138 if (first_word
== elf32_arm_plt0_entry
[0])
20139 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
20140 else if (first_word
== elf32_thumb2_plt0_entry
[0])
20141 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
20143 /* We don't yet handle this PLT format. */
20144 return (bfd_vma
) -1;
20149 /* Return size of plt entry starting at offset OFFSET
20150 of plt section located at address START
20151 or (bfd_vma) -1 if size can not be determined. */
20154 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
20156 bfd_vma first_insn
;
20157 bfd_vma plt_size
= 0;
20158 const bfd_byte
*addr
= start
+ offset
;
20160 /* PLT entry size if fixed on Thumb-only platforms. */
20161 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
20162 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
20164 /* Respect Thumb stub if necessary. */
20165 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
20167 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
20170 /* Strip immediate from first add. */
20171 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
20173 #ifdef FOUR_WORD_PLT
20174 if (first_insn
== elf32_arm_plt_entry
[0])
20175 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
20177 if (first_insn
== elf32_arm_plt_entry_long
[0])
20178 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
20179 else if (first_insn
== elf32_arm_plt_entry_short
[0])
20180 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
20183 /* We don't yet handle this PLT format. */
20184 return (bfd_vma
) -1;
20189 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20192 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
20193 long symcount ATTRIBUTE_UNUSED
,
20194 asymbol
**syms ATTRIBUTE_UNUSED
,
20204 Elf_Internal_Shdr
*hdr
;
20212 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
20215 if (dynsymcount
<= 0)
20218 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
20219 if (relplt
== NULL
)
20222 hdr
= &elf_section_data (relplt
)->this_hdr
;
20223 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
20224 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
20227 plt
= bfd_get_section_by_name (abfd
, ".plt");
20231 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
20234 data
= plt
->contents
;
20237 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
20239 bfd_cache_section_contents((asection
*) plt
, data
);
20242 count
= relplt
->size
/ hdr
->sh_entsize
;
20243 size
= count
* sizeof (asymbol
);
20244 p
= relplt
->relocation
;
20245 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20247 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
20248 if (p
->addend
!= 0)
20249 size
+= sizeof ("+0x") - 1 + 8;
20252 s
= *ret
= (asymbol
*) bfd_malloc (size
);
20256 offset
= elf32_arm_plt0_size (abfd
, data
);
20257 if (offset
== (bfd_vma
) -1)
20260 names
= (char *) (s
+ count
);
20261 p
= relplt
->relocation
;
20263 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20267 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
20268 if (plt_size
== (bfd_vma
) -1)
20271 *s
= **p
->sym_ptr_ptr
;
20272 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20273 we are defining a symbol, ensure one of them is set. */
20274 if ((s
->flags
& BSF_LOCAL
) == 0)
20275 s
->flags
|= BSF_GLOBAL
;
20276 s
->flags
|= BSF_SYNTHETIC
;
20281 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
20282 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
20284 if (p
->addend
!= 0)
20288 memcpy (names
, "+0x", sizeof ("+0x") - 1);
20289 names
+= sizeof ("+0x") - 1;
20290 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
20291 for (a
= buf
; *a
== '0'; ++a
)
20294 memcpy (names
, a
, len
);
20297 memcpy (names
, "@plt", sizeof ("@plt"));
20298 names
+= sizeof ("@plt");
20300 offset
+= plt_size
;
20307 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
20309 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
20310 *flags
|= SEC_ELF_PURECODE
;
20315 elf32_arm_lookup_section_flags (char *flag_name
)
20317 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
20318 return SHF_ARM_PURECODE
;
20320 return SEC_NO_FLAGS
;
20323 static unsigned int
20324 elf32_arm_count_additional_relocs (asection
*sec
)
20326 struct _arm_elf_section_data
*arm_data
;
20327 arm_data
= get_arm_elf_section_data (sec
);
20329 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
20332 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20333 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20334 FALSE otherwise. ISECTION is the best guess matching section from the
20335 input bfd IBFD, but it might be NULL. */
20338 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
20339 bfd
*obfd ATTRIBUTE_UNUSED
,
20340 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
20341 Elf_Internal_Shdr
*osection
)
20343 switch (osection
->sh_type
)
20345 case SHT_ARM_EXIDX
:
20347 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
20348 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
20351 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
20352 osection
->sh_info
= 0;
20354 /* The sh_link field must be set to the text section associated with
20355 this index section. Unfortunately the ARM EHABI does not specify
20356 exactly how to determine this association. Our caller does try
20357 to match up OSECTION with its corresponding input section however
20358 so that is a good first guess. */
20359 if (isection
!= NULL
20360 && osection
->bfd_section
!= NULL
20361 && isection
->bfd_section
!= NULL
20362 && isection
->bfd_section
->output_section
!= NULL
20363 && isection
->bfd_section
->output_section
== osection
->bfd_section
20364 && iheaders
!= NULL
20365 && isection
->sh_link
> 0
20366 && isection
->sh_link
< elf_numsections (ibfd
)
20367 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
20368 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
20371 for (i
= elf_numsections (obfd
); i
-- > 0;)
20372 if (oheaders
[i
]->bfd_section
20373 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
20379 /* Failing that we have to find a matching section ourselves. If
20380 we had the output section name available we could compare that
20381 with input section names. Unfortunately we don't. So instead
20382 we use a simple heuristic and look for the nearest executable
20383 section before this one. */
20384 for (i
= elf_numsections (obfd
); i
-- > 0;)
20385 if (oheaders
[i
] == osection
)
20391 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
20392 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
20393 == (SHF_ALLOC
| SHF_EXECINSTR
))
20399 osection
->sh_link
= i
;
20400 /* If the text section was part of a group
20401 then the index section should be too. */
20402 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
20403 osection
->sh_flags
|= SHF_GROUP
;
20409 case SHT_ARM_PREEMPTMAP
:
20410 osection
->sh_flags
= SHF_ALLOC
;
20413 case SHT_ARM_ATTRIBUTES
:
20414 case SHT_ARM_DEBUGOVERLAY
:
20415 case SHT_ARM_OVERLAYSECTION
:
20423 /* Returns TRUE if NAME is an ARM mapping symbol.
20424 Traditionally the symbols $a, $d and $t have been used.
20425 The ARM ELF standard also defines $x (for A64 code). It also allows a
20426 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20427 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20428 not support them here. $t.x indicates the start of ThumbEE instructions. */
20431 is_arm_mapping_symbol (const char * name
)
20433 return name
!= NULL
/* Paranoia. */
20434 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20435 the mapping symbols could have acquired a prefix.
20436 We do not support this here, since such symbols no
20437 longer conform to the ARM ELF ABI. */
20438 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
20439 && (name
[2] == 0 || name
[2] == '.');
20440 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20441 any characters that follow the period are legal characters for the body
20442 of a symbol's name. For now we just assume that this is the case. */
20445 /* Make sure that mapping symbols in object files are not removed via the
20446 "strip --strip-unneeded" tool. These symbols are needed in order to
20447 correctly generate interworking veneers, and for byte swapping code
20448 regions. Once an object file has been linked, it is safe to remove the
20449 symbols as they will no longer be needed. */
20452 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
20454 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
20455 && sym
->section
!= bfd_abs_section_ptr
20456 && is_arm_mapping_symbol (sym
->name
))
20457 sym
->flags
|= BSF_KEEP
;
20460 #undef elf_backend_copy_special_section_fields
20461 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20463 #define ELF_ARCH bfd_arch_arm
20464 #define ELF_TARGET_ID ARM_ELF_DATA
20465 #define ELF_MACHINE_CODE EM_ARM
20466 #ifdef __QNXTARGET__
20467 #define ELF_MAXPAGESIZE 0x1000
20469 #define ELF_MAXPAGESIZE 0x10000
20471 #define ELF_MINPAGESIZE 0x1000
20472 #define ELF_COMMONPAGESIZE 0x1000
20474 #define bfd_elf32_mkobject elf32_arm_mkobject
20476 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20477 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20478 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20479 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20480 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20481 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20482 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20483 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20484 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20485 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20486 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20487 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20488 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20490 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20491 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20492 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20493 #define elf_backend_check_relocs elf32_arm_check_relocs
20494 #define elf_backend_update_relocs elf32_arm_update_relocs
20495 #define elf_backend_relocate_section elf32_arm_relocate_section
20496 #define elf_backend_write_section elf32_arm_write_section
20497 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20498 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20499 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20500 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20501 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20502 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20503 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20504 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20505 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20506 #define elf_backend_object_p elf32_arm_object_p
20507 #define elf_backend_fake_sections elf32_arm_fake_sections
20508 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20509 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20510 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20511 #define elf_backend_size_info elf32_arm_size_info
20512 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20513 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20514 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20515 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20516 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20517 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20518 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20519 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20521 #define elf_backend_can_refcount 1
20522 #define elf_backend_can_gc_sections 1
20523 #define elf_backend_plt_readonly 1
20524 #define elf_backend_want_got_plt 1
20525 #define elf_backend_want_plt_sym 0
20526 #define elf_backend_want_dynrelro 1
20527 #define elf_backend_may_use_rel_p 1
20528 #define elf_backend_may_use_rela_p 0
20529 #define elf_backend_default_use_rela_p 0
20530 #define elf_backend_dtrel_excludes_plt 1
20532 #define elf_backend_got_header_size 12
20533 #define elf_backend_extern_protected_data 1
20535 #undef elf_backend_obj_attrs_vendor
20536 #define elf_backend_obj_attrs_vendor "aeabi"
20537 #undef elf_backend_obj_attrs_section
20538 #define elf_backend_obj_attrs_section ".ARM.attributes"
20539 #undef elf_backend_obj_attrs_arg_type
20540 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20541 #undef elf_backend_obj_attrs_section_type
20542 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20543 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20544 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20546 #undef elf_backend_section_flags
20547 #define elf_backend_section_flags elf32_arm_section_flags
20548 #undef elf_backend_lookup_section_flags_hook
20549 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20551 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20553 #include "elf32-target.h"
20555 /* Native Client targets. */
20557 #undef TARGET_LITTLE_SYM
20558 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20559 #undef TARGET_LITTLE_NAME
20560 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20561 #undef TARGET_BIG_SYM
20562 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20563 #undef TARGET_BIG_NAME
20564 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20566 /* Like elf32_arm_link_hash_table_create -- but overrides
20567 appropriately for NaCl. */
20569 static struct bfd_link_hash_table
*
20570 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
20572 struct bfd_link_hash_table
*ret
;
20574 ret
= elf32_arm_link_hash_table_create (abfd
);
20577 struct elf32_arm_link_hash_table
*htab
20578 = (struct elf32_arm_link_hash_table
*) ret
;
20582 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
20583 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
20588 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20589 really need to use elf32_arm_modify_segment_map. But we do it
20590 anyway just to reduce gratuitous differences with the stock ARM backend. */
20593 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
20595 return (elf32_arm_modify_segment_map (abfd
, info
)
20596 && nacl_modify_segment_map (abfd
, info
));
20600 elf32_arm_nacl_final_write_processing (bfd
*abfd
)
20602 arm_final_write_processing (abfd
);
20603 return nacl_final_write_processing (abfd
);
20607 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
20608 const arelent
*rel ATTRIBUTE_UNUSED
)
20611 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
20612 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
20616 #define elf32_bed elf32_arm_nacl_bed
20617 #undef bfd_elf32_bfd_link_hash_table_create
20618 #define bfd_elf32_bfd_link_hash_table_create \
20619 elf32_arm_nacl_link_hash_table_create
20620 #undef elf_backend_plt_alignment
20621 #define elf_backend_plt_alignment 4
20622 #undef elf_backend_modify_segment_map
20623 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20624 #undef elf_backend_modify_program_headers
20625 #define elf_backend_modify_program_headers nacl_modify_program_headers
20626 #undef elf_backend_final_write_processing
20627 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20628 #undef bfd_elf32_get_synthetic_symtab
20629 #undef elf_backend_plt_sym_val
20630 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20631 #undef elf_backend_copy_special_section_fields
20633 #undef ELF_MINPAGESIZE
20634 #undef ELF_COMMONPAGESIZE
20637 #include "elf32-target.h"
20639 /* Reset to defaults. */
20640 #undef elf_backend_plt_alignment
20641 #undef elf_backend_modify_segment_map
20642 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20643 #undef elf_backend_modify_program_headers
20644 #undef elf_backend_final_write_processing
20645 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20646 #undef ELF_MINPAGESIZE
20647 #define ELF_MINPAGESIZE 0x1000
20648 #undef ELF_COMMONPAGESIZE
20649 #define ELF_COMMONPAGESIZE 0x1000
20652 /* FDPIC Targets. */
20654 #undef TARGET_LITTLE_SYM
20655 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20656 #undef TARGET_LITTLE_NAME
20657 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20658 #undef TARGET_BIG_SYM
20659 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20660 #undef TARGET_BIG_NAME
20661 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20662 #undef elf_match_priority
20663 #define elf_match_priority 128
20665 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20667 /* Like elf32_arm_link_hash_table_create -- but overrides
20668 appropriately for FDPIC. */
20670 static struct bfd_link_hash_table
*
20671 elf32_arm_fdpic_link_hash_table_create (bfd
*abfd
)
20673 struct bfd_link_hash_table
*ret
;
20675 ret
= elf32_arm_link_hash_table_create (abfd
);
20678 struct elf32_arm_link_hash_table
*htab
= (struct elf32_arm_link_hash_table
*) ret
;
20685 /* We need dynamic symbols for every section, since segments can
20686 relocate independently. */
20688 elf32_arm_fdpic_omit_section_dynsym (bfd
*output_bfd ATTRIBUTE_UNUSED
,
20689 struct bfd_link_info
*info
20691 asection
*p ATTRIBUTE_UNUSED
)
20693 switch (elf_section_data (p
)->this_hdr
.sh_type
)
20697 /* If sh_type is yet undecided, assume it could be
20698 SHT_PROGBITS/SHT_NOBITS. */
20702 /* There shouldn't be section relative relocations
20703 against any other section. */
20710 #define elf32_bed elf32_arm_fdpic_bed
20712 #undef bfd_elf32_bfd_link_hash_table_create
20713 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20715 #undef elf_backend_omit_section_dynsym
20716 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20718 #include "elf32-target.h"
20720 #undef elf_match_priority
20722 #undef elf_backend_omit_section_dynsym
20724 /* VxWorks Targets. */
20726 #undef TARGET_LITTLE_SYM
20727 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20728 #undef TARGET_LITTLE_NAME
20729 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20730 #undef TARGET_BIG_SYM
20731 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20732 #undef TARGET_BIG_NAME
20733 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20735 /* Like elf32_arm_link_hash_table_create -- but overrides
20736 appropriately for VxWorks. */
20738 static struct bfd_link_hash_table
*
20739 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
20741 struct bfd_link_hash_table
*ret
;
20743 ret
= elf32_arm_link_hash_table_create (abfd
);
20746 struct elf32_arm_link_hash_table
*htab
20747 = (struct elf32_arm_link_hash_table
*) ret
;
20749 htab
->vxworks_p
= 1;
20755 elf32_arm_vxworks_final_write_processing (bfd
*abfd
)
20757 arm_final_write_processing (abfd
);
20758 return elf_vxworks_final_write_processing (abfd
);
20762 #define elf32_bed elf32_arm_vxworks_bed
20764 #undef bfd_elf32_bfd_link_hash_table_create
20765 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20766 #undef elf_backend_final_write_processing
20767 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20768 #undef elf_backend_emit_relocs
20769 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20771 #undef elf_backend_may_use_rel_p
20772 #define elf_backend_may_use_rel_p 0
20773 #undef elf_backend_may_use_rela_p
20774 #define elf_backend_may_use_rela_p 1
20775 #undef elf_backend_default_use_rela_p
20776 #define elf_backend_default_use_rela_p 1
20777 #undef elf_backend_want_plt_sym
20778 #define elf_backend_want_plt_sym 1
20779 #undef ELF_MAXPAGESIZE
20780 #define ELF_MAXPAGESIZE 0x1000
20782 #include "elf32-target.h"
20785 /* Merge backend specific data from an object file to the output
20786 object file when linking. */
20789 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
20791 bfd
*obfd
= info
->output_bfd
;
20792 flagword out_flags
;
20794 bfd_boolean flags_compatible
= TRUE
;
20797 /* Check if we have the same endianness. */
20798 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
20801 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
20804 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
20807 /* The input BFD must have had its flags initialised. */
20808 /* The following seems bogus to me -- The flags are initialized in
20809 the assembler but I don't think an elf_flags_init field is
20810 written into the object. */
20811 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20813 in_flags
= elf_elfheader (ibfd
)->e_flags
;
20814 out_flags
= elf_elfheader (obfd
)->e_flags
;
20816 /* In theory there is no reason why we couldn't handle this. However
20817 in practice it isn't even close to working and there is no real
20818 reason to want it. */
20819 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
20820 && !(ibfd
->flags
& DYNAMIC
)
20821 && (in_flags
& EF_ARM_BE8
))
20823 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20828 if (!elf_flags_init (obfd
))
20830 /* If the input is the default architecture and had the default
20831 flags then do not bother setting the flags for the output
20832 architecture, instead allow future merges to do this. If no
20833 future merges ever set these flags then they will retain their
20834 uninitialised values, which surprise surprise, correspond
20835 to the default values. */
20836 if (bfd_get_arch_info (ibfd
)->the_default
20837 && elf_elfheader (ibfd
)->e_flags
== 0)
20840 elf_flags_init (obfd
) = TRUE
;
20841 elf_elfheader (obfd
)->e_flags
= in_flags
;
20843 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
20844 && bfd_get_arch_info (obfd
)->the_default
)
20845 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
20850 /* Determine what should happen if the input ARM architecture
20851 does not match the output ARM architecture. */
20852 if (! bfd_arm_merge_machines (ibfd
, obfd
))
20855 /* Identical flags must be compatible. */
20856 if (in_flags
== out_flags
)
20859 /* Check to see if the input BFD actually contains any sections. If
20860 not, its flags may not have been initialised either, but it
20861 cannot actually cause any incompatiblity. Do not short-circuit
20862 dynamic objects; their section list may be emptied by
20863 elf_link_add_object_symbols.
20865 Also check to see if there are no code sections in the input.
20866 In this case there is no need to check for code specific flags.
20867 XXX - do we need to worry about floating-point format compatability
20868 in data sections ? */
20869 if (!(ibfd
->flags
& DYNAMIC
))
20871 bfd_boolean null_input_bfd
= TRUE
;
20872 bfd_boolean only_data_sections
= TRUE
;
20874 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
20876 /* Ignore synthetic glue sections. */
20877 if (strcmp (sec
->name
, ".glue_7")
20878 && strcmp (sec
->name
, ".glue_7t"))
20880 if ((bfd_section_flags (sec
)
20881 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20882 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20883 only_data_sections
= FALSE
;
20885 null_input_bfd
= FALSE
;
20890 if (null_input_bfd
|| only_data_sections
)
20894 /* Complain about various flag mismatches. */
20895 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
20896 EF_ARM_EABI_VERSION (out_flags
)))
20899 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20900 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
20901 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
20905 /* Not sure what needs to be checked for EABI versions >= 1. */
20906 /* VxWorks libraries do not use these flags. */
20907 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
20908 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
20909 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
20911 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
20914 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20915 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
20916 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
20917 flags_compatible
= FALSE
;
20920 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
20922 if (in_flags
& EF_ARM_APCS_FLOAT
)
20924 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20928 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20931 flags_compatible
= FALSE
;
20934 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
20936 if (in_flags
& EF_ARM_VFP_FLOAT
)
20938 (_("error: %pB uses %s instructions, whereas %pB does not"),
20939 ibfd
, "VFP", obfd
);
20942 (_("error: %pB uses %s instructions, whereas %pB does not"),
20943 ibfd
, "FPA", obfd
);
20945 flags_compatible
= FALSE
;
20948 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
20950 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
20952 (_("error: %pB uses %s instructions, whereas %pB does not"),
20953 ibfd
, "Maverick", obfd
);
20956 (_("error: %pB does not use %s instructions, whereas %pB does"),
20957 ibfd
, "Maverick", obfd
);
20959 flags_compatible
= FALSE
;
20962 #ifdef EF_ARM_SOFT_FLOAT
20963 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
20965 /* We can allow interworking between code that is VFP format
20966 layout, and uses either soft float or integer regs for
20967 passing floating point arguments and results. We already
20968 know that the APCS_FLOAT flags match; similarly for VFP
20970 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
20971 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
20973 if (in_flags
& EF_ARM_SOFT_FLOAT
)
20975 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20979 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20982 flags_compatible
= FALSE
;
20987 /* Interworking mismatch is only a warning. */
20988 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
20990 if (in_flags
& EF_ARM_INTERWORK
)
20993 (_("warning: %pB supports interworking, whereas %pB does not"),
20999 (_("warning: %pB does not support interworking, whereas %pB does"),
21005 return flags_compatible
;
21009 /* Symbian OS Targets. */
21011 #undef TARGET_LITTLE_SYM
21012 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
21013 #undef TARGET_LITTLE_NAME
21014 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
21015 #undef TARGET_BIG_SYM
21016 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
21017 #undef TARGET_BIG_NAME
21018 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
21020 /* Like elf32_arm_link_hash_table_create -- but overrides
21021 appropriately for Symbian OS. */
21023 static struct bfd_link_hash_table
*
21024 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
21026 struct bfd_link_hash_table
*ret
;
21028 ret
= elf32_arm_link_hash_table_create (abfd
);
21031 struct elf32_arm_link_hash_table
*htab
21032 = (struct elf32_arm_link_hash_table
*)ret
;
21033 /* There is no PLT header for Symbian OS. */
21034 htab
->plt_header_size
= 0;
21035 /* The PLT entries are each one instruction and one word. */
21036 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
21037 htab
->symbian_p
= 1;
21038 /* Symbian uses armv5t or above, so use_blx is always true. */
21040 htab
->root
.is_relocatable_executable
= 1;
21045 static const struct bfd_elf_special_section
21046 elf32_arm_symbian_special_sections
[] =
21048 /* In a BPABI executable, the dynamic linking sections do not go in
21049 the loadable read-only segment. The post-linker may wish to
21050 refer to these sections, but they are not part of the final
21052 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
21053 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
21054 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
21055 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
21056 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
21057 /* These sections do not need to be writable as the SymbianOS
21058 postlinker will arrange things so that no dynamic relocation is
21060 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
21061 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
21062 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
21063 { NULL
, 0, 0, 0, 0 }
21067 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
21068 struct bfd_link_info
*link_info
)
21070 /* BPABI objects are never loaded directly by an OS kernel; they are
21071 processed by a postlinker first, into an OS-specific format. If
21072 the D_PAGED bit is set on the file, BFD will align segments on
21073 page boundaries, so that an OS can directly map the file. With
21074 BPABI objects, that just results in wasted space. In addition,
21075 because we clear the D_PAGED bit, map_sections_to_segments will
21076 recognize that the program headers should not be mapped into any
21077 loadable segment. */
21078 abfd
->flags
&= ~D_PAGED
;
21079 elf32_arm_begin_write_processing (abfd
, link_info
);
21083 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
21084 struct bfd_link_info
*info
)
21086 struct elf_segment_map
*m
;
21089 /* BPABI shared libraries and executables should have a PT_DYNAMIC
21090 segment. However, because the .dynamic section is not marked
21091 with SEC_LOAD, the generic ELF code will not create such a
21093 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
21096 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
21097 if (m
->p_type
== PT_DYNAMIC
)
21102 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
21103 m
->next
= elf_seg_map (abfd
);
21104 elf_seg_map (abfd
) = m
;
21108 /* Also call the generic arm routine. */
21109 return elf32_arm_modify_segment_map (abfd
, info
);
21112 /* Return address for Ith PLT stub in section PLT, for relocation REL
21113 or (bfd_vma) -1 if it should not be included. */
21116 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
21117 const arelent
*rel ATTRIBUTE_UNUSED
)
21119 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
21123 #define elf32_bed elf32_arm_symbian_bed
21125 /* The dynamic sections are not allocated on SymbianOS; the postlinker
21126 will process them and then discard them. */
21127 #undef ELF_DYNAMIC_SEC_FLAGS
21128 #define ELF_DYNAMIC_SEC_FLAGS \
21129 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
21131 #undef elf_backend_emit_relocs
21133 #undef bfd_elf32_bfd_link_hash_table_create
21134 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
21135 #undef elf_backend_special_sections
21136 #define elf_backend_special_sections elf32_arm_symbian_special_sections
21137 #undef elf_backend_begin_write_processing
21138 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
21139 #undef elf_backend_final_write_processing
21140 #define elf_backend_final_write_processing elf32_arm_final_write_processing
21142 #undef elf_backend_modify_segment_map
21143 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
21145 /* There is no .got section for BPABI objects, and hence no header. */
21146 #undef elf_backend_got_header_size
21147 #define elf_backend_got_header_size 0
21149 /* Similarly, there is no .got.plt section. */
21150 #undef elf_backend_want_got_plt
21151 #define elf_backend_want_got_plt 0
21153 #undef elf_backend_plt_sym_val
21154 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21156 #undef elf_backend_may_use_rel_p
21157 #define elf_backend_may_use_rel_p 1
21158 #undef elf_backend_may_use_rela_p
21159 #define elf_backend_may_use_rela_p 0
21160 #undef elf_backend_default_use_rela_p
21161 #define elf_backend_default_use_rela_p 0
21162 #undef elf_backend_want_plt_sym
21163 #define elf_backend_want_plt_sym 0
21164 #undef elf_backend_dtrel_excludes_plt
21165 #define elf_backend_dtrel_excludes_plt 0
21166 #undef ELF_MAXPAGESIZE
21167 #define ELF_MAXPAGESIZE 0x8000
21169 #include "elf32-target.h"