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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2017 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3162 asection *srelplt2;
3163
3164 /* The offset into splt of the PLT entry for the TLS descriptor
3165 resolver. Special values are 0, if not necessary (or not found
3166 to be necessary yet), and -1 if needed but not determined
3167 yet. */
3168 bfd_vma dt_tlsdesc_plt;
3169
3170 /* The offset into sgot of the GOT entry used by the PLT entry
3171 above. */
3172 bfd_vma dt_tlsdesc_got;
3173
3174 /* Offset in .plt section of tls_arm_trampoline. */
3175 bfd_vma tls_trampoline;
3176
3177 /* Data for R_ARM_TLS_LDM32 relocations. */
3178 union
3179 {
3180 bfd_signed_vma refcount;
3181 bfd_vma offset;
3182 } tls_ldm_got;
3183
3184 /* Small local sym cache. */
3185 struct sym_cache sym_cache;
3186
3187 /* For convenience in allocate_dynrelocs. */
3188 bfd * obfd;
3189
3190 /* The amount of space used by the reserved portion of the sgotplt
3191 section, plus whatever space is used by the jump slots. */
3192 bfd_vma sgotplt_jump_table_size;
3193
3194 /* The stub hash table. */
3195 struct bfd_hash_table stub_hash_table;
3196
3197 /* Linker stub bfd. */
3198 bfd *stub_bfd;
3199
3200 /* Linker call-backs. */
3201 asection * (*add_stub_section) (const char *, asection *, asection *,
3202 unsigned int);
3203 void (*layout_sections_again) (void);
3204
3205 /* Array to keep track of which stub sections have been created, and
3206 information on stub grouping. */
3207 struct map_stub *stub_group;
3208
3209 /* Input stub section holding secure gateway veneers. */
3210 asection *cmse_stub_sec;
3211
3212 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3213 start to be allocated. */
3214 bfd_vma new_cmse_stub_offset;
3215
3216 /* Number of elements in stub_group. */
3217 unsigned int top_id;
3218
3219 /* Assorted information used by elf32_arm_size_stubs. */
3220 unsigned int bfd_count;
3221 unsigned int top_index;
3222 asection **input_list;
3223 };
3224
3225 static inline int
3226 ctz (unsigned int mask)
3227 {
3228 #if GCC_VERSION >= 3004
3229 return __builtin_ctz (mask);
3230 #else
3231 unsigned int i;
3232
3233 for (i = 0; i < 8 * sizeof (mask); i++)
3234 {
3235 if (mask & 0x1)
3236 break;
3237 mask = (mask >> 1);
3238 }
3239 return i;
3240 #endif
3241 }
3242
3243 static inline int
3244 elf32_arm_popcount (unsigned int mask)
3245 {
3246 #if GCC_VERSION >= 3004
3247 return __builtin_popcount (mask);
3248 #else
3249 unsigned int i;
3250 int sum = 0;
3251
3252 for (i = 0; i < 8 * sizeof (mask); i++)
3253 {
3254 if (mask & 0x1)
3255 sum++;
3256 mask = (mask >> 1);
3257 }
3258 return sum;
3259 #endif
3260 }
3261
3262 /* Create an entry in an ARM ELF linker hash table. */
3263
3264 static struct bfd_hash_entry *
3265 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3266 struct bfd_hash_table * table,
3267 const char * string)
3268 {
3269 struct elf32_arm_link_hash_entry * ret =
3270 (struct elf32_arm_link_hash_entry *) entry;
3271
3272 /* Allocate the structure if it has not already been allocated by a
3273 subclass. */
3274 if (ret == NULL)
3275 ret = (struct elf32_arm_link_hash_entry *)
3276 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3277 if (ret == NULL)
3278 return (struct bfd_hash_entry *) ret;
3279
3280 /* Call the allocation method of the superclass. */
3281 ret = ((struct elf32_arm_link_hash_entry *)
3282 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3283 table, string));
3284 if (ret != NULL)
3285 {
3286 ret->dyn_relocs = NULL;
3287 ret->tls_type = GOT_UNKNOWN;
3288 ret->tlsdesc_got = (bfd_vma) -1;
3289 ret->plt.thumb_refcount = 0;
3290 ret->plt.maybe_thumb_refcount = 0;
3291 ret->plt.noncall_refcount = 0;
3292 ret->plt.got_offset = -1;
3293 ret->is_iplt = FALSE;
3294 ret->export_glue = NULL;
3295
3296 ret->stub_cache = NULL;
3297 }
3298
3299 return (struct bfd_hash_entry *) ret;
3300 }
3301
3302 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3303 symbols. */
3304
3305 static bfd_boolean
3306 elf32_arm_allocate_local_sym_info (bfd *abfd)
3307 {
3308 if (elf_local_got_refcounts (abfd) == NULL)
3309 {
3310 bfd_size_type num_syms;
3311 bfd_size_type size;
3312 char *data;
3313
3314 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3315 size = num_syms * (sizeof (bfd_signed_vma)
3316 + sizeof (struct arm_local_iplt_info *)
3317 + sizeof (bfd_vma)
3318 + sizeof (char));
3319 data = bfd_zalloc (abfd, size);
3320 if (data == NULL)
3321 return FALSE;
3322
3323 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3324 data += num_syms * sizeof (bfd_signed_vma);
3325
3326 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3327 data += num_syms * sizeof (struct arm_local_iplt_info *);
3328
3329 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3330 data += num_syms * sizeof (bfd_vma);
3331
3332 elf32_arm_local_got_tls_type (abfd) = data;
3333 }
3334 return TRUE;
3335 }
3336
3337 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3338 to input bfd ABFD. Create the information if it doesn't already exist.
3339 Return null if an allocation fails. */
3340
3341 static struct arm_local_iplt_info *
3342 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3343 {
3344 struct arm_local_iplt_info **ptr;
3345
3346 if (!elf32_arm_allocate_local_sym_info (abfd))
3347 return NULL;
3348
3349 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3350 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3351 if (*ptr == NULL)
3352 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3353 return *ptr;
3354 }
3355
3356 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3357 in ABFD's symbol table. If the symbol is global, H points to its
3358 hash table entry, otherwise H is null.
3359
3360 Return true if the symbol does have PLT information. When returning
3361 true, point *ROOT_PLT at the target-independent reference count/offset
3362 union and *ARM_PLT at the ARM-specific information. */
3363
3364 static bfd_boolean
3365 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3366 struct elf32_arm_link_hash_entry *h,
3367 unsigned long r_symndx, union gotplt_union **root_plt,
3368 struct arm_plt_info **arm_plt)
3369 {
3370 struct arm_local_iplt_info *local_iplt;
3371
3372 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3373 return FALSE;
3374
3375 if (h != NULL)
3376 {
3377 *root_plt = &h->root.plt;
3378 *arm_plt = &h->plt;
3379 return TRUE;
3380 }
3381
3382 if (elf32_arm_local_iplt (abfd) == NULL)
3383 return FALSE;
3384
3385 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3386 if (local_iplt == NULL)
3387 return FALSE;
3388
3389 *root_plt = &local_iplt->root;
3390 *arm_plt = &local_iplt->arm;
3391 return TRUE;
3392 }
3393
3394 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3395 before it. */
3396
3397 static bfd_boolean
3398 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3399 struct arm_plt_info *arm_plt)
3400 {
3401 struct elf32_arm_link_hash_table *htab;
3402
3403 htab = elf32_arm_hash_table (info);
3404 return (arm_plt->thumb_refcount != 0
3405 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3406 }
3407
3408 /* Return a pointer to the head of the dynamic reloc list that should
3409 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3410 ABFD's symbol table. Return null if an error occurs. */
3411
3412 static struct elf_dyn_relocs **
3413 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3414 Elf_Internal_Sym *isym)
3415 {
3416 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3417 {
3418 struct arm_local_iplt_info *local_iplt;
3419
3420 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3421 if (local_iplt == NULL)
3422 return NULL;
3423 return &local_iplt->dyn_relocs;
3424 }
3425 else
3426 {
3427 /* Track dynamic relocs needed for local syms too.
3428 We really need local syms available to do this
3429 easily. Oh well. */
3430 asection *s;
3431 void *vpp;
3432
3433 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3434 if (s == NULL)
3435 abort ();
3436
3437 vpp = &elf_section_data (s)->local_dynrel;
3438 return (struct elf_dyn_relocs **) vpp;
3439 }
3440 }
3441
3442 /* Initialize an entry in the stub hash table. */
3443
3444 static struct bfd_hash_entry *
3445 stub_hash_newfunc (struct bfd_hash_entry *entry,
3446 struct bfd_hash_table *table,
3447 const char *string)
3448 {
3449 /* Allocate the structure if it has not already been allocated by a
3450 subclass. */
3451 if (entry == NULL)
3452 {
3453 entry = (struct bfd_hash_entry *)
3454 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3455 if (entry == NULL)
3456 return entry;
3457 }
3458
3459 /* Call the allocation method of the superclass. */
3460 entry = bfd_hash_newfunc (entry, table, string);
3461 if (entry != NULL)
3462 {
3463 struct elf32_arm_stub_hash_entry *eh;
3464
3465 /* Initialize the local fields. */
3466 eh = (struct elf32_arm_stub_hash_entry *) entry;
3467 eh->stub_sec = NULL;
3468 eh->stub_offset = (bfd_vma) -1;
3469 eh->source_value = 0;
3470 eh->target_value = 0;
3471 eh->target_section = NULL;
3472 eh->orig_insn = 0;
3473 eh->stub_type = arm_stub_none;
3474 eh->stub_size = 0;
3475 eh->stub_template = NULL;
3476 eh->stub_template_size = -1;
3477 eh->h = NULL;
3478 eh->id_sec = NULL;
3479 eh->output_name = NULL;
3480 }
3481
3482 return entry;
3483 }
3484
3485 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3486 shortcuts to them in our hash table. */
3487
3488 static bfd_boolean
3489 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3490 {
3491 struct elf32_arm_link_hash_table *htab;
3492
3493 htab = elf32_arm_hash_table (info);
3494 if (htab == NULL)
3495 return FALSE;
3496
3497 /* BPABI objects never have a GOT, or associated sections. */
3498 if (htab->symbian_p)
3499 return TRUE;
3500
3501 if (! _bfd_elf_create_got_section (dynobj, info))
3502 return FALSE;
3503
3504 return TRUE;
3505 }
3506
3507 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3508
3509 static bfd_boolean
3510 create_ifunc_sections (struct bfd_link_info *info)
3511 {
3512 struct elf32_arm_link_hash_table *htab;
3513 const struct elf_backend_data *bed;
3514 bfd *dynobj;
3515 asection *s;
3516 flagword flags;
3517
3518 htab = elf32_arm_hash_table (info);
3519 dynobj = htab->root.dynobj;
3520 bed = get_elf_backend_data (dynobj);
3521 flags = bed->dynamic_sec_flags;
3522
3523 if (htab->root.iplt == NULL)
3524 {
3525 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3526 flags | SEC_READONLY | SEC_CODE);
3527 if (s == NULL
3528 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3529 return FALSE;
3530 htab->root.iplt = s;
3531 }
3532
3533 if (htab->root.irelplt == NULL)
3534 {
3535 s = bfd_make_section_anyway_with_flags (dynobj,
3536 RELOC_SECTION (htab, ".iplt"),
3537 flags | SEC_READONLY);
3538 if (s == NULL
3539 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3540 return FALSE;
3541 htab->root.irelplt = s;
3542 }
3543
3544 if (htab->root.igotplt == NULL)
3545 {
3546 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3547 if (s == NULL
3548 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3549 return FALSE;
3550 htab->root.igotplt = s;
3551 }
3552 return TRUE;
3553 }
3554
3555 /* Determine if we're dealing with a Thumb only architecture. */
3556
3557 static bfd_boolean
3558 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3559 {
3560 int arch;
3561 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3562 Tag_CPU_arch_profile);
3563
3564 if (profile)
3565 return profile == 'M';
3566
3567 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3568
3569 /* Force return logic to be reviewed for each new architecture. */
3570 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3571 || arch == TAG_CPU_ARCH_V8M_BASE
3572 || arch == TAG_CPU_ARCH_V8M_MAIN);
3573
3574 if (arch == TAG_CPU_ARCH_V6_M
3575 || arch == TAG_CPU_ARCH_V6S_M
3576 || arch == TAG_CPU_ARCH_V7E_M
3577 || arch == TAG_CPU_ARCH_V8M_BASE
3578 || arch == TAG_CPU_ARCH_V8M_MAIN)
3579 return TRUE;
3580
3581 return FALSE;
3582 }
3583
3584 /* Determine if we're dealing with a Thumb-2 object. */
3585
3586 static bfd_boolean
3587 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3588 {
3589 int arch;
3590 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3591 Tag_THUMB_ISA_use);
3592
3593 if (thumb_isa)
3594 return thumb_isa == 2;
3595
3596 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3597
3598 /* Force return logic to be reviewed for each new architecture. */
3599 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3600 || arch == TAG_CPU_ARCH_V8M_BASE
3601 || arch == TAG_CPU_ARCH_V8M_MAIN);
3602
3603 return (arch == TAG_CPU_ARCH_V6T2
3604 || arch == TAG_CPU_ARCH_V7
3605 || arch == TAG_CPU_ARCH_V7E_M
3606 || arch == TAG_CPU_ARCH_V8
3607 || arch == TAG_CPU_ARCH_V8M_MAIN);
3608 }
3609
3610 /* Determine whether Thumb-2 BL instruction is available. */
3611
3612 static bfd_boolean
3613 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3614 {
3615 int arch =
3616 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3617
3618 /* Force return logic to be reviewed for each new architecture. */
3619 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3620 || arch == TAG_CPU_ARCH_V8M_BASE
3621 || arch == TAG_CPU_ARCH_V8M_MAIN);
3622
3623 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3624 return (arch == TAG_CPU_ARCH_V6T2
3625 || arch >= TAG_CPU_ARCH_V7);
3626 }
3627
3628 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3629 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3630 hash table. */
3631
3632 static bfd_boolean
3633 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3634 {
3635 struct elf32_arm_link_hash_table *htab;
3636
3637 htab = elf32_arm_hash_table (info);
3638 if (htab == NULL)
3639 return FALSE;
3640
3641 if (!htab->root.sgot && !create_got_section (dynobj, info))
3642 return FALSE;
3643
3644 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3645 return FALSE;
3646
3647 if (htab->vxworks_p)
3648 {
3649 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3650 return FALSE;
3651
3652 if (bfd_link_pic (info))
3653 {
3654 htab->plt_header_size = 0;
3655 htab->plt_entry_size
3656 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3657 }
3658 else
3659 {
3660 htab->plt_header_size
3661 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3662 htab->plt_entry_size
3663 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3664 }
3665
3666 if (elf_elfheader (dynobj))
3667 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3668 }
3669 else
3670 {
3671 /* PR ld/16017
3672 Test for thumb only architectures. Note - we cannot just call
3673 using_thumb_only() as the attributes in the output bfd have not been
3674 initialised at this point, so instead we use the input bfd. */
3675 bfd * saved_obfd = htab->obfd;
3676
3677 htab->obfd = dynobj;
3678 if (using_thumb_only (htab))
3679 {
3680 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3681 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3682 }
3683 htab->obfd = saved_obfd;
3684 }
3685
3686 if (!htab->root.splt
3687 || !htab->root.srelplt
3688 || !htab->root.sdynbss
3689 || (!bfd_link_pic (info) && !htab->root.srelbss))
3690 abort ();
3691
3692 return TRUE;
3693 }
3694
3695 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3696
3697 static void
3698 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3699 struct elf_link_hash_entry *dir,
3700 struct elf_link_hash_entry *ind)
3701 {
3702 struct elf32_arm_link_hash_entry *edir, *eind;
3703
3704 edir = (struct elf32_arm_link_hash_entry *) dir;
3705 eind = (struct elf32_arm_link_hash_entry *) ind;
3706
3707 if (eind->dyn_relocs != NULL)
3708 {
3709 if (edir->dyn_relocs != NULL)
3710 {
3711 struct elf_dyn_relocs **pp;
3712 struct elf_dyn_relocs *p;
3713
3714 /* Add reloc counts against the indirect sym to the direct sym
3715 list. Merge any entries against the same section. */
3716 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3717 {
3718 struct elf_dyn_relocs *q;
3719
3720 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3721 if (q->sec == p->sec)
3722 {
3723 q->pc_count += p->pc_count;
3724 q->count += p->count;
3725 *pp = p->next;
3726 break;
3727 }
3728 if (q == NULL)
3729 pp = &p->next;
3730 }
3731 *pp = edir->dyn_relocs;
3732 }
3733
3734 edir->dyn_relocs = eind->dyn_relocs;
3735 eind->dyn_relocs = NULL;
3736 }
3737
3738 if (ind->root.type == bfd_link_hash_indirect)
3739 {
3740 /* Copy over PLT info. */
3741 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3742 eind->plt.thumb_refcount = 0;
3743 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3744 eind->plt.maybe_thumb_refcount = 0;
3745 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3746 eind->plt.noncall_refcount = 0;
3747
3748 /* We should only allocate a function to .iplt once the final
3749 symbol information is known. */
3750 BFD_ASSERT (!eind->is_iplt);
3751
3752 if (dir->got.refcount <= 0)
3753 {
3754 edir->tls_type = eind->tls_type;
3755 eind->tls_type = GOT_UNKNOWN;
3756 }
3757 }
3758
3759 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3760 }
3761
3762 /* Destroy an ARM elf linker hash table. */
3763
3764 static void
3765 elf32_arm_link_hash_table_free (bfd *obfd)
3766 {
3767 struct elf32_arm_link_hash_table *ret
3768 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3769
3770 bfd_hash_table_free (&ret->stub_hash_table);
3771 _bfd_elf_link_hash_table_free (obfd);
3772 }
3773
3774 /* Create an ARM elf linker hash table. */
3775
3776 static struct bfd_link_hash_table *
3777 elf32_arm_link_hash_table_create (bfd *abfd)
3778 {
3779 struct elf32_arm_link_hash_table *ret;
3780 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3781
3782 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3783 if (ret == NULL)
3784 return NULL;
3785
3786 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3787 elf32_arm_link_hash_newfunc,
3788 sizeof (struct elf32_arm_link_hash_entry),
3789 ARM_ELF_DATA))
3790 {
3791 free (ret);
3792 return NULL;
3793 }
3794
3795 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3796 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3797 #ifdef FOUR_WORD_PLT
3798 ret->plt_header_size = 16;
3799 ret->plt_entry_size = 16;
3800 #else
3801 ret->plt_header_size = 20;
3802 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3803 #endif
3804 ret->use_rel = 1;
3805 ret->obfd = abfd;
3806
3807 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3808 sizeof (struct elf32_arm_stub_hash_entry)))
3809 {
3810 _bfd_elf_link_hash_table_free (abfd);
3811 return NULL;
3812 }
3813 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3814
3815 return &ret->root.root;
3816 }
3817
3818 /* Determine what kind of NOPs are available. */
3819
3820 static bfd_boolean
3821 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3822 {
3823 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3824 Tag_CPU_arch);
3825
3826 /* Force return logic to be reviewed for each new architecture. */
3827 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3828 || arch == TAG_CPU_ARCH_V8M_BASE
3829 || arch == TAG_CPU_ARCH_V8M_MAIN);
3830
3831 return (arch == TAG_CPU_ARCH_V6T2
3832 || arch == TAG_CPU_ARCH_V6K
3833 || arch == TAG_CPU_ARCH_V7
3834 || arch == TAG_CPU_ARCH_V8);
3835 }
3836
3837 static bfd_boolean
3838 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3839 {
3840 switch (stub_type)
3841 {
3842 case arm_stub_long_branch_thumb_only:
3843 case arm_stub_long_branch_thumb2_only:
3844 case arm_stub_long_branch_thumb2_only_pure:
3845 case arm_stub_long_branch_v4t_thumb_arm:
3846 case arm_stub_short_branch_v4t_thumb_arm:
3847 case arm_stub_long_branch_v4t_thumb_arm_pic:
3848 case arm_stub_long_branch_v4t_thumb_tls_pic:
3849 case arm_stub_long_branch_thumb_only_pic:
3850 case arm_stub_cmse_branch_thumb_only:
3851 return TRUE;
3852 case arm_stub_none:
3853 BFD_FAIL ();
3854 return FALSE;
3855 break;
3856 default:
3857 return FALSE;
3858 }
3859 }
3860
3861 /* Determine the type of stub needed, if any, for a call. */
3862
3863 static enum elf32_arm_stub_type
3864 arm_type_of_stub (struct bfd_link_info *info,
3865 asection *input_sec,
3866 const Elf_Internal_Rela *rel,
3867 unsigned char st_type,
3868 enum arm_st_branch_type *actual_branch_type,
3869 struct elf32_arm_link_hash_entry *hash,
3870 bfd_vma destination,
3871 asection *sym_sec,
3872 bfd *input_bfd,
3873 const char *name)
3874 {
3875 bfd_vma location;
3876 bfd_signed_vma branch_offset;
3877 unsigned int r_type;
3878 struct elf32_arm_link_hash_table * globals;
3879 bfd_boolean thumb2, thumb2_bl, thumb_only;
3880 enum elf32_arm_stub_type stub_type = arm_stub_none;
3881 int use_plt = 0;
3882 enum arm_st_branch_type branch_type = *actual_branch_type;
3883 union gotplt_union *root_plt;
3884 struct arm_plt_info *arm_plt;
3885 int arch;
3886 int thumb2_movw;
3887
3888 if (branch_type == ST_BRANCH_LONG)
3889 return stub_type;
3890
3891 globals = elf32_arm_hash_table (info);
3892 if (globals == NULL)
3893 return stub_type;
3894
3895 thumb_only = using_thumb_only (globals);
3896 thumb2 = using_thumb2 (globals);
3897 thumb2_bl = using_thumb2_bl (globals);
3898
3899 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3900
3901 /* True for architectures that implement the thumb2 movw instruction. */
3902 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3903
3904 /* Determine where the call point is. */
3905 location = (input_sec->output_offset
3906 + input_sec->output_section->vma
3907 + rel->r_offset);
3908
3909 r_type = ELF32_R_TYPE (rel->r_info);
3910
3911 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3912 are considering a function call relocation. */
3913 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3914 || r_type == R_ARM_THM_JUMP19)
3915 && branch_type == ST_BRANCH_TO_ARM)
3916 branch_type = ST_BRANCH_TO_THUMB;
3917
3918 /* For TLS call relocs, it is the caller's responsibility to provide
3919 the address of the appropriate trampoline. */
3920 if (r_type != R_ARM_TLS_CALL
3921 && r_type != R_ARM_THM_TLS_CALL
3922 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3923 ELF32_R_SYM (rel->r_info), &root_plt,
3924 &arm_plt)
3925 && root_plt->offset != (bfd_vma) -1)
3926 {
3927 asection *splt;
3928
3929 if (hash == NULL || hash->is_iplt)
3930 splt = globals->root.iplt;
3931 else
3932 splt = globals->root.splt;
3933 if (splt != NULL)
3934 {
3935 use_plt = 1;
3936
3937 /* Note when dealing with PLT entries: the main PLT stub is in
3938 ARM mode, so if the branch is in Thumb mode, another
3939 Thumb->ARM stub will be inserted later just before the ARM
3940 PLT stub. If a long branch stub is needed, we'll add a
3941 Thumb->Arm one and branch directly to the ARM PLT entry.
3942 Here, we have to check if a pre-PLT Thumb->ARM stub
3943 is needed and if it will be close enough. */
3944
3945 destination = (splt->output_section->vma
3946 + splt->output_offset
3947 + root_plt->offset);
3948 st_type = STT_FUNC;
3949
3950 /* Thumb branch/call to PLT: it can become a branch to ARM
3951 or to Thumb. We must perform the same checks and
3952 corrections as in elf32_arm_final_link_relocate. */
3953 if ((r_type == R_ARM_THM_CALL)
3954 || (r_type == R_ARM_THM_JUMP24))
3955 {
3956 if (globals->use_blx
3957 && r_type == R_ARM_THM_CALL
3958 && !thumb_only)
3959 {
3960 /* If the Thumb BLX instruction is available, convert
3961 the BL to a BLX instruction to call the ARM-mode
3962 PLT entry. */
3963 branch_type = ST_BRANCH_TO_ARM;
3964 }
3965 else
3966 {
3967 if (!thumb_only)
3968 /* Target the Thumb stub before the ARM PLT entry. */
3969 destination -= PLT_THUMB_STUB_SIZE;
3970 branch_type = ST_BRANCH_TO_THUMB;
3971 }
3972 }
3973 else
3974 {
3975 branch_type = ST_BRANCH_TO_ARM;
3976 }
3977 }
3978 }
3979 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3980 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3981
3982 branch_offset = (bfd_signed_vma)(destination - location);
3983
3984 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3985 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3986 {
3987 /* Handle cases where:
3988 - this call goes too far (different Thumb/Thumb2 max
3989 distance)
3990 - it's a Thumb->Arm call and blx is not available, or it's a
3991 Thumb->Arm branch (not bl). A stub is needed in this case,
3992 but only if this call is not through a PLT entry. Indeed,
3993 PLT stubs handle mode switching already. */
3994 if ((!thumb2_bl
3995 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3996 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3997 || (thumb2_bl
3998 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3999 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4000 || (thumb2
4001 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4002 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4003 && (r_type == R_ARM_THM_JUMP19))
4004 || (branch_type == ST_BRANCH_TO_ARM
4005 && (((r_type == R_ARM_THM_CALL
4006 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4007 || (r_type == R_ARM_THM_JUMP24)
4008 || (r_type == R_ARM_THM_JUMP19))
4009 && !use_plt))
4010 {
4011 /* If we need to insert a Thumb-Thumb long branch stub to a
4012 PLT, use one that branches directly to the ARM PLT
4013 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4014 stub, undo this now. */
4015 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4016 {
4017 branch_type = ST_BRANCH_TO_ARM;
4018 branch_offset += PLT_THUMB_STUB_SIZE;
4019 }
4020
4021 if (branch_type == ST_BRANCH_TO_THUMB)
4022 {
4023 /* Thumb to thumb. */
4024 if (!thumb_only)
4025 {
4026 if (input_sec->flags & SEC_ELF_PURECODE)
4027 _bfd_error_handler
4028 (_("%B(%A): warning: long branch veneers used in"
4029 " section with SHF_ARM_PURECODE section"
4030 " attribute is only supported for M-profile"
4031 " targets that implement the movw instruction."),
4032 input_bfd, input_sec);
4033
4034 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4035 /* PIC stubs. */
4036 ? ((globals->use_blx
4037 && (r_type == R_ARM_THM_CALL))
4038 /* V5T and above. Stub starts with ARM code, so
4039 we must be able to switch mode before
4040 reaching it, which is only possible for 'bl'
4041 (ie R_ARM_THM_CALL relocation). */
4042 ? arm_stub_long_branch_any_thumb_pic
4043 /* On V4T, use Thumb code only. */
4044 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4045
4046 /* non-PIC stubs. */
4047 : ((globals->use_blx
4048 && (r_type == R_ARM_THM_CALL))
4049 /* V5T and above. */
4050 ? arm_stub_long_branch_any_any
4051 /* V4T. */
4052 : arm_stub_long_branch_v4t_thumb_thumb);
4053 }
4054 else
4055 {
4056 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4057 stub_type = arm_stub_long_branch_thumb2_only_pure;
4058 else
4059 {
4060 if (input_sec->flags & SEC_ELF_PURECODE)
4061 _bfd_error_handler
4062 (_("%B(%A): warning: long branch veneers used in"
4063 " section with SHF_ARM_PURECODE section"
4064 " attribute is only supported for M-profile"
4065 " targets that implement the movw instruction."),
4066 input_bfd, input_sec);
4067
4068 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4069 /* PIC stub. */
4070 ? arm_stub_long_branch_thumb_only_pic
4071 /* non-PIC stub. */
4072 : (thumb2 ? arm_stub_long_branch_thumb2_only
4073 : arm_stub_long_branch_thumb_only);
4074 }
4075 }
4076 }
4077 else
4078 {
4079 if (input_sec->flags & SEC_ELF_PURECODE)
4080 _bfd_error_handler
4081 (_("%B(%A): warning: long branch veneers used in"
4082 " section with SHF_ARM_PURECODE section"
4083 " attribute is only supported" " for M-profile"
4084 " targets that implement the movw instruction."),
4085 input_bfd, input_sec);
4086
4087 /* Thumb to arm. */
4088 if (sym_sec != NULL
4089 && sym_sec->owner != NULL
4090 && !INTERWORK_FLAG (sym_sec->owner))
4091 {
4092 _bfd_error_handler
4093 (_("%B(%s): warning: interworking not enabled.\n"
4094 " first occurrence: %B: Thumb call to ARM"),
4095 sym_sec->owner, name, input_bfd);
4096 }
4097
4098 stub_type =
4099 (bfd_link_pic (info) | globals->pic_veneer)
4100 /* PIC stubs. */
4101 ? (r_type == R_ARM_THM_TLS_CALL
4102 /* TLS PIC stubs. */
4103 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4104 : arm_stub_long_branch_v4t_thumb_tls_pic)
4105 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4106 /* V5T PIC and above. */
4107 ? arm_stub_long_branch_any_arm_pic
4108 /* V4T PIC stub. */
4109 : arm_stub_long_branch_v4t_thumb_arm_pic))
4110
4111 /* non-PIC stubs. */
4112 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4113 /* V5T and above. */
4114 ? arm_stub_long_branch_any_any
4115 /* V4T. */
4116 : arm_stub_long_branch_v4t_thumb_arm);
4117
4118 /* Handle v4t short branches. */
4119 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4120 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4121 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4122 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4123 }
4124 }
4125 }
4126 else if (r_type == R_ARM_CALL
4127 || r_type == R_ARM_JUMP24
4128 || r_type == R_ARM_PLT32
4129 || r_type == R_ARM_TLS_CALL)
4130 {
4131 if (input_sec->flags & SEC_ELF_PURECODE)
4132 _bfd_error_handler
4133 (_("%B(%A): warning: long branch veneers used in"
4134 " section with SHF_ARM_PURECODE section"
4135 " attribute is only supported for M-profile"
4136 " targets that implement the movw instruction."),
4137 input_bfd, input_sec);
4138 if (branch_type == ST_BRANCH_TO_THUMB)
4139 {
4140 /* Arm to thumb. */
4141
4142 if (sym_sec != NULL
4143 && sym_sec->owner != NULL
4144 && !INTERWORK_FLAG (sym_sec->owner))
4145 {
4146 _bfd_error_handler
4147 (_("%B(%s): warning: interworking not enabled.\n"
4148 " first occurrence: %B: ARM call to Thumb"),
4149 sym_sec->owner, input_bfd, name);
4150 }
4151
4152 /* We have an extra 2-bytes reach because of
4153 the mode change (bit 24 (H) of BLX encoding). */
4154 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4155 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4156 || (r_type == R_ARM_CALL && !globals->use_blx)
4157 || (r_type == R_ARM_JUMP24)
4158 || (r_type == R_ARM_PLT32))
4159 {
4160 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4161 /* PIC stubs. */
4162 ? ((globals->use_blx)
4163 /* V5T and above. */
4164 ? arm_stub_long_branch_any_thumb_pic
4165 /* V4T stub. */
4166 : arm_stub_long_branch_v4t_arm_thumb_pic)
4167
4168 /* non-PIC stubs. */
4169 : ((globals->use_blx)
4170 /* V5T and above. */
4171 ? arm_stub_long_branch_any_any
4172 /* V4T. */
4173 : arm_stub_long_branch_v4t_arm_thumb);
4174 }
4175 }
4176 else
4177 {
4178 /* Arm to arm. */
4179 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4180 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4181 {
4182 stub_type =
4183 (bfd_link_pic (info) | globals->pic_veneer)
4184 /* PIC stubs. */
4185 ? (r_type == R_ARM_TLS_CALL
4186 /* TLS PIC Stub. */
4187 ? arm_stub_long_branch_any_tls_pic
4188 : (globals->nacl_p
4189 ? arm_stub_long_branch_arm_nacl_pic
4190 : arm_stub_long_branch_any_arm_pic))
4191 /* non-PIC stubs. */
4192 : (globals->nacl_p
4193 ? arm_stub_long_branch_arm_nacl
4194 : arm_stub_long_branch_any_any);
4195 }
4196 }
4197 }
4198
4199 /* If a stub is needed, record the actual destination type. */
4200 if (stub_type != arm_stub_none)
4201 *actual_branch_type = branch_type;
4202
4203 return stub_type;
4204 }
4205
4206 /* Build a name for an entry in the stub hash table. */
4207
4208 static char *
4209 elf32_arm_stub_name (const asection *input_section,
4210 const asection *sym_sec,
4211 const struct elf32_arm_link_hash_entry *hash,
4212 const Elf_Internal_Rela *rel,
4213 enum elf32_arm_stub_type stub_type)
4214 {
4215 char *stub_name;
4216 bfd_size_type len;
4217
4218 if (hash)
4219 {
4220 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4221 stub_name = (char *) bfd_malloc (len);
4222 if (stub_name != NULL)
4223 sprintf (stub_name, "%08x_%s+%x_%d",
4224 input_section->id & 0xffffffff,
4225 hash->root.root.root.string,
4226 (int) rel->r_addend & 0xffffffff,
4227 (int) stub_type);
4228 }
4229 else
4230 {
4231 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4232 stub_name = (char *) bfd_malloc (len);
4233 if (stub_name != NULL)
4234 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4235 input_section->id & 0xffffffff,
4236 sym_sec->id & 0xffffffff,
4237 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4238 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4239 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4240 (int) rel->r_addend & 0xffffffff,
4241 (int) stub_type);
4242 }
4243
4244 return stub_name;
4245 }
4246
4247 /* Look up an entry in the stub hash. Stub entries are cached because
4248 creating the stub name takes a bit of time. */
4249
4250 static struct elf32_arm_stub_hash_entry *
4251 elf32_arm_get_stub_entry (const asection *input_section,
4252 const asection *sym_sec,
4253 struct elf_link_hash_entry *hash,
4254 const Elf_Internal_Rela *rel,
4255 struct elf32_arm_link_hash_table *htab,
4256 enum elf32_arm_stub_type stub_type)
4257 {
4258 struct elf32_arm_stub_hash_entry *stub_entry;
4259 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4260 const asection *id_sec;
4261
4262 if ((input_section->flags & SEC_CODE) == 0)
4263 return NULL;
4264
4265 /* If this input section is part of a group of sections sharing one
4266 stub section, then use the id of the first section in the group.
4267 Stub names need to include a section id, as there may well be
4268 more than one stub used to reach say, printf, and we need to
4269 distinguish between them. */
4270 BFD_ASSERT (input_section->id <= htab->top_id);
4271 id_sec = htab->stub_group[input_section->id].link_sec;
4272
4273 if (h != NULL && h->stub_cache != NULL
4274 && h->stub_cache->h == h
4275 && h->stub_cache->id_sec == id_sec
4276 && h->stub_cache->stub_type == stub_type)
4277 {
4278 stub_entry = h->stub_cache;
4279 }
4280 else
4281 {
4282 char *stub_name;
4283
4284 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4285 if (stub_name == NULL)
4286 return NULL;
4287
4288 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4289 stub_name, FALSE, FALSE);
4290 if (h != NULL)
4291 h->stub_cache = stub_entry;
4292
4293 free (stub_name);
4294 }
4295
4296 return stub_entry;
4297 }
4298
4299 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4300 section. */
4301
4302 static bfd_boolean
4303 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4304 {
4305 if (stub_type >= max_stub_type)
4306 abort (); /* Should be unreachable. */
4307
4308 switch (stub_type)
4309 {
4310 case arm_stub_cmse_branch_thumb_only:
4311 return TRUE;
4312
4313 default:
4314 return FALSE;
4315 }
4316
4317 abort (); /* Should be unreachable. */
4318 }
4319
4320 /* Required alignment (as a power of 2) for the dedicated section holding
4321 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4322 with input sections. */
4323
4324 static int
4325 arm_dedicated_stub_output_section_required_alignment
4326 (enum elf32_arm_stub_type stub_type)
4327 {
4328 if (stub_type >= max_stub_type)
4329 abort (); /* Should be unreachable. */
4330
4331 switch (stub_type)
4332 {
4333 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4334 boundary. */
4335 case arm_stub_cmse_branch_thumb_only:
4336 return 5;
4337
4338 default:
4339 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4340 return 0;
4341 }
4342
4343 abort (); /* Should be unreachable. */
4344 }
4345
4346 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4347 NULL if veneers of this type are interspersed with input sections. */
4348
4349 static const char *
4350 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4351 {
4352 if (stub_type >= max_stub_type)
4353 abort (); /* Should be unreachable. */
4354
4355 switch (stub_type)
4356 {
4357 case arm_stub_cmse_branch_thumb_only:
4358 return ".gnu.sgstubs";
4359
4360 default:
4361 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4362 return NULL;
4363 }
4364
4365 abort (); /* Should be unreachable. */
4366 }
4367
4368 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4369 returns the address of the hash table field in HTAB holding a pointer to the
4370 corresponding input section. Otherwise, returns NULL. */
4371
4372 static asection **
4373 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4374 enum elf32_arm_stub_type stub_type)
4375 {
4376 if (stub_type >= max_stub_type)
4377 abort (); /* Should be unreachable. */
4378
4379 switch (stub_type)
4380 {
4381 case arm_stub_cmse_branch_thumb_only:
4382 return &htab->cmse_stub_sec;
4383
4384 default:
4385 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4386 return NULL;
4387 }
4388
4389 abort (); /* Should be unreachable. */
4390 }
4391
4392 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4393 is the section that branch into veneer and can be NULL if stub should go in
4394 a dedicated output section. Returns a pointer to the stub section, and the
4395 section to which the stub section will be attached (in *LINK_SEC_P).
4396 LINK_SEC_P may be NULL. */
4397
4398 static asection *
4399 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4400 struct elf32_arm_link_hash_table *htab,
4401 enum elf32_arm_stub_type stub_type)
4402 {
4403 asection *link_sec, *out_sec, **stub_sec_p;
4404 const char *stub_sec_prefix;
4405 bfd_boolean dedicated_output_section =
4406 arm_dedicated_stub_output_section_required (stub_type);
4407 int align;
4408
4409 if (dedicated_output_section)
4410 {
4411 bfd *output_bfd = htab->obfd;
4412 const char *out_sec_name =
4413 arm_dedicated_stub_output_section_name (stub_type);
4414 link_sec = NULL;
4415 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4416 stub_sec_prefix = out_sec_name;
4417 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4418 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4419 if (out_sec == NULL)
4420 {
4421 _bfd_error_handler (_("No address assigned to the veneers output "
4422 "section %s"), out_sec_name);
4423 return NULL;
4424 }
4425 }
4426 else
4427 {
4428 BFD_ASSERT (section->id <= htab->top_id);
4429 link_sec = htab->stub_group[section->id].link_sec;
4430 BFD_ASSERT (link_sec != NULL);
4431 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4432 if (*stub_sec_p == NULL)
4433 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4434 stub_sec_prefix = link_sec->name;
4435 out_sec = link_sec->output_section;
4436 align = htab->nacl_p ? 4 : 3;
4437 }
4438
4439 if (*stub_sec_p == NULL)
4440 {
4441 size_t namelen;
4442 bfd_size_type len;
4443 char *s_name;
4444
4445 namelen = strlen (stub_sec_prefix);
4446 len = namelen + sizeof (STUB_SUFFIX);
4447 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4448 if (s_name == NULL)
4449 return NULL;
4450
4451 memcpy (s_name, stub_sec_prefix, namelen);
4452 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4453 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4454 align);
4455 if (*stub_sec_p == NULL)
4456 return NULL;
4457
4458 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4459 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4460 | SEC_KEEP;
4461 }
4462
4463 if (!dedicated_output_section)
4464 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4465
4466 if (link_sec_p)
4467 *link_sec_p = link_sec;
4468
4469 return *stub_sec_p;
4470 }
4471
4472 /* Add a new stub entry to the stub hash. Not all fields of the new
4473 stub entry are initialised. */
4474
4475 static struct elf32_arm_stub_hash_entry *
4476 elf32_arm_add_stub (const char *stub_name, asection *section,
4477 struct elf32_arm_link_hash_table *htab,
4478 enum elf32_arm_stub_type stub_type)
4479 {
4480 asection *link_sec;
4481 asection *stub_sec;
4482 struct elf32_arm_stub_hash_entry *stub_entry;
4483
4484 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4485 stub_type);
4486 if (stub_sec == NULL)
4487 return NULL;
4488
4489 /* Enter this entry into the linker stub hash table. */
4490 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4491 TRUE, FALSE);
4492 if (stub_entry == NULL)
4493 {
4494 if (section == NULL)
4495 section = stub_sec;
4496 _bfd_error_handler (_("%B: cannot create stub entry %s"),
4497 section->owner, stub_name);
4498 return NULL;
4499 }
4500
4501 stub_entry->stub_sec = stub_sec;
4502 stub_entry->stub_offset = (bfd_vma) -1;
4503 stub_entry->id_sec = link_sec;
4504
4505 return stub_entry;
4506 }
4507
4508 /* Store an Arm insn into an output section not processed by
4509 elf32_arm_write_section. */
4510
4511 static void
4512 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4513 bfd * output_bfd, bfd_vma val, void * ptr)
4514 {
4515 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4516 bfd_putl32 (val, ptr);
4517 else
4518 bfd_putb32 (val, ptr);
4519 }
4520
4521 /* Store a 16-bit Thumb insn into an output section not processed by
4522 elf32_arm_write_section. */
4523
4524 static void
4525 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4526 bfd * output_bfd, bfd_vma val, void * ptr)
4527 {
4528 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4529 bfd_putl16 (val, ptr);
4530 else
4531 bfd_putb16 (val, ptr);
4532 }
4533
4534 /* Store a Thumb2 insn into an output section not processed by
4535 elf32_arm_write_section. */
4536
4537 static void
4538 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4539 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4540 {
4541 /* T2 instructions are 16-bit streamed. */
4542 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4543 {
4544 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4545 bfd_putl16 ((val & 0xffff), ptr + 2);
4546 }
4547 else
4548 {
4549 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4550 bfd_putb16 ((val & 0xffff), ptr + 2);
4551 }
4552 }
4553
4554 /* If it's possible to change R_TYPE to a more efficient access
4555 model, return the new reloc type. */
4556
4557 static unsigned
4558 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4559 struct elf_link_hash_entry *h)
4560 {
4561 int is_local = (h == NULL);
4562
4563 if (bfd_link_pic (info)
4564 || (h && h->root.type == bfd_link_hash_undefweak))
4565 return r_type;
4566
4567 /* We do not support relaxations for Old TLS models. */
4568 switch (r_type)
4569 {
4570 case R_ARM_TLS_GOTDESC:
4571 case R_ARM_TLS_CALL:
4572 case R_ARM_THM_TLS_CALL:
4573 case R_ARM_TLS_DESCSEQ:
4574 case R_ARM_THM_TLS_DESCSEQ:
4575 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4576 }
4577
4578 return r_type;
4579 }
4580
4581 static bfd_reloc_status_type elf32_arm_final_link_relocate
4582 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4583 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4584 const char *, unsigned char, enum arm_st_branch_type,
4585 struct elf_link_hash_entry *, bfd_boolean *, char **);
4586
4587 static unsigned int
4588 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4589 {
4590 switch (stub_type)
4591 {
4592 case arm_stub_a8_veneer_b_cond:
4593 case arm_stub_a8_veneer_b:
4594 case arm_stub_a8_veneer_bl:
4595 return 2;
4596
4597 case arm_stub_long_branch_any_any:
4598 case arm_stub_long_branch_v4t_arm_thumb:
4599 case arm_stub_long_branch_thumb_only:
4600 case arm_stub_long_branch_thumb2_only:
4601 case arm_stub_long_branch_thumb2_only_pure:
4602 case arm_stub_long_branch_v4t_thumb_thumb:
4603 case arm_stub_long_branch_v4t_thumb_arm:
4604 case arm_stub_short_branch_v4t_thumb_arm:
4605 case arm_stub_long_branch_any_arm_pic:
4606 case arm_stub_long_branch_any_thumb_pic:
4607 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4608 case arm_stub_long_branch_v4t_arm_thumb_pic:
4609 case arm_stub_long_branch_v4t_thumb_arm_pic:
4610 case arm_stub_long_branch_thumb_only_pic:
4611 case arm_stub_long_branch_any_tls_pic:
4612 case arm_stub_long_branch_v4t_thumb_tls_pic:
4613 case arm_stub_cmse_branch_thumb_only:
4614 case arm_stub_a8_veneer_blx:
4615 return 4;
4616
4617 case arm_stub_long_branch_arm_nacl:
4618 case arm_stub_long_branch_arm_nacl_pic:
4619 return 16;
4620
4621 default:
4622 abort (); /* Should be unreachable. */
4623 }
4624 }
4625
4626 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4627 veneering (TRUE) or have their own symbol (FALSE). */
4628
4629 static bfd_boolean
4630 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4631 {
4632 if (stub_type >= max_stub_type)
4633 abort (); /* Should be unreachable. */
4634
4635 switch (stub_type)
4636 {
4637 case arm_stub_cmse_branch_thumb_only:
4638 return TRUE;
4639
4640 default:
4641 return FALSE;
4642 }
4643
4644 abort (); /* Should be unreachable. */
4645 }
4646
4647 /* Returns the padding needed for the dedicated section used stubs of type
4648 STUB_TYPE. */
4649
4650 static int
4651 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4652 {
4653 if (stub_type >= max_stub_type)
4654 abort (); /* Should be unreachable. */
4655
4656 switch (stub_type)
4657 {
4658 case arm_stub_cmse_branch_thumb_only:
4659 return 32;
4660
4661 default:
4662 return 0;
4663 }
4664
4665 abort (); /* Should be unreachable. */
4666 }
4667
4668 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4669 returns the address of the hash table field in HTAB holding the offset at
4670 which new veneers should be layed out in the stub section. */
4671
4672 static bfd_vma*
4673 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4674 enum elf32_arm_stub_type stub_type)
4675 {
4676 switch (stub_type)
4677 {
4678 case arm_stub_cmse_branch_thumb_only:
4679 return &htab->new_cmse_stub_offset;
4680
4681 default:
4682 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4683 return NULL;
4684 }
4685 }
4686
4687 static bfd_boolean
4688 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4689 void * in_arg)
4690 {
4691 #define MAXRELOCS 3
4692 bfd_boolean removed_sg_veneer;
4693 struct elf32_arm_stub_hash_entry *stub_entry;
4694 struct elf32_arm_link_hash_table *globals;
4695 struct bfd_link_info *info;
4696 asection *stub_sec;
4697 bfd *stub_bfd;
4698 bfd_byte *loc;
4699 bfd_vma sym_value;
4700 int template_size;
4701 int size;
4702 const insn_sequence *template_sequence;
4703 int i;
4704 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4705 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4706 int nrelocs = 0;
4707 int just_allocated = 0;
4708
4709 /* Massage our args to the form they really have. */
4710 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4711 info = (struct bfd_link_info *) in_arg;
4712
4713 globals = elf32_arm_hash_table (info);
4714 if (globals == NULL)
4715 return FALSE;
4716
4717 stub_sec = stub_entry->stub_sec;
4718
4719 if ((globals->fix_cortex_a8 < 0)
4720 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4721 /* We have to do less-strictly-aligned fixes last. */
4722 return TRUE;
4723
4724 /* Assign a slot at the end of section if none assigned yet. */
4725 if (stub_entry->stub_offset == (bfd_vma) -1)
4726 {
4727 stub_entry->stub_offset = stub_sec->size;
4728 just_allocated = 1;
4729 }
4730 loc = stub_sec->contents + stub_entry->stub_offset;
4731
4732 stub_bfd = stub_sec->owner;
4733
4734 /* This is the address of the stub destination. */
4735 sym_value = (stub_entry->target_value
4736 + stub_entry->target_section->output_offset
4737 + stub_entry->target_section->output_section->vma);
4738
4739 template_sequence = stub_entry->stub_template;
4740 template_size = stub_entry->stub_template_size;
4741
4742 size = 0;
4743 for (i = 0; i < template_size; i++)
4744 {
4745 switch (template_sequence[i].type)
4746 {
4747 case THUMB16_TYPE:
4748 {
4749 bfd_vma data = (bfd_vma) template_sequence[i].data;
4750 if (template_sequence[i].reloc_addend != 0)
4751 {
4752 /* We've borrowed the reloc_addend field to mean we should
4753 insert a condition code into this (Thumb-1 branch)
4754 instruction. See THUMB16_BCOND_INSN. */
4755 BFD_ASSERT ((data & 0xff00) == 0xd000);
4756 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4757 }
4758 bfd_put_16 (stub_bfd, data, loc + size);
4759 size += 2;
4760 }
4761 break;
4762
4763 case THUMB32_TYPE:
4764 bfd_put_16 (stub_bfd,
4765 (template_sequence[i].data >> 16) & 0xffff,
4766 loc + size);
4767 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4768 loc + size + 2);
4769 if (template_sequence[i].r_type != R_ARM_NONE)
4770 {
4771 stub_reloc_idx[nrelocs] = i;
4772 stub_reloc_offset[nrelocs++] = size;
4773 }
4774 size += 4;
4775 break;
4776
4777 case ARM_TYPE:
4778 bfd_put_32 (stub_bfd, template_sequence[i].data,
4779 loc + size);
4780 /* Handle cases where the target is encoded within the
4781 instruction. */
4782 if (template_sequence[i].r_type == R_ARM_JUMP24)
4783 {
4784 stub_reloc_idx[nrelocs] = i;
4785 stub_reloc_offset[nrelocs++] = size;
4786 }
4787 size += 4;
4788 break;
4789
4790 case DATA_TYPE:
4791 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4792 stub_reloc_idx[nrelocs] = i;
4793 stub_reloc_offset[nrelocs++] = size;
4794 size += 4;
4795 break;
4796
4797 default:
4798 BFD_FAIL ();
4799 return FALSE;
4800 }
4801 }
4802
4803 if (just_allocated)
4804 stub_sec->size += size;
4805
4806 /* Stub size has already been computed in arm_size_one_stub. Check
4807 consistency. */
4808 BFD_ASSERT (size == stub_entry->stub_size);
4809
4810 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4811 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4812 sym_value |= 1;
4813
4814 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4815 to relocate in each stub. */
4816 removed_sg_veneer =
4817 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4818 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4819
4820 for (i = 0; i < nrelocs; i++)
4821 {
4822 Elf_Internal_Rela rel;
4823 bfd_boolean unresolved_reloc;
4824 char *error_message;
4825 bfd_vma points_to =
4826 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4827
4828 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4829 rel.r_info = ELF32_R_INFO (0,
4830 template_sequence[stub_reloc_idx[i]].r_type);
4831 rel.r_addend = 0;
4832
4833 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4834 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4835 template should refer back to the instruction after the original
4836 branch. We use target_section as Cortex-A8 erratum workaround stubs
4837 are only generated when both source and target are in the same
4838 section. */
4839 points_to = stub_entry->target_section->output_section->vma
4840 + stub_entry->target_section->output_offset
4841 + stub_entry->source_value;
4842
4843 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4844 (template_sequence[stub_reloc_idx[i]].r_type),
4845 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4846 points_to, info, stub_entry->target_section, "", STT_FUNC,
4847 stub_entry->branch_type,
4848 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4849 &error_message);
4850 }
4851
4852 return TRUE;
4853 #undef MAXRELOCS
4854 }
4855
4856 /* Calculate the template, template size and instruction size for a stub.
4857 Return value is the instruction size. */
4858
4859 static unsigned int
4860 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4861 const insn_sequence **stub_template,
4862 int *stub_template_size)
4863 {
4864 const insn_sequence *template_sequence = NULL;
4865 int template_size = 0, i;
4866 unsigned int size;
4867
4868 template_sequence = stub_definitions[stub_type].template_sequence;
4869 if (stub_template)
4870 *stub_template = template_sequence;
4871
4872 template_size = stub_definitions[stub_type].template_size;
4873 if (stub_template_size)
4874 *stub_template_size = template_size;
4875
4876 size = 0;
4877 for (i = 0; i < template_size; i++)
4878 {
4879 switch (template_sequence[i].type)
4880 {
4881 case THUMB16_TYPE:
4882 size += 2;
4883 break;
4884
4885 case ARM_TYPE:
4886 case THUMB32_TYPE:
4887 case DATA_TYPE:
4888 size += 4;
4889 break;
4890
4891 default:
4892 BFD_FAIL ();
4893 return 0;
4894 }
4895 }
4896
4897 return size;
4898 }
4899
4900 /* As above, but don't actually build the stub. Just bump offset so
4901 we know stub section sizes. */
4902
4903 static bfd_boolean
4904 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4905 void *in_arg ATTRIBUTE_UNUSED)
4906 {
4907 struct elf32_arm_stub_hash_entry *stub_entry;
4908 const insn_sequence *template_sequence;
4909 int template_size, size;
4910
4911 /* Massage our args to the form they really have. */
4912 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4913
4914 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4915 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4916
4917 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4918 &template_size);
4919
4920 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4921 if (stub_entry->stub_template_size)
4922 {
4923 stub_entry->stub_size = size;
4924 stub_entry->stub_template = template_sequence;
4925 stub_entry->stub_template_size = template_size;
4926 }
4927
4928 /* Already accounted for. */
4929 if (stub_entry->stub_offset != (bfd_vma) -1)
4930 return TRUE;
4931
4932 size = (size + 7) & ~7;
4933 stub_entry->stub_sec->size += size;
4934
4935 return TRUE;
4936 }
4937
4938 /* External entry points for sizing and building linker stubs. */
4939
4940 /* Set up various things so that we can make a list of input sections
4941 for each output section included in the link. Returns -1 on error,
4942 0 when no stubs will be needed, and 1 on success. */
4943
4944 int
4945 elf32_arm_setup_section_lists (bfd *output_bfd,
4946 struct bfd_link_info *info)
4947 {
4948 bfd *input_bfd;
4949 unsigned int bfd_count;
4950 unsigned int top_id, top_index;
4951 asection *section;
4952 asection **input_list, **list;
4953 bfd_size_type amt;
4954 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4955
4956 if (htab == NULL)
4957 return 0;
4958 if (! is_elf_hash_table (htab))
4959 return 0;
4960
4961 /* Count the number of input BFDs and find the top input section id. */
4962 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4963 input_bfd != NULL;
4964 input_bfd = input_bfd->link.next)
4965 {
4966 bfd_count += 1;
4967 for (section = input_bfd->sections;
4968 section != NULL;
4969 section = section->next)
4970 {
4971 if (top_id < section->id)
4972 top_id = section->id;
4973 }
4974 }
4975 htab->bfd_count = bfd_count;
4976
4977 amt = sizeof (struct map_stub) * (top_id + 1);
4978 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4979 if (htab->stub_group == NULL)
4980 return -1;
4981 htab->top_id = top_id;
4982
4983 /* We can't use output_bfd->section_count here to find the top output
4984 section index as some sections may have been removed, and
4985 _bfd_strip_section_from_output doesn't renumber the indices. */
4986 for (section = output_bfd->sections, top_index = 0;
4987 section != NULL;
4988 section = section->next)
4989 {
4990 if (top_index < section->index)
4991 top_index = section->index;
4992 }
4993
4994 htab->top_index = top_index;
4995 amt = sizeof (asection *) * (top_index + 1);
4996 input_list = (asection **) bfd_malloc (amt);
4997 htab->input_list = input_list;
4998 if (input_list == NULL)
4999 return -1;
5000
5001 /* For sections we aren't interested in, mark their entries with a
5002 value we can check later. */
5003 list = input_list + top_index;
5004 do
5005 *list = bfd_abs_section_ptr;
5006 while (list-- != input_list);
5007
5008 for (section = output_bfd->sections;
5009 section != NULL;
5010 section = section->next)
5011 {
5012 if ((section->flags & SEC_CODE) != 0)
5013 input_list[section->index] = NULL;
5014 }
5015
5016 return 1;
5017 }
5018
5019 /* The linker repeatedly calls this function for each input section,
5020 in the order that input sections are linked into output sections.
5021 Build lists of input sections to determine groupings between which
5022 we may insert linker stubs. */
5023
5024 void
5025 elf32_arm_next_input_section (struct bfd_link_info *info,
5026 asection *isec)
5027 {
5028 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5029
5030 if (htab == NULL)
5031 return;
5032
5033 if (isec->output_section->index <= htab->top_index)
5034 {
5035 asection **list = htab->input_list + isec->output_section->index;
5036
5037 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5038 {
5039 /* Steal the link_sec pointer for our list. */
5040 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5041 /* This happens to make the list in reverse order,
5042 which we reverse later. */
5043 PREV_SEC (isec) = *list;
5044 *list = isec;
5045 }
5046 }
5047 }
5048
5049 /* See whether we can group stub sections together. Grouping stub
5050 sections may result in fewer stubs. More importantly, we need to
5051 put all .init* and .fini* stubs at the end of the .init or
5052 .fini output sections respectively, because glibc splits the
5053 _init and _fini functions into multiple parts. Putting a stub in
5054 the middle of a function is not a good idea. */
5055
5056 static void
5057 group_sections (struct elf32_arm_link_hash_table *htab,
5058 bfd_size_type stub_group_size,
5059 bfd_boolean stubs_always_after_branch)
5060 {
5061 asection **list = htab->input_list;
5062
5063 do
5064 {
5065 asection *tail = *list;
5066 asection *head;
5067
5068 if (tail == bfd_abs_section_ptr)
5069 continue;
5070
5071 /* Reverse the list: we must avoid placing stubs at the
5072 beginning of the section because the beginning of the text
5073 section may be required for an interrupt vector in bare metal
5074 code. */
5075 #define NEXT_SEC PREV_SEC
5076 head = NULL;
5077 while (tail != NULL)
5078 {
5079 /* Pop from tail. */
5080 asection *item = tail;
5081 tail = PREV_SEC (item);
5082
5083 /* Push on head. */
5084 NEXT_SEC (item) = head;
5085 head = item;
5086 }
5087
5088 while (head != NULL)
5089 {
5090 asection *curr;
5091 asection *next;
5092 bfd_vma stub_group_start = head->output_offset;
5093 bfd_vma end_of_next;
5094
5095 curr = head;
5096 while (NEXT_SEC (curr) != NULL)
5097 {
5098 next = NEXT_SEC (curr);
5099 end_of_next = next->output_offset + next->size;
5100 if (end_of_next - stub_group_start >= stub_group_size)
5101 /* End of NEXT is too far from start, so stop. */
5102 break;
5103 /* Add NEXT to the group. */
5104 curr = next;
5105 }
5106
5107 /* OK, the size from the start to the start of CURR is less
5108 than stub_group_size and thus can be handled by one stub
5109 section. (Or the head section is itself larger than
5110 stub_group_size, in which case we may be toast.)
5111 We should really be keeping track of the total size of
5112 stubs added here, as stubs contribute to the final output
5113 section size. */
5114 do
5115 {
5116 next = NEXT_SEC (head);
5117 /* Set up this stub group. */
5118 htab->stub_group[head->id].link_sec = curr;
5119 }
5120 while (head != curr && (head = next) != NULL);
5121
5122 /* But wait, there's more! Input sections up to stub_group_size
5123 bytes after the stub section can be handled by it too. */
5124 if (!stubs_always_after_branch)
5125 {
5126 stub_group_start = curr->output_offset + curr->size;
5127
5128 while (next != NULL)
5129 {
5130 end_of_next = next->output_offset + next->size;
5131 if (end_of_next - stub_group_start >= stub_group_size)
5132 /* End of NEXT is too far from stubs, so stop. */
5133 break;
5134 /* Add NEXT to the stub group. */
5135 head = next;
5136 next = NEXT_SEC (head);
5137 htab->stub_group[head->id].link_sec = curr;
5138 }
5139 }
5140 head = next;
5141 }
5142 }
5143 while (list++ != htab->input_list + htab->top_index);
5144
5145 free (htab->input_list);
5146 #undef PREV_SEC
5147 #undef NEXT_SEC
5148 }
5149
5150 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5151 erratum fix. */
5152
5153 static int
5154 a8_reloc_compare (const void *a, const void *b)
5155 {
5156 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5157 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5158
5159 if (ra->from < rb->from)
5160 return -1;
5161 else if (ra->from > rb->from)
5162 return 1;
5163 else
5164 return 0;
5165 }
5166
5167 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5168 const char *, char **);
5169
5170 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5171 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5172 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5173 otherwise. */
5174
5175 static bfd_boolean
5176 cortex_a8_erratum_scan (bfd *input_bfd,
5177 struct bfd_link_info *info,
5178 struct a8_erratum_fix **a8_fixes_p,
5179 unsigned int *num_a8_fixes_p,
5180 unsigned int *a8_fix_table_size_p,
5181 struct a8_erratum_reloc *a8_relocs,
5182 unsigned int num_a8_relocs,
5183 unsigned prev_num_a8_fixes,
5184 bfd_boolean *stub_changed_p)
5185 {
5186 asection *section;
5187 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5188 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5189 unsigned int num_a8_fixes = *num_a8_fixes_p;
5190 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5191
5192 if (htab == NULL)
5193 return FALSE;
5194
5195 for (section = input_bfd->sections;
5196 section != NULL;
5197 section = section->next)
5198 {
5199 bfd_byte *contents = NULL;
5200 struct _arm_elf_section_data *sec_data;
5201 unsigned int span;
5202 bfd_vma base_vma;
5203
5204 if (elf_section_type (section) != SHT_PROGBITS
5205 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5206 || (section->flags & SEC_EXCLUDE) != 0
5207 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5208 || (section->output_section == bfd_abs_section_ptr))
5209 continue;
5210
5211 base_vma = section->output_section->vma + section->output_offset;
5212
5213 if (elf_section_data (section)->this_hdr.contents != NULL)
5214 contents = elf_section_data (section)->this_hdr.contents;
5215 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5216 return TRUE;
5217
5218 sec_data = elf32_arm_section_data (section);
5219
5220 for (span = 0; span < sec_data->mapcount; span++)
5221 {
5222 unsigned int span_start = sec_data->map[span].vma;
5223 unsigned int span_end = (span == sec_data->mapcount - 1)
5224 ? section->size : sec_data->map[span + 1].vma;
5225 unsigned int i;
5226 char span_type = sec_data->map[span].type;
5227 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5228
5229 if (span_type != 't')
5230 continue;
5231
5232 /* Span is entirely within a single 4KB region: skip scanning. */
5233 if (((base_vma + span_start) & ~0xfff)
5234 == ((base_vma + span_end) & ~0xfff))
5235 continue;
5236
5237 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5238
5239 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5240 * The branch target is in the same 4KB region as the
5241 first half of the branch.
5242 * The instruction before the branch is a 32-bit
5243 length non-branch instruction. */
5244 for (i = span_start; i < span_end;)
5245 {
5246 unsigned int insn = bfd_getl16 (&contents[i]);
5247 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5248 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5249
5250 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5251 insn_32bit = TRUE;
5252
5253 if (insn_32bit)
5254 {
5255 /* Load the rest of the insn (in manual-friendly order). */
5256 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5257
5258 /* Encoding T4: B<c>.W. */
5259 is_b = (insn & 0xf800d000) == 0xf0009000;
5260 /* Encoding T1: BL<c>.W. */
5261 is_bl = (insn & 0xf800d000) == 0xf000d000;
5262 /* Encoding T2: BLX<c>.W. */
5263 is_blx = (insn & 0xf800d000) == 0xf000c000;
5264 /* Encoding T3: B<c>.W (not permitted in IT block). */
5265 is_bcc = (insn & 0xf800d000) == 0xf0008000
5266 && (insn & 0x07f00000) != 0x03800000;
5267 }
5268
5269 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5270
5271 if (((base_vma + i) & 0xfff) == 0xffe
5272 && insn_32bit
5273 && is_32bit_branch
5274 && last_was_32bit
5275 && ! last_was_branch)
5276 {
5277 bfd_signed_vma offset = 0;
5278 bfd_boolean force_target_arm = FALSE;
5279 bfd_boolean force_target_thumb = FALSE;
5280 bfd_vma target;
5281 enum elf32_arm_stub_type stub_type = arm_stub_none;
5282 struct a8_erratum_reloc key, *found;
5283 bfd_boolean use_plt = FALSE;
5284
5285 key.from = base_vma + i;
5286 found = (struct a8_erratum_reloc *)
5287 bsearch (&key, a8_relocs, num_a8_relocs,
5288 sizeof (struct a8_erratum_reloc),
5289 &a8_reloc_compare);
5290
5291 if (found)
5292 {
5293 char *error_message = NULL;
5294 struct elf_link_hash_entry *entry;
5295
5296 /* We don't care about the error returned from this
5297 function, only if there is glue or not. */
5298 entry = find_thumb_glue (info, found->sym_name,
5299 &error_message);
5300
5301 if (entry)
5302 found->non_a8_stub = TRUE;
5303
5304 /* Keep a simpler condition, for the sake of clarity. */
5305 if (htab->root.splt != NULL && found->hash != NULL
5306 && found->hash->root.plt.offset != (bfd_vma) -1)
5307 use_plt = TRUE;
5308
5309 if (found->r_type == R_ARM_THM_CALL)
5310 {
5311 if (found->branch_type == ST_BRANCH_TO_ARM
5312 || use_plt)
5313 force_target_arm = TRUE;
5314 else
5315 force_target_thumb = TRUE;
5316 }
5317 }
5318
5319 /* Check if we have an offending branch instruction. */
5320
5321 if (found && found->non_a8_stub)
5322 /* We've already made a stub for this instruction, e.g.
5323 it's a long branch or a Thumb->ARM stub. Assume that
5324 stub will suffice to work around the A8 erratum (see
5325 setting of always_after_branch above). */
5326 ;
5327 else if (is_bcc)
5328 {
5329 offset = (insn & 0x7ff) << 1;
5330 offset |= (insn & 0x3f0000) >> 4;
5331 offset |= (insn & 0x2000) ? 0x40000 : 0;
5332 offset |= (insn & 0x800) ? 0x80000 : 0;
5333 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5334 if (offset & 0x100000)
5335 offset |= ~ ((bfd_signed_vma) 0xfffff);
5336 stub_type = arm_stub_a8_veneer_b_cond;
5337 }
5338 else if (is_b || is_bl || is_blx)
5339 {
5340 int s = (insn & 0x4000000) != 0;
5341 int j1 = (insn & 0x2000) != 0;
5342 int j2 = (insn & 0x800) != 0;
5343 int i1 = !(j1 ^ s);
5344 int i2 = !(j2 ^ s);
5345
5346 offset = (insn & 0x7ff) << 1;
5347 offset |= (insn & 0x3ff0000) >> 4;
5348 offset |= i2 << 22;
5349 offset |= i1 << 23;
5350 offset |= s << 24;
5351 if (offset & 0x1000000)
5352 offset |= ~ ((bfd_signed_vma) 0xffffff);
5353
5354 if (is_blx)
5355 offset &= ~ ((bfd_signed_vma) 3);
5356
5357 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5358 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5359 }
5360
5361 if (stub_type != arm_stub_none)
5362 {
5363 bfd_vma pc_for_insn = base_vma + i + 4;
5364
5365 /* The original instruction is a BL, but the target is
5366 an ARM instruction. If we were not making a stub,
5367 the BL would have been converted to a BLX. Use the
5368 BLX stub instead in that case. */
5369 if (htab->use_blx && force_target_arm
5370 && stub_type == arm_stub_a8_veneer_bl)
5371 {
5372 stub_type = arm_stub_a8_veneer_blx;
5373 is_blx = TRUE;
5374 is_bl = FALSE;
5375 }
5376 /* Conversely, if the original instruction was
5377 BLX but the target is Thumb mode, use the BL
5378 stub. */
5379 else if (force_target_thumb
5380 && stub_type == arm_stub_a8_veneer_blx)
5381 {
5382 stub_type = arm_stub_a8_veneer_bl;
5383 is_blx = FALSE;
5384 is_bl = TRUE;
5385 }
5386
5387 if (is_blx)
5388 pc_for_insn &= ~ ((bfd_vma) 3);
5389
5390 /* If we found a relocation, use the proper destination,
5391 not the offset in the (unrelocated) instruction.
5392 Note this is always done if we switched the stub type
5393 above. */
5394 if (found)
5395 offset =
5396 (bfd_signed_vma) (found->destination - pc_for_insn);
5397
5398 /* If the stub will use a Thumb-mode branch to a
5399 PLT target, redirect it to the preceding Thumb
5400 entry point. */
5401 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5402 offset -= PLT_THUMB_STUB_SIZE;
5403
5404 target = pc_for_insn + offset;
5405
5406 /* The BLX stub is ARM-mode code. Adjust the offset to
5407 take the different PC value (+8 instead of +4) into
5408 account. */
5409 if (stub_type == arm_stub_a8_veneer_blx)
5410 offset += 4;
5411
5412 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5413 {
5414 char *stub_name = NULL;
5415
5416 if (num_a8_fixes == a8_fix_table_size)
5417 {
5418 a8_fix_table_size *= 2;
5419 a8_fixes = (struct a8_erratum_fix *)
5420 bfd_realloc (a8_fixes,
5421 sizeof (struct a8_erratum_fix)
5422 * a8_fix_table_size);
5423 }
5424
5425 if (num_a8_fixes < prev_num_a8_fixes)
5426 {
5427 /* If we're doing a subsequent scan,
5428 check if we've found the same fix as
5429 before, and try and reuse the stub
5430 name. */
5431 stub_name = a8_fixes[num_a8_fixes].stub_name;
5432 if ((a8_fixes[num_a8_fixes].section != section)
5433 || (a8_fixes[num_a8_fixes].offset != i))
5434 {
5435 free (stub_name);
5436 stub_name = NULL;
5437 *stub_changed_p = TRUE;
5438 }
5439 }
5440
5441 if (!stub_name)
5442 {
5443 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5444 if (stub_name != NULL)
5445 sprintf (stub_name, "%x:%x", section->id, i);
5446 }
5447
5448 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5449 a8_fixes[num_a8_fixes].section = section;
5450 a8_fixes[num_a8_fixes].offset = i;
5451 a8_fixes[num_a8_fixes].target_offset =
5452 target - base_vma;
5453 a8_fixes[num_a8_fixes].orig_insn = insn;
5454 a8_fixes[num_a8_fixes].stub_name = stub_name;
5455 a8_fixes[num_a8_fixes].stub_type = stub_type;
5456 a8_fixes[num_a8_fixes].branch_type =
5457 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5458
5459 num_a8_fixes++;
5460 }
5461 }
5462 }
5463
5464 i += insn_32bit ? 4 : 2;
5465 last_was_32bit = insn_32bit;
5466 last_was_branch = is_32bit_branch;
5467 }
5468 }
5469
5470 if (elf_section_data (section)->this_hdr.contents == NULL)
5471 free (contents);
5472 }
5473
5474 *a8_fixes_p = a8_fixes;
5475 *num_a8_fixes_p = num_a8_fixes;
5476 *a8_fix_table_size_p = a8_fix_table_size;
5477
5478 return FALSE;
5479 }
5480
5481 /* Create or update a stub entry depending on whether the stub can already be
5482 found in HTAB. The stub is identified by:
5483 - its type STUB_TYPE
5484 - its source branch (note that several can share the same stub) whose
5485 section and relocation (if any) are given by SECTION and IRELA
5486 respectively
5487 - its target symbol whose input section, hash, name, value and branch type
5488 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5489 respectively
5490
5491 If found, the value of the stub's target symbol is updated from SYM_VALUE
5492 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5493 TRUE and the stub entry is initialized.
5494
5495 Returns the stub that was created or updated, or NULL if an error
5496 occurred. */
5497
5498 static struct elf32_arm_stub_hash_entry *
5499 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5500 enum elf32_arm_stub_type stub_type, asection *section,
5501 Elf_Internal_Rela *irela, asection *sym_sec,
5502 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5503 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5504 bfd_boolean *new_stub)
5505 {
5506 const asection *id_sec;
5507 char *stub_name;
5508 struct elf32_arm_stub_hash_entry *stub_entry;
5509 unsigned int r_type;
5510 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5511
5512 BFD_ASSERT (stub_type != arm_stub_none);
5513 *new_stub = FALSE;
5514
5515 if (sym_claimed)
5516 stub_name = sym_name;
5517 else
5518 {
5519 BFD_ASSERT (irela);
5520 BFD_ASSERT (section);
5521 BFD_ASSERT (section->id <= htab->top_id);
5522
5523 /* Support for grouping stub sections. */
5524 id_sec = htab->stub_group[section->id].link_sec;
5525
5526 /* Get the name of this stub. */
5527 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5528 stub_type);
5529 if (!stub_name)
5530 return NULL;
5531 }
5532
5533 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5534 FALSE);
5535 /* The proper stub has already been created, just update its value. */
5536 if (stub_entry != NULL)
5537 {
5538 if (!sym_claimed)
5539 free (stub_name);
5540 stub_entry->target_value = sym_value;
5541 return stub_entry;
5542 }
5543
5544 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5545 if (stub_entry == NULL)
5546 {
5547 if (!sym_claimed)
5548 free (stub_name);
5549 return NULL;
5550 }
5551
5552 stub_entry->target_value = sym_value;
5553 stub_entry->target_section = sym_sec;
5554 stub_entry->stub_type = stub_type;
5555 stub_entry->h = hash;
5556 stub_entry->branch_type = branch_type;
5557
5558 if (sym_claimed)
5559 stub_entry->output_name = sym_name;
5560 else
5561 {
5562 if (sym_name == NULL)
5563 sym_name = "unnamed";
5564 stub_entry->output_name = (char *)
5565 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5566 + strlen (sym_name));
5567 if (stub_entry->output_name == NULL)
5568 {
5569 free (stub_name);
5570 return NULL;
5571 }
5572
5573 /* For historical reasons, use the existing names for ARM-to-Thumb and
5574 Thumb-to-ARM stubs. */
5575 r_type = ELF32_R_TYPE (irela->r_info);
5576 if ((r_type == (unsigned int) R_ARM_THM_CALL
5577 || r_type == (unsigned int) R_ARM_THM_JUMP24
5578 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5579 && branch_type == ST_BRANCH_TO_ARM)
5580 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5581 else if ((r_type == (unsigned int) R_ARM_CALL
5582 || r_type == (unsigned int) R_ARM_JUMP24)
5583 && branch_type == ST_BRANCH_TO_THUMB)
5584 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5585 else
5586 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5587 }
5588
5589 *new_stub = TRUE;
5590 return stub_entry;
5591 }
5592
5593 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5594 gateway veneer to transition from non secure to secure state and create them
5595 accordingly.
5596
5597 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5598 defines the conditions that govern Secure Gateway veneer creation for a
5599 given symbol <SYM> as follows:
5600 - it has function type
5601 - it has non local binding
5602 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5603 same type, binding and value as <SYM> (called normal symbol).
5604 An entry function can handle secure state transition itself in which case
5605 its special symbol would have a different value from the normal symbol.
5606
5607 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5608 entry mapping while HTAB gives the name to hash entry mapping.
5609 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5610 created.
5611
5612 The return value gives whether a stub failed to be allocated. */
5613
5614 static bfd_boolean
5615 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5616 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5617 int *cmse_stub_created)
5618 {
5619 const struct elf_backend_data *bed;
5620 Elf_Internal_Shdr *symtab_hdr;
5621 unsigned i, j, sym_count, ext_start;
5622 Elf_Internal_Sym *cmse_sym, *local_syms;
5623 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5624 enum arm_st_branch_type branch_type;
5625 char *sym_name, *lsym_name;
5626 bfd_vma sym_value;
5627 asection *section;
5628 struct elf32_arm_stub_hash_entry *stub_entry;
5629 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5630
5631 bed = get_elf_backend_data (input_bfd);
5632 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5633 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5634 ext_start = symtab_hdr->sh_info;
5635 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5636 && out_attr[Tag_CPU_arch_profile].i == 'M');
5637
5638 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5639 if (local_syms == NULL)
5640 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5641 symtab_hdr->sh_info, 0, NULL, NULL,
5642 NULL);
5643 if (symtab_hdr->sh_info && local_syms == NULL)
5644 return FALSE;
5645
5646 /* Scan symbols. */
5647 for (i = 0; i < sym_count; i++)
5648 {
5649 cmse_invalid = FALSE;
5650
5651 if (i < ext_start)
5652 {
5653 cmse_sym = &local_syms[i];
5654 /* Not a special symbol. */
5655 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5656 continue;
5657 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5658 symtab_hdr->sh_link,
5659 cmse_sym->st_name);
5660 /* Special symbol with local binding. */
5661 cmse_invalid = TRUE;
5662 }
5663 else
5664 {
5665 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5666 sym_name = (char *) cmse_hash->root.root.root.string;
5667
5668 /* Not a special symbol. */
5669 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5670 continue;
5671
5672 /* Special symbol has incorrect binding or type. */
5673 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5674 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5675 || cmse_hash->root.type != STT_FUNC)
5676 cmse_invalid = TRUE;
5677 }
5678
5679 if (!is_v8m)
5680 {
5681 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5682 "ARMv8-M architecture or later."),
5683 input_bfd, sym_name);
5684 is_v8m = TRUE; /* Avoid multiple warning. */
5685 ret = FALSE;
5686 }
5687
5688 if (cmse_invalid)
5689 {
5690 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5691 input_bfd, sym_name);
5692 _bfd_error_handler (_("It must be a global or weak function "
5693 "symbol."));
5694 ret = FALSE;
5695 if (i < ext_start)
5696 continue;
5697 }
5698
5699 sym_name += strlen (CMSE_PREFIX);
5700 hash = (struct elf32_arm_link_hash_entry *)
5701 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5702
5703 /* No associated normal symbol or it is neither global nor weak. */
5704 if (!hash
5705 || (hash->root.root.type != bfd_link_hash_defined
5706 && hash->root.root.type != bfd_link_hash_defweak)
5707 || hash->root.type != STT_FUNC)
5708 {
5709 /* Initialize here to avoid warning about use of possibly
5710 uninitialized variable. */
5711 j = 0;
5712
5713 if (!hash)
5714 {
5715 /* Searching for a normal symbol with local binding. */
5716 for (; j < ext_start; j++)
5717 {
5718 lsym_name =
5719 bfd_elf_string_from_elf_section (input_bfd,
5720 symtab_hdr->sh_link,
5721 local_syms[j].st_name);
5722 if (!strcmp (sym_name, lsym_name))
5723 break;
5724 }
5725 }
5726
5727 if (hash || j < ext_start)
5728 {
5729 _bfd_error_handler
5730 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5731 _bfd_error_handler
5732 (_("It must be a global or weak function symbol."));
5733 }
5734 else
5735 _bfd_error_handler
5736 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5737 ret = FALSE;
5738 if (!hash)
5739 continue;
5740 }
5741
5742 sym_value = hash->root.root.u.def.value;
5743 section = hash->root.root.u.def.section;
5744
5745 if (cmse_hash->root.root.u.def.section != section)
5746 {
5747 _bfd_error_handler
5748 (_("%B: `%s' and its special symbol are in different sections."),
5749 input_bfd, sym_name);
5750 ret = FALSE;
5751 }
5752 if (cmse_hash->root.root.u.def.value != sym_value)
5753 continue; /* Ignore: could be an entry function starting with SG. */
5754
5755 /* If this section is a link-once section that will be discarded, then
5756 don't create any stubs. */
5757 if (section->output_section == NULL)
5758 {
5759 _bfd_error_handler
5760 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5761 continue;
5762 }
5763
5764 if (hash->root.size == 0)
5765 {
5766 _bfd_error_handler
5767 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5768 ret = FALSE;
5769 }
5770
5771 if (!ret)
5772 continue;
5773 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5774 stub_entry
5775 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5776 NULL, NULL, section, hash, sym_name,
5777 sym_value, branch_type, &new_stub);
5778
5779 if (stub_entry == NULL)
5780 ret = FALSE;
5781 else
5782 {
5783 BFD_ASSERT (new_stub);
5784 (*cmse_stub_created)++;
5785 }
5786 }
5787
5788 if (!symtab_hdr->contents)
5789 free (local_syms);
5790 return ret;
5791 }
5792
5793 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5794 code entry function, ie can be called from non secure code without using a
5795 veneer. */
5796
5797 static bfd_boolean
5798 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5799 {
5800 bfd_byte contents[4];
5801 uint32_t first_insn;
5802 asection *section;
5803 file_ptr offset;
5804 bfd *abfd;
5805
5806 /* Defined symbol of function type. */
5807 if (hash->root.root.type != bfd_link_hash_defined
5808 && hash->root.root.type != bfd_link_hash_defweak)
5809 return FALSE;
5810 if (hash->root.type != STT_FUNC)
5811 return FALSE;
5812
5813 /* Read first instruction. */
5814 section = hash->root.root.u.def.section;
5815 abfd = section->owner;
5816 offset = hash->root.root.u.def.value - section->vma;
5817 if (!bfd_get_section_contents (abfd, section, contents, offset,
5818 sizeof (contents)))
5819 return FALSE;
5820
5821 first_insn = bfd_get_32 (abfd, contents);
5822
5823 /* Starts by SG instruction. */
5824 return first_insn == 0xe97fe97f;
5825 }
5826
5827 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5828 secure gateway veneers (ie. the veneers was not in the input import library)
5829 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5830
5831 static bfd_boolean
5832 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5833 {
5834 struct elf32_arm_stub_hash_entry *stub_entry;
5835 struct bfd_link_info *info;
5836
5837 /* Massage our args to the form they really have. */
5838 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5839 info = (struct bfd_link_info *) gen_info;
5840
5841 if (info->out_implib_bfd)
5842 return TRUE;
5843
5844 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5845 return TRUE;
5846
5847 if (stub_entry->stub_offset == (bfd_vma) -1)
5848 _bfd_error_handler (" %s", stub_entry->output_name);
5849
5850 return TRUE;
5851 }
5852
5853 /* Set offset of each secure gateway veneers so that its address remain
5854 identical to the one in the input import library referred by
5855 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5856 (present in input import library but absent from the executable being
5857 linked) or if new veneers appeared and there is no output import library
5858 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5859 number of secure gateway veneers found in the input import library.
5860
5861 The function returns whether an error occurred. If no error occurred,
5862 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5863 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5864 veneer observed set for new veneers to be layed out after. */
5865
5866 static bfd_boolean
5867 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5868 struct elf32_arm_link_hash_table *htab,
5869 int *cmse_stub_created)
5870 {
5871 long symsize;
5872 char *sym_name;
5873 flagword flags;
5874 long i, symcount;
5875 bfd *in_implib_bfd;
5876 asection *stub_out_sec;
5877 bfd_boolean ret = TRUE;
5878 Elf_Internal_Sym *intsym;
5879 const char *out_sec_name;
5880 bfd_size_type cmse_stub_size;
5881 asymbol **sympp = NULL, *sym;
5882 struct elf32_arm_link_hash_entry *hash;
5883 const insn_sequence *cmse_stub_template;
5884 struct elf32_arm_stub_hash_entry *stub_entry;
5885 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5886 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5887 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5888
5889 /* No input secure gateway import library. */
5890 if (!htab->in_implib_bfd)
5891 return TRUE;
5892
5893 in_implib_bfd = htab->in_implib_bfd;
5894 if (!htab->cmse_implib)
5895 {
5896 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5897 "Gateway import libraries."), in_implib_bfd);
5898 return FALSE;
5899 }
5900
5901 /* Get symbol table size. */
5902 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5903 if (symsize < 0)
5904 return FALSE;
5905
5906 /* Read in the input secure gateway import library's symbol table. */
5907 sympp = (asymbol **) xmalloc (symsize);
5908 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5909 if (symcount < 0)
5910 {
5911 ret = FALSE;
5912 goto free_sym_buf;
5913 }
5914
5915 htab->new_cmse_stub_offset = 0;
5916 cmse_stub_size =
5917 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5918 &cmse_stub_template,
5919 &cmse_stub_template_size);
5920 out_sec_name =
5921 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5922 stub_out_sec =
5923 bfd_get_section_by_name (htab->obfd, out_sec_name);
5924 if (stub_out_sec != NULL)
5925 cmse_stub_sec_vma = stub_out_sec->vma;
5926
5927 /* Set addresses of veneers mentionned in input secure gateway import
5928 library's symbol table. */
5929 for (i = 0; i < symcount; i++)
5930 {
5931 sym = sympp[i];
5932 flags = sym->flags;
5933 sym_name = (char *) bfd_asymbol_name (sym);
5934 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5935
5936 if (sym->section != bfd_abs_section_ptr
5937 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5938 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5939 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5940 != ST_BRANCH_TO_THUMB))
5941 {
5942 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5943 in_implib_bfd, sym_name);
5944 _bfd_error_handler (_("Symbol should be absolute, global and "
5945 "refer to Thumb functions."));
5946 ret = FALSE;
5947 continue;
5948 }
5949
5950 veneer_value = bfd_asymbol_value (sym);
5951 stub_offset = veneer_value - cmse_stub_sec_vma;
5952 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5953 FALSE, FALSE);
5954 hash = (struct elf32_arm_link_hash_entry *)
5955 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5956
5957 /* Stub entry should have been created by cmse_scan or the symbol be of
5958 a secure function callable from non secure code. */
5959 if (!stub_entry && !hash)
5960 {
5961 bfd_boolean new_stub;
5962
5963 _bfd_error_handler
5964 (_("Entry function `%s' disappeared from secure code."), sym_name);
5965 hash = (struct elf32_arm_link_hash_entry *)
5966 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5967 stub_entry
5968 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5969 NULL, NULL, bfd_abs_section_ptr, hash,
5970 sym_name, veneer_value,
5971 ST_BRANCH_TO_THUMB, &new_stub);
5972 if (stub_entry == NULL)
5973 ret = FALSE;
5974 else
5975 {
5976 BFD_ASSERT (new_stub);
5977 new_cmse_stubs_created++;
5978 (*cmse_stub_created)++;
5979 }
5980 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5981 stub_entry->stub_offset = stub_offset;
5982 }
5983 /* Symbol found is not callable from non secure code. */
5984 else if (!stub_entry)
5985 {
5986 if (!cmse_entry_fct_p (hash))
5987 {
5988 _bfd_error_handler (_("`%s' refers to a non entry function."),
5989 sym_name);
5990 ret = FALSE;
5991 }
5992 continue;
5993 }
5994 else
5995 {
5996 /* Only stubs for SG veneers should have been created. */
5997 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5998
5999 /* Check visibility hasn't changed. */
6000 if (!!(flags & BSF_GLOBAL)
6001 != (hash->root.root.type == bfd_link_hash_defined))
6002 _bfd_error_handler
6003 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6004 sym_name);
6005
6006 stub_entry->stub_offset = stub_offset;
6007 }
6008
6009 /* Size should match that of a SG veneer. */
6010 if (intsym->st_size != cmse_stub_size)
6011 {
6012 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6013 in_implib_bfd, sym_name);
6014 ret = FALSE;
6015 }
6016
6017 /* Previous veneer address is before current SG veneer section. */
6018 if (veneer_value < cmse_stub_sec_vma)
6019 {
6020 /* Avoid offset underflow. */
6021 if (stub_entry)
6022 stub_entry->stub_offset = 0;
6023 stub_offset = 0;
6024 ret = FALSE;
6025 }
6026
6027 /* Complain if stub offset not a multiple of stub size. */
6028 if (stub_offset % cmse_stub_size)
6029 {
6030 _bfd_error_handler
6031 (_("Offset of veneer for entry function `%s' not a multiple of "
6032 "its size."), sym_name);
6033 ret = FALSE;
6034 }
6035
6036 if (!ret)
6037 continue;
6038
6039 new_cmse_stubs_created--;
6040 if (veneer_value < cmse_stub_array_start)
6041 cmse_stub_array_start = veneer_value;
6042 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6043 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6044 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6045 }
6046
6047 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6048 {
6049 BFD_ASSERT (new_cmse_stubs_created > 0);
6050 _bfd_error_handler
6051 (_("new entry function(s) introduced but no output import library "
6052 "specified:"));
6053 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6054 }
6055
6056 if (cmse_stub_array_start != cmse_stub_sec_vma)
6057 {
6058 _bfd_error_handler
6059 (_("Start address of `%s' is different from previous link."),
6060 out_sec_name);
6061 ret = FALSE;
6062 }
6063
6064 free_sym_buf:
6065 free (sympp);
6066 return ret;
6067 }
6068
6069 /* Determine and set the size of the stub section for a final link.
6070
6071 The basic idea here is to examine all the relocations looking for
6072 PC-relative calls to a target that is unreachable with a "bl"
6073 instruction. */
6074
6075 bfd_boolean
6076 elf32_arm_size_stubs (bfd *output_bfd,
6077 bfd *stub_bfd,
6078 struct bfd_link_info *info,
6079 bfd_signed_vma group_size,
6080 asection * (*add_stub_section) (const char *, asection *,
6081 asection *,
6082 unsigned int),
6083 void (*layout_sections_again) (void))
6084 {
6085 bfd_boolean ret = TRUE;
6086 obj_attribute *out_attr;
6087 int cmse_stub_created = 0;
6088 bfd_size_type stub_group_size;
6089 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6090 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6091 struct a8_erratum_fix *a8_fixes = NULL;
6092 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6093 struct a8_erratum_reloc *a8_relocs = NULL;
6094 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6095
6096 if (htab == NULL)
6097 return FALSE;
6098
6099 if (htab->fix_cortex_a8)
6100 {
6101 a8_fixes = (struct a8_erratum_fix *)
6102 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6103 a8_relocs = (struct a8_erratum_reloc *)
6104 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6105 }
6106
6107 /* Propagate mach to stub bfd, because it may not have been
6108 finalized when we created stub_bfd. */
6109 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6110 bfd_get_mach (output_bfd));
6111
6112 /* Stash our params away. */
6113 htab->stub_bfd = stub_bfd;
6114 htab->add_stub_section = add_stub_section;
6115 htab->layout_sections_again = layout_sections_again;
6116 stubs_always_after_branch = group_size < 0;
6117
6118 out_attr = elf_known_obj_attributes_proc (output_bfd);
6119 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6120
6121 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6122 as the first half of a 32-bit branch straddling two 4K pages. This is a
6123 crude way of enforcing that. */
6124 if (htab->fix_cortex_a8)
6125 stubs_always_after_branch = 1;
6126
6127 if (group_size < 0)
6128 stub_group_size = -group_size;
6129 else
6130 stub_group_size = group_size;
6131
6132 if (stub_group_size == 1)
6133 {
6134 /* Default values. */
6135 /* Thumb branch range is +-4MB has to be used as the default
6136 maximum size (a given section can contain both ARM and Thumb
6137 code, so the worst case has to be taken into account).
6138
6139 This value is 24K less than that, which allows for 2025
6140 12-byte stubs. If we exceed that, then we will fail to link.
6141 The user will have to relink with an explicit group size
6142 option. */
6143 stub_group_size = 4170000;
6144 }
6145
6146 group_sections (htab, stub_group_size, stubs_always_after_branch);
6147
6148 /* If we're applying the cortex A8 fix, we need to determine the
6149 program header size now, because we cannot change it later --
6150 that could alter section placements. Notice the A8 erratum fix
6151 ends up requiring the section addresses to remain unchanged
6152 modulo the page size. That's something we cannot represent
6153 inside BFD, and we don't want to force the section alignment to
6154 be the page size. */
6155 if (htab->fix_cortex_a8)
6156 (*htab->layout_sections_again) ();
6157
6158 while (1)
6159 {
6160 bfd *input_bfd;
6161 unsigned int bfd_indx;
6162 asection *stub_sec;
6163 enum elf32_arm_stub_type stub_type;
6164 bfd_boolean stub_changed = FALSE;
6165 unsigned prev_num_a8_fixes = num_a8_fixes;
6166
6167 num_a8_fixes = 0;
6168 for (input_bfd = info->input_bfds, bfd_indx = 0;
6169 input_bfd != NULL;
6170 input_bfd = input_bfd->link.next, bfd_indx++)
6171 {
6172 Elf_Internal_Shdr *symtab_hdr;
6173 asection *section;
6174 Elf_Internal_Sym *local_syms = NULL;
6175
6176 if (!is_arm_elf (input_bfd))
6177 continue;
6178
6179 num_a8_relocs = 0;
6180
6181 /* We'll need the symbol table in a second. */
6182 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6183 if (symtab_hdr->sh_info == 0)
6184 continue;
6185
6186 /* Limit scan of symbols to object file whose profile is
6187 Microcontroller to not hinder performance in the general case. */
6188 if (m_profile && first_veneer_scan)
6189 {
6190 struct elf_link_hash_entry **sym_hashes;
6191
6192 sym_hashes = elf_sym_hashes (input_bfd);
6193 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6194 &cmse_stub_created))
6195 goto error_ret_free_local;
6196
6197 if (cmse_stub_created != 0)
6198 stub_changed = TRUE;
6199 }
6200
6201 /* Walk over each section attached to the input bfd. */
6202 for (section = input_bfd->sections;
6203 section != NULL;
6204 section = section->next)
6205 {
6206 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6207
6208 /* If there aren't any relocs, then there's nothing more
6209 to do. */
6210 if ((section->flags & SEC_RELOC) == 0
6211 || section->reloc_count == 0
6212 || (section->flags & SEC_CODE) == 0)
6213 continue;
6214
6215 /* If this section is a link-once section that will be
6216 discarded, then don't create any stubs. */
6217 if (section->output_section == NULL
6218 || section->output_section->owner != output_bfd)
6219 continue;
6220
6221 /* Get the relocs. */
6222 internal_relocs
6223 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6224 NULL, info->keep_memory);
6225 if (internal_relocs == NULL)
6226 goto error_ret_free_local;
6227
6228 /* Now examine each relocation. */
6229 irela = internal_relocs;
6230 irelaend = irela + section->reloc_count;
6231 for (; irela < irelaend; irela++)
6232 {
6233 unsigned int r_type, r_indx;
6234 asection *sym_sec;
6235 bfd_vma sym_value;
6236 bfd_vma destination;
6237 struct elf32_arm_link_hash_entry *hash;
6238 const char *sym_name;
6239 unsigned char st_type;
6240 enum arm_st_branch_type branch_type;
6241 bfd_boolean created_stub = FALSE;
6242
6243 r_type = ELF32_R_TYPE (irela->r_info);
6244 r_indx = ELF32_R_SYM (irela->r_info);
6245
6246 if (r_type >= (unsigned int) R_ARM_max)
6247 {
6248 bfd_set_error (bfd_error_bad_value);
6249 error_ret_free_internal:
6250 if (elf_section_data (section)->relocs == NULL)
6251 free (internal_relocs);
6252 /* Fall through. */
6253 error_ret_free_local:
6254 if (local_syms != NULL
6255 && (symtab_hdr->contents
6256 != (unsigned char *) local_syms))
6257 free (local_syms);
6258 return FALSE;
6259 }
6260
6261 hash = NULL;
6262 if (r_indx >= symtab_hdr->sh_info)
6263 hash = elf32_arm_hash_entry
6264 (elf_sym_hashes (input_bfd)
6265 [r_indx - symtab_hdr->sh_info]);
6266
6267 /* Only look for stubs on branch instructions, or
6268 non-relaxed TLSCALL */
6269 if ((r_type != (unsigned int) R_ARM_CALL)
6270 && (r_type != (unsigned int) R_ARM_THM_CALL)
6271 && (r_type != (unsigned int) R_ARM_JUMP24)
6272 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6273 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6274 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6275 && (r_type != (unsigned int) R_ARM_PLT32)
6276 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6277 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6278 && r_type == elf32_arm_tls_transition
6279 (info, r_type, &hash->root)
6280 && ((hash ? hash->tls_type
6281 : (elf32_arm_local_got_tls_type
6282 (input_bfd)[r_indx]))
6283 & GOT_TLS_GDESC) != 0))
6284 continue;
6285
6286 /* Now determine the call target, its name, value,
6287 section. */
6288 sym_sec = NULL;
6289 sym_value = 0;
6290 destination = 0;
6291 sym_name = NULL;
6292
6293 if (r_type == (unsigned int) R_ARM_TLS_CALL
6294 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6295 {
6296 /* A non-relaxed TLS call. The target is the
6297 plt-resident trampoline and nothing to do
6298 with the symbol. */
6299 BFD_ASSERT (htab->tls_trampoline > 0);
6300 sym_sec = htab->root.splt;
6301 sym_value = htab->tls_trampoline;
6302 hash = 0;
6303 st_type = STT_FUNC;
6304 branch_type = ST_BRANCH_TO_ARM;
6305 }
6306 else if (!hash)
6307 {
6308 /* It's a local symbol. */
6309 Elf_Internal_Sym *sym;
6310
6311 if (local_syms == NULL)
6312 {
6313 local_syms
6314 = (Elf_Internal_Sym *) symtab_hdr->contents;
6315 if (local_syms == NULL)
6316 local_syms
6317 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6318 symtab_hdr->sh_info, 0,
6319 NULL, NULL, NULL);
6320 if (local_syms == NULL)
6321 goto error_ret_free_internal;
6322 }
6323
6324 sym = local_syms + r_indx;
6325 if (sym->st_shndx == SHN_UNDEF)
6326 sym_sec = bfd_und_section_ptr;
6327 else if (sym->st_shndx == SHN_ABS)
6328 sym_sec = bfd_abs_section_ptr;
6329 else if (sym->st_shndx == SHN_COMMON)
6330 sym_sec = bfd_com_section_ptr;
6331 else
6332 sym_sec =
6333 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6334
6335 if (!sym_sec)
6336 /* This is an undefined symbol. It can never
6337 be resolved. */
6338 continue;
6339
6340 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6341 sym_value = sym->st_value;
6342 destination = (sym_value + irela->r_addend
6343 + sym_sec->output_offset
6344 + sym_sec->output_section->vma);
6345 st_type = ELF_ST_TYPE (sym->st_info);
6346 branch_type =
6347 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6348 sym_name
6349 = bfd_elf_string_from_elf_section (input_bfd,
6350 symtab_hdr->sh_link,
6351 sym->st_name);
6352 }
6353 else
6354 {
6355 /* It's an external symbol. */
6356 while (hash->root.root.type == bfd_link_hash_indirect
6357 || hash->root.root.type == bfd_link_hash_warning)
6358 hash = ((struct elf32_arm_link_hash_entry *)
6359 hash->root.root.u.i.link);
6360
6361 if (hash->root.root.type == bfd_link_hash_defined
6362 || hash->root.root.type == bfd_link_hash_defweak)
6363 {
6364 sym_sec = hash->root.root.u.def.section;
6365 sym_value = hash->root.root.u.def.value;
6366
6367 struct elf32_arm_link_hash_table *globals =
6368 elf32_arm_hash_table (info);
6369
6370 /* For a destination in a shared library,
6371 use the PLT stub as target address to
6372 decide whether a branch stub is
6373 needed. */
6374 if (globals != NULL
6375 && globals->root.splt != NULL
6376 && hash != NULL
6377 && hash->root.plt.offset != (bfd_vma) -1)
6378 {
6379 sym_sec = globals->root.splt;
6380 sym_value = hash->root.plt.offset;
6381 if (sym_sec->output_section != NULL)
6382 destination = (sym_value
6383 + sym_sec->output_offset
6384 + sym_sec->output_section->vma);
6385 }
6386 else if (sym_sec->output_section != NULL)
6387 destination = (sym_value + irela->r_addend
6388 + sym_sec->output_offset
6389 + sym_sec->output_section->vma);
6390 }
6391 else if ((hash->root.root.type == bfd_link_hash_undefined)
6392 || (hash->root.root.type == bfd_link_hash_undefweak))
6393 {
6394 /* For a shared library, use the PLT stub as
6395 target address to decide whether a long
6396 branch stub is needed.
6397 For absolute code, they cannot be handled. */
6398 struct elf32_arm_link_hash_table *globals =
6399 elf32_arm_hash_table (info);
6400
6401 if (globals != NULL
6402 && globals->root.splt != NULL
6403 && hash != NULL
6404 && hash->root.plt.offset != (bfd_vma) -1)
6405 {
6406 sym_sec = globals->root.splt;
6407 sym_value = hash->root.plt.offset;
6408 if (sym_sec->output_section != NULL)
6409 destination = (sym_value
6410 + sym_sec->output_offset
6411 + sym_sec->output_section->vma);
6412 }
6413 else
6414 continue;
6415 }
6416 else
6417 {
6418 bfd_set_error (bfd_error_bad_value);
6419 goto error_ret_free_internal;
6420 }
6421 st_type = hash->root.type;
6422 branch_type =
6423 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6424 sym_name = hash->root.root.root.string;
6425 }
6426
6427 do
6428 {
6429 bfd_boolean new_stub;
6430 struct elf32_arm_stub_hash_entry *stub_entry;
6431
6432 /* Determine what (if any) linker stub is needed. */
6433 stub_type = arm_type_of_stub (info, section, irela,
6434 st_type, &branch_type,
6435 hash, destination, sym_sec,
6436 input_bfd, sym_name);
6437 if (stub_type == arm_stub_none)
6438 break;
6439
6440 /* We've either created a stub for this reloc already,
6441 or we are about to. */
6442 stub_entry =
6443 elf32_arm_create_stub (htab, stub_type, section, irela,
6444 sym_sec, hash,
6445 (char *) sym_name, sym_value,
6446 branch_type, &new_stub);
6447
6448 created_stub = stub_entry != NULL;
6449 if (!created_stub)
6450 goto error_ret_free_internal;
6451 else if (!new_stub)
6452 break;
6453 else
6454 stub_changed = TRUE;
6455 }
6456 while (0);
6457
6458 /* Look for relocations which might trigger Cortex-A8
6459 erratum. */
6460 if (htab->fix_cortex_a8
6461 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6462 || r_type == (unsigned int) R_ARM_THM_JUMP19
6463 || r_type == (unsigned int) R_ARM_THM_CALL
6464 || r_type == (unsigned int) R_ARM_THM_XPC22))
6465 {
6466 bfd_vma from = section->output_section->vma
6467 + section->output_offset
6468 + irela->r_offset;
6469
6470 if ((from & 0xfff) == 0xffe)
6471 {
6472 /* Found a candidate. Note we haven't checked the
6473 destination is within 4K here: if we do so (and
6474 don't create an entry in a8_relocs) we can't tell
6475 that a branch should have been relocated when
6476 scanning later. */
6477 if (num_a8_relocs == a8_reloc_table_size)
6478 {
6479 a8_reloc_table_size *= 2;
6480 a8_relocs = (struct a8_erratum_reloc *)
6481 bfd_realloc (a8_relocs,
6482 sizeof (struct a8_erratum_reloc)
6483 * a8_reloc_table_size);
6484 }
6485
6486 a8_relocs[num_a8_relocs].from = from;
6487 a8_relocs[num_a8_relocs].destination = destination;
6488 a8_relocs[num_a8_relocs].r_type = r_type;
6489 a8_relocs[num_a8_relocs].branch_type = branch_type;
6490 a8_relocs[num_a8_relocs].sym_name = sym_name;
6491 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6492 a8_relocs[num_a8_relocs].hash = hash;
6493
6494 num_a8_relocs++;
6495 }
6496 }
6497 }
6498
6499 /* We're done with the internal relocs, free them. */
6500 if (elf_section_data (section)->relocs == NULL)
6501 free (internal_relocs);
6502 }
6503
6504 if (htab->fix_cortex_a8)
6505 {
6506 /* Sort relocs which might apply to Cortex-A8 erratum. */
6507 qsort (a8_relocs, num_a8_relocs,
6508 sizeof (struct a8_erratum_reloc),
6509 &a8_reloc_compare);
6510
6511 /* Scan for branches which might trigger Cortex-A8 erratum. */
6512 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6513 &num_a8_fixes, &a8_fix_table_size,
6514 a8_relocs, num_a8_relocs,
6515 prev_num_a8_fixes, &stub_changed)
6516 != 0)
6517 goto error_ret_free_local;
6518 }
6519
6520 if (local_syms != NULL
6521 && symtab_hdr->contents != (unsigned char *) local_syms)
6522 {
6523 if (!info->keep_memory)
6524 free (local_syms);
6525 else
6526 symtab_hdr->contents = (unsigned char *) local_syms;
6527 }
6528 }
6529
6530 if (first_veneer_scan
6531 && !set_cmse_veneer_addr_from_implib (info, htab,
6532 &cmse_stub_created))
6533 ret = FALSE;
6534
6535 if (prev_num_a8_fixes != num_a8_fixes)
6536 stub_changed = TRUE;
6537
6538 if (!stub_changed)
6539 break;
6540
6541 /* OK, we've added some stubs. Find out the new size of the
6542 stub sections. */
6543 for (stub_sec = htab->stub_bfd->sections;
6544 stub_sec != NULL;
6545 stub_sec = stub_sec->next)
6546 {
6547 /* Ignore non-stub sections. */
6548 if (!strstr (stub_sec->name, STUB_SUFFIX))
6549 continue;
6550
6551 stub_sec->size = 0;
6552 }
6553
6554 /* Add new SG veneers after those already in the input import
6555 library. */
6556 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6557 stub_type++)
6558 {
6559 bfd_vma *start_offset_p;
6560 asection **stub_sec_p;
6561
6562 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6563 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6564 if (start_offset_p == NULL)
6565 continue;
6566
6567 BFD_ASSERT (stub_sec_p != NULL);
6568 if (*stub_sec_p != NULL)
6569 (*stub_sec_p)->size = *start_offset_p;
6570 }
6571
6572 /* Compute stub section size, considering padding. */
6573 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6574 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6575 stub_type++)
6576 {
6577 int size, padding;
6578 asection **stub_sec_p;
6579
6580 padding = arm_dedicated_stub_section_padding (stub_type);
6581 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6582 /* Skip if no stub input section or no stub section padding
6583 required. */
6584 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6585 continue;
6586 /* Stub section padding required but no dedicated section. */
6587 BFD_ASSERT (stub_sec_p);
6588
6589 size = (*stub_sec_p)->size;
6590 size = (size + padding - 1) & ~(padding - 1);
6591 (*stub_sec_p)->size = size;
6592 }
6593
6594 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6595 if (htab->fix_cortex_a8)
6596 for (i = 0; i < num_a8_fixes; i++)
6597 {
6598 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6599 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6600
6601 if (stub_sec == NULL)
6602 return FALSE;
6603
6604 stub_sec->size
6605 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6606 NULL);
6607 }
6608
6609
6610 /* Ask the linker to do its stuff. */
6611 (*htab->layout_sections_again) ();
6612 first_veneer_scan = FALSE;
6613 }
6614
6615 /* Add stubs for Cortex-A8 erratum fixes now. */
6616 if (htab->fix_cortex_a8)
6617 {
6618 for (i = 0; i < num_a8_fixes; i++)
6619 {
6620 struct elf32_arm_stub_hash_entry *stub_entry;
6621 char *stub_name = a8_fixes[i].stub_name;
6622 asection *section = a8_fixes[i].section;
6623 unsigned int section_id = a8_fixes[i].section->id;
6624 asection *link_sec = htab->stub_group[section_id].link_sec;
6625 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6626 const insn_sequence *template_sequence;
6627 int template_size, size = 0;
6628
6629 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6630 TRUE, FALSE);
6631 if (stub_entry == NULL)
6632 {
6633 _bfd_error_handler (_("%B: cannot create stub entry %s"),
6634 section->owner, stub_name);
6635 return FALSE;
6636 }
6637
6638 stub_entry->stub_sec = stub_sec;
6639 stub_entry->stub_offset = (bfd_vma) -1;
6640 stub_entry->id_sec = link_sec;
6641 stub_entry->stub_type = a8_fixes[i].stub_type;
6642 stub_entry->source_value = a8_fixes[i].offset;
6643 stub_entry->target_section = a8_fixes[i].section;
6644 stub_entry->target_value = a8_fixes[i].target_offset;
6645 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6646 stub_entry->branch_type = a8_fixes[i].branch_type;
6647
6648 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6649 &template_sequence,
6650 &template_size);
6651
6652 stub_entry->stub_size = size;
6653 stub_entry->stub_template = template_sequence;
6654 stub_entry->stub_template_size = template_size;
6655 }
6656
6657 /* Stash the Cortex-A8 erratum fix array for use later in
6658 elf32_arm_write_section(). */
6659 htab->a8_erratum_fixes = a8_fixes;
6660 htab->num_a8_erratum_fixes = num_a8_fixes;
6661 }
6662 else
6663 {
6664 htab->a8_erratum_fixes = NULL;
6665 htab->num_a8_erratum_fixes = 0;
6666 }
6667 return ret;
6668 }
6669
6670 /* Build all the stubs associated with the current output file. The
6671 stubs are kept in a hash table attached to the main linker hash
6672 table. We also set up the .plt entries for statically linked PIC
6673 functions here. This function is called via arm_elf_finish in the
6674 linker. */
6675
6676 bfd_boolean
6677 elf32_arm_build_stubs (struct bfd_link_info *info)
6678 {
6679 asection *stub_sec;
6680 struct bfd_hash_table *table;
6681 enum elf32_arm_stub_type stub_type;
6682 struct elf32_arm_link_hash_table *htab;
6683
6684 htab = elf32_arm_hash_table (info);
6685 if (htab == NULL)
6686 return FALSE;
6687
6688 for (stub_sec = htab->stub_bfd->sections;
6689 stub_sec != NULL;
6690 stub_sec = stub_sec->next)
6691 {
6692 bfd_size_type size;
6693
6694 /* Ignore non-stub sections. */
6695 if (!strstr (stub_sec->name, STUB_SUFFIX))
6696 continue;
6697
6698 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6699 must at least be done for stub section requiring padding and for SG
6700 veneers to ensure that a non secure code branching to a removed SG
6701 veneer causes an error. */
6702 size = stub_sec->size;
6703 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6704 if (stub_sec->contents == NULL && size != 0)
6705 return FALSE;
6706
6707 stub_sec->size = 0;
6708 }
6709
6710 /* Add new SG veneers after those already in the input import library. */
6711 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6712 {
6713 bfd_vma *start_offset_p;
6714 asection **stub_sec_p;
6715
6716 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6717 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6718 if (start_offset_p == NULL)
6719 continue;
6720
6721 BFD_ASSERT (stub_sec_p != NULL);
6722 if (*stub_sec_p != NULL)
6723 (*stub_sec_p)->size = *start_offset_p;
6724 }
6725
6726 /* Build the stubs as directed by the stub hash table. */
6727 table = &htab->stub_hash_table;
6728 bfd_hash_traverse (table, arm_build_one_stub, info);
6729 if (htab->fix_cortex_a8)
6730 {
6731 /* Place the cortex a8 stubs last. */
6732 htab->fix_cortex_a8 = -1;
6733 bfd_hash_traverse (table, arm_build_one_stub, info);
6734 }
6735
6736 return TRUE;
6737 }
6738
6739 /* Locate the Thumb encoded calling stub for NAME. */
6740
6741 static struct elf_link_hash_entry *
6742 find_thumb_glue (struct bfd_link_info *link_info,
6743 const char *name,
6744 char **error_message)
6745 {
6746 char *tmp_name;
6747 struct elf_link_hash_entry *hash;
6748 struct elf32_arm_link_hash_table *hash_table;
6749
6750 /* We need a pointer to the armelf specific hash table. */
6751 hash_table = elf32_arm_hash_table (link_info);
6752 if (hash_table == NULL)
6753 return NULL;
6754
6755 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6756 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6757
6758 BFD_ASSERT (tmp_name);
6759
6760 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6761
6762 hash = elf_link_hash_lookup
6763 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6764
6765 if (hash == NULL
6766 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6767 tmp_name, name) == -1)
6768 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6769
6770 free (tmp_name);
6771
6772 return hash;
6773 }
6774
6775 /* Locate the ARM encoded calling stub for NAME. */
6776
6777 static struct elf_link_hash_entry *
6778 find_arm_glue (struct bfd_link_info *link_info,
6779 const char *name,
6780 char **error_message)
6781 {
6782 char *tmp_name;
6783 struct elf_link_hash_entry *myh;
6784 struct elf32_arm_link_hash_table *hash_table;
6785
6786 /* We need a pointer to the elfarm specific hash table. */
6787 hash_table = elf32_arm_hash_table (link_info);
6788 if (hash_table == NULL)
6789 return NULL;
6790
6791 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6792 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6793
6794 BFD_ASSERT (tmp_name);
6795
6796 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6797
6798 myh = elf_link_hash_lookup
6799 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6800
6801 if (myh == NULL
6802 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6803 tmp_name, name) == -1)
6804 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6805
6806 free (tmp_name);
6807
6808 return myh;
6809 }
6810
6811 /* ARM->Thumb glue (static images):
6812
6813 .arm
6814 __func_from_arm:
6815 ldr r12, __func_addr
6816 bx r12
6817 __func_addr:
6818 .word func @ behave as if you saw a ARM_32 reloc.
6819
6820 (v5t static images)
6821 .arm
6822 __func_from_arm:
6823 ldr pc, __func_addr
6824 __func_addr:
6825 .word func @ behave as if you saw a ARM_32 reloc.
6826
6827 (relocatable images)
6828 .arm
6829 __func_from_arm:
6830 ldr r12, __func_offset
6831 add r12, r12, pc
6832 bx r12
6833 __func_offset:
6834 .word func - . */
6835
6836 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6837 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6838 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6839 static const insn32 a2t3_func_addr_insn = 0x00000001;
6840
6841 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6842 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6843 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6844
6845 #define ARM2THUMB_PIC_GLUE_SIZE 16
6846 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6847 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6848 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6849
6850 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6851
6852 .thumb .thumb
6853 .align 2 .align 2
6854 __func_from_thumb: __func_from_thumb:
6855 bx pc push {r6, lr}
6856 nop ldr r6, __func_addr
6857 .arm mov lr, pc
6858 b func bx r6
6859 .arm
6860 ;; back_to_thumb
6861 ldmia r13! {r6, lr}
6862 bx lr
6863 __func_addr:
6864 .word func */
6865
6866 #define THUMB2ARM_GLUE_SIZE 8
6867 static const insn16 t2a1_bx_pc_insn = 0x4778;
6868 static const insn16 t2a2_noop_insn = 0x46c0;
6869 static const insn32 t2a3_b_insn = 0xea000000;
6870
6871 #define VFP11_ERRATUM_VENEER_SIZE 8
6872 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6873 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6874
6875 #define ARM_BX_VENEER_SIZE 12
6876 static const insn32 armbx1_tst_insn = 0xe3100001;
6877 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6878 static const insn32 armbx3_bx_insn = 0xe12fff10;
6879
6880 #ifndef ELFARM_NABI_C_INCLUDED
6881 static void
6882 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6883 {
6884 asection * s;
6885 bfd_byte * contents;
6886
6887 if (size == 0)
6888 {
6889 /* Do not include empty glue sections in the output. */
6890 if (abfd != NULL)
6891 {
6892 s = bfd_get_linker_section (abfd, name);
6893 if (s != NULL)
6894 s->flags |= SEC_EXCLUDE;
6895 }
6896 return;
6897 }
6898
6899 BFD_ASSERT (abfd != NULL);
6900
6901 s = bfd_get_linker_section (abfd, name);
6902 BFD_ASSERT (s != NULL);
6903
6904 contents = (bfd_byte *) bfd_alloc (abfd, size);
6905
6906 BFD_ASSERT (s->size == size);
6907 s->contents = contents;
6908 }
6909
6910 bfd_boolean
6911 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6912 {
6913 struct elf32_arm_link_hash_table * globals;
6914
6915 globals = elf32_arm_hash_table (info);
6916 BFD_ASSERT (globals != NULL);
6917
6918 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6919 globals->arm_glue_size,
6920 ARM2THUMB_GLUE_SECTION_NAME);
6921
6922 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6923 globals->thumb_glue_size,
6924 THUMB2ARM_GLUE_SECTION_NAME);
6925
6926 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6927 globals->vfp11_erratum_glue_size,
6928 VFP11_ERRATUM_VENEER_SECTION_NAME);
6929
6930 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6931 globals->stm32l4xx_erratum_glue_size,
6932 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6933
6934 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6935 globals->bx_glue_size,
6936 ARM_BX_GLUE_SECTION_NAME);
6937
6938 return TRUE;
6939 }
6940
6941 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6942 returns the symbol identifying the stub. */
6943
6944 static struct elf_link_hash_entry *
6945 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6946 struct elf_link_hash_entry * h)
6947 {
6948 const char * name = h->root.root.string;
6949 asection * s;
6950 char * tmp_name;
6951 struct elf_link_hash_entry * myh;
6952 struct bfd_link_hash_entry * bh;
6953 struct elf32_arm_link_hash_table * globals;
6954 bfd_vma val;
6955 bfd_size_type size;
6956
6957 globals = elf32_arm_hash_table (link_info);
6958 BFD_ASSERT (globals != NULL);
6959 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6960
6961 s = bfd_get_linker_section
6962 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6963
6964 BFD_ASSERT (s != NULL);
6965
6966 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6967 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6968
6969 BFD_ASSERT (tmp_name);
6970
6971 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6972
6973 myh = elf_link_hash_lookup
6974 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6975
6976 if (myh != NULL)
6977 {
6978 /* We've already seen this guy. */
6979 free (tmp_name);
6980 return myh;
6981 }
6982
6983 /* The only trick here is using hash_table->arm_glue_size as the value.
6984 Even though the section isn't allocated yet, this is where we will be
6985 putting it. The +1 on the value marks that the stub has not been
6986 output yet - not that it is a Thumb function. */
6987 bh = NULL;
6988 val = globals->arm_glue_size + 1;
6989 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6990 tmp_name, BSF_GLOBAL, s, val,
6991 NULL, TRUE, FALSE, &bh);
6992
6993 myh = (struct elf_link_hash_entry *) bh;
6994 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6995 myh->forced_local = 1;
6996
6997 free (tmp_name);
6998
6999 if (bfd_link_pic (link_info)
7000 || globals->root.is_relocatable_executable
7001 || globals->pic_veneer)
7002 size = ARM2THUMB_PIC_GLUE_SIZE;
7003 else if (globals->use_blx)
7004 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7005 else
7006 size = ARM2THUMB_STATIC_GLUE_SIZE;
7007
7008 s->size += size;
7009 globals->arm_glue_size += size;
7010
7011 return myh;
7012 }
7013
7014 /* Allocate space for ARMv4 BX veneers. */
7015
7016 static void
7017 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7018 {
7019 asection * s;
7020 struct elf32_arm_link_hash_table *globals;
7021 char *tmp_name;
7022 struct elf_link_hash_entry *myh;
7023 struct bfd_link_hash_entry *bh;
7024 bfd_vma val;
7025
7026 /* BX PC does not need a veneer. */
7027 if (reg == 15)
7028 return;
7029
7030 globals = elf32_arm_hash_table (link_info);
7031 BFD_ASSERT (globals != NULL);
7032 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7033
7034 /* Check if this veneer has already been allocated. */
7035 if (globals->bx_glue_offset[reg])
7036 return;
7037
7038 s = bfd_get_linker_section
7039 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7040
7041 BFD_ASSERT (s != NULL);
7042
7043 /* Add symbol for veneer. */
7044 tmp_name = (char *)
7045 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7046
7047 BFD_ASSERT (tmp_name);
7048
7049 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7050
7051 myh = elf_link_hash_lookup
7052 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7053
7054 BFD_ASSERT (myh == NULL);
7055
7056 bh = NULL;
7057 val = globals->bx_glue_size;
7058 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7059 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7060 NULL, TRUE, FALSE, &bh);
7061
7062 myh = (struct elf_link_hash_entry *) bh;
7063 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7064 myh->forced_local = 1;
7065
7066 s->size += ARM_BX_VENEER_SIZE;
7067 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7068 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7069 }
7070
7071
7072 /* Add an entry to the code/data map for section SEC. */
7073
7074 static void
7075 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7076 {
7077 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7078 unsigned int newidx;
7079
7080 if (sec_data->map == NULL)
7081 {
7082 sec_data->map = (elf32_arm_section_map *)
7083 bfd_malloc (sizeof (elf32_arm_section_map));
7084 sec_data->mapcount = 0;
7085 sec_data->mapsize = 1;
7086 }
7087
7088 newidx = sec_data->mapcount++;
7089
7090 if (sec_data->mapcount > sec_data->mapsize)
7091 {
7092 sec_data->mapsize *= 2;
7093 sec_data->map = (elf32_arm_section_map *)
7094 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7095 * sizeof (elf32_arm_section_map));
7096 }
7097
7098 if (sec_data->map)
7099 {
7100 sec_data->map[newidx].vma = vma;
7101 sec_data->map[newidx].type = type;
7102 }
7103 }
7104
7105
7106 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7107 veneers are handled for now. */
7108
7109 static bfd_vma
7110 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7111 elf32_vfp11_erratum_list *branch,
7112 bfd *branch_bfd,
7113 asection *branch_sec,
7114 unsigned int offset)
7115 {
7116 asection *s;
7117 struct elf32_arm_link_hash_table *hash_table;
7118 char *tmp_name;
7119 struct elf_link_hash_entry *myh;
7120 struct bfd_link_hash_entry *bh;
7121 bfd_vma val;
7122 struct _arm_elf_section_data *sec_data;
7123 elf32_vfp11_erratum_list *newerr;
7124
7125 hash_table = elf32_arm_hash_table (link_info);
7126 BFD_ASSERT (hash_table != NULL);
7127 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7128
7129 s = bfd_get_linker_section
7130 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7131
7132 sec_data = elf32_arm_section_data (s);
7133
7134 BFD_ASSERT (s != NULL);
7135
7136 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7137 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7138
7139 BFD_ASSERT (tmp_name);
7140
7141 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7142 hash_table->num_vfp11_fixes);
7143
7144 myh = elf_link_hash_lookup
7145 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7146
7147 BFD_ASSERT (myh == NULL);
7148
7149 bh = NULL;
7150 val = hash_table->vfp11_erratum_glue_size;
7151 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7152 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7153 NULL, TRUE, FALSE, &bh);
7154
7155 myh = (struct elf_link_hash_entry *) bh;
7156 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7157 myh->forced_local = 1;
7158
7159 /* Link veneer back to calling location. */
7160 sec_data->erratumcount += 1;
7161 newerr = (elf32_vfp11_erratum_list *)
7162 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7163
7164 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7165 newerr->vma = -1;
7166 newerr->u.v.branch = branch;
7167 newerr->u.v.id = hash_table->num_vfp11_fixes;
7168 branch->u.b.veneer = newerr;
7169
7170 newerr->next = sec_data->erratumlist;
7171 sec_data->erratumlist = newerr;
7172
7173 /* A symbol for the return from the veneer. */
7174 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7175 hash_table->num_vfp11_fixes);
7176
7177 myh = elf_link_hash_lookup
7178 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7179
7180 if (myh != NULL)
7181 abort ();
7182
7183 bh = NULL;
7184 val = offset + 4;
7185 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7186 branch_sec, val, NULL, TRUE, FALSE, &bh);
7187
7188 myh = (struct elf_link_hash_entry *) bh;
7189 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7190 myh->forced_local = 1;
7191
7192 free (tmp_name);
7193
7194 /* Generate a mapping symbol for the veneer section, and explicitly add an
7195 entry for that symbol to the code/data map for the section. */
7196 if (hash_table->vfp11_erratum_glue_size == 0)
7197 {
7198 bh = NULL;
7199 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7200 ever requires this erratum fix. */
7201 _bfd_generic_link_add_one_symbol (link_info,
7202 hash_table->bfd_of_glue_owner, "$a",
7203 BSF_LOCAL, s, 0, NULL,
7204 TRUE, FALSE, &bh);
7205
7206 myh = (struct elf_link_hash_entry *) bh;
7207 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7208 myh->forced_local = 1;
7209
7210 /* The elf32_arm_init_maps function only cares about symbols from input
7211 BFDs. We must make a note of this generated mapping symbol
7212 ourselves so that code byteswapping works properly in
7213 elf32_arm_write_section. */
7214 elf32_arm_section_map_add (s, 'a', 0);
7215 }
7216
7217 s->size += VFP11_ERRATUM_VENEER_SIZE;
7218 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7219 hash_table->num_vfp11_fixes++;
7220
7221 /* The offset of the veneer. */
7222 return val;
7223 }
7224
7225 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7226 veneers need to be handled because used only in Cortex-M. */
7227
7228 static bfd_vma
7229 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7230 elf32_stm32l4xx_erratum_list *branch,
7231 bfd *branch_bfd,
7232 asection *branch_sec,
7233 unsigned int offset,
7234 bfd_size_type veneer_size)
7235 {
7236 asection *s;
7237 struct elf32_arm_link_hash_table *hash_table;
7238 char *tmp_name;
7239 struct elf_link_hash_entry *myh;
7240 struct bfd_link_hash_entry *bh;
7241 bfd_vma val;
7242 struct _arm_elf_section_data *sec_data;
7243 elf32_stm32l4xx_erratum_list *newerr;
7244
7245 hash_table = elf32_arm_hash_table (link_info);
7246 BFD_ASSERT (hash_table != NULL);
7247 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7248
7249 s = bfd_get_linker_section
7250 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7251
7252 BFD_ASSERT (s != NULL);
7253
7254 sec_data = elf32_arm_section_data (s);
7255
7256 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7257 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7258
7259 BFD_ASSERT (tmp_name);
7260
7261 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7262 hash_table->num_stm32l4xx_fixes);
7263
7264 myh = elf_link_hash_lookup
7265 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7266
7267 BFD_ASSERT (myh == NULL);
7268
7269 bh = NULL;
7270 val = hash_table->stm32l4xx_erratum_glue_size;
7271 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7272 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7273 NULL, TRUE, FALSE, &bh);
7274
7275 myh = (struct elf_link_hash_entry *) bh;
7276 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7277 myh->forced_local = 1;
7278
7279 /* Link veneer back to calling location. */
7280 sec_data->stm32l4xx_erratumcount += 1;
7281 newerr = (elf32_stm32l4xx_erratum_list *)
7282 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7283
7284 newerr->type = STM32L4XX_ERRATUM_VENEER;
7285 newerr->vma = -1;
7286 newerr->u.v.branch = branch;
7287 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7288 branch->u.b.veneer = newerr;
7289
7290 newerr->next = sec_data->stm32l4xx_erratumlist;
7291 sec_data->stm32l4xx_erratumlist = newerr;
7292
7293 /* A symbol for the return from the veneer. */
7294 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7295 hash_table->num_stm32l4xx_fixes);
7296
7297 myh = elf_link_hash_lookup
7298 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7299
7300 if (myh != NULL)
7301 abort ();
7302
7303 bh = NULL;
7304 val = offset + 4;
7305 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7306 branch_sec, val, NULL, TRUE, FALSE, &bh);
7307
7308 myh = (struct elf_link_hash_entry *) bh;
7309 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7310 myh->forced_local = 1;
7311
7312 free (tmp_name);
7313
7314 /* Generate a mapping symbol for the veneer section, and explicitly add an
7315 entry for that symbol to the code/data map for the section. */
7316 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7317 {
7318 bh = NULL;
7319 /* Creates a THUMB symbol since there is no other choice. */
7320 _bfd_generic_link_add_one_symbol (link_info,
7321 hash_table->bfd_of_glue_owner, "$t",
7322 BSF_LOCAL, s, 0, NULL,
7323 TRUE, FALSE, &bh);
7324
7325 myh = (struct elf_link_hash_entry *) bh;
7326 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7327 myh->forced_local = 1;
7328
7329 /* The elf32_arm_init_maps function only cares about symbols from input
7330 BFDs. We must make a note of this generated mapping symbol
7331 ourselves so that code byteswapping works properly in
7332 elf32_arm_write_section. */
7333 elf32_arm_section_map_add (s, 't', 0);
7334 }
7335
7336 s->size += veneer_size;
7337 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7338 hash_table->num_stm32l4xx_fixes++;
7339
7340 /* The offset of the veneer. */
7341 return val;
7342 }
7343
7344 #define ARM_GLUE_SECTION_FLAGS \
7345 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7346 | SEC_READONLY | SEC_LINKER_CREATED)
7347
7348 /* Create a fake section for use by the ARM backend of the linker. */
7349
7350 static bfd_boolean
7351 arm_make_glue_section (bfd * abfd, const char * name)
7352 {
7353 asection * sec;
7354
7355 sec = bfd_get_linker_section (abfd, name);
7356 if (sec != NULL)
7357 /* Already made. */
7358 return TRUE;
7359
7360 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7361
7362 if (sec == NULL
7363 || !bfd_set_section_alignment (abfd, sec, 2))
7364 return FALSE;
7365
7366 /* Set the gc mark to prevent the section from being removed by garbage
7367 collection, despite the fact that no relocs refer to this section. */
7368 sec->gc_mark = 1;
7369
7370 return TRUE;
7371 }
7372
7373 /* Set size of .plt entries. This function is called from the
7374 linker scripts in ld/emultempl/{armelf}.em. */
7375
7376 void
7377 bfd_elf32_arm_use_long_plt (void)
7378 {
7379 elf32_arm_use_long_plt_entry = TRUE;
7380 }
7381
7382 /* Add the glue sections to ABFD. This function is called from the
7383 linker scripts in ld/emultempl/{armelf}.em. */
7384
7385 bfd_boolean
7386 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7387 struct bfd_link_info *info)
7388 {
7389 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7390 bfd_boolean dostm32l4xx = globals
7391 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7392 bfd_boolean addglue;
7393
7394 /* If we are only performing a partial
7395 link do not bother adding the glue. */
7396 if (bfd_link_relocatable (info))
7397 return TRUE;
7398
7399 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7400 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7401 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7402 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7403
7404 if (!dostm32l4xx)
7405 return addglue;
7406
7407 return addglue
7408 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7409 }
7410
7411 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7412 ensures they are not marked for deletion by
7413 strip_excluded_output_sections () when veneers are going to be created
7414 later. Not doing so would trigger assert on empty section size in
7415 lang_size_sections_1 (). */
7416
7417 void
7418 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7419 {
7420 enum elf32_arm_stub_type stub_type;
7421
7422 /* If we are only performing a partial
7423 link do not bother adding the glue. */
7424 if (bfd_link_relocatable (info))
7425 return;
7426
7427 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7428 {
7429 asection *out_sec;
7430 const char *out_sec_name;
7431
7432 if (!arm_dedicated_stub_output_section_required (stub_type))
7433 continue;
7434
7435 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7436 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7437 if (out_sec != NULL)
7438 out_sec->flags |= SEC_KEEP;
7439 }
7440 }
7441
7442 /* Select a BFD to be used to hold the sections used by the glue code.
7443 This function is called from the linker scripts in ld/emultempl/
7444 {armelf/pe}.em. */
7445
7446 bfd_boolean
7447 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7448 {
7449 struct elf32_arm_link_hash_table *globals;
7450
7451 /* If we are only performing a partial link
7452 do not bother getting a bfd to hold the glue. */
7453 if (bfd_link_relocatable (info))
7454 return TRUE;
7455
7456 /* Make sure we don't attach the glue sections to a dynamic object. */
7457 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7458
7459 globals = elf32_arm_hash_table (info);
7460 BFD_ASSERT (globals != NULL);
7461
7462 if (globals->bfd_of_glue_owner != NULL)
7463 return TRUE;
7464
7465 /* Save the bfd for later use. */
7466 globals->bfd_of_glue_owner = abfd;
7467
7468 return TRUE;
7469 }
7470
7471 static void
7472 check_use_blx (struct elf32_arm_link_hash_table *globals)
7473 {
7474 int cpu_arch;
7475
7476 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7477 Tag_CPU_arch);
7478
7479 if (globals->fix_arm1176)
7480 {
7481 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7482 globals->use_blx = 1;
7483 }
7484 else
7485 {
7486 if (cpu_arch > TAG_CPU_ARCH_V4T)
7487 globals->use_blx = 1;
7488 }
7489 }
7490
7491 bfd_boolean
7492 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7493 struct bfd_link_info *link_info)
7494 {
7495 Elf_Internal_Shdr *symtab_hdr;
7496 Elf_Internal_Rela *internal_relocs = NULL;
7497 Elf_Internal_Rela *irel, *irelend;
7498 bfd_byte *contents = NULL;
7499
7500 asection *sec;
7501 struct elf32_arm_link_hash_table *globals;
7502
7503 /* If we are only performing a partial link do not bother
7504 to construct any glue. */
7505 if (bfd_link_relocatable (link_info))
7506 return TRUE;
7507
7508 /* Here we have a bfd that is to be included on the link. We have a
7509 hook to do reloc rummaging, before section sizes are nailed down. */
7510 globals = elf32_arm_hash_table (link_info);
7511 BFD_ASSERT (globals != NULL);
7512
7513 check_use_blx (globals);
7514
7515 if (globals->byteswap_code && !bfd_big_endian (abfd))
7516 {
7517 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7518 abfd);
7519 return FALSE;
7520 }
7521
7522 /* PR 5398: If we have not decided to include any loadable sections in
7523 the output then we will not have a glue owner bfd. This is OK, it
7524 just means that there is nothing else for us to do here. */
7525 if (globals->bfd_of_glue_owner == NULL)
7526 return TRUE;
7527
7528 /* Rummage around all the relocs and map the glue vectors. */
7529 sec = abfd->sections;
7530
7531 if (sec == NULL)
7532 return TRUE;
7533
7534 for (; sec != NULL; sec = sec->next)
7535 {
7536 if (sec->reloc_count == 0)
7537 continue;
7538
7539 if ((sec->flags & SEC_EXCLUDE) != 0)
7540 continue;
7541
7542 symtab_hdr = & elf_symtab_hdr (abfd);
7543
7544 /* Load the relocs. */
7545 internal_relocs
7546 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7547
7548 if (internal_relocs == NULL)
7549 goto error_return;
7550
7551 irelend = internal_relocs + sec->reloc_count;
7552 for (irel = internal_relocs; irel < irelend; irel++)
7553 {
7554 long r_type;
7555 unsigned long r_index;
7556
7557 struct elf_link_hash_entry *h;
7558
7559 r_type = ELF32_R_TYPE (irel->r_info);
7560 r_index = ELF32_R_SYM (irel->r_info);
7561
7562 /* These are the only relocation types we care about. */
7563 if ( r_type != R_ARM_PC24
7564 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7565 continue;
7566
7567 /* Get the section contents if we haven't done so already. */
7568 if (contents == NULL)
7569 {
7570 /* Get cached copy if it exists. */
7571 if (elf_section_data (sec)->this_hdr.contents != NULL)
7572 contents = elf_section_data (sec)->this_hdr.contents;
7573 else
7574 {
7575 /* Go get them off disk. */
7576 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7577 goto error_return;
7578 }
7579 }
7580
7581 if (r_type == R_ARM_V4BX)
7582 {
7583 int reg;
7584
7585 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7586 record_arm_bx_glue (link_info, reg);
7587 continue;
7588 }
7589
7590 /* If the relocation is not against a symbol it cannot concern us. */
7591 h = NULL;
7592
7593 /* We don't care about local symbols. */
7594 if (r_index < symtab_hdr->sh_info)
7595 continue;
7596
7597 /* This is an external symbol. */
7598 r_index -= symtab_hdr->sh_info;
7599 h = (struct elf_link_hash_entry *)
7600 elf_sym_hashes (abfd)[r_index];
7601
7602 /* If the relocation is against a static symbol it must be within
7603 the current section and so cannot be a cross ARM/Thumb relocation. */
7604 if (h == NULL)
7605 continue;
7606
7607 /* If the call will go through a PLT entry then we do not need
7608 glue. */
7609 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7610 continue;
7611
7612 switch (r_type)
7613 {
7614 case R_ARM_PC24:
7615 /* This one is a call from arm code. We need to look up
7616 the target of the call. If it is a thumb target, we
7617 insert glue. */
7618 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7619 == ST_BRANCH_TO_THUMB)
7620 record_arm_to_thumb_glue (link_info, h);
7621 break;
7622
7623 default:
7624 abort ();
7625 }
7626 }
7627
7628 if (contents != NULL
7629 && elf_section_data (sec)->this_hdr.contents != contents)
7630 free (contents);
7631 contents = NULL;
7632
7633 if (internal_relocs != NULL
7634 && elf_section_data (sec)->relocs != internal_relocs)
7635 free (internal_relocs);
7636 internal_relocs = NULL;
7637 }
7638
7639 return TRUE;
7640
7641 error_return:
7642 if (contents != NULL
7643 && elf_section_data (sec)->this_hdr.contents != contents)
7644 free (contents);
7645 if (internal_relocs != NULL
7646 && elf_section_data (sec)->relocs != internal_relocs)
7647 free (internal_relocs);
7648
7649 return FALSE;
7650 }
7651 #endif
7652
7653
7654 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7655
7656 void
7657 bfd_elf32_arm_init_maps (bfd *abfd)
7658 {
7659 Elf_Internal_Sym *isymbuf;
7660 Elf_Internal_Shdr *hdr;
7661 unsigned int i, localsyms;
7662
7663 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7664 if (! is_arm_elf (abfd))
7665 return;
7666
7667 if ((abfd->flags & DYNAMIC) != 0)
7668 return;
7669
7670 hdr = & elf_symtab_hdr (abfd);
7671 localsyms = hdr->sh_info;
7672
7673 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7674 should contain the number of local symbols, which should come before any
7675 global symbols. Mapping symbols are always local. */
7676 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7677 NULL);
7678
7679 /* No internal symbols read? Skip this BFD. */
7680 if (isymbuf == NULL)
7681 return;
7682
7683 for (i = 0; i < localsyms; i++)
7684 {
7685 Elf_Internal_Sym *isym = &isymbuf[i];
7686 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7687 const char *name;
7688
7689 if (sec != NULL
7690 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7691 {
7692 name = bfd_elf_string_from_elf_section (abfd,
7693 hdr->sh_link, isym->st_name);
7694
7695 if (bfd_is_arm_special_symbol_name (name,
7696 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7697 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7698 }
7699 }
7700 }
7701
7702
7703 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7704 say what they wanted. */
7705
7706 void
7707 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7708 {
7709 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7710 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7711
7712 if (globals == NULL)
7713 return;
7714
7715 if (globals->fix_cortex_a8 == -1)
7716 {
7717 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7718 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7719 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7720 || out_attr[Tag_CPU_arch_profile].i == 0))
7721 globals->fix_cortex_a8 = 1;
7722 else
7723 globals->fix_cortex_a8 = 0;
7724 }
7725 }
7726
7727
7728 void
7729 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7730 {
7731 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7732 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7733
7734 if (globals == NULL)
7735 return;
7736 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7737 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7738 {
7739 switch (globals->vfp11_fix)
7740 {
7741 case BFD_ARM_VFP11_FIX_DEFAULT:
7742 case BFD_ARM_VFP11_FIX_NONE:
7743 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7744 break;
7745
7746 default:
7747 /* Give a warning, but do as the user requests anyway. */
7748 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7749 "workaround is not necessary for target architecture"), obfd);
7750 }
7751 }
7752 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7753 /* For earlier architectures, we might need the workaround, but do not
7754 enable it by default. If users is running with broken hardware, they
7755 must enable the erratum fix explicitly. */
7756 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7757 }
7758
7759 void
7760 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7761 {
7762 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7763 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7764
7765 if (globals == NULL)
7766 return;
7767
7768 /* We assume only Cortex-M4 may require the fix. */
7769 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7770 || out_attr[Tag_CPU_arch_profile].i != 'M')
7771 {
7772 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7773 /* Give a warning, but do as the user requests anyway. */
7774 _bfd_error_handler
7775 (_("%B: warning: selected STM32L4XX erratum "
7776 "workaround is not necessary for target architecture"), obfd);
7777 }
7778 }
7779
7780 enum bfd_arm_vfp11_pipe
7781 {
7782 VFP11_FMAC,
7783 VFP11_LS,
7784 VFP11_DS,
7785 VFP11_BAD
7786 };
7787
7788 /* Return a VFP register number. This is encoded as RX:X for single-precision
7789 registers, or X:RX for double-precision registers, where RX is the group of
7790 four bits in the instruction encoding and X is the single extension bit.
7791 RX and X fields are specified using their lowest (starting) bit. The return
7792 value is:
7793
7794 0...31: single-precision registers s0...s31
7795 32...63: double-precision registers d0...d31.
7796
7797 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7798 encounter VFP3 instructions, so we allow the full range for DP registers. */
7799
7800 static unsigned int
7801 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7802 unsigned int x)
7803 {
7804 if (is_double)
7805 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7806 else
7807 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7808 }
7809
7810 /* Set bits in *WMASK according to a register number REG as encoded by
7811 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7812
7813 static void
7814 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7815 {
7816 if (reg < 32)
7817 *wmask |= 1 << reg;
7818 else if (reg < 48)
7819 *wmask |= 3 << ((reg - 32) * 2);
7820 }
7821
7822 /* Return TRUE if WMASK overwrites anything in REGS. */
7823
7824 static bfd_boolean
7825 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7826 {
7827 int i;
7828
7829 for (i = 0; i < numregs; i++)
7830 {
7831 unsigned int reg = regs[i];
7832
7833 if (reg < 32 && (wmask & (1 << reg)) != 0)
7834 return TRUE;
7835
7836 reg -= 32;
7837
7838 if (reg >= 16)
7839 continue;
7840
7841 if ((wmask & (3 << (reg * 2))) != 0)
7842 return TRUE;
7843 }
7844
7845 return FALSE;
7846 }
7847
7848 /* In this function, we're interested in two things: finding input registers
7849 for VFP data-processing instructions, and finding the set of registers which
7850 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7851 hold the written set, so FLDM etc. are easy to deal with (we're only
7852 interested in 32 SP registers or 16 dp registers, due to the VFP version
7853 implemented by the chip in question). DP registers are marked by setting
7854 both SP registers in the write mask). */
7855
7856 static enum bfd_arm_vfp11_pipe
7857 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7858 int *numregs)
7859 {
7860 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7861 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7862
7863 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7864 {
7865 unsigned int pqrs;
7866 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7867 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7868
7869 pqrs = ((insn & 0x00800000) >> 20)
7870 | ((insn & 0x00300000) >> 19)
7871 | ((insn & 0x00000040) >> 6);
7872
7873 switch (pqrs)
7874 {
7875 case 0: /* fmac[sd]. */
7876 case 1: /* fnmac[sd]. */
7877 case 2: /* fmsc[sd]. */
7878 case 3: /* fnmsc[sd]. */
7879 vpipe = VFP11_FMAC;
7880 bfd_arm_vfp11_write_mask (destmask, fd);
7881 regs[0] = fd;
7882 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7883 regs[2] = fm;
7884 *numregs = 3;
7885 break;
7886
7887 case 4: /* fmul[sd]. */
7888 case 5: /* fnmul[sd]. */
7889 case 6: /* fadd[sd]. */
7890 case 7: /* fsub[sd]. */
7891 vpipe = VFP11_FMAC;
7892 goto vfp_binop;
7893
7894 case 8: /* fdiv[sd]. */
7895 vpipe = VFP11_DS;
7896 vfp_binop:
7897 bfd_arm_vfp11_write_mask (destmask, fd);
7898 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7899 regs[1] = fm;
7900 *numregs = 2;
7901 break;
7902
7903 case 15: /* extended opcode. */
7904 {
7905 unsigned int extn = ((insn >> 15) & 0x1e)
7906 | ((insn >> 7) & 1);
7907
7908 switch (extn)
7909 {
7910 case 0: /* fcpy[sd]. */
7911 case 1: /* fabs[sd]. */
7912 case 2: /* fneg[sd]. */
7913 case 8: /* fcmp[sd]. */
7914 case 9: /* fcmpe[sd]. */
7915 case 10: /* fcmpz[sd]. */
7916 case 11: /* fcmpez[sd]. */
7917 case 16: /* fuito[sd]. */
7918 case 17: /* fsito[sd]. */
7919 case 24: /* ftoui[sd]. */
7920 case 25: /* ftouiz[sd]. */
7921 case 26: /* ftosi[sd]. */
7922 case 27: /* ftosiz[sd]. */
7923 /* These instructions will not bounce due to underflow. */
7924 *numregs = 0;
7925 vpipe = VFP11_FMAC;
7926 break;
7927
7928 case 3: /* fsqrt[sd]. */
7929 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7930 registers to cause the erratum in previous instructions. */
7931 bfd_arm_vfp11_write_mask (destmask, fd);
7932 vpipe = VFP11_DS;
7933 break;
7934
7935 case 15: /* fcvt{ds,sd}. */
7936 {
7937 int rnum = 0;
7938
7939 bfd_arm_vfp11_write_mask (destmask, fd);
7940
7941 /* Only FCVTSD can underflow. */
7942 if ((insn & 0x100) != 0)
7943 regs[rnum++] = fm;
7944
7945 *numregs = rnum;
7946
7947 vpipe = VFP11_FMAC;
7948 }
7949 break;
7950
7951 default:
7952 return VFP11_BAD;
7953 }
7954 }
7955 break;
7956
7957 default:
7958 return VFP11_BAD;
7959 }
7960 }
7961 /* Two-register transfer. */
7962 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7963 {
7964 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7965
7966 if ((insn & 0x100000) == 0)
7967 {
7968 if (is_double)
7969 bfd_arm_vfp11_write_mask (destmask, fm);
7970 else
7971 {
7972 bfd_arm_vfp11_write_mask (destmask, fm);
7973 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7974 }
7975 }
7976
7977 vpipe = VFP11_LS;
7978 }
7979 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7980 {
7981 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7982 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7983
7984 switch (puw)
7985 {
7986 case 0: /* Two-reg transfer. We should catch these above. */
7987 abort ();
7988
7989 case 2: /* fldm[sdx]. */
7990 case 3:
7991 case 5:
7992 {
7993 unsigned int i, offset = insn & 0xff;
7994
7995 if (is_double)
7996 offset >>= 1;
7997
7998 for (i = fd; i < fd + offset; i++)
7999 bfd_arm_vfp11_write_mask (destmask, i);
8000 }
8001 break;
8002
8003 case 4: /* fld[sd]. */
8004 case 6:
8005 bfd_arm_vfp11_write_mask (destmask, fd);
8006 break;
8007
8008 default:
8009 return VFP11_BAD;
8010 }
8011
8012 vpipe = VFP11_LS;
8013 }
8014 /* Single-register transfer. Note L==0. */
8015 else if ((insn & 0x0f100e10) == 0x0e000a10)
8016 {
8017 unsigned int opcode = (insn >> 21) & 7;
8018 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8019
8020 switch (opcode)
8021 {
8022 case 0: /* fmsr/fmdlr. */
8023 case 1: /* fmdhr. */
8024 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8025 destination register. I don't know if this is exactly right,
8026 but it is the conservative choice. */
8027 bfd_arm_vfp11_write_mask (destmask, fn);
8028 break;
8029
8030 case 7: /* fmxr. */
8031 break;
8032 }
8033
8034 vpipe = VFP11_LS;
8035 }
8036
8037 return vpipe;
8038 }
8039
8040
8041 static int elf32_arm_compare_mapping (const void * a, const void * b);
8042
8043
8044 /* Look for potentially-troublesome code sequences which might trigger the
8045 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8046 (available from ARM) for details of the erratum. A short version is
8047 described in ld.texinfo. */
8048
8049 bfd_boolean
8050 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8051 {
8052 asection *sec;
8053 bfd_byte *contents = NULL;
8054 int state = 0;
8055 int regs[3], numregs = 0;
8056 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8057 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8058
8059 if (globals == NULL)
8060 return FALSE;
8061
8062 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8063 The states transition as follows:
8064
8065 0 -> 1 (vector) or 0 -> 2 (scalar)
8066 A VFP FMAC-pipeline instruction has been seen. Fill
8067 regs[0]..regs[numregs-1] with its input operands. Remember this
8068 instruction in 'first_fmac'.
8069
8070 1 -> 2
8071 Any instruction, except for a VFP instruction which overwrites
8072 regs[*].
8073
8074 1 -> 3 [ -> 0 ] or
8075 2 -> 3 [ -> 0 ]
8076 A VFP instruction has been seen which overwrites any of regs[*].
8077 We must make a veneer! Reset state to 0 before examining next
8078 instruction.
8079
8080 2 -> 0
8081 If we fail to match anything in state 2, reset to state 0 and reset
8082 the instruction pointer to the instruction after 'first_fmac'.
8083
8084 If the VFP11 vector mode is in use, there must be at least two unrelated
8085 instructions between anti-dependent VFP11 instructions to properly avoid
8086 triggering the erratum, hence the use of the extra state 1. */
8087
8088 /* If we are only performing a partial link do not bother
8089 to construct any glue. */
8090 if (bfd_link_relocatable (link_info))
8091 return TRUE;
8092
8093 /* Skip if this bfd does not correspond to an ELF image. */
8094 if (! is_arm_elf (abfd))
8095 return TRUE;
8096
8097 /* We should have chosen a fix type by the time we get here. */
8098 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8099
8100 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8101 return TRUE;
8102
8103 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8104 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8105 return TRUE;
8106
8107 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8108 {
8109 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8110 struct _arm_elf_section_data *sec_data;
8111
8112 /* If we don't have executable progbits, we're not interested in this
8113 section. Also skip if section is to be excluded. */
8114 if (elf_section_type (sec) != SHT_PROGBITS
8115 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8116 || (sec->flags & SEC_EXCLUDE) != 0
8117 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8118 || sec->output_section == bfd_abs_section_ptr
8119 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8120 continue;
8121
8122 sec_data = elf32_arm_section_data (sec);
8123
8124 if (sec_data->mapcount == 0)
8125 continue;
8126
8127 if (elf_section_data (sec)->this_hdr.contents != NULL)
8128 contents = elf_section_data (sec)->this_hdr.contents;
8129 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8130 goto error_return;
8131
8132 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8133 elf32_arm_compare_mapping);
8134
8135 for (span = 0; span < sec_data->mapcount; span++)
8136 {
8137 unsigned int span_start = sec_data->map[span].vma;
8138 unsigned int span_end = (span == sec_data->mapcount - 1)
8139 ? sec->size : sec_data->map[span + 1].vma;
8140 char span_type = sec_data->map[span].type;
8141
8142 /* FIXME: Only ARM mode is supported at present. We may need to
8143 support Thumb-2 mode also at some point. */
8144 if (span_type != 'a')
8145 continue;
8146
8147 for (i = span_start; i < span_end;)
8148 {
8149 unsigned int next_i = i + 4;
8150 unsigned int insn = bfd_big_endian (abfd)
8151 ? (contents[i] << 24)
8152 | (contents[i + 1] << 16)
8153 | (contents[i + 2] << 8)
8154 | contents[i + 3]
8155 : (contents[i + 3] << 24)
8156 | (contents[i + 2] << 16)
8157 | (contents[i + 1] << 8)
8158 | contents[i];
8159 unsigned int writemask = 0;
8160 enum bfd_arm_vfp11_pipe vpipe;
8161
8162 switch (state)
8163 {
8164 case 0:
8165 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8166 &numregs);
8167 /* I'm assuming the VFP11 erratum can trigger with denorm
8168 operands on either the FMAC or the DS pipeline. This might
8169 lead to slightly overenthusiastic veneer insertion. */
8170 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8171 {
8172 state = use_vector ? 1 : 2;
8173 first_fmac = i;
8174 veneer_of_insn = insn;
8175 }
8176 break;
8177
8178 case 1:
8179 {
8180 int other_regs[3], other_numregs;
8181 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8182 other_regs,
8183 &other_numregs);
8184 if (vpipe != VFP11_BAD
8185 && bfd_arm_vfp11_antidependency (writemask, regs,
8186 numregs))
8187 state = 3;
8188 else
8189 state = 2;
8190 }
8191 break;
8192
8193 case 2:
8194 {
8195 int other_regs[3], other_numregs;
8196 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8197 other_regs,
8198 &other_numregs);
8199 if (vpipe != VFP11_BAD
8200 && bfd_arm_vfp11_antidependency (writemask, regs,
8201 numregs))
8202 state = 3;
8203 else
8204 {
8205 state = 0;
8206 next_i = first_fmac + 4;
8207 }
8208 }
8209 break;
8210
8211 case 3:
8212 abort (); /* Should be unreachable. */
8213 }
8214
8215 if (state == 3)
8216 {
8217 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8218 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8219
8220 elf32_arm_section_data (sec)->erratumcount += 1;
8221
8222 newerr->u.b.vfp_insn = veneer_of_insn;
8223
8224 switch (span_type)
8225 {
8226 case 'a':
8227 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8228 break;
8229
8230 default:
8231 abort ();
8232 }
8233
8234 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8235 first_fmac);
8236
8237 newerr->vma = -1;
8238
8239 newerr->next = sec_data->erratumlist;
8240 sec_data->erratumlist = newerr;
8241
8242 state = 0;
8243 }
8244
8245 i = next_i;
8246 }
8247 }
8248
8249 if (contents != NULL
8250 && elf_section_data (sec)->this_hdr.contents != contents)
8251 free (contents);
8252 contents = NULL;
8253 }
8254
8255 return TRUE;
8256
8257 error_return:
8258 if (contents != NULL
8259 && elf_section_data (sec)->this_hdr.contents != contents)
8260 free (contents);
8261
8262 return FALSE;
8263 }
8264
8265 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8266 after sections have been laid out, using specially-named symbols. */
8267
8268 void
8269 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8270 struct bfd_link_info *link_info)
8271 {
8272 asection *sec;
8273 struct elf32_arm_link_hash_table *globals;
8274 char *tmp_name;
8275
8276 if (bfd_link_relocatable (link_info))
8277 return;
8278
8279 /* Skip if this bfd does not correspond to an ELF image. */
8280 if (! is_arm_elf (abfd))
8281 return;
8282
8283 globals = elf32_arm_hash_table (link_info);
8284 if (globals == NULL)
8285 return;
8286
8287 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8288 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8289
8290 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8291 {
8292 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8293 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8294
8295 for (; errnode != NULL; errnode = errnode->next)
8296 {
8297 struct elf_link_hash_entry *myh;
8298 bfd_vma vma;
8299
8300 switch (errnode->type)
8301 {
8302 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8303 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8304 /* Find veneer symbol. */
8305 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8306 errnode->u.b.veneer->u.v.id);
8307
8308 myh = elf_link_hash_lookup
8309 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8310
8311 if (myh == NULL)
8312 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8313 "`%s'"), abfd, tmp_name);
8314
8315 vma = myh->root.u.def.section->output_section->vma
8316 + myh->root.u.def.section->output_offset
8317 + myh->root.u.def.value;
8318
8319 errnode->u.b.veneer->vma = vma;
8320 break;
8321
8322 case VFP11_ERRATUM_ARM_VENEER:
8323 case VFP11_ERRATUM_THUMB_VENEER:
8324 /* Find return location. */
8325 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8326 errnode->u.v.id);
8327
8328 myh = elf_link_hash_lookup
8329 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8330
8331 if (myh == NULL)
8332 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8333 "`%s'"), abfd, tmp_name);
8334
8335 vma = myh->root.u.def.section->output_section->vma
8336 + myh->root.u.def.section->output_offset
8337 + myh->root.u.def.value;
8338
8339 errnode->u.v.branch->vma = vma;
8340 break;
8341
8342 default:
8343 abort ();
8344 }
8345 }
8346 }
8347
8348 free (tmp_name);
8349 }
8350
8351 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8352 return locations after sections have been laid out, using
8353 specially-named symbols. */
8354
8355 void
8356 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8357 struct bfd_link_info *link_info)
8358 {
8359 asection *sec;
8360 struct elf32_arm_link_hash_table *globals;
8361 char *tmp_name;
8362
8363 if (bfd_link_relocatable (link_info))
8364 return;
8365
8366 /* Skip if this bfd does not correspond to an ELF image. */
8367 if (! is_arm_elf (abfd))
8368 return;
8369
8370 globals = elf32_arm_hash_table (link_info);
8371 if (globals == NULL)
8372 return;
8373
8374 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8375 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8376
8377 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8378 {
8379 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8380 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8381
8382 for (; errnode != NULL; errnode = errnode->next)
8383 {
8384 struct elf_link_hash_entry *myh;
8385 bfd_vma vma;
8386
8387 switch (errnode->type)
8388 {
8389 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8390 /* Find veneer symbol. */
8391 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8392 errnode->u.b.veneer->u.v.id);
8393
8394 myh = elf_link_hash_lookup
8395 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8396
8397 if (myh == NULL)
8398 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8399 "`%s'"), abfd, tmp_name);
8400
8401 vma = myh->root.u.def.section->output_section->vma
8402 + myh->root.u.def.section->output_offset
8403 + myh->root.u.def.value;
8404
8405 errnode->u.b.veneer->vma = vma;
8406 break;
8407
8408 case STM32L4XX_ERRATUM_VENEER:
8409 /* Find return location. */
8410 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8411 errnode->u.v.id);
8412
8413 myh = elf_link_hash_lookup
8414 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8415
8416 if (myh == NULL)
8417 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8418 "`%s'"), abfd, tmp_name);
8419
8420 vma = myh->root.u.def.section->output_section->vma
8421 + myh->root.u.def.section->output_offset
8422 + myh->root.u.def.value;
8423
8424 errnode->u.v.branch->vma = vma;
8425 break;
8426
8427 default:
8428 abort ();
8429 }
8430 }
8431 }
8432
8433 free (tmp_name);
8434 }
8435
8436 static inline bfd_boolean
8437 is_thumb2_ldmia (const insn32 insn)
8438 {
8439 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8440 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8441 return (insn & 0xffd02000) == 0xe8900000;
8442 }
8443
8444 static inline bfd_boolean
8445 is_thumb2_ldmdb (const insn32 insn)
8446 {
8447 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8448 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8449 return (insn & 0xffd02000) == 0xe9100000;
8450 }
8451
8452 static inline bfd_boolean
8453 is_thumb2_vldm (const insn32 insn)
8454 {
8455 /* A6.5 Extension register load or store instruction
8456 A7.7.229
8457 We look for SP 32-bit and DP 64-bit registers.
8458 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8459 <list> is consecutive 64-bit registers
8460 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8461 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8462 <list> is consecutive 32-bit registers
8463 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8464 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8465 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8466 return
8467 (((insn & 0xfe100f00) == 0xec100b00) ||
8468 ((insn & 0xfe100f00) == 0xec100a00))
8469 && /* (IA without !). */
8470 (((((insn << 7) >> 28) & 0xd) == 0x4)
8471 /* (IA with !), includes VPOP (when reg number is SP). */
8472 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8473 /* (DB with !). */
8474 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8475 }
8476
8477 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8478 VLDM opcode and:
8479 - computes the number and the mode of memory accesses
8480 - decides if the replacement should be done:
8481 . replaces only if > 8-word accesses
8482 . or (testing purposes only) replaces all accesses. */
8483
8484 static bfd_boolean
8485 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8486 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8487 {
8488 int nb_words = 0;
8489
8490 /* The field encoding the register list is the same for both LDMIA
8491 and LDMDB encodings. */
8492 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8493 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8494 else if (is_thumb2_vldm (insn))
8495 nb_words = (insn & 0xff);
8496
8497 /* DEFAULT mode accounts for the real bug condition situation,
8498 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8499 return
8500 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8501 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8502 }
8503
8504 /* Look for potentially-troublesome code sequences which might trigger
8505 the STM STM32L4XX erratum. */
8506
8507 bfd_boolean
8508 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8509 struct bfd_link_info *link_info)
8510 {
8511 asection *sec;
8512 bfd_byte *contents = NULL;
8513 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8514
8515 if (globals == NULL)
8516 return FALSE;
8517
8518 /* If we are only performing a partial link do not bother
8519 to construct any glue. */
8520 if (bfd_link_relocatable (link_info))
8521 return TRUE;
8522
8523 /* Skip if this bfd does not correspond to an ELF image. */
8524 if (! is_arm_elf (abfd))
8525 return TRUE;
8526
8527 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8528 return TRUE;
8529
8530 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8531 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8532 return TRUE;
8533
8534 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8535 {
8536 unsigned int i, span;
8537 struct _arm_elf_section_data *sec_data;
8538
8539 /* If we don't have executable progbits, we're not interested in this
8540 section. Also skip if section is to be excluded. */
8541 if (elf_section_type (sec) != SHT_PROGBITS
8542 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8543 || (sec->flags & SEC_EXCLUDE) != 0
8544 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8545 || sec->output_section == bfd_abs_section_ptr
8546 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8547 continue;
8548
8549 sec_data = elf32_arm_section_data (sec);
8550
8551 if (sec_data->mapcount == 0)
8552 continue;
8553
8554 if (elf_section_data (sec)->this_hdr.contents != NULL)
8555 contents = elf_section_data (sec)->this_hdr.contents;
8556 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8557 goto error_return;
8558
8559 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8560 elf32_arm_compare_mapping);
8561
8562 for (span = 0; span < sec_data->mapcount; span++)
8563 {
8564 unsigned int span_start = sec_data->map[span].vma;
8565 unsigned int span_end = (span == sec_data->mapcount - 1)
8566 ? sec->size : sec_data->map[span + 1].vma;
8567 char span_type = sec_data->map[span].type;
8568 int itblock_current_pos = 0;
8569
8570 /* Only Thumb2 mode need be supported with this CM4 specific
8571 code, we should not encounter any arm mode eg span_type
8572 != 'a'. */
8573 if (span_type != 't')
8574 continue;
8575
8576 for (i = span_start; i < span_end;)
8577 {
8578 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8579 bfd_boolean insn_32bit = FALSE;
8580 bfd_boolean is_ldm = FALSE;
8581 bfd_boolean is_vldm = FALSE;
8582 bfd_boolean is_not_last_in_it_block = FALSE;
8583
8584 /* The first 16-bits of all 32-bit thumb2 instructions start
8585 with opcode[15..13]=0b111 and the encoded op1 can be anything
8586 except opcode[12..11]!=0b00.
8587 See 32-bit Thumb instruction encoding. */
8588 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8589 insn_32bit = TRUE;
8590
8591 /* Compute the predicate that tells if the instruction
8592 is concerned by the IT block
8593 - Creates an error if there is a ldm that is not
8594 last in the IT block thus cannot be replaced
8595 - Otherwise we can create a branch at the end of the
8596 IT block, it will be controlled naturally by IT
8597 with the proper pseudo-predicate
8598 - So the only interesting predicate is the one that
8599 tells that we are not on the last item of an IT
8600 block. */
8601 if (itblock_current_pos != 0)
8602 is_not_last_in_it_block = !!--itblock_current_pos;
8603
8604 if (insn_32bit)
8605 {
8606 /* Load the rest of the insn (in manual-friendly order). */
8607 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8608 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8609 is_vldm = is_thumb2_vldm (insn);
8610
8611 /* Veneers are created for (v)ldm depending on
8612 option flags and memory accesses conditions; but
8613 if the instruction is not the last instruction of
8614 an IT block, we cannot create a jump there, so we
8615 bail out. */
8616 if ((is_ldm || is_vldm)
8617 && stm32l4xx_need_create_replacing_stub
8618 (insn, globals->stm32l4xx_fix))
8619 {
8620 if (is_not_last_in_it_block)
8621 {
8622 _bfd_error_handler
8623 /* xgettext:c-format */
8624 (_("%B(%A+0x%lx): error: multiple load detected"
8625 " in non-last IT block instruction :"
8626 " STM32L4XX veneer cannot be generated.\n"
8627 "Use gcc option -mrestrict-it to generate"
8628 " only one instruction per IT block.\n"),
8629 abfd, sec, (long) i);
8630 }
8631 else
8632 {
8633 elf32_stm32l4xx_erratum_list *newerr =
8634 (elf32_stm32l4xx_erratum_list *)
8635 bfd_zmalloc
8636 (sizeof (elf32_stm32l4xx_erratum_list));
8637
8638 elf32_arm_section_data (sec)
8639 ->stm32l4xx_erratumcount += 1;
8640 newerr->u.b.insn = insn;
8641 /* We create only thumb branches. */
8642 newerr->type =
8643 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8644 record_stm32l4xx_erratum_veneer
8645 (link_info, newerr, abfd, sec,
8646 i,
8647 is_ldm ?
8648 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8649 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8650 newerr->vma = -1;
8651 newerr->next = sec_data->stm32l4xx_erratumlist;
8652 sec_data->stm32l4xx_erratumlist = newerr;
8653 }
8654 }
8655 }
8656 else
8657 {
8658 /* A7.7.37 IT p208
8659 IT blocks are only encoded in T1
8660 Encoding T1: IT{x{y{z}}} <firstcond>
8661 1 0 1 1 - 1 1 1 1 - firstcond - mask
8662 if mask = '0000' then see 'related encodings'
8663 We don't deal with UNPREDICTABLE, just ignore these.
8664 There can be no nested IT blocks so an IT block
8665 is naturally a new one for which it is worth
8666 computing its size. */
8667 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8668 && ((insn & 0x000f) != 0x0000);
8669 /* If we have a new IT block we compute its size. */
8670 if (is_newitblock)
8671 {
8672 /* Compute the number of instructions controlled
8673 by the IT block, it will be used to decide
8674 whether we are inside an IT block or not. */
8675 unsigned int mask = insn & 0x000f;
8676 itblock_current_pos = 4 - ctz (mask);
8677 }
8678 }
8679
8680 i += insn_32bit ? 4 : 2;
8681 }
8682 }
8683
8684 if (contents != NULL
8685 && elf_section_data (sec)->this_hdr.contents != contents)
8686 free (contents);
8687 contents = NULL;
8688 }
8689
8690 return TRUE;
8691
8692 error_return:
8693 if (contents != NULL
8694 && elf_section_data (sec)->this_hdr.contents != contents)
8695 free (contents);
8696
8697 return FALSE;
8698 }
8699
8700 /* Set target relocation values needed during linking. */
8701
8702 void
8703 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8704 struct bfd_link_info *link_info,
8705 struct elf32_arm_params *params)
8706 {
8707 struct elf32_arm_link_hash_table *globals;
8708
8709 globals = elf32_arm_hash_table (link_info);
8710 if (globals == NULL)
8711 return;
8712
8713 globals->target1_is_rel = params->target1_is_rel;
8714 if (strcmp (params->target2_type, "rel") == 0)
8715 globals->target2_reloc = R_ARM_REL32;
8716 else if (strcmp (params->target2_type, "abs") == 0)
8717 globals->target2_reloc = R_ARM_ABS32;
8718 else if (strcmp (params->target2_type, "got-rel") == 0)
8719 globals->target2_reloc = R_ARM_GOT_PREL;
8720 else
8721 {
8722 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8723 params->target2_type);
8724 }
8725 globals->fix_v4bx = params->fix_v4bx;
8726 globals->use_blx |= params->use_blx;
8727 globals->vfp11_fix = params->vfp11_denorm_fix;
8728 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8729 globals->pic_veneer = params->pic_veneer;
8730 globals->fix_cortex_a8 = params->fix_cortex_a8;
8731 globals->fix_arm1176 = params->fix_arm1176;
8732 globals->cmse_implib = params->cmse_implib;
8733 globals->in_implib_bfd = params->in_implib_bfd;
8734
8735 BFD_ASSERT (is_arm_elf (output_bfd));
8736 elf_arm_tdata (output_bfd)->no_enum_size_warning
8737 = params->no_enum_size_warning;
8738 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8739 = params->no_wchar_size_warning;
8740 }
8741
8742 /* Replace the target offset of a Thumb bl or b.w instruction. */
8743
8744 static void
8745 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8746 {
8747 bfd_vma upper;
8748 bfd_vma lower;
8749 int reloc_sign;
8750
8751 BFD_ASSERT ((offset & 1) == 0);
8752
8753 upper = bfd_get_16 (abfd, insn);
8754 lower = bfd_get_16 (abfd, insn + 2);
8755 reloc_sign = (offset < 0) ? 1 : 0;
8756 upper = (upper & ~(bfd_vma) 0x7ff)
8757 | ((offset >> 12) & 0x3ff)
8758 | (reloc_sign << 10);
8759 lower = (lower & ~(bfd_vma) 0x2fff)
8760 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8761 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8762 | ((offset >> 1) & 0x7ff);
8763 bfd_put_16 (abfd, upper, insn);
8764 bfd_put_16 (abfd, lower, insn + 2);
8765 }
8766
8767 /* Thumb code calling an ARM function. */
8768
8769 static int
8770 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8771 const char * name,
8772 bfd * input_bfd,
8773 bfd * output_bfd,
8774 asection * input_section,
8775 bfd_byte * hit_data,
8776 asection * sym_sec,
8777 bfd_vma offset,
8778 bfd_signed_vma addend,
8779 bfd_vma val,
8780 char **error_message)
8781 {
8782 asection * s = 0;
8783 bfd_vma my_offset;
8784 long int ret_offset;
8785 struct elf_link_hash_entry * myh;
8786 struct elf32_arm_link_hash_table * globals;
8787
8788 myh = find_thumb_glue (info, name, error_message);
8789 if (myh == NULL)
8790 return FALSE;
8791
8792 globals = elf32_arm_hash_table (info);
8793 BFD_ASSERT (globals != NULL);
8794 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8795
8796 my_offset = myh->root.u.def.value;
8797
8798 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8799 THUMB2ARM_GLUE_SECTION_NAME);
8800
8801 BFD_ASSERT (s != NULL);
8802 BFD_ASSERT (s->contents != NULL);
8803 BFD_ASSERT (s->output_section != NULL);
8804
8805 if ((my_offset & 0x01) == 0x01)
8806 {
8807 if (sym_sec != NULL
8808 && sym_sec->owner != NULL
8809 && !INTERWORK_FLAG (sym_sec->owner))
8810 {
8811 _bfd_error_handler
8812 (_("%B(%s): warning: interworking not enabled.\n"
8813 " first occurrence: %B: Thumb call to ARM"),
8814 sym_sec->owner, name, input_bfd);
8815
8816 return FALSE;
8817 }
8818
8819 --my_offset;
8820 myh->root.u.def.value = my_offset;
8821
8822 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8823 s->contents + my_offset);
8824
8825 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8826 s->contents + my_offset + 2);
8827
8828 ret_offset =
8829 /* Address of destination of the stub. */
8830 ((bfd_signed_vma) val)
8831 - ((bfd_signed_vma)
8832 /* Offset from the start of the current section
8833 to the start of the stubs. */
8834 (s->output_offset
8835 /* Offset of the start of this stub from the start of the stubs. */
8836 + my_offset
8837 /* Address of the start of the current section. */
8838 + s->output_section->vma)
8839 /* The branch instruction is 4 bytes into the stub. */
8840 + 4
8841 /* ARM branches work from the pc of the instruction + 8. */
8842 + 8);
8843
8844 put_arm_insn (globals, output_bfd,
8845 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8846 s->contents + my_offset + 4);
8847 }
8848
8849 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8850
8851 /* Now go back and fix up the original BL insn to point to here. */
8852 ret_offset =
8853 /* Address of where the stub is located. */
8854 (s->output_section->vma + s->output_offset + my_offset)
8855 /* Address of where the BL is located. */
8856 - (input_section->output_section->vma + input_section->output_offset
8857 + offset)
8858 /* Addend in the relocation. */
8859 - addend
8860 /* Biassing for PC-relative addressing. */
8861 - 8;
8862
8863 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8864
8865 return TRUE;
8866 }
8867
8868 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8869
8870 static struct elf_link_hash_entry *
8871 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8872 const char * name,
8873 bfd * input_bfd,
8874 bfd * output_bfd,
8875 asection * sym_sec,
8876 bfd_vma val,
8877 asection * s,
8878 char ** error_message)
8879 {
8880 bfd_vma my_offset;
8881 long int ret_offset;
8882 struct elf_link_hash_entry * myh;
8883 struct elf32_arm_link_hash_table * globals;
8884
8885 myh = find_arm_glue (info, name, error_message);
8886 if (myh == NULL)
8887 return NULL;
8888
8889 globals = elf32_arm_hash_table (info);
8890 BFD_ASSERT (globals != NULL);
8891 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8892
8893 my_offset = myh->root.u.def.value;
8894
8895 if ((my_offset & 0x01) == 0x01)
8896 {
8897 if (sym_sec != NULL
8898 && sym_sec->owner != NULL
8899 && !INTERWORK_FLAG (sym_sec->owner))
8900 {
8901 _bfd_error_handler
8902 (_("%B(%s): warning: interworking not enabled.\n"
8903 " first occurrence: %B: arm call to thumb"),
8904 sym_sec->owner, name, input_bfd);
8905 }
8906
8907 --my_offset;
8908 myh->root.u.def.value = my_offset;
8909
8910 if (bfd_link_pic (info)
8911 || globals->root.is_relocatable_executable
8912 || globals->pic_veneer)
8913 {
8914 /* For relocatable objects we can't use absolute addresses,
8915 so construct the address from a relative offset. */
8916 /* TODO: If the offset is small it's probably worth
8917 constructing the address with adds. */
8918 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8919 s->contents + my_offset);
8920 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8921 s->contents + my_offset + 4);
8922 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8923 s->contents + my_offset + 8);
8924 /* Adjust the offset by 4 for the position of the add,
8925 and 8 for the pipeline offset. */
8926 ret_offset = (val - (s->output_offset
8927 + s->output_section->vma
8928 + my_offset + 12))
8929 | 1;
8930 bfd_put_32 (output_bfd, ret_offset,
8931 s->contents + my_offset + 12);
8932 }
8933 else if (globals->use_blx)
8934 {
8935 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8936 s->contents + my_offset);
8937
8938 /* It's a thumb address. Add the low order bit. */
8939 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8940 s->contents + my_offset + 4);
8941 }
8942 else
8943 {
8944 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8945 s->contents + my_offset);
8946
8947 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8948 s->contents + my_offset + 4);
8949
8950 /* It's a thumb address. Add the low order bit. */
8951 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8952 s->contents + my_offset + 8);
8953
8954 my_offset += 12;
8955 }
8956 }
8957
8958 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8959
8960 return myh;
8961 }
8962
8963 /* Arm code calling a Thumb function. */
8964
8965 static int
8966 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8967 const char * name,
8968 bfd * input_bfd,
8969 bfd * output_bfd,
8970 asection * input_section,
8971 bfd_byte * hit_data,
8972 asection * sym_sec,
8973 bfd_vma offset,
8974 bfd_signed_vma addend,
8975 bfd_vma val,
8976 char **error_message)
8977 {
8978 unsigned long int tmp;
8979 bfd_vma my_offset;
8980 asection * s;
8981 long int ret_offset;
8982 struct elf_link_hash_entry * myh;
8983 struct elf32_arm_link_hash_table * globals;
8984
8985 globals = elf32_arm_hash_table (info);
8986 BFD_ASSERT (globals != NULL);
8987 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8988
8989 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8990 ARM2THUMB_GLUE_SECTION_NAME);
8991 BFD_ASSERT (s != NULL);
8992 BFD_ASSERT (s->contents != NULL);
8993 BFD_ASSERT (s->output_section != NULL);
8994
8995 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8996 sym_sec, val, s, error_message);
8997 if (!myh)
8998 return FALSE;
8999
9000 my_offset = myh->root.u.def.value;
9001 tmp = bfd_get_32 (input_bfd, hit_data);
9002 tmp = tmp & 0xFF000000;
9003
9004 /* Somehow these are both 4 too far, so subtract 8. */
9005 ret_offset = (s->output_offset
9006 + my_offset
9007 + s->output_section->vma
9008 - (input_section->output_offset
9009 + input_section->output_section->vma
9010 + offset + addend)
9011 - 8);
9012
9013 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9014
9015 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9016
9017 return TRUE;
9018 }
9019
9020 /* Populate Arm stub for an exported Thumb function. */
9021
9022 static bfd_boolean
9023 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9024 {
9025 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9026 asection * s;
9027 struct elf_link_hash_entry * myh;
9028 struct elf32_arm_link_hash_entry *eh;
9029 struct elf32_arm_link_hash_table * globals;
9030 asection *sec;
9031 bfd_vma val;
9032 char *error_message;
9033
9034 eh = elf32_arm_hash_entry (h);
9035 /* Allocate stubs for exported Thumb functions on v4t. */
9036 if (eh->export_glue == NULL)
9037 return TRUE;
9038
9039 globals = elf32_arm_hash_table (info);
9040 BFD_ASSERT (globals != NULL);
9041 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9042
9043 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9044 ARM2THUMB_GLUE_SECTION_NAME);
9045 BFD_ASSERT (s != NULL);
9046 BFD_ASSERT (s->contents != NULL);
9047 BFD_ASSERT (s->output_section != NULL);
9048
9049 sec = eh->export_glue->root.u.def.section;
9050
9051 BFD_ASSERT (sec->output_section != NULL);
9052
9053 val = eh->export_glue->root.u.def.value + sec->output_offset
9054 + sec->output_section->vma;
9055
9056 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9057 h->root.u.def.section->owner,
9058 globals->obfd, sec, val, s,
9059 &error_message);
9060 BFD_ASSERT (myh);
9061 return TRUE;
9062 }
9063
9064 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9065
9066 static bfd_vma
9067 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9068 {
9069 bfd_byte *p;
9070 bfd_vma glue_addr;
9071 asection *s;
9072 struct elf32_arm_link_hash_table *globals;
9073
9074 globals = elf32_arm_hash_table (info);
9075 BFD_ASSERT (globals != NULL);
9076 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9077
9078 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9079 ARM_BX_GLUE_SECTION_NAME);
9080 BFD_ASSERT (s != NULL);
9081 BFD_ASSERT (s->contents != NULL);
9082 BFD_ASSERT (s->output_section != NULL);
9083
9084 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9085
9086 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9087
9088 if ((globals->bx_glue_offset[reg] & 1) == 0)
9089 {
9090 p = s->contents + glue_addr;
9091 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9092 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9093 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9094 globals->bx_glue_offset[reg] |= 1;
9095 }
9096
9097 return glue_addr + s->output_section->vma + s->output_offset;
9098 }
9099
9100 /* Generate Arm stubs for exported Thumb symbols. */
9101 static void
9102 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9103 struct bfd_link_info *link_info)
9104 {
9105 struct elf32_arm_link_hash_table * globals;
9106
9107 if (link_info == NULL)
9108 /* Ignore this if we are not called by the ELF backend linker. */
9109 return;
9110
9111 globals = elf32_arm_hash_table (link_info);
9112 if (globals == NULL)
9113 return;
9114
9115 /* If blx is available then exported Thumb symbols are OK and there is
9116 nothing to do. */
9117 if (globals->use_blx)
9118 return;
9119
9120 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9121 link_info);
9122 }
9123
9124 /* Reserve space for COUNT dynamic relocations in relocation selection
9125 SRELOC. */
9126
9127 static void
9128 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9129 bfd_size_type count)
9130 {
9131 struct elf32_arm_link_hash_table *htab;
9132
9133 htab = elf32_arm_hash_table (info);
9134 BFD_ASSERT (htab->root.dynamic_sections_created);
9135 if (sreloc == NULL)
9136 abort ();
9137 sreloc->size += RELOC_SIZE (htab) * count;
9138 }
9139
9140 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9141 dynamic, the relocations should go in SRELOC, otherwise they should
9142 go in the special .rel.iplt section. */
9143
9144 static void
9145 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9146 bfd_size_type count)
9147 {
9148 struct elf32_arm_link_hash_table *htab;
9149
9150 htab = elf32_arm_hash_table (info);
9151 if (!htab->root.dynamic_sections_created)
9152 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9153 else
9154 {
9155 BFD_ASSERT (sreloc != NULL);
9156 sreloc->size += RELOC_SIZE (htab) * count;
9157 }
9158 }
9159
9160 /* Add relocation REL to the end of relocation section SRELOC. */
9161
9162 static void
9163 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9164 asection *sreloc, Elf_Internal_Rela *rel)
9165 {
9166 bfd_byte *loc;
9167 struct elf32_arm_link_hash_table *htab;
9168
9169 htab = elf32_arm_hash_table (info);
9170 if (!htab->root.dynamic_sections_created
9171 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9172 sreloc = htab->root.irelplt;
9173 if (sreloc == NULL)
9174 abort ();
9175 loc = sreloc->contents;
9176 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9177 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9178 abort ();
9179 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9180 }
9181
9182 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9183 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9184 to .plt. */
9185
9186 static void
9187 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9188 bfd_boolean is_iplt_entry,
9189 union gotplt_union *root_plt,
9190 struct arm_plt_info *arm_plt)
9191 {
9192 struct elf32_arm_link_hash_table *htab;
9193 asection *splt;
9194 asection *sgotplt;
9195
9196 htab = elf32_arm_hash_table (info);
9197
9198 if (is_iplt_entry)
9199 {
9200 splt = htab->root.iplt;
9201 sgotplt = htab->root.igotplt;
9202
9203 /* NaCl uses a special first entry in .iplt too. */
9204 if (htab->nacl_p && splt->size == 0)
9205 splt->size += htab->plt_header_size;
9206
9207 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9208 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9209 }
9210 else
9211 {
9212 splt = htab->root.splt;
9213 sgotplt = htab->root.sgotplt;
9214
9215 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9216 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9217
9218 /* If this is the first .plt entry, make room for the special
9219 first entry. */
9220 if (splt->size == 0)
9221 splt->size += htab->plt_header_size;
9222
9223 htab->next_tls_desc_index++;
9224 }
9225
9226 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9227 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9228 splt->size += PLT_THUMB_STUB_SIZE;
9229 root_plt->offset = splt->size;
9230 splt->size += htab->plt_entry_size;
9231
9232 if (!htab->symbian_p)
9233 {
9234 /* We also need to make an entry in the .got.plt section, which
9235 will be placed in the .got section by the linker script. */
9236 if (is_iplt_entry)
9237 arm_plt->got_offset = sgotplt->size;
9238 else
9239 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9240 sgotplt->size += 4;
9241 }
9242 }
9243
9244 static bfd_vma
9245 arm_movw_immediate (bfd_vma value)
9246 {
9247 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9248 }
9249
9250 static bfd_vma
9251 arm_movt_immediate (bfd_vma value)
9252 {
9253 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9254 }
9255
9256 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9257 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9258 Otherwise, DYNINDX is the index of the symbol in the dynamic
9259 symbol table and SYM_VALUE is undefined.
9260
9261 ROOT_PLT points to the offset of the PLT entry from the start of its
9262 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9263 bookkeeping information.
9264
9265 Returns FALSE if there was a problem. */
9266
9267 static bfd_boolean
9268 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9269 union gotplt_union *root_plt,
9270 struct arm_plt_info *arm_plt,
9271 int dynindx, bfd_vma sym_value)
9272 {
9273 struct elf32_arm_link_hash_table *htab;
9274 asection *sgot;
9275 asection *splt;
9276 asection *srel;
9277 bfd_byte *loc;
9278 bfd_vma plt_index;
9279 Elf_Internal_Rela rel;
9280 bfd_vma plt_header_size;
9281 bfd_vma got_header_size;
9282
9283 htab = elf32_arm_hash_table (info);
9284
9285 /* Pick the appropriate sections and sizes. */
9286 if (dynindx == -1)
9287 {
9288 splt = htab->root.iplt;
9289 sgot = htab->root.igotplt;
9290 srel = htab->root.irelplt;
9291
9292 /* There are no reserved entries in .igot.plt, and no special
9293 first entry in .iplt. */
9294 got_header_size = 0;
9295 plt_header_size = 0;
9296 }
9297 else
9298 {
9299 splt = htab->root.splt;
9300 sgot = htab->root.sgotplt;
9301 srel = htab->root.srelplt;
9302
9303 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9304 plt_header_size = htab->plt_header_size;
9305 }
9306 BFD_ASSERT (splt != NULL && srel != NULL);
9307
9308 /* Fill in the entry in the procedure linkage table. */
9309 if (htab->symbian_p)
9310 {
9311 BFD_ASSERT (dynindx >= 0);
9312 put_arm_insn (htab, output_bfd,
9313 elf32_arm_symbian_plt_entry[0],
9314 splt->contents + root_plt->offset);
9315 bfd_put_32 (output_bfd,
9316 elf32_arm_symbian_plt_entry[1],
9317 splt->contents + root_plt->offset + 4);
9318
9319 /* Fill in the entry in the .rel.plt section. */
9320 rel.r_offset = (splt->output_section->vma
9321 + splt->output_offset
9322 + root_plt->offset + 4);
9323 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9324
9325 /* Get the index in the procedure linkage table which
9326 corresponds to this symbol. This is the index of this symbol
9327 in all the symbols for which we are making plt entries. The
9328 first entry in the procedure linkage table is reserved. */
9329 plt_index = ((root_plt->offset - plt_header_size)
9330 / htab->plt_entry_size);
9331 }
9332 else
9333 {
9334 bfd_vma got_offset, got_address, plt_address;
9335 bfd_vma got_displacement, initial_got_entry;
9336 bfd_byte * ptr;
9337
9338 BFD_ASSERT (sgot != NULL);
9339
9340 /* Get the offset into the .(i)got.plt table of the entry that
9341 corresponds to this function. */
9342 got_offset = (arm_plt->got_offset & -2);
9343
9344 /* Get the index in the procedure linkage table which
9345 corresponds to this symbol. This is the index of this symbol
9346 in all the symbols for which we are making plt entries.
9347 After the reserved .got.plt entries, all symbols appear in
9348 the same order as in .plt. */
9349 plt_index = (got_offset - got_header_size) / 4;
9350
9351 /* Calculate the address of the GOT entry. */
9352 got_address = (sgot->output_section->vma
9353 + sgot->output_offset
9354 + got_offset);
9355
9356 /* ...and the address of the PLT entry. */
9357 plt_address = (splt->output_section->vma
9358 + splt->output_offset
9359 + root_plt->offset);
9360
9361 ptr = splt->contents + root_plt->offset;
9362 if (htab->vxworks_p && bfd_link_pic (info))
9363 {
9364 unsigned int i;
9365 bfd_vma val;
9366
9367 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9368 {
9369 val = elf32_arm_vxworks_shared_plt_entry[i];
9370 if (i == 2)
9371 val |= got_address - sgot->output_section->vma;
9372 if (i == 5)
9373 val |= plt_index * RELOC_SIZE (htab);
9374 if (i == 2 || i == 5)
9375 bfd_put_32 (output_bfd, val, ptr);
9376 else
9377 put_arm_insn (htab, output_bfd, val, ptr);
9378 }
9379 }
9380 else if (htab->vxworks_p)
9381 {
9382 unsigned int i;
9383 bfd_vma val;
9384
9385 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9386 {
9387 val = elf32_arm_vxworks_exec_plt_entry[i];
9388 if (i == 2)
9389 val |= got_address;
9390 if (i == 4)
9391 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9392 if (i == 5)
9393 val |= plt_index * RELOC_SIZE (htab);
9394 if (i == 2 || i == 5)
9395 bfd_put_32 (output_bfd, val, ptr);
9396 else
9397 put_arm_insn (htab, output_bfd, val, ptr);
9398 }
9399
9400 loc = (htab->srelplt2->contents
9401 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9402
9403 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9404 referencing the GOT for this PLT entry. */
9405 rel.r_offset = plt_address + 8;
9406 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9407 rel.r_addend = got_offset;
9408 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9409 loc += RELOC_SIZE (htab);
9410
9411 /* Create the R_ARM_ABS32 relocation referencing the
9412 beginning of the PLT for this GOT entry. */
9413 rel.r_offset = got_address;
9414 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9415 rel.r_addend = 0;
9416 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9417 }
9418 else if (htab->nacl_p)
9419 {
9420 /* Calculate the displacement between the PLT slot and the
9421 common tail that's part of the special initial PLT slot. */
9422 int32_t tail_displacement
9423 = ((splt->output_section->vma + splt->output_offset
9424 + ARM_NACL_PLT_TAIL_OFFSET)
9425 - (plt_address + htab->plt_entry_size + 4));
9426 BFD_ASSERT ((tail_displacement & 3) == 0);
9427 tail_displacement >>= 2;
9428
9429 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9430 || (-tail_displacement & 0xff000000) == 0);
9431
9432 /* Calculate the displacement between the PLT slot and the entry
9433 in the GOT. The offset accounts for the value produced by
9434 adding to pc in the penultimate instruction of the PLT stub. */
9435 got_displacement = (got_address
9436 - (plt_address + htab->plt_entry_size));
9437
9438 /* NaCl does not support interworking at all. */
9439 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9440
9441 put_arm_insn (htab, output_bfd,
9442 elf32_arm_nacl_plt_entry[0]
9443 | arm_movw_immediate (got_displacement),
9444 ptr + 0);
9445 put_arm_insn (htab, output_bfd,
9446 elf32_arm_nacl_plt_entry[1]
9447 | arm_movt_immediate (got_displacement),
9448 ptr + 4);
9449 put_arm_insn (htab, output_bfd,
9450 elf32_arm_nacl_plt_entry[2],
9451 ptr + 8);
9452 put_arm_insn (htab, output_bfd,
9453 elf32_arm_nacl_plt_entry[3]
9454 | (tail_displacement & 0x00ffffff),
9455 ptr + 12);
9456 }
9457 else if (using_thumb_only (htab))
9458 {
9459 /* PR ld/16017: Generate thumb only PLT entries. */
9460 if (!using_thumb2 (htab))
9461 {
9462 /* FIXME: We ought to be able to generate thumb-1 PLT
9463 instructions... */
9464 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9465 output_bfd);
9466 return FALSE;
9467 }
9468
9469 /* Calculate the displacement between the PLT slot and the entry in
9470 the GOT. The 12-byte offset accounts for the value produced by
9471 adding to pc in the 3rd instruction of the PLT stub. */
9472 got_displacement = got_address - (plt_address + 12);
9473
9474 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9475 instead of 'put_thumb_insn'. */
9476 put_arm_insn (htab, output_bfd,
9477 elf32_thumb2_plt_entry[0]
9478 | ((got_displacement & 0x000000ff) << 16)
9479 | ((got_displacement & 0x00000700) << 20)
9480 | ((got_displacement & 0x00000800) >> 1)
9481 | ((got_displacement & 0x0000f000) >> 12),
9482 ptr + 0);
9483 put_arm_insn (htab, output_bfd,
9484 elf32_thumb2_plt_entry[1]
9485 | ((got_displacement & 0x00ff0000) )
9486 | ((got_displacement & 0x07000000) << 4)
9487 | ((got_displacement & 0x08000000) >> 17)
9488 | ((got_displacement & 0xf0000000) >> 28),
9489 ptr + 4);
9490 put_arm_insn (htab, output_bfd,
9491 elf32_thumb2_plt_entry[2],
9492 ptr + 8);
9493 put_arm_insn (htab, output_bfd,
9494 elf32_thumb2_plt_entry[3],
9495 ptr + 12);
9496 }
9497 else
9498 {
9499 /* Calculate the displacement between the PLT slot and the
9500 entry in the GOT. The eight-byte offset accounts for the
9501 value produced by adding to pc in the first instruction
9502 of the PLT stub. */
9503 got_displacement = got_address - (plt_address + 8);
9504
9505 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9506 {
9507 put_thumb_insn (htab, output_bfd,
9508 elf32_arm_plt_thumb_stub[0], ptr - 4);
9509 put_thumb_insn (htab, output_bfd,
9510 elf32_arm_plt_thumb_stub[1], ptr - 2);
9511 }
9512
9513 if (!elf32_arm_use_long_plt_entry)
9514 {
9515 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9516
9517 put_arm_insn (htab, output_bfd,
9518 elf32_arm_plt_entry_short[0]
9519 | ((got_displacement & 0x0ff00000) >> 20),
9520 ptr + 0);
9521 put_arm_insn (htab, output_bfd,
9522 elf32_arm_plt_entry_short[1]
9523 | ((got_displacement & 0x000ff000) >> 12),
9524 ptr+ 4);
9525 put_arm_insn (htab, output_bfd,
9526 elf32_arm_plt_entry_short[2]
9527 | (got_displacement & 0x00000fff),
9528 ptr + 8);
9529 #ifdef FOUR_WORD_PLT
9530 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9531 #endif
9532 }
9533 else
9534 {
9535 put_arm_insn (htab, output_bfd,
9536 elf32_arm_plt_entry_long[0]
9537 | ((got_displacement & 0xf0000000) >> 28),
9538 ptr + 0);
9539 put_arm_insn (htab, output_bfd,
9540 elf32_arm_plt_entry_long[1]
9541 | ((got_displacement & 0x0ff00000) >> 20),
9542 ptr + 4);
9543 put_arm_insn (htab, output_bfd,
9544 elf32_arm_plt_entry_long[2]
9545 | ((got_displacement & 0x000ff000) >> 12),
9546 ptr+ 8);
9547 put_arm_insn (htab, output_bfd,
9548 elf32_arm_plt_entry_long[3]
9549 | (got_displacement & 0x00000fff),
9550 ptr + 12);
9551 }
9552 }
9553
9554 /* Fill in the entry in the .rel(a).(i)plt section. */
9555 rel.r_offset = got_address;
9556 rel.r_addend = 0;
9557 if (dynindx == -1)
9558 {
9559 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9560 The dynamic linker or static executable then calls SYM_VALUE
9561 to determine the correct run-time value of the .igot.plt entry. */
9562 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9563 initial_got_entry = sym_value;
9564 }
9565 else
9566 {
9567 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9568 initial_got_entry = (splt->output_section->vma
9569 + splt->output_offset);
9570 }
9571
9572 /* Fill in the entry in the global offset table. */
9573 bfd_put_32 (output_bfd, initial_got_entry,
9574 sgot->contents + got_offset);
9575 }
9576
9577 if (dynindx == -1)
9578 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9579 else
9580 {
9581 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9582 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9583 }
9584
9585 return TRUE;
9586 }
9587
9588 /* Some relocations map to different relocations depending on the
9589 target. Return the real relocation. */
9590
9591 static int
9592 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9593 int r_type)
9594 {
9595 switch (r_type)
9596 {
9597 case R_ARM_TARGET1:
9598 if (globals->target1_is_rel)
9599 return R_ARM_REL32;
9600 else
9601 return R_ARM_ABS32;
9602
9603 case R_ARM_TARGET2:
9604 return globals->target2_reloc;
9605
9606 default:
9607 return r_type;
9608 }
9609 }
9610
9611 /* Return the base VMA address which should be subtracted from real addresses
9612 when resolving @dtpoff relocation.
9613 This is PT_TLS segment p_vaddr. */
9614
9615 static bfd_vma
9616 dtpoff_base (struct bfd_link_info *info)
9617 {
9618 /* If tls_sec is NULL, we should have signalled an error already. */
9619 if (elf_hash_table (info)->tls_sec == NULL)
9620 return 0;
9621 return elf_hash_table (info)->tls_sec->vma;
9622 }
9623
9624 /* Return the relocation value for @tpoff relocation
9625 if STT_TLS virtual address is ADDRESS. */
9626
9627 static bfd_vma
9628 tpoff (struct bfd_link_info *info, bfd_vma address)
9629 {
9630 struct elf_link_hash_table *htab = elf_hash_table (info);
9631 bfd_vma base;
9632
9633 /* If tls_sec is NULL, we should have signalled an error already. */
9634 if (htab->tls_sec == NULL)
9635 return 0;
9636 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9637 return address - htab->tls_sec->vma + base;
9638 }
9639
9640 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9641 VALUE is the relocation value. */
9642
9643 static bfd_reloc_status_type
9644 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9645 {
9646 if (value > 0xfff)
9647 return bfd_reloc_overflow;
9648
9649 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9650 bfd_put_32 (abfd, value, data);
9651 return bfd_reloc_ok;
9652 }
9653
9654 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9655 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9656 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9657
9658 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9659 is to then call final_link_relocate. Return other values in the
9660 case of error.
9661
9662 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9663 the pre-relaxed code. It would be nice if the relocs were updated
9664 to match the optimization. */
9665
9666 static bfd_reloc_status_type
9667 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9668 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9669 Elf_Internal_Rela *rel, unsigned long is_local)
9670 {
9671 unsigned long insn;
9672
9673 switch (ELF32_R_TYPE (rel->r_info))
9674 {
9675 default:
9676 return bfd_reloc_notsupported;
9677
9678 case R_ARM_TLS_GOTDESC:
9679 if (is_local)
9680 insn = 0;
9681 else
9682 {
9683 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9684 if (insn & 1)
9685 insn -= 5; /* THUMB */
9686 else
9687 insn -= 8; /* ARM */
9688 }
9689 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9690 return bfd_reloc_continue;
9691
9692 case R_ARM_THM_TLS_DESCSEQ:
9693 /* Thumb insn. */
9694 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9695 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9696 {
9697 if (is_local)
9698 /* nop */
9699 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9700 }
9701 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9702 {
9703 if (is_local)
9704 /* nop */
9705 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9706 else
9707 /* ldr rx,[ry] */
9708 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9709 }
9710 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9711 {
9712 if (is_local)
9713 /* nop */
9714 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9715 else
9716 /* mov r0, rx */
9717 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9718 contents + rel->r_offset);
9719 }
9720 else
9721 {
9722 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9723 /* It's a 32 bit instruction, fetch the rest of it for
9724 error generation. */
9725 insn = (insn << 16)
9726 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9727 _bfd_error_handler
9728 /* xgettext:c-format */
9729 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' in TLS trampoline"),
9730 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9731 return bfd_reloc_notsupported;
9732 }
9733 break;
9734
9735 case R_ARM_TLS_DESCSEQ:
9736 /* arm insn. */
9737 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9738 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9739 {
9740 if (is_local)
9741 /* mov rx, ry */
9742 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9743 contents + rel->r_offset);
9744 }
9745 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9746 {
9747 if (is_local)
9748 /* nop */
9749 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9750 else
9751 /* ldr rx,[ry] */
9752 bfd_put_32 (input_bfd, insn & 0xfffff000,
9753 contents + rel->r_offset);
9754 }
9755 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9756 {
9757 if (is_local)
9758 /* nop */
9759 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9760 else
9761 /* mov r0, rx */
9762 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9763 contents + rel->r_offset);
9764 }
9765 else
9766 {
9767 _bfd_error_handler
9768 /* xgettext:c-format */
9769 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' in TLS trampoline"),
9770 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9771 return bfd_reloc_notsupported;
9772 }
9773 break;
9774
9775 case R_ARM_TLS_CALL:
9776 /* GD->IE relaxation, turn the instruction into 'nop' or
9777 'ldr r0, [pc,r0]' */
9778 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9779 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9780 break;
9781
9782 case R_ARM_THM_TLS_CALL:
9783 /* GD->IE relaxation. */
9784 if (!is_local)
9785 /* add r0,pc; ldr r0, [r0] */
9786 insn = 0x44786800;
9787 else if (using_thumb2 (globals))
9788 /* nop.w */
9789 insn = 0xf3af8000;
9790 else
9791 /* nop; nop */
9792 insn = 0xbf00bf00;
9793
9794 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9795 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9796 break;
9797 }
9798 return bfd_reloc_ok;
9799 }
9800
9801 /* For a given value of n, calculate the value of G_n as required to
9802 deal with group relocations. We return it in the form of an
9803 encoded constant-and-rotation, together with the final residual. If n is
9804 specified as less than zero, then final_residual is filled with the
9805 input value and no further action is performed. */
9806
9807 static bfd_vma
9808 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9809 {
9810 int current_n;
9811 bfd_vma g_n;
9812 bfd_vma encoded_g_n = 0;
9813 bfd_vma residual = value; /* Also known as Y_n. */
9814
9815 for (current_n = 0; current_n <= n; current_n++)
9816 {
9817 int shift;
9818
9819 /* Calculate which part of the value to mask. */
9820 if (residual == 0)
9821 shift = 0;
9822 else
9823 {
9824 int msb;
9825
9826 /* Determine the most significant bit in the residual and
9827 align the resulting value to a 2-bit boundary. */
9828 for (msb = 30; msb >= 0; msb -= 2)
9829 if (residual & (3 << msb))
9830 break;
9831
9832 /* The desired shift is now (msb - 6), or zero, whichever
9833 is the greater. */
9834 shift = msb - 6;
9835 if (shift < 0)
9836 shift = 0;
9837 }
9838
9839 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9840 g_n = residual & (0xff << shift);
9841 encoded_g_n = (g_n >> shift)
9842 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9843
9844 /* Calculate the residual for the next time around. */
9845 residual &= ~g_n;
9846 }
9847
9848 *final_residual = residual;
9849
9850 return encoded_g_n;
9851 }
9852
9853 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9854 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9855
9856 static int
9857 identify_add_or_sub (bfd_vma insn)
9858 {
9859 int opcode = insn & 0x1e00000;
9860
9861 if (opcode == 1 << 23) /* ADD */
9862 return 1;
9863
9864 if (opcode == 1 << 22) /* SUB */
9865 return -1;
9866
9867 return 0;
9868 }
9869
9870 /* Perform a relocation as part of a final link. */
9871
9872 static bfd_reloc_status_type
9873 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9874 bfd * input_bfd,
9875 bfd * output_bfd,
9876 asection * input_section,
9877 bfd_byte * contents,
9878 Elf_Internal_Rela * rel,
9879 bfd_vma value,
9880 struct bfd_link_info * info,
9881 asection * sym_sec,
9882 const char * sym_name,
9883 unsigned char st_type,
9884 enum arm_st_branch_type branch_type,
9885 struct elf_link_hash_entry * h,
9886 bfd_boolean * unresolved_reloc_p,
9887 char ** error_message)
9888 {
9889 unsigned long r_type = howto->type;
9890 unsigned long r_symndx;
9891 bfd_byte * hit_data = contents + rel->r_offset;
9892 bfd_vma * local_got_offsets;
9893 bfd_vma * local_tlsdesc_gotents;
9894 asection * sgot;
9895 asection * splt;
9896 asection * sreloc = NULL;
9897 asection * srelgot;
9898 bfd_vma addend;
9899 bfd_signed_vma signed_addend;
9900 unsigned char dynreloc_st_type;
9901 bfd_vma dynreloc_value;
9902 struct elf32_arm_link_hash_table * globals;
9903 struct elf32_arm_link_hash_entry *eh;
9904 union gotplt_union *root_plt;
9905 struct arm_plt_info *arm_plt;
9906 bfd_vma plt_offset;
9907 bfd_vma gotplt_offset;
9908 bfd_boolean has_iplt_entry;
9909
9910 globals = elf32_arm_hash_table (info);
9911 if (globals == NULL)
9912 return bfd_reloc_notsupported;
9913
9914 BFD_ASSERT (is_arm_elf (input_bfd));
9915
9916 /* Some relocation types map to different relocations depending on the
9917 target. We pick the right one here. */
9918 r_type = arm_real_reloc_type (globals, r_type);
9919
9920 /* It is possible to have linker relaxations on some TLS access
9921 models. Update our information here. */
9922 r_type = elf32_arm_tls_transition (info, r_type, h);
9923
9924 if (r_type != howto->type)
9925 howto = elf32_arm_howto_from_type (r_type);
9926
9927 eh = (struct elf32_arm_link_hash_entry *) h;
9928 sgot = globals->root.sgot;
9929 local_got_offsets = elf_local_got_offsets (input_bfd);
9930 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9931
9932 if (globals->root.dynamic_sections_created)
9933 srelgot = globals->root.srelgot;
9934 else
9935 srelgot = NULL;
9936
9937 r_symndx = ELF32_R_SYM (rel->r_info);
9938
9939 if (globals->use_rel)
9940 {
9941 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9942
9943 if (addend & ((howto->src_mask + 1) >> 1))
9944 {
9945 signed_addend = -1;
9946 signed_addend &= ~ howto->src_mask;
9947 signed_addend |= addend;
9948 }
9949 else
9950 signed_addend = addend;
9951 }
9952 else
9953 addend = signed_addend = rel->r_addend;
9954
9955 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9956 are resolving a function call relocation. */
9957 if (using_thumb_only (globals)
9958 && (r_type == R_ARM_THM_CALL
9959 || r_type == R_ARM_THM_JUMP24)
9960 && branch_type == ST_BRANCH_TO_ARM)
9961 branch_type = ST_BRANCH_TO_THUMB;
9962
9963 /* Record the symbol information that should be used in dynamic
9964 relocations. */
9965 dynreloc_st_type = st_type;
9966 dynreloc_value = value;
9967 if (branch_type == ST_BRANCH_TO_THUMB)
9968 dynreloc_value |= 1;
9969
9970 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9971 VALUE appropriately for relocations that we resolve at link time. */
9972 has_iplt_entry = FALSE;
9973 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9974 &arm_plt)
9975 && root_plt->offset != (bfd_vma) -1)
9976 {
9977 plt_offset = root_plt->offset;
9978 gotplt_offset = arm_plt->got_offset;
9979
9980 if (h == NULL || eh->is_iplt)
9981 {
9982 has_iplt_entry = TRUE;
9983 splt = globals->root.iplt;
9984
9985 /* Populate .iplt entries here, because not all of them will
9986 be seen by finish_dynamic_symbol. The lower bit is set if
9987 we have already populated the entry. */
9988 if (plt_offset & 1)
9989 plt_offset--;
9990 else
9991 {
9992 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9993 -1, dynreloc_value))
9994 root_plt->offset |= 1;
9995 else
9996 return bfd_reloc_notsupported;
9997 }
9998
9999 /* Static relocations always resolve to the .iplt entry. */
10000 st_type = STT_FUNC;
10001 value = (splt->output_section->vma
10002 + splt->output_offset
10003 + plt_offset);
10004 branch_type = ST_BRANCH_TO_ARM;
10005
10006 /* If there are non-call relocations that resolve to the .iplt
10007 entry, then all dynamic ones must too. */
10008 if (arm_plt->noncall_refcount != 0)
10009 {
10010 dynreloc_st_type = st_type;
10011 dynreloc_value = value;
10012 }
10013 }
10014 else
10015 /* We populate the .plt entry in finish_dynamic_symbol. */
10016 splt = globals->root.splt;
10017 }
10018 else
10019 {
10020 splt = NULL;
10021 plt_offset = (bfd_vma) -1;
10022 gotplt_offset = (bfd_vma) -1;
10023 }
10024
10025 switch (r_type)
10026 {
10027 case R_ARM_NONE:
10028 /* We don't need to find a value for this symbol. It's just a
10029 marker. */
10030 *unresolved_reloc_p = FALSE;
10031 return bfd_reloc_ok;
10032
10033 case R_ARM_ABS12:
10034 if (!globals->vxworks_p)
10035 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10036 /* Fall through. */
10037
10038 case R_ARM_PC24:
10039 case R_ARM_ABS32:
10040 case R_ARM_ABS32_NOI:
10041 case R_ARM_REL32:
10042 case R_ARM_REL32_NOI:
10043 case R_ARM_CALL:
10044 case R_ARM_JUMP24:
10045 case R_ARM_XPC25:
10046 case R_ARM_PREL31:
10047 case R_ARM_PLT32:
10048 /* Handle relocations which should use the PLT entry. ABS32/REL32
10049 will use the symbol's value, which may point to a PLT entry, but we
10050 don't need to handle that here. If we created a PLT entry, all
10051 branches in this object should go to it, except if the PLT is too
10052 far away, in which case a long branch stub should be inserted. */
10053 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10054 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10055 && r_type != R_ARM_CALL
10056 && r_type != R_ARM_JUMP24
10057 && r_type != R_ARM_PLT32)
10058 && plt_offset != (bfd_vma) -1)
10059 {
10060 /* If we've created a .plt section, and assigned a PLT entry
10061 to this function, it must either be a STT_GNU_IFUNC reference
10062 or not be known to bind locally. In other cases, we should
10063 have cleared the PLT entry by now. */
10064 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10065
10066 value = (splt->output_section->vma
10067 + splt->output_offset
10068 + plt_offset);
10069 *unresolved_reloc_p = FALSE;
10070 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10071 contents, rel->r_offset, value,
10072 rel->r_addend);
10073 }
10074
10075 /* When generating a shared object or relocatable executable, these
10076 relocations are copied into the output file to be resolved at
10077 run time. */
10078 if ((bfd_link_pic (info)
10079 || globals->root.is_relocatable_executable)
10080 && (input_section->flags & SEC_ALLOC)
10081 && !(globals->vxworks_p
10082 && strcmp (input_section->output_section->name,
10083 ".tls_vars") == 0)
10084 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10085 || !SYMBOL_CALLS_LOCAL (info, h))
10086 && !(input_bfd == globals->stub_bfd
10087 && strstr (input_section->name, STUB_SUFFIX))
10088 && (h == NULL
10089 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10090 || h->root.type != bfd_link_hash_undefweak)
10091 && r_type != R_ARM_PC24
10092 && r_type != R_ARM_CALL
10093 && r_type != R_ARM_JUMP24
10094 && r_type != R_ARM_PREL31
10095 && r_type != R_ARM_PLT32)
10096 {
10097 Elf_Internal_Rela outrel;
10098 bfd_boolean skip, relocate;
10099
10100 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10101 && !h->def_regular)
10102 {
10103 char *v = _("shared object");
10104
10105 if (bfd_link_executable (info))
10106 v = _("PIE executable");
10107
10108 _bfd_error_handler
10109 (_("%B: relocation %s against external or undefined symbol `%s'"
10110 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10111 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10112 return bfd_reloc_notsupported;
10113 }
10114
10115 *unresolved_reloc_p = FALSE;
10116
10117 if (sreloc == NULL && globals->root.dynamic_sections_created)
10118 {
10119 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10120 ! globals->use_rel);
10121
10122 if (sreloc == NULL)
10123 return bfd_reloc_notsupported;
10124 }
10125
10126 skip = FALSE;
10127 relocate = FALSE;
10128
10129 outrel.r_addend = addend;
10130 outrel.r_offset =
10131 _bfd_elf_section_offset (output_bfd, info, input_section,
10132 rel->r_offset);
10133 if (outrel.r_offset == (bfd_vma) -1)
10134 skip = TRUE;
10135 else if (outrel.r_offset == (bfd_vma) -2)
10136 skip = TRUE, relocate = TRUE;
10137 outrel.r_offset += (input_section->output_section->vma
10138 + input_section->output_offset);
10139
10140 if (skip)
10141 memset (&outrel, 0, sizeof outrel);
10142 else if (h != NULL
10143 && h->dynindx != -1
10144 && (!bfd_link_pic (info)
10145 || !(bfd_link_pie (info)
10146 || SYMBOLIC_BIND (info, h))
10147 || !h->def_regular))
10148 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10149 else
10150 {
10151 int symbol;
10152
10153 /* This symbol is local, or marked to become local. */
10154 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10155 if (globals->symbian_p)
10156 {
10157 asection *osec;
10158
10159 /* On Symbian OS, the data segment and text segement
10160 can be relocated independently. Therefore, we
10161 must indicate the segment to which this
10162 relocation is relative. The BPABI allows us to
10163 use any symbol in the right segment; we just use
10164 the section symbol as it is convenient. (We
10165 cannot use the symbol given by "h" directly as it
10166 will not appear in the dynamic symbol table.)
10167
10168 Note that the dynamic linker ignores the section
10169 symbol value, so we don't subtract osec->vma
10170 from the emitted reloc addend. */
10171 if (sym_sec)
10172 osec = sym_sec->output_section;
10173 else
10174 osec = input_section->output_section;
10175 symbol = elf_section_data (osec)->dynindx;
10176 if (symbol == 0)
10177 {
10178 struct elf_link_hash_table *htab = elf_hash_table (info);
10179
10180 if ((osec->flags & SEC_READONLY) == 0
10181 && htab->data_index_section != NULL)
10182 osec = htab->data_index_section;
10183 else
10184 osec = htab->text_index_section;
10185 symbol = elf_section_data (osec)->dynindx;
10186 }
10187 BFD_ASSERT (symbol != 0);
10188 }
10189 else
10190 /* On SVR4-ish systems, the dynamic loader cannot
10191 relocate the text and data segments independently,
10192 so the symbol does not matter. */
10193 symbol = 0;
10194 if (dynreloc_st_type == STT_GNU_IFUNC)
10195 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10196 to the .iplt entry. Instead, every non-call reference
10197 must use an R_ARM_IRELATIVE relocation to obtain the
10198 correct run-time address. */
10199 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10200 else
10201 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10202 if (globals->use_rel)
10203 relocate = TRUE;
10204 else
10205 outrel.r_addend += dynreloc_value;
10206 }
10207
10208 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10209
10210 /* If this reloc is against an external symbol, we do not want to
10211 fiddle with the addend. Otherwise, we need to include the symbol
10212 value so that it becomes an addend for the dynamic reloc. */
10213 if (! relocate)
10214 return bfd_reloc_ok;
10215
10216 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10217 contents, rel->r_offset,
10218 dynreloc_value, (bfd_vma) 0);
10219 }
10220 else switch (r_type)
10221 {
10222 case R_ARM_ABS12:
10223 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10224
10225 case R_ARM_XPC25: /* Arm BLX instruction. */
10226 case R_ARM_CALL:
10227 case R_ARM_JUMP24:
10228 case R_ARM_PC24: /* Arm B/BL instruction. */
10229 case R_ARM_PLT32:
10230 {
10231 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10232
10233 if (r_type == R_ARM_XPC25)
10234 {
10235 /* Check for Arm calling Arm function. */
10236 /* FIXME: Should we translate the instruction into a BL
10237 instruction instead ? */
10238 if (branch_type != ST_BRANCH_TO_THUMB)
10239 _bfd_error_handler
10240 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10241 input_bfd,
10242 h ? h->root.root.string : "(local)");
10243 }
10244 else if (r_type == R_ARM_PC24)
10245 {
10246 /* Check for Arm calling Thumb function. */
10247 if (branch_type == ST_BRANCH_TO_THUMB)
10248 {
10249 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10250 output_bfd, input_section,
10251 hit_data, sym_sec, rel->r_offset,
10252 signed_addend, value,
10253 error_message))
10254 return bfd_reloc_ok;
10255 else
10256 return bfd_reloc_dangerous;
10257 }
10258 }
10259
10260 /* Check if a stub has to be inserted because the
10261 destination is too far or we are changing mode. */
10262 if ( r_type == R_ARM_CALL
10263 || r_type == R_ARM_JUMP24
10264 || r_type == R_ARM_PLT32)
10265 {
10266 enum elf32_arm_stub_type stub_type = arm_stub_none;
10267 struct elf32_arm_link_hash_entry *hash;
10268
10269 hash = (struct elf32_arm_link_hash_entry *) h;
10270 stub_type = arm_type_of_stub (info, input_section, rel,
10271 st_type, &branch_type,
10272 hash, value, sym_sec,
10273 input_bfd, sym_name);
10274
10275 if (stub_type != arm_stub_none)
10276 {
10277 /* The target is out of reach, so redirect the
10278 branch to the local stub for this function. */
10279 stub_entry = elf32_arm_get_stub_entry (input_section,
10280 sym_sec, h,
10281 rel, globals,
10282 stub_type);
10283 {
10284 if (stub_entry != NULL)
10285 value = (stub_entry->stub_offset
10286 + stub_entry->stub_sec->output_offset
10287 + stub_entry->stub_sec->output_section->vma);
10288
10289 if (plt_offset != (bfd_vma) -1)
10290 *unresolved_reloc_p = FALSE;
10291 }
10292 }
10293 else
10294 {
10295 /* If the call goes through a PLT entry, make sure to
10296 check distance to the right destination address. */
10297 if (plt_offset != (bfd_vma) -1)
10298 {
10299 value = (splt->output_section->vma
10300 + splt->output_offset
10301 + plt_offset);
10302 *unresolved_reloc_p = FALSE;
10303 /* The PLT entry is in ARM mode, regardless of the
10304 target function. */
10305 branch_type = ST_BRANCH_TO_ARM;
10306 }
10307 }
10308 }
10309
10310 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10311 where:
10312 S is the address of the symbol in the relocation.
10313 P is address of the instruction being relocated.
10314 A is the addend (extracted from the instruction) in bytes.
10315
10316 S is held in 'value'.
10317 P is the base address of the section containing the
10318 instruction plus the offset of the reloc into that
10319 section, ie:
10320 (input_section->output_section->vma +
10321 input_section->output_offset +
10322 rel->r_offset).
10323 A is the addend, converted into bytes, ie:
10324 (signed_addend * 4)
10325
10326 Note: None of these operations have knowledge of the pipeline
10327 size of the processor, thus it is up to the assembler to
10328 encode this information into the addend. */
10329 value -= (input_section->output_section->vma
10330 + input_section->output_offset);
10331 value -= rel->r_offset;
10332 if (globals->use_rel)
10333 value += (signed_addend << howto->size);
10334 else
10335 /* RELA addends do not have to be adjusted by howto->size. */
10336 value += signed_addend;
10337
10338 signed_addend = value;
10339 signed_addend >>= howto->rightshift;
10340
10341 /* A branch to an undefined weak symbol is turned into a jump to
10342 the next instruction unless a PLT entry will be created.
10343 Do the same for local undefined symbols (but not for STN_UNDEF).
10344 The jump to the next instruction is optimized as a NOP depending
10345 on the architecture. */
10346 if (h ? (h->root.type == bfd_link_hash_undefweak
10347 && plt_offset == (bfd_vma) -1)
10348 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10349 {
10350 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10351
10352 if (arch_has_arm_nop (globals))
10353 value |= 0x0320f000;
10354 else
10355 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10356 }
10357 else
10358 {
10359 /* Perform a signed range check. */
10360 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10361 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10362 return bfd_reloc_overflow;
10363
10364 addend = (value & 2);
10365
10366 value = (signed_addend & howto->dst_mask)
10367 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10368
10369 if (r_type == R_ARM_CALL)
10370 {
10371 /* Set the H bit in the BLX instruction. */
10372 if (branch_type == ST_BRANCH_TO_THUMB)
10373 {
10374 if (addend)
10375 value |= (1 << 24);
10376 else
10377 value &= ~(bfd_vma)(1 << 24);
10378 }
10379
10380 /* Select the correct instruction (BL or BLX). */
10381 /* Only if we are not handling a BL to a stub. In this
10382 case, mode switching is performed by the stub. */
10383 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10384 value |= (1 << 28);
10385 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10386 {
10387 value &= ~(bfd_vma)(1 << 28);
10388 value |= (1 << 24);
10389 }
10390 }
10391 }
10392 }
10393 break;
10394
10395 case R_ARM_ABS32:
10396 value += addend;
10397 if (branch_type == ST_BRANCH_TO_THUMB)
10398 value |= 1;
10399 break;
10400
10401 case R_ARM_ABS32_NOI:
10402 value += addend;
10403 break;
10404
10405 case R_ARM_REL32:
10406 value += addend;
10407 if (branch_type == ST_BRANCH_TO_THUMB)
10408 value |= 1;
10409 value -= (input_section->output_section->vma
10410 + input_section->output_offset + rel->r_offset);
10411 break;
10412
10413 case R_ARM_REL32_NOI:
10414 value += addend;
10415 value -= (input_section->output_section->vma
10416 + input_section->output_offset + rel->r_offset);
10417 break;
10418
10419 case R_ARM_PREL31:
10420 value -= (input_section->output_section->vma
10421 + input_section->output_offset + rel->r_offset);
10422 value += signed_addend;
10423 if (! h || h->root.type != bfd_link_hash_undefweak)
10424 {
10425 /* Check for overflow. */
10426 if ((value ^ (value >> 1)) & (1 << 30))
10427 return bfd_reloc_overflow;
10428 }
10429 value &= 0x7fffffff;
10430 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10431 if (branch_type == ST_BRANCH_TO_THUMB)
10432 value |= 1;
10433 break;
10434 }
10435
10436 bfd_put_32 (input_bfd, value, hit_data);
10437 return bfd_reloc_ok;
10438
10439 case R_ARM_ABS8:
10440 /* PR 16202: Refectch the addend using the correct size. */
10441 if (globals->use_rel)
10442 addend = bfd_get_8 (input_bfd, hit_data);
10443 value += addend;
10444
10445 /* There is no way to tell whether the user intended to use a signed or
10446 unsigned addend. When checking for overflow we accept either,
10447 as specified by the AAELF. */
10448 if ((long) value > 0xff || (long) value < -0x80)
10449 return bfd_reloc_overflow;
10450
10451 bfd_put_8 (input_bfd, value, hit_data);
10452 return bfd_reloc_ok;
10453
10454 case R_ARM_ABS16:
10455 /* PR 16202: Refectch the addend using the correct size. */
10456 if (globals->use_rel)
10457 addend = bfd_get_16 (input_bfd, hit_data);
10458 value += addend;
10459
10460 /* See comment for R_ARM_ABS8. */
10461 if ((long) value > 0xffff || (long) value < -0x8000)
10462 return bfd_reloc_overflow;
10463
10464 bfd_put_16 (input_bfd, value, hit_data);
10465 return bfd_reloc_ok;
10466
10467 case R_ARM_THM_ABS5:
10468 /* Support ldr and str instructions for the thumb. */
10469 if (globals->use_rel)
10470 {
10471 /* Need to refetch addend. */
10472 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10473 /* ??? Need to determine shift amount from operand size. */
10474 addend >>= howto->rightshift;
10475 }
10476 value += addend;
10477
10478 /* ??? Isn't value unsigned? */
10479 if ((long) value > 0x1f || (long) value < -0x10)
10480 return bfd_reloc_overflow;
10481
10482 /* ??? Value needs to be properly shifted into place first. */
10483 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10484 bfd_put_16 (input_bfd, value, hit_data);
10485 return bfd_reloc_ok;
10486
10487 case R_ARM_THM_ALU_PREL_11_0:
10488 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10489 {
10490 bfd_vma insn;
10491 bfd_signed_vma relocation;
10492
10493 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10494 | bfd_get_16 (input_bfd, hit_data + 2);
10495
10496 if (globals->use_rel)
10497 {
10498 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10499 | ((insn & (1 << 26)) >> 15);
10500 if (insn & 0xf00000)
10501 signed_addend = -signed_addend;
10502 }
10503
10504 relocation = value + signed_addend;
10505 relocation -= Pa (input_section->output_section->vma
10506 + input_section->output_offset
10507 + rel->r_offset);
10508
10509 /* PR 21523: Use an absolute value. The user of this reloc will
10510 have already selected an ADD or SUB insn appropriately. */
10511 value = labs (relocation);
10512
10513 if (value >= 0x1000)
10514 return bfd_reloc_overflow;
10515
10516 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10517 if (branch_type == ST_BRANCH_TO_THUMB)
10518 value |= 1;
10519
10520 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10521 | ((value & 0x700) << 4)
10522 | ((value & 0x800) << 15);
10523 if (relocation < 0)
10524 insn |= 0xa00000;
10525
10526 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10527 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10528
10529 return bfd_reloc_ok;
10530 }
10531
10532 case R_ARM_THM_PC8:
10533 /* PR 10073: This reloc is not generated by the GNU toolchain,
10534 but it is supported for compatibility with third party libraries
10535 generated by other compilers, specifically the ARM/IAR. */
10536 {
10537 bfd_vma insn;
10538 bfd_signed_vma relocation;
10539
10540 insn = bfd_get_16 (input_bfd, hit_data);
10541
10542 if (globals->use_rel)
10543 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10544
10545 relocation = value + addend;
10546 relocation -= Pa (input_section->output_section->vma
10547 + input_section->output_offset
10548 + rel->r_offset);
10549
10550 value = relocation;
10551
10552 /* We do not check for overflow of this reloc. Although strictly
10553 speaking this is incorrect, it appears to be necessary in order
10554 to work with IAR generated relocs. Since GCC and GAS do not
10555 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10556 a problem for them. */
10557 value &= 0x3fc;
10558
10559 insn = (insn & 0xff00) | (value >> 2);
10560
10561 bfd_put_16 (input_bfd, insn, hit_data);
10562
10563 return bfd_reloc_ok;
10564 }
10565
10566 case R_ARM_THM_PC12:
10567 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10568 {
10569 bfd_vma insn;
10570 bfd_signed_vma relocation;
10571
10572 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10573 | bfd_get_16 (input_bfd, hit_data + 2);
10574
10575 if (globals->use_rel)
10576 {
10577 signed_addend = insn & 0xfff;
10578 if (!(insn & (1 << 23)))
10579 signed_addend = -signed_addend;
10580 }
10581
10582 relocation = value + signed_addend;
10583 relocation -= Pa (input_section->output_section->vma
10584 + input_section->output_offset
10585 + rel->r_offset);
10586
10587 value = relocation;
10588
10589 if (value >= 0x1000)
10590 return bfd_reloc_overflow;
10591
10592 insn = (insn & 0xff7ff000) | value;
10593 if (relocation >= 0)
10594 insn |= (1 << 23);
10595
10596 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10597 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10598
10599 return bfd_reloc_ok;
10600 }
10601
10602 case R_ARM_THM_XPC22:
10603 case R_ARM_THM_CALL:
10604 case R_ARM_THM_JUMP24:
10605 /* Thumb BL (branch long instruction). */
10606 {
10607 bfd_vma relocation;
10608 bfd_vma reloc_sign;
10609 bfd_boolean overflow = FALSE;
10610 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10611 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10612 bfd_signed_vma reloc_signed_max;
10613 bfd_signed_vma reloc_signed_min;
10614 bfd_vma check;
10615 bfd_signed_vma signed_check;
10616 int bitsize;
10617 const int thumb2 = using_thumb2 (globals);
10618 const int thumb2_bl = using_thumb2_bl (globals);
10619
10620 /* A branch to an undefined weak symbol is turned into a jump to
10621 the next instruction unless a PLT entry will be created.
10622 The jump to the next instruction is optimized as a NOP.W for
10623 Thumb-2 enabled architectures. */
10624 if (h && h->root.type == bfd_link_hash_undefweak
10625 && plt_offset == (bfd_vma) -1)
10626 {
10627 if (thumb2)
10628 {
10629 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10630 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10631 }
10632 else
10633 {
10634 bfd_put_16 (input_bfd, 0xe000, hit_data);
10635 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10636 }
10637 return bfd_reloc_ok;
10638 }
10639
10640 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10641 with Thumb-1) involving the J1 and J2 bits. */
10642 if (globals->use_rel)
10643 {
10644 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10645 bfd_vma upper = upper_insn & 0x3ff;
10646 bfd_vma lower = lower_insn & 0x7ff;
10647 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10648 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10649 bfd_vma i1 = j1 ^ s ? 0 : 1;
10650 bfd_vma i2 = j2 ^ s ? 0 : 1;
10651
10652 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10653 /* Sign extend. */
10654 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10655
10656 signed_addend = addend;
10657 }
10658
10659 if (r_type == R_ARM_THM_XPC22)
10660 {
10661 /* Check for Thumb to Thumb call. */
10662 /* FIXME: Should we translate the instruction into a BL
10663 instruction instead ? */
10664 if (branch_type == ST_BRANCH_TO_THUMB)
10665 _bfd_error_handler
10666 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10667 input_bfd,
10668 h ? h->root.root.string : "(local)");
10669 }
10670 else
10671 {
10672 /* If it is not a call to Thumb, assume call to Arm.
10673 If it is a call relative to a section name, then it is not a
10674 function call at all, but rather a long jump. Calls through
10675 the PLT do not require stubs. */
10676 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10677 {
10678 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10679 {
10680 /* Convert BL to BLX. */
10681 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10682 }
10683 else if (( r_type != R_ARM_THM_CALL)
10684 && (r_type != R_ARM_THM_JUMP24))
10685 {
10686 if (elf32_thumb_to_arm_stub
10687 (info, sym_name, input_bfd, output_bfd, input_section,
10688 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10689 error_message))
10690 return bfd_reloc_ok;
10691 else
10692 return bfd_reloc_dangerous;
10693 }
10694 }
10695 else if (branch_type == ST_BRANCH_TO_THUMB
10696 && globals->use_blx
10697 && r_type == R_ARM_THM_CALL)
10698 {
10699 /* Make sure this is a BL. */
10700 lower_insn |= 0x1800;
10701 }
10702 }
10703
10704 enum elf32_arm_stub_type stub_type = arm_stub_none;
10705 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10706 {
10707 /* Check if a stub has to be inserted because the destination
10708 is too far. */
10709 struct elf32_arm_stub_hash_entry *stub_entry;
10710 struct elf32_arm_link_hash_entry *hash;
10711
10712 hash = (struct elf32_arm_link_hash_entry *) h;
10713
10714 stub_type = arm_type_of_stub (info, input_section, rel,
10715 st_type, &branch_type,
10716 hash, value, sym_sec,
10717 input_bfd, sym_name);
10718
10719 if (stub_type != arm_stub_none)
10720 {
10721 /* The target is out of reach or we are changing modes, so
10722 redirect the branch to the local stub for this
10723 function. */
10724 stub_entry = elf32_arm_get_stub_entry (input_section,
10725 sym_sec, h,
10726 rel, globals,
10727 stub_type);
10728 if (stub_entry != NULL)
10729 {
10730 value = (stub_entry->stub_offset
10731 + stub_entry->stub_sec->output_offset
10732 + stub_entry->stub_sec->output_section->vma);
10733
10734 if (plt_offset != (bfd_vma) -1)
10735 *unresolved_reloc_p = FALSE;
10736 }
10737
10738 /* If this call becomes a call to Arm, force BLX. */
10739 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10740 {
10741 if ((stub_entry
10742 && !arm_stub_is_thumb (stub_entry->stub_type))
10743 || branch_type != ST_BRANCH_TO_THUMB)
10744 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10745 }
10746 }
10747 }
10748
10749 /* Handle calls via the PLT. */
10750 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10751 {
10752 value = (splt->output_section->vma
10753 + splt->output_offset
10754 + plt_offset);
10755
10756 if (globals->use_blx
10757 && r_type == R_ARM_THM_CALL
10758 && ! using_thumb_only (globals))
10759 {
10760 /* If the Thumb BLX instruction is available, convert
10761 the BL to a BLX instruction to call the ARM-mode
10762 PLT entry. */
10763 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10764 branch_type = ST_BRANCH_TO_ARM;
10765 }
10766 else
10767 {
10768 if (! using_thumb_only (globals))
10769 /* Target the Thumb stub before the ARM PLT entry. */
10770 value -= PLT_THUMB_STUB_SIZE;
10771 branch_type = ST_BRANCH_TO_THUMB;
10772 }
10773 *unresolved_reloc_p = FALSE;
10774 }
10775
10776 relocation = value + signed_addend;
10777
10778 relocation -= (input_section->output_section->vma
10779 + input_section->output_offset
10780 + rel->r_offset);
10781
10782 check = relocation >> howto->rightshift;
10783
10784 /* If this is a signed value, the rightshift just dropped
10785 leading 1 bits (assuming twos complement). */
10786 if ((bfd_signed_vma) relocation >= 0)
10787 signed_check = check;
10788 else
10789 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10790
10791 /* Calculate the permissable maximum and minimum values for
10792 this relocation according to whether we're relocating for
10793 Thumb-2 or not. */
10794 bitsize = howto->bitsize;
10795 if (!thumb2_bl)
10796 bitsize -= 2;
10797 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10798 reloc_signed_min = ~reloc_signed_max;
10799
10800 /* Assumes two's complement. */
10801 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10802 overflow = TRUE;
10803
10804 if ((lower_insn & 0x5000) == 0x4000)
10805 /* For a BLX instruction, make sure that the relocation is rounded up
10806 to a word boundary. This follows the semantics of the instruction
10807 which specifies that bit 1 of the target address will come from bit
10808 1 of the base address. */
10809 relocation = (relocation + 2) & ~ 3;
10810
10811 /* Put RELOCATION back into the insn. Assumes two's complement.
10812 We use the Thumb-2 encoding, which is safe even if dealing with
10813 a Thumb-1 instruction by virtue of our overflow check above. */
10814 reloc_sign = (signed_check < 0) ? 1 : 0;
10815 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10816 | ((relocation >> 12) & 0x3ff)
10817 | (reloc_sign << 10);
10818 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10819 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10820 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10821 | ((relocation >> 1) & 0x7ff);
10822
10823 /* Put the relocated value back in the object file: */
10824 bfd_put_16 (input_bfd, upper_insn, hit_data);
10825 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10826
10827 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10828 }
10829 break;
10830
10831 case R_ARM_THM_JUMP19:
10832 /* Thumb32 conditional branch instruction. */
10833 {
10834 bfd_vma relocation;
10835 bfd_boolean overflow = FALSE;
10836 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10837 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10838 bfd_signed_vma reloc_signed_max = 0xffffe;
10839 bfd_signed_vma reloc_signed_min = -0x100000;
10840 bfd_signed_vma signed_check;
10841 enum elf32_arm_stub_type stub_type = arm_stub_none;
10842 struct elf32_arm_stub_hash_entry *stub_entry;
10843 struct elf32_arm_link_hash_entry *hash;
10844
10845 /* Need to refetch the addend, reconstruct the top three bits,
10846 and squish the two 11 bit pieces together. */
10847 if (globals->use_rel)
10848 {
10849 bfd_vma S = (upper_insn & 0x0400) >> 10;
10850 bfd_vma upper = (upper_insn & 0x003f);
10851 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10852 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10853 bfd_vma lower = (lower_insn & 0x07ff);
10854
10855 upper |= J1 << 6;
10856 upper |= J2 << 7;
10857 upper |= (!S) << 8;
10858 upper -= 0x0100; /* Sign extend. */
10859
10860 addend = (upper << 12) | (lower << 1);
10861 signed_addend = addend;
10862 }
10863
10864 /* Handle calls via the PLT. */
10865 if (plt_offset != (bfd_vma) -1)
10866 {
10867 value = (splt->output_section->vma
10868 + splt->output_offset
10869 + plt_offset);
10870 /* Target the Thumb stub before the ARM PLT entry. */
10871 value -= PLT_THUMB_STUB_SIZE;
10872 *unresolved_reloc_p = FALSE;
10873 }
10874
10875 hash = (struct elf32_arm_link_hash_entry *)h;
10876
10877 stub_type = arm_type_of_stub (info, input_section, rel,
10878 st_type, &branch_type,
10879 hash, value, sym_sec,
10880 input_bfd, sym_name);
10881 if (stub_type != arm_stub_none)
10882 {
10883 stub_entry = elf32_arm_get_stub_entry (input_section,
10884 sym_sec, h,
10885 rel, globals,
10886 stub_type);
10887 if (stub_entry != NULL)
10888 {
10889 value = (stub_entry->stub_offset
10890 + stub_entry->stub_sec->output_offset
10891 + stub_entry->stub_sec->output_section->vma);
10892 }
10893 }
10894
10895 relocation = value + signed_addend;
10896 relocation -= (input_section->output_section->vma
10897 + input_section->output_offset
10898 + rel->r_offset);
10899 signed_check = (bfd_signed_vma) relocation;
10900
10901 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10902 overflow = TRUE;
10903
10904 /* Put RELOCATION back into the insn. */
10905 {
10906 bfd_vma S = (relocation & 0x00100000) >> 20;
10907 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10908 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10909 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10910 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10911
10912 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10913 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10914 }
10915
10916 /* Put the relocated value back in the object file: */
10917 bfd_put_16 (input_bfd, upper_insn, hit_data);
10918 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10919
10920 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10921 }
10922
10923 case R_ARM_THM_JUMP11:
10924 case R_ARM_THM_JUMP8:
10925 case R_ARM_THM_JUMP6:
10926 /* Thumb B (branch) instruction). */
10927 {
10928 bfd_signed_vma relocation;
10929 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10930 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10931 bfd_signed_vma signed_check;
10932
10933 /* CZB cannot jump backward. */
10934 if (r_type == R_ARM_THM_JUMP6)
10935 reloc_signed_min = 0;
10936
10937 if (globals->use_rel)
10938 {
10939 /* Need to refetch addend. */
10940 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10941 if (addend & ((howto->src_mask + 1) >> 1))
10942 {
10943 signed_addend = -1;
10944 signed_addend &= ~ howto->src_mask;
10945 signed_addend |= addend;
10946 }
10947 else
10948 signed_addend = addend;
10949 /* The value in the insn has been right shifted. We need to
10950 undo this, so that we can perform the address calculation
10951 in terms of bytes. */
10952 signed_addend <<= howto->rightshift;
10953 }
10954 relocation = value + signed_addend;
10955
10956 relocation -= (input_section->output_section->vma
10957 + input_section->output_offset
10958 + rel->r_offset);
10959
10960 relocation >>= howto->rightshift;
10961 signed_check = relocation;
10962
10963 if (r_type == R_ARM_THM_JUMP6)
10964 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10965 else
10966 relocation &= howto->dst_mask;
10967 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10968
10969 bfd_put_16 (input_bfd, relocation, hit_data);
10970
10971 /* Assumes two's complement. */
10972 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10973 return bfd_reloc_overflow;
10974
10975 return bfd_reloc_ok;
10976 }
10977
10978 case R_ARM_ALU_PCREL7_0:
10979 case R_ARM_ALU_PCREL15_8:
10980 case R_ARM_ALU_PCREL23_15:
10981 {
10982 bfd_vma insn;
10983 bfd_vma relocation;
10984
10985 insn = bfd_get_32 (input_bfd, hit_data);
10986 if (globals->use_rel)
10987 {
10988 /* Extract the addend. */
10989 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10990 signed_addend = addend;
10991 }
10992 relocation = value + signed_addend;
10993
10994 relocation -= (input_section->output_section->vma
10995 + input_section->output_offset
10996 + rel->r_offset);
10997 insn = (insn & ~0xfff)
10998 | ((howto->bitpos << 7) & 0xf00)
10999 | ((relocation >> howto->bitpos) & 0xff);
11000 bfd_put_32 (input_bfd, value, hit_data);
11001 }
11002 return bfd_reloc_ok;
11003
11004 case R_ARM_GNU_VTINHERIT:
11005 case R_ARM_GNU_VTENTRY:
11006 return bfd_reloc_ok;
11007
11008 case R_ARM_GOTOFF32:
11009 /* Relocation is relative to the start of the
11010 global offset table. */
11011
11012 BFD_ASSERT (sgot != NULL);
11013 if (sgot == NULL)
11014 return bfd_reloc_notsupported;
11015
11016 /* If we are addressing a Thumb function, we need to adjust the
11017 address by one, so that attempts to call the function pointer will
11018 correctly interpret it as Thumb code. */
11019 if (branch_type == ST_BRANCH_TO_THUMB)
11020 value += 1;
11021
11022 /* Note that sgot->output_offset is not involved in this
11023 calculation. We always want the start of .got. If we
11024 define _GLOBAL_OFFSET_TABLE in a different way, as is
11025 permitted by the ABI, we might have to change this
11026 calculation. */
11027 value -= sgot->output_section->vma;
11028 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11029 contents, rel->r_offset, value,
11030 rel->r_addend);
11031
11032 case R_ARM_GOTPC:
11033 /* Use global offset table as symbol value. */
11034 BFD_ASSERT (sgot != NULL);
11035
11036 if (sgot == NULL)
11037 return bfd_reloc_notsupported;
11038
11039 *unresolved_reloc_p = FALSE;
11040 value = sgot->output_section->vma;
11041 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11042 contents, rel->r_offset, value,
11043 rel->r_addend);
11044
11045 case R_ARM_GOT32:
11046 case R_ARM_GOT_PREL:
11047 /* Relocation is to the entry for this symbol in the
11048 global offset table. */
11049 if (sgot == NULL)
11050 return bfd_reloc_notsupported;
11051
11052 if (dynreloc_st_type == STT_GNU_IFUNC
11053 && plt_offset != (bfd_vma) -1
11054 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11055 {
11056 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11057 symbol, and the relocation resolves directly to the runtime
11058 target rather than to the .iplt entry. This means that any
11059 .got entry would be the same value as the .igot.plt entry,
11060 so there's no point creating both. */
11061 sgot = globals->root.igotplt;
11062 value = sgot->output_offset + gotplt_offset;
11063 }
11064 else if (h != NULL)
11065 {
11066 bfd_vma off;
11067
11068 off = h->got.offset;
11069 BFD_ASSERT (off != (bfd_vma) -1);
11070 if ((off & 1) != 0)
11071 {
11072 /* We have already processsed one GOT relocation against
11073 this symbol. */
11074 off &= ~1;
11075 if (globals->root.dynamic_sections_created
11076 && !SYMBOL_REFERENCES_LOCAL (info, h))
11077 *unresolved_reloc_p = FALSE;
11078 }
11079 else
11080 {
11081 Elf_Internal_Rela outrel;
11082
11083 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11084 {
11085 /* If the symbol doesn't resolve locally in a static
11086 object, we have an undefined reference. If the
11087 symbol doesn't resolve locally in a dynamic object,
11088 it should be resolved by the dynamic linker. */
11089 if (globals->root.dynamic_sections_created)
11090 {
11091 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11092 *unresolved_reloc_p = FALSE;
11093 }
11094 else
11095 outrel.r_info = 0;
11096 outrel.r_addend = 0;
11097 }
11098 else
11099 {
11100 if (dynreloc_st_type == STT_GNU_IFUNC)
11101 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11102 else if (bfd_link_pic (info)
11103 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11104 || h->root.type != bfd_link_hash_undefweak))
11105 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11106 else
11107 outrel.r_info = 0;
11108 outrel.r_addend = dynreloc_value;
11109 }
11110
11111 /* The GOT entry is initialized to zero by default.
11112 See if we should install a different value. */
11113 if (outrel.r_addend != 0
11114 && (outrel.r_info == 0 || globals->use_rel))
11115 {
11116 bfd_put_32 (output_bfd, outrel.r_addend,
11117 sgot->contents + off);
11118 outrel.r_addend = 0;
11119 }
11120
11121 if (outrel.r_info != 0)
11122 {
11123 outrel.r_offset = (sgot->output_section->vma
11124 + sgot->output_offset
11125 + off);
11126 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11127 }
11128 h->got.offset |= 1;
11129 }
11130 value = sgot->output_offset + off;
11131 }
11132 else
11133 {
11134 bfd_vma off;
11135
11136 BFD_ASSERT (local_got_offsets != NULL
11137 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11138
11139 off = local_got_offsets[r_symndx];
11140
11141 /* The offset must always be a multiple of 4. We use the
11142 least significant bit to record whether we have already
11143 generated the necessary reloc. */
11144 if ((off & 1) != 0)
11145 off &= ~1;
11146 else
11147 {
11148 if (globals->use_rel)
11149 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11150
11151 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11152 {
11153 Elf_Internal_Rela outrel;
11154
11155 outrel.r_addend = addend + dynreloc_value;
11156 outrel.r_offset = (sgot->output_section->vma
11157 + sgot->output_offset
11158 + off);
11159 if (dynreloc_st_type == STT_GNU_IFUNC)
11160 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11161 else
11162 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11163 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11164 }
11165
11166 local_got_offsets[r_symndx] |= 1;
11167 }
11168
11169 value = sgot->output_offset + off;
11170 }
11171 if (r_type != R_ARM_GOT32)
11172 value += sgot->output_section->vma;
11173
11174 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11175 contents, rel->r_offset, value,
11176 rel->r_addend);
11177
11178 case R_ARM_TLS_LDO32:
11179 value = value - dtpoff_base (info);
11180
11181 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11182 contents, rel->r_offset, value,
11183 rel->r_addend);
11184
11185 case R_ARM_TLS_LDM32:
11186 {
11187 bfd_vma off;
11188
11189 if (sgot == NULL)
11190 abort ();
11191
11192 off = globals->tls_ldm_got.offset;
11193
11194 if ((off & 1) != 0)
11195 off &= ~1;
11196 else
11197 {
11198 /* If we don't know the module number, create a relocation
11199 for it. */
11200 if (bfd_link_pic (info))
11201 {
11202 Elf_Internal_Rela outrel;
11203
11204 if (srelgot == NULL)
11205 abort ();
11206
11207 outrel.r_addend = 0;
11208 outrel.r_offset = (sgot->output_section->vma
11209 + sgot->output_offset + off);
11210 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11211
11212 if (globals->use_rel)
11213 bfd_put_32 (output_bfd, outrel.r_addend,
11214 sgot->contents + off);
11215
11216 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11217 }
11218 else
11219 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11220
11221 globals->tls_ldm_got.offset |= 1;
11222 }
11223
11224 value = sgot->output_section->vma + sgot->output_offset + off
11225 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11226
11227 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11228 contents, rel->r_offset, value,
11229 rel->r_addend);
11230 }
11231
11232 case R_ARM_TLS_CALL:
11233 case R_ARM_THM_TLS_CALL:
11234 case R_ARM_TLS_GD32:
11235 case R_ARM_TLS_IE32:
11236 case R_ARM_TLS_GOTDESC:
11237 case R_ARM_TLS_DESCSEQ:
11238 case R_ARM_THM_TLS_DESCSEQ:
11239 {
11240 bfd_vma off, offplt;
11241 int indx = 0;
11242 char tls_type;
11243
11244 BFD_ASSERT (sgot != NULL);
11245
11246 if (h != NULL)
11247 {
11248 bfd_boolean dyn;
11249 dyn = globals->root.dynamic_sections_created;
11250 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11251 bfd_link_pic (info),
11252 h)
11253 && (!bfd_link_pic (info)
11254 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11255 {
11256 *unresolved_reloc_p = FALSE;
11257 indx = h->dynindx;
11258 }
11259 off = h->got.offset;
11260 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11261 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11262 }
11263 else
11264 {
11265 BFD_ASSERT (local_got_offsets != NULL);
11266 off = local_got_offsets[r_symndx];
11267 offplt = local_tlsdesc_gotents[r_symndx];
11268 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11269 }
11270
11271 /* Linker relaxations happens from one of the
11272 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11273 if (ELF32_R_TYPE(rel->r_info) != r_type)
11274 tls_type = GOT_TLS_IE;
11275
11276 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11277
11278 if ((off & 1) != 0)
11279 off &= ~1;
11280 else
11281 {
11282 bfd_boolean need_relocs = FALSE;
11283 Elf_Internal_Rela outrel;
11284 int cur_off = off;
11285
11286 /* The GOT entries have not been initialized yet. Do it
11287 now, and emit any relocations. If both an IE GOT and a
11288 GD GOT are necessary, we emit the GD first. */
11289
11290 if ((bfd_link_pic (info) || indx != 0)
11291 && (h == NULL
11292 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11293 || h->root.type != bfd_link_hash_undefweak))
11294 {
11295 need_relocs = TRUE;
11296 BFD_ASSERT (srelgot != NULL);
11297 }
11298
11299 if (tls_type & GOT_TLS_GDESC)
11300 {
11301 bfd_byte *loc;
11302
11303 /* We should have relaxed, unless this is an undefined
11304 weak symbol. */
11305 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11306 || bfd_link_pic (info));
11307 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11308 <= globals->root.sgotplt->size);
11309
11310 outrel.r_addend = 0;
11311 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11312 + globals->root.sgotplt->output_offset
11313 + offplt
11314 + globals->sgotplt_jump_table_size);
11315
11316 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11317 sreloc = globals->root.srelplt;
11318 loc = sreloc->contents;
11319 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11320 BFD_ASSERT (loc + RELOC_SIZE (globals)
11321 <= sreloc->contents + sreloc->size);
11322
11323 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11324
11325 /* For globals, the first word in the relocation gets
11326 the relocation index and the top bit set, or zero,
11327 if we're binding now. For locals, it gets the
11328 symbol's offset in the tls section. */
11329 bfd_put_32 (output_bfd,
11330 !h ? value - elf_hash_table (info)->tls_sec->vma
11331 : info->flags & DF_BIND_NOW ? 0
11332 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11333 globals->root.sgotplt->contents + offplt
11334 + globals->sgotplt_jump_table_size);
11335
11336 /* Second word in the relocation is always zero. */
11337 bfd_put_32 (output_bfd, 0,
11338 globals->root.sgotplt->contents + offplt
11339 + globals->sgotplt_jump_table_size + 4);
11340 }
11341 if (tls_type & GOT_TLS_GD)
11342 {
11343 if (need_relocs)
11344 {
11345 outrel.r_addend = 0;
11346 outrel.r_offset = (sgot->output_section->vma
11347 + sgot->output_offset
11348 + cur_off);
11349 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11350
11351 if (globals->use_rel)
11352 bfd_put_32 (output_bfd, outrel.r_addend,
11353 sgot->contents + cur_off);
11354
11355 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11356
11357 if (indx == 0)
11358 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11359 sgot->contents + cur_off + 4);
11360 else
11361 {
11362 outrel.r_addend = 0;
11363 outrel.r_info = ELF32_R_INFO (indx,
11364 R_ARM_TLS_DTPOFF32);
11365 outrel.r_offset += 4;
11366
11367 if (globals->use_rel)
11368 bfd_put_32 (output_bfd, outrel.r_addend,
11369 sgot->contents + cur_off + 4);
11370
11371 elf32_arm_add_dynreloc (output_bfd, info,
11372 srelgot, &outrel);
11373 }
11374 }
11375 else
11376 {
11377 /* If we are not emitting relocations for a
11378 general dynamic reference, then we must be in a
11379 static link or an executable link with the
11380 symbol binding locally. Mark it as belonging
11381 to module 1, the executable. */
11382 bfd_put_32 (output_bfd, 1,
11383 sgot->contents + cur_off);
11384 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11385 sgot->contents + cur_off + 4);
11386 }
11387
11388 cur_off += 8;
11389 }
11390
11391 if (tls_type & GOT_TLS_IE)
11392 {
11393 if (need_relocs)
11394 {
11395 if (indx == 0)
11396 outrel.r_addend = value - dtpoff_base (info);
11397 else
11398 outrel.r_addend = 0;
11399 outrel.r_offset = (sgot->output_section->vma
11400 + sgot->output_offset
11401 + cur_off);
11402 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11403
11404 if (globals->use_rel)
11405 bfd_put_32 (output_bfd, outrel.r_addend,
11406 sgot->contents + cur_off);
11407
11408 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11409 }
11410 else
11411 bfd_put_32 (output_bfd, tpoff (info, value),
11412 sgot->contents + cur_off);
11413 cur_off += 4;
11414 }
11415
11416 if (h != NULL)
11417 h->got.offset |= 1;
11418 else
11419 local_got_offsets[r_symndx] |= 1;
11420 }
11421
11422 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11423 off += 8;
11424 else if (tls_type & GOT_TLS_GDESC)
11425 off = offplt;
11426
11427 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11428 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11429 {
11430 bfd_signed_vma offset;
11431 /* TLS stubs are arm mode. The original symbol is a
11432 data object, so branch_type is bogus. */
11433 branch_type = ST_BRANCH_TO_ARM;
11434 enum elf32_arm_stub_type stub_type
11435 = arm_type_of_stub (info, input_section, rel,
11436 st_type, &branch_type,
11437 (struct elf32_arm_link_hash_entry *)h,
11438 globals->tls_trampoline, globals->root.splt,
11439 input_bfd, sym_name);
11440
11441 if (stub_type != arm_stub_none)
11442 {
11443 struct elf32_arm_stub_hash_entry *stub_entry
11444 = elf32_arm_get_stub_entry
11445 (input_section, globals->root.splt, 0, rel,
11446 globals, stub_type);
11447 offset = (stub_entry->stub_offset
11448 + stub_entry->stub_sec->output_offset
11449 + stub_entry->stub_sec->output_section->vma);
11450 }
11451 else
11452 offset = (globals->root.splt->output_section->vma
11453 + globals->root.splt->output_offset
11454 + globals->tls_trampoline);
11455
11456 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11457 {
11458 unsigned long inst;
11459
11460 offset -= (input_section->output_section->vma
11461 + input_section->output_offset
11462 + rel->r_offset + 8);
11463
11464 inst = offset >> 2;
11465 inst &= 0x00ffffff;
11466 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11467 }
11468 else
11469 {
11470 /* Thumb blx encodes the offset in a complicated
11471 fashion. */
11472 unsigned upper_insn, lower_insn;
11473 unsigned neg;
11474
11475 offset -= (input_section->output_section->vma
11476 + input_section->output_offset
11477 + rel->r_offset + 4);
11478
11479 if (stub_type != arm_stub_none
11480 && arm_stub_is_thumb (stub_type))
11481 {
11482 lower_insn = 0xd000;
11483 }
11484 else
11485 {
11486 lower_insn = 0xc000;
11487 /* Round up the offset to a word boundary. */
11488 offset = (offset + 2) & ~2;
11489 }
11490
11491 neg = offset < 0;
11492 upper_insn = (0xf000
11493 | ((offset >> 12) & 0x3ff)
11494 | (neg << 10));
11495 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11496 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11497 | ((offset >> 1) & 0x7ff);
11498 bfd_put_16 (input_bfd, upper_insn, hit_data);
11499 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11500 return bfd_reloc_ok;
11501 }
11502 }
11503 /* These relocations needs special care, as besides the fact
11504 they point somewhere in .gotplt, the addend must be
11505 adjusted accordingly depending on the type of instruction
11506 we refer to. */
11507 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11508 {
11509 unsigned long data, insn;
11510 unsigned thumb;
11511
11512 data = bfd_get_32 (input_bfd, hit_data);
11513 thumb = data & 1;
11514 data &= ~1u;
11515
11516 if (thumb)
11517 {
11518 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11519 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11520 insn = (insn << 16)
11521 | bfd_get_16 (input_bfd,
11522 contents + rel->r_offset - data + 2);
11523 if ((insn & 0xf800c000) == 0xf000c000)
11524 /* bl/blx */
11525 value = -6;
11526 else if ((insn & 0xffffff00) == 0x4400)
11527 /* add */
11528 value = -5;
11529 else
11530 {
11531 _bfd_error_handler
11532 /* xgettext:c-format */
11533 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11534 input_bfd, input_section,
11535 (unsigned long)rel->r_offset, insn);
11536 return bfd_reloc_notsupported;
11537 }
11538 }
11539 else
11540 {
11541 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11542
11543 switch (insn >> 24)
11544 {
11545 case 0xeb: /* bl */
11546 case 0xfa: /* blx */
11547 value = -4;
11548 break;
11549
11550 case 0xe0: /* add */
11551 value = -8;
11552 break;
11553
11554 default:
11555 _bfd_error_handler
11556 /* xgettext:c-format */
11557 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11558 input_bfd, input_section,
11559 (unsigned long)rel->r_offset, insn);
11560 return bfd_reloc_notsupported;
11561 }
11562 }
11563
11564 value += ((globals->root.sgotplt->output_section->vma
11565 + globals->root.sgotplt->output_offset + off)
11566 - (input_section->output_section->vma
11567 + input_section->output_offset
11568 + rel->r_offset)
11569 + globals->sgotplt_jump_table_size);
11570 }
11571 else
11572 value = ((globals->root.sgot->output_section->vma
11573 + globals->root.sgot->output_offset + off)
11574 - (input_section->output_section->vma
11575 + input_section->output_offset + rel->r_offset));
11576
11577 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11578 contents, rel->r_offset, value,
11579 rel->r_addend);
11580 }
11581
11582 case R_ARM_TLS_LE32:
11583 if (bfd_link_dll (info))
11584 {
11585 _bfd_error_handler
11586 /* xgettext:c-format */
11587 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11588 input_bfd, input_section,
11589 (long) rel->r_offset, howto->name);
11590 return bfd_reloc_notsupported;
11591 }
11592 else
11593 value = tpoff (info, value);
11594
11595 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11596 contents, rel->r_offset, value,
11597 rel->r_addend);
11598
11599 case R_ARM_V4BX:
11600 if (globals->fix_v4bx)
11601 {
11602 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11603
11604 /* Ensure that we have a BX instruction. */
11605 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11606
11607 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11608 {
11609 /* Branch to veneer. */
11610 bfd_vma glue_addr;
11611 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11612 glue_addr -= input_section->output_section->vma
11613 + input_section->output_offset
11614 + rel->r_offset + 8;
11615 insn = (insn & 0xf0000000) | 0x0a000000
11616 | ((glue_addr >> 2) & 0x00ffffff);
11617 }
11618 else
11619 {
11620 /* Preserve Rm (lowest four bits) and the condition code
11621 (highest four bits). Other bits encode MOV PC,Rm. */
11622 insn = (insn & 0xf000000f) | 0x01a0f000;
11623 }
11624
11625 bfd_put_32 (input_bfd, insn, hit_data);
11626 }
11627 return bfd_reloc_ok;
11628
11629 case R_ARM_MOVW_ABS_NC:
11630 case R_ARM_MOVT_ABS:
11631 case R_ARM_MOVW_PREL_NC:
11632 case R_ARM_MOVT_PREL:
11633 /* Until we properly support segment-base-relative addressing then
11634 we assume the segment base to be zero, as for the group relocations.
11635 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11636 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11637 case R_ARM_MOVW_BREL_NC:
11638 case R_ARM_MOVW_BREL:
11639 case R_ARM_MOVT_BREL:
11640 {
11641 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11642
11643 if (globals->use_rel)
11644 {
11645 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11646 signed_addend = (addend ^ 0x8000) - 0x8000;
11647 }
11648
11649 value += signed_addend;
11650
11651 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11652 value -= (input_section->output_section->vma
11653 + input_section->output_offset + rel->r_offset);
11654
11655 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11656 return bfd_reloc_overflow;
11657
11658 if (branch_type == ST_BRANCH_TO_THUMB)
11659 value |= 1;
11660
11661 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11662 || r_type == R_ARM_MOVT_BREL)
11663 value >>= 16;
11664
11665 insn &= 0xfff0f000;
11666 insn |= value & 0xfff;
11667 insn |= (value & 0xf000) << 4;
11668 bfd_put_32 (input_bfd, insn, hit_data);
11669 }
11670 return bfd_reloc_ok;
11671
11672 case R_ARM_THM_MOVW_ABS_NC:
11673 case R_ARM_THM_MOVT_ABS:
11674 case R_ARM_THM_MOVW_PREL_NC:
11675 case R_ARM_THM_MOVT_PREL:
11676 /* Until we properly support segment-base-relative addressing then
11677 we assume the segment base to be zero, as for the above relocations.
11678 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11679 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11680 as R_ARM_THM_MOVT_ABS. */
11681 case R_ARM_THM_MOVW_BREL_NC:
11682 case R_ARM_THM_MOVW_BREL:
11683 case R_ARM_THM_MOVT_BREL:
11684 {
11685 bfd_vma insn;
11686
11687 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11688 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11689
11690 if (globals->use_rel)
11691 {
11692 addend = ((insn >> 4) & 0xf000)
11693 | ((insn >> 15) & 0x0800)
11694 | ((insn >> 4) & 0x0700)
11695 | (insn & 0x00ff);
11696 signed_addend = (addend ^ 0x8000) - 0x8000;
11697 }
11698
11699 value += signed_addend;
11700
11701 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11702 value -= (input_section->output_section->vma
11703 + input_section->output_offset + rel->r_offset);
11704
11705 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11706 return bfd_reloc_overflow;
11707
11708 if (branch_type == ST_BRANCH_TO_THUMB)
11709 value |= 1;
11710
11711 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11712 || r_type == R_ARM_THM_MOVT_BREL)
11713 value >>= 16;
11714
11715 insn &= 0xfbf08f00;
11716 insn |= (value & 0xf000) << 4;
11717 insn |= (value & 0x0800) << 15;
11718 insn |= (value & 0x0700) << 4;
11719 insn |= (value & 0x00ff);
11720
11721 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11722 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11723 }
11724 return bfd_reloc_ok;
11725
11726 case R_ARM_ALU_PC_G0_NC:
11727 case R_ARM_ALU_PC_G1_NC:
11728 case R_ARM_ALU_PC_G0:
11729 case R_ARM_ALU_PC_G1:
11730 case R_ARM_ALU_PC_G2:
11731 case R_ARM_ALU_SB_G0_NC:
11732 case R_ARM_ALU_SB_G1_NC:
11733 case R_ARM_ALU_SB_G0:
11734 case R_ARM_ALU_SB_G1:
11735 case R_ARM_ALU_SB_G2:
11736 {
11737 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11738 bfd_vma pc = input_section->output_section->vma
11739 + input_section->output_offset + rel->r_offset;
11740 /* sb is the origin of the *segment* containing the symbol. */
11741 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11742 bfd_vma residual;
11743 bfd_vma g_n;
11744 bfd_signed_vma signed_value;
11745 int group = 0;
11746
11747 /* Determine which group of bits to select. */
11748 switch (r_type)
11749 {
11750 case R_ARM_ALU_PC_G0_NC:
11751 case R_ARM_ALU_PC_G0:
11752 case R_ARM_ALU_SB_G0_NC:
11753 case R_ARM_ALU_SB_G0:
11754 group = 0;
11755 break;
11756
11757 case R_ARM_ALU_PC_G1_NC:
11758 case R_ARM_ALU_PC_G1:
11759 case R_ARM_ALU_SB_G1_NC:
11760 case R_ARM_ALU_SB_G1:
11761 group = 1;
11762 break;
11763
11764 case R_ARM_ALU_PC_G2:
11765 case R_ARM_ALU_SB_G2:
11766 group = 2;
11767 break;
11768
11769 default:
11770 abort ();
11771 }
11772
11773 /* If REL, extract the addend from the insn. If RELA, it will
11774 have already been fetched for us. */
11775 if (globals->use_rel)
11776 {
11777 int negative;
11778 bfd_vma constant = insn & 0xff;
11779 bfd_vma rotation = (insn & 0xf00) >> 8;
11780
11781 if (rotation == 0)
11782 signed_addend = constant;
11783 else
11784 {
11785 /* Compensate for the fact that in the instruction, the
11786 rotation is stored in multiples of 2 bits. */
11787 rotation *= 2;
11788
11789 /* Rotate "constant" right by "rotation" bits. */
11790 signed_addend = (constant >> rotation) |
11791 (constant << (8 * sizeof (bfd_vma) - rotation));
11792 }
11793
11794 /* Determine if the instruction is an ADD or a SUB.
11795 (For REL, this determines the sign of the addend.) */
11796 negative = identify_add_or_sub (insn);
11797 if (negative == 0)
11798 {
11799 _bfd_error_handler
11800 /* xgettext:c-format */
11801 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11802 input_bfd, input_section,
11803 (long) rel->r_offset, howto->name);
11804 return bfd_reloc_overflow;
11805 }
11806
11807 signed_addend *= negative;
11808 }
11809
11810 /* Compute the value (X) to go in the place. */
11811 if (r_type == R_ARM_ALU_PC_G0_NC
11812 || r_type == R_ARM_ALU_PC_G1_NC
11813 || r_type == R_ARM_ALU_PC_G0
11814 || r_type == R_ARM_ALU_PC_G1
11815 || r_type == R_ARM_ALU_PC_G2)
11816 /* PC relative. */
11817 signed_value = value - pc + signed_addend;
11818 else
11819 /* Section base relative. */
11820 signed_value = value - sb + signed_addend;
11821
11822 /* If the target symbol is a Thumb function, then set the
11823 Thumb bit in the address. */
11824 if (branch_type == ST_BRANCH_TO_THUMB)
11825 signed_value |= 1;
11826
11827 /* Calculate the value of the relevant G_n, in encoded
11828 constant-with-rotation format. */
11829 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11830 group, &residual);
11831
11832 /* Check for overflow if required. */
11833 if ((r_type == R_ARM_ALU_PC_G0
11834 || r_type == R_ARM_ALU_PC_G1
11835 || r_type == R_ARM_ALU_PC_G2
11836 || r_type == R_ARM_ALU_SB_G0
11837 || r_type == R_ARM_ALU_SB_G1
11838 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11839 {
11840 _bfd_error_handler
11841 /* xgettext:c-format */
11842 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11843 input_bfd, input_section,
11844 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11845 howto->name);
11846 return bfd_reloc_overflow;
11847 }
11848
11849 /* Mask out the value and the ADD/SUB part of the opcode; take care
11850 not to destroy the S bit. */
11851 insn &= 0xff1ff000;
11852
11853 /* Set the opcode according to whether the value to go in the
11854 place is negative. */
11855 if (signed_value < 0)
11856 insn |= 1 << 22;
11857 else
11858 insn |= 1 << 23;
11859
11860 /* Encode the offset. */
11861 insn |= g_n;
11862
11863 bfd_put_32 (input_bfd, insn, hit_data);
11864 }
11865 return bfd_reloc_ok;
11866
11867 case R_ARM_LDR_PC_G0:
11868 case R_ARM_LDR_PC_G1:
11869 case R_ARM_LDR_PC_G2:
11870 case R_ARM_LDR_SB_G0:
11871 case R_ARM_LDR_SB_G1:
11872 case R_ARM_LDR_SB_G2:
11873 {
11874 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11875 bfd_vma pc = input_section->output_section->vma
11876 + input_section->output_offset + rel->r_offset;
11877 /* sb is the origin of the *segment* containing the symbol. */
11878 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11879 bfd_vma residual;
11880 bfd_signed_vma signed_value;
11881 int group = 0;
11882
11883 /* Determine which groups of bits to calculate. */
11884 switch (r_type)
11885 {
11886 case R_ARM_LDR_PC_G0:
11887 case R_ARM_LDR_SB_G0:
11888 group = 0;
11889 break;
11890
11891 case R_ARM_LDR_PC_G1:
11892 case R_ARM_LDR_SB_G1:
11893 group = 1;
11894 break;
11895
11896 case R_ARM_LDR_PC_G2:
11897 case R_ARM_LDR_SB_G2:
11898 group = 2;
11899 break;
11900
11901 default:
11902 abort ();
11903 }
11904
11905 /* If REL, extract the addend from the insn. If RELA, it will
11906 have already been fetched for us. */
11907 if (globals->use_rel)
11908 {
11909 int negative = (insn & (1 << 23)) ? 1 : -1;
11910 signed_addend = negative * (insn & 0xfff);
11911 }
11912
11913 /* Compute the value (X) to go in the place. */
11914 if (r_type == R_ARM_LDR_PC_G0
11915 || r_type == R_ARM_LDR_PC_G1
11916 || r_type == R_ARM_LDR_PC_G2)
11917 /* PC relative. */
11918 signed_value = value - pc + signed_addend;
11919 else
11920 /* Section base relative. */
11921 signed_value = value - sb + signed_addend;
11922
11923 /* Calculate the value of the relevant G_{n-1} to obtain
11924 the residual at that stage. */
11925 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11926 group - 1, &residual);
11927
11928 /* Check for overflow. */
11929 if (residual >= 0x1000)
11930 {
11931 _bfd_error_handler
11932 /* xgettext:c-format */
11933 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11934 input_bfd, input_section,
11935 (long) rel->r_offset, labs (signed_value), howto->name);
11936 return bfd_reloc_overflow;
11937 }
11938
11939 /* Mask out the value and U bit. */
11940 insn &= 0xff7ff000;
11941
11942 /* Set the U bit if the value to go in the place is non-negative. */
11943 if (signed_value >= 0)
11944 insn |= 1 << 23;
11945
11946 /* Encode the offset. */
11947 insn |= residual;
11948
11949 bfd_put_32 (input_bfd, insn, hit_data);
11950 }
11951 return bfd_reloc_ok;
11952
11953 case R_ARM_LDRS_PC_G0:
11954 case R_ARM_LDRS_PC_G1:
11955 case R_ARM_LDRS_PC_G2:
11956 case R_ARM_LDRS_SB_G0:
11957 case R_ARM_LDRS_SB_G1:
11958 case R_ARM_LDRS_SB_G2:
11959 {
11960 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11961 bfd_vma pc = input_section->output_section->vma
11962 + input_section->output_offset + rel->r_offset;
11963 /* sb is the origin of the *segment* containing the symbol. */
11964 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11965 bfd_vma residual;
11966 bfd_signed_vma signed_value;
11967 int group = 0;
11968
11969 /* Determine which groups of bits to calculate. */
11970 switch (r_type)
11971 {
11972 case R_ARM_LDRS_PC_G0:
11973 case R_ARM_LDRS_SB_G0:
11974 group = 0;
11975 break;
11976
11977 case R_ARM_LDRS_PC_G1:
11978 case R_ARM_LDRS_SB_G1:
11979 group = 1;
11980 break;
11981
11982 case R_ARM_LDRS_PC_G2:
11983 case R_ARM_LDRS_SB_G2:
11984 group = 2;
11985 break;
11986
11987 default:
11988 abort ();
11989 }
11990
11991 /* If REL, extract the addend from the insn. If RELA, it will
11992 have already been fetched for us. */
11993 if (globals->use_rel)
11994 {
11995 int negative = (insn & (1 << 23)) ? 1 : -1;
11996 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11997 }
11998
11999 /* Compute the value (X) to go in the place. */
12000 if (r_type == R_ARM_LDRS_PC_G0
12001 || r_type == R_ARM_LDRS_PC_G1
12002 || r_type == R_ARM_LDRS_PC_G2)
12003 /* PC relative. */
12004 signed_value = value - pc + signed_addend;
12005 else
12006 /* Section base relative. */
12007 signed_value = value - sb + signed_addend;
12008
12009 /* Calculate the value of the relevant G_{n-1} to obtain
12010 the residual at that stage. */
12011 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12012 group - 1, &residual);
12013
12014 /* Check for overflow. */
12015 if (residual >= 0x100)
12016 {
12017 _bfd_error_handler
12018 /* xgettext:c-format */
12019 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12020 input_bfd, input_section,
12021 (long) rel->r_offset, labs (signed_value), howto->name);
12022 return bfd_reloc_overflow;
12023 }
12024
12025 /* Mask out the value and U bit. */
12026 insn &= 0xff7ff0f0;
12027
12028 /* Set the U bit if the value to go in the place is non-negative. */
12029 if (signed_value >= 0)
12030 insn |= 1 << 23;
12031
12032 /* Encode the offset. */
12033 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12034
12035 bfd_put_32 (input_bfd, insn, hit_data);
12036 }
12037 return bfd_reloc_ok;
12038
12039 case R_ARM_LDC_PC_G0:
12040 case R_ARM_LDC_PC_G1:
12041 case R_ARM_LDC_PC_G2:
12042 case R_ARM_LDC_SB_G0:
12043 case R_ARM_LDC_SB_G1:
12044 case R_ARM_LDC_SB_G2:
12045 {
12046 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12047 bfd_vma pc = input_section->output_section->vma
12048 + input_section->output_offset + rel->r_offset;
12049 /* sb is the origin of the *segment* containing the symbol. */
12050 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12051 bfd_vma residual;
12052 bfd_signed_vma signed_value;
12053 int group = 0;
12054
12055 /* Determine which groups of bits to calculate. */
12056 switch (r_type)
12057 {
12058 case R_ARM_LDC_PC_G0:
12059 case R_ARM_LDC_SB_G0:
12060 group = 0;
12061 break;
12062
12063 case R_ARM_LDC_PC_G1:
12064 case R_ARM_LDC_SB_G1:
12065 group = 1;
12066 break;
12067
12068 case R_ARM_LDC_PC_G2:
12069 case R_ARM_LDC_SB_G2:
12070 group = 2;
12071 break;
12072
12073 default:
12074 abort ();
12075 }
12076
12077 /* If REL, extract the addend from the insn. If RELA, it will
12078 have already been fetched for us. */
12079 if (globals->use_rel)
12080 {
12081 int negative = (insn & (1 << 23)) ? 1 : -1;
12082 signed_addend = negative * ((insn & 0xff) << 2);
12083 }
12084
12085 /* Compute the value (X) to go in the place. */
12086 if (r_type == R_ARM_LDC_PC_G0
12087 || r_type == R_ARM_LDC_PC_G1
12088 || r_type == R_ARM_LDC_PC_G2)
12089 /* PC relative. */
12090 signed_value = value - pc + signed_addend;
12091 else
12092 /* Section base relative. */
12093 signed_value = value - sb + signed_addend;
12094
12095 /* Calculate the value of the relevant G_{n-1} to obtain
12096 the residual at that stage. */
12097 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12098 group - 1, &residual);
12099
12100 /* Check for overflow. (The absolute value to go in the place must be
12101 divisible by four and, after having been divided by four, must
12102 fit in eight bits.) */
12103 if ((residual & 0x3) != 0 || residual >= 0x400)
12104 {
12105 _bfd_error_handler
12106 /* xgettext:c-format */
12107 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12108 input_bfd, input_section,
12109 (long) rel->r_offset, labs (signed_value), howto->name);
12110 return bfd_reloc_overflow;
12111 }
12112
12113 /* Mask out the value and U bit. */
12114 insn &= 0xff7fff00;
12115
12116 /* Set the U bit if the value to go in the place is non-negative. */
12117 if (signed_value >= 0)
12118 insn |= 1 << 23;
12119
12120 /* Encode the offset. */
12121 insn |= residual >> 2;
12122
12123 bfd_put_32 (input_bfd, insn, hit_data);
12124 }
12125 return bfd_reloc_ok;
12126
12127 case R_ARM_THM_ALU_ABS_G0_NC:
12128 case R_ARM_THM_ALU_ABS_G1_NC:
12129 case R_ARM_THM_ALU_ABS_G2_NC:
12130 case R_ARM_THM_ALU_ABS_G3_NC:
12131 {
12132 const int shift_array[4] = {0, 8, 16, 24};
12133 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12134 bfd_vma addr = value;
12135 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12136
12137 /* Compute address. */
12138 if (globals->use_rel)
12139 signed_addend = insn & 0xff;
12140 addr += signed_addend;
12141 if (branch_type == ST_BRANCH_TO_THUMB)
12142 addr |= 1;
12143 /* Clean imm8 insn. */
12144 insn &= 0xff00;
12145 /* And update with correct part of address. */
12146 insn |= (addr >> shift) & 0xff;
12147 /* Update insn. */
12148 bfd_put_16 (input_bfd, insn, hit_data);
12149 }
12150
12151 *unresolved_reloc_p = FALSE;
12152 return bfd_reloc_ok;
12153
12154 default:
12155 return bfd_reloc_notsupported;
12156 }
12157 }
12158
12159 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12160 static void
12161 arm_add_to_rel (bfd * abfd,
12162 bfd_byte * address,
12163 reloc_howto_type * howto,
12164 bfd_signed_vma increment)
12165 {
12166 bfd_signed_vma addend;
12167
12168 if (howto->type == R_ARM_THM_CALL
12169 || howto->type == R_ARM_THM_JUMP24)
12170 {
12171 int upper_insn, lower_insn;
12172 int upper, lower;
12173
12174 upper_insn = bfd_get_16 (abfd, address);
12175 lower_insn = bfd_get_16 (abfd, address + 2);
12176 upper = upper_insn & 0x7ff;
12177 lower = lower_insn & 0x7ff;
12178
12179 addend = (upper << 12) | (lower << 1);
12180 addend += increment;
12181 addend >>= 1;
12182
12183 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12184 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12185
12186 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12187 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12188 }
12189 else
12190 {
12191 bfd_vma contents;
12192
12193 contents = bfd_get_32 (abfd, address);
12194
12195 /* Get the (signed) value from the instruction. */
12196 addend = contents & howto->src_mask;
12197 if (addend & ((howto->src_mask + 1) >> 1))
12198 {
12199 bfd_signed_vma mask;
12200
12201 mask = -1;
12202 mask &= ~ howto->src_mask;
12203 addend |= mask;
12204 }
12205
12206 /* Add in the increment, (which is a byte value). */
12207 switch (howto->type)
12208 {
12209 default:
12210 addend += increment;
12211 break;
12212
12213 case R_ARM_PC24:
12214 case R_ARM_PLT32:
12215 case R_ARM_CALL:
12216 case R_ARM_JUMP24:
12217 addend <<= howto->size;
12218 addend += increment;
12219
12220 /* Should we check for overflow here ? */
12221
12222 /* Drop any undesired bits. */
12223 addend >>= howto->rightshift;
12224 break;
12225 }
12226
12227 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12228
12229 bfd_put_32 (abfd, contents, address);
12230 }
12231 }
12232
12233 #define IS_ARM_TLS_RELOC(R_TYPE) \
12234 ((R_TYPE) == R_ARM_TLS_GD32 \
12235 || (R_TYPE) == R_ARM_TLS_LDO32 \
12236 || (R_TYPE) == R_ARM_TLS_LDM32 \
12237 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12238 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12239 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12240 || (R_TYPE) == R_ARM_TLS_LE32 \
12241 || (R_TYPE) == R_ARM_TLS_IE32 \
12242 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12243
12244 /* Specific set of relocations for the gnu tls dialect. */
12245 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12246 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12247 || (R_TYPE) == R_ARM_TLS_CALL \
12248 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12249 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12250 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12251
12252 /* Relocate an ARM ELF section. */
12253
12254 static bfd_boolean
12255 elf32_arm_relocate_section (bfd * output_bfd,
12256 struct bfd_link_info * info,
12257 bfd * input_bfd,
12258 asection * input_section,
12259 bfd_byte * contents,
12260 Elf_Internal_Rela * relocs,
12261 Elf_Internal_Sym * local_syms,
12262 asection ** local_sections)
12263 {
12264 Elf_Internal_Shdr *symtab_hdr;
12265 struct elf_link_hash_entry **sym_hashes;
12266 Elf_Internal_Rela *rel;
12267 Elf_Internal_Rela *relend;
12268 const char *name;
12269 struct elf32_arm_link_hash_table * globals;
12270
12271 globals = elf32_arm_hash_table (info);
12272 if (globals == NULL)
12273 return FALSE;
12274
12275 symtab_hdr = & elf_symtab_hdr (input_bfd);
12276 sym_hashes = elf_sym_hashes (input_bfd);
12277
12278 rel = relocs;
12279 relend = relocs + input_section->reloc_count;
12280 for (; rel < relend; rel++)
12281 {
12282 int r_type;
12283 reloc_howto_type * howto;
12284 unsigned long r_symndx;
12285 Elf_Internal_Sym * sym;
12286 asection * sec;
12287 struct elf_link_hash_entry * h;
12288 bfd_vma relocation;
12289 bfd_reloc_status_type r;
12290 arelent bfd_reloc;
12291 char sym_type;
12292 bfd_boolean unresolved_reloc = FALSE;
12293 char *error_message = NULL;
12294
12295 r_symndx = ELF32_R_SYM (rel->r_info);
12296 r_type = ELF32_R_TYPE (rel->r_info);
12297 r_type = arm_real_reloc_type (globals, r_type);
12298
12299 if ( r_type == R_ARM_GNU_VTENTRY
12300 || r_type == R_ARM_GNU_VTINHERIT)
12301 continue;
12302
12303 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12304 howto = bfd_reloc.howto;
12305
12306 h = NULL;
12307 sym = NULL;
12308 sec = NULL;
12309
12310 if (r_symndx < symtab_hdr->sh_info)
12311 {
12312 sym = local_syms + r_symndx;
12313 sym_type = ELF32_ST_TYPE (sym->st_info);
12314 sec = local_sections[r_symndx];
12315
12316 /* An object file might have a reference to a local
12317 undefined symbol. This is a daft object file, but we
12318 should at least do something about it. V4BX & NONE
12319 relocations do not use the symbol and are explicitly
12320 allowed to use the undefined symbol, so allow those.
12321 Likewise for relocations against STN_UNDEF. */
12322 if (r_type != R_ARM_V4BX
12323 && r_type != R_ARM_NONE
12324 && r_symndx != STN_UNDEF
12325 && bfd_is_und_section (sec)
12326 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12327 (*info->callbacks->undefined_symbol)
12328 (info, bfd_elf_string_from_elf_section
12329 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12330 input_bfd, input_section,
12331 rel->r_offset, TRUE);
12332
12333 if (globals->use_rel)
12334 {
12335 relocation = (sec->output_section->vma
12336 + sec->output_offset
12337 + sym->st_value);
12338 if (!bfd_link_relocatable (info)
12339 && (sec->flags & SEC_MERGE)
12340 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12341 {
12342 asection *msec;
12343 bfd_vma addend, value;
12344
12345 switch (r_type)
12346 {
12347 case R_ARM_MOVW_ABS_NC:
12348 case R_ARM_MOVT_ABS:
12349 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12350 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12351 addend = (addend ^ 0x8000) - 0x8000;
12352 break;
12353
12354 case R_ARM_THM_MOVW_ABS_NC:
12355 case R_ARM_THM_MOVT_ABS:
12356 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12357 << 16;
12358 value |= bfd_get_16 (input_bfd,
12359 contents + rel->r_offset + 2);
12360 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12361 | ((value & 0x04000000) >> 15);
12362 addend = (addend ^ 0x8000) - 0x8000;
12363 break;
12364
12365 default:
12366 if (howto->rightshift
12367 || (howto->src_mask & (howto->src_mask + 1)))
12368 {
12369 _bfd_error_handler
12370 /* xgettext:c-format */
12371 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12372 input_bfd, input_section,
12373 (long) rel->r_offset, howto->name);
12374 return FALSE;
12375 }
12376
12377 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12378
12379 /* Get the (signed) value from the instruction. */
12380 addend = value & howto->src_mask;
12381 if (addend & ((howto->src_mask + 1) >> 1))
12382 {
12383 bfd_signed_vma mask;
12384
12385 mask = -1;
12386 mask &= ~ howto->src_mask;
12387 addend |= mask;
12388 }
12389 break;
12390 }
12391
12392 msec = sec;
12393 addend =
12394 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12395 - relocation;
12396 addend += msec->output_section->vma + msec->output_offset;
12397
12398 /* Cases here must match those in the preceding
12399 switch statement. */
12400 switch (r_type)
12401 {
12402 case R_ARM_MOVW_ABS_NC:
12403 case R_ARM_MOVT_ABS:
12404 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12405 | (addend & 0xfff);
12406 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12407 break;
12408
12409 case R_ARM_THM_MOVW_ABS_NC:
12410 case R_ARM_THM_MOVT_ABS:
12411 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12412 | (addend & 0xff) | ((addend & 0x0800) << 15);
12413 bfd_put_16 (input_bfd, value >> 16,
12414 contents + rel->r_offset);
12415 bfd_put_16 (input_bfd, value,
12416 contents + rel->r_offset + 2);
12417 break;
12418
12419 default:
12420 value = (value & ~ howto->dst_mask)
12421 | (addend & howto->dst_mask);
12422 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12423 break;
12424 }
12425 }
12426 }
12427 else
12428 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12429 }
12430 else
12431 {
12432 bfd_boolean warned, ignored;
12433
12434 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12435 r_symndx, symtab_hdr, sym_hashes,
12436 h, sec, relocation,
12437 unresolved_reloc, warned, ignored);
12438
12439 sym_type = h->type;
12440 }
12441
12442 if (sec != NULL && discarded_section (sec))
12443 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12444 rel, 1, relend, howto, 0, contents);
12445
12446 if (bfd_link_relocatable (info))
12447 {
12448 /* This is a relocatable link. We don't have to change
12449 anything, unless the reloc is against a section symbol,
12450 in which case we have to adjust according to where the
12451 section symbol winds up in the output section. */
12452 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12453 {
12454 if (globals->use_rel)
12455 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12456 howto, (bfd_signed_vma) sec->output_offset);
12457 else
12458 rel->r_addend += sec->output_offset;
12459 }
12460 continue;
12461 }
12462
12463 if (h != NULL)
12464 name = h->root.root.string;
12465 else
12466 {
12467 name = (bfd_elf_string_from_elf_section
12468 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12469 if (name == NULL || *name == '\0')
12470 name = bfd_section_name (input_bfd, sec);
12471 }
12472
12473 if (r_symndx != STN_UNDEF
12474 && r_type != R_ARM_NONE
12475 && (h == NULL
12476 || h->root.type == bfd_link_hash_defined
12477 || h->root.type == bfd_link_hash_defweak)
12478 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12479 {
12480 _bfd_error_handler
12481 ((sym_type == STT_TLS
12482 /* xgettext:c-format */
12483 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12484 /* xgettext:c-format */
12485 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12486 input_bfd,
12487 input_section,
12488 (long) rel->r_offset,
12489 howto->name,
12490 name);
12491 }
12492
12493 /* We call elf32_arm_final_link_relocate unless we're completely
12494 done, i.e., the relaxation produced the final output we want,
12495 and we won't let anybody mess with it. Also, we have to do
12496 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12497 both in relaxed and non-relaxed cases. */
12498 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12499 || (IS_ARM_TLS_GNU_RELOC (r_type)
12500 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12501 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12502 & GOT_TLS_GDESC)))
12503 {
12504 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12505 contents, rel, h == NULL);
12506 /* This may have been marked unresolved because it came from
12507 a shared library. But we've just dealt with that. */
12508 unresolved_reloc = 0;
12509 }
12510 else
12511 r = bfd_reloc_continue;
12512
12513 if (r == bfd_reloc_continue)
12514 {
12515 unsigned char branch_type =
12516 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12517 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12518
12519 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12520 input_section, contents, rel,
12521 relocation, info, sec, name,
12522 sym_type, branch_type, h,
12523 &unresolved_reloc,
12524 &error_message);
12525 }
12526
12527 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12528 because such sections are not SEC_ALLOC and thus ld.so will
12529 not process them. */
12530 if (unresolved_reloc
12531 && !((input_section->flags & SEC_DEBUGGING) != 0
12532 && h->def_dynamic)
12533 && _bfd_elf_section_offset (output_bfd, info, input_section,
12534 rel->r_offset) != (bfd_vma) -1)
12535 {
12536 _bfd_error_handler
12537 /* xgettext:c-format */
12538 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12539 input_bfd,
12540 input_section,
12541 (long) rel->r_offset,
12542 howto->name,
12543 h->root.root.string);
12544 return FALSE;
12545 }
12546
12547 if (r != bfd_reloc_ok)
12548 {
12549 switch (r)
12550 {
12551 case bfd_reloc_overflow:
12552 /* If the overflowing reloc was to an undefined symbol,
12553 we have already printed one error message and there
12554 is no point complaining again. */
12555 if (!h || h->root.type != bfd_link_hash_undefined)
12556 (*info->callbacks->reloc_overflow)
12557 (info, (h ? &h->root : NULL), name, howto->name,
12558 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12559 break;
12560
12561 case bfd_reloc_undefined:
12562 (*info->callbacks->undefined_symbol)
12563 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12564 break;
12565
12566 case bfd_reloc_outofrange:
12567 error_message = _("out of range");
12568 goto common_error;
12569
12570 case bfd_reloc_notsupported:
12571 error_message = _("unsupported relocation");
12572 goto common_error;
12573
12574 case bfd_reloc_dangerous:
12575 /* error_message should already be set. */
12576 goto common_error;
12577
12578 default:
12579 error_message = _("unknown error");
12580 /* Fall through. */
12581
12582 common_error:
12583 BFD_ASSERT (error_message != NULL);
12584 (*info->callbacks->reloc_dangerous)
12585 (info, error_message, input_bfd, input_section, rel->r_offset);
12586 break;
12587 }
12588 }
12589 }
12590
12591 return TRUE;
12592 }
12593
12594 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12595 adds the edit to the start of the list. (The list must be built in order of
12596 ascending TINDEX: the function's callers are primarily responsible for
12597 maintaining that condition). */
12598
12599 static void
12600 add_unwind_table_edit (arm_unwind_table_edit **head,
12601 arm_unwind_table_edit **tail,
12602 arm_unwind_edit_type type,
12603 asection *linked_section,
12604 unsigned int tindex)
12605 {
12606 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12607 xmalloc (sizeof (arm_unwind_table_edit));
12608
12609 new_edit->type = type;
12610 new_edit->linked_section = linked_section;
12611 new_edit->index = tindex;
12612
12613 if (tindex > 0)
12614 {
12615 new_edit->next = NULL;
12616
12617 if (*tail)
12618 (*tail)->next = new_edit;
12619
12620 (*tail) = new_edit;
12621
12622 if (!*head)
12623 (*head) = new_edit;
12624 }
12625 else
12626 {
12627 new_edit->next = *head;
12628
12629 if (!*tail)
12630 *tail = new_edit;
12631
12632 *head = new_edit;
12633 }
12634 }
12635
12636 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12637
12638 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12639 static void
12640 adjust_exidx_size(asection *exidx_sec, int adjust)
12641 {
12642 asection *out_sec;
12643
12644 if (!exidx_sec->rawsize)
12645 exidx_sec->rawsize = exidx_sec->size;
12646
12647 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12648 out_sec = exidx_sec->output_section;
12649 /* Adjust size of output section. */
12650 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12651 }
12652
12653 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12654 static void
12655 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12656 {
12657 struct _arm_elf_section_data *exidx_arm_data;
12658
12659 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12660 add_unwind_table_edit (
12661 &exidx_arm_data->u.exidx.unwind_edit_list,
12662 &exidx_arm_data->u.exidx.unwind_edit_tail,
12663 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12664
12665 exidx_arm_data->additional_reloc_count++;
12666
12667 adjust_exidx_size(exidx_sec, 8);
12668 }
12669
12670 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12671 made to those tables, such that:
12672
12673 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12674 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12675 codes which have been inlined into the index).
12676
12677 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12678
12679 The edits are applied when the tables are written
12680 (in elf32_arm_write_section). */
12681
12682 bfd_boolean
12683 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12684 unsigned int num_text_sections,
12685 struct bfd_link_info *info,
12686 bfd_boolean merge_exidx_entries)
12687 {
12688 bfd *inp;
12689 unsigned int last_second_word = 0, i;
12690 asection *last_exidx_sec = NULL;
12691 asection *last_text_sec = NULL;
12692 int last_unwind_type = -1;
12693
12694 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12695 text sections. */
12696 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12697 {
12698 asection *sec;
12699
12700 for (sec = inp->sections; sec != NULL; sec = sec->next)
12701 {
12702 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12703 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12704
12705 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12706 continue;
12707
12708 if (elf_sec->linked_to)
12709 {
12710 Elf_Internal_Shdr *linked_hdr
12711 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12712 struct _arm_elf_section_data *linked_sec_arm_data
12713 = get_arm_elf_section_data (linked_hdr->bfd_section);
12714
12715 if (linked_sec_arm_data == NULL)
12716 continue;
12717
12718 /* Link this .ARM.exidx section back from the text section it
12719 describes. */
12720 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12721 }
12722 }
12723 }
12724
12725 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12726 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12727 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12728
12729 for (i = 0; i < num_text_sections; i++)
12730 {
12731 asection *sec = text_section_order[i];
12732 asection *exidx_sec;
12733 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12734 struct _arm_elf_section_data *exidx_arm_data;
12735 bfd_byte *contents = NULL;
12736 int deleted_exidx_bytes = 0;
12737 bfd_vma j;
12738 arm_unwind_table_edit *unwind_edit_head = NULL;
12739 arm_unwind_table_edit *unwind_edit_tail = NULL;
12740 Elf_Internal_Shdr *hdr;
12741 bfd *ibfd;
12742
12743 if (arm_data == NULL)
12744 continue;
12745
12746 exidx_sec = arm_data->u.text.arm_exidx_sec;
12747 if (exidx_sec == NULL)
12748 {
12749 /* Section has no unwind data. */
12750 if (last_unwind_type == 0 || !last_exidx_sec)
12751 continue;
12752
12753 /* Ignore zero sized sections. */
12754 if (sec->size == 0)
12755 continue;
12756
12757 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12758 last_unwind_type = 0;
12759 continue;
12760 }
12761
12762 /* Skip /DISCARD/ sections. */
12763 if (bfd_is_abs_section (exidx_sec->output_section))
12764 continue;
12765
12766 hdr = &elf_section_data (exidx_sec)->this_hdr;
12767 if (hdr->sh_type != SHT_ARM_EXIDX)
12768 continue;
12769
12770 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12771 if (exidx_arm_data == NULL)
12772 continue;
12773
12774 ibfd = exidx_sec->owner;
12775
12776 if (hdr->contents != NULL)
12777 contents = hdr->contents;
12778 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12779 /* An error? */
12780 continue;
12781
12782 if (last_unwind_type > 0)
12783 {
12784 unsigned int first_word = bfd_get_32 (ibfd, contents);
12785 /* Add cantunwind if first unwind item does not match section
12786 start. */
12787 if (first_word != sec->vma)
12788 {
12789 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12790 last_unwind_type = 0;
12791 }
12792 }
12793
12794 for (j = 0; j < hdr->sh_size; j += 8)
12795 {
12796 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12797 int unwind_type;
12798 int elide = 0;
12799
12800 /* An EXIDX_CANTUNWIND entry. */
12801 if (second_word == 1)
12802 {
12803 if (last_unwind_type == 0)
12804 elide = 1;
12805 unwind_type = 0;
12806 }
12807 /* Inlined unwinding data. Merge if equal to previous. */
12808 else if ((second_word & 0x80000000) != 0)
12809 {
12810 if (merge_exidx_entries
12811 && last_second_word == second_word && last_unwind_type == 1)
12812 elide = 1;
12813 unwind_type = 1;
12814 last_second_word = second_word;
12815 }
12816 /* Normal table entry. In theory we could merge these too,
12817 but duplicate entries are likely to be much less common. */
12818 else
12819 unwind_type = 2;
12820
12821 if (elide && !bfd_link_relocatable (info))
12822 {
12823 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12824 DELETE_EXIDX_ENTRY, NULL, j / 8);
12825
12826 deleted_exidx_bytes += 8;
12827 }
12828
12829 last_unwind_type = unwind_type;
12830 }
12831
12832 /* Free contents if we allocated it ourselves. */
12833 if (contents != hdr->contents)
12834 free (contents);
12835
12836 /* Record edits to be applied later (in elf32_arm_write_section). */
12837 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12838 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12839
12840 if (deleted_exidx_bytes > 0)
12841 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12842
12843 last_exidx_sec = exidx_sec;
12844 last_text_sec = sec;
12845 }
12846
12847 /* Add terminating CANTUNWIND entry. */
12848 if (!bfd_link_relocatable (info) && last_exidx_sec
12849 && last_unwind_type != 0)
12850 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12851
12852 return TRUE;
12853 }
12854
12855 static bfd_boolean
12856 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12857 bfd *ibfd, const char *name)
12858 {
12859 asection *sec, *osec;
12860
12861 sec = bfd_get_linker_section (ibfd, name);
12862 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12863 return TRUE;
12864
12865 osec = sec->output_section;
12866 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12867 return TRUE;
12868
12869 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12870 sec->output_offset, sec->size))
12871 return FALSE;
12872
12873 return TRUE;
12874 }
12875
12876 static bfd_boolean
12877 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12878 {
12879 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12880 asection *sec, *osec;
12881
12882 if (globals == NULL)
12883 return FALSE;
12884
12885 /* Invoke the regular ELF backend linker to do all the work. */
12886 if (!bfd_elf_final_link (abfd, info))
12887 return FALSE;
12888
12889 /* Process stub sections (eg BE8 encoding, ...). */
12890 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12891 unsigned int i;
12892 for (i=0; i<htab->top_id; i++)
12893 {
12894 sec = htab->stub_group[i].stub_sec;
12895 /* Only process it once, in its link_sec slot. */
12896 if (sec && i == htab->stub_group[i].link_sec->id)
12897 {
12898 osec = sec->output_section;
12899 elf32_arm_write_section (abfd, info, sec, sec->contents);
12900 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12901 sec->output_offset, sec->size))
12902 return FALSE;
12903 }
12904 }
12905
12906 /* Write out any glue sections now that we have created all the
12907 stubs. */
12908 if (globals->bfd_of_glue_owner != NULL)
12909 {
12910 if (! elf32_arm_output_glue_section (info, abfd,
12911 globals->bfd_of_glue_owner,
12912 ARM2THUMB_GLUE_SECTION_NAME))
12913 return FALSE;
12914
12915 if (! elf32_arm_output_glue_section (info, abfd,
12916 globals->bfd_of_glue_owner,
12917 THUMB2ARM_GLUE_SECTION_NAME))
12918 return FALSE;
12919
12920 if (! elf32_arm_output_glue_section (info, abfd,
12921 globals->bfd_of_glue_owner,
12922 VFP11_ERRATUM_VENEER_SECTION_NAME))
12923 return FALSE;
12924
12925 if (! elf32_arm_output_glue_section (info, abfd,
12926 globals->bfd_of_glue_owner,
12927 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12928 return FALSE;
12929
12930 if (! elf32_arm_output_glue_section (info, abfd,
12931 globals->bfd_of_glue_owner,
12932 ARM_BX_GLUE_SECTION_NAME))
12933 return FALSE;
12934 }
12935
12936 return TRUE;
12937 }
12938
12939 /* Return a best guess for the machine number based on the attributes. */
12940
12941 static unsigned int
12942 bfd_arm_get_mach_from_attributes (bfd * abfd)
12943 {
12944 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12945
12946 switch (arch)
12947 {
12948 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12949 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12950 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12951
12952 case TAG_CPU_ARCH_V5TE:
12953 {
12954 char * name;
12955
12956 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12957 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12958
12959 if (name)
12960 {
12961 if (strcmp (name, "IWMMXT2") == 0)
12962 return bfd_mach_arm_iWMMXt2;
12963
12964 if (strcmp (name, "IWMMXT") == 0)
12965 return bfd_mach_arm_iWMMXt;
12966
12967 if (strcmp (name, "XSCALE") == 0)
12968 {
12969 int wmmx;
12970
12971 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12972 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12973 switch (wmmx)
12974 {
12975 case 1: return bfd_mach_arm_iWMMXt;
12976 case 2: return bfd_mach_arm_iWMMXt2;
12977 default: return bfd_mach_arm_XScale;
12978 }
12979 }
12980 }
12981
12982 return bfd_mach_arm_5TE;
12983 }
12984
12985 default:
12986 return bfd_mach_arm_unknown;
12987 }
12988 }
12989
12990 /* Set the right machine number. */
12991
12992 static bfd_boolean
12993 elf32_arm_object_p (bfd *abfd)
12994 {
12995 unsigned int mach;
12996
12997 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12998
12999 if (mach == bfd_mach_arm_unknown)
13000 {
13001 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13002 mach = bfd_mach_arm_ep9312;
13003 else
13004 mach = bfd_arm_get_mach_from_attributes (abfd);
13005 }
13006
13007 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13008 return TRUE;
13009 }
13010
13011 /* Function to keep ARM specific flags in the ELF header. */
13012
13013 static bfd_boolean
13014 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13015 {
13016 if (elf_flags_init (abfd)
13017 && elf_elfheader (abfd)->e_flags != flags)
13018 {
13019 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13020 {
13021 if (flags & EF_ARM_INTERWORK)
13022 _bfd_error_handler
13023 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13024 abfd);
13025 else
13026 _bfd_error_handler
13027 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13028 abfd);
13029 }
13030 }
13031 else
13032 {
13033 elf_elfheader (abfd)->e_flags = flags;
13034 elf_flags_init (abfd) = TRUE;
13035 }
13036
13037 return TRUE;
13038 }
13039
13040 /* Copy backend specific data from one object module to another. */
13041
13042 static bfd_boolean
13043 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13044 {
13045 flagword in_flags;
13046 flagword out_flags;
13047
13048 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13049 return TRUE;
13050
13051 in_flags = elf_elfheader (ibfd)->e_flags;
13052 out_flags = elf_elfheader (obfd)->e_flags;
13053
13054 if (elf_flags_init (obfd)
13055 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13056 && in_flags != out_flags)
13057 {
13058 /* Cannot mix APCS26 and APCS32 code. */
13059 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13060 return FALSE;
13061
13062 /* Cannot mix float APCS and non-float APCS code. */
13063 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13064 return FALSE;
13065
13066 /* If the src and dest have different interworking flags
13067 then turn off the interworking bit. */
13068 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13069 {
13070 if (out_flags & EF_ARM_INTERWORK)
13071 _bfd_error_handler
13072 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13073 obfd, ibfd);
13074
13075 in_flags &= ~EF_ARM_INTERWORK;
13076 }
13077
13078 /* Likewise for PIC, though don't warn for this case. */
13079 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13080 in_flags &= ~EF_ARM_PIC;
13081 }
13082
13083 elf_elfheader (obfd)->e_flags = in_flags;
13084 elf_flags_init (obfd) = TRUE;
13085
13086 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13087 }
13088
13089 /* Values for Tag_ABI_PCS_R9_use. */
13090 enum
13091 {
13092 AEABI_R9_V6,
13093 AEABI_R9_SB,
13094 AEABI_R9_TLS,
13095 AEABI_R9_unused
13096 };
13097
13098 /* Values for Tag_ABI_PCS_RW_data. */
13099 enum
13100 {
13101 AEABI_PCS_RW_data_absolute,
13102 AEABI_PCS_RW_data_PCrel,
13103 AEABI_PCS_RW_data_SBrel,
13104 AEABI_PCS_RW_data_unused
13105 };
13106
13107 /* Values for Tag_ABI_enum_size. */
13108 enum
13109 {
13110 AEABI_enum_unused,
13111 AEABI_enum_short,
13112 AEABI_enum_wide,
13113 AEABI_enum_forced_wide
13114 };
13115
13116 /* Determine whether an object attribute tag takes an integer, a
13117 string or both. */
13118
13119 static int
13120 elf32_arm_obj_attrs_arg_type (int tag)
13121 {
13122 if (tag == Tag_compatibility)
13123 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13124 else if (tag == Tag_nodefaults)
13125 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13126 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13127 return ATTR_TYPE_FLAG_STR_VAL;
13128 else if (tag < 32)
13129 return ATTR_TYPE_FLAG_INT_VAL;
13130 else
13131 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13132 }
13133
13134 /* The ABI defines that Tag_conformance should be emitted first, and that
13135 Tag_nodefaults should be second (if either is defined). This sets those
13136 two positions, and bumps up the position of all the remaining tags to
13137 compensate. */
13138 static int
13139 elf32_arm_obj_attrs_order (int num)
13140 {
13141 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13142 return Tag_conformance;
13143 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13144 return Tag_nodefaults;
13145 if ((num - 2) < Tag_nodefaults)
13146 return num - 2;
13147 if ((num - 1) < Tag_conformance)
13148 return num - 1;
13149 return num;
13150 }
13151
13152 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13153 static bfd_boolean
13154 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13155 {
13156 if ((tag & 127) < 64)
13157 {
13158 _bfd_error_handler
13159 (_("%B: Unknown mandatory EABI object attribute %d"),
13160 abfd, tag);
13161 bfd_set_error (bfd_error_bad_value);
13162 return FALSE;
13163 }
13164 else
13165 {
13166 _bfd_error_handler
13167 (_("Warning: %B: Unknown EABI object attribute %d"),
13168 abfd, tag);
13169 return TRUE;
13170 }
13171 }
13172
13173 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13174 Returns -1 if no architecture could be read. */
13175
13176 static int
13177 get_secondary_compatible_arch (bfd *abfd)
13178 {
13179 obj_attribute *attr =
13180 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13181
13182 /* Note: the tag and its argument below are uleb128 values, though
13183 currently-defined values fit in one byte for each. */
13184 if (attr->s
13185 && attr->s[0] == Tag_CPU_arch
13186 && (attr->s[1] & 128) != 128
13187 && attr->s[2] == 0)
13188 return attr->s[1];
13189
13190 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13191 return -1;
13192 }
13193
13194 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13195 The tag is removed if ARCH is -1. */
13196
13197 static void
13198 set_secondary_compatible_arch (bfd *abfd, int arch)
13199 {
13200 obj_attribute *attr =
13201 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13202
13203 if (arch == -1)
13204 {
13205 attr->s = NULL;
13206 return;
13207 }
13208
13209 /* Note: the tag and its argument below are uleb128 values, though
13210 currently-defined values fit in one byte for each. */
13211 if (!attr->s)
13212 attr->s = (char *) bfd_alloc (abfd, 3);
13213 attr->s[0] = Tag_CPU_arch;
13214 attr->s[1] = arch;
13215 attr->s[2] = '\0';
13216 }
13217
13218 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13219 into account. */
13220
13221 static int
13222 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13223 int newtag, int secondary_compat)
13224 {
13225 #define T(X) TAG_CPU_ARCH_##X
13226 int tagl, tagh, result;
13227 const int v6t2[] =
13228 {
13229 T(V6T2), /* PRE_V4. */
13230 T(V6T2), /* V4. */
13231 T(V6T2), /* V4T. */
13232 T(V6T2), /* V5T. */
13233 T(V6T2), /* V5TE. */
13234 T(V6T2), /* V5TEJ. */
13235 T(V6T2), /* V6. */
13236 T(V7), /* V6KZ. */
13237 T(V6T2) /* V6T2. */
13238 };
13239 const int v6k[] =
13240 {
13241 T(V6K), /* PRE_V4. */
13242 T(V6K), /* V4. */
13243 T(V6K), /* V4T. */
13244 T(V6K), /* V5T. */
13245 T(V6K), /* V5TE. */
13246 T(V6K), /* V5TEJ. */
13247 T(V6K), /* V6. */
13248 T(V6KZ), /* V6KZ. */
13249 T(V7), /* V6T2. */
13250 T(V6K) /* V6K. */
13251 };
13252 const int v7[] =
13253 {
13254 T(V7), /* PRE_V4. */
13255 T(V7), /* V4. */
13256 T(V7), /* V4T. */
13257 T(V7), /* V5T. */
13258 T(V7), /* V5TE. */
13259 T(V7), /* V5TEJ. */
13260 T(V7), /* V6. */
13261 T(V7), /* V6KZ. */
13262 T(V7), /* V6T2. */
13263 T(V7), /* V6K. */
13264 T(V7) /* V7. */
13265 };
13266 const int v6_m[] =
13267 {
13268 -1, /* PRE_V4. */
13269 -1, /* V4. */
13270 T(V6K), /* V4T. */
13271 T(V6K), /* V5T. */
13272 T(V6K), /* V5TE. */
13273 T(V6K), /* V5TEJ. */
13274 T(V6K), /* V6. */
13275 T(V6KZ), /* V6KZ. */
13276 T(V7), /* V6T2. */
13277 T(V6K), /* V6K. */
13278 T(V7), /* V7. */
13279 T(V6_M) /* V6_M. */
13280 };
13281 const int v6s_m[] =
13282 {
13283 -1, /* PRE_V4. */
13284 -1, /* V4. */
13285 T(V6K), /* V4T. */
13286 T(V6K), /* V5T. */
13287 T(V6K), /* V5TE. */
13288 T(V6K), /* V5TEJ. */
13289 T(V6K), /* V6. */
13290 T(V6KZ), /* V6KZ. */
13291 T(V7), /* V6T2. */
13292 T(V6K), /* V6K. */
13293 T(V7), /* V7. */
13294 T(V6S_M), /* V6_M. */
13295 T(V6S_M) /* V6S_M. */
13296 };
13297 const int v7e_m[] =
13298 {
13299 -1, /* PRE_V4. */
13300 -1, /* V4. */
13301 T(V7E_M), /* V4T. */
13302 T(V7E_M), /* V5T. */
13303 T(V7E_M), /* V5TE. */
13304 T(V7E_M), /* V5TEJ. */
13305 T(V7E_M), /* V6. */
13306 T(V7E_M), /* V6KZ. */
13307 T(V7E_M), /* V6T2. */
13308 T(V7E_M), /* V6K. */
13309 T(V7E_M), /* V7. */
13310 T(V7E_M), /* V6_M. */
13311 T(V7E_M), /* V6S_M. */
13312 T(V7E_M) /* V7E_M. */
13313 };
13314 const int v8[] =
13315 {
13316 T(V8), /* PRE_V4. */
13317 T(V8), /* V4. */
13318 T(V8), /* V4T. */
13319 T(V8), /* V5T. */
13320 T(V8), /* V5TE. */
13321 T(V8), /* V5TEJ. */
13322 T(V8), /* V6. */
13323 T(V8), /* V6KZ. */
13324 T(V8), /* V6T2. */
13325 T(V8), /* V6K. */
13326 T(V8), /* V7. */
13327 T(V8), /* V6_M. */
13328 T(V8), /* V6S_M. */
13329 T(V8), /* V7E_M. */
13330 T(V8) /* V8. */
13331 };
13332 const int v8m_baseline[] =
13333 {
13334 -1, /* PRE_V4. */
13335 -1, /* V4. */
13336 -1, /* V4T. */
13337 -1, /* V5T. */
13338 -1, /* V5TE. */
13339 -1, /* V5TEJ. */
13340 -1, /* V6. */
13341 -1, /* V6KZ. */
13342 -1, /* V6T2. */
13343 -1, /* V6K. */
13344 -1, /* V7. */
13345 T(V8M_BASE), /* V6_M. */
13346 T(V8M_BASE), /* V6S_M. */
13347 -1, /* V7E_M. */
13348 -1, /* V8. */
13349 -1,
13350 T(V8M_BASE) /* V8-M BASELINE. */
13351 };
13352 const int v8m_mainline[] =
13353 {
13354 -1, /* PRE_V4. */
13355 -1, /* V4. */
13356 -1, /* V4T. */
13357 -1, /* V5T. */
13358 -1, /* V5TE. */
13359 -1, /* V5TEJ. */
13360 -1, /* V6. */
13361 -1, /* V6KZ. */
13362 -1, /* V6T2. */
13363 -1, /* V6K. */
13364 T(V8M_MAIN), /* V7. */
13365 T(V8M_MAIN), /* V6_M. */
13366 T(V8M_MAIN), /* V6S_M. */
13367 T(V8M_MAIN), /* V7E_M. */
13368 -1, /* V8. */
13369 -1,
13370 T(V8M_MAIN), /* V8-M BASELINE. */
13371 T(V8M_MAIN) /* V8-M MAINLINE. */
13372 };
13373 const int v4t_plus_v6_m[] =
13374 {
13375 -1, /* PRE_V4. */
13376 -1, /* V4. */
13377 T(V4T), /* V4T. */
13378 T(V5T), /* V5T. */
13379 T(V5TE), /* V5TE. */
13380 T(V5TEJ), /* V5TEJ. */
13381 T(V6), /* V6. */
13382 T(V6KZ), /* V6KZ. */
13383 T(V6T2), /* V6T2. */
13384 T(V6K), /* V6K. */
13385 T(V7), /* V7. */
13386 T(V6_M), /* V6_M. */
13387 T(V6S_M), /* V6S_M. */
13388 T(V7E_M), /* V7E_M. */
13389 T(V8), /* V8. */
13390 -1, /* Unused. */
13391 T(V8M_BASE), /* V8-M BASELINE. */
13392 T(V8M_MAIN), /* V8-M MAINLINE. */
13393 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13394 };
13395 const int *comb[] =
13396 {
13397 v6t2,
13398 v6k,
13399 v7,
13400 v6_m,
13401 v6s_m,
13402 v7e_m,
13403 v8,
13404 NULL,
13405 v8m_baseline,
13406 v8m_mainline,
13407 /* Pseudo-architecture. */
13408 v4t_plus_v6_m
13409 };
13410
13411 /* Check we've not got a higher architecture than we know about. */
13412
13413 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13414 {
13415 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13416 return -1;
13417 }
13418
13419 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13420
13421 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13422 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13423 oldtag = T(V4T_PLUS_V6_M);
13424
13425 /* And override the new tag if we have a Tag_also_compatible_with on the
13426 input. */
13427
13428 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13429 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13430 newtag = T(V4T_PLUS_V6_M);
13431
13432 tagl = (oldtag < newtag) ? oldtag : newtag;
13433 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13434
13435 /* Architectures before V6KZ add features monotonically. */
13436 if (tagh <= TAG_CPU_ARCH_V6KZ)
13437 return result;
13438
13439 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13440
13441 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13442 as the canonical version. */
13443 if (result == T(V4T_PLUS_V6_M))
13444 {
13445 result = T(V4T);
13446 *secondary_compat_out = T(V6_M);
13447 }
13448 else
13449 *secondary_compat_out = -1;
13450
13451 if (result == -1)
13452 {
13453 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13454 ibfd, oldtag, newtag);
13455 return -1;
13456 }
13457
13458 return result;
13459 #undef T
13460 }
13461
13462 /* Query attributes object to see if integer divide instructions may be
13463 present in an object. */
13464 static bfd_boolean
13465 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13466 {
13467 int arch = attr[Tag_CPU_arch].i;
13468 int profile = attr[Tag_CPU_arch_profile].i;
13469
13470 switch (attr[Tag_DIV_use].i)
13471 {
13472 case 0:
13473 /* Integer divide allowed if instruction contained in archetecture. */
13474 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13475 return TRUE;
13476 else if (arch >= TAG_CPU_ARCH_V7E_M)
13477 return TRUE;
13478 else
13479 return FALSE;
13480
13481 case 1:
13482 /* Integer divide explicitly prohibited. */
13483 return FALSE;
13484
13485 default:
13486 /* Unrecognised case - treat as allowing divide everywhere. */
13487 case 2:
13488 /* Integer divide allowed in ARM state. */
13489 return TRUE;
13490 }
13491 }
13492
13493 /* Query attributes object to see if integer divide instructions are
13494 forbidden to be in the object. This is not the inverse of
13495 elf32_arm_attributes_accept_div. */
13496 static bfd_boolean
13497 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13498 {
13499 return attr[Tag_DIV_use].i == 1;
13500 }
13501
13502 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13503 are conflicting attributes. */
13504
13505 static bfd_boolean
13506 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13507 {
13508 bfd *obfd = info->output_bfd;
13509 obj_attribute *in_attr;
13510 obj_attribute *out_attr;
13511 /* Some tags have 0 = don't care, 1 = strong requirement,
13512 2 = weak requirement. */
13513 static const int order_021[3] = {0, 2, 1};
13514 int i;
13515 bfd_boolean result = TRUE;
13516 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13517
13518 /* Skip the linker stubs file. This preserves previous behavior
13519 of accepting unknown attributes in the first input file - but
13520 is that a bug? */
13521 if (ibfd->flags & BFD_LINKER_CREATED)
13522 return TRUE;
13523
13524 /* Skip any input that hasn't attribute section.
13525 This enables to link object files without attribute section with
13526 any others. */
13527 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13528 return TRUE;
13529
13530 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13531 {
13532 /* This is the first object. Copy the attributes. */
13533 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13534
13535 out_attr = elf_known_obj_attributes_proc (obfd);
13536
13537 /* Use the Tag_null value to indicate the attributes have been
13538 initialized. */
13539 out_attr[0].i = 1;
13540
13541 /* We do not output objects with Tag_MPextension_use_legacy - we move
13542 the attribute's value to Tag_MPextension_use. */
13543 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13544 {
13545 if (out_attr[Tag_MPextension_use].i != 0
13546 && out_attr[Tag_MPextension_use_legacy].i
13547 != out_attr[Tag_MPextension_use].i)
13548 {
13549 _bfd_error_handler
13550 (_("Error: %B has both the current and legacy "
13551 "Tag_MPextension_use attributes"), ibfd);
13552 result = FALSE;
13553 }
13554
13555 out_attr[Tag_MPextension_use] =
13556 out_attr[Tag_MPextension_use_legacy];
13557 out_attr[Tag_MPextension_use_legacy].type = 0;
13558 out_attr[Tag_MPextension_use_legacy].i = 0;
13559 }
13560
13561 return result;
13562 }
13563
13564 in_attr = elf_known_obj_attributes_proc (ibfd);
13565 out_attr = elf_known_obj_attributes_proc (obfd);
13566 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13567 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13568 {
13569 /* Ignore mismatches if the object doesn't use floating point or is
13570 floating point ABI independent. */
13571 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13572 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13573 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13574 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13575 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13576 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13577 {
13578 _bfd_error_handler
13579 (_("error: %B uses VFP register arguments, %B does not"),
13580 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13581 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13582 result = FALSE;
13583 }
13584 }
13585
13586 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13587 {
13588 /* Merge this attribute with existing attributes. */
13589 switch (i)
13590 {
13591 case Tag_CPU_raw_name:
13592 case Tag_CPU_name:
13593 /* These are merged after Tag_CPU_arch. */
13594 break;
13595
13596 case Tag_ABI_optimization_goals:
13597 case Tag_ABI_FP_optimization_goals:
13598 /* Use the first value seen. */
13599 break;
13600
13601 case Tag_CPU_arch:
13602 {
13603 int secondary_compat = -1, secondary_compat_out = -1;
13604 unsigned int saved_out_attr = out_attr[i].i;
13605 int arch_attr;
13606 static const char *name_table[] =
13607 {
13608 /* These aren't real CPU names, but we can't guess
13609 that from the architecture version alone. */
13610 "Pre v4",
13611 "ARM v4",
13612 "ARM v4T",
13613 "ARM v5T",
13614 "ARM v5TE",
13615 "ARM v5TEJ",
13616 "ARM v6",
13617 "ARM v6KZ",
13618 "ARM v6T2",
13619 "ARM v6K",
13620 "ARM v7",
13621 "ARM v6-M",
13622 "ARM v6S-M",
13623 "ARM v8",
13624 "",
13625 "ARM v8-M.baseline",
13626 "ARM v8-M.mainline",
13627 };
13628
13629 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13630 secondary_compat = get_secondary_compatible_arch (ibfd);
13631 secondary_compat_out = get_secondary_compatible_arch (obfd);
13632 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13633 &secondary_compat_out,
13634 in_attr[i].i,
13635 secondary_compat);
13636
13637 /* Return with error if failed to merge. */
13638 if (arch_attr == -1)
13639 return FALSE;
13640
13641 out_attr[i].i = arch_attr;
13642
13643 set_secondary_compatible_arch (obfd, secondary_compat_out);
13644
13645 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13646 if (out_attr[i].i == saved_out_attr)
13647 ; /* Leave the names alone. */
13648 else if (out_attr[i].i == in_attr[i].i)
13649 {
13650 /* The output architecture has been changed to match the
13651 input architecture. Use the input names. */
13652 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13653 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13654 : NULL;
13655 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13656 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13657 : NULL;
13658 }
13659 else
13660 {
13661 out_attr[Tag_CPU_name].s = NULL;
13662 out_attr[Tag_CPU_raw_name].s = NULL;
13663 }
13664
13665 /* If we still don't have a value for Tag_CPU_name,
13666 make one up now. Tag_CPU_raw_name remains blank. */
13667 if (out_attr[Tag_CPU_name].s == NULL
13668 && out_attr[i].i < ARRAY_SIZE (name_table))
13669 out_attr[Tag_CPU_name].s =
13670 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13671 }
13672 break;
13673
13674 case Tag_ARM_ISA_use:
13675 case Tag_THUMB_ISA_use:
13676 case Tag_WMMX_arch:
13677 case Tag_Advanced_SIMD_arch:
13678 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13679 case Tag_ABI_FP_rounding:
13680 case Tag_ABI_FP_exceptions:
13681 case Tag_ABI_FP_user_exceptions:
13682 case Tag_ABI_FP_number_model:
13683 case Tag_FP_HP_extension:
13684 case Tag_CPU_unaligned_access:
13685 case Tag_T2EE_use:
13686 case Tag_MPextension_use:
13687 /* Use the largest value specified. */
13688 if (in_attr[i].i > out_attr[i].i)
13689 out_attr[i].i = in_attr[i].i;
13690 break;
13691
13692 case Tag_ABI_align_preserved:
13693 case Tag_ABI_PCS_RO_data:
13694 /* Use the smallest value specified. */
13695 if (in_attr[i].i < out_attr[i].i)
13696 out_attr[i].i = in_attr[i].i;
13697 break;
13698
13699 case Tag_ABI_align_needed:
13700 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13701 && (in_attr[Tag_ABI_align_preserved].i == 0
13702 || out_attr[Tag_ABI_align_preserved].i == 0))
13703 {
13704 /* This error message should be enabled once all non-conformant
13705 binaries in the toolchain have had the attributes set
13706 properly.
13707 _bfd_error_handler
13708 (_("error: %B: 8-byte data alignment conflicts with %B"),
13709 obfd, ibfd);
13710 result = FALSE; */
13711 }
13712 /* Fall through. */
13713 case Tag_ABI_FP_denormal:
13714 case Tag_ABI_PCS_GOT_use:
13715 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13716 value if greater than 2 (for future-proofing). */
13717 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13718 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13719 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13720 out_attr[i].i = in_attr[i].i;
13721 break;
13722
13723 case Tag_Virtualization_use:
13724 /* The virtualization tag effectively stores two bits of
13725 information: the intended use of TrustZone (in bit 0), and the
13726 intended use of Virtualization (in bit 1). */
13727 if (out_attr[i].i == 0)
13728 out_attr[i].i = in_attr[i].i;
13729 else if (in_attr[i].i != 0
13730 && in_attr[i].i != out_attr[i].i)
13731 {
13732 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13733 out_attr[i].i = 3;
13734 else
13735 {
13736 _bfd_error_handler
13737 (_("error: %B: unable to merge virtualization attributes "
13738 "with %B"),
13739 obfd, ibfd);
13740 result = FALSE;
13741 }
13742 }
13743 break;
13744
13745 case Tag_CPU_arch_profile:
13746 if (out_attr[i].i != in_attr[i].i)
13747 {
13748 /* 0 will merge with anything.
13749 'A' and 'S' merge to 'A'.
13750 'R' and 'S' merge to 'R'.
13751 'M' and 'A|R|S' is an error. */
13752 if (out_attr[i].i == 0
13753 || (out_attr[i].i == 'S'
13754 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13755 out_attr[i].i = in_attr[i].i;
13756 else if (in_attr[i].i == 0
13757 || (in_attr[i].i == 'S'
13758 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13759 ; /* Do nothing. */
13760 else
13761 {
13762 _bfd_error_handler
13763 (_("error: %B: Conflicting architecture profiles %c/%c"),
13764 ibfd,
13765 in_attr[i].i ? in_attr[i].i : '0',
13766 out_attr[i].i ? out_attr[i].i : '0');
13767 result = FALSE;
13768 }
13769 }
13770 break;
13771
13772 case Tag_DSP_extension:
13773 /* No need to change output value if any of:
13774 - pre (<=) ARMv5T input architecture (do not have DSP)
13775 - M input profile not ARMv7E-M and do not have DSP. */
13776 if (in_attr[Tag_CPU_arch].i <= 3
13777 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13778 && in_attr[Tag_CPU_arch].i != 13
13779 && in_attr[i].i == 0))
13780 ; /* Do nothing. */
13781 /* Output value should be 0 if DSP part of architecture, ie.
13782 - post (>=) ARMv5te architecture output
13783 - A, R or S profile output or ARMv7E-M output architecture. */
13784 else if (out_attr[Tag_CPU_arch].i >= 4
13785 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13786 || out_attr[Tag_CPU_arch_profile].i == 'R'
13787 || out_attr[Tag_CPU_arch_profile].i == 'S'
13788 || out_attr[Tag_CPU_arch].i == 13))
13789 out_attr[i].i = 0;
13790 /* Otherwise, DSP instructions are added and not part of output
13791 architecture. */
13792 else
13793 out_attr[i].i = 1;
13794 break;
13795
13796 case Tag_FP_arch:
13797 {
13798 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13799 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13800 when it's 0. It might mean absence of FP hardware if
13801 Tag_FP_arch is zero. */
13802
13803 #define VFP_VERSION_COUNT 9
13804 static const struct
13805 {
13806 int ver;
13807 int regs;
13808 } vfp_versions[VFP_VERSION_COUNT] =
13809 {
13810 {0, 0},
13811 {1, 16},
13812 {2, 16},
13813 {3, 32},
13814 {3, 16},
13815 {4, 32},
13816 {4, 16},
13817 {8, 32},
13818 {8, 16}
13819 };
13820 int ver;
13821 int regs;
13822 int newval;
13823
13824 /* If the output has no requirement about FP hardware,
13825 follow the requirement of the input. */
13826 if (out_attr[i].i == 0)
13827 {
13828 /* This assert is still reasonable, we shouldn't
13829 produce the suspicious build attribute
13830 combination (See below for in_attr). */
13831 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13832 out_attr[i].i = in_attr[i].i;
13833 out_attr[Tag_ABI_HardFP_use].i
13834 = in_attr[Tag_ABI_HardFP_use].i;
13835 break;
13836 }
13837 /* If the input has no requirement about FP hardware, do
13838 nothing. */
13839 else if (in_attr[i].i == 0)
13840 {
13841 /* We used to assert that Tag_ABI_HardFP_use was
13842 zero here, but we should never assert when
13843 consuming an object file that has suspicious
13844 build attributes. The single precision variant
13845 of 'no FP architecture' is still 'no FP
13846 architecture', so we just ignore the tag in this
13847 case. */
13848 break;
13849 }
13850
13851 /* Both the input and the output have nonzero Tag_FP_arch.
13852 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13853
13854 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13855 do nothing. */
13856 if (in_attr[Tag_ABI_HardFP_use].i == 0
13857 && out_attr[Tag_ABI_HardFP_use].i == 0)
13858 ;
13859 /* If the input and the output have different Tag_ABI_HardFP_use,
13860 the combination of them is 0 (implied by Tag_FP_arch). */
13861 else if (in_attr[Tag_ABI_HardFP_use].i
13862 != out_attr[Tag_ABI_HardFP_use].i)
13863 out_attr[Tag_ABI_HardFP_use].i = 0;
13864
13865 /* Now we can handle Tag_FP_arch. */
13866
13867 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13868 pick the biggest. */
13869 if (in_attr[i].i >= VFP_VERSION_COUNT
13870 && in_attr[i].i > out_attr[i].i)
13871 {
13872 out_attr[i] = in_attr[i];
13873 break;
13874 }
13875 /* The output uses the superset of input features
13876 (ISA version) and registers. */
13877 ver = vfp_versions[in_attr[i].i].ver;
13878 if (ver < vfp_versions[out_attr[i].i].ver)
13879 ver = vfp_versions[out_attr[i].i].ver;
13880 regs = vfp_versions[in_attr[i].i].regs;
13881 if (regs < vfp_versions[out_attr[i].i].regs)
13882 regs = vfp_versions[out_attr[i].i].regs;
13883 /* This assumes all possible supersets are also a valid
13884 options. */
13885 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13886 {
13887 if (regs == vfp_versions[newval].regs
13888 && ver == vfp_versions[newval].ver)
13889 break;
13890 }
13891 out_attr[i].i = newval;
13892 }
13893 break;
13894 case Tag_PCS_config:
13895 if (out_attr[i].i == 0)
13896 out_attr[i].i = in_attr[i].i;
13897 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13898 {
13899 /* It's sometimes ok to mix different configs, so this is only
13900 a warning. */
13901 _bfd_error_handler
13902 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13903 }
13904 break;
13905 case Tag_ABI_PCS_R9_use:
13906 if (in_attr[i].i != out_attr[i].i
13907 && out_attr[i].i != AEABI_R9_unused
13908 && in_attr[i].i != AEABI_R9_unused)
13909 {
13910 _bfd_error_handler
13911 (_("error: %B: Conflicting use of R9"), ibfd);
13912 result = FALSE;
13913 }
13914 if (out_attr[i].i == AEABI_R9_unused)
13915 out_attr[i].i = in_attr[i].i;
13916 break;
13917 case Tag_ABI_PCS_RW_data:
13918 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13919 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13920 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13921 {
13922 _bfd_error_handler
13923 (_("error: %B: SB relative addressing conflicts with use of R9"),
13924 ibfd);
13925 result = FALSE;
13926 }
13927 /* Use the smallest value specified. */
13928 if (in_attr[i].i < out_attr[i].i)
13929 out_attr[i].i = in_attr[i].i;
13930 break;
13931 case Tag_ABI_PCS_wchar_t:
13932 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13933 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13934 {
13935 _bfd_error_handler
13936 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13937 ibfd, in_attr[i].i, out_attr[i].i);
13938 }
13939 else if (in_attr[i].i && !out_attr[i].i)
13940 out_attr[i].i = in_attr[i].i;
13941 break;
13942 case Tag_ABI_enum_size:
13943 if (in_attr[i].i != AEABI_enum_unused)
13944 {
13945 if (out_attr[i].i == AEABI_enum_unused
13946 || out_attr[i].i == AEABI_enum_forced_wide)
13947 {
13948 /* The existing object is compatible with anything.
13949 Use whatever requirements the new object has. */
13950 out_attr[i].i = in_attr[i].i;
13951 }
13952 else if (in_attr[i].i != AEABI_enum_forced_wide
13953 && out_attr[i].i != in_attr[i].i
13954 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13955 {
13956 static const char *aeabi_enum_names[] =
13957 { "", "variable-size", "32-bit", "" };
13958 const char *in_name =
13959 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13960 ? aeabi_enum_names[in_attr[i].i]
13961 : "<unknown>";
13962 const char *out_name =
13963 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13964 ? aeabi_enum_names[out_attr[i].i]
13965 : "<unknown>";
13966 _bfd_error_handler
13967 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13968 ibfd, in_name, out_name);
13969 }
13970 }
13971 break;
13972 case Tag_ABI_VFP_args:
13973 /* Aready done. */
13974 break;
13975 case Tag_ABI_WMMX_args:
13976 if (in_attr[i].i != out_attr[i].i)
13977 {
13978 _bfd_error_handler
13979 (_("error: %B uses iWMMXt register arguments, %B does not"),
13980 ibfd, obfd);
13981 result = FALSE;
13982 }
13983 break;
13984 case Tag_compatibility:
13985 /* Merged in target-independent code. */
13986 break;
13987 case Tag_ABI_HardFP_use:
13988 /* This is handled along with Tag_FP_arch. */
13989 break;
13990 case Tag_ABI_FP_16bit_format:
13991 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13992 {
13993 if (in_attr[i].i != out_attr[i].i)
13994 {
13995 _bfd_error_handler
13996 (_("error: fp16 format mismatch between %B and %B"),
13997 ibfd, obfd);
13998 result = FALSE;
13999 }
14000 }
14001 if (in_attr[i].i != 0)
14002 out_attr[i].i = in_attr[i].i;
14003 break;
14004
14005 case Tag_DIV_use:
14006 /* A value of zero on input means that the divide instruction may
14007 be used if available in the base architecture as specified via
14008 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14009 the user did not want divide instructions. A value of 2
14010 explicitly means that divide instructions were allowed in ARM
14011 and Thumb state. */
14012 if (in_attr[i].i == out_attr[i].i)
14013 /* Do nothing. */ ;
14014 else if (elf32_arm_attributes_forbid_div (in_attr)
14015 && !elf32_arm_attributes_accept_div (out_attr))
14016 out_attr[i].i = 1;
14017 else if (elf32_arm_attributes_forbid_div (out_attr)
14018 && elf32_arm_attributes_accept_div (in_attr))
14019 out_attr[i].i = in_attr[i].i;
14020 else if (in_attr[i].i == 2)
14021 out_attr[i].i = in_attr[i].i;
14022 break;
14023
14024 case Tag_MPextension_use_legacy:
14025 /* We don't output objects with Tag_MPextension_use_legacy - we
14026 move the value to Tag_MPextension_use. */
14027 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14028 {
14029 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14030 {
14031 _bfd_error_handler
14032 (_("%B has has both the current and legacy "
14033 "Tag_MPextension_use attributes"),
14034 ibfd);
14035 result = FALSE;
14036 }
14037 }
14038
14039 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14040 out_attr[Tag_MPextension_use] = in_attr[i];
14041
14042 break;
14043
14044 case Tag_nodefaults:
14045 /* This tag is set if it exists, but the value is unused (and is
14046 typically zero). We don't actually need to do anything here -
14047 the merge happens automatically when the type flags are merged
14048 below. */
14049 break;
14050 case Tag_also_compatible_with:
14051 /* Already done in Tag_CPU_arch. */
14052 break;
14053 case Tag_conformance:
14054 /* Keep the attribute if it matches. Throw it away otherwise.
14055 No attribute means no claim to conform. */
14056 if (!in_attr[i].s || !out_attr[i].s
14057 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14058 out_attr[i].s = NULL;
14059 break;
14060
14061 default:
14062 result
14063 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14064 }
14065
14066 /* If out_attr was copied from in_attr then it won't have a type yet. */
14067 if (in_attr[i].type && !out_attr[i].type)
14068 out_attr[i].type = in_attr[i].type;
14069 }
14070
14071 /* Merge Tag_compatibility attributes and any common GNU ones. */
14072 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14073 return FALSE;
14074
14075 /* Check for any attributes not known on ARM. */
14076 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14077
14078 return result;
14079 }
14080
14081
14082 /* Return TRUE if the two EABI versions are incompatible. */
14083
14084 static bfd_boolean
14085 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14086 {
14087 /* v4 and v5 are the same spec before and after it was released,
14088 so allow mixing them. */
14089 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14090 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14091 return TRUE;
14092
14093 return (iver == over);
14094 }
14095
14096 /* Merge backend specific data from an object file to the output
14097 object file when linking. */
14098
14099 static bfd_boolean
14100 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14101
14102 /* Display the flags field. */
14103
14104 static bfd_boolean
14105 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14106 {
14107 FILE * file = (FILE *) ptr;
14108 unsigned long flags;
14109
14110 BFD_ASSERT (abfd != NULL && ptr != NULL);
14111
14112 /* Print normal ELF private data. */
14113 _bfd_elf_print_private_bfd_data (abfd, ptr);
14114
14115 flags = elf_elfheader (abfd)->e_flags;
14116 /* Ignore init flag - it may not be set, despite the flags field
14117 containing valid data. */
14118
14119 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14120
14121 switch (EF_ARM_EABI_VERSION (flags))
14122 {
14123 case EF_ARM_EABI_UNKNOWN:
14124 /* The following flag bits are GNU extensions and not part of the
14125 official ARM ELF extended ABI. Hence they are only decoded if
14126 the EABI version is not set. */
14127 if (flags & EF_ARM_INTERWORK)
14128 fprintf (file, _(" [interworking enabled]"));
14129
14130 if (flags & EF_ARM_APCS_26)
14131 fprintf (file, " [APCS-26]");
14132 else
14133 fprintf (file, " [APCS-32]");
14134
14135 if (flags & EF_ARM_VFP_FLOAT)
14136 fprintf (file, _(" [VFP float format]"));
14137 else if (flags & EF_ARM_MAVERICK_FLOAT)
14138 fprintf (file, _(" [Maverick float format]"));
14139 else
14140 fprintf (file, _(" [FPA float format]"));
14141
14142 if (flags & EF_ARM_APCS_FLOAT)
14143 fprintf (file, _(" [floats passed in float registers]"));
14144
14145 if (flags & EF_ARM_PIC)
14146 fprintf (file, _(" [position independent]"));
14147
14148 if (flags & EF_ARM_NEW_ABI)
14149 fprintf (file, _(" [new ABI]"));
14150
14151 if (flags & EF_ARM_OLD_ABI)
14152 fprintf (file, _(" [old ABI]"));
14153
14154 if (flags & EF_ARM_SOFT_FLOAT)
14155 fprintf (file, _(" [software FP]"));
14156
14157 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14158 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14159 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14160 | EF_ARM_MAVERICK_FLOAT);
14161 break;
14162
14163 case EF_ARM_EABI_VER1:
14164 fprintf (file, _(" [Version1 EABI]"));
14165
14166 if (flags & EF_ARM_SYMSARESORTED)
14167 fprintf (file, _(" [sorted symbol table]"));
14168 else
14169 fprintf (file, _(" [unsorted symbol table]"));
14170
14171 flags &= ~ EF_ARM_SYMSARESORTED;
14172 break;
14173
14174 case EF_ARM_EABI_VER2:
14175 fprintf (file, _(" [Version2 EABI]"));
14176
14177 if (flags & EF_ARM_SYMSARESORTED)
14178 fprintf (file, _(" [sorted symbol table]"));
14179 else
14180 fprintf (file, _(" [unsorted symbol table]"));
14181
14182 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14183 fprintf (file, _(" [dynamic symbols use segment index]"));
14184
14185 if (flags & EF_ARM_MAPSYMSFIRST)
14186 fprintf (file, _(" [mapping symbols precede others]"));
14187
14188 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14189 | EF_ARM_MAPSYMSFIRST);
14190 break;
14191
14192 case EF_ARM_EABI_VER3:
14193 fprintf (file, _(" [Version3 EABI]"));
14194 break;
14195
14196 case EF_ARM_EABI_VER4:
14197 fprintf (file, _(" [Version4 EABI]"));
14198 goto eabi;
14199
14200 case EF_ARM_EABI_VER5:
14201 fprintf (file, _(" [Version5 EABI]"));
14202
14203 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14204 fprintf (file, _(" [soft-float ABI]"));
14205
14206 if (flags & EF_ARM_ABI_FLOAT_HARD)
14207 fprintf (file, _(" [hard-float ABI]"));
14208
14209 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14210
14211 eabi:
14212 if (flags & EF_ARM_BE8)
14213 fprintf (file, _(" [BE8]"));
14214
14215 if (flags & EF_ARM_LE8)
14216 fprintf (file, _(" [LE8]"));
14217
14218 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14219 break;
14220
14221 default:
14222 fprintf (file, _(" <EABI version unrecognised>"));
14223 break;
14224 }
14225
14226 flags &= ~ EF_ARM_EABIMASK;
14227
14228 if (flags & EF_ARM_RELEXEC)
14229 fprintf (file, _(" [relocatable executable]"));
14230
14231 flags &= ~EF_ARM_RELEXEC;
14232
14233 if (flags)
14234 fprintf (file, _("<Unrecognised flag bits set>"));
14235
14236 fputc ('\n', file);
14237
14238 return TRUE;
14239 }
14240
14241 static int
14242 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14243 {
14244 switch (ELF_ST_TYPE (elf_sym->st_info))
14245 {
14246 case STT_ARM_TFUNC:
14247 return ELF_ST_TYPE (elf_sym->st_info);
14248
14249 case STT_ARM_16BIT:
14250 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14251 This allows us to distinguish between data used by Thumb instructions
14252 and non-data (which is probably code) inside Thumb regions of an
14253 executable. */
14254 if (type != STT_OBJECT && type != STT_TLS)
14255 return ELF_ST_TYPE (elf_sym->st_info);
14256 break;
14257
14258 default:
14259 break;
14260 }
14261
14262 return type;
14263 }
14264
14265 static asection *
14266 elf32_arm_gc_mark_hook (asection *sec,
14267 struct bfd_link_info *info,
14268 Elf_Internal_Rela *rel,
14269 struct elf_link_hash_entry *h,
14270 Elf_Internal_Sym *sym)
14271 {
14272 if (h != NULL)
14273 switch (ELF32_R_TYPE (rel->r_info))
14274 {
14275 case R_ARM_GNU_VTINHERIT:
14276 case R_ARM_GNU_VTENTRY:
14277 return NULL;
14278 }
14279
14280 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14281 }
14282
14283 /* Update the got entry reference counts for the section being removed. */
14284
14285 static bfd_boolean
14286 elf32_arm_gc_sweep_hook (bfd * abfd,
14287 struct bfd_link_info * info,
14288 asection * sec,
14289 const Elf_Internal_Rela * relocs)
14290 {
14291 Elf_Internal_Shdr *symtab_hdr;
14292 struct elf_link_hash_entry **sym_hashes;
14293 bfd_signed_vma *local_got_refcounts;
14294 const Elf_Internal_Rela *rel, *relend;
14295 struct elf32_arm_link_hash_table * globals;
14296
14297 if (bfd_link_relocatable (info))
14298 return TRUE;
14299
14300 globals = elf32_arm_hash_table (info);
14301 if (globals == NULL)
14302 return FALSE;
14303
14304 elf_section_data (sec)->local_dynrel = NULL;
14305
14306 symtab_hdr = & elf_symtab_hdr (abfd);
14307 sym_hashes = elf_sym_hashes (abfd);
14308 local_got_refcounts = elf_local_got_refcounts (abfd);
14309
14310 check_use_blx (globals);
14311
14312 relend = relocs + sec->reloc_count;
14313 for (rel = relocs; rel < relend; rel++)
14314 {
14315 unsigned long r_symndx;
14316 struct elf_link_hash_entry *h = NULL;
14317 struct elf32_arm_link_hash_entry *eh;
14318 int r_type;
14319 bfd_boolean call_reloc_p;
14320 bfd_boolean may_become_dynamic_p;
14321 bfd_boolean may_need_local_target_p;
14322 union gotplt_union *root_plt;
14323 struct arm_plt_info *arm_plt;
14324
14325 r_symndx = ELF32_R_SYM (rel->r_info);
14326 if (r_symndx >= symtab_hdr->sh_info)
14327 {
14328 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14329 while (h->root.type == bfd_link_hash_indirect
14330 || h->root.type == bfd_link_hash_warning)
14331 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14332 }
14333 eh = (struct elf32_arm_link_hash_entry *) h;
14334
14335 call_reloc_p = FALSE;
14336 may_become_dynamic_p = FALSE;
14337 may_need_local_target_p = FALSE;
14338
14339 r_type = ELF32_R_TYPE (rel->r_info);
14340 r_type = arm_real_reloc_type (globals, r_type);
14341 switch (r_type)
14342 {
14343 case R_ARM_GOT32:
14344 case R_ARM_GOT_PREL:
14345 case R_ARM_TLS_GD32:
14346 case R_ARM_TLS_IE32:
14347 if (h != NULL)
14348 {
14349 if (h->got.refcount > 0)
14350 h->got.refcount -= 1;
14351 }
14352 else if (local_got_refcounts != NULL)
14353 {
14354 if (local_got_refcounts[r_symndx] > 0)
14355 local_got_refcounts[r_symndx] -= 1;
14356 }
14357 break;
14358
14359 case R_ARM_TLS_LDM32:
14360 globals->tls_ldm_got.refcount -= 1;
14361 break;
14362
14363 case R_ARM_PC24:
14364 case R_ARM_PLT32:
14365 case R_ARM_CALL:
14366 case R_ARM_JUMP24:
14367 case R_ARM_PREL31:
14368 case R_ARM_THM_CALL:
14369 case R_ARM_THM_JUMP24:
14370 case R_ARM_THM_JUMP19:
14371 call_reloc_p = TRUE;
14372 may_need_local_target_p = TRUE;
14373 break;
14374
14375 case R_ARM_ABS12:
14376 if (!globals->vxworks_p)
14377 {
14378 may_need_local_target_p = TRUE;
14379 break;
14380 }
14381 /* Fall through. */
14382 case R_ARM_ABS32:
14383 case R_ARM_ABS32_NOI:
14384 case R_ARM_REL32:
14385 case R_ARM_REL32_NOI:
14386 case R_ARM_MOVW_ABS_NC:
14387 case R_ARM_MOVT_ABS:
14388 case R_ARM_MOVW_PREL_NC:
14389 case R_ARM_MOVT_PREL:
14390 case R_ARM_THM_MOVW_ABS_NC:
14391 case R_ARM_THM_MOVT_ABS:
14392 case R_ARM_THM_MOVW_PREL_NC:
14393 case R_ARM_THM_MOVT_PREL:
14394 /* Should the interworking branches be here also? */
14395 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14396 && (sec->flags & SEC_ALLOC) != 0)
14397 {
14398 if (h == NULL
14399 && elf32_arm_howto_from_type (r_type)->pc_relative)
14400 {
14401 call_reloc_p = TRUE;
14402 may_need_local_target_p = TRUE;
14403 }
14404 else
14405 may_become_dynamic_p = TRUE;
14406 }
14407 else
14408 may_need_local_target_p = TRUE;
14409 break;
14410
14411 default:
14412 break;
14413 }
14414
14415 if (may_need_local_target_p
14416 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14417 &arm_plt))
14418 {
14419 /* If PLT refcount book-keeping is wrong and too low, we'll
14420 see a zero value (going to -1) for the root PLT reference
14421 count. */
14422 if (root_plt->refcount >= 0)
14423 {
14424 BFD_ASSERT (root_plt->refcount != 0);
14425 root_plt->refcount -= 1;
14426 }
14427 else
14428 /* A value of -1 means the symbol has become local, forced
14429 or seeing a hidden definition. Any other negative value
14430 is an error. */
14431 BFD_ASSERT (root_plt->refcount == -1);
14432
14433 if (!call_reloc_p)
14434 arm_plt->noncall_refcount--;
14435
14436 if (r_type == R_ARM_THM_CALL)
14437 arm_plt->maybe_thumb_refcount--;
14438
14439 if (r_type == R_ARM_THM_JUMP24
14440 || r_type == R_ARM_THM_JUMP19)
14441 arm_plt->thumb_refcount--;
14442 }
14443
14444 if (may_become_dynamic_p)
14445 {
14446 struct elf_dyn_relocs **pp;
14447 struct elf_dyn_relocs *p;
14448
14449 if (h != NULL)
14450 pp = &(eh->dyn_relocs);
14451 else
14452 {
14453 Elf_Internal_Sym *isym;
14454
14455 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14456 abfd, r_symndx);
14457 if (isym == NULL)
14458 return FALSE;
14459 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14460 if (pp == NULL)
14461 return FALSE;
14462 }
14463 for (; (p = *pp) != NULL; pp = &p->next)
14464 if (p->sec == sec)
14465 {
14466 /* Everything must go for SEC. */
14467 *pp = p->next;
14468 break;
14469 }
14470 }
14471 }
14472
14473 return TRUE;
14474 }
14475
14476 /* Look through the relocs for a section during the first phase. */
14477
14478 static bfd_boolean
14479 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14480 asection *sec, const Elf_Internal_Rela *relocs)
14481 {
14482 Elf_Internal_Shdr *symtab_hdr;
14483 struct elf_link_hash_entry **sym_hashes;
14484 const Elf_Internal_Rela *rel;
14485 const Elf_Internal_Rela *rel_end;
14486 bfd *dynobj;
14487 asection *sreloc;
14488 struct elf32_arm_link_hash_table *htab;
14489 bfd_boolean call_reloc_p;
14490 bfd_boolean may_become_dynamic_p;
14491 bfd_boolean may_need_local_target_p;
14492 unsigned long nsyms;
14493
14494 if (bfd_link_relocatable (info))
14495 return TRUE;
14496
14497 BFD_ASSERT (is_arm_elf (abfd));
14498
14499 htab = elf32_arm_hash_table (info);
14500 if (htab == NULL)
14501 return FALSE;
14502
14503 sreloc = NULL;
14504
14505 /* Create dynamic sections for relocatable executables so that we can
14506 copy relocations. */
14507 if (htab->root.is_relocatable_executable
14508 && ! htab->root.dynamic_sections_created)
14509 {
14510 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14511 return FALSE;
14512 }
14513
14514 if (htab->root.dynobj == NULL)
14515 htab->root.dynobj = abfd;
14516 if (!create_ifunc_sections (info))
14517 return FALSE;
14518
14519 dynobj = htab->root.dynobj;
14520
14521 symtab_hdr = & elf_symtab_hdr (abfd);
14522 sym_hashes = elf_sym_hashes (abfd);
14523 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14524
14525 rel_end = relocs + sec->reloc_count;
14526 for (rel = relocs; rel < rel_end; rel++)
14527 {
14528 Elf_Internal_Sym *isym;
14529 struct elf_link_hash_entry *h;
14530 struct elf32_arm_link_hash_entry *eh;
14531 unsigned long r_symndx;
14532 int r_type;
14533
14534 r_symndx = ELF32_R_SYM (rel->r_info);
14535 r_type = ELF32_R_TYPE (rel->r_info);
14536 r_type = arm_real_reloc_type (htab, r_type);
14537
14538 if (r_symndx >= nsyms
14539 /* PR 9934: It is possible to have relocations that do not
14540 refer to symbols, thus it is also possible to have an
14541 object file containing relocations but no symbol table. */
14542 && (r_symndx > STN_UNDEF || nsyms > 0))
14543 {
14544 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14545 r_symndx);
14546 return FALSE;
14547 }
14548
14549 h = NULL;
14550 isym = NULL;
14551 if (nsyms > 0)
14552 {
14553 if (r_symndx < symtab_hdr->sh_info)
14554 {
14555 /* A local symbol. */
14556 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14557 abfd, r_symndx);
14558 if (isym == NULL)
14559 return FALSE;
14560 }
14561 else
14562 {
14563 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14564 while (h->root.type == bfd_link_hash_indirect
14565 || h->root.type == bfd_link_hash_warning)
14566 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14567
14568 /* PR15323, ref flags aren't set for references in the
14569 same object. */
14570 h->root.non_ir_ref_regular = 1;
14571 }
14572 }
14573
14574 eh = (struct elf32_arm_link_hash_entry *) h;
14575
14576 call_reloc_p = FALSE;
14577 may_become_dynamic_p = FALSE;
14578 may_need_local_target_p = FALSE;
14579
14580 /* Could be done earlier, if h were already available. */
14581 r_type = elf32_arm_tls_transition (info, r_type, h);
14582 switch (r_type)
14583 {
14584 case R_ARM_GOT32:
14585 case R_ARM_GOT_PREL:
14586 case R_ARM_TLS_GD32:
14587 case R_ARM_TLS_IE32:
14588 case R_ARM_TLS_GOTDESC:
14589 case R_ARM_TLS_DESCSEQ:
14590 case R_ARM_THM_TLS_DESCSEQ:
14591 case R_ARM_TLS_CALL:
14592 case R_ARM_THM_TLS_CALL:
14593 /* This symbol requires a global offset table entry. */
14594 {
14595 int tls_type, old_tls_type;
14596
14597 switch (r_type)
14598 {
14599 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14600
14601 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14602
14603 case R_ARM_TLS_GOTDESC:
14604 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14605 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14606 tls_type = GOT_TLS_GDESC; break;
14607
14608 default: tls_type = GOT_NORMAL; break;
14609 }
14610
14611 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14612 info->flags |= DF_STATIC_TLS;
14613
14614 if (h != NULL)
14615 {
14616 h->got.refcount++;
14617 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14618 }
14619 else
14620 {
14621 /* This is a global offset table entry for a local symbol. */
14622 if (!elf32_arm_allocate_local_sym_info (abfd))
14623 return FALSE;
14624 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14625 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14626 }
14627
14628 /* If a variable is accessed with both tls methods, two
14629 slots may be created. */
14630 if (GOT_TLS_GD_ANY_P (old_tls_type)
14631 && GOT_TLS_GD_ANY_P (tls_type))
14632 tls_type |= old_tls_type;
14633
14634 /* We will already have issued an error message if there
14635 is a TLS/non-TLS mismatch, based on the symbol
14636 type. So just combine any TLS types needed. */
14637 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14638 && tls_type != GOT_NORMAL)
14639 tls_type |= old_tls_type;
14640
14641 /* If the symbol is accessed in both IE and GDESC
14642 method, we're able to relax. Turn off the GDESC flag,
14643 without messing up with any other kind of tls types
14644 that may be involved. */
14645 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14646 tls_type &= ~GOT_TLS_GDESC;
14647
14648 if (old_tls_type != tls_type)
14649 {
14650 if (h != NULL)
14651 elf32_arm_hash_entry (h)->tls_type = tls_type;
14652 else
14653 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14654 }
14655 }
14656 /* Fall through. */
14657
14658 case R_ARM_TLS_LDM32:
14659 if (r_type == R_ARM_TLS_LDM32)
14660 htab->tls_ldm_got.refcount++;
14661 /* Fall through. */
14662
14663 case R_ARM_GOTOFF32:
14664 case R_ARM_GOTPC:
14665 if (htab->root.sgot == NULL
14666 && !create_got_section (htab->root.dynobj, info))
14667 return FALSE;
14668 break;
14669
14670 case R_ARM_PC24:
14671 case R_ARM_PLT32:
14672 case R_ARM_CALL:
14673 case R_ARM_JUMP24:
14674 case R_ARM_PREL31:
14675 case R_ARM_THM_CALL:
14676 case R_ARM_THM_JUMP24:
14677 case R_ARM_THM_JUMP19:
14678 call_reloc_p = TRUE;
14679 may_need_local_target_p = TRUE;
14680 break;
14681
14682 case R_ARM_ABS12:
14683 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14684 ldr __GOTT_INDEX__ offsets. */
14685 if (!htab->vxworks_p)
14686 {
14687 may_need_local_target_p = TRUE;
14688 break;
14689 }
14690 else goto jump_over;
14691
14692 /* Fall through. */
14693
14694 case R_ARM_MOVW_ABS_NC:
14695 case R_ARM_MOVT_ABS:
14696 case R_ARM_THM_MOVW_ABS_NC:
14697 case R_ARM_THM_MOVT_ABS:
14698 if (bfd_link_pic (info))
14699 {
14700 _bfd_error_handler
14701 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14702 abfd, elf32_arm_howto_table_1[r_type].name,
14703 (h) ? h->root.root.string : "a local symbol");
14704 bfd_set_error (bfd_error_bad_value);
14705 return FALSE;
14706 }
14707
14708 /* Fall through. */
14709 case R_ARM_ABS32:
14710 case R_ARM_ABS32_NOI:
14711 jump_over:
14712 if (h != NULL && bfd_link_executable (info))
14713 {
14714 h->pointer_equality_needed = 1;
14715 }
14716 /* Fall through. */
14717 case R_ARM_REL32:
14718 case R_ARM_REL32_NOI:
14719 case R_ARM_MOVW_PREL_NC:
14720 case R_ARM_MOVT_PREL:
14721 case R_ARM_THM_MOVW_PREL_NC:
14722 case R_ARM_THM_MOVT_PREL:
14723
14724 /* Should the interworking branches be listed here? */
14725 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14726 && (sec->flags & SEC_ALLOC) != 0)
14727 {
14728 if (h == NULL
14729 && elf32_arm_howto_from_type (r_type)->pc_relative)
14730 {
14731 /* In shared libraries and relocatable executables,
14732 we treat local relative references as calls;
14733 see the related SYMBOL_CALLS_LOCAL code in
14734 allocate_dynrelocs. */
14735 call_reloc_p = TRUE;
14736 may_need_local_target_p = TRUE;
14737 }
14738 else
14739 /* We are creating a shared library or relocatable
14740 executable, and this is a reloc against a global symbol,
14741 or a non-PC-relative reloc against a local symbol.
14742 We may need to copy the reloc into the output. */
14743 may_become_dynamic_p = TRUE;
14744 }
14745 else
14746 may_need_local_target_p = TRUE;
14747 break;
14748
14749 /* This relocation describes the C++ object vtable hierarchy.
14750 Reconstruct it for later use during GC. */
14751 case R_ARM_GNU_VTINHERIT:
14752 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14753 return FALSE;
14754 break;
14755
14756 /* This relocation describes which C++ vtable entries are actually
14757 used. Record for later use during GC. */
14758 case R_ARM_GNU_VTENTRY:
14759 BFD_ASSERT (h != NULL);
14760 if (h != NULL
14761 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14762 return FALSE;
14763 break;
14764 }
14765
14766 if (h != NULL)
14767 {
14768 if (call_reloc_p)
14769 /* We may need a .plt entry if the function this reloc
14770 refers to is in a different object, regardless of the
14771 symbol's type. We can't tell for sure yet, because
14772 something later might force the symbol local. */
14773 h->needs_plt = 1;
14774 else if (may_need_local_target_p)
14775 /* If this reloc is in a read-only section, we might
14776 need a copy reloc. We can't check reliably at this
14777 stage whether the section is read-only, as input
14778 sections have not yet been mapped to output sections.
14779 Tentatively set the flag for now, and correct in
14780 adjust_dynamic_symbol. */
14781 h->non_got_ref = 1;
14782 }
14783
14784 if (may_need_local_target_p
14785 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14786 {
14787 union gotplt_union *root_plt;
14788 struct arm_plt_info *arm_plt;
14789 struct arm_local_iplt_info *local_iplt;
14790
14791 if (h != NULL)
14792 {
14793 root_plt = &h->plt;
14794 arm_plt = &eh->plt;
14795 }
14796 else
14797 {
14798 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14799 if (local_iplt == NULL)
14800 return FALSE;
14801 root_plt = &local_iplt->root;
14802 arm_plt = &local_iplt->arm;
14803 }
14804
14805 /* If the symbol is a function that doesn't bind locally,
14806 this relocation will need a PLT entry. */
14807 if (root_plt->refcount != -1)
14808 root_plt->refcount += 1;
14809
14810 if (!call_reloc_p)
14811 arm_plt->noncall_refcount++;
14812
14813 /* It's too early to use htab->use_blx here, so we have to
14814 record possible blx references separately from
14815 relocs that definitely need a thumb stub. */
14816
14817 if (r_type == R_ARM_THM_CALL)
14818 arm_plt->maybe_thumb_refcount += 1;
14819
14820 if (r_type == R_ARM_THM_JUMP24
14821 || r_type == R_ARM_THM_JUMP19)
14822 arm_plt->thumb_refcount += 1;
14823 }
14824
14825 if (may_become_dynamic_p)
14826 {
14827 struct elf_dyn_relocs *p, **head;
14828
14829 /* Create a reloc section in dynobj. */
14830 if (sreloc == NULL)
14831 {
14832 sreloc = _bfd_elf_make_dynamic_reloc_section
14833 (sec, dynobj, 2, abfd, ! htab->use_rel);
14834
14835 if (sreloc == NULL)
14836 return FALSE;
14837
14838 /* BPABI objects never have dynamic relocations mapped. */
14839 if (htab->symbian_p)
14840 {
14841 flagword flags;
14842
14843 flags = bfd_get_section_flags (dynobj, sreloc);
14844 flags &= ~(SEC_LOAD | SEC_ALLOC);
14845 bfd_set_section_flags (dynobj, sreloc, flags);
14846 }
14847 }
14848
14849 /* If this is a global symbol, count the number of
14850 relocations we need for this symbol. */
14851 if (h != NULL)
14852 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14853 else
14854 {
14855 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14856 if (head == NULL)
14857 return FALSE;
14858 }
14859
14860 p = *head;
14861 if (p == NULL || p->sec != sec)
14862 {
14863 bfd_size_type amt = sizeof *p;
14864
14865 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14866 if (p == NULL)
14867 return FALSE;
14868 p->next = *head;
14869 *head = p;
14870 p->sec = sec;
14871 p->count = 0;
14872 p->pc_count = 0;
14873 }
14874
14875 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14876 p->pc_count += 1;
14877 p->count += 1;
14878 }
14879 }
14880
14881 return TRUE;
14882 }
14883
14884 static void
14885 elf32_arm_update_relocs (asection *o,
14886 struct bfd_elf_section_reloc_data *reldata)
14887 {
14888 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14889 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14890 const struct elf_backend_data *bed;
14891 _arm_elf_section_data *eado;
14892 struct bfd_link_order *p;
14893 bfd_byte *erela_head, *erela;
14894 Elf_Internal_Rela *irela_head, *irela;
14895 Elf_Internal_Shdr *rel_hdr;
14896 bfd *abfd;
14897 unsigned int count;
14898
14899 eado = get_arm_elf_section_data (o);
14900
14901 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14902 return;
14903
14904 abfd = o->owner;
14905 bed = get_elf_backend_data (abfd);
14906 rel_hdr = reldata->hdr;
14907
14908 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14909 {
14910 swap_in = bed->s->swap_reloc_in;
14911 swap_out = bed->s->swap_reloc_out;
14912 }
14913 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14914 {
14915 swap_in = bed->s->swap_reloca_in;
14916 swap_out = bed->s->swap_reloca_out;
14917 }
14918 else
14919 abort ();
14920
14921 erela_head = rel_hdr->contents;
14922 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14923 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14924
14925 erela = erela_head;
14926 irela = irela_head;
14927 count = 0;
14928
14929 for (p = o->map_head.link_order; p; p = p->next)
14930 {
14931 if (p->type == bfd_section_reloc_link_order
14932 || p->type == bfd_symbol_reloc_link_order)
14933 {
14934 (*swap_in) (abfd, erela, irela);
14935 erela += rel_hdr->sh_entsize;
14936 irela++;
14937 count++;
14938 }
14939 else if (p->type == bfd_indirect_link_order)
14940 {
14941 struct bfd_elf_section_reloc_data *input_reldata;
14942 arm_unwind_table_edit *edit_list, *edit_tail;
14943 _arm_elf_section_data *eadi;
14944 bfd_size_type j;
14945 bfd_vma offset;
14946 asection *i;
14947
14948 i = p->u.indirect.section;
14949
14950 eadi = get_arm_elf_section_data (i);
14951 edit_list = eadi->u.exidx.unwind_edit_list;
14952 edit_tail = eadi->u.exidx.unwind_edit_tail;
14953 offset = o->vma + i->output_offset;
14954
14955 if (eadi->elf.rel.hdr &&
14956 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14957 input_reldata = &eadi->elf.rel;
14958 else if (eadi->elf.rela.hdr &&
14959 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14960 input_reldata = &eadi->elf.rela;
14961 else
14962 abort ();
14963
14964 if (edit_list)
14965 {
14966 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14967 {
14968 arm_unwind_table_edit *edit_node, *edit_next;
14969 bfd_vma bias;
14970 bfd_vma reloc_index;
14971
14972 (*swap_in) (abfd, erela, irela);
14973 reloc_index = (irela->r_offset - offset) / 8;
14974
14975 bias = 0;
14976 edit_node = edit_list;
14977 for (edit_next = edit_list;
14978 edit_next && edit_next->index <= reloc_index;
14979 edit_next = edit_node->next)
14980 {
14981 bias++;
14982 edit_node = edit_next;
14983 }
14984
14985 if (edit_node->type != DELETE_EXIDX_ENTRY
14986 || edit_node->index != reloc_index)
14987 {
14988 irela->r_offset -= bias * 8;
14989 irela++;
14990 count++;
14991 }
14992
14993 erela += rel_hdr->sh_entsize;
14994 }
14995
14996 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14997 {
14998 /* New relocation entity. */
14999 asection *text_sec = edit_tail->linked_section;
15000 asection *text_out = text_sec->output_section;
15001 bfd_vma exidx_offset = offset + i->size - 8;
15002
15003 irela->r_addend = 0;
15004 irela->r_offset = exidx_offset;
15005 irela->r_info = ELF32_R_INFO
15006 (text_out->target_index, R_ARM_PREL31);
15007 irela++;
15008 count++;
15009 }
15010 }
15011 else
15012 {
15013 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15014 {
15015 (*swap_in) (abfd, erela, irela);
15016 erela += rel_hdr->sh_entsize;
15017 irela++;
15018 }
15019
15020 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15021 }
15022 }
15023 }
15024
15025 reldata->count = count;
15026 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15027
15028 erela = erela_head;
15029 irela = irela_head;
15030 while (count > 0)
15031 {
15032 (*swap_out) (abfd, irela, erela);
15033 erela += rel_hdr->sh_entsize;
15034 irela++;
15035 count--;
15036 }
15037
15038 free (irela_head);
15039
15040 /* Hashes are no longer valid. */
15041 free (reldata->hashes);
15042 reldata->hashes = NULL;
15043 }
15044
15045 /* Unwinding tables are not referenced directly. This pass marks them as
15046 required if the corresponding code section is marked. Similarly, ARMv8-M
15047 secure entry functions can only be referenced by SG veneers which are
15048 created after the GC process. They need to be marked in case they reside in
15049 their own section (as would be the case if code was compiled with
15050 -ffunction-sections). */
15051
15052 static bfd_boolean
15053 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15054 elf_gc_mark_hook_fn gc_mark_hook)
15055 {
15056 bfd *sub;
15057 Elf_Internal_Shdr **elf_shdrp;
15058 asection *cmse_sec;
15059 obj_attribute *out_attr;
15060 Elf_Internal_Shdr *symtab_hdr;
15061 unsigned i, sym_count, ext_start;
15062 const struct elf_backend_data *bed;
15063 struct elf_link_hash_entry **sym_hashes;
15064 struct elf32_arm_link_hash_entry *cmse_hash;
15065 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15066
15067 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15068
15069 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15070 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15071 && out_attr[Tag_CPU_arch_profile].i == 'M';
15072
15073 /* Marking EH data may cause additional code sections to be marked,
15074 requiring multiple passes. */
15075 again = TRUE;
15076 while (again)
15077 {
15078 again = FALSE;
15079 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15080 {
15081 asection *o;
15082
15083 if (! is_arm_elf (sub))
15084 continue;
15085
15086 elf_shdrp = elf_elfsections (sub);
15087 for (o = sub->sections; o != NULL; o = o->next)
15088 {
15089 Elf_Internal_Shdr *hdr;
15090
15091 hdr = &elf_section_data (o)->this_hdr;
15092 if (hdr->sh_type == SHT_ARM_EXIDX
15093 && hdr->sh_link
15094 && hdr->sh_link < elf_numsections (sub)
15095 && !o->gc_mark
15096 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15097 {
15098 again = TRUE;
15099 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15100 return FALSE;
15101 }
15102 }
15103
15104 /* Mark section holding ARMv8-M secure entry functions. We mark all
15105 of them so no need for a second browsing. */
15106 if (is_v8m && first_bfd_browse)
15107 {
15108 sym_hashes = elf_sym_hashes (sub);
15109 bed = get_elf_backend_data (sub);
15110 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15111 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15112 ext_start = symtab_hdr->sh_info;
15113
15114 /* Scan symbols. */
15115 for (i = ext_start; i < sym_count; i++)
15116 {
15117 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15118
15119 /* Assume it is a special symbol. If not, cmse_scan will
15120 warn about it and user can do something about it. */
15121 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15122 {
15123 cmse_sec = cmse_hash->root.root.u.def.section;
15124 if (!cmse_sec->gc_mark
15125 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15126 return FALSE;
15127 }
15128 }
15129 }
15130 }
15131 first_bfd_browse = FALSE;
15132 }
15133
15134 return TRUE;
15135 }
15136
15137 /* Treat mapping symbols as special target symbols. */
15138
15139 static bfd_boolean
15140 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15141 {
15142 return bfd_is_arm_special_symbol_name (sym->name,
15143 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15144 }
15145
15146 /* This is a copy of elf_find_function() from elf.c except that
15147 ARM mapping symbols are ignored when looking for function names
15148 and STT_ARM_TFUNC is considered to a function type. */
15149
15150 static bfd_boolean
15151 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15152 asymbol ** symbols,
15153 asection * section,
15154 bfd_vma offset,
15155 const char ** filename_ptr,
15156 const char ** functionname_ptr)
15157 {
15158 const char * filename = NULL;
15159 asymbol * func = NULL;
15160 bfd_vma low_func = 0;
15161 asymbol ** p;
15162
15163 for (p = symbols; *p != NULL; p++)
15164 {
15165 elf_symbol_type *q;
15166
15167 q = (elf_symbol_type *) *p;
15168
15169 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15170 {
15171 default:
15172 break;
15173 case STT_FILE:
15174 filename = bfd_asymbol_name (&q->symbol);
15175 break;
15176 case STT_FUNC:
15177 case STT_ARM_TFUNC:
15178 case STT_NOTYPE:
15179 /* Skip mapping symbols. */
15180 if ((q->symbol.flags & BSF_LOCAL)
15181 && bfd_is_arm_special_symbol_name (q->symbol.name,
15182 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15183 continue;
15184 /* Fall through. */
15185 if (bfd_get_section (&q->symbol) == section
15186 && q->symbol.value >= low_func
15187 && q->symbol.value <= offset)
15188 {
15189 func = (asymbol *) q;
15190 low_func = q->symbol.value;
15191 }
15192 break;
15193 }
15194 }
15195
15196 if (func == NULL)
15197 return FALSE;
15198
15199 if (filename_ptr)
15200 *filename_ptr = filename;
15201 if (functionname_ptr)
15202 *functionname_ptr = bfd_asymbol_name (func);
15203
15204 return TRUE;
15205 }
15206
15207
15208 /* Find the nearest line to a particular section and offset, for error
15209 reporting. This code is a duplicate of the code in elf.c, except
15210 that it uses arm_elf_find_function. */
15211
15212 static bfd_boolean
15213 elf32_arm_find_nearest_line (bfd * abfd,
15214 asymbol ** symbols,
15215 asection * section,
15216 bfd_vma offset,
15217 const char ** filename_ptr,
15218 const char ** functionname_ptr,
15219 unsigned int * line_ptr,
15220 unsigned int * discriminator_ptr)
15221 {
15222 bfd_boolean found = FALSE;
15223
15224 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15225 filename_ptr, functionname_ptr,
15226 line_ptr, discriminator_ptr,
15227 dwarf_debug_sections, 0,
15228 & elf_tdata (abfd)->dwarf2_find_line_info))
15229 {
15230 if (!*functionname_ptr)
15231 arm_elf_find_function (abfd, symbols, section, offset,
15232 *filename_ptr ? NULL : filename_ptr,
15233 functionname_ptr);
15234
15235 return TRUE;
15236 }
15237
15238 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15239 uses DWARF1. */
15240
15241 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15242 & found, filename_ptr,
15243 functionname_ptr, line_ptr,
15244 & elf_tdata (abfd)->line_info))
15245 return FALSE;
15246
15247 if (found && (*functionname_ptr || *line_ptr))
15248 return TRUE;
15249
15250 if (symbols == NULL)
15251 return FALSE;
15252
15253 if (! arm_elf_find_function (abfd, symbols, section, offset,
15254 filename_ptr, functionname_ptr))
15255 return FALSE;
15256
15257 *line_ptr = 0;
15258 return TRUE;
15259 }
15260
15261 static bfd_boolean
15262 elf32_arm_find_inliner_info (bfd * abfd,
15263 const char ** filename_ptr,
15264 const char ** functionname_ptr,
15265 unsigned int * line_ptr)
15266 {
15267 bfd_boolean found;
15268 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15269 functionname_ptr, line_ptr,
15270 & elf_tdata (abfd)->dwarf2_find_line_info);
15271 return found;
15272 }
15273
15274 /* Adjust a symbol defined by a dynamic object and referenced by a
15275 regular object. The current definition is in some section of the
15276 dynamic object, but we're not including those sections. We have to
15277 change the definition to something the rest of the link can
15278 understand. */
15279
15280 static bfd_boolean
15281 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15282 struct elf_link_hash_entry * h)
15283 {
15284 bfd * dynobj;
15285 asection *s, *srel;
15286 struct elf32_arm_link_hash_entry * eh;
15287 struct elf32_arm_link_hash_table *globals;
15288
15289 globals = elf32_arm_hash_table (info);
15290 if (globals == NULL)
15291 return FALSE;
15292
15293 dynobj = elf_hash_table (info)->dynobj;
15294
15295 /* Make sure we know what is going on here. */
15296 BFD_ASSERT (dynobj != NULL
15297 && (h->needs_plt
15298 || h->type == STT_GNU_IFUNC
15299 || h->u.weakdef != NULL
15300 || (h->def_dynamic
15301 && h->ref_regular
15302 && !h->def_regular)));
15303
15304 eh = (struct elf32_arm_link_hash_entry *) h;
15305
15306 /* If this is a function, put it in the procedure linkage table. We
15307 will fill in the contents of the procedure linkage table later,
15308 when we know the address of the .got section. */
15309 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15310 {
15311 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15312 symbol binds locally. */
15313 if (h->plt.refcount <= 0
15314 || (h->type != STT_GNU_IFUNC
15315 && (SYMBOL_CALLS_LOCAL (info, h)
15316 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15317 && h->root.type == bfd_link_hash_undefweak))))
15318 {
15319 /* This case can occur if we saw a PLT32 reloc in an input
15320 file, but the symbol was never referred to by a dynamic
15321 object, or if all references were garbage collected. In
15322 such a case, we don't actually need to build a procedure
15323 linkage table, and we can just do a PC24 reloc instead. */
15324 h->plt.offset = (bfd_vma) -1;
15325 eh->plt.thumb_refcount = 0;
15326 eh->plt.maybe_thumb_refcount = 0;
15327 eh->plt.noncall_refcount = 0;
15328 h->needs_plt = 0;
15329 }
15330
15331 return TRUE;
15332 }
15333 else
15334 {
15335 /* It's possible that we incorrectly decided a .plt reloc was
15336 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15337 in check_relocs. We can't decide accurately between function
15338 and non-function syms in check-relocs; Objects loaded later in
15339 the link may change h->type. So fix it now. */
15340 h->plt.offset = (bfd_vma) -1;
15341 eh->plt.thumb_refcount = 0;
15342 eh->plt.maybe_thumb_refcount = 0;
15343 eh->plt.noncall_refcount = 0;
15344 }
15345
15346 /* If this is a weak symbol, and there is a real definition, the
15347 processor independent code will have arranged for us to see the
15348 real definition first, and we can just use the same value. */
15349 if (h->u.weakdef != NULL)
15350 {
15351 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15352 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15353 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15354 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15355 return TRUE;
15356 }
15357
15358 /* If there are no non-GOT references, we do not need a copy
15359 relocation. */
15360 if (!h->non_got_ref)
15361 return TRUE;
15362
15363 /* This is a reference to a symbol defined by a dynamic object which
15364 is not a function. */
15365
15366 /* If we are creating a shared library, we must presume that the
15367 only references to the symbol are via the global offset table.
15368 For such cases we need not do anything here; the relocations will
15369 be handled correctly by relocate_section. Relocatable executables
15370 can reference data in shared objects directly, so we don't need to
15371 do anything here. */
15372 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15373 return TRUE;
15374
15375 /* We must allocate the symbol in our .dynbss section, which will
15376 become part of the .bss section of the executable. There will be
15377 an entry for this symbol in the .dynsym section. The dynamic
15378 object will contain position independent code, so all references
15379 from the dynamic object to this symbol will go through the global
15380 offset table. The dynamic linker will use the .dynsym entry to
15381 determine the address it must put in the global offset table, so
15382 both the dynamic object and the regular object will refer to the
15383 same memory location for the variable. */
15384 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15385 linker to copy the initial value out of the dynamic object and into
15386 the runtime process image. We need to remember the offset into the
15387 .rel(a).bss section we are going to use. */
15388 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15389 {
15390 s = globals->root.sdynrelro;
15391 srel = globals->root.sreldynrelro;
15392 }
15393 else
15394 {
15395 s = globals->root.sdynbss;
15396 srel = globals->root.srelbss;
15397 }
15398 if (info->nocopyreloc == 0
15399 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15400 && h->size != 0)
15401 {
15402 elf32_arm_allocate_dynrelocs (info, srel, 1);
15403 h->needs_copy = 1;
15404 }
15405
15406 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15407 }
15408
15409 /* Allocate space in .plt, .got and associated reloc sections for
15410 dynamic relocs. */
15411
15412 static bfd_boolean
15413 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15414 {
15415 struct bfd_link_info *info;
15416 struct elf32_arm_link_hash_table *htab;
15417 struct elf32_arm_link_hash_entry *eh;
15418 struct elf_dyn_relocs *p;
15419
15420 if (h->root.type == bfd_link_hash_indirect)
15421 return TRUE;
15422
15423 eh = (struct elf32_arm_link_hash_entry *) h;
15424
15425 info = (struct bfd_link_info *) inf;
15426 htab = elf32_arm_hash_table (info);
15427 if (htab == NULL)
15428 return FALSE;
15429
15430 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15431 && h->plt.refcount > 0)
15432 {
15433 /* Make sure this symbol is output as a dynamic symbol.
15434 Undefined weak syms won't yet be marked as dynamic. */
15435 if (h->dynindx == -1
15436 && !h->forced_local)
15437 {
15438 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15439 return FALSE;
15440 }
15441
15442 /* If the call in the PLT entry binds locally, the associated
15443 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15444 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15445 than the .plt section. */
15446 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15447 {
15448 eh->is_iplt = 1;
15449 if (eh->plt.noncall_refcount == 0
15450 && SYMBOL_REFERENCES_LOCAL (info, h))
15451 /* All non-call references can be resolved directly.
15452 This means that they can (and in some cases, must)
15453 resolve directly to the run-time target, rather than
15454 to the PLT. That in turns means that any .got entry
15455 would be equal to the .igot.plt entry, so there's
15456 no point having both. */
15457 h->got.refcount = 0;
15458 }
15459
15460 if (bfd_link_pic (info)
15461 || eh->is_iplt
15462 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15463 {
15464 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15465
15466 /* If this symbol is not defined in a regular file, and we are
15467 not generating a shared library, then set the symbol to this
15468 location in the .plt. This is required to make function
15469 pointers compare as equal between the normal executable and
15470 the shared library. */
15471 if (! bfd_link_pic (info)
15472 && !h->def_regular)
15473 {
15474 h->root.u.def.section = htab->root.splt;
15475 h->root.u.def.value = h->plt.offset;
15476
15477 /* Make sure the function is not marked as Thumb, in case
15478 it is the target of an ABS32 relocation, which will
15479 point to the PLT entry. */
15480 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15481 }
15482
15483 /* VxWorks executables have a second set of relocations for
15484 each PLT entry. They go in a separate relocation section,
15485 which is processed by the kernel loader. */
15486 if (htab->vxworks_p && !bfd_link_pic (info))
15487 {
15488 /* There is a relocation for the initial PLT entry:
15489 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15490 if (h->plt.offset == htab->plt_header_size)
15491 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15492
15493 /* There are two extra relocations for each subsequent
15494 PLT entry: an R_ARM_32 relocation for the GOT entry,
15495 and an R_ARM_32 relocation for the PLT entry. */
15496 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15497 }
15498 }
15499 else
15500 {
15501 h->plt.offset = (bfd_vma) -1;
15502 h->needs_plt = 0;
15503 }
15504 }
15505 else
15506 {
15507 h->plt.offset = (bfd_vma) -1;
15508 h->needs_plt = 0;
15509 }
15510
15511 eh = (struct elf32_arm_link_hash_entry *) h;
15512 eh->tlsdesc_got = (bfd_vma) -1;
15513
15514 if (h->got.refcount > 0)
15515 {
15516 asection *s;
15517 bfd_boolean dyn;
15518 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15519 int indx;
15520
15521 /* Make sure this symbol is output as a dynamic symbol.
15522 Undefined weak syms won't yet be marked as dynamic. */
15523 if (h->dynindx == -1
15524 && !h->forced_local)
15525 {
15526 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15527 return FALSE;
15528 }
15529
15530 if (!htab->symbian_p)
15531 {
15532 s = htab->root.sgot;
15533 h->got.offset = s->size;
15534
15535 if (tls_type == GOT_UNKNOWN)
15536 abort ();
15537
15538 if (tls_type == GOT_NORMAL)
15539 /* Non-TLS symbols need one GOT slot. */
15540 s->size += 4;
15541 else
15542 {
15543 if (tls_type & GOT_TLS_GDESC)
15544 {
15545 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15546 eh->tlsdesc_got
15547 = (htab->root.sgotplt->size
15548 - elf32_arm_compute_jump_table_size (htab));
15549 htab->root.sgotplt->size += 8;
15550 h->got.offset = (bfd_vma) -2;
15551 /* plt.got_offset needs to know there's a TLS_DESC
15552 reloc in the middle of .got.plt. */
15553 htab->num_tls_desc++;
15554 }
15555
15556 if (tls_type & GOT_TLS_GD)
15557 {
15558 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15559 the symbol is both GD and GDESC, got.offset may
15560 have been overwritten. */
15561 h->got.offset = s->size;
15562 s->size += 8;
15563 }
15564
15565 if (tls_type & GOT_TLS_IE)
15566 /* R_ARM_TLS_IE32 needs one GOT slot. */
15567 s->size += 4;
15568 }
15569
15570 dyn = htab->root.dynamic_sections_created;
15571
15572 indx = 0;
15573 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15574 bfd_link_pic (info),
15575 h)
15576 && (!bfd_link_pic (info)
15577 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15578 indx = h->dynindx;
15579
15580 if (tls_type != GOT_NORMAL
15581 && (bfd_link_pic (info) || indx != 0)
15582 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15583 || h->root.type != bfd_link_hash_undefweak))
15584 {
15585 if (tls_type & GOT_TLS_IE)
15586 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15587
15588 if (tls_type & GOT_TLS_GD)
15589 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15590
15591 if (tls_type & GOT_TLS_GDESC)
15592 {
15593 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15594 /* GDESC needs a trampoline to jump to. */
15595 htab->tls_trampoline = -1;
15596 }
15597
15598 /* Only GD needs it. GDESC just emits one relocation per
15599 2 entries. */
15600 if ((tls_type & GOT_TLS_GD) && indx != 0)
15601 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15602 }
15603 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15604 {
15605 if (htab->root.dynamic_sections_created)
15606 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15607 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15608 }
15609 else if (h->type == STT_GNU_IFUNC
15610 && eh->plt.noncall_refcount == 0)
15611 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15612 they all resolve dynamically instead. Reserve room for the
15613 GOT entry's R_ARM_IRELATIVE relocation. */
15614 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15615 else if (bfd_link_pic (info)
15616 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15617 || h->root.type != bfd_link_hash_undefweak))
15618 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15619 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15620 }
15621 }
15622 else
15623 h->got.offset = (bfd_vma) -1;
15624
15625 /* Allocate stubs for exported Thumb functions on v4t. */
15626 if (!htab->use_blx && h->dynindx != -1
15627 && h->def_regular
15628 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15629 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15630 {
15631 struct elf_link_hash_entry * th;
15632 struct bfd_link_hash_entry * bh;
15633 struct elf_link_hash_entry * myh;
15634 char name[1024];
15635 asection *s;
15636 bh = NULL;
15637 /* Create a new symbol to regist the real location of the function. */
15638 s = h->root.u.def.section;
15639 sprintf (name, "__real_%s", h->root.root.string);
15640 _bfd_generic_link_add_one_symbol (info, s->owner,
15641 name, BSF_GLOBAL, s,
15642 h->root.u.def.value,
15643 NULL, TRUE, FALSE, &bh);
15644
15645 myh = (struct elf_link_hash_entry *) bh;
15646 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15647 myh->forced_local = 1;
15648 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15649 eh->export_glue = myh;
15650 th = record_arm_to_thumb_glue (info, h);
15651 /* Point the symbol at the stub. */
15652 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15653 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15654 h->root.u.def.section = th->root.u.def.section;
15655 h->root.u.def.value = th->root.u.def.value & ~1;
15656 }
15657
15658 if (eh->dyn_relocs == NULL)
15659 return TRUE;
15660
15661 /* In the shared -Bsymbolic case, discard space allocated for
15662 dynamic pc-relative relocs against symbols which turn out to be
15663 defined in regular objects. For the normal shared case, discard
15664 space for pc-relative relocs that have become local due to symbol
15665 visibility changes. */
15666
15667 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15668 {
15669 /* Relocs that use pc_count are PC-relative forms, which will appear
15670 on something like ".long foo - ." or "movw REG, foo - .". We want
15671 calls to protected symbols to resolve directly to the function
15672 rather than going via the plt. If people want function pointer
15673 comparisons to work as expected then they should avoid writing
15674 assembly like ".long foo - .". */
15675 if (SYMBOL_CALLS_LOCAL (info, h))
15676 {
15677 struct elf_dyn_relocs **pp;
15678
15679 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15680 {
15681 p->count -= p->pc_count;
15682 p->pc_count = 0;
15683 if (p->count == 0)
15684 *pp = p->next;
15685 else
15686 pp = &p->next;
15687 }
15688 }
15689
15690 if (htab->vxworks_p)
15691 {
15692 struct elf_dyn_relocs **pp;
15693
15694 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15695 {
15696 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15697 *pp = p->next;
15698 else
15699 pp = &p->next;
15700 }
15701 }
15702
15703 /* Also discard relocs on undefined weak syms with non-default
15704 visibility. */
15705 if (eh->dyn_relocs != NULL
15706 && h->root.type == bfd_link_hash_undefweak)
15707 {
15708 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15709 eh->dyn_relocs = NULL;
15710
15711 /* Make sure undefined weak symbols are output as a dynamic
15712 symbol in PIEs. */
15713 else if (h->dynindx == -1
15714 && !h->forced_local)
15715 {
15716 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15717 return FALSE;
15718 }
15719 }
15720
15721 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15722 && h->root.type == bfd_link_hash_new)
15723 {
15724 /* Output absolute symbols so that we can create relocations
15725 against them. For normal symbols we output a relocation
15726 against the section that contains them. */
15727 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15728 return FALSE;
15729 }
15730
15731 }
15732 else
15733 {
15734 /* For the non-shared case, discard space for relocs against
15735 symbols which turn out to need copy relocs or are not
15736 dynamic. */
15737
15738 if (!h->non_got_ref
15739 && ((h->def_dynamic
15740 && !h->def_regular)
15741 || (htab->root.dynamic_sections_created
15742 && (h->root.type == bfd_link_hash_undefweak
15743 || h->root.type == bfd_link_hash_undefined))))
15744 {
15745 /* Make sure this symbol is output as a dynamic symbol.
15746 Undefined weak syms won't yet be marked as dynamic. */
15747 if (h->dynindx == -1
15748 && !h->forced_local)
15749 {
15750 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15751 return FALSE;
15752 }
15753
15754 /* If that succeeded, we know we'll be keeping all the
15755 relocs. */
15756 if (h->dynindx != -1)
15757 goto keep;
15758 }
15759
15760 eh->dyn_relocs = NULL;
15761
15762 keep: ;
15763 }
15764
15765 /* Finally, allocate space. */
15766 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15767 {
15768 asection *sreloc = elf_section_data (p->sec)->sreloc;
15769 if (h->type == STT_GNU_IFUNC
15770 && eh->plt.noncall_refcount == 0
15771 && SYMBOL_REFERENCES_LOCAL (info, h))
15772 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15773 else
15774 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15775 }
15776
15777 return TRUE;
15778 }
15779
15780 /* Find any dynamic relocs that apply to read-only sections. */
15781
15782 static bfd_boolean
15783 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15784 {
15785 struct elf32_arm_link_hash_entry * eh;
15786 struct elf_dyn_relocs * p;
15787
15788 eh = (struct elf32_arm_link_hash_entry *) h;
15789 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15790 {
15791 asection *s = p->sec;
15792
15793 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15794 {
15795 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15796
15797 info->flags |= DF_TEXTREL;
15798
15799 /* Not an error, just cut short the traversal. */
15800 return FALSE;
15801 }
15802 }
15803 return TRUE;
15804 }
15805
15806 void
15807 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15808 int byteswap_code)
15809 {
15810 struct elf32_arm_link_hash_table *globals;
15811
15812 globals = elf32_arm_hash_table (info);
15813 if (globals == NULL)
15814 return;
15815
15816 globals->byteswap_code = byteswap_code;
15817 }
15818
15819 /* Set the sizes of the dynamic sections. */
15820
15821 static bfd_boolean
15822 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15823 struct bfd_link_info * info)
15824 {
15825 bfd * dynobj;
15826 asection * s;
15827 bfd_boolean plt;
15828 bfd_boolean relocs;
15829 bfd *ibfd;
15830 struct elf32_arm_link_hash_table *htab;
15831
15832 htab = elf32_arm_hash_table (info);
15833 if (htab == NULL)
15834 return FALSE;
15835
15836 dynobj = elf_hash_table (info)->dynobj;
15837 BFD_ASSERT (dynobj != NULL);
15838 check_use_blx (htab);
15839
15840 if (elf_hash_table (info)->dynamic_sections_created)
15841 {
15842 /* Set the contents of the .interp section to the interpreter. */
15843 if (bfd_link_executable (info) && !info->nointerp)
15844 {
15845 s = bfd_get_linker_section (dynobj, ".interp");
15846 BFD_ASSERT (s != NULL);
15847 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15848 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15849 }
15850 }
15851
15852 /* Set up .got offsets for local syms, and space for local dynamic
15853 relocs. */
15854 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15855 {
15856 bfd_signed_vma *local_got;
15857 bfd_signed_vma *end_local_got;
15858 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15859 char *local_tls_type;
15860 bfd_vma *local_tlsdesc_gotent;
15861 bfd_size_type locsymcount;
15862 Elf_Internal_Shdr *symtab_hdr;
15863 asection *srel;
15864 bfd_boolean is_vxworks = htab->vxworks_p;
15865 unsigned int symndx;
15866
15867 if (! is_arm_elf (ibfd))
15868 continue;
15869
15870 for (s = ibfd->sections; s != NULL; s = s->next)
15871 {
15872 struct elf_dyn_relocs *p;
15873
15874 for (p = (struct elf_dyn_relocs *)
15875 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15876 {
15877 if (!bfd_is_abs_section (p->sec)
15878 && bfd_is_abs_section (p->sec->output_section))
15879 {
15880 /* Input section has been discarded, either because
15881 it is a copy of a linkonce section or due to
15882 linker script /DISCARD/, so we'll be discarding
15883 the relocs too. */
15884 }
15885 else if (is_vxworks
15886 && strcmp (p->sec->output_section->name,
15887 ".tls_vars") == 0)
15888 {
15889 /* Relocations in vxworks .tls_vars sections are
15890 handled specially by the loader. */
15891 }
15892 else if (p->count != 0)
15893 {
15894 srel = elf_section_data (p->sec)->sreloc;
15895 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15896 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15897 info->flags |= DF_TEXTREL;
15898 }
15899 }
15900 }
15901
15902 local_got = elf_local_got_refcounts (ibfd);
15903 if (!local_got)
15904 continue;
15905
15906 symtab_hdr = & elf_symtab_hdr (ibfd);
15907 locsymcount = symtab_hdr->sh_info;
15908 end_local_got = local_got + locsymcount;
15909 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15910 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15911 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15912 symndx = 0;
15913 s = htab->root.sgot;
15914 srel = htab->root.srelgot;
15915 for (; local_got < end_local_got;
15916 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15917 ++local_tlsdesc_gotent, ++symndx)
15918 {
15919 *local_tlsdesc_gotent = (bfd_vma) -1;
15920 local_iplt = *local_iplt_ptr;
15921 if (local_iplt != NULL)
15922 {
15923 struct elf_dyn_relocs *p;
15924
15925 if (local_iplt->root.refcount > 0)
15926 {
15927 elf32_arm_allocate_plt_entry (info, TRUE,
15928 &local_iplt->root,
15929 &local_iplt->arm);
15930 if (local_iplt->arm.noncall_refcount == 0)
15931 /* All references to the PLT are calls, so all
15932 non-call references can resolve directly to the
15933 run-time target. This means that the .got entry
15934 would be the same as the .igot.plt entry, so there's
15935 no point creating both. */
15936 *local_got = 0;
15937 }
15938 else
15939 {
15940 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15941 local_iplt->root.offset = (bfd_vma) -1;
15942 }
15943
15944 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15945 {
15946 asection *psrel;
15947
15948 psrel = elf_section_data (p->sec)->sreloc;
15949 if (local_iplt->arm.noncall_refcount == 0)
15950 elf32_arm_allocate_irelocs (info, psrel, p->count);
15951 else
15952 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15953 }
15954 }
15955 if (*local_got > 0)
15956 {
15957 Elf_Internal_Sym *isym;
15958
15959 *local_got = s->size;
15960 if (*local_tls_type & GOT_TLS_GD)
15961 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15962 s->size += 8;
15963 if (*local_tls_type & GOT_TLS_GDESC)
15964 {
15965 *local_tlsdesc_gotent = htab->root.sgotplt->size
15966 - elf32_arm_compute_jump_table_size (htab);
15967 htab->root.sgotplt->size += 8;
15968 *local_got = (bfd_vma) -2;
15969 /* plt.got_offset needs to know there's a TLS_DESC
15970 reloc in the middle of .got.plt. */
15971 htab->num_tls_desc++;
15972 }
15973 if (*local_tls_type & GOT_TLS_IE)
15974 s->size += 4;
15975
15976 if (*local_tls_type & GOT_NORMAL)
15977 {
15978 /* If the symbol is both GD and GDESC, *local_got
15979 may have been overwritten. */
15980 *local_got = s->size;
15981 s->size += 4;
15982 }
15983
15984 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15985 if (isym == NULL)
15986 return FALSE;
15987
15988 /* If all references to an STT_GNU_IFUNC PLT are calls,
15989 then all non-call references, including this GOT entry,
15990 resolve directly to the run-time target. */
15991 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15992 && (local_iplt == NULL
15993 || local_iplt->arm.noncall_refcount == 0))
15994 elf32_arm_allocate_irelocs (info, srel, 1);
15995 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15996 {
15997 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15998 || *local_tls_type & GOT_TLS_GD)
15999 elf32_arm_allocate_dynrelocs (info, srel, 1);
16000
16001 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
16002 {
16003 elf32_arm_allocate_dynrelocs (info,
16004 htab->root.srelplt, 1);
16005 htab->tls_trampoline = -1;
16006 }
16007 }
16008 }
16009 else
16010 *local_got = (bfd_vma) -1;
16011 }
16012 }
16013
16014 if (htab->tls_ldm_got.refcount > 0)
16015 {
16016 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16017 for R_ARM_TLS_LDM32 relocations. */
16018 htab->tls_ldm_got.offset = htab->root.sgot->size;
16019 htab->root.sgot->size += 8;
16020 if (bfd_link_pic (info))
16021 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16022 }
16023 else
16024 htab->tls_ldm_got.offset = -1;
16025
16026 /* Allocate global sym .plt and .got entries, and space for global
16027 sym dynamic relocs. */
16028 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16029
16030 /* Here we rummage through the found bfds to collect glue information. */
16031 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16032 {
16033 if (! is_arm_elf (ibfd))
16034 continue;
16035
16036 /* Initialise mapping tables for code/data. */
16037 bfd_elf32_arm_init_maps (ibfd);
16038
16039 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16040 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16041 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16042 _bfd_error_handler (_("Errors encountered processing file %B"), ibfd);
16043 }
16044
16045 /* Allocate space for the glue sections now that we've sized them. */
16046 bfd_elf32_arm_allocate_interworking_sections (info);
16047
16048 /* For every jump slot reserved in the sgotplt, reloc_count is
16049 incremented. However, when we reserve space for TLS descriptors,
16050 it's not incremented, so in order to compute the space reserved
16051 for them, it suffices to multiply the reloc count by the jump
16052 slot size. */
16053 if (htab->root.srelplt)
16054 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16055
16056 if (htab->tls_trampoline)
16057 {
16058 if (htab->root.splt->size == 0)
16059 htab->root.splt->size += htab->plt_header_size;
16060
16061 htab->tls_trampoline = htab->root.splt->size;
16062 htab->root.splt->size += htab->plt_entry_size;
16063
16064 /* If we're not using lazy TLS relocations, don't generate the
16065 PLT and GOT entries they require. */
16066 if (!(info->flags & DF_BIND_NOW))
16067 {
16068 htab->dt_tlsdesc_got = htab->root.sgot->size;
16069 htab->root.sgot->size += 4;
16070
16071 htab->dt_tlsdesc_plt = htab->root.splt->size;
16072 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16073 }
16074 }
16075
16076 /* The check_relocs and adjust_dynamic_symbol entry points have
16077 determined the sizes of the various dynamic sections. Allocate
16078 memory for them. */
16079 plt = FALSE;
16080 relocs = FALSE;
16081 for (s = dynobj->sections; s != NULL; s = s->next)
16082 {
16083 const char * name;
16084
16085 if ((s->flags & SEC_LINKER_CREATED) == 0)
16086 continue;
16087
16088 /* It's OK to base decisions on the section name, because none
16089 of the dynobj section names depend upon the input files. */
16090 name = bfd_get_section_name (dynobj, s);
16091
16092 if (s == htab->root.splt)
16093 {
16094 /* Remember whether there is a PLT. */
16095 plt = s->size != 0;
16096 }
16097 else if (CONST_STRNEQ (name, ".rel"))
16098 {
16099 if (s->size != 0)
16100 {
16101 /* Remember whether there are any reloc sections other
16102 than .rel(a).plt and .rela.plt.unloaded. */
16103 if (s != htab->root.srelplt && s != htab->srelplt2)
16104 relocs = TRUE;
16105
16106 /* We use the reloc_count field as a counter if we need
16107 to copy relocs into the output file. */
16108 s->reloc_count = 0;
16109 }
16110 }
16111 else if (s != htab->root.sgot
16112 && s != htab->root.sgotplt
16113 && s != htab->root.iplt
16114 && s != htab->root.igotplt
16115 && s != htab->root.sdynbss
16116 && s != htab->root.sdynrelro)
16117 {
16118 /* It's not one of our sections, so don't allocate space. */
16119 continue;
16120 }
16121
16122 if (s->size == 0)
16123 {
16124 /* If we don't need this section, strip it from the
16125 output file. This is mostly to handle .rel(a).bss and
16126 .rel(a).plt. We must create both sections in
16127 create_dynamic_sections, because they must be created
16128 before the linker maps input sections to output
16129 sections. The linker does that before
16130 adjust_dynamic_symbol is called, and it is that
16131 function which decides whether anything needs to go
16132 into these sections. */
16133 s->flags |= SEC_EXCLUDE;
16134 continue;
16135 }
16136
16137 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16138 continue;
16139
16140 /* Allocate memory for the section contents. */
16141 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16142 if (s->contents == NULL)
16143 return FALSE;
16144 }
16145
16146 if (elf_hash_table (info)->dynamic_sections_created)
16147 {
16148 /* Add some entries to the .dynamic section. We fill in the
16149 values later, in elf32_arm_finish_dynamic_sections, but we
16150 must add the entries now so that we get the correct size for
16151 the .dynamic section. The DT_DEBUG entry is filled in by the
16152 dynamic linker and used by the debugger. */
16153 #define add_dynamic_entry(TAG, VAL) \
16154 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16155
16156 if (bfd_link_executable (info))
16157 {
16158 if (!add_dynamic_entry (DT_DEBUG, 0))
16159 return FALSE;
16160 }
16161
16162 if (plt)
16163 {
16164 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16165 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16166 || !add_dynamic_entry (DT_PLTREL,
16167 htab->use_rel ? DT_REL : DT_RELA)
16168 || !add_dynamic_entry (DT_JMPREL, 0))
16169 return FALSE;
16170
16171 if (htab->dt_tlsdesc_plt
16172 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16173 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16174 return FALSE;
16175 }
16176
16177 if (relocs)
16178 {
16179 if (htab->use_rel)
16180 {
16181 if (!add_dynamic_entry (DT_REL, 0)
16182 || !add_dynamic_entry (DT_RELSZ, 0)
16183 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16184 return FALSE;
16185 }
16186 else
16187 {
16188 if (!add_dynamic_entry (DT_RELA, 0)
16189 || !add_dynamic_entry (DT_RELASZ, 0)
16190 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16191 return FALSE;
16192 }
16193 }
16194
16195 /* If any dynamic relocs apply to a read-only section,
16196 then we need a DT_TEXTREL entry. */
16197 if ((info->flags & DF_TEXTREL) == 0)
16198 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16199 info);
16200
16201 if ((info->flags & DF_TEXTREL) != 0)
16202 {
16203 if (!add_dynamic_entry (DT_TEXTREL, 0))
16204 return FALSE;
16205 }
16206 if (htab->vxworks_p
16207 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16208 return FALSE;
16209 }
16210 #undef add_dynamic_entry
16211
16212 return TRUE;
16213 }
16214
16215 /* Size sections even though they're not dynamic. We use it to setup
16216 _TLS_MODULE_BASE_, if needed. */
16217
16218 static bfd_boolean
16219 elf32_arm_always_size_sections (bfd *output_bfd,
16220 struct bfd_link_info *info)
16221 {
16222 asection *tls_sec;
16223
16224 if (bfd_link_relocatable (info))
16225 return TRUE;
16226
16227 tls_sec = elf_hash_table (info)->tls_sec;
16228
16229 if (tls_sec)
16230 {
16231 struct elf_link_hash_entry *tlsbase;
16232
16233 tlsbase = elf_link_hash_lookup
16234 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16235
16236 if (tlsbase)
16237 {
16238 struct bfd_link_hash_entry *bh = NULL;
16239 const struct elf_backend_data *bed
16240 = get_elf_backend_data (output_bfd);
16241
16242 if (!(_bfd_generic_link_add_one_symbol
16243 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16244 tls_sec, 0, NULL, FALSE,
16245 bed->collect, &bh)))
16246 return FALSE;
16247
16248 tlsbase->type = STT_TLS;
16249 tlsbase = (struct elf_link_hash_entry *)bh;
16250 tlsbase->def_regular = 1;
16251 tlsbase->other = STV_HIDDEN;
16252 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16253 }
16254 }
16255 return TRUE;
16256 }
16257
16258 /* Finish up dynamic symbol handling. We set the contents of various
16259 dynamic sections here. */
16260
16261 static bfd_boolean
16262 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16263 struct bfd_link_info * info,
16264 struct elf_link_hash_entry * h,
16265 Elf_Internal_Sym * sym)
16266 {
16267 struct elf32_arm_link_hash_table *htab;
16268 struct elf32_arm_link_hash_entry *eh;
16269
16270 htab = elf32_arm_hash_table (info);
16271 if (htab == NULL)
16272 return FALSE;
16273
16274 eh = (struct elf32_arm_link_hash_entry *) h;
16275
16276 if (h->plt.offset != (bfd_vma) -1)
16277 {
16278 if (!eh->is_iplt)
16279 {
16280 BFD_ASSERT (h->dynindx != -1);
16281 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16282 h->dynindx, 0))
16283 return FALSE;
16284 }
16285
16286 if (!h->def_regular)
16287 {
16288 /* Mark the symbol as undefined, rather than as defined in
16289 the .plt section. */
16290 sym->st_shndx = SHN_UNDEF;
16291 /* If the symbol is weak we need to clear the value.
16292 Otherwise, the PLT entry would provide a definition for
16293 the symbol even if the symbol wasn't defined anywhere,
16294 and so the symbol would never be NULL. Leave the value if
16295 there were any relocations where pointer equality matters
16296 (this is a clue for the dynamic linker, to make function
16297 pointer comparisons work between an application and shared
16298 library). */
16299 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16300 sym->st_value = 0;
16301 }
16302 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16303 {
16304 /* At least one non-call relocation references this .iplt entry,
16305 so the .iplt entry is the function's canonical address. */
16306 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16307 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16308 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16309 (output_bfd, htab->root.iplt->output_section));
16310 sym->st_value = (h->plt.offset
16311 + htab->root.iplt->output_section->vma
16312 + htab->root.iplt->output_offset);
16313 }
16314 }
16315
16316 if (h->needs_copy)
16317 {
16318 asection * s;
16319 Elf_Internal_Rela rel;
16320
16321 /* This symbol needs a copy reloc. Set it up. */
16322 BFD_ASSERT (h->dynindx != -1
16323 && (h->root.type == bfd_link_hash_defined
16324 || h->root.type == bfd_link_hash_defweak));
16325
16326 rel.r_addend = 0;
16327 rel.r_offset = (h->root.u.def.value
16328 + h->root.u.def.section->output_section->vma
16329 + h->root.u.def.section->output_offset);
16330 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16331 if (h->root.u.def.section == htab->root.sdynrelro)
16332 s = htab->root.sreldynrelro;
16333 else
16334 s = htab->root.srelbss;
16335 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16336 }
16337
16338 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16339 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16340 to the ".got" section. */
16341 if (h == htab->root.hdynamic
16342 || (!htab->vxworks_p && h == htab->root.hgot))
16343 sym->st_shndx = SHN_ABS;
16344
16345 return TRUE;
16346 }
16347
16348 static void
16349 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16350 void *contents,
16351 const unsigned long *template, unsigned count)
16352 {
16353 unsigned ix;
16354
16355 for (ix = 0; ix != count; ix++)
16356 {
16357 unsigned long insn = template[ix];
16358
16359 /* Emit mov pc,rx if bx is not permitted. */
16360 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16361 insn = (insn & 0xf000000f) | 0x01a0f000;
16362 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16363 }
16364 }
16365
16366 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16367 other variants, NaCl needs this entry in a static executable's
16368 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16369 zero. For .iplt really only the last bundle is useful, and .iplt
16370 could have a shorter first entry, with each individual PLT entry's
16371 relative branch calculated differently so it targets the last
16372 bundle instead of the instruction before it (labelled .Lplt_tail
16373 above). But it's simpler to keep the size and layout of PLT0
16374 consistent with the dynamic case, at the cost of some dead code at
16375 the start of .iplt and the one dead store to the stack at the start
16376 of .Lplt_tail. */
16377 static void
16378 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16379 asection *plt, bfd_vma got_displacement)
16380 {
16381 unsigned int i;
16382
16383 put_arm_insn (htab, output_bfd,
16384 elf32_arm_nacl_plt0_entry[0]
16385 | arm_movw_immediate (got_displacement),
16386 plt->contents + 0);
16387 put_arm_insn (htab, output_bfd,
16388 elf32_arm_nacl_plt0_entry[1]
16389 | arm_movt_immediate (got_displacement),
16390 plt->contents + 4);
16391
16392 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16393 put_arm_insn (htab, output_bfd,
16394 elf32_arm_nacl_plt0_entry[i],
16395 plt->contents + (i * 4));
16396 }
16397
16398 /* Finish up the dynamic sections. */
16399
16400 static bfd_boolean
16401 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16402 {
16403 bfd * dynobj;
16404 asection * sgot;
16405 asection * sdyn;
16406 struct elf32_arm_link_hash_table *htab;
16407
16408 htab = elf32_arm_hash_table (info);
16409 if (htab == NULL)
16410 return FALSE;
16411
16412 dynobj = elf_hash_table (info)->dynobj;
16413
16414 sgot = htab->root.sgotplt;
16415 /* A broken linker script might have discarded the dynamic sections.
16416 Catch this here so that we do not seg-fault later on. */
16417 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16418 return FALSE;
16419 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16420
16421 if (elf_hash_table (info)->dynamic_sections_created)
16422 {
16423 asection *splt;
16424 Elf32_External_Dyn *dyncon, *dynconend;
16425
16426 splt = htab->root.splt;
16427 BFD_ASSERT (splt != NULL && sdyn != NULL);
16428 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16429
16430 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16431 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16432
16433 for (; dyncon < dynconend; dyncon++)
16434 {
16435 Elf_Internal_Dyn dyn;
16436 const char * name;
16437 asection * s;
16438
16439 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16440
16441 switch (dyn.d_tag)
16442 {
16443 unsigned int type;
16444
16445 default:
16446 if (htab->vxworks_p
16447 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16448 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16449 break;
16450
16451 case DT_HASH:
16452 name = ".hash";
16453 goto get_vma_if_bpabi;
16454 case DT_STRTAB:
16455 name = ".dynstr";
16456 goto get_vma_if_bpabi;
16457 case DT_SYMTAB:
16458 name = ".dynsym";
16459 goto get_vma_if_bpabi;
16460 case DT_VERSYM:
16461 name = ".gnu.version";
16462 goto get_vma_if_bpabi;
16463 case DT_VERDEF:
16464 name = ".gnu.version_d";
16465 goto get_vma_if_bpabi;
16466 case DT_VERNEED:
16467 name = ".gnu.version_r";
16468 goto get_vma_if_bpabi;
16469
16470 case DT_PLTGOT:
16471 name = htab->symbian_p ? ".got" : ".got.plt";
16472 goto get_vma;
16473 case DT_JMPREL:
16474 name = RELOC_SECTION (htab, ".plt");
16475 get_vma:
16476 s = bfd_get_linker_section (dynobj, name);
16477 if (s == NULL)
16478 {
16479 _bfd_error_handler
16480 (_("could not find section %s"), name);
16481 bfd_set_error (bfd_error_invalid_operation);
16482 return FALSE;
16483 }
16484 if (!htab->symbian_p)
16485 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16486 else
16487 /* In the BPABI, tags in the PT_DYNAMIC section point
16488 at the file offset, not the memory address, for the
16489 convenience of the post linker. */
16490 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16491 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16492 break;
16493
16494 get_vma_if_bpabi:
16495 if (htab->symbian_p)
16496 goto get_vma;
16497 break;
16498
16499 case DT_PLTRELSZ:
16500 s = htab->root.srelplt;
16501 BFD_ASSERT (s != NULL);
16502 dyn.d_un.d_val = s->size;
16503 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16504 break;
16505
16506 case DT_RELSZ:
16507 case DT_RELASZ:
16508 case DT_REL:
16509 case DT_RELA:
16510 /* In the BPABI, the DT_REL tag must point at the file
16511 offset, not the VMA, of the first relocation
16512 section. So, we use code similar to that in
16513 elflink.c, but do not check for SHF_ALLOC on the
16514 relocation section, since relocation sections are
16515 never allocated under the BPABI. PLT relocs are also
16516 included. */
16517 if (htab->symbian_p)
16518 {
16519 unsigned int i;
16520 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16521 ? SHT_REL : SHT_RELA);
16522 dyn.d_un.d_val = 0;
16523 for (i = 1; i < elf_numsections (output_bfd); i++)
16524 {
16525 Elf_Internal_Shdr *hdr
16526 = elf_elfsections (output_bfd)[i];
16527 if (hdr->sh_type == type)
16528 {
16529 if (dyn.d_tag == DT_RELSZ
16530 || dyn.d_tag == DT_RELASZ)
16531 dyn.d_un.d_val += hdr->sh_size;
16532 else if ((ufile_ptr) hdr->sh_offset
16533 <= dyn.d_un.d_val - 1)
16534 dyn.d_un.d_val = hdr->sh_offset;
16535 }
16536 }
16537 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16538 }
16539 break;
16540
16541 case DT_TLSDESC_PLT:
16542 s = htab->root.splt;
16543 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16544 + htab->dt_tlsdesc_plt);
16545 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16546 break;
16547
16548 case DT_TLSDESC_GOT:
16549 s = htab->root.sgot;
16550 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16551 + htab->dt_tlsdesc_got);
16552 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16553 break;
16554
16555 /* Set the bottom bit of DT_INIT/FINI if the
16556 corresponding function is Thumb. */
16557 case DT_INIT:
16558 name = info->init_function;
16559 goto get_sym;
16560 case DT_FINI:
16561 name = info->fini_function;
16562 get_sym:
16563 /* If it wasn't set by elf_bfd_final_link
16564 then there is nothing to adjust. */
16565 if (dyn.d_un.d_val != 0)
16566 {
16567 struct elf_link_hash_entry * eh;
16568
16569 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16570 FALSE, FALSE, TRUE);
16571 if (eh != NULL
16572 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16573 == ST_BRANCH_TO_THUMB)
16574 {
16575 dyn.d_un.d_val |= 1;
16576 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16577 }
16578 }
16579 break;
16580 }
16581 }
16582
16583 /* Fill in the first entry in the procedure linkage table. */
16584 if (splt->size > 0 && htab->plt_header_size)
16585 {
16586 const bfd_vma *plt0_entry;
16587 bfd_vma got_address, plt_address, got_displacement;
16588
16589 /* Calculate the addresses of the GOT and PLT. */
16590 got_address = sgot->output_section->vma + sgot->output_offset;
16591 plt_address = splt->output_section->vma + splt->output_offset;
16592
16593 if (htab->vxworks_p)
16594 {
16595 /* The VxWorks GOT is relocated by the dynamic linker.
16596 Therefore, we must emit relocations rather than simply
16597 computing the values now. */
16598 Elf_Internal_Rela rel;
16599
16600 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16601 put_arm_insn (htab, output_bfd, plt0_entry[0],
16602 splt->contents + 0);
16603 put_arm_insn (htab, output_bfd, plt0_entry[1],
16604 splt->contents + 4);
16605 put_arm_insn (htab, output_bfd, plt0_entry[2],
16606 splt->contents + 8);
16607 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16608
16609 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16610 rel.r_offset = plt_address + 12;
16611 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16612 rel.r_addend = 0;
16613 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16614 htab->srelplt2->contents);
16615 }
16616 else if (htab->nacl_p)
16617 arm_nacl_put_plt0 (htab, output_bfd, splt,
16618 got_address + 8 - (plt_address + 16));
16619 else if (using_thumb_only (htab))
16620 {
16621 got_displacement = got_address - (plt_address + 12);
16622
16623 plt0_entry = elf32_thumb2_plt0_entry;
16624 put_arm_insn (htab, output_bfd, plt0_entry[0],
16625 splt->contents + 0);
16626 put_arm_insn (htab, output_bfd, plt0_entry[1],
16627 splt->contents + 4);
16628 put_arm_insn (htab, output_bfd, plt0_entry[2],
16629 splt->contents + 8);
16630
16631 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16632 }
16633 else
16634 {
16635 got_displacement = got_address - (plt_address + 16);
16636
16637 plt0_entry = elf32_arm_plt0_entry;
16638 put_arm_insn (htab, output_bfd, plt0_entry[0],
16639 splt->contents + 0);
16640 put_arm_insn (htab, output_bfd, plt0_entry[1],
16641 splt->contents + 4);
16642 put_arm_insn (htab, output_bfd, plt0_entry[2],
16643 splt->contents + 8);
16644 put_arm_insn (htab, output_bfd, plt0_entry[3],
16645 splt->contents + 12);
16646
16647 #ifdef FOUR_WORD_PLT
16648 /* The displacement value goes in the otherwise-unused
16649 last word of the second entry. */
16650 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16651 #else
16652 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16653 #endif
16654 }
16655 }
16656
16657 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16658 really seem like the right value. */
16659 if (splt->output_section->owner == output_bfd)
16660 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16661
16662 if (htab->dt_tlsdesc_plt)
16663 {
16664 bfd_vma got_address
16665 = sgot->output_section->vma + sgot->output_offset;
16666 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16667 + htab->root.sgot->output_offset);
16668 bfd_vma plt_address
16669 = splt->output_section->vma + splt->output_offset;
16670
16671 arm_put_trampoline (htab, output_bfd,
16672 splt->contents + htab->dt_tlsdesc_plt,
16673 dl_tlsdesc_lazy_trampoline, 6);
16674
16675 bfd_put_32 (output_bfd,
16676 gotplt_address + htab->dt_tlsdesc_got
16677 - (plt_address + htab->dt_tlsdesc_plt)
16678 - dl_tlsdesc_lazy_trampoline[6],
16679 splt->contents + htab->dt_tlsdesc_plt + 24);
16680 bfd_put_32 (output_bfd,
16681 got_address - (plt_address + htab->dt_tlsdesc_plt)
16682 - dl_tlsdesc_lazy_trampoline[7],
16683 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16684 }
16685
16686 if (htab->tls_trampoline)
16687 {
16688 arm_put_trampoline (htab, output_bfd,
16689 splt->contents + htab->tls_trampoline,
16690 tls_trampoline, 3);
16691 #ifdef FOUR_WORD_PLT
16692 bfd_put_32 (output_bfd, 0x00000000,
16693 splt->contents + htab->tls_trampoline + 12);
16694 #endif
16695 }
16696
16697 if (htab->vxworks_p
16698 && !bfd_link_pic (info)
16699 && htab->root.splt->size > 0)
16700 {
16701 /* Correct the .rel(a).plt.unloaded relocations. They will have
16702 incorrect symbol indexes. */
16703 int num_plts;
16704 unsigned char *p;
16705
16706 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16707 / htab->plt_entry_size);
16708 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16709
16710 for (; num_plts; num_plts--)
16711 {
16712 Elf_Internal_Rela rel;
16713
16714 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16715 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16716 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16717 p += RELOC_SIZE (htab);
16718
16719 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16720 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16721 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16722 p += RELOC_SIZE (htab);
16723 }
16724 }
16725 }
16726
16727 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16728 /* NaCl uses a special first entry in .iplt too. */
16729 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16730
16731 /* Fill in the first three entries in the global offset table. */
16732 if (sgot)
16733 {
16734 if (sgot->size > 0)
16735 {
16736 if (sdyn == NULL)
16737 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16738 else
16739 bfd_put_32 (output_bfd,
16740 sdyn->output_section->vma + sdyn->output_offset,
16741 sgot->contents);
16742 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16743 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16744 }
16745
16746 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16747 }
16748
16749 return TRUE;
16750 }
16751
16752 static void
16753 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16754 {
16755 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16756 struct elf32_arm_link_hash_table *globals;
16757 struct elf_segment_map *m;
16758
16759 i_ehdrp = elf_elfheader (abfd);
16760
16761 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16762 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16763 else
16764 _bfd_elf_post_process_headers (abfd, link_info);
16765 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16766
16767 if (link_info)
16768 {
16769 globals = elf32_arm_hash_table (link_info);
16770 if (globals != NULL && globals->byteswap_code)
16771 i_ehdrp->e_flags |= EF_ARM_BE8;
16772 }
16773
16774 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16775 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16776 {
16777 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16778 if (abi == AEABI_VFP_args_vfp)
16779 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16780 else
16781 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16782 }
16783
16784 /* Scan segment to set p_flags attribute if it contains only sections with
16785 SHF_ARM_PURECODE flag. */
16786 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16787 {
16788 unsigned int j;
16789
16790 if (m->count == 0)
16791 continue;
16792 for (j = 0; j < m->count; j++)
16793 {
16794 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16795 break;
16796 }
16797 if (j == m->count)
16798 {
16799 m->p_flags = PF_X;
16800 m->p_flags_valid = 1;
16801 }
16802 }
16803 }
16804
16805 static enum elf_reloc_type_class
16806 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16807 const asection *rel_sec ATTRIBUTE_UNUSED,
16808 const Elf_Internal_Rela *rela)
16809 {
16810 switch ((int) ELF32_R_TYPE (rela->r_info))
16811 {
16812 case R_ARM_RELATIVE:
16813 return reloc_class_relative;
16814 case R_ARM_JUMP_SLOT:
16815 return reloc_class_plt;
16816 case R_ARM_COPY:
16817 return reloc_class_copy;
16818 case R_ARM_IRELATIVE:
16819 return reloc_class_ifunc;
16820 default:
16821 return reloc_class_normal;
16822 }
16823 }
16824
16825 static void
16826 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16827 {
16828 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16829 }
16830
16831 /* Return TRUE if this is an unwinding table entry. */
16832
16833 static bfd_boolean
16834 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16835 {
16836 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16837 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16838 }
16839
16840
16841 /* Set the type and flags for an ARM section. We do this by
16842 the section name, which is a hack, but ought to work. */
16843
16844 static bfd_boolean
16845 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16846 {
16847 const char * name;
16848
16849 name = bfd_get_section_name (abfd, sec);
16850
16851 if (is_arm_elf_unwind_section_name (abfd, name))
16852 {
16853 hdr->sh_type = SHT_ARM_EXIDX;
16854 hdr->sh_flags |= SHF_LINK_ORDER;
16855 }
16856
16857 if (sec->flags & SEC_ELF_PURECODE)
16858 hdr->sh_flags |= SHF_ARM_PURECODE;
16859
16860 return TRUE;
16861 }
16862
16863 /* Handle an ARM specific section when reading an object file. This is
16864 called when bfd_section_from_shdr finds a section with an unknown
16865 type. */
16866
16867 static bfd_boolean
16868 elf32_arm_section_from_shdr (bfd *abfd,
16869 Elf_Internal_Shdr * hdr,
16870 const char *name,
16871 int shindex)
16872 {
16873 /* There ought to be a place to keep ELF backend specific flags, but
16874 at the moment there isn't one. We just keep track of the
16875 sections by their name, instead. Fortunately, the ABI gives
16876 names for all the ARM specific sections, so we will probably get
16877 away with this. */
16878 switch (hdr->sh_type)
16879 {
16880 case SHT_ARM_EXIDX:
16881 case SHT_ARM_PREEMPTMAP:
16882 case SHT_ARM_ATTRIBUTES:
16883 break;
16884
16885 default:
16886 return FALSE;
16887 }
16888
16889 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16890 return FALSE;
16891
16892 return TRUE;
16893 }
16894
16895 static _arm_elf_section_data *
16896 get_arm_elf_section_data (asection * sec)
16897 {
16898 if (sec && sec->owner && is_arm_elf (sec->owner))
16899 return elf32_arm_section_data (sec);
16900 else
16901 return NULL;
16902 }
16903
16904 typedef struct
16905 {
16906 void *flaginfo;
16907 struct bfd_link_info *info;
16908 asection *sec;
16909 int sec_shndx;
16910 int (*func) (void *, const char *, Elf_Internal_Sym *,
16911 asection *, struct elf_link_hash_entry *);
16912 } output_arch_syminfo;
16913
16914 enum map_symbol_type
16915 {
16916 ARM_MAP_ARM,
16917 ARM_MAP_THUMB,
16918 ARM_MAP_DATA
16919 };
16920
16921
16922 /* Output a single mapping symbol. */
16923
16924 static bfd_boolean
16925 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16926 enum map_symbol_type type,
16927 bfd_vma offset)
16928 {
16929 static const char *names[3] = {"$a", "$t", "$d"};
16930 Elf_Internal_Sym sym;
16931
16932 sym.st_value = osi->sec->output_section->vma
16933 + osi->sec->output_offset
16934 + offset;
16935 sym.st_size = 0;
16936 sym.st_other = 0;
16937 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16938 sym.st_shndx = osi->sec_shndx;
16939 sym.st_target_internal = 0;
16940 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16941 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16942 }
16943
16944 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16945 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16946
16947 static bfd_boolean
16948 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16949 bfd_boolean is_iplt_entry_p,
16950 union gotplt_union *root_plt,
16951 struct arm_plt_info *arm_plt)
16952 {
16953 struct elf32_arm_link_hash_table *htab;
16954 bfd_vma addr, plt_header_size;
16955
16956 if (root_plt->offset == (bfd_vma) -1)
16957 return TRUE;
16958
16959 htab = elf32_arm_hash_table (osi->info);
16960 if (htab == NULL)
16961 return FALSE;
16962
16963 if (is_iplt_entry_p)
16964 {
16965 osi->sec = htab->root.iplt;
16966 plt_header_size = 0;
16967 }
16968 else
16969 {
16970 osi->sec = htab->root.splt;
16971 plt_header_size = htab->plt_header_size;
16972 }
16973 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16974 (osi->info->output_bfd, osi->sec->output_section));
16975
16976 addr = root_plt->offset & -2;
16977 if (htab->symbian_p)
16978 {
16979 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16980 return FALSE;
16981 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16982 return FALSE;
16983 }
16984 else if (htab->vxworks_p)
16985 {
16986 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16987 return FALSE;
16988 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16989 return FALSE;
16990 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16991 return FALSE;
16992 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16993 return FALSE;
16994 }
16995 else if (htab->nacl_p)
16996 {
16997 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16998 return FALSE;
16999 }
17000 else if (using_thumb_only (htab))
17001 {
17002 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17003 return FALSE;
17004 }
17005 else
17006 {
17007 bfd_boolean thumb_stub_p;
17008
17009 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17010 if (thumb_stub_p)
17011 {
17012 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17013 return FALSE;
17014 }
17015 #ifdef FOUR_WORD_PLT
17016 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17017 return FALSE;
17018 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17019 return FALSE;
17020 #else
17021 /* A three-word PLT with no Thumb thunk contains only Arm code,
17022 so only need to output a mapping symbol for the first PLT entry and
17023 entries with thumb thunks. */
17024 if (thumb_stub_p || addr == plt_header_size)
17025 {
17026 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17027 return FALSE;
17028 }
17029 #endif
17030 }
17031
17032 return TRUE;
17033 }
17034
17035 /* Output mapping symbols for PLT entries associated with H. */
17036
17037 static bfd_boolean
17038 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17039 {
17040 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17041 struct elf32_arm_link_hash_entry *eh;
17042
17043 if (h->root.type == bfd_link_hash_indirect)
17044 return TRUE;
17045
17046 if (h->root.type == bfd_link_hash_warning)
17047 /* When warning symbols are created, they **replace** the "real"
17048 entry in the hash table, thus we never get to see the real
17049 symbol in a hash traversal. So look at it now. */
17050 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17051
17052 eh = (struct elf32_arm_link_hash_entry *) h;
17053 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17054 &h->plt, &eh->plt);
17055 }
17056
17057 /* Bind a veneered symbol to its veneer identified by its hash entry
17058 STUB_ENTRY. The veneered location thus loose its symbol. */
17059
17060 static void
17061 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17062 {
17063 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17064
17065 BFD_ASSERT (hash);
17066 hash->root.root.u.def.section = stub_entry->stub_sec;
17067 hash->root.root.u.def.value = stub_entry->stub_offset;
17068 hash->root.size = stub_entry->stub_size;
17069 }
17070
17071 /* Output a single local symbol for a generated stub. */
17072
17073 static bfd_boolean
17074 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17075 bfd_vma offset, bfd_vma size)
17076 {
17077 Elf_Internal_Sym sym;
17078
17079 sym.st_value = osi->sec->output_section->vma
17080 + osi->sec->output_offset
17081 + offset;
17082 sym.st_size = size;
17083 sym.st_other = 0;
17084 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17085 sym.st_shndx = osi->sec_shndx;
17086 sym.st_target_internal = 0;
17087 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17088 }
17089
17090 static bfd_boolean
17091 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17092 void * in_arg)
17093 {
17094 struct elf32_arm_stub_hash_entry *stub_entry;
17095 asection *stub_sec;
17096 bfd_vma addr;
17097 char *stub_name;
17098 output_arch_syminfo *osi;
17099 const insn_sequence *template_sequence;
17100 enum stub_insn_type prev_type;
17101 int size;
17102 int i;
17103 enum map_symbol_type sym_type;
17104
17105 /* Massage our args to the form they really have. */
17106 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17107 osi = (output_arch_syminfo *) in_arg;
17108
17109 stub_sec = stub_entry->stub_sec;
17110
17111 /* Ensure this stub is attached to the current section being
17112 processed. */
17113 if (stub_sec != osi->sec)
17114 return TRUE;
17115
17116 addr = (bfd_vma) stub_entry->stub_offset;
17117 template_sequence = stub_entry->stub_template;
17118
17119 if (arm_stub_sym_claimed (stub_entry->stub_type))
17120 arm_stub_claim_sym (stub_entry);
17121 else
17122 {
17123 stub_name = stub_entry->output_name;
17124 switch (template_sequence[0].type)
17125 {
17126 case ARM_TYPE:
17127 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17128 stub_entry->stub_size))
17129 return FALSE;
17130 break;
17131 case THUMB16_TYPE:
17132 case THUMB32_TYPE:
17133 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17134 stub_entry->stub_size))
17135 return FALSE;
17136 break;
17137 default:
17138 BFD_FAIL ();
17139 return 0;
17140 }
17141 }
17142
17143 prev_type = DATA_TYPE;
17144 size = 0;
17145 for (i = 0; i < stub_entry->stub_template_size; i++)
17146 {
17147 switch (template_sequence[i].type)
17148 {
17149 case ARM_TYPE:
17150 sym_type = ARM_MAP_ARM;
17151 break;
17152
17153 case THUMB16_TYPE:
17154 case THUMB32_TYPE:
17155 sym_type = ARM_MAP_THUMB;
17156 break;
17157
17158 case DATA_TYPE:
17159 sym_type = ARM_MAP_DATA;
17160 break;
17161
17162 default:
17163 BFD_FAIL ();
17164 return FALSE;
17165 }
17166
17167 if (template_sequence[i].type != prev_type)
17168 {
17169 prev_type = template_sequence[i].type;
17170 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17171 return FALSE;
17172 }
17173
17174 switch (template_sequence[i].type)
17175 {
17176 case ARM_TYPE:
17177 case THUMB32_TYPE:
17178 size += 4;
17179 break;
17180
17181 case THUMB16_TYPE:
17182 size += 2;
17183 break;
17184
17185 case DATA_TYPE:
17186 size += 4;
17187 break;
17188
17189 default:
17190 BFD_FAIL ();
17191 return FALSE;
17192 }
17193 }
17194
17195 return TRUE;
17196 }
17197
17198 /* Output mapping symbols for linker generated sections,
17199 and for those data-only sections that do not have a
17200 $d. */
17201
17202 static bfd_boolean
17203 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17204 struct bfd_link_info *info,
17205 void *flaginfo,
17206 int (*func) (void *, const char *,
17207 Elf_Internal_Sym *,
17208 asection *,
17209 struct elf_link_hash_entry *))
17210 {
17211 output_arch_syminfo osi;
17212 struct elf32_arm_link_hash_table *htab;
17213 bfd_vma offset;
17214 bfd_size_type size;
17215 bfd *input_bfd;
17216
17217 htab = elf32_arm_hash_table (info);
17218 if (htab == NULL)
17219 return FALSE;
17220
17221 check_use_blx (htab);
17222
17223 osi.flaginfo = flaginfo;
17224 osi.info = info;
17225 osi.func = func;
17226
17227 /* Add a $d mapping symbol to data-only sections that
17228 don't have any mapping symbol. This may result in (harmless) redundant
17229 mapping symbols. */
17230 for (input_bfd = info->input_bfds;
17231 input_bfd != NULL;
17232 input_bfd = input_bfd->link.next)
17233 {
17234 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17235 for (osi.sec = input_bfd->sections;
17236 osi.sec != NULL;
17237 osi.sec = osi.sec->next)
17238 {
17239 if (osi.sec->output_section != NULL
17240 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17241 != 0)
17242 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17243 == SEC_HAS_CONTENTS
17244 && get_arm_elf_section_data (osi.sec) != NULL
17245 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17246 && osi.sec->size > 0
17247 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17248 {
17249 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17250 (output_bfd, osi.sec->output_section);
17251 if (osi.sec_shndx != (int)SHN_BAD)
17252 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17253 }
17254 }
17255 }
17256
17257 /* ARM->Thumb glue. */
17258 if (htab->arm_glue_size > 0)
17259 {
17260 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17261 ARM2THUMB_GLUE_SECTION_NAME);
17262
17263 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17264 (output_bfd, osi.sec->output_section);
17265 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17266 || htab->pic_veneer)
17267 size = ARM2THUMB_PIC_GLUE_SIZE;
17268 else if (htab->use_blx)
17269 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17270 else
17271 size = ARM2THUMB_STATIC_GLUE_SIZE;
17272
17273 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17274 {
17275 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17276 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17277 }
17278 }
17279
17280 /* Thumb->ARM glue. */
17281 if (htab->thumb_glue_size > 0)
17282 {
17283 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17284 THUMB2ARM_GLUE_SECTION_NAME);
17285
17286 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17287 (output_bfd, osi.sec->output_section);
17288 size = THUMB2ARM_GLUE_SIZE;
17289
17290 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17291 {
17292 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17293 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17294 }
17295 }
17296
17297 /* ARMv4 BX veneers. */
17298 if (htab->bx_glue_size > 0)
17299 {
17300 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17301 ARM_BX_GLUE_SECTION_NAME);
17302
17303 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17304 (output_bfd, osi.sec->output_section);
17305
17306 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17307 }
17308
17309 /* Long calls stubs. */
17310 if (htab->stub_bfd && htab->stub_bfd->sections)
17311 {
17312 asection* stub_sec;
17313
17314 for (stub_sec = htab->stub_bfd->sections;
17315 stub_sec != NULL;
17316 stub_sec = stub_sec->next)
17317 {
17318 /* Ignore non-stub sections. */
17319 if (!strstr (stub_sec->name, STUB_SUFFIX))
17320 continue;
17321
17322 osi.sec = stub_sec;
17323
17324 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17325 (output_bfd, osi.sec->output_section);
17326
17327 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17328 }
17329 }
17330
17331 /* Finally, output mapping symbols for the PLT. */
17332 if (htab->root.splt && htab->root.splt->size > 0)
17333 {
17334 osi.sec = htab->root.splt;
17335 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17336 (output_bfd, osi.sec->output_section));
17337
17338 /* Output mapping symbols for the plt header. SymbianOS does not have a
17339 plt header. */
17340 if (htab->vxworks_p)
17341 {
17342 /* VxWorks shared libraries have no PLT header. */
17343 if (!bfd_link_pic (info))
17344 {
17345 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17346 return FALSE;
17347 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17348 return FALSE;
17349 }
17350 }
17351 else if (htab->nacl_p)
17352 {
17353 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17354 return FALSE;
17355 }
17356 else if (using_thumb_only (htab))
17357 {
17358 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17359 return FALSE;
17360 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17361 return FALSE;
17362 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17363 return FALSE;
17364 }
17365 else if (!htab->symbian_p)
17366 {
17367 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17368 return FALSE;
17369 #ifndef FOUR_WORD_PLT
17370 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17371 return FALSE;
17372 #endif
17373 }
17374 }
17375 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17376 {
17377 /* NaCl uses a special first entry in .iplt too. */
17378 osi.sec = htab->root.iplt;
17379 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17380 (output_bfd, osi.sec->output_section));
17381 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17382 return FALSE;
17383 }
17384 if ((htab->root.splt && htab->root.splt->size > 0)
17385 || (htab->root.iplt && htab->root.iplt->size > 0))
17386 {
17387 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17388 for (input_bfd = info->input_bfds;
17389 input_bfd != NULL;
17390 input_bfd = input_bfd->link.next)
17391 {
17392 struct arm_local_iplt_info **local_iplt;
17393 unsigned int i, num_syms;
17394
17395 local_iplt = elf32_arm_local_iplt (input_bfd);
17396 if (local_iplt != NULL)
17397 {
17398 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17399 for (i = 0; i < num_syms; i++)
17400 if (local_iplt[i] != NULL
17401 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17402 &local_iplt[i]->root,
17403 &local_iplt[i]->arm))
17404 return FALSE;
17405 }
17406 }
17407 }
17408 if (htab->dt_tlsdesc_plt != 0)
17409 {
17410 /* Mapping symbols for the lazy tls trampoline. */
17411 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17412 return FALSE;
17413
17414 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17415 htab->dt_tlsdesc_plt + 24))
17416 return FALSE;
17417 }
17418 if (htab->tls_trampoline != 0)
17419 {
17420 /* Mapping symbols for the tls trampoline. */
17421 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17422 return FALSE;
17423 #ifdef FOUR_WORD_PLT
17424 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17425 htab->tls_trampoline + 12))
17426 return FALSE;
17427 #endif
17428 }
17429
17430 return TRUE;
17431 }
17432
17433 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17434 the import library. All SYMCOUNT symbols of ABFD can be examined
17435 from their pointers in SYMS. Pointers of symbols to keep should be
17436 stored continuously at the beginning of that array.
17437
17438 Returns the number of symbols to keep. */
17439
17440 static unsigned int
17441 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17442 struct bfd_link_info *info,
17443 asymbol **syms, long symcount)
17444 {
17445 size_t maxnamelen;
17446 char *cmse_name;
17447 long src_count, dst_count = 0;
17448 struct elf32_arm_link_hash_table *htab;
17449
17450 htab = elf32_arm_hash_table (info);
17451 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17452 symcount = 0;
17453
17454 maxnamelen = 128;
17455 cmse_name = (char *) bfd_malloc (maxnamelen);
17456 for (src_count = 0; src_count < symcount; src_count++)
17457 {
17458 struct elf32_arm_link_hash_entry *cmse_hash;
17459 asymbol *sym;
17460 flagword flags;
17461 char *name;
17462 size_t namelen;
17463
17464 sym = syms[src_count];
17465 flags = sym->flags;
17466 name = (char *) bfd_asymbol_name (sym);
17467
17468 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17469 continue;
17470 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17471 continue;
17472
17473 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17474 if (namelen > maxnamelen)
17475 {
17476 cmse_name = (char *)
17477 bfd_realloc (cmse_name, namelen);
17478 maxnamelen = namelen;
17479 }
17480 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17481 cmse_hash = (struct elf32_arm_link_hash_entry *)
17482 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17483
17484 if (!cmse_hash
17485 || (cmse_hash->root.root.type != bfd_link_hash_defined
17486 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17487 || cmse_hash->root.type != STT_FUNC)
17488 continue;
17489
17490 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17491 continue;
17492
17493 syms[dst_count++] = sym;
17494 }
17495 free (cmse_name);
17496
17497 syms[dst_count] = NULL;
17498
17499 return dst_count;
17500 }
17501
17502 /* Filter symbols of ABFD to include in the import library. All
17503 SYMCOUNT symbols of ABFD can be examined from their pointers in
17504 SYMS. Pointers of symbols to keep should be stored continuously at
17505 the beginning of that array.
17506
17507 Returns the number of symbols to keep. */
17508
17509 static unsigned int
17510 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17511 struct bfd_link_info *info,
17512 asymbol **syms, long symcount)
17513 {
17514 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17515
17516 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17517 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17518 library to be a relocatable object file. */
17519 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
17520 if (globals->cmse_implib)
17521 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17522 else
17523 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17524 }
17525
17526 /* Allocate target specific section data. */
17527
17528 static bfd_boolean
17529 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17530 {
17531 if (!sec->used_by_bfd)
17532 {
17533 _arm_elf_section_data *sdata;
17534 bfd_size_type amt = sizeof (*sdata);
17535
17536 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17537 if (sdata == NULL)
17538 return FALSE;
17539 sec->used_by_bfd = sdata;
17540 }
17541
17542 return _bfd_elf_new_section_hook (abfd, sec);
17543 }
17544
17545
17546 /* Used to order a list of mapping symbols by address. */
17547
17548 static int
17549 elf32_arm_compare_mapping (const void * a, const void * b)
17550 {
17551 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17552 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17553
17554 if (amap->vma > bmap->vma)
17555 return 1;
17556 else if (amap->vma < bmap->vma)
17557 return -1;
17558 else if (amap->type > bmap->type)
17559 /* Ensure results do not depend on the host qsort for objects with
17560 multiple mapping symbols at the same address by sorting on type
17561 after vma. */
17562 return 1;
17563 else if (amap->type < bmap->type)
17564 return -1;
17565 else
17566 return 0;
17567 }
17568
17569 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17570
17571 static unsigned long
17572 offset_prel31 (unsigned long addr, bfd_vma offset)
17573 {
17574 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17575 }
17576
17577 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17578 relocations. */
17579
17580 static void
17581 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17582 {
17583 unsigned long first_word = bfd_get_32 (output_bfd, from);
17584 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17585
17586 /* High bit of first word is supposed to be zero. */
17587 if ((first_word & 0x80000000ul) == 0)
17588 first_word = offset_prel31 (first_word, offset);
17589
17590 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17591 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17592 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17593 second_word = offset_prel31 (second_word, offset);
17594
17595 bfd_put_32 (output_bfd, first_word, to);
17596 bfd_put_32 (output_bfd, second_word, to + 4);
17597 }
17598
17599 /* Data for make_branch_to_a8_stub(). */
17600
17601 struct a8_branch_to_stub_data
17602 {
17603 asection *writing_section;
17604 bfd_byte *contents;
17605 };
17606
17607
17608 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17609 places for a particular section. */
17610
17611 static bfd_boolean
17612 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17613 void *in_arg)
17614 {
17615 struct elf32_arm_stub_hash_entry *stub_entry;
17616 struct a8_branch_to_stub_data *data;
17617 bfd_byte *contents;
17618 unsigned long branch_insn;
17619 bfd_vma veneered_insn_loc, veneer_entry_loc;
17620 bfd_signed_vma branch_offset;
17621 bfd *abfd;
17622 unsigned int loc;
17623
17624 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17625 data = (struct a8_branch_to_stub_data *) in_arg;
17626
17627 if (stub_entry->target_section != data->writing_section
17628 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17629 return TRUE;
17630
17631 contents = data->contents;
17632
17633 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17634 generated when both source and target are in the same section. */
17635 veneered_insn_loc = stub_entry->target_section->output_section->vma
17636 + stub_entry->target_section->output_offset
17637 + stub_entry->source_value;
17638
17639 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17640 + stub_entry->stub_sec->output_offset
17641 + stub_entry->stub_offset;
17642
17643 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17644 veneered_insn_loc &= ~3u;
17645
17646 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17647
17648 abfd = stub_entry->target_section->owner;
17649 loc = stub_entry->source_value;
17650
17651 /* We attempt to avoid this condition by setting stubs_always_after_branch
17652 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17653 This check is just to be on the safe side... */
17654 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17655 {
17656 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17657 "allocated in unsafe location"), abfd);
17658 return FALSE;
17659 }
17660
17661 switch (stub_entry->stub_type)
17662 {
17663 case arm_stub_a8_veneer_b:
17664 case arm_stub_a8_veneer_b_cond:
17665 branch_insn = 0xf0009000;
17666 goto jump24;
17667
17668 case arm_stub_a8_veneer_blx:
17669 branch_insn = 0xf000e800;
17670 goto jump24;
17671
17672 case arm_stub_a8_veneer_bl:
17673 {
17674 unsigned int i1, j1, i2, j2, s;
17675
17676 branch_insn = 0xf000d000;
17677
17678 jump24:
17679 if (branch_offset < -16777216 || branch_offset > 16777214)
17680 {
17681 /* There's not much we can do apart from complain if this
17682 happens. */
17683 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17684 "of range (input file too large)"), abfd);
17685 return FALSE;
17686 }
17687
17688 /* i1 = not(j1 eor s), so:
17689 not i1 = j1 eor s
17690 j1 = (not i1) eor s. */
17691
17692 branch_insn |= (branch_offset >> 1) & 0x7ff;
17693 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17694 i2 = (branch_offset >> 22) & 1;
17695 i1 = (branch_offset >> 23) & 1;
17696 s = (branch_offset >> 24) & 1;
17697 j1 = (!i1) ^ s;
17698 j2 = (!i2) ^ s;
17699 branch_insn |= j2 << 11;
17700 branch_insn |= j1 << 13;
17701 branch_insn |= s << 26;
17702 }
17703 break;
17704
17705 default:
17706 BFD_FAIL ();
17707 return FALSE;
17708 }
17709
17710 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17711 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17712
17713 return TRUE;
17714 }
17715
17716 /* Beginning of stm32l4xx work-around. */
17717
17718 /* Functions encoding instructions necessary for the emission of the
17719 fix-stm32l4xx-629360.
17720 Encoding is extracted from the
17721 ARM (C) Architecture Reference Manual
17722 ARMv7-A and ARMv7-R edition
17723 ARM DDI 0406C.b (ID072512). */
17724
17725 static inline bfd_vma
17726 create_instruction_branch_absolute (int branch_offset)
17727 {
17728 /* A8.8.18 B (A8-334)
17729 B target_address (Encoding T4). */
17730 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17731 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17732 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17733
17734 int s = ((branch_offset & 0x1000000) >> 24);
17735 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17736 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17737
17738 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17739 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17740
17741 bfd_vma patched_inst = 0xf0009000
17742 | s << 26 /* S. */
17743 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17744 | j1 << 13 /* J1. */
17745 | j2 << 11 /* J2. */
17746 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17747
17748 return patched_inst;
17749 }
17750
17751 static inline bfd_vma
17752 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17753 {
17754 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17755 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17756 bfd_vma patched_inst = 0xe8900000
17757 | (/*W=*/wback << 21)
17758 | (base_reg << 16)
17759 | (reg_mask & 0x0000ffff);
17760
17761 return patched_inst;
17762 }
17763
17764 static inline bfd_vma
17765 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17766 {
17767 /* A8.8.60 LDMDB/LDMEA (A8-402)
17768 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17769 bfd_vma patched_inst = 0xe9100000
17770 | (/*W=*/wback << 21)
17771 | (base_reg << 16)
17772 | (reg_mask & 0x0000ffff);
17773
17774 return patched_inst;
17775 }
17776
17777 static inline bfd_vma
17778 create_instruction_mov (int target_reg, int source_reg)
17779 {
17780 /* A8.8.103 MOV (register) (A8-486)
17781 MOV Rd, Rm (Encoding T1). */
17782 bfd_vma patched_inst = 0x4600
17783 | (target_reg & 0x7)
17784 | ((target_reg & 0x8) >> 3) << 7
17785 | (source_reg << 3);
17786
17787 return patched_inst;
17788 }
17789
17790 static inline bfd_vma
17791 create_instruction_sub (int target_reg, int source_reg, int value)
17792 {
17793 /* A8.8.221 SUB (immediate) (A8-708)
17794 SUB Rd, Rn, #value (Encoding T3). */
17795 bfd_vma patched_inst = 0xf1a00000
17796 | (target_reg << 8)
17797 | (source_reg << 16)
17798 | (/*S=*/0 << 20)
17799 | ((value & 0x800) >> 11) << 26
17800 | ((value & 0x700) >> 8) << 12
17801 | (value & 0x0ff);
17802
17803 return patched_inst;
17804 }
17805
17806 static inline bfd_vma
17807 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17808 int first_reg)
17809 {
17810 /* A8.8.332 VLDM (A8-922)
17811 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17812 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17813 | (/*W=*/wback << 21)
17814 | (base_reg << 16)
17815 | (num_words & 0x000000ff)
17816 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17817 | (first_reg & 0x00000001) << 22;
17818
17819 return patched_inst;
17820 }
17821
17822 static inline bfd_vma
17823 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17824 int first_reg)
17825 {
17826 /* A8.8.332 VLDM (A8-922)
17827 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17828 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17829 | (base_reg << 16)
17830 | (num_words & 0x000000ff)
17831 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17832 | (first_reg & 0x00000001) << 22;
17833
17834 return patched_inst;
17835 }
17836
17837 static inline bfd_vma
17838 create_instruction_udf_w (int value)
17839 {
17840 /* A8.8.247 UDF (A8-758)
17841 Undefined (Encoding T2). */
17842 bfd_vma patched_inst = 0xf7f0a000
17843 | (value & 0x00000fff)
17844 | (value & 0x000f0000) << 16;
17845
17846 return patched_inst;
17847 }
17848
17849 static inline bfd_vma
17850 create_instruction_udf (int value)
17851 {
17852 /* A8.8.247 UDF (A8-758)
17853 Undefined (Encoding T1). */
17854 bfd_vma patched_inst = 0xde00
17855 | (value & 0xff);
17856
17857 return patched_inst;
17858 }
17859
17860 /* Functions writing an instruction in memory, returning the next
17861 memory position to write to. */
17862
17863 static inline bfd_byte *
17864 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17865 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17866 {
17867 put_thumb2_insn (htab, output_bfd, insn, pt);
17868 return pt + 4;
17869 }
17870
17871 static inline bfd_byte *
17872 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17873 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17874 {
17875 put_thumb_insn (htab, output_bfd, insn, pt);
17876 return pt + 2;
17877 }
17878
17879 /* Function filling up a region in memory with T1 and T2 UDFs taking
17880 care of alignment. */
17881
17882 static bfd_byte *
17883 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17884 bfd * output_bfd,
17885 const bfd_byte * const base_stub_contents,
17886 bfd_byte * const from_stub_contents,
17887 const bfd_byte * const end_stub_contents)
17888 {
17889 bfd_byte *current_stub_contents = from_stub_contents;
17890
17891 /* Fill the remaining of the stub with deterministic contents : UDF
17892 instructions.
17893 Check if realignment is needed on modulo 4 frontier using T1, to
17894 further use T2. */
17895 if ((current_stub_contents < end_stub_contents)
17896 && !((current_stub_contents - base_stub_contents) % 2)
17897 && ((current_stub_contents - base_stub_contents) % 4))
17898 current_stub_contents =
17899 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17900 create_instruction_udf (0));
17901
17902 for (; current_stub_contents < end_stub_contents;)
17903 current_stub_contents =
17904 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17905 create_instruction_udf_w (0));
17906
17907 return current_stub_contents;
17908 }
17909
17910 /* Functions writing the stream of instructions equivalent to the
17911 derived sequence for ldmia, ldmdb, vldm respectively. */
17912
17913 static void
17914 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17915 bfd * output_bfd,
17916 const insn32 initial_insn,
17917 const bfd_byte *const initial_insn_addr,
17918 bfd_byte *const base_stub_contents)
17919 {
17920 int wback = (initial_insn & 0x00200000) >> 21;
17921 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17922 int insn_all_registers = initial_insn & 0x0000ffff;
17923 int insn_low_registers, insn_high_registers;
17924 int usable_register_mask;
17925 int nb_registers = elf32_arm_popcount (insn_all_registers);
17926 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17927 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17928 bfd_byte *current_stub_contents = base_stub_contents;
17929
17930 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17931
17932 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17933 smaller than 8 registers load sequences that do not cause the
17934 hardware issue. */
17935 if (nb_registers <= 8)
17936 {
17937 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17938 current_stub_contents =
17939 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17940 initial_insn);
17941
17942 /* B initial_insn_addr+4. */
17943 if (!restore_pc)
17944 current_stub_contents =
17945 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17946 create_instruction_branch_absolute
17947 (initial_insn_addr - current_stub_contents));
17948
17949 /* Fill the remaining of the stub with deterministic contents. */
17950 current_stub_contents =
17951 stm32l4xx_fill_stub_udf (htab, output_bfd,
17952 base_stub_contents, current_stub_contents,
17953 base_stub_contents +
17954 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17955
17956 return;
17957 }
17958
17959 /* - reg_list[13] == 0. */
17960 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17961
17962 /* - reg_list[14] & reg_list[15] != 1. */
17963 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17964
17965 /* - if (wback==1) reg_list[rn] == 0. */
17966 BFD_ASSERT (!wback || !restore_rn);
17967
17968 /* - nb_registers > 8. */
17969 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17970
17971 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17972
17973 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17974 - One with the 7 lowest registers (register mask 0x007F)
17975 This LDM will finally contain between 2 and 7 registers
17976 - One with the 7 highest registers (register mask 0xDF80)
17977 This ldm will finally contain between 2 and 7 registers. */
17978 insn_low_registers = insn_all_registers & 0x007F;
17979 insn_high_registers = insn_all_registers & 0xDF80;
17980
17981 /* A spare register may be needed during this veneer to temporarily
17982 handle the base register. This register will be restored with the
17983 last LDM operation.
17984 The usable register may be any general purpose register (that
17985 excludes PC, SP, LR : register mask is 0x1FFF). */
17986 usable_register_mask = 0x1FFF;
17987
17988 /* Generate the stub function. */
17989 if (wback)
17990 {
17991 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17992 current_stub_contents =
17993 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17994 create_instruction_ldmia
17995 (rn, /*wback=*/1, insn_low_registers));
17996
17997 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17998 current_stub_contents =
17999 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18000 create_instruction_ldmia
18001 (rn, /*wback=*/1, insn_high_registers));
18002 if (!restore_pc)
18003 {
18004 /* B initial_insn_addr+4. */
18005 current_stub_contents =
18006 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18007 create_instruction_branch_absolute
18008 (initial_insn_addr - current_stub_contents));
18009 }
18010 }
18011 else /* if (!wback). */
18012 {
18013 ri = rn;
18014
18015 /* If Rn is not part of the high-register-list, move it there. */
18016 if (!(insn_high_registers & (1 << rn)))
18017 {
18018 /* Choose a Ri in the high-register-list that will be restored. */
18019 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18020
18021 /* MOV Ri, Rn. */
18022 current_stub_contents =
18023 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18024 create_instruction_mov (ri, rn));
18025 }
18026
18027 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18028 current_stub_contents =
18029 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18030 create_instruction_ldmia
18031 (ri, /*wback=*/1, insn_low_registers));
18032
18033 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18034 current_stub_contents =
18035 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18036 create_instruction_ldmia
18037 (ri, /*wback=*/0, insn_high_registers));
18038
18039 if (!restore_pc)
18040 {
18041 /* B initial_insn_addr+4. */
18042 current_stub_contents =
18043 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18044 create_instruction_branch_absolute
18045 (initial_insn_addr - current_stub_contents));
18046 }
18047 }
18048
18049 /* Fill the remaining of the stub with deterministic contents. */
18050 current_stub_contents =
18051 stm32l4xx_fill_stub_udf (htab, output_bfd,
18052 base_stub_contents, current_stub_contents,
18053 base_stub_contents +
18054 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18055 }
18056
18057 static void
18058 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18059 bfd * output_bfd,
18060 const insn32 initial_insn,
18061 const bfd_byte *const initial_insn_addr,
18062 bfd_byte *const base_stub_contents)
18063 {
18064 int wback = (initial_insn & 0x00200000) >> 21;
18065 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18066 int insn_all_registers = initial_insn & 0x0000ffff;
18067 int insn_low_registers, insn_high_registers;
18068 int usable_register_mask;
18069 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18070 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18071 int nb_registers = elf32_arm_popcount (insn_all_registers);
18072 bfd_byte *current_stub_contents = base_stub_contents;
18073
18074 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18075
18076 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18077 smaller than 8 registers load sequences that do not cause the
18078 hardware issue. */
18079 if (nb_registers <= 8)
18080 {
18081 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18082 current_stub_contents =
18083 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18084 initial_insn);
18085
18086 /* B initial_insn_addr+4. */
18087 current_stub_contents =
18088 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18089 create_instruction_branch_absolute
18090 (initial_insn_addr - current_stub_contents));
18091
18092 /* Fill the remaining of the stub with deterministic contents. */
18093 current_stub_contents =
18094 stm32l4xx_fill_stub_udf (htab, output_bfd,
18095 base_stub_contents, current_stub_contents,
18096 base_stub_contents +
18097 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18098
18099 return;
18100 }
18101
18102 /* - reg_list[13] == 0. */
18103 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18104
18105 /* - reg_list[14] & reg_list[15] != 1. */
18106 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18107
18108 /* - if (wback==1) reg_list[rn] == 0. */
18109 BFD_ASSERT (!wback || !restore_rn);
18110
18111 /* - nb_registers > 8. */
18112 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18113
18114 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18115
18116 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18117 - One with the 7 lowest registers (register mask 0x007F)
18118 This LDM will finally contain between 2 and 7 registers
18119 - One with the 7 highest registers (register mask 0xDF80)
18120 This ldm will finally contain between 2 and 7 registers. */
18121 insn_low_registers = insn_all_registers & 0x007F;
18122 insn_high_registers = insn_all_registers & 0xDF80;
18123
18124 /* A spare register may be needed during this veneer to temporarily
18125 handle the base register. This register will be restored with
18126 the last LDM operation.
18127 The usable register may be any general purpose register (that excludes
18128 PC, SP, LR : register mask is 0x1FFF). */
18129 usable_register_mask = 0x1FFF;
18130
18131 /* Generate the stub function. */
18132 if (!wback && !restore_pc && !restore_rn)
18133 {
18134 /* Choose a Ri in the low-register-list that will be restored. */
18135 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18136
18137 /* MOV Ri, Rn. */
18138 current_stub_contents =
18139 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18140 create_instruction_mov (ri, rn));
18141
18142 /* LDMDB Ri!, {R-high-register-list}. */
18143 current_stub_contents =
18144 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18145 create_instruction_ldmdb
18146 (ri, /*wback=*/1, insn_high_registers));
18147
18148 /* LDMDB Ri, {R-low-register-list}. */
18149 current_stub_contents =
18150 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18151 create_instruction_ldmdb
18152 (ri, /*wback=*/0, insn_low_registers));
18153
18154 /* B initial_insn_addr+4. */
18155 current_stub_contents =
18156 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18157 create_instruction_branch_absolute
18158 (initial_insn_addr - current_stub_contents));
18159 }
18160 else if (wback && !restore_pc && !restore_rn)
18161 {
18162 /* LDMDB Rn!, {R-high-register-list}. */
18163 current_stub_contents =
18164 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18165 create_instruction_ldmdb
18166 (rn, /*wback=*/1, insn_high_registers));
18167
18168 /* LDMDB Rn!, {R-low-register-list}. */
18169 current_stub_contents =
18170 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18171 create_instruction_ldmdb
18172 (rn, /*wback=*/1, insn_low_registers));
18173
18174 /* B initial_insn_addr+4. */
18175 current_stub_contents =
18176 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18177 create_instruction_branch_absolute
18178 (initial_insn_addr - current_stub_contents));
18179 }
18180 else if (!wback && restore_pc && !restore_rn)
18181 {
18182 /* Choose a Ri in the high-register-list that will be restored. */
18183 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18184
18185 /* SUB Ri, Rn, #(4*nb_registers). */
18186 current_stub_contents =
18187 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18188 create_instruction_sub (ri, rn, (4 * nb_registers)));
18189
18190 /* LDMIA Ri!, {R-low-register-list}. */
18191 current_stub_contents =
18192 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18193 create_instruction_ldmia
18194 (ri, /*wback=*/1, insn_low_registers));
18195
18196 /* LDMIA Ri, {R-high-register-list}. */
18197 current_stub_contents =
18198 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18199 create_instruction_ldmia
18200 (ri, /*wback=*/0, insn_high_registers));
18201 }
18202 else if (wback && restore_pc && !restore_rn)
18203 {
18204 /* Choose a Ri in the high-register-list that will be restored. */
18205 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18206
18207 /* SUB Rn, Rn, #(4*nb_registers) */
18208 current_stub_contents =
18209 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18210 create_instruction_sub (rn, rn, (4 * nb_registers)));
18211
18212 /* MOV Ri, Rn. */
18213 current_stub_contents =
18214 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18215 create_instruction_mov (ri, rn));
18216
18217 /* LDMIA Ri!, {R-low-register-list}. */
18218 current_stub_contents =
18219 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18220 create_instruction_ldmia
18221 (ri, /*wback=*/1, insn_low_registers));
18222
18223 /* LDMIA Ri, {R-high-register-list}. */
18224 current_stub_contents =
18225 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18226 create_instruction_ldmia
18227 (ri, /*wback=*/0, insn_high_registers));
18228 }
18229 else if (!wback && !restore_pc && restore_rn)
18230 {
18231 ri = rn;
18232 if (!(insn_low_registers & (1 << rn)))
18233 {
18234 /* Choose a Ri in the low-register-list that will be restored. */
18235 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18236
18237 /* MOV Ri, Rn. */
18238 current_stub_contents =
18239 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18240 create_instruction_mov (ri, rn));
18241 }
18242
18243 /* LDMDB Ri!, {R-high-register-list}. */
18244 current_stub_contents =
18245 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18246 create_instruction_ldmdb
18247 (ri, /*wback=*/1, insn_high_registers));
18248
18249 /* LDMDB Ri, {R-low-register-list}. */
18250 current_stub_contents =
18251 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18252 create_instruction_ldmdb
18253 (ri, /*wback=*/0, insn_low_registers));
18254
18255 /* B initial_insn_addr+4. */
18256 current_stub_contents =
18257 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18258 create_instruction_branch_absolute
18259 (initial_insn_addr - current_stub_contents));
18260 }
18261 else if (!wback && restore_pc && restore_rn)
18262 {
18263 ri = rn;
18264 if (!(insn_high_registers & (1 << rn)))
18265 {
18266 /* Choose a Ri in the high-register-list that will be restored. */
18267 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18268 }
18269
18270 /* SUB Ri, Rn, #(4*nb_registers). */
18271 current_stub_contents =
18272 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18273 create_instruction_sub (ri, rn, (4 * nb_registers)));
18274
18275 /* LDMIA Ri!, {R-low-register-list}. */
18276 current_stub_contents =
18277 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18278 create_instruction_ldmia
18279 (ri, /*wback=*/1, insn_low_registers));
18280
18281 /* LDMIA Ri, {R-high-register-list}. */
18282 current_stub_contents =
18283 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18284 create_instruction_ldmia
18285 (ri, /*wback=*/0, insn_high_registers));
18286 }
18287 else if (wback && restore_rn)
18288 {
18289 /* The assembler should not have accepted to encode this. */
18290 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18291 "undefined behavior.\n");
18292 }
18293
18294 /* Fill the remaining of the stub with deterministic contents. */
18295 current_stub_contents =
18296 stm32l4xx_fill_stub_udf (htab, output_bfd,
18297 base_stub_contents, current_stub_contents,
18298 base_stub_contents +
18299 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18300
18301 }
18302
18303 static void
18304 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18305 bfd * output_bfd,
18306 const insn32 initial_insn,
18307 const bfd_byte *const initial_insn_addr,
18308 bfd_byte *const base_stub_contents)
18309 {
18310 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18311 bfd_byte *current_stub_contents = base_stub_contents;
18312
18313 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18314
18315 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18316 smaller than 8 words load sequences that do not cause the
18317 hardware issue. */
18318 if (num_words <= 8)
18319 {
18320 /* Untouched instruction. */
18321 current_stub_contents =
18322 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18323 initial_insn);
18324
18325 /* B initial_insn_addr+4. */
18326 current_stub_contents =
18327 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18328 create_instruction_branch_absolute
18329 (initial_insn_addr - current_stub_contents));
18330 }
18331 else
18332 {
18333 bfd_boolean is_dp = /* DP encoding. */
18334 (initial_insn & 0xfe100f00) == 0xec100b00;
18335 bfd_boolean is_ia_nobang = /* (IA without !). */
18336 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18337 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18338 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18339 bfd_boolean is_db_bang = /* (DB with !). */
18340 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18341 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18342 /* d = UInt (Vd:D);. */
18343 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18344 | (((unsigned int)initial_insn << 9) >> 31);
18345
18346 /* Compute the number of 8-words chunks needed to split. */
18347 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18348 int chunk;
18349
18350 /* The test coverage has been done assuming the following
18351 hypothesis that exactly one of the previous is_ predicates is
18352 true. */
18353 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18354 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18355
18356 /* We treat the cutting of the words in one pass for all
18357 cases, then we emit the adjustments:
18358
18359 vldm rx, {...}
18360 -> vldm rx!, {8_words_or_less} for each needed 8_word
18361 -> sub rx, rx, #size (list)
18362
18363 vldm rx!, {...}
18364 -> vldm rx!, {8_words_or_less} for each needed 8_word
18365 This also handles vpop instruction (when rx is sp)
18366
18367 vldmd rx!, {...}
18368 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18369 for (chunk = 0; chunk < chunks; ++chunk)
18370 {
18371 bfd_vma new_insn = 0;
18372
18373 if (is_ia_nobang || is_ia_bang)
18374 {
18375 new_insn = create_instruction_vldmia
18376 (base_reg,
18377 is_dp,
18378 /*wback= . */1,
18379 chunks - (chunk + 1) ?
18380 8 : num_words - chunk * 8,
18381 first_reg + chunk * 8);
18382 }
18383 else if (is_db_bang)
18384 {
18385 new_insn = create_instruction_vldmdb
18386 (base_reg,
18387 is_dp,
18388 chunks - (chunk + 1) ?
18389 8 : num_words - chunk * 8,
18390 first_reg + chunk * 8);
18391 }
18392
18393 if (new_insn)
18394 current_stub_contents =
18395 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18396 new_insn);
18397 }
18398
18399 /* Only this case requires the base register compensation
18400 subtract. */
18401 if (is_ia_nobang)
18402 {
18403 current_stub_contents =
18404 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18405 create_instruction_sub
18406 (base_reg, base_reg, 4*num_words));
18407 }
18408
18409 /* B initial_insn_addr+4. */
18410 current_stub_contents =
18411 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18412 create_instruction_branch_absolute
18413 (initial_insn_addr - current_stub_contents));
18414 }
18415
18416 /* Fill the remaining of the stub with deterministic contents. */
18417 current_stub_contents =
18418 stm32l4xx_fill_stub_udf (htab, output_bfd,
18419 base_stub_contents, current_stub_contents,
18420 base_stub_contents +
18421 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18422 }
18423
18424 static void
18425 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18426 bfd * output_bfd,
18427 const insn32 wrong_insn,
18428 const bfd_byte *const wrong_insn_addr,
18429 bfd_byte *const stub_contents)
18430 {
18431 if (is_thumb2_ldmia (wrong_insn))
18432 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18433 wrong_insn, wrong_insn_addr,
18434 stub_contents);
18435 else if (is_thumb2_ldmdb (wrong_insn))
18436 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18437 wrong_insn, wrong_insn_addr,
18438 stub_contents);
18439 else if (is_thumb2_vldm (wrong_insn))
18440 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18441 wrong_insn, wrong_insn_addr,
18442 stub_contents);
18443 }
18444
18445 /* End of stm32l4xx work-around. */
18446
18447
18448 /* Do code byteswapping. Return FALSE afterwards so that the section is
18449 written out as normal. */
18450
18451 static bfd_boolean
18452 elf32_arm_write_section (bfd *output_bfd,
18453 struct bfd_link_info *link_info,
18454 asection *sec,
18455 bfd_byte *contents)
18456 {
18457 unsigned int mapcount, errcount;
18458 _arm_elf_section_data *arm_data;
18459 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18460 elf32_arm_section_map *map;
18461 elf32_vfp11_erratum_list *errnode;
18462 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18463 bfd_vma ptr;
18464 bfd_vma end;
18465 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18466 bfd_byte tmp;
18467 unsigned int i;
18468
18469 if (globals == NULL)
18470 return FALSE;
18471
18472 /* If this section has not been allocated an _arm_elf_section_data
18473 structure then we cannot record anything. */
18474 arm_data = get_arm_elf_section_data (sec);
18475 if (arm_data == NULL)
18476 return FALSE;
18477
18478 mapcount = arm_data->mapcount;
18479 map = arm_data->map;
18480 errcount = arm_data->erratumcount;
18481
18482 if (errcount != 0)
18483 {
18484 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18485
18486 for (errnode = arm_data->erratumlist; errnode != 0;
18487 errnode = errnode->next)
18488 {
18489 bfd_vma target = errnode->vma - offset;
18490
18491 switch (errnode->type)
18492 {
18493 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18494 {
18495 bfd_vma branch_to_veneer;
18496 /* Original condition code of instruction, plus bit mask for
18497 ARM B instruction. */
18498 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18499 | 0x0a000000;
18500
18501 /* The instruction is before the label. */
18502 target -= 4;
18503
18504 /* Above offset included in -4 below. */
18505 branch_to_veneer = errnode->u.b.veneer->vma
18506 - errnode->vma - 4;
18507
18508 if ((signed) branch_to_veneer < -(1 << 25)
18509 || (signed) branch_to_veneer >= (1 << 25))
18510 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18511 "range"), output_bfd);
18512
18513 insn |= (branch_to_veneer >> 2) & 0xffffff;
18514 contents[endianflip ^ target] = insn & 0xff;
18515 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18516 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18517 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18518 }
18519 break;
18520
18521 case VFP11_ERRATUM_ARM_VENEER:
18522 {
18523 bfd_vma branch_from_veneer;
18524 unsigned int insn;
18525
18526 /* Take size of veneer into account. */
18527 branch_from_veneer = errnode->u.v.branch->vma
18528 - errnode->vma - 12;
18529
18530 if ((signed) branch_from_veneer < -(1 << 25)
18531 || (signed) branch_from_veneer >= (1 << 25))
18532 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18533 "range"), output_bfd);
18534
18535 /* Original instruction. */
18536 insn = errnode->u.v.branch->u.b.vfp_insn;
18537 contents[endianflip ^ target] = insn & 0xff;
18538 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18539 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18540 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18541
18542 /* Branch back to insn after original insn. */
18543 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18544 contents[endianflip ^ (target + 4)] = insn & 0xff;
18545 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18546 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18547 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18548 }
18549 break;
18550
18551 default:
18552 abort ();
18553 }
18554 }
18555 }
18556
18557 if (arm_data->stm32l4xx_erratumcount != 0)
18558 {
18559 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18560 stm32l4xx_errnode != 0;
18561 stm32l4xx_errnode = stm32l4xx_errnode->next)
18562 {
18563 bfd_vma target = stm32l4xx_errnode->vma - offset;
18564
18565 switch (stm32l4xx_errnode->type)
18566 {
18567 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18568 {
18569 unsigned int insn;
18570 bfd_vma branch_to_veneer =
18571 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18572
18573 if ((signed) branch_to_veneer < -(1 << 24)
18574 || (signed) branch_to_veneer >= (1 << 24))
18575 {
18576 bfd_vma out_of_range =
18577 ((signed) branch_to_veneer < -(1 << 24)) ?
18578 - branch_to_veneer - (1 << 24) :
18579 ((signed) branch_to_veneer >= (1 << 24)) ?
18580 branch_to_veneer - (1 << 24) : 0;
18581
18582 _bfd_error_handler
18583 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18584 "Jump out of range by %ld bytes. "
18585 "Cannot encode branch instruction. "),
18586 output_bfd,
18587 (long) (stm32l4xx_errnode->vma - 4),
18588 out_of_range);
18589 continue;
18590 }
18591
18592 insn = create_instruction_branch_absolute
18593 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18594
18595 /* The instruction is before the label. */
18596 target -= 4;
18597
18598 put_thumb2_insn (globals, output_bfd,
18599 (bfd_vma) insn, contents + target);
18600 }
18601 break;
18602
18603 case STM32L4XX_ERRATUM_VENEER:
18604 {
18605 bfd_byte * veneer;
18606 bfd_byte * veneer_r;
18607 unsigned int insn;
18608
18609 veneer = contents + target;
18610 veneer_r = veneer
18611 + stm32l4xx_errnode->u.b.veneer->vma
18612 - stm32l4xx_errnode->vma - 4;
18613
18614 if ((signed) (veneer_r - veneer -
18615 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18616 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18617 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18618 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18619 || (signed) (veneer_r - veneer) >= (1 << 24))
18620 {
18621 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18622 "veneer."), output_bfd);
18623 continue;
18624 }
18625
18626 /* Original instruction. */
18627 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18628
18629 stm32l4xx_create_replacing_stub
18630 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18631 }
18632 break;
18633
18634 default:
18635 abort ();
18636 }
18637 }
18638 }
18639
18640 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18641 {
18642 arm_unwind_table_edit *edit_node
18643 = arm_data->u.exidx.unwind_edit_list;
18644 /* Now, sec->size is the size of the section we will write. The original
18645 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18646 markers) was sec->rawsize. (This isn't the case if we perform no
18647 edits, then rawsize will be zero and we should use size). */
18648 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18649 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18650 unsigned int in_index, out_index;
18651 bfd_vma add_to_offsets = 0;
18652
18653 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18654 {
18655 if (edit_node)
18656 {
18657 unsigned int edit_index = edit_node->index;
18658
18659 if (in_index < edit_index && in_index * 8 < input_size)
18660 {
18661 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18662 contents + in_index * 8, add_to_offsets);
18663 out_index++;
18664 in_index++;
18665 }
18666 else if (in_index == edit_index
18667 || (in_index * 8 >= input_size
18668 && edit_index == UINT_MAX))
18669 {
18670 switch (edit_node->type)
18671 {
18672 case DELETE_EXIDX_ENTRY:
18673 in_index++;
18674 add_to_offsets += 8;
18675 break;
18676
18677 case INSERT_EXIDX_CANTUNWIND_AT_END:
18678 {
18679 asection *text_sec = edit_node->linked_section;
18680 bfd_vma text_offset = text_sec->output_section->vma
18681 + text_sec->output_offset
18682 + text_sec->size;
18683 bfd_vma exidx_offset = offset + out_index * 8;
18684 unsigned long prel31_offset;
18685
18686 /* Note: this is meant to be equivalent to an
18687 R_ARM_PREL31 relocation. These synthetic
18688 EXIDX_CANTUNWIND markers are not relocated by the
18689 usual BFD method. */
18690 prel31_offset = (text_offset - exidx_offset)
18691 & 0x7ffffffful;
18692 if (bfd_link_relocatable (link_info))
18693 {
18694 /* Here relocation for new EXIDX_CANTUNWIND is
18695 created, so there is no need to
18696 adjust offset by hand. */
18697 prel31_offset = text_sec->output_offset
18698 + text_sec->size;
18699 }
18700
18701 /* First address we can't unwind. */
18702 bfd_put_32 (output_bfd, prel31_offset,
18703 &edited_contents[out_index * 8]);
18704
18705 /* Code for EXIDX_CANTUNWIND. */
18706 bfd_put_32 (output_bfd, 0x1,
18707 &edited_contents[out_index * 8 + 4]);
18708
18709 out_index++;
18710 add_to_offsets -= 8;
18711 }
18712 break;
18713 }
18714
18715 edit_node = edit_node->next;
18716 }
18717 }
18718 else
18719 {
18720 /* No more edits, copy remaining entries verbatim. */
18721 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18722 contents + in_index * 8, add_to_offsets);
18723 out_index++;
18724 in_index++;
18725 }
18726 }
18727
18728 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18729 bfd_set_section_contents (output_bfd, sec->output_section,
18730 edited_contents,
18731 (file_ptr) sec->output_offset, sec->size);
18732
18733 return TRUE;
18734 }
18735
18736 /* Fix code to point to Cortex-A8 erratum stubs. */
18737 if (globals->fix_cortex_a8)
18738 {
18739 struct a8_branch_to_stub_data data;
18740
18741 data.writing_section = sec;
18742 data.contents = contents;
18743
18744 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18745 & data);
18746 }
18747
18748 if (mapcount == 0)
18749 return FALSE;
18750
18751 if (globals->byteswap_code)
18752 {
18753 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18754
18755 ptr = map[0].vma;
18756 for (i = 0; i < mapcount; i++)
18757 {
18758 if (i == mapcount - 1)
18759 end = sec->size;
18760 else
18761 end = map[i + 1].vma;
18762
18763 switch (map[i].type)
18764 {
18765 case 'a':
18766 /* Byte swap code words. */
18767 while (ptr + 3 < end)
18768 {
18769 tmp = contents[ptr];
18770 contents[ptr] = contents[ptr + 3];
18771 contents[ptr + 3] = tmp;
18772 tmp = contents[ptr + 1];
18773 contents[ptr + 1] = contents[ptr + 2];
18774 contents[ptr + 2] = tmp;
18775 ptr += 4;
18776 }
18777 break;
18778
18779 case 't':
18780 /* Byte swap code halfwords. */
18781 while (ptr + 1 < end)
18782 {
18783 tmp = contents[ptr];
18784 contents[ptr] = contents[ptr + 1];
18785 contents[ptr + 1] = tmp;
18786 ptr += 2;
18787 }
18788 break;
18789
18790 case 'd':
18791 /* Leave data alone. */
18792 break;
18793 }
18794 ptr = end;
18795 }
18796 }
18797
18798 free (map);
18799 arm_data->mapcount = -1;
18800 arm_data->mapsize = 0;
18801 arm_data->map = NULL;
18802
18803 return FALSE;
18804 }
18805
18806 /* Mangle thumb function symbols as we read them in. */
18807
18808 static bfd_boolean
18809 elf32_arm_swap_symbol_in (bfd * abfd,
18810 const void *psrc,
18811 const void *pshn,
18812 Elf_Internal_Sym *dst)
18813 {
18814 Elf_Internal_Shdr *symtab_hdr;
18815 const char *name = NULL;
18816
18817 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18818 return FALSE;
18819 dst->st_target_internal = 0;
18820
18821 /* New EABI objects mark thumb function symbols by setting the low bit of
18822 the address. */
18823 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18824 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18825 {
18826 if (dst->st_value & 1)
18827 {
18828 dst->st_value &= ~(bfd_vma) 1;
18829 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18830 ST_BRANCH_TO_THUMB);
18831 }
18832 else
18833 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18834 }
18835 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18836 {
18837 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18838 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18839 }
18840 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18841 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18842 else
18843 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18844
18845 /* Mark CMSE special symbols. */
18846 symtab_hdr = & elf_symtab_hdr (abfd);
18847 if (symtab_hdr->sh_size)
18848 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18849 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18850 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18851
18852 return TRUE;
18853 }
18854
18855
18856 /* Mangle thumb function symbols as we write them out. */
18857
18858 static void
18859 elf32_arm_swap_symbol_out (bfd *abfd,
18860 const Elf_Internal_Sym *src,
18861 void *cdst,
18862 void *shndx)
18863 {
18864 Elf_Internal_Sym newsym;
18865
18866 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18867 of the address set, as per the new EABI. We do this unconditionally
18868 because objcopy does not set the elf header flags until after
18869 it writes out the symbol table. */
18870 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18871 {
18872 newsym = *src;
18873 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18874 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18875 if (newsym.st_shndx != SHN_UNDEF)
18876 {
18877 /* Do this only for defined symbols. At link type, the static
18878 linker will simulate the work of dynamic linker of resolving
18879 symbols and will carry over the thumbness of found symbols to
18880 the output symbol table. It's not clear how it happens, but
18881 the thumbness of undefined symbols can well be different at
18882 runtime, and writing '1' for them will be confusing for users
18883 and possibly for dynamic linker itself.
18884 */
18885 newsym.st_value |= 1;
18886 }
18887
18888 src = &newsym;
18889 }
18890 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18891 }
18892
18893 /* Add the PT_ARM_EXIDX program header. */
18894
18895 static bfd_boolean
18896 elf32_arm_modify_segment_map (bfd *abfd,
18897 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18898 {
18899 struct elf_segment_map *m;
18900 asection *sec;
18901
18902 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18903 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18904 {
18905 /* If there is already a PT_ARM_EXIDX header, then we do not
18906 want to add another one. This situation arises when running
18907 "strip"; the input binary already has the header. */
18908 m = elf_seg_map (abfd);
18909 while (m && m->p_type != PT_ARM_EXIDX)
18910 m = m->next;
18911 if (!m)
18912 {
18913 m = (struct elf_segment_map *)
18914 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18915 if (m == NULL)
18916 return FALSE;
18917 m->p_type = PT_ARM_EXIDX;
18918 m->count = 1;
18919 m->sections[0] = sec;
18920
18921 m->next = elf_seg_map (abfd);
18922 elf_seg_map (abfd) = m;
18923 }
18924 }
18925
18926 return TRUE;
18927 }
18928
18929 /* We may add a PT_ARM_EXIDX program header. */
18930
18931 static int
18932 elf32_arm_additional_program_headers (bfd *abfd,
18933 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18934 {
18935 asection *sec;
18936
18937 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18938 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18939 return 1;
18940 else
18941 return 0;
18942 }
18943
18944 /* Hook called by the linker routine which adds symbols from an object
18945 file. */
18946
18947 static bfd_boolean
18948 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18949 Elf_Internal_Sym *sym, const char **namep,
18950 flagword *flagsp, asection **secp, bfd_vma *valp)
18951 {
18952 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18953 && (abfd->flags & DYNAMIC) == 0
18954 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18955 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18956
18957 if (elf32_arm_hash_table (info) == NULL)
18958 return FALSE;
18959
18960 if (elf32_arm_hash_table (info)->vxworks_p
18961 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18962 flagsp, secp, valp))
18963 return FALSE;
18964
18965 return TRUE;
18966 }
18967
18968 /* We use this to override swap_symbol_in and swap_symbol_out. */
18969 const struct elf_size_info elf32_arm_size_info =
18970 {
18971 sizeof (Elf32_External_Ehdr),
18972 sizeof (Elf32_External_Phdr),
18973 sizeof (Elf32_External_Shdr),
18974 sizeof (Elf32_External_Rel),
18975 sizeof (Elf32_External_Rela),
18976 sizeof (Elf32_External_Sym),
18977 sizeof (Elf32_External_Dyn),
18978 sizeof (Elf_External_Note),
18979 4,
18980 1,
18981 32, 2,
18982 ELFCLASS32, EV_CURRENT,
18983 bfd_elf32_write_out_phdrs,
18984 bfd_elf32_write_shdrs_and_ehdr,
18985 bfd_elf32_checksum_contents,
18986 bfd_elf32_write_relocs,
18987 elf32_arm_swap_symbol_in,
18988 elf32_arm_swap_symbol_out,
18989 bfd_elf32_slurp_reloc_table,
18990 bfd_elf32_slurp_symbol_table,
18991 bfd_elf32_swap_dyn_in,
18992 bfd_elf32_swap_dyn_out,
18993 bfd_elf32_swap_reloc_in,
18994 bfd_elf32_swap_reloc_out,
18995 bfd_elf32_swap_reloca_in,
18996 bfd_elf32_swap_reloca_out
18997 };
18998
18999 static bfd_vma
19000 read_code32 (const bfd *abfd, const bfd_byte *addr)
19001 {
19002 /* V7 BE8 code is always little endian. */
19003 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19004 return bfd_getl32 (addr);
19005
19006 return bfd_get_32 (abfd, addr);
19007 }
19008
19009 static bfd_vma
19010 read_code16 (const bfd *abfd, const bfd_byte *addr)
19011 {
19012 /* V7 BE8 code is always little endian. */
19013 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19014 return bfd_getl16 (addr);
19015
19016 return bfd_get_16 (abfd, addr);
19017 }
19018
19019 /* Return size of plt0 entry starting at ADDR
19020 or (bfd_vma) -1 if size can not be determined. */
19021
19022 static bfd_vma
19023 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19024 {
19025 bfd_vma first_word;
19026 bfd_vma plt0_size;
19027
19028 first_word = read_code32 (abfd, addr);
19029
19030 if (first_word == elf32_arm_plt0_entry[0])
19031 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19032 else if (first_word == elf32_thumb2_plt0_entry[0])
19033 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19034 else
19035 /* We don't yet handle this PLT format. */
19036 return (bfd_vma) -1;
19037
19038 return plt0_size;
19039 }
19040
19041 /* Return size of plt entry starting at offset OFFSET
19042 of plt section located at address START
19043 or (bfd_vma) -1 if size can not be determined. */
19044
19045 static bfd_vma
19046 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19047 {
19048 bfd_vma first_insn;
19049 bfd_vma plt_size = 0;
19050 const bfd_byte *addr = start + offset;
19051
19052 /* PLT entry size if fixed on Thumb-only platforms. */
19053 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19054 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19055
19056 /* Respect Thumb stub if necessary. */
19057 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19058 {
19059 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19060 }
19061
19062 /* Strip immediate from first add. */
19063 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19064
19065 #ifdef FOUR_WORD_PLT
19066 if (first_insn == elf32_arm_plt_entry[0])
19067 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19068 #else
19069 if (first_insn == elf32_arm_plt_entry_long[0])
19070 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19071 else if (first_insn == elf32_arm_plt_entry_short[0])
19072 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19073 #endif
19074 else
19075 /* We don't yet handle this PLT format. */
19076 return (bfd_vma) -1;
19077
19078 return plt_size;
19079 }
19080
19081 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19082
19083 static long
19084 elf32_arm_get_synthetic_symtab (bfd *abfd,
19085 long symcount ATTRIBUTE_UNUSED,
19086 asymbol **syms ATTRIBUTE_UNUSED,
19087 long dynsymcount,
19088 asymbol **dynsyms,
19089 asymbol **ret)
19090 {
19091 asection *relplt;
19092 asymbol *s;
19093 arelent *p;
19094 long count, i, n;
19095 size_t size;
19096 Elf_Internal_Shdr *hdr;
19097 char *names;
19098 asection *plt;
19099 bfd_vma offset;
19100 bfd_byte *data;
19101
19102 *ret = NULL;
19103
19104 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19105 return 0;
19106
19107 if (dynsymcount <= 0)
19108 return 0;
19109
19110 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19111 if (relplt == NULL)
19112 return 0;
19113
19114 hdr = &elf_section_data (relplt)->this_hdr;
19115 if (hdr->sh_link != elf_dynsymtab (abfd)
19116 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19117 return 0;
19118
19119 plt = bfd_get_section_by_name (abfd, ".plt");
19120 if (plt == NULL)
19121 return 0;
19122
19123 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19124 return -1;
19125
19126 data = plt->contents;
19127 if (data == NULL)
19128 {
19129 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19130 return -1;
19131 bfd_cache_section_contents((asection *) plt, data);
19132 }
19133
19134 count = relplt->size / hdr->sh_entsize;
19135 size = count * sizeof (asymbol);
19136 p = relplt->relocation;
19137 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19138 {
19139 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19140 if (p->addend != 0)
19141 size += sizeof ("+0x") - 1 + 8;
19142 }
19143
19144 s = *ret = (asymbol *) bfd_malloc (size);
19145 if (s == NULL)
19146 return -1;
19147
19148 offset = elf32_arm_plt0_size (abfd, data);
19149 if (offset == (bfd_vma) -1)
19150 return -1;
19151
19152 names = (char *) (s + count);
19153 p = relplt->relocation;
19154 n = 0;
19155 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19156 {
19157 size_t len;
19158
19159 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19160 if (plt_size == (bfd_vma) -1)
19161 break;
19162
19163 *s = **p->sym_ptr_ptr;
19164 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19165 we are defining a symbol, ensure one of them is set. */
19166 if ((s->flags & BSF_LOCAL) == 0)
19167 s->flags |= BSF_GLOBAL;
19168 s->flags |= BSF_SYNTHETIC;
19169 s->section = plt;
19170 s->value = offset;
19171 s->name = names;
19172 s->udata.p = NULL;
19173 len = strlen ((*p->sym_ptr_ptr)->name);
19174 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19175 names += len;
19176 if (p->addend != 0)
19177 {
19178 char buf[30], *a;
19179
19180 memcpy (names, "+0x", sizeof ("+0x") - 1);
19181 names += sizeof ("+0x") - 1;
19182 bfd_sprintf_vma (abfd, buf, p->addend);
19183 for (a = buf; *a == '0'; ++a)
19184 ;
19185 len = strlen (a);
19186 memcpy (names, a, len);
19187 names += len;
19188 }
19189 memcpy (names, "@plt", sizeof ("@plt"));
19190 names += sizeof ("@plt");
19191 ++s, ++n;
19192 offset += plt_size;
19193 }
19194
19195 return n;
19196 }
19197
19198 static bfd_boolean
19199 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19200 {
19201 if (hdr->sh_flags & SHF_ARM_PURECODE)
19202 *flags |= SEC_ELF_PURECODE;
19203 return TRUE;
19204 }
19205
19206 static flagword
19207 elf32_arm_lookup_section_flags (char *flag_name)
19208 {
19209 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19210 return SHF_ARM_PURECODE;
19211
19212 return SEC_NO_FLAGS;
19213 }
19214
19215 static unsigned int
19216 elf32_arm_count_additional_relocs (asection *sec)
19217 {
19218 struct _arm_elf_section_data *arm_data;
19219 arm_data = get_arm_elf_section_data (sec);
19220
19221 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19222 }
19223
19224 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19225 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19226 FALSE otherwise. ISECTION is the best guess matching section from the
19227 input bfd IBFD, but it might be NULL. */
19228
19229 static bfd_boolean
19230 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19231 bfd *obfd ATTRIBUTE_UNUSED,
19232 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19233 Elf_Internal_Shdr *osection)
19234 {
19235 switch (osection->sh_type)
19236 {
19237 case SHT_ARM_EXIDX:
19238 {
19239 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19240 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19241 unsigned i = 0;
19242
19243 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19244 osection->sh_info = 0;
19245
19246 /* The sh_link field must be set to the text section associated with
19247 this index section. Unfortunately the ARM EHABI does not specify
19248 exactly how to determine this association. Our caller does try
19249 to match up OSECTION with its corresponding input section however
19250 so that is a good first guess. */
19251 if (isection != NULL
19252 && osection->bfd_section != NULL
19253 && isection->bfd_section != NULL
19254 && isection->bfd_section->output_section != NULL
19255 && isection->bfd_section->output_section == osection->bfd_section
19256 && iheaders != NULL
19257 && isection->sh_link > 0
19258 && isection->sh_link < elf_numsections (ibfd)
19259 && iheaders[isection->sh_link]->bfd_section != NULL
19260 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19261 )
19262 {
19263 for (i = elf_numsections (obfd); i-- > 0;)
19264 if (oheaders[i]->bfd_section
19265 == iheaders[isection->sh_link]->bfd_section->output_section)
19266 break;
19267 }
19268
19269 if (i == 0)
19270 {
19271 /* Failing that we have to find a matching section ourselves. If
19272 we had the output section name available we could compare that
19273 with input section names. Unfortunately we don't. So instead
19274 we use a simple heuristic and look for the nearest executable
19275 section before this one. */
19276 for (i = elf_numsections (obfd); i-- > 0;)
19277 if (oheaders[i] == osection)
19278 break;
19279 if (i == 0)
19280 break;
19281
19282 while (i-- > 0)
19283 if (oheaders[i]->sh_type == SHT_PROGBITS
19284 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19285 == (SHF_ALLOC | SHF_EXECINSTR))
19286 break;
19287 }
19288
19289 if (i)
19290 {
19291 osection->sh_link = i;
19292 /* If the text section was part of a group
19293 then the index section should be too. */
19294 if (oheaders[i]->sh_flags & SHF_GROUP)
19295 osection->sh_flags |= SHF_GROUP;
19296 return TRUE;
19297 }
19298 }
19299 break;
19300
19301 case SHT_ARM_PREEMPTMAP:
19302 osection->sh_flags = SHF_ALLOC;
19303 break;
19304
19305 case SHT_ARM_ATTRIBUTES:
19306 case SHT_ARM_DEBUGOVERLAY:
19307 case SHT_ARM_OVERLAYSECTION:
19308 default:
19309 break;
19310 }
19311
19312 return FALSE;
19313 }
19314
19315 /* Returns TRUE if NAME is an ARM mapping symbol.
19316 Traditionally the symbols $a, $d and $t have been used.
19317 The ARM ELF standard also defines $x (for A64 code). It also allows a
19318 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19319 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19320 not support them here. $t.x indicates the start of ThumbEE instructions. */
19321
19322 static bfd_boolean
19323 is_arm_mapping_symbol (const char * name)
19324 {
19325 return name != NULL /* Paranoia. */
19326 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19327 the mapping symbols could have acquired a prefix.
19328 We do not support this here, since such symbols no
19329 longer conform to the ARM ELF ABI. */
19330 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19331 && (name[2] == 0 || name[2] == '.');
19332 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19333 any characters that follow the period are legal characters for the body
19334 of a symbol's name. For now we just assume that this is the case. */
19335 }
19336
19337 /* Make sure that mapping symbols in object files are not removed via the
19338 "strip --strip-unneeded" tool. These symbols are needed in order to
19339 correctly generate interworking veneers, and for byte swapping code
19340 regions. Once an object file has been linked, it is safe to remove the
19341 symbols as they will no longer be needed. */
19342
19343 static void
19344 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19345 {
19346 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19347 && sym->section != bfd_abs_section_ptr
19348 && is_arm_mapping_symbol (sym->name))
19349 sym->flags |= BSF_KEEP;
19350 }
19351
19352 #undef elf_backend_copy_special_section_fields
19353 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19354
19355 #define ELF_ARCH bfd_arch_arm
19356 #define ELF_TARGET_ID ARM_ELF_DATA
19357 #define ELF_MACHINE_CODE EM_ARM
19358 #ifdef __QNXTARGET__
19359 #define ELF_MAXPAGESIZE 0x1000
19360 #else
19361 #define ELF_MAXPAGESIZE 0x10000
19362 #endif
19363 #define ELF_MINPAGESIZE 0x1000
19364 #define ELF_COMMONPAGESIZE 0x1000
19365
19366 #define bfd_elf32_mkobject elf32_arm_mkobject
19367
19368 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19369 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19370 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19371 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19372 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19373 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19374 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19375 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19376 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19377 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19378 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19379 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19380 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19381
19382 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19383 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19384 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19385 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19386 #define elf_backend_check_relocs elf32_arm_check_relocs
19387 #define elf_backend_update_relocs elf32_arm_update_relocs
19388 #define elf_backend_relocate_section elf32_arm_relocate_section
19389 #define elf_backend_write_section elf32_arm_write_section
19390 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19391 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19392 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19393 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19394 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19395 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19396 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19397 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19398 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19399 #define elf_backend_object_p elf32_arm_object_p
19400 #define elf_backend_fake_sections elf32_arm_fake_sections
19401 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19402 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19403 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19404 #define elf_backend_size_info elf32_arm_size_info
19405 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19406 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19407 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19408 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19409 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19410 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19411 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19412 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19413
19414 #define elf_backend_can_refcount 1
19415 #define elf_backend_can_gc_sections 1
19416 #define elf_backend_plt_readonly 1
19417 #define elf_backend_want_got_plt 1
19418 #define elf_backend_want_plt_sym 0
19419 #define elf_backend_want_dynrelro 1
19420 #define elf_backend_may_use_rel_p 1
19421 #define elf_backend_may_use_rela_p 0
19422 #define elf_backend_default_use_rela_p 0
19423 #define elf_backend_dtrel_excludes_plt 1
19424
19425 #define elf_backend_got_header_size 12
19426 #define elf_backend_extern_protected_data 1
19427
19428 #undef elf_backend_obj_attrs_vendor
19429 #define elf_backend_obj_attrs_vendor "aeabi"
19430 #undef elf_backend_obj_attrs_section
19431 #define elf_backend_obj_attrs_section ".ARM.attributes"
19432 #undef elf_backend_obj_attrs_arg_type
19433 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19434 #undef elf_backend_obj_attrs_section_type
19435 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19436 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19437 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19438
19439 #undef elf_backend_section_flags
19440 #define elf_backend_section_flags elf32_arm_section_flags
19441 #undef elf_backend_lookup_section_flags_hook
19442 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19443
19444 #include "elf32-target.h"
19445
19446 /* Native Client targets. */
19447
19448 #undef TARGET_LITTLE_SYM
19449 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19450 #undef TARGET_LITTLE_NAME
19451 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19452 #undef TARGET_BIG_SYM
19453 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19454 #undef TARGET_BIG_NAME
19455 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19456
19457 /* Like elf32_arm_link_hash_table_create -- but overrides
19458 appropriately for NaCl. */
19459
19460 static struct bfd_link_hash_table *
19461 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19462 {
19463 struct bfd_link_hash_table *ret;
19464
19465 ret = elf32_arm_link_hash_table_create (abfd);
19466 if (ret)
19467 {
19468 struct elf32_arm_link_hash_table *htab
19469 = (struct elf32_arm_link_hash_table *) ret;
19470
19471 htab->nacl_p = 1;
19472
19473 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19474 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19475 }
19476 return ret;
19477 }
19478
19479 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19480 really need to use elf32_arm_modify_segment_map. But we do it
19481 anyway just to reduce gratuitous differences with the stock ARM backend. */
19482
19483 static bfd_boolean
19484 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19485 {
19486 return (elf32_arm_modify_segment_map (abfd, info)
19487 && nacl_modify_segment_map (abfd, info));
19488 }
19489
19490 static void
19491 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19492 {
19493 elf32_arm_final_write_processing (abfd, linker);
19494 nacl_final_write_processing (abfd, linker);
19495 }
19496
19497 static bfd_vma
19498 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19499 const arelent *rel ATTRIBUTE_UNUSED)
19500 {
19501 return plt->vma
19502 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19503 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19504 }
19505
19506 #undef elf32_bed
19507 #define elf32_bed elf32_arm_nacl_bed
19508 #undef bfd_elf32_bfd_link_hash_table_create
19509 #define bfd_elf32_bfd_link_hash_table_create \
19510 elf32_arm_nacl_link_hash_table_create
19511 #undef elf_backend_plt_alignment
19512 #define elf_backend_plt_alignment 4
19513 #undef elf_backend_modify_segment_map
19514 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19515 #undef elf_backend_modify_program_headers
19516 #define elf_backend_modify_program_headers nacl_modify_program_headers
19517 #undef elf_backend_final_write_processing
19518 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19519 #undef bfd_elf32_get_synthetic_symtab
19520 #undef elf_backend_plt_sym_val
19521 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19522 #undef elf_backend_copy_special_section_fields
19523
19524 #undef ELF_MINPAGESIZE
19525 #undef ELF_COMMONPAGESIZE
19526
19527
19528 #include "elf32-target.h"
19529
19530 /* Reset to defaults. */
19531 #undef elf_backend_plt_alignment
19532 #undef elf_backend_modify_segment_map
19533 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19534 #undef elf_backend_modify_program_headers
19535 #undef elf_backend_final_write_processing
19536 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19537 #undef ELF_MINPAGESIZE
19538 #define ELF_MINPAGESIZE 0x1000
19539 #undef ELF_COMMONPAGESIZE
19540 #define ELF_COMMONPAGESIZE 0x1000
19541
19542
19543 /* VxWorks Targets. */
19544
19545 #undef TARGET_LITTLE_SYM
19546 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19547 #undef TARGET_LITTLE_NAME
19548 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19549 #undef TARGET_BIG_SYM
19550 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19551 #undef TARGET_BIG_NAME
19552 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19553
19554 /* Like elf32_arm_link_hash_table_create -- but overrides
19555 appropriately for VxWorks. */
19556
19557 static struct bfd_link_hash_table *
19558 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19559 {
19560 struct bfd_link_hash_table *ret;
19561
19562 ret = elf32_arm_link_hash_table_create (abfd);
19563 if (ret)
19564 {
19565 struct elf32_arm_link_hash_table *htab
19566 = (struct elf32_arm_link_hash_table *) ret;
19567 htab->use_rel = 0;
19568 htab->vxworks_p = 1;
19569 }
19570 return ret;
19571 }
19572
19573 static void
19574 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19575 {
19576 elf32_arm_final_write_processing (abfd, linker);
19577 elf_vxworks_final_write_processing (abfd, linker);
19578 }
19579
19580 #undef elf32_bed
19581 #define elf32_bed elf32_arm_vxworks_bed
19582
19583 #undef bfd_elf32_bfd_link_hash_table_create
19584 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19585 #undef elf_backend_final_write_processing
19586 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19587 #undef elf_backend_emit_relocs
19588 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19589
19590 #undef elf_backend_may_use_rel_p
19591 #define elf_backend_may_use_rel_p 0
19592 #undef elf_backend_may_use_rela_p
19593 #define elf_backend_may_use_rela_p 1
19594 #undef elf_backend_default_use_rela_p
19595 #define elf_backend_default_use_rela_p 1
19596 #undef elf_backend_want_plt_sym
19597 #define elf_backend_want_plt_sym 1
19598 #undef ELF_MAXPAGESIZE
19599 #define ELF_MAXPAGESIZE 0x1000
19600
19601 #include "elf32-target.h"
19602
19603
19604 /* Merge backend specific data from an object file to the output
19605 object file when linking. */
19606
19607 static bfd_boolean
19608 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19609 {
19610 bfd *obfd = info->output_bfd;
19611 flagword out_flags;
19612 flagword in_flags;
19613 bfd_boolean flags_compatible = TRUE;
19614 asection *sec;
19615
19616 /* Check if we have the same endianness. */
19617 if (! _bfd_generic_verify_endian_match (ibfd, info))
19618 return FALSE;
19619
19620 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19621 return TRUE;
19622
19623 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19624 return FALSE;
19625
19626 /* The input BFD must have had its flags initialised. */
19627 /* The following seems bogus to me -- The flags are initialized in
19628 the assembler but I don't think an elf_flags_init field is
19629 written into the object. */
19630 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19631
19632 in_flags = elf_elfheader (ibfd)->e_flags;
19633 out_flags = elf_elfheader (obfd)->e_flags;
19634
19635 /* In theory there is no reason why we couldn't handle this. However
19636 in practice it isn't even close to working and there is no real
19637 reason to want it. */
19638 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19639 && !(ibfd->flags & DYNAMIC)
19640 && (in_flags & EF_ARM_BE8))
19641 {
19642 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19643 ibfd);
19644 return FALSE;
19645 }
19646
19647 if (!elf_flags_init (obfd))
19648 {
19649 /* If the input is the default architecture and had the default
19650 flags then do not bother setting the flags for the output
19651 architecture, instead allow future merges to do this. If no
19652 future merges ever set these flags then they will retain their
19653 uninitialised values, which surprise surprise, correspond
19654 to the default values. */
19655 if (bfd_get_arch_info (ibfd)->the_default
19656 && elf_elfheader (ibfd)->e_flags == 0)
19657 return TRUE;
19658
19659 elf_flags_init (obfd) = TRUE;
19660 elf_elfheader (obfd)->e_flags = in_flags;
19661
19662 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19663 && bfd_get_arch_info (obfd)->the_default)
19664 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19665
19666 return TRUE;
19667 }
19668
19669 /* Determine what should happen if the input ARM architecture
19670 does not match the output ARM architecture. */
19671 if (! bfd_arm_merge_machines (ibfd, obfd))
19672 return FALSE;
19673
19674 /* Identical flags must be compatible. */
19675 if (in_flags == out_flags)
19676 return TRUE;
19677
19678 /* Check to see if the input BFD actually contains any sections. If
19679 not, its flags may not have been initialised either, but it
19680 cannot actually cause any incompatiblity. Do not short-circuit
19681 dynamic objects; their section list may be emptied by
19682 elf_link_add_object_symbols.
19683
19684 Also check to see if there are no code sections in the input.
19685 In this case there is no need to check for code specific flags.
19686 XXX - do we need to worry about floating-point format compatability
19687 in data sections ? */
19688 if (!(ibfd->flags & DYNAMIC))
19689 {
19690 bfd_boolean null_input_bfd = TRUE;
19691 bfd_boolean only_data_sections = TRUE;
19692
19693 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19694 {
19695 /* Ignore synthetic glue sections. */
19696 if (strcmp (sec->name, ".glue_7")
19697 && strcmp (sec->name, ".glue_7t"))
19698 {
19699 if ((bfd_get_section_flags (ibfd, sec)
19700 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19701 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19702 only_data_sections = FALSE;
19703
19704 null_input_bfd = FALSE;
19705 break;
19706 }
19707 }
19708
19709 if (null_input_bfd || only_data_sections)
19710 return TRUE;
19711 }
19712
19713 /* Complain about various flag mismatches. */
19714 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19715 EF_ARM_EABI_VERSION (out_flags)))
19716 {
19717 _bfd_error_handler
19718 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19719 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
19720 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
19721 return FALSE;
19722 }
19723
19724 /* Not sure what needs to be checked for EABI versions >= 1. */
19725 /* VxWorks libraries do not use these flags. */
19726 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19727 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19728 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19729 {
19730 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19731 {
19732 _bfd_error_handler
19733 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19734 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
19735 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
19736 flags_compatible = FALSE;
19737 }
19738
19739 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19740 {
19741 if (in_flags & EF_ARM_APCS_FLOAT)
19742 _bfd_error_handler
19743 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19744 ibfd, obfd);
19745 else
19746 _bfd_error_handler
19747 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19748 ibfd, obfd);
19749
19750 flags_compatible = FALSE;
19751 }
19752
19753 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19754 {
19755 if (in_flags & EF_ARM_VFP_FLOAT)
19756 _bfd_error_handler
19757 (_("error: %B uses VFP instructions, whereas %B does not"),
19758 ibfd, obfd);
19759 else
19760 _bfd_error_handler
19761 (_("error: %B uses FPA instructions, whereas %B does not"),
19762 ibfd, obfd);
19763
19764 flags_compatible = FALSE;
19765 }
19766
19767 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19768 {
19769 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19770 _bfd_error_handler
19771 (_("error: %B uses Maverick instructions, whereas %B does not"),
19772 ibfd, obfd);
19773 else
19774 _bfd_error_handler
19775 (_("error: %B does not use Maverick instructions, whereas %B does"),
19776 ibfd, obfd);
19777
19778 flags_compatible = FALSE;
19779 }
19780
19781 #ifdef EF_ARM_SOFT_FLOAT
19782 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19783 {
19784 /* We can allow interworking between code that is VFP format
19785 layout, and uses either soft float or integer regs for
19786 passing floating point arguments and results. We already
19787 know that the APCS_FLOAT flags match; similarly for VFP
19788 flags. */
19789 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19790 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19791 {
19792 if (in_flags & EF_ARM_SOFT_FLOAT)
19793 _bfd_error_handler
19794 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19795 ibfd, obfd);
19796 else
19797 _bfd_error_handler
19798 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19799 ibfd, obfd);
19800
19801 flags_compatible = FALSE;
19802 }
19803 }
19804 #endif
19805
19806 /* Interworking mismatch is only a warning. */
19807 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19808 {
19809 if (in_flags & EF_ARM_INTERWORK)
19810 {
19811 _bfd_error_handler
19812 (_("Warning: %B supports interworking, whereas %B does not"),
19813 ibfd, obfd);
19814 }
19815 else
19816 {
19817 _bfd_error_handler
19818 (_("Warning: %B does not support interworking, whereas %B does"),
19819 ibfd, obfd);
19820 }
19821 }
19822 }
19823
19824 return flags_compatible;
19825 }
19826
19827
19828 /* Symbian OS Targets. */
19829
19830 #undef TARGET_LITTLE_SYM
19831 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19832 #undef TARGET_LITTLE_NAME
19833 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19834 #undef TARGET_BIG_SYM
19835 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19836 #undef TARGET_BIG_NAME
19837 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19838
19839 /* Like elf32_arm_link_hash_table_create -- but overrides
19840 appropriately for Symbian OS. */
19841
19842 static struct bfd_link_hash_table *
19843 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19844 {
19845 struct bfd_link_hash_table *ret;
19846
19847 ret = elf32_arm_link_hash_table_create (abfd);
19848 if (ret)
19849 {
19850 struct elf32_arm_link_hash_table *htab
19851 = (struct elf32_arm_link_hash_table *)ret;
19852 /* There is no PLT header for Symbian OS. */
19853 htab->plt_header_size = 0;
19854 /* The PLT entries are each one instruction and one word. */
19855 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19856 htab->symbian_p = 1;
19857 /* Symbian uses armv5t or above, so use_blx is always true. */
19858 htab->use_blx = 1;
19859 htab->root.is_relocatable_executable = 1;
19860 }
19861 return ret;
19862 }
19863
19864 static const struct bfd_elf_special_section
19865 elf32_arm_symbian_special_sections[] =
19866 {
19867 /* In a BPABI executable, the dynamic linking sections do not go in
19868 the loadable read-only segment. The post-linker may wish to
19869 refer to these sections, but they are not part of the final
19870 program image. */
19871 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19872 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19873 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19874 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19875 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19876 /* These sections do not need to be writable as the SymbianOS
19877 postlinker will arrange things so that no dynamic relocation is
19878 required. */
19879 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19880 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19881 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19882 { NULL, 0, 0, 0, 0 }
19883 };
19884
19885 static void
19886 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19887 struct bfd_link_info *link_info)
19888 {
19889 /* BPABI objects are never loaded directly by an OS kernel; they are
19890 processed by a postlinker first, into an OS-specific format. If
19891 the D_PAGED bit is set on the file, BFD will align segments on
19892 page boundaries, so that an OS can directly map the file. With
19893 BPABI objects, that just results in wasted space. In addition,
19894 because we clear the D_PAGED bit, map_sections_to_segments will
19895 recognize that the program headers should not be mapped into any
19896 loadable segment. */
19897 abfd->flags &= ~D_PAGED;
19898 elf32_arm_begin_write_processing (abfd, link_info);
19899 }
19900
19901 static bfd_boolean
19902 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19903 struct bfd_link_info *info)
19904 {
19905 struct elf_segment_map *m;
19906 asection *dynsec;
19907
19908 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19909 segment. However, because the .dynamic section is not marked
19910 with SEC_LOAD, the generic ELF code will not create such a
19911 segment. */
19912 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19913 if (dynsec)
19914 {
19915 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19916 if (m->p_type == PT_DYNAMIC)
19917 break;
19918
19919 if (m == NULL)
19920 {
19921 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19922 m->next = elf_seg_map (abfd);
19923 elf_seg_map (abfd) = m;
19924 }
19925 }
19926
19927 /* Also call the generic arm routine. */
19928 return elf32_arm_modify_segment_map (abfd, info);
19929 }
19930
19931 /* Return address for Ith PLT stub in section PLT, for relocation REL
19932 or (bfd_vma) -1 if it should not be included. */
19933
19934 static bfd_vma
19935 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19936 const arelent *rel ATTRIBUTE_UNUSED)
19937 {
19938 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19939 }
19940
19941 #undef elf32_bed
19942 #define elf32_bed elf32_arm_symbian_bed
19943
19944 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19945 will process them and then discard them. */
19946 #undef ELF_DYNAMIC_SEC_FLAGS
19947 #define ELF_DYNAMIC_SEC_FLAGS \
19948 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19949
19950 #undef elf_backend_emit_relocs
19951
19952 #undef bfd_elf32_bfd_link_hash_table_create
19953 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19954 #undef elf_backend_special_sections
19955 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19956 #undef elf_backend_begin_write_processing
19957 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19958 #undef elf_backend_final_write_processing
19959 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19960
19961 #undef elf_backend_modify_segment_map
19962 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19963
19964 /* There is no .got section for BPABI objects, and hence no header. */
19965 #undef elf_backend_got_header_size
19966 #define elf_backend_got_header_size 0
19967
19968 /* Similarly, there is no .got.plt section. */
19969 #undef elf_backend_want_got_plt
19970 #define elf_backend_want_got_plt 0
19971
19972 #undef elf_backend_plt_sym_val
19973 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19974
19975 #undef elf_backend_may_use_rel_p
19976 #define elf_backend_may_use_rel_p 1
19977 #undef elf_backend_may_use_rela_p
19978 #define elf_backend_may_use_rela_p 0
19979 #undef elf_backend_default_use_rela_p
19980 #define elf_backend_default_use_rela_p 0
19981 #undef elf_backend_want_plt_sym
19982 #define elf_backend_want_plt_sym 0
19983 #undef elf_backend_dtrel_excludes_plt
19984 #define elf_backend_dtrel_excludes_plt 0
19985 #undef ELF_MAXPAGESIZE
19986 #define ELF_MAXPAGESIZE 0x8000
19987
19988 #include "elf32-target.h"
GDB Binutils - Deliverables
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