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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[5] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE), /* pcrel_offset */
1764 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1765 0, /* rightshift */
1766 2, /* size (0 = byte, 1 = short, 2 = long) */
1767 32, /* bitsize */
1768 FALSE, /* pc_relative */
1769 0, /* bitpos */
1770 complain_overflow_bitfield,/* complain_on_overflow */
1771 bfd_elf_generic_reloc, /* special_function */
1772 "R_ARM_GOTFUNCDESC", /* name */
1773 FALSE, /* partial_inplace */
1774 0, /* src_mask */
1775 0xffffffff, /* dst_mask */
1776 FALSE), /* pcrel_offset */
1777 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1778 0, /* rightshift */
1779 2, /* size (0 = byte, 1 = short, 2 = long) */
1780 32, /* bitsize */
1781 FALSE, /* pc_relative */
1782 0, /* bitpos */
1783 complain_overflow_bitfield,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_ARM_GOTOFFFUNCDESC",/* name */
1786 FALSE, /* partial_inplace */
1787 0, /* src_mask */
1788 0xffffffff, /* dst_mask */
1789 FALSE), /* pcrel_offset */
1790 HOWTO (R_ARM_FUNCDESC, /* type */
1791 0, /* rightshift */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1793 32, /* bitsize */
1794 FALSE, /* pc_relative */
1795 0, /* bitpos */
1796 complain_overflow_bitfield,/* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 "R_ARM_FUNCDESC", /* name */
1799 FALSE, /* partial_inplace */
1800 0, /* src_mask */
1801 0xffffffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1804 0, /* rightshift */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 64, /* bitsize */
1807 FALSE, /* pc_relative */
1808 0, /* bitpos */
1809 complain_overflow_bitfield,/* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_ARM_FUNCDESC_VALUE",/* name */
1812 FALSE, /* partial_inplace */
1813 0, /* src_mask */
1814 0xffffffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 };
1817
1818 /* 249-255 extended, currently unused, relocations: */
1819 static reloc_howto_type elf32_arm_howto_table_3[4] =
1820 {
1821 HOWTO (R_ARM_RREL32, /* type */
1822 0, /* rightshift */
1823 0, /* size (0 = byte, 1 = short, 2 = long) */
1824 0, /* bitsize */
1825 FALSE, /* pc_relative */
1826 0, /* bitpos */
1827 complain_overflow_dont,/* complain_on_overflow */
1828 bfd_elf_generic_reloc, /* special_function */
1829 "R_ARM_RREL32", /* name */
1830 FALSE, /* partial_inplace */
1831 0, /* src_mask */
1832 0, /* dst_mask */
1833 FALSE), /* pcrel_offset */
1834
1835 HOWTO (R_ARM_RABS32, /* type */
1836 0, /* rightshift */
1837 0, /* size (0 = byte, 1 = short, 2 = long) */
1838 0, /* bitsize */
1839 FALSE, /* pc_relative */
1840 0, /* bitpos */
1841 complain_overflow_dont,/* complain_on_overflow */
1842 bfd_elf_generic_reloc, /* special_function */
1843 "R_ARM_RABS32", /* name */
1844 FALSE, /* partial_inplace */
1845 0, /* src_mask */
1846 0, /* dst_mask */
1847 FALSE), /* pcrel_offset */
1848
1849 HOWTO (R_ARM_RPC24, /* type */
1850 0, /* rightshift */
1851 0, /* size (0 = byte, 1 = short, 2 = long) */
1852 0, /* bitsize */
1853 FALSE, /* pc_relative */
1854 0, /* bitpos */
1855 complain_overflow_dont,/* complain_on_overflow */
1856 bfd_elf_generic_reloc, /* special_function */
1857 "R_ARM_RPC24", /* name */
1858 FALSE, /* partial_inplace */
1859 0, /* src_mask */
1860 0, /* dst_mask */
1861 FALSE), /* pcrel_offset */
1862
1863 HOWTO (R_ARM_RBASE, /* type */
1864 0, /* rightshift */
1865 0, /* size (0 = byte, 1 = short, 2 = long) */
1866 0, /* bitsize */
1867 FALSE, /* pc_relative */
1868 0, /* bitpos */
1869 complain_overflow_dont,/* complain_on_overflow */
1870 bfd_elf_generic_reloc, /* special_function */
1871 "R_ARM_RBASE", /* name */
1872 FALSE, /* partial_inplace */
1873 0, /* src_mask */
1874 0, /* dst_mask */
1875 FALSE) /* pcrel_offset */
1876 };
1877
1878 static reloc_howto_type *
1879 elf32_arm_howto_from_type (unsigned int r_type)
1880 {
1881 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1882 return &elf32_arm_howto_table_1[r_type];
1883
1884 if (r_type >= R_ARM_IRELATIVE
1885 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1886 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1887
1888 if (r_type >= R_ARM_RREL32
1889 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1890 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1891
1892 return NULL;
1893 }
1894
1895 static bfd_boolean
1896 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1897 Elf_Internal_Rela * elf_reloc)
1898 {
1899 unsigned int r_type;
1900
1901 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1902 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1903 {
1904 /* xgettext:c-format */
1905 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1906 abfd, r_type);
1907 bfd_set_error (bfd_error_bad_value);
1908 return FALSE;
1909 }
1910 return TRUE;
1911 }
1912
1913 struct elf32_arm_reloc_map
1914 {
1915 bfd_reloc_code_real_type bfd_reloc_val;
1916 unsigned char elf_reloc_val;
1917 };
1918
1919 /* All entries in this list must also be present in elf32_arm_howto_table. */
1920 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1921 {
1922 {BFD_RELOC_NONE, R_ARM_NONE},
1923 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1924 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1925 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1926 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1927 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1928 {BFD_RELOC_32, R_ARM_ABS32},
1929 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1930 {BFD_RELOC_8, R_ARM_ABS8},
1931 {BFD_RELOC_16, R_ARM_ABS16},
1932 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1933 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1934 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1935 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1936 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1937 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1938 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1939 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1940 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1941 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1942 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1943 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1944 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1945 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1946 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1947 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1948 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1949 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1950 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1951 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1952 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1953 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1954 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1955 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1956 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1957 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1958 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1959 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1960 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1961 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1962 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1963 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1964 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1965 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1966 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1967 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1968 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1969 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
1970 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
1971 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
1972 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
1973 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1974 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1975 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1976 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1977 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1978 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1979 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1980 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1981 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1982 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1983 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1984 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1985 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1986 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1987 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1988 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1989 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1990 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1991 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1992 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1993 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1994 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1995 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1996 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1997 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1998 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1999 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2000 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2001 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2002 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2003 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2004 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2005 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2006 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2007 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2008 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2009 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2010 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2011 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2012 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2013 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2014 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2015 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
2016 };
2017
2018 static reloc_howto_type *
2019 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2020 bfd_reloc_code_real_type code)
2021 {
2022 unsigned int i;
2023
2024 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2025 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2026 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2027
2028 return NULL;
2029 }
2030
2031 static reloc_howto_type *
2032 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2033 const char *r_name)
2034 {
2035 unsigned int i;
2036
2037 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2038 if (elf32_arm_howto_table_1[i].name != NULL
2039 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2040 return &elf32_arm_howto_table_1[i];
2041
2042 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2043 if (elf32_arm_howto_table_2[i].name != NULL
2044 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2045 return &elf32_arm_howto_table_2[i];
2046
2047 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2048 if (elf32_arm_howto_table_3[i].name != NULL
2049 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2050 return &elf32_arm_howto_table_3[i];
2051
2052 return NULL;
2053 }
2054
2055 /* Support for core dump NOTE sections. */
2056
2057 static bfd_boolean
2058 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2059 {
2060 int offset;
2061 size_t size;
2062
2063 switch (note->descsz)
2064 {
2065 default:
2066 return FALSE;
2067
2068 case 148: /* Linux/ARM 32-bit. */
2069 /* pr_cursig */
2070 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2071
2072 /* pr_pid */
2073 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2074
2075 /* pr_reg */
2076 offset = 72;
2077 size = 72;
2078
2079 break;
2080 }
2081
2082 /* Make a ".reg/999" section. */
2083 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2084 size, note->descpos + offset);
2085 }
2086
2087 static bfd_boolean
2088 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2089 {
2090 switch (note->descsz)
2091 {
2092 default:
2093 return FALSE;
2094
2095 case 124: /* Linux/ARM elf_prpsinfo. */
2096 elf_tdata (abfd)->core->pid
2097 = bfd_get_32 (abfd, note->descdata + 12);
2098 elf_tdata (abfd)->core->program
2099 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2100 elf_tdata (abfd)->core->command
2101 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2102 }
2103
2104 /* Note that for some reason, a spurious space is tacked
2105 onto the end of the args in some (at least one anyway)
2106 implementations, so strip it off if it exists. */
2107 {
2108 char *command = elf_tdata (abfd)->core->command;
2109 int n = strlen (command);
2110
2111 if (0 < n && command[n - 1] == ' ')
2112 command[n - 1] = '\0';
2113 }
2114
2115 return TRUE;
2116 }
2117
2118 static char *
2119 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2120 int note_type, ...)
2121 {
2122 switch (note_type)
2123 {
2124 default:
2125 return NULL;
2126
2127 case NT_PRPSINFO:
2128 {
2129 char data[124];
2130 va_list ap;
2131
2132 va_start (ap, note_type);
2133 memset (data, 0, sizeof (data));
2134 strncpy (data + 28, va_arg (ap, const char *), 16);
2135 strncpy (data + 44, va_arg (ap, const char *), 80);
2136 va_end (ap);
2137
2138 return elfcore_write_note (abfd, buf, bufsiz,
2139 "CORE", note_type, data, sizeof (data));
2140 }
2141
2142 case NT_PRSTATUS:
2143 {
2144 char data[148];
2145 va_list ap;
2146 long pid;
2147 int cursig;
2148 const void *greg;
2149
2150 va_start (ap, note_type);
2151 memset (data, 0, sizeof (data));
2152 pid = va_arg (ap, long);
2153 bfd_put_32 (abfd, pid, data + 24);
2154 cursig = va_arg (ap, int);
2155 bfd_put_16 (abfd, cursig, data + 12);
2156 greg = va_arg (ap, const void *);
2157 memcpy (data + 72, greg, 72);
2158 va_end (ap);
2159
2160 return elfcore_write_note (abfd, buf, bufsiz,
2161 "CORE", note_type, data, sizeof (data));
2162 }
2163 }
2164 }
2165
2166 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2167 #define TARGET_LITTLE_NAME "elf32-littlearm"
2168 #define TARGET_BIG_SYM arm_elf32_be_vec
2169 #define TARGET_BIG_NAME "elf32-bigarm"
2170
2171 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2172 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2173 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2174
2175 typedef unsigned long int insn32;
2176 typedef unsigned short int insn16;
2177
2178 /* In lieu of proper flags, assume all EABIv4 or later objects are
2179 interworkable. */
2180 #define INTERWORK_FLAG(abfd) \
2181 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2182 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2183 || ((abfd)->flags & BFD_LINKER_CREATED))
2184
2185 /* The linker script knows the section names for placement.
2186 The entry_names are used to do simple name mangling on the stubs.
2187 Given a function name, and its type, the stub can be found. The
2188 name can be changed. The only requirement is the %s be present. */
2189 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2190 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2191
2192 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2193 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2194
2195 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2196 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2197
2198 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2199 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2200
2201 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2202 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2203
2204 #define STUB_ENTRY_NAME "__%s_veneer"
2205
2206 #define CMSE_PREFIX "__acle_se_"
2207
2208 /* The name of the dynamic interpreter. This is put in the .interp
2209 section. */
2210 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2211
2212 static const unsigned long tls_trampoline [] =
2213 {
2214 0xe08e0000, /* add r0, lr, r0 */
2215 0xe5901004, /* ldr r1, [r0,#4] */
2216 0xe12fff11, /* bx r1 */
2217 };
2218
2219 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2220 {
2221 0xe52d2004, /* push {r2} */
2222 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2223 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2224 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2225 0xe081100f, /* 2: add r1, pc */
2226 0xe12fff12, /* bx r2 */
2227 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2228 + dl_tlsdesc_lazy_resolver(GOT) */
2229 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2230 };
2231
2232 #ifdef FOUR_WORD_PLT
2233
2234 /* The first entry in a procedure linkage table looks like
2235 this. It is set up so that any shared library function that is
2236 called before the relocation has been set up calls the dynamic
2237 linker first. */
2238 static const bfd_vma elf32_arm_plt0_entry [] =
2239 {
2240 0xe52de004, /* str lr, [sp, #-4]! */
2241 0xe59fe010, /* ldr lr, [pc, #16] */
2242 0xe08fe00e, /* add lr, pc, lr */
2243 0xe5bef008, /* ldr pc, [lr, #8]! */
2244 };
2245
2246 /* Subsequent entries in a procedure linkage table look like
2247 this. */
2248 static const bfd_vma elf32_arm_plt_entry [] =
2249 {
2250 0xe28fc600, /* add ip, pc, #NN */
2251 0xe28cca00, /* add ip, ip, #NN */
2252 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2253 0x00000000, /* unused */
2254 };
2255
2256 #else /* not FOUR_WORD_PLT */
2257
2258 /* The first entry in a procedure linkage table looks like
2259 this. It is set up so that any shared library function that is
2260 called before the relocation has been set up calls the dynamic
2261 linker first. */
2262 static const bfd_vma elf32_arm_plt0_entry [] =
2263 {
2264 0xe52de004, /* str lr, [sp, #-4]! */
2265 0xe59fe004, /* ldr lr, [pc, #4] */
2266 0xe08fe00e, /* add lr, pc, lr */
2267 0xe5bef008, /* ldr pc, [lr, #8]! */
2268 0x00000000, /* &GOT[0] - . */
2269 };
2270
2271 /* By default subsequent entries in a procedure linkage table look like
2272 this. Offsets that don't fit into 28 bits will cause link error. */
2273 static const bfd_vma elf32_arm_plt_entry_short [] =
2274 {
2275 0xe28fc600, /* add ip, pc, #0xNN00000 */
2276 0xe28cca00, /* add ip, ip, #0xNN000 */
2277 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2278 };
2279
2280 /* When explicitly asked, we'll use this "long" entry format
2281 which can cope with arbitrary displacements. */
2282 static const bfd_vma elf32_arm_plt_entry_long [] =
2283 {
2284 0xe28fc200, /* add ip, pc, #0xN0000000 */
2285 0xe28cc600, /* add ip, ip, #0xNN00000 */
2286 0xe28cca00, /* add ip, ip, #0xNN000 */
2287 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2288 };
2289
2290 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2291
2292 #endif /* not FOUR_WORD_PLT */
2293
2294 /* The first entry in a procedure linkage table looks like this.
2295 It is set up so that any shared library function that is called before the
2296 relocation has been set up calls the dynamic linker first. */
2297 static const bfd_vma elf32_thumb2_plt0_entry [] =
2298 {
2299 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2300 an instruction maybe encoded to one or two array elements. */
2301 0xf8dfb500, /* push {lr} */
2302 0x44fee008, /* ldr.w lr, [pc, #8] */
2303 /* add lr, pc */
2304 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2305 0x00000000, /* &GOT[0] - . */
2306 };
2307
2308 /* Subsequent entries in a procedure linkage table for thumb only target
2309 look like this. */
2310 static const bfd_vma elf32_thumb2_plt_entry [] =
2311 {
2312 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2313 an instruction maybe encoded to one or two array elements. */
2314 0x0c00f240, /* movw ip, #0xNNNN */
2315 0x0c00f2c0, /* movt ip, #0xNNNN */
2316 0xf8dc44fc, /* add ip, pc */
2317 0xbf00f000 /* ldr.w pc, [ip] */
2318 /* nop */
2319 };
2320
2321 /* The format of the first entry in the procedure linkage table
2322 for a VxWorks executable. */
2323 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2324 {
2325 0xe52dc008, /* str ip,[sp,#-8]! */
2326 0xe59fc000, /* ldr ip,[pc] */
2327 0xe59cf008, /* ldr pc,[ip,#8] */
2328 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2329 };
2330
2331 /* The format of subsequent entries in a VxWorks executable. */
2332 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2333 {
2334 0xe59fc000, /* ldr ip,[pc] */
2335 0xe59cf000, /* ldr pc,[ip] */
2336 0x00000000, /* .long @got */
2337 0xe59fc000, /* ldr ip,[pc] */
2338 0xea000000, /* b _PLT */
2339 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2340 };
2341
2342 /* The format of entries in a VxWorks shared library. */
2343 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2344 {
2345 0xe59fc000, /* ldr ip,[pc] */
2346 0xe79cf009, /* ldr pc,[ip,r9] */
2347 0x00000000, /* .long @got */
2348 0xe59fc000, /* ldr ip,[pc] */
2349 0xe599f008, /* ldr pc,[r9,#8] */
2350 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2351 };
2352
2353 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2354 #define PLT_THUMB_STUB_SIZE 4
2355 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2356 {
2357 0x4778, /* bx pc */
2358 0x46c0 /* nop */
2359 };
2360
2361 /* The entries in a PLT when using a DLL-based target with multiple
2362 address spaces. */
2363 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2364 {
2365 0xe51ff004, /* ldr pc, [pc, #-4] */
2366 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2367 };
2368
2369 /* The first entry in a procedure linkage table looks like
2370 this. It is set up so that any shared library function that is
2371 called before the relocation has been set up calls the dynamic
2372 linker first. */
2373 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2374 {
2375 /* First bundle: */
2376 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2377 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2378 0xe08cc00f, /* add ip, ip, pc */
2379 0xe52dc008, /* str ip, [sp, #-8]! */
2380 /* Second bundle: */
2381 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2382 0xe59cc000, /* ldr ip, [ip] */
2383 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2384 0xe12fff1c, /* bx ip */
2385 /* Third bundle: */
2386 0xe320f000, /* nop */
2387 0xe320f000, /* nop */
2388 0xe320f000, /* nop */
2389 /* .Lplt_tail: */
2390 0xe50dc004, /* str ip, [sp, #-4] */
2391 /* Fourth bundle: */
2392 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2393 0xe59cc000, /* ldr ip, [ip] */
2394 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2395 0xe12fff1c, /* bx ip */
2396 };
2397 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2398
2399 /* Subsequent entries in a procedure linkage table look like this. */
2400 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2401 {
2402 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2403 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2404 0xe08cc00f, /* add ip, ip, pc */
2405 0xea000000, /* b .Lplt_tail */
2406 };
2407
2408 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2409 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2410 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2411 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2412 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2413 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2414 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2415 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2416
2417 enum stub_insn_type
2418 {
2419 THUMB16_TYPE = 1,
2420 THUMB32_TYPE,
2421 ARM_TYPE,
2422 DATA_TYPE
2423 };
2424
2425 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2426 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2427 is inserted in arm_build_one_stub(). */
2428 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2429 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2430 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2431 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2432 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2433 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2434 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2435 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2436
2437 typedef struct
2438 {
2439 bfd_vma data;
2440 enum stub_insn_type type;
2441 unsigned int r_type;
2442 int reloc_addend;
2443 } insn_sequence;
2444
2445 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2446 to reach the stub if necessary. */
2447 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2448 {
2449 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2450 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2451 };
2452
2453 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2454 available. */
2455 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2456 {
2457 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2458 ARM_INSN (0xe12fff1c), /* bx ip */
2459 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2460 };
2461
2462 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2463 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2464 {
2465 THUMB16_INSN (0xb401), /* push {r0} */
2466 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2467 THUMB16_INSN (0x4684), /* mov ip, r0 */
2468 THUMB16_INSN (0xbc01), /* pop {r0} */
2469 THUMB16_INSN (0x4760), /* bx ip */
2470 THUMB16_INSN (0xbf00), /* nop */
2471 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2472 };
2473
2474 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2475 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2476 {
2477 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2478 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2479 };
2480
2481 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2482 M-profile architectures. */
2483 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2484 {
2485 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2486 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2487 THUMB16_INSN (0x4760), /* bx ip */
2488 };
2489
2490 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2491 allowed. */
2492 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2493 {
2494 THUMB16_INSN (0x4778), /* bx pc */
2495 THUMB16_INSN (0x46c0), /* nop */
2496 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2497 ARM_INSN (0xe12fff1c), /* bx ip */
2498 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2499 };
2500
2501 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2502 available. */
2503 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2504 {
2505 THUMB16_INSN (0x4778), /* bx pc */
2506 THUMB16_INSN (0x46c0), /* nop */
2507 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2508 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2509 };
2510
2511 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2512 one, when the destination is close enough. */
2513 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2514 {
2515 THUMB16_INSN (0x4778), /* bx pc */
2516 THUMB16_INSN (0x46c0), /* nop */
2517 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2518 };
2519
2520 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2521 blx to reach the stub if necessary. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2523 {
2524 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2525 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2530 blx to reach the stub if necessary. We can not add into pc;
2531 it is not guaranteed to mode switch (different in ARMv6 and
2532 ARMv7). */
2533 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2534 {
2535 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2536 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2537 ARM_INSN (0xe12fff1c), /* bx ip */
2538 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2539 };
2540
2541 /* V4T ARM -> ARM long branch stub, PIC. */
2542 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2543 {
2544 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2545 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2546 ARM_INSN (0xe12fff1c), /* bx ip */
2547 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2548 };
2549
2550 /* V4T Thumb -> ARM long branch stub, PIC. */
2551 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2552 {
2553 THUMB16_INSN (0x4778), /* bx pc */
2554 THUMB16_INSN (0x46c0), /* nop */
2555 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2556 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2557 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2558 };
2559
2560 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2561 architectures. */
2562 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2563 {
2564 THUMB16_INSN (0xb401), /* push {r0} */
2565 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2566 THUMB16_INSN (0x46fc), /* mov ip, pc */
2567 THUMB16_INSN (0x4484), /* add ip, r0 */
2568 THUMB16_INSN (0xbc01), /* pop {r0} */
2569 THUMB16_INSN (0x4760), /* bx ip */
2570 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2571 };
2572
2573 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2574 allowed. */
2575 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2576 {
2577 THUMB16_INSN (0x4778), /* bx pc */
2578 THUMB16_INSN (0x46c0), /* nop */
2579 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2580 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2581 ARM_INSN (0xe12fff1c), /* bx ip */
2582 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2583 };
2584
2585 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2586 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2587 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2588 {
2589 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2590 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2591 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2592 };
2593
2594 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2595 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2597 {
2598 THUMB16_INSN (0x4778), /* bx pc */
2599 THUMB16_INSN (0x46c0), /* nop */
2600 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2601 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2602 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2603 };
2604
2605 /* NaCl ARM -> ARM long branch stub. */
2606 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2607 {
2608 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2609 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2610 ARM_INSN (0xe12fff1c), /* bx ip */
2611 ARM_INSN (0xe320f000), /* nop */
2612 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2613 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2614 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2615 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2616 };
2617
2618 /* NaCl ARM -> ARM long branch stub, PIC. */
2619 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2620 {
2621 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2622 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2623 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2624 ARM_INSN (0xe12fff1c), /* bx ip */
2625 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2626 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2627 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2628 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2629 };
2630
2631 /* Stub used for transition to secure state (aka SG veneer). */
2632 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2633 {
2634 THUMB32_INSN (0xe97fe97f), /* sg. */
2635 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2636 };
2637
2638
2639 /* Cortex-A8 erratum-workaround stubs. */
2640
2641 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2642 can't use a conditional branch to reach this stub). */
2643
2644 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2645 {
2646 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2647 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2648 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2649 };
2650
2651 /* Stub used for b.w and bl.w instructions. */
2652
2653 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2654 {
2655 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2656 };
2657
2658 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2659 {
2660 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2661 };
2662
2663 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2664 instruction (which switches to ARM mode) to point to this stub. Jump to the
2665 real destination using an ARM-mode branch. */
2666
2667 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2668 {
2669 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2670 };
2671
2672 /* For each section group there can be a specially created linker section
2673 to hold the stubs for that group. The name of the stub section is based
2674 upon the name of another section within that group with the suffix below
2675 applied.
2676
2677 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2678 create what appeared to be a linker stub section when it actually
2679 contained user code/data. For example, consider this fragment:
2680
2681 const char * stubborn_problems[] = { "np" };
2682
2683 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2684 section called:
2685
2686 .data.rel.local.stubborn_problems
2687
2688 This then causes problems in arm32_arm_build_stubs() as it triggers:
2689
2690 // Ignore non-stub sections.
2691 if (!strstr (stub_sec->name, STUB_SUFFIX))
2692 continue;
2693
2694 And so the section would be ignored instead of being processed. Hence
2695 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2696 C identifier. */
2697 #define STUB_SUFFIX ".__stub"
2698
2699 /* One entry per long/short branch stub defined above. */
2700 #define DEF_STUBS \
2701 DEF_STUB(long_branch_any_any) \
2702 DEF_STUB(long_branch_v4t_arm_thumb) \
2703 DEF_STUB(long_branch_thumb_only) \
2704 DEF_STUB(long_branch_v4t_thumb_thumb) \
2705 DEF_STUB(long_branch_v4t_thumb_arm) \
2706 DEF_STUB(short_branch_v4t_thumb_arm) \
2707 DEF_STUB(long_branch_any_arm_pic) \
2708 DEF_STUB(long_branch_any_thumb_pic) \
2709 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2710 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2711 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2712 DEF_STUB(long_branch_thumb_only_pic) \
2713 DEF_STUB(long_branch_any_tls_pic) \
2714 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2715 DEF_STUB(long_branch_arm_nacl) \
2716 DEF_STUB(long_branch_arm_nacl_pic) \
2717 DEF_STUB(cmse_branch_thumb_only) \
2718 DEF_STUB(a8_veneer_b_cond) \
2719 DEF_STUB(a8_veneer_b) \
2720 DEF_STUB(a8_veneer_bl) \
2721 DEF_STUB(a8_veneer_blx) \
2722 DEF_STUB(long_branch_thumb2_only) \
2723 DEF_STUB(long_branch_thumb2_only_pure)
2724
2725 #define DEF_STUB(x) arm_stub_##x,
2726 enum elf32_arm_stub_type
2727 {
2728 arm_stub_none,
2729 DEF_STUBS
2730 max_stub_type
2731 };
2732 #undef DEF_STUB
2733
2734 /* Note the first a8_veneer type. */
2735 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2736
2737 typedef struct
2738 {
2739 const insn_sequence* template_sequence;
2740 int template_size;
2741 } stub_def;
2742
2743 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2744 static const stub_def stub_definitions[] =
2745 {
2746 {NULL, 0},
2747 DEF_STUBS
2748 };
2749
2750 struct elf32_arm_stub_hash_entry
2751 {
2752 /* Base hash table entry structure. */
2753 struct bfd_hash_entry root;
2754
2755 /* The stub section. */
2756 asection *stub_sec;
2757
2758 /* Offset within stub_sec of the beginning of this stub. */
2759 bfd_vma stub_offset;
2760
2761 /* Given the symbol's value and its section we can determine its final
2762 value when building the stubs (so the stub knows where to jump). */
2763 bfd_vma target_value;
2764 asection *target_section;
2765
2766 /* Same as above but for the source of the branch to the stub. Used for
2767 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2768 such, source section does not need to be recorded since Cortex-A8 erratum
2769 workaround stubs are only generated when both source and target are in the
2770 same section. */
2771 bfd_vma source_value;
2772
2773 /* The instruction which caused this stub to be generated (only valid for
2774 Cortex-A8 erratum workaround stubs at present). */
2775 unsigned long orig_insn;
2776
2777 /* The stub type. */
2778 enum elf32_arm_stub_type stub_type;
2779 /* Its encoding size in bytes. */
2780 int stub_size;
2781 /* Its template. */
2782 const insn_sequence *stub_template;
2783 /* The size of the template (number of entries). */
2784 int stub_template_size;
2785
2786 /* The symbol table entry, if any, that this was derived from. */
2787 struct elf32_arm_link_hash_entry *h;
2788
2789 /* Type of branch. */
2790 enum arm_st_branch_type branch_type;
2791
2792 /* Where this stub is being called from, or, in the case of combined
2793 stub sections, the first input section in the group. */
2794 asection *id_sec;
2795
2796 /* The name for the local symbol at the start of this stub. The
2797 stub name in the hash table has to be unique; this does not, so
2798 it can be friendlier. */
2799 char *output_name;
2800 };
2801
2802 /* Used to build a map of a section. This is required for mixed-endian
2803 code/data. */
2804
2805 typedef struct elf32_elf_section_map
2806 {
2807 bfd_vma vma;
2808 char type;
2809 }
2810 elf32_arm_section_map;
2811
2812 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2813
2814 typedef enum
2815 {
2816 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2817 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2818 VFP11_ERRATUM_ARM_VENEER,
2819 VFP11_ERRATUM_THUMB_VENEER
2820 }
2821 elf32_vfp11_erratum_type;
2822
2823 typedef struct elf32_vfp11_erratum_list
2824 {
2825 struct elf32_vfp11_erratum_list *next;
2826 bfd_vma vma;
2827 union
2828 {
2829 struct
2830 {
2831 struct elf32_vfp11_erratum_list *veneer;
2832 unsigned int vfp_insn;
2833 } b;
2834 struct
2835 {
2836 struct elf32_vfp11_erratum_list *branch;
2837 unsigned int id;
2838 } v;
2839 } u;
2840 elf32_vfp11_erratum_type type;
2841 }
2842 elf32_vfp11_erratum_list;
2843
2844 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2845 veneer. */
2846 typedef enum
2847 {
2848 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2849 STM32L4XX_ERRATUM_VENEER
2850 }
2851 elf32_stm32l4xx_erratum_type;
2852
2853 typedef struct elf32_stm32l4xx_erratum_list
2854 {
2855 struct elf32_stm32l4xx_erratum_list *next;
2856 bfd_vma vma;
2857 union
2858 {
2859 struct
2860 {
2861 struct elf32_stm32l4xx_erratum_list *veneer;
2862 unsigned int insn;
2863 } b;
2864 struct
2865 {
2866 struct elf32_stm32l4xx_erratum_list *branch;
2867 unsigned int id;
2868 } v;
2869 } u;
2870 elf32_stm32l4xx_erratum_type type;
2871 }
2872 elf32_stm32l4xx_erratum_list;
2873
2874 typedef enum
2875 {
2876 DELETE_EXIDX_ENTRY,
2877 INSERT_EXIDX_CANTUNWIND_AT_END
2878 }
2879 arm_unwind_edit_type;
2880
2881 /* A (sorted) list of edits to apply to an unwind table. */
2882 typedef struct arm_unwind_table_edit
2883 {
2884 arm_unwind_edit_type type;
2885 /* Note: we sometimes want to insert an unwind entry corresponding to a
2886 section different from the one we're currently writing out, so record the
2887 (text) section this edit relates to here. */
2888 asection *linked_section;
2889 unsigned int index;
2890 struct arm_unwind_table_edit *next;
2891 }
2892 arm_unwind_table_edit;
2893
2894 typedef struct _arm_elf_section_data
2895 {
2896 /* Information about mapping symbols. */
2897 struct bfd_elf_section_data elf;
2898 unsigned int mapcount;
2899 unsigned int mapsize;
2900 elf32_arm_section_map *map;
2901 /* Information about CPU errata. */
2902 unsigned int erratumcount;
2903 elf32_vfp11_erratum_list *erratumlist;
2904 unsigned int stm32l4xx_erratumcount;
2905 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2906 unsigned int additional_reloc_count;
2907 /* Information about unwind tables. */
2908 union
2909 {
2910 /* Unwind info attached to a text section. */
2911 struct
2912 {
2913 asection *arm_exidx_sec;
2914 } text;
2915
2916 /* Unwind info attached to an .ARM.exidx section. */
2917 struct
2918 {
2919 arm_unwind_table_edit *unwind_edit_list;
2920 arm_unwind_table_edit *unwind_edit_tail;
2921 } exidx;
2922 } u;
2923 }
2924 _arm_elf_section_data;
2925
2926 #define elf32_arm_section_data(sec) \
2927 ((_arm_elf_section_data *) elf_section_data (sec))
2928
2929 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2930 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2931 so may be created multiple times: we use an array of these entries whilst
2932 relaxing which we can refresh easily, then create stubs for each potentially
2933 erratum-triggering instruction once we've settled on a solution. */
2934
2935 struct a8_erratum_fix
2936 {
2937 bfd *input_bfd;
2938 asection *section;
2939 bfd_vma offset;
2940 bfd_vma target_offset;
2941 unsigned long orig_insn;
2942 char *stub_name;
2943 enum elf32_arm_stub_type stub_type;
2944 enum arm_st_branch_type branch_type;
2945 };
2946
2947 /* A table of relocs applied to branches which might trigger Cortex-A8
2948 erratum. */
2949
2950 struct a8_erratum_reloc
2951 {
2952 bfd_vma from;
2953 bfd_vma destination;
2954 struct elf32_arm_link_hash_entry *hash;
2955 const char *sym_name;
2956 unsigned int r_type;
2957 enum arm_st_branch_type branch_type;
2958 bfd_boolean non_a8_stub;
2959 };
2960
2961 /* The size of the thread control block. */
2962 #define TCB_SIZE 8
2963
2964 /* ARM-specific information about a PLT entry, over and above the usual
2965 gotplt_union. */
2966 struct arm_plt_info
2967 {
2968 /* We reference count Thumb references to a PLT entry separately,
2969 so that we can emit the Thumb trampoline only if needed. */
2970 bfd_signed_vma thumb_refcount;
2971
2972 /* Some references from Thumb code may be eliminated by BL->BLX
2973 conversion, so record them separately. */
2974 bfd_signed_vma maybe_thumb_refcount;
2975
2976 /* How many of the recorded PLT accesses were from non-call relocations.
2977 This information is useful when deciding whether anything takes the
2978 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2979 non-call references to the function should resolve directly to the
2980 real runtime target. */
2981 unsigned int noncall_refcount;
2982
2983 /* Since PLT entries have variable size if the Thumb prologue is
2984 used, we need to record the index into .got.plt instead of
2985 recomputing it from the PLT offset. */
2986 bfd_signed_vma got_offset;
2987 };
2988
2989 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2990 struct arm_local_iplt_info
2991 {
2992 /* The information that is usually found in the generic ELF part of
2993 the hash table entry. */
2994 union gotplt_union root;
2995
2996 /* The information that is usually found in the ARM-specific part of
2997 the hash table entry. */
2998 struct arm_plt_info arm;
2999
3000 /* A list of all potential dynamic relocations against this symbol. */
3001 struct elf_dyn_relocs *dyn_relocs;
3002 };
3003
3004 /* Structure to handle FDPIC support for local functions. */
3005 struct fdpic_local {
3006 unsigned int funcdesc_cnt;
3007 unsigned int gotofffuncdesc_cnt;
3008 int funcdesc_offset;
3009 };
3010
3011 struct elf_arm_obj_tdata
3012 {
3013 struct elf_obj_tdata root;
3014
3015 /* tls_type for each local got entry. */
3016 char *local_got_tls_type;
3017
3018 /* GOTPLT entries for TLS descriptors. */
3019 bfd_vma *local_tlsdesc_gotent;
3020
3021 /* Information for local symbols that need entries in .iplt. */
3022 struct arm_local_iplt_info **local_iplt;
3023
3024 /* Zero to warn when linking objects with incompatible enum sizes. */
3025 int no_enum_size_warning;
3026
3027 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3028 int no_wchar_size_warning;
3029
3030 /* Maintains FDPIC counters and funcdesc info. */
3031 struct fdpic_local *local_fdpic_cnts;
3032 };
3033
3034 #define elf_arm_tdata(bfd) \
3035 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3036
3037 #define elf32_arm_local_got_tls_type(bfd) \
3038 (elf_arm_tdata (bfd)->local_got_tls_type)
3039
3040 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3041 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3042
3043 #define elf32_arm_local_iplt(bfd) \
3044 (elf_arm_tdata (bfd)->local_iplt)
3045
3046 #define elf32_arm_local_fdpic_cnts(bfd) \
3047 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3048
3049 #define is_arm_elf(bfd) \
3050 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3051 && elf_tdata (bfd) != NULL \
3052 && elf_object_id (bfd) == ARM_ELF_DATA)
3053
3054 static bfd_boolean
3055 elf32_arm_mkobject (bfd *abfd)
3056 {
3057 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3058 ARM_ELF_DATA);
3059 }
3060
3061 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3062
3063 /* Structure to handle FDPIC support for extern functions. */
3064 struct fdpic_global {
3065 unsigned int gotofffuncdesc_cnt;
3066 unsigned int gotfuncdesc_cnt;
3067 unsigned int funcdesc_cnt;
3068 int funcdesc_offset;
3069 int gotfuncdesc_offset;
3070 };
3071
3072 /* Arm ELF linker hash entry. */
3073 struct elf32_arm_link_hash_entry
3074 {
3075 struct elf_link_hash_entry root;
3076
3077 /* Track dynamic relocs copied for this symbol. */
3078 struct elf_dyn_relocs *dyn_relocs;
3079
3080 /* ARM-specific PLT information. */
3081 struct arm_plt_info plt;
3082
3083 #define GOT_UNKNOWN 0
3084 #define GOT_NORMAL 1
3085 #define GOT_TLS_GD 2
3086 #define GOT_TLS_IE 4
3087 #define GOT_TLS_GDESC 8
3088 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3089 unsigned int tls_type : 8;
3090
3091 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3092 unsigned int is_iplt : 1;
3093
3094 unsigned int unused : 23;
3095
3096 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3097 starting at the end of the jump table. */
3098 bfd_vma tlsdesc_got;
3099
3100 /* The symbol marking the real symbol location for exported thumb
3101 symbols with Arm stubs. */
3102 struct elf_link_hash_entry *export_glue;
3103
3104 /* A pointer to the most recently used stub hash entry against this
3105 symbol. */
3106 struct elf32_arm_stub_hash_entry *stub_cache;
3107
3108 /* Counter for FDPIC relocations against this symbol. */
3109 struct fdpic_global fdpic_cnts;
3110 };
3111
3112 /* Traverse an arm ELF linker hash table. */
3113 #define elf32_arm_link_hash_traverse(table, func, info) \
3114 (elf_link_hash_traverse \
3115 (&(table)->root, \
3116 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3117 (info)))
3118
3119 /* Get the ARM elf linker hash table from a link_info structure. */
3120 #define elf32_arm_hash_table(info) \
3121 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3122 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3123
3124 #define arm_stub_hash_lookup(table, string, create, copy) \
3125 ((struct elf32_arm_stub_hash_entry *) \
3126 bfd_hash_lookup ((table), (string), (create), (copy)))
3127
3128 /* Array to keep track of which stub sections have been created, and
3129 information on stub grouping. */
3130 struct map_stub
3131 {
3132 /* This is the section to which stubs in the group will be
3133 attached. */
3134 asection *link_sec;
3135 /* The stub section. */
3136 asection *stub_sec;
3137 };
3138
3139 #define elf32_arm_compute_jump_table_size(htab) \
3140 ((htab)->next_tls_desc_index * 4)
3141
3142 /* ARM ELF linker hash table. */
3143 struct elf32_arm_link_hash_table
3144 {
3145 /* The main hash table. */
3146 struct elf_link_hash_table root;
3147
3148 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3149 bfd_size_type thumb_glue_size;
3150
3151 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3152 bfd_size_type arm_glue_size;
3153
3154 /* The size in bytes of section containing the ARMv4 BX veneers. */
3155 bfd_size_type bx_glue_size;
3156
3157 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3158 veneer has been populated. */
3159 bfd_vma bx_glue_offset[15];
3160
3161 /* The size in bytes of the section containing glue for VFP11 erratum
3162 veneers. */
3163 bfd_size_type vfp11_erratum_glue_size;
3164
3165 /* The size in bytes of the section containing glue for STM32L4XX erratum
3166 veneers. */
3167 bfd_size_type stm32l4xx_erratum_glue_size;
3168
3169 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3170 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3171 elf32_arm_write_section(). */
3172 struct a8_erratum_fix *a8_erratum_fixes;
3173 unsigned int num_a8_erratum_fixes;
3174
3175 /* An arbitrary input BFD chosen to hold the glue sections. */
3176 bfd * bfd_of_glue_owner;
3177
3178 /* Nonzero to output a BE8 image. */
3179 int byteswap_code;
3180
3181 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3182 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3183 int target1_is_rel;
3184
3185 /* The relocation to use for R_ARM_TARGET2 relocations. */
3186 int target2_reloc;
3187
3188 /* 0 = Ignore R_ARM_V4BX.
3189 1 = Convert BX to MOV PC.
3190 2 = Generate v4 interworing stubs. */
3191 int fix_v4bx;
3192
3193 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3194 int fix_cortex_a8;
3195
3196 /* Whether we should fix the ARM1176 BLX immediate issue. */
3197 int fix_arm1176;
3198
3199 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3200 int use_blx;
3201
3202 /* What sort of code sequences we should look for which may trigger the
3203 VFP11 denorm erratum. */
3204 bfd_arm_vfp11_fix vfp11_fix;
3205
3206 /* Global counter for the number of fixes we have emitted. */
3207 int num_vfp11_fixes;
3208
3209 /* What sort of code sequences we should look for which may trigger the
3210 STM32L4XX erratum. */
3211 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3212
3213 /* Global counter for the number of fixes we have emitted. */
3214 int num_stm32l4xx_fixes;
3215
3216 /* Nonzero to force PIC branch veneers. */
3217 int pic_veneer;
3218
3219 /* The number of bytes in the initial entry in the PLT. */
3220 bfd_size_type plt_header_size;
3221
3222 /* The number of bytes in the subsequent PLT etries. */
3223 bfd_size_type plt_entry_size;
3224
3225 /* True if the target system is VxWorks. */
3226 int vxworks_p;
3227
3228 /* True if the target system is Symbian OS. */
3229 int symbian_p;
3230
3231 /* True if the target system is Native Client. */
3232 int nacl_p;
3233
3234 /* True if the target uses REL relocations. */
3235 bfd_boolean use_rel;
3236
3237 /* Nonzero if import library must be a secure gateway import library
3238 as per ARMv8-M Security Extensions. */
3239 int cmse_implib;
3240
3241 /* The import library whose symbols' address must remain stable in
3242 the import library generated. */
3243 bfd *in_implib_bfd;
3244
3245 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3246 bfd_vma next_tls_desc_index;
3247
3248 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3249 bfd_vma num_tls_desc;
3250
3251 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3252 asection *srelplt2;
3253
3254 /* The offset into splt of the PLT entry for the TLS descriptor
3255 resolver. Special values are 0, if not necessary (or not found
3256 to be necessary yet), and -1 if needed but not determined
3257 yet. */
3258 bfd_vma dt_tlsdesc_plt;
3259
3260 /* The offset into sgot of the GOT entry used by the PLT entry
3261 above. */
3262 bfd_vma dt_tlsdesc_got;
3263
3264 /* Offset in .plt section of tls_arm_trampoline. */
3265 bfd_vma tls_trampoline;
3266
3267 /* Data for R_ARM_TLS_LDM32 relocations. */
3268 union
3269 {
3270 bfd_signed_vma refcount;
3271 bfd_vma offset;
3272 } tls_ldm_got;
3273
3274 /* Small local sym cache. */
3275 struct sym_cache sym_cache;
3276
3277 /* For convenience in allocate_dynrelocs. */
3278 bfd * obfd;
3279
3280 /* The amount of space used by the reserved portion of the sgotplt
3281 section, plus whatever space is used by the jump slots. */
3282 bfd_vma sgotplt_jump_table_size;
3283
3284 /* The stub hash table. */
3285 struct bfd_hash_table stub_hash_table;
3286
3287 /* Linker stub bfd. */
3288 bfd *stub_bfd;
3289
3290 /* Linker call-backs. */
3291 asection * (*add_stub_section) (const char *, asection *, asection *,
3292 unsigned int);
3293 void (*layout_sections_again) (void);
3294
3295 /* Array to keep track of which stub sections have been created, and
3296 information on stub grouping. */
3297 struct map_stub *stub_group;
3298
3299 /* Input stub section holding secure gateway veneers. */
3300 asection *cmse_stub_sec;
3301
3302 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3303 start to be allocated. */
3304 bfd_vma new_cmse_stub_offset;
3305
3306 /* Number of elements in stub_group. */
3307 unsigned int top_id;
3308
3309 /* Assorted information used by elf32_arm_size_stubs. */
3310 unsigned int bfd_count;
3311 unsigned int top_index;
3312 asection **input_list;
3313
3314 /* True if the target system uses FDPIC. */
3315 int fdpic_p;
3316
3317 /* Fixup section. Used for FDPIC. */
3318 asection *srofixup;
3319 };
3320
3321 /* Add an FDPIC read-only fixup. */
3322 static void
3323 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3324 {
3325 bfd_vma fixup_offset;
3326
3327 fixup_offset = srofixup->reloc_count++ * 4;
3328 BFD_ASSERT (fixup_offset < srofixup->size);
3329 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3330 }
3331
3332 static inline int
3333 ctz (unsigned int mask)
3334 {
3335 #if GCC_VERSION >= 3004
3336 return __builtin_ctz (mask);
3337 #else
3338 unsigned int i;
3339
3340 for (i = 0; i < 8 * sizeof (mask); i++)
3341 {
3342 if (mask & 0x1)
3343 break;
3344 mask = (mask >> 1);
3345 }
3346 return i;
3347 #endif
3348 }
3349
3350 static inline int
3351 elf32_arm_popcount (unsigned int mask)
3352 {
3353 #if GCC_VERSION >= 3004
3354 return __builtin_popcount (mask);
3355 #else
3356 unsigned int i;
3357 int sum = 0;
3358
3359 for (i = 0; i < 8 * sizeof (mask); i++)
3360 {
3361 if (mask & 0x1)
3362 sum++;
3363 mask = (mask >> 1);
3364 }
3365 return sum;
3366 #endif
3367 }
3368
3369 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3370 asection *sreloc, Elf_Internal_Rela *rel);
3371
3372 static void
3373 arm_elf_fill_funcdesc(bfd *output_bfd,
3374 struct bfd_link_info *info,
3375 int *funcdesc_offset,
3376 int dynindx,
3377 int offset,
3378 bfd_vma addr,
3379 bfd_vma dynreloc_value,
3380 bfd_vma seg)
3381 {
3382 if ((*funcdesc_offset & 1) == 0)
3383 {
3384 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3385 asection *sgot = globals->root.sgot;
3386
3387 if (bfd_link_pic(info))
3388 {
3389 asection *srelgot = globals->root.srelgot;
3390 Elf_Internal_Rela outrel;
3391
3392 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3393 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3394 outrel.r_addend = 0;
3395
3396 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3397 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3398 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3399 }
3400 else
3401 {
3402 struct elf_link_hash_entry *hgot = globals->root.hgot;
3403 bfd_vma got_value = hgot->root.u.def.value
3404 + hgot->root.u.def.section->output_section->vma
3405 + hgot->root.u.def.section->output_offset;
3406
3407 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3408 sgot->output_section->vma + sgot->output_offset
3409 + offset);
3410 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3411 sgot->output_section->vma + sgot->output_offset
3412 + offset + 4);
3413 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3414 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3415 }
3416 *funcdesc_offset |= 1;
3417 }
3418 }
3419
3420 /* Create an entry in an ARM ELF linker hash table. */
3421
3422 static struct bfd_hash_entry *
3423 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3424 struct bfd_hash_table * table,
3425 const char * string)
3426 {
3427 struct elf32_arm_link_hash_entry * ret =
3428 (struct elf32_arm_link_hash_entry *) entry;
3429
3430 /* Allocate the structure if it has not already been allocated by a
3431 subclass. */
3432 if (ret == NULL)
3433 ret = (struct elf32_arm_link_hash_entry *)
3434 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3435 if (ret == NULL)
3436 return (struct bfd_hash_entry *) ret;
3437
3438 /* Call the allocation method of the superclass. */
3439 ret = ((struct elf32_arm_link_hash_entry *)
3440 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3441 table, string));
3442 if (ret != NULL)
3443 {
3444 ret->dyn_relocs = NULL;
3445 ret->tls_type = GOT_UNKNOWN;
3446 ret->tlsdesc_got = (bfd_vma) -1;
3447 ret->plt.thumb_refcount = 0;
3448 ret->plt.maybe_thumb_refcount = 0;
3449 ret->plt.noncall_refcount = 0;
3450 ret->plt.got_offset = -1;
3451 ret->is_iplt = FALSE;
3452 ret->export_glue = NULL;
3453
3454 ret->stub_cache = NULL;
3455
3456 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3457 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3458 ret->fdpic_cnts.funcdesc_cnt = 0;
3459 ret->fdpic_cnts.funcdesc_offset = -1;
3460 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3461 }
3462
3463 return (struct bfd_hash_entry *) ret;
3464 }
3465
3466 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3467 symbols. */
3468
3469 static bfd_boolean
3470 elf32_arm_allocate_local_sym_info (bfd *abfd)
3471 {
3472 if (elf_local_got_refcounts (abfd) == NULL)
3473 {
3474 bfd_size_type num_syms;
3475 bfd_size_type size;
3476 char *data;
3477
3478 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3479 size = num_syms * (sizeof (bfd_signed_vma)
3480 + sizeof (struct arm_local_iplt_info *)
3481 + sizeof (bfd_vma)
3482 + sizeof (char)
3483 + sizeof (struct fdpic_local));
3484 data = bfd_zalloc (abfd, size);
3485 if (data == NULL)
3486 return FALSE;
3487
3488 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3489 data += num_syms * sizeof (struct fdpic_local);
3490
3491 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3492 data += num_syms * sizeof (bfd_signed_vma);
3493
3494 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3495 data += num_syms * sizeof (struct arm_local_iplt_info *);
3496
3497 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3498 data += num_syms * sizeof (bfd_vma);
3499
3500 elf32_arm_local_got_tls_type (abfd) = data;
3501 }
3502 return TRUE;
3503 }
3504
3505 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3506 to input bfd ABFD. Create the information if it doesn't already exist.
3507 Return null if an allocation fails. */
3508
3509 static struct arm_local_iplt_info *
3510 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3511 {
3512 struct arm_local_iplt_info **ptr;
3513
3514 if (!elf32_arm_allocate_local_sym_info (abfd))
3515 return NULL;
3516
3517 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3518 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3519 if (*ptr == NULL)
3520 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3521 return *ptr;
3522 }
3523
3524 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3525 in ABFD's symbol table. If the symbol is global, H points to its
3526 hash table entry, otherwise H is null.
3527
3528 Return true if the symbol does have PLT information. When returning
3529 true, point *ROOT_PLT at the target-independent reference count/offset
3530 union and *ARM_PLT at the ARM-specific information. */
3531
3532 static bfd_boolean
3533 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3534 struct elf32_arm_link_hash_entry *h,
3535 unsigned long r_symndx, union gotplt_union **root_plt,
3536 struct arm_plt_info **arm_plt)
3537 {
3538 struct arm_local_iplt_info *local_iplt;
3539
3540 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3541 return FALSE;
3542
3543 if (h != NULL)
3544 {
3545 *root_plt = &h->root.plt;
3546 *arm_plt = &h->plt;
3547 return TRUE;
3548 }
3549
3550 if (elf32_arm_local_iplt (abfd) == NULL)
3551 return FALSE;
3552
3553 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3554 if (local_iplt == NULL)
3555 return FALSE;
3556
3557 *root_plt = &local_iplt->root;
3558 *arm_plt = &local_iplt->arm;
3559 return TRUE;
3560 }
3561
3562 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3563 before it. */
3564
3565 static bfd_boolean
3566 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3567 struct arm_plt_info *arm_plt)
3568 {
3569 struct elf32_arm_link_hash_table *htab;
3570
3571 htab = elf32_arm_hash_table (info);
3572 return (arm_plt->thumb_refcount != 0
3573 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3574 }
3575
3576 /* Return a pointer to the head of the dynamic reloc list that should
3577 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3578 ABFD's symbol table. Return null if an error occurs. */
3579
3580 static struct elf_dyn_relocs **
3581 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3582 Elf_Internal_Sym *isym)
3583 {
3584 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3585 {
3586 struct arm_local_iplt_info *local_iplt;
3587
3588 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3589 if (local_iplt == NULL)
3590 return NULL;
3591 return &local_iplt->dyn_relocs;
3592 }
3593 else
3594 {
3595 /* Track dynamic relocs needed for local syms too.
3596 We really need local syms available to do this
3597 easily. Oh well. */
3598 asection *s;
3599 void *vpp;
3600
3601 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3602 if (s == NULL)
3603 abort ();
3604
3605 vpp = &elf_section_data (s)->local_dynrel;
3606 return (struct elf_dyn_relocs **) vpp;
3607 }
3608 }
3609
3610 /* Initialize an entry in the stub hash table. */
3611
3612 static struct bfd_hash_entry *
3613 stub_hash_newfunc (struct bfd_hash_entry *entry,
3614 struct bfd_hash_table *table,
3615 const char *string)
3616 {
3617 /* Allocate the structure if it has not already been allocated by a
3618 subclass. */
3619 if (entry == NULL)
3620 {
3621 entry = (struct bfd_hash_entry *)
3622 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3623 if (entry == NULL)
3624 return entry;
3625 }
3626
3627 /* Call the allocation method of the superclass. */
3628 entry = bfd_hash_newfunc (entry, table, string);
3629 if (entry != NULL)
3630 {
3631 struct elf32_arm_stub_hash_entry *eh;
3632
3633 /* Initialize the local fields. */
3634 eh = (struct elf32_arm_stub_hash_entry *) entry;
3635 eh->stub_sec = NULL;
3636 eh->stub_offset = (bfd_vma) -1;
3637 eh->source_value = 0;
3638 eh->target_value = 0;
3639 eh->target_section = NULL;
3640 eh->orig_insn = 0;
3641 eh->stub_type = arm_stub_none;
3642 eh->stub_size = 0;
3643 eh->stub_template = NULL;
3644 eh->stub_template_size = -1;
3645 eh->h = NULL;
3646 eh->id_sec = NULL;
3647 eh->output_name = NULL;
3648 }
3649
3650 return entry;
3651 }
3652
3653 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3654 shortcuts to them in our hash table. */
3655
3656 static bfd_boolean
3657 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3658 {
3659 struct elf32_arm_link_hash_table *htab;
3660
3661 htab = elf32_arm_hash_table (info);
3662 if (htab == NULL)
3663 return FALSE;
3664
3665 /* BPABI objects never have a GOT, or associated sections. */
3666 if (htab->symbian_p)
3667 return TRUE;
3668
3669 if (! _bfd_elf_create_got_section (dynobj, info))
3670 return FALSE;
3671
3672 /* Also create .rofixup. */
3673 if (htab->fdpic_p)
3674 {
3675 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3676 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3677 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3678 if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2))
3679 return FALSE;
3680 }
3681
3682 return TRUE;
3683 }
3684
3685 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3686
3687 static bfd_boolean
3688 create_ifunc_sections (struct bfd_link_info *info)
3689 {
3690 struct elf32_arm_link_hash_table *htab;
3691 const struct elf_backend_data *bed;
3692 bfd *dynobj;
3693 asection *s;
3694 flagword flags;
3695
3696 htab = elf32_arm_hash_table (info);
3697 dynobj = htab->root.dynobj;
3698 bed = get_elf_backend_data (dynobj);
3699 flags = bed->dynamic_sec_flags;
3700
3701 if (htab->root.iplt == NULL)
3702 {
3703 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3704 flags | SEC_READONLY | SEC_CODE);
3705 if (s == NULL
3706 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3707 return FALSE;
3708 htab->root.iplt = s;
3709 }
3710
3711 if (htab->root.irelplt == NULL)
3712 {
3713 s = bfd_make_section_anyway_with_flags (dynobj,
3714 RELOC_SECTION (htab, ".iplt"),
3715 flags | SEC_READONLY);
3716 if (s == NULL
3717 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3718 return FALSE;
3719 htab->root.irelplt = s;
3720 }
3721
3722 if (htab->root.igotplt == NULL)
3723 {
3724 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3725 if (s == NULL
3726 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3727 return FALSE;
3728 htab->root.igotplt = s;
3729 }
3730 return TRUE;
3731 }
3732
3733 /* Determine if we're dealing with a Thumb only architecture. */
3734
3735 static bfd_boolean
3736 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3737 {
3738 int arch;
3739 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3740 Tag_CPU_arch_profile);
3741
3742 if (profile)
3743 return profile == 'M';
3744
3745 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3746
3747 /* Force return logic to be reviewed for each new architecture. */
3748 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3749
3750 if (arch == TAG_CPU_ARCH_V6_M
3751 || arch == TAG_CPU_ARCH_V6S_M
3752 || arch == TAG_CPU_ARCH_V7E_M
3753 || arch == TAG_CPU_ARCH_V8M_BASE
3754 || arch == TAG_CPU_ARCH_V8M_MAIN)
3755 return TRUE;
3756
3757 return FALSE;
3758 }
3759
3760 /* Determine if we're dealing with a Thumb-2 object. */
3761
3762 static bfd_boolean
3763 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3764 {
3765 int arch;
3766 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3767 Tag_THUMB_ISA_use);
3768
3769 if (thumb_isa)
3770 return thumb_isa == 2;
3771
3772 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3773
3774 /* Force return logic to be reviewed for each new architecture. */
3775 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3776
3777 return (arch == TAG_CPU_ARCH_V6T2
3778 || arch == TAG_CPU_ARCH_V7
3779 || arch == TAG_CPU_ARCH_V7E_M
3780 || arch == TAG_CPU_ARCH_V8
3781 || arch == TAG_CPU_ARCH_V8R
3782 || arch == TAG_CPU_ARCH_V8M_MAIN);
3783 }
3784
3785 /* Determine whether Thumb-2 BL instruction is available. */
3786
3787 static bfd_boolean
3788 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3789 {
3790 int arch =
3791 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3792
3793 /* Force return logic to be reviewed for each new architecture. */
3794 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3795
3796 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3797 return (arch == TAG_CPU_ARCH_V6T2
3798 || arch >= TAG_CPU_ARCH_V7);
3799 }
3800
3801 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3802 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3803 hash table. */
3804
3805 static bfd_boolean
3806 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3807 {
3808 struct elf32_arm_link_hash_table *htab;
3809
3810 htab = elf32_arm_hash_table (info);
3811 if (htab == NULL)
3812 return FALSE;
3813
3814 if (!htab->root.sgot && !create_got_section (dynobj, info))
3815 return FALSE;
3816
3817 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3818 return FALSE;
3819
3820 if (htab->vxworks_p)
3821 {
3822 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3823 return FALSE;
3824
3825 if (bfd_link_pic (info))
3826 {
3827 htab->plt_header_size = 0;
3828 htab->plt_entry_size
3829 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3830 }
3831 else
3832 {
3833 htab->plt_header_size
3834 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3835 htab->plt_entry_size
3836 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3837 }
3838
3839 if (elf_elfheader (dynobj))
3840 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3841 }
3842 else
3843 {
3844 /* PR ld/16017
3845 Test for thumb only architectures. Note - we cannot just call
3846 using_thumb_only() as the attributes in the output bfd have not been
3847 initialised at this point, so instead we use the input bfd. */
3848 bfd * saved_obfd = htab->obfd;
3849
3850 htab->obfd = dynobj;
3851 if (using_thumb_only (htab))
3852 {
3853 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3854 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3855 }
3856 htab->obfd = saved_obfd;
3857 }
3858
3859 if (!htab->root.splt
3860 || !htab->root.srelplt
3861 || !htab->root.sdynbss
3862 || (!bfd_link_pic (info) && !htab->root.srelbss))
3863 abort ();
3864
3865 return TRUE;
3866 }
3867
3868 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3869
3870 static void
3871 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3872 struct elf_link_hash_entry *dir,
3873 struct elf_link_hash_entry *ind)
3874 {
3875 struct elf32_arm_link_hash_entry *edir, *eind;
3876
3877 edir = (struct elf32_arm_link_hash_entry *) dir;
3878 eind = (struct elf32_arm_link_hash_entry *) ind;
3879
3880 if (eind->dyn_relocs != NULL)
3881 {
3882 if (edir->dyn_relocs != NULL)
3883 {
3884 struct elf_dyn_relocs **pp;
3885 struct elf_dyn_relocs *p;
3886
3887 /* Add reloc counts against the indirect sym to the direct sym
3888 list. Merge any entries against the same section. */
3889 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3890 {
3891 struct elf_dyn_relocs *q;
3892
3893 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3894 if (q->sec == p->sec)
3895 {
3896 q->pc_count += p->pc_count;
3897 q->count += p->count;
3898 *pp = p->next;
3899 break;
3900 }
3901 if (q == NULL)
3902 pp = &p->next;
3903 }
3904 *pp = edir->dyn_relocs;
3905 }
3906
3907 edir->dyn_relocs = eind->dyn_relocs;
3908 eind->dyn_relocs = NULL;
3909 }
3910
3911 if (ind->root.type == bfd_link_hash_indirect)
3912 {
3913 /* Copy over PLT info. */
3914 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3915 eind->plt.thumb_refcount = 0;
3916 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3917 eind->plt.maybe_thumb_refcount = 0;
3918 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3919 eind->plt.noncall_refcount = 0;
3920
3921 /* Copy FDPIC counters. */
3922 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
3923 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
3924 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
3925
3926 /* We should only allocate a function to .iplt once the final
3927 symbol information is known. */
3928 BFD_ASSERT (!eind->is_iplt);
3929
3930 if (dir->got.refcount <= 0)
3931 {
3932 edir->tls_type = eind->tls_type;
3933 eind->tls_type = GOT_UNKNOWN;
3934 }
3935 }
3936
3937 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3938 }
3939
3940 /* Destroy an ARM elf linker hash table. */
3941
3942 static void
3943 elf32_arm_link_hash_table_free (bfd *obfd)
3944 {
3945 struct elf32_arm_link_hash_table *ret
3946 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3947
3948 bfd_hash_table_free (&ret->stub_hash_table);
3949 _bfd_elf_link_hash_table_free (obfd);
3950 }
3951
3952 /* Create an ARM elf linker hash table. */
3953
3954 static struct bfd_link_hash_table *
3955 elf32_arm_link_hash_table_create (bfd *abfd)
3956 {
3957 struct elf32_arm_link_hash_table *ret;
3958 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3959
3960 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3961 if (ret == NULL)
3962 return NULL;
3963
3964 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3965 elf32_arm_link_hash_newfunc,
3966 sizeof (struct elf32_arm_link_hash_entry),
3967 ARM_ELF_DATA))
3968 {
3969 free (ret);
3970 return NULL;
3971 }
3972
3973 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3974 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3975 #ifdef FOUR_WORD_PLT
3976 ret->plt_header_size = 16;
3977 ret->plt_entry_size = 16;
3978 #else
3979 ret->plt_header_size = 20;
3980 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3981 #endif
3982 ret->use_rel = TRUE;
3983 ret->obfd = abfd;
3984 ret->fdpic_p = 0;
3985
3986 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3987 sizeof (struct elf32_arm_stub_hash_entry)))
3988 {
3989 _bfd_elf_link_hash_table_free (abfd);
3990 return NULL;
3991 }
3992 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3993
3994 return &ret->root.root;
3995 }
3996
3997 /* Determine what kind of NOPs are available. */
3998
3999 static bfd_boolean
4000 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4001 {
4002 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4003 Tag_CPU_arch);
4004
4005 /* Force return logic to be reviewed for each new architecture. */
4006 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
4007
4008 return (arch == TAG_CPU_ARCH_V6T2
4009 || arch == TAG_CPU_ARCH_V6K
4010 || arch == TAG_CPU_ARCH_V7
4011 || arch == TAG_CPU_ARCH_V8
4012 || arch == TAG_CPU_ARCH_V8R);
4013 }
4014
4015 static bfd_boolean
4016 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4017 {
4018 switch (stub_type)
4019 {
4020 case arm_stub_long_branch_thumb_only:
4021 case arm_stub_long_branch_thumb2_only:
4022 case arm_stub_long_branch_thumb2_only_pure:
4023 case arm_stub_long_branch_v4t_thumb_arm:
4024 case arm_stub_short_branch_v4t_thumb_arm:
4025 case arm_stub_long_branch_v4t_thumb_arm_pic:
4026 case arm_stub_long_branch_v4t_thumb_tls_pic:
4027 case arm_stub_long_branch_thumb_only_pic:
4028 case arm_stub_cmse_branch_thumb_only:
4029 return TRUE;
4030 case arm_stub_none:
4031 BFD_FAIL ();
4032 return FALSE;
4033 break;
4034 default:
4035 return FALSE;
4036 }
4037 }
4038
4039 /* Determine the type of stub needed, if any, for a call. */
4040
4041 static enum elf32_arm_stub_type
4042 arm_type_of_stub (struct bfd_link_info *info,
4043 asection *input_sec,
4044 const Elf_Internal_Rela *rel,
4045 unsigned char st_type,
4046 enum arm_st_branch_type *actual_branch_type,
4047 struct elf32_arm_link_hash_entry *hash,
4048 bfd_vma destination,
4049 asection *sym_sec,
4050 bfd *input_bfd,
4051 const char *name)
4052 {
4053 bfd_vma location;
4054 bfd_signed_vma branch_offset;
4055 unsigned int r_type;
4056 struct elf32_arm_link_hash_table * globals;
4057 bfd_boolean thumb2, thumb2_bl, thumb_only;
4058 enum elf32_arm_stub_type stub_type = arm_stub_none;
4059 int use_plt = 0;
4060 enum arm_st_branch_type branch_type = *actual_branch_type;
4061 union gotplt_union *root_plt;
4062 struct arm_plt_info *arm_plt;
4063 int arch;
4064 int thumb2_movw;
4065
4066 if (branch_type == ST_BRANCH_LONG)
4067 return stub_type;
4068
4069 globals = elf32_arm_hash_table (info);
4070 if (globals == NULL)
4071 return stub_type;
4072
4073 thumb_only = using_thumb_only (globals);
4074 thumb2 = using_thumb2 (globals);
4075 thumb2_bl = using_thumb2_bl (globals);
4076
4077 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4078
4079 /* True for architectures that implement the thumb2 movw instruction. */
4080 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4081
4082 /* Determine where the call point is. */
4083 location = (input_sec->output_offset
4084 + input_sec->output_section->vma
4085 + rel->r_offset);
4086
4087 r_type = ELF32_R_TYPE (rel->r_info);
4088
4089 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4090 are considering a function call relocation. */
4091 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4092 || r_type == R_ARM_THM_JUMP19)
4093 && branch_type == ST_BRANCH_TO_ARM)
4094 branch_type = ST_BRANCH_TO_THUMB;
4095
4096 /* For TLS call relocs, it is the caller's responsibility to provide
4097 the address of the appropriate trampoline. */
4098 if (r_type != R_ARM_TLS_CALL
4099 && r_type != R_ARM_THM_TLS_CALL
4100 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4101 ELF32_R_SYM (rel->r_info), &root_plt,
4102 &arm_plt)
4103 && root_plt->offset != (bfd_vma) -1)
4104 {
4105 asection *splt;
4106
4107 if (hash == NULL || hash->is_iplt)
4108 splt = globals->root.iplt;
4109 else
4110 splt = globals->root.splt;
4111 if (splt != NULL)
4112 {
4113 use_plt = 1;
4114
4115 /* Note when dealing with PLT entries: the main PLT stub is in
4116 ARM mode, so if the branch is in Thumb mode, another
4117 Thumb->ARM stub will be inserted later just before the ARM
4118 PLT stub. If a long branch stub is needed, we'll add a
4119 Thumb->Arm one and branch directly to the ARM PLT entry.
4120 Here, we have to check if a pre-PLT Thumb->ARM stub
4121 is needed and if it will be close enough. */
4122
4123 destination = (splt->output_section->vma
4124 + splt->output_offset
4125 + root_plt->offset);
4126 st_type = STT_FUNC;
4127
4128 /* Thumb branch/call to PLT: it can become a branch to ARM
4129 or to Thumb. We must perform the same checks and
4130 corrections as in elf32_arm_final_link_relocate. */
4131 if ((r_type == R_ARM_THM_CALL)
4132 || (r_type == R_ARM_THM_JUMP24))
4133 {
4134 if (globals->use_blx
4135 && r_type == R_ARM_THM_CALL
4136 && !thumb_only)
4137 {
4138 /* If the Thumb BLX instruction is available, convert
4139 the BL to a BLX instruction to call the ARM-mode
4140 PLT entry. */
4141 branch_type = ST_BRANCH_TO_ARM;
4142 }
4143 else
4144 {
4145 if (!thumb_only)
4146 /* Target the Thumb stub before the ARM PLT entry. */
4147 destination -= PLT_THUMB_STUB_SIZE;
4148 branch_type = ST_BRANCH_TO_THUMB;
4149 }
4150 }
4151 else
4152 {
4153 branch_type = ST_BRANCH_TO_ARM;
4154 }
4155 }
4156 }
4157 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4158 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4159
4160 branch_offset = (bfd_signed_vma)(destination - location);
4161
4162 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4163 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4164 {
4165 /* Handle cases where:
4166 - this call goes too far (different Thumb/Thumb2 max
4167 distance)
4168 - it's a Thumb->Arm call and blx is not available, or it's a
4169 Thumb->Arm branch (not bl). A stub is needed in this case,
4170 but only if this call is not through a PLT entry. Indeed,
4171 PLT stubs handle mode switching already. */
4172 if ((!thumb2_bl
4173 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4174 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4175 || (thumb2_bl
4176 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4177 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4178 || (thumb2
4179 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4180 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4181 && (r_type == R_ARM_THM_JUMP19))
4182 || (branch_type == ST_BRANCH_TO_ARM
4183 && (((r_type == R_ARM_THM_CALL
4184 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4185 || (r_type == R_ARM_THM_JUMP24)
4186 || (r_type == R_ARM_THM_JUMP19))
4187 && !use_plt))
4188 {
4189 /* If we need to insert a Thumb-Thumb long branch stub to a
4190 PLT, use one that branches directly to the ARM PLT
4191 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4192 stub, undo this now. */
4193 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4194 {
4195 branch_type = ST_BRANCH_TO_ARM;
4196 branch_offset += PLT_THUMB_STUB_SIZE;
4197 }
4198
4199 if (branch_type == ST_BRANCH_TO_THUMB)
4200 {
4201 /* Thumb to thumb. */
4202 if (!thumb_only)
4203 {
4204 if (input_sec->flags & SEC_ELF_PURECODE)
4205 _bfd_error_handler
4206 (_("%pB(%pA): warning: long branch veneers used in"
4207 " section with SHF_ARM_PURECODE section"
4208 " attribute is only supported for M-profile"
4209 " targets that implement the movw instruction"),
4210 input_bfd, input_sec);
4211
4212 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4213 /* PIC stubs. */
4214 ? ((globals->use_blx
4215 && (r_type == R_ARM_THM_CALL))
4216 /* V5T and above. Stub starts with ARM code, so
4217 we must be able to switch mode before
4218 reaching it, which is only possible for 'bl'
4219 (ie R_ARM_THM_CALL relocation). */
4220 ? arm_stub_long_branch_any_thumb_pic
4221 /* On V4T, use Thumb code only. */
4222 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4223
4224 /* non-PIC stubs. */
4225 : ((globals->use_blx
4226 && (r_type == R_ARM_THM_CALL))
4227 /* V5T and above. */
4228 ? arm_stub_long_branch_any_any
4229 /* V4T. */
4230 : arm_stub_long_branch_v4t_thumb_thumb);
4231 }
4232 else
4233 {
4234 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4235 stub_type = arm_stub_long_branch_thumb2_only_pure;
4236 else
4237 {
4238 if (input_sec->flags & SEC_ELF_PURECODE)
4239 _bfd_error_handler
4240 (_("%pB(%pA): warning: long branch veneers used in"
4241 " section with SHF_ARM_PURECODE section"
4242 " attribute is only supported for M-profile"
4243 " targets that implement the movw instruction"),
4244 input_bfd, input_sec);
4245
4246 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4247 /* PIC stub. */
4248 ? arm_stub_long_branch_thumb_only_pic
4249 /* non-PIC stub. */
4250 : (thumb2 ? arm_stub_long_branch_thumb2_only
4251 : arm_stub_long_branch_thumb_only);
4252 }
4253 }
4254 }
4255 else
4256 {
4257 if (input_sec->flags & SEC_ELF_PURECODE)
4258 _bfd_error_handler
4259 (_("%pB(%pA): warning: long branch veneers used in"
4260 " section with SHF_ARM_PURECODE section"
4261 " attribute is only supported" " for M-profile"
4262 " targets that implement the movw instruction"),
4263 input_bfd, input_sec);
4264
4265 /* Thumb to arm. */
4266 if (sym_sec != NULL
4267 && sym_sec->owner != NULL
4268 && !INTERWORK_FLAG (sym_sec->owner))
4269 {
4270 _bfd_error_handler
4271 (_("%pB(%s): warning: interworking not enabled;"
4272 " first occurrence: %pB: %s call to %s"),
4273 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4274 }
4275
4276 stub_type =
4277 (bfd_link_pic (info) | globals->pic_veneer)
4278 /* PIC stubs. */
4279 ? (r_type == R_ARM_THM_TLS_CALL
4280 /* TLS PIC stubs. */
4281 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4282 : arm_stub_long_branch_v4t_thumb_tls_pic)
4283 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4284 /* V5T PIC and above. */
4285 ? arm_stub_long_branch_any_arm_pic
4286 /* V4T PIC stub. */
4287 : arm_stub_long_branch_v4t_thumb_arm_pic))
4288
4289 /* non-PIC stubs. */
4290 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4291 /* V5T and above. */
4292 ? arm_stub_long_branch_any_any
4293 /* V4T. */
4294 : arm_stub_long_branch_v4t_thumb_arm);
4295
4296 /* Handle v4t short branches. */
4297 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4298 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4299 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4300 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4301 }
4302 }
4303 }
4304 else if (r_type == R_ARM_CALL
4305 || r_type == R_ARM_JUMP24
4306 || r_type == R_ARM_PLT32
4307 || r_type == R_ARM_TLS_CALL)
4308 {
4309 if (input_sec->flags & SEC_ELF_PURECODE)
4310 _bfd_error_handler
4311 (_("%pB(%pA): warning: long branch veneers used in"
4312 " section with SHF_ARM_PURECODE section"
4313 " attribute is only supported for M-profile"
4314 " targets that implement the movw instruction"),
4315 input_bfd, input_sec);
4316 if (branch_type == ST_BRANCH_TO_THUMB)
4317 {
4318 /* Arm to thumb. */
4319
4320 if (sym_sec != NULL
4321 && sym_sec->owner != NULL
4322 && !INTERWORK_FLAG (sym_sec->owner))
4323 {
4324 _bfd_error_handler
4325 (_("%pB(%s): warning: interworking not enabled;"
4326 " first occurrence: %pB: %s call to %s"),
4327 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4328 }
4329
4330 /* We have an extra 2-bytes reach because of
4331 the mode change (bit 24 (H) of BLX encoding). */
4332 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4333 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4334 || (r_type == R_ARM_CALL && !globals->use_blx)
4335 || (r_type == R_ARM_JUMP24)
4336 || (r_type == R_ARM_PLT32))
4337 {
4338 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4339 /* PIC stubs. */
4340 ? ((globals->use_blx)
4341 /* V5T and above. */
4342 ? arm_stub_long_branch_any_thumb_pic
4343 /* V4T stub. */
4344 : arm_stub_long_branch_v4t_arm_thumb_pic)
4345
4346 /* non-PIC stubs. */
4347 : ((globals->use_blx)
4348 /* V5T and above. */
4349 ? arm_stub_long_branch_any_any
4350 /* V4T. */
4351 : arm_stub_long_branch_v4t_arm_thumb);
4352 }
4353 }
4354 else
4355 {
4356 /* Arm to arm. */
4357 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4358 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4359 {
4360 stub_type =
4361 (bfd_link_pic (info) | globals->pic_veneer)
4362 /* PIC stubs. */
4363 ? (r_type == R_ARM_TLS_CALL
4364 /* TLS PIC Stub. */
4365 ? arm_stub_long_branch_any_tls_pic
4366 : (globals->nacl_p
4367 ? arm_stub_long_branch_arm_nacl_pic
4368 : arm_stub_long_branch_any_arm_pic))
4369 /* non-PIC stubs. */
4370 : (globals->nacl_p
4371 ? arm_stub_long_branch_arm_nacl
4372 : arm_stub_long_branch_any_any);
4373 }
4374 }
4375 }
4376
4377 /* If a stub is needed, record the actual destination type. */
4378 if (stub_type != arm_stub_none)
4379 *actual_branch_type = branch_type;
4380
4381 return stub_type;
4382 }
4383
4384 /* Build a name for an entry in the stub hash table. */
4385
4386 static char *
4387 elf32_arm_stub_name (const asection *input_section,
4388 const asection *sym_sec,
4389 const struct elf32_arm_link_hash_entry *hash,
4390 const Elf_Internal_Rela *rel,
4391 enum elf32_arm_stub_type stub_type)
4392 {
4393 char *stub_name;
4394 bfd_size_type len;
4395
4396 if (hash)
4397 {
4398 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4399 stub_name = (char *) bfd_malloc (len);
4400 if (stub_name != NULL)
4401 sprintf (stub_name, "%08x_%s+%x_%d",
4402 input_section->id & 0xffffffff,
4403 hash->root.root.root.string,
4404 (int) rel->r_addend & 0xffffffff,
4405 (int) stub_type);
4406 }
4407 else
4408 {
4409 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4410 stub_name = (char *) bfd_malloc (len);
4411 if (stub_name != NULL)
4412 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4413 input_section->id & 0xffffffff,
4414 sym_sec->id & 0xffffffff,
4415 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4416 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4417 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4418 (int) rel->r_addend & 0xffffffff,
4419 (int) stub_type);
4420 }
4421
4422 return stub_name;
4423 }
4424
4425 /* Look up an entry in the stub hash. Stub entries are cached because
4426 creating the stub name takes a bit of time. */
4427
4428 static struct elf32_arm_stub_hash_entry *
4429 elf32_arm_get_stub_entry (const asection *input_section,
4430 const asection *sym_sec,
4431 struct elf_link_hash_entry *hash,
4432 const Elf_Internal_Rela *rel,
4433 struct elf32_arm_link_hash_table *htab,
4434 enum elf32_arm_stub_type stub_type)
4435 {
4436 struct elf32_arm_stub_hash_entry *stub_entry;
4437 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4438 const asection *id_sec;
4439
4440 if ((input_section->flags & SEC_CODE) == 0)
4441 return NULL;
4442
4443 /* If this input section is part of a group of sections sharing one
4444 stub section, then use the id of the first section in the group.
4445 Stub names need to include a section id, as there may well be
4446 more than one stub used to reach say, printf, and we need to
4447 distinguish between them. */
4448 BFD_ASSERT (input_section->id <= htab->top_id);
4449 id_sec = htab->stub_group[input_section->id].link_sec;
4450
4451 if (h != NULL && h->stub_cache != NULL
4452 && h->stub_cache->h == h
4453 && h->stub_cache->id_sec == id_sec
4454 && h->stub_cache->stub_type == stub_type)
4455 {
4456 stub_entry = h->stub_cache;
4457 }
4458 else
4459 {
4460 char *stub_name;
4461
4462 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4463 if (stub_name == NULL)
4464 return NULL;
4465
4466 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4467 stub_name, FALSE, FALSE);
4468 if (h != NULL)
4469 h->stub_cache = stub_entry;
4470
4471 free (stub_name);
4472 }
4473
4474 return stub_entry;
4475 }
4476
4477 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4478 section. */
4479
4480 static bfd_boolean
4481 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4482 {
4483 if (stub_type >= max_stub_type)
4484 abort (); /* Should be unreachable. */
4485
4486 switch (stub_type)
4487 {
4488 case arm_stub_cmse_branch_thumb_only:
4489 return TRUE;
4490
4491 default:
4492 return FALSE;
4493 }
4494
4495 abort (); /* Should be unreachable. */
4496 }
4497
4498 /* Required alignment (as a power of 2) for the dedicated section holding
4499 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4500 with input sections. */
4501
4502 static int
4503 arm_dedicated_stub_output_section_required_alignment
4504 (enum elf32_arm_stub_type stub_type)
4505 {
4506 if (stub_type >= max_stub_type)
4507 abort (); /* Should be unreachable. */
4508
4509 switch (stub_type)
4510 {
4511 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4512 boundary. */
4513 case arm_stub_cmse_branch_thumb_only:
4514 return 5;
4515
4516 default:
4517 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4518 return 0;
4519 }
4520
4521 abort (); /* Should be unreachable. */
4522 }
4523
4524 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4525 NULL if veneers of this type are interspersed with input sections. */
4526
4527 static const char *
4528 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4529 {
4530 if (stub_type >= max_stub_type)
4531 abort (); /* Should be unreachable. */
4532
4533 switch (stub_type)
4534 {
4535 case arm_stub_cmse_branch_thumb_only:
4536 return ".gnu.sgstubs";
4537
4538 default:
4539 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4540 return NULL;
4541 }
4542
4543 abort (); /* Should be unreachable. */
4544 }
4545
4546 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4547 returns the address of the hash table field in HTAB holding a pointer to the
4548 corresponding input section. Otherwise, returns NULL. */
4549
4550 static asection **
4551 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4552 enum elf32_arm_stub_type stub_type)
4553 {
4554 if (stub_type >= max_stub_type)
4555 abort (); /* Should be unreachable. */
4556
4557 switch (stub_type)
4558 {
4559 case arm_stub_cmse_branch_thumb_only:
4560 return &htab->cmse_stub_sec;
4561
4562 default:
4563 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4564 return NULL;
4565 }
4566
4567 abort (); /* Should be unreachable. */
4568 }
4569
4570 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4571 is the section that branch into veneer and can be NULL if stub should go in
4572 a dedicated output section. Returns a pointer to the stub section, and the
4573 section to which the stub section will be attached (in *LINK_SEC_P).
4574 LINK_SEC_P may be NULL. */
4575
4576 static asection *
4577 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4578 struct elf32_arm_link_hash_table *htab,
4579 enum elf32_arm_stub_type stub_type)
4580 {
4581 asection *link_sec, *out_sec, **stub_sec_p;
4582 const char *stub_sec_prefix;
4583 bfd_boolean dedicated_output_section =
4584 arm_dedicated_stub_output_section_required (stub_type);
4585 int align;
4586
4587 if (dedicated_output_section)
4588 {
4589 bfd *output_bfd = htab->obfd;
4590 const char *out_sec_name =
4591 arm_dedicated_stub_output_section_name (stub_type);
4592 link_sec = NULL;
4593 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4594 stub_sec_prefix = out_sec_name;
4595 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4596 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4597 if (out_sec == NULL)
4598 {
4599 _bfd_error_handler (_("no address assigned to the veneers output "
4600 "section %s"), out_sec_name);
4601 return NULL;
4602 }
4603 }
4604 else
4605 {
4606 BFD_ASSERT (section->id <= htab->top_id);
4607 link_sec = htab->stub_group[section->id].link_sec;
4608 BFD_ASSERT (link_sec != NULL);
4609 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4610 if (*stub_sec_p == NULL)
4611 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4612 stub_sec_prefix = link_sec->name;
4613 out_sec = link_sec->output_section;
4614 align = htab->nacl_p ? 4 : 3;
4615 }
4616
4617 if (*stub_sec_p == NULL)
4618 {
4619 size_t namelen;
4620 bfd_size_type len;
4621 char *s_name;
4622
4623 namelen = strlen (stub_sec_prefix);
4624 len = namelen + sizeof (STUB_SUFFIX);
4625 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4626 if (s_name == NULL)
4627 return NULL;
4628
4629 memcpy (s_name, stub_sec_prefix, namelen);
4630 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4631 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4632 align);
4633 if (*stub_sec_p == NULL)
4634 return NULL;
4635
4636 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4637 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4638 | SEC_KEEP;
4639 }
4640
4641 if (!dedicated_output_section)
4642 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4643
4644 if (link_sec_p)
4645 *link_sec_p = link_sec;
4646
4647 return *stub_sec_p;
4648 }
4649
4650 /* Add a new stub entry to the stub hash. Not all fields of the new
4651 stub entry are initialised. */
4652
4653 static struct elf32_arm_stub_hash_entry *
4654 elf32_arm_add_stub (const char *stub_name, asection *section,
4655 struct elf32_arm_link_hash_table *htab,
4656 enum elf32_arm_stub_type stub_type)
4657 {
4658 asection *link_sec;
4659 asection *stub_sec;
4660 struct elf32_arm_stub_hash_entry *stub_entry;
4661
4662 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4663 stub_type);
4664 if (stub_sec == NULL)
4665 return NULL;
4666
4667 /* Enter this entry into the linker stub hash table. */
4668 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4669 TRUE, FALSE);
4670 if (stub_entry == NULL)
4671 {
4672 if (section == NULL)
4673 section = stub_sec;
4674 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4675 section->owner, stub_name);
4676 return NULL;
4677 }
4678
4679 stub_entry->stub_sec = stub_sec;
4680 stub_entry->stub_offset = (bfd_vma) -1;
4681 stub_entry->id_sec = link_sec;
4682
4683 return stub_entry;
4684 }
4685
4686 /* Store an Arm insn into an output section not processed by
4687 elf32_arm_write_section. */
4688
4689 static void
4690 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4691 bfd * output_bfd, bfd_vma val, void * ptr)
4692 {
4693 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4694 bfd_putl32 (val, ptr);
4695 else
4696 bfd_putb32 (val, ptr);
4697 }
4698
4699 /* Store a 16-bit Thumb insn into an output section not processed by
4700 elf32_arm_write_section. */
4701
4702 static void
4703 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4704 bfd * output_bfd, bfd_vma val, void * ptr)
4705 {
4706 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4707 bfd_putl16 (val, ptr);
4708 else
4709 bfd_putb16 (val, ptr);
4710 }
4711
4712 /* Store a Thumb2 insn into an output section not processed by
4713 elf32_arm_write_section. */
4714
4715 static void
4716 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4717 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4718 {
4719 /* T2 instructions are 16-bit streamed. */
4720 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4721 {
4722 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4723 bfd_putl16 ((val & 0xffff), ptr + 2);
4724 }
4725 else
4726 {
4727 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4728 bfd_putb16 ((val & 0xffff), ptr + 2);
4729 }
4730 }
4731
4732 /* If it's possible to change R_TYPE to a more efficient access
4733 model, return the new reloc type. */
4734
4735 static unsigned
4736 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4737 struct elf_link_hash_entry *h)
4738 {
4739 int is_local = (h == NULL);
4740
4741 if (bfd_link_pic (info)
4742 || (h && h->root.type == bfd_link_hash_undefweak))
4743 return r_type;
4744
4745 /* We do not support relaxations for Old TLS models. */
4746 switch (r_type)
4747 {
4748 case R_ARM_TLS_GOTDESC:
4749 case R_ARM_TLS_CALL:
4750 case R_ARM_THM_TLS_CALL:
4751 case R_ARM_TLS_DESCSEQ:
4752 case R_ARM_THM_TLS_DESCSEQ:
4753 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4754 }
4755
4756 return r_type;
4757 }
4758
4759 static bfd_reloc_status_type elf32_arm_final_link_relocate
4760 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4761 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4762 const char *, unsigned char, enum arm_st_branch_type,
4763 struct elf_link_hash_entry *, bfd_boolean *, char **);
4764
4765 static unsigned int
4766 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4767 {
4768 switch (stub_type)
4769 {
4770 case arm_stub_a8_veneer_b_cond:
4771 case arm_stub_a8_veneer_b:
4772 case arm_stub_a8_veneer_bl:
4773 return 2;
4774
4775 case arm_stub_long_branch_any_any:
4776 case arm_stub_long_branch_v4t_arm_thumb:
4777 case arm_stub_long_branch_thumb_only:
4778 case arm_stub_long_branch_thumb2_only:
4779 case arm_stub_long_branch_thumb2_only_pure:
4780 case arm_stub_long_branch_v4t_thumb_thumb:
4781 case arm_stub_long_branch_v4t_thumb_arm:
4782 case arm_stub_short_branch_v4t_thumb_arm:
4783 case arm_stub_long_branch_any_arm_pic:
4784 case arm_stub_long_branch_any_thumb_pic:
4785 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4786 case arm_stub_long_branch_v4t_arm_thumb_pic:
4787 case arm_stub_long_branch_v4t_thumb_arm_pic:
4788 case arm_stub_long_branch_thumb_only_pic:
4789 case arm_stub_long_branch_any_tls_pic:
4790 case arm_stub_long_branch_v4t_thumb_tls_pic:
4791 case arm_stub_cmse_branch_thumb_only:
4792 case arm_stub_a8_veneer_blx:
4793 return 4;
4794
4795 case arm_stub_long_branch_arm_nacl:
4796 case arm_stub_long_branch_arm_nacl_pic:
4797 return 16;
4798
4799 default:
4800 abort (); /* Should be unreachable. */
4801 }
4802 }
4803
4804 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4805 veneering (TRUE) or have their own symbol (FALSE). */
4806
4807 static bfd_boolean
4808 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4809 {
4810 if (stub_type >= max_stub_type)
4811 abort (); /* Should be unreachable. */
4812
4813 switch (stub_type)
4814 {
4815 case arm_stub_cmse_branch_thumb_only:
4816 return TRUE;
4817
4818 default:
4819 return FALSE;
4820 }
4821
4822 abort (); /* Should be unreachable. */
4823 }
4824
4825 /* Returns the padding needed for the dedicated section used stubs of type
4826 STUB_TYPE. */
4827
4828 static int
4829 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4830 {
4831 if (stub_type >= max_stub_type)
4832 abort (); /* Should be unreachable. */
4833
4834 switch (stub_type)
4835 {
4836 case arm_stub_cmse_branch_thumb_only:
4837 return 32;
4838
4839 default:
4840 return 0;
4841 }
4842
4843 abort (); /* Should be unreachable. */
4844 }
4845
4846 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4847 returns the address of the hash table field in HTAB holding the offset at
4848 which new veneers should be layed out in the stub section. */
4849
4850 static bfd_vma*
4851 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4852 enum elf32_arm_stub_type stub_type)
4853 {
4854 switch (stub_type)
4855 {
4856 case arm_stub_cmse_branch_thumb_only:
4857 return &htab->new_cmse_stub_offset;
4858
4859 default:
4860 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4861 return NULL;
4862 }
4863 }
4864
4865 static bfd_boolean
4866 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4867 void * in_arg)
4868 {
4869 #define MAXRELOCS 3
4870 bfd_boolean removed_sg_veneer;
4871 struct elf32_arm_stub_hash_entry *stub_entry;
4872 struct elf32_arm_link_hash_table *globals;
4873 struct bfd_link_info *info;
4874 asection *stub_sec;
4875 bfd *stub_bfd;
4876 bfd_byte *loc;
4877 bfd_vma sym_value;
4878 int template_size;
4879 int size;
4880 const insn_sequence *template_sequence;
4881 int i;
4882 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4883 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4884 int nrelocs = 0;
4885 int just_allocated = 0;
4886
4887 /* Massage our args to the form they really have. */
4888 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4889 info = (struct bfd_link_info *) in_arg;
4890
4891 globals = elf32_arm_hash_table (info);
4892 if (globals == NULL)
4893 return FALSE;
4894
4895 stub_sec = stub_entry->stub_sec;
4896
4897 if ((globals->fix_cortex_a8 < 0)
4898 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4899 /* We have to do less-strictly-aligned fixes last. */
4900 return TRUE;
4901
4902 /* Assign a slot at the end of section if none assigned yet. */
4903 if (stub_entry->stub_offset == (bfd_vma) -1)
4904 {
4905 stub_entry->stub_offset = stub_sec->size;
4906 just_allocated = 1;
4907 }
4908 loc = stub_sec->contents + stub_entry->stub_offset;
4909
4910 stub_bfd = stub_sec->owner;
4911
4912 /* This is the address of the stub destination. */
4913 sym_value = (stub_entry->target_value
4914 + stub_entry->target_section->output_offset
4915 + stub_entry->target_section->output_section->vma);
4916
4917 template_sequence = stub_entry->stub_template;
4918 template_size = stub_entry->stub_template_size;
4919
4920 size = 0;
4921 for (i = 0; i < template_size; i++)
4922 {
4923 switch (template_sequence[i].type)
4924 {
4925 case THUMB16_TYPE:
4926 {
4927 bfd_vma data = (bfd_vma) template_sequence[i].data;
4928 if (template_sequence[i].reloc_addend != 0)
4929 {
4930 /* We've borrowed the reloc_addend field to mean we should
4931 insert a condition code into this (Thumb-1 branch)
4932 instruction. See THUMB16_BCOND_INSN. */
4933 BFD_ASSERT ((data & 0xff00) == 0xd000);
4934 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4935 }
4936 bfd_put_16 (stub_bfd, data, loc + size);
4937 size += 2;
4938 }
4939 break;
4940
4941 case THUMB32_TYPE:
4942 bfd_put_16 (stub_bfd,
4943 (template_sequence[i].data >> 16) & 0xffff,
4944 loc + size);
4945 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4946 loc + size + 2);
4947 if (template_sequence[i].r_type != R_ARM_NONE)
4948 {
4949 stub_reloc_idx[nrelocs] = i;
4950 stub_reloc_offset[nrelocs++] = size;
4951 }
4952 size += 4;
4953 break;
4954
4955 case ARM_TYPE:
4956 bfd_put_32 (stub_bfd, template_sequence[i].data,
4957 loc + size);
4958 /* Handle cases where the target is encoded within the
4959 instruction. */
4960 if (template_sequence[i].r_type == R_ARM_JUMP24)
4961 {
4962 stub_reloc_idx[nrelocs] = i;
4963 stub_reloc_offset[nrelocs++] = size;
4964 }
4965 size += 4;
4966 break;
4967
4968 case DATA_TYPE:
4969 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4970 stub_reloc_idx[nrelocs] = i;
4971 stub_reloc_offset[nrelocs++] = size;
4972 size += 4;
4973 break;
4974
4975 default:
4976 BFD_FAIL ();
4977 return FALSE;
4978 }
4979 }
4980
4981 if (just_allocated)
4982 stub_sec->size += size;
4983
4984 /* Stub size has already been computed in arm_size_one_stub. Check
4985 consistency. */
4986 BFD_ASSERT (size == stub_entry->stub_size);
4987
4988 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4989 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4990 sym_value |= 1;
4991
4992 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4993 to relocate in each stub. */
4994 removed_sg_veneer =
4995 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4996 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4997
4998 for (i = 0; i < nrelocs; i++)
4999 {
5000 Elf_Internal_Rela rel;
5001 bfd_boolean unresolved_reloc;
5002 char *error_message;
5003 bfd_vma points_to =
5004 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5005
5006 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5007 rel.r_info = ELF32_R_INFO (0,
5008 template_sequence[stub_reloc_idx[i]].r_type);
5009 rel.r_addend = 0;
5010
5011 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5012 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5013 template should refer back to the instruction after the original
5014 branch. We use target_section as Cortex-A8 erratum workaround stubs
5015 are only generated when both source and target are in the same
5016 section. */
5017 points_to = stub_entry->target_section->output_section->vma
5018 + stub_entry->target_section->output_offset
5019 + stub_entry->source_value;
5020
5021 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5022 (template_sequence[stub_reloc_idx[i]].r_type),
5023 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5024 points_to, info, stub_entry->target_section, "", STT_FUNC,
5025 stub_entry->branch_type,
5026 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5027 &error_message);
5028 }
5029
5030 return TRUE;
5031 #undef MAXRELOCS
5032 }
5033
5034 /* Calculate the template, template size and instruction size for a stub.
5035 Return value is the instruction size. */
5036
5037 static unsigned int
5038 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5039 const insn_sequence **stub_template,
5040 int *stub_template_size)
5041 {
5042 const insn_sequence *template_sequence = NULL;
5043 int template_size = 0, i;
5044 unsigned int size;
5045
5046 template_sequence = stub_definitions[stub_type].template_sequence;
5047 if (stub_template)
5048 *stub_template = template_sequence;
5049
5050 template_size = stub_definitions[stub_type].template_size;
5051 if (stub_template_size)
5052 *stub_template_size = template_size;
5053
5054 size = 0;
5055 for (i = 0; i < template_size; i++)
5056 {
5057 switch (template_sequence[i].type)
5058 {
5059 case THUMB16_TYPE:
5060 size += 2;
5061 break;
5062
5063 case ARM_TYPE:
5064 case THUMB32_TYPE:
5065 case DATA_TYPE:
5066 size += 4;
5067 break;
5068
5069 default:
5070 BFD_FAIL ();
5071 return 0;
5072 }
5073 }
5074
5075 return size;
5076 }
5077
5078 /* As above, but don't actually build the stub. Just bump offset so
5079 we know stub section sizes. */
5080
5081 static bfd_boolean
5082 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5083 void *in_arg ATTRIBUTE_UNUSED)
5084 {
5085 struct elf32_arm_stub_hash_entry *stub_entry;
5086 const insn_sequence *template_sequence;
5087 int template_size, size;
5088
5089 /* Massage our args to the form they really have. */
5090 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5091
5092 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5093 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5094
5095 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5096 &template_size);
5097
5098 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5099 if (stub_entry->stub_template_size)
5100 {
5101 stub_entry->stub_size = size;
5102 stub_entry->stub_template = template_sequence;
5103 stub_entry->stub_template_size = template_size;
5104 }
5105
5106 /* Already accounted for. */
5107 if (stub_entry->stub_offset != (bfd_vma) -1)
5108 return TRUE;
5109
5110 size = (size + 7) & ~7;
5111 stub_entry->stub_sec->size += size;
5112
5113 return TRUE;
5114 }
5115
5116 /* External entry points for sizing and building linker stubs. */
5117
5118 /* Set up various things so that we can make a list of input sections
5119 for each output section included in the link. Returns -1 on error,
5120 0 when no stubs will be needed, and 1 on success. */
5121
5122 int
5123 elf32_arm_setup_section_lists (bfd *output_bfd,
5124 struct bfd_link_info *info)
5125 {
5126 bfd *input_bfd;
5127 unsigned int bfd_count;
5128 unsigned int top_id, top_index;
5129 asection *section;
5130 asection **input_list, **list;
5131 bfd_size_type amt;
5132 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5133
5134 if (htab == NULL)
5135 return 0;
5136 if (! is_elf_hash_table (htab))
5137 return 0;
5138
5139 /* Count the number of input BFDs and find the top input section id. */
5140 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5141 input_bfd != NULL;
5142 input_bfd = input_bfd->link.next)
5143 {
5144 bfd_count += 1;
5145 for (section = input_bfd->sections;
5146 section != NULL;
5147 section = section->next)
5148 {
5149 if (top_id < section->id)
5150 top_id = section->id;
5151 }
5152 }
5153 htab->bfd_count = bfd_count;
5154
5155 amt = sizeof (struct map_stub) * (top_id + 1);
5156 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5157 if (htab->stub_group == NULL)
5158 return -1;
5159 htab->top_id = top_id;
5160
5161 /* We can't use output_bfd->section_count here to find the top output
5162 section index as some sections may have been removed, and
5163 _bfd_strip_section_from_output doesn't renumber the indices. */
5164 for (section = output_bfd->sections, top_index = 0;
5165 section != NULL;
5166 section = section->next)
5167 {
5168 if (top_index < section->index)
5169 top_index = section->index;
5170 }
5171
5172 htab->top_index = top_index;
5173 amt = sizeof (asection *) * (top_index + 1);
5174 input_list = (asection **) bfd_malloc (amt);
5175 htab->input_list = input_list;
5176 if (input_list == NULL)
5177 return -1;
5178
5179 /* For sections we aren't interested in, mark their entries with a
5180 value we can check later. */
5181 list = input_list + top_index;
5182 do
5183 *list = bfd_abs_section_ptr;
5184 while (list-- != input_list);
5185
5186 for (section = output_bfd->sections;
5187 section != NULL;
5188 section = section->next)
5189 {
5190 if ((section->flags & SEC_CODE) != 0)
5191 input_list[section->index] = NULL;
5192 }
5193
5194 return 1;
5195 }
5196
5197 /* The linker repeatedly calls this function for each input section,
5198 in the order that input sections are linked into output sections.
5199 Build lists of input sections to determine groupings between which
5200 we may insert linker stubs. */
5201
5202 void
5203 elf32_arm_next_input_section (struct bfd_link_info *info,
5204 asection *isec)
5205 {
5206 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5207
5208 if (htab == NULL)
5209 return;
5210
5211 if (isec->output_section->index <= htab->top_index)
5212 {
5213 asection **list = htab->input_list + isec->output_section->index;
5214
5215 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5216 {
5217 /* Steal the link_sec pointer for our list. */
5218 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5219 /* This happens to make the list in reverse order,
5220 which we reverse later. */
5221 PREV_SEC (isec) = *list;
5222 *list = isec;
5223 }
5224 }
5225 }
5226
5227 /* See whether we can group stub sections together. Grouping stub
5228 sections may result in fewer stubs. More importantly, we need to
5229 put all .init* and .fini* stubs at the end of the .init or
5230 .fini output sections respectively, because glibc splits the
5231 _init and _fini functions into multiple parts. Putting a stub in
5232 the middle of a function is not a good idea. */
5233
5234 static void
5235 group_sections (struct elf32_arm_link_hash_table *htab,
5236 bfd_size_type stub_group_size,
5237 bfd_boolean stubs_always_after_branch)
5238 {
5239 asection **list = htab->input_list;
5240
5241 do
5242 {
5243 asection *tail = *list;
5244 asection *head;
5245
5246 if (tail == bfd_abs_section_ptr)
5247 continue;
5248
5249 /* Reverse the list: we must avoid placing stubs at the
5250 beginning of the section because the beginning of the text
5251 section may be required for an interrupt vector in bare metal
5252 code. */
5253 #define NEXT_SEC PREV_SEC
5254 head = NULL;
5255 while (tail != NULL)
5256 {
5257 /* Pop from tail. */
5258 asection *item = tail;
5259 tail = PREV_SEC (item);
5260
5261 /* Push on head. */
5262 NEXT_SEC (item) = head;
5263 head = item;
5264 }
5265
5266 while (head != NULL)
5267 {
5268 asection *curr;
5269 asection *next;
5270 bfd_vma stub_group_start = head->output_offset;
5271 bfd_vma end_of_next;
5272
5273 curr = head;
5274 while (NEXT_SEC (curr) != NULL)
5275 {
5276 next = NEXT_SEC (curr);
5277 end_of_next = next->output_offset + next->size;
5278 if (end_of_next - stub_group_start >= stub_group_size)
5279 /* End of NEXT is too far from start, so stop. */
5280 break;
5281 /* Add NEXT to the group. */
5282 curr = next;
5283 }
5284
5285 /* OK, the size from the start to the start of CURR is less
5286 than stub_group_size and thus can be handled by one stub
5287 section. (Or the head section is itself larger than
5288 stub_group_size, in which case we may be toast.)
5289 We should really be keeping track of the total size of
5290 stubs added here, as stubs contribute to the final output
5291 section size. */
5292 do
5293 {
5294 next = NEXT_SEC (head);
5295 /* Set up this stub group. */
5296 htab->stub_group[head->id].link_sec = curr;
5297 }
5298 while (head != curr && (head = next) != NULL);
5299
5300 /* But wait, there's more! Input sections up to stub_group_size
5301 bytes after the stub section can be handled by it too. */
5302 if (!stubs_always_after_branch)
5303 {
5304 stub_group_start = curr->output_offset + curr->size;
5305
5306 while (next != NULL)
5307 {
5308 end_of_next = next->output_offset + next->size;
5309 if (end_of_next - stub_group_start >= stub_group_size)
5310 /* End of NEXT is too far from stubs, so stop. */
5311 break;
5312 /* Add NEXT to the stub group. */
5313 head = next;
5314 next = NEXT_SEC (head);
5315 htab->stub_group[head->id].link_sec = curr;
5316 }
5317 }
5318 head = next;
5319 }
5320 }
5321 while (list++ != htab->input_list + htab->top_index);
5322
5323 free (htab->input_list);
5324 #undef PREV_SEC
5325 #undef NEXT_SEC
5326 }
5327
5328 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5329 erratum fix. */
5330
5331 static int
5332 a8_reloc_compare (const void *a, const void *b)
5333 {
5334 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5335 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5336
5337 if (ra->from < rb->from)
5338 return -1;
5339 else if (ra->from > rb->from)
5340 return 1;
5341 else
5342 return 0;
5343 }
5344
5345 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5346 const char *, char **);
5347
5348 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5349 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5350 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5351 otherwise. */
5352
5353 static bfd_boolean
5354 cortex_a8_erratum_scan (bfd *input_bfd,
5355 struct bfd_link_info *info,
5356 struct a8_erratum_fix **a8_fixes_p,
5357 unsigned int *num_a8_fixes_p,
5358 unsigned int *a8_fix_table_size_p,
5359 struct a8_erratum_reloc *a8_relocs,
5360 unsigned int num_a8_relocs,
5361 unsigned prev_num_a8_fixes,
5362 bfd_boolean *stub_changed_p)
5363 {
5364 asection *section;
5365 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5366 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5367 unsigned int num_a8_fixes = *num_a8_fixes_p;
5368 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5369
5370 if (htab == NULL)
5371 return FALSE;
5372
5373 for (section = input_bfd->sections;
5374 section != NULL;
5375 section = section->next)
5376 {
5377 bfd_byte *contents = NULL;
5378 struct _arm_elf_section_data *sec_data;
5379 unsigned int span;
5380 bfd_vma base_vma;
5381
5382 if (elf_section_type (section) != SHT_PROGBITS
5383 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5384 || (section->flags & SEC_EXCLUDE) != 0
5385 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5386 || (section->output_section == bfd_abs_section_ptr))
5387 continue;
5388
5389 base_vma = section->output_section->vma + section->output_offset;
5390
5391 if (elf_section_data (section)->this_hdr.contents != NULL)
5392 contents = elf_section_data (section)->this_hdr.contents;
5393 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5394 return TRUE;
5395
5396 sec_data = elf32_arm_section_data (section);
5397
5398 for (span = 0; span < sec_data->mapcount; span++)
5399 {
5400 unsigned int span_start = sec_data->map[span].vma;
5401 unsigned int span_end = (span == sec_data->mapcount - 1)
5402 ? section->size : sec_data->map[span + 1].vma;
5403 unsigned int i;
5404 char span_type = sec_data->map[span].type;
5405 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5406
5407 if (span_type != 't')
5408 continue;
5409
5410 /* Span is entirely within a single 4KB region: skip scanning. */
5411 if (((base_vma + span_start) & ~0xfff)
5412 == ((base_vma + span_end) & ~0xfff))
5413 continue;
5414
5415 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5416
5417 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5418 * The branch target is in the same 4KB region as the
5419 first half of the branch.
5420 * The instruction before the branch is a 32-bit
5421 length non-branch instruction. */
5422 for (i = span_start; i < span_end;)
5423 {
5424 unsigned int insn = bfd_getl16 (&contents[i]);
5425 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5426 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5427
5428 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5429 insn_32bit = TRUE;
5430
5431 if (insn_32bit)
5432 {
5433 /* Load the rest of the insn (in manual-friendly order). */
5434 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5435
5436 /* Encoding T4: B<c>.W. */
5437 is_b = (insn & 0xf800d000) == 0xf0009000;
5438 /* Encoding T1: BL<c>.W. */
5439 is_bl = (insn & 0xf800d000) == 0xf000d000;
5440 /* Encoding T2: BLX<c>.W. */
5441 is_blx = (insn & 0xf800d000) == 0xf000c000;
5442 /* Encoding T3: B<c>.W (not permitted in IT block). */
5443 is_bcc = (insn & 0xf800d000) == 0xf0008000
5444 && (insn & 0x07f00000) != 0x03800000;
5445 }
5446
5447 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5448
5449 if (((base_vma + i) & 0xfff) == 0xffe
5450 && insn_32bit
5451 && is_32bit_branch
5452 && last_was_32bit
5453 && ! last_was_branch)
5454 {
5455 bfd_signed_vma offset = 0;
5456 bfd_boolean force_target_arm = FALSE;
5457 bfd_boolean force_target_thumb = FALSE;
5458 bfd_vma target;
5459 enum elf32_arm_stub_type stub_type = arm_stub_none;
5460 struct a8_erratum_reloc key, *found;
5461 bfd_boolean use_plt = FALSE;
5462
5463 key.from = base_vma + i;
5464 found = (struct a8_erratum_reloc *)
5465 bsearch (&key, a8_relocs, num_a8_relocs,
5466 sizeof (struct a8_erratum_reloc),
5467 &a8_reloc_compare);
5468
5469 if (found)
5470 {
5471 char *error_message = NULL;
5472 struct elf_link_hash_entry *entry;
5473
5474 /* We don't care about the error returned from this
5475 function, only if there is glue or not. */
5476 entry = find_thumb_glue (info, found->sym_name,
5477 &error_message);
5478
5479 if (entry)
5480 found->non_a8_stub = TRUE;
5481
5482 /* Keep a simpler condition, for the sake of clarity. */
5483 if (htab->root.splt != NULL && found->hash != NULL
5484 && found->hash->root.plt.offset != (bfd_vma) -1)
5485 use_plt = TRUE;
5486
5487 if (found->r_type == R_ARM_THM_CALL)
5488 {
5489 if (found->branch_type == ST_BRANCH_TO_ARM
5490 || use_plt)
5491 force_target_arm = TRUE;
5492 else
5493 force_target_thumb = TRUE;
5494 }
5495 }
5496
5497 /* Check if we have an offending branch instruction. */
5498
5499 if (found && found->non_a8_stub)
5500 /* We've already made a stub for this instruction, e.g.
5501 it's a long branch or a Thumb->ARM stub. Assume that
5502 stub will suffice to work around the A8 erratum (see
5503 setting of always_after_branch above). */
5504 ;
5505 else if (is_bcc)
5506 {
5507 offset = (insn & 0x7ff) << 1;
5508 offset |= (insn & 0x3f0000) >> 4;
5509 offset |= (insn & 0x2000) ? 0x40000 : 0;
5510 offset |= (insn & 0x800) ? 0x80000 : 0;
5511 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5512 if (offset & 0x100000)
5513 offset |= ~ ((bfd_signed_vma) 0xfffff);
5514 stub_type = arm_stub_a8_veneer_b_cond;
5515 }
5516 else if (is_b || is_bl || is_blx)
5517 {
5518 int s = (insn & 0x4000000) != 0;
5519 int j1 = (insn & 0x2000) != 0;
5520 int j2 = (insn & 0x800) != 0;
5521 int i1 = !(j1 ^ s);
5522 int i2 = !(j2 ^ s);
5523
5524 offset = (insn & 0x7ff) << 1;
5525 offset |= (insn & 0x3ff0000) >> 4;
5526 offset |= i2 << 22;
5527 offset |= i1 << 23;
5528 offset |= s << 24;
5529 if (offset & 0x1000000)
5530 offset |= ~ ((bfd_signed_vma) 0xffffff);
5531
5532 if (is_blx)
5533 offset &= ~ ((bfd_signed_vma) 3);
5534
5535 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5536 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5537 }
5538
5539 if (stub_type != arm_stub_none)
5540 {
5541 bfd_vma pc_for_insn = base_vma + i + 4;
5542
5543 /* The original instruction is a BL, but the target is
5544 an ARM instruction. If we were not making a stub,
5545 the BL would have been converted to a BLX. Use the
5546 BLX stub instead in that case. */
5547 if (htab->use_blx && force_target_arm
5548 && stub_type == arm_stub_a8_veneer_bl)
5549 {
5550 stub_type = arm_stub_a8_veneer_blx;
5551 is_blx = TRUE;
5552 is_bl = FALSE;
5553 }
5554 /* Conversely, if the original instruction was
5555 BLX but the target is Thumb mode, use the BL
5556 stub. */
5557 else if (force_target_thumb
5558 && stub_type == arm_stub_a8_veneer_blx)
5559 {
5560 stub_type = arm_stub_a8_veneer_bl;
5561 is_blx = FALSE;
5562 is_bl = TRUE;
5563 }
5564
5565 if (is_blx)
5566 pc_for_insn &= ~ ((bfd_vma) 3);
5567
5568 /* If we found a relocation, use the proper destination,
5569 not the offset in the (unrelocated) instruction.
5570 Note this is always done if we switched the stub type
5571 above. */
5572 if (found)
5573 offset =
5574 (bfd_signed_vma) (found->destination - pc_for_insn);
5575
5576 /* If the stub will use a Thumb-mode branch to a
5577 PLT target, redirect it to the preceding Thumb
5578 entry point. */
5579 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5580 offset -= PLT_THUMB_STUB_SIZE;
5581
5582 target = pc_for_insn + offset;
5583
5584 /* The BLX stub is ARM-mode code. Adjust the offset to
5585 take the different PC value (+8 instead of +4) into
5586 account. */
5587 if (stub_type == arm_stub_a8_veneer_blx)
5588 offset += 4;
5589
5590 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5591 {
5592 char *stub_name = NULL;
5593
5594 if (num_a8_fixes == a8_fix_table_size)
5595 {
5596 a8_fix_table_size *= 2;
5597 a8_fixes = (struct a8_erratum_fix *)
5598 bfd_realloc (a8_fixes,
5599 sizeof (struct a8_erratum_fix)
5600 * a8_fix_table_size);
5601 }
5602
5603 if (num_a8_fixes < prev_num_a8_fixes)
5604 {
5605 /* If we're doing a subsequent scan,
5606 check if we've found the same fix as
5607 before, and try and reuse the stub
5608 name. */
5609 stub_name = a8_fixes[num_a8_fixes].stub_name;
5610 if ((a8_fixes[num_a8_fixes].section != section)
5611 || (a8_fixes[num_a8_fixes].offset != i))
5612 {
5613 free (stub_name);
5614 stub_name = NULL;
5615 *stub_changed_p = TRUE;
5616 }
5617 }
5618
5619 if (!stub_name)
5620 {
5621 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5622 if (stub_name != NULL)
5623 sprintf (stub_name, "%x:%x", section->id, i);
5624 }
5625
5626 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5627 a8_fixes[num_a8_fixes].section = section;
5628 a8_fixes[num_a8_fixes].offset = i;
5629 a8_fixes[num_a8_fixes].target_offset =
5630 target - base_vma;
5631 a8_fixes[num_a8_fixes].orig_insn = insn;
5632 a8_fixes[num_a8_fixes].stub_name = stub_name;
5633 a8_fixes[num_a8_fixes].stub_type = stub_type;
5634 a8_fixes[num_a8_fixes].branch_type =
5635 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5636
5637 num_a8_fixes++;
5638 }
5639 }
5640 }
5641
5642 i += insn_32bit ? 4 : 2;
5643 last_was_32bit = insn_32bit;
5644 last_was_branch = is_32bit_branch;
5645 }
5646 }
5647
5648 if (elf_section_data (section)->this_hdr.contents == NULL)
5649 free (contents);
5650 }
5651
5652 *a8_fixes_p = a8_fixes;
5653 *num_a8_fixes_p = num_a8_fixes;
5654 *a8_fix_table_size_p = a8_fix_table_size;
5655
5656 return FALSE;
5657 }
5658
5659 /* Create or update a stub entry depending on whether the stub can already be
5660 found in HTAB. The stub is identified by:
5661 - its type STUB_TYPE
5662 - its source branch (note that several can share the same stub) whose
5663 section and relocation (if any) are given by SECTION and IRELA
5664 respectively
5665 - its target symbol whose input section, hash, name, value and branch type
5666 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5667 respectively
5668
5669 If found, the value of the stub's target symbol is updated from SYM_VALUE
5670 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5671 TRUE and the stub entry is initialized.
5672
5673 Returns the stub that was created or updated, or NULL if an error
5674 occurred. */
5675
5676 static struct elf32_arm_stub_hash_entry *
5677 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5678 enum elf32_arm_stub_type stub_type, asection *section,
5679 Elf_Internal_Rela *irela, asection *sym_sec,
5680 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5681 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5682 bfd_boolean *new_stub)
5683 {
5684 const asection *id_sec;
5685 char *stub_name;
5686 struct elf32_arm_stub_hash_entry *stub_entry;
5687 unsigned int r_type;
5688 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5689
5690 BFD_ASSERT (stub_type != arm_stub_none);
5691 *new_stub = FALSE;
5692
5693 if (sym_claimed)
5694 stub_name = sym_name;
5695 else
5696 {
5697 BFD_ASSERT (irela);
5698 BFD_ASSERT (section);
5699 BFD_ASSERT (section->id <= htab->top_id);
5700
5701 /* Support for grouping stub sections. */
5702 id_sec = htab->stub_group[section->id].link_sec;
5703
5704 /* Get the name of this stub. */
5705 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5706 stub_type);
5707 if (!stub_name)
5708 return NULL;
5709 }
5710
5711 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5712 FALSE);
5713 /* The proper stub has already been created, just update its value. */
5714 if (stub_entry != NULL)
5715 {
5716 if (!sym_claimed)
5717 free (stub_name);
5718 stub_entry->target_value = sym_value;
5719 return stub_entry;
5720 }
5721
5722 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5723 if (stub_entry == NULL)
5724 {
5725 if (!sym_claimed)
5726 free (stub_name);
5727 return NULL;
5728 }
5729
5730 stub_entry->target_value = sym_value;
5731 stub_entry->target_section = sym_sec;
5732 stub_entry->stub_type = stub_type;
5733 stub_entry->h = hash;
5734 stub_entry->branch_type = branch_type;
5735
5736 if (sym_claimed)
5737 stub_entry->output_name = sym_name;
5738 else
5739 {
5740 if (sym_name == NULL)
5741 sym_name = "unnamed";
5742 stub_entry->output_name = (char *)
5743 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5744 + strlen (sym_name));
5745 if (stub_entry->output_name == NULL)
5746 {
5747 free (stub_name);
5748 return NULL;
5749 }
5750
5751 /* For historical reasons, use the existing names for ARM-to-Thumb and
5752 Thumb-to-ARM stubs. */
5753 r_type = ELF32_R_TYPE (irela->r_info);
5754 if ((r_type == (unsigned int) R_ARM_THM_CALL
5755 || r_type == (unsigned int) R_ARM_THM_JUMP24
5756 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5757 && branch_type == ST_BRANCH_TO_ARM)
5758 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5759 else if ((r_type == (unsigned int) R_ARM_CALL
5760 || r_type == (unsigned int) R_ARM_JUMP24)
5761 && branch_type == ST_BRANCH_TO_THUMB)
5762 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5763 else
5764 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5765 }
5766
5767 *new_stub = TRUE;
5768 return stub_entry;
5769 }
5770
5771 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5772 gateway veneer to transition from non secure to secure state and create them
5773 accordingly.
5774
5775 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5776 defines the conditions that govern Secure Gateway veneer creation for a
5777 given symbol <SYM> as follows:
5778 - it has function type
5779 - it has non local binding
5780 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5781 same type, binding and value as <SYM> (called normal symbol).
5782 An entry function can handle secure state transition itself in which case
5783 its special symbol would have a different value from the normal symbol.
5784
5785 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5786 entry mapping while HTAB gives the name to hash entry mapping.
5787 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5788 created.
5789
5790 The return value gives whether a stub failed to be allocated. */
5791
5792 static bfd_boolean
5793 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5794 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5795 int *cmse_stub_created)
5796 {
5797 const struct elf_backend_data *bed;
5798 Elf_Internal_Shdr *symtab_hdr;
5799 unsigned i, j, sym_count, ext_start;
5800 Elf_Internal_Sym *cmse_sym, *local_syms;
5801 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5802 enum arm_st_branch_type branch_type;
5803 char *sym_name, *lsym_name;
5804 bfd_vma sym_value;
5805 asection *section;
5806 struct elf32_arm_stub_hash_entry *stub_entry;
5807 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5808
5809 bed = get_elf_backend_data (input_bfd);
5810 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5811 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5812 ext_start = symtab_hdr->sh_info;
5813 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5814 && out_attr[Tag_CPU_arch_profile].i == 'M');
5815
5816 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5817 if (local_syms == NULL)
5818 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5819 symtab_hdr->sh_info, 0, NULL, NULL,
5820 NULL);
5821 if (symtab_hdr->sh_info && local_syms == NULL)
5822 return FALSE;
5823
5824 /* Scan symbols. */
5825 for (i = 0; i < sym_count; i++)
5826 {
5827 cmse_invalid = FALSE;
5828
5829 if (i < ext_start)
5830 {
5831 cmse_sym = &local_syms[i];
5832 /* Not a special symbol. */
5833 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5834 continue;
5835 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5836 symtab_hdr->sh_link,
5837 cmse_sym->st_name);
5838 /* Special symbol with local binding. */
5839 cmse_invalid = TRUE;
5840 }
5841 else
5842 {
5843 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5844 sym_name = (char *) cmse_hash->root.root.root.string;
5845
5846 /* Not a special symbol. */
5847 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5848 continue;
5849
5850 /* Special symbol has incorrect binding or type. */
5851 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5852 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5853 || cmse_hash->root.type != STT_FUNC)
5854 cmse_invalid = TRUE;
5855 }
5856
5857 if (!is_v8m)
5858 {
5859 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5860 "ARMv8-M architecture or later"),
5861 input_bfd, sym_name);
5862 is_v8m = TRUE; /* Avoid multiple warning. */
5863 ret = FALSE;
5864 }
5865
5866 if (cmse_invalid)
5867 {
5868 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5869 " a global or weak function symbol"),
5870 input_bfd, sym_name);
5871 ret = FALSE;
5872 if (i < ext_start)
5873 continue;
5874 }
5875
5876 sym_name += strlen (CMSE_PREFIX);
5877 hash = (struct elf32_arm_link_hash_entry *)
5878 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5879
5880 /* No associated normal symbol or it is neither global nor weak. */
5881 if (!hash
5882 || (hash->root.root.type != bfd_link_hash_defined
5883 && hash->root.root.type != bfd_link_hash_defweak)
5884 || hash->root.type != STT_FUNC)
5885 {
5886 /* Initialize here to avoid warning about use of possibly
5887 uninitialized variable. */
5888 j = 0;
5889
5890 if (!hash)
5891 {
5892 /* Searching for a normal symbol with local binding. */
5893 for (; j < ext_start; j++)
5894 {
5895 lsym_name =
5896 bfd_elf_string_from_elf_section (input_bfd,
5897 symtab_hdr->sh_link,
5898 local_syms[j].st_name);
5899 if (!strcmp (sym_name, lsym_name))
5900 break;
5901 }
5902 }
5903
5904 if (hash || j < ext_start)
5905 {
5906 _bfd_error_handler
5907 (_("%pB: invalid standard symbol `%s'; it must be "
5908 "a global or weak function symbol"),
5909 input_bfd, sym_name);
5910 }
5911 else
5912 _bfd_error_handler
5913 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
5914 ret = FALSE;
5915 if (!hash)
5916 continue;
5917 }
5918
5919 sym_value = hash->root.root.u.def.value;
5920 section = hash->root.root.u.def.section;
5921
5922 if (cmse_hash->root.root.u.def.section != section)
5923 {
5924 _bfd_error_handler
5925 (_("%pB: `%s' and its special symbol are in different sections"),
5926 input_bfd, sym_name);
5927 ret = FALSE;
5928 }
5929 if (cmse_hash->root.root.u.def.value != sym_value)
5930 continue; /* Ignore: could be an entry function starting with SG. */
5931
5932 /* If this section is a link-once section that will be discarded, then
5933 don't create any stubs. */
5934 if (section->output_section == NULL)
5935 {
5936 _bfd_error_handler
5937 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
5938 continue;
5939 }
5940
5941 if (hash->root.size == 0)
5942 {
5943 _bfd_error_handler
5944 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
5945 ret = FALSE;
5946 }
5947
5948 if (!ret)
5949 continue;
5950 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5951 stub_entry
5952 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5953 NULL, NULL, section, hash, sym_name,
5954 sym_value, branch_type, &new_stub);
5955
5956 if (stub_entry == NULL)
5957 ret = FALSE;
5958 else
5959 {
5960 BFD_ASSERT (new_stub);
5961 (*cmse_stub_created)++;
5962 }
5963 }
5964
5965 if (!symtab_hdr->contents)
5966 free (local_syms);
5967 return ret;
5968 }
5969
5970 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5971 code entry function, ie can be called from non secure code without using a
5972 veneer. */
5973
5974 static bfd_boolean
5975 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5976 {
5977 bfd_byte contents[4];
5978 uint32_t first_insn;
5979 asection *section;
5980 file_ptr offset;
5981 bfd *abfd;
5982
5983 /* Defined symbol of function type. */
5984 if (hash->root.root.type != bfd_link_hash_defined
5985 && hash->root.root.type != bfd_link_hash_defweak)
5986 return FALSE;
5987 if (hash->root.type != STT_FUNC)
5988 return FALSE;
5989
5990 /* Read first instruction. */
5991 section = hash->root.root.u.def.section;
5992 abfd = section->owner;
5993 offset = hash->root.root.u.def.value - section->vma;
5994 if (!bfd_get_section_contents (abfd, section, contents, offset,
5995 sizeof (contents)))
5996 return FALSE;
5997
5998 first_insn = bfd_get_32 (abfd, contents);
5999
6000 /* Starts by SG instruction. */
6001 return first_insn == 0xe97fe97f;
6002 }
6003
6004 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6005 secure gateway veneers (ie. the veneers was not in the input import library)
6006 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6007
6008 static bfd_boolean
6009 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6010 {
6011 struct elf32_arm_stub_hash_entry *stub_entry;
6012 struct bfd_link_info *info;
6013
6014 /* Massage our args to the form they really have. */
6015 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6016 info = (struct bfd_link_info *) gen_info;
6017
6018 if (info->out_implib_bfd)
6019 return TRUE;
6020
6021 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6022 return TRUE;
6023
6024 if (stub_entry->stub_offset == (bfd_vma) -1)
6025 _bfd_error_handler (" %s", stub_entry->output_name);
6026
6027 return TRUE;
6028 }
6029
6030 /* Set offset of each secure gateway veneers so that its address remain
6031 identical to the one in the input import library referred by
6032 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6033 (present in input import library but absent from the executable being
6034 linked) or if new veneers appeared and there is no output import library
6035 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6036 number of secure gateway veneers found in the input import library.
6037
6038 The function returns whether an error occurred. If no error occurred,
6039 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6040 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6041 veneer observed set for new veneers to be layed out after. */
6042
6043 static bfd_boolean
6044 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6045 struct elf32_arm_link_hash_table *htab,
6046 int *cmse_stub_created)
6047 {
6048 long symsize;
6049 char *sym_name;
6050 flagword flags;
6051 long i, symcount;
6052 bfd *in_implib_bfd;
6053 asection *stub_out_sec;
6054 bfd_boolean ret = TRUE;
6055 Elf_Internal_Sym *intsym;
6056 const char *out_sec_name;
6057 bfd_size_type cmse_stub_size;
6058 asymbol **sympp = NULL, *sym;
6059 struct elf32_arm_link_hash_entry *hash;
6060 const insn_sequence *cmse_stub_template;
6061 struct elf32_arm_stub_hash_entry *stub_entry;
6062 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6063 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6064 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6065
6066 /* No input secure gateway import library. */
6067 if (!htab->in_implib_bfd)
6068 return TRUE;
6069
6070 in_implib_bfd = htab->in_implib_bfd;
6071 if (!htab->cmse_implib)
6072 {
6073 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6074 "Gateway import libraries"), in_implib_bfd);
6075 return FALSE;
6076 }
6077
6078 /* Get symbol table size. */
6079 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6080 if (symsize < 0)
6081 return FALSE;
6082
6083 /* Read in the input secure gateway import library's symbol table. */
6084 sympp = (asymbol **) xmalloc (symsize);
6085 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6086 if (symcount < 0)
6087 {
6088 ret = FALSE;
6089 goto free_sym_buf;
6090 }
6091
6092 htab->new_cmse_stub_offset = 0;
6093 cmse_stub_size =
6094 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6095 &cmse_stub_template,
6096 &cmse_stub_template_size);
6097 out_sec_name =
6098 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6099 stub_out_sec =
6100 bfd_get_section_by_name (htab->obfd, out_sec_name);
6101 if (stub_out_sec != NULL)
6102 cmse_stub_sec_vma = stub_out_sec->vma;
6103
6104 /* Set addresses of veneers mentionned in input secure gateway import
6105 library's symbol table. */
6106 for (i = 0; i < symcount; i++)
6107 {
6108 sym = sympp[i];
6109 flags = sym->flags;
6110 sym_name = (char *) bfd_asymbol_name (sym);
6111 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6112
6113 if (sym->section != bfd_abs_section_ptr
6114 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6115 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6116 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6117 != ST_BRANCH_TO_THUMB))
6118 {
6119 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6120 "symbol should be absolute, global and "
6121 "refer to Thumb functions"),
6122 in_implib_bfd, sym_name);
6123 ret = FALSE;
6124 continue;
6125 }
6126
6127 veneer_value = bfd_asymbol_value (sym);
6128 stub_offset = veneer_value - cmse_stub_sec_vma;
6129 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6130 FALSE, FALSE);
6131 hash = (struct elf32_arm_link_hash_entry *)
6132 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6133
6134 /* Stub entry should have been created by cmse_scan or the symbol be of
6135 a secure function callable from non secure code. */
6136 if (!stub_entry && !hash)
6137 {
6138 bfd_boolean new_stub;
6139
6140 _bfd_error_handler
6141 (_("entry function `%s' disappeared from secure code"), sym_name);
6142 hash = (struct elf32_arm_link_hash_entry *)
6143 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6144 stub_entry
6145 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6146 NULL, NULL, bfd_abs_section_ptr, hash,
6147 sym_name, veneer_value,
6148 ST_BRANCH_TO_THUMB, &new_stub);
6149 if (stub_entry == NULL)
6150 ret = FALSE;
6151 else
6152 {
6153 BFD_ASSERT (new_stub);
6154 new_cmse_stubs_created++;
6155 (*cmse_stub_created)++;
6156 }
6157 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6158 stub_entry->stub_offset = stub_offset;
6159 }
6160 /* Symbol found is not callable from non secure code. */
6161 else if (!stub_entry)
6162 {
6163 if (!cmse_entry_fct_p (hash))
6164 {
6165 _bfd_error_handler (_("`%s' refers to a non entry function"),
6166 sym_name);
6167 ret = FALSE;
6168 }
6169 continue;
6170 }
6171 else
6172 {
6173 /* Only stubs for SG veneers should have been created. */
6174 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6175
6176 /* Check visibility hasn't changed. */
6177 if (!!(flags & BSF_GLOBAL)
6178 != (hash->root.root.type == bfd_link_hash_defined))
6179 _bfd_error_handler
6180 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6181 sym_name);
6182
6183 stub_entry->stub_offset = stub_offset;
6184 }
6185
6186 /* Size should match that of a SG veneer. */
6187 if (intsym->st_size != cmse_stub_size)
6188 {
6189 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6190 in_implib_bfd, sym_name);
6191 ret = FALSE;
6192 }
6193
6194 /* Previous veneer address is before current SG veneer section. */
6195 if (veneer_value < cmse_stub_sec_vma)
6196 {
6197 /* Avoid offset underflow. */
6198 if (stub_entry)
6199 stub_entry->stub_offset = 0;
6200 stub_offset = 0;
6201 ret = FALSE;
6202 }
6203
6204 /* Complain if stub offset not a multiple of stub size. */
6205 if (stub_offset % cmse_stub_size)
6206 {
6207 _bfd_error_handler
6208 (_("offset of veneer for entry function `%s' not a multiple of "
6209 "its size"), sym_name);
6210 ret = FALSE;
6211 }
6212
6213 if (!ret)
6214 continue;
6215
6216 new_cmse_stubs_created--;
6217 if (veneer_value < cmse_stub_array_start)
6218 cmse_stub_array_start = veneer_value;
6219 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6220 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6221 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6222 }
6223
6224 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6225 {
6226 BFD_ASSERT (new_cmse_stubs_created > 0);
6227 _bfd_error_handler
6228 (_("new entry function(s) introduced but no output import library "
6229 "specified:"));
6230 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6231 }
6232
6233 if (cmse_stub_array_start != cmse_stub_sec_vma)
6234 {
6235 _bfd_error_handler
6236 (_("start address of `%s' is different from previous link"),
6237 out_sec_name);
6238 ret = FALSE;
6239 }
6240
6241 free_sym_buf:
6242 free (sympp);
6243 return ret;
6244 }
6245
6246 /* Determine and set the size of the stub section for a final link.
6247
6248 The basic idea here is to examine all the relocations looking for
6249 PC-relative calls to a target that is unreachable with a "bl"
6250 instruction. */
6251
6252 bfd_boolean
6253 elf32_arm_size_stubs (bfd *output_bfd,
6254 bfd *stub_bfd,
6255 struct bfd_link_info *info,
6256 bfd_signed_vma group_size,
6257 asection * (*add_stub_section) (const char *, asection *,
6258 asection *,
6259 unsigned int),
6260 void (*layout_sections_again) (void))
6261 {
6262 bfd_boolean ret = TRUE;
6263 obj_attribute *out_attr;
6264 int cmse_stub_created = 0;
6265 bfd_size_type stub_group_size;
6266 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6267 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6268 struct a8_erratum_fix *a8_fixes = NULL;
6269 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6270 struct a8_erratum_reloc *a8_relocs = NULL;
6271 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6272
6273 if (htab == NULL)
6274 return FALSE;
6275
6276 if (htab->fix_cortex_a8)
6277 {
6278 a8_fixes = (struct a8_erratum_fix *)
6279 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6280 a8_relocs = (struct a8_erratum_reloc *)
6281 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6282 }
6283
6284 /* Propagate mach to stub bfd, because it may not have been
6285 finalized when we created stub_bfd. */
6286 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6287 bfd_get_mach (output_bfd));
6288
6289 /* Stash our params away. */
6290 htab->stub_bfd = stub_bfd;
6291 htab->add_stub_section = add_stub_section;
6292 htab->layout_sections_again = layout_sections_again;
6293 stubs_always_after_branch = group_size < 0;
6294
6295 out_attr = elf_known_obj_attributes_proc (output_bfd);
6296 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6297
6298 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6299 as the first half of a 32-bit branch straddling two 4K pages. This is a
6300 crude way of enforcing that. */
6301 if (htab->fix_cortex_a8)
6302 stubs_always_after_branch = 1;
6303
6304 if (group_size < 0)
6305 stub_group_size = -group_size;
6306 else
6307 stub_group_size = group_size;
6308
6309 if (stub_group_size == 1)
6310 {
6311 /* Default values. */
6312 /* Thumb branch range is +-4MB has to be used as the default
6313 maximum size (a given section can contain both ARM and Thumb
6314 code, so the worst case has to be taken into account).
6315
6316 This value is 24K less than that, which allows for 2025
6317 12-byte stubs. If we exceed that, then we will fail to link.
6318 The user will have to relink with an explicit group size
6319 option. */
6320 stub_group_size = 4170000;
6321 }
6322
6323 group_sections (htab, stub_group_size, stubs_always_after_branch);
6324
6325 /* If we're applying the cortex A8 fix, we need to determine the
6326 program header size now, because we cannot change it later --
6327 that could alter section placements. Notice the A8 erratum fix
6328 ends up requiring the section addresses to remain unchanged
6329 modulo the page size. That's something we cannot represent
6330 inside BFD, and we don't want to force the section alignment to
6331 be the page size. */
6332 if (htab->fix_cortex_a8)
6333 (*htab->layout_sections_again) ();
6334
6335 while (1)
6336 {
6337 bfd *input_bfd;
6338 unsigned int bfd_indx;
6339 asection *stub_sec;
6340 enum elf32_arm_stub_type stub_type;
6341 bfd_boolean stub_changed = FALSE;
6342 unsigned prev_num_a8_fixes = num_a8_fixes;
6343
6344 num_a8_fixes = 0;
6345 for (input_bfd = info->input_bfds, bfd_indx = 0;
6346 input_bfd != NULL;
6347 input_bfd = input_bfd->link.next, bfd_indx++)
6348 {
6349 Elf_Internal_Shdr *symtab_hdr;
6350 asection *section;
6351 Elf_Internal_Sym *local_syms = NULL;
6352
6353 if (!is_arm_elf (input_bfd))
6354 continue;
6355
6356 num_a8_relocs = 0;
6357
6358 /* We'll need the symbol table in a second. */
6359 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6360 if (symtab_hdr->sh_info == 0)
6361 continue;
6362
6363 /* Limit scan of symbols to object file whose profile is
6364 Microcontroller to not hinder performance in the general case. */
6365 if (m_profile && first_veneer_scan)
6366 {
6367 struct elf_link_hash_entry **sym_hashes;
6368
6369 sym_hashes = elf_sym_hashes (input_bfd);
6370 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6371 &cmse_stub_created))
6372 goto error_ret_free_local;
6373
6374 if (cmse_stub_created != 0)
6375 stub_changed = TRUE;
6376 }
6377
6378 /* Walk over each section attached to the input bfd. */
6379 for (section = input_bfd->sections;
6380 section != NULL;
6381 section = section->next)
6382 {
6383 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6384
6385 /* If there aren't any relocs, then there's nothing more
6386 to do. */
6387 if ((section->flags & SEC_RELOC) == 0
6388 || section->reloc_count == 0
6389 || (section->flags & SEC_CODE) == 0)
6390 continue;
6391
6392 /* If this section is a link-once section that will be
6393 discarded, then don't create any stubs. */
6394 if (section->output_section == NULL
6395 || section->output_section->owner != output_bfd)
6396 continue;
6397
6398 /* Get the relocs. */
6399 internal_relocs
6400 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6401 NULL, info->keep_memory);
6402 if (internal_relocs == NULL)
6403 goto error_ret_free_local;
6404
6405 /* Now examine each relocation. */
6406 irela = internal_relocs;
6407 irelaend = irela + section->reloc_count;
6408 for (; irela < irelaend; irela++)
6409 {
6410 unsigned int r_type, r_indx;
6411 asection *sym_sec;
6412 bfd_vma sym_value;
6413 bfd_vma destination;
6414 struct elf32_arm_link_hash_entry *hash;
6415 const char *sym_name;
6416 unsigned char st_type;
6417 enum arm_st_branch_type branch_type;
6418 bfd_boolean created_stub = FALSE;
6419
6420 r_type = ELF32_R_TYPE (irela->r_info);
6421 r_indx = ELF32_R_SYM (irela->r_info);
6422
6423 if (r_type >= (unsigned int) R_ARM_max)
6424 {
6425 bfd_set_error (bfd_error_bad_value);
6426 error_ret_free_internal:
6427 if (elf_section_data (section)->relocs == NULL)
6428 free (internal_relocs);
6429 /* Fall through. */
6430 error_ret_free_local:
6431 if (local_syms != NULL
6432 && (symtab_hdr->contents
6433 != (unsigned char *) local_syms))
6434 free (local_syms);
6435 return FALSE;
6436 }
6437
6438 hash = NULL;
6439 if (r_indx >= symtab_hdr->sh_info)
6440 hash = elf32_arm_hash_entry
6441 (elf_sym_hashes (input_bfd)
6442 [r_indx - symtab_hdr->sh_info]);
6443
6444 /* Only look for stubs on branch instructions, or
6445 non-relaxed TLSCALL */
6446 if ((r_type != (unsigned int) R_ARM_CALL)
6447 && (r_type != (unsigned int) R_ARM_THM_CALL)
6448 && (r_type != (unsigned int) R_ARM_JUMP24)
6449 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6450 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6451 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6452 && (r_type != (unsigned int) R_ARM_PLT32)
6453 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6454 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6455 && r_type == elf32_arm_tls_transition
6456 (info, r_type, &hash->root)
6457 && ((hash ? hash->tls_type
6458 : (elf32_arm_local_got_tls_type
6459 (input_bfd)[r_indx]))
6460 & GOT_TLS_GDESC) != 0))
6461 continue;
6462
6463 /* Now determine the call target, its name, value,
6464 section. */
6465 sym_sec = NULL;
6466 sym_value = 0;
6467 destination = 0;
6468 sym_name = NULL;
6469
6470 if (r_type == (unsigned int) R_ARM_TLS_CALL
6471 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6472 {
6473 /* A non-relaxed TLS call. The target is the
6474 plt-resident trampoline and nothing to do
6475 with the symbol. */
6476 BFD_ASSERT (htab->tls_trampoline > 0);
6477 sym_sec = htab->root.splt;
6478 sym_value = htab->tls_trampoline;
6479 hash = 0;
6480 st_type = STT_FUNC;
6481 branch_type = ST_BRANCH_TO_ARM;
6482 }
6483 else if (!hash)
6484 {
6485 /* It's a local symbol. */
6486 Elf_Internal_Sym *sym;
6487
6488 if (local_syms == NULL)
6489 {
6490 local_syms
6491 = (Elf_Internal_Sym *) symtab_hdr->contents;
6492 if (local_syms == NULL)
6493 local_syms
6494 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6495 symtab_hdr->sh_info, 0,
6496 NULL, NULL, NULL);
6497 if (local_syms == NULL)
6498 goto error_ret_free_internal;
6499 }
6500
6501 sym = local_syms + r_indx;
6502 if (sym->st_shndx == SHN_UNDEF)
6503 sym_sec = bfd_und_section_ptr;
6504 else if (sym->st_shndx == SHN_ABS)
6505 sym_sec = bfd_abs_section_ptr;
6506 else if (sym->st_shndx == SHN_COMMON)
6507 sym_sec = bfd_com_section_ptr;
6508 else
6509 sym_sec =
6510 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6511
6512 if (!sym_sec)
6513 /* This is an undefined symbol. It can never
6514 be resolved. */
6515 continue;
6516
6517 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6518 sym_value = sym->st_value;
6519 destination = (sym_value + irela->r_addend
6520 + sym_sec->output_offset
6521 + sym_sec->output_section->vma);
6522 st_type = ELF_ST_TYPE (sym->st_info);
6523 branch_type =
6524 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6525 sym_name
6526 = bfd_elf_string_from_elf_section (input_bfd,
6527 symtab_hdr->sh_link,
6528 sym->st_name);
6529 }
6530 else
6531 {
6532 /* It's an external symbol. */
6533 while (hash->root.root.type == bfd_link_hash_indirect
6534 || hash->root.root.type == bfd_link_hash_warning)
6535 hash = ((struct elf32_arm_link_hash_entry *)
6536 hash->root.root.u.i.link);
6537
6538 if (hash->root.root.type == bfd_link_hash_defined
6539 || hash->root.root.type == bfd_link_hash_defweak)
6540 {
6541 sym_sec = hash->root.root.u.def.section;
6542 sym_value = hash->root.root.u.def.value;
6543
6544 struct elf32_arm_link_hash_table *globals =
6545 elf32_arm_hash_table (info);
6546
6547 /* For a destination in a shared library,
6548 use the PLT stub as target address to
6549 decide whether a branch stub is
6550 needed. */
6551 if (globals != NULL
6552 && globals->root.splt != NULL
6553 && hash != NULL
6554 && hash->root.plt.offset != (bfd_vma) -1)
6555 {
6556 sym_sec = globals->root.splt;
6557 sym_value = hash->root.plt.offset;
6558 if (sym_sec->output_section != NULL)
6559 destination = (sym_value
6560 + sym_sec->output_offset
6561 + sym_sec->output_section->vma);
6562 }
6563 else if (sym_sec->output_section != NULL)
6564 destination = (sym_value + irela->r_addend
6565 + sym_sec->output_offset
6566 + sym_sec->output_section->vma);
6567 }
6568 else if ((hash->root.root.type == bfd_link_hash_undefined)
6569 || (hash->root.root.type == bfd_link_hash_undefweak))
6570 {
6571 /* For a shared library, use the PLT stub as
6572 target address to decide whether a long
6573 branch stub is needed.
6574 For absolute code, they cannot be handled. */
6575 struct elf32_arm_link_hash_table *globals =
6576 elf32_arm_hash_table (info);
6577
6578 if (globals != NULL
6579 && globals->root.splt != NULL
6580 && hash != NULL
6581 && hash->root.plt.offset != (bfd_vma) -1)
6582 {
6583 sym_sec = globals->root.splt;
6584 sym_value = hash->root.plt.offset;
6585 if (sym_sec->output_section != NULL)
6586 destination = (sym_value
6587 + sym_sec->output_offset
6588 + sym_sec->output_section->vma);
6589 }
6590 else
6591 continue;
6592 }
6593 else
6594 {
6595 bfd_set_error (bfd_error_bad_value);
6596 goto error_ret_free_internal;
6597 }
6598 st_type = hash->root.type;
6599 branch_type =
6600 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6601 sym_name = hash->root.root.root.string;
6602 }
6603
6604 do
6605 {
6606 bfd_boolean new_stub;
6607 struct elf32_arm_stub_hash_entry *stub_entry;
6608
6609 /* Determine what (if any) linker stub is needed. */
6610 stub_type = arm_type_of_stub (info, section, irela,
6611 st_type, &branch_type,
6612 hash, destination, sym_sec,
6613 input_bfd, sym_name);
6614 if (stub_type == arm_stub_none)
6615 break;
6616
6617 /* We've either created a stub for this reloc already,
6618 or we are about to. */
6619 stub_entry =
6620 elf32_arm_create_stub (htab, stub_type, section, irela,
6621 sym_sec, hash,
6622 (char *) sym_name, sym_value,
6623 branch_type, &new_stub);
6624
6625 created_stub = stub_entry != NULL;
6626 if (!created_stub)
6627 goto error_ret_free_internal;
6628 else if (!new_stub)
6629 break;
6630 else
6631 stub_changed = TRUE;
6632 }
6633 while (0);
6634
6635 /* Look for relocations which might trigger Cortex-A8
6636 erratum. */
6637 if (htab->fix_cortex_a8
6638 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6639 || r_type == (unsigned int) R_ARM_THM_JUMP19
6640 || r_type == (unsigned int) R_ARM_THM_CALL
6641 || r_type == (unsigned int) R_ARM_THM_XPC22))
6642 {
6643 bfd_vma from = section->output_section->vma
6644 + section->output_offset
6645 + irela->r_offset;
6646
6647 if ((from & 0xfff) == 0xffe)
6648 {
6649 /* Found a candidate. Note we haven't checked the
6650 destination is within 4K here: if we do so (and
6651 don't create an entry in a8_relocs) we can't tell
6652 that a branch should have been relocated when
6653 scanning later. */
6654 if (num_a8_relocs == a8_reloc_table_size)
6655 {
6656 a8_reloc_table_size *= 2;
6657 a8_relocs = (struct a8_erratum_reloc *)
6658 bfd_realloc (a8_relocs,
6659 sizeof (struct a8_erratum_reloc)
6660 * a8_reloc_table_size);
6661 }
6662
6663 a8_relocs[num_a8_relocs].from = from;
6664 a8_relocs[num_a8_relocs].destination = destination;
6665 a8_relocs[num_a8_relocs].r_type = r_type;
6666 a8_relocs[num_a8_relocs].branch_type = branch_type;
6667 a8_relocs[num_a8_relocs].sym_name = sym_name;
6668 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6669 a8_relocs[num_a8_relocs].hash = hash;
6670
6671 num_a8_relocs++;
6672 }
6673 }
6674 }
6675
6676 /* We're done with the internal relocs, free them. */
6677 if (elf_section_data (section)->relocs == NULL)
6678 free (internal_relocs);
6679 }
6680
6681 if (htab->fix_cortex_a8)
6682 {
6683 /* Sort relocs which might apply to Cortex-A8 erratum. */
6684 qsort (a8_relocs, num_a8_relocs,
6685 sizeof (struct a8_erratum_reloc),
6686 &a8_reloc_compare);
6687
6688 /* Scan for branches which might trigger Cortex-A8 erratum. */
6689 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6690 &num_a8_fixes, &a8_fix_table_size,
6691 a8_relocs, num_a8_relocs,
6692 prev_num_a8_fixes, &stub_changed)
6693 != 0)
6694 goto error_ret_free_local;
6695 }
6696
6697 if (local_syms != NULL
6698 && symtab_hdr->contents != (unsigned char *) local_syms)
6699 {
6700 if (!info->keep_memory)
6701 free (local_syms);
6702 else
6703 symtab_hdr->contents = (unsigned char *) local_syms;
6704 }
6705 }
6706
6707 if (first_veneer_scan
6708 && !set_cmse_veneer_addr_from_implib (info, htab,
6709 &cmse_stub_created))
6710 ret = FALSE;
6711
6712 if (prev_num_a8_fixes != num_a8_fixes)
6713 stub_changed = TRUE;
6714
6715 if (!stub_changed)
6716 break;
6717
6718 /* OK, we've added some stubs. Find out the new size of the
6719 stub sections. */
6720 for (stub_sec = htab->stub_bfd->sections;
6721 stub_sec != NULL;
6722 stub_sec = stub_sec->next)
6723 {
6724 /* Ignore non-stub sections. */
6725 if (!strstr (stub_sec->name, STUB_SUFFIX))
6726 continue;
6727
6728 stub_sec->size = 0;
6729 }
6730
6731 /* Add new SG veneers after those already in the input import
6732 library. */
6733 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6734 stub_type++)
6735 {
6736 bfd_vma *start_offset_p;
6737 asection **stub_sec_p;
6738
6739 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6740 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6741 if (start_offset_p == NULL)
6742 continue;
6743
6744 BFD_ASSERT (stub_sec_p != NULL);
6745 if (*stub_sec_p != NULL)
6746 (*stub_sec_p)->size = *start_offset_p;
6747 }
6748
6749 /* Compute stub section size, considering padding. */
6750 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6751 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6752 stub_type++)
6753 {
6754 int size, padding;
6755 asection **stub_sec_p;
6756
6757 padding = arm_dedicated_stub_section_padding (stub_type);
6758 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6759 /* Skip if no stub input section or no stub section padding
6760 required. */
6761 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6762 continue;
6763 /* Stub section padding required but no dedicated section. */
6764 BFD_ASSERT (stub_sec_p);
6765
6766 size = (*stub_sec_p)->size;
6767 size = (size + padding - 1) & ~(padding - 1);
6768 (*stub_sec_p)->size = size;
6769 }
6770
6771 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6772 if (htab->fix_cortex_a8)
6773 for (i = 0; i < num_a8_fixes; i++)
6774 {
6775 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6776 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6777
6778 if (stub_sec == NULL)
6779 return FALSE;
6780
6781 stub_sec->size
6782 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6783 NULL);
6784 }
6785
6786
6787 /* Ask the linker to do its stuff. */
6788 (*htab->layout_sections_again) ();
6789 first_veneer_scan = FALSE;
6790 }
6791
6792 /* Add stubs for Cortex-A8 erratum fixes now. */
6793 if (htab->fix_cortex_a8)
6794 {
6795 for (i = 0; i < num_a8_fixes; i++)
6796 {
6797 struct elf32_arm_stub_hash_entry *stub_entry;
6798 char *stub_name = a8_fixes[i].stub_name;
6799 asection *section = a8_fixes[i].section;
6800 unsigned int section_id = a8_fixes[i].section->id;
6801 asection *link_sec = htab->stub_group[section_id].link_sec;
6802 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6803 const insn_sequence *template_sequence;
6804 int template_size, size = 0;
6805
6806 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6807 TRUE, FALSE);
6808 if (stub_entry == NULL)
6809 {
6810 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6811 section->owner, stub_name);
6812 return FALSE;
6813 }
6814
6815 stub_entry->stub_sec = stub_sec;
6816 stub_entry->stub_offset = (bfd_vma) -1;
6817 stub_entry->id_sec = link_sec;
6818 stub_entry->stub_type = a8_fixes[i].stub_type;
6819 stub_entry->source_value = a8_fixes[i].offset;
6820 stub_entry->target_section = a8_fixes[i].section;
6821 stub_entry->target_value = a8_fixes[i].target_offset;
6822 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6823 stub_entry->branch_type = a8_fixes[i].branch_type;
6824
6825 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6826 &template_sequence,
6827 &template_size);
6828
6829 stub_entry->stub_size = size;
6830 stub_entry->stub_template = template_sequence;
6831 stub_entry->stub_template_size = template_size;
6832 }
6833
6834 /* Stash the Cortex-A8 erratum fix array for use later in
6835 elf32_arm_write_section(). */
6836 htab->a8_erratum_fixes = a8_fixes;
6837 htab->num_a8_erratum_fixes = num_a8_fixes;
6838 }
6839 else
6840 {
6841 htab->a8_erratum_fixes = NULL;
6842 htab->num_a8_erratum_fixes = 0;
6843 }
6844 return ret;
6845 }
6846
6847 /* Build all the stubs associated with the current output file. The
6848 stubs are kept in a hash table attached to the main linker hash
6849 table. We also set up the .plt entries for statically linked PIC
6850 functions here. This function is called via arm_elf_finish in the
6851 linker. */
6852
6853 bfd_boolean
6854 elf32_arm_build_stubs (struct bfd_link_info *info)
6855 {
6856 asection *stub_sec;
6857 struct bfd_hash_table *table;
6858 enum elf32_arm_stub_type stub_type;
6859 struct elf32_arm_link_hash_table *htab;
6860
6861 htab = elf32_arm_hash_table (info);
6862 if (htab == NULL)
6863 return FALSE;
6864
6865 for (stub_sec = htab->stub_bfd->sections;
6866 stub_sec != NULL;
6867 stub_sec = stub_sec->next)
6868 {
6869 bfd_size_type size;
6870
6871 /* Ignore non-stub sections. */
6872 if (!strstr (stub_sec->name, STUB_SUFFIX))
6873 continue;
6874
6875 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6876 must at least be done for stub section requiring padding and for SG
6877 veneers to ensure that a non secure code branching to a removed SG
6878 veneer causes an error. */
6879 size = stub_sec->size;
6880 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6881 if (stub_sec->contents == NULL && size != 0)
6882 return FALSE;
6883
6884 stub_sec->size = 0;
6885 }
6886
6887 /* Add new SG veneers after those already in the input import library. */
6888 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6889 {
6890 bfd_vma *start_offset_p;
6891 asection **stub_sec_p;
6892
6893 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6894 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6895 if (start_offset_p == NULL)
6896 continue;
6897
6898 BFD_ASSERT (stub_sec_p != NULL);
6899 if (*stub_sec_p != NULL)
6900 (*stub_sec_p)->size = *start_offset_p;
6901 }
6902
6903 /* Build the stubs as directed by the stub hash table. */
6904 table = &htab->stub_hash_table;
6905 bfd_hash_traverse (table, arm_build_one_stub, info);
6906 if (htab->fix_cortex_a8)
6907 {
6908 /* Place the cortex a8 stubs last. */
6909 htab->fix_cortex_a8 = -1;
6910 bfd_hash_traverse (table, arm_build_one_stub, info);
6911 }
6912
6913 return TRUE;
6914 }
6915
6916 /* Locate the Thumb encoded calling stub for NAME. */
6917
6918 static struct elf_link_hash_entry *
6919 find_thumb_glue (struct bfd_link_info *link_info,
6920 const char *name,
6921 char **error_message)
6922 {
6923 char *tmp_name;
6924 struct elf_link_hash_entry *hash;
6925 struct elf32_arm_link_hash_table *hash_table;
6926
6927 /* We need a pointer to the armelf specific hash table. */
6928 hash_table = elf32_arm_hash_table (link_info);
6929 if (hash_table == NULL)
6930 return NULL;
6931
6932 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6933 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6934
6935 BFD_ASSERT (tmp_name);
6936
6937 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6938
6939 hash = elf_link_hash_lookup
6940 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6941
6942 if (hash == NULL
6943 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
6944 "Thumb", tmp_name, name) == -1)
6945 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6946
6947 free (tmp_name);
6948
6949 return hash;
6950 }
6951
6952 /* Locate the ARM encoded calling stub for NAME. */
6953
6954 static struct elf_link_hash_entry *
6955 find_arm_glue (struct bfd_link_info *link_info,
6956 const char *name,
6957 char **error_message)
6958 {
6959 char *tmp_name;
6960 struct elf_link_hash_entry *myh;
6961 struct elf32_arm_link_hash_table *hash_table;
6962
6963 /* We need a pointer to the elfarm specific hash table. */
6964 hash_table = elf32_arm_hash_table (link_info);
6965 if (hash_table == NULL)
6966 return NULL;
6967
6968 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6969 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6970
6971 BFD_ASSERT (tmp_name);
6972
6973 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6974
6975 myh = elf_link_hash_lookup
6976 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6977
6978 if (myh == NULL
6979 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
6980 "ARM", tmp_name, name) == -1)
6981 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6982
6983 free (tmp_name);
6984
6985 return myh;
6986 }
6987
6988 /* ARM->Thumb glue (static images):
6989
6990 .arm
6991 __func_from_arm:
6992 ldr r12, __func_addr
6993 bx r12
6994 __func_addr:
6995 .word func @ behave as if you saw a ARM_32 reloc.
6996
6997 (v5t static images)
6998 .arm
6999 __func_from_arm:
7000 ldr pc, __func_addr
7001 __func_addr:
7002 .word func @ behave as if you saw a ARM_32 reloc.
7003
7004 (relocatable images)
7005 .arm
7006 __func_from_arm:
7007 ldr r12, __func_offset
7008 add r12, r12, pc
7009 bx r12
7010 __func_offset:
7011 .word func - . */
7012
7013 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7014 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7015 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7016 static const insn32 a2t3_func_addr_insn = 0x00000001;
7017
7018 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7019 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7020 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7021
7022 #define ARM2THUMB_PIC_GLUE_SIZE 16
7023 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7024 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7025 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7026
7027 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7028
7029 .thumb .thumb
7030 .align 2 .align 2
7031 __func_from_thumb: __func_from_thumb:
7032 bx pc push {r6, lr}
7033 nop ldr r6, __func_addr
7034 .arm mov lr, pc
7035 b func bx r6
7036 .arm
7037 ;; back_to_thumb
7038 ldmia r13! {r6, lr}
7039 bx lr
7040 __func_addr:
7041 .word func */
7042
7043 #define THUMB2ARM_GLUE_SIZE 8
7044 static const insn16 t2a1_bx_pc_insn = 0x4778;
7045 static const insn16 t2a2_noop_insn = 0x46c0;
7046 static const insn32 t2a3_b_insn = 0xea000000;
7047
7048 #define VFP11_ERRATUM_VENEER_SIZE 8
7049 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7050 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7051
7052 #define ARM_BX_VENEER_SIZE 12
7053 static const insn32 armbx1_tst_insn = 0xe3100001;
7054 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7055 static const insn32 armbx3_bx_insn = 0xe12fff10;
7056
7057 #ifndef ELFARM_NABI_C_INCLUDED
7058 static void
7059 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7060 {
7061 asection * s;
7062 bfd_byte * contents;
7063
7064 if (size == 0)
7065 {
7066 /* Do not include empty glue sections in the output. */
7067 if (abfd != NULL)
7068 {
7069 s = bfd_get_linker_section (abfd, name);
7070 if (s != NULL)
7071 s->flags |= SEC_EXCLUDE;
7072 }
7073 return;
7074 }
7075
7076 BFD_ASSERT (abfd != NULL);
7077
7078 s = bfd_get_linker_section (abfd, name);
7079 BFD_ASSERT (s != NULL);
7080
7081 contents = (bfd_byte *) bfd_alloc (abfd, size);
7082
7083 BFD_ASSERT (s->size == size);
7084 s->contents = contents;
7085 }
7086
7087 bfd_boolean
7088 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7089 {
7090 struct elf32_arm_link_hash_table * globals;
7091
7092 globals = elf32_arm_hash_table (info);
7093 BFD_ASSERT (globals != NULL);
7094
7095 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7096 globals->arm_glue_size,
7097 ARM2THUMB_GLUE_SECTION_NAME);
7098
7099 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7100 globals->thumb_glue_size,
7101 THUMB2ARM_GLUE_SECTION_NAME);
7102
7103 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7104 globals->vfp11_erratum_glue_size,
7105 VFP11_ERRATUM_VENEER_SECTION_NAME);
7106
7107 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7108 globals->stm32l4xx_erratum_glue_size,
7109 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7110
7111 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7112 globals->bx_glue_size,
7113 ARM_BX_GLUE_SECTION_NAME);
7114
7115 return TRUE;
7116 }
7117
7118 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7119 returns the symbol identifying the stub. */
7120
7121 static struct elf_link_hash_entry *
7122 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7123 struct elf_link_hash_entry * h)
7124 {
7125 const char * name = h->root.root.string;
7126 asection * s;
7127 char * tmp_name;
7128 struct elf_link_hash_entry * myh;
7129 struct bfd_link_hash_entry * bh;
7130 struct elf32_arm_link_hash_table * globals;
7131 bfd_vma val;
7132 bfd_size_type size;
7133
7134 globals = elf32_arm_hash_table (link_info);
7135 BFD_ASSERT (globals != NULL);
7136 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7137
7138 s = bfd_get_linker_section
7139 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7140
7141 BFD_ASSERT (s != NULL);
7142
7143 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7144 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7145
7146 BFD_ASSERT (tmp_name);
7147
7148 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7149
7150 myh = elf_link_hash_lookup
7151 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7152
7153 if (myh != NULL)
7154 {
7155 /* We've already seen this guy. */
7156 free (tmp_name);
7157 return myh;
7158 }
7159
7160 /* The only trick here is using hash_table->arm_glue_size as the value.
7161 Even though the section isn't allocated yet, this is where we will be
7162 putting it. The +1 on the value marks that the stub has not been
7163 output yet - not that it is a Thumb function. */
7164 bh = NULL;
7165 val = globals->arm_glue_size + 1;
7166 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7167 tmp_name, BSF_GLOBAL, s, val,
7168 NULL, TRUE, FALSE, &bh);
7169
7170 myh = (struct elf_link_hash_entry *) bh;
7171 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7172 myh->forced_local = 1;
7173
7174 free (tmp_name);
7175
7176 if (bfd_link_pic (link_info)
7177 || globals->root.is_relocatable_executable
7178 || globals->pic_veneer)
7179 size = ARM2THUMB_PIC_GLUE_SIZE;
7180 else if (globals->use_blx)
7181 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7182 else
7183 size = ARM2THUMB_STATIC_GLUE_SIZE;
7184
7185 s->size += size;
7186 globals->arm_glue_size += size;
7187
7188 return myh;
7189 }
7190
7191 /* Allocate space for ARMv4 BX veneers. */
7192
7193 static void
7194 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7195 {
7196 asection * s;
7197 struct elf32_arm_link_hash_table *globals;
7198 char *tmp_name;
7199 struct elf_link_hash_entry *myh;
7200 struct bfd_link_hash_entry *bh;
7201 bfd_vma val;
7202
7203 /* BX PC does not need a veneer. */
7204 if (reg == 15)
7205 return;
7206
7207 globals = elf32_arm_hash_table (link_info);
7208 BFD_ASSERT (globals != NULL);
7209 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7210
7211 /* Check if this veneer has already been allocated. */
7212 if (globals->bx_glue_offset[reg])
7213 return;
7214
7215 s = bfd_get_linker_section
7216 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7217
7218 BFD_ASSERT (s != NULL);
7219
7220 /* Add symbol for veneer. */
7221 tmp_name = (char *)
7222 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7223
7224 BFD_ASSERT (tmp_name);
7225
7226 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7227
7228 myh = elf_link_hash_lookup
7229 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7230
7231 BFD_ASSERT (myh == NULL);
7232
7233 bh = NULL;
7234 val = globals->bx_glue_size;
7235 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7236 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7237 NULL, TRUE, FALSE, &bh);
7238
7239 myh = (struct elf_link_hash_entry *) bh;
7240 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7241 myh->forced_local = 1;
7242
7243 s->size += ARM_BX_VENEER_SIZE;
7244 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7245 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7246 }
7247
7248
7249 /* Add an entry to the code/data map for section SEC. */
7250
7251 static void
7252 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7253 {
7254 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7255 unsigned int newidx;
7256
7257 if (sec_data->map == NULL)
7258 {
7259 sec_data->map = (elf32_arm_section_map *)
7260 bfd_malloc (sizeof (elf32_arm_section_map));
7261 sec_data->mapcount = 0;
7262 sec_data->mapsize = 1;
7263 }
7264
7265 newidx = sec_data->mapcount++;
7266
7267 if (sec_data->mapcount > sec_data->mapsize)
7268 {
7269 sec_data->mapsize *= 2;
7270 sec_data->map = (elf32_arm_section_map *)
7271 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7272 * sizeof (elf32_arm_section_map));
7273 }
7274
7275 if (sec_data->map)
7276 {
7277 sec_data->map[newidx].vma = vma;
7278 sec_data->map[newidx].type = type;
7279 }
7280 }
7281
7282
7283 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7284 veneers are handled for now. */
7285
7286 static bfd_vma
7287 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7288 elf32_vfp11_erratum_list *branch,
7289 bfd *branch_bfd,
7290 asection *branch_sec,
7291 unsigned int offset)
7292 {
7293 asection *s;
7294 struct elf32_arm_link_hash_table *hash_table;
7295 char *tmp_name;
7296 struct elf_link_hash_entry *myh;
7297 struct bfd_link_hash_entry *bh;
7298 bfd_vma val;
7299 struct _arm_elf_section_data *sec_data;
7300 elf32_vfp11_erratum_list *newerr;
7301
7302 hash_table = elf32_arm_hash_table (link_info);
7303 BFD_ASSERT (hash_table != NULL);
7304 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7305
7306 s = bfd_get_linker_section
7307 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7308
7309 sec_data = elf32_arm_section_data (s);
7310
7311 BFD_ASSERT (s != NULL);
7312
7313 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7314 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7315
7316 BFD_ASSERT (tmp_name);
7317
7318 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7319 hash_table->num_vfp11_fixes);
7320
7321 myh = elf_link_hash_lookup
7322 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7323
7324 BFD_ASSERT (myh == NULL);
7325
7326 bh = NULL;
7327 val = hash_table->vfp11_erratum_glue_size;
7328 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7329 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7330 NULL, TRUE, FALSE, &bh);
7331
7332 myh = (struct elf_link_hash_entry *) bh;
7333 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7334 myh->forced_local = 1;
7335
7336 /* Link veneer back to calling location. */
7337 sec_data->erratumcount += 1;
7338 newerr = (elf32_vfp11_erratum_list *)
7339 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7340
7341 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7342 newerr->vma = -1;
7343 newerr->u.v.branch = branch;
7344 newerr->u.v.id = hash_table->num_vfp11_fixes;
7345 branch->u.b.veneer = newerr;
7346
7347 newerr->next = sec_data->erratumlist;
7348 sec_data->erratumlist = newerr;
7349
7350 /* A symbol for the return from the veneer. */
7351 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7352 hash_table->num_vfp11_fixes);
7353
7354 myh = elf_link_hash_lookup
7355 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7356
7357 if (myh != NULL)
7358 abort ();
7359
7360 bh = NULL;
7361 val = offset + 4;
7362 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7363 branch_sec, val, NULL, TRUE, FALSE, &bh);
7364
7365 myh = (struct elf_link_hash_entry *) bh;
7366 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7367 myh->forced_local = 1;
7368
7369 free (tmp_name);
7370
7371 /* Generate a mapping symbol for the veneer section, and explicitly add an
7372 entry for that symbol to the code/data map for the section. */
7373 if (hash_table->vfp11_erratum_glue_size == 0)
7374 {
7375 bh = NULL;
7376 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7377 ever requires this erratum fix. */
7378 _bfd_generic_link_add_one_symbol (link_info,
7379 hash_table->bfd_of_glue_owner, "$a",
7380 BSF_LOCAL, s, 0, NULL,
7381 TRUE, FALSE, &bh);
7382
7383 myh = (struct elf_link_hash_entry *) bh;
7384 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7385 myh->forced_local = 1;
7386
7387 /* The elf32_arm_init_maps function only cares about symbols from input
7388 BFDs. We must make a note of this generated mapping symbol
7389 ourselves so that code byteswapping works properly in
7390 elf32_arm_write_section. */
7391 elf32_arm_section_map_add (s, 'a', 0);
7392 }
7393
7394 s->size += VFP11_ERRATUM_VENEER_SIZE;
7395 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7396 hash_table->num_vfp11_fixes++;
7397
7398 /* The offset of the veneer. */
7399 return val;
7400 }
7401
7402 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7403 veneers need to be handled because used only in Cortex-M. */
7404
7405 static bfd_vma
7406 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7407 elf32_stm32l4xx_erratum_list *branch,
7408 bfd *branch_bfd,
7409 asection *branch_sec,
7410 unsigned int offset,
7411 bfd_size_type veneer_size)
7412 {
7413 asection *s;
7414 struct elf32_arm_link_hash_table *hash_table;
7415 char *tmp_name;
7416 struct elf_link_hash_entry *myh;
7417 struct bfd_link_hash_entry *bh;
7418 bfd_vma val;
7419 struct _arm_elf_section_data *sec_data;
7420 elf32_stm32l4xx_erratum_list *newerr;
7421
7422 hash_table = elf32_arm_hash_table (link_info);
7423 BFD_ASSERT (hash_table != NULL);
7424 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7425
7426 s = bfd_get_linker_section
7427 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7428
7429 BFD_ASSERT (s != NULL);
7430
7431 sec_data = elf32_arm_section_data (s);
7432
7433 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7434 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7435
7436 BFD_ASSERT (tmp_name);
7437
7438 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7439 hash_table->num_stm32l4xx_fixes);
7440
7441 myh = elf_link_hash_lookup
7442 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7443
7444 BFD_ASSERT (myh == NULL);
7445
7446 bh = NULL;
7447 val = hash_table->stm32l4xx_erratum_glue_size;
7448 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7449 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7450 NULL, TRUE, FALSE, &bh);
7451
7452 myh = (struct elf_link_hash_entry *) bh;
7453 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7454 myh->forced_local = 1;
7455
7456 /* Link veneer back to calling location. */
7457 sec_data->stm32l4xx_erratumcount += 1;
7458 newerr = (elf32_stm32l4xx_erratum_list *)
7459 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7460
7461 newerr->type = STM32L4XX_ERRATUM_VENEER;
7462 newerr->vma = -1;
7463 newerr->u.v.branch = branch;
7464 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7465 branch->u.b.veneer = newerr;
7466
7467 newerr->next = sec_data->stm32l4xx_erratumlist;
7468 sec_data->stm32l4xx_erratumlist = newerr;
7469
7470 /* A symbol for the return from the veneer. */
7471 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7472 hash_table->num_stm32l4xx_fixes);
7473
7474 myh = elf_link_hash_lookup
7475 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7476
7477 if (myh != NULL)
7478 abort ();
7479
7480 bh = NULL;
7481 val = offset + 4;
7482 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7483 branch_sec, val, NULL, TRUE, FALSE, &bh);
7484
7485 myh = (struct elf_link_hash_entry *) bh;
7486 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7487 myh->forced_local = 1;
7488
7489 free (tmp_name);
7490
7491 /* Generate a mapping symbol for the veneer section, and explicitly add an
7492 entry for that symbol to the code/data map for the section. */
7493 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7494 {
7495 bh = NULL;
7496 /* Creates a THUMB symbol since there is no other choice. */
7497 _bfd_generic_link_add_one_symbol (link_info,
7498 hash_table->bfd_of_glue_owner, "$t",
7499 BSF_LOCAL, s, 0, NULL,
7500 TRUE, FALSE, &bh);
7501
7502 myh = (struct elf_link_hash_entry *) bh;
7503 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7504 myh->forced_local = 1;
7505
7506 /* The elf32_arm_init_maps function only cares about symbols from input
7507 BFDs. We must make a note of this generated mapping symbol
7508 ourselves so that code byteswapping works properly in
7509 elf32_arm_write_section. */
7510 elf32_arm_section_map_add (s, 't', 0);
7511 }
7512
7513 s->size += veneer_size;
7514 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7515 hash_table->num_stm32l4xx_fixes++;
7516
7517 /* The offset of the veneer. */
7518 return val;
7519 }
7520
7521 #define ARM_GLUE_SECTION_FLAGS \
7522 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7523 | SEC_READONLY | SEC_LINKER_CREATED)
7524
7525 /* Create a fake section for use by the ARM backend of the linker. */
7526
7527 static bfd_boolean
7528 arm_make_glue_section (bfd * abfd, const char * name)
7529 {
7530 asection * sec;
7531
7532 sec = bfd_get_linker_section (abfd, name);
7533 if (sec != NULL)
7534 /* Already made. */
7535 return TRUE;
7536
7537 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7538
7539 if (sec == NULL
7540 || !bfd_set_section_alignment (abfd, sec, 2))
7541 return FALSE;
7542
7543 /* Set the gc mark to prevent the section from being removed by garbage
7544 collection, despite the fact that no relocs refer to this section. */
7545 sec->gc_mark = 1;
7546
7547 return TRUE;
7548 }
7549
7550 /* Set size of .plt entries. This function is called from the
7551 linker scripts in ld/emultempl/{armelf}.em. */
7552
7553 void
7554 bfd_elf32_arm_use_long_plt (void)
7555 {
7556 elf32_arm_use_long_plt_entry = TRUE;
7557 }
7558
7559 /* Add the glue sections to ABFD. This function is called from the
7560 linker scripts in ld/emultempl/{armelf}.em. */
7561
7562 bfd_boolean
7563 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7564 struct bfd_link_info *info)
7565 {
7566 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7567 bfd_boolean dostm32l4xx = globals
7568 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7569 bfd_boolean addglue;
7570
7571 /* If we are only performing a partial
7572 link do not bother adding the glue. */
7573 if (bfd_link_relocatable (info))
7574 return TRUE;
7575
7576 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7577 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7578 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7579 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7580
7581 if (!dostm32l4xx)
7582 return addglue;
7583
7584 return addglue
7585 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7586 }
7587
7588 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7589 ensures they are not marked for deletion by
7590 strip_excluded_output_sections () when veneers are going to be created
7591 later. Not doing so would trigger assert on empty section size in
7592 lang_size_sections_1 (). */
7593
7594 void
7595 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7596 {
7597 enum elf32_arm_stub_type stub_type;
7598
7599 /* If we are only performing a partial
7600 link do not bother adding the glue. */
7601 if (bfd_link_relocatable (info))
7602 return;
7603
7604 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7605 {
7606 asection *out_sec;
7607 const char *out_sec_name;
7608
7609 if (!arm_dedicated_stub_output_section_required (stub_type))
7610 continue;
7611
7612 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7613 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7614 if (out_sec != NULL)
7615 out_sec->flags |= SEC_KEEP;
7616 }
7617 }
7618
7619 /* Select a BFD to be used to hold the sections used by the glue code.
7620 This function is called from the linker scripts in ld/emultempl/
7621 {armelf/pe}.em. */
7622
7623 bfd_boolean
7624 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7625 {
7626 struct elf32_arm_link_hash_table *globals;
7627
7628 /* If we are only performing a partial link
7629 do not bother getting a bfd to hold the glue. */
7630 if (bfd_link_relocatable (info))
7631 return TRUE;
7632
7633 /* Make sure we don't attach the glue sections to a dynamic object. */
7634 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7635
7636 globals = elf32_arm_hash_table (info);
7637 BFD_ASSERT (globals != NULL);
7638
7639 if (globals->bfd_of_glue_owner != NULL)
7640 return TRUE;
7641
7642 /* Save the bfd for later use. */
7643 globals->bfd_of_glue_owner = abfd;
7644
7645 return TRUE;
7646 }
7647
7648 static void
7649 check_use_blx (struct elf32_arm_link_hash_table *globals)
7650 {
7651 int cpu_arch;
7652
7653 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7654 Tag_CPU_arch);
7655
7656 if (globals->fix_arm1176)
7657 {
7658 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7659 globals->use_blx = 1;
7660 }
7661 else
7662 {
7663 if (cpu_arch > TAG_CPU_ARCH_V4T)
7664 globals->use_blx = 1;
7665 }
7666 }
7667
7668 bfd_boolean
7669 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7670 struct bfd_link_info *link_info)
7671 {
7672 Elf_Internal_Shdr *symtab_hdr;
7673 Elf_Internal_Rela *internal_relocs = NULL;
7674 Elf_Internal_Rela *irel, *irelend;
7675 bfd_byte *contents = NULL;
7676
7677 asection *sec;
7678 struct elf32_arm_link_hash_table *globals;
7679
7680 /* If we are only performing a partial link do not bother
7681 to construct any glue. */
7682 if (bfd_link_relocatable (link_info))
7683 return TRUE;
7684
7685 /* Here we have a bfd that is to be included on the link. We have a
7686 hook to do reloc rummaging, before section sizes are nailed down. */
7687 globals = elf32_arm_hash_table (link_info);
7688 BFD_ASSERT (globals != NULL);
7689
7690 check_use_blx (globals);
7691
7692 if (globals->byteswap_code && !bfd_big_endian (abfd))
7693 {
7694 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7695 abfd);
7696 return FALSE;
7697 }
7698
7699 /* PR 5398: If we have not decided to include any loadable sections in
7700 the output then we will not have a glue owner bfd. This is OK, it
7701 just means that there is nothing else for us to do here. */
7702 if (globals->bfd_of_glue_owner == NULL)
7703 return TRUE;
7704
7705 /* Rummage around all the relocs and map the glue vectors. */
7706 sec = abfd->sections;
7707
7708 if (sec == NULL)
7709 return TRUE;
7710
7711 for (; sec != NULL; sec = sec->next)
7712 {
7713 if (sec->reloc_count == 0)
7714 continue;
7715
7716 if ((sec->flags & SEC_EXCLUDE) != 0)
7717 continue;
7718
7719 symtab_hdr = & elf_symtab_hdr (abfd);
7720
7721 /* Load the relocs. */
7722 internal_relocs
7723 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7724
7725 if (internal_relocs == NULL)
7726 goto error_return;
7727
7728 irelend = internal_relocs + sec->reloc_count;
7729 for (irel = internal_relocs; irel < irelend; irel++)
7730 {
7731 long r_type;
7732 unsigned long r_index;
7733
7734 struct elf_link_hash_entry *h;
7735
7736 r_type = ELF32_R_TYPE (irel->r_info);
7737 r_index = ELF32_R_SYM (irel->r_info);
7738
7739 /* These are the only relocation types we care about. */
7740 if ( r_type != R_ARM_PC24
7741 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7742 continue;
7743
7744 /* Get the section contents if we haven't done so already. */
7745 if (contents == NULL)
7746 {
7747 /* Get cached copy if it exists. */
7748 if (elf_section_data (sec)->this_hdr.contents != NULL)
7749 contents = elf_section_data (sec)->this_hdr.contents;
7750 else
7751 {
7752 /* Go get them off disk. */
7753 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7754 goto error_return;
7755 }
7756 }
7757
7758 if (r_type == R_ARM_V4BX)
7759 {
7760 int reg;
7761
7762 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7763 record_arm_bx_glue (link_info, reg);
7764 continue;
7765 }
7766
7767 /* If the relocation is not against a symbol it cannot concern us. */
7768 h = NULL;
7769
7770 /* We don't care about local symbols. */
7771 if (r_index < symtab_hdr->sh_info)
7772 continue;
7773
7774 /* This is an external symbol. */
7775 r_index -= symtab_hdr->sh_info;
7776 h = (struct elf_link_hash_entry *)
7777 elf_sym_hashes (abfd)[r_index];
7778
7779 /* If the relocation is against a static symbol it must be within
7780 the current section and so cannot be a cross ARM/Thumb relocation. */
7781 if (h == NULL)
7782 continue;
7783
7784 /* If the call will go through a PLT entry then we do not need
7785 glue. */
7786 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7787 continue;
7788
7789 switch (r_type)
7790 {
7791 case R_ARM_PC24:
7792 /* This one is a call from arm code. We need to look up
7793 the target of the call. If it is a thumb target, we
7794 insert glue. */
7795 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7796 == ST_BRANCH_TO_THUMB)
7797 record_arm_to_thumb_glue (link_info, h);
7798 break;
7799
7800 default:
7801 abort ();
7802 }
7803 }
7804
7805 if (contents != NULL
7806 && elf_section_data (sec)->this_hdr.contents != contents)
7807 free (contents);
7808 contents = NULL;
7809
7810 if (internal_relocs != NULL
7811 && elf_section_data (sec)->relocs != internal_relocs)
7812 free (internal_relocs);
7813 internal_relocs = NULL;
7814 }
7815
7816 return TRUE;
7817
7818 error_return:
7819 if (contents != NULL
7820 && elf_section_data (sec)->this_hdr.contents != contents)
7821 free (contents);
7822 if (internal_relocs != NULL
7823 && elf_section_data (sec)->relocs != internal_relocs)
7824 free (internal_relocs);
7825
7826 return FALSE;
7827 }
7828 #endif
7829
7830
7831 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7832
7833 void
7834 bfd_elf32_arm_init_maps (bfd *abfd)
7835 {
7836 Elf_Internal_Sym *isymbuf;
7837 Elf_Internal_Shdr *hdr;
7838 unsigned int i, localsyms;
7839
7840 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7841 if (! is_arm_elf (abfd))
7842 return;
7843
7844 if ((abfd->flags & DYNAMIC) != 0)
7845 return;
7846
7847 hdr = & elf_symtab_hdr (abfd);
7848 localsyms = hdr->sh_info;
7849
7850 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7851 should contain the number of local symbols, which should come before any
7852 global symbols. Mapping symbols are always local. */
7853 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7854 NULL);
7855
7856 /* No internal symbols read? Skip this BFD. */
7857 if (isymbuf == NULL)
7858 return;
7859
7860 for (i = 0; i < localsyms; i++)
7861 {
7862 Elf_Internal_Sym *isym = &isymbuf[i];
7863 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7864 const char *name;
7865
7866 if (sec != NULL
7867 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7868 {
7869 name = bfd_elf_string_from_elf_section (abfd,
7870 hdr->sh_link, isym->st_name);
7871
7872 if (bfd_is_arm_special_symbol_name (name,
7873 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7874 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7875 }
7876 }
7877 }
7878
7879
7880 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7881 say what they wanted. */
7882
7883 void
7884 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7885 {
7886 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7887 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7888
7889 if (globals == NULL)
7890 return;
7891
7892 if (globals->fix_cortex_a8 == -1)
7893 {
7894 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7895 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7896 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7897 || out_attr[Tag_CPU_arch_profile].i == 0))
7898 globals->fix_cortex_a8 = 1;
7899 else
7900 globals->fix_cortex_a8 = 0;
7901 }
7902 }
7903
7904
7905 void
7906 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7907 {
7908 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7909 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7910
7911 if (globals == NULL)
7912 return;
7913 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7914 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7915 {
7916 switch (globals->vfp11_fix)
7917 {
7918 case BFD_ARM_VFP11_FIX_DEFAULT:
7919 case BFD_ARM_VFP11_FIX_NONE:
7920 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7921 break;
7922
7923 default:
7924 /* Give a warning, but do as the user requests anyway. */
7925 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7926 "workaround is not necessary for target architecture"), obfd);
7927 }
7928 }
7929 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7930 /* For earlier architectures, we might need the workaround, but do not
7931 enable it by default. If users is running with broken hardware, they
7932 must enable the erratum fix explicitly. */
7933 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7934 }
7935
7936 void
7937 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7938 {
7939 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7940 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7941
7942 if (globals == NULL)
7943 return;
7944
7945 /* We assume only Cortex-M4 may require the fix. */
7946 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7947 || out_attr[Tag_CPU_arch_profile].i != 'M')
7948 {
7949 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7950 /* Give a warning, but do as the user requests anyway. */
7951 _bfd_error_handler
7952 (_("%pB: warning: selected STM32L4XX erratum "
7953 "workaround is not necessary for target architecture"), obfd);
7954 }
7955 }
7956
7957 enum bfd_arm_vfp11_pipe
7958 {
7959 VFP11_FMAC,
7960 VFP11_LS,
7961 VFP11_DS,
7962 VFP11_BAD
7963 };
7964
7965 /* Return a VFP register number. This is encoded as RX:X for single-precision
7966 registers, or X:RX for double-precision registers, where RX is the group of
7967 four bits in the instruction encoding and X is the single extension bit.
7968 RX and X fields are specified using their lowest (starting) bit. The return
7969 value is:
7970
7971 0...31: single-precision registers s0...s31
7972 32...63: double-precision registers d0...d31.
7973
7974 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7975 encounter VFP3 instructions, so we allow the full range for DP registers. */
7976
7977 static unsigned int
7978 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7979 unsigned int x)
7980 {
7981 if (is_double)
7982 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7983 else
7984 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7985 }
7986
7987 /* Set bits in *WMASK according to a register number REG as encoded by
7988 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7989
7990 static void
7991 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7992 {
7993 if (reg < 32)
7994 *wmask |= 1 << reg;
7995 else if (reg < 48)
7996 *wmask |= 3 << ((reg - 32) * 2);
7997 }
7998
7999 /* Return TRUE if WMASK overwrites anything in REGS. */
8000
8001 static bfd_boolean
8002 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8003 {
8004 int i;
8005
8006 for (i = 0; i < numregs; i++)
8007 {
8008 unsigned int reg = regs[i];
8009
8010 if (reg < 32 && (wmask & (1 << reg)) != 0)
8011 return TRUE;
8012
8013 reg -= 32;
8014
8015 if (reg >= 16)
8016 continue;
8017
8018 if ((wmask & (3 << (reg * 2))) != 0)
8019 return TRUE;
8020 }
8021
8022 return FALSE;
8023 }
8024
8025 /* In this function, we're interested in two things: finding input registers
8026 for VFP data-processing instructions, and finding the set of registers which
8027 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8028 hold the written set, so FLDM etc. are easy to deal with (we're only
8029 interested in 32 SP registers or 16 dp registers, due to the VFP version
8030 implemented by the chip in question). DP registers are marked by setting
8031 both SP registers in the write mask). */
8032
8033 static enum bfd_arm_vfp11_pipe
8034 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8035 int *numregs)
8036 {
8037 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8038 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8039
8040 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8041 {
8042 unsigned int pqrs;
8043 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8044 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8045
8046 pqrs = ((insn & 0x00800000) >> 20)
8047 | ((insn & 0x00300000) >> 19)
8048 | ((insn & 0x00000040) >> 6);
8049
8050 switch (pqrs)
8051 {
8052 case 0: /* fmac[sd]. */
8053 case 1: /* fnmac[sd]. */
8054 case 2: /* fmsc[sd]. */
8055 case 3: /* fnmsc[sd]. */
8056 vpipe = VFP11_FMAC;
8057 bfd_arm_vfp11_write_mask (destmask, fd);
8058 regs[0] = fd;
8059 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8060 regs[2] = fm;
8061 *numregs = 3;
8062 break;
8063
8064 case 4: /* fmul[sd]. */
8065 case 5: /* fnmul[sd]. */
8066 case 6: /* fadd[sd]. */
8067 case 7: /* fsub[sd]. */
8068 vpipe = VFP11_FMAC;
8069 goto vfp_binop;
8070
8071 case 8: /* fdiv[sd]. */
8072 vpipe = VFP11_DS;
8073 vfp_binop:
8074 bfd_arm_vfp11_write_mask (destmask, fd);
8075 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8076 regs[1] = fm;
8077 *numregs = 2;
8078 break;
8079
8080 case 15: /* extended opcode. */
8081 {
8082 unsigned int extn = ((insn >> 15) & 0x1e)
8083 | ((insn >> 7) & 1);
8084
8085 switch (extn)
8086 {
8087 case 0: /* fcpy[sd]. */
8088 case 1: /* fabs[sd]. */
8089 case 2: /* fneg[sd]. */
8090 case 8: /* fcmp[sd]. */
8091 case 9: /* fcmpe[sd]. */
8092 case 10: /* fcmpz[sd]. */
8093 case 11: /* fcmpez[sd]. */
8094 case 16: /* fuito[sd]. */
8095 case 17: /* fsito[sd]. */
8096 case 24: /* ftoui[sd]. */
8097 case 25: /* ftouiz[sd]. */
8098 case 26: /* ftosi[sd]. */
8099 case 27: /* ftosiz[sd]. */
8100 /* These instructions will not bounce due to underflow. */
8101 *numregs = 0;
8102 vpipe = VFP11_FMAC;
8103 break;
8104
8105 case 3: /* fsqrt[sd]. */
8106 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8107 registers to cause the erratum in previous instructions. */
8108 bfd_arm_vfp11_write_mask (destmask, fd);
8109 vpipe = VFP11_DS;
8110 break;
8111
8112 case 15: /* fcvt{ds,sd}. */
8113 {
8114 int rnum = 0;
8115
8116 bfd_arm_vfp11_write_mask (destmask, fd);
8117
8118 /* Only FCVTSD can underflow. */
8119 if ((insn & 0x100) != 0)
8120 regs[rnum++] = fm;
8121
8122 *numregs = rnum;
8123
8124 vpipe = VFP11_FMAC;
8125 }
8126 break;
8127
8128 default:
8129 return VFP11_BAD;
8130 }
8131 }
8132 break;
8133
8134 default:
8135 return VFP11_BAD;
8136 }
8137 }
8138 /* Two-register transfer. */
8139 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8140 {
8141 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8142
8143 if ((insn & 0x100000) == 0)
8144 {
8145 if (is_double)
8146 bfd_arm_vfp11_write_mask (destmask, fm);
8147 else
8148 {
8149 bfd_arm_vfp11_write_mask (destmask, fm);
8150 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8151 }
8152 }
8153
8154 vpipe = VFP11_LS;
8155 }
8156 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8157 {
8158 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8159 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8160
8161 switch (puw)
8162 {
8163 case 0: /* Two-reg transfer. We should catch these above. */
8164 abort ();
8165
8166 case 2: /* fldm[sdx]. */
8167 case 3:
8168 case 5:
8169 {
8170 unsigned int i, offset = insn & 0xff;
8171
8172 if (is_double)
8173 offset >>= 1;
8174
8175 for (i = fd; i < fd + offset; i++)
8176 bfd_arm_vfp11_write_mask (destmask, i);
8177 }
8178 break;
8179
8180 case 4: /* fld[sd]. */
8181 case 6:
8182 bfd_arm_vfp11_write_mask (destmask, fd);
8183 break;
8184
8185 default:
8186 return VFP11_BAD;
8187 }
8188
8189 vpipe = VFP11_LS;
8190 }
8191 /* Single-register transfer. Note L==0. */
8192 else if ((insn & 0x0f100e10) == 0x0e000a10)
8193 {
8194 unsigned int opcode = (insn >> 21) & 7;
8195 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8196
8197 switch (opcode)
8198 {
8199 case 0: /* fmsr/fmdlr. */
8200 case 1: /* fmdhr. */
8201 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8202 destination register. I don't know if this is exactly right,
8203 but it is the conservative choice. */
8204 bfd_arm_vfp11_write_mask (destmask, fn);
8205 break;
8206
8207 case 7: /* fmxr. */
8208 break;
8209 }
8210
8211 vpipe = VFP11_LS;
8212 }
8213
8214 return vpipe;
8215 }
8216
8217
8218 static int elf32_arm_compare_mapping (const void * a, const void * b);
8219
8220
8221 /* Look for potentially-troublesome code sequences which might trigger the
8222 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8223 (available from ARM) for details of the erratum. A short version is
8224 described in ld.texinfo. */
8225
8226 bfd_boolean
8227 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8228 {
8229 asection *sec;
8230 bfd_byte *contents = NULL;
8231 int state = 0;
8232 int regs[3], numregs = 0;
8233 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8234 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8235
8236 if (globals == NULL)
8237 return FALSE;
8238
8239 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8240 The states transition as follows:
8241
8242 0 -> 1 (vector) or 0 -> 2 (scalar)
8243 A VFP FMAC-pipeline instruction has been seen. Fill
8244 regs[0]..regs[numregs-1] with its input operands. Remember this
8245 instruction in 'first_fmac'.
8246
8247 1 -> 2
8248 Any instruction, except for a VFP instruction which overwrites
8249 regs[*].
8250
8251 1 -> 3 [ -> 0 ] or
8252 2 -> 3 [ -> 0 ]
8253 A VFP instruction has been seen which overwrites any of regs[*].
8254 We must make a veneer! Reset state to 0 before examining next
8255 instruction.
8256
8257 2 -> 0
8258 If we fail to match anything in state 2, reset to state 0 and reset
8259 the instruction pointer to the instruction after 'first_fmac'.
8260
8261 If the VFP11 vector mode is in use, there must be at least two unrelated
8262 instructions between anti-dependent VFP11 instructions to properly avoid
8263 triggering the erratum, hence the use of the extra state 1. */
8264
8265 /* If we are only performing a partial link do not bother
8266 to construct any glue. */
8267 if (bfd_link_relocatable (link_info))
8268 return TRUE;
8269
8270 /* Skip if this bfd does not correspond to an ELF image. */
8271 if (! is_arm_elf (abfd))
8272 return TRUE;
8273
8274 /* We should have chosen a fix type by the time we get here. */
8275 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8276
8277 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8278 return TRUE;
8279
8280 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8281 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8282 return TRUE;
8283
8284 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8285 {
8286 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8287 struct _arm_elf_section_data *sec_data;
8288
8289 /* If we don't have executable progbits, we're not interested in this
8290 section. Also skip if section is to be excluded. */
8291 if (elf_section_type (sec) != SHT_PROGBITS
8292 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8293 || (sec->flags & SEC_EXCLUDE) != 0
8294 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8295 || sec->output_section == bfd_abs_section_ptr
8296 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8297 continue;
8298
8299 sec_data = elf32_arm_section_data (sec);
8300
8301 if (sec_data->mapcount == 0)
8302 continue;
8303
8304 if (elf_section_data (sec)->this_hdr.contents != NULL)
8305 contents = elf_section_data (sec)->this_hdr.contents;
8306 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8307 goto error_return;
8308
8309 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8310 elf32_arm_compare_mapping);
8311
8312 for (span = 0; span < sec_data->mapcount; span++)
8313 {
8314 unsigned int span_start = sec_data->map[span].vma;
8315 unsigned int span_end = (span == sec_data->mapcount - 1)
8316 ? sec->size : sec_data->map[span + 1].vma;
8317 char span_type = sec_data->map[span].type;
8318
8319 /* FIXME: Only ARM mode is supported at present. We may need to
8320 support Thumb-2 mode also at some point. */
8321 if (span_type != 'a')
8322 continue;
8323
8324 for (i = span_start; i < span_end;)
8325 {
8326 unsigned int next_i = i + 4;
8327 unsigned int insn = bfd_big_endian (abfd)
8328 ? (contents[i] << 24)
8329 | (contents[i + 1] << 16)
8330 | (contents[i + 2] << 8)
8331 | contents[i + 3]
8332 : (contents[i + 3] << 24)
8333 | (contents[i + 2] << 16)
8334 | (contents[i + 1] << 8)
8335 | contents[i];
8336 unsigned int writemask = 0;
8337 enum bfd_arm_vfp11_pipe vpipe;
8338
8339 switch (state)
8340 {
8341 case 0:
8342 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8343 &numregs);
8344 /* I'm assuming the VFP11 erratum can trigger with denorm
8345 operands on either the FMAC or the DS pipeline. This might
8346 lead to slightly overenthusiastic veneer insertion. */
8347 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8348 {
8349 state = use_vector ? 1 : 2;
8350 first_fmac = i;
8351 veneer_of_insn = insn;
8352 }
8353 break;
8354
8355 case 1:
8356 {
8357 int other_regs[3], other_numregs;
8358 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8359 other_regs,
8360 &other_numregs);
8361 if (vpipe != VFP11_BAD
8362 && bfd_arm_vfp11_antidependency (writemask, regs,
8363 numregs))
8364 state = 3;
8365 else
8366 state = 2;
8367 }
8368 break;
8369
8370 case 2:
8371 {
8372 int other_regs[3], other_numregs;
8373 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8374 other_regs,
8375 &other_numregs);
8376 if (vpipe != VFP11_BAD
8377 && bfd_arm_vfp11_antidependency (writemask, regs,
8378 numregs))
8379 state = 3;
8380 else
8381 {
8382 state = 0;
8383 next_i = first_fmac + 4;
8384 }
8385 }
8386 break;
8387
8388 case 3:
8389 abort (); /* Should be unreachable. */
8390 }
8391
8392 if (state == 3)
8393 {
8394 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8395 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8396
8397 elf32_arm_section_data (sec)->erratumcount += 1;
8398
8399 newerr->u.b.vfp_insn = veneer_of_insn;
8400
8401 switch (span_type)
8402 {
8403 case 'a':
8404 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8405 break;
8406
8407 default:
8408 abort ();
8409 }
8410
8411 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8412 first_fmac);
8413
8414 newerr->vma = -1;
8415
8416 newerr->next = sec_data->erratumlist;
8417 sec_data->erratumlist = newerr;
8418
8419 state = 0;
8420 }
8421
8422 i = next_i;
8423 }
8424 }
8425
8426 if (contents != NULL
8427 && elf_section_data (sec)->this_hdr.contents != contents)
8428 free (contents);
8429 contents = NULL;
8430 }
8431
8432 return TRUE;
8433
8434 error_return:
8435 if (contents != NULL
8436 && elf_section_data (sec)->this_hdr.contents != contents)
8437 free (contents);
8438
8439 return FALSE;
8440 }
8441
8442 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8443 after sections have been laid out, using specially-named symbols. */
8444
8445 void
8446 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8447 struct bfd_link_info *link_info)
8448 {
8449 asection *sec;
8450 struct elf32_arm_link_hash_table *globals;
8451 char *tmp_name;
8452
8453 if (bfd_link_relocatable (link_info))
8454 return;
8455
8456 /* Skip if this bfd does not correspond to an ELF image. */
8457 if (! is_arm_elf (abfd))
8458 return;
8459
8460 globals = elf32_arm_hash_table (link_info);
8461 if (globals == NULL)
8462 return;
8463
8464 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8465 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8466
8467 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8468 {
8469 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8470 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8471
8472 for (; errnode != NULL; errnode = errnode->next)
8473 {
8474 struct elf_link_hash_entry *myh;
8475 bfd_vma vma;
8476
8477 switch (errnode->type)
8478 {
8479 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8480 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8481 /* Find veneer symbol. */
8482 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8483 errnode->u.b.veneer->u.v.id);
8484
8485 myh = elf_link_hash_lookup
8486 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8487
8488 if (myh == NULL)
8489 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8490 abfd, "VFP11", tmp_name);
8491
8492 vma = myh->root.u.def.section->output_section->vma
8493 + myh->root.u.def.section->output_offset
8494 + myh->root.u.def.value;
8495
8496 errnode->u.b.veneer->vma = vma;
8497 break;
8498
8499 case VFP11_ERRATUM_ARM_VENEER:
8500 case VFP11_ERRATUM_THUMB_VENEER:
8501 /* Find return location. */
8502 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8503 errnode->u.v.id);
8504
8505 myh = elf_link_hash_lookup
8506 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8507
8508 if (myh == NULL)
8509 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8510 abfd, "VFP11", tmp_name);
8511
8512 vma = myh->root.u.def.section->output_section->vma
8513 + myh->root.u.def.section->output_offset
8514 + myh->root.u.def.value;
8515
8516 errnode->u.v.branch->vma = vma;
8517 break;
8518
8519 default:
8520 abort ();
8521 }
8522 }
8523 }
8524
8525 free (tmp_name);
8526 }
8527
8528 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8529 return locations after sections have been laid out, using
8530 specially-named symbols. */
8531
8532 void
8533 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8534 struct bfd_link_info *link_info)
8535 {
8536 asection *sec;
8537 struct elf32_arm_link_hash_table *globals;
8538 char *tmp_name;
8539
8540 if (bfd_link_relocatable (link_info))
8541 return;
8542
8543 /* Skip if this bfd does not correspond to an ELF image. */
8544 if (! is_arm_elf (abfd))
8545 return;
8546
8547 globals = elf32_arm_hash_table (link_info);
8548 if (globals == NULL)
8549 return;
8550
8551 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8552 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8553
8554 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8555 {
8556 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8557 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8558
8559 for (; errnode != NULL; errnode = errnode->next)
8560 {
8561 struct elf_link_hash_entry *myh;
8562 bfd_vma vma;
8563
8564 switch (errnode->type)
8565 {
8566 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8567 /* Find veneer symbol. */
8568 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8569 errnode->u.b.veneer->u.v.id);
8570
8571 myh = elf_link_hash_lookup
8572 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8573
8574 if (myh == NULL)
8575 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8576 abfd, "STM32L4XX", tmp_name);
8577
8578 vma = myh->root.u.def.section->output_section->vma
8579 + myh->root.u.def.section->output_offset
8580 + myh->root.u.def.value;
8581
8582 errnode->u.b.veneer->vma = vma;
8583 break;
8584
8585 case STM32L4XX_ERRATUM_VENEER:
8586 /* Find return location. */
8587 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8588 errnode->u.v.id);
8589
8590 myh = elf_link_hash_lookup
8591 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8592
8593 if (myh == NULL)
8594 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8595 abfd, "STM32L4XX", tmp_name);
8596
8597 vma = myh->root.u.def.section->output_section->vma
8598 + myh->root.u.def.section->output_offset
8599 + myh->root.u.def.value;
8600
8601 errnode->u.v.branch->vma = vma;
8602 break;
8603
8604 default:
8605 abort ();
8606 }
8607 }
8608 }
8609
8610 free (tmp_name);
8611 }
8612
8613 static inline bfd_boolean
8614 is_thumb2_ldmia (const insn32 insn)
8615 {
8616 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8617 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8618 return (insn & 0xffd02000) == 0xe8900000;
8619 }
8620
8621 static inline bfd_boolean
8622 is_thumb2_ldmdb (const insn32 insn)
8623 {
8624 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8625 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8626 return (insn & 0xffd02000) == 0xe9100000;
8627 }
8628
8629 static inline bfd_boolean
8630 is_thumb2_vldm (const insn32 insn)
8631 {
8632 /* A6.5 Extension register load or store instruction
8633 A7.7.229
8634 We look for SP 32-bit and DP 64-bit registers.
8635 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8636 <list> is consecutive 64-bit registers
8637 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8638 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8639 <list> is consecutive 32-bit registers
8640 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8641 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8642 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8643 return
8644 (((insn & 0xfe100f00) == 0xec100b00) ||
8645 ((insn & 0xfe100f00) == 0xec100a00))
8646 && /* (IA without !). */
8647 (((((insn << 7) >> 28) & 0xd) == 0x4)
8648 /* (IA with !), includes VPOP (when reg number is SP). */
8649 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8650 /* (DB with !). */
8651 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8652 }
8653
8654 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8655 VLDM opcode and:
8656 - computes the number and the mode of memory accesses
8657 - decides if the replacement should be done:
8658 . replaces only if > 8-word accesses
8659 . or (testing purposes only) replaces all accesses. */
8660
8661 static bfd_boolean
8662 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8663 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8664 {
8665 int nb_words = 0;
8666
8667 /* The field encoding the register list is the same for both LDMIA
8668 and LDMDB encodings. */
8669 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8670 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8671 else if (is_thumb2_vldm (insn))
8672 nb_words = (insn & 0xff);
8673
8674 /* DEFAULT mode accounts for the real bug condition situation,
8675 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8676 return
8677 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8678 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8679 }
8680
8681 /* Look for potentially-troublesome code sequences which might trigger
8682 the STM STM32L4XX erratum. */
8683
8684 bfd_boolean
8685 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8686 struct bfd_link_info *link_info)
8687 {
8688 asection *sec;
8689 bfd_byte *contents = NULL;
8690 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8691
8692 if (globals == NULL)
8693 return FALSE;
8694
8695 /* If we are only performing a partial link do not bother
8696 to construct any glue. */
8697 if (bfd_link_relocatable (link_info))
8698 return TRUE;
8699
8700 /* Skip if this bfd does not correspond to an ELF image. */
8701 if (! is_arm_elf (abfd))
8702 return TRUE;
8703
8704 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8705 return TRUE;
8706
8707 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8708 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8709 return TRUE;
8710
8711 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8712 {
8713 unsigned int i, span;
8714 struct _arm_elf_section_data *sec_data;
8715
8716 /* If we don't have executable progbits, we're not interested in this
8717 section. Also skip if section is to be excluded. */
8718 if (elf_section_type (sec) != SHT_PROGBITS
8719 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8720 || (sec->flags & SEC_EXCLUDE) != 0
8721 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8722 || sec->output_section == bfd_abs_section_ptr
8723 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8724 continue;
8725
8726 sec_data = elf32_arm_section_data (sec);
8727
8728 if (sec_data->mapcount == 0)
8729 continue;
8730
8731 if (elf_section_data (sec)->this_hdr.contents != NULL)
8732 contents = elf_section_data (sec)->this_hdr.contents;
8733 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8734 goto error_return;
8735
8736 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8737 elf32_arm_compare_mapping);
8738
8739 for (span = 0; span < sec_data->mapcount; span++)
8740 {
8741 unsigned int span_start = sec_data->map[span].vma;
8742 unsigned int span_end = (span == sec_data->mapcount - 1)
8743 ? sec->size : sec_data->map[span + 1].vma;
8744 char span_type = sec_data->map[span].type;
8745 int itblock_current_pos = 0;
8746
8747 /* Only Thumb2 mode need be supported with this CM4 specific
8748 code, we should not encounter any arm mode eg span_type
8749 != 'a'. */
8750 if (span_type != 't')
8751 continue;
8752
8753 for (i = span_start; i < span_end;)
8754 {
8755 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8756 bfd_boolean insn_32bit = FALSE;
8757 bfd_boolean is_ldm = FALSE;
8758 bfd_boolean is_vldm = FALSE;
8759 bfd_boolean is_not_last_in_it_block = FALSE;
8760
8761 /* The first 16-bits of all 32-bit thumb2 instructions start
8762 with opcode[15..13]=0b111 and the encoded op1 can be anything
8763 except opcode[12..11]!=0b00.
8764 See 32-bit Thumb instruction encoding. */
8765 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8766 insn_32bit = TRUE;
8767
8768 /* Compute the predicate that tells if the instruction
8769 is concerned by the IT block
8770 - Creates an error if there is a ldm that is not
8771 last in the IT block thus cannot be replaced
8772 - Otherwise we can create a branch at the end of the
8773 IT block, it will be controlled naturally by IT
8774 with the proper pseudo-predicate
8775 - So the only interesting predicate is the one that
8776 tells that we are not on the last item of an IT
8777 block. */
8778 if (itblock_current_pos != 0)
8779 is_not_last_in_it_block = !!--itblock_current_pos;
8780
8781 if (insn_32bit)
8782 {
8783 /* Load the rest of the insn (in manual-friendly order). */
8784 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8785 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8786 is_vldm = is_thumb2_vldm (insn);
8787
8788 /* Veneers are created for (v)ldm depending on
8789 option flags and memory accesses conditions; but
8790 if the instruction is not the last instruction of
8791 an IT block, we cannot create a jump there, so we
8792 bail out. */
8793 if ((is_ldm || is_vldm)
8794 && stm32l4xx_need_create_replacing_stub
8795 (insn, globals->stm32l4xx_fix))
8796 {
8797 if (is_not_last_in_it_block)
8798 {
8799 _bfd_error_handler
8800 /* xgettext:c-format */
8801 (_("%pB(%pA+%#x): error: multiple load detected"
8802 " in non-last IT block instruction:"
8803 " STM32L4XX veneer cannot be generated; "
8804 "use gcc option -mrestrict-it to generate"
8805 " only one instruction per IT block"),
8806 abfd, sec, i);
8807 }
8808 else
8809 {
8810 elf32_stm32l4xx_erratum_list *newerr =
8811 (elf32_stm32l4xx_erratum_list *)
8812 bfd_zmalloc
8813 (sizeof (elf32_stm32l4xx_erratum_list));
8814
8815 elf32_arm_section_data (sec)
8816 ->stm32l4xx_erratumcount += 1;
8817 newerr->u.b.insn = insn;
8818 /* We create only thumb branches. */
8819 newerr->type =
8820 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8821 record_stm32l4xx_erratum_veneer
8822 (link_info, newerr, abfd, sec,
8823 i,
8824 is_ldm ?
8825 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8826 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8827 newerr->vma = -1;
8828 newerr->next = sec_data->stm32l4xx_erratumlist;
8829 sec_data->stm32l4xx_erratumlist = newerr;
8830 }
8831 }
8832 }
8833 else
8834 {
8835 /* A7.7.37 IT p208
8836 IT blocks are only encoded in T1
8837 Encoding T1: IT{x{y{z}}} <firstcond>
8838 1 0 1 1 - 1 1 1 1 - firstcond - mask
8839 if mask = '0000' then see 'related encodings'
8840 We don't deal with UNPREDICTABLE, just ignore these.
8841 There can be no nested IT blocks so an IT block
8842 is naturally a new one for which it is worth
8843 computing its size. */
8844 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8845 && ((insn & 0x000f) != 0x0000);
8846 /* If we have a new IT block we compute its size. */
8847 if (is_newitblock)
8848 {
8849 /* Compute the number of instructions controlled
8850 by the IT block, it will be used to decide
8851 whether we are inside an IT block or not. */
8852 unsigned int mask = insn & 0x000f;
8853 itblock_current_pos = 4 - ctz (mask);
8854 }
8855 }
8856
8857 i += insn_32bit ? 4 : 2;
8858 }
8859 }
8860
8861 if (contents != NULL
8862 && elf_section_data (sec)->this_hdr.contents != contents)
8863 free (contents);
8864 contents = NULL;
8865 }
8866
8867 return TRUE;
8868
8869 error_return:
8870 if (contents != NULL
8871 && elf_section_data (sec)->this_hdr.contents != contents)
8872 free (contents);
8873
8874 return FALSE;
8875 }
8876
8877 /* Set target relocation values needed during linking. */
8878
8879 void
8880 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8881 struct bfd_link_info *link_info,
8882 struct elf32_arm_params *params)
8883 {
8884 struct elf32_arm_link_hash_table *globals;
8885
8886 globals = elf32_arm_hash_table (link_info);
8887 if (globals == NULL)
8888 return;
8889
8890 globals->target1_is_rel = params->target1_is_rel;
8891 if (strcmp (params->target2_type, "rel") == 0)
8892 globals->target2_reloc = R_ARM_REL32;
8893 else if (strcmp (params->target2_type, "abs") == 0)
8894 globals->target2_reloc = R_ARM_ABS32;
8895 else if (strcmp (params->target2_type, "got-rel") == 0)
8896 globals->target2_reloc = R_ARM_GOT_PREL;
8897 else
8898 {
8899 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
8900 params->target2_type);
8901 }
8902 globals->fix_v4bx = params->fix_v4bx;
8903 globals->use_blx |= params->use_blx;
8904 globals->vfp11_fix = params->vfp11_denorm_fix;
8905 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8906 if (globals->fdpic_p)
8907 globals->pic_veneer = 1;
8908 else
8909 globals->pic_veneer = params->pic_veneer;
8910 globals->fix_cortex_a8 = params->fix_cortex_a8;
8911 globals->fix_arm1176 = params->fix_arm1176;
8912 globals->cmse_implib = params->cmse_implib;
8913 globals->in_implib_bfd = params->in_implib_bfd;
8914
8915 BFD_ASSERT (is_arm_elf (output_bfd));
8916 elf_arm_tdata (output_bfd)->no_enum_size_warning
8917 = params->no_enum_size_warning;
8918 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8919 = params->no_wchar_size_warning;
8920 }
8921
8922 /* Replace the target offset of a Thumb bl or b.w instruction. */
8923
8924 static void
8925 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8926 {
8927 bfd_vma upper;
8928 bfd_vma lower;
8929 int reloc_sign;
8930
8931 BFD_ASSERT ((offset & 1) == 0);
8932
8933 upper = bfd_get_16 (abfd, insn);
8934 lower = bfd_get_16 (abfd, insn + 2);
8935 reloc_sign = (offset < 0) ? 1 : 0;
8936 upper = (upper & ~(bfd_vma) 0x7ff)
8937 | ((offset >> 12) & 0x3ff)
8938 | (reloc_sign << 10);
8939 lower = (lower & ~(bfd_vma) 0x2fff)
8940 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8941 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8942 | ((offset >> 1) & 0x7ff);
8943 bfd_put_16 (abfd, upper, insn);
8944 bfd_put_16 (abfd, lower, insn + 2);
8945 }
8946
8947 /* Thumb code calling an ARM function. */
8948
8949 static int
8950 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8951 const char * name,
8952 bfd * input_bfd,
8953 bfd * output_bfd,
8954 asection * input_section,
8955 bfd_byte * hit_data,
8956 asection * sym_sec,
8957 bfd_vma offset,
8958 bfd_signed_vma addend,
8959 bfd_vma val,
8960 char **error_message)
8961 {
8962 asection * s = 0;
8963 bfd_vma my_offset;
8964 long int ret_offset;
8965 struct elf_link_hash_entry * myh;
8966 struct elf32_arm_link_hash_table * globals;
8967
8968 myh = find_thumb_glue (info, name, error_message);
8969 if (myh == NULL)
8970 return FALSE;
8971
8972 globals = elf32_arm_hash_table (info);
8973 BFD_ASSERT (globals != NULL);
8974 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8975
8976 my_offset = myh->root.u.def.value;
8977
8978 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8979 THUMB2ARM_GLUE_SECTION_NAME);
8980
8981 BFD_ASSERT (s != NULL);
8982 BFD_ASSERT (s->contents != NULL);
8983 BFD_ASSERT (s->output_section != NULL);
8984
8985 if ((my_offset & 0x01) == 0x01)
8986 {
8987 if (sym_sec != NULL
8988 && sym_sec->owner != NULL
8989 && !INTERWORK_FLAG (sym_sec->owner))
8990 {
8991 _bfd_error_handler
8992 (_("%pB(%s): warning: interworking not enabled;"
8993 " first occurrence: %pB: %s call to %s"),
8994 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
8995
8996 return FALSE;
8997 }
8998
8999 --my_offset;
9000 myh->root.u.def.value = my_offset;
9001
9002 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9003 s->contents + my_offset);
9004
9005 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9006 s->contents + my_offset + 2);
9007
9008 ret_offset =
9009 /* Address of destination of the stub. */
9010 ((bfd_signed_vma) val)
9011 - ((bfd_signed_vma)
9012 /* Offset from the start of the current section
9013 to the start of the stubs. */
9014 (s->output_offset
9015 /* Offset of the start of this stub from the start of the stubs. */
9016 + my_offset
9017 /* Address of the start of the current section. */
9018 + s->output_section->vma)
9019 /* The branch instruction is 4 bytes into the stub. */
9020 + 4
9021 /* ARM branches work from the pc of the instruction + 8. */
9022 + 8);
9023
9024 put_arm_insn (globals, output_bfd,
9025 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9026 s->contents + my_offset + 4);
9027 }
9028
9029 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9030
9031 /* Now go back and fix up the original BL insn to point to here. */
9032 ret_offset =
9033 /* Address of where the stub is located. */
9034 (s->output_section->vma + s->output_offset + my_offset)
9035 /* Address of where the BL is located. */
9036 - (input_section->output_section->vma + input_section->output_offset
9037 + offset)
9038 /* Addend in the relocation. */
9039 - addend
9040 /* Biassing for PC-relative addressing. */
9041 - 8;
9042
9043 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9044
9045 return TRUE;
9046 }
9047
9048 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9049
9050 static struct elf_link_hash_entry *
9051 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9052 const char * name,
9053 bfd * input_bfd,
9054 bfd * output_bfd,
9055 asection * sym_sec,
9056 bfd_vma val,
9057 asection * s,
9058 char ** error_message)
9059 {
9060 bfd_vma my_offset;
9061 long int ret_offset;
9062 struct elf_link_hash_entry * myh;
9063 struct elf32_arm_link_hash_table * globals;
9064
9065 myh = find_arm_glue (info, name, error_message);
9066 if (myh == NULL)
9067 return NULL;
9068
9069 globals = elf32_arm_hash_table (info);
9070 BFD_ASSERT (globals != NULL);
9071 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9072
9073 my_offset = myh->root.u.def.value;
9074
9075 if ((my_offset & 0x01) == 0x01)
9076 {
9077 if (sym_sec != NULL
9078 && sym_sec->owner != NULL
9079 && !INTERWORK_FLAG (sym_sec->owner))
9080 {
9081 _bfd_error_handler
9082 (_("%pB(%s): warning: interworking not enabled;"
9083 " first occurrence: %pB: %s call to %s"),
9084 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9085 }
9086
9087 --my_offset;
9088 myh->root.u.def.value = my_offset;
9089
9090 if (bfd_link_pic (info)
9091 || globals->root.is_relocatable_executable
9092 || globals->pic_veneer)
9093 {
9094 /* For relocatable objects we can't use absolute addresses,
9095 so construct the address from a relative offset. */
9096 /* TODO: If the offset is small it's probably worth
9097 constructing the address with adds. */
9098 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9099 s->contents + my_offset);
9100 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9101 s->contents + my_offset + 4);
9102 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9103 s->contents + my_offset + 8);
9104 /* Adjust the offset by 4 for the position of the add,
9105 and 8 for the pipeline offset. */
9106 ret_offset = (val - (s->output_offset
9107 + s->output_section->vma
9108 + my_offset + 12))
9109 | 1;
9110 bfd_put_32 (output_bfd, ret_offset,
9111 s->contents + my_offset + 12);
9112 }
9113 else if (globals->use_blx)
9114 {
9115 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9116 s->contents + my_offset);
9117
9118 /* It's a thumb address. Add the low order bit. */
9119 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9120 s->contents + my_offset + 4);
9121 }
9122 else
9123 {
9124 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9125 s->contents + my_offset);
9126
9127 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9128 s->contents + my_offset + 4);
9129
9130 /* It's a thumb address. Add the low order bit. */
9131 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9132 s->contents + my_offset + 8);
9133
9134 my_offset += 12;
9135 }
9136 }
9137
9138 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9139
9140 return myh;
9141 }
9142
9143 /* Arm code calling a Thumb function. */
9144
9145 static int
9146 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9147 const char * name,
9148 bfd * input_bfd,
9149 bfd * output_bfd,
9150 asection * input_section,
9151 bfd_byte * hit_data,
9152 asection * sym_sec,
9153 bfd_vma offset,
9154 bfd_signed_vma addend,
9155 bfd_vma val,
9156 char **error_message)
9157 {
9158 unsigned long int tmp;
9159 bfd_vma my_offset;
9160 asection * s;
9161 long int ret_offset;
9162 struct elf_link_hash_entry * myh;
9163 struct elf32_arm_link_hash_table * globals;
9164
9165 globals = elf32_arm_hash_table (info);
9166 BFD_ASSERT (globals != NULL);
9167 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9168
9169 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9170 ARM2THUMB_GLUE_SECTION_NAME);
9171 BFD_ASSERT (s != NULL);
9172 BFD_ASSERT (s->contents != NULL);
9173 BFD_ASSERT (s->output_section != NULL);
9174
9175 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9176 sym_sec, val, s, error_message);
9177 if (!myh)
9178 return FALSE;
9179
9180 my_offset = myh->root.u.def.value;
9181 tmp = bfd_get_32 (input_bfd, hit_data);
9182 tmp = tmp & 0xFF000000;
9183
9184 /* Somehow these are both 4 too far, so subtract 8. */
9185 ret_offset = (s->output_offset
9186 + my_offset
9187 + s->output_section->vma
9188 - (input_section->output_offset
9189 + input_section->output_section->vma
9190 + offset + addend)
9191 - 8);
9192
9193 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9194
9195 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9196
9197 return TRUE;
9198 }
9199
9200 /* Populate Arm stub for an exported Thumb function. */
9201
9202 static bfd_boolean
9203 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9204 {
9205 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9206 asection * s;
9207 struct elf_link_hash_entry * myh;
9208 struct elf32_arm_link_hash_entry *eh;
9209 struct elf32_arm_link_hash_table * globals;
9210 asection *sec;
9211 bfd_vma val;
9212 char *error_message;
9213
9214 eh = elf32_arm_hash_entry (h);
9215 /* Allocate stubs for exported Thumb functions on v4t. */
9216 if (eh->export_glue == NULL)
9217 return TRUE;
9218
9219 globals = elf32_arm_hash_table (info);
9220 BFD_ASSERT (globals != NULL);
9221 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9222
9223 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9224 ARM2THUMB_GLUE_SECTION_NAME);
9225 BFD_ASSERT (s != NULL);
9226 BFD_ASSERT (s->contents != NULL);
9227 BFD_ASSERT (s->output_section != NULL);
9228
9229 sec = eh->export_glue->root.u.def.section;
9230
9231 BFD_ASSERT (sec->output_section != NULL);
9232
9233 val = eh->export_glue->root.u.def.value + sec->output_offset
9234 + sec->output_section->vma;
9235
9236 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9237 h->root.u.def.section->owner,
9238 globals->obfd, sec, val, s,
9239 &error_message);
9240 BFD_ASSERT (myh);
9241 return TRUE;
9242 }
9243
9244 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9245
9246 static bfd_vma
9247 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9248 {
9249 bfd_byte *p;
9250 bfd_vma glue_addr;
9251 asection *s;
9252 struct elf32_arm_link_hash_table *globals;
9253
9254 globals = elf32_arm_hash_table (info);
9255 BFD_ASSERT (globals != NULL);
9256 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9257
9258 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9259 ARM_BX_GLUE_SECTION_NAME);
9260 BFD_ASSERT (s != NULL);
9261 BFD_ASSERT (s->contents != NULL);
9262 BFD_ASSERT (s->output_section != NULL);
9263
9264 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9265
9266 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9267
9268 if ((globals->bx_glue_offset[reg] & 1) == 0)
9269 {
9270 p = s->contents + glue_addr;
9271 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9272 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9273 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9274 globals->bx_glue_offset[reg] |= 1;
9275 }
9276
9277 return glue_addr + s->output_section->vma + s->output_offset;
9278 }
9279
9280 /* Generate Arm stubs for exported Thumb symbols. */
9281 static void
9282 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9283 struct bfd_link_info *link_info)
9284 {
9285 struct elf32_arm_link_hash_table * globals;
9286
9287 if (link_info == NULL)
9288 /* Ignore this if we are not called by the ELF backend linker. */
9289 return;
9290
9291 globals = elf32_arm_hash_table (link_info);
9292 if (globals == NULL)
9293 return;
9294
9295 /* If blx is available then exported Thumb symbols are OK and there is
9296 nothing to do. */
9297 if (globals->use_blx)
9298 return;
9299
9300 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9301 link_info);
9302 }
9303
9304 /* Reserve space for COUNT dynamic relocations in relocation selection
9305 SRELOC. */
9306
9307 static void
9308 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9309 bfd_size_type count)
9310 {
9311 struct elf32_arm_link_hash_table *htab;
9312
9313 htab = elf32_arm_hash_table (info);
9314 BFD_ASSERT (htab->root.dynamic_sections_created);
9315 if (sreloc == NULL)
9316 abort ();
9317 sreloc->size += RELOC_SIZE (htab) * count;
9318 }
9319
9320 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9321 dynamic, the relocations should go in SRELOC, otherwise they should
9322 go in the special .rel.iplt section. */
9323
9324 static void
9325 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9326 bfd_size_type count)
9327 {
9328 struct elf32_arm_link_hash_table *htab;
9329
9330 htab = elf32_arm_hash_table (info);
9331 if (!htab->root.dynamic_sections_created)
9332 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9333 else
9334 {
9335 BFD_ASSERT (sreloc != NULL);
9336 sreloc->size += RELOC_SIZE (htab) * count;
9337 }
9338 }
9339
9340 /* Add relocation REL to the end of relocation section SRELOC. */
9341
9342 static void
9343 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9344 asection *sreloc, Elf_Internal_Rela *rel)
9345 {
9346 bfd_byte *loc;
9347 struct elf32_arm_link_hash_table *htab;
9348
9349 htab = elf32_arm_hash_table (info);
9350 if (!htab->root.dynamic_sections_created
9351 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9352 sreloc = htab->root.irelplt;
9353 if (sreloc == NULL)
9354 abort ();
9355 loc = sreloc->contents;
9356 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9357 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9358 abort ();
9359 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9360 }
9361
9362 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9363 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9364 to .plt. */
9365
9366 static void
9367 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9368 bfd_boolean is_iplt_entry,
9369 union gotplt_union *root_plt,
9370 struct arm_plt_info *arm_plt)
9371 {
9372 struct elf32_arm_link_hash_table *htab;
9373 asection *splt;
9374 asection *sgotplt;
9375
9376 htab = elf32_arm_hash_table (info);
9377
9378 if (is_iplt_entry)
9379 {
9380 splt = htab->root.iplt;
9381 sgotplt = htab->root.igotplt;
9382
9383 /* NaCl uses a special first entry in .iplt too. */
9384 if (htab->nacl_p && splt->size == 0)
9385 splt->size += htab->plt_header_size;
9386
9387 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9388 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9389 }
9390 else
9391 {
9392 splt = htab->root.splt;
9393 sgotplt = htab->root.sgotplt;
9394
9395 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9396 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9397
9398 /* If this is the first .plt entry, make room for the special
9399 first entry. */
9400 if (splt->size == 0)
9401 splt->size += htab->plt_header_size;
9402
9403 htab->next_tls_desc_index++;
9404 }
9405
9406 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9407 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9408 splt->size += PLT_THUMB_STUB_SIZE;
9409 root_plt->offset = splt->size;
9410 splt->size += htab->plt_entry_size;
9411
9412 if (!htab->symbian_p)
9413 {
9414 /* We also need to make an entry in the .got.plt section, which
9415 will be placed in the .got section by the linker script. */
9416 if (is_iplt_entry)
9417 arm_plt->got_offset = sgotplt->size;
9418 else
9419 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9420 sgotplt->size += 4;
9421 }
9422 }
9423
9424 static bfd_vma
9425 arm_movw_immediate (bfd_vma value)
9426 {
9427 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9428 }
9429
9430 static bfd_vma
9431 arm_movt_immediate (bfd_vma value)
9432 {
9433 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9434 }
9435
9436 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9437 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9438 Otherwise, DYNINDX is the index of the symbol in the dynamic
9439 symbol table and SYM_VALUE is undefined.
9440
9441 ROOT_PLT points to the offset of the PLT entry from the start of its
9442 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9443 bookkeeping information.
9444
9445 Returns FALSE if there was a problem. */
9446
9447 static bfd_boolean
9448 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9449 union gotplt_union *root_plt,
9450 struct arm_plt_info *arm_plt,
9451 int dynindx, bfd_vma sym_value)
9452 {
9453 struct elf32_arm_link_hash_table *htab;
9454 asection *sgot;
9455 asection *splt;
9456 asection *srel;
9457 bfd_byte *loc;
9458 bfd_vma plt_index;
9459 Elf_Internal_Rela rel;
9460 bfd_vma plt_header_size;
9461 bfd_vma got_header_size;
9462
9463 htab = elf32_arm_hash_table (info);
9464
9465 /* Pick the appropriate sections and sizes. */
9466 if (dynindx == -1)
9467 {
9468 splt = htab->root.iplt;
9469 sgot = htab->root.igotplt;
9470 srel = htab->root.irelplt;
9471
9472 /* There are no reserved entries in .igot.plt, and no special
9473 first entry in .iplt. */
9474 got_header_size = 0;
9475 plt_header_size = 0;
9476 }
9477 else
9478 {
9479 splt = htab->root.splt;
9480 sgot = htab->root.sgotplt;
9481 srel = htab->root.srelplt;
9482
9483 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9484 plt_header_size = htab->plt_header_size;
9485 }
9486 BFD_ASSERT (splt != NULL && srel != NULL);
9487
9488 /* Fill in the entry in the procedure linkage table. */
9489 if (htab->symbian_p)
9490 {
9491 BFD_ASSERT (dynindx >= 0);
9492 put_arm_insn (htab, output_bfd,
9493 elf32_arm_symbian_plt_entry[0],
9494 splt->contents + root_plt->offset);
9495 bfd_put_32 (output_bfd,
9496 elf32_arm_symbian_plt_entry[1],
9497 splt->contents + root_plt->offset + 4);
9498
9499 /* Fill in the entry in the .rel.plt section. */
9500 rel.r_offset = (splt->output_section->vma
9501 + splt->output_offset
9502 + root_plt->offset + 4);
9503 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9504
9505 /* Get the index in the procedure linkage table which
9506 corresponds to this symbol. This is the index of this symbol
9507 in all the symbols for which we are making plt entries. The
9508 first entry in the procedure linkage table is reserved. */
9509 plt_index = ((root_plt->offset - plt_header_size)
9510 / htab->plt_entry_size);
9511 }
9512 else
9513 {
9514 bfd_vma got_offset, got_address, plt_address;
9515 bfd_vma got_displacement, initial_got_entry;
9516 bfd_byte * ptr;
9517
9518 BFD_ASSERT (sgot != NULL);
9519
9520 /* Get the offset into the .(i)got.plt table of the entry that
9521 corresponds to this function. */
9522 got_offset = (arm_plt->got_offset & -2);
9523
9524 /* Get the index in the procedure linkage table which
9525 corresponds to this symbol. This is the index of this symbol
9526 in all the symbols for which we are making plt entries.
9527 After the reserved .got.plt entries, all symbols appear in
9528 the same order as in .plt. */
9529 plt_index = (got_offset - got_header_size) / 4;
9530
9531 /* Calculate the address of the GOT entry. */
9532 got_address = (sgot->output_section->vma
9533 + sgot->output_offset
9534 + got_offset);
9535
9536 /* ...and the address of the PLT entry. */
9537 plt_address = (splt->output_section->vma
9538 + splt->output_offset
9539 + root_plt->offset);
9540
9541 ptr = splt->contents + root_plt->offset;
9542 if (htab->vxworks_p && bfd_link_pic (info))
9543 {
9544 unsigned int i;
9545 bfd_vma val;
9546
9547 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9548 {
9549 val = elf32_arm_vxworks_shared_plt_entry[i];
9550 if (i == 2)
9551 val |= got_address - sgot->output_section->vma;
9552 if (i == 5)
9553 val |= plt_index * RELOC_SIZE (htab);
9554 if (i == 2 || i == 5)
9555 bfd_put_32 (output_bfd, val, ptr);
9556 else
9557 put_arm_insn (htab, output_bfd, val, ptr);
9558 }
9559 }
9560 else if (htab->vxworks_p)
9561 {
9562 unsigned int i;
9563 bfd_vma val;
9564
9565 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9566 {
9567 val = elf32_arm_vxworks_exec_plt_entry[i];
9568 if (i == 2)
9569 val |= got_address;
9570 if (i == 4)
9571 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9572 if (i == 5)
9573 val |= plt_index * RELOC_SIZE (htab);
9574 if (i == 2 || i == 5)
9575 bfd_put_32 (output_bfd, val, ptr);
9576 else
9577 put_arm_insn (htab, output_bfd, val, ptr);
9578 }
9579
9580 loc = (htab->srelplt2->contents
9581 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9582
9583 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9584 referencing the GOT for this PLT entry. */
9585 rel.r_offset = plt_address + 8;
9586 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9587 rel.r_addend = got_offset;
9588 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9589 loc += RELOC_SIZE (htab);
9590
9591 /* Create the R_ARM_ABS32 relocation referencing the
9592 beginning of the PLT for this GOT entry. */
9593 rel.r_offset = got_address;
9594 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9595 rel.r_addend = 0;
9596 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9597 }
9598 else if (htab->nacl_p)
9599 {
9600 /* Calculate the displacement between the PLT slot and the
9601 common tail that's part of the special initial PLT slot. */
9602 int32_t tail_displacement
9603 = ((splt->output_section->vma + splt->output_offset
9604 + ARM_NACL_PLT_TAIL_OFFSET)
9605 - (plt_address + htab->plt_entry_size + 4));
9606 BFD_ASSERT ((tail_displacement & 3) == 0);
9607 tail_displacement >>= 2;
9608
9609 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9610 || (-tail_displacement & 0xff000000) == 0);
9611
9612 /* Calculate the displacement between the PLT slot and the entry
9613 in the GOT. The offset accounts for the value produced by
9614 adding to pc in the penultimate instruction of the PLT stub. */
9615 got_displacement = (got_address
9616 - (plt_address + htab->plt_entry_size));
9617
9618 /* NaCl does not support interworking at all. */
9619 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9620
9621 put_arm_insn (htab, output_bfd,
9622 elf32_arm_nacl_plt_entry[0]
9623 | arm_movw_immediate (got_displacement),
9624 ptr + 0);
9625 put_arm_insn (htab, output_bfd,
9626 elf32_arm_nacl_plt_entry[1]
9627 | arm_movt_immediate (got_displacement),
9628 ptr + 4);
9629 put_arm_insn (htab, output_bfd,
9630 elf32_arm_nacl_plt_entry[2],
9631 ptr + 8);
9632 put_arm_insn (htab, output_bfd,
9633 elf32_arm_nacl_plt_entry[3]
9634 | (tail_displacement & 0x00ffffff),
9635 ptr + 12);
9636 }
9637 else if (using_thumb_only (htab))
9638 {
9639 /* PR ld/16017: Generate thumb only PLT entries. */
9640 if (!using_thumb2 (htab))
9641 {
9642 /* FIXME: We ought to be able to generate thumb-1 PLT
9643 instructions... */
9644 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9645 output_bfd);
9646 return FALSE;
9647 }
9648
9649 /* Calculate the displacement between the PLT slot and the entry in
9650 the GOT. The 12-byte offset accounts for the value produced by
9651 adding to pc in the 3rd instruction of the PLT stub. */
9652 got_displacement = got_address - (plt_address + 12);
9653
9654 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9655 instead of 'put_thumb_insn'. */
9656 put_arm_insn (htab, output_bfd,
9657 elf32_thumb2_plt_entry[0]
9658 | ((got_displacement & 0x000000ff) << 16)
9659 | ((got_displacement & 0x00000700) << 20)
9660 | ((got_displacement & 0x00000800) >> 1)
9661 | ((got_displacement & 0x0000f000) >> 12),
9662 ptr + 0);
9663 put_arm_insn (htab, output_bfd,
9664 elf32_thumb2_plt_entry[1]
9665 | ((got_displacement & 0x00ff0000) )
9666 | ((got_displacement & 0x07000000) << 4)
9667 | ((got_displacement & 0x08000000) >> 17)
9668 | ((got_displacement & 0xf0000000) >> 28),
9669 ptr + 4);
9670 put_arm_insn (htab, output_bfd,
9671 elf32_thumb2_plt_entry[2],
9672 ptr + 8);
9673 put_arm_insn (htab, output_bfd,
9674 elf32_thumb2_plt_entry[3],
9675 ptr + 12);
9676 }
9677 else
9678 {
9679 /* Calculate the displacement between the PLT slot and the
9680 entry in the GOT. The eight-byte offset accounts for the
9681 value produced by adding to pc in the first instruction
9682 of the PLT stub. */
9683 got_displacement = got_address - (plt_address + 8);
9684
9685 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9686 {
9687 put_thumb_insn (htab, output_bfd,
9688 elf32_arm_plt_thumb_stub[0], ptr - 4);
9689 put_thumb_insn (htab, output_bfd,
9690 elf32_arm_plt_thumb_stub[1], ptr - 2);
9691 }
9692
9693 if (!elf32_arm_use_long_plt_entry)
9694 {
9695 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9696
9697 put_arm_insn (htab, output_bfd,
9698 elf32_arm_plt_entry_short[0]
9699 | ((got_displacement & 0x0ff00000) >> 20),
9700 ptr + 0);
9701 put_arm_insn (htab, output_bfd,
9702 elf32_arm_plt_entry_short[1]
9703 | ((got_displacement & 0x000ff000) >> 12),
9704 ptr+ 4);
9705 put_arm_insn (htab, output_bfd,
9706 elf32_arm_plt_entry_short[2]
9707 | (got_displacement & 0x00000fff),
9708 ptr + 8);
9709 #ifdef FOUR_WORD_PLT
9710 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9711 #endif
9712 }
9713 else
9714 {
9715 put_arm_insn (htab, output_bfd,
9716 elf32_arm_plt_entry_long[0]
9717 | ((got_displacement & 0xf0000000) >> 28),
9718 ptr + 0);
9719 put_arm_insn (htab, output_bfd,
9720 elf32_arm_plt_entry_long[1]
9721 | ((got_displacement & 0x0ff00000) >> 20),
9722 ptr + 4);
9723 put_arm_insn (htab, output_bfd,
9724 elf32_arm_plt_entry_long[2]
9725 | ((got_displacement & 0x000ff000) >> 12),
9726 ptr+ 8);
9727 put_arm_insn (htab, output_bfd,
9728 elf32_arm_plt_entry_long[3]
9729 | (got_displacement & 0x00000fff),
9730 ptr + 12);
9731 }
9732 }
9733
9734 /* Fill in the entry in the .rel(a).(i)plt section. */
9735 rel.r_offset = got_address;
9736 rel.r_addend = 0;
9737 if (dynindx == -1)
9738 {
9739 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9740 The dynamic linker or static executable then calls SYM_VALUE
9741 to determine the correct run-time value of the .igot.plt entry. */
9742 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9743 initial_got_entry = sym_value;
9744 }
9745 else
9746 {
9747 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9748 initial_got_entry = (splt->output_section->vma
9749 + splt->output_offset);
9750 }
9751
9752 /* Fill in the entry in the global offset table. */
9753 bfd_put_32 (output_bfd, initial_got_entry,
9754 sgot->contents + got_offset);
9755 }
9756
9757 if (dynindx == -1)
9758 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9759 else
9760 {
9761 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9762 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9763 }
9764
9765 return TRUE;
9766 }
9767
9768 /* Some relocations map to different relocations depending on the
9769 target. Return the real relocation. */
9770
9771 static int
9772 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9773 int r_type)
9774 {
9775 switch (r_type)
9776 {
9777 case R_ARM_TARGET1:
9778 if (globals->target1_is_rel)
9779 return R_ARM_REL32;
9780 else
9781 return R_ARM_ABS32;
9782
9783 case R_ARM_TARGET2:
9784 return globals->target2_reloc;
9785
9786 default:
9787 return r_type;
9788 }
9789 }
9790
9791 /* Return the base VMA address which should be subtracted from real addresses
9792 when resolving @dtpoff relocation.
9793 This is PT_TLS segment p_vaddr. */
9794
9795 static bfd_vma
9796 dtpoff_base (struct bfd_link_info *info)
9797 {
9798 /* If tls_sec is NULL, we should have signalled an error already. */
9799 if (elf_hash_table (info)->tls_sec == NULL)
9800 return 0;
9801 return elf_hash_table (info)->tls_sec->vma;
9802 }
9803
9804 /* Return the relocation value for @tpoff relocation
9805 if STT_TLS virtual address is ADDRESS. */
9806
9807 static bfd_vma
9808 tpoff (struct bfd_link_info *info, bfd_vma address)
9809 {
9810 struct elf_link_hash_table *htab = elf_hash_table (info);
9811 bfd_vma base;
9812
9813 /* If tls_sec is NULL, we should have signalled an error already. */
9814 if (htab->tls_sec == NULL)
9815 return 0;
9816 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9817 return address - htab->tls_sec->vma + base;
9818 }
9819
9820 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9821 VALUE is the relocation value. */
9822
9823 static bfd_reloc_status_type
9824 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9825 {
9826 if (value > 0xfff)
9827 return bfd_reloc_overflow;
9828
9829 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9830 bfd_put_32 (abfd, value, data);
9831 return bfd_reloc_ok;
9832 }
9833
9834 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9835 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9836 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9837
9838 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9839 is to then call final_link_relocate. Return other values in the
9840 case of error.
9841
9842 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9843 the pre-relaxed code. It would be nice if the relocs were updated
9844 to match the optimization. */
9845
9846 static bfd_reloc_status_type
9847 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9848 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9849 Elf_Internal_Rela *rel, unsigned long is_local)
9850 {
9851 unsigned long insn;
9852
9853 switch (ELF32_R_TYPE (rel->r_info))
9854 {
9855 default:
9856 return bfd_reloc_notsupported;
9857
9858 case R_ARM_TLS_GOTDESC:
9859 if (is_local)
9860 insn = 0;
9861 else
9862 {
9863 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9864 if (insn & 1)
9865 insn -= 5; /* THUMB */
9866 else
9867 insn -= 8; /* ARM */
9868 }
9869 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9870 return bfd_reloc_continue;
9871
9872 case R_ARM_THM_TLS_DESCSEQ:
9873 /* Thumb insn. */
9874 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9875 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9876 {
9877 if (is_local)
9878 /* nop */
9879 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9880 }
9881 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9882 {
9883 if (is_local)
9884 /* nop */
9885 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9886 else
9887 /* ldr rx,[ry] */
9888 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9889 }
9890 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9891 {
9892 if (is_local)
9893 /* nop */
9894 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9895 else
9896 /* mov r0, rx */
9897 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9898 contents + rel->r_offset);
9899 }
9900 else
9901 {
9902 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9903 /* It's a 32 bit instruction, fetch the rest of it for
9904 error generation. */
9905 insn = (insn << 16)
9906 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9907 _bfd_error_handler
9908 /* xgettext:c-format */
9909 (_("%pB(%pA+%#" PRIx64 "): "
9910 "unexpected %s instruction '%#lx' in TLS trampoline"),
9911 input_bfd, input_sec, (uint64_t) rel->r_offset,
9912 "Thumb", insn);
9913 return bfd_reloc_notsupported;
9914 }
9915 break;
9916
9917 case R_ARM_TLS_DESCSEQ:
9918 /* arm insn. */
9919 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9920 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9921 {
9922 if (is_local)
9923 /* mov rx, ry */
9924 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9925 contents + rel->r_offset);
9926 }
9927 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9928 {
9929 if (is_local)
9930 /* nop */
9931 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9932 else
9933 /* ldr rx,[ry] */
9934 bfd_put_32 (input_bfd, insn & 0xfffff000,
9935 contents + rel->r_offset);
9936 }
9937 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9938 {
9939 if (is_local)
9940 /* nop */
9941 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9942 else
9943 /* mov r0, rx */
9944 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9945 contents + rel->r_offset);
9946 }
9947 else
9948 {
9949 _bfd_error_handler
9950 /* xgettext:c-format */
9951 (_("%pB(%pA+%#" PRIx64 "): "
9952 "unexpected %s instruction '%#lx' in TLS trampoline"),
9953 input_bfd, input_sec, (uint64_t) rel->r_offset,
9954 "ARM", insn);
9955 return bfd_reloc_notsupported;
9956 }
9957 break;
9958
9959 case R_ARM_TLS_CALL:
9960 /* GD->IE relaxation, turn the instruction into 'nop' or
9961 'ldr r0, [pc,r0]' */
9962 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9963 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9964 break;
9965
9966 case R_ARM_THM_TLS_CALL:
9967 /* GD->IE relaxation. */
9968 if (!is_local)
9969 /* add r0,pc; ldr r0, [r0] */
9970 insn = 0x44786800;
9971 else if (using_thumb2 (globals))
9972 /* nop.w */
9973 insn = 0xf3af8000;
9974 else
9975 /* nop; nop */
9976 insn = 0xbf00bf00;
9977
9978 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9979 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9980 break;
9981 }
9982 return bfd_reloc_ok;
9983 }
9984
9985 /* For a given value of n, calculate the value of G_n as required to
9986 deal with group relocations. We return it in the form of an
9987 encoded constant-and-rotation, together with the final residual. If n is
9988 specified as less than zero, then final_residual is filled with the
9989 input value and no further action is performed. */
9990
9991 static bfd_vma
9992 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9993 {
9994 int current_n;
9995 bfd_vma g_n;
9996 bfd_vma encoded_g_n = 0;
9997 bfd_vma residual = value; /* Also known as Y_n. */
9998
9999 for (current_n = 0; current_n <= n; current_n++)
10000 {
10001 int shift;
10002
10003 /* Calculate which part of the value to mask. */
10004 if (residual == 0)
10005 shift = 0;
10006 else
10007 {
10008 int msb;
10009
10010 /* Determine the most significant bit in the residual and
10011 align the resulting value to a 2-bit boundary. */
10012 for (msb = 30; msb >= 0; msb -= 2)
10013 if (residual & (3 << msb))
10014 break;
10015
10016 /* The desired shift is now (msb - 6), or zero, whichever
10017 is the greater. */
10018 shift = msb - 6;
10019 if (shift < 0)
10020 shift = 0;
10021 }
10022
10023 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10024 g_n = residual & (0xff << shift);
10025 encoded_g_n = (g_n >> shift)
10026 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10027
10028 /* Calculate the residual for the next time around. */
10029 residual &= ~g_n;
10030 }
10031
10032 *final_residual = residual;
10033
10034 return encoded_g_n;
10035 }
10036
10037 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10038 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10039
10040 static int
10041 identify_add_or_sub (bfd_vma insn)
10042 {
10043 int opcode = insn & 0x1e00000;
10044
10045 if (opcode == 1 << 23) /* ADD */
10046 return 1;
10047
10048 if (opcode == 1 << 22) /* SUB */
10049 return -1;
10050
10051 return 0;
10052 }
10053
10054 /* Perform a relocation as part of a final link. */
10055
10056 static bfd_reloc_status_type
10057 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10058 bfd * input_bfd,
10059 bfd * output_bfd,
10060 asection * input_section,
10061 bfd_byte * contents,
10062 Elf_Internal_Rela * rel,
10063 bfd_vma value,
10064 struct bfd_link_info * info,
10065 asection * sym_sec,
10066 const char * sym_name,
10067 unsigned char st_type,
10068 enum arm_st_branch_type branch_type,
10069 struct elf_link_hash_entry * h,
10070 bfd_boolean * unresolved_reloc_p,
10071 char ** error_message)
10072 {
10073 unsigned long r_type = howto->type;
10074 unsigned long r_symndx;
10075 bfd_byte * hit_data = contents + rel->r_offset;
10076 bfd_vma * local_got_offsets;
10077 bfd_vma * local_tlsdesc_gotents;
10078 asection * sgot;
10079 asection * splt;
10080 asection * sreloc = NULL;
10081 asection * srelgot;
10082 bfd_vma addend;
10083 bfd_signed_vma signed_addend;
10084 unsigned char dynreloc_st_type;
10085 bfd_vma dynreloc_value;
10086 struct elf32_arm_link_hash_table * globals;
10087 struct elf32_arm_link_hash_entry *eh;
10088 union gotplt_union *root_plt;
10089 struct arm_plt_info *arm_plt;
10090 bfd_vma plt_offset;
10091 bfd_vma gotplt_offset;
10092 bfd_boolean has_iplt_entry;
10093 bfd_boolean resolved_to_zero;
10094
10095 globals = elf32_arm_hash_table (info);
10096 if (globals == NULL)
10097 return bfd_reloc_notsupported;
10098
10099 BFD_ASSERT (is_arm_elf (input_bfd));
10100 BFD_ASSERT (howto != NULL);
10101
10102 /* Some relocation types map to different relocations depending on the
10103 target. We pick the right one here. */
10104 r_type = arm_real_reloc_type (globals, r_type);
10105
10106 /* It is possible to have linker relaxations on some TLS access
10107 models. Update our information here. */
10108 r_type = elf32_arm_tls_transition (info, r_type, h);
10109
10110 if (r_type != howto->type)
10111 howto = elf32_arm_howto_from_type (r_type);
10112
10113 eh = (struct elf32_arm_link_hash_entry *) h;
10114 sgot = globals->root.sgot;
10115 local_got_offsets = elf_local_got_offsets (input_bfd);
10116 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10117
10118 if (globals->root.dynamic_sections_created)
10119 srelgot = globals->root.srelgot;
10120 else
10121 srelgot = NULL;
10122
10123 r_symndx = ELF32_R_SYM (rel->r_info);
10124
10125 if (globals->use_rel)
10126 {
10127 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10128
10129 if (addend & ((howto->src_mask + 1) >> 1))
10130 {
10131 signed_addend = -1;
10132 signed_addend &= ~ howto->src_mask;
10133 signed_addend |= addend;
10134 }
10135 else
10136 signed_addend = addend;
10137 }
10138 else
10139 addend = signed_addend = rel->r_addend;
10140
10141 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10142 are resolving a function call relocation. */
10143 if (using_thumb_only (globals)
10144 && (r_type == R_ARM_THM_CALL
10145 || r_type == R_ARM_THM_JUMP24)
10146 && branch_type == ST_BRANCH_TO_ARM)
10147 branch_type = ST_BRANCH_TO_THUMB;
10148
10149 /* Record the symbol information that should be used in dynamic
10150 relocations. */
10151 dynreloc_st_type = st_type;
10152 dynreloc_value = value;
10153 if (branch_type == ST_BRANCH_TO_THUMB)
10154 dynreloc_value |= 1;
10155
10156 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10157 VALUE appropriately for relocations that we resolve at link time. */
10158 has_iplt_entry = FALSE;
10159 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10160 &arm_plt)
10161 && root_plt->offset != (bfd_vma) -1)
10162 {
10163 plt_offset = root_plt->offset;
10164 gotplt_offset = arm_plt->got_offset;
10165
10166 if (h == NULL || eh->is_iplt)
10167 {
10168 has_iplt_entry = TRUE;
10169 splt = globals->root.iplt;
10170
10171 /* Populate .iplt entries here, because not all of them will
10172 be seen by finish_dynamic_symbol. The lower bit is set if
10173 we have already populated the entry. */
10174 if (plt_offset & 1)
10175 plt_offset--;
10176 else
10177 {
10178 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10179 -1, dynreloc_value))
10180 root_plt->offset |= 1;
10181 else
10182 return bfd_reloc_notsupported;
10183 }
10184
10185 /* Static relocations always resolve to the .iplt entry. */
10186 st_type = STT_FUNC;
10187 value = (splt->output_section->vma
10188 + splt->output_offset
10189 + plt_offset);
10190 branch_type = ST_BRANCH_TO_ARM;
10191
10192 /* If there are non-call relocations that resolve to the .iplt
10193 entry, then all dynamic ones must too. */
10194 if (arm_plt->noncall_refcount != 0)
10195 {
10196 dynreloc_st_type = st_type;
10197 dynreloc_value = value;
10198 }
10199 }
10200 else
10201 /* We populate the .plt entry in finish_dynamic_symbol. */
10202 splt = globals->root.splt;
10203 }
10204 else
10205 {
10206 splt = NULL;
10207 plt_offset = (bfd_vma) -1;
10208 gotplt_offset = (bfd_vma) -1;
10209 }
10210
10211 resolved_to_zero = (h != NULL
10212 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10213
10214 switch (r_type)
10215 {
10216 case R_ARM_NONE:
10217 /* We don't need to find a value for this symbol. It's just a
10218 marker. */
10219 *unresolved_reloc_p = FALSE;
10220 return bfd_reloc_ok;
10221
10222 case R_ARM_ABS12:
10223 if (!globals->vxworks_p)
10224 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10225 /* Fall through. */
10226
10227 case R_ARM_PC24:
10228 case R_ARM_ABS32:
10229 case R_ARM_ABS32_NOI:
10230 case R_ARM_REL32:
10231 case R_ARM_REL32_NOI:
10232 case R_ARM_CALL:
10233 case R_ARM_JUMP24:
10234 case R_ARM_XPC25:
10235 case R_ARM_PREL31:
10236 case R_ARM_PLT32:
10237 /* Handle relocations which should use the PLT entry. ABS32/REL32
10238 will use the symbol's value, which may point to a PLT entry, but we
10239 don't need to handle that here. If we created a PLT entry, all
10240 branches in this object should go to it, except if the PLT is too
10241 far away, in which case a long branch stub should be inserted. */
10242 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10243 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10244 && r_type != R_ARM_CALL
10245 && r_type != R_ARM_JUMP24
10246 && r_type != R_ARM_PLT32)
10247 && plt_offset != (bfd_vma) -1)
10248 {
10249 /* If we've created a .plt section, and assigned a PLT entry
10250 to this function, it must either be a STT_GNU_IFUNC reference
10251 or not be known to bind locally. In other cases, we should
10252 have cleared the PLT entry by now. */
10253 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10254
10255 value = (splt->output_section->vma
10256 + splt->output_offset
10257 + plt_offset);
10258 *unresolved_reloc_p = FALSE;
10259 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10260 contents, rel->r_offset, value,
10261 rel->r_addend);
10262 }
10263
10264 /* When generating a shared object or relocatable executable, these
10265 relocations are copied into the output file to be resolved at
10266 run time. */
10267 if ((bfd_link_pic (info)
10268 || globals->root.is_relocatable_executable
10269 || globals->fdpic_p)
10270 && (input_section->flags & SEC_ALLOC)
10271 && !(globals->vxworks_p
10272 && strcmp (input_section->output_section->name,
10273 ".tls_vars") == 0)
10274 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10275 || !SYMBOL_CALLS_LOCAL (info, h))
10276 && !(input_bfd == globals->stub_bfd
10277 && strstr (input_section->name, STUB_SUFFIX))
10278 && (h == NULL
10279 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10280 && !resolved_to_zero)
10281 || h->root.type != bfd_link_hash_undefweak)
10282 && r_type != R_ARM_PC24
10283 && r_type != R_ARM_CALL
10284 && r_type != R_ARM_JUMP24
10285 && r_type != R_ARM_PREL31
10286 && r_type != R_ARM_PLT32)
10287 {
10288 Elf_Internal_Rela outrel;
10289 bfd_boolean skip, relocate;
10290 int isrofixup = 0;
10291
10292 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10293 && !h->def_regular)
10294 {
10295 char *v = _("shared object");
10296
10297 if (bfd_link_executable (info))
10298 v = _("PIE executable");
10299
10300 _bfd_error_handler
10301 (_("%pB: relocation %s against external or undefined symbol `%s'"
10302 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10303 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10304 return bfd_reloc_notsupported;
10305 }
10306
10307 *unresolved_reloc_p = FALSE;
10308
10309 if (sreloc == NULL && globals->root.dynamic_sections_created)
10310 {
10311 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10312 ! globals->use_rel);
10313
10314 if (sreloc == NULL)
10315 return bfd_reloc_notsupported;
10316 }
10317
10318 skip = FALSE;
10319 relocate = FALSE;
10320
10321 outrel.r_addend = addend;
10322 outrel.r_offset =
10323 _bfd_elf_section_offset (output_bfd, info, input_section,
10324 rel->r_offset);
10325 if (outrel.r_offset == (bfd_vma) -1)
10326 skip = TRUE;
10327 else if (outrel.r_offset == (bfd_vma) -2)
10328 skip = TRUE, relocate = TRUE;
10329 outrel.r_offset += (input_section->output_section->vma
10330 + input_section->output_offset);
10331
10332 if (skip)
10333 memset (&outrel, 0, sizeof outrel);
10334 else if (h != NULL
10335 && h->dynindx != -1
10336 && (!bfd_link_pic (info)
10337 || !(bfd_link_pie (info)
10338 || SYMBOLIC_BIND (info, h))
10339 || !h->def_regular))
10340 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10341 else
10342 {
10343 int symbol;
10344
10345 /* This symbol is local, or marked to become local. */
10346 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10347 || (globals->fdpic_p && !bfd_link_pic(info)));
10348 if (globals->symbian_p)
10349 {
10350 asection *osec;
10351
10352 /* On Symbian OS, the data segment and text segement
10353 can be relocated independently. Therefore, we
10354 must indicate the segment to which this
10355 relocation is relative. The BPABI allows us to
10356 use any symbol in the right segment; we just use
10357 the section symbol as it is convenient. (We
10358 cannot use the symbol given by "h" directly as it
10359 will not appear in the dynamic symbol table.)
10360
10361 Note that the dynamic linker ignores the section
10362 symbol value, so we don't subtract osec->vma
10363 from the emitted reloc addend. */
10364 if (sym_sec)
10365 osec = sym_sec->output_section;
10366 else
10367 osec = input_section->output_section;
10368 symbol = elf_section_data (osec)->dynindx;
10369 if (symbol == 0)
10370 {
10371 struct elf_link_hash_table *htab = elf_hash_table (info);
10372
10373 if ((osec->flags & SEC_READONLY) == 0
10374 && htab->data_index_section != NULL)
10375 osec = htab->data_index_section;
10376 else
10377 osec = htab->text_index_section;
10378 symbol = elf_section_data (osec)->dynindx;
10379 }
10380 BFD_ASSERT (symbol != 0);
10381 }
10382 else
10383 /* On SVR4-ish systems, the dynamic loader cannot
10384 relocate the text and data segments independently,
10385 so the symbol does not matter. */
10386 symbol = 0;
10387 if (dynreloc_st_type == STT_GNU_IFUNC)
10388 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10389 to the .iplt entry. Instead, every non-call reference
10390 must use an R_ARM_IRELATIVE relocation to obtain the
10391 correct run-time address. */
10392 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10393 else if (globals->fdpic_p && !bfd_link_pic(info))
10394 isrofixup = 1;
10395 else
10396 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10397 if (globals->use_rel)
10398 relocate = TRUE;
10399 else
10400 outrel.r_addend += dynreloc_value;
10401 }
10402
10403 if (isrofixup)
10404 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10405 else
10406 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10407
10408 /* If this reloc is against an external symbol, we do not want to
10409 fiddle with the addend. Otherwise, we need to include the symbol
10410 value so that it becomes an addend for the dynamic reloc. */
10411 if (! relocate)
10412 return bfd_reloc_ok;
10413
10414 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10415 contents, rel->r_offset,
10416 dynreloc_value, (bfd_vma) 0);
10417 }
10418 else switch (r_type)
10419 {
10420 case R_ARM_ABS12:
10421 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10422
10423 case R_ARM_XPC25: /* Arm BLX instruction. */
10424 case R_ARM_CALL:
10425 case R_ARM_JUMP24:
10426 case R_ARM_PC24: /* Arm B/BL instruction. */
10427 case R_ARM_PLT32:
10428 {
10429 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10430
10431 if (r_type == R_ARM_XPC25)
10432 {
10433 /* Check for Arm calling Arm function. */
10434 /* FIXME: Should we translate the instruction into a BL
10435 instruction instead ? */
10436 if (branch_type != ST_BRANCH_TO_THUMB)
10437 _bfd_error_handler
10438 (_("\%pB: warning: %s BLX instruction targets"
10439 " %s function '%s'"),
10440 input_bfd, "ARM",
10441 "ARM", h ? h->root.root.string : "(local)");
10442 }
10443 else if (r_type == R_ARM_PC24)
10444 {
10445 /* Check for Arm calling Thumb function. */
10446 if (branch_type == ST_BRANCH_TO_THUMB)
10447 {
10448 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10449 output_bfd, input_section,
10450 hit_data, sym_sec, rel->r_offset,
10451 signed_addend, value,
10452 error_message))
10453 return bfd_reloc_ok;
10454 else
10455 return bfd_reloc_dangerous;
10456 }
10457 }
10458
10459 /* Check if a stub has to be inserted because the
10460 destination is too far or we are changing mode. */
10461 if ( r_type == R_ARM_CALL
10462 || r_type == R_ARM_JUMP24
10463 || r_type == R_ARM_PLT32)
10464 {
10465 enum elf32_arm_stub_type stub_type = arm_stub_none;
10466 struct elf32_arm_link_hash_entry *hash;
10467
10468 hash = (struct elf32_arm_link_hash_entry *) h;
10469 stub_type = arm_type_of_stub (info, input_section, rel,
10470 st_type, &branch_type,
10471 hash, value, sym_sec,
10472 input_bfd, sym_name);
10473
10474 if (stub_type != arm_stub_none)
10475 {
10476 /* The target is out of reach, so redirect the
10477 branch to the local stub for this function. */
10478 stub_entry = elf32_arm_get_stub_entry (input_section,
10479 sym_sec, h,
10480 rel, globals,
10481 stub_type);
10482 {
10483 if (stub_entry != NULL)
10484 value = (stub_entry->stub_offset
10485 + stub_entry->stub_sec->output_offset
10486 + stub_entry->stub_sec->output_section->vma);
10487
10488 if (plt_offset != (bfd_vma) -1)
10489 *unresolved_reloc_p = FALSE;
10490 }
10491 }
10492 else
10493 {
10494 /* If the call goes through a PLT entry, make sure to
10495 check distance to the right destination address. */
10496 if (plt_offset != (bfd_vma) -1)
10497 {
10498 value = (splt->output_section->vma
10499 + splt->output_offset
10500 + plt_offset);
10501 *unresolved_reloc_p = FALSE;
10502 /* The PLT entry is in ARM mode, regardless of the
10503 target function. */
10504 branch_type = ST_BRANCH_TO_ARM;
10505 }
10506 }
10507 }
10508
10509 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10510 where:
10511 S is the address of the symbol in the relocation.
10512 P is address of the instruction being relocated.
10513 A is the addend (extracted from the instruction) in bytes.
10514
10515 S is held in 'value'.
10516 P is the base address of the section containing the
10517 instruction plus the offset of the reloc into that
10518 section, ie:
10519 (input_section->output_section->vma +
10520 input_section->output_offset +
10521 rel->r_offset).
10522 A is the addend, converted into bytes, ie:
10523 (signed_addend * 4)
10524
10525 Note: None of these operations have knowledge of the pipeline
10526 size of the processor, thus it is up to the assembler to
10527 encode this information into the addend. */
10528 value -= (input_section->output_section->vma
10529 + input_section->output_offset);
10530 value -= rel->r_offset;
10531 if (globals->use_rel)
10532 value += (signed_addend << howto->size);
10533 else
10534 /* RELA addends do not have to be adjusted by howto->size. */
10535 value += signed_addend;
10536
10537 signed_addend = value;
10538 signed_addend >>= howto->rightshift;
10539
10540 /* A branch to an undefined weak symbol is turned into a jump to
10541 the next instruction unless a PLT entry will be created.
10542 Do the same for local undefined symbols (but not for STN_UNDEF).
10543 The jump to the next instruction is optimized as a NOP depending
10544 on the architecture. */
10545 if (h ? (h->root.type == bfd_link_hash_undefweak
10546 && plt_offset == (bfd_vma) -1)
10547 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10548 {
10549 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10550
10551 if (arch_has_arm_nop (globals))
10552 value |= 0x0320f000;
10553 else
10554 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10555 }
10556 else
10557 {
10558 /* Perform a signed range check. */
10559 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10560 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10561 return bfd_reloc_overflow;
10562
10563 addend = (value & 2);
10564
10565 value = (signed_addend & howto->dst_mask)
10566 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10567
10568 if (r_type == R_ARM_CALL)
10569 {
10570 /* Set the H bit in the BLX instruction. */
10571 if (branch_type == ST_BRANCH_TO_THUMB)
10572 {
10573 if (addend)
10574 value |= (1 << 24);
10575 else
10576 value &= ~(bfd_vma)(1 << 24);
10577 }
10578
10579 /* Select the correct instruction (BL or BLX). */
10580 /* Only if we are not handling a BL to a stub. In this
10581 case, mode switching is performed by the stub. */
10582 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10583 value |= (1 << 28);
10584 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10585 {
10586 value &= ~(bfd_vma)(1 << 28);
10587 value |= (1 << 24);
10588 }
10589 }
10590 }
10591 }
10592 break;
10593
10594 case R_ARM_ABS32:
10595 value += addend;
10596 if (branch_type == ST_BRANCH_TO_THUMB)
10597 value |= 1;
10598 break;
10599
10600 case R_ARM_ABS32_NOI:
10601 value += addend;
10602 break;
10603
10604 case R_ARM_REL32:
10605 value += addend;
10606 if (branch_type == ST_BRANCH_TO_THUMB)
10607 value |= 1;
10608 value -= (input_section->output_section->vma
10609 + input_section->output_offset + rel->r_offset);
10610 break;
10611
10612 case R_ARM_REL32_NOI:
10613 value += addend;
10614 value -= (input_section->output_section->vma
10615 + input_section->output_offset + rel->r_offset);
10616 break;
10617
10618 case R_ARM_PREL31:
10619 value -= (input_section->output_section->vma
10620 + input_section->output_offset + rel->r_offset);
10621 value += signed_addend;
10622 if (! h || h->root.type != bfd_link_hash_undefweak)
10623 {
10624 /* Check for overflow. */
10625 if ((value ^ (value >> 1)) & (1 << 30))
10626 return bfd_reloc_overflow;
10627 }
10628 value &= 0x7fffffff;
10629 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10630 if (branch_type == ST_BRANCH_TO_THUMB)
10631 value |= 1;
10632 break;
10633 }
10634
10635 bfd_put_32 (input_bfd, value, hit_data);
10636 return bfd_reloc_ok;
10637
10638 case R_ARM_ABS8:
10639 /* PR 16202: Refectch the addend using the correct size. */
10640 if (globals->use_rel)
10641 addend = bfd_get_8 (input_bfd, hit_data);
10642 value += addend;
10643
10644 /* There is no way to tell whether the user intended to use a signed or
10645 unsigned addend. When checking for overflow we accept either,
10646 as specified by the AAELF. */
10647 if ((long) value > 0xff || (long) value < -0x80)
10648 return bfd_reloc_overflow;
10649
10650 bfd_put_8 (input_bfd, value, hit_data);
10651 return bfd_reloc_ok;
10652
10653 case R_ARM_ABS16:
10654 /* PR 16202: Refectch the addend using the correct size. */
10655 if (globals->use_rel)
10656 addend = bfd_get_16 (input_bfd, hit_data);
10657 value += addend;
10658
10659 /* See comment for R_ARM_ABS8. */
10660 if ((long) value > 0xffff || (long) value < -0x8000)
10661 return bfd_reloc_overflow;
10662
10663 bfd_put_16 (input_bfd, value, hit_data);
10664 return bfd_reloc_ok;
10665
10666 case R_ARM_THM_ABS5:
10667 /* Support ldr and str instructions for the thumb. */
10668 if (globals->use_rel)
10669 {
10670 /* Need to refetch addend. */
10671 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10672 /* ??? Need to determine shift amount from operand size. */
10673 addend >>= howto->rightshift;
10674 }
10675 value += addend;
10676
10677 /* ??? Isn't value unsigned? */
10678 if ((long) value > 0x1f || (long) value < -0x10)
10679 return bfd_reloc_overflow;
10680
10681 /* ??? Value needs to be properly shifted into place first. */
10682 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10683 bfd_put_16 (input_bfd, value, hit_data);
10684 return bfd_reloc_ok;
10685
10686 case R_ARM_THM_ALU_PREL_11_0:
10687 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10688 {
10689 bfd_vma insn;
10690 bfd_signed_vma relocation;
10691
10692 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10693 | bfd_get_16 (input_bfd, hit_data + 2);
10694
10695 if (globals->use_rel)
10696 {
10697 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10698 | ((insn & (1 << 26)) >> 15);
10699 if (insn & 0xf00000)
10700 signed_addend = -signed_addend;
10701 }
10702
10703 relocation = value + signed_addend;
10704 relocation -= Pa (input_section->output_section->vma
10705 + input_section->output_offset
10706 + rel->r_offset);
10707
10708 /* PR 21523: Use an absolute value. The user of this reloc will
10709 have already selected an ADD or SUB insn appropriately. */
10710 value = labs (relocation);
10711
10712 if (value >= 0x1000)
10713 return bfd_reloc_overflow;
10714
10715 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10716 if (branch_type == ST_BRANCH_TO_THUMB)
10717 value |= 1;
10718
10719 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10720 | ((value & 0x700) << 4)
10721 | ((value & 0x800) << 15);
10722 if (relocation < 0)
10723 insn |= 0xa00000;
10724
10725 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10726 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10727
10728 return bfd_reloc_ok;
10729 }
10730
10731 case R_ARM_THM_PC8:
10732 /* PR 10073: This reloc is not generated by the GNU toolchain,
10733 but it is supported for compatibility with third party libraries
10734 generated by other compilers, specifically the ARM/IAR. */
10735 {
10736 bfd_vma insn;
10737 bfd_signed_vma relocation;
10738
10739 insn = bfd_get_16 (input_bfd, hit_data);
10740
10741 if (globals->use_rel)
10742 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10743
10744 relocation = value + addend;
10745 relocation -= Pa (input_section->output_section->vma
10746 + input_section->output_offset
10747 + rel->r_offset);
10748
10749 value = relocation;
10750
10751 /* We do not check for overflow of this reloc. Although strictly
10752 speaking this is incorrect, it appears to be necessary in order
10753 to work with IAR generated relocs. Since GCC and GAS do not
10754 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10755 a problem for them. */
10756 value &= 0x3fc;
10757
10758 insn = (insn & 0xff00) | (value >> 2);
10759
10760 bfd_put_16 (input_bfd, insn, hit_data);
10761
10762 return bfd_reloc_ok;
10763 }
10764
10765 case R_ARM_THM_PC12:
10766 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10767 {
10768 bfd_vma insn;
10769 bfd_signed_vma relocation;
10770
10771 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10772 | bfd_get_16 (input_bfd, hit_data + 2);
10773
10774 if (globals->use_rel)
10775 {
10776 signed_addend = insn & 0xfff;
10777 if (!(insn & (1 << 23)))
10778 signed_addend = -signed_addend;
10779 }
10780
10781 relocation = value + signed_addend;
10782 relocation -= Pa (input_section->output_section->vma
10783 + input_section->output_offset
10784 + rel->r_offset);
10785
10786 value = relocation;
10787
10788 if (value >= 0x1000)
10789 return bfd_reloc_overflow;
10790
10791 insn = (insn & 0xff7ff000) | value;
10792 if (relocation >= 0)
10793 insn |= (1 << 23);
10794
10795 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10796 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10797
10798 return bfd_reloc_ok;
10799 }
10800
10801 case R_ARM_THM_XPC22:
10802 case R_ARM_THM_CALL:
10803 case R_ARM_THM_JUMP24:
10804 /* Thumb BL (branch long instruction). */
10805 {
10806 bfd_vma relocation;
10807 bfd_vma reloc_sign;
10808 bfd_boolean overflow = FALSE;
10809 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10810 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10811 bfd_signed_vma reloc_signed_max;
10812 bfd_signed_vma reloc_signed_min;
10813 bfd_vma check;
10814 bfd_signed_vma signed_check;
10815 int bitsize;
10816 const int thumb2 = using_thumb2 (globals);
10817 const int thumb2_bl = using_thumb2_bl (globals);
10818
10819 /* A branch to an undefined weak symbol is turned into a jump to
10820 the next instruction unless a PLT entry will be created.
10821 The jump to the next instruction is optimized as a NOP.W for
10822 Thumb-2 enabled architectures. */
10823 if (h && h->root.type == bfd_link_hash_undefweak
10824 && plt_offset == (bfd_vma) -1)
10825 {
10826 if (thumb2)
10827 {
10828 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10829 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10830 }
10831 else
10832 {
10833 bfd_put_16 (input_bfd, 0xe000, hit_data);
10834 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10835 }
10836 return bfd_reloc_ok;
10837 }
10838
10839 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10840 with Thumb-1) involving the J1 and J2 bits. */
10841 if (globals->use_rel)
10842 {
10843 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10844 bfd_vma upper = upper_insn & 0x3ff;
10845 bfd_vma lower = lower_insn & 0x7ff;
10846 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10847 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10848 bfd_vma i1 = j1 ^ s ? 0 : 1;
10849 bfd_vma i2 = j2 ^ s ? 0 : 1;
10850
10851 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10852 /* Sign extend. */
10853 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10854
10855 signed_addend = addend;
10856 }
10857
10858 if (r_type == R_ARM_THM_XPC22)
10859 {
10860 /* Check for Thumb to Thumb call. */
10861 /* FIXME: Should we translate the instruction into a BL
10862 instruction instead ? */
10863 if (branch_type == ST_BRANCH_TO_THUMB)
10864 _bfd_error_handler
10865 (_("%pB: warning: %s BLX instruction targets"
10866 " %s function '%s'"),
10867 input_bfd, "Thumb",
10868 "Thumb", h ? h->root.root.string : "(local)");
10869 }
10870 else
10871 {
10872 /* If it is not a call to Thumb, assume call to Arm.
10873 If it is a call relative to a section name, then it is not a
10874 function call at all, but rather a long jump. Calls through
10875 the PLT do not require stubs. */
10876 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10877 {
10878 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10879 {
10880 /* Convert BL to BLX. */
10881 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10882 }
10883 else if (( r_type != R_ARM_THM_CALL)
10884 && (r_type != R_ARM_THM_JUMP24))
10885 {
10886 if (elf32_thumb_to_arm_stub
10887 (info, sym_name, input_bfd, output_bfd, input_section,
10888 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10889 error_message))
10890 return bfd_reloc_ok;
10891 else
10892 return bfd_reloc_dangerous;
10893 }
10894 }
10895 else if (branch_type == ST_BRANCH_TO_THUMB
10896 && globals->use_blx
10897 && r_type == R_ARM_THM_CALL)
10898 {
10899 /* Make sure this is a BL. */
10900 lower_insn |= 0x1800;
10901 }
10902 }
10903
10904 enum elf32_arm_stub_type stub_type = arm_stub_none;
10905 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10906 {
10907 /* Check if a stub has to be inserted because the destination
10908 is too far. */
10909 struct elf32_arm_stub_hash_entry *stub_entry;
10910 struct elf32_arm_link_hash_entry *hash;
10911
10912 hash = (struct elf32_arm_link_hash_entry *) h;
10913
10914 stub_type = arm_type_of_stub (info, input_section, rel,
10915 st_type, &branch_type,
10916 hash, value, sym_sec,
10917 input_bfd, sym_name);
10918
10919 if (stub_type != arm_stub_none)
10920 {
10921 /* The target is out of reach or we are changing modes, so
10922 redirect the branch to the local stub for this
10923 function. */
10924 stub_entry = elf32_arm_get_stub_entry (input_section,
10925 sym_sec, h,
10926 rel, globals,
10927 stub_type);
10928 if (stub_entry != NULL)
10929 {
10930 value = (stub_entry->stub_offset
10931 + stub_entry->stub_sec->output_offset
10932 + stub_entry->stub_sec->output_section->vma);
10933
10934 if (plt_offset != (bfd_vma) -1)
10935 *unresolved_reloc_p = FALSE;
10936 }
10937
10938 /* If this call becomes a call to Arm, force BLX. */
10939 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10940 {
10941 if ((stub_entry
10942 && !arm_stub_is_thumb (stub_entry->stub_type))
10943 || branch_type != ST_BRANCH_TO_THUMB)
10944 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10945 }
10946 }
10947 }
10948
10949 /* Handle calls via the PLT. */
10950 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10951 {
10952 value = (splt->output_section->vma
10953 + splt->output_offset
10954 + plt_offset);
10955
10956 if (globals->use_blx
10957 && r_type == R_ARM_THM_CALL
10958 && ! using_thumb_only (globals))
10959 {
10960 /* If the Thumb BLX instruction is available, convert
10961 the BL to a BLX instruction to call the ARM-mode
10962 PLT entry. */
10963 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10964 branch_type = ST_BRANCH_TO_ARM;
10965 }
10966 else
10967 {
10968 if (! using_thumb_only (globals))
10969 /* Target the Thumb stub before the ARM PLT entry. */
10970 value -= PLT_THUMB_STUB_SIZE;
10971 branch_type = ST_BRANCH_TO_THUMB;
10972 }
10973 *unresolved_reloc_p = FALSE;
10974 }
10975
10976 relocation = value + signed_addend;
10977
10978 relocation -= (input_section->output_section->vma
10979 + input_section->output_offset
10980 + rel->r_offset);
10981
10982 check = relocation >> howto->rightshift;
10983
10984 /* If this is a signed value, the rightshift just dropped
10985 leading 1 bits (assuming twos complement). */
10986 if ((bfd_signed_vma) relocation >= 0)
10987 signed_check = check;
10988 else
10989 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10990
10991 /* Calculate the permissable maximum and minimum values for
10992 this relocation according to whether we're relocating for
10993 Thumb-2 or not. */
10994 bitsize = howto->bitsize;
10995 if (!thumb2_bl)
10996 bitsize -= 2;
10997 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10998 reloc_signed_min = ~reloc_signed_max;
10999
11000 /* Assumes two's complement. */
11001 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11002 overflow = TRUE;
11003
11004 if ((lower_insn & 0x5000) == 0x4000)
11005 /* For a BLX instruction, make sure that the relocation is rounded up
11006 to a word boundary. This follows the semantics of the instruction
11007 which specifies that bit 1 of the target address will come from bit
11008 1 of the base address. */
11009 relocation = (relocation + 2) & ~ 3;
11010
11011 /* Put RELOCATION back into the insn. Assumes two's complement.
11012 We use the Thumb-2 encoding, which is safe even if dealing with
11013 a Thumb-1 instruction by virtue of our overflow check above. */
11014 reloc_sign = (signed_check < 0) ? 1 : 0;
11015 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11016 | ((relocation >> 12) & 0x3ff)
11017 | (reloc_sign << 10);
11018 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11019 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11020 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11021 | ((relocation >> 1) & 0x7ff);
11022
11023 /* Put the relocated value back in the object file: */
11024 bfd_put_16 (input_bfd, upper_insn, hit_data);
11025 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11026
11027 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11028 }
11029 break;
11030
11031 case R_ARM_THM_JUMP19:
11032 /* Thumb32 conditional branch instruction. */
11033 {
11034 bfd_vma relocation;
11035 bfd_boolean overflow = FALSE;
11036 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11037 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11038 bfd_signed_vma reloc_signed_max = 0xffffe;
11039 bfd_signed_vma reloc_signed_min = -0x100000;
11040 bfd_signed_vma signed_check;
11041 enum elf32_arm_stub_type stub_type = arm_stub_none;
11042 struct elf32_arm_stub_hash_entry *stub_entry;
11043 struct elf32_arm_link_hash_entry *hash;
11044
11045 /* Need to refetch the addend, reconstruct the top three bits,
11046 and squish the two 11 bit pieces together. */
11047 if (globals->use_rel)
11048 {
11049 bfd_vma S = (upper_insn & 0x0400) >> 10;
11050 bfd_vma upper = (upper_insn & 0x003f);
11051 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11052 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11053 bfd_vma lower = (lower_insn & 0x07ff);
11054
11055 upper |= J1 << 6;
11056 upper |= J2 << 7;
11057 upper |= (!S) << 8;
11058 upper -= 0x0100; /* Sign extend. */
11059
11060 addend = (upper << 12) | (lower << 1);
11061 signed_addend = addend;
11062 }
11063
11064 /* Handle calls via the PLT. */
11065 if (plt_offset != (bfd_vma) -1)
11066 {
11067 value = (splt->output_section->vma
11068 + splt->output_offset
11069 + plt_offset);
11070 /* Target the Thumb stub before the ARM PLT entry. */
11071 value -= PLT_THUMB_STUB_SIZE;
11072 *unresolved_reloc_p = FALSE;
11073 }
11074
11075 hash = (struct elf32_arm_link_hash_entry *)h;
11076
11077 stub_type = arm_type_of_stub (info, input_section, rel,
11078 st_type, &branch_type,
11079 hash, value, sym_sec,
11080 input_bfd, sym_name);
11081 if (stub_type != arm_stub_none)
11082 {
11083 stub_entry = elf32_arm_get_stub_entry (input_section,
11084 sym_sec, h,
11085 rel, globals,
11086 stub_type);
11087 if (stub_entry != NULL)
11088 {
11089 value = (stub_entry->stub_offset
11090 + stub_entry->stub_sec->output_offset
11091 + stub_entry->stub_sec->output_section->vma);
11092 }
11093 }
11094
11095 relocation = value + signed_addend;
11096 relocation -= (input_section->output_section->vma
11097 + input_section->output_offset
11098 + rel->r_offset);
11099 signed_check = (bfd_signed_vma) relocation;
11100
11101 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11102 overflow = TRUE;
11103
11104 /* Put RELOCATION back into the insn. */
11105 {
11106 bfd_vma S = (relocation & 0x00100000) >> 20;
11107 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11108 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11109 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11110 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11111
11112 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11113 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11114 }
11115
11116 /* Put the relocated value back in the object file: */
11117 bfd_put_16 (input_bfd, upper_insn, hit_data);
11118 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11119
11120 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11121 }
11122
11123 case R_ARM_THM_JUMP11:
11124 case R_ARM_THM_JUMP8:
11125 case R_ARM_THM_JUMP6:
11126 /* Thumb B (branch) instruction). */
11127 {
11128 bfd_signed_vma relocation;
11129 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11130 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11131 bfd_signed_vma signed_check;
11132
11133 /* CZB cannot jump backward. */
11134 if (r_type == R_ARM_THM_JUMP6)
11135 reloc_signed_min = 0;
11136
11137 if (globals->use_rel)
11138 {
11139 /* Need to refetch addend. */
11140 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11141 if (addend & ((howto->src_mask + 1) >> 1))
11142 {
11143 signed_addend = -1;
11144 signed_addend &= ~ howto->src_mask;
11145 signed_addend |= addend;
11146 }
11147 else
11148 signed_addend = addend;
11149 /* The value in the insn has been right shifted. We need to
11150 undo this, so that we can perform the address calculation
11151 in terms of bytes. */
11152 signed_addend <<= howto->rightshift;
11153 }
11154 relocation = value + signed_addend;
11155
11156 relocation -= (input_section->output_section->vma
11157 + input_section->output_offset
11158 + rel->r_offset);
11159
11160 relocation >>= howto->rightshift;
11161 signed_check = relocation;
11162
11163 if (r_type == R_ARM_THM_JUMP6)
11164 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11165 else
11166 relocation &= howto->dst_mask;
11167 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11168
11169 bfd_put_16 (input_bfd, relocation, hit_data);
11170
11171 /* Assumes two's complement. */
11172 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11173 return bfd_reloc_overflow;
11174
11175 return bfd_reloc_ok;
11176 }
11177
11178 case R_ARM_ALU_PCREL7_0:
11179 case R_ARM_ALU_PCREL15_8:
11180 case R_ARM_ALU_PCREL23_15:
11181 {
11182 bfd_vma insn;
11183 bfd_vma relocation;
11184
11185 insn = bfd_get_32 (input_bfd, hit_data);
11186 if (globals->use_rel)
11187 {
11188 /* Extract the addend. */
11189 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11190 signed_addend = addend;
11191 }
11192 relocation = value + signed_addend;
11193
11194 relocation -= (input_section->output_section->vma
11195 + input_section->output_offset
11196 + rel->r_offset);
11197 insn = (insn & ~0xfff)
11198 | ((howto->bitpos << 7) & 0xf00)
11199 | ((relocation >> howto->bitpos) & 0xff);
11200 bfd_put_32 (input_bfd, value, hit_data);
11201 }
11202 return bfd_reloc_ok;
11203
11204 case R_ARM_GNU_VTINHERIT:
11205 case R_ARM_GNU_VTENTRY:
11206 return bfd_reloc_ok;
11207
11208 case R_ARM_GOTOFF32:
11209 /* Relocation is relative to the start of the
11210 global offset table. */
11211
11212 BFD_ASSERT (sgot != NULL);
11213 if (sgot == NULL)
11214 return bfd_reloc_notsupported;
11215
11216 /* If we are addressing a Thumb function, we need to adjust the
11217 address by one, so that attempts to call the function pointer will
11218 correctly interpret it as Thumb code. */
11219 if (branch_type == ST_BRANCH_TO_THUMB)
11220 value += 1;
11221
11222 /* Note that sgot->output_offset is not involved in this
11223 calculation. We always want the start of .got. If we
11224 define _GLOBAL_OFFSET_TABLE in a different way, as is
11225 permitted by the ABI, we might have to change this
11226 calculation. */
11227 value -= sgot->output_section->vma;
11228 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11229 contents, rel->r_offset, value,
11230 rel->r_addend);
11231
11232 case R_ARM_GOTPC:
11233 /* Use global offset table as symbol value. */
11234 BFD_ASSERT (sgot != NULL);
11235
11236 if (sgot == NULL)
11237 return bfd_reloc_notsupported;
11238
11239 *unresolved_reloc_p = FALSE;
11240 value = sgot->output_section->vma;
11241 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11242 contents, rel->r_offset, value,
11243 rel->r_addend);
11244
11245 case R_ARM_GOT32:
11246 case R_ARM_GOT_PREL:
11247 /* Relocation is to the entry for this symbol in the
11248 global offset table. */
11249 if (sgot == NULL)
11250 return bfd_reloc_notsupported;
11251
11252 if (dynreloc_st_type == STT_GNU_IFUNC
11253 && plt_offset != (bfd_vma) -1
11254 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11255 {
11256 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11257 symbol, and the relocation resolves directly to the runtime
11258 target rather than to the .iplt entry. This means that any
11259 .got entry would be the same value as the .igot.plt entry,
11260 so there's no point creating both. */
11261 sgot = globals->root.igotplt;
11262 value = sgot->output_offset + gotplt_offset;
11263 }
11264 else if (h != NULL)
11265 {
11266 bfd_vma off;
11267
11268 off = h->got.offset;
11269 BFD_ASSERT (off != (bfd_vma) -1);
11270 if ((off & 1) != 0)
11271 {
11272 /* We have already processsed one GOT relocation against
11273 this symbol. */
11274 off &= ~1;
11275 if (globals->root.dynamic_sections_created
11276 && !SYMBOL_REFERENCES_LOCAL (info, h))
11277 *unresolved_reloc_p = FALSE;
11278 }
11279 else
11280 {
11281 Elf_Internal_Rela outrel;
11282 int isrofixup = 0;
11283
11284 if (((h->dynindx != -1) || globals->fdpic_p)
11285 && !SYMBOL_REFERENCES_LOCAL (info, h))
11286 {
11287 /* If the symbol doesn't resolve locally in a static
11288 object, we have an undefined reference. If the
11289 symbol doesn't resolve locally in a dynamic object,
11290 it should be resolved by the dynamic linker. */
11291 if (globals->root.dynamic_sections_created)
11292 {
11293 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11294 *unresolved_reloc_p = FALSE;
11295 }
11296 else
11297 outrel.r_info = 0;
11298 outrel.r_addend = 0;
11299 }
11300 else
11301 {
11302 if (dynreloc_st_type == STT_GNU_IFUNC)
11303 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11304 else if (bfd_link_pic (info)
11305 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11306 || h->root.type != bfd_link_hash_undefweak))
11307 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11308 else if (globals->fdpic_p)
11309 isrofixup = 1;
11310 else
11311 outrel.r_info = 0;
11312 outrel.r_addend = dynreloc_value;
11313 }
11314
11315 /* The GOT entry is initialized to zero by default.
11316 See if we should install a different value. */
11317 if (outrel.r_addend != 0
11318 && (outrel.r_info == 0 || globals->use_rel || isrofixup))
11319 {
11320 bfd_put_32 (output_bfd, outrel.r_addend,
11321 sgot->contents + off);
11322 outrel.r_addend = 0;
11323 }
11324
11325 if (outrel.r_info != 0 && !isrofixup)
11326 {
11327 outrel.r_offset = (sgot->output_section->vma
11328 + sgot->output_offset
11329 + off);
11330 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11331 }
11332 else if (isrofixup)
11333 {
11334 arm_elf_add_rofixup(output_bfd,
11335 elf32_arm_hash_table(info)->srofixup,
11336 sgot->output_section->vma
11337 + sgot->output_offset + off);
11338 }
11339 h->got.offset |= 1;
11340 }
11341 value = sgot->output_offset + off;
11342 }
11343 else
11344 {
11345 bfd_vma off;
11346
11347 BFD_ASSERT (local_got_offsets != NULL
11348 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11349
11350 off = local_got_offsets[r_symndx];
11351
11352 /* The offset must always be a multiple of 4. We use the
11353 least significant bit to record whether we have already
11354 generated the necessary reloc. */
11355 if ((off & 1) != 0)
11356 off &= ~1;
11357 else
11358 {
11359 if (globals->use_rel)
11360 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11361
11362 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11363 {
11364 Elf_Internal_Rela outrel;
11365
11366 outrel.r_addend = addend + dynreloc_value;
11367 outrel.r_offset = (sgot->output_section->vma
11368 + sgot->output_offset
11369 + off);
11370 if (dynreloc_st_type == STT_GNU_IFUNC)
11371 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11372 else
11373 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11374 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11375 }
11376 else if (globals->fdpic_p)
11377 {
11378 /* For FDPIC executables, we use rofixup to fix
11379 address at runtime. */
11380 arm_elf_add_rofixup(output_bfd, globals->srofixup,
11381 sgot->output_section->vma + sgot->output_offset
11382 + off);
11383 }
11384
11385 local_got_offsets[r_symndx] |= 1;
11386 }
11387
11388 value = sgot->output_offset + off;
11389 }
11390 if (r_type != R_ARM_GOT32)
11391 value += sgot->output_section->vma;
11392
11393 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11394 contents, rel->r_offset, value,
11395 rel->r_addend);
11396
11397 case R_ARM_TLS_LDO32:
11398 value = value - dtpoff_base (info);
11399
11400 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11401 contents, rel->r_offset, value,
11402 rel->r_addend);
11403
11404 case R_ARM_TLS_LDM32:
11405 {
11406 bfd_vma off;
11407
11408 if (sgot == NULL)
11409 abort ();
11410
11411 off = globals->tls_ldm_got.offset;
11412
11413 if ((off & 1) != 0)
11414 off &= ~1;
11415 else
11416 {
11417 /* If we don't know the module number, create a relocation
11418 for it. */
11419 if (bfd_link_pic (info))
11420 {
11421 Elf_Internal_Rela outrel;
11422
11423 if (srelgot == NULL)
11424 abort ();
11425
11426 outrel.r_addend = 0;
11427 outrel.r_offset = (sgot->output_section->vma
11428 + sgot->output_offset + off);
11429 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11430
11431 if (globals->use_rel)
11432 bfd_put_32 (output_bfd, outrel.r_addend,
11433 sgot->contents + off);
11434
11435 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11436 }
11437 else
11438 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11439
11440 globals->tls_ldm_got.offset |= 1;
11441 }
11442
11443 if (globals->fdpic_p)
11444 {
11445 bfd_put_32(output_bfd,
11446 globals->root.sgot->output_offset + off,
11447 contents + rel->r_offset);
11448
11449 return bfd_reloc_ok;
11450 }
11451 else
11452 {
11453 value = sgot->output_section->vma + sgot->output_offset + off
11454 - (input_section->output_section->vma
11455 + input_section->output_offset + rel->r_offset);
11456
11457 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11458 contents, rel->r_offset, value,
11459 rel->r_addend);
11460 }
11461 }
11462
11463 case R_ARM_TLS_CALL:
11464 case R_ARM_THM_TLS_CALL:
11465 case R_ARM_TLS_GD32:
11466 case R_ARM_TLS_IE32:
11467 case R_ARM_TLS_GOTDESC:
11468 case R_ARM_TLS_DESCSEQ:
11469 case R_ARM_THM_TLS_DESCSEQ:
11470 {
11471 bfd_vma off, offplt;
11472 int indx = 0;
11473 char tls_type;
11474
11475 BFD_ASSERT (sgot != NULL);
11476
11477 if (h != NULL)
11478 {
11479 bfd_boolean dyn;
11480 dyn = globals->root.dynamic_sections_created;
11481 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11482 bfd_link_pic (info),
11483 h)
11484 && (!bfd_link_pic (info)
11485 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11486 {
11487 *unresolved_reloc_p = FALSE;
11488 indx = h->dynindx;
11489 }
11490 off = h->got.offset;
11491 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11492 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11493 }
11494 else
11495 {
11496 BFD_ASSERT (local_got_offsets != NULL);
11497 off = local_got_offsets[r_symndx];
11498 offplt = local_tlsdesc_gotents[r_symndx];
11499 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11500 }
11501
11502 /* Linker relaxations happens from one of the
11503 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11504 if (ELF32_R_TYPE(rel->r_info) != r_type)
11505 tls_type = GOT_TLS_IE;
11506
11507 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11508
11509 if ((off & 1) != 0)
11510 off &= ~1;
11511 else
11512 {
11513 bfd_boolean need_relocs = FALSE;
11514 Elf_Internal_Rela outrel;
11515 int cur_off = off;
11516
11517 /* The GOT entries have not been initialized yet. Do it
11518 now, and emit any relocations. If both an IE GOT and a
11519 GD GOT are necessary, we emit the GD first. */
11520
11521 if ((bfd_link_pic (info) || indx != 0)
11522 && (h == NULL
11523 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11524 && !resolved_to_zero)
11525 || h->root.type != bfd_link_hash_undefweak))
11526 {
11527 need_relocs = TRUE;
11528 BFD_ASSERT (srelgot != NULL);
11529 }
11530
11531 if (tls_type & GOT_TLS_GDESC)
11532 {
11533 bfd_byte *loc;
11534
11535 /* We should have relaxed, unless this is an undefined
11536 weak symbol. */
11537 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11538 || bfd_link_pic (info));
11539 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11540 <= globals->root.sgotplt->size);
11541
11542 outrel.r_addend = 0;
11543 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11544 + globals->root.sgotplt->output_offset
11545 + offplt
11546 + globals->sgotplt_jump_table_size);
11547
11548 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11549 sreloc = globals->root.srelplt;
11550 loc = sreloc->contents;
11551 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11552 BFD_ASSERT (loc + RELOC_SIZE (globals)
11553 <= sreloc->contents + sreloc->size);
11554
11555 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11556
11557 /* For globals, the first word in the relocation gets
11558 the relocation index and the top bit set, or zero,
11559 if we're binding now. For locals, it gets the
11560 symbol's offset in the tls section. */
11561 bfd_put_32 (output_bfd,
11562 !h ? value - elf_hash_table (info)->tls_sec->vma
11563 : info->flags & DF_BIND_NOW ? 0
11564 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11565 globals->root.sgotplt->contents + offplt
11566 + globals->sgotplt_jump_table_size);
11567
11568 /* Second word in the relocation is always zero. */
11569 bfd_put_32 (output_bfd, 0,
11570 globals->root.sgotplt->contents + offplt
11571 + globals->sgotplt_jump_table_size + 4);
11572 }
11573 if (tls_type & GOT_TLS_GD)
11574 {
11575 if (need_relocs)
11576 {
11577 outrel.r_addend = 0;
11578 outrel.r_offset = (sgot->output_section->vma
11579 + sgot->output_offset
11580 + cur_off);
11581 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11582
11583 if (globals->use_rel)
11584 bfd_put_32 (output_bfd, outrel.r_addend,
11585 sgot->contents + cur_off);
11586
11587 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11588
11589 if (indx == 0)
11590 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11591 sgot->contents + cur_off + 4);
11592 else
11593 {
11594 outrel.r_addend = 0;
11595 outrel.r_info = ELF32_R_INFO (indx,
11596 R_ARM_TLS_DTPOFF32);
11597 outrel.r_offset += 4;
11598
11599 if (globals->use_rel)
11600 bfd_put_32 (output_bfd, outrel.r_addend,
11601 sgot->contents + cur_off + 4);
11602
11603 elf32_arm_add_dynreloc (output_bfd, info,
11604 srelgot, &outrel);
11605 }
11606 }
11607 else
11608 {
11609 /* If we are not emitting relocations for a
11610 general dynamic reference, then we must be in a
11611 static link or an executable link with the
11612 symbol binding locally. Mark it as belonging
11613 to module 1, the executable. */
11614 bfd_put_32 (output_bfd, 1,
11615 sgot->contents + cur_off);
11616 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11617 sgot->contents + cur_off + 4);
11618 }
11619
11620 cur_off += 8;
11621 }
11622
11623 if (tls_type & GOT_TLS_IE)
11624 {
11625 if (need_relocs)
11626 {
11627 if (indx == 0)
11628 outrel.r_addend = value - dtpoff_base (info);
11629 else
11630 outrel.r_addend = 0;
11631 outrel.r_offset = (sgot->output_section->vma
11632 + sgot->output_offset
11633 + cur_off);
11634 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11635
11636 if (globals->use_rel)
11637 bfd_put_32 (output_bfd, outrel.r_addend,
11638 sgot->contents + cur_off);
11639
11640 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11641 }
11642 else
11643 bfd_put_32 (output_bfd, tpoff (info, value),
11644 sgot->contents + cur_off);
11645 cur_off += 4;
11646 }
11647
11648 if (h != NULL)
11649 h->got.offset |= 1;
11650 else
11651 local_got_offsets[r_symndx] |= 1;
11652 }
11653
11654 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11655 off += 8;
11656 else if (tls_type & GOT_TLS_GDESC)
11657 off = offplt;
11658
11659 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11660 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11661 {
11662 bfd_signed_vma offset;
11663 /* TLS stubs are arm mode. The original symbol is a
11664 data object, so branch_type is bogus. */
11665 branch_type = ST_BRANCH_TO_ARM;
11666 enum elf32_arm_stub_type stub_type
11667 = arm_type_of_stub (info, input_section, rel,
11668 st_type, &branch_type,
11669 (struct elf32_arm_link_hash_entry *)h,
11670 globals->tls_trampoline, globals->root.splt,
11671 input_bfd, sym_name);
11672
11673 if (stub_type != arm_stub_none)
11674 {
11675 struct elf32_arm_stub_hash_entry *stub_entry
11676 = elf32_arm_get_stub_entry
11677 (input_section, globals->root.splt, 0, rel,
11678 globals, stub_type);
11679 offset = (stub_entry->stub_offset
11680 + stub_entry->stub_sec->output_offset
11681 + stub_entry->stub_sec->output_section->vma);
11682 }
11683 else
11684 offset = (globals->root.splt->output_section->vma
11685 + globals->root.splt->output_offset
11686 + globals->tls_trampoline);
11687
11688 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11689 {
11690 unsigned long inst;
11691
11692 offset -= (input_section->output_section->vma
11693 + input_section->output_offset
11694 + rel->r_offset + 8);
11695
11696 inst = offset >> 2;
11697 inst &= 0x00ffffff;
11698 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11699 }
11700 else
11701 {
11702 /* Thumb blx encodes the offset in a complicated
11703 fashion. */
11704 unsigned upper_insn, lower_insn;
11705 unsigned neg;
11706
11707 offset -= (input_section->output_section->vma
11708 + input_section->output_offset
11709 + rel->r_offset + 4);
11710
11711 if (stub_type != arm_stub_none
11712 && arm_stub_is_thumb (stub_type))
11713 {
11714 lower_insn = 0xd000;
11715 }
11716 else
11717 {
11718 lower_insn = 0xc000;
11719 /* Round up the offset to a word boundary. */
11720 offset = (offset + 2) & ~2;
11721 }
11722
11723 neg = offset < 0;
11724 upper_insn = (0xf000
11725 | ((offset >> 12) & 0x3ff)
11726 | (neg << 10));
11727 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11728 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11729 | ((offset >> 1) & 0x7ff);
11730 bfd_put_16 (input_bfd, upper_insn, hit_data);
11731 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11732 return bfd_reloc_ok;
11733 }
11734 }
11735 /* These relocations needs special care, as besides the fact
11736 they point somewhere in .gotplt, the addend must be
11737 adjusted accordingly depending on the type of instruction
11738 we refer to. */
11739 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11740 {
11741 unsigned long data, insn;
11742 unsigned thumb;
11743
11744 data = bfd_get_32 (input_bfd, hit_data);
11745 thumb = data & 1;
11746 data &= ~1u;
11747
11748 if (thumb)
11749 {
11750 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11751 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11752 insn = (insn << 16)
11753 | bfd_get_16 (input_bfd,
11754 contents + rel->r_offset - data + 2);
11755 if ((insn & 0xf800c000) == 0xf000c000)
11756 /* bl/blx */
11757 value = -6;
11758 else if ((insn & 0xffffff00) == 0x4400)
11759 /* add */
11760 value = -5;
11761 else
11762 {
11763 _bfd_error_handler
11764 /* xgettext:c-format */
11765 (_("%pB(%pA+%#" PRIx64 "): "
11766 "unexpected %s instruction '%#lx' "
11767 "referenced by TLS_GOTDESC"),
11768 input_bfd, input_section, (uint64_t) rel->r_offset,
11769 "Thumb", insn);
11770 return bfd_reloc_notsupported;
11771 }
11772 }
11773 else
11774 {
11775 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11776
11777 switch (insn >> 24)
11778 {
11779 case 0xeb: /* bl */
11780 case 0xfa: /* blx */
11781 value = -4;
11782 break;
11783
11784 case 0xe0: /* add */
11785 value = -8;
11786 break;
11787
11788 default:
11789 _bfd_error_handler
11790 /* xgettext:c-format */
11791 (_("%pB(%pA+%#" PRIx64 "): "
11792 "unexpected %s instruction '%#lx' "
11793 "referenced by TLS_GOTDESC"),
11794 input_bfd, input_section, (uint64_t) rel->r_offset,
11795 "ARM", insn);
11796 return bfd_reloc_notsupported;
11797 }
11798 }
11799
11800 value += ((globals->root.sgotplt->output_section->vma
11801 + globals->root.sgotplt->output_offset + off)
11802 - (input_section->output_section->vma
11803 + input_section->output_offset
11804 + rel->r_offset)
11805 + globals->sgotplt_jump_table_size);
11806 }
11807 else
11808 value = ((globals->root.sgot->output_section->vma
11809 + globals->root.sgot->output_offset + off)
11810 - (input_section->output_section->vma
11811 + input_section->output_offset + rel->r_offset));
11812
11813 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32 ||
11814 r_type == R_ARM_TLS_IE32))
11815 {
11816 /* For FDPIC relocations, resolve to the offset of the GOT
11817 entry from the start of GOT. */
11818 bfd_put_32(output_bfd,
11819 globals->root.sgot->output_offset + off,
11820 contents + rel->r_offset);
11821
11822 return bfd_reloc_ok;
11823 }
11824 else
11825 {
11826 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11827 contents, rel->r_offset, value,
11828 rel->r_addend);
11829 }
11830 }
11831
11832 case R_ARM_TLS_LE32:
11833 if (bfd_link_dll (info))
11834 {
11835 _bfd_error_handler
11836 /* xgettext:c-format */
11837 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
11838 "in shared object"),
11839 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
11840 return bfd_reloc_notsupported;
11841 }
11842 else
11843 value = tpoff (info, value);
11844
11845 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11846 contents, rel->r_offset, value,
11847 rel->r_addend);
11848
11849 case R_ARM_V4BX:
11850 if (globals->fix_v4bx)
11851 {
11852 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11853
11854 /* Ensure that we have a BX instruction. */
11855 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11856
11857 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11858 {
11859 /* Branch to veneer. */
11860 bfd_vma glue_addr;
11861 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11862 glue_addr -= input_section->output_section->vma
11863 + input_section->output_offset
11864 + rel->r_offset + 8;
11865 insn = (insn & 0xf0000000) | 0x0a000000
11866 | ((glue_addr >> 2) & 0x00ffffff);
11867 }
11868 else
11869 {
11870 /* Preserve Rm (lowest four bits) and the condition code
11871 (highest four bits). Other bits encode MOV PC,Rm. */
11872 insn = (insn & 0xf000000f) | 0x01a0f000;
11873 }
11874
11875 bfd_put_32 (input_bfd, insn, hit_data);
11876 }
11877 return bfd_reloc_ok;
11878
11879 case R_ARM_MOVW_ABS_NC:
11880 case R_ARM_MOVT_ABS:
11881 case R_ARM_MOVW_PREL_NC:
11882 case R_ARM_MOVT_PREL:
11883 /* Until we properly support segment-base-relative addressing then
11884 we assume the segment base to be zero, as for the group relocations.
11885 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11886 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11887 case R_ARM_MOVW_BREL_NC:
11888 case R_ARM_MOVW_BREL:
11889 case R_ARM_MOVT_BREL:
11890 {
11891 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11892
11893 if (globals->use_rel)
11894 {
11895 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11896 signed_addend = (addend ^ 0x8000) - 0x8000;
11897 }
11898
11899 value += signed_addend;
11900
11901 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11902 value -= (input_section->output_section->vma
11903 + input_section->output_offset + rel->r_offset);
11904
11905 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11906 return bfd_reloc_overflow;
11907
11908 if (branch_type == ST_BRANCH_TO_THUMB)
11909 value |= 1;
11910
11911 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11912 || r_type == R_ARM_MOVT_BREL)
11913 value >>= 16;
11914
11915 insn &= 0xfff0f000;
11916 insn |= value & 0xfff;
11917 insn |= (value & 0xf000) << 4;
11918 bfd_put_32 (input_bfd, insn, hit_data);
11919 }
11920 return bfd_reloc_ok;
11921
11922 case R_ARM_THM_MOVW_ABS_NC:
11923 case R_ARM_THM_MOVT_ABS:
11924 case R_ARM_THM_MOVW_PREL_NC:
11925 case R_ARM_THM_MOVT_PREL:
11926 /* Until we properly support segment-base-relative addressing then
11927 we assume the segment base to be zero, as for the above relocations.
11928 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11929 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11930 as R_ARM_THM_MOVT_ABS. */
11931 case R_ARM_THM_MOVW_BREL_NC:
11932 case R_ARM_THM_MOVW_BREL:
11933 case R_ARM_THM_MOVT_BREL:
11934 {
11935 bfd_vma insn;
11936
11937 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11938 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11939
11940 if (globals->use_rel)
11941 {
11942 addend = ((insn >> 4) & 0xf000)
11943 | ((insn >> 15) & 0x0800)
11944 | ((insn >> 4) & 0x0700)
11945 | (insn & 0x00ff);
11946 signed_addend = (addend ^ 0x8000) - 0x8000;
11947 }
11948
11949 value += signed_addend;
11950
11951 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11952 value -= (input_section->output_section->vma
11953 + input_section->output_offset + rel->r_offset);
11954
11955 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11956 return bfd_reloc_overflow;
11957
11958 if (branch_type == ST_BRANCH_TO_THUMB)
11959 value |= 1;
11960
11961 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11962 || r_type == R_ARM_THM_MOVT_BREL)
11963 value >>= 16;
11964
11965 insn &= 0xfbf08f00;
11966 insn |= (value & 0xf000) << 4;
11967 insn |= (value & 0x0800) << 15;
11968 insn |= (value & 0x0700) << 4;
11969 insn |= (value & 0x00ff);
11970
11971 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11972 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11973 }
11974 return bfd_reloc_ok;
11975
11976 case R_ARM_ALU_PC_G0_NC:
11977 case R_ARM_ALU_PC_G1_NC:
11978 case R_ARM_ALU_PC_G0:
11979 case R_ARM_ALU_PC_G1:
11980 case R_ARM_ALU_PC_G2:
11981 case R_ARM_ALU_SB_G0_NC:
11982 case R_ARM_ALU_SB_G1_NC:
11983 case R_ARM_ALU_SB_G0:
11984 case R_ARM_ALU_SB_G1:
11985 case R_ARM_ALU_SB_G2:
11986 {
11987 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11988 bfd_vma pc = input_section->output_section->vma
11989 + input_section->output_offset + rel->r_offset;
11990 /* sb is the origin of the *segment* containing the symbol. */
11991 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11992 bfd_vma residual;
11993 bfd_vma g_n;
11994 bfd_signed_vma signed_value;
11995 int group = 0;
11996
11997 /* Determine which group of bits to select. */
11998 switch (r_type)
11999 {
12000 case R_ARM_ALU_PC_G0_NC:
12001 case R_ARM_ALU_PC_G0:
12002 case R_ARM_ALU_SB_G0_NC:
12003 case R_ARM_ALU_SB_G0:
12004 group = 0;
12005 break;
12006
12007 case R_ARM_ALU_PC_G1_NC:
12008 case R_ARM_ALU_PC_G1:
12009 case R_ARM_ALU_SB_G1_NC:
12010 case R_ARM_ALU_SB_G1:
12011 group = 1;
12012 break;
12013
12014 case R_ARM_ALU_PC_G2:
12015 case R_ARM_ALU_SB_G2:
12016 group = 2;
12017 break;
12018
12019 default:
12020 abort ();
12021 }
12022
12023 /* If REL, extract the addend from the insn. If RELA, it will
12024 have already been fetched for us. */
12025 if (globals->use_rel)
12026 {
12027 int negative;
12028 bfd_vma constant = insn & 0xff;
12029 bfd_vma rotation = (insn & 0xf00) >> 8;
12030
12031 if (rotation == 0)
12032 signed_addend = constant;
12033 else
12034 {
12035 /* Compensate for the fact that in the instruction, the
12036 rotation is stored in multiples of 2 bits. */
12037 rotation *= 2;
12038
12039 /* Rotate "constant" right by "rotation" bits. */
12040 signed_addend = (constant >> rotation) |
12041 (constant << (8 * sizeof (bfd_vma) - rotation));
12042 }
12043
12044 /* Determine if the instruction is an ADD or a SUB.
12045 (For REL, this determines the sign of the addend.) */
12046 negative = identify_add_or_sub (insn);
12047 if (negative == 0)
12048 {
12049 _bfd_error_handler
12050 /* xgettext:c-format */
12051 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12052 "are allowed for ALU group relocations"),
12053 input_bfd, input_section, (uint64_t) rel->r_offset);
12054 return bfd_reloc_overflow;
12055 }
12056
12057 signed_addend *= negative;
12058 }
12059
12060 /* Compute the value (X) to go in the place. */
12061 if (r_type == R_ARM_ALU_PC_G0_NC
12062 || r_type == R_ARM_ALU_PC_G1_NC
12063 || r_type == R_ARM_ALU_PC_G0
12064 || r_type == R_ARM_ALU_PC_G1
12065 || r_type == R_ARM_ALU_PC_G2)
12066 /* PC relative. */
12067 signed_value = value - pc + signed_addend;
12068 else
12069 /* Section base relative. */
12070 signed_value = value - sb + signed_addend;
12071
12072 /* If the target symbol is a Thumb function, then set the
12073 Thumb bit in the address. */
12074 if (branch_type == ST_BRANCH_TO_THUMB)
12075 signed_value |= 1;
12076
12077 /* Calculate the value of the relevant G_n, in encoded
12078 constant-with-rotation format. */
12079 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12080 group, &residual);
12081
12082 /* Check for overflow if required. */
12083 if ((r_type == R_ARM_ALU_PC_G0
12084 || r_type == R_ARM_ALU_PC_G1
12085 || r_type == R_ARM_ALU_PC_G2
12086 || r_type == R_ARM_ALU_SB_G0
12087 || r_type == R_ARM_ALU_SB_G1
12088 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12089 {
12090 _bfd_error_handler
12091 /* xgettext:c-format */
12092 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12093 "splitting %#" PRIx64 " for group relocation %s"),
12094 input_bfd, input_section, (uint64_t) rel->r_offset,
12095 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12096 howto->name);
12097 return bfd_reloc_overflow;
12098 }
12099
12100 /* Mask out the value and the ADD/SUB part of the opcode; take care
12101 not to destroy the S bit. */
12102 insn &= 0xff1ff000;
12103
12104 /* Set the opcode according to whether the value to go in the
12105 place is negative. */
12106 if (signed_value < 0)
12107 insn |= 1 << 22;
12108 else
12109 insn |= 1 << 23;
12110
12111 /* Encode the offset. */
12112 insn |= g_n;
12113
12114 bfd_put_32 (input_bfd, insn, hit_data);
12115 }
12116 return bfd_reloc_ok;
12117
12118 case R_ARM_LDR_PC_G0:
12119 case R_ARM_LDR_PC_G1:
12120 case R_ARM_LDR_PC_G2:
12121 case R_ARM_LDR_SB_G0:
12122 case R_ARM_LDR_SB_G1:
12123 case R_ARM_LDR_SB_G2:
12124 {
12125 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12126 bfd_vma pc = input_section->output_section->vma
12127 + input_section->output_offset + rel->r_offset;
12128 /* sb is the origin of the *segment* containing the symbol. */
12129 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12130 bfd_vma residual;
12131 bfd_signed_vma signed_value;
12132 int group = 0;
12133
12134 /* Determine which groups of bits to calculate. */
12135 switch (r_type)
12136 {
12137 case R_ARM_LDR_PC_G0:
12138 case R_ARM_LDR_SB_G0:
12139 group = 0;
12140 break;
12141
12142 case R_ARM_LDR_PC_G1:
12143 case R_ARM_LDR_SB_G1:
12144 group = 1;
12145 break;
12146
12147 case R_ARM_LDR_PC_G2:
12148 case R_ARM_LDR_SB_G2:
12149 group = 2;
12150 break;
12151
12152 default:
12153 abort ();
12154 }
12155
12156 /* If REL, extract the addend from the insn. If RELA, it will
12157 have already been fetched for us. */
12158 if (globals->use_rel)
12159 {
12160 int negative = (insn & (1 << 23)) ? 1 : -1;
12161 signed_addend = negative * (insn & 0xfff);
12162 }
12163
12164 /* Compute the value (X) to go in the place. */
12165 if (r_type == R_ARM_LDR_PC_G0
12166 || r_type == R_ARM_LDR_PC_G1
12167 || r_type == R_ARM_LDR_PC_G2)
12168 /* PC relative. */
12169 signed_value = value - pc + signed_addend;
12170 else
12171 /* Section base relative. */
12172 signed_value = value - sb + signed_addend;
12173
12174 /* Calculate the value of the relevant G_{n-1} to obtain
12175 the residual at that stage. */
12176 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12177 group - 1, &residual);
12178
12179 /* Check for overflow. */
12180 if (residual >= 0x1000)
12181 {
12182 _bfd_error_handler
12183 /* xgettext:c-format */
12184 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12185 "splitting %#" PRIx64 " for group relocation %s"),
12186 input_bfd, input_section, (uint64_t) rel->r_offset,
12187 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12188 howto->name);
12189 return bfd_reloc_overflow;
12190 }
12191
12192 /* Mask out the value and U bit. */
12193 insn &= 0xff7ff000;
12194
12195 /* Set the U bit if the value to go in the place is non-negative. */
12196 if (signed_value >= 0)
12197 insn |= 1 << 23;
12198
12199 /* Encode the offset. */
12200 insn |= residual;
12201
12202 bfd_put_32 (input_bfd, insn, hit_data);
12203 }
12204 return bfd_reloc_ok;
12205
12206 case R_ARM_LDRS_PC_G0:
12207 case R_ARM_LDRS_PC_G1:
12208 case R_ARM_LDRS_PC_G2:
12209 case R_ARM_LDRS_SB_G0:
12210 case R_ARM_LDRS_SB_G1:
12211 case R_ARM_LDRS_SB_G2:
12212 {
12213 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12214 bfd_vma pc = input_section->output_section->vma
12215 + input_section->output_offset + rel->r_offset;
12216 /* sb is the origin of the *segment* containing the symbol. */
12217 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12218 bfd_vma residual;
12219 bfd_signed_vma signed_value;
12220 int group = 0;
12221
12222 /* Determine which groups of bits to calculate. */
12223 switch (r_type)
12224 {
12225 case R_ARM_LDRS_PC_G0:
12226 case R_ARM_LDRS_SB_G0:
12227 group = 0;
12228 break;
12229
12230 case R_ARM_LDRS_PC_G1:
12231 case R_ARM_LDRS_SB_G1:
12232 group = 1;
12233 break;
12234
12235 case R_ARM_LDRS_PC_G2:
12236 case R_ARM_LDRS_SB_G2:
12237 group = 2;
12238 break;
12239
12240 default:
12241 abort ();
12242 }
12243
12244 /* If REL, extract the addend from the insn. If RELA, it will
12245 have already been fetched for us. */
12246 if (globals->use_rel)
12247 {
12248 int negative = (insn & (1 << 23)) ? 1 : -1;
12249 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12250 }
12251
12252 /* Compute the value (X) to go in the place. */
12253 if (r_type == R_ARM_LDRS_PC_G0
12254 || r_type == R_ARM_LDRS_PC_G1
12255 || r_type == R_ARM_LDRS_PC_G2)
12256 /* PC relative. */
12257 signed_value = value - pc + signed_addend;
12258 else
12259 /* Section base relative. */
12260 signed_value = value - sb + signed_addend;
12261
12262 /* Calculate the value of the relevant G_{n-1} to obtain
12263 the residual at that stage. */
12264 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12265 group - 1, &residual);
12266
12267 /* Check for overflow. */
12268 if (residual >= 0x100)
12269 {
12270 _bfd_error_handler
12271 /* xgettext:c-format */
12272 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12273 "splitting %#" PRIx64 " for group relocation %s"),
12274 input_bfd, input_section, (uint64_t) rel->r_offset,
12275 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12276 howto->name);
12277 return bfd_reloc_overflow;
12278 }
12279
12280 /* Mask out the value and U bit. */
12281 insn &= 0xff7ff0f0;
12282
12283 /* Set the U bit if the value to go in the place is non-negative. */
12284 if (signed_value >= 0)
12285 insn |= 1 << 23;
12286
12287 /* Encode the offset. */
12288 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12289
12290 bfd_put_32 (input_bfd, insn, hit_data);
12291 }
12292 return bfd_reloc_ok;
12293
12294 case R_ARM_LDC_PC_G0:
12295 case R_ARM_LDC_PC_G1:
12296 case R_ARM_LDC_PC_G2:
12297 case R_ARM_LDC_SB_G0:
12298 case R_ARM_LDC_SB_G1:
12299 case R_ARM_LDC_SB_G2:
12300 {
12301 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12302 bfd_vma pc = input_section->output_section->vma
12303 + input_section->output_offset + rel->r_offset;
12304 /* sb is the origin of the *segment* containing the symbol. */
12305 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12306 bfd_vma residual;
12307 bfd_signed_vma signed_value;
12308 int group = 0;
12309
12310 /* Determine which groups of bits to calculate. */
12311 switch (r_type)
12312 {
12313 case R_ARM_LDC_PC_G0:
12314 case R_ARM_LDC_SB_G0:
12315 group = 0;
12316 break;
12317
12318 case R_ARM_LDC_PC_G1:
12319 case R_ARM_LDC_SB_G1:
12320 group = 1;
12321 break;
12322
12323 case R_ARM_LDC_PC_G2:
12324 case R_ARM_LDC_SB_G2:
12325 group = 2;
12326 break;
12327
12328 default:
12329 abort ();
12330 }
12331
12332 /* If REL, extract the addend from the insn. If RELA, it will
12333 have already been fetched for us. */
12334 if (globals->use_rel)
12335 {
12336 int negative = (insn & (1 << 23)) ? 1 : -1;
12337 signed_addend = negative * ((insn & 0xff) << 2);
12338 }
12339
12340 /* Compute the value (X) to go in the place. */
12341 if (r_type == R_ARM_LDC_PC_G0
12342 || r_type == R_ARM_LDC_PC_G1
12343 || r_type == R_ARM_LDC_PC_G2)
12344 /* PC relative. */
12345 signed_value = value - pc + signed_addend;
12346 else
12347 /* Section base relative. */
12348 signed_value = value - sb + signed_addend;
12349
12350 /* Calculate the value of the relevant G_{n-1} to obtain
12351 the residual at that stage. */
12352 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12353 group - 1, &residual);
12354
12355 /* Check for overflow. (The absolute value to go in the place must be
12356 divisible by four and, after having been divided by four, must
12357 fit in eight bits.) */
12358 if ((residual & 0x3) != 0 || residual >= 0x400)
12359 {
12360 _bfd_error_handler
12361 /* xgettext:c-format */
12362 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12363 "splitting %#" PRIx64 " for group relocation %s"),
12364 input_bfd, input_section, (uint64_t) rel->r_offset,
12365 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12366 howto->name);
12367 return bfd_reloc_overflow;
12368 }
12369
12370 /* Mask out the value and U bit. */
12371 insn &= 0xff7fff00;
12372
12373 /* Set the U bit if the value to go in the place is non-negative. */
12374 if (signed_value >= 0)
12375 insn |= 1 << 23;
12376
12377 /* Encode the offset. */
12378 insn |= residual >> 2;
12379
12380 bfd_put_32 (input_bfd, insn, hit_data);
12381 }
12382 return bfd_reloc_ok;
12383
12384 case R_ARM_THM_ALU_ABS_G0_NC:
12385 case R_ARM_THM_ALU_ABS_G1_NC:
12386 case R_ARM_THM_ALU_ABS_G2_NC:
12387 case R_ARM_THM_ALU_ABS_G3_NC:
12388 {
12389 const int shift_array[4] = {0, 8, 16, 24};
12390 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12391 bfd_vma addr = value;
12392 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12393
12394 /* Compute address. */
12395 if (globals->use_rel)
12396 signed_addend = insn & 0xff;
12397 addr += signed_addend;
12398 if (branch_type == ST_BRANCH_TO_THUMB)
12399 addr |= 1;
12400 /* Clean imm8 insn. */
12401 insn &= 0xff00;
12402 /* And update with correct part of address. */
12403 insn |= (addr >> shift) & 0xff;
12404 /* Update insn. */
12405 bfd_put_16 (input_bfd, insn, hit_data);
12406 }
12407
12408 *unresolved_reloc_p = FALSE;
12409 return bfd_reloc_ok;
12410
12411 case R_ARM_GOTOFFFUNCDESC:
12412 {
12413 if (h == NULL)
12414 {
12415 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12416 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12417 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12418 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12419 bfd_vma seg = -1;
12420
12421 if (bfd_link_pic(info) && dynindx == 0)
12422 abort();
12423
12424 /* Resolve relocation. */
12425 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12426 , contents + rel->r_offset);
12427 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12428 not done yet. */
12429 arm_elf_fill_funcdesc(output_bfd, info,
12430 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12431 dynindx, offset, addr, dynreloc_value, seg);
12432 }
12433 else
12434 {
12435 int dynindx;
12436 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12437 bfd_vma addr;
12438 bfd_vma seg = -1;
12439
12440 /* For static binaries, sym_sec can be null. */
12441 if (sym_sec)
12442 {
12443 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12444 addr = dynreloc_value - sym_sec->output_section->vma;
12445 }
12446 else
12447 {
12448 dynindx = 0;
12449 addr = 0;
12450 }
12451
12452 if (bfd_link_pic(info) && dynindx == 0)
12453 abort();
12454
12455 /* This case cannot occur since funcdesc is allocated by
12456 the dynamic loader so we cannot resolve the relocation. */
12457 if (h->dynindx != -1)
12458 abort();
12459
12460 /* Resolve relocation. */
12461 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12462 contents + rel->r_offset);
12463 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12464 arm_elf_fill_funcdesc(output_bfd, info,
12465 &eh->fdpic_cnts.funcdesc_offset,
12466 dynindx, offset, addr, dynreloc_value, seg);
12467 }
12468 }
12469 *unresolved_reloc_p = FALSE;
12470 return bfd_reloc_ok;
12471
12472 case R_ARM_GOTFUNCDESC:
12473 {
12474 if (h != NULL)
12475 {
12476 Elf_Internal_Rela outrel;
12477
12478 /* Resolve relocation. */
12479 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12480 + sgot->output_offset),
12481 contents + rel->r_offset);
12482 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12483 if(h->dynindx == -1)
12484 {
12485 int dynindx;
12486 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12487 bfd_vma addr;
12488 bfd_vma seg = -1;
12489
12490 /* For static binaries sym_sec can be null. */
12491 if (sym_sec)
12492 {
12493 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12494 addr = dynreloc_value - sym_sec->output_section->vma;
12495 }
12496 else
12497 {
12498 dynindx = 0;
12499 addr = 0;
12500 }
12501
12502 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12503 arm_elf_fill_funcdesc(output_bfd, info,
12504 &eh->fdpic_cnts.funcdesc_offset,
12505 dynindx, offset, addr, dynreloc_value, seg);
12506 }
12507
12508 /* Add a dynamic relocation on GOT entry if not already done. */
12509 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12510 {
12511 if (h->dynindx == -1)
12512 {
12513 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12514 if (h->root.type == bfd_link_hash_undefweak)
12515 bfd_put_32(output_bfd, 0, sgot->contents
12516 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12517 else
12518 bfd_put_32(output_bfd, sgot->output_section->vma
12519 + sgot->output_offset
12520 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12521 sgot->contents
12522 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12523 }
12524 else
12525 {
12526 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12527 }
12528 outrel.r_offset = sgot->output_section->vma
12529 + sgot->output_offset
12530 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12531 outrel.r_addend = 0;
12532 if (h->dynindx == -1 && !bfd_link_pic(info))
12533 if (h->root.type == bfd_link_hash_undefweak)
12534 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12535 else
12536 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12537 else
12538 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12539 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12540 }
12541 }
12542 else
12543 {
12544 /* Such relocation on static function should not have been
12545 emitted by the compiler. */
12546 abort();
12547 }
12548 }
12549 *unresolved_reloc_p = FALSE;
12550 return bfd_reloc_ok;
12551
12552 case R_ARM_FUNCDESC:
12553 {
12554 if (h == NULL)
12555 {
12556 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12557 Elf_Internal_Rela outrel;
12558 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12559 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12560 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12561 bfd_vma seg = -1;
12562
12563 if (bfd_link_pic(info) && dynindx == 0)
12564 abort();
12565
12566 /* Replace static FUNCDESC relocation with a
12567 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12568 executable. */
12569 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12570 outrel.r_offset = input_section->output_section->vma
12571 + input_section->output_offset + rel->r_offset;
12572 outrel.r_addend = 0;
12573 if (bfd_link_pic(info))
12574 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12575 else
12576 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12577
12578 bfd_put_32 (input_bfd, sgot->output_section->vma
12579 + sgot->output_offset + offset, hit_data);
12580
12581 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12582 arm_elf_fill_funcdesc(output_bfd, info,
12583 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12584 dynindx, offset, addr, dynreloc_value, seg);
12585 }
12586 else
12587 {
12588 if (h->dynindx == -1)
12589 {
12590 int dynindx;
12591 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12592 bfd_vma addr;
12593 bfd_vma seg = -1;
12594 Elf_Internal_Rela outrel;
12595
12596 /* For static binaries sym_sec can be null. */
12597 if (sym_sec)
12598 {
12599 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12600 addr = dynreloc_value - sym_sec->output_section->vma;
12601 }
12602 else
12603 {
12604 dynindx = 0;
12605 addr = 0;
12606 }
12607
12608 if (bfd_link_pic(info) && dynindx == 0)
12609 abort();
12610
12611 /* Replace static FUNCDESC relocation with a
12612 R_ARM_RELATIVE dynamic relocation. */
12613 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12614 outrel.r_offset = input_section->output_section->vma
12615 + input_section->output_offset + rel->r_offset;
12616 outrel.r_addend = 0;
12617 if (bfd_link_pic(info))
12618 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12619 else
12620 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12621
12622 bfd_put_32 (input_bfd, sgot->output_section->vma
12623 + sgot->output_offset + offset, hit_data);
12624
12625 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12626 arm_elf_fill_funcdesc(output_bfd, info,
12627 &eh->fdpic_cnts.funcdesc_offset,
12628 dynindx, offset, addr, dynreloc_value, seg);
12629 }
12630 else
12631 {
12632 Elf_Internal_Rela outrel;
12633
12634 /* Add a dynamic relocation. */
12635 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12636 outrel.r_offset = input_section->output_section->vma
12637 + input_section->output_offset + rel->r_offset;
12638 outrel.r_addend = 0;
12639 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12640 }
12641 }
12642 }
12643 *unresolved_reloc_p = FALSE;
12644 return bfd_reloc_ok;
12645
12646 default:
12647 return bfd_reloc_notsupported;
12648 }
12649 }
12650
12651 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12652 static void
12653 arm_add_to_rel (bfd * abfd,
12654 bfd_byte * address,
12655 reloc_howto_type * howto,
12656 bfd_signed_vma increment)
12657 {
12658 bfd_signed_vma addend;
12659
12660 if (howto->type == R_ARM_THM_CALL
12661 || howto->type == R_ARM_THM_JUMP24)
12662 {
12663 int upper_insn, lower_insn;
12664 int upper, lower;
12665
12666 upper_insn = bfd_get_16 (abfd, address);
12667 lower_insn = bfd_get_16 (abfd, address + 2);
12668 upper = upper_insn & 0x7ff;
12669 lower = lower_insn & 0x7ff;
12670
12671 addend = (upper << 12) | (lower << 1);
12672 addend += increment;
12673 addend >>= 1;
12674
12675 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12676 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12677
12678 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12679 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12680 }
12681 else
12682 {
12683 bfd_vma contents;
12684
12685 contents = bfd_get_32 (abfd, address);
12686
12687 /* Get the (signed) value from the instruction. */
12688 addend = contents & howto->src_mask;
12689 if (addend & ((howto->src_mask + 1) >> 1))
12690 {
12691 bfd_signed_vma mask;
12692
12693 mask = -1;
12694 mask &= ~ howto->src_mask;
12695 addend |= mask;
12696 }
12697
12698 /* Add in the increment, (which is a byte value). */
12699 switch (howto->type)
12700 {
12701 default:
12702 addend += increment;
12703 break;
12704
12705 case R_ARM_PC24:
12706 case R_ARM_PLT32:
12707 case R_ARM_CALL:
12708 case R_ARM_JUMP24:
12709 addend <<= howto->size;
12710 addend += increment;
12711
12712 /* Should we check for overflow here ? */
12713
12714 /* Drop any undesired bits. */
12715 addend >>= howto->rightshift;
12716 break;
12717 }
12718
12719 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12720
12721 bfd_put_32 (abfd, contents, address);
12722 }
12723 }
12724
12725 #define IS_ARM_TLS_RELOC(R_TYPE) \
12726 ((R_TYPE) == R_ARM_TLS_GD32 \
12727 || (R_TYPE) == R_ARM_TLS_LDO32 \
12728 || (R_TYPE) == R_ARM_TLS_LDM32 \
12729 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12730 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12731 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12732 || (R_TYPE) == R_ARM_TLS_LE32 \
12733 || (R_TYPE) == R_ARM_TLS_IE32 \
12734 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12735
12736 /* Specific set of relocations for the gnu tls dialect. */
12737 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12738 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12739 || (R_TYPE) == R_ARM_TLS_CALL \
12740 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12741 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12742 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12743
12744 /* Relocate an ARM ELF section. */
12745
12746 static bfd_boolean
12747 elf32_arm_relocate_section (bfd * output_bfd,
12748 struct bfd_link_info * info,
12749 bfd * input_bfd,
12750 asection * input_section,
12751 bfd_byte * contents,
12752 Elf_Internal_Rela * relocs,
12753 Elf_Internal_Sym * local_syms,
12754 asection ** local_sections)
12755 {
12756 Elf_Internal_Shdr *symtab_hdr;
12757 struct elf_link_hash_entry **sym_hashes;
12758 Elf_Internal_Rela *rel;
12759 Elf_Internal_Rela *relend;
12760 const char *name;
12761 struct elf32_arm_link_hash_table * globals;
12762
12763 globals = elf32_arm_hash_table (info);
12764 if (globals == NULL)
12765 return FALSE;
12766
12767 symtab_hdr = & elf_symtab_hdr (input_bfd);
12768 sym_hashes = elf_sym_hashes (input_bfd);
12769
12770 rel = relocs;
12771 relend = relocs + input_section->reloc_count;
12772 for (; rel < relend; rel++)
12773 {
12774 int r_type;
12775 reloc_howto_type * howto;
12776 unsigned long r_symndx;
12777 Elf_Internal_Sym * sym;
12778 asection * sec;
12779 struct elf_link_hash_entry * h;
12780 bfd_vma relocation;
12781 bfd_reloc_status_type r;
12782 arelent bfd_reloc;
12783 char sym_type;
12784 bfd_boolean unresolved_reloc = FALSE;
12785 char *error_message = NULL;
12786
12787 r_symndx = ELF32_R_SYM (rel->r_info);
12788 r_type = ELF32_R_TYPE (rel->r_info);
12789 r_type = arm_real_reloc_type (globals, r_type);
12790
12791 if ( r_type == R_ARM_GNU_VTENTRY
12792 || r_type == R_ARM_GNU_VTINHERIT)
12793 continue;
12794
12795 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12796
12797 if (howto == NULL)
12798 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
12799
12800 h = NULL;
12801 sym = NULL;
12802 sec = NULL;
12803
12804 if (r_symndx < symtab_hdr->sh_info)
12805 {
12806 sym = local_syms + r_symndx;
12807 sym_type = ELF32_ST_TYPE (sym->st_info);
12808 sec = local_sections[r_symndx];
12809
12810 /* An object file might have a reference to a local
12811 undefined symbol. This is a daft object file, but we
12812 should at least do something about it. V4BX & NONE
12813 relocations do not use the symbol and are explicitly
12814 allowed to use the undefined symbol, so allow those.
12815 Likewise for relocations against STN_UNDEF. */
12816 if (r_type != R_ARM_V4BX
12817 && r_type != R_ARM_NONE
12818 && r_symndx != STN_UNDEF
12819 && bfd_is_und_section (sec)
12820 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12821 (*info->callbacks->undefined_symbol)
12822 (info, bfd_elf_string_from_elf_section
12823 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12824 input_bfd, input_section,
12825 rel->r_offset, TRUE);
12826
12827 if (globals->use_rel)
12828 {
12829 relocation = (sec->output_section->vma
12830 + sec->output_offset
12831 + sym->st_value);
12832 if (!bfd_link_relocatable (info)
12833 && (sec->flags & SEC_MERGE)
12834 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12835 {
12836 asection *msec;
12837 bfd_vma addend, value;
12838
12839 switch (r_type)
12840 {
12841 case R_ARM_MOVW_ABS_NC:
12842 case R_ARM_MOVT_ABS:
12843 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12844 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12845 addend = (addend ^ 0x8000) - 0x8000;
12846 break;
12847
12848 case R_ARM_THM_MOVW_ABS_NC:
12849 case R_ARM_THM_MOVT_ABS:
12850 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12851 << 16;
12852 value |= bfd_get_16 (input_bfd,
12853 contents + rel->r_offset + 2);
12854 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12855 | ((value & 0x04000000) >> 15);
12856 addend = (addend ^ 0x8000) - 0x8000;
12857 break;
12858
12859 default:
12860 if (howto->rightshift
12861 || (howto->src_mask & (howto->src_mask + 1)))
12862 {
12863 _bfd_error_handler
12864 /* xgettext:c-format */
12865 (_("%pB(%pA+%#" PRIx64 "): "
12866 "%s relocation against SEC_MERGE section"),
12867 input_bfd, input_section,
12868 (uint64_t) rel->r_offset, howto->name);
12869 return FALSE;
12870 }
12871
12872 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12873
12874 /* Get the (signed) value from the instruction. */
12875 addend = value & howto->src_mask;
12876 if (addend & ((howto->src_mask + 1) >> 1))
12877 {
12878 bfd_signed_vma mask;
12879
12880 mask = -1;
12881 mask &= ~ howto->src_mask;
12882 addend |= mask;
12883 }
12884 break;
12885 }
12886
12887 msec = sec;
12888 addend =
12889 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12890 - relocation;
12891 addend += msec->output_section->vma + msec->output_offset;
12892
12893 /* Cases here must match those in the preceding
12894 switch statement. */
12895 switch (r_type)
12896 {
12897 case R_ARM_MOVW_ABS_NC:
12898 case R_ARM_MOVT_ABS:
12899 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12900 | (addend & 0xfff);
12901 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12902 break;
12903
12904 case R_ARM_THM_MOVW_ABS_NC:
12905 case R_ARM_THM_MOVT_ABS:
12906 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12907 | (addend & 0xff) | ((addend & 0x0800) << 15);
12908 bfd_put_16 (input_bfd, value >> 16,
12909 contents + rel->r_offset);
12910 bfd_put_16 (input_bfd, value,
12911 contents + rel->r_offset + 2);
12912 break;
12913
12914 default:
12915 value = (value & ~ howto->dst_mask)
12916 | (addend & howto->dst_mask);
12917 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12918 break;
12919 }
12920 }
12921 }
12922 else
12923 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12924 }
12925 else
12926 {
12927 bfd_boolean warned, ignored;
12928
12929 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12930 r_symndx, symtab_hdr, sym_hashes,
12931 h, sec, relocation,
12932 unresolved_reloc, warned, ignored);
12933
12934 sym_type = h->type;
12935 }
12936
12937 if (sec != NULL && discarded_section (sec))
12938 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12939 rel, 1, relend, howto, 0, contents);
12940
12941 if (bfd_link_relocatable (info))
12942 {
12943 /* This is a relocatable link. We don't have to change
12944 anything, unless the reloc is against a section symbol,
12945 in which case we have to adjust according to where the
12946 section symbol winds up in the output section. */
12947 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12948 {
12949 if (globals->use_rel)
12950 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12951 howto, (bfd_signed_vma) sec->output_offset);
12952 else
12953 rel->r_addend += sec->output_offset;
12954 }
12955 continue;
12956 }
12957
12958 if (h != NULL)
12959 name = h->root.root.string;
12960 else
12961 {
12962 name = (bfd_elf_string_from_elf_section
12963 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12964 if (name == NULL || *name == '\0')
12965 name = bfd_section_name (input_bfd, sec);
12966 }
12967
12968 if (r_symndx != STN_UNDEF
12969 && r_type != R_ARM_NONE
12970 && (h == NULL
12971 || h->root.type == bfd_link_hash_defined
12972 || h->root.type == bfd_link_hash_defweak)
12973 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12974 {
12975 _bfd_error_handler
12976 ((sym_type == STT_TLS
12977 /* xgettext:c-format */
12978 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
12979 /* xgettext:c-format */
12980 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
12981 input_bfd,
12982 input_section,
12983 (uint64_t) rel->r_offset,
12984 howto->name,
12985 name);
12986 }
12987
12988 /* We call elf32_arm_final_link_relocate unless we're completely
12989 done, i.e., the relaxation produced the final output we want,
12990 and we won't let anybody mess with it. Also, we have to do
12991 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12992 both in relaxed and non-relaxed cases. */
12993 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12994 || (IS_ARM_TLS_GNU_RELOC (r_type)
12995 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12996 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12997 & GOT_TLS_GDESC)))
12998 {
12999 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13000 contents, rel, h == NULL);
13001 /* This may have been marked unresolved because it came from
13002 a shared library. But we've just dealt with that. */
13003 unresolved_reloc = 0;
13004 }
13005 else
13006 r = bfd_reloc_continue;
13007
13008 if (r == bfd_reloc_continue)
13009 {
13010 unsigned char branch_type =
13011 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13012 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13013
13014 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13015 input_section, contents, rel,
13016 relocation, info, sec, name,
13017 sym_type, branch_type, h,
13018 &unresolved_reloc,
13019 &error_message);
13020 }
13021
13022 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13023 because such sections are not SEC_ALLOC and thus ld.so will
13024 not process them. */
13025 if (unresolved_reloc
13026 && !((input_section->flags & SEC_DEBUGGING) != 0
13027 && h->def_dynamic)
13028 && _bfd_elf_section_offset (output_bfd, info, input_section,
13029 rel->r_offset) != (bfd_vma) -1)
13030 {
13031 _bfd_error_handler
13032 /* xgettext:c-format */
13033 (_("%pB(%pA+%#" PRIx64 "): "
13034 "unresolvable %s relocation against symbol `%s'"),
13035 input_bfd,
13036 input_section,
13037 (uint64_t) rel->r_offset,
13038 howto->name,
13039 h->root.root.string);
13040 return FALSE;
13041 }
13042
13043 if (r != bfd_reloc_ok)
13044 {
13045 switch (r)
13046 {
13047 case bfd_reloc_overflow:
13048 /* If the overflowing reloc was to an undefined symbol,
13049 we have already printed one error message and there
13050 is no point complaining again. */
13051 if (!h || h->root.type != bfd_link_hash_undefined)
13052 (*info->callbacks->reloc_overflow)
13053 (info, (h ? &h->root : NULL), name, howto->name,
13054 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13055 break;
13056
13057 case bfd_reloc_undefined:
13058 (*info->callbacks->undefined_symbol)
13059 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13060 break;
13061
13062 case bfd_reloc_outofrange:
13063 error_message = _("out of range");
13064 goto common_error;
13065
13066 case bfd_reloc_notsupported:
13067 error_message = _("unsupported relocation");
13068 goto common_error;
13069
13070 case bfd_reloc_dangerous:
13071 /* error_message should already be set. */
13072 goto common_error;
13073
13074 default:
13075 error_message = _("unknown error");
13076 /* Fall through. */
13077
13078 common_error:
13079 BFD_ASSERT (error_message != NULL);
13080 (*info->callbacks->reloc_dangerous)
13081 (info, error_message, input_bfd, input_section, rel->r_offset);
13082 break;
13083 }
13084 }
13085 }
13086
13087 return TRUE;
13088 }
13089
13090 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13091 adds the edit to the start of the list. (The list must be built in order of
13092 ascending TINDEX: the function's callers are primarily responsible for
13093 maintaining that condition). */
13094
13095 static void
13096 add_unwind_table_edit (arm_unwind_table_edit **head,
13097 arm_unwind_table_edit **tail,
13098 arm_unwind_edit_type type,
13099 asection *linked_section,
13100 unsigned int tindex)
13101 {
13102 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13103 xmalloc (sizeof (arm_unwind_table_edit));
13104
13105 new_edit->type = type;
13106 new_edit->linked_section = linked_section;
13107 new_edit->index = tindex;
13108
13109 if (tindex > 0)
13110 {
13111 new_edit->next = NULL;
13112
13113 if (*tail)
13114 (*tail)->next = new_edit;
13115
13116 (*tail) = new_edit;
13117
13118 if (!*head)
13119 (*head) = new_edit;
13120 }
13121 else
13122 {
13123 new_edit->next = *head;
13124
13125 if (!*tail)
13126 *tail = new_edit;
13127
13128 *head = new_edit;
13129 }
13130 }
13131
13132 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13133
13134 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13135 static void
13136 adjust_exidx_size(asection *exidx_sec, int adjust)
13137 {
13138 asection *out_sec;
13139
13140 if (!exidx_sec->rawsize)
13141 exidx_sec->rawsize = exidx_sec->size;
13142
13143 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
13144 out_sec = exidx_sec->output_section;
13145 /* Adjust size of output section. */
13146 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
13147 }
13148
13149 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13150 static void
13151 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13152 {
13153 struct _arm_elf_section_data *exidx_arm_data;
13154
13155 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13156 add_unwind_table_edit (
13157 &exidx_arm_data->u.exidx.unwind_edit_list,
13158 &exidx_arm_data->u.exidx.unwind_edit_tail,
13159 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13160
13161 exidx_arm_data->additional_reloc_count++;
13162
13163 adjust_exidx_size(exidx_sec, 8);
13164 }
13165
13166 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13167 made to those tables, such that:
13168
13169 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13170 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13171 codes which have been inlined into the index).
13172
13173 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13174
13175 The edits are applied when the tables are written
13176 (in elf32_arm_write_section). */
13177
13178 bfd_boolean
13179 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13180 unsigned int num_text_sections,
13181 struct bfd_link_info *info,
13182 bfd_boolean merge_exidx_entries)
13183 {
13184 bfd *inp;
13185 unsigned int last_second_word = 0, i;
13186 asection *last_exidx_sec = NULL;
13187 asection *last_text_sec = NULL;
13188 int last_unwind_type = -1;
13189
13190 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13191 text sections. */
13192 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13193 {
13194 asection *sec;
13195
13196 for (sec = inp->sections; sec != NULL; sec = sec->next)
13197 {
13198 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13199 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13200
13201 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13202 continue;
13203
13204 if (elf_sec->linked_to)
13205 {
13206 Elf_Internal_Shdr *linked_hdr
13207 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13208 struct _arm_elf_section_data *linked_sec_arm_data
13209 = get_arm_elf_section_data (linked_hdr->bfd_section);
13210
13211 if (linked_sec_arm_data == NULL)
13212 continue;
13213
13214 /* Link this .ARM.exidx section back from the text section it
13215 describes. */
13216 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13217 }
13218 }
13219 }
13220
13221 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13222 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13223 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13224
13225 for (i = 0; i < num_text_sections; i++)
13226 {
13227 asection *sec = text_section_order[i];
13228 asection *exidx_sec;
13229 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13230 struct _arm_elf_section_data *exidx_arm_data;
13231 bfd_byte *contents = NULL;
13232 int deleted_exidx_bytes = 0;
13233 bfd_vma j;
13234 arm_unwind_table_edit *unwind_edit_head = NULL;
13235 arm_unwind_table_edit *unwind_edit_tail = NULL;
13236 Elf_Internal_Shdr *hdr;
13237 bfd *ibfd;
13238
13239 if (arm_data == NULL)
13240 continue;
13241
13242 exidx_sec = arm_data->u.text.arm_exidx_sec;
13243 if (exidx_sec == NULL)
13244 {
13245 /* Section has no unwind data. */
13246 if (last_unwind_type == 0 || !last_exidx_sec)
13247 continue;
13248
13249 /* Ignore zero sized sections. */
13250 if (sec->size == 0)
13251 continue;
13252
13253 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13254 last_unwind_type = 0;
13255 continue;
13256 }
13257
13258 /* Skip /DISCARD/ sections. */
13259 if (bfd_is_abs_section (exidx_sec->output_section))
13260 continue;
13261
13262 hdr = &elf_section_data (exidx_sec)->this_hdr;
13263 if (hdr->sh_type != SHT_ARM_EXIDX)
13264 continue;
13265
13266 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13267 if (exidx_arm_data == NULL)
13268 continue;
13269
13270 ibfd = exidx_sec->owner;
13271
13272 if (hdr->contents != NULL)
13273 contents = hdr->contents;
13274 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13275 /* An error? */
13276 continue;
13277
13278 if (last_unwind_type > 0)
13279 {
13280 unsigned int first_word = bfd_get_32 (ibfd, contents);
13281 /* Add cantunwind if first unwind item does not match section
13282 start. */
13283 if (first_word != sec->vma)
13284 {
13285 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13286 last_unwind_type = 0;
13287 }
13288 }
13289
13290 for (j = 0; j < hdr->sh_size; j += 8)
13291 {
13292 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13293 int unwind_type;
13294 int elide = 0;
13295
13296 /* An EXIDX_CANTUNWIND entry. */
13297 if (second_word == 1)
13298 {
13299 if (last_unwind_type == 0)
13300 elide = 1;
13301 unwind_type = 0;
13302 }
13303 /* Inlined unwinding data. Merge if equal to previous. */
13304 else if ((second_word & 0x80000000) != 0)
13305 {
13306 if (merge_exidx_entries
13307 && last_second_word == second_word && last_unwind_type == 1)
13308 elide = 1;
13309 unwind_type = 1;
13310 last_second_word = second_word;
13311 }
13312 /* Normal table entry. In theory we could merge these too,
13313 but duplicate entries are likely to be much less common. */
13314 else
13315 unwind_type = 2;
13316
13317 if (elide && !bfd_link_relocatable (info))
13318 {
13319 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13320 DELETE_EXIDX_ENTRY, NULL, j / 8);
13321
13322 deleted_exidx_bytes += 8;
13323 }
13324
13325 last_unwind_type = unwind_type;
13326 }
13327
13328 /* Free contents if we allocated it ourselves. */
13329 if (contents != hdr->contents)
13330 free (contents);
13331
13332 /* Record edits to be applied later (in elf32_arm_write_section). */
13333 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13334 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13335
13336 if (deleted_exidx_bytes > 0)
13337 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13338
13339 last_exidx_sec = exidx_sec;
13340 last_text_sec = sec;
13341 }
13342
13343 /* Add terminating CANTUNWIND entry. */
13344 if (!bfd_link_relocatable (info) && last_exidx_sec
13345 && last_unwind_type != 0)
13346 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13347
13348 return TRUE;
13349 }
13350
13351 static bfd_boolean
13352 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13353 bfd *ibfd, const char *name)
13354 {
13355 asection *sec, *osec;
13356
13357 sec = bfd_get_linker_section (ibfd, name);
13358 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13359 return TRUE;
13360
13361 osec = sec->output_section;
13362 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13363 return TRUE;
13364
13365 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13366 sec->output_offset, sec->size))
13367 return FALSE;
13368
13369 return TRUE;
13370 }
13371
13372 static bfd_boolean
13373 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13374 {
13375 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13376 asection *sec, *osec;
13377
13378 if (globals == NULL)
13379 return FALSE;
13380
13381 /* Invoke the regular ELF backend linker to do all the work. */
13382 if (!bfd_elf_final_link (abfd, info))
13383 return FALSE;
13384
13385 /* Process stub sections (eg BE8 encoding, ...). */
13386 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13387 unsigned int i;
13388 for (i=0; i<htab->top_id; i++)
13389 {
13390 sec = htab->stub_group[i].stub_sec;
13391 /* Only process it once, in its link_sec slot. */
13392 if (sec && i == htab->stub_group[i].link_sec->id)
13393 {
13394 osec = sec->output_section;
13395 elf32_arm_write_section (abfd, info, sec, sec->contents);
13396 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13397 sec->output_offset, sec->size))
13398 return FALSE;
13399 }
13400 }
13401
13402 /* Write out any glue sections now that we have created all the
13403 stubs. */
13404 if (globals->bfd_of_glue_owner != NULL)
13405 {
13406 if (! elf32_arm_output_glue_section (info, abfd,
13407 globals->bfd_of_glue_owner,
13408 ARM2THUMB_GLUE_SECTION_NAME))
13409 return FALSE;
13410
13411 if (! elf32_arm_output_glue_section (info, abfd,
13412 globals->bfd_of_glue_owner,
13413 THUMB2ARM_GLUE_SECTION_NAME))
13414 return FALSE;
13415
13416 if (! elf32_arm_output_glue_section (info, abfd,
13417 globals->bfd_of_glue_owner,
13418 VFP11_ERRATUM_VENEER_SECTION_NAME))
13419 return FALSE;
13420
13421 if (! elf32_arm_output_glue_section (info, abfd,
13422 globals->bfd_of_glue_owner,
13423 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13424 return FALSE;
13425
13426 if (! elf32_arm_output_glue_section (info, abfd,
13427 globals->bfd_of_glue_owner,
13428 ARM_BX_GLUE_SECTION_NAME))
13429 return FALSE;
13430 }
13431
13432 return TRUE;
13433 }
13434
13435 /* Return a best guess for the machine number based on the attributes. */
13436
13437 static unsigned int
13438 bfd_arm_get_mach_from_attributes (bfd * abfd)
13439 {
13440 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13441
13442 switch (arch)
13443 {
13444 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13445 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13446 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13447
13448 case TAG_CPU_ARCH_V5TE:
13449 {
13450 char * name;
13451
13452 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13453 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13454
13455 if (name)
13456 {
13457 if (strcmp (name, "IWMMXT2") == 0)
13458 return bfd_mach_arm_iWMMXt2;
13459
13460 if (strcmp (name, "IWMMXT") == 0)
13461 return bfd_mach_arm_iWMMXt;
13462
13463 if (strcmp (name, "XSCALE") == 0)
13464 {
13465 int wmmx;
13466
13467 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13468 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13469 switch (wmmx)
13470 {
13471 case 1: return bfd_mach_arm_iWMMXt;
13472 case 2: return bfd_mach_arm_iWMMXt2;
13473 default: return bfd_mach_arm_XScale;
13474 }
13475 }
13476 }
13477
13478 return bfd_mach_arm_5TE;
13479 }
13480
13481 default:
13482 return bfd_mach_arm_unknown;
13483 }
13484 }
13485
13486 /* Set the right machine number. */
13487
13488 static bfd_boolean
13489 elf32_arm_object_p (bfd *abfd)
13490 {
13491 unsigned int mach;
13492
13493 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13494
13495 if (mach == bfd_mach_arm_unknown)
13496 {
13497 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13498 mach = bfd_mach_arm_ep9312;
13499 else
13500 mach = bfd_arm_get_mach_from_attributes (abfd);
13501 }
13502
13503 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13504 return TRUE;
13505 }
13506
13507 /* Function to keep ARM specific flags in the ELF header. */
13508
13509 static bfd_boolean
13510 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13511 {
13512 if (elf_flags_init (abfd)
13513 && elf_elfheader (abfd)->e_flags != flags)
13514 {
13515 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13516 {
13517 if (flags & EF_ARM_INTERWORK)
13518 _bfd_error_handler
13519 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13520 abfd);
13521 else
13522 _bfd_error_handler
13523 (_("warning: clearing the interworking flag of %pB due to outside request"),
13524 abfd);
13525 }
13526 }
13527 else
13528 {
13529 elf_elfheader (abfd)->e_flags = flags;
13530 elf_flags_init (abfd) = TRUE;
13531 }
13532
13533 return TRUE;
13534 }
13535
13536 /* Copy backend specific data from one object module to another. */
13537
13538 static bfd_boolean
13539 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13540 {
13541 flagword in_flags;
13542 flagword out_flags;
13543
13544 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13545 return TRUE;
13546
13547 in_flags = elf_elfheader (ibfd)->e_flags;
13548 out_flags = elf_elfheader (obfd)->e_flags;
13549
13550 if (elf_flags_init (obfd)
13551 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13552 && in_flags != out_flags)
13553 {
13554 /* Cannot mix APCS26 and APCS32 code. */
13555 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13556 return FALSE;
13557
13558 /* Cannot mix float APCS and non-float APCS code. */
13559 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13560 return FALSE;
13561
13562 /* If the src and dest have different interworking flags
13563 then turn off the interworking bit. */
13564 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13565 {
13566 if (out_flags & EF_ARM_INTERWORK)
13567 _bfd_error_handler
13568 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13569 obfd, ibfd);
13570
13571 in_flags &= ~EF_ARM_INTERWORK;
13572 }
13573
13574 /* Likewise for PIC, though don't warn for this case. */
13575 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13576 in_flags &= ~EF_ARM_PIC;
13577 }
13578
13579 elf_elfheader (obfd)->e_flags = in_flags;
13580 elf_flags_init (obfd) = TRUE;
13581
13582 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13583 }
13584
13585 /* Values for Tag_ABI_PCS_R9_use. */
13586 enum
13587 {
13588 AEABI_R9_V6,
13589 AEABI_R9_SB,
13590 AEABI_R9_TLS,
13591 AEABI_R9_unused
13592 };
13593
13594 /* Values for Tag_ABI_PCS_RW_data. */
13595 enum
13596 {
13597 AEABI_PCS_RW_data_absolute,
13598 AEABI_PCS_RW_data_PCrel,
13599 AEABI_PCS_RW_data_SBrel,
13600 AEABI_PCS_RW_data_unused
13601 };
13602
13603 /* Values for Tag_ABI_enum_size. */
13604 enum
13605 {
13606 AEABI_enum_unused,
13607 AEABI_enum_short,
13608 AEABI_enum_wide,
13609 AEABI_enum_forced_wide
13610 };
13611
13612 /* Determine whether an object attribute tag takes an integer, a
13613 string or both. */
13614
13615 static int
13616 elf32_arm_obj_attrs_arg_type (int tag)
13617 {
13618 if (tag == Tag_compatibility)
13619 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13620 else if (tag == Tag_nodefaults)
13621 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13622 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13623 return ATTR_TYPE_FLAG_STR_VAL;
13624 else if (tag < 32)
13625 return ATTR_TYPE_FLAG_INT_VAL;
13626 else
13627 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13628 }
13629
13630 /* The ABI defines that Tag_conformance should be emitted first, and that
13631 Tag_nodefaults should be second (if either is defined). This sets those
13632 two positions, and bumps up the position of all the remaining tags to
13633 compensate. */
13634 static int
13635 elf32_arm_obj_attrs_order (int num)
13636 {
13637 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13638 return Tag_conformance;
13639 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13640 return Tag_nodefaults;
13641 if ((num - 2) < Tag_nodefaults)
13642 return num - 2;
13643 if ((num - 1) < Tag_conformance)
13644 return num - 1;
13645 return num;
13646 }
13647
13648 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13649 static bfd_boolean
13650 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13651 {
13652 if ((tag & 127) < 64)
13653 {
13654 _bfd_error_handler
13655 (_("%pB: unknown mandatory EABI object attribute %d"),
13656 abfd, tag);
13657 bfd_set_error (bfd_error_bad_value);
13658 return FALSE;
13659 }
13660 else
13661 {
13662 _bfd_error_handler
13663 (_("warning: %pB: unknown EABI object attribute %d"),
13664 abfd, tag);
13665 return TRUE;
13666 }
13667 }
13668
13669 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13670 Returns -1 if no architecture could be read. */
13671
13672 static int
13673 get_secondary_compatible_arch (bfd *abfd)
13674 {
13675 obj_attribute *attr =
13676 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13677
13678 /* Note: the tag and its argument below are uleb128 values, though
13679 currently-defined values fit in one byte for each. */
13680 if (attr->s
13681 && attr->s[0] == Tag_CPU_arch
13682 && (attr->s[1] & 128) != 128
13683 && attr->s[2] == 0)
13684 return attr->s[1];
13685
13686 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13687 return -1;
13688 }
13689
13690 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13691 The tag is removed if ARCH is -1. */
13692
13693 static void
13694 set_secondary_compatible_arch (bfd *abfd, int arch)
13695 {
13696 obj_attribute *attr =
13697 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13698
13699 if (arch == -1)
13700 {
13701 attr->s = NULL;
13702 return;
13703 }
13704
13705 /* Note: the tag and its argument below are uleb128 values, though
13706 currently-defined values fit in one byte for each. */
13707 if (!attr->s)
13708 attr->s = (char *) bfd_alloc (abfd, 3);
13709 attr->s[0] = Tag_CPU_arch;
13710 attr->s[1] = arch;
13711 attr->s[2] = '\0';
13712 }
13713
13714 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13715 into account. */
13716
13717 static int
13718 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13719 int newtag, int secondary_compat)
13720 {
13721 #define T(X) TAG_CPU_ARCH_##X
13722 int tagl, tagh, result;
13723 const int v6t2[] =
13724 {
13725 T(V6T2), /* PRE_V4. */
13726 T(V6T2), /* V4. */
13727 T(V6T2), /* V4T. */
13728 T(V6T2), /* V5T. */
13729 T(V6T2), /* V5TE. */
13730 T(V6T2), /* V5TEJ. */
13731 T(V6T2), /* V6. */
13732 T(V7), /* V6KZ. */
13733 T(V6T2) /* V6T2. */
13734 };
13735 const int v6k[] =
13736 {
13737 T(V6K), /* PRE_V4. */
13738 T(V6K), /* V4. */
13739 T(V6K), /* V4T. */
13740 T(V6K), /* V5T. */
13741 T(V6K), /* V5TE. */
13742 T(V6K), /* V5TEJ. */
13743 T(V6K), /* V6. */
13744 T(V6KZ), /* V6KZ. */
13745 T(V7), /* V6T2. */
13746 T(V6K) /* V6K. */
13747 };
13748 const int v7[] =
13749 {
13750 T(V7), /* PRE_V4. */
13751 T(V7), /* V4. */
13752 T(V7), /* V4T. */
13753 T(V7), /* V5T. */
13754 T(V7), /* V5TE. */
13755 T(V7), /* V5TEJ. */
13756 T(V7), /* V6. */
13757 T(V7), /* V6KZ. */
13758 T(V7), /* V6T2. */
13759 T(V7), /* V6K. */
13760 T(V7) /* V7. */
13761 };
13762 const int v6_m[] =
13763 {
13764 -1, /* PRE_V4. */
13765 -1, /* V4. */
13766 T(V6K), /* V4T. */
13767 T(V6K), /* V5T. */
13768 T(V6K), /* V5TE. */
13769 T(V6K), /* V5TEJ. */
13770 T(V6K), /* V6. */
13771 T(V6KZ), /* V6KZ. */
13772 T(V7), /* V6T2. */
13773 T(V6K), /* V6K. */
13774 T(V7), /* V7. */
13775 T(V6_M) /* V6_M. */
13776 };
13777 const int v6s_m[] =
13778 {
13779 -1, /* PRE_V4. */
13780 -1, /* V4. */
13781 T(V6K), /* V4T. */
13782 T(V6K), /* V5T. */
13783 T(V6K), /* V5TE. */
13784 T(V6K), /* V5TEJ. */
13785 T(V6K), /* V6. */
13786 T(V6KZ), /* V6KZ. */
13787 T(V7), /* V6T2. */
13788 T(V6K), /* V6K. */
13789 T(V7), /* V7. */
13790 T(V6S_M), /* V6_M. */
13791 T(V6S_M) /* V6S_M. */
13792 };
13793 const int v7e_m[] =
13794 {
13795 -1, /* PRE_V4. */
13796 -1, /* V4. */
13797 T(V7E_M), /* V4T. */
13798 T(V7E_M), /* V5T. */
13799 T(V7E_M), /* V5TE. */
13800 T(V7E_M), /* V5TEJ. */
13801 T(V7E_M), /* V6. */
13802 T(V7E_M), /* V6KZ. */
13803 T(V7E_M), /* V6T2. */
13804 T(V7E_M), /* V6K. */
13805 T(V7E_M), /* V7. */
13806 T(V7E_M), /* V6_M. */
13807 T(V7E_M), /* V6S_M. */
13808 T(V7E_M) /* V7E_M. */
13809 };
13810 const int v8[] =
13811 {
13812 T(V8), /* PRE_V4. */
13813 T(V8), /* V4. */
13814 T(V8), /* V4T. */
13815 T(V8), /* V5T. */
13816 T(V8), /* V5TE. */
13817 T(V8), /* V5TEJ. */
13818 T(V8), /* V6. */
13819 T(V8), /* V6KZ. */
13820 T(V8), /* V6T2. */
13821 T(V8), /* V6K. */
13822 T(V8), /* V7. */
13823 T(V8), /* V6_M. */
13824 T(V8), /* V6S_M. */
13825 T(V8), /* V7E_M. */
13826 T(V8) /* V8. */
13827 };
13828 const int v8r[] =
13829 {
13830 T(V8R), /* PRE_V4. */
13831 T(V8R), /* V4. */
13832 T(V8R), /* V4T. */
13833 T(V8R), /* V5T. */
13834 T(V8R), /* V5TE. */
13835 T(V8R), /* V5TEJ. */
13836 T(V8R), /* V6. */
13837 T(V8R), /* V6KZ. */
13838 T(V8R), /* V6T2. */
13839 T(V8R), /* V6K. */
13840 T(V8R), /* V7. */
13841 T(V8R), /* V6_M. */
13842 T(V8R), /* V6S_M. */
13843 T(V8R), /* V7E_M. */
13844 T(V8), /* V8. */
13845 T(V8R), /* V8R. */
13846 };
13847 const int v8m_baseline[] =
13848 {
13849 -1, /* PRE_V4. */
13850 -1, /* V4. */
13851 -1, /* V4T. */
13852 -1, /* V5T. */
13853 -1, /* V5TE. */
13854 -1, /* V5TEJ. */
13855 -1, /* V6. */
13856 -1, /* V6KZ. */
13857 -1, /* V6T2. */
13858 -1, /* V6K. */
13859 -1, /* V7. */
13860 T(V8M_BASE), /* V6_M. */
13861 T(V8M_BASE), /* V6S_M. */
13862 -1, /* V7E_M. */
13863 -1, /* V8. */
13864 -1, /* V8R. */
13865 T(V8M_BASE) /* V8-M BASELINE. */
13866 };
13867 const int v8m_mainline[] =
13868 {
13869 -1, /* PRE_V4. */
13870 -1, /* V4. */
13871 -1, /* V4T. */
13872 -1, /* V5T. */
13873 -1, /* V5TE. */
13874 -1, /* V5TEJ. */
13875 -1, /* V6. */
13876 -1, /* V6KZ. */
13877 -1, /* V6T2. */
13878 -1, /* V6K. */
13879 T(V8M_MAIN), /* V7. */
13880 T(V8M_MAIN), /* V6_M. */
13881 T(V8M_MAIN), /* V6S_M. */
13882 T(V8M_MAIN), /* V7E_M. */
13883 -1, /* V8. */
13884 -1, /* V8R. */
13885 T(V8M_MAIN), /* V8-M BASELINE. */
13886 T(V8M_MAIN) /* V8-M MAINLINE. */
13887 };
13888 const int v4t_plus_v6_m[] =
13889 {
13890 -1, /* PRE_V4. */
13891 -1, /* V4. */
13892 T(V4T), /* V4T. */
13893 T(V5T), /* V5T. */
13894 T(V5TE), /* V5TE. */
13895 T(V5TEJ), /* V5TEJ. */
13896 T(V6), /* V6. */
13897 T(V6KZ), /* V6KZ. */
13898 T(V6T2), /* V6T2. */
13899 T(V6K), /* V6K. */
13900 T(V7), /* V7. */
13901 T(V6_M), /* V6_M. */
13902 T(V6S_M), /* V6S_M. */
13903 T(V7E_M), /* V7E_M. */
13904 T(V8), /* V8. */
13905 -1, /* V8R. */
13906 T(V8M_BASE), /* V8-M BASELINE. */
13907 T(V8M_MAIN), /* V8-M MAINLINE. */
13908 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13909 };
13910 const int *comb[] =
13911 {
13912 v6t2,
13913 v6k,
13914 v7,
13915 v6_m,
13916 v6s_m,
13917 v7e_m,
13918 v8,
13919 v8r,
13920 v8m_baseline,
13921 v8m_mainline,
13922 /* Pseudo-architecture. */
13923 v4t_plus_v6_m
13924 };
13925
13926 /* Check we've not got a higher architecture than we know about. */
13927
13928 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13929 {
13930 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
13931 return -1;
13932 }
13933
13934 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13935
13936 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13937 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13938 oldtag = T(V4T_PLUS_V6_M);
13939
13940 /* And override the new tag if we have a Tag_also_compatible_with on the
13941 input. */
13942
13943 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13944 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13945 newtag = T(V4T_PLUS_V6_M);
13946
13947 tagl = (oldtag < newtag) ? oldtag : newtag;
13948 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13949
13950 /* Architectures before V6KZ add features monotonically. */
13951 if (tagh <= TAG_CPU_ARCH_V6KZ)
13952 return result;
13953
13954 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13955
13956 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13957 as the canonical version. */
13958 if (result == T(V4T_PLUS_V6_M))
13959 {
13960 result = T(V4T);
13961 *secondary_compat_out = T(V6_M);
13962 }
13963 else
13964 *secondary_compat_out = -1;
13965
13966 if (result == -1)
13967 {
13968 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
13969 ibfd, oldtag, newtag);
13970 return -1;
13971 }
13972
13973 return result;
13974 #undef T
13975 }
13976
13977 /* Query attributes object to see if integer divide instructions may be
13978 present in an object. */
13979 static bfd_boolean
13980 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13981 {
13982 int arch = attr[Tag_CPU_arch].i;
13983 int profile = attr[Tag_CPU_arch_profile].i;
13984
13985 switch (attr[Tag_DIV_use].i)
13986 {
13987 case 0:
13988 /* Integer divide allowed if instruction contained in archetecture. */
13989 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13990 return TRUE;
13991 else if (arch >= TAG_CPU_ARCH_V7E_M)
13992 return TRUE;
13993 else
13994 return FALSE;
13995
13996 case 1:
13997 /* Integer divide explicitly prohibited. */
13998 return FALSE;
13999
14000 default:
14001 /* Unrecognised case - treat as allowing divide everywhere. */
14002 case 2:
14003 /* Integer divide allowed in ARM state. */
14004 return TRUE;
14005 }
14006 }
14007
14008 /* Query attributes object to see if integer divide instructions are
14009 forbidden to be in the object. This is not the inverse of
14010 elf32_arm_attributes_accept_div. */
14011 static bfd_boolean
14012 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14013 {
14014 return attr[Tag_DIV_use].i == 1;
14015 }
14016
14017 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14018 are conflicting attributes. */
14019
14020 static bfd_boolean
14021 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14022 {
14023 bfd *obfd = info->output_bfd;
14024 obj_attribute *in_attr;
14025 obj_attribute *out_attr;
14026 /* Some tags have 0 = don't care, 1 = strong requirement,
14027 2 = weak requirement. */
14028 static const int order_021[3] = {0, 2, 1};
14029 int i;
14030 bfd_boolean result = TRUE;
14031 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14032
14033 /* Skip the linker stubs file. This preserves previous behavior
14034 of accepting unknown attributes in the first input file - but
14035 is that a bug? */
14036 if (ibfd->flags & BFD_LINKER_CREATED)
14037 return TRUE;
14038
14039 /* Skip any input that hasn't attribute section.
14040 This enables to link object files without attribute section with
14041 any others. */
14042 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14043 return TRUE;
14044
14045 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14046 {
14047 /* This is the first object. Copy the attributes. */
14048 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14049
14050 out_attr = elf_known_obj_attributes_proc (obfd);
14051
14052 /* Use the Tag_null value to indicate the attributes have been
14053 initialized. */
14054 out_attr[0].i = 1;
14055
14056 /* We do not output objects with Tag_MPextension_use_legacy - we move
14057 the attribute's value to Tag_MPextension_use. */
14058 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14059 {
14060 if (out_attr[Tag_MPextension_use].i != 0
14061 && out_attr[Tag_MPextension_use_legacy].i
14062 != out_attr[Tag_MPextension_use].i)
14063 {
14064 _bfd_error_handler
14065 (_("Error: %pB has both the current and legacy "
14066 "Tag_MPextension_use attributes"), ibfd);
14067 result = FALSE;
14068 }
14069
14070 out_attr[Tag_MPextension_use] =
14071 out_attr[Tag_MPextension_use_legacy];
14072 out_attr[Tag_MPextension_use_legacy].type = 0;
14073 out_attr[Tag_MPextension_use_legacy].i = 0;
14074 }
14075
14076 return result;
14077 }
14078
14079 in_attr = elf_known_obj_attributes_proc (ibfd);
14080 out_attr = elf_known_obj_attributes_proc (obfd);
14081 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14082 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14083 {
14084 /* Ignore mismatches if the object doesn't use floating point or is
14085 floating point ABI independent. */
14086 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14087 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14088 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14089 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14090 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14091 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14092 {
14093 _bfd_error_handler
14094 (_("error: %pB uses VFP register arguments, %pB does not"),
14095 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14096 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14097 result = FALSE;
14098 }
14099 }
14100
14101 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14102 {
14103 /* Merge this attribute with existing attributes. */
14104 switch (i)
14105 {
14106 case Tag_CPU_raw_name:
14107 case Tag_CPU_name:
14108 /* These are merged after Tag_CPU_arch. */
14109 break;
14110
14111 case Tag_ABI_optimization_goals:
14112 case Tag_ABI_FP_optimization_goals:
14113 /* Use the first value seen. */
14114 break;
14115
14116 case Tag_CPU_arch:
14117 {
14118 int secondary_compat = -1, secondary_compat_out = -1;
14119 unsigned int saved_out_attr = out_attr[i].i;
14120 int arch_attr;
14121 static const char *name_table[] =
14122 {
14123 /* These aren't real CPU names, but we can't guess
14124 that from the architecture version alone. */
14125 "Pre v4",
14126 "ARM v4",
14127 "ARM v4T",
14128 "ARM v5T",
14129 "ARM v5TE",
14130 "ARM v5TEJ",
14131 "ARM v6",
14132 "ARM v6KZ",
14133 "ARM v6T2",
14134 "ARM v6K",
14135 "ARM v7",
14136 "ARM v6-M",
14137 "ARM v6S-M",
14138 "ARM v8",
14139 "",
14140 "ARM v8-M.baseline",
14141 "ARM v8-M.mainline",
14142 };
14143
14144 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14145 secondary_compat = get_secondary_compatible_arch (ibfd);
14146 secondary_compat_out = get_secondary_compatible_arch (obfd);
14147 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14148 &secondary_compat_out,
14149 in_attr[i].i,
14150 secondary_compat);
14151
14152 /* Return with error if failed to merge. */
14153 if (arch_attr == -1)
14154 return FALSE;
14155
14156 out_attr[i].i = arch_attr;
14157
14158 set_secondary_compatible_arch (obfd, secondary_compat_out);
14159
14160 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14161 if (out_attr[i].i == saved_out_attr)
14162 ; /* Leave the names alone. */
14163 else if (out_attr[i].i == in_attr[i].i)
14164 {
14165 /* The output architecture has been changed to match the
14166 input architecture. Use the input names. */
14167 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14168 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14169 : NULL;
14170 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14171 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14172 : NULL;
14173 }
14174 else
14175 {
14176 out_attr[Tag_CPU_name].s = NULL;
14177 out_attr[Tag_CPU_raw_name].s = NULL;
14178 }
14179
14180 /* If we still don't have a value for Tag_CPU_name,
14181 make one up now. Tag_CPU_raw_name remains blank. */
14182 if (out_attr[Tag_CPU_name].s == NULL
14183 && out_attr[i].i < ARRAY_SIZE (name_table))
14184 out_attr[Tag_CPU_name].s =
14185 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14186 }
14187 break;
14188
14189 case Tag_ARM_ISA_use:
14190 case Tag_THUMB_ISA_use:
14191 case Tag_WMMX_arch:
14192 case Tag_Advanced_SIMD_arch:
14193 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14194 case Tag_ABI_FP_rounding:
14195 case Tag_ABI_FP_exceptions:
14196 case Tag_ABI_FP_user_exceptions:
14197 case Tag_ABI_FP_number_model:
14198 case Tag_FP_HP_extension:
14199 case Tag_CPU_unaligned_access:
14200 case Tag_T2EE_use:
14201 case Tag_MPextension_use:
14202 /* Use the largest value specified. */
14203 if (in_attr[i].i > out_attr[i].i)
14204 out_attr[i].i = in_attr[i].i;
14205 break;
14206
14207 case Tag_ABI_align_preserved:
14208 case Tag_ABI_PCS_RO_data:
14209 /* Use the smallest value specified. */
14210 if (in_attr[i].i < out_attr[i].i)
14211 out_attr[i].i = in_attr[i].i;
14212 break;
14213
14214 case Tag_ABI_align_needed:
14215 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14216 && (in_attr[Tag_ABI_align_preserved].i == 0
14217 || out_attr[Tag_ABI_align_preserved].i == 0))
14218 {
14219 /* This error message should be enabled once all non-conformant
14220 binaries in the toolchain have had the attributes set
14221 properly.
14222 _bfd_error_handler
14223 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14224 obfd, ibfd);
14225 result = FALSE; */
14226 }
14227 /* Fall through. */
14228 case Tag_ABI_FP_denormal:
14229 case Tag_ABI_PCS_GOT_use:
14230 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14231 value if greater than 2 (for future-proofing). */
14232 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14233 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14234 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14235 out_attr[i].i = in_attr[i].i;
14236 break;
14237
14238 case Tag_Virtualization_use:
14239 /* The virtualization tag effectively stores two bits of
14240 information: the intended use of TrustZone (in bit 0), and the
14241 intended use of Virtualization (in bit 1). */
14242 if (out_attr[i].i == 0)
14243 out_attr[i].i = in_attr[i].i;
14244 else if (in_attr[i].i != 0
14245 && in_attr[i].i != out_attr[i].i)
14246 {
14247 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14248 out_attr[i].i = 3;
14249 else
14250 {
14251 _bfd_error_handler
14252 (_("error: %pB: unable to merge virtualization attributes "
14253 "with %pB"),
14254 obfd, ibfd);
14255 result = FALSE;
14256 }
14257 }
14258 break;
14259
14260 case Tag_CPU_arch_profile:
14261 if (out_attr[i].i != in_attr[i].i)
14262 {
14263 /* 0 will merge with anything.
14264 'A' and 'S' merge to 'A'.
14265 'R' and 'S' merge to 'R'.
14266 'M' and 'A|R|S' is an error. */
14267 if (out_attr[i].i == 0
14268 || (out_attr[i].i == 'S'
14269 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14270 out_attr[i].i = in_attr[i].i;
14271 else if (in_attr[i].i == 0
14272 || (in_attr[i].i == 'S'
14273 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14274 ; /* Do nothing. */
14275 else
14276 {
14277 _bfd_error_handler
14278 (_("error: %pB: conflicting architecture profiles %c/%c"),
14279 ibfd,
14280 in_attr[i].i ? in_attr[i].i : '0',
14281 out_attr[i].i ? out_attr[i].i : '0');
14282 result = FALSE;
14283 }
14284 }
14285 break;
14286
14287 case Tag_DSP_extension:
14288 /* No need to change output value if any of:
14289 - pre (<=) ARMv5T input architecture (do not have DSP)
14290 - M input profile not ARMv7E-M and do not have DSP. */
14291 if (in_attr[Tag_CPU_arch].i <= 3
14292 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14293 && in_attr[Tag_CPU_arch].i != 13
14294 && in_attr[i].i == 0))
14295 ; /* Do nothing. */
14296 /* Output value should be 0 if DSP part of architecture, ie.
14297 - post (>=) ARMv5te architecture output
14298 - A, R or S profile output or ARMv7E-M output architecture. */
14299 else if (out_attr[Tag_CPU_arch].i >= 4
14300 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14301 || out_attr[Tag_CPU_arch_profile].i == 'R'
14302 || out_attr[Tag_CPU_arch_profile].i == 'S'
14303 || out_attr[Tag_CPU_arch].i == 13))
14304 out_attr[i].i = 0;
14305 /* Otherwise, DSP instructions are added and not part of output
14306 architecture. */
14307 else
14308 out_attr[i].i = 1;
14309 break;
14310
14311 case Tag_FP_arch:
14312 {
14313 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14314 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14315 when it's 0. It might mean absence of FP hardware if
14316 Tag_FP_arch is zero. */
14317
14318 #define VFP_VERSION_COUNT 9
14319 static const struct
14320 {
14321 int ver;
14322 int regs;
14323 } vfp_versions[VFP_VERSION_COUNT] =
14324 {
14325 {0, 0},
14326 {1, 16},
14327 {2, 16},
14328 {3, 32},
14329 {3, 16},
14330 {4, 32},
14331 {4, 16},
14332 {8, 32},
14333 {8, 16}
14334 };
14335 int ver;
14336 int regs;
14337 int newval;
14338
14339 /* If the output has no requirement about FP hardware,
14340 follow the requirement of the input. */
14341 if (out_attr[i].i == 0)
14342 {
14343 /* This assert is still reasonable, we shouldn't
14344 produce the suspicious build attribute
14345 combination (See below for in_attr). */
14346 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14347 out_attr[i].i = in_attr[i].i;
14348 out_attr[Tag_ABI_HardFP_use].i
14349 = in_attr[Tag_ABI_HardFP_use].i;
14350 break;
14351 }
14352 /* If the input has no requirement about FP hardware, do
14353 nothing. */
14354 else if (in_attr[i].i == 0)
14355 {
14356 /* We used to assert that Tag_ABI_HardFP_use was
14357 zero here, but we should never assert when
14358 consuming an object file that has suspicious
14359 build attributes. The single precision variant
14360 of 'no FP architecture' is still 'no FP
14361 architecture', so we just ignore the tag in this
14362 case. */
14363 break;
14364 }
14365
14366 /* Both the input and the output have nonzero Tag_FP_arch.
14367 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14368
14369 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14370 do nothing. */
14371 if (in_attr[Tag_ABI_HardFP_use].i == 0
14372 && out_attr[Tag_ABI_HardFP_use].i == 0)
14373 ;
14374 /* If the input and the output have different Tag_ABI_HardFP_use,
14375 the combination of them is 0 (implied by Tag_FP_arch). */
14376 else if (in_attr[Tag_ABI_HardFP_use].i
14377 != out_attr[Tag_ABI_HardFP_use].i)
14378 out_attr[Tag_ABI_HardFP_use].i = 0;
14379
14380 /* Now we can handle Tag_FP_arch. */
14381
14382 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14383 pick the biggest. */
14384 if (in_attr[i].i >= VFP_VERSION_COUNT
14385 && in_attr[i].i > out_attr[i].i)
14386 {
14387 out_attr[i] = in_attr[i];
14388 break;
14389 }
14390 /* The output uses the superset of input features
14391 (ISA version) and registers. */
14392 ver = vfp_versions[in_attr[i].i].ver;
14393 if (ver < vfp_versions[out_attr[i].i].ver)
14394 ver = vfp_versions[out_attr[i].i].ver;
14395 regs = vfp_versions[in_attr[i].i].regs;
14396 if (regs < vfp_versions[out_attr[i].i].regs)
14397 regs = vfp_versions[out_attr[i].i].regs;
14398 /* This assumes all possible supersets are also a valid
14399 options. */
14400 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14401 {
14402 if (regs == vfp_versions[newval].regs
14403 && ver == vfp_versions[newval].ver)
14404 break;
14405 }
14406 out_attr[i].i = newval;
14407 }
14408 break;
14409 case Tag_PCS_config:
14410 if (out_attr[i].i == 0)
14411 out_attr[i].i = in_attr[i].i;
14412 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14413 {
14414 /* It's sometimes ok to mix different configs, so this is only
14415 a warning. */
14416 _bfd_error_handler
14417 (_("warning: %pB: conflicting platform configuration"), ibfd);
14418 }
14419 break;
14420 case Tag_ABI_PCS_R9_use:
14421 if (in_attr[i].i != out_attr[i].i
14422 && out_attr[i].i != AEABI_R9_unused
14423 && in_attr[i].i != AEABI_R9_unused)
14424 {
14425 _bfd_error_handler
14426 (_("error: %pB: conflicting use of R9"), ibfd);
14427 result = FALSE;
14428 }
14429 if (out_attr[i].i == AEABI_R9_unused)
14430 out_attr[i].i = in_attr[i].i;
14431 break;
14432 case Tag_ABI_PCS_RW_data:
14433 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14434 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14435 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14436 {
14437 _bfd_error_handler
14438 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14439 ibfd);
14440 result = FALSE;
14441 }
14442 /* Use the smallest value specified. */
14443 if (in_attr[i].i < out_attr[i].i)
14444 out_attr[i].i = in_attr[i].i;
14445 break;
14446 case Tag_ABI_PCS_wchar_t:
14447 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14448 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14449 {
14450 _bfd_error_handler
14451 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14452 ibfd, in_attr[i].i, out_attr[i].i);
14453 }
14454 else if (in_attr[i].i && !out_attr[i].i)
14455 out_attr[i].i = in_attr[i].i;
14456 break;
14457 case Tag_ABI_enum_size:
14458 if (in_attr[i].i != AEABI_enum_unused)
14459 {
14460 if (out_attr[i].i == AEABI_enum_unused
14461 || out_attr[i].i == AEABI_enum_forced_wide)
14462 {
14463 /* The existing object is compatible with anything.
14464 Use whatever requirements the new object has. */
14465 out_attr[i].i = in_attr[i].i;
14466 }
14467 else if (in_attr[i].i != AEABI_enum_forced_wide
14468 && out_attr[i].i != in_attr[i].i
14469 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14470 {
14471 static const char *aeabi_enum_names[] =
14472 { "", "variable-size", "32-bit", "" };
14473 const char *in_name =
14474 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14475 ? aeabi_enum_names[in_attr[i].i]
14476 : "<unknown>";
14477 const char *out_name =
14478 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14479 ? aeabi_enum_names[out_attr[i].i]
14480 : "<unknown>";
14481 _bfd_error_handler
14482 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14483 ibfd, in_name, out_name);
14484 }
14485 }
14486 break;
14487 case Tag_ABI_VFP_args:
14488 /* Aready done. */
14489 break;
14490 case Tag_ABI_WMMX_args:
14491 if (in_attr[i].i != out_attr[i].i)
14492 {
14493 _bfd_error_handler
14494 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14495 ibfd, obfd);
14496 result = FALSE;
14497 }
14498 break;
14499 case Tag_compatibility:
14500 /* Merged in target-independent code. */
14501 break;
14502 case Tag_ABI_HardFP_use:
14503 /* This is handled along with Tag_FP_arch. */
14504 break;
14505 case Tag_ABI_FP_16bit_format:
14506 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14507 {
14508 if (in_attr[i].i != out_attr[i].i)
14509 {
14510 _bfd_error_handler
14511 (_("error: fp16 format mismatch between %pB and %pB"),
14512 ibfd, obfd);
14513 result = FALSE;
14514 }
14515 }
14516 if (in_attr[i].i != 0)
14517 out_attr[i].i = in_attr[i].i;
14518 break;
14519
14520 case Tag_DIV_use:
14521 /* A value of zero on input means that the divide instruction may
14522 be used if available in the base architecture as specified via
14523 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14524 the user did not want divide instructions. A value of 2
14525 explicitly means that divide instructions were allowed in ARM
14526 and Thumb state. */
14527 if (in_attr[i].i == out_attr[i].i)
14528 /* Do nothing. */ ;
14529 else if (elf32_arm_attributes_forbid_div (in_attr)
14530 && !elf32_arm_attributes_accept_div (out_attr))
14531 out_attr[i].i = 1;
14532 else if (elf32_arm_attributes_forbid_div (out_attr)
14533 && elf32_arm_attributes_accept_div (in_attr))
14534 out_attr[i].i = in_attr[i].i;
14535 else if (in_attr[i].i == 2)
14536 out_attr[i].i = in_attr[i].i;
14537 break;
14538
14539 case Tag_MPextension_use_legacy:
14540 /* We don't output objects with Tag_MPextension_use_legacy - we
14541 move the value to Tag_MPextension_use. */
14542 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14543 {
14544 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14545 {
14546 _bfd_error_handler
14547 (_("%pB has both the current and legacy "
14548 "Tag_MPextension_use attributes"),
14549 ibfd);
14550 result = FALSE;
14551 }
14552 }
14553
14554 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14555 out_attr[Tag_MPextension_use] = in_attr[i];
14556
14557 break;
14558
14559 case Tag_nodefaults:
14560 /* This tag is set if it exists, but the value is unused (and is
14561 typically zero). We don't actually need to do anything here -
14562 the merge happens automatically when the type flags are merged
14563 below. */
14564 break;
14565 case Tag_also_compatible_with:
14566 /* Already done in Tag_CPU_arch. */
14567 break;
14568 case Tag_conformance:
14569 /* Keep the attribute if it matches. Throw it away otherwise.
14570 No attribute means no claim to conform. */
14571 if (!in_attr[i].s || !out_attr[i].s
14572 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14573 out_attr[i].s = NULL;
14574 break;
14575
14576 default:
14577 result
14578 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14579 }
14580
14581 /* If out_attr was copied from in_attr then it won't have a type yet. */
14582 if (in_attr[i].type && !out_attr[i].type)
14583 out_attr[i].type = in_attr[i].type;
14584 }
14585
14586 /* Merge Tag_compatibility attributes and any common GNU ones. */
14587 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14588 return FALSE;
14589
14590 /* Check for any attributes not known on ARM. */
14591 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14592
14593 return result;
14594 }
14595
14596
14597 /* Return TRUE if the two EABI versions are incompatible. */
14598
14599 static bfd_boolean
14600 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14601 {
14602 /* v4 and v5 are the same spec before and after it was released,
14603 so allow mixing them. */
14604 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14605 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14606 return TRUE;
14607
14608 return (iver == over);
14609 }
14610
14611 /* Merge backend specific data from an object file to the output
14612 object file when linking. */
14613
14614 static bfd_boolean
14615 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14616
14617 /* Display the flags field. */
14618
14619 static bfd_boolean
14620 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14621 {
14622 FILE * file = (FILE *) ptr;
14623 unsigned long flags;
14624
14625 BFD_ASSERT (abfd != NULL && ptr != NULL);
14626
14627 /* Print normal ELF private data. */
14628 _bfd_elf_print_private_bfd_data (abfd, ptr);
14629
14630 flags = elf_elfheader (abfd)->e_flags;
14631 /* Ignore init flag - it may not be set, despite the flags field
14632 containing valid data. */
14633
14634 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14635
14636 switch (EF_ARM_EABI_VERSION (flags))
14637 {
14638 case EF_ARM_EABI_UNKNOWN:
14639 /* The following flag bits are GNU extensions and not part of the
14640 official ARM ELF extended ABI. Hence they are only decoded if
14641 the EABI version is not set. */
14642 if (flags & EF_ARM_INTERWORK)
14643 fprintf (file, _(" [interworking enabled]"));
14644
14645 if (flags & EF_ARM_APCS_26)
14646 fprintf (file, " [APCS-26]");
14647 else
14648 fprintf (file, " [APCS-32]");
14649
14650 if (flags & EF_ARM_VFP_FLOAT)
14651 fprintf (file, _(" [VFP float format]"));
14652 else if (flags & EF_ARM_MAVERICK_FLOAT)
14653 fprintf (file, _(" [Maverick float format]"));
14654 else
14655 fprintf (file, _(" [FPA float format]"));
14656
14657 if (flags & EF_ARM_APCS_FLOAT)
14658 fprintf (file, _(" [floats passed in float registers]"));
14659
14660 if (flags & EF_ARM_PIC)
14661 fprintf (file, _(" [position independent]"));
14662
14663 if (flags & EF_ARM_NEW_ABI)
14664 fprintf (file, _(" [new ABI]"));
14665
14666 if (flags & EF_ARM_OLD_ABI)
14667 fprintf (file, _(" [old ABI]"));
14668
14669 if (flags & EF_ARM_SOFT_FLOAT)
14670 fprintf (file, _(" [software FP]"));
14671
14672 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14673 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14674 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14675 | EF_ARM_MAVERICK_FLOAT);
14676 break;
14677
14678 case EF_ARM_EABI_VER1:
14679 fprintf (file, _(" [Version1 EABI]"));
14680
14681 if (flags & EF_ARM_SYMSARESORTED)
14682 fprintf (file, _(" [sorted symbol table]"));
14683 else
14684 fprintf (file, _(" [unsorted symbol table]"));
14685
14686 flags &= ~ EF_ARM_SYMSARESORTED;
14687 break;
14688
14689 case EF_ARM_EABI_VER2:
14690 fprintf (file, _(" [Version2 EABI]"));
14691
14692 if (flags & EF_ARM_SYMSARESORTED)
14693 fprintf (file, _(" [sorted symbol table]"));
14694 else
14695 fprintf (file, _(" [unsorted symbol table]"));
14696
14697 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14698 fprintf (file, _(" [dynamic symbols use segment index]"));
14699
14700 if (flags & EF_ARM_MAPSYMSFIRST)
14701 fprintf (file, _(" [mapping symbols precede others]"));
14702
14703 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14704 | EF_ARM_MAPSYMSFIRST);
14705 break;
14706
14707 case EF_ARM_EABI_VER3:
14708 fprintf (file, _(" [Version3 EABI]"));
14709 break;
14710
14711 case EF_ARM_EABI_VER4:
14712 fprintf (file, _(" [Version4 EABI]"));
14713 goto eabi;
14714
14715 case EF_ARM_EABI_VER5:
14716 fprintf (file, _(" [Version5 EABI]"));
14717
14718 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14719 fprintf (file, _(" [soft-float ABI]"));
14720
14721 if (flags & EF_ARM_ABI_FLOAT_HARD)
14722 fprintf (file, _(" [hard-float ABI]"));
14723
14724 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14725
14726 eabi:
14727 if (flags & EF_ARM_BE8)
14728 fprintf (file, _(" [BE8]"));
14729
14730 if (flags & EF_ARM_LE8)
14731 fprintf (file, _(" [LE8]"));
14732
14733 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14734 break;
14735
14736 default:
14737 fprintf (file, _(" <EABI version unrecognised>"));
14738 break;
14739 }
14740
14741 flags &= ~ EF_ARM_EABIMASK;
14742
14743 if (flags & EF_ARM_RELEXEC)
14744 fprintf (file, _(" [relocatable executable]"));
14745
14746 if (flags & EF_ARM_PIC)
14747 fprintf (file, _(" [position independent]"));
14748
14749 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
14750 fprintf (file, _(" [FDPIC ABI supplement]"));
14751
14752 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
14753
14754 if (flags)
14755 fprintf (file, _("<Unrecognised flag bits set>"));
14756
14757 fputc ('\n', file);
14758
14759 return TRUE;
14760 }
14761
14762 static int
14763 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14764 {
14765 switch (ELF_ST_TYPE (elf_sym->st_info))
14766 {
14767 case STT_ARM_TFUNC:
14768 return ELF_ST_TYPE (elf_sym->st_info);
14769
14770 case STT_ARM_16BIT:
14771 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14772 This allows us to distinguish between data used by Thumb instructions
14773 and non-data (which is probably code) inside Thumb regions of an
14774 executable. */
14775 if (type != STT_OBJECT && type != STT_TLS)
14776 return ELF_ST_TYPE (elf_sym->st_info);
14777 break;
14778
14779 default:
14780 break;
14781 }
14782
14783 return type;
14784 }
14785
14786 static asection *
14787 elf32_arm_gc_mark_hook (asection *sec,
14788 struct bfd_link_info *info,
14789 Elf_Internal_Rela *rel,
14790 struct elf_link_hash_entry *h,
14791 Elf_Internal_Sym *sym)
14792 {
14793 if (h != NULL)
14794 switch (ELF32_R_TYPE (rel->r_info))
14795 {
14796 case R_ARM_GNU_VTINHERIT:
14797 case R_ARM_GNU_VTENTRY:
14798 return NULL;
14799 }
14800
14801 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14802 }
14803
14804 /* Look through the relocs for a section during the first phase. */
14805
14806 static bfd_boolean
14807 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14808 asection *sec, const Elf_Internal_Rela *relocs)
14809 {
14810 Elf_Internal_Shdr *symtab_hdr;
14811 struct elf_link_hash_entry **sym_hashes;
14812 const Elf_Internal_Rela *rel;
14813 const Elf_Internal_Rela *rel_end;
14814 bfd *dynobj;
14815 asection *sreloc;
14816 struct elf32_arm_link_hash_table *htab;
14817 bfd_boolean call_reloc_p;
14818 bfd_boolean may_become_dynamic_p;
14819 bfd_boolean may_need_local_target_p;
14820 unsigned long nsyms;
14821
14822 if (bfd_link_relocatable (info))
14823 return TRUE;
14824
14825 BFD_ASSERT (is_arm_elf (abfd));
14826
14827 htab = elf32_arm_hash_table (info);
14828 if (htab == NULL)
14829 return FALSE;
14830
14831 sreloc = NULL;
14832
14833 /* Create dynamic sections for relocatable executables so that we can
14834 copy relocations. */
14835 if (htab->root.is_relocatable_executable
14836 && ! htab->root.dynamic_sections_created)
14837 {
14838 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14839 return FALSE;
14840 }
14841
14842 if (htab->root.dynobj == NULL)
14843 htab->root.dynobj = abfd;
14844 if (!create_ifunc_sections (info))
14845 return FALSE;
14846
14847 dynobj = htab->root.dynobj;
14848
14849 symtab_hdr = & elf_symtab_hdr (abfd);
14850 sym_hashes = elf_sym_hashes (abfd);
14851 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14852
14853 rel_end = relocs + sec->reloc_count;
14854 for (rel = relocs; rel < rel_end; rel++)
14855 {
14856 Elf_Internal_Sym *isym;
14857 struct elf_link_hash_entry *h;
14858 struct elf32_arm_link_hash_entry *eh;
14859 unsigned int r_symndx;
14860 int r_type;
14861
14862 r_symndx = ELF32_R_SYM (rel->r_info);
14863 r_type = ELF32_R_TYPE (rel->r_info);
14864 r_type = arm_real_reloc_type (htab, r_type);
14865
14866 if (r_symndx >= nsyms
14867 /* PR 9934: It is possible to have relocations that do not
14868 refer to symbols, thus it is also possible to have an
14869 object file containing relocations but no symbol table. */
14870 && (r_symndx > STN_UNDEF || nsyms > 0))
14871 {
14872 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
14873 r_symndx);
14874 return FALSE;
14875 }
14876
14877 h = NULL;
14878 isym = NULL;
14879 if (nsyms > 0)
14880 {
14881 if (r_symndx < symtab_hdr->sh_info)
14882 {
14883 /* A local symbol. */
14884 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14885 abfd, r_symndx);
14886 if (isym == NULL)
14887 return FALSE;
14888 }
14889 else
14890 {
14891 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14892 while (h->root.type == bfd_link_hash_indirect
14893 || h->root.type == bfd_link_hash_warning)
14894 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14895 }
14896 }
14897
14898 eh = (struct elf32_arm_link_hash_entry *) h;
14899
14900 call_reloc_p = FALSE;
14901 may_become_dynamic_p = FALSE;
14902 may_need_local_target_p = FALSE;
14903
14904 /* Could be done earlier, if h were already available. */
14905 r_type = elf32_arm_tls_transition (info, r_type, h);
14906 switch (r_type)
14907 {
14908 case R_ARM_GOTOFFFUNCDESC:
14909 {
14910 if (h == NULL)
14911 {
14912 if (!elf32_arm_allocate_local_sym_info (abfd))
14913 return FALSE;
14914 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
14915 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
14916 }
14917 else
14918 {
14919 eh->fdpic_cnts.gotofffuncdesc_cnt++;
14920 }
14921 }
14922 break;
14923
14924 case R_ARM_GOTFUNCDESC:
14925 {
14926 if (h == NULL)
14927 {
14928 /* Such a relocation is not supposed to be generated
14929 by gcc on a static function. */
14930 /* Anyway if needed it could be handled. */
14931 abort();
14932 }
14933 else
14934 {
14935 eh->fdpic_cnts.gotfuncdesc_cnt++;
14936 }
14937 }
14938 break;
14939
14940 case R_ARM_FUNCDESC:
14941 {
14942 if (h == NULL)
14943 {
14944 if (!elf32_arm_allocate_local_sym_info (abfd))
14945 return FALSE;
14946 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
14947 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
14948 }
14949 else
14950 {
14951 eh->fdpic_cnts.funcdesc_cnt++;
14952 }
14953 }
14954 break;
14955
14956 case R_ARM_GOT32:
14957 case R_ARM_GOT_PREL:
14958 case R_ARM_TLS_GD32:
14959 case R_ARM_TLS_IE32:
14960 case R_ARM_TLS_GOTDESC:
14961 case R_ARM_TLS_DESCSEQ:
14962 case R_ARM_THM_TLS_DESCSEQ:
14963 case R_ARM_TLS_CALL:
14964 case R_ARM_THM_TLS_CALL:
14965 /* This symbol requires a global offset table entry. */
14966 {
14967 int tls_type, old_tls_type;
14968
14969 switch (r_type)
14970 {
14971 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14972
14973 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14974
14975 case R_ARM_TLS_GOTDESC:
14976 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14977 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14978 tls_type = GOT_TLS_GDESC; break;
14979
14980 default: tls_type = GOT_NORMAL; break;
14981 }
14982
14983 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14984 info->flags |= DF_STATIC_TLS;
14985
14986 if (h != NULL)
14987 {
14988 h->got.refcount++;
14989 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14990 }
14991 else
14992 {
14993 /* This is a global offset table entry for a local symbol. */
14994 if (!elf32_arm_allocate_local_sym_info (abfd))
14995 return FALSE;
14996 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14997 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14998 }
14999
15000 /* If a variable is accessed with both tls methods, two
15001 slots may be created. */
15002 if (GOT_TLS_GD_ANY_P (old_tls_type)
15003 && GOT_TLS_GD_ANY_P (tls_type))
15004 tls_type |= old_tls_type;
15005
15006 /* We will already have issued an error message if there
15007 is a TLS/non-TLS mismatch, based on the symbol
15008 type. So just combine any TLS types needed. */
15009 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15010 && tls_type != GOT_NORMAL)
15011 tls_type |= old_tls_type;
15012
15013 /* If the symbol is accessed in both IE and GDESC
15014 method, we're able to relax. Turn off the GDESC flag,
15015 without messing up with any other kind of tls types
15016 that may be involved. */
15017 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15018 tls_type &= ~GOT_TLS_GDESC;
15019
15020 if (old_tls_type != tls_type)
15021 {
15022 if (h != NULL)
15023 elf32_arm_hash_entry (h)->tls_type = tls_type;
15024 else
15025 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15026 }
15027 }
15028 /* Fall through. */
15029
15030 case R_ARM_TLS_LDM32:
15031 if (r_type == R_ARM_TLS_LDM32)
15032 htab->tls_ldm_got.refcount++;
15033 /* Fall through. */
15034
15035 case R_ARM_GOTOFF32:
15036 case R_ARM_GOTPC:
15037 if (htab->root.sgot == NULL
15038 && !create_got_section (htab->root.dynobj, info))
15039 return FALSE;
15040 break;
15041
15042 case R_ARM_PC24:
15043 case R_ARM_PLT32:
15044 case R_ARM_CALL:
15045 case R_ARM_JUMP24:
15046 case R_ARM_PREL31:
15047 case R_ARM_THM_CALL:
15048 case R_ARM_THM_JUMP24:
15049 case R_ARM_THM_JUMP19:
15050 call_reloc_p = TRUE;
15051 may_need_local_target_p = TRUE;
15052 break;
15053
15054 case R_ARM_ABS12:
15055 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15056 ldr __GOTT_INDEX__ offsets. */
15057 if (!htab->vxworks_p)
15058 {
15059 may_need_local_target_p = TRUE;
15060 break;
15061 }
15062 else goto jump_over;
15063
15064 /* Fall through. */
15065
15066 case R_ARM_MOVW_ABS_NC:
15067 case R_ARM_MOVT_ABS:
15068 case R_ARM_THM_MOVW_ABS_NC:
15069 case R_ARM_THM_MOVT_ABS:
15070 if (bfd_link_pic (info))
15071 {
15072 _bfd_error_handler
15073 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15074 abfd, elf32_arm_howto_table_1[r_type].name,
15075 (h) ? h->root.root.string : "a local symbol");
15076 bfd_set_error (bfd_error_bad_value);
15077 return FALSE;
15078 }
15079
15080 /* Fall through. */
15081 case R_ARM_ABS32:
15082 case R_ARM_ABS32_NOI:
15083 jump_over:
15084 if (h != NULL && bfd_link_executable (info))
15085 {
15086 h->pointer_equality_needed = 1;
15087 }
15088 /* Fall through. */
15089 case R_ARM_REL32:
15090 case R_ARM_REL32_NOI:
15091 case R_ARM_MOVW_PREL_NC:
15092 case R_ARM_MOVT_PREL:
15093 case R_ARM_THM_MOVW_PREL_NC:
15094 case R_ARM_THM_MOVT_PREL:
15095
15096 /* Should the interworking branches be listed here? */
15097 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15098 || htab->fdpic_p)
15099 && (sec->flags & SEC_ALLOC) != 0)
15100 {
15101 if (h == NULL
15102 && elf32_arm_howto_from_type (r_type)->pc_relative)
15103 {
15104 /* In shared libraries and relocatable executables,
15105 we treat local relative references as calls;
15106 see the related SYMBOL_CALLS_LOCAL code in
15107 allocate_dynrelocs. */
15108 call_reloc_p = TRUE;
15109 may_need_local_target_p = TRUE;
15110 }
15111 else
15112 /* We are creating a shared library or relocatable
15113 executable, and this is a reloc against a global symbol,
15114 or a non-PC-relative reloc against a local symbol.
15115 We may need to copy the reloc into the output. */
15116 may_become_dynamic_p = TRUE;
15117 }
15118 else
15119 may_need_local_target_p = TRUE;
15120 break;
15121
15122 /* This relocation describes the C++ object vtable hierarchy.
15123 Reconstruct it for later use during GC. */
15124 case R_ARM_GNU_VTINHERIT:
15125 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15126 return FALSE;
15127 break;
15128
15129 /* This relocation describes which C++ vtable entries are actually
15130 used. Record for later use during GC. */
15131 case R_ARM_GNU_VTENTRY:
15132 BFD_ASSERT (h != NULL);
15133 if (h != NULL
15134 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15135 return FALSE;
15136 break;
15137 }
15138
15139 if (h != NULL)
15140 {
15141 if (call_reloc_p)
15142 /* We may need a .plt entry if the function this reloc
15143 refers to is in a different object, regardless of the
15144 symbol's type. We can't tell for sure yet, because
15145 something later might force the symbol local. */
15146 h->needs_plt = 1;
15147 else if (may_need_local_target_p)
15148 /* If this reloc is in a read-only section, we might
15149 need a copy reloc. We can't check reliably at this
15150 stage whether the section is read-only, as input
15151 sections have not yet been mapped to output sections.
15152 Tentatively set the flag for now, and correct in
15153 adjust_dynamic_symbol. */
15154 h->non_got_ref = 1;
15155 }
15156
15157 if (may_need_local_target_p
15158 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15159 {
15160 union gotplt_union *root_plt;
15161 struct arm_plt_info *arm_plt;
15162 struct arm_local_iplt_info *local_iplt;
15163
15164 if (h != NULL)
15165 {
15166 root_plt = &h->plt;
15167 arm_plt = &eh->plt;
15168 }
15169 else
15170 {
15171 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15172 if (local_iplt == NULL)
15173 return FALSE;
15174 root_plt = &local_iplt->root;
15175 arm_plt = &local_iplt->arm;
15176 }
15177
15178 /* If the symbol is a function that doesn't bind locally,
15179 this relocation will need a PLT entry. */
15180 if (root_plt->refcount != -1)
15181 root_plt->refcount += 1;
15182
15183 if (!call_reloc_p)
15184 arm_plt->noncall_refcount++;
15185
15186 /* It's too early to use htab->use_blx here, so we have to
15187 record possible blx references separately from
15188 relocs that definitely need a thumb stub. */
15189
15190 if (r_type == R_ARM_THM_CALL)
15191 arm_plt->maybe_thumb_refcount += 1;
15192
15193 if (r_type == R_ARM_THM_JUMP24
15194 || r_type == R_ARM_THM_JUMP19)
15195 arm_plt->thumb_refcount += 1;
15196 }
15197
15198 if (may_become_dynamic_p)
15199 {
15200 struct elf_dyn_relocs *p, **head;
15201
15202 /* Create a reloc section in dynobj. */
15203 if (sreloc == NULL)
15204 {
15205 sreloc = _bfd_elf_make_dynamic_reloc_section
15206 (sec, dynobj, 2, abfd, ! htab->use_rel);
15207
15208 if (sreloc == NULL)
15209 return FALSE;
15210
15211 /* BPABI objects never have dynamic relocations mapped. */
15212 if (htab->symbian_p)
15213 {
15214 flagword flags;
15215
15216 flags = bfd_get_section_flags (dynobj, sreloc);
15217 flags &= ~(SEC_LOAD | SEC_ALLOC);
15218 bfd_set_section_flags (dynobj, sreloc, flags);
15219 }
15220 }
15221
15222 /* If this is a global symbol, count the number of
15223 relocations we need for this symbol. */
15224 if (h != NULL)
15225 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15226 else
15227 {
15228 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15229 if (head == NULL)
15230 return FALSE;
15231 }
15232
15233 p = *head;
15234 if (p == NULL || p->sec != sec)
15235 {
15236 bfd_size_type amt = sizeof *p;
15237
15238 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15239 if (p == NULL)
15240 return FALSE;
15241 p->next = *head;
15242 *head = p;
15243 p->sec = sec;
15244 p->count = 0;
15245 p->pc_count = 0;
15246 }
15247
15248 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15249 p->pc_count += 1;
15250 p->count += 1;
15251 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15252 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15253 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15254 that will become rofixup. */
15255 /* This is due to the fact that we suppose all will become rofixup. */
15256 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15257 _bfd_error_handler
15258 (_("FDPIC does not yet support %s relocation"
15259 " to become dynamic for executable"),
15260 elf32_arm_howto_table_1[r_type].name);
15261 abort();
15262 }
15263 }
15264 }
15265
15266 return TRUE;
15267 }
15268
15269 static void
15270 elf32_arm_update_relocs (asection *o,
15271 struct bfd_elf_section_reloc_data *reldata)
15272 {
15273 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15274 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15275 const struct elf_backend_data *bed;
15276 _arm_elf_section_data *eado;
15277 struct bfd_link_order *p;
15278 bfd_byte *erela_head, *erela;
15279 Elf_Internal_Rela *irela_head, *irela;
15280 Elf_Internal_Shdr *rel_hdr;
15281 bfd *abfd;
15282 unsigned int count;
15283
15284 eado = get_arm_elf_section_data (o);
15285
15286 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15287 return;
15288
15289 abfd = o->owner;
15290 bed = get_elf_backend_data (abfd);
15291 rel_hdr = reldata->hdr;
15292
15293 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15294 {
15295 swap_in = bed->s->swap_reloc_in;
15296 swap_out = bed->s->swap_reloc_out;
15297 }
15298 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15299 {
15300 swap_in = bed->s->swap_reloca_in;
15301 swap_out = bed->s->swap_reloca_out;
15302 }
15303 else
15304 abort ();
15305
15306 erela_head = rel_hdr->contents;
15307 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15308 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15309
15310 erela = erela_head;
15311 irela = irela_head;
15312 count = 0;
15313
15314 for (p = o->map_head.link_order; p; p = p->next)
15315 {
15316 if (p->type == bfd_section_reloc_link_order
15317 || p->type == bfd_symbol_reloc_link_order)
15318 {
15319 (*swap_in) (abfd, erela, irela);
15320 erela += rel_hdr->sh_entsize;
15321 irela++;
15322 count++;
15323 }
15324 else if (p->type == bfd_indirect_link_order)
15325 {
15326 struct bfd_elf_section_reloc_data *input_reldata;
15327 arm_unwind_table_edit *edit_list, *edit_tail;
15328 _arm_elf_section_data *eadi;
15329 bfd_size_type j;
15330 bfd_vma offset;
15331 asection *i;
15332
15333 i = p->u.indirect.section;
15334
15335 eadi = get_arm_elf_section_data (i);
15336 edit_list = eadi->u.exidx.unwind_edit_list;
15337 edit_tail = eadi->u.exidx.unwind_edit_tail;
15338 offset = o->vma + i->output_offset;
15339
15340 if (eadi->elf.rel.hdr &&
15341 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15342 input_reldata = &eadi->elf.rel;
15343 else if (eadi->elf.rela.hdr &&
15344 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15345 input_reldata = &eadi->elf.rela;
15346 else
15347 abort ();
15348
15349 if (edit_list)
15350 {
15351 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15352 {
15353 arm_unwind_table_edit *edit_node, *edit_next;
15354 bfd_vma bias;
15355 bfd_vma reloc_index;
15356
15357 (*swap_in) (abfd, erela, irela);
15358 reloc_index = (irela->r_offset - offset) / 8;
15359
15360 bias = 0;
15361 edit_node = edit_list;
15362 for (edit_next = edit_list;
15363 edit_next && edit_next->index <= reloc_index;
15364 edit_next = edit_node->next)
15365 {
15366 bias++;
15367 edit_node = edit_next;
15368 }
15369
15370 if (edit_node->type != DELETE_EXIDX_ENTRY
15371 || edit_node->index != reloc_index)
15372 {
15373 irela->r_offset -= bias * 8;
15374 irela++;
15375 count++;
15376 }
15377
15378 erela += rel_hdr->sh_entsize;
15379 }
15380
15381 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15382 {
15383 /* New relocation entity. */
15384 asection *text_sec = edit_tail->linked_section;
15385 asection *text_out = text_sec->output_section;
15386 bfd_vma exidx_offset = offset + i->size - 8;
15387
15388 irela->r_addend = 0;
15389 irela->r_offset = exidx_offset;
15390 irela->r_info = ELF32_R_INFO
15391 (text_out->target_index, R_ARM_PREL31);
15392 irela++;
15393 count++;
15394 }
15395 }
15396 else
15397 {
15398 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15399 {
15400 (*swap_in) (abfd, erela, irela);
15401 erela += rel_hdr->sh_entsize;
15402 irela++;
15403 }
15404
15405 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15406 }
15407 }
15408 }
15409
15410 reldata->count = count;
15411 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15412
15413 erela = erela_head;
15414 irela = irela_head;
15415 while (count > 0)
15416 {
15417 (*swap_out) (abfd, irela, erela);
15418 erela += rel_hdr->sh_entsize;
15419 irela++;
15420 count--;
15421 }
15422
15423 free (irela_head);
15424
15425 /* Hashes are no longer valid. */
15426 free (reldata->hashes);
15427 reldata->hashes = NULL;
15428 }
15429
15430 /* Unwinding tables are not referenced directly. This pass marks them as
15431 required if the corresponding code section is marked. Similarly, ARMv8-M
15432 secure entry functions can only be referenced by SG veneers which are
15433 created after the GC process. They need to be marked in case they reside in
15434 their own section (as would be the case if code was compiled with
15435 -ffunction-sections). */
15436
15437 static bfd_boolean
15438 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15439 elf_gc_mark_hook_fn gc_mark_hook)
15440 {
15441 bfd *sub;
15442 Elf_Internal_Shdr **elf_shdrp;
15443 asection *cmse_sec;
15444 obj_attribute *out_attr;
15445 Elf_Internal_Shdr *symtab_hdr;
15446 unsigned i, sym_count, ext_start;
15447 const struct elf_backend_data *bed;
15448 struct elf_link_hash_entry **sym_hashes;
15449 struct elf32_arm_link_hash_entry *cmse_hash;
15450 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15451
15452 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15453
15454 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15455 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15456 && out_attr[Tag_CPU_arch_profile].i == 'M';
15457
15458 /* Marking EH data may cause additional code sections to be marked,
15459 requiring multiple passes. */
15460 again = TRUE;
15461 while (again)
15462 {
15463 again = FALSE;
15464 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15465 {
15466 asection *o;
15467
15468 if (! is_arm_elf (sub))
15469 continue;
15470
15471 elf_shdrp = elf_elfsections (sub);
15472 for (o = sub->sections; o != NULL; o = o->next)
15473 {
15474 Elf_Internal_Shdr *hdr;
15475
15476 hdr = &elf_section_data (o)->this_hdr;
15477 if (hdr->sh_type == SHT_ARM_EXIDX
15478 && hdr->sh_link
15479 && hdr->sh_link < elf_numsections (sub)
15480 && !o->gc_mark
15481 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15482 {
15483 again = TRUE;
15484 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15485 return FALSE;
15486 }
15487 }
15488
15489 /* Mark section holding ARMv8-M secure entry functions. We mark all
15490 of them so no need for a second browsing. */
15491 if (is_v8m && first_bfd_browse)
15492 {
15493 sym_hashes = elf_sym_hashes (sub);
15494 bed = get_elf_backend_data (sub);
15495 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15496 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15497 ext_start = symtab_hdr->sh_info;
15498
15499 /* Scan symbols. */
15500 for (i = ext_start; i < sym_count; i++)
15501 {
15502 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15503
15504 /* Assume it is a special symbol. If not, cmse_scan will
15505 warn about it and user can do something about it. */
15506 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15507 {
15508 cmse_sec = cmse_hash->root.root.u.def.section;
15509 if (!cmse_sec->gc_mark
15510 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15511 return FALSE;
15512 }
15513 }
15514 }
15515 }
15516 first_bfd_browse = FALSE;
15517 }
15518
15519 return TRUE;
15520 }
15521
15522 /* Treat mapping symbols as special target symbols. */
15523
15524 static bfd_boolean
15525 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15526 {
15527 return bfd_is_arm_special_symbol_name (sym->name,
15528 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15529 }
15530
15531 /* This is a copy of elf_find_function() from elf.c except that
15532 ARM mapping symbols are ignored when looking for function names
15533 and STT_ARM_TFUNC is considered to a function type. */
15534
15535 static bfd_boolean
15536 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15537 asymbol ** symbols,
15538 asection * section,
15539 bfd_vma offset,
15540 const char ** filename_ptr,
15541 const char ** functionname_ptr)
15542 {
15543 const char * filename = NULL;
15544 asymbol * func = NULL;
15545 bfd_vma low_func = 0;
15546 asymbol ** p;
15547
15548 for (p = symbols; *p != NULL; p++)
15549 {
15550 elf_symbol_type *q;
15551
15552 q = (elf_symbol_type *) *p;
15553
15554 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15555 {
15556 default:
15557 break;
15558 case STT_FILE:
15559 filename = bfd_asymbol_name (&q->symbol);
15560 break;
15561 case STT_FUNC:
15562 case STT_ARM_TFUNC:
15563 case STT_NOTYPE:
15564 /* Skip mapping symbols. */
15565 if ((q->symbol.flags & BSF_LOCAL)
15566 && bfd_is_arm_special_symbol_name (q->symbol.name,
15567 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15568 continue;
15569 /* Fall through. */
15570 if (bfd_get_section (&q->symbol) == section
15571 && q->symbol.value >= low_func
15572 && q->symbol.value <= offset)
15573 {
15574 func = (asymbol *) q;
15575 low_func = q->symbol.value;
15576 }
15577 break;
15578 }
15579 }
15580
15581 if (func == NULL)
15582 return FALSE;
15583
15584 if (filename_ptr)
15585 *filename_ptr = filename;
15586 if (functionname_ptr)
15587 *functionname_ptr = bfd_asymbol_name (func);
15588
15589 return TRUE;
15590 }
15591
15592
15593 /* Find the nearest line to a particular section and offset, for error
15594 reporting. This code is a duplicate of the code in elf.c, except
15595 that it uses arm_elf_find_function. */
15596
15597 static bfd_boolean
15598 elf32_arm_find_nearest_line (bfd * abfd,
15599 asymbol ** symbols,
15600 asection * section,
15601 bfd_vma offset,
15602 const char ** filename_ptr,
15603 const char ** functionname_ptr,
15604 unsigned int * line_ptr,
15605 unsigned int * discriminator_ptr)
15606 {
15607 bfd_boolean found = FALSE;
15608
15609 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15610 filename_ptr, functionname_ptr,
15611 line_ptr, discriminator_ptr,
15612 dwarf_debug_sections, 0,
15613 & elf_tdata (abfd)->dwarf2_find_line_info))
15614 {
15615 if (!*functionname_ptr)
15616 arm_elf_find_function (abfd, symbols, section, offset,
15617 *filename_ptr ? NULL : filename_ptr,
15618 functionname_ptr);
15619
15620 return TRUE;
15621 }
15622
15623 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15624 uses DWARF1. */
15625
15626 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15627 & found, filename_ptr,
15628 functionname_ptr, line_ptr,
15629 & elf_tdata (abfd)->line_info))
15630 return FALSE;
15631
15632 if (found && (*functionname_ptr || *line_ptr))
15633 return TRUE;
15634
15635 if (symbols == NULL)
15636 return FALSE;
15637
15638 if (! arm_elf_find_function (abfd, symbols, section, offset,
15639 filename_ptr, functionname_ptr))
15640 return FALSE;
15641
15642 *line_ptr = 0;
15643 return TRUE;
15644 }
15645
15646 static bfd_boolean
15647 elf32_arm_find_inliner_info (bfd * abfd,
15648 const char ** filename_ptr,
15649 const char ** functionname_ptr,
15650 unsigned int * line_ptr)
15651 {
15652 bfd_boolean found;
15653 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15654 functionname_ptr, line_ptr,
15655 & elf_tdata (abfd)->dwarf2_find_line_info);
15656 return found;
15657 }
15658
15659 /* Find dynamic relocs for H that apply to read-only sections. */
15660
15661 static asection *
15662 readonly_dynrelocs (struct elf_link_hash_entry *h)
15663 {
15664 struct elf_dyn_relocs *p;
15665
15666 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15667 {
15668 asection *s = p->sec->output_section;
15669
15670 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15671 return p->sec;
15672 }
15673 return NULL;
15674 }
15675
15676 /* Adjust a symbol defined by a dynamic object and referenced by a
15677 regular object. The current definition is in some section of the
15678 dynamic object, but we're not including those sections. We have to
15679 change the definition to something the rest of the link can
15680 understand. */
15681
15682 static bfd_boolean
15683 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15684 struct elf_link_hash_entry * h)
15685 {
15686 bfd * dynobj;
15687 asection *s, *srel;
15688 struct elf32_arm_link_hash_entry * eh;
15689 struct elf32_arm_link_hash_table *globals;
15690
15691 globals = elf32_arm_hash_table (info);
15692 if (globals == NULL)
15693 return FALSE;
15694
15695 dynobj = elf_hash_table (info)->dynobj;
15696
15697 /* Make sure we know what is going on here. */
15698 BFD_ASSERT (dynobj != NULL
15699 && (h->needs_plt
15700 || h->type == STT_GNU_IFUNC
15701 || h->is_weakalias
15702 || (h->def_dynamic
15703 && h->ref_regular
15704 && !h->def_regular)));
15705
15706 eh = (struct elf32_arm_link_hash_entry *) h;
15707
15708 /* If this is a function, put it in the procedure linkage table. We
15709 will fill in the contents of the procedure linkage table later,
15710 when we know the address of the .got section. */
15711 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15712 {
15713 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15714 symbol binds locally. */
15715 if (h->plt.refcount <= 0
15716 || (h->type != STT_GNU_IFUNC
15717 && (SYMBOL_CALLS_LOCAL (info, h)
15718 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15719 && h->root.type == bfd_link_hash_undefweak))))
15720 {
15721 /* This case can occur if we saw a PLT32 reloc in an input
15722 file, but the symbol was never referred to by a dynamic
15723 object, or if all references were garbage collected. In
15724 such a case, we don't actually need to build a procedure
15725 linkage table, and we can just do a PC24 reloc instead. */
15726 h->plt.offset = (bfd_vma) -1;
15727 eh->plt.thumb_refcount = 0;
15728 eh->plt.maybe_thumb_refcount = 0;
15729 eh->plt.noncall_refcount = 0;
15730 h->needs_plt = 0;
15731 }
15732
15733 return TRUE;
15734 }
15735 else
15736 {
15737 /* It's possible that we incorrectly decided a .plt reloc was
15738 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15739 in check_relocs. We can't decide accurately between function
15740 and non-function syms in check-relocs; Objects loaded later in
15741 the link may change h->type. So fix it now. */
15742 h->plt.offset = (bfd_vma) -1;
15743 eh->plt.thumb_refcount = 0;
15744 eh->plt.maybe_thumb_refcount = 0;
15745 eh->plt.noncall_refcount = 0;
15746 }
15747
15748 /* If this is a weak symbol, and there is a real definition, the
15749 processor independent code will have arranged for us to see the
15750 real definition first, and we can just use the same value. */
15751 if (h->is_weakalias)
15752 {
15753 struct elf_link_hash_entry *def = weakdef (h);
15754 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
15755 h->root.u.def.section = def->root.u.def.section;
15756 h->root.u.def.value = def->root.u.def.value;
15757 return TRUE;
15758 }
15759
15760 /* If there are no non-GOT references, we do not need a copy
15761 relocation. */
15762 if (!h->non_got_ref)
15763 return TRUE;
15764
15765 /* This is a reference to a symbol defined by a dynamic object which
15766 is not a function. */
15767
15768 /* If we are creating a shared library, we must presume that the
15769 only references to the symbol are via the global offset table.
15770 For such cases we need not do anything here; the relocations will
15771 be handled correctly by relocate_section. Relocatable executables
15772 can reference data in shared objects directly, so we don't need to
15773 do anything here. */
15774 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15775 return TRUE;
15776
15777 /* We must allocate the symbol in our .dynbss section, which will
15778 become part of the .bss section of the executable. There will be
15779 an entry for this symbol in the .dynsym section. The dynamic
15780 object will contain position independent code, so all references
15781 from the dynamic object to this symbol will go through the global
15782 offset table. The dynamic linker will use the .dynsym entry to
15783 determine the address it must put in the global offset table, so
15784 both the dynamic object and the regular object will refer to the
15785 same memory location for the variable. */
15786 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15787 linker to copy the initial value out of the dynamic object and into
15788 the runtime process image. We need to remember the offset into the
15789 .rel(a).bss section we are going to use. */
15790 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15791 {
15792 s = globals->root.sdynrelro;
15793 srel = globals->root.sreldynrelro;
15794 }
15795 else
15796 {
15797 s = globals->root.sdynbss;
15798 srel = globals->root.srelbss;
15799 }
15800 if (info->nocopyreloc == 0
15801 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15802 && h->size != 0)
15803 {
15804 elf32_arm_allocate_dynrelocs (info, srel, 1);
15805 h->needs_copy = 1;
15806 }
15807
15808 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15809 }
15810
15811 /* Allocate space in .plt, .got and associated reloc sections for
15812 dynamic relocs. */
15813
15814 static bfd_boolean
15815 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15816 {
15817 struct bfd_link_info *info;
15818 struct elf32_arm_link_hash_table *htab;
15819 struct elf32_arm_link_hash_entry *eh;
15820 struct elf_dyn_relocs *p;
15821
15822 if (h->root.type == bfd_link_hash_indirect)
15823 return TRUE;
15824
15825 eh = (struct elf32_arm_link_hash_entry *) h;
15826
15827 info = (struct bfd_link_info *) inf;
15828 htab = elf32_arm_hash_table (info);
15829 if (htab == NULL)
15830 return FALSE;
15831
15832 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15833 && h->plt.refcount > 0)
15834 {
15835 /* Make sure this symbol is output as a dynamic symbol.
15836 Undefined weak syms won't yet be marked as dynamic. */
15837 if (h->dynindx == -1 && !h->forced_local
15838 && h->root.type == bfd_link_hash_undefweak)
15839 {
15840 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15841 return FALSE;
15842 }
15843
15844 /* If the call in the PLT entry binds locally, the associated
15845 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15846 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15847 than the .plt section. */
15848 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15849 {
15850 eh->is_iplt = 1;
15851 if (eh->plt.noncall_refcount == 0
15852 && SYMBOL_REFERENCES_LOCAL (info, h))
15853 /* All non-call references can be resolved directly.
15854 This means that they can (and in some cases, must)
15855 resolve directly to the run-time target, rather than
15856 to the PLT. That in turns means that any .got entry
15857 would be equal to the .igot.plt entry, so there's
15858 no point having both. */
15859 h->got.refcount = 0;
15860 }
15861
15862 if (bfd_link_pic (info)
15863 || eh->is_iplt
15864 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15865 {
15866 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15867
15868 /* If this symbol is not defined in a regular file, and we are
15869 not generating a shared library, then set the symbol to this
15870 location in the .plt. This is required to make function
15871 pointers compare as equal between the normal executable and
15872 the shared library. */
15873 if (! bfd_link_pic (info)
15874 && !h->def_regular)
15875 {
15876 h->root.u.def.section = htab->root.splt;
15877 h->root.u.def.value = h->plt.offset;
15878
15879 /* Make sure the function is not marked as Thumb, in case
15880 it is the target of an ABS32 relocation, which will
15881 point to the PLT entry. */
15882 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15883 }
15884
15885 /* VxWorks executables have a second set of relocations for
15886 each PLT entry. They go in a separate relocation section,
15887 which is processed by the kernel loader. */
15888 if (htab->vxworks_p && !bfd_link_pic (info))
15889 {
15890 /* There is a relocation for the initial PLT entry:
15891 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15892 if (h->plt.offset == htab->plt_header_size)
15893 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15894
15895 /* There are two extra relocations for each subsequent
15896 PLT entry: an R_ARM_32 relocation for the GOT entry,
15897 and an R_ARM_32 relocation for the PLT entry. */
15898 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15899 }
15900 }
15901 else
15902 {
15903 h->plt.offset = (bfd_vma) -1;
15904 h->needs_plt = 0;
15905 }
15906 }
15907 else
15908 {
15909 h->plt.offset = (bfd_vma) -1;
15910 h->needs_plt = 0;
15911 }
15912
15913 eh = (struct elf32_arm_link_hash_entry *) h;
15914 eh->tlsdesc_got = (bfd_vma) -1;
15915
15916 if (h->got.refcount > 0)
15917 {
15918 asection *s;
15919 bfd_boolean dyn;
15920 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15921 int indx;
15922
15923 /* Make sure this symbol is output as a dynamic symbol.
15924 Undefined weak syms won't yet be marked as dynamic. */
15925 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
15926 && h->root.type == bfd_link_hash_undefweak)
15927 {
15928 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15929 return FALSE;
15930 }
15931
15932 if (!htab->symbian_p)
15933 {
15934 s = htab->root.sgot;
15935 h->got.offset = s->size;
15936
15937 if (tls_type == GOT_UNKNOWN)
15938 abort ();
15939
15940 if (tls_type == GOT_NORMAL)
15941 /* Non-TLS symbols need one GOT slot. */
15942 s->size += 4;
15943 else
15944 {
15945 if (tls_type & GOT_TLS_GDESC)
15946 {
15947 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15948 eh->tlsdesc_got
15949 = (htab->root.sgotplt->size
15950 - elf32_arm_compute_jump_table_size (htab));
15951 htab->root.sgotplt->size += 8;
15952 h->got.offset = (bfd_vma) -2;
15953 /* plt.got_offset needs to know there's a TLS_DESC
15954 reloc in the middle of .got.plt. */
15955 htab->num_tls_desc++;
15956 }
15957
15958 if (tls_type & GOT_TLS_GD)
15959 {
15960 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15961 the symbol is both GD and GDESC, got.offset may
15962 have been overwritten. */
15963 h->got.offset = s->size;
15964 s->size += 8;
15965 }
15966
15967 if (tls_type & GOT_TLS_IE)
15968 /* R_ARM_TLS_IE32 needs one GOT slot. */
15969 s->size += 4;
15970 }
15971
15972 dyn = htab->root.dynamic_sections_created;
15973
15974 indx = 0;
15975 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15976 bfd_link_pic (info),
15977 h)
15978 && (!bfd_link_pic (info)
15979 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15980 indx = h->dynindx;
15981
15982 if (tls_type != GOT_NORMAL
15983 && (bfd_link_pic (info) || indx != 0)
15984 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15985 || h->root.type != bfd_link_hash_undefweak))
15986 {
15987 if (tls_type & GOT_TLS_IE)
15988 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15989
15990 if (tls_type & GOT_TLS_GD)
15991 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15992
15993 if (tls_type & GOT_TLS_GDESC)
15994 {
15995 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15996 /* GDESC needs a trampoline to jump to. */
15997 htab->tls_trampoline = -1;
15998 }
15999
16000 /* Only GD needs it. GDESC just emits one relocation per
16001 2 entries. */
16002 if ((tls_type & GOT_TLS_GD) && indx != 0)
16003 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16004 }
16005 else if (((indx != -1) || htab->fdpic_p)
16006 && !SYMBOL_REFERENCES_LOCAL (info, h))
16007 {
16008 if (htab->root.dynamic_sections_created)
16009 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16010 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16011 }
16012 else if (h->type == STT_GNU_IFUNC
16013 && eh->plt.noncall_refcount == 0)
16014 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16015 they all resolve dynamically instead. Reserve room for the
16016 GOT entry's R_ARM_IRELATIVE relocation. */
16017 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16018 else if (bfd_link_pic (info)
16019 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16020 || h->root.type != bfd_link_hash_undefweak))
16021 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16022 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16023 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16024 /* Reserve room for rofixup for FDPIC executable. */
16025 /* TLS relocs do not need space since they are completely
16026 resolved. */
16027 htab->srofixup->size += 4;
16028 }
16029 }
16030 else
16031 h->got.offset = (bfd_vma) -1;
16032
16033 /* FDPIC support. */
16034 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16035 {
16036 /* Symbol musn't be exported. */
16037 if (h->dynindx != -1)
16038 abort();
16039
16040 /* We only allocate one function descriptor with its associated relocation. */
16041 if (eh->fdpic_cnts.funcdesc_offset == -1)
16042 {
16043 asection *s = htab->root.sgot;
16044
16045 eh->fdpic_cnts.funcdesc_offset = s->size;
16046 s->size += 8;
16047 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16048 if (bfd_link_pic(info))
16049 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16050 else
16051 htab->srofixup->size += 8;
16052 }
16053 }
16054
16055 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16056 {
16057 asection *s = htab->root.sgot;
16058
16059 if (htab->root.dynamic_sections_created && h->dynindx == -1
16060 && !h->forced_local)
16061 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16062 return FALSE;
16063
16064 if (h->dynindx == -1)
16065 {
16066 /* We only allocate one function descriptor with its associated relocation. q */
16067 if (eh->fdpic_cnts.funcdesc_offset == -1)
16068 {
16069
16070 eh->fdpic_cnts.funcdesc_offset = s->size;
16071 s->size += 8;
16072 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16073 if (bfd_link_pic(info))
16074 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16075 else
16076 htab->srofixup->size += 8;
16077 }
16078 }
16079
16080 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16081 R_ARM_RELATIVE/rofixup relocation on it. */
16082 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16083 s->size += 4;
16084 if (h->dynindx == -1 && !bfd_link_pic(info))
16085 htab->srofixup->size += 4;
16086 else
16087 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16088 }
16089
16090 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16091 {
16092 if (htab->root.dynamic_sections_created && h->dynindx == -1
16093 && !h->forced_local)
16094 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16095 return FALSE;
16096
16097 if (h->dynindx == -1)
16098 {
16099 /* We only allocate one function descriptor with its associated relocation. */
16100 if (eh->fdpic_cnts.funcdesc_offset == -1)
16101 {
16102 asection *s = htab->root.sgot;
16103
16104 eh->fdpic_cnts.funcdesc_offset = s->size;
16105 s->size += 8;
16106 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16107 if (bfd_link_pic(info))
16108 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16109 else
16110 htab->srofixup->size += 8;
16111 }
16112 }
16113 if (h->dynindx == -1 && !bfd_link_pic(info))
16114 {
16115 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16116 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16117 }
16118 else
16119 {
16120 /* Will need one dynamic reloc per reference. will be either
16121 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16122 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16123 eh->fdpic_cnts.funcdesc_cnt);
16124 }
16125 }
16126
16127 /* Allocate stubs for exported Thumb functions on v4t. */
16128 if (!htab->use_blx && h->dynindx != -1
16129 && h->def_regular
16130 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16131 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16132 {
16133 struct elf_link_hash_entry * th;
16134 struct bfd_link_hash_entry * bh;
16135 struct elf_link_hash_entry * myh;
16136 char name[1024];
16137 asection *s;
16138 bh = NULL;
16139 /* Create a new symbol to regist the real location of the function. */
16140 s = h->root.u.def.section;
16141 sprintf (name, "__real_%s", h->root.root.string);
16142 _bfd_generic_link_add_one_symbol (info, s->owner,
16143 name, BSF_GLOBAL, s,
16144 h->root.u.def.value,
16145 NULL, TRUE, FALSE, &bh);
16146
16147 myh = (struct elf_link_hash_entry *) bh;
16148 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16149 myh->forced_local = 1;
16150 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16151 eh->export_glue = myh;
16152 th = record_arm_to_thumb_glue (info, h);
16153 /* Point the symbol at the stub. */
16154 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16155 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16156 h->root.u.def.section = th->root.u.def.section;
16157 h->root.u.def.value = th->root.u.def.value & ~1;
16158 }
16159
16160 if (eh->dyn_relocs == NULL)
16161 return TRUE;
16162
16163 /* In the shared -Bsymbolic case, discard space allocated for
16164 dynamic pc-relative relocs against symbols which turn out to be
16165 defined in regular objects. For the normal shared case, discard
16166 space for pc-relative relocs that have become local due to symbol
16167 visibility changes. */
16168
16169 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16170 {
16171 /* Relocs that use pc_count are PC-relative forms, which will appear
16172 on something like ".long foo - ." or "movw REG, foo - .". We want
16173 calls to protected symbols to resolve directly to the function
16174 rather than going via the plt. If people want function pointer
16175 comparisons to work as expected then they should avoid writing
16176 assembly like ".long foo - .". */
16177 if (SYMBOL_CALLS_LOCAL (info, h))
16178 {
16179 struct elf_dyn_relocs **pp;
16180
16181 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16182 {
16183 p->count -= p->pc_count;
16184 p->pc_count = 0;
16185 if (p->count == 0)
16186 *pp = p->next;
16187 else
16188 pp = &p->next;
16189 }
16190 }
16191
16192 if (htab->vxworks_p)
16193 {
16194 struct elf_dyn_relocs **pp;
16195
16196 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16197 {
16198 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16199 *pp = p->next;
16200 else
16201 pp = &p->next;
16202 }
16203 }
16204
16205 /* Also discard relocs on undefined weak syms with non-default
16206 visibility. */
16207 if (eh->dyn_relocs != NULL
16208 && h->root.type == bfd_link_hash_undefweak)
16209 {
16210 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16211 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16212 eh->dyn_relocs = NULL;
16213
16214 /* Make sure undefined weak symbols are output as a dynamic
16215 symbol in PIEs. */
16216 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16217 && !h->forced_local)
16218 {
16219 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16220 return FALSE;
16221 }
16222 }
16223
16224 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16225 && h->root.type == bfd_link_hash_new)
16226 {
16227 /* Output absolute symbols so that we can create relocations
16228 against them. For normal symbols we output a relocation
16229 against the section that contains them. */
16230 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16231 return FALSE;
16232 }
16233
16234 }
16235 else
16236 {
16237 /* For the non-shared case, discard space for relocs against
16238 symbols which turn out to need copy relocs or are not
16239 dynamic. */
16240
16241 if (!h->non_got_ref
16242 && ((h->def_dynamic
16243 && !h->def_regular)
16244 || (htab->root.dynamic_sections_created
16245 && (h->root.type == bfd_link_hash_undefweak
16246 || h->root.type == bfd_link_hash_undefined))))
16247 {
16248 /* Make sure this symbol is output as a dynamic symbol.
16249 Undefined weak syms won't yet be marked as dynamic. */
16250 if (h->dynindx == -1 && !h->forced_local
16251 && h->root.type == bfd_link_hash_undefweak)
16252 {
16253 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16254 return FALSE;
16255 }
16256
16257 /* If that succeeded, we know we'll be keeping all the
16258 relocs. */
16259 if (h->dynindx != -1)
16260 goto keep;
16261 }
16262
16263 eh->dyn_relocs = NULL;
16264
16265 keep: ;
16266 }
16267
16268 /* Finally, allocate space. */
16269 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16270 {
16271 asection *sreloc = elf_section_data (p->sec)->sreloc;
16272
16273 if (h->type == STT_GNU_IFUNC
16274 && eh->plt.noncall_refcount == 0
16275 && SYMBOL_REFERENCES_LOCAL (info, h))
16276 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16277 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16278 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16279 else if (htab->fdpic_p && !bfd_link_pic(info))
16280 htab->srofixup->size += 4 * p->count;
16281 else
16282 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16283 }
16284
16285 return TRUE;
16286 }
16287
16288 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16289 read-only sections. */
16290
16291 static bfd_boolean
16292 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16293 {
16294 asection *sec;
16295
16296 if (h->root.type == bfd_link_hash_indirect)
16297 return TRUE;
16298
16299 sec = readonly_dynrelocs (h);
16300 if (sec != NULL)
16301 {
16302 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16303
16304 info->flags |= DF_TEXTREL;
16305 info->callbacks->minfo
16306 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16307 sec->owner, h->root.root.string, sec);
16308
16309 /* Not an error, just cut short the traversal. */
16310 return FALSE;
16311 }
16312 return TRUE;
16313 }
16314
16315 void
16316 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16317 int byteswap_code)
16318 {
16319 struct elf32_arm_link_hash_table *globals;
16320
16321 globals = elf32_arm_hash_table (info);
16322 if (globals == NULL)
16323 return;
16324
16325 globals->byteswap_code = byteswap_code;
16326 }
16327
16328 /* Set the sizes of the dynamic sections. */
16329
16330 static bfd_boolean
16331 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16332 struct bfd_link_info * info)
16333 {
16334 bfd * dynobj;
16335 asection * s;
16336 bfd_boolean plt;
16337 bfd_boolean relocs;
16338 bfd *ibfd;
16339 struct elf32_arm_link_hash_table *htab;
16340
16341 htab = elf32_arm_hash_table (info);
16342 if (htab == NULL)
16343 return FALSE;
16344
16345 dynobj = elf_hash_table (info)->dynobj;
16346 BFD_ASSERT (dynobj != NULL);
16347 check_use_blx (htab);
16348
16349 if (elf_hash_table (info)->dynamic_sections_created)
16350 {
16351 /* Set the contents of the .interp section to the interpreter. */
16352 if (bfd_link_executable (info) && !info->nointerp)
16353 {
16354 s = bfd_get_linker_section (dynobj, ".interp");
16355 BFD_ASSERT (s != NULL);
16356 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16357 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16358 }
16359 }
16360
16361 /* Set up .got offsets for local syms, and space for local dynamic
16362 relocs. */
16363 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16364 {
16365 bfd_signed_vma *local_got;
16366 bfd_signed_vma *end_local_got;
16367 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16368 char *local_tls_type;
16369 bfd_vma *local_tlsdesc_gotent;
16370 bfd_size_type locsymcount;
16371 Elf_Internal_Shdr *symtab_hdr;
16372 asection *srel;
16373 bfd_boolean is_vxworks = htab->vxworks_p;
16374 unsigned int symndx;
16375 struct fdpic_local *local_fdpic_cnts;
16376
16377 if (! is_arm_elf (ibfd))
16378 continue;
16379
16380 for (s = ibfd->sections; s != NULL; s = s->next)
16381 {
16382 struct elf_dyn_relocs *p;
16383
16384 for (p = (struct elf_dyn_relocs *)
16385 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16386 {
16387 if (!bfd_is_abs_section (p->sec)
16388 && bfd_is_abs_section (p->sec->output_section))
16389 {
16390 /* Input section has been discarded, either because
16391 it is a copy of a linkonce section or due to
16392 linker script /DISCARD/, so we'll be discarding
16393 the relocs too. */
16394 }
16395 else if (is_vxworks
16396 && strcmp (p->sec->output_section->name,
16397 ".tls_vars") == 0)
16398 {
16399 /* Relocations in vxworks .tls_vars sections are
16400 handled specially by the loader. */
16401 }
16402 else if (p->count != 0)
16403 {
16404 srel = elf_section_data (p->sec)->sreloc;
16405 if (htab->fdpic_p && !bfd_link_pic(info))
16406 htab->srofixup->size += 4 * p->count;
16407 else
16408 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16409 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16410 info->flags |= DF_TEXTREL;
16411 }
16412 }
16413 }
16414
16415 local_got = elf_local_got_refcounts (ibfd);
16416 if (!local_got)
16417 continue;
16418
16419 symtab_hdr = & elf_symtab_hdr (ibfd);
16420 locsymcount = symtab_hdr->sh_info;
16421 end_local_got = local_got + locsymcount;
16422 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16423 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16424 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16425 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16426 symndx = 0;
16427 s = htab->root.sgot;
16428 srel = htab->root.srelgot;
16429 for (; local_got < end_local_got;
16430 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16431 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16432 {
16433 *local_tlsdesc_gotent = (bfd_vma) -1;
16434 local_iplt = *local_iplt_ptr;
16435
16436 /* FDPIC support. */
16437 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16438 {
16439 if (local_fdpic_cnts->funcdesc_offset == -1)
16440 {
16441 local_fdpic_cnts->funcdesc_offset = s->size;
16442 s->size += 8;
16443
16444 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16445 if (bfd_link_pic(info))
16446 elf32_arm_allocate_dynrelocs (info, srel, 1);
16447 else
16448 htab->srofixup->size += 8;
16449 }
16450 }
16451
16452 if (local_fdpic_cnts->funcdesc_cnt > 0)
16453 {
16454 if (local_fdpic_cnts->funcdesc_offset == -1)
16455 {
16456 local_fdpic_cnts->funcdesc_offset = s->size;
16457 s->size += 8;
16458
16459 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16460 if (bfd_link_pic(info))
16461 elf32_arm_allocate_dynrelocs (info, srel, 1);
16462 else
16463 htab->srofixup->size += 8;
16464 }
16465
16466 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16467 if (bfd_link_pic(info))
16468 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16469 else
16470 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16471 }
16472
16473 if (local_iplt != NULL)
16474 {
16475 struct elf_dyn_relocs *p;
16476
16477 if (local_iplt->root.refcount > 0)
16478 {
16479 elf32_arm_allocate_plt_entry (info, TRUE,
16480 &local_iplt->root,
16481 &local_iplt->arm);
16482 if (local_iplt->arm.noncall_refcount == 0)
16483 /* All references to the PLT are calls, so all
16484 non-call references can resolve directly to the
16485 run-time target. This means that the .got entry
16486 would be the same as the .igot.plt entry, so there's
16487 no point creating both. */
16488 *local_got = 0;
16489 }
16490 else
16491 {
16492 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16493 local_iplt->root.offset = (bfd_vma) -1;
16494 }
16495
16496 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16497 {
16498 asection *psrel;
16499
16500 psrel = elf_section_data (p->sec)->sreloc;
16501 if (local_iplt->arm.noncall_refcount == 0)
16502 elf32_arm_allocate_irelocs (info, psrel, p->count);
16503 else
16504 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16505 }
16506 }
16507 if (*local_got > 0)
16508 {
16509 Elf_Internal_Sym *isym;
16510
16511 *local_got = s->size;
16512 if (*local_tls_type & GOT_TLS_GD)
16513 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16514 s->size += 8;
16515 if (*local_tls_type & GOT_TLS_GDESC)
16516 {
16517 *local_tlsdesc_gotent = htab->root.sgotplt->size
16518 - elf32_arm_compute_jump_table_size (htab);
16519 htab->root.sgotplt->size += 8;
16520 *local_got = (bfd_vma) -2;
16521 /* plt.got_offset needs to know there's a TLS_DESC
16522 reloc in the middle of .got.plt. */
16523 htab->num_tls_desc++;
16524 }
16525 if (*local_tls_type & GOT_TLS_IE)
16526 s->size += 4;
16527
16528 if (*local_tls_type & GOT_NORMAL)
16529 {
16530 /* If the symbol is both GD and GDESC, *local_got
16531 may have been overwritten. */
16532 *local_got = s->size;
16533 s->size += 4;
16534 }
16535
16536 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16537 if (isym == NULL)
16538 return FALSE;
16539
16540 /* If all references to an STT_GNU_IFUNC PLT are calls,
16541 then all non-call references, including this GOT entry,
16542 resolve directly to the run-time target. */
16543 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16544 && (local_iplt == NULL
16545 || local_iplt->arm.noncall_refcount == 0))
16546 elf32_arm_allocate_irelocs (info, srel, 1);
16547 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16548 {
16549 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16550 elf32_arm_allocate_dynrelocs (info, srel, 1);
16551 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16552 htab->srofixup->size += 4;
16553
16554 if ((bfd_link_pic (info) || htab->fdpic_p)
16555 && *local_tls_type & GOT_TLS_GDESC)
16556 {
16557 elf32_arm_allocate_dynrelocs (info,
16558 htab->root.srelplt, 1);
16559 htab->tls_trampoline = -1;
16560 }
16561 }
16562 }
16563 else
16564 *local_got = (bfd_vma) -1;
16565 }
16566 }
16567
16568 if (htab->tls_ldm_got.refcount > 0)
16569 {
16570 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16571 for R_ARM_TLS_LDM32 relocations. */
16572 htab->tls_ldm_got.offset = htab->root.sgot->size;
16573 htab->root.sgot->size += 8;
16574 if (bfd_link_pic (info))
16575 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16576 }
16577 else
16578 htab->tls_ldm_got.offset = -1;
16579
16580 /* At the very end of the .rofixup section is a pointer to the GOT,
16581 reserve space for it. */
16582 if (htab->fdpic_p && htab->srofixup != NULL)
16583 htab->srofixup->size += 4;
16584
16585 /* Allocate global sym .plt and .got entries, and space for global
16586 sym dynamic relocs. */
16587 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16588
16589 /* Here we rummage through the found bfds to collect glue information. */
16590 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16591 {
16592 if (! is_arm_elf (ibfd))
16593 continue;
16594
16595 /* Initialise mapping tables for code/data. */
16596 bfd_elf32_arm_init_maps (ibfd);
16597
16598 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16599 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16600 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16601 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16602 }
16603
16604 /* Allocate space for the glue sections now that we've sized them. */
16605 bfd_elf32_arm_allocate_interworking_sections (info);
16606
16607 /* For every jump slot reserved in the sgotplt, reloc_count is
16608 incremented. However, when we reserve space for TLS descriptors,
16609 it's not incremented, so in order to compute the space reserved
16610 for them, it suffices to multiply the reloc count by the jump
16611 slot size. */
16612 if (htab->root.srelplt)
16613 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16614
16615 if (htab->tls_trampoline)
16616 {
16617 if (htab->root.splt->size == 0)
16618 htab->root.splt->size += htab->plt_header_size;
16619
16620 htab->tls_trampoline = htab->root.splt->size;
16621 htab->root.splt->size += htab->plt_entry_size;
16622
16623 /* If we're not using lazy TLS relocations, don't generate the
16624 PLT and GOT entries they require. */
16625 if (!(info->flags & DF_BIND_NOW))
16626 {
16627 htab->dt_tlsdesc_got = htab->root.sgot->size;
16628 htab->root.sgot->size += 4;
16629
16630 htab->dt_tlsdesc_plt = htab->root.splt->size;
16631 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16632 }
16633 }
16634
16635 /* The check_relocs and adjust_dynamic_symbol entry points have
16636 determined the sizes of the various dynamic sections. Allocate
16637 memory for them. */
16638 plt = FALSE;
16639 relocs = FALSE;
16640 for (s = dynobj->sections; s != NULL; s = s->next)
16641 {
16642 const char * name;
16643
16644 if ((s->flags & SEC_LINKER_CREATED) == 0)
16645 continue;
16646
16647 /* It's OK to base decisions on the section name, because none
16648 of the dynobj section names depend upon the input files. */
16649 name = bfd_get_section_name (dynobj, s);
16650
16651 if (s == htab->root.splt)
16652 {
16653 /* Remember whether there is a PLT. */
16654 plt = s->size != 0;
16655 }
16656 else if (CONST_STRNEQ (name, ".rel"))
16657 {
16658 if (s->size != 0)
16659 {
16660 /* Remember whether there are any reloc sections other
16661 than .rel(a).plt and .rela.plt.unloaded. */
16662 if (s != htab->root.srelplt && s != htab->srelplt2)
16663 relocs = TRUE;
16664
16665 /* We use the reloc_count field as a counter if we need
16666 to copy relocs into the output file. */
16667 s->reloc_count = 0;
16668 }
16669 }
16670 else if (s != htab->root.sgot
16671 && s != htab->root.sgotplt
16672 && s != htab->root.iplt
16673 && s != htab->root.igotplt
16674 && s != htab->root.sdynbss
16675 && s != htab->root.sdynrelro
16676 && s != htab->srofixup)
16677 {
16678 /* It's not one of our sections, so don't allocate space. */
16679 continue;
16680 }
16681
16682 if (s->size == 0)
16683 {
16684 /* If we don't need this section, strip it from the
16685 output file. This is mostly to handle .rel(a).bss and
16686 .rel(a).plt. We must create both sections in
16687 create_dynamic_sections, because they must be created
16688 before the linker maps input sections to output
16689 sections. The linker does that before
16690 adjust_dynamic_symbol is called, and it is that
16691 function which decides whether anything needs to go
16692 into these sections. */
16693 s->flags |= SEC_EXCLUDE;
16694 continue;
16695 }
16696
16697 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16698 continue;
16699
16700 /* Allocate memory for the section contents. */
16701 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16702 if (s->contents == NULL)
16703 return FALSE;
16704 }
16705
16706 if (elf_hash_table (info)->dynamic_sections_created)
16707 {
16708 /* Add some entries to the .dynamic section. We fill in the
16709 values later, in elf32_arm_finish_dynamic_sections, but we
16710 must add the entries now so that we get the correct size for
16711 the .dynamic section. The DT_DEBUG entry is filled in by the
16712 dynamic linker and used by the debugger. */
16713 #define add_dynamic_entry(TAG, VAL) \
16714 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16715
16716 if (bfd_link_executable (info))
16717 {
16718 if (!add_dynamic_entry (DT_DEBUG, 0))
16719 return FALSE;
16720 }
16721
16722 if (plt)
16723 {
16724 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16725 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16726 || !add_dynamic_entry (DT_PLTREL,
16727 htab->use_rel ? DT_REL : DT_RELA)
16728 || !add_dynamic_entry (DT_JMPREL, 0))
16729 return FALSE;
16730
16731 if (htab->dt_tlsdesc_plt
16732 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16733 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16734 return FALSE;
16735 }
16736
16737 if (relocs)
16738 {
16739 if (htab->use_rel)
16740 {
16741 if (!add_dynamic_entry (DT_REL, 0)
16742 || !add_dynamic_entry (DT_RELSZ, 0)
16743 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16744 return FALSE;
16745 }
16746 else
16747 {
16748 if (!add_dynamic_entry (DT_RELA, 0)
16749 || !add_dynamic_entry (DT_RELASZ, 0)
16750 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16751 return FALSE;
16752 }
16753 }
16754
16755 /* If any dynamic relocs apply to a read-only section,
16756 then we need a DT_TEXTREL entry. */
16757 if ((info->flags & DF_TEXTREL) == 0)
16758 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
16759
16760 if ((info->flags & DF_TEXTREL) != 0)
16761 {
16762 if (!add_dynamic_entry (DT_TEXTREL, 0))
16763 return FALSE;
16764 }
16765 if (htab->vxworks_p
16766 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16767 return FALSE;
16768 }
16769 #undef add_dynamic_entry
16770
16771 return TRUE;
16772 }
16773
16774 /* Size sections even though they're not dynamic. We use it to setup
16775 _TLS_MODULE_BASE_, if needed. */
16776
16777 static bfd_boolean
16778 elf32_arm_always_size_sections (bfd *output_bfd,
16779 struct bfd_link_info *info)
16780 {
16781 asection *tls_sec;
16782
16783 if (bfd_link_relocatable (info))
16784 return TRUE;
16785
16786 tls_sec = elf_hash_table (info)->tls_sec;
16787
16788 if (tls_sec)
16789 {
16790 struct elf_link_hash_entry *tlsbase;
16791
16792 tlsbase = elf_link_hash_lookup
16793 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16794
16795 if (tlsbase)
16796 {
16797 struct bfd_link_hash_entry *bh = NULL;
16798 const struct elf_backend_data *bed
16799 = get_elf_backend_data (output_bfd);
16800
16801 if (!(_bfd_generic_link_add_one_symbol
16802 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16803 tls_sec, 0, NULL, FALSE,
16804 bed->collect, &bh)))
16805 return FALSE;
16806
16807 tlsbase->type = STT_TLS;
16808 tlsbase = (struct elf_link_hash_entry *)bh;
16809 tlsbase->def_regular = 1;
16810 tlsbase->other = STV_HIDDEN;
16811 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16812 }
16813 }
16814 return TRUE;
16815 }
16816
16817 /* Finish up dynamic symbol handling. We set the contents of various
16818 dynamic sections here. */
16819
16820 static bfd_boolean
16821 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16822 struct bfd_link_info * info,
16823 struct elf_link_hash_entry * h,
16824 Elf_Internal_Sym * sym)
16825 {
16826 struct elf32_arm_link_hash_table *htab;
16827 struct elf32_arm_link_hash_entry *eh;
16828
16829 htab = elf32_arm_hash_table (info);
16830 if (htab == NULL)
16831 return FALSE;
16832
16833 eh = (struct elf32_arm_link_hash_entry *) h;
16834
16835 if (h->plt.offset != (bfd_vma) -1)
16836 {
16837 if (!eh->is_iplt)
16838 {
16839 BFD_ASSERT (h->dynindx != -1);
16840 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16841 h->dynindx, 0))
16842 return FALSE;
16843 }
16844
16845 if (!h->def_regular)
16846 {
16847 /* Mark the symbol as undefined, rather than as defined in
16848 the .plt section. */
16849 sym->st_shndx = SHN_UNDEF;
16850 /* If the symbol is weak we need to clear the value.
16851 Otherwise, the PLT entry would provide a definition for
16852 the symbol even if the symbol wasn't defined anywhere,
16853 and so the symbol would never be NULL. Leave the value if
16854 there were any relocations where pointer equality matters
16855 (this is a clue for the dynamic linker, to make function
16856 pointer comparisons work between an application and shared
16857 library). */
16858 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16859 sym->st_value = 0;
16860 }
16861 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16862 {
16863 /* At least one non-call relocation references this .iplt entry,
16864 so the .iplt entry is the function's canonical address. */
16865 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16866 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16867 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16868 (output_bfd, htab->root.iplt->output_section));
16869 sym->st_value = (h->plt.offset
16870 + htab->root.iplt->output_section->vma
16871 + htab->root.iplt->output_offset);
16872 }
16873 }
16874
16875 if (h->needs_copy)
16876 {
16877 asection * s;
16878 Elf_Internal_Rela rel;
16879
16880 /* This symbol needs a copy reloc. Set it up. */
16881 BFD_ASSERT (h->dynindx != -1
16882 && (h->root.type == bfd_link_hash_defined
16883 || h->root.type == bfd_link_hash_defweak));
16884
16885 rel.r_addend = 0;
16886 rel.r_offset = (h->root.u.def.value
16887 + h->root.u.def.section->output_section->vma
16888 + h->root.u.def.section->output_offset);
16889 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16890 if (h->root.u.def.section == htab->root.sdynrelro)
16891 s = htab->root.sreldynrelro;
16892 else
16893 s = htab->root.srelbss;
16894 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16895 }
16896
16897 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16898 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16899 to the ".got" section. */
16900 if (h == htab->root.hdynamic
16901 || (!htab->vxworks_p && h == htab->root.hgot))
16902 sym->st_shndx = SHN_ABS;
16903
16904 return TRUE;
16905 }
16906
16907 static void
16908 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16909 void *contents,
16910 const unsigned long *template, unsigned count)
16911 {
16912 unsigned ix;
16913
16914 for (ix = 0; ix != count; ix++)
16915 {
16916 unsigned long insn = template[ix];
16917
16918 /* Emit mov pc,rx if bx is not permitted. */
16919 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16920 insn = (insn & 0xf000000f) | 0x01a0f000;
16921 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16922 }
16923 }
16924
16925 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16926 other variants, NaCl needs this entry in a static executable's
16927 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16928 zero. For .iplt really only the last bundle is useful, and .iplt
16929 could have a shorter first entry, with each individual PLT entry's
16930 relative branch calculated differently so it targets the last
16931 bundle instead of the instruction before it (labelled .Lplt_tail
16932 above). But it's simpler to keep the size and layout of PLT0
16933 consistent with the dynamic case, at the cost of some dead code at
16934 the start of .iplt and the one dead store to the stack at the start
16935 of .Lplt_tail. */
16936 static void
16937 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16938 asection *plt, bfd_vma got_displacement)
16939 {
16940 unsigned int i;
16941
16942 put_arm_insn (htab, output_bfd,
16943 elf32_arm_nacl_plt0_entry[0]
16944 | arm_movw_immediate (got_displacement),
16945 plt->contents + 0);
16946 put_arm_insn (htab, output_bfd,
16947 elf32_arm_nacl_plt0_entry[1]
16948 | arm_movt_immediate (got_displacement),
16949 plt->contents + 4);
16950
16951 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16952 put_arm_insn (htab, output_bfd,
16953 elf32_arm_nacl_plt0_entry[i],
16954 plt->contents + (i * 4));
16955 }
16956
16957 /* Finish up the dynamic sections. */
16958
16959 static bfd_boolean
16960 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16961 {
16962 bfd * dynobj;
16963 asection * sgot;
16964 asection * sdyn;
16965 struct elf32_arm_link_hash_table *htab;
16966
16967 htab = elf32_arm_hash_table (info);
16968 if (htab == NULL)
16969 return FALSE;
16970
16971 dynobj = elf_hash_table (info)->dynobj;
16972
16973 sgot = htab->root.sgotplt;
16974 /* A broken linker script might have discarded the dynamic sections.
16975 Catch this here so that we do not seg-fault later on. */
16976 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16977 return FALSE;
16978 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16979
16980 if (elf_hash_table (info)->dynamic_sections_created)
16981 {
16982 asection *splt;
16983 Elf32_External_Dyn *dyncon, *dynconend;
16984
16985 splt = htab->root.splt;
16986 BFD_ASSERT (splt != NULL && sdyn != NULL);
16987 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16988
16989 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16990 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16991
16992 for (; dyncon < dynconend; dyncon++)
16993 {
16994 Elf_Internal_Dyn dyn;
16995 const char * name;
16996 asection * s;
16997
16998 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16999
17000 switch (dyn.d_tag)
17001 {
17002 unsigned int type;
17003
17004 default:
17005 if (htab->vxworks_p
17006 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17007 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17008 break;
17009
17010 case DT_HASH:
17011 name = ".hash";
17012 goto get_vma_if_bpabi;
17013 case DT_STRTAB:
17014 name = ".dynstr";
17015 goto get_vma_if_bpabi;
17016 case DT_SYMTAB:
17017 name = ".dynsym";
17018 goto get_vma_if_bpabi;
17019 case DT_VERSYM:
17020 name = ".gnu.version";
17021 goto get_vma_if_bpabi;
17022 case DT_VERDEF:
17023 name = ".gnu.version_d";
17024 goto get_vma_if_bpabi;
17025 case DT_VERNEED:
17026 name = ".gnu.version_r";
17027 goto get_vma_if_bpabi;
17028
17029 case DT_PLTGOT:
17030 name = htab->symbian_p ? ".got" : ".got.plt";
17031 goto get_vma;
17032 case DT_JMPREL:
17033 name = RELOC_SECTION (htab, ".plt");
17034 get_vma:
17035 s = bfd_get_linker_section (dynobj, name);
17036 if (s == NULL)
17037 {
17038 _bfd_error_handler
17039 (_("could not find section %s"), name);
17040 bfd_set_error (bfd_error_invalid_operation);
17041 return FALSE;
17042 }
17043 if (!htab->symbian_p)
17044 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17045 else
17046 /* In the BPABI, tags in the PT_DYNAMIC section point
17047 at the file offset, not the memory address, for the
17048 convenience of the post linker. */
17049 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17050 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17051 break;
17052
17053 get_vma_if_bpabi:
17054 if (htab->symbian_p)
17055 goto get_vma;
17056 break;
17057
17058 case DT_PLTRELSZ:
17059 s = htab->root.srelplt;
17060 BFD_ASSERT (s != NULL);
17061 dyn.d_un.d_val = s->size;
17062 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17063 break;
17064
17065 case DT_RELSZ:
17066 case DT_RELASZ:
17067 case DT_REL:
17068 case DT_RELA:
17069 /* In the BPABI, the DT_REL tag must point at the file
17070 offset, not the VMA, of the first relocation
17071 section. So, we use code similar to that in
17072 elflink.c, but do not check for SHF_ALLOC on the
17073 relocation section, since relocation sections are
17074 never allocated under the BPABI. PLT relocs are also
17075 included. */
17076 if (htab->symbian_p)
17077 {
17078 unsigned int i;
17079 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17080 ? SHT_REL : SHT_RELA);
17081 dyn.d_un.d_val = 0;
17082 for (i = 1; i < elf_numsections (output_bfd); i++)
17083 {
17084 Elf_Internal_Shdr *hdr
17085 = elf_elfsections (output_bfd)[i];
17086 if (hdr->sh_type == type)
17087 {
17088 if (dyn.d_tag == DT_RELSZ
17089 || dyn.d_tag == DT_RELASZ)
17090 dyn.d_un.d_val += hdr->sh_size;
17091 else if ((ufile_ptr) hdr->sh_offset
17092 <= dyn.d_un.d_val - 1)
17093 dyn.d_un.d_val = hdr->sh_offset;
17094 }
17095 }
17096 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17097 }
17098 break;
17099
17100 case DT_TLSDESC_PLT:
17101 s = htab->root.splt;
17102 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17103 + htab->dt_tlsdesc_plt);
17104 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17105 break;
17106
17107 case DT_TLSDESC_GOT:
17108 s = htab->root.sgot;
17109 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17110 + htab->dt_tlsdesc_got);
17111 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17112 break;
17113
17114 /* Set the bottom bit of DT_INIT/FINI if the
17115 corresponding function is Thumb. */
17116 case DT_INIT:
17117 name = info->init_function;
17118 goto get_sym;
17119 case DT_FINI:
17120 name = info->fini_function;
17121 get_sym:
17122 /* If it wasn't set by elf_bfd_final_link
17123 then there is nothing to adjust. */
17124 if (dyn.d_un.d_val != 0)
17125 {
17126 struct elf_link_hash_entry * eh;
17127
17128 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17129 FALSE, FALSE, TRUE);
17130 if (eh != NULL
17131 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17132 == ST_BRANCH_TO_THUMB)
17133 {
17134 dyn.d_un.d_val |= 1;
17135 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17136 }
17137 }
17138 break;
17139 }
17140 }
17141
17142 /* Fill in the first entry in the procedure linkage table. */
17143 if (splt->size > 0 && htab->plt_header_size)
17144 {
17145 const bfd_vma *plt0_entry;
17146 bfd_vma got_address, plt_address, got_displacement;
17147
17148 /* Calculate the addresses of the GOT and PLT. */
17149 got_address = sgot->output_section->vma + sgot->output_offset;
17150 plt_address = splt->output_section->vma + splt->output_offset;
17151
17152 if (htab->vxworks_p)
17153 {
17154 /* The VxWorks GOT is relocated by the dynamic linker.
17155 Therefore, we must emit relocations rather than simply
17156 computing the values now. */
17157 Elf_Internal_Rela rel;
17158
17159 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17160 put_arm_insn (htab, output_bfd, plt0_entry[0],
17161 splt->contents + 0);
17162 put_arm_insn (htab, output_bfd, plt0_entry[1],
17163 splt->contents + 4);
17164 put_arm_insn (htab, output_bfd, plt0_entry[2],
17165 splt->contents + 8);
17166 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17167
17168 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17169 rel.r_offset = plt_address + 12;
17170 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17171 rel.r_addend = 0;
17172 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17173 htab->srelplt2->contents);
17174 }
17175 else if (htab->nacl_p)
17176 arm_nacl_put_plt0 (htab, output_bfd, splt,
17177 got_address + 8 - (plt_address + 16));
17178 else if (using_thumb_only (htab))
17179 {
17180 got_displacement = got_address - (plt_address + 12);
17181
17182 plt0_entry = elf32_thumb2_plt0_entry;
17183 put_arm_insn (htab, output_bfd, plt0_entry[0],
17184 splt->contents + 0);
17185 put_arm_insn (htab, output_bfd, plt0_entry[1],
17186 splt->contents + 4);
17187 put_arm_insn (htab, output_bfd, plt0_entry[2],
17188 splt->contents + 8);
17189
17190 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17191 }
17192 else
17193 {
17194 got_displacement = got_address - (plt_address + 16);
17195
17196 plt0_entry = elf32_arm_plt0_entry;
17197 put_arm_insn (htab, output_bfd, plt0_entry[0],
17198 splt->contents + 0);
17199 put_arm_insn (htab, output_bfd, plt0_entry[1],
17200 splt->contents + 4);
17201 put_arm_insn (htab, output_bfd, plt0_entry[2],
17202 splt->contents + 8);
17203 put_arm_insn (htab, output_bfd, plt0_entry[3],
17204 splt->contents + 12);
17205
17206 #ifdef FOUR_WORD_PLT
17207 /* The displacement value goes in the otherwise-unused
17208 last word of the second entry. */
17209 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17210 #else
17211 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17212 #endif
17213 }
17214 }
17215
17216 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17217 really seem like the right value. */
17218 if (splt->output_section->owner == output_bfd)
17219 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17220
17221 if (htab->dt_tlsdesc_plt)
17222 {
17223 bfd_vma got_address
17224 = sgot->output_section->vma + sgot->output_offset;
17225 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17226 + htab->root.sgot->output_offset);
17227 bfd_vma plt_address
17228 = splt->output_section->vma + splt->output_offset;
17229
17230 arm_put_trampoline (htab, output_bfd,
17231 splt->contents + htab->dt_tlsdesc_plt,
17232 dl_tlsdesc_lazy_trampoline, 6);
17233
17234 bfd_put_32 (output_bfd,
17235 gotplt_address + htab->dt_tlsdesc_got
17236 - (plt_address + htab->dt_tlsdesc_plt)
17237 - dl_tlsdesc_lazy_trampoline[6],
17238 splt->contents + htab->dt_tlsdesc_plt + 24);
17239 bfd_put_32 (output_bfd,
17240 got_address - (plt_address + htab->dt_tlsdesc_plt)
17241 - dl_tlsdesc_lazy_trampoline[7],
17242 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17243 }
17244
17245 if (htab->tls_trampoline)
17246 {
17247 arm_put_trampoline (htab, output_bfd,
17248 splt->contents + htab->tls_trampoline,
17249 tls_trampoline, 3);
17250 #ifdef FOUR_WORD_PLT
17251 bfd_put_32 (output_bfd, 0x00000000,
17252 splt->contents + htab->tls_trampoline + 12);
17253 #endif
17254 }
17255
17256 if (htab->vxworks_p
17257 && !bfd_link_pic (info)
17258 && htab->root.splt->size > 0)
17259 {
17260 /* Correct the .rel(a).plt.unloaded relocations. They will have
17261 incorrect symbol indexes. */
17262 int num_plts;
17263 unsigned char *p;
17264
17265 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17266 / htab->plt_entry_size);
17267 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17268
17269 for (; num_plts; num_plts--)
17270 {
17271 Elf_Internal_Rela rel;
17272
17273 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17274 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17275 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17276 p += RELOC_SIZE (htab);
17277
17278 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17279 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17280 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17281 p += RELOC_SIZE (htab);
17282 }
17283 }
17284 }
17285
17286 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17287 /* NaCl uses a special first entry in .iplt too. */
17288 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17289
17290 /* Fill in the first three entries in the global offset table. */
17291 if (sgot)
17292 {
17293 if (sgot->size > 0)
17294 {
17295 if (sdyn == NULL)
17296 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17297 else
17298 bfd_put_32 (output_bfd,
17299 sdyn->output_section->vma + sdyn->output_offset,
17300 sgot->contents);
17301 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17302 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17303 }
17304
17305 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17306 }
17307
17308 /* At the very end of the .rofixup section is a pointer to the GOT. */
17309 if (htab->fdpic_p && htab->srofixup != NULL)
17310 {
17311 struct elf_link_hash_entry *hgot = htab->root.hgot;
17312
17313 bfd_vma got_value = hgot->root.u.def.value
17314 + hgot->root.u.def.section->output_section->vma
17315 + hgot->root.u.def.section->output_offset;
17316
17317 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17318
17319 /* Make sure we allocated and generated the same number of fixups. */
17320 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17321 }
17322
17323 return TRUE;
17324 }
17325
17326 static void
17327 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
17328 {
17329 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17330 struct elf32_arm_link_hash_table *globals;
17331 struct elf_segment_map *m;
17332
17333 i_ehdrp = elf_elfheader (abfd);
17334
17335 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17336 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17337 else
17338 _bfd_elf_post_process_headers (abfd, link_info);
17339 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17340
17341 if (link_info)
17342 {
17343 globals = elf32_arm_hash_table (link_info);
17344 if (globals != NULL && globals->byteswap_code)
17345 i_ehdrp->e_flags |= EF_ARM_BE8;
17346
17347 if (globals->fdpic_p)
17348 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17349 }
17350
17351 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17352 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17353 {
17354 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17355 if (abi == AEABI_VFP_args_vfp)
17356 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17357 else
17358 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17359 }
17360
17361 /* Scan segment to set p_flags attribute if it contains only sections with
17362 SHF_ARM_PURECODE flag. */
17363 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17364 {
17365 unsigned int j;
17366
17367 if (m->count == 0)
17368 continue;
17369 for (j = 0; j < m->count; j++)
17370 {
17371 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17372 break;
17373 }
17374 if (j == m->count)
17375 {
17376 m->p_flags = PF_X;
17377 m->p_flags_valid = 1;
17378 }
17379 }
17380 }
17381
17382 static enum elf_reloc_type_class
17383 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17384 const asection *rel_sec ATTRIBUTE_UNUSED,
17385 const Elf_Internal_Rela *rela)
17386 {
17387 switch ((int) ELF32_R_TYPE (rela->r_info))
17388 {
17389 case R_ARM_RELATIVE:
17390 return reloc_class_relative;
17391 case R_ARM_JUMP_SLOT:
17392 return reloc_class_plt;
17393 case R_ARM_COPY:
17394 return reloc_class_copy;
17395 case R_ARM_IRELATIVE:
17396 return reloc_class_ifunc;
17397 default:
17398 return reloc_class_normal;
17399 }
17400 }
17401
17402 static void
17403 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
17404 {
17405 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17406 }
17407
17408 /* Return TRUE if this is an unwinding table entry. */
17409
17410 static bfd_boolean
17411 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17412 {
17413 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17414 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17415 }
17416
17417
17418 /* Set the type and flags for an ARM section. We do this by
17419 the section name, which is a hack, but ought to work. */
17420
17421 static bfd_boolean
17422 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17423 {
17424 const char * name;
17425
17426 name = bfd_get_section_name (abfd, sec);
17427
17428 if (is_arm_elf_unwind_section_name (abfd, name))
17429 {
17430 hdr->sh_type = SHT_ARM_EXIDX;
17431 hdr->sh_flags |= SHF_LINK_ORDER;
17432 }
17433
17434 if (sec->flags & SEC_ELF_PURECODE)
17435 hdr->sh_flags |= SHF_ARM_PURECODE;
17436
17437 return TRUE;
17438 }
17439
17440 /* Handle an ARM specific section when reading an object file. This is
17441 called when bfd_section_from_shdr finds a section with an unknown
17442 type. */
17443
17444 static bfd_boolean
17445 elf32_arm_section_from_shdr (bfd *abfd,
17446 Elf_Internal_Shdr * hdr,
17447 const char *name,
17448 int shindex)
17449 {
17450 /* There ought to be a place to keep ELF backend specific flags, but
17451 at the moment there isn't one. We just keep track of the
17452 sections by their name, instead. Fortunately, the ABI gives
17453 names for all the ARM specific sections, so we will probably get
17454 away with this. */
17455 switch (hdr->sh_type)
17456 {
17457 case SHT_ARM_EXIDX:
17458 case SHT_ARM_PREEMPTMAP:
17459 case SHT_ARM_ATTRIBUTES:
17460 break;
17461
17462 default:
17463 return FALSE;
17464 }
17465
17466 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17467 return FALSE;
17468
17469 return TRUE;
17470 }
17471
17472 static _arm_elf_section_data *
17473 get_arm_elf_section_data (asection * sec)
17474 {
17475 if (sec && sec->owner && is_arm_elf (sec->owner))
17476 return elf32_arm_section_data (sec);
17477 else
17478 return NULL;
17479 }
17480
17481 typedef struct
17482 {
17483 void *flaginfo;
17484 struct bfd_link_info *info;
17485 asection *sec;
17486 int sec_shndx;
17487 int (*func) (void *, const char *, Elf_Internal_Sym *,
17488 asection *, struct elf_link_hash_entry *);
17489 } output_arch_syminfo;
17490
17491 enum map_symbol_type
17492 {
17493 ARM_MAP_ARM,
17494 ARM_MAP_THUMB,
17495 ARM_MAP_DATA
17496 };
17497
17498
17499 /* Output a single mapping symbol. */
17500
17501 static bfd_boolean
17502 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17503 enum map_symbol_type type,
17504 bfd_vma offset)
17505 {
17506 static const char *names[3] = {"$a", "$t", "$d"};
17507 Elf_Internal_Sym sym;
17508
17509 sym.st_value = osi->sec->output_section->vma
17510 + osi->sec->output_offset
17511 + offset;
17512 sym.st_size = 0;
17513 sym.st_other = 0;
17514 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17515 sym.st_shndx = osi->sec_shndx;
17516 sym.st_target_internal = 0;
17517 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17518 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17519 }
17520
17521 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17522 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17523
17524 static bfd_boolean
17525 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17526 bfd_boolean is_iplt_entry_p,
17527 union gotplt_union *root_plt,
17528 struct arm_plt_info *arm_plt)
17529 {
17530 struct elf32_arm_link_hash_table *htab;
17531 bfd_vma addr, plt_header_size;
17532
17533 if (root_plt->offset == (bfd_vma) -1)
17534 return TRUE;
17535
17536 htab = elf32_arm_hash_table (osi->info);
17537 if (htab == NULL)
17538 return FALSE;
17539
17540 if (is_iplt_entry_p)
17541 {
17542 osi->sec = htab->root.iplt;
17543 plt_header_size = 0;
17544 }
17545 else
17546 {
17547 osi->sec = htab->root.splt;
17548 plt_header_size = htab->plt_header_size;
17549 }
17550 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17551 (osi->info->output_bfd, osi->sec->output_section));
17552
17553 addr = root_plt->offset & -2;
17554 if (htab->symbian_p)
17555 {
17556 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17557 return FALSE;
17558 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
17559 return FALSE;
17560 }
17561 else if (htab->vxworks_p)
17562 {
17563 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17564 return FALSE;
17565 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17566 return FALSE;
17567 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17568 return FALSE;
17569 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17570 return FALSE;
17571 }
17572 else if (htab->nacl_p)
17573 {
17574 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17575 return FALSE;
17576 }
17577 else if (using_thumb_only (htab))
17578 {
17579 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17580 return FALSE;
17581 }
17582 else
17583 {
17584 bfd_boolean thumb_stub_p;
17585
17586 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17587 if (thumb_stub_p)
17588 {
17589 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17590 return FALSE;
17591 }
17592 #ifdef FOUR_WORD_PLT
17593 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17594 return FALSE;
17595 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17596 return FALSE;
17597 #else
17598 /* A three-word PLT with no Thumb thunk contains only Arm code,
17599 so only need to output a mapping symbol for the first PLT entry and
17600 entries with thumb thunks. */
17601 if (thumb_stub_p || addr == plt_header_size)
17602 {
17603 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17604 return FALSE;
17605 }
17606 #endif
17607 }
17608
17609 return TRUE;
17610 }
17611
17612 /* Output mapping symbols for PLT entries associated with H. */
17613
17614 static bfd_boolean
17615 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17616 {
17617 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17618 struct elf32_arm_link_hash_entry *eh;
17619
17620 if (h->root.type == bfd_link_hash_indirect)
17621 return TRUE;
17622
17623 if (h->root.type == bfd_link_hash_warning)
17624 /* When warning symbols are created, they **replace** the "real"
17625 entry in the hash table, thus we never get to see the real
17626 symbol in a hash traversal. So look at it now. */
17627 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17628
17629 eh = (struct elf32_arm_link_hash_entry *) h;
17630 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17631 &h->plt, &eh->plt);
17632 }
17633
17634 /* Bind a veneered symbol to its veneer identified by its hash entry
17635 STUB_ENTRY. The veneered location thus loose its symbol. */
17636
17637 static void
17638 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17639 {
17640 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17641
17642 BFD_ASSERT (hash);
17643 hash->root.root.u.def.section = stub_entry->stub_sec;
17644 hash->root.root.u.def.value = stub_entry->stub_offset;
17645 hash->root.size = stub_entry->stub_size;
17646 }
17647
17648 /* Output a single local symbol for a generated stub. */
17649
17650 static bfd_boolean
17651 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17652 bfd_vma offset, bfd_vma size)
17653 {
17654 Elf_Internal_Sym sym;
17655
17656 sym.st_value = osi->sec->output_section->vma
17657 + osi->sec->output_offset
17658 + offset;
17659 sym.st_size = size;
17660 sym.st_other = 0;
17661 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17662 sym.st_shndx = osi->sec_shndx;
17663 sym.st_target_internal = 0;
17664 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17665 }
17666
17667 static bfd_boolean
17668 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17669 void * in_arg)
17670 {
17671 struct elf32_arm_stub_hash_entry *stub_entry;
17672 asection *stub_sec;
17673 bfd_vma addr;
17674 char *stub_name;
17675 output_arch_syminfo *osi;
17676 const insn_sequence *template_sequence;
17677 enum stub_insn_type prev_type;
17678 int size;
17679 int i;
17680 enum map_symbol_type sym_type;
17681
17682 /* Massage our args to the form they really have. */
17683 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17684 osi = (output_arch_syminfo *) in_arg;
17685
17686 stub_sec = stub_entry->stub_sec;
17687
17688 /* Ensure this stub is attached to the current section being
17689 processed. */
17690 if (stub_sec != osi->sec)
17691 return TRUE;
17692
17693 addr = (bfd_vma) stub_entry->stub_offset;
17694 template_sequence = stub_entry->stub_template;
17695
17696 if (arm_stub_sym_claimed (stub_entry->stub_type))
17697 arm_stub_claim_sym (stub_entry);
17698 else
17699 {
17700 stub_name = stub_entry->output_name;
17701 switch (template_sequence[0].type)
17702 {
17703 case ARM_TYPE:
17704 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17705 stub_entry->stub_size))
17706 return FALSE;
17707 break;
17708 case THUMB16_TYPE:
17709 case THUMB32_TYPE:
17710 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17711 stub_entry->stub_size))
17712 return FALSE;
17713 break;
17714 default:
17715 BFD_FAIL ();
17716 return 0;
17717 }
17718 }
17719
17720 prev_type = DATA_TYPE;
17721 size = 0;
17722 for (i = 0; i < stub_entry->stub_template_size; i++)
17723 {
17724 switch (template_sequence[i].type)
17725 {
17726 case ARM_TYPE:
17727 sym_type = ARM_MAP_ARM;
17728 break;
17729
17730 case THUMB16_TYPE:
17731 case THUMB32_TYPE:
17732 sym_type = ARM_MAP_THUMB;
17733 break;
17734
17735 case DATA_TYPE:
17736 sym_type = ARM_MAP_DATA;
17737 break;
17738
17739 default:
17740 BFD_FAIL ();
17741 return FALSE;
17742 }
17743
17744 if (template_sequence[i].type != prev_type)
17745 {
17746 prev_type = template_sequence[i].type;
17747 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17748 return FALSE;
17749 }
17750
17751 switch (template_sequence[i].type)
17752 {
17753 case ARM_TYPE:
17754 case THUMB32_TYPE:
17755 size += 4;
17756 break;
17757
17758 case THUMB16_TYPE:
17759 size += 2;
17760 break;
17761
17762 case DATA_TYPE:
17763 size += 4;
17764 break;
17765
17766 default:
17767 BFD_FAIL ();
17768 return FALSE;
17769 }
17770 }
17771
17772 return TRUE;
17773 }
17774
17775 /* Output mapping symbols for linker generated sections,
17776 and for those data-only sections that do not have a
17777 $d. */
17778
17779 static bfd_boolean
17780 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17781 struct bfd_link_info *info,
17782 void *flaginfo,
17783 int (*func) (void *, const char *,
17784 Elf_Internal_Sym *,
17785 asection *,
17786 struct elf_link_hash_entry *))
17787 {
17788 output_arch_syminfo osi;
17789 struct elf32_arm_link_hash_table *htab;
17790 bfd_vma offset;
17791 bfd_size_type size;
17792 bfd *input_bfd;
17793
17794 htab = elf32_arm_hash_table (info);
17795 if (htab == NULL)
17796 return FALSE;
17797
17798 check_use_blx (htab);
17799
17800 osi.flaginfo = flaginfo;
17801 osi.info = info;
17802 osi.func = func;
17803
17804 /* Add a $d mapping symbol to data-only sections that
17805 don't have any mapping symbol. This may result in (harmless) redundant
17806 mapping symbols. */
17807 for (input_bfd = info->input_bfds;
17808 input_bfd != NULL;
17809 input_bfd = input_bfd->link.next)
17810 {
17811 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17812 for (osi.sec = input_bfd->sections;
17813 osi.sec != NULL;
17814 osi.sec = osi.sec->next)
17815 {
17816 if (osi.sec->output_section != NULL
17817 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17818 != 0)
17819 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17820 == SEC_HAS_CONTENTS
17821 && get_arm_elf_section_data (osi.sec) != NULL
17822 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17823 && osi.sec->size > 0
17824 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17825 {
17826 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17827 (output_bfd, osi.sec->output_section);
17828 if (osi.sec_shndx != (int)SHN_BAD)
17829 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17830 }
17831 }
17832 }
17833
17834 /* ARM->Thumb glue. */
17835 if (htab->arm_glue_size > 0)
17836 {
17837 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17838 ARM2THUMB_GLUE_SECTION_NAME);
17839
17840 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17841 (output_bfd, osi.sec->output_section);
17842 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17843 || htab->pic_veneer)
17844 size = ARM2THUMB_PIC_GLUE_SIZE;
17845 else if (htab->use_blx)
17846 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17847 else
17848 size = ARM2THUMB_STATIC_GLUE_SIZE;
17849
17850 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17851 {
17852 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17853 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17854 }
17855 }
17856
17857 /* Thumb->ARM glue. */
17858 if (htab->thumb_glue_size > 0)
17859 {
17860 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17861 THUMB2ARM_GLUE_SECTION_NAME);
17862
17863 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17864 (output_bfd, osi.sec->output_section);
17865 size = THUMB2ARM_GLUE_SIZE;
17866
17867 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17868 {
17869 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17870 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17871 }
17872 }
17873
17874 /* ARMv4 BX veneers. */
17875 if (htab->bx_glue_size > 0)
17876 {
17877 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17878 ARM_BX_GLUE_SECTION_NAME);
17879
17880 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17881 (output_bfd, osi.sec->output_section);
17882
17883 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17884 }
17885
17886 /* Long calls stubs. */
17887 if (htab->stub_bfd && htab->stub_bfd->sections)
17888 {
17889 asection* stub_sec;
17890
17891 for (stub_sec = htab->stub_bfd->sections;
17892 stub_sec != NULL;
17893 stub_sec = stub_sec->next)
17894 {
17895 /* Ignore non-stub sections. */
17896 if (!strstr (stub_sec->name, STUB_SUFFIX))
17897 continue;
17898
17899 osi.sec = stub_sec;
17900
17901 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17902 (output_bfd, osi.sec->output_section);
17903
17904 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17905 }
17906 }
17907
17908 /* Finally, output mapping symbols for the PLT. */
17909 if (htab->root.splt && htab->root.splt->size > 0)
17910 {
17911 osi.sec = htab->root.splt;
17912 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17913 (output_bfd, osi.sec->output_section));
17914
17915 /* Output mapping symbols for the plt header. SymbianOS does not have a
17916 plt header. */
17917 if (htab->vxworks_p)
17918 {
17919 /* VxWorks shared libraries have no PLT header. */
17920 if (!bfd_link_pic (info))
17921 {
17922 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17923 return FALSE;
17924 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17925 return FALSE;
17926 }
17927 }
17928 else if (htab->nacl_p)
17929 {
17930 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17931 return FALSE;
17932 }
17933 else if (using_thumb_only (htab))
17934 {
17935 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17936 return FALSE;
17937 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17938 return FALSE;
17939 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17940 return FALSE;
17941 }
17942 else if (!htab->symbian_p && !htab->fdpic_p)
17943 {
17944 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17945 return FALSE;
17946 #ifndef FOUR_WORD_PLT
17947 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17948 return FALSE;
17949 #endif
17950 }
17951 }
17952 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17953 {
17954 /* NaCl uses a special first entry in .iplt too. */
17955 osi.sec = htab->root.iplt;
17956 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17957 (output_bfd, osi.sec->output_section));
17958 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17959 return FALSE;
17960 }
17961 if ((htab->root.splt && htab->root.splt->size > 0)
17962 || (htab->root.iplt && htab->root.iplt->size > 0))
17963 {
17964 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17965 for (input_bfd = info->input_bfds;
17966 input_bfd != NULL;
17967 input_bfd = input_bfd->link.next)
17968 {
17969 struct arm_local_iplt_info **local_iplt;
17970 unsigned int i, num_syms;
17971
17972 local_iplt = elf32_arm_local_iplt (input_bfd);
17973 if (local_iplt != NULL)
17974 {
17975 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17976 for (i = 0; i < num_syms; i++)
17977 if (local_iplt[i] != NULL
17978 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17979 &local_iplt[i]->root,
17980 &local_iplt[i]->arm))
17981 return FALSE;
17982 }
17983 }
17984 }
17985 if (htab->dt_tlsdesc_plt != 0)
17986 {
17987 /* Mapping symbols for the lazy tls trampoline. */
17988 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17989 return FALSE;
17990
17991 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17992 htab->dt_tlsdesc_plt + 24))
17993 return FALSE;
17994 }
17995 if (htab->tls_trampoline != 0)
17996 {
17997 /* Mapping symbols for the tls trampoline. */
17998 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17999 return FALSE;
18000 #ifdef FOUR_WORD_PLT
18001 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18002 htab->tls_trampoline + 12))
18003 return FALSE;
18004 #endif
18005 }
18006
18007 return TRUE;
18008 }
18009
18010 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18011 the import library. All SYMCOUNT symbols of ABFD can be examined
18012 from their pointers in SYMS. Pointers of symbols to keep should be
18013 stored continuously at the beginning of that array.
18014
18015 Returns the number of symbols to keep. */
18016
18017 static unsigned int
18018 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18019 struct bfd_link_info *info,
18020 asymbol **syms, long symcount)
18021 {
18022 size_t maxnamelen;
18023 char *cmse_name;
18024 long src_count, dst_count = 0;
18025 struct elf32_arm_link_hash_table *htab;
18026
18027 htab = elf32_arm_hash_table (info);
18028 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18029 symcount = 0;
18030
18031 maxnamelen = 128;
18032 cmse_name = (char *) bfd_malloc (maxnamelen);
18033 for (src_count = 0; src_count < symcount; src_count++)
18034 {
18035 struct elf32_arm_link_hash_entry *cmse_hash;
18036 asymbol *sym;
18037 flagword flags;
18038 char *name;
18039 size_t namelen;
18040
18041 sym = syms[src_count];
18042 flags = sym->flags;
18043 name = (char *) bfd_asymbol_name (sym);
18044
18045 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18046 continue;
18047 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18048 continue;
18049
18050 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18051 if (namelen > maxnamelen)
18052 {
18053 cmse_name = (char *)
18054 bfd_realloc (cmse_name, namelen);
18055 maxnamelen = namelen;
18056 }
18057 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18058 cmse_hash = (struct elf32_arm_link_hash_entry *)
18059 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18060
18061 if (!cmse_hash
18062 || (cmse_hash->root.root.type != bfd_link_hash_defined
18063 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18064 || cmse_hash->root.type != STT_FUNC)
18065 continue;
18066
18067 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
18068 continue;
18069
18070 syms[dst_count++] = sym;
18071 }
18072 free (cmse_name);
18073
18074 syms[dst_count] = NULL;
18075
18076 return dst_count;
18077 }
18078
18079 /* Filter symbols of ABFD to include in the import library. All
18080 SYMCOUNT symbols of ABFD can be examined from their pointers in
18081 SYMS. Pointers of symbols to keep should be stored continuously at
18082 the beginning of that array.
18083
18084 Returns the number of symbols to keep. */
18085
18086 static unsigned int
18087 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18088 struct bfd_link_info *info,
18089 asymbol **syms, long symcount)
18090 {
18091 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18092
18093 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18094 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18095 library to be a relocatable object file. */
18096 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18097 if (globals->cmse_implib)
18098 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18099 else
18100 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18101 }
18102
18103 /* Allocate target specific section data. */
18104
18105 static bfd_boolean
18106 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18107 {
18108 if (!sec->used_by_bfd)
18109 {
18110 _arm_elf_section_data *sdata;
18111 bfd_size_type amt = sizeof (*sdata);
18112
18113 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18114 if (sdata == NULL)
18115 return FALSE;
18116 sec->used_by_bfd = sdata;
18117 }
18118
18119 return _bfd_elf_new_section_hook (abfd, sec);
18120 }
18121
18122
18123 /* Used to order a list of mapping symbols by address. */
18124
18125 static int
18126 elf32_arm_compare_mapping (const void * a, const void * b)
18127 {
18128 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18129 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18130
18131 if (amap->vma > bmap->vma)
18132 return 1;
18133 else if (amap->vma < bmap->vma)
18134 return -1;
18135 else if (amap->type > bmap->type)
18136 /* Ensure results do not depend on the host qsort for objects with
18137 multiple mapping symbols at the same address by sorting on type
18138 after vma. */
18139 return 1;
18140 else if (amap->type < bmap->type)
18141 return -1;
18142 else
18143 return 0;
18144 }
18145
18146 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18147
18148 static unsigned long
18149 offset_prel31 (unsigned long addr, bfd_vma offset)
18150 {
18151 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18152 }
18153
18154 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18155 relocations. */
18156
18157 static void
18158 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18159 {
18160 unsigned long first_word = bfd_get_32 (output_bfd, from);
18161 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18162
18163 /* High bit of first word is supposed to be zero. */
18164 if ((first_word & 0x80000000ul) == 0)
18165 first_word = offset_prel31 (first_word, offset);
18166
18167 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18168 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18169 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18170 second_word = offset_prel31 (second_word, offset);
18171
18172 bfd_put_32 (output_bfd, first_word, to);
18173 bfd_put_32 (output_bfd, second_word, to + 4);
18174 }
18175
18176 /* Data for make_branch_to_a8_stub(). */
18177
18178 struct a8_branch_to_stub_data
18179 {
18180 asection *writing_section;
18181 bfd_byte *contents;
18182 };
18183
18184
18185 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18186 places for a particular section. */
18187
18188 static bfd_boolean
18189 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18190 void *in_arg)
18191 {
18192 struct elf32_arm_stub_hash_entry *stub_entry;
18193 struct a8_branch_to_stub_data *data;
18194 bfd_byte *contents;
18195 unsigned long branch_insn;
18196 bfd_vma veneered_insn_loc, veneer_entry_loc;
18197 bfd_signed_vma branch_offset;
18198 bfd *abfd;
18199 unsigned int loc;
18200
18201 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18202 data = (struct a8_branch_to_stub_data *) in_arg;
18203
18204 if (stub_entry->target_section != data->writing_section
18205 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18206 return TRUE;
18207
18208 contents = data->contents;
18209
18210 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18211 generated when both source and target are in the same section. */
18212 veneered_insn_loc = stub_entry->target_section->output_section->vma
18213 + stub_entry->target_section->output_offset
18214 + stub_entry->source_value;
18215
18216 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18217 + stub_entry->stub_sec->output_offset
18218 + stub_entry->stub_offset;
18219
18220 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18221 veneered_insn_loc &= ~3u;
18222
18223 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18224
18225 abfd = stub_entry->target_section->owner;
18226 loc = stub_entry->source_value;
18227
18228 /* We attempt to avoid this condition by setting stubs_always_after_branch
18229 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18230 This check is just to be on the safe side... */
18231 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18232 {
18233 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18234 "allocated in unsafe location"), abfd);
18235 return FALSE;
18236 }
18237
18238 switch (stub_entry->stub_type)
18239 {
18240 case arm_stub_a8_veneer_b:
18241 case arm_stub_a8_veneer_b_cond:
18242 branch_insn = 0xf0009000;
18243 goto jump24;
18244
18245 case arm_stub_a8_veneer_blx:
18246 branch_insn = 0xf000e800;
18247 goto jump24;
18248
18249 case arm_stub_a8_veneer_bl:
18250 {
18251 unsigned int i1, j1, i2, j2, s;
18252
18253 branch_insn = 0xf000d000;
18254
18255 jump24:
18256 if (branch_offset < -16777216 || branch_offset > 16777214)
18257 {
18258 /* There's not much we can do apart from complain if this
18259 happens. */
18260 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18261 "of range (input file too large)"), abfd);
18262 return FALSE;
18263 }
18264
18265 /* i1 = not(j1 eor s), so:
18266 not i1 = j1 eor s
18267 j1 = (not i1) eor s. */
18268
18269 branch_insn |= (branch_offset >> 1) & 0x7ff;
18270 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18271 i2 = (branch_offset >> 22) & 1;
18272 i1 = (branch_offset >> 23) & 1;
18273 s = (branch_offset >> 24) & 1;
18274 j1 = (!i1) ^ s;
18275 j2 = (!i2) ^ s;
18276 branch_insn |= j2 << 11;
18277 branch_insn |= j1 << 13;
18278 branch_insn |= s << 26;
18279 }
18280 break;
18281
18282 default:
18283 BFD_FAIL ();
18284 return FALSE;
18285 }
18286
18287 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18288 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18289
18290 return TRUE;
18291 }
18292
18293 /* Beginning of stm32l4xx work-around. */
18294
18295 /* Functions encoding instructions necessary for the emission of the
18296 fix-stm32l4xx-629360.
18297 Encoding is extracted from the
18298 ARM (C) Architecture Reference Manual
18299 ARMv7-A and ARMv7-R edition
18300 ARM DDI 0406C.b (ID072512). */
18301
18302 static inline bfd_vma
18303 create_instruction_branch_absolute (int branch_offset)
18304 {
18305 /* A8.8.18 B (A8-334)
18306 B target_address (Encoding T4). */
18307 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18308 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18309 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18310
18311 int s = ((branch_offset & 0x1000000) >> 24);
18312 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18313 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18314
18315 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18316 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18317
18318 bfd_vma patched_inst = 0xf0009000
18319 | s << 26 /* S. */
18320 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18321 | j1 << 13 /* J1. */
18322 | j2 << 11 /* J2. */
18323 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18324
18325 return patched_inst;
18326 }
18327
18328 static inline bfd_vma
18329 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18330 {
18331 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18332 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18333 bfd_vma patched_inst = 0xe8900000
18334 | (/*W=*/wback << 21)
18335 | (base_reg << 16)
18336 | (reg_mask & 0x0000ffff);
18337
18338 return patched_inst;
18339 }
18340
18341 static inline bfd_vma
18342 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18343 {
18344 /* A8.8.60 LDMDB/LDMEA (A8-402)
18345 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18346 bfd_vma patched_inst = 0xe9100000
18347 | (/*W=*/wback << 21)
18348 | (base_reg << 16)
18349 | (reg_mask & 0x0000ffff);
18350
18351 return patched_inst;
18352 }
18353
18354 static inline bfd_vma
18355 create_instruction_mov (int target_reg, int source_reg)
18356 {
18357 /* A8.8.103 MOV (register) (A8-486)
18358 MOV Rd, Rm (Encoding T1). */
18359 bfd_vma patched_inst = 0x4600
18360 | (target_reg & 0x7)
18361 | ((target_reg & 0x8) >> 3) << 7
18362 | (source_reg << 3);
18363
18364 return patched_inst;
18365 }
18366
18367 static inline bfd_vma
18368 create_instruction_sub (int target_reg, int source_reg, int value)
18369 {
18370 /* A8.8.221 SUB (immediate) (A8-708)
18371 SUB Rd, Rn, #value (Encoding T3). */
18372 bfd_vma patched_inst = 0xf1a00000
18373 | (target_reg << 8)
18374 | (source_reg << 16)
18375 | (/*S=*/0 << 20)
18376 | ((value & 0x800) >> 11) << 26
18377 | ((value & 0x700) >> 8) << 12
18378 | (value & 0x0ff);
18379
18380 return patched_inst;
18381 }
18382
18383 static inline bfd_vma
18384 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18385 int first_reg)
18386 {
18387 /* A8.8.332 VLDM (A8-922)
18388 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18389 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18390 | (/*W=*/wback << 21)
18391 | (base_reg << 16)
18392 | (num_words & 0x000000ff)
18393 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18394 | (first_reg & 0x00000001) << 22;
18395
18396 return patched_inst;
18397 }
18398
18399 static inline bfd_vma
18400 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18401 int first_reg)
18402 {
18403 /* A8.8.332 VLDM (A8-922)
18404 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18405 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18406 | (base_reg << 16)
18407 | (num_words & 0x000000ff)
18408 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18409 | (first_reg & 0x00000001) << 22;
18410
18411 return patched_inst;
18412 }
18413
18414 static inline bfd_vma
18415 create_instruction_udf_w (int value)
18416 {
18417 /* A8.8.247 UDF (A8-758)
18418 Undefined (Encoding T2). */
18419 bfd_vma patched_inst = 0xf7f0a000
18420 | (value & 0x00000fff)
18421 | (value & 0x000f0000) << 16;
18422
18423 return patched_inst;
18424 }
18425
18426 static inline bfd_vma
18427 create_instruction_udf (int value)
18428 {
18429 /* A8.8.247 UDF (A8-758)
18430 Undefined (Encoding T1). */
18431 bfd_vma patched_inst = 0xde00
18432 | (value & 0xff);
18433
18434 return patched_inst;
18435 }
18436
18437 /* Functions writing an instruction in memory, returning the next
18438 memory position to write to. */
18439
18440 static inline bfd_byte *
18441 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18442 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18443 {
18444 put_thumb2_insn (htab, output_bfd, insn, pt);
18445 return pt + 4;
18446 }
18447
18448 static inline bfd_byte *
18449 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18450 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18451 {
18452 put_thumb_insn (htab, output_bfd, insn, pt);
18453 return pt + 2;
18454 }
18455
18456 /* Function filling up a region in memory with T1 and T2 UDFs taking
18457 care of alignment. */
18458
18459 static bfd_byte *
18460 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18461 bfd * output_bfd,
18462 const bfd_byte * const base_stub_contents,
18463 bfd_byte * const from_stub_contents,
18464 const bfd_byte * const end_stub_contents)
18465 {
18466 bfd_byte *current_stub_contents = from_stub_contents;
18467
18468 /* Fill the remaining of the stub with deterministic contents : UDF
18469 instructions.
18470 Check if realignment is needed on modulo 4 frontier using T1, to
18471 further use T2. */
18472 if ((current_stub_contents < end_stub_contents)
18473 && !((current_stub_contents - base_stub_contents) % 2)
18474 && ((current_stub_contents - base_stub_contents) % 4))
18475 current_stub_contents =
18476 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18477 create_instruction_udf (0));
18478
18479 for (; current_stub_contents < end_stub_contents;)
18480 current_stub_contents =
18481 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18482 create_instruction_udf_w (0));
18483
18484 return current_stub_contents;
18485 }
18486
18487 /* Functions writing the stream of instructions equivalent to the
18488 derived sequence for ldmia, ldmdb, vldm respectively. */
18489
18490 static void
18491 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18492 bfd * output_bfd,
18493 const insn32 initial_insn,
18494 const bfd_byte *const initial_insn_addr,
18495 bfd_byte *const base_stub_contents)
18496 {
18497 int wback = (initial_insn & 0x00200000) >> 21;
18498 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18499 int insn_all_registers = initial_insn & 0x0000ffff;
18500 int insn_low_registers, insn_high_registers;
18501 int usable_register_mask;
18502 int nb_registers = elf32_arm_popcount (insn_all_registers);
18503 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18504 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18505 bfd_byte *current_stub_contents = base_stub_contents;
18506
18507 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18508
18509 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18510 smaller than 8 registers load sequences that do not cause the
18511 hardware issue. */
18512 if (nb_registers <= 8)
18513 {
18514 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18515 current_stub_contents =
18516 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18517 initial_insn);
18518
18519 /* B initial_insn_addr+4. */
18520 if (!restore_pc)
18521 current_stub_contents =
18522 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18523 create_instruction_branch_absolute
18524 (initial_insn_addr - current_stub_contents));
18525
18526 /* Fill the remaining of the stub with deterministic contents. */
18527 current_stub_contents =
18528 stm32l4xx_fill_stub_udf (htab, output_bfd,
18529 base_stub_contents, current_stub_contents,
18530 base_stub_contents +
18531 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18532
18533 return;
18534 }
18535
18536 /* - reg_list[13] == 0. */
18537 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18538
18539 /* - reg_list[14] & reg_list[15] != 1. */
18540 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18541
18542 /* - if (wback==1) reg_list[rn] == 0. */
18543 BFD_ASSERT (!wback || !restore_rn);
18544
18545 /* - nb_registers > 8. */
18546 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18547
18548 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18549
18550 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18551 - One with the 7 lowest registers (register mask 0x007F)
18552 This LDM will finally contain between 2 and 7 registers
18553 - One with the 7 highest registers (register mask 0xDF80)
18554 This ldm will finally contain between 2 and 7 registers. */
18555 insn_low_registers = insn_all_registers & 0x007F;
18556 insn_high_registers = insn_all_registers & 0xDF80;
18557
18558 /* A spare register may be needed during this veneer to temporarily
18559 handle the base register. This register will be restored with the
18560 last LDM operation.
18561 The usable register may be any general purpose register (that
18562 excludes PC, SP, LR : register mask is 0x1FFF). */
18563 usable_register_mask = 0x1FFF;
18564
18565 /* Generate the stub function. */
18566 if (wback)
18567 {
18568 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18569 current_stub_contents =
18570 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18571 create_instruction_ldmia
18572 (rn, /*wback=*/1, insn_low_registers));
18573
18574 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18575 current_stub_contents =
18576 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18577 create_instruction_ldmia
18578 (rn, /*wback=*/1, insn_high_registers));
18579 if (!restore_pc)
18580 {
18581 /* B initial_insn_addr+4. */
18582 current_stub_contents =
18583 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18584 create_instruction_branch_absolute
18585 (initial_insn_addr - current_stub_contents));
18586 }
18587 }
18588 else /* if (!wback). */
18589 {
18590 ri = rn;
18591
18592 /* If Rn is not part of the high-register-list, move it there. */
18593 if (!(insn_high_registers & (1 << rn)))
18594 {
18595 /* Choose a Ri in the high-register-list that will be restored. */
18596 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18597
18598 /* MOV Ri, Rn. */
18599 current_stub_contents =
18600 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18601 create_instruction_mov (ri, rn));
18602 }
18603
18604 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18605 current_stub_contents =
18606 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18607 create_instruction_ldmia
18608 (ri, /*wback=*/1, insn_low_registers));
18609
18610 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18611 current_stub_contents =
18612 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18613 create_instruction_ldmia
18614 (ri, /*wback=*/0, insn_high_registers));
18615
18616 if (!restore_pc)
18617 {
18618 /* B initial_insn_addr+4. */
18619 current_stub_contents =
18620 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18621 create_instruction_branch_absolute
18622 (initial_insn_addr - current_stub_contents));
18623 }
18624 }
18625
18626 /* Fill the remaining of the stub with deterministic contents. */
18627 current_stub_contents =
18628 stm32l4xx_fill_stub_udf (htab, output_bfd,
18629 base_stub_contents, current_stub_contents,
18630 base_stub_contents +
18631 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18632 }
18633
18634 static void
18635 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18636 bfd * output_bfd,
18637 const insn32 initial_insn,
18638 const bfd_byte *const initial_insn_addr,
18639 bfd_byte *const base_stub_contents)
18640 {
18641 int wback = (initial_insn & 0x00200000) >> 21;
18642 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18643 int insn_all_registers = initial_insn & 0x0000ffff;
18644 int insn_low_registers, insn_high_registers;
18645 int usable_register_mask;
18646 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18647 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18648 int nb_registers = elf32_arm_popcount (insn_all_registers);
18649 bfd_byte *current_stub_contents = base_stub_contents;
18650
18651 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18652
18653 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18654 smaller than 8 registers load sequences that do not cause the
18655 hardware issue. */
18656 if (nb_registers <= 8)
18657 {
18658 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18659 current_stub_contents =
18660 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18661 initial_insn);
18662
18663 /* B initial_insn_addr+4. */
18664 current_stub_contents =
18665 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18666 create_instruction_branch_absolute
18667 (initial_insn_addr - current_stub_contents));
18668
18669 /* Fill the remaining of the stub with deterministic contents. */
18670 current_stub_contents =
18671 stm32l4xx_fill_stub_udf (htab, output_bfd,
18672 base_stub_contents, current_stub_contents,
18673 base_stub_contents +
18674 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18675
18676 return;
18677 }
18678
18679 /* - reg_list[13] == 0. */
18680 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18681
18682 /* - reg_list[14] & reg_list[15] != 1. */
18683 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18684
18685 /* - if (wback==1) reg_list[rn] == 0. */
18686 BFD_ASSERT (!wback || !restore_rn);
18687
18688 /* - nb_registers > 8. */
18689 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18690
18691 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18692
18693 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18694 - One with the 7 lowest registers (register mask 0x007F)
18695 This LDM will finally contain between 2 and 7 registers
18696 - One with the 7 highest registers (register mask 0xDF80)
18697 This ldm will finally contain between 2 and 7 registers. */
18698 insn_low_registers = insn_all_registers & 0x007F;
18699 insn_high_registers = insn_all_registers & 0xDF80;
18700
18701 /* A spare register may be needed during this veneer to temporarily
18702 handle the base register. This register will be restored with
18703 the last LDM operation.
18704 The usable register may be any general purpose register (that excludes
18705 PC, SP, LR : register mask is 0x1FFF). */
18706 usable_register_mask = 0x1FFF;
18707
18708 /* Generate the stub function. */
18709 if (!wback && !restore_pc && !restore_rn)
18710 {
18711 /* Choose a Ri in the low-register-list that will be restored. */
18712 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18713
18714 /* MOV Ri, Rn. */
18715 current_stub_contents =
18716 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18717 create_instruction_mov (ri, rn));
18718
18719 /* LDMDB Ri!, {R-high-register-list}. */
18720 current_stub_contents =
18721 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18722 create_instruction_ldmdb
18723 (ri, /*wback=*/1, insn_high_registers));
18724
18725 /* LDMDB Ri, {R-low-register-list}. */
18726 current_stub_contents =
18727 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18728 create_instruction_ldmdb
18729 (ri, /*wback=*/0, insn_low_registers));
18730
18731 /* B initial_insn_addr+4. */
18732 current_stub_contents =
18733 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18734 create_instruction_branch_absolute
18735 (initial_insn_addr - current_stub_contents));
18736 }
18737 else if (wback && !restore_pc && !restore_rn)
18738 {
18739 /* LDMDB Rn!, {R-high-register-list}. */
18740 current_stub_contents =
18741 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18742 create_instruction_ldmdb
18743 (rn, /*wback=*/1, insn_high_registers));
18744
18745 /* LDMDB Rn!, {R-low-register-list}. */
18746 current_stub_contents =
18747 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18748 create_instruction_ldmdb
18749 (rn, /*wback=*/1, insn_low_registers));
18750
18751 /* B initial_insn_addr+4. */
18752 current_stub_contents =
18753 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18754 create_instruction_branch_absolute
18755 (initial_insn_addr - current_stub_contents));
18756 }
18757 else if (!wback && restore_pc && !restore_rn)
18758 {
18759 /* Choose a Ri in the high-register-list that will be restored. */
18760 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18761
18762 /* SUB Ri, Rn, #(4*nb_registers). */
18763 current_stub_contents =
18764 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18765 create_instruction_sub (ri, rn, (4 * nb_registers)));
18766
18767 /* LDMIA Ri!, {R-low-register-list}. */
18768 current_stub_contents =
18769 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18770 create_instruction_ldmia
18771 (ri, /*wback=*/1, insn_low_registers));
18772
18773 /* LDMIA Ri, {R-high-register-list}. */
18774 current_stub_contents =
18775 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18776 create_instruction_ldmia
18777 (ri, /*wback=*/0, insn_high_registers));
18778 }
18779 else if (wback && restore_pc && !restore_rn)
18780 {
18781 /* Choose a Ri in the high-register-list that will be restored. */
18782 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18783
18784 /* SUB Rn, Rn, #(4*nb_registers) */
18785 current_stub_contents =
18786 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18787 create_instruction_sub (rn, rn, (4 * nb_registers)));
18788
18789 /* MOV Ri, Rn. */
18790 current_stub_contents =
18791 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18792 create_instruction_mov (ri, rn));
18793
18794 /* LDMIA Ri!, {R-low-register-list}. */
18795 current_stub_contents =
18796 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18797 create_instruction_ldmia
18798 (ri, /*wback=*/1, insn_low_registers));
18799
18800 /* LDMIA Ri, {R-high-register-list}. */
18801 current_stub_contents =
18802 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18803 create_instruction_ldmia
18804 (ri, /*wback=*/0, insn_high_registers));
18805 }
18806 else if (!wback && !restore_pc && restore_rn)
18807 {
18808 ri = rn;
18809 if (!(insn_low_registers & (1 << rn)))
18810 {
18811 /* Choose a Ri in the low-register-list that will be restored. */
18812 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18813
18814 /* MOV Ri, Rn. */
18815 current_stub_contents =
18816 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18817 create_instruction_mov (ri, rn));
18818 }
18819
18820 /* LDMDB Ri!, {R-high-register-list}. */
18821 current_stub_contents =
18822 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18823 create_instruction_ldmdb
18824 (ri, /*wback=*/1, insn_high_registers));
18825
18826 /* LDMDB Ri, {R-low-register-list}. */
18827 current_stub_contents =
18828 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18829 create_instruction_ldmdb
18830 (ri, /*wback=*/0, insn_low_registers));
18831
18832 /* B initial_insn_addr+4. */
18833 current_stub_contents =
18834 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18835 create_instruction_branch_absolute
18836 (initial_insn_addr - current_stub_contents));
18837 }
18838 else if (!wback && restore_pc && restore_rn)
18839 {
18840 ri = rn;
18841 if (!(insn_high_registers & (1 << rn)))
18842 {
18843 /* Choose a Ri in the high-register-list that will be restored. */
18844 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18845 }
18846
18847 /* SUB Ri, Rn, #(4*nb_registers). */
18848 current_stub_contents =
18849 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18850 create_instruction_sub (ri, rn, (4 * nb_registers)));
18851
18852 /* LDMIA Ri!, {R-low-register-list}. */
18853 current_stub_contents =
18854 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18855 create_instruction_ldmia
18856 (ri, /*wback=*/1, insn_low_registers));
18857
18858 /* LDMIA Ri, {R-high-register-list}. */
18859 current_stub_contents =
18860 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18861 create_instruction_ldmia
18862 (ri, /*wback=*/0, insn_high_registers));
18863 }
18864 else if (wback && restore_rn)
18865 {
18866 /* The assembler should not have accepted to encode this. */
18867 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18868 "undefined behavior.\n");
18869 }
18870
18871 /* Fill the remaining of the stub with deterministic contents. */
18872 current_stub_contents =
18873 stm32l4xx_fill_stub_udf (htab, output_bfd,
18874 base_stub_contents, current_stub_contents,
18875 base_stub_contents +
18876 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18877
18878 }
18879
18880 static void
18881 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18882 bfd * output_bfd,
18883 const insn32 initial_insn,
18884 const bfd_byte *const initial_insn_addr,
18885 bfd_byte *const base_stub_contents)
18886 {
18887 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18888 bfd_byte *current_stub_contents = base_stub_contents;
18889
18890 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18891
18892 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18893 smaller than 8 words load sequences that do not cause the
18894 hardware issue. */
18895 if (num_words <= 8)
18896 {
18897 /* Untouched instruction. */
18898 current_stub_contents =
18899 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18900 initial_insn);
18901
18902 /* B initial_insn_addr+4. */
18903 current_stub_contents =
18904 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18905 create_instruction_branch_absolute
18906 (initial_insn_addr - current_stub_contents));
18907 }
18908 else
18909 {
18910 bfd_boolean is_dp = /* DP encoding. */
18911 (initial_insn & 0xfe100f00) == 0xec100b00;
18912 bfd_boolean is_ia_nobang = /* (IA without !). */
18913 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18914 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18915 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18916 bfd_boolean is_db_bang = /* (DB with !). */
18917 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18918 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18919 /* d = UInt (Vd:D);. */
18920 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18921 | (((unsigned int)initial_insn << 9) >> 31);
18922
18923 /* Compute the number of 8-words chunks needed to split. */
18924 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18925 int chunk;
18926
18927 /* The test coverage has been done assuming the following
18928 hypothesis that exactly one of the previous is_ predicates is
18929 true. */
18930 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18931 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18932
18933 /* We treat the cutting of the words in one pass for all
18934 cases, then we emit the adjustments:
18935
18936 vldm rx, {...}
18937 -> vldm rx!, {8_words_or_less} for each needed 8_word
18938 -> sub rx, rx, #size (list)
18939
18940 vldm rx!, {...}
18941 -> vldm rx!, {8_words_or_less} for each needed 8_word
18942 This also handles vpop instruction (when rx is sp)
18943
18944 vldmd rx!, {...}
18945 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18946 for (chunk = 0; chunk < chunks; ++chunk)
18947 {
18948 bfd_vma new_insn = 0;
18949
18950 if (is_ia_nobang || is_ia_bang)
18951 {
18952 new_insn = create_instruction_vldmia
18953 (base_reg,
18954 is_dp,
18955 /*wback= . */1,
18956 chunks - (chunk + 1) ?
18957 8 : num_words - chunk * 8,
18958 first_reg + chunk * 8);
18959 }
18960 else if (is_db_bang)
18961 {
18962 new_insn = create_instruction_vldmdb
18963 (base_reg,
18964 is_dp,
18965 chunks - (chunk + 1) ?
18966 8 : num_words - chunk * 8,
18967 first_reg + chunk * 8);
18968 }
18969
18970 if (new_insn)
18971 current_stub_contents =
18972 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18973 new_insn);
18974 }
18975
18976 /* Only this case requires the base register compensation
18977 subtract. */
18978 if (is_ia_nobang)
18979 {
18980 current_stub_contents =
18981 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18982 create_instruction_sub
18983 (base_reg, base_reg, 4*num_words));
18984 }
18985
18986 /* B initial_insn_addr+4. */
18987 current_stub_contents =
18988 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18989 create_instruction_branch_absolute
18990 (initial_insn_addr - current_stub_contents));
18991 }
18992
18993 /* Fill the remaining of the stub with deterministic contents. */
18994 current_stub_contents =
18995 stm32l4xx_fill_stub_udf (htab, output_bfd,
18996 base_stub_contents, current_stub_contents,
18997 base_stub_contents +
18998 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18999 }
19000
19001 static void
19002 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19003 bfd * output_bfd,
19004 const insn32 wrong_insn,
19005 const bfd_byte *const wrong_insn_addr,
19006 bfd_byte *const stub_contents)
19007 {
19008 if (is_thumb2_ldmia (wrong_insn))
19009 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19010 wrong_insn, wrong_insn_addr,
19011 stub_contents);
19012 else if (is_thumb2_ldmdb (wrong_insn))
19013 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19014 wrong_insn, wrong_insn_addr,
19015 stub_contents);
19016 else if (is_thumb2_vldm (wrong_insn))
19017 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19018 wrong_insn, wrong_insn_addr,
19019 stub_contents);
19020 }
19021
19022 /* End of stm32l4xx work-around. */
19023
19024
19025 /* Do code byteswapping. Return FALSE afterwards so that the section is
19026 written out as normal. */
19027
19028 static bfd_boolean
19029 elf32_arm_write_section (bfd *output_bfd,
19030 struct bfd_link_info *link_info,
19031 asection *sec,
19032 bfd_byte *contents)
19033 {
19034 unsigned int mapcount, errcount;
19035 _arm_elf_section_data *arm_data;
19036 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19037 elf32_arm_section_map *map;
19038 elf32_vfp11_erratum_list *errnode;
19039 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19040 bfd_vma ptr;
19041 bfd_vma end;
19042 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19043 bfd_byte tmp;
19044 unsigned int i;
19045
19046 if (globals == NULL)
19047 return FALSE;
19048
19049 /* If this section has not been allocated an _arm_elf_section_data
19050 structure then we cannot record anything. */
19051 arm_data = get_arm_elf_section_data (sec);
19052 if (arm_data == NULL)
19053 return FALSE;
19054
19055 mapcount = arm_data->mapcount;
19056 map = arm_data->map;
19057 errcount = arm_data->erratumcount;
19058
19059 if (errcount != 0)
19060 {
19061 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19062
19063 for (errnode = arm_data->erratumlist; errnode != 0;
19064 errnode = errnode->next)
19065 {
19066 bfd_vma target = errnode->vma - offset;
19067
19068 switch (errnode->type)
19069 {
19070 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19071 {
19072 bfd_vma branch_to_veneer;
19073 /* Original condition code of instruction, plus bit mask for
19074 ARM B instruction. */
19075 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19076 | 0x0a000000;
19077
19078 /* The instruction is before the label. */
19079 target -= 4;
19080
19081 /* Above offset included in -4 below. */
19082 branch_to_veneer = errnode->u.b.veneer->vma
19083 - errnode->vma - 4;
19084
19085 if ((signed) branch_to_veneer < -(1 << 25)
19086 || (signed) branch_to_veneer >= (1 << 25))
19087 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19088 "range"), output_bfd);
19089
19090 insn |= (branch_to_veneer >> 2) & 0xffffff;
19091 contents[endianflip ^ target] = insn & 0xff;
19092 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19093 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19094 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19095 }
19096 break;
19097
19098 case VFP11_ERRATUM_ARM_VENEER:
19099 {
19100 bfd_vma branch_from_veneer;
19101 unsigned int insn;
19102
19103 /* Take size of veneer into account. */
19104 branch_from_veneer = errnode->u.v.branch->vma
19105 - errnode->vma - 12;
19106
19107 if ((signed) branch_from_veneer < -(1 << 25)
19108 || (signed) branch_from_veneer >= (1 << 25))
19109 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19110 "range"), output_bfd);
19111
19112 /* Original instruction. */
19113 insn = errnode->u.v.branch->u.b.vfp_insn;
19114 contents[endianflip ^ target] = insn & 0xff;
19115 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19116 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19117 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19118
19119 /* Branch back to insn after original insn. */
19120 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19121 contents[endianflip ^ (target + 4)] = insn & 0xff;
19122 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19123 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19124 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19125 }
19126 break;
19127
19128 default:
19129 abort ();
19130 }
19131 }
19132 }
19133
19134 if (arm_data->stm32l4xx_erratumcount != 0)
19135 {
19136 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19137 stm32l4xx_errnode != 0;
19138 stm32l4xx_errnode = stm32l4xx_errnode->next)
19139 {
19140 bfd_vma target = stm32l4xx_errnode->vma - offset;
19141
19142 switch (stm32l4xx_errnode->type)
19143 {
19144 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19145 {
19146 unsigned int insn;
19147 bfd_vma branch_to_veneer =
19148 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19149
19150 if ((signed) branch_to_veneer < -(1 << 24)
19151 || (signed) branch_to_veneer >= (1 << 24))
19152 {
19153 bfd_vma out_of_range =
19154 ((signed) branch_to_veneer < -(1 << 24)) ?
19155 - branch_to_veneer - (1 << 24) :
19156 ((signed) branch_to_veneer >= (1 << 24)) ?
19157 branch_to_veneer - (1 << 24) : 0;
19158
19159 _bfd_error_handler
19160 (_("%pB(%#" PRIx64 "): error: "
19161 "cannot create STM32L4XX veneer; "
19162 "jump out of range by %" PRId64 " bytes; "
19163 "cannot encode branch instruction"),
19164 output_bfd,
19165 (uint64_t) (stm32l4xx_errnode->vma - 4),
19166 (int64_t) out_of_range);
19167 continue;
19168 }
19169
19170 insn = create_instruction_branch_absolute
19171 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19172
19173 /* The instruction is before the label. */
19174 target -= 4;
19175
19176 put_thumb2_insn (globals, output_bfd,
19177 (bfd_vma) insn, contents + target);
19178 }
19179 break;
19180
19181 case STM32L4XX_ERRATUM_VENEER:
19182 {
19183 bfd_byte * veneer;
19184 bfd_byte * veneer_r;
19185 unsigned int insn;
19186
19187 veneer = contents + target;
19188 veneer_r = veneer
19189 + stm32l4xx_errnode->u.b.veneer->vma
19190 - stm32l4xx_errnode->vma - 4;
19191
19192 if ((signed) (veneer_r - veneer -
19193 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19194 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19195 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19196 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19197 || (signed) (veneer_r - veneer) >= (1 << 24))
19198 {
19199 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19200 "veneer"), output_bfd);
19201 continue;
19202 }
19203
19204 /* Original instruction. */
19205 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19206
19207 stm32l4xx_create_replacing_stub
19208 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19209 }
19210 break;
19211
19212 default:
19213 abort ();
19214 }
19215 }
19216 }
19217
19218 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19219 {
19220 arm_unwind_table_edit *edit_node
19221 = arm_data->u.exidx.unwind_edit_list;
19222 /* Now, sec->size is the size of the section we will write. The original
19223 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19224 markers) was sec->rawsize. (This isn't the case if we perform no
19225 edits, then rawsize will be zero and we should use size). */
19226 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19227 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19228 unsigned int in_index, out_index;
19229 bfd_vma add_to_offsets = 0;
19230
19231 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19232 {
19233 if (edit_node)
19234 {
19235 unsigned int edit_index = edit_node->index;
19236
19237 if (in_index < edit_index && in_index * 8 < input_size)
19238 {
19239 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19240 contents + in_index * 8, add_to_offsets);
19241 out_index++;
19242 in_index++;
19243 }
19244 else if (in_index == edit_index
19245 || (in_index * 8 >= input_size
19246 && edit_index == UINT_MAX))
19247 {
19248 switch (edit_node->type)
19249 {
19250 case DELETE_EXIDX_ENTRY:
19251 in_index++;
19252 add_to_offsets += 8;
19253 break;
19254
19255 case INSERT_EXIDX_CANTUNWIND_AT_END:
19256 {
19257 asection *text_sec = edit_node->linked_section;
19258 bfd_vma text_offset = text_sec->output_section->vma
19259 + text_sec->output_offset
19260 + text_sec->size;
19261 bfd_vma exidx_offset = offset + out_index * 8;
19262 unsigned long prel31_offset;
19263
19264 /* Note: this is meant to be equivalent to an
19265 R_ARM_PREL31 relocation. These synthetic
19266 EXIDX_CANTUNWIND markers are not relocated by the
19267 usual BFD method. */
19268 prel31_offset = (text_offset - exidx_offset)
19269 & 0x7ffffffful;
19270 if (bfd_link_relocatable (link_info))
19271 {
19272 /* Here relocation for new EXIDX_CANTUNWIND is
19273 created, so there is no need to
19274 adjust offset by hand. */
19275 prel31_offset = text_sec->output_offset
19276 + text_sec->size;
19277 }
19278
19279 /* First address we can't unwind. */
19280 bfd_put_32 (output_bfd, prel31_offset,
19281 &edited_contents[out_index * 8]);
19282
19283 /* Code for EXIDX_CANTUNWIND. */
19284 bfd_put_32 (output_bfd, 0x1,
19285 &edited_contents[out_index * 8 + 4]);
19286
19287 out_index++;
19288 add_to_offsets -= 8;
19289 }
19290 break;
19291 }
19292
19293 edit_node = edit_node->next;
19294 }
19295 }
19296 else
19297 {
19298 /* No more edits, copy remaining entries verbatim. */
19299 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19300 contents + in_index * 8, add_to_offsets);
19301 out_index++;
19302 in_index++;
19303 }
19304 }
19305
19306 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19307 bfd_set_section_contents (output_bfd, sec->output_section,
19308 edited_contents,
19309 (file_ptr) sec->output_offset, sec->size);
19310
19311 return TRUE;
19312 }
19313
19314 /* Fix code to point to Cortex-A8 erratum stubs. */
19315 if (globals->fix_cortex_a8)
19316 {
19317 struct a8_branch_to_stub_data data;
19318
19319 data.writing_section = sec;
19320 data.contents = contents;
19321
19322 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19323 & data);
19324 }
19325
19326 if (mapcount == 0)
19327 return FALSE;
19328
19329 if (globals->byteswap_code)
19330 {
19331 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19332
19333 ptr = map[0].vma;
19334 for (i = 0; i < mapcount; i++)
19335 {
19336 if (i == mapcount - 1)
19337 end = sec->size;
19338 else
19339 end = map[i + 1].vma;
19340
19341 switch (map[i].type)
19342 {
19343 case 'a':
19344 /* Byte swap code words. */
19345 while (ptr + 3 < end)
19346 {
19347 tmp = contents[ptr];
19348 contents[ptr] = contents[ptr + 3];
19349 contents[ptr + 3] = tmp;
19350 tmp = contents[ptr + 1];
19351 contents[ptr + 1] = contents[ptr + 2];
19352 contents[ptr + 2] = tmp;
19353 ptr += 4;
19354 }
19355 break;
19356
19357 case 't':
19358 /* Byte swap code halfwords. */
19359 while (ptr + 1 < end)
19360 {
19361 tmp = contents[ptr];
19362 contents[ptr] = contents[ptr + 1];
19363 contents[ptr + 1] = tmp;
19364 ptr += 2;
19365 }
19366 break;
19367
19368 case 'd':
19369 /* Leave data alone. */
19370 break;
19371 }
19372 ptr = end;
19373 }
19374 }
19375
19376 free (map);
19377 arm_data->mapcount = -1;
19378 arm_data->mapsize = 0;
19379 arm_data->map = NULL;
19380
19381 return FALSE;
19382 }
19383
19384 /* Mangle thumb function symbols as we read them in. */
19385
19386 static bfd_boolean
19387 elf32_arm_swap_symbol_in (bfd * abfd,
19388 const void *psrc,
19389 const void *pshn,
19390 Elf_Internal_Sym *dst)
19391 {
19392 Elf_Internal_Shdr *symtab_hdr;
19393 const char *name = NULL;
19394
19395 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19396 return FALSE;
19397 dst->st_target_internal = 0;
19398
19399 /* New EABI objects mark thumb function symbols by setting the low bit of
19400 the address. */
19401 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19402 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19403 {
19404 if (dst->st_value & 1)
19405 {
19406 dst->st_value &= ~(bfd_vma) 1;
19407 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19408 ST_BRANCH_TO_THUMB);
19409 }
19410 else
19411 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19412 }
19413 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19414 {
19415 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19416 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19417 }
19418 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19419 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19420 else
19421 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19422
19423 /* Mark CMSE special symbols. */
19424 symtab_hdr = & elf_symtab_hdr (abfd);
19425 if (symtab_hdr->sh_size)
19426 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
19427 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
19428 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
19429
19430 return TRUE;
19431 }
19432
19433
19434 /* Mangle thumb function symbols as we write them out. */
19435
19436 static void
19437 elf32_arm_swap_symbol_out (bfd *abfd,
19438 const Elf_Internal_Sym *src,
19439 void *cdst,
19440 void *shndx)
19441 {
19442 Elf_Internal_Sym newsym;
19443
19444 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19445 of the address set, as per the new EABI. We do this unconditionally
19446 because objcopy does not set the elf header flags until after
19447 it writes out the symbol table. */
19448 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19449 {
19450 newsym = *src;
19451 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19452 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19453 if (newsym.st_shndx != SHN_UNDEF)
19454 {
19455 /* Do this only for defined symbols. At link type, the static
19456 linker will simulate the work of dynamic linker of resolving
19457 symbols and will carry over the thumbness of found symbols to
19458 the output symbol table. It's not clear how it happens, but
19459 the thumbness of undefined symbols can well be different at
19460 runtime, and writing '1' for them will be confusing for users
19461 and possibly for dynamic linker itself.
19462 */
19463 newsym.st_value |= 1;
19464 }
19465
19466 src = &newsym;
19467 }
19468 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19469 }
19470
19471 /* Add the PT_ARM_EXIDX program header. */
19472
19473 static bfd_boolean
19474 elf32_arm_modify_segment_map (bfd *abfd,
19475 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19476 {
19477 struct elf_segment_map *m;
19478 asection *sec;
19479
19480 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19481 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19482 {
19483 /* If there is already a PT_ARM_EXIDX header, then we do not
19484 want to add another one. This situation arises when running
19485 "strip"; the input binary already has the header. */
19486 m = elf_seg_map (abfd);
19487 while (m && m->p_type != PT_ARM_EXIDX)
19488 m = m->next;
19489 if (!m)
19490 {
19491 m = (struct elf_segment_map *)
19492 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19493 if (m == NULL)
19494 return FALSE;
19495 m->p_type = PT_ARM_EXIDX;
19496 m->count = 1;
19497 m->sections[0] = sec;
19498
19499 m->next = elf_seg_map (abfd);
19500 elf_seg_map (abfd) = m;
19501 }
19502 }
19503
19504 return TRUE;
19505 }
19506
19507 /* We may add a PT_ARM_EXIDX program header. */
19508
19509 static int
19510 elf32_arm_additional_program_headers (bfd *abfd,
19511 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19512 {
19513 asection *sec;
19514
19515 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19516 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19517 return 1;
19518 else
19519 return 0;
19520 }
19521
19522 /* Hook called by the linker routine which adds symbols from an object
19523 file. */
19524
19525 static bfd_boolean
19526 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19527 Elf_Internal_Sym *sym, const char **namep,
19528 flagword *flagsp, asection **secp, bfd_vma *valp)
19529 {
19530 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
19531 && (abfd->flags & DYNAMIC) == 0
19532 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
19533 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
19534
19535 if (elf32_arm_hash_table (info) == NULL)
19536 return FALSE;
19537
19538 if (elf32_arm_hash_table (info)->vxworks_p
19539 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19540 flagsp, secp, valp))
19541 return FALSE;
19542
19543 return TRUE;
19544 }
19545
19546 /* We use this to override swap_symbol_in and swap_symbol_out. */
19547 const struct elf_size_info elf32_arm_size_info =
19548 {
19549 sizeof (Elf32_External_Ehdr),
19550 sizeof (Elf32_External_Phdr),
19551 sizeof (Elf32_External_Shdr),
19552 sizeof (Elf32_External_Rel),
19553 sizeof (Elf32_External_Rela),
19554 sizeof (Elf32_External_Sym),
19555 sizeof (Elf32_External_Dyn),
19556 sizeof (Elf_External_Note),
19557 4,
19558 1,
19559 32, 2,
19560 ELFCLASS32, EV_CURRENT,
19561 bfd_elf32_write_out_phdrs,
19562 bfd_elf32_write_shdrs_and_ehdr,
19563 bfd_elf32_checksum_contents,
19564 bfd_elf32_write_relocs,
19565 elf32_arm_swap_symbol_in,
19566 elf32_arm_swap_symbol_out,
19567 bfd_elf32_slurp_reloc_table,
19568 bfd_elf32_slurp_symbol_table,
19569 bfd_elf32_swap_dyn_in,
19570 bfd_elf32_swap_dyn_out,
19571 bfd_elf32_swap_reloc_in,
19572 bfd_elf32_swap_reloc_out,
19573 bfd_elf32_swap_reloca_in,
19574 bfd_elf32_swap_reloca_out
19575 };
19576
19577 static bfd_vma
19578 read_code32 (const bfd *abfd, const bfd_byte *addr)
19579 {
19580 /* V7 BE8 code is always little endian. */
19581 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19582 return bfd_getl32 (addr);
19583
19584 return bfd_get_32 (abfd, addr);
19585 }
19586
19587 static bfd_vma
19588 read_code16 (const bfd *abfd, const bfd_byte *addr)
19589 {
19590 /* V7 BE8 code is always little endian. */
19591 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19592 return bfd_getl16 (addr);
19593
19594 return bfd_get_16 (abfd, addr);
19595 }
19596
19597 /* Return size of plt0 entry starting at ADDR
19598 or (bfd_vma) -1 if size can not be determined. */
19599
19600 static bfd_vma
19601 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19602 {
19603 bfd_vma first_word;
19604 bfd_vma plt0_size;
19605
19606 first_word = read_code32 (abfd, addr);
19607
19608 if (first_word == elf32_arm_plt0_entry[0])
19609 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19610 else if (first_word == elf32_thumb2_plt0_entry[0])
19611 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19612 else
19613 /* We don't yet handle this PLT format. */
19614 return (bfd_vma) -1;
19615
19616 return plt0_size;
19617 }
19618
19619 /* Return size of plt entry starting at offset OFFSET
19620 of plt section located at address START
19621 or (bfd_vma) -1 if size can not be determined. */
19622
19623 static bfd_vma
19624 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19625 {
19626 bfd_vma first_insn;
19627 bfd_vma plt_size = 0;
19628 const bfd_byte *addr = start + offset;
19629
19630 /* PLT entry size if fixed on Thumb-only platforms. */
19631 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19632 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19633
19634 /* Respect Thumb stub if necessary. */
19635 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19636 {
19637 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19638 }
19639
19640 /* Strip immediate from first add. */
19641 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19642
19643 #ifdef FOUR_WORD_PLT
19644 if (first_insn == elf32_arm_plt_entry[0])
19645 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19646 #else
19647 if (first_insn == elf32_arm_plt_entry_long[0])
19648 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19649 else if (first_insn == elf32_arm_plt_entry_short[0])
19650 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19651 #endif
19652 else
19653 /* We don't yet handle this PLT format. */
19654 return (bfd_vma) -1;
19655
19656 return plt_size;
19657 }
19658
19659 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19660
19661 static long
19662 elf32_arm_get_synthetic_symtab (bfd *abfd,
19663 long symcount ATTRIBUTE_UNUSED,
19664 asymbol **syms ATTRIBUTE_UNUSED,
19665 long dynsymcount,
19666 asymbol **dynsyms,
19667 asymbol **ret)
19668 {
19669 asection *relplt;
19670 asymbol *s;
19671 arelent *p;
19672 long count, i, n;
19673 size_t size;
19674 Elf_Internal_Shdr *hdr;
19675 char *names;
19676 asection *plt;
19677 bfd_vma offset;
19678 bfd_byte *data;
19679
19680 *ret = NULL;
19681
19682 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19683 return 0;
19684
19685 if (dynsymcount <= 0)
19686 return 0;
19687
19688 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19689 if (relplt == NULL)
19690 return 0;
19691
19692 hdr = &elf_section_data (relplt)->this_hdr;
19693 if (hdr->sh_link != elf_dynsymtab (abfd)
19694 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19695 return 0;
19696
19697 plt = bfd_get_section_by_name (abfd, ".plt");
19698 if (plt == NULL)
19699 return 0;
19700
19701 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19702 return -1;
19703
19704 data = plt->contents;
19705 if (data == NULL)
19706 {
19707 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19708 return -1;
19709 bfd_cache_section_contents((asection *) plt, data);
19710 }
19711
19712 count = relplt->size / hdr->sh_entsize;
19713 size = count * sizeof (asymbol);
19714 p = relplt->relocation;
19715 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19716 {
19717 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19718 if (p->addend != 0)
19719 size += sizeof ("+0x") - 1 + 8;
19720 }
19721
19722 s = *ret = (asymbol *) bfd_malloc (size);
19723 if (s == NULL)
19724 return -1;
19725
19726 offset = elf32_arm_plt0_size (abfd, data);
19727 if (offset == (bfd_vma) -1)
19728 return -1;
19729
19730 names = (char *) (s + count);
19731 p = relplt->relocation;
19732 n = 0;
19733 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19734 {
19735 size_t len;
19736
19737 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19738 if (plt_size == (bfd_vma) -1)
19739 break;
19740
19741 *s = **p->sym_ptr_ptr;
19742 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19743 we are defining a symbol, ensure one of them is set. */
19744 if ((s->flags & BSF_LOCAL) == 0)
19745 s->flags |= BSF_GLOBAL;
19746 s->flags |= BSF_SYNTHETIC;
19747 s->section = plt;
19748 s->value = offset;
19749 s->name = names;
19750 s->udata.p = NULL;
19751 len = strlen ((*p->sym_ptr_ptr)->name);
19752 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19753 names += len;
19754 if (p->addend != 0)
19755 {
19756 char buf[30], *a;
19757
19758 memcpy (names, "+0x", sizeof ("+0x") - 1);
19759 names += sizeof ("+0x") - 1;
19760 bfd_sprintf_vma (abfd, buf, p->addend);
19761 for (a = buf; *a == '0'; ++a)
19762 ;
19763 len = strlen (a);
19764 memcpy (names, a, len);
19765 names += len;
19766 }
19767 memcpy (names, "@plt", sizeof ("@plt"));
19768 names += sizeof ("@plt");
19769 ++s, ++n;
19770 offset += plt_size;
19771 }
19772
19773 return n;
19774 }
19775
19776 static bfd_boolean
19777 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19778 {
19779 if (hdr->sh_flags & SHF_ARM_PURECODE)
19780 *flags |= SEC_ELF_PURECODE;
19781 return TRUE;
19782 }
19783
19784 static flagword
19785 elf32_arm_lookup_section_flags (char *flag_name)
19786 {
19787 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19788 return SHF_ARM_PURECODE;
19789
19790 return SEC_NO_FLAGS;
19791 }
19792
19793 static unsigned int
19794 elf32_arm_count_additional_relocs (asection *sec)
19795 {
19796 struct _arm_elf_section_data *arm_data;
19797 arm_data = get_arm_elf_section_data (sec);
19798
19799 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19800 }
19801
19802 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19803 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19804 FALSE otherwise. ISECTION is the best guess matching section from the
19805 input bfd IBFD, but it might be NULL. */
19806
19807 static bfd_boolean
19808 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19809 bfd *obfd ATTRIBUTE_UNUSED,
19810 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19811 Elf_Internal_Shdr *osection)
19812 {
19813 switch (osection->sh_type)
19814 {
19815 case SHT_ARM_EXIDX:
19816 {
19817 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19818 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19819 unsigned i = 0;
19820
19821 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19822 osection->sh_info = 0;
19823
19824 /* The sh_link field must be set to the text section associated with
19825 this index section. Unfortunately the ARM EHABI does not specify
19826 exactly how to determine this association. Our caller does try
19827 to match up OSECTION with its corresponding input section however
19828 so that is a good first guess. */
19829 if (isection != NULL
19830 && osection->bfd_section != NULL
19831 && isection->bfd_section != NULL
19832 && isection->bfd_section->output_section != NULL
19833 && isection->bfd_section->output_section == osection->bfd_section
19834 && iheaders != NULL
19835 && isection->sh_link > 0
19836 && isection->sh_link < elf_numsections (ibfd)
19837 && iheaders[isection->sh_link]->bfd_section != NULL
19838 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19839 )
19840 {
19841 for (i = elf_numsections (obfd); i-- > 0;)
19842 if (oheaders[i]->bfd_section
19843 == iheaders[isection->sh_link]->bfd_section->output_section)
19844 break;
19845 }
19846
19847 if (i == 0)
19848 {
19849 /* Failing that we have to find a matching section ourselves. If
19850 we had the output section name available we could compare that
19851 with input section names. Unfortunately we don't. So instead
19852 we use a simple heuristic and look for the nearest executable
19853 section before this one. */
19854 for (i = elf_numsections (obfd); i-- > 0;)
19855 if (oheaders[i] == osection)
19856 break;
19857 if (i == 0)
19858 break;
19859
19860 while (i-- > 0)
19861 if (oheaders[i]->sh_type == SHT_PROGBITS
19862 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19863 == (SHF_ALLOC | SHF_EXECINSTR))
19864 break;
19865 }
19866
19867 if (i)
19868 {
19869 osection->sh_link = i;
19870 /* If the text section was part of a group
19871 then the index section should be too. */
19872 if (oheaders[i]->sh_flags & SHF_GROUP)
19873 osection->sh_flags |= SHF_GROUP;
19874 return TRUE;
19875 }
19876 }
19877 break;
19878
19879 case SHT_ARM_PREEMPTMAP:
19880 osection->sh_flags = SHF_ALLOC;
19881 break;
19882
19883 case SHT_ARM_ATTRIBUTES:
19884 case SHT_ARM_DEBUGOVERLAY:
19885 case SHT_ARM_OVERLAYSECTION:
19886 default:
19887 break;
19888 }
19889
19890 return FALSE;
19891 }
19892
19893 /* Returns TRUE if NAME is an ARM mapping symbol.
19894 Traditionally the symbols $a, $d and $t have been used.
19895 The ARM ELF standard also defines $x (for A64 code). It also allows a
19896 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19897 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19898 not support them here. $t.x indicates the start of ThumbEE instructions. */
19899
19900 static bfd_boolean
19901 is_arm_mapping_symbol (const char * name)
19902 {
19903 return name != NULL /* Paranoia. */
19904 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19905 the mapping symbols could have acquired a prefix.
19906 We do not support this here, since such symbols no
19907 longer conform to the ARM ELF ABI. */
19908 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19909 && (name[2] == 0 || name[2] == '.');
19910 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19911 any characters that follow the period are legal characters for the body
19912 of a symbol's name. For now we just assume that this is the case. */
19913 }
19914
19915 /* Make sure that mapping symbols in object files are not removed via the
19916 "strip --strip-unneeded" tool. These symbols are needed in order to
19917 correctly generate interworking veneers, and for byte swapping code
19918 regions. Once an object file has been linked, it is safe to remove the
19919 symbols as they will no longer be needed. */
19920
19921 static void
19922 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19923 {
19924 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19925 && sym->section != bfd_abs_section_ptr
19926 && is_arm_mapping_symbol (sym->name))
19927 sym->flags |= BSF_KEEP;
19928 }
19929
19930 #undef elf_backend_copy_special_section_fields
19931 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19932
19933 #define ELF_ARCH bfd_arch_arm
19934 #define ELF_TARGET_ID ARM_ELF_DATA
19935 #define ELF_MACHINE_CODE EM_ARM
19936 #ifdef __QNXTARGET__
19937 #define ELF_MAXPAGESIZE 0x1000
19938 #else
19939 #define ELF_MAXPAGESIZE 0x10000
19940 #endif
19941 #define ELF_MINPAGESIZE 0x1000
19942 #define ELF_COMMONPAGESIZE 0x1000
19943
19944 #define bfd_elf32_mkobject elf32_arm_mkobject
19945
19946 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19947 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19948 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19949 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19950 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19951 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19952 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19953 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19954 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19955 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19956 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19957 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19958 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19959
19960 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19961 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19962 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19963 #define elf_backend_check_relocs elf32_arm_check_relocs
19964 #define elf_backend_update_relocs elf32_arm_update_relocs
19965 #define elf_backend_relocate_section elf32_arm_relocate_section
19966 #define elf_backend_write_section elf32_arm_write_section
19967 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19968 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19969 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19970 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19971 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19972 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19973 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19974 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19975 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19976 #define elf_backend_object_p elf32_arm_object_p
19977 #define elf_backend_fake_sections elf32_arm_fake_sections
19978 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19979 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19980 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19981 #define elf_backend_size_info elf32_arm_size_info
19982 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19983 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19984 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19985 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19986 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19987 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19988 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19989 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19990
19991 #define elf_backend_can_refcount 1
19992 #define elf_backend_can_gc_sections 1
19993 #define elf_backend_plt_readonly 1
19994 #define elf_backend_want_got_plt 1
19995 #define elf_backend_want_plt_sym 0
19996 #define elf_backend_want_dynrelro 1
19997 #define elf_backend_may_use_rel_p 1
19998 #define elf_backend_may_use_rela_p 0
19999 #define elf_backend_default_use_rela_p 0
20000 #define elf_backend_dtrel_excludes_plt 1
20001
20002 #define elf_backend_got_header_size 12
20003 #define elf_backend_extern_protected_data 1
20004
20005 #undef elf_backend_obj_attrs_vendor
20006 #define elf_backend_obj_attrs_vendor "aeabi"
20007 #undef elf_backend_obj_attrs_section
20008 #define elf_backend_obj_attrs_section ".ARM.attributes"
20009 #undef elf_backend_obj_attrs_arg_type
20010 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20011 #undef elf_backend_obj_attrs_section_type
20012 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20013 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20014 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20015
20016 #undef elf_backend_section_flags
20017 #define elf_backend_section_flags elf32_arm_section_flags
20018 #undef elf_backend_lookup_section_flags_hook
20019 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20020
20021 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20022
20023 #include "elf32-target.h"
20024
20025 /* Native Client targets. */
20026
20027 #undef TARGET_LITTLE_SYM
20028 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20029 #undef TARGET_LITTLE_NAME
20030 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20031 #undef TARGET_BIG_SYM
20032 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20033 #undef TARGET_BIG_NAME
20034 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20035
20036 /* Like elf32_arm_link_hash_table_create -- but overrides
20037 appropriately for NaCl. */
20038
20039 static struct bfd_link_hash_table *
20040 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20041 {
20042 struct bfd_link_hash_table *ret;
20043
20044 ret = elf32_arm_link_hash_table_create (abfd);
20045 if (ret)
20046 {
20047 struct elf32_arm_link_hash_table *htab
20048 = (struct elf32_arm_link_hash_table *) ret;
20049
20050 htab->nacl_p = 1;
20051
20052 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20053 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20054 }
20055 return ret;
20056 }
20057
20058 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20059 really need to use elf32_arm_modify_segment_map. But we do it
20060 anyway just to reduce gratuitous differences with the stock ARM backend. */
20061
20062 static bfd_boolean
20063 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20064 {
20065 return (elf32_arm_modify_segment_map (abfd, info)
20066 && nacl_modify_segment_map (abfd, info));
20067 }
20068
20069 static void
20070 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
20071 {
20072 elf32_arm_final_write_processing (abfd, linker);
20073 nacl_final_write_processing (abfd, linker);
20074 }
20075
20076 static bfd_vma
20077 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20078 const arelent *rel ATTRIBUTE_UNUSED)
20079 {
20080 return plt->vma
20081 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20082 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20083 }
20084
20085 #undef elf32_bed
20086 #define elf32_bed elf32_arm_nacl_bed
20087 #undef bfd_elf32_bfd_link_hash_table_create
20088 #define bfd_elf32_bfd_link_hash_table_create \
20089 elf32_arm_nacl_link_hash_table_create
20090 #undef elf_backend_plt_alignment
20091 #define elf_backend_plt_alignment 4
20092 #undef elf_backend_modify_segment_map
20093 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20094 #undef elf_backend_modify_program_headers
20095 #define elf_backend_modify_program_headers nacl_modify_program_headers
20096 #undef elf_backend_final_write_processing
20097 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20098 #undef bfd_elf32_get_synthetic_symtab
20099 #undef elf_backend_plt_sym_val
20100 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20101 #undef elf_backend_copy_special_section_fields
20102
20103 #undef ELF_MINPAGESIZE
20104 #undef ELF_COMMONPAGESIZE
20105
20106
20107 #include "elf32-target.h"
20108
20109 /* Reset to defaults. */
20110 #undef elf_backend_plt_alignment
20111 #undef elf_backend_modify_segment_map
20112 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20113 #undef elf_backend_modify_program_headers
20114 #undef elf_backend_final_write_processing
20115 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20116 #undef ELF_MINPAGESIZE
20117 #define ELF_MINPAGESIZE 0x1000
20118 #undef ELF_COMMONPAGESIZE
20119 #define ELF_COMMONPAGESIZE 0x1000
20120
20121
20122 /* FDPIC Targets. */
20123
20124 #undef TARGET_LITTLE_SYM
20125 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20126 #undef TARGET_LITTLE_NAME
20127 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20128 #undef TARGET_BIG_SYM
20129 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20130 #undef TARGET_BIG_NAME
20131 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20132 #undef elf_match_priority
20133 #define elf_match_priority 128
20134 #undef ELF_OSABI
20135 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20136
20137 /* Like elf32_arm_link_hash_table_create -- but overrides
20138 appropriately for FDPIC. */
20139
20140 static struct bfd_link_hash_table *
20141 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20142 {
20143 struct bfd_link_hash_table *ret;
20144
20145 ret = elf32_arm_link_hash_table_create (abfd);
20146 if (ret)
20147 {
20148 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20149
20150 htab->fdpic_p = 1;
20151 }
20152 return ret;
20153 }
20154
20155 /* We need dynamic symbols for every section, since segments can
20156 relocate independently. */
20157 static bfd_boolean
20158 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20159 struct bfd_link_info *info
20160 ATTRIBUTE_UNUSED,
20161 asection *p ATTRIBUTE_UNUSED)
20162 {
20163 switch (elf_section_data (p)->this_hdr.sh_type)
20164 {
20165 case SHT_PROGBITS:
20166 case SHT_NOBITS:
20167 /* If sh_type is yet undecided, assume it could be
20168 SHT_PROGBITS/SHT_NOBITS. */
20169 case SHT_NULL:
20170 return FALSE;
20171
20172 /* There shouldn't be section relative relocations
20173 against any other section. */
20174 default:
20175 return TRUE;
20176 }
20177 }
20178
20179 #undef elf32_bed
20180 #define elf32_bed elf32_arm_fdpic_bed
20181
20182 #undef bfd_elf32_bfd_link_hash_table_create
20183 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20184
20185 #undef elf_backend_omit_section_dynsym
20186 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20187
20188 #include "elf32-target.h"
20189
20190 #undef elf_match_priority
20191 #undef ELF_OSABI
20192 #undef elf_backend_omit_section_dynsym
20193
20194 /* VxWorks Targets. */
20195
20196 #undef TARGET_LITTLE_SYM
20197 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20198 #undef TARGET_LITTLE_NAME
20199 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20200 #undef TARGET_BIG_SYM
20201 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20202 #undef TARGET_BIG_NAME
20203 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20204
20205 /* Like elf32_arm_link_hash_table_create -- but overrides
20206 appropriately for VxWorks. */
20207
20208 static struct bfd_link_hash_table *
20209 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20210 {
20211 struct bfd_link_hash_table *ret;
20212
20213 ret = elf32_arm_link_hash_table_create (abfd);
20214 if (ret)
20215 {
20216 struct elf32_arm_link_hash_table *htab
20217 = (struct elf32_arm_link_hash_table *) ret;
20218 htab->use_rel = 0;
20219 htab->vxworks_p = 1;
20220 }
20221 return ret;
20222 }
20223
20224 static void
20225 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
20226 {
20227 elf32_arm_final_write_processing (abfd, linker);
20228 elf_vxworks_final_write_processing (abfd, linker);
20229 }
20230
20231 #undef elf32_bed
20232 #define elf32_bed elf32_arm_vxworks_bed
20233
20234 #undef bfd_elf32_bfd_link_hash_table_create
20235 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20236 #undef elf_backend_final_write_processing
20237 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20238 #undef elf_backend_emit_relocs
20239 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20240
20241 #undef elf_backend_may_use_rel_p
20242 #define elf_backend_may_use_rel_p 0
20243 #undef elf_backend_may_use_rela_p
20244 #define elf_backend_may_use_rela_p 1
20245 #undef elf_backend_default_use_rela_p
20246 #define elf_backend_default_use_rela_p 1
20247 #undef elf_backend_want_plt_sym
20248 #define elf_backend_want_plt_sym 1
20249 #undef ELF_MAXPAGESIZE
20250 #define ELF_MAXPAGESIZE 0x1000
20251
20252 #include "elf32-target.h"
20253
20254
20255 /* Merge backend specific data from an object file to the output
20256 object file when linking. */
20257
20258 static bfd_boolean
20259 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20260 {
20261 bfd *obfd = info->output_bfd;
20262 flagword out_flags;
20263 flagword in_flags;
20264 bfd_boolean flags_compatible = TRUE;
20265 asection *sec;
20266
20267 /* Check if we have the same endianness. */
20268 if (! _bfd_generic_verify_endian_match (ibfd, info))
20269 return FALSE;
20270
20271 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20272 return TRUE;
20273
20274 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20275 return FALSE;
20276
20277 /* The input BFD must have had its flags initialised. */
20278 /* The following seems bogus to me -- The flags are initialized in
20279 the assembler but I don't think an elf_flags_init field is
20280 written into the object. */
20281 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20282
20283 in_flags = elf_elfheader (ibfd)->e_flags;
20284 out_flags = elf_elfheader (obfd)->e_flags;
20285
20286 /* In theory there is no reason why we couldn't handle this. However
20287 in practice it isn't even close to working and there is no real
20288 reason to want it. */
20289 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20290 && !(ibfd->flags & DYNAMIC)
20291 && (in_flags & EF_ARM_BE8))
20292 {
20293 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20294 ibfd);
20295 return FALSE;
20296 }
20297
20298 if (!elf_flags_init (obfd))
20299 {
20300 /* If the input is the default architecture and had the default
20301 flags then do not bother setting the flags for the output
20302 architecture, instead allow future merges to do this. If no
20303 future merges ever set these flags then they will retain their
20304 uninitialised values, which surprise surprise, correspond
20305 to the default values. */
20306 if (bfd_get_arch_info (ibfd)->the_default
20307 && elf_elfheader (ibfd)->e_flags == 0)
20308 return TRUE;
20309
20310 elf_flags_init (obfd) = TRUE;
20311 elf_elfheader (obfd)->e_flags = in_flags;
20312
20313 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20314 && bfd_get_arch_info (obfd)->the_default)
20315 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20316
20317 return TRUE;
20318 }
20319
20320 /* Determine what should happen if the input ARM architecture
20321 does not match the output ARM architecture. */
20322 if (! bfd_arm_merge_machines (ibfd, obfd))
20323 return FALSE;
20324
20325 /* Identical flags must be compatible. */
20326 if (in_flags == out_flags)
20327 return TRUE;
20328
20329 /* Check to see if the input BFD actually contains any sections. If
20330 not, its flags may not have been initialised either, but it
20331 cannot actually cause any incompatiblity. Do not short-circuit
20332 dynamic objects; their section list may be emptied by
20333 elf_link_add_object_symbols.
20334
20335 Also check to see if there are no code sections in the input.
20336 In this case there is no need to check for code specific flags.
20337 XXX - do we need to worry about floating-point format compatability
20338 in data sections ? */
20339 if (!(ibfd->flags & DYNAMIC))
20340 {
20341 bfd_boolean null_input_bfd = TRUE;
20342 bfd_boolean only_data_sections = TRUE;
20343
20344 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20345 {
20346 /* Ignore synthetic glue sections. */
20347 if (strcmp (sec->name, ".glue_7")
20348 && strcmp (sec->name, ".glue_7t"))
20349 {
20350 if ((bfd_get_section_flags (ibfd, sec)
20351 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20352 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20353 only_data_sections = FALSE;
20354
20355 null_input_bfd = FALSE;
20356 break;
20357 }
20358 }
20359
20360 if (null_input_bfd || only_data_sections)
20361 return TRUE;
20362 }
20363
20364 /* Complain about various flag mismatches. */
20365 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20366 EF_ARM_EABI_VERSION (out_flags)))
20367 {
20368 _bfd_error_handler
20369 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20370 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20371 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20372 return FALSE;
20373 }
20374
20375 /* Not sure what needs to be checked for EABI versions >= 1. */
20376 /* VxWorks libraries do not use these flags. */
20377 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20378 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20379 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20380 {
20381 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20382 {
20383 _bfd_error_handler
20384 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20385 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20386 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20387 flags_compatible = FALSE;
20388 }
20389
20390 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20391 {
20392 if (in_flags & EF_ARM_APCS_FLOAT)
20393 _bfd_error_handler
20394 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20395 ibfd, obfd);
20396 else
20397 _bfd_error_handler
20398 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20399 ibfd, obfd);
20400
20401 flags_compatible = FALSE;
20402 }
20403
20404 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20405 {
20406 if (in_flags & EF_ARM_VFP_FLOAT)
20407 _bfd_error_handler
20408 (_("error: %pB uses %s instructions, whereas %pB does not"),
20409 ibfd, "VFP", obfd);
20410 else
20411 _bfd_error_handler
20412 (_("error: %pB uses %s instructions, whereas %pB does not"),
20413 ibfd, "FPA", obfd);
20414
20415 flags_compatible = FALSE;
20416 }
20417
20418 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20419 {
20420 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20421 _bfd_error_handler
20422 (_("error: %pB uses %s instructions, whereas %pB does not"),
20423 ibfd, "Maverick", obfd);
20424 else
20425 _bfd_error_handler
20426 (_("error: %pB does not use %s instructions, whereas %pB does"),
20427 ibfd, "Maverick", obfd);
20428
20429 flags_compatible = FALSE;
20430 }
20431
20432 #ifdef EF_ARM_SOFT_FLOAT
20433 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20434 {
20435 /* We can allow interworking between code that is VFP format
20436 layout, and uses either soft float or integer regs for
20437 passing floating point arguments and results. We already
20438 know that the APCS_FLOAT flags match; similarly for VFP
20439 flags. */
20440 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20441 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20442 {
20443 if (in_flags & EF_ARM_SOFT_FLOAT)
20444 _bfd_error_handler
20445 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20446 ibfd, obfd);
20447 else
20448 _bfd_error_handler
20449 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20450 ibfd, obfd);
20451
20452 flags_compatible = FALSE;
20453 }
20454 }
20455 #endif
20456
20457 /* Interworking mismatch is only a warning. */
20458 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20459 {
20460 if (in_flags & EF_ARM_INTERWORK)
20461 {
20462 _bfd_error_handler
20463 (_("warning: %pB supports interworking, whereas %pB does not"),
20464 ibfd, obfd);
20465 }
20466 else
20467 {
20468 _bfd_error_handler
20469 (_("warning: %pB does not support interworking, whereas %pB does"),
20470 ibfd, obfd);
20471 }
20472 }
20473 }
20474
20475 return flags_compatible;
20476 }
20477
20478
20479 /* Symbian OS Targets. */
20480
20481 #undef TARGET_LITTLE_SYM
20482 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20483 #undef TARGET_LITTLE_NAME
20484 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20485 #undef TARGET_BIG_SYM
20486 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20487 #undef TARGET_BIG_NAME
20488 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20489
20490 /* Like elf32_arm_link_hash_table_create -- but overrides
20491 appropriately for Symbian OS. */
20492
20493 static struct bfd_link_hash_table *
20494 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20495 {
20496 struct bfd_link_hash_table *ret;
20497
20498 ret = elf32_arm_link_hash_table_create (abfd);
20499 if (ret)
20500 {
20501 struct elf32_arm_link_hash_table *htab
20502 = (struct elf32_arm_link_hash_table *)ret;
20503 /* There is no PLT header for Symbian OS. */
20504 htab->plt_header_size = 0;
20505 /* The PLT entries are each one instruction and one word. */
20506 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20507 htab->symbian_p = 1;
20508 /* Symbian uses armv5t or above, so use_blx is always true. */
20509 htab->use_blx = 1;
20510 htab->root.is_relocatable_executable = 1;
20511 }
20512 return ret;
20513 }
20514
20515 static const struct bfd_elf_special_section
20516 elf32_arm_symbian_special_sections[] =
20517 {
20518 /* In a BPABI executable, the dynamic linking sections do not go in
20519 the loadable read-only segment. The post-linker may wish to
20520 refer to these sections, but they are not part of the final
20521 program image. */
20522 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20523 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20524 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20525 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20526 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20527 /* These sections do not need to be writable as the SymbianOS
20528 postlinker will arrange things so that no dynamic relocation is
20529 required. */
20530 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20531 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20532 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20533 { NULL, 0, 0, 0, 0 }
20534 };
20535
20536 static void
20537 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20538 struct bfd_link_info *link_info)
20539 {
20540 /* BPABI objects are never loaded directly by an OS kernel; they are
20541 processed by a postlinker first, into an OS-specific format. If
20542 the D_PAGED bit is set on the file, BFD will align segments on
20543 page boundaries, so that an OS can directly map the file. With
20544 BPABI objects, that just results in wasted space. In addition,
20545 because we clear the D_PAGED bit, map_sections_to_segments will
20546 recognize that the program headers should not be mapped into any
20547 loadable segment. */
20548 abfd->flags &= ~D_PAGED;
20549 elf32_arm_begin_write_processing (abfd, link_info);
20550 }
20551
20552 static bfd_boolean
20553 elf32_arm_symbian_modify_segment_map (bfd *abfd,
20554 struct bfd_link_info *info)
20555 {
20556 struct elf_segment_map *m;
20557 asection *dynsec;
20558
20559 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20560 segment. However, because the .dynamic section is not marked
20561 with SEC_LOAD, the generic ELF code will not create such a
20562 segment. */
20563 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
20564 if (dynsec)
20565 {
20566 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
20567 if (m->p_type == PT_DYNAMIC)
20568 break;
20569
20570 if (m == NULL)
20571 {
20572 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
20573 m->next = elf_seg_map (abfd);
20574 elf_seg_map (abfd) = m;
20575 }
20576 }
20577
20578 /* Also call the generic arm routine. */
20579 return elf32_arm_modify_segment_map (abfd, info);
20580 }
20581
20582 /* Return address for Ith PLT stub in section PLT, for relocation REL
20583 or (bfd_vma) -1 if it should not be included. */
20584
20585 static bfd_vma
20586 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
20587 const arelent *rel ATTRIBUTE_UNUSED)
20588 {
20589 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
20590 }
20591
20592 #undef elf32_bed
20593 #define elf32_bed elf32_arm_symbian_bed
20594
20595 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20596 will process them and then discard them. */
20597 #undef ELF_DYNAMIC_SEC_FLAGS
20598 #define ELF_DYNAMIC_SEC_FLAGS \
20599 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20600
20601 #undef elf_backend_emit_relocs
20602
20603 #undef bfd_elf32_bfd_link_hash_table_create
20604 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20605 #undef elf_backend_special_sections
20606 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20607 #undef elf_backend_begin_write_processing
20608 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20609 #undef elf_backend_final_write_processing
20610 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20611
20612 #undef elf_backend_modify_segment_map
20613 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20614
20615 /* There is no .got section for BPABI objects, and hence no header. */
20616 #undef elf_backend_got_header_size
20617 #define elf_backend_got_header_size 0
20618
20619 /* Similarly, there is no .got.plt section. */
20620 #undef elf_backend_want_got_plt
20621 #define elf_backend_want_got_plt 0
20622
20623 #undef elf_backend_plt_sym_val
20624 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
20625
20626 #undef elf_backend_may_use_rel_p
20627 #define elf_backend_may_use_rel_p 1
20628 #undef elf_backend_may_use_rela_p
20629 #define elf_backend_may_use_rela_p 0
20630 #undef elf_backend_default_use_rela_p
20631 #define elf_backend_default_use_rela_p 0
20632 #undef elf_backend_want_plt_sym
20633 #define elf_backend_want_plt_sym 0
20634 #undef elf_backend_dtrel_excludes_plt
20635 #define elf_backend_dtrel_excludes_plt 0
20636 #undef ELF_MAXPAGESIZE
20637 #define ELF_MAXPAGESIZE 0x8000
20638
20639 #include "elf32-target.h"
GDB Binutils - Deliverables
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