1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 NULL
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE
, /* pc_relative. */
1700 complain_overflow_bitfield
,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc
, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE
, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE
), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE
, /* pc_relative. */
1713 complain_overflow_bitfield
,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc
, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE
, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE
), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE
, /* pc_relative. */
1726 complain_overflow_bitfield
,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc
, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE
, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE
), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE
, /* pc_relative. */
1739 complain_overflow_bitfield
,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc
, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE
, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE
), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1751 HOWTO (R_ARM_IRELATIVE
, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE
, /* pc_relative */
1757 complain_overflow_bitfield
,/* complain_on_overflow */
1758 bfd_elf_generic_reloc
, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE
, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE
) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1769 HOWTO (R_ARM_RREL32
, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE
, /* pc_relative */
1775 complain_overflow_dont
,/* complain_on_overflow */
1776 bfd_elf_generic_reloc
, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE
, /* partial_inplace */
1781 FALSE
), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32
, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE
, /* pc_relative */
1789 complain_overflow_dont
,/* complain_on_overflow */
1790 bfd_elf_generic_reloc
, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE
, /* partial_inplace */
1795 FALSE
), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24
, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE
, /* pc_relative */
1803 complain_overflow_dont
,/* complain_on_overflow */
1804 bfd_elf_generic_reloc
, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE
, /* partial_inplace */
1809 FALSE
), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE
, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE
, /* pc_relative */
1817 complain_overflow_dont
,/* complain_on_overflow */
1818 bfd_elf_generic_reloc
, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE
, /* partial_inplace */
1823 FALSE
) /* pcrel_offset */
1826 static reloc_howto_type
*
1827 elf32_arm_howto_from_type (unsigned int r_type
)
1829 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1830 return &elf32_arm_howto_table_1
[r_type
];
1832 if (r_type
== R_ARM_IRELATIVE
)
1833 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1835 if (r_type
>= R_ARM_RREL32
1836 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1837 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1843 elf32_arm_info_to_howto (bfd
* abfd ATTRIBUTE_UNUSED
, arelent
* bfd_reloc
,
1844 Elf_Internal_Rela
* elf_reloc
)
1846 unsigned int r_type
;
1848 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1849 bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val
;
1855 unsigned char elf_reloc_val
;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1861 {BFD_RELOC_NONE
, R_ARM_NONE
},
1862 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1863 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1864 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1865 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1866 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1867 {BFD_RELOC_32
, R_ARM_ABS32
},
1868 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1869 {BFD_RELOC_8
, R_ARM_ABS8
},
1870 {BFD_RELOC_16
, R_ARM_ABS16
},
1871 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1872 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1879 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1880 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1881 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1882 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1883 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1884 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1885 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1886 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1887 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1888 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1889 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1890 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1891 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1892 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1893 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1894 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1895 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1898 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1899 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1900 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1901 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1904 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1905 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1906 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1907 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1908 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1909 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1910 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1911 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1912 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1913 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1914 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1915 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1919 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1921 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1922 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1923 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1924 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1925 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1926 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1927 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1928 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1929 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1930 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1931 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1933 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1935 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1936 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1937 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1938 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1939 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1940 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1941 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1942 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1943 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1944 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1945 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1946 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
1953 static reloc_howto_type
*
1954 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1955 bfd_reloc_code_real_type code
)
1959 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1960 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1966 static reloc_howto_type
*
1967 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1972 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1973 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1974 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1975 return &elf32_arm_howto_table_1
[i
];
1977 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1978 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1979 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1980 return &elf32_arm_howto_table_2
[i
];
1982 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1983 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1984 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1985 return &elf32_arm_howto_table_3
[i
];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
1998 switch (note
->descsz
)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2008 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2019 size
, note
->descpos
+ offset
);
2023 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2025 switch (note
->descsz
)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd
)->core
->pid
2032 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2033 elf_tdata (abfd
)->core
->program
2034 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2035 elf_tdata (abfd
)->core
->command
2036 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command
= elf_tdata (abfd
)->core
->command
;
2044 int n
= strlen (command
);
2046 if (0 < n
&& command
[n
- 1] == ' ')
2047 command
[n
- 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2067 va_start (ap
, note_type
);
2068 memset (data
, 0, sizeof (data
));
2069 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2070 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2073 return elfcore_write_note (abfd
, buf
, bufsiz
,
2074 "CORE", note_type
, data
, sizeof (data
));
2085 va_start (ap
, note_type
);
2086 memset (data
, 0, sizeof (data
));
2087 pid
= va_arg (ap
, long);
2088 bfd_put_32 (abfd
, pid
, data
+ 24);
2089 cursig
= va_arg (ap
, int);
2090 bfd_put_16 (abfd
, cursig
, data
+ 12);
2091 greg
= va_arg (ap
, const void *);
2092 memcpy (data
+ 72, greg
, 72);
2095 return elfcore_write_note (abfd
, buf
, bufsiz
,
2096 "CORE", note_type
, data
, sizeof (data
));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32
;
2111 typedef unsigned short int insn16
;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 /* The name of the dynamic interpreter. This is put in the .interp
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2145 static const unsigned long tls_trampoline
[] =
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2152 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 #ifdef FOUR_WORD_PLT
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2171 static const bfd_vma elf32_arm_plt0_entry
[] =
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 /* Subsequent entries in a procedure linkage table look like
2181 static const bfd_vma elf32_arm_plt_entry
[] =
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2189 #else /* not FOUR_WORD_PLT */
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2195 static const bfd_vma elf32_arm_plt0_entry
[] =
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short
[] =
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long
[] =
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2225 #endif /* not FOUR_WORD_PLT */
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2243 static const bfd_vma elf32_thumb2_plt_entry
[] =
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2294 /* The entries in a PLT when using a DLL-based target with multiple
2296 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2306 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371 enum stub_insn_type type
;
2372 unsigned int r_type
;
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2547 /* Cortex-A8 erratum-workaround stubs. */
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2559 /* Stub used for b.w and bl.w instructions. */
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2589 const char * stubborn_problems[] = { "np" };
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2594 .data.rel.local.stubborn_problems
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2605 #define STUB_SUFFIX ".__stub"
2607 /* One entry per long/short branch stub defined above. */
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2635 /* Note the first a8_veneer type. */
2636 arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
2642 const insn_sequence
* template_sequence
;
2646 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2647 static const stub_def stub_definitions
[] =
2653 struct elf32_arm_stub_hash_entry
2655 /* Base hash table entry structure. */
2656 struct bfd_hash_entry root
;
2658 /* The stub section. */
2661 /* Offset within stub_sec of the beginning of this stub. */
2662 bfd_vma stub_offset
;
2664 /* Given the symbol's value and its section we can determine its final
2665 value when building the stubs (so the stub knows where to jump). */
2666 bfd_vma target_value
;
2667 asection
*target_section
;
2669 /* Offset to apply to relocation referencing target_value. */
2670 bfd_vma target_addend
;
2672 /* The instruction which caused this stub to be generated (only valid for
2673 Cortex-A8 erratum workaround stubs at present). */
2674 unsigned long orig_insn
;
2676 /* The stub type. */
2677 enum elf32_arm_stub_type stub_type
;
2678 /* Its encoding size in bytes. */
2681 const insn_sequence
*stub_template
;
2682 /* The size of the template (number of entries). */
2683 int stub_template_size
;
2685 /* The symbol table entry, if any, that this was derived from. */
2686 struct elf32_arm_link_hash_entry
*h
;
2688 /* Type of branch. */
2689 enum arm_st_branch_type branch_type
;
2691 /* Where this stub is being called from, or, in the case of combined
2692 stub sections, the first input section in the group. */
2695 /* The name for the local symbol at the start of this stub. The
2696 stub name in the hash table has to be unique; this does not, so
2697 it can be friendlier. */
2701 /* Used to build a map of a section. This is required for mixed-endian
2704 typedef struct elf32_elf_section_map
2709 elf32_arm_section_map
;
2711 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2715 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2716 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2717 VFP11_ERRATUM_ARM_VENEER
,
2718 VFP11_ERRATUM_THUMB_VENEER
2720 elf32_vfp11_erratum_type
;
2722 typedef struct elf32_vfp11_erratum_list
2724 struct elf32_vfp11_erratum_list
*next
;
2730 struct elf32_vfp11_erratum_list
*veneer
;
2731 unsigned int vfp_insn
;
2735 struct elf32_vfp11_erratum_list
*branch
;
2739 elf32_vfp11_erratum_type type
;
2741 elf32_vfp11_erratum_list
;
2743 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2747 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2748 STM32L4XX_ERRATUM_VENEER
2750 elf32_stm32l4xx_erratum_type
;
2752 typedef struct elf32_stm32l4xx_erratum_list
2754 struct elf32_stm32l4xx_erratum_list
*next
;
2760 struct elf32_stm32l4xx_erratum_list
*veneer
;
2765 struct elf32_stm32l4xx_erratum_list
*branch
;
2769 elf32_stm32l4xx_erratum_type type
;
2771 elf32_stm32l4xx_erratum_list
;
2776 INSERT_EXIDX_CANTUNWIND_AT_END
2778 arm_unwind_edit_type
;
2780 /* A (sorted) list of edits to apply to an unwind table. */
2781 typedef struct arm_unwind_table_edit
2783 arm_unwind_edit_type type
;
2784 /* Note: we sometimes want to insert an unwind entry corresponding to a
2785 section different from the one we're currently writing out, so record the
2786 (text) section this edit relates to here. */
2787 asection
*linked_section
;
2789 struct arm_unwind_table_edit
*next
;
2791 arm_unwind_table_edit
;
2793 typedef struct _arm_elf_section_data
2795 /* Information about mapping symbols. */
2796 struct bfd_elf_section_data elf
;
2797 unsigned int mapcount
;
2798 unsigned int mapsize
;
2799 elf32_arm_section_map
*map
;
2800 /* Information about CPU errata. */
2801 unsigned int erratumcount
;
2802 elf32_vfp11_erratum_list
*erratumlist
;
2803 unsigned int stm32l4xx_erratumcount
;
2804 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2805 unsigned int additional_reloc_count
;
2806 /* Information about unwind tables. */
2809 /* Unwind info attached to a text section. */
2812 asection
*arm_exidx_sec
;
2815 /* Unwind info attached to an .ARM.exidx section. */
2818 arm_unwind_table_edit
*unwind_edit_list
;
2819 arm_unwind_table_edit
*unwind_edit_tail
;
2823 _arm_elf_section_data
;
2825 #define elf32_arm_section_data(sec) \
2826 ((_arm_elf_section_data *) elf_section_data (sec))
2828 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2829 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2830 so may be created multiple times: we use an array of these entries whilst
2831 relaxing which we can refresh easily, then create stubs for each potentially
2832 erratum-triggering instruction once we've settled on a solution. */
2834 struct a8_erratum_fix
2840 unsigned long orig_insn
;
2842 enum elf32_arm_stub_type stub_type
;
2843 enum arm_st_branch_type branch_type
;
2846 /* A table of relocs applied to branches which might trigger Cortex-A8
2849 struct a8_erratum_reloc
2852 bfd_vma destination
;
2853 struct elf32_arm_link_hash_entry
*hash
;
2854 const char *sym_name
;
2855 unsigned int r_type
;
2856 enum arm_st_branch_type branch_type
;
2857 bfd_boolean non_a8_stub
;
2860 /* The size of the thread control block. */
2863 /* ARM-specific information about a PLT entry, over and above the usual
2867 /* We reference count Thumb references to a PLT entry separately,
2868 so that we can emit the Thumb trampoline only if needed. */
2869 bfd_signed_vma thumb_refcount
;
2871 /* Some references from Thumb code may be eliminated by BL->BLX
2872 conversion, so record them separately. */
2873 bfd_signed_vma maybe_thumb_refcount
;
2875 /* How many of the recorded PLT accesses were from non-call relocations.
2876 This information is useful when deciding whether anything takes the
2877 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2878 non-call references to the function should resolve directly to the
2879 real runtime target. */
2880 unsigned int noncall_refcount
;
2882 /* Since PLT entries have variable size if the Thumb prologue is
2883 used, we need to record the index into .got.plt instead of
2884 recomputing it from the PLT offset. */
2885 bfd_signed_vma got_offset
;
2888 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2889 struct arm_local_iplt_info
2891 /* The information that is usually found in the generic ELF part of
2892 the hash table entry. */
2893 union gotplt_union root
;
2895 /* The information that is usually found in the ARM-specific part of
2896 the hash table entry. */
2897 struct arm_plt_info arm
;
2899 /* A list of all potential dynamic relocations against this symbol. */
2900 struct elf_dyn_relocs
*dyn_relocs
;
2903 struct elf_arm_obj_tdata
2905 struct elf_obj_tdata root
;
2907 /* tls_type for each local got entry. */
2908 char *local_got_tls_type
;
2910 /* GOTPLT entries for TLS descriptors. */
2911 bfd_vma
*local_tlsdesc_gotent
;
2913 /* Information for local symbols that need entries in .iplt. */
2914 struct arm_local_iplt_info
**local_iplt
;
2916 /* Zero to warn when linking objects with incompatible enum sizes. */
2917 int no_enum_size_warning
;
2919 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2920 int no_wchar_size_warning
;
2923 #define elf_arm_tdata(bfd) \
2924 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2926 #define elf32_arm_local_got_tls_type(bfd) \
2927 (elf_arm_tdata (bfd)->local_got_tls_type)
2929 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2930 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2932 #define elf32_arm_local_iplt(bfd) \
2933 (elf_arm_tdata (bfd)->local_iplt)
2935 #define is_arm_elf(bfd) \
2936 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2937 && elf_tdata (bfd) != NULL \
2938 && elf_object_id (bfd) == ARM_ELF_DATA)
2941 elf32_arm_mkobject (bfd
*abfd
)
2943 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2947 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2949 /* Arm ELF linker hash entry. */
2950 struct elf32_arm_link_hash_entry
2952 struct elf_link_hash_entry root
;
2954 /* Track dynamic relocs copied for this symbol. */
2955 struct elf_dyn_relocs
*dyn_relocs
;
2957 /* ARM-specific PLT information. */
2958 struct arm_plt_info plt
;
2960 #define GOT_UNKNOWN 0
2961 #define GOT_NORMAL 1
2962 #define GOT_TLS_GD 2
2963 #define GOT_TLS_IE 4
2964 #define GOT_TLS_GDESC 8
2965 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2966 unsigned int tls_type
: 8;
2968 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2969 unsigned int is_iplt
: 1;
2971 unsigned int unused
: 23;
2973 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2974 starting at the end of the jump table. */
2975 bfd_vma tlsdesc_got
;
2977 /* The symbol marking the real symbol location for exported thumb
2978 symbols with Arm stubs. */
2979 struct elf_link_hash_entry
*export_glue
;
2981 /* A pointer to the most recently used stub hash entry against this
2983 struct elf32_arm_stub_hash_entry
*stub_cache
;
2986 /* Traverse an arm ELF linker hash table. */
2987 #define elf32_arm_link_hash_traverse(table, func, info) \
2988 (elf_link_hash_traverse \
2990 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2993 /* Get the ARM elf linker hash table from a link_info structure. */
2994 #define elf32_arm_hash_table(info) \
2995 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2996 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2998 #define arm_stub_hash_lookup(table, string, create, copy) \
2999 ((struct elf32_arm_stub_hash_entry *) \
3000 bfd_hash_lookup ((table), (string), (create), (copy)))
3002 /* Array to keep track of which stub sections have been created, and
3003 information on stub grouping. */
3006 /* This is the section to which stubs in the group will be
3009 /* The stub section. */
3013 #define elf32_arm_compute_jump_table_size(htab) \
3014 ((htab)->next_tls_desc_index * 4)
3016 /* ARM ELF linker hash table. */
3017 struct elf32_arm_link_hash_table
3019 /* The main hash table. */
3020 struct elf_link_hash_table root
;
3022 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3023 bfd_size_type thumb_glue_size
;
3025 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3026 bfd_size_type arm_glue_size
;
3028 /* The size in bytes of section containing the ARMv4 BX veneers. */
3029 bfd_size_type bx_glue_size
;
3031 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3032 veneer has been populated. */
3033 bfd_vma bx_glue_offset
[15];
3035 /* The size in bytes of the section containing glue for VFP11 erratum
3037 bfd_size_type vfp11_erratum_glue_size
;
3039 /* The size in bytes of the section containing glue for STM32L4XX erratum
3041 bfd_size_type stm32l4xx_erratum_glue_size
;
3043 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3044 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3045 elf32_arm_write_section(). */
3046 struct a8_erratum_fix
*a8_erratum_fixes
;
3047 unsigned int num_a8_erratum_fixes
;
3049 /* An arbitrary input BFD chosen to hold the glue sections. */
3050 bfd
* bfd_of_glue_owner
;
3052 /* Nonzero to output a BE8 image. */
3055 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3056 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3059 /* The relocation to use for R_ARM_TARGET2 relocations. */
3062 /* 0 = Ignore R_ARM_V4BX.
3063 1 = Convert BX to MOV PC.
3064 2 = Generate v4 interworing stubs. */
3067 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3070 /* Whether we should fix the ARM1176 BLX immediate issue. */
3073 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3076 /* What sort of code sequences we should look for which may trigger the
3077 VFP11 denorm erratum. */
3078 bfd_arm_vfp11_fix vfp11_fix
;
3080 /* Global counter for the number of fixes we have emitted. */
3081 int num_vfp11_fixes
;
3083 /* What sort of code sequences we should look for which may trigger the
3084 STM32L4XX erratum. */
3085 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3087 /* Global counter for the number of fixes we have emitted. */
3088 int num_stm32l4xx_fixes
;
3090 /* Nonzero to force PIC branch veneers. */
3093 /* The number of bytes in the initial entry in the PLT. */
3094 bfd_size_type plt_header_size
;
3096 /* The number of bytes in the subsequent PLT etries. */
3097 bfd_size_type plt_entry_size
;
3099 /* True if the target system is VxWorks. */
3102 /* True if the target system is Symbian OS. */
3105 /* True if the target system is Native Client. */
3108 /* True if the target uses REL relocations. */
3111 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3112 bfd_vma next_tls_desc_index
;
3114 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3115 bfd_vma num_tls_desc
;
3117 /* Short-cuts to get to dynamic linker sections. */
3121 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3124 /* The offset into splt of the PLT entry for the TLS descriptor
3125 resolver. Special values are 0, if not necessary (or not found
3126 to be necessary yet), and -1 if needed but not determined
3128 bfd_vma dt_tlsdesc_plt
;
3130 /* The offset into sgot of the GOT entry used by the PLT entry
3132 bfd_vma dt_tlsdesc_got
;
3134 /* Offset in .plt section of tls_arm_trampoline. */
3135 bfd_vma tls_trampoline
;
3137 /* Data for R_ARM_TLS_LDM32 relocations. */
3140 bfd_signed_vma refcount
;
3144 /* Small local sym cache. */
3145 struct sym_cache sym_cache
;
3147 /* For convenience in allocate_dynrelocs. */
3150 /* The amount of space used by the reserved portion of the sgotplt
3151 section, plus whatever space is used by the jump slots. */
3152 bfd_vma sgotplt_jump_table_size
;
3154 /* The stub hash table. */
3155 struct bfd_hash_table stub_hash_table
;
3157 /* Linker stub bfd. */
3160 /* Linker call-backs. */
3161 asection
* (*add_stub_section
) (const char *, asection
*, unsigned int);
3162 void (*layout_sections_again
) (void);
3164 /* Array to keep track of which stub sections have been created, and
3165 information on stub grouping. */
3166 struct map_stub
*stub_group
;
3168 /* Number of elements in stub_group. */
3169 unsigned int top_id
;
3171 /* Assorted information used by elf32_arm_size_stubs. */
3172 unsigned int bfd_count
;
3173 unsigned int top_index
;
3174 asection
**input_list
;
3178 ctz (unsigned int mask
)
3180 #if GCC_VERSION >= 3004
3181 return __builtin_ctz (mask
);
3185 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3196 popcount (unsigned int mask
)
3198 #if GCC_VERSION >= 3004
3199 return __builtin_popcount (mask
);
3201 unsigned int i
, sum
= 0;
3203 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3213 /* Create an entry in an ARM ELF linker hash table. */
3215 static struct bfd_hash_entry
*
3216 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3217 struct bfd_hash_table
* table
,
3218 const char * string
)
3220 struct elf32_arm_link_hash_entry
* ret
=
3221 (struct elf32_arm_link_hash_entry
*) entry
;
3223 /* Allocate the structure if it has not already been allocated by a
3226 ret
= (struct elf32_arm_link_hash_entry
*)
3227 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3229 return (struct bfd_hash_entry
*) ret
;
3231 /* Call the allocation method of the superclass. */
3232 ret
= ((struct elf32_arm_link_hash_entry
*)
3233 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3237 ret
->dyn_relocs
= NULL
;
3238 ret
->tls_type
= GOT_UNKNOWN
;
3239 ret
->tlsdesc_got
= (bfd_vma
) -1;
3240 ret
->plt
.thumb_refcount
= 0;
3241 ret
->plt
.maybe_thumb_refcount
= 0;
3242 ret
->plt
.noncall_refcount
= 0;
3243 ret
->plt
.got_offset
= -1;
3244 ret
->is_iplt
= FALSE
;
3245 ret
->export_glue
= NULL
;
3247 ret
->stub_cache
= NULL
;
3250 return (struct bfd_hash_entry
*) ret
;
3253 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3257 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3259 if (elf_local_got_refcounts (abfd
) == NULL
)
3261 bfd_size_type num_syms
;
3265 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3266 size
= num_syms
* (sizeof (bfd_signed_vma
)
3267 + sizeof (struct arm_local_iplt_info
*)
3270 data
= bfd_zalloc (abfd
, size
);
3274 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3275 data
+= num_syms
* sizeof (bfd_signed_vma
);
3277 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3278 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3280 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3281 data
+= num_syms
* sizeof (bfd_vma
);
3283 elf32_arm_local_got_tls_type (abfd
) = data
;
3288 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3289 to input bfd ABFD. Create the information if it doesn't already exist.
3290 Return null if an allocation fails. */
3292 static struct arm_local_iplt_info
*
3293 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3295 struct arm_local_iplt_info
**ptr
;
3297 if (!elf32_arm_allocate_local_sym_info (abfd
))
3300 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3301 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3303 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3307 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3308 in ABFD's symbol table. If the symbol is global, H points to its
3309 hash table entry, otherwise H is null.
3311 Return true if the symbol does have PLT information. When returning
3312 true, point *ROOT_PLT at the target-independent reference count/offset
3313 union and *ARM_PLT at the ARM-specific information. */
3316 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_entry
*h
,
3317 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3318 struct arm_plt_info
**arm_plt
)
3320 struct arm_local_iplt_info
*local_iplt
;
3324 *root_plt
= &h
->root
.plt
;
3329 if (elf32_arm_local_iplt (abfd
) == NULL
)
3332 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3333 if (local_iplt
== NULL
)
3336 *root_plt
= &local_iplt
->root
;
3337 *arm_plt
= &local_iplt
->arm
;
3341 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3345 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3346 struct arm_plt_info
*arm_plt
)
3348 struct elf32_arm_link_hash_table
*htab
;
3350 htab
= elf32_arm_hash_table (info
);
3351 return (arm_plt
->thumb_refcount
!= 0
3352 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3355 /* Return a pointer to the head of the dynamic reloc list that should
3356 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3357 ABFD's symbol table. Return null if an error occurs. */
3359 static struct elf_dyn_relocs
**
3360 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3361 Elf_Internal_Sym
*isym
)
3363 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3365 struct arm_local_iplt_info
*local_iplt
;
3367 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3368 if (local_iplt
== NULL
)
3370 return &local_iplt
->dyn_relocs
;
3374 /* Track dynamic relocs needed for local syms too.
3375 We really need local syms available to do this
3380 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3384 vpp
= &elf_section_data (s
)->local_dynrel
;
3385 return (struct elf_dyn_relocs
**) vpp
;
3389 /* Initialize an entry in the stub hash table. */
3391 static struct bfd_hash_entry
*
3392 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3393 struct bfd_hash_table
*table
,
3396 /* Allocate the structure if it has not already been allocated by a
3400 entry
= (struct bfd_hash_entry
*)
3401 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3406 /* Call the allocation method of the superclass. */
3407 entry
= bfd_hash_newfunc (entry
, table
, string
);
3410 struct elf32_arm_stub_hash_entry
*eh
;
3412 /* Initialize the local fields. */
3413 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3414 eh
->stub_sec
= NULL
;
3415 eh
->stub_offset
= 0;
3416 eh
->target_value
= 0;
3417 eh
->target_section
= NULL
;
3418 eh
->target_addend
= 0;
3420 eh
->stub_type
= arm_stub_none
;
3422 eh
->stub_template
= NULL
;
3423 eh
->stub_template_size
= 0;
3426 eh
->output_name
= NULL
;
3432 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3433 shortcuts to them in our hash table. */
3436 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3438 struct elf32_arm_link_hash_table
*htab
;
3440 htab
= elf32_arm_hash_table (info
);
3444 /* BPABI objects never have a GOT, or associated sections. */
3445 if (htab
->symbian_p
)
3448 if (! _bfd_elf_create_got_section (dynobj
, info
))
3454 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3457 create_ifunc_sections (struct bfd_link_info
*info
)
3459 struct elf32_arm_link_hash_table
*htab
;
3460 const struct elf_backend_data
*bed
;
3465 htab
= elf32_arm_hash_table (info
);
3466 dynobj
= htab
->root
.dynobj
;
3467 bed
= get_elf_backend_data (dynobj
);
3468 flags
= bed
->dynamic_sec_flags
;
3470 if (htab
->root
.iplt
== NULL
)
3472 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3473 flags
| SEC_READONLY
| SEC_CODE
);
3475 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3477 htab
->root
.iplt
= s
;
3480 if (htab
->root
.irelplt
== NULL
)
3482 s
= bfd_make_section_anyway_with_flags (dynobj
,
3483 RELOC_SECTION (htab
, ".iplt"),
3484 flags
| SEC_READONLY
);
3486 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3488 htab
->root
.irelplt
= s
;
3491 if (htab
->root
.igotplt
== NULL
)
3493 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3495 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3497 htab
->root
.igotplt
= s
;
3502 /* Determine if we're dealing with a Thumb only architecture. */
3505 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3508 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3509 Tag_CPU_arch_profile
);
3512 return profile
== 'M';
3514 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3516 if (arch
== TAG_CPU_ARCH_V6_M
3517 || arch
== TAG_CPU_ARCH_V6S_M
3518 || arch
== TAG_CPU_ARCH_V7E_M
3519 || arch
== TAG_CPU_ARCH_V8M_BASE
3520 || arch
== TAG_CPU_ARCH_V8M_MAIN
)
3526 /* Determine if we're dealing with a Thumb-2 object. */
3529 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3531 int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3533 return arch
== TAG_CPU_ARCH_V6T2
|| arch
>= TAG_CPU_ARCH_V7
;
3536 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3537 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3541 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3543 struct elf32_arm_link_hash_table
*htab
;
3545 htab
= elf32_arm_hash_table (info
);
3549 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3552 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3555 htab
->sdynbss
= bfd_get_linker_section (dynobj
, ".dynbss");
3556 if (!bfd_link_pic (info
))
3557 htab
->srelbss
= bfd_get_linker_section (dynobj
,
3558 RELOC_SECTION (htab
, ".bss"));
3560 if (htab
->vxworks_p
)
3562 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3565 if (bfd_link_pic (info
))
3567 htab
->plt_header_size
= 0;
3568 htab
->plt_entry_size
3569 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3573 htab
->plt_header_size
3574 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3575 htab
->plt_entry_size
3576 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3579 if (elf_elfheader (dynobj
))
3580 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3585 Test for thumb only architectures. Note - we cannot just call
3586 using_thumb_only() as the attributes in the output bfd have not been
3587 initialised at this point, so instead we use the input bfd. */
3588 bfd
* saved_obfd
= htab
->obfd
;
3590 htab
->obfd
= dynobj
;
3591 if (using_thumb_only (htab
))
3593 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3594 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3596 htab
->obfd
= saved_obfd
;
3599 if (!htab
->root
.splt
3600 || !htab
->root
.srelplt
3602 || (!bfd_link_pic (info
) && !htab
->srelbss
))
3608 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3611 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3612 struct elf_link_hash_entry
*dir
,
3613 struct elf_link_hash_entry
*ind
)
3615 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3617 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3618 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3620 if (eind
->dyn_relocs
!= NULL
)
3622 if (edir
->dyn_relocs
!= NULL
)
3624 struct elf_dyn_relocs
**pp
;
3625 struct elf_dyn_relocs
*p
;
3627 /* Add reloc counts against the indirect sym to the direct sym
3628 list. Merge any entries against the same section. */
3629 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3631 struct elf_dyn_relocs
*q
;
3633 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3634 if (q
->sec
== p
->sec
)
3636 q
->pc_count
+= p
->pc_count
;
3637 q
->count
+= p
->count
;
3644 *pp
= edir
->dyn_relocs
;
3647 edir
->dyn_relocs
= eind
->dyn_relocs
;
3648 eind
->dyn_relocs
= NULL
;
3651 if (ind
->root
.type
== bfd_link_hash_indirect
)
3653 /* Copy over PLT info. */
3654 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3655 eind
->plt
.thumb_refcount
= 0;
3656 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3657 eind
->plt
.maybe_thumb_refcount
= 0;
3658 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3659 eind
->plt
.noncall_refcount
= 0;
3661 /* We should only allocate a function to .iplt once the final
3662 symbol information is known. */
3663 BFD_ASSERT (!eind
->is_iplt
);
3665 if (dir
->got
.refcount
<= 0)
3667 edir
->tls_type
= eind
->tls_type
;
3668 eind
->tls_type
= GOT_UNKNOWN
;
3672 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3675 /* Destroy an ARM elf linker hash table. */
3678 elf32_arm_link_hash_table_free (bfd
*obfd
)
3680 struct elf32_arm_link_hash_table
*ret
3681 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
3683 bfd_hash_table_free (&ret
->stub_hash_table
);
3684 _bfd_elf_link_hash_table_free (obfd
);
3687 /* Create an ARM elf linker hash table. */
3689 static struct bfd_link_hash_table
*
3690 elf32_arm_link_hash_table_create (bfd
*abfd
)
3692 struct elf32_arm_link_hash_table
*ret
;
3693 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3695 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3699 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3700 elf32_arm_link_hash_newfunc
,
3701 sizeof (struct elf32_arm_link_hash_entry
),
3708 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3709 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
3710 #ifdef FOUR_WORD_PLT
3711 ret
->plt_header_size
= 16;
3712 ret
->plt_entry_size
= 16;
3714 ret
->plt_header_size
= 20;
3715 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
3720 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3721 sizeof (struct elf32_arm_stub_hash_entry
)))
3723 _bfd_elf_link_hash_table_free (abfd
);
3726 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
3728 return &ret
->root
.root
;
3731 /* Determine what kind of NOPs are available. */
3734 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3736 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3738 return arch
== TAG_CPU_ARCH_V6T2
3739 || arch
== TAG_CPU_ARCH_V6K
3740 || arch
== TAG_CPU_ARCH_V7
3741 || arch
== TAG_CPU_ARCH_V7E_M
;
3745 arch_has_thumb2_nop (struct elf32_arm_link_hash_table
*globals
)
3747 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3749 return (arch
== TAG_CPU_ARCH_V6T2
|| arch
== TAG_CPU_ARCH_V7
3750 || arch
== TAG_CPU_ARCH_V7E_M
);
3754 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3758 case arm_stub_long_branch_thumb_only
:
3759 case arm_stub_long_branch_v4t_thumb_arm
:
3760 case arm_stub_short_branch_v4t_thumb_arm
:
3761 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3762 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3763 case arm_stub_long_branch_thumb_only_pic
:
3774 /* Determine the type of stub needed, if any, for a call. */
3776 static enum elf32_arm_stub_type
3777 arm_type_of_stub (struct bfd_link_info
*info
,
3778 asection
*input_sec
,
3779 const Elf_Internal_Rela
*rel
,
3780 unsigned char st_type
,
3781 enum arm_st_branch_type
*actual_branch_type
,
3782 struct elf32_arm_link_hash_entry
*hash
,
3783 bfd_vma destination
,
3789 bfd_signed_vma branch_offset
;
3790 unsigned int r_type
;
3791 struct elf32_arm_link_hash_table
* globals
;
3794 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3796 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3797 union gotplt_union
*root_plt
;
3798 struct arm_plt_info
*arm_plt
;
3800 if (branch_type
== ST_BRANCH_LONG
)
3803 globals
= elf32_arm_hash_table (info
);
3804 if (globals
== NULL
)
3807 thumb_only
= using_thumb_only (globals
);
3809 thumb2
= using_thumb2 (globals
);
3811 /* Determine where the call point is. */
3812 location
= (input_sec
->output_offset
3813 + input_sec
->output_section
->vma
3816 r_type
= ELF32_R_TYPE (rel
->r_info
);
3818 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3819 are considering a function call relocation. */
3820 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3821 || r_type
== R_ARM_THM_JUMP19
)
3822 && branch_type
== ST_BRANCH_TO_ARM
)
3823 branch_type
= ST_BRANCH_TO_THUMB
;
3825 /* For TLS call relocs, it is the caller's responsibility to provide
3826 the address of the appropriate trampoline. */
3827 if (r_type
!= R_ARM_TLS_CALL
3828 && r_type
!= R_ARM_THM_TLS_CALL
3829 && elf32_arm_get_plt_info (input_bfd
, hash
, ELF32_R_SYM (rel
->r_info
),
3830 &root_plt
, &arm_plt
)
3831 && root_plt
->offset
!= (bfd_vma
) -1)
3835 if (hash
== NULL
|| hash
->is_iplt
)
3836 splt
= globals
->root
.iplt
;
3838 splt
= globals
->root
.splt
;
3843 /* Note when dealing with PLT entries: the main PLT stub is in
3844 ARM mode, so if the branch is in Thumb mode, another
3845 Thumb->ARM stub will be inserted later just before the ARM
3846 PLT stub. We don't take this extra distance into account
3847 here, because if a long branch stub is needed, we'll add a
3848 Thumb->Arm one and branch directly to the ARM PLT entry
3849 because it avoids spreading offset corrections in several
3852 destination
= (splt
->output_section
->vma
3853 + splt
->output_offset
3854 + root_plt
->offset
);
3856 branch_type
= ST_BRANCH_TO_ARM
;
3859 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3860 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3862 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3864 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3865 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
3867 /* Handle cases where:
3868 - this call goes too far (different Thumb/Thumb2 max
3870 - it's a Thumb->Arm call and blx is not available, or it's a
3871 Thumb->Arm branch (not bl). A stub is needed in this case,
3872 but only if this call is not through a PLT entry. Indeed,
3873 PLT stubs handle mode switching already.
3876 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3877 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3879 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3880 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3882 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
3883 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
3884 && (r_type
== R_ARM_THM_JUMP19
))
3885 || (branch_type
== ST_BRANCH_TO_ARM
3886 && (((r_type
== R_ARM_THM_CALL
3887 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
3888 || (r_type
== R_ARM_THM_JUMP24
)
3889 || (r_type
== R_ARM_THM_JUMP19
))
3892 if (branch_type
== ST_BRANCH_TO_THUMB
)
3894 /* Thumb to thumb. */
3897 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3899 ? ((globals
->use_blx
3900 && (r_type
== R_ARM_THM_CALL
))
3901 /* V5T and above. Stub starts with ARM code, so
3902 we must be able to switch mode before
3903 reaching it, which is only possible for 'bl'
3904 (ie R_ARM_THM_CALL relocation). */
3905 ? arm_stub_long_branch_any_thumb_pic
3906 /* On V4T, use Thumb code only. */
3907 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
3909 /* non-PIC stubs. */
3910 : ((globals
->use_blx
3911 && (r_type
== R_ARM_THM_CALL
))
3912 /* V5T and above. */
3913 ? arm_stub_long_branch_any_any
3915 : arm_stub_long_branch_v4t_thumb_thumb
);
3919 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3921 ? arm_stub_long_branch_thumb_only_pic
3923 : arm_stub_long_branch_thumb_only
;
3930 && sym_sec
->owner
!= NULL
3931 && !INTERWORK_FLAG (sym_sec
->owner
))
3933 (*_bfd_error_handler
)
3934 (_("%B(%s): warning: interworking not enabled.\n"
3935 " first occurrence: %B: Thumb call to ARM"),
3936 sym_sec
->owner
, input_bfd
, name
);
3940 (bfd_link_pic (info
) | globals
->pic_veneer
)
3942 ? (r_type
== R_ARM_THM_TLS_CALL
3943 /* TLS PIC stubs. */
3944 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
3945 : arm_stub_long_branch_v4t_thumb_tls_pic
)
3946 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
3947 /* V5T PIC and above. */
3948 ? arm_stub_long_branch_any_arm_pic
3950 : arm_stub_long_branch_v4t_thumb_arm_pic
))
3952 /* non-PIC stubs. */
3953 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
3954 /* V5T and above. */
3955 ? arm_stub_long_branch_any_any
3957 : arm_stub_long_branch_v4t_thumb_arm
);
3959 /* Handle v4t short branches. */
3960 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
3961 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
3962 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
3963 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
3967 else if (r_type
== R_ARM_CALL
3968 || r_type
== R_ARM_JUMP24
3969 || r_type
== R_ARM_PLT32
3970 || r_type
== R_ARM_TLS_CALL
)
3972 if (branch_type
== ST_BRANCH_TO_THUMB
)
3977 && sym_sec
->owner
!= NULL
3978 && !INTERWORK_FLAG (sym_sec
->owner
))
3980 (*_bfd_error_handler
)
3981 (_("%B(%s): warning: interworking not enabled.\n"
3982 " first occurrence: %B: ARM call to Thumb"),
3983 sym_sec
->owner
, input_bfd
, name
);
3986 /* We have an extra 2-bytes reach because of
3987 the mode change (bit 24 (H) of BLX encoding). */
3988 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
3989 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
3990 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
3991 || (r_type
== R_ARM_JUMP24
)
3992 || (r_type
== R_ARM_PLT32
))
3994 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3996 ? ((globals
->use_blx
)
3997 /* V5T and above. */
3998 ? arm_stub_long_branch_any_thumb_pic
4000 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4002 /* non-PIC stubs. */
4003 : ((globals
->use_blx
)
4004 /* V5T and above. */
4005 ? arm_stub_long_branch_any_any
4007 : arm_stub_long_branch_v4t_arm_thumb
);
4013 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4014 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4017 (bfd_link_pic (info
) | globals
->pic_veneer
)
4019 ? (r_type
== R_ARM_TLS_CALL
4021 ? arm_stub_long_branch_any_tls_pic
4023 ? arm_stub_long_branch_arm_nacl_pic
4024 : arm_stub_long_branch_any_arm_pic
))
4025 /* non-PIC stubs. */
4027 ? arm_stub_long_branch_arm_nacl
4028 : arm_stub_long_branch_any_any
);
4033 /* If a stub is needed, record the actual destination type. */
4034 if (stub_type
!= arm_stub_none
)
4035 *actual_branch_type
= branch_type
;
4040 /* Build a name for an entry in the stub hash table. */
4043 elf32_arm_stub_name (const asection
*input_section
,
4044 const asection
*sym_sec
,
4045 const struct elf32_arm_link_hash_entry
*hash
,
4046 const Elf_Internal_Rela
*rel
,
4047 enum elf32_arm_stub_type stub_type
)
4054 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4055 stub_name
= (char *) bfd_malloc (len
);
4056 if (stub_name
!= NULL
)
4057 sprintf (stub_name
, "%08x_%s+%x_%d",
4058 input_section
->id
& 0xffffffff,
4059 hash
->root
.root
.root
.string
,
4060 (int) rel
->r_addend
& 0xffffffff,
4065 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4066 stub_name
= (char *) bfd_malloc (len
);
4067 if (stub_name
!= NULL
)
4068 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4069 input_section
->id
& 0xffffffff,
4070 sym_sec
->id
& 0xffffffff,
4071 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4072 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4073 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4074 (int) rel
->r_addend
& 0xffffffff,
4081 /* Look up an entry in the stub hash. Stub entries are cached because
4082 creating the stub name takes a bit of time. */
4084 static struct elf32_arm_stub_hash_entry
*
4085 elf32_arm_get_stub_entry (const asection
*input_section
,
4086 const asection
*sym_sec
,
4087 struct elf_link_hash_entry
*hash
,
4088 const Elf_Internal_Rela
*rel
,
4089 struct elf32_arm_link_hash_table
*htab
,
4090 enum elf32_arm_stub_type stub_type
)
4092 struct elf32_arm_stub_hash_entry
*stub_entry
;
4093 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4094 const asection
*id_sec
;
4096 if ((input_section
->flags
& SEC_CODE
) == 0)
4099 /* If this input section is part of a group of sections sharing one
4100 stub section, then use the id of the first section in the group.
4101 Stub names need to include a section id, as there may well be
4102 more than one stub used to reach say, printf, and we need to
4103 distinguish between them. */
4104 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4106 if (h
!= NULL
&& h
->stub_cache
!= NULL
4107 && h
->stub_cache
->h
== h
4108 && h
->stub_cache
->id_sec
== id_sec
4109 && h
->stub_cache
->stub_type
== stub_type
)
4111 stub_entry
= h
->stub_cache
;
4117 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4118 if (stub_name
== NULL
)
4121 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4122 stub_name
, FALSE
, FALSE
);
4124 h
->stub_cache
= stub_entry
;
4132 /* Find or create a stub section. Returns a pointer to the stub section, and
4133 the section to which the stub section will be attached (in *LINK_SEC_P).
4134 LINK_SEC_P may be NULL. */
4137 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4138 struct elf32_arm_link_hash_table
*htab
)
4143 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4144 BFD_ASSERT (link_sec
!= NULL
);
4145 stub_sec
= htab
->stub_group
[section
->id
].stub_sec
;
4147 if (stub_sec
== NULL
)
4149 stub_sec
= htab
->stub_group
[link_sec
->id
].stub_sec
;
4150 if (stub_sec
== NULL
)
4156 namelen
= strlen (link_sec
->name
);
4157 len
= namelen
+ sizeof (STUB_SUFFIX
);
4158 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4162 memcpy (s_name
, link_sec
->name
, namelen
);
4163 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4164 stub_sec
= (*htab
->add_stub_section
) (s_name
, link_sec
,
4165 htab
->nacl_p
? 4 : 3);
4166 if (stub_sec
== NULL
)
4168 htab
->stub_group
[link_sec
->id
].stub_sec
= stub_sec
;
4170 htab
->stub_group
[section
->id
].stub_sec
= stub_sec
;
4174 *link_sec_p
= link_sec
;
4179 /* Add a new stub entry to the stub hash. Not all fields of the new
4180 stub entry are initialised. */
4182 static struct elf32_arm_stub_hash_entry
*
4183 elf32_arm_add_stub (const char *stub_name
,
4185 struct elf32_arm_link_hash_table
*htab
)
4189 struct elf32_arm_stub_hash_entry
*stub_entry
;
4191 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
);
4192 if (stub_sec
== NULL
)
4195 /* Enter this entry into the linker stub hash table. */
4196 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4198 if (stub_entry
== NULL
)
4200 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
4206 stub_entry
->stub_sec
= stub_sec
;
4207 stub_entry
->stub_offset
= 0;
4208 stub_entry
->id_sec
= link_sec
;
4213 /* Store an Arm insn into an output section not processed by
4214 elf32_arm_write_section. */
4217 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4218 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4220 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4221 bfd_putl32 (val
, ptr
);
4223 bfd_putb32 (val
, ptr
);
4226 /* Store a 16-bit Thumb insn into an output section not processed by
4227 elf32_arm_write_section. */
4230 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4231 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4233 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4234 bfd_putl16 (val
, ptr
);
4236 bfd_putb16 (val
, ptr
);
4239 /* Store a Thumb2 insn into an output section not processed by
4240 elf32_arm_write_section. */
4243 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4244 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4246 /* T2 instructions are 16-bit streamed. */
4247 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4249 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4250 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4254 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4255 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4259 /* If it's possible to change R_TYPE to a more efficient access
4260 model, return the new reloc type. */
4263 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4264 struct elf_link_hash_entry
*h
)
4266 int is_local
= (h
== NULL
);
4268 if (bfd_link_pic (info
)
4269 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4272 /* We do not support relaxations for Old TLS models. */
4275 case R_ARM_TLS_GOTDESC
:
4276 case R_ARM_TLS_CALL
:
4277 case R_ARM_THM_TLS_CALL
:
4278 case R_ARM_TLS_DESCSEQ
:
4279 case R_ARM_THM_TLS_DESCSEQ
:
4280 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4286 static bfd_reloc_status_type elf32_arm_final_link_relocate
4287 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4288 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4289 const char *, unsigned char, enum arm_st_branch_type
,
4290 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4293 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4297 case arm_stub_a8_veneer_b_cond
:
4298 case arm_stub_a8_veneer_b
:
4299 case arm_stub_a8_veneer_bl
:
4302 case arm_stub_long_branch_any_any
:
4303 case arm_stub_long_branch_v4t_arm_thumb
:
4304 case arm_stub_long_branch_thumb_only
:
4305 case arm_stub_long_branch_v4t_thumb_thumb
:
4306 case arm_stub_long_branch_v4t_thumb_arm
:
4307 case arm_stub_short_branch_v4t_thumb_arm
:
4308 case arm_stub_long_branch_any_arm_pic
:
4309 case arm_stub_long_branch_any_thumb_pic
:
4310 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4311 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4312 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4313 case arm_stub_long_branch_thumb_only_pic
:
4314 case arm_stub_long_branch_any_tls_pic
:
4315 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4316 case arm_stub_a8_veneer_blx
:
4319 case arm_stub_long_branch_arm_nacl
:
4320 case arm_stub_long_branch_arm_nacl_pic
:
4324 abort (); /* Should be unreachable. */
4329 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4333 struct elf32_arm_stub_hash_entry
*stub_entry
;
4334 struct elf32_arm_link_hash_table
*globals
;
4335 struct bfd_link_info
*info
;
4342 const insn_sequence
*template_sequence
;
4344 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4345 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4348 /* Massage our args to the form they really have. */
4349 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4350 info
= (struct bfd_link_info
*) in_arg
;
4352 globals
= elf32_arm_hash_table (info
);
4353 if (globals
== NULL
)
4356 stub_sec
= stub_entry
->stub_sec
;
4358 if ((globals
->fix_cortex_a8
< 0)
4359 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4360 /* We have to do less-strictly-aligned fixes last. */
4363 /* Make a note of the offset within the stubs for this entry. */
4364 stub_entry
->stub_offset
= stub_sec
->size
;
4365 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4367 stub_bfd
= stub_sec
->owner
;
4369 /* This is the address of the stub destination. */
4370 sym_value
= (stub_entry
->target_value
4371 + stub_entry
->target_section
->output_offset
4372 + stub_entry
->target_section
->output_section
->vma
);
4374 template_sequence
= stub_entry
->stub_template
;
4375 template_size
= stub_entry
->stub_template_size
;
4378 for (i
= 0; i
< template_size
; i
++)
4380 switch (template_sequence
[i
].type
)
4384 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4385 if (template_sequence
[i
].reloc_addend
!= 0)
4387 /* We've borrowed the reloc_addend field to mean we should
4388 insert a condition code into this (Thumb-1 branch)
4389 instruction. See THUMB16_BCOND_INSN. */
4390 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4391 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4393 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4399 bfd_put_16 (stub_bfd
,
4400 (template_sequence
[i
].data
>> 16) & 0xffff,
4402 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4404 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4406 stub_reloc_idx
[nrelocs
] = i
;
4407 stub_reloc_offset
[nrelocs
++] = size
;
4413 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4415 /* Handle cases where the target is encoded within the
4417 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4419 stub_reloc_idx
[nrelocs
] = i
;
4420 stub_reloc_offset
[nrelocs
++] = size
;
4426 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4427 stub_reloc_idx
[nrelocs
] = i
;
4428 stub_reloc_offset
[nrelocs
++] = size
;
4438 stub_sec
->size
+= size
;
4440 /* Stub size has already been computed in arm_size_one_stub. Check
4442 BFD_ASSERT (size
== stub_entry
->stub_size
);
4444 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4445 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4448 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4450 BFD_ASSERT (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
);
4452 for (i
= 0; i
< nrelocs
; i
++)
4453 if (template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_JUMP24
4454 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_JUMP19
4455 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_CALL
4456 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_XPC22
)
4458 Elf_Internal_Rela rel
;
4459 bfd_boolean unresolved_reloc
;
4460 char *error_message
;
4461 enum arm_st_branch_type branch_type
4462 = (template_sequence
[stub_reloc_idx
[i
]].r_type
!= R_ARM_THM_XPC22
4463 ? ST_BRANCH_TO_THUMB
: ST_BRANCH_TO_ARM
);
4464 bfd_vma points_to
= sym_value
+ stub_entry
->target_addend
;
4466 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4467 rel
.r_info
= ELF32_R_INFO (0,
4468 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4469 rel
.r_addend
= template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4471 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4472 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4473 template should refer back to the instruction after the original
4475 points_to
= sym_value
;
4477 /* There may be unintended consequences if this is not true. */
4478 BFD_ASSERT (stub_entry
->h
== NULL
);
4480 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4481 properly. We should probably use this function unconditionally,
4482 rather than only for certain relocations listed in the enclosing
4483 conditional, for the sake of consistency. */
4484 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4485 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4486 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4487 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4488 branch_type
, (struct elf_link_hash_entry
*) stub_entry
->h
,
4489 &unresolved_reloc
, &error_message
);
4493 Elf_Internal_Rela rel
;
4494 bfd_boolean unresolved_reloc
;
4495 char *error_message
;
4496 bfd_vma points_to
= sym_value
+ stub_entry
->target_addend
4497 + template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4499 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4500 rel
.r_info
= ELF32_R_INFO (0,
4501 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4504 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4505 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4506 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4507 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4508 stub_entry
->branch_type
,
4509 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4517 /* Calculate the template, template size and instruction size for a stub.
4518 Return value is the instruction size. */
4521 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4522 const insn_sequence
**stub_template
,
4523 int *stub_template_size
)
4525 const insn_sequence
*template_sequence
= NULL
;
4526 int template_size
= 0, i
;
4529 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4531 *stub_template
= template_sequence
;
4533 template_size
= stub_definitions
[stub_type
].template_size
;
4534 if (stub_template_size
)
4535 *stub_template_size
= template_size
;
4538 for (i
= 0; i
< template_size
; i
++)
4540 switch (template_sequence
[i
].type
)
4561 /* As above, but don't actually build the stub. Just bump offset so
4562 we know stub section sizes. */
4565 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4566 void *in_arg ATTRIBUTE_UNUSED
)
4568 struct elf32_arm_stub_hash_entry
*stub_entry
;
4569 const insn_sequence
*template_sequence
;
4570 int template_size
, size
;
4572 /* Massage our args to the form they really have. */
4573 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4575 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4576 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4578 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4581 stub_entry
->stub_size
= size
;
4582 stub_entry
->stub_template
= template_sequence
;
4583 stub_entry
->stub_template_size
= template_size
;
4585 size
= (size
+ 7) & ~7;
4586 stub_entry
->stub_sec
->size
+= size
;
4591 /* External entry points for sizing and building linker stubs. */
4593 /* Set up various things so that we can make a list of input sections
4594 for each output section included in the link. Returns -1 on error,
4595 0 when no stubs will be needed, and 1 on success. */
4598 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4599 struct bfd_link_info
*info
)
4602 unsigned int bfd_count
;
4603 unsigned int top_id
, top_index
;
4605 asection
**input_list
, **list
;
4607 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4611 if (! is_elf_hash_table (htab
))
4614 /* Count the number of input BFDs and find the top input section id. */
4615 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4617 input_bfd
= input_bfd
->link
.next
)
4620 for (section
= input_bfd
->sections
;
4622 section
= section
->next
)
4624 if (top_id
< section
->id
)
4625 top_id
= section
->id
;
4628 htab
->bfd_count
= bfd_count
;
4630 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4631 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4632 if (htab
->stub_group
== NULL
)
4634 htab
->top_id
= top_id
;
4636 /* We can't use output_bfd->section_count here to find the top output
4637 section index as some sections may have been removed, and
4638 _bfd_strip_section_from_output doesn't renumber the indices. */
4639 for (section
= output_bfd
->sections
, top_index
= 0;
4641 section
= section
->next
)
4643 if (top_index
< section
->index
)
4644 top_index
= section
->index
;
4647 htab
->top_index
= top_index
;
4648 amt
= sizeof (asection
*) * (top_index
+ 1);
4649 input_list
= (asection
**) bfd_malloc (amt
);
4650 htab
->input_list
= input_list
;
4651 if (input_list
== NULL
)
4654 /* For sections we aren't interested in, mark their entries with a
4655 value we can check later. */
4656 list
= input_list
+ top_index
;
4658 *list
= bfd_abs_section_ptr
;
4659 while (list
-- != input_list
);
4661 for (section
= output_bfd
->sections
;
4663 section
= section
->next
)
4665 if ((section
->flags
& SEC_CODE
) != 0)
4666 input_list
[section
->index
] = NULL
;
4672 /* The linker repeatedly calls this function for each input section,
4673 in the order that input sections are linked into output sections.
4674 Build lists of input sections to determine groupings between which
4675 we may insert linker stubs. */
4678 elf32_arm_next_input_section (struct bfd_link_info
*info
,
4681 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4686 if (isec
->output_section
->index
<= htab
->top_index
)
4688 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
4690 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
4692 /* Steal the link_sec pointer for our list. */
4693 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4694 /* This happens to make the list in reverse order,
4695 which we reverse later. */
4696 PREV_SEC (isec
) = *list
;
4702 /* See whether we can group stub sections together. Grouping stub
4703 sections may result in fewer stubs. More importantly, we need to
4704 put all .init* and .fini* stubs at the end of the .init or
4705 .fini output sections respectively, because glibc splits the
4706 _init and _fini functions into multiple parts. Putting a stub in
4707 the middle of a function is not a good idea. */
4710 group_sections (struct elf32_arm_link_hash_table
*htab
,
4711 bfd_size_type stub_group_size
,
4712 bfd_boolean stubs_always_after_branch
)
4714 asection
**list
= htab
->input_list
;
4718 asection
*tail
= *list
;
4721 if (tail
== bfd_abs_section_ptr
)
4724 /* Reverse the list: we must avoid placing stubs at the
4725 beginning of the section because the beginning of the text
4726 section may be required for an interrupt vector in bare metal
4728 #define NEXT_SEC PREV_SEC
4730 while (tail
!= NULL
)
4732 /* Pop from tail. */
4733 asection
*item
= tail
;
4734 tail
= PREV_SEC (item
);
4737 NEXT_SEC (item
) = head
;
4741 while (head
!= NULL
)
4745 bfd_vma stub_group_start
= head
->output_offset
;
4746 bfd_vma end_of_next
;
4749 while (NEXT_SEC (curr
) != NULL
)
4751 next
= NEXT_SEC (curr
);
4752 end_of_next
= next
->output_offset
+ next
->size
;
4753 if (end_of_next
- stub_group_start
>= stub_group_size
)
4754 /* End of NEXT is too far from start, so stop. */
4756 /* Add NEXT to the group. */
4760 /* OK, the size from the start to the start of CURR is less
4761 than stub_group_size and thus can be handled by one stub
4762 section. (Or the head section is itself larger than
4763 stub_group_size, in which case we may be toast.)
4764 We should really be keeping track of the total size of
4765 stubs added here, as stubs contribute to the final output
4769 next
= NEXT_SEC (head
);
4770 /* Set up this stub group. */
4771 htab
->stub_group
[head
->id
].link_sec
= curr
;
4773 while (head
!= curr
&& (head
= next
) != NULL
);
4775 /* But wait, there's more! Input sections up to stub_group_size
4776 bytes after the stub section can be handled by it too. */
4777 if (!stubs_always_after_branch
)
4779 stub_group_start
= curr
->output_offset
+ curr
->size
;
4781 while (next
!= NULL
)
4783 end_of_next
= next
->output_offset
+ next
->size
;
4784 if (end_of_next
- stub_group_start
>= stub_group_size
)
4785 /* End of NEXT is too far from stubs, so stop. */
4787 /* Add NEXT to the stub group. */
4789 next
= NEXT_SEC (head
);
4790 htab
->stub_group
[head
->id
].link_sec
= curr
;
4796 while (list
++ != htab
->input_list
+ htab
->top_index
);
4798 free (htab
->input_list
);
4803 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4807 a8_reloc_compare (const void *a
, const void *b
)
4809 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
4810 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
4812 if (ra
->from
< rb
->from
)
4814 else if (ra
->from
> rb
->from
)
4820 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
4821 const char *, char **);
4823 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4824 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4825 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4829 cortex_a8_erratum_scan (bfd
*input_bfd
,
4830 struct bfd_link_info
*info
,
4831 struct a8_erratum_fix
**a8_fixes_p
,
4832 unsigned int *num_a8_fixes_p
,
4833 unsigned int *a8_fix_table_size_p
,
4834 struct a8_erratum_reloc
*a8_relocs
,
4835 unsigned int num_a8_relocs
,
4836 unsigned prev_num_a8_fixes
,
4837 bfd_boolean
*stub_changed_p
)
4840 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4841 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
4842 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
4843 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
4848 for (section
= input_bfd
->sections
;
4850 section
= section
->next
)
4852 bfd_byte
*contents
= NULL
;
4853 struct _arm_elf_section_data
*sec_data
;
4857 if (elf_section_type (section
) != SHT_PROGBITS
4858 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
4859 || (section
->flags
& SEC_EXCLUDE
) != 0
4860 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
4861 || (section
->output_section
== bfd_abs_section_ptr
))
4864 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
4866 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
4867 contents
= elf_section_data (section
)->this_hdr
.contents
;
4868 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
4871 sec_data
= elf32_arm_section_data (section
);
4873 for (span
= 0; span
< sec_data
->mapcount
; span
++)
4875 unsigned int span_start
= sec_data
->map
[span
].vma
;
4876 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
4877 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
4879 char span_type
= sec_data
->map
[span
].type
;
4880 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
4882 if (span_type
!= 't')
4885 /* Span is entirely within a single 4KB region: skip scanning. */
4886 if (((base_vma
+ span_start
) & ~0xfff)
4887 == ((base_vma
+ span_end
) & ~0xfff))
4890 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4892 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4893 * The branch target is in the same 4KB region as the
4894 first half of the branch.
4895 * The instruction before the branch is a 32-bit
4896 length non-branch instruction. */
4897 for (i
= span_start
; i
< span_end
;)
4899 unsigned int insn
= bfd_getl16 (&contents
[i
]);
4900 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
4901 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
4903 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
4908 /* Load the rest of the insn (in manual-friendly order). */
4909 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
4911 /* Encoding T4: B<c>.W. */
4912 is_b
= (insn
& 0xf800d000) == 0xf0009000;
4913 /* Encoding T1: BL<c>.W. */
4914 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
4915 /* Encoding T2: BLX<c>.W. */
4916 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
4917 /* Encoding T3: B<c>.W (not permitted in IT block). */
4918 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
4919 && (insn
& 0x07f00000) != 0x03800000;
4922 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
4924 if (((base_vma
+ i
) & 0xfff) == 0xffe
4928 && ! last_was_branch
)
4930 bfd_signed_vma offset
= 0;
4931 bfd_boolean force_target_arm
= FALSE
;
4932 bfd_boolean force_target_thumb
= FALSE
;
4934 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4935 struct a8_erratum_reloc key
, *found
;
4936 bfd_boolean use_plt
= FALSE
;
4938 key
.from
= base_vma
+ i
;
4939 found
= (struct a8_erratum_reloc
*)
4940 bsearch (&key
, a8_relocs
, num_a8_relocs
,
4941 sizeof (struct a8_erratum_reloc
),
4946 char *error_message
= NULL
;
4947 struct elf_link_hash_entry
*entry
;
4949 /* We don't care about the error returned from this
4950 function, only if there is glue or not. */
4951 entry
= find_thumb_glue (info
, found
->sym_name
,
4955 found
->non_a8_stub
= TRUE
;
4957 /* Keep a simpler condition, for the sake of clarity. */
4958 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
4959 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
4962 if (found
->r_type
== R_ARM_THM_CALL
)
4964 if (found
->branch_type
== ST_BRANCH_TO_ARM
4966 force_target_arm
= TRUE
;
4968 force_target_thumb
= TRUE
;
4972 /* Check if we have an offending branch instruction. */
4974 if (found
&& found
->non_a8_stub
)
4975 /* We've already made a stub for this instruction, e.g.
4976 it's a long branch or a Thumb->ARM stub. Assume that
4977 stub will suffice to work around the A8 erratum (see
4978 setting of always_after_branch above). */
4982 offset
= (insn
& 0x7ff) << 1;
4983 offset
|= (insn
& 0x3f0000) >> 4;
4984 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
4985 offset
|= (insn
& 0x800) ? 0x80000 : 0;
4986 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
4987 if (offset
& 0x100000)
4988 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
4989 stub_type
= arm_stub_a8_veneer_b_cond
;
4991 else if (is_b
|| is_bl
|| is_blx
)
4993 int s
= (insn
& 0x4000000) != 0;
4994 int j1
= (insn
& 0x2000) != 0;
4995 int j2
= (insn
& 0x800) != 0;
4999 offset
= (insn
& 0x7ff) << 1;
5000 offset
|= (insn
& 0x3ff0000) >> 4;
5004 if (offset
& 0x1000000)
5005 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5008 offset
&= ~ ((bfd_signed_vma
) 3);
5010 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5011 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5014 if (stub_type
!= arm_stub_none
)
5016 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5018 /* The original instruction is a BL, but the target is
5019 an ARM instruction. If we were not making a stub,
5020 the BL would have been converted to a BLX. Use the
5021 BLX stub instead in that case. */
5022 if (htab
->use_blx
&& force_target_arm
5023 && stub_type
== arm_stub_a8_veneer_bl
)
5025 stub_type
= arm_stub_a8_veneer_blx
;
5029 /* Conversely, if the original instruction was
5030 BLX but the target is Thumb mode, use the BL
5032 else if (force_target_thumb
5033 && stub_type
== arm_stub_a8_veneer_blx
)
5035 stub_type
= arm_stub_a8_veneer_bl
;
5041 pc_for_insn
&= ~ ((bfd_vma
) 3);
5043 /* If we found a relocation, use the proper destination,
5044 not the offset in the (unrelocated) instruction.
5045 Note this is always done if we switched the stub type
5049 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5051 /* If the stub will use a Thumb-mode branch to a
5052 PLT target, redirect it to the preceding Thumb
5054 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5055 offset
-= PLT_THUMB_STUB_SIZE
;
5057 target
= pc_for_insn
+ offset
;
5059 /* The BLX stub is ARM-mode code. Adjust the offset to
5060 take the different PC value (+8 instead of +4) into
5062 if (stub_type
== arm_stub_a8_veneer_blx
)
5065 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5067 char *stub_name
= NULL
;
5069 if (num_a8_fixes
== a8_fix_table_size
)
5071 a8_fix_table_size
*= 2;
5072 a8_fixes
= (struct a8_erratum_fix
*)
5073 bfd_realloc (a8_fixes
,
5074 sizeof (struct a8_erratum_fix
)
5075 * a8_fix_table_size
);
5078 if (num_a8_fixes
< prev_num_a8_fixes
)
5080 /* If we're doing a subsequent scan,
5081 check if we've found the same fix as
5082 before, and try and reuse the stub
5084 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5085 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5086 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5090 *stub_changed_p
= TRUE
;
5096 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5097 if (stub_name
!= NULL
)
5098 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5101 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5102 a8_fixes
[num_a8_fixes
].section
= section
;
5103 a8_fixes
[num_a8_fixes
].offset
= i
;
5104 a8_fixes
[num_a8_fixes
].addend
= offset
;
5105 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5106 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5107 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5108 a8_fixes
[num_a8_fixes
].branch_type
=
5109 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5116 i
+= insn_32bit
? 4 : 2;
5117 last_was_32bit
= insn_32bit
;
5118 last_was_branch
= is_32bit_branch
;
5122 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5126 *a8_fixes_p
= a8_fixes
;
5127 *num_a8_fixes_p
= num_a8_fixes
;
5128 *a8_fix_table_size_p
= a8_fix_table_size
;
5133 /* Determine and set the size of the stub section for a final link.
5135 The basic idea here is to examine all the relocations looking for
5136 PC-relative calls to a target that is unreachable with a "bl"
5140 elf32_arm_size_stubs (bfd
*output_bfd
,
5142 struct bfd_link_info
*info
,
5143 bfd_signed_vma group_size
,
5144 asection
* (*add_stub_section
) (const char *, asection
*,
5146 void (*layout_sections_again
) (void))
5148 bfd_size_type stub_group_size
;
5149 bfd_boolean stubs_always_after_branch
;
5150 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5151 struct a8_erratum_fix
*a8_fixes
= NULL
;
5152 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
5153 struct a8_erratum_reloc
*a8_relocs
= NULL
;
5154 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
5159 if (htab
->fix_cortex_a8
)
5161 a8_fixes
= (struct a8_erratum_fix
*)
5162 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
5163 a8_relocs
= (struct a8_erratum_reloc
*)
5164 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
5167 /* Propagate mach to stub bfd, because it may not have been
5168 finalized when we created stub_bfd. */
5169 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
5170 bfd_get_mach (output_bfd
));
5172 /* Stash our params away. */
5173 htab
->stub_bfd
= stub_bfd
;
5174 htab
->add_stub_section
= add_stub_section
;
5175 htab
->layout_sections_again
= layout_sections_again
;
5176 stubs_always_after_branch
= group_size
< 0;
5178 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5179 as the first half of a 32-bit branch straddling two 4K pages. This is a
5180 crude way of enforcing that. */
5181 if (htab
->fix_cortex_a8
)
5182 stubs_always_after_branch
= 1;
5185 stub_group_size
= -group_size
;
5187 stub_group_size
= group_size
;
5189 if (stub_group_size
== 1)
5191 /* Default values. */
5192 /* Thumb branch range is +-4MB has to be used as the default
5193 maximum size (a given section can contain both ARM and Thumb
5194 code, so the worst case has to be taken into account).
5196 This value is 24K less than that, which allows for 2025
5197 12-byte stubs. If we exceed that, then we will fail to link.
5198 The user will have to relink with an explicit group size
5200 stub_group_size
= 4170000;
5203 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
5205 /* If we're applying the cortex A8 fix, we need to determine the
5206 program header size now, because we cannot change it later --
5207 that could alter section placements. Notice the A8 erratum fix
5208 ends up requiring the section addresses to remain unchanged
5209 modulo the page size. That's something we cannot represent
5210 inside BFD, and we don't want to force the section alignment to
5211 be the page size. */
5212 if (htab
->fix_cortex_a8
)
5213 (*htab
->layout_sections_again
) ();
5218 unsigned int bfd_indx
;
5220 bfd_boolean stub_changed
= FALSE
;
5221 unsigned prev_num_a8_fixes
= num_a8_fixes
;
5224 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
5226 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
5228 Elf_Internal_Shdr
*symtab_hdr
;
5230 Elf_Internal_Sym
*local_syms
= NULL
;
5232 if (!is_arm_elf (input_bfd
))
5237 /* We'll need the symbol table in a second. */
5238 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5239 if (symtab_hdr
->sh_info
== 0)
5242 /* Walk over each section attached to the input bfd. */
5243 for (section
= input_bfd
->sections
;
5245 section
= section
->next
)
5247 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
5249 /* If there aren't any relocs, then there's nothing more
5251 if ((section
->flags
& SEC_RELOC
) == 0
5252 || section
->reloc_count
== 0
5253 || (section
->flags
& SEC_CODE
) == 0)
5256 /* If this section is a link-once section that will be
5257 discarded, then don't create any stubs. */
5258 if (section
->output_section
== NULL
5259 || section
->output_section
->owner
!= output_bfd
)
5262 /* Get the relocs. */
5264 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
5265 NULL
, info
->keep_memory
);
5266 if (internal_relocs
== NULL
)
5267 goto error_ret_free_local
;
5269 /* Now examine each relocation. */
5270 irela
= internal_relocs
;
5271 irelaend
= irela
+ section
->reloc_count
;
5272 for (; irela
< irelaend
; irela
++)
5274 unsigned int r_type
, r_indx
;
5275 enum elf32_arm_stub_type stub_type
;
5276 struct elf32_arm_stub_hash_entry
*stub_entry
;
5279 bfd_vma destination
;
5280 struct elf32_arm_link_hash_entry
*hash
;
5281 const char *sym_name
;
5283 const asection
*id_sec
;
5284 unsigned char st_type
;
5285 enum arm_st_branch_type branch_type
;
5286 bfd_boolean created_stub
= FALSE
;
5288 r_type
= ELF32_R_TYPE (irela
->r_info
);
5289 r_indx
= ELF32_R_SYM (irela
->r_info
);
5291 if (r_type
>= (unsigned int) R_ARM_max
)
5293 bfd_set_error (bfd_error_bad_value
);
5294 error_ret_free_internal
:
5295 if (elf_section_data (section
)->relocs
== NULL
)
5296 free (internal_relocs
);
5298 error_ret_free_local
:
5299 if (local_syms
!= NULL
5300 && (symtab_hdr
->contents
5301 != (unsigned char *) local_syms
))
5307 if (r_indx
>= symtab_hdr
->sh_info
)
5308 hash
= elf32_arm_hash_entry
5309 (elf_sym_hashes (input_bfd
)
5310 [r_indx
- symtab_hdr
->sh_info
]);
5312 /* Only look for stubs on branch instructions, or
5313 non-relaxed TLSCALL */
5314 if ((r_type
!= (unsigned int) R_ARM_CALL
)
5315 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
5316 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
5317 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
5318 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
5319 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
5320 && (r_type
!= (unsigned int) R_ARM_PLT32
)
5321 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
5322 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5323 && r_type
== elf32_arm_tls_transition
5324 (info
, r_type
, &hash
->root
)
5325 && ((hash
? hash
->tls_type
5326 : (elf32_arm_local_got_tls_type
5327 (input_bfd
)[r_indx
]))
5328 & GOT_TLS_GDESC
) != 0))
5331 /* Now determine the call target, its name, value,
5338 if (r_type
== (unsigned int) R_ARM_TLS_CALL
5339 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5341 /* A non-relaxed TLS call. The target is the
5342 plt-resident trampoline and nothing to do
5344 BFD_ASSERT (htab
->tls_trampoline
> 0);
5345 sym_sec
= htab
->root
.splt
;
5346 sym_value
= htab
->tls_trampoline
;
5349 branch_type
= ST_BRANCH_TO_ARM
;
5353 /* It's a local symbol. */
5354 Elf_Internal_Sym
*sym
;
5356 if (local_syms
== NULL
)
5359 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5360 if (local_syms
== NULL
)
5362 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5363 symtab_hdr
->sh_info
, 0,
5365 if (local_syms
== NULL
)
5366 goto error_ret_free_internal
;
5369 sym
= local_syms
+ r_indx
;
5370 if (sym
->st_shndx
== SHN_UNDEF
)
5371 sym_sec
= bfd_und_section_ptr
;
5372 else if (sym
->st_shndx
== SHN_ABS
)
5373 sym_sec
= bfd_abs_section_ptr
;
5374 else if (sym
->st_shndx
== SHN_COMMON
)
5375 sym_sec
= bfd_com_section_ptr
;
5378 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
5381 /* This is an undefined symbol. It can never
5385 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
5386 sym_value
= sym
->st_value
;
5387 destination
= (sym_value
+ irela
->r_addend
5388 + sym_sec
->output_offset
5389 + sym_sec
->output_section
->vma
);
5390 st_type
= ELF_ST_TYPE (sym
->st_info
);
5391 branch_type
= ARM_SYM_BRANCH_TYPE (sym
);
5393 = bfd_elf_string_from_elf_section (input_bfd
,
5394 symtab_hdr
->sh_link
,
5399 /* It's an external symbol. */
5400 while (hash
->root
.root
.type
== bfd_link_hash_indirect
5401 || hash
->root
.root
.type
== bfd_link_hash_warning
)
5402 hash
= ((struct elf32_arm_link_hash_entry
*)
5403 hash
->root
.root
.u
.i
.link
);
5405 if (hash
->root
.root
.type
== bfd_link_hash_defined
5406 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
5408 sym_sec
= hash
->root
.root
.u
.def
.section
;
5409 sym_value
= hash
->root
.root
.u
.def
.value
;
5411 struct elf32_arm_link_hash_table
*globals
=
5412 elf32_arm_hash_table (info
);
5414 /* For a destination in a shared library,
5415 use the PLT stub as target address to
5416 decide whether a branch stub is
5419 && globals
->root
.splt
!= NULL
5421 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5423 sym_sec
= globals
->root
.splt
;
5424 sym_value
= hash
->root
.plt
.offset
;
5425 if (sym_sec
->output_section
!= NULL
)
5426 destination
= (sym_value
5427 + sym_sec
->output_offset
5428 + sym_sec
->output_section
->vma
);
5430 else if (sym_sec
->output_section
!= NULL
)
5431 destination
= (sym_value
+ irela
->r_addend
5432 + sym_sec
->output_offset
5433 + sym_sec
->output_section
->vma
);
5435 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
5436 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
5438 /* For a shared library, use the PLT stub as
5439 target address to decide whether a long
5440 branch stub is needed.
5441 For absolute code, they cannot be handled. */
5442 struct elf32_arm_link_hash_table
*globals
=
5443 elf32_arm_hash_table (info
);
5446 && globals
->root
.splt
!= NULL
5448 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5450 sym_sec
= globals
->root
.splt
;
5451 sym_value
= hash
->root
.plt
.offset
;
5452 if (sym_sec
->output_section
!= NULL
)
5453 destination
= (sym_value
5454 + sym_sec
->output_offset
5455 + sym_sec
->output_section
->vma
);
5462 bfd_set_error (bfd_error_bad_value
);
5463 goto error_ret_free_internal
;
5465 st_type
= hash
->root
.type
;
5466 branch_type
= hash
->root
.target_internal
;
5467 sym_name
= hash
->root
.root
.root
.string
;
5472 /* Determine what (if any) linker stub is needed. */
5473 stub_type
= arm_type_of_stub (info
, section
, irela
,
5474 st_type
, &branch_type
,
5475 hash
, destination
, sym_sec
,
5476 input_bfd
, sym_name
);
5477 if (stub_type
== arm_stub_none
)
5480 /* Support for grouping stub sections. */
5481 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5483 /* Get the name of this stub. */
5484 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
,
5487 goto error_ret_free_internal
;
5489 /* We've either created a stub for this reloc already,
5490 or we are about to. */
5491 created_stub
= TRUE
;
5493 stub_entry
= arm_stub_hash_lookup
5494 (&htab
->stub_hash_table
, stub_name
,
5496 if (stub_entry
!= NULL
)
5498 /* The proper stub has already been created. */
5500 stub_entry
->target_value
= sym_value
;
5504 stub_entry
= elf32_arm_add_stub (stub_name
, section
,
5506 if (stub_entry
== NULL
)
5509 goto error_ret_free_internal
;
5512 stub_entry
->target_value
= sym_value
;
5513 stub_entry
->target_section
= sym_sec
;
5514 stub_entry
->stub_type
= stub_type
;
5515 stub_entry
->h
= hash
;
5516 stub_entry
->branch_type
= branch_type
;
5518 if (sym_name
== NULL
)
5519 sym_name
= "unnamed";
5520 stub_entry
->output_name
= (char *)
5521 bfd_alloc (htab
->stub_bfd
,
5522 sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5523 + strlen (sym_name
));
5524 if (stub_entry
->output_name
== NULL
)
5527 goto error_ret_free_internal
;
5530 /* For historical reasons, use the existing names for
5531 ARM-to-Thumb and Thumb-to-ARM stubs. */
5532 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5533 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5534 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5535 && branch_type
== ST_BRANCH_TO_ARM
)
5536 sprintf (stub_entry
->output_name
,
5537 THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5538 else if ((r_type
== (unsigned int) R_ARM_CALL
5539 || r_type
== (unsigned int) R_ARM_JUMP24
)
5540 && branch_type
== ST_BRANCH_TO_THUMB
)
5541 sprintf (stub_entry
->output_name
,
5542 ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5544 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
,
5547 stub_changed
= TRUE
;
5551 /* Look for relocations which might trigger Cortex-A8
5553 if (htab
->fix_cortex_a8
5554 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
5555 || r_type
== (unsigned int) R_ARM_THM_JUMP19
5556 || r_type
== (unsigned int) R_ARM_THM_CALL
5557 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
5559 bfd_vma from
= section
->output_section
->vma
5560 + section
->output_offset
5563 if ((from
& 0xfff) == 0xffe)
5565 /* Found a candidate. Note we haven't checked the
5566 destination is within 4K here: if we do so (and
5567 don't create an entry in a8_relocs) we can't tell
5568 that a branch should have been relocated when
5570 if (num_a8_relocs
== a8_reloc_table_size
)
5572 a8_reloc_table_size
*= 2;
5573 a8_relocs
= (struct a8_erratum_reloc
*)
5574 bfd_realloc (a8_relocs
,
5575 sizeof (struct a8_erratum_reloc
)
5576 * a8_reloc_table_size
);
5579 a8_relocs
[num_a8_relocs
].from
= from
;
5580 a8_relocs
[num_a8_relocs
].destination
= destination
;
5581 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
5582 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
5583 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
5584 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
5585 a8_relocs
[num_a8_relocs
].hash
= hash
;
5592 /* We're done with the internal relocs, free them. */
5593 if (elf_section_data (section
)->relocs
== NULL
)
5594 free (internal_relocs
);
5597 if (htab
->fix_cortex_a8
)
5599 /* Sort relocs which might apply to Cortex-A8 erratum. */
5600 qsort (a8_relocs
, num_a8_relocs
,
5601 sizeof (struct a8_erratum_reloc
),
5604 /* Scan for branches which might trigger Cortex-A8 erratum. */
5605 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
5606 &num_a8_fixes
, &a8_fix_table_size
,
5607 a8_relocs
, num_a8_relocs
,
5608 prev_num_a8_fixes
, &stub_changed
)
5610 goto error_ret_free_local
;
5614 if (prev_num_a8_fixes
!= num_a8_fixes
)
5615 stub_changed
= TRUE
;
5620 /* OK, we've added some stubs. Find out the new size of the
5622 for (stub_sec
= htab
->stub_bfd
->sections
;
5624 stub_sec
= stub_sec
->next
)
5626 /* Ignore non-stub sections. */
5627 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
5633 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
5635 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5636 if (htab
->fix_cortex_a8
)
5637 for (i
= 0; i
< num_a8_fixes
; i
++)
5639 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
5640 a8_fixes
[i
].section
, htab
);
5642 if (stub_sec
== NULL
)
5643 goto error_ret_free_local
;
5646 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
5651 /* Ask the linker to do its stuff. */
5652 (*htab
->layout_sections_again
) ();
5655 /* Add stubs for Cortex-A8 erratum fixes now. */
5656 if (htab
->fix_cortex_a8
)
5658 for (i
= 0; i
< num_a8_fixes
; i
++)
5660 struct elf32_arm_stub_hash_entry
*stub_entry
;
5661 char *stub_name
= a8_fixes
[i
].stub_name
;
5662 asection
*section
= a8_fixes
[i
].section
;
5663 unsigned int section_id
= a8_fixes
[i
].section
->id
;
5664 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
5665 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
5666 const insn_sequence
*template_sequence
;
5667 int template_size
, size
= 0;
5669 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
5671 if (stub_entry
== NULL
)
5673 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
5679 stub_entry
->stub_sec
= stub_sec
;
5680 stub_entry
->stub_offset
= 0;
5681 stub_entry
->id_sec
= link_sec
;
5682 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
5683 stub_entry
->target_section
= a8_fixes
[i
].section
;
5684 stub_entry
->target_value
= a8_fixes
[i
].offset
;
5685 stub_entry
->target_addend
= a8_fixes
[i
].addend
;
5686 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
5687 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
5689 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
5693 stub_entry
->stub_size
= size
;
5694 stub_entry
->stub_template
= template_sequence
;
5695 stub_entry
->stub_template_size
= template_size
;
5698 /* Stash the Cortex-A8 erratum fix array for use later in
5699 elf32_arm_write_section(). */
5700 htab
->a8_erratum_fixes
= a8_fixes
;
5701 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
5705 htab
->a8_erratum_fixes
= NULL
;
5706 htab
->num_a8_erratum_fixes
= 0;
5711 /* Build all the stubs associated with the current output file. The
5712 stubs are kept in a hash table attached to the main linker hash
5713 table. We also set up the .plt entries for statically linked PIC
5714 functions here. This function is called via arm_elf_finish in the
5718 elf32_arm_build_stubs (struct bfd_link_info
*info
)
5721 struct bfd_hash_table
*table
;
5722 struct elf32_arm_link_hash_table
*htab
;
5724 htab
= elf32_arm_hash_table (info
);
5728 for (stub_sec
= htab
->stub_bfd
->sections
;
5730 stub_sec
= stub_sec
->next
)
5734 /* Ignore non-stub sections. */
5735 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
5738 /* Allocate memory to hold the linker stubs. */
5739 size
= stub_sec
->size
;
5740 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
5741 if (stub_sec
->contents
== NULL
&& size
!= 0)
5746 /* Build the stubs as directed by the stub hash table. */
5747 table
= &htab
->stub_hash_table
;
5748 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
5749 if (htab
->fix_cortex_a8
)
5751 /* Place the cortex a8 stubs last. */
5752 htab
->fix_cortex_a8
= -1;
5753 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
5759 /* Locate the Thumb encoded calling stub for NAME. */
5761 static struct elf_link_hash_entry
*
5762 find_thumb_glue (struct bfd_link_info
*link_info
,
5764 char **error_message
)
5767 struct elf_link_hash_entry
*hash
;
5768 struct elf32_arm_link_hash_table
*hash_table
;
5770 /* We need a pointer to the armelf specific hash table. */
5771 hash_table
= elf32_arm_hash_table (link_info
);
5772 if (hash_table
== NULL
)
5775 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5776 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
5778 BFD_ASSERT (tmp_name
);
5780 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
5782 hash
= elf_link_hash_lookup
5783 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5786 && asprintf (error_message
, _("unable to find THUMB glue '%s' for '%s'"),
5787 tmp_name
, name
) == -1)
5788 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
5795 /* Locate the ARM encoded calling stub for NAME. */
5797 static struct elf_link_hash_entry
*
5798 find_arm_glue (struct bfd_link_info
*link_info
,
5800 char **error_message
)
5803 struct elf_link_hash_entry
*myh
;
5804 struct elf32_arm_link_hash_table
*hash_table
;
5806 /* We need a pointer to the elfarm specific hash table. */
5807 hash_table
= elf32_arm_hash_table (link_info
);
5808 if (hash_table
== NULL
)
5811 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5812 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
5814 BFD_ASSERT (tmp_name
);
5816 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
5818 myh
= elf_link_hash_lookup
5819 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5822 && asprintf (error_message
, _("unable to find ARM glue '%s' for '%s'"),
5823 tmp_name
, name
) == -1)
5824 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
5831 /* ARM->Thumb glue (static images):
5835 ldr r12, __func_addr
5838 .word func @ behave as if you saw a ARM_32 reloc.
5845 .word func @ behave as if you saw a ARM_32 reloc.
5847 (relocatable images)
5850 ldr r12, __func_offset
5856 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5857 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
5858 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
5859 static const insn32 a2t3_func_addr_insn
= 0x00000001;
5861 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5862 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
5863 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
5865 #define ARM2THUMB_PIC_GLUE_SIZE 16
5866 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
5867 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
5868 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
5870 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5874 __func_from_thumb: __func_from_thumb:
5876 nop ldr r6, __func_addr
5886 #define THUMB2ARM_GLUE_SIZE 8
5887 static const insn16 t2a1_bx_pc_insn
= 0x4778;
5888 static const insn16 t2a2_noop_insn
= 0x46c0;
5889 static const insn32 t2a3_b_insn
= 0xea000000;
5891 #define VFP11_ERRATUM_VENEER_SIZE 8
5892 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5893 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5895 #define ARM_BX_VENEER_SIZE 12
5896 static const insn32 armbx1_tst_insn
= 0xe3100001;
5897 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
5898 static const insn32 armbx3_bx_insn
= 0xe12fff10;
5900 #ifndef ELFARM_NABI_C_INCLUDED
5902 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
5905 bfd_byte
* contents
;
5909 /* Do not include empty glue sections in the output. */
5912 s
= bfd_get_linker_section (abfd
, name
);
5914 s
->flags
|= SEC_EXCLUDE
;
5919 BFD_ASSERT (abfd
!= NULL
);
5921 s
= bfd_get_linker_section (abfd
, name
);
5922 BFD_ASSERT (s
!= NULL
);
5924 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
5926 BFD_ASSERT (s
->size
== size
);
5927 s
->contents
= contents
;
5931 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
5933 struct elf32_arm_link_hash_table
* globals
;
5935 globals
= elf32_arm_hash_table (info
);
5936 BFD_ASSERT (globals
!= NULL
);
5938 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5939 globals
->arm_glue_size
,
5940 ARM2THUMB_GLUE_SECTION_NAME
);
5942 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5943 globals
->thumb_glue_size
,
5944 THUMB2ARM_GLUE_SECTION_NAME
);
5946 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5947 globals
->vfp11_erratum_glue_size
,
5948 VFP11_ERRATUM_VENEER_SECTION_NAME
);
5950 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5951 globals
->stm32l4xx_erratum_glue_size
,
5952 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
5954 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5955 globals
->bx_glue_size
,
5956 ARM_BX_GLUE_SECTION_NAME
);
5961 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5962 returns the symbol identifying the stub. */
5964 static struct elf_link_hash_entry
*
5965 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
5966 struct elf_link_hash_entry
* h
)
5968 const char * name
= h
->root
.root
.string
;
5971 struct elf_link_hash_entry
* myh
;
5972 struct bfd_link_hash_entry
* bh
;
5973 struct elf32_arm_link_hash_table
* globals
;
5977 globals
= elf32_arm_hash_table (link_info
);
5978 BFD_ASSERT (globals
!= NULL
);
5979 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
5981 s
= bfd_get_linker_section
5982 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
5984 BFD_ASSERT (s
!= NULL
);
5986 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5987 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
5989 BFD_ASSERT (tmp_name
);
5991 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
5993 myh
= elf_link_hash_lookup
5994 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5998 /* We've already seen this guy. */
6003 /* The only trick here is using hash_table->arm_glue_size as the value.
6004 Even though the section isn't allocated yet, this is where we will be
6005 putting it. The +1 on the value marks that the stub has not been
6006 output yet - not that it is a Thumb function. */
6008 val
= globals
->arm_glue_size
+ 1;
6009 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6010 tmp_name
, BSF_GLOBAL
, s
, val
,
6011 NULL
, TRUE
, FALSE
, &bh
);
6013 myh
= (struct elf_link_hash_entry
*) bh
;
6014 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6015 myh
->forced_local
= 1;
6019 if (bfd_link_pic (link_info
)
6020 || globals
->root
.is_relocatable_executable
6021 || globals
->pic_veneer
)
6022 size
= ARM2THUMB_PIC_GLUE_SIZE
;
6023 else if (globals
->use_blx
)
6024 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
6026 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
6029 globals
->arm_glue_size
+= size
;
6034 /* Allocate space for ARMv4 BX veneers. */
6037 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
6040 struct elf32_arm_link_hash_table
*globals
;
6042 struct elf_link_hash_entry
*myh
;
6043 struct bfd_link_hash_entry
*bh
;
6046 /* BX PC does not need a veneer. */
6050 globals
= elf32_arm_hash_table (link_info
);
6051 BFD_ASSERT (globals
!= NULL
);
6052 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6054 /* Check if this veneer has already been allocated. */
6055 if (globals
->bx_glue_offset
[reg
])
6058 s
= bfd_get_linker_section
6059 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
6061 BFD_ASSERT (s
!= NULL
);
6063 /* Add symbol for veneer. */
6065 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
6067 BFD_ASSERT (tmp_name
);
6069 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
6071 myh
= elf_link_hash_lookup
6072 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6074 BFD_ASSERT (myh
== NULL
);
6077 val
= globals
->bx_glue_size
;
6078 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6079 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6080 NULL
, TRUE
, FALSE
, &bh
);
6082 myh
= (struct elf_link_hash_entry
*) bh
;
6083 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6084 myh
->forced_local
= 1;
6086 s
->size
+= ARM_BX_VENEER_SIZE
;
6087 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
6088 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
6092 /* Add an entry to the code/data map for section SEC. */
6095 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
6097 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
6098 unsigned int newidx
;
6100 if (sec_data
->map
== NULL
)
6102 sec_data
->map
= (elf32_arm_section_map
*)
6103 bfd_malloc (sizeof (elf32_arm_section_map
));
6104 sec_data
->mapcount
= 0;
6105 sec_data
->mapsize
= 1;
6108 newidx
= sec_data
->mapcount
++;
6110 if (sec_data
->mapcount
> sec_data
->mapsize
)
6112 sec_data
->mapsize
*= 2;
6113 sec_data
->map
= (elf32_arm_section_map
*)
6114 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
6115 * sizeof (elf32_arm_section_map
));
6120 sec_data
->map
[newidx
].vma
= vma
;
6121 sec_data
->map
[newidx
].type
= type
;
6126 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6127 veneers are handled for now. */
6130 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
6131 elf32_vfp11_erratum_list
*branch
,
6133 asection
*branch_sec
,
6134 unsigned int offset
)
6137 struct elf32_arm_link_hash_table
*hash_table
;
6139 struct elf_link_hash_entry
*myh
;
6140 struct bfd_link_hash_entry
*bh
;
6142 struct _arm_elf_section_data
*sec_data
;
6143 elf32_vfp11_erratum_list
*newerr
;
6145 hash_table
= elf32_arm_hash_table (link_info
);
6146 BFD_ASSERT (hash_table
!= NULL
);
6147 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
6149 s
= bfd_get_linker_section
6150 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
6152 sec_data
= elf32_arm_section_data (s
);
6154 BFD_ASSERT (s
!= NULL
);
6156 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6157 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6159 BFD_ASSERT (tmp_name
);
6161 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
6162 hash_table
->num_vfp11_fixes
);
6164 myh
= elf_link_hash_lookup
6165 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6167 BFD_ASSERT (myh
== NULL
);
6170 val
= hash_table
->vfp11_erratum_glue_size
;
6171 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
6172 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6173 NULL
, TRUE
, FALSE
, &bh
);
6175 myh
= (struct elf_link_hash_entry
*) bh
;
6176 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6177 myh
->forced_local
= 1;
6179 /* Link veneer back to calling location. */
6180 sec_data
->erratumcount
+= 1;
6181 newerr
= (elf32_vfp11_erratum_list
*)
6182 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
6184 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
6186 newerr
->u
.v
.branch
= branch
;
6187 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
6188 branch
->u
.b
.veneer
= newerr
;
6190 newerr
->next
= sec_data
->erratumlist
;
6191 sec_data
->erratumlist
= newerr
;
6193 /* A symbol for the return from the veneer. */
6194 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
6195 hash_table
->num_vfp11_fixes
);
6197 myh
= elf_link_hash_lookup
6198 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6205 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
6206 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
6208 myh
= (struct elf_link_hash_entry
*) bh
;
6209 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6210 myh
->forced_local
= 1;
6214 /* Generate a mapping symbol for the veneer section, and explicitly add an
6215 entry for that symbol to the code/data map for the section. */
6216 if (hash_table
->vfp11_erratum_glue_size
== 0)
6219 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6220 ever requires this erratum fix. */
6221 _bfd_generic_link_add_one_symbol (link_info
,
6222 hash_table
->bfd_of_glue_owner
, "$a",
6223 BSF_LOCAL
, s
, 0, NULL
,
6226 myh
= (struct elf_link_hash_entry
*) bh
;
6227 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
6228 myh
->forced_local
= 1;
6230 /* The elf32_arm_init_maps function only cares about symbols from input
6231 BFDs. We must make a note of this generated mapping symbol
6232 ourselves so that code byteswapping works properly in
6233 elf32_arm_write_section. */
6234 elf32_arm_section_map_add (s
, 'a', 0);
6237 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
6238 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
6239 hash_table
->num_vfp11_fixes
++;
6241 /* The offset of the veneer. */
6245 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6246 veneers need to be handled because used only in Cortex-M. */
6249 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
6250 elf32_stm32l4xx_erratum_list
*branch
,
6252 asection
*branch_sec
,
6253 unsigned int offset
,
6254 bfd_size_type veneer_size
)
6257 struct elf32_arm_link_hash_table
*hash_table
;
6259 struct elf_link_hash_entry
*myh
;
6260 struct bfd_link_hash_entry
*bh
;
6262 struct _arm_elf_section_data
*sec_data
;
6263 elf32_stm32l4xx_erratum_list
*newerr
;
6265 hash_table
= elf32_arm_hash_table (link_info
);
6266 BFD_ASSERT (hash_table
!= NULL
);
6267 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
6269 s
= bfd_get_linker_section
6270 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6272 BFD_ASSERT (s
!= NULL
);
6274 sec_data
= elf32_arm_section_data (s
);
6276 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6277 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6279 BFD_ASSERT (tmp_name
);
6281 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
6282 hash_table
->num_stm32l4xx_fixes
);
6284 myh
= elf_link_hash_lookup
6285 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6287 BFD_ASSERT (myh
== NULL
);
6290 val
= hash_table
->stm32l4xx_erratum_glue_size
;
6291 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
6292 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6293 NULL
, TRUE
, FALSE
, &bh
);
6295 myh
= (struct elf_link_hash_entry
*) bh
;
6296 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6297 myh
->forced_local
= 1;
6299 /* Link veneer back to calling location. */
6300 sec_data
->stm32l4xx_erratumcount
+= 1;
6301 newerr
= (elf32_stm32l4xx_erratum_list
*)
6302 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
6304 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
6306 newerr
->u
.v
.branch
= branch
;
6307 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
6308 branch
->u
.b
.veneer
= newerr
;
6310 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
6311 sec_data
->stm32l4xx_erratumlist
= newerr
;
6313 /* A symbol for the return from the veneer. */
6314 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
6315 hash_table
->num_stm32l4xx_fixes
);
6317 myh
= elf_link_hash_lookup
6318 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6325 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
6326 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
6328 myh
= (struct elf_link_hash_entry
*) bh
;
6329 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6330 myh
->forced_local
= 1;
6334 /* Generate a mapping symbol for the veneer section, and explicitly add an
6335 entry for that symbol to the code/data map for the section. */
6336 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
6339 /* Creates a THUMB symbol since there is no other choice. */
6340 _bfd_generic_link_add_one_symbol (link_info
,
6341 hash_table
->bfd_of_glue_owner
, "$t",
6342 BSF_LOCAL
, s
, 0, NULL
,
6345 myh
= (struct elf_link_hash_entry
*) bh
;
6346 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
6347 myh
->forced_local
= 1;
6349 /* The elf32_arm_init_maps function only cares about symbols from input
6350 BFDs. We must make a note of this generated mapping symbol
6351 ourselves so that code byteswapping works properly in
6352 elf32_arm_write_section. */
6353 elf32_arm_section_map_add (s
, 't', 0);
6356 s
->size
+= veneer_size
;
6357 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
6358 hash_table
->num_stm32l4xx_fixes
++;
6360 /* The offset of the veneer. */
6364 #define ARM_GLUE_SECTION_FLAGS \
6365 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6366 | SEC_READONLY | SEC_LINKER_CREATED)
6368 /* Create a fake section for use by the ARM backend of the linker. */
6371 arm_make_glue_section (bfd
* abfd
, const char * name
)
6375 sec
= bfd_get_linker_section (abfd
, name
);
6380 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
6383 || !bfd_set_section_alignment (abfd
, sec
, 2))
6386 /* Set the gc mark to prevent the section from being removed by garbage
6387 collection, despite the fact that no relocs refer to this section. */
6393 /* Set size of .plt entries. This function is called from the
6394 linker scripts in ld/emultempl/{armelf}.em. */
6397 bfd_elf32_arm_use_long_plt (void)
6399 elf32_arm_use_long_plt_entry
= TRUE
;
6402 /* Add the glue sections to ABFD. This function is called from the
6403 linker scripts in ld/emultempl/{armelf}.em. */
6406 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
6407 struct bfd_link_info
*info
)
6409 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
6410 bfd_boolean dostm32l4xx
= globals
6411 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
6412 bfd_boolean addglue
;
6414 /* If we are only performing a partial
6415 link do not bother adding the glue. */
6416 if (bfd_link_relocatable (info
))
6419 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
6420 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
6421 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
6422 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
6428 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6431 /* Select a BFD to be used to hold the sections used by the glue code.
6432 This function is called from the linker scripts in ld/emultempl/
6436 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
6438 struct elf32_arm_link_hash_table
*globals
;
6440 /* If we are only performing a partial link
6441 do not bother getting a bfd to hold the glue. */
6442 if (bfd_link_relocatable (info
))
6445 /* Make sure we don't attach the glue sections to a dynamic object. */
6446 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
6448 globals
= elf32_arm_hash_table (info
);
6449 BFD_ASSERT (globals
!= NULL
);
6451 if (globals
->bfd_of_glue_owner
!= NULL
)
6454 /* Save the bfd for later use. */
6455 globals
->bfd_of_glue_owner
= abfd
;
6461 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
6465 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
6468 if (globals
->fix_arm1176
)
6470 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
6471 globals
->use_blx
= 1;
6475 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
6476 globals
->use_blx
= 1;
6481 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
6482 struct bfd_link_info
*link_info
)
6484 Elf_Internal_Shdr
*symtab_hdr
;
6485 Elf_Internal_Rela
*internal_relocs
= NULL
;
6486 Elf_Internal_Rela
*irel
, *irelend
;
6487 bfd_byte
*contents
= NULL
;
6490 struct elf32_arm_link_hash_table
*globals
;
6492 /* If we are only performing a partial link do not bother
6493 to construct any glue. */
6494 if (bfd_link_relocatable (link_info
))
6497 /* Here we have a bfd that is to be included on the link. We have a
6498 hook to do reloc rummaging, before section sizes are nailed down. */
6499 globals
= elf32_arm_hash_table (link_info
);
6500 BFD_ASSERT (globals
!= NULL
);
6502 check_use_blx (globals
);
6504 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
6506 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6511 /* PR 5398: If we have not decided to include any loadable sections in
6512 the output then we will not have a glue owner bfd. This is OK, it
6513 just means that there is nothing else for us to do here. */
6514 if (globals
->bfd_of_glue_owner
== NULL
)
6517 /* Rummage around all the relocs and map the glue vectors. */
6518 sec
= abfd
->sections
;
6523 for (; sec
!= NULL
; sec
= sec
->next
)
6525 if (sec
->reloc_count
== 0)
6528 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
6531 symtab_hdr
= & elf_symtab_hdr (abfd
);
6533 /* Load the relocs. */
6535 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
6537 if (internal_relocs
== NULL
)
6540 irelend
= internal_relocs
+ sec
->reloc_count
;
6541 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
6544 unsigned long r_index
;
6546 struct elf_link_hash_entry
*h
;
6548 r_type
= ELF32_R_TYPE (irel
->r_info
);
6549 r_index
= ELF32_R_SYM (irel
->r_info
);
6551 /* These are the only relocation types we care about. */
6552 if ( r_type
!= R_ARM_PC24
6553 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
6556 /* Get the section contents if we haven't done so already. */
6557 if (contents
== NULL
)
6559 /* Get cached copy if it exists. */
6560 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
6561 contents
= elf_section_data (sec
)->this_hdr
.contents
;
6564 /* Go get them off disk. */
6565 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
6570 if (r_type
== R_ARM_V4BX
)
6574 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
6575 record_arm_bx_glue (link_info
, reg
);
6579 /* If the relocation is not against a symbol it cannot concern us. */
6582 /* We don't care about local symbols. */
6583 if (r_index
< symtab_hdr
->sh_info
)
6586 /* This is an external symbol. */
6587 r_index
-= symtab_hdr
->sh_info
;
6588 h
= (struct elf_link_hash_entry
*)
6589 elf_sym_hashes (abfd
)[r_index
];
6591 /* If the relocation is against a static symbol it must be within
6592 the current section and so cannot be a cross ARM/Thumb relocation. */
6596 /* If the call will go through a PLT entry then we do not need
6598 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
6604 /* This one is a call from arm code. We need to look up
6605 the target of the call. If it is a thumb target, we
6607 if (h
->target_internal
== ST_BRANCH_TO_THUMB
)
6608 record_arm_to_thumb_glue (link_info
, h
);
6616 if (contents
!= NULL
6617 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6621 if (internal_relocs
!= NULL
6622 && elf_section_data (sec
)->relocs
!= internal_relocs
)
6623 free (internal_relocs
);
6624 internal_relocs
= NULL
;
6630 if (contents
!= NULL
6631 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6633 if (internal_relocs
!= NULL
6634 && elf_section_data (sec
)->relocs
!= internal_relocs
)
6635 free (internal_relocs
);
6642 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6645 bfd_elf32_arm_init_maps (bfd
*abfd
)
6647 Elf_Internal_Sym
*isymbuf
;
6648 Elf_Internal_Shdr
*hdr
;
6649 unsigned int i
, localsyms
;
6651 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6652 if (! is_arm_elf (abfd
))
6655 if ((abfd
->flags
& DYNAMIC
) != 0)
6658 hdr
= & elf_symtab_hdr (abfd
);
6659 localsyms
= hdr
->sh_info
;
6661 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6662 should contain the number of local symbols, which should come before any
6663 global symbols. Mapping symbols are always local. */
6664 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
6667 /* No internal symbols read? Skip this BFD. */
6668 if (isymbuf
== NULL
)
6671 for (i
= 0; i
< localsyms
; i
++)
6673 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
6674 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
6678 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
6680 name
= bfd_elf_string_from_elf_section (abfd
,
6681 hdr
->sh_link
, isym
->st_name
);
6683 if (bfd_is_arm_special_symbol_name (name
,
6684 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
6685 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
6691 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6692 say what they wanted. */
6695 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6697 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6698 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6700 if (globals
== NULL
)
6703 if (globals
->fix_cortex_a8
== -1)
6705 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6706 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
6707 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
6708 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
6709 globals
->fix_cortex_a8
= 1;
6711 globals
->fix_cortex_a8
= 0;
6717 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6719 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6720 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6722 if (globals
== NULL
)
6724 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6725 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
6727 switch (globals
->vfp11_fix
)
6729 case BFD_ARM_VFP11_FIX_DEFAULT
:
6730 case BFD_ARM_VFP11_FIX_NONE
:
6731 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
6735 /* Give a warning, but do as the user requests anyway. */
6736 (*_bfd_error_handler
) (_("%B: warning: selected VFP11 erratum "
6737 "workaround is not necessary for target architecture"), obfd
);
6740 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
6741 /* For earlier architectures, we might need the workaround, but do not
6742 enable it by default. If users is running with broken hardware, they
6743 must enable the erratum fix explicitly. */
6744 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
6748 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6750 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6751 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6753 if (globals
== NULL
)
6756 /* We assume only Cortex-M4 may require the fix. */
6757 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
6758 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
6760 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
6761 /* Give a warning, but do as the user requests anyway. */
6762 (*_bfd_error_handler
)
6763 (_("%B: warning: selected STM32L4XX erratum "
6764 "workaround is not necessary for target architecture"), obfd
);
6768 enum bfd_arm_vfp11_pipe
6776 /* Return a VFP register number. This is encoded as RX:X for single-precision
6777 registers, or X:RX for double-precision registers, where RX is the group of
6778 four bits in the instruction encoding and X is the single extension bit.
6779 RX and X fields are specified using their lowest (starting) bit. The return
6782 0...31: single-precision registers s0...s31
6783 32...63: double-precision registers d0...d31.
6785 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6786 encounter VFP3 instructions, so we allow the full range for DP registers. */
6789 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
6793 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
6795 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
6798 /* Set bits in *WMASK according to a register number REG as encoded by
6799 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6802 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
6807 *wmask
|= 3 << ((reg
- 32) * 2);
6810 /* Return TRUE if WMASK overwrites anything in REGS. */
6813 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
6817 for (i
= 0; i
< numregs
; i
++)
6819 unsigned int reg
= regs
[i
];
6821 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
6829 if ((wmask
& (3 << (reg
* 2))) != 0)
6836 /* In this function, we're interested in two things: finding input registers
6837 for VFP data-processing instructions, and finding the set of registers which
6838 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6839 hold the written set, so FLDM etc. are easy to deal with (we're only
6840 interested in 32 SP registers or 16 dp registers, due to the VFP version
6841 implemented by the chip in question). DP registers are marked by setting
6842 both SP registers in the write mask). */
6844 static enum bfd_arm_vfp11_pipe
6845 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
6848 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
6849 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
6851 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6854 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
6855 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
6857 pqrs
= ((insn
& 0x00800000) >> 20)
6858 | ((insn
& 0x00300000) >> 19)
6859 | ((insn
& 0x00000040) >> 6);
6863 case 0: /* fmac[sd]. */
6864 case 1: /* fnmac[sd]. */
6865 case 2: /* fmsc[sd]. */
6866 case 3: /* fnmsc[sd]. */
6868 bfd_arm_vfp11_write_mask (destmask
, fd
);
6870 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
6875 case 4: /* fmul[sd]. */
6876 case 5: /* fnmul[sd]. */
6877 case 6: /* fadd[sd]. */
6878 case 7: /* fsub[sd]. */
6882 case 8: /* fdiv[sd]. */
6885 bfd_arm_vfp11_write_mask (destmask
, fd
);
6886 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
6891 case 15: /* extended opcode. */
6893 unsigned int extn
= ((insn
>> 15) & 0x1e)
6894 | ((insn
>> 7) & 1);
6898 case 0: /* fcpy[sd]. */
6899 case 1: /* fabs[sd]. */
6900 case 2: /* fneg[sd]. */
6901 case 8: /* fcmp[sd]. */
6902 case 9: /* fcmpe[sd]. */
6903 case 10: /* fcmpz[sd]. */
6904 case 11: /* fcmpez[sd]. */
6905 case 16: /* fuito[sd]. */
6906 case 17: /* fsito[sd]. */
6907 case 24: /* ftoui[sd]. */
6908 case 25: /* ftouiz[sd]. */
6909 case 26: /* ftosi[sd]. */
6910 case 27: /* ftosiz[sd]. */
6911 /* These instructions will not bounce due to underflow. */
6916 case 3: /* fsqrt[sd]. */
6917 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6918 registers to cause the erratum in previous instructions. */
6919 bfd_arm_vfp11_write_mask (destmask
, fd
);
6923 case 15: /* fcvt{ds,sd}. */
6927 bfd_arm_vfp11_write_mask (destmask
, fd
);
6929 /* Only FCVTSD can underflow. */
6930 if ((insn
& 0x100) != 0)
6949 /* Two-register transfer. */
6950 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
6952 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
6954 if ((insn
& 0x100000) == 0)
6957 bfd_arm_vfp11_write_mask (destmask
, fm
);
6960 bfd_arm_vfp11_write_mask (destmask
, fm
);
6961 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
6967 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
6969 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
6970 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
6974 case 0: /* Two-reg transfer. We should catch these above. */
6977 case 2: /* fldm[sdx]. */
6981 unsigned int i
, offset
= insn
& 0xff;
6986 for (i
= fd
; i
< fd
+ offset
; i
++)
6987 bfd_arm_vfp11_write_mask (destmask
, i
);
6991 case 4: /* fld[sd]. */
6993 bfd_arm_vfp11_write_mask (destmask
, fd
);
7002 /* Single-register transfer. Note L==0. */
7003 else if ((insn
& 0x0f100e10) == 0x0e000a10)
7005 unsigned int opcode
= (insn
>> 21) & 7;
7006 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
7010 case 0: /* fmsr/fmdlr. */
7011 case 1: /* fmdhr. */
7012 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7013 destination register. I don't know if this is exactly right,
7014 but it is the conservative choice. */
7015 bfd_arm_vfp11_write_mask (destmask
, fn
);
7029 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
7032 /* Look for potentially-troublesome code sequences which might trigger the
7033 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7034 (available from ARM) for details of the erratum. A short version is
7035 described in ld.texinfo. */
7038 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
7041 bfd_byte
*contents
= NULL
;
7043 int regs
[3], numregs
= 0;
7044 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7045 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
7047 if (globals
== NULL
)
7050 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7051 The states transition as follows:
7053 0 -> 1 (vector) or 0 -> 2 (scalar)
7054 A VFP FMAC-pipeline instruction has been seen. Fill
7055 regs[0]..regs[numregs-1] with its input operands. Remember this
7056 instruction in 'first_fmac'.
7059 Any instruction, except for a VFP instruction which overwrites
7064 A VFP instruction has been seen which overwrites any of regs[*].
7065 We must make a veneer! Reset state to 0 before examining next
7069 If we fail to match anything in state 2, reset to state 0 and reset
7070 the instruction pointer to the instruction after 'first_fmac'.
7072 If the VFP11 vector mode is in use, there must be at least two unrelated
7073 instructions between anti-dependent VFP11 instructions to properly avoid
7074 triggering the erratum, hence the use of the extra state 1. */
7076 /* If we are only performing a partial link do not bother
7077 to construct any glue. */
7078 if (bfd_link_relocatable (link_info
))
7081 /* Skip if this bfd does not correspond to an ELF image. */
7082 if (! is_arm_elf (abfd
))
7085 /* We should have chosen a fix type by the time we get here. */
7086 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
7088 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
7091 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7092 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
7095 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7097 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
7098 struct _arm_elf_section_data
*sec_data
;
7100 /* If we don't have executable progbits, we're not interested in this
7101 section. Also skip if section is to be excluded. */
7102 if (elf_section_type (sec
) != SHT_PROGBITS
7103 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
7104 || (sec
->flags
& SEC_EXCLUDE
) != 0
7105 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
7106 || sec
->output_section
== bfd_abs_section_ptr
7107 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
7110 sec_data
= elf32_arm_section_data (sec
);
7112 if (sec_data
->mapcount
== 0)
7115 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7116 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7117 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7120 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
7121 elf32_arm_compare_mapping
);
7123 for (span
= 0; span
< sec_data
->mapcount
; span
++)
7125 unsigned int span_start
= sec_data
->map
[span
].vma
;
7126 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
7127 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
7128 char span_type
= sec_data
->map
[span
].type
;
7130 /* FIXME: Only ARM mode is supported at present. We may need to
7131 support Thumb-2 mode also at some point. */
7132 if (span_type
!= 'a')
7135 for (i
= span_start
; i
< span_end
;)
7137 unsigned int next_i
= i
+ 4;
7138 unsigned int insn
= bfd_big_endian (abfd
)
7139 ? (contents
[i
] << 24)
7140 | (contents
[i
+ 1] << 16)
7141 | (contents
[i
+ 2] << 8)
7143 : (contents
[i
+ 3] << 24)
7144 | (contents
[i
+ 2] << 16)
7145 | (contents
[i
+ 1] << 8)
7147 unsigned int writemask
= 0;
7148 enum bfd_arm_vfp11_pipe vpipe
;
7153 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
7155 /* I'm assuming the VFP11 erratum can trigger with denorm
7156 operands on either the FMAC or the DS pipeline. This might
7157 lead to slightly overenthusiastic veneer insertion. */
7158 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
7160 state
= use_vector
? 1 : 2;
7162 veneer_of_insn
= insn
;
7168 int other_regs
[3], other_numregs
;
7169 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
7172 if (vpipe
!= VFP11_BAD
7173 && bfd_arm_vfp11_antidependency (writemask
, regs
,
7183 int other_regs
[3], other_numregs
;
7184 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
7187 if (vpipe
!= VFP11_BAD
7188 && bfd_arm_vfp11_antidependency (writemask
, regs
,
7194 next_i
= first_fmac
+ 4;
7200 abort (); /* Should be unreachable. */
7205 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
7206 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7208 elf32_arm_section_data (sec
)->erratumcount
+= 1;
7210 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
7215 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
7222 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
7227 newerr
->next
= sec_data
->erratumlist
;
7228 sec_data
->erratumlist
= newerr
;
7237 if (contents
!= NULL
7238 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7246 if (contents
!= NULL
7247 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7253 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7254 after sections have been laid out, using specially-named symbols. */
7257 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
7258 struct bfd_link_info
*link_info
)
7261 struct elf32_arm_link_hash_table
*globals
;
7264 if (bfd_link_relocatable (link_info
))
7267 /* Skip if this bfd does not correspond to an ELF image. */
7268 if (! is_arm_elf (abfd
))
7271 globals
= elf32_arm_hash_table (link_info
);
7272 if (globals
== NULL
)
7275 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7276 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7278 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7280 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7281 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
7283 for (; errnode
!= NULL
; errnode
= errnode
->next
)
7285 struct elf_link_hash_entry
*myh
;
7288 switch (errnode
->type
)
7290 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
7291 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
7292 /* Find veneer symbol. */
7293 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7294 errnode
->u
.b
.veneer
->u
.v
.id
);
7296 myh
= elf_link_hash_lookup
7297 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7300 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
7301 "`%s'"), abfd
, tmp_name
);
7303 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7304 + myh
->root
.u
.def
.section
->output_offset
7305 + myh
->root
.u
.def
.value
;
7307 errnode
->u
.b
.veneer
->vma
= vma
;
7310 case VFP11_ERRATUM_ARM_VENEER
:
7311 case VFP11_ERRATUM_THUMB_VENEER
:
7312 /* Find return location. */
7313 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7316 myh
= elf_link_hash_lookup
7317 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7320 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
7321 "`%s'"), abfd
, tmp_name
);
7323 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7324 + myh
->root
.u
.def
.section
->output_offset
7325 + myh
->root
.u
.def
.value
;
7327 errnode
->u
.v
.branch
->vma
= vma
;
7339 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7340 return locations after sections have been laid out, using
7341 specially-named symbols. */
7344 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
7345 struct bfd_link_info
*link_info
)
7348 struct elf32_arm_link_hash_table
*globals
;
7351 if (bfd_link_relocatable (link_info
))
7354 /* Skip if this bfd does not correspond to an ELF image. */
7355 if (! is_arm_elf (abfd
))
7358 globals
= elf32_arm_hash_table (link_info
);
7359 if (globals
== NULL
)
7362 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7363 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7365 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7367 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7368 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
7370 for (; errnode
!= NULL
; errnode
= errnode
->next
)
7372 struct elf_link_hash_entry
*myh
;
7375 switch (errnode
->type
)
7377 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
7378 /* Find veneer symbol. */
7379 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7380 errnode
->u
.b
.veneer
->u
.v
.id
);
7382 myh
= elf_link_hash_lookup
7383 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7386 (*_bfd_error_handler
) (_("%B: unable to find STM32L4XX veneer "
7387 "`%s'"), abfd
, tmp_name
);
7389 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7390 + myh
->root
.u
.def
.section
->output_offset
7391 + myh
->root
.u
.def
.value
;
7393 errnode
->u
.b
.veneer
->vma
= vma
;
7396 case STM32L4XX_ERRATUM_VENEER
:
7397 /* Find return location. */
7398 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7401 myh
= elf_link_hash_lookup
7402 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7405 (*_bfd_error_handler
) (_("%B: unable to find STM32L4XX veneer "
7406 "`%s'"), abfd
, tmp_name
);
7408 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7409 + myh
->root
.u
.def
.section
->output_offset
7410 + myh
->root
.u
.def
.value
;
7412 errnode
->u
.v
.branch
->vma
= vma
;
7424 static inline bfd_boolean
7425 is_thumb2_ldmia (const insn32 insn
)
7427 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7428 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7429 return (insn
& 0xffd02000) == 0xe8900000;
7432 static inline bfd_boolean
7433 is_thumb2_ldmdb (const insn32 insn
)
7435 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7436 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7437 return (insn
& 0xffd02000) == 0xe9100000;
7440 static inline bfd_boolean
7441 is_thumb2_vldm (const insn32 insn
)
7443 /* A6.5 Extension register load or store instruction
7445 We look for SP 32-bit and DP 64-bit registers.
7446 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
7447 <list> is consecutive 64-bit registers
7448 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
7449 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7450 <list> is consecutive 32-bit registers
7451 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7452 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7453 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7455 (((insn
& 0xfe100f00) == 0xec100b00) ||
7456 ((insn
& 0xfe100f00) == 0xec100a00))
7457 && /* (IA without !). */
7458 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
7459 /* (IA with !), includes VPOP (when reg number is SP). */
7460 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
7462 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
7465 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7467 - computes the number and the mode of memory accesses
7468 - decides if the replacement should be done:
7469 . replaces only if > 8-word accesses
7470 . or (testing purposes only) replaces all accesses. */
7473 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
7474 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
7478 /* The field encoding the register list is the same for both LDMIA
7479 and LDMDB encodings. */
7480 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
7481 nb_words
= popcount (insn
& 0x0000ffff);
7482 else if (is_thumb2_vldm (insn
))
7483 nb_words
= (insn
& 0xff);
7485 /* DEFAULT mode accounts for the real bug condition situation,
7486 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7488 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
7489 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
7492 /* Look for potentially-troublesome code sequences which might trigger
7493 the STM STM32L4XX erratum. */
7496 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
7497 struct bfd_link_info
*link_info
)
7500 bfd_byte
*contents
= NULL
;
7501 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7503 if (globals
== NULL
)
7506 /* If we are only performing a partial link do not bother
7507 to construct any glue. */
7508 if (bfd_link_relocatable (link_info
))
7511 /* Skip if this bfd does not correspond to an ELF image. */
7512 if (! is_arm_elf (abfd
))
7515 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
7518 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7519 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
7522 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7524 unsigned int i
, span
;
7525 struct _arm_elf_section_data
*sec_data
;
7527 /* If we don't have executable progbits, we're not interested in this
7528 section. Also skip if section is to be excluded. */
7529 if (elf_section_type (sec
) != SHT_PROGBITS
7530 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
7531 || (sec
->flags
& SEC_EXCLUDE
) != 0
7532 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
7533 || sec
->output_section
== bfd_abs_section_ptr
7534 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
7537 sec_data
= elf32_arm_section_data (sec
);
7539 if (sec_data
->mapcount
== 0)
7542 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7543 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7544 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7547 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
7548 elf32_arm_compare_mapping
);
7550 for (span
= 0; span
< sec_data
->mapcount
; span
++)
7552 unsigned int span_start
= sec_data
->map
[span
].vma
;
7553 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
7554 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
7555 char span_type
= sec_data
->map
[span
].type
;
7556 int itblock_current_pos
= 0;
7558 /* Only Thumb2 mode need be supported with this CM4 specific
7559 code, we should not encounter any arm mode eg span_type
7561 if (span_type
!= 't')
7564 for (i
= span_start
; i
< span_end
;)
7566 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
7567 bfd_boolean insn_32bit
= FALSE
;
7568 bfd_boolean is_ldm
= FALSE
;
7569 bfd_boolean is_vldm
= FALSE
;
7570 bfd_boolean is_not_last_in_it_block
= FALSE
;
7572 /* The first 16-bits of all 32-bit thumb2 instructions start
7573 with opcode[15..13]=0b111 and the encoded op1 can be anything
7574 except opcode[12..11]!=0b00.
7575 See 32-bit Thumb instruction encoding. */
7576 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
7579 /* Compute the predicate that tells if the instruction
7580 is concerned by the IT block
7581 - Creates an error if there is a ldm that is not
7582 last in the IT block thus cannot be replaced
7583 - Otherwise we can create a branch at the end of the
7584 IT block, it will be controlled naturally by IT
7585 with the proper pseudo-predicate
7586 - So the only interesting predicate is the one that
7587 tells that we are not on the last item of an IT
7589 if (itblock_current_pos
!= 0)
7590 is_not_last_in_it_block
= !!--itblock_current_pos
;
7594 /* Load the rest of the insn (in manual-friendly order). */
7595 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
7596 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
7597 is_vldm
= is_thumb2_vldm (insn
);
7599 /* Veneers are created for (v)ldm depending on
7600 option flags and memory accesses conditions; but
7601 if the instruction is not the last instruction of
7602 an IT block, we cannot create a jump there, so we
7604 if ((is_ldm
|| is_vldm
) &&
7605 stm32l4xx_need_create_replacing_stub
7606 (insn
, globals
->stm32l4xx_fix
))
7608 if (is_not_last_in_it_block
)
7610 (*_bfd_error_handler
)
7611 /* Note - overlong line used here to allow for translation. */
7613 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7614 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7615 abfd
, sec
, (long)i
);
7619 elf32_stm32l4xx_erratum_list
*newerr
=
7620 (elf32_stm32l4xx_erratum_list
*)
7622 (sizeof (elf32_stm32l4xx_erratum_list
));
7624 elf32_arm_section_data (sec
)
7625 ->stm32l4xx_erratumcount
+= 1;
7626 newerr
->u
.b
.insn
= insn
;
7627 /* We create only thumb branches. */
7629 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
7630 record_stm32l4xx_erratum_veneer
7631 (link_info
, newerr
, abfd
, sec
,
7634 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
7635 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
7637 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7638 sec_data
->stm32l4xx_erratumlist
= newerr
;
7645 IT blocks are only encoded in T1
7646 Encoding T1: IT{x{y{z}}} <firstcond>
7647 1 0 1 1 - 1 1 1 1 - firstcond - mask
7648 if mask = '0000' then see 'related encodings'
7649 We don't deal with UNPREDICTABLE, just ignore these.
7650 There can be no nested IT blocks so an IT block
7651 is naturally a new one for which it is worth
7652 computing its size. */
7653 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00) &&
7654 ((insn
& 0x000f) != 0x0000);
7655 /* If we have a new IT block we compute its size. */
7658 /* Compute the number of instructions controlled
7659 by the IT block, it will be used to decide
7660 whether we are inside an IT block or not. */
7661 unsigned int mask
= insn
& 0x000f;
7662 itblock_current_pos
= 4 - ctz (mask
);
7666 i
+= insn_32bit
? 4 : 2;
7670 if (contents
!= NULL
7671 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7679 if (contents
!= NULL
7680 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7686 /* Set target relocation values needed during linking. */
7689 bfd_elf32_arm_set_target_relocs (struct bfd
*output_bfd
,
7690 struct bfd_link_info
*link_info
,
7692 char * target2_type
,
7695 bfd_arm_vfp11_fix vfp11_fix
,
7696 bfd_arm_stm32l4xx_fix stm32l4xx_fix
,
7697 int no_enum_warn
, int no_wchar_warn
,
7698 int pic_veneer
, int fix_cortex_a8
,
7701 struct elf32_arm_link_hash_table
*globals
;
7703 globals
= elf32_arm_hash_table (link_info
);
7704 if (globals
== NULL
)
7707 globals
->target1_is_rel
= target1_is_rel
;
7708 if (strcmp (target2_type
, "rel") == 0)
7709 globals
->target2_reloc
= R_ARM_REL32
;
7710 else if (strcmp (target2_type
, "abs") == 0)
7711 globals
->target2_reloc
= R_ARM_ABS32
;
7712 else if (strcmp (target2_type
, "got-rel") == 0)
7713 globals
->target2_reloc
= R_ARM_GOT_PREL
;
7716 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7719 globals
->fix_v4bx
= fix_v4bx
;
7720 globals
->use_blx
|= use_blx
;
7721 globals
->vfp11_fix
= vfp11_fix
;
7722 globals
->stm32l4xx_fix
= stm32l4xx_fix
;
7723 globals
->pic_veneer
= pic_veneer
;
7724 globals
->fix_cortex_a8
= fix_cortex_a8
;
7725 globals
->fix_arm1176
= fix_arm1176
;
7727 BFD_ASSERT (is_arm_elf (output_bfd
));
7728 elf_arm_tdata (output_bfd
)->no_enum_size_warning
= no_enum_warn
;
7729 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
= no_wchar_warn
;
7732 /* Replace the target offset of a Thumb bl or b.w instruction. */
7735 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
7741 BFD_ASSERT ((offset
& 1) == 0);
7743 upper
= bfd_get_16 (abfd
, insn
);
7744 lower
= bfd_get_16 (abfd
, insn
+ 2);
7745 reloc_sign
= (offset
< 0) ? 1 : 0;
7746 upper
= (upper
& ~(bfd_vma
) 0x7ff)
7747 | ((offset
>> 12) & 0x3ff)
7748 | (reloc_sign
<< 10);
7749 lower
= (lower
& ~(bfd_vma
) 0x2fff)
7750 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
7751 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
7752 | ((offset
>> 1) & 0x7ff);
7753 bfd_put_16 (abfd
, upper
, insn
);
7754 bfd_put_16 (abfd
, lower
, insn
+ 2);
7757 /* Thumb code calling an ARM function. */
7760 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
7764 asection
* input_section
,
7765 bfd_byte
* hit_data
,
7768 bfd_signed_vma addend
,
7770 char **error_message
)
7774 long int ret_offset
;
7775 struct elf_link_hash_entry
* myh
;
7776 struct elf32_arm_link_hash_table
* globals
;
7778 myh
= find_thumb_glue (info
, name
, error_message
);
7782 globals
= elf32_arm_hash_table (info
);
7783 BFD_ASSERT (globals
!= NULL
);
7784 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7786 my_offset
= myh
->root
.u
.def
.value
;
7788 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7789 THUMB2ARM_GLUE_SECTION_NAME
);
7791 BFD_ASSERT (s
!= NULL
);
7792 BFD_ASSERT (s
->contents
!= NULL
);
7793 BFD_ASSERT (s
->output_section
!= NULL
);
7795 if ((my_offset
& 0x01) == 0x01)
7798 && sym_sec
->owner
!= NULL
7799 && !INTERWORK_FLAG (sym_sec
->owner
))
7801 (*_bfd_error_handler
)
7802 (_("%B(%s): warning: interworking not enabled.\n"
7803 " first occurrence: %B: Thumb call to ARM"),
7804 sym_sec
->owner
, input_bfd
, name
);
7810 myh
->root
.u
.def
.value
= my_offset
;
7812 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
7813 s
->contents
+ my_offset
);
7815 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
7816 s
->contents
+ my_offset
+ 2);
7819 /* Address of destination of the stub. */
7820 ((bfd_signed_vma
) val
)
7822 /* Offset from the start of the current section
7823 to the start of the stubs. */
7825 /* Offset of the start of this stub from the start of the stubs. */
7827 /* Address of the start of the current section. */
7828 + s
->output_section
->vma
)
7829 /* The branch instruction is 4 bytes into the stub. */
7831 /* ARM branches work from the pc of the instruction + 8. */
7834 put_arm_insn (globals
, output_bfd
,
7835 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
7836 s
->contents
+ my_offset
+ 4);
7839 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
7841 /* Now go back and fix up the original BL insn to point to here. */
7843 /* Address of where the stub is located. */
7844 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
7845 /* Address of where the BL is located. */
7846 - (input_section
->output_section
->vma
+ input_section
->output_offset
7848 /* Addend in the relocation. */
7850 /* Biassing for PC-relative addressing. */
7853 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
7858 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7860 static struct elf_link_hash_entry
*
7861 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
7868 char ** error_message
)
7871 long int ret_offset
;
7872 struct elf_link_hash_entry
* myh
;
7873 struct elf32_arm_link_hash_table
* globals
;
7875 myh
= find_arm_glue (info
, name
, error_message
);
7879 globals
= elf32_arm_hash_table (info
);
7880 BFD_ASSERT (globals
!= NULL
);
7881 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7883 my_offset
= myh
->root
.u
.def
.value
;
7885 if ((my_offset
& 0x01) == 0x01)
7888 && sym_sec
->owner
!= NULL
7889 && !INTERWORK_FLAG (sym_sec
->owner
))
7891 (*_bfd_error_handler
)
7892 (_("%B(%s): warning: interworking not enabled.\n"
7893 " first occurrence: %B: arm call to thumb"),
7894 sym_sec
->owner
, input_bfd
, name
);
7898 myh
->root
.u
.def
.value
= my_offset
;
7900 if (bfd_link_pic (info
)
7901 || globals
->root
.is_relocatable_executable
7902 || globals
->pic_veneer
)
7904 /* For relocatable objects we can't use absolute addresses,
7905 so construct the address from a relative offset. */
7906 /* TODO: If the offset is small it's probably worth
7907 constructing the address with adds. */
7908 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
7909 s
->contents
+ my_offset
);
7910 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
7911 s
->contents
+ my_offset
+ 4);
7912 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
7913 s
->contents
+ my_offset
+ 8);
7914 /* Adjust the offset by 4 for the position of the add,
7915 and 8 for the pipeline offset. */
7916 ret_offset
= (val
- (s
->output_offset
7917 + s
->output_section
->vma
7920 bfd_put_32 (output_bfd
, ret_offset
,
7921 s
->contents
+ my_offset
+ 12);
7923 else if (globals
->use_blx
)
7925 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
7926 s
->contents
+ my_offset
);
7928 /* It's a thumb address. Add the low order bit. */
7929 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
7930 s
->contents
+ my_offset
+ 4);
7934 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
7935 s
->contents
+ my_offset
);
7937 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
7938 s
->contents
+ my_offset
+ 4);
7940 /* It's a thumb address. Add the low order bit. */
7941 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
7942 s
->contents
+ my_offset
+ 8);
7948 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
7953 /* Arm code calling a Thumb function. */
7956 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
7960 asection
* input_section
,
7961 bfd_byte
* hit_data
,
7964 bfd_signed_vma addend
,
7966 char **error_message
)
7968 unsigned long int tmp
;
7971 long int ret_offset
;
7972 struct elf_link_hash_entry
* myh
;
7973 struct elf32_arm_link_hash_table
* globals
;
7975 globals
= elf32_arm_hash_table (info
);
7976 BFD_ASSERT (globals
!= NULL
);
7977 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7979 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7980 ARM2THUMB_GLUE_SECTION_NAME
);
7981 BFD_ASSERT (s
!= NULL
);
7982 BFD_ASSERT (s
->contents
!= NULL
);
7983 BFD_ASSERT (s
->output_section
!= NULL
);
7985 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
7986 sym_sec
, val
, s
, error_message
);
7990 my_offset
= myh
->root
.u
.def
.value
;
7991 tmp
= bfd_get_32 (input_bfd
, hit_data
);
7992 tmp
= tmp
& 0xFF000000;
7994 /* Somehow these are both 4 too far, so subtract 8. */
7995 ret_offset
= (s
->output_offset
7997 + s
->output_section
->vma
7998 - (input_section
->output_offset
7999 + input_section
->output_section
->vma
8003 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
8005 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
8010 /* Populate Arm stub for an exported Thumb function. */
8013 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
8015 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
8017 struct elf_link_hash_entry
* myh
;
8018 struct elf32_arm_link_hash_entry
*eh
;
8019 struct elf32_arm_link_hash_table
* globals
;
8022 char *error_message
;
8024 eh
= elf32_arm_hash_entry (h
);
8025 /* Allocate stubs for exported Thumb functions on v4t. */
8026 if (eh
->export_glue
== NULL
)
8029 globals
= elf32_arm_hash_table (info
);
8030 BFD_ASSERT (globals
!= NULL
);
8031 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8033 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8034 ARM2THUMB_GLUE_SECTION_NAME
);
8035 BFD_ASSERT (s
!= NULL
);
8036 BFD_ASSERT (s
->contents
!= NULL
);
8037 BFD_ASSERT (s
->output_section
!= NULL
);
8039 sec
= eh
->export_glue
->root
.u
.def
.section
;
8041 BFD_ASSERT (sec
->output_section
!= NULL
);
8043 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
8044 + sec
->output_section
->vma
;
8046 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
8047 h
->root
.u
.def
.section
->owner
,
8048 globals
->obfd
, sec
, val
, s
,
8054 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8057 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
8062 struct elf32_arm_link_hash_table
*globals
;
8064 globals
= elf32_arm_hash_table (info
);
8065 BFD_ASSERT (globals
!= NULL
);
8066 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8068 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8069 ARM_BX_GLUE_SECTION_NAME
);
8070 BFD_ASSERT (s
!= NULL
);
8071 BFD_ASSERT (s
->contents
!= NULL
);
8072 BFD_ASSERT (s
->output_section
!= NULL
);
8074 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
8076 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
8078 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
8080 p
= s
->contents
+ glue_addr
;
8081 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
8082 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
8083 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
8084 globals
->bx_glue_offset
[reg
] |= 1;
8087 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
8090 /* Generate Arm stubs for exported Thumb symbols. */
8092 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
8093 struct bfd_link_info
*link_info
)
8095 struct elf32_arm_link_hash_table
* globals
;
8097 if (link_info
== NULL
)
8098 /* Ignore this if we are not called by the ELF backend linker. */
8101 globals
= elf32_arm_hash_table (link_info
);
8102 if (globals
== NULL
)
8105 /* If blx is available then exported Thumb symbols are OK and there is
8107 if (globals
->use_blx
)
8110 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
8114 /* Reserve space for COUNT dynamic relocations in relocation selection
8118 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
8119 bfd_size_type count
)
8121 struct elf32_arm_link_hash_table
*htab
;
8123 htab
= elf32_arm_hash_table (info
);
8124 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
8127 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
8130 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8131 dynamic, the relocations should go in SRELOC, otherwise they should
8132 go in the special .rel.iplt section. */
8135 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
8136 bfd_size_type count
)
8138 struct elf32_arm_link_hash_table
*htab
;
8140 htab
= elf32_arm_hash_table (info
);
8141 if (!htab
->root
.dynamic_sections_created
)
8142 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
8145 BFD_ASSERT (sreloc
!= NULL
);
8146 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
8150 /* Add relocation REL to the end of relocation section SRELOC. */
8153 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
8154 asection
*sreloc
, Elf_Internal_Rela
*rel
)
8157 struct elf32_arm_link_hash_table
*htab
;
8159 htab
= elf32_arm_hash_table (info
);
8160 if (!htab
->root
.dynamic_sections_created
8161 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
8162 sreloc
= htab
->root
.irelplt
;
8165 loc
= sreloc
->contents
;
8166 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
8167 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
8169 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
8172 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8173 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8177 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
8178 bfd_boolean is_iplt_entry
,
8179 union gotplt_union
*root_plt
,
8180 struct arm_plt_info
*arm_plt
)
8182 struct elf32_arm_link_hash_table
*htab
;
8186 htab
= elf32_arm_hash_table (info
);
8190 splt
= htab
->root
.iplt
;
8191 sgotplt
= htab
->root
.igotplt
;
8193 /* NaCl uses a special first entry in .iplt too. */
8194 if (htab
->nacl_p
&& splt
->size
== 0)
8195 splt
->size
+= htab
->plt_header_size
;
8197 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8198 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
8202 splt
= htab
->root
.splt
;
8203 sgotplt
= htab
->root
.sgotplt
;
8205 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8206 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
8208 /* If this is the first .plt entry, make room for the special
8210 if (splt
->size
== 0)
8211 splt
->size
+= htab
->plt_header_size
;
8213 htab
->next_tls_desc_index
++;
8216 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8217 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
8218 splt
->size
+= PLT_THUMB_STUB_SIZE
;
8219 root_plt
->offset
= splt
->size
;
8220 splt
->size
+= htab
->plt_entry_size
;
8222 if (!htab
->symbian_p
)
8224 /* We also need to make an entry in the .got.plt section, which
8225 will be placed in the .got section by the linker script. */
8227 arm_plt
->got_offset
= sgotplt
->size
;
8229 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
8235 arm_movw_immediate (bfd_vma value
)
8237 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
8241 arm_movt_immediate (bfd_vma value
)
8243 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
8246 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8247 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8248 Otherwise, DYNINDX is the index of the symbol in the dynamic
8249 symbol table and SYM_VALUE is undefined.
8251 ROOT_PLT points to the offset of the PLT entry from the start of its
8252 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8253 bookkeeping information.
8255 Returns FALSE if there was a problem. */
8258 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
8259 union gotplt_union
*root_plt
,
8260 struct arm_plt_info
*arm_plt
,
8261 int dynindx
, bfd_vma sym_value
)
8263 struct elf32_arm_link_hash_table
*htab
;
8269 Elf_Internal_Rela rel
;
8270 bfd_vma plt_header_size
;
8271 bfd_vma got_header_size
;
8273 htab
= elf32_arm_hash_table (info
);
8275 /* Pick the appropriate sections and sizes. */
8278 splt
= htab
->root
.iplt
;
8279 sgot
= htab
->root
.igotplt
;
8280 srel
= htab
->root
.irelplt
;
8282 /* There are no reserved entries in .igot.plt, and no special
8283 first entry in .iplt. */
8284 got_header_size
= 0;
8285 plt_header_size
= 0;
8289 splt
= htab
->root
.splt
;
8290 sgot
= htab
->root
.sgotplt
;
8291 srel
= htab
->root
.srelplt
;
8293 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
8294 plt_header_size
= htab
->plt_header_size
;
8296 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
8298 /* Fill in the entry in the procedure linkage table. */
8299 if (htab
->symbian_p
)
8301 BFD_ASSERT (dynindx
>= 0);
8302 put_arm_insn (htab
, output_bfd
,
8303 elf32_arm_symbian_plt_entry
[0],
8304 splt
->contents
+ root_plt
->offset
);
8305 bfd_put_32 (output_bfd
,
8306 elf32_arm_symbian_plt_entry
[1],
8307 splt
->contents
+ root_plt
->offset
+ 4);
8309 /* Fill in the entry in the .rel.plt section. */
8310 rel
.r_offset
= (splt
->output_section
->vma
8311 + splt
->output_offset
8312 + root_plt
->offset
+ 4);
8313 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
8315 /* Get the index in the procedure linkage table which
8316 corresponds to this symbol. This is the index of this symbol
8317 in all the symbols for which we are making plt entries. The
8318 first entry in the procedure linkage table is reserved. */
8319 plt_index
= ((root_plt
->offset
- plt_header_size
)
8320 / htab
->plt_entry_size
);
8324 bfd_vma got_offset
, got_address
, plt_address
;
8325 bfd_vma got_displacement
, initial_got_entry
;
8328 BFD_ASSERT (sgot
!= NULL
);
8330 /* Get the offset into the .(i)got.plt table of the entry that
8331 corresponds to this function. */
8332 got_offset
= (arm_plt
->got_offset
& -2);
8334 /* Get the index in the procedure linkage table which
8335 corresponds to this symbol. This is the index of this symbol
8336 in all the symbols for which we are making plt entries.
8337 After the reserved .got.plt entries, all symbols appear in
8338 the same order as in .plt. */
8339 plt_index
= (got_offset
- got_header_size
) / 4;
8341 /* Calculate the address of the GOT entry. */
8342 got_address
= (sgot
->output_section
->vma
8343 + sgot
->output_offset
8346 /* ...and the address of the PLT entry. */
8347 plt_address
= (splt
->output_section
->vma
8348 + splt
->output_offset
8349 + root_plt
->offset
);
8351 ptr
= splt
->contents
+ root_plt
->offset
;
8352 if (htab
->vxworks_p
&& bfd_link_pic (info
))
8357 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
8359 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
8361 val
|= got_address
- sgot
->output_section
->vma
;
8363 val
|= plt_index
* RELOC_SIZE (htab
);
8364 if (i
== 2 || i
== 5)
8365 bfd_put_32 (output_bfd
, val
, ptr
);
8367 put_arm_insn (htab
, output_bfd
, val
, ptr
);
8370 else if (htab
->vxworks_p
)
8375 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
8377 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
8381 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
8383 val
|= plt_index
* RELOC_SIZE (htab
);
8384 if (i
== 2 || i
== 5)
8385 bfd_put_32 (output_bfd
, val
, ptr
);
8387 put_arm_insn (htab
, output_bfd
, val
, ptr
);
8390 loc
= (htab
->srelplt2
->contents
8391 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
8393 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8394 referencing the GOT for this PLT entry. */
8395 rel
.r_offset
= plt_address
+ 8;
8396 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
8397 rel
.r_addend
= got_offset
;
8398 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
8399 loc
+= RELOC_SIZE (htab
);
8401 /* Create the R_ARM_ABS32 relocation referencing the
8402 beginning of the PLT for this GOT entry. */
8403 rel
.r_offset
= got_address
;
8404 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
8406 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
8408 else if (htab
->nacl_p
)
8410 /* Calculate the displacement between the PLT slot and the
8411 common tail that's part of the special initial PLT slot. */
8412 int32_t tail_displacement
8413 = ((splt
->output_section
->vma
+ splt
->output_offset
8414 + ARM_NACL_PLT_TAIL_OFFSET
)
8415 - (plt_address
+ htab
->plt_entry_size
+ 4));
8416 BFD_ASSERT ((tail_displacement
& 3) == 0);
8417 tail_displacement
>>= 2;
8419 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
8420 || (-tail_displacement
& 0xff000000) == 0);
8422 /* Calculate the displacement between the PLT slot and the entry
8423 in the GOT. The offset accounts for the value produced by
8424 adding to pc in the penultimate instruction of the PLT stub. */
8425 got_displacement
= (got_address
8426 - (plt_address
+ htab
->plt_entry_size
));
8428 /* NaCl does not support interworking at all. */
8429 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
8431 put_arm_insn (htab
, output_bfd
,
8432 elf32_arm_nacl_plt_entry
[0]
8433 | arm_movw_immediate (got_displacement
),
8435 put_arm_insn (htab
, output_bfd
,
8436 elf32_arm_nacl_plt_entry
[1]
8437 | arm_movt_immediate (got_displacement
),
8439 put_arm_insn (htab
, output_bfd
,
8440 elf32_arm_nacl_plt_entry
[2],
8442 put_arm_insn (htab
, output_bfd
,
8443 elf32_arm_nacl_plt_entry
[3]
8444 | (tail_displacement
& 0x00ffffff),
8447 else if (using_thumb_only (htab
))
8449 /* PR ld/16017: Generate thumb only PLT entries. */
8450 if (!using_thumb2 (htab
))
8452 /* FIXME: We ought to be able to generate thumb-1 PLT
8454 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8459 /* Calculate the displacement between the PLT slot and the entry in
8460 the GOT. The 12-byte offset accounts for the value produced by
8461 adding to pc in the 3rd instruction of the PLT stub. */
8462 got_displacement
= got_address
- (plt_address
+ 12);
8464 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8465 instead of 'put_thumb_insn'. */
8466 put_arm_insn (htab
, output_bfd
,
8467 elf32_thumb2_plt_entry
[0]
8468 | ((got_displacement
& 0x000000ff) << 16)
8469 | ((got_displacement
& 0x00000700) << 20)
8470 | ((got_displacement
& 0x00000800) >> 1)
8471 | ((got_displacement
& 0x0000f000) >> 12),
8473 put_arm_insn (htab
, output_bfd
,
8474 elf32_thumb2_plt_entry
[1]
8475 | ((got_displacement
& 0x00ff0000) )
8476 | ((got_displacement
& 0x07000000) << 4)
8477 | ((got_displacement
& 0x08000000) >> 17)
8478 | ((got_displacement
& 0xf0000000) >> 28),
8480 put_arm_insn (htab
, output_bfd
,
8481 elf32_thumb2_plt_entry
[2],
8483 put_arm_insn (htab
, output_bfd
,
8484 elf32_thumb2_plt_entry
[3],
8489 /* Calculate the displacement between the PLT slot and the
8490 entry in the GOT. The eight-byte offset accounts for the
8491 value produced by adding to pc in the first instruction
8493 got_displacement
= got_address
- (plt_address
+ 8);
8495 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
8497 put_thumb_insn (htab
, output_bfd
,
8498 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
8499 put_thumb_insn (htab
, output_bfd
,
8500 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
8503 if (!elf32_arm_use_long_plt_entry
)
8505 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
8507 put_arm_insn (htab
, output_bfd
,
8508 elf32_arm_plt_entry_short
[0]
8509 | ((got_displacement
& 0x0ff00000) >> 20),
8511 put_arm_insn (htab
, output_bfd
,
8512 elf32_arm_plt_entry_short
[1]
8513 | ((got_displacement
& 0x000ff000) >> 12),
8515 put_arm_insn (htab
, output_bfd
,
8516 elf32_arm_plt_entry_short
[2]
8517 | (got_displacement
& 0x00000fff),
8519 #ifdef FOUR_WORD_PLT
8520 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
8525 put_arm_insn (htab
, output_bfd
,
8526 elf32_arm_plt_entry_long
[0]
8527 | ((got_displacement
& 0xf0000000) >> 28),
8529 put_arm_insn (htab
, output_bfd
,
8530 elf32_arm_plt_entry_long
[1]
8531 | ((got_displacement
& 0x0ff00000) >> 20),
8533 put_arm_insn (htab
, output_bfd
,
8534 elf32_arm_plt_entry_long
[2]
8535 | ((got_displacement
& 0x000ff000) >> 12),
8537 put_arm_insn (htab
, output_bfd
,
8538 elf32_arm_plt_entry_long
[3]
8539 | (got_displacement
& 0x00000fff),
8544 /* Fill in the entry in the .rel(a).(i)plt section. */
8545 rel
.r_offset
= got_address
;
8549 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8550 The dynamic linker or static executable then calls SYM_VALUE
8551 to determine the correct run-time value of the .igot.plt entry. */
8552 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
8553 initial_got_entry
= sym_value
;
8557 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
8558 initial_got_entry
= (splt
->output_section
->vma
8559 + splt
->output_offset
);
8562 /* Fill in the entry in the global offset table. */
8563 bfd_put_32 (output_bfd
, initial_got_entry
,
8564 sgot
->contents
+ got_offset
);
8568 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
8571 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
8572 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
8578 /* Some relocations map to different relocations depending on the
8579 target. Return the real relocation. */
8582 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
8588 if (globals
->target1_is_rel
)
8594 return globals
->target2_reloc
;
8601 /* Return the base VMA address which should be subtracted from real addresses
8602 when resolving @dtpoff relocation.
8603 This is PT_TLS segment p_vaddr. */
8606 dtpoff_base (struct bfd_link_info
*info
)
8608 /* If tls_sec is NULL, we should have signalled an error already. */
8609 if (elf_hash_table (info
)->tls_sec
== NULL
)
8611 return elf_hash_table (info
)->tls_sec
->vma
;
8614 /* Return the relocation value for @tpoff relocation
8615 if STT_TLS virtual address is ADDRESS. */
8618 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
8620 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
8623 /* If tls_sec is NULL, we should have signalled an error already. */
8624 if (htab
->tls_sec
== NULL
)
8626 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
8627 return address
- htab
->tls_sec
->vma
+ base
;
8630 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8631 VALUE is the relocation value. */
8633 static bfd_reloc_status_type
8634 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
8637 return bfd_reloc_overflow
;
8639 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
8640 bfd_put_32 (abfd
, value
, data
);
8641 return bfd_reloc_ok
;
8644 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8645 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8646 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8648 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8649 is to then call final_link_relocate. Return other values in the
8652 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8653 the pre-relaxed code. It would be nice if the relocs were updated
8654 to match the optimization. */
8656 static bfd_reloc_status_type
8657 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
8658 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
8659 Elf_Internal_Rela
*rel
, unsigned long is_local
)
8663 switch (ELF32_R_TYPE (rel
->r_info
))
8666 return bfd_reloc_notsupported
;
8668 case R_ARM_TLS_GOTDESC
:
8673 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
8675 insn
-= 5; /* THUMB */
8677 insn
-= 8; /* ARM */
8679 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
8680 return bfd_reloc_continue
;
8682 case R_ARM_THM_TLS_DESCSEQ
:
8684 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
8685 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
8689 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
8691 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8695 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
8698 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
8700 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
8704 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
8707 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
8708 contents
+ rel
->r_offset
);
8712 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
8713 /* It's a 32 bit instruction, fetch the rest of it for
8714 error generation. */
8716 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
8717 (*_bfd_error_handler
)
8718 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8719 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
8720 return bfd_reloc_notsupported
;
8724 case R_ARM_TLS_DESCSEQ
:
8726 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
8727 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8731 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
8732 contents
+ rel
->r_offset
);
8734 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8738 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
8741 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
8742 contents
+ rel
->r_offset
);
8744 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
8748 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
8751 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
8752 contents
+ rel
->r_offset
);
8756 (*_bfd_error_handler
)
8757 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8758 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
8759 return bfd_reloc_notsupported
;
8763 case R_ARM_TLS_CALL
:
8764 /* GD->IE relaxation, turn the instruction into 'nop' or
8765 'ldr r0, [pc,r0]' */
8766 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
8767 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
8770 case R_ARM_THM_TLS_CALL
:
8771 /* GD->IE relaxation. */
8773 /* add r0,pc; ldr r0, [r0] */
8775 else if (arch_has_thumb2_nop (globals
))
8782 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
8783 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
8786 return bfd_reloc_ok
;
8789 /* For a given value of n, calculate the value of G_n as required to
8790 deal with group relocations. We return it in the form of an
8791 encoded constant-and-rotation, together with the final residual. If n is
8792 specified as less than zero, then final_residual is filled with the
8793 input value and no further action is performed. */
8796 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
8800 bfd_vma encoded_g_n
= 0;
8801 bfd_vma residual
= value
; /* Also known as Y_n. */
8803 for (current_n
= 0; current_n
<= n
; current_n
++)
8807 /* Calculate which part of the value to mask. */
8814 /* Determine the most significant bit in the residual and
8815 align the resulting value to a 2-bit boundary. */
8816 for (msb
= 30; msb
>= 0; msb
-= 2)
8817 if (residual
& (3 << msb
))
8820 /* The desired shift is now (msb - 6), or zero, whichever
8827 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8828 g_n
= residual
& (0xff << shift
);
8829 encoded_g_n
= (g_n
>> shift
)
8830 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
8832 /* Calculate the residual for the next time around. */
8836 *final_residual
= residual
;
8841 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8842 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8845 identify_add_or_sub (bfd_vma insn
)
8847 int opcode
= insn
& 0x1e00000;
8849 if (opcode
== 1 << 23) /* ADD */
8852 if (opcode
== 1 << 22) /* SUB */
8858 /* Perform a relocation as part of a final link. */
8860 static bfd_reloc_status_type
8861 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
8864 asection
* input_section
,
8865 bfd_byte
* contents
,
8866 Elf_Internal_Rela
* rel
,
8868 struct bfd_link_info
* info
,
8870 const char * sym_name
,
8871 unsigned char st_type
,
8872 enum arm_st_branch_type branch_type
,
8873 struct elf_link_hash_entry
* h
,
8874 bfd_boolean
* unresolved_reloc_p
,
8875 char ** error_message
)
8877 unsigned long r_type
= howto
->type
;
8878 unsigned long r_symndx
;
8879 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
8880 bfd_vma
* local_got_offsets
;
8881 bfd_vma
* local_tlsdesc_gotents
;
8884 asection
* sreloc
= NULL
;
8887 bfd_signed_vma signed_addend
;
8888 unsigned char dynreloc_st_type
;
8889 bfd_vma dynreloc_value
;
8890 struct elf32_arm_link_hash_table
* globals
;
8891 struct elf32_arm_link_hash_entry
*eh
;
8892 union gotplt_union
*root_plt
;
8893 struct arm_plt_info
*arm_plt
;
8895 bfd_vma gotplt_offset
;
8896 bfd_boolean has_iplt_entry
;
8898 globals
= elf32_arm_hash_table (info
);
8899 if (globals
== NULL
)
8900 return bfd_reloc_notsupported
;
8902 BFD_ASSERT (is_arm_elf (input_bfd
));
8904 /* Some relocation types map to different relocations depending on the
8905 target. We pick the right one here. */
8906 r_type
= arm_real_reloc_type (globals
, r_type
);
8908 /* It is possible to have linker relaxations on some TLS access
8909 models. Update our information here. */
8910 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
8912 if (r_type
!= howto
->type
)
8913 howto
= elf32_arm_howto_from_type (r_type
);
8915 eh
= (struct elf32_arm_link_hash_entry
*) h
;
8916 sgot
= globals
->root
.sgot
;
8917 local_got_offsets
= elf_local_got_offsets (input_bfd
);
8918 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
8920 if (globals
->root
.dynamic_sections_created
)
8921 srelgot
= globals
->root
.srelgot
;
8925 r_symndx
= ELF32_R_SYM (rel
->r_info
);
8927 if (globals
->use_rel
)
8929 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
8931 if (addend
& ((howto
->src_mask
+ 1) >> 1))
8934 signed_addend
&= ~ howto
->src_mask
;
8935 signed_addend
|= addend
;
8938 signed_addend
= addend
;
8941 addend
= signed_addend
= rel
->r_addend
;
8943 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8944 are resolving a function call relocation. */
8945 if (using_thumb_only (globals
)
8946 && (r_type
== R_ARM_THM_CALL
8947 || r_type
== R_ARM_THM_JUMP24
)
8948 && branch_type
== ST_BRANCH_TO_ARM
)
8949 branch_type
= ST_BRANCH_TO_THUMB
;
8951 /* Record the symbol information that should be used in dynamic
8953 dynreloc_st_type
= st_type
;
8954 dynreloc_value
= value
;
8955 if (branch_type
== ST_BRANCH_TO_THUMB
)
8956 dynreloc_value
|= 1;
8958 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8959 VALUE appropriately for relocations that we resolve at link time. */
8960 has_iplt_entry
= FALSE
;
8961 if (elf32_arm_get_plt_info (input_bfd
, eh
, r_symndx
, &root_plt
, &arm_plt
)
8962 && root_plt
->offset
!= (bfd_vma
) -1)
8964 plt_offset
= root_plt
->offset
;
8965 gotplt_offset
= arm_plt
->got_offset
;
8967 if (h
== NULL
|| eh
->is_iplt
)
8969 has_iplt_entry
= TRUE
;
8970 splt
= globals
->root
.iplt
;
8972 /* Populate .iplt entries here, because not all of them will
8973 be seen by finish_dynamic_symbol. The lower bit is set if
8974 we have already populated the entry. */
8979 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
8980 -1, dynreloc_value
))
8981 root_plt
->offset
|= 1;
8983 return bfd_reloc_notsupported
;
8986 /* Static relocations always resolve to the .iplt entry. */
8988 value
= (splt
->output_section
->vma
8989 + splt
->output_offset
8991 branch_type
= ST_BRANCH_TO_ARM
;
8993 /* If there are non-call relocations that resolve to the .iplt
8994 entry, then all dynamic ones must too. */
8995 if (arm_plt
->noncall_refcount
!= 0)
8997 dynreloc_st_type
= st_type
;
8998 dynreloc_value
= value
;
9002 /* We populate the .plt entry in finish_dynamic_symbol. */
9003 splt
= globals
->root
.splt
;
9008 plt_offset
= (bfd_vma
) -1;
9009 gotplt_offset
= (bfd_vma
) -1;
9015 /* We don't need to find a value for this symbol. It's just a
9017 *unresolved_reloc_p
= FALSE
;
9018 return bfd_reloc_ok
;
9021 if (!globals
->vxworks_p
)
9022 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
9026 case R_ARM_ABS32_NOI
:
9028 case R_ARM_REL32_NOI
:
9034 /* Handle relocations which should use the PLT entry. ABS32/REL32
9035 will use the symbol's value, which may point to a PLT entry, but we
9036 don't need to handle that here. If we created a PLT entry, all
9037 branches in this object should go to it, except if the PLT is too
9038 far away, in which case a long branch stub should be inserted. */
9039 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
9040 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
9041 && r_type
!= R_ARM_CALL
9042 && r_type
!= R_ARM_JUMP24
9043 && r_type
!= R_ARM_PLT32
)
9044 && plt_offset
!= (bfd_vma
) -1)
9046 /* If we've created a .plt section, and assigned a PLT entry
9047 to this function, it must either be a STT_GNU_IFUNC reference
9048 or not be known to bind locally. In other cases, we should
9049 have cleared the PLT entry by now. */
9050 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
9052 value
= (splt
->output_section
->vma
9053 + splt
->output_offset
9055 *unresolved_reloc_p
= FALSE
;
9056 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9057 contents
, rel
->r_offset
, value
,
9061 /* When generating a shared object or relocatable executable, these
9062 relocations are copied into the output file to be resolved at
9064 if ((bfd_link_pic (info
)
9065 || globals
->root
.is_relocatable_executable
)
9066 && (input_section
->flags
& SEC_ALLOC
)
9067 && !(globals
->vxworks_p
9068 && strcmp (input_section
->output_section
->name
,
9070 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
9071 || !SYMBOL_CALLS_LOCAL (info
, h
))
9072 && !(input_bfd
== globals
->stub_bfd
9073 && strstr (input_section
->name
, STUB_SUFFIX
))
9075 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
9076 || h
->root
.type
!= bfd_link_hash_undefweak
)
9077 && r_type
!= R_ARM_PC24
9078 && r_type
!= R_ARM_CALL
9079 && r_type
!= R_ARM_JUMP24
9080 && r_type
!= R_ARM_PREL31
9081 && r_type
!= R_ARM_PLT32
)
9083 Elf_Internal_Rela outrel
;
9084 bfd_boolean skip
, relocate
;
9086 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
9089 char *v
= _("shared object");
9091 if (bfd_link_executable (info
))
9092 v
= _("PIE executable");
9094 (*_bfd_error_handler
)
9095 (_("%B: relocation %s against external or undefined symbol `%s'"
9096 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
9097 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
9098 return bfd_reloc_notsupported
;
9101 *unresolved_reloc_p
= FALSE
;
9103 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
9105 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
9106 ! globals
->use_rel
);
9109 return bfd_reloc_notsupported
;
9115 outrel
.r_addend
= addend
;
9117 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
9119 if (outrel
.r_offset
== (bfd_vma
) -1)
9121 else if (outrel
.r_offset
== (bfd_vma
) -2)
9122 skip
= TRUE
, relocate
= TRUE
;
9123 outrel
.r_offset
+= (input_section
->output_section
->vma
9124 + input_section
->output_offset
);
9127 memset (&outrel
, 0, sizeof outrel
);
9130 && (!bfd_link_pic (info
)
9131 || !SYMBOLIC_BIND (info
, h
)
9132 || !h
->def_regular
))
9133 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
9138 /* This symbol is local, or marked to become local. */
9139 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
9140 if (globals
->symbian_p
)
9144 /* On Symbian OS, the data segment and text segement
9145 can be relocated independently. Therefore, we
9146 must indicate the segment to which this
9147 relocation is relative. The BPABI allows us to
9148 use any symbol in the right segment; we just use
9149 the section symbol as it is convenient. (We
9150 cannot use the symbol given by "h" directly as it
9151 will not appear in the dynamic symbol table.)
9153 Note that the dynamic linker ignores the section
9154 symbol value, so we don't subtract osec->vma
9155 from the emitted reloc addend. */
9157 osec
= sym_sec
->output_section
;
9159 osec
= input_section
->output_section
;
9160 symbol
= elf_section_data (osec
)->dynindx
;
9163 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9165 if ((osec
->flags
& SEC_READONLY
) == 0
9166 && htab
->data_index_section
!= NULL
)
9167 osec
= htab
->data_index_section
;
9169 osec
= htab
->text_index_section
;
9170 symbol
= elf_section_data (osec
)->dynindx
;
9172 BFD_ASSERT (symbol
!= 0);
9175 /* On SVR4-ish systems, the dynamic loader cannot
9176 relocate the text and data segments independently,
9177 so the symbol does not matter. */
9179 if (dynreloc_st_type
== STT_GNU_IFUNC
)
9180 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9181 to the .iplt entry. Instead, every non-call reference
9182 must use an R_ARM_IRELATIVE relocation to obtain the
9183 correct run-time address. */
9184 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
9186 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
9187 if (globals
->use_rel
)
9190 outrel
.r_addend
+= dynreloc_value
;
9193 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
9195 /* If this reloc is against an external symbol, we do not want to
9196 fiddle with the addend. Otherwise, we need to include the symbol
9197 value so that it becomes an addend for the dynamic reloc. */
9199 return bfd_reloc_ok
;
9201 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9202 contents
, rel
->r_offset
,
9203 dynreloc_value
, (bfd_vma
) 0);
9205 else switch (r_type
)
9208 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
9210 case R_ARM_XPC25
: /* Arm BLX instruction. */
9213 case R_ARM_PC24
: /* Arm B/BL instruction. */
9216 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
9218 if (r_type
== R_ARM_XPC25
)
9220 /* Check for Arm calling Arm function. */
9221 /* FIXME: Should we translate the instruction into a BL
9222 instruction instead ? */
9223 if (branch_type
!= ST_BRANCH_TO_THUMB
)
9224 (*_bfd_error_handler
)
9225 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9227 h
? h
->root
.root
.string
: "(local)");
9229 else if (r_type
== R_ARM_PC24
)
9231 /* Check for Arm calling Thumb function. */
9232 if (branch_type
== ST_BRANCH_TO_THUMB
)
9234 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
9235 output_bfd
, input_section
,
9236 hit_data
, sym_sec
, rel
->r_offset
,
9237 signed_addend
, value
,
9239 return bfd_reloc_ok
;
9241 return bfd_reloc_dangerous
;
9245 /* Check if a stub has to be inserted because the
9246 destination is too far or we are changing mode. */
9247 if ( r_type
== R_ARM_CALL
9248 || r_type
== R_ARM_JUMP24
9249 || r_type
== R_ARM_PLT32
)
9251 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9252 struct elf32_arm_link_hash_entry
*hash
;
9254 hash
= (struct elf32_arm_link_hash_entry
*) h
;
9255 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9256 st_type
, &branch_type
,
9257 hash
, value
, sym_sec
,
9258 input_bfd
, sym_name
);
9260 if (stub_type
!= arm_stub_none
)
9262 /* The target is out of reach, so redirect the
9263 branch to the local stub for this function. */
9264 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9269 if (stub_entry
!= NULL
)
9270 value
= (stub_entry
->stub_offset
9271 + stub_entry
->stub_sec
->output_offset
9272 + stub_entry
->stub_sec
->output_section
->vma
);
9274 if (plt_offset
!= (bfd_vma
) -1)
9275 *unresolved_reloc_p
= FALSE
;
9280 /* If the call goes through a PLT entry, make sure to
9281 check distance to the right destination address. */
9282 if (plt_offset
!= (bfd_vma
) -1)
9284 value
= (splt
->output_section
->vma
9285 + splt
->output_offset
9287 *unresolved_reloc_p
= FALSE
;
9288 /* The PLT entry is in ARM mode, regardless of the
9290 branch_type
= ST_BRANCH_TO_ARM
;
9295 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9297 S is the address of the symbol in the relocation.
9298 P is address of the instruction being relocated.
9299 A is the addend (extracted from the instruction) in bytes.
9301 S is held in 'value'.
9302 P is the base address of the section containing the
9303 instruction plus the offset of the reloc into that
9305 (input_section->output_section->vma +
9306 input_section->output_offset +
9308 A is the addend, converted into bytes, ie:
9311 Note: None of these operations have knowledge of the pipeline
9312 size of the processor, thus it is up to the assembler to
9313 encode this information into the addend. */
9314 value
-= (input_section
->output_section
->vma
9315 + input_section
->output_offset
);
9316 value
-= rel
->r_offset
;
9317 if (globals
->use_rel
)
9318 value
+= (signed_addend
<< howto
->size
);
9320 /* RELA addends do not have to be adjusted by howto->size. */
9321 value
+= signed_addend
;
9323 signed_addend
= value
;
9324 signed_addend
>>= howto
->rightshift
;
9326 /* A branch to an undefined weak symbol is turned into a jump to
9327 the next instruction unless a PLT entry will be created.
9328 Do the same for local undefined symbols (but not for STN_UNDEF).
9329 The jump to the next instruction is optimized as a NOP depending
9330 on the architecture. */
9331 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
9332 && plt_offset
== (bfd_vma
) -1)
9333 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
9335 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
9337 if (arch_has_arm_nop (globals
))
9338 value
|= 0x0320f000;
9340 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9344 /* Perform a signed range check. */
9345 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
9346 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
9347 return bfd_reloc_overflow
;
9349 addend
= (value
& 2);
9351 value
= (signed_addend
& howto
->dst_mask
)
9352 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
9354 if (r_type
== R_ARM_CALL
)
9356 /* Set the H bit in the BLX instruction. */
9357 if (branch_type
== ST_BRANCH_TO_THUMB
)
9362 value
&= ~(bfd_vma
)(1 << 24);
9365 /* Select the correct instruction (BL or BLX). */
9366 /* Only if we are not handling a BL to a stub. In this
9367 case, mode switching is performed by the stub. */
9368 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
9370 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
9372 value
&= ~(bfd_vma
)(1 << 28);
9382 if (branch_type
== ST_BRANCH_TO_THUMB
)
9386 case R_ARM_ABS32_NOI
:
9392 if (branch_type
== ST_BRANCH_TO_THUMB
)
9394 value
-= (input_section
->output_section
->vma
9395 + input_section
->output_offset
+ rel
->r_offset
);
9398 case R_ARM_REL32_NOI
:
9400 value
-= (input_section
->output_section
->vma
9401 + input_section
->output_offset
+ rel
->r_offset
);
9405 value
-= (input_section
->output_section
->vma
9406 + input_section
->output_offset
+ rel
->r_offset
);
9407 value
+= signed_addend
;
9408 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
9410 /* Check for overflow. */
9411 if ((value
^ (value
>> 1)) & (1 << 30))
9412 return bfd_reloc_overflow
;
9414 value
&= 0x7fffffff;
9415 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
9416 if (branch_type
== ST_BRANCH_TO_THUMB
)
9421 bfd_put_32 (input_bfd
, value
, hit_data
);
9422 return bfd_reloc_ok
;
9425 /* PR 16202: Refectch the addend using the correct size. */
9426 if (globals
->use_rel
)
9427 addend
= bfd_get_8 (input_bfd
, hit_data
);
9430 /* There is no way to tell whether the user intended to use a signed or
9431 unsigned addend. When checking for overflow we accept either,
9432 as specified by the AAELF. */
9433 if ((long) value
> 0xff || (long) value
< -0x80)
9434 return bfd_reloc_overflow
;
9436 bfd_put_8 (input_bfd
, value
, hit_data
);
9437 return bfd_reloc_ok
;
9440 /* PR 16202: Refectch the addend using the correct size. */
9441 if (globals
->use_rel
)
9442 addend
= bfd_get_16 (input_bfd
, hit_data
);
9445 /* See comment for R_ARM_ABS8. */
9446 if ((long) value
> 0xffff || (long) value
< -0x8000)
9447 return bfd_reloc_overflow
;
9449 bfd_put_16 (input_bfd
, value
, hit_data
);
9450 return bfd_reloc_ok
;
9452 case R_ARM_THM_ABS5
:
9453 /* Support ldr and str instructions for the thumb. */
9454 if (globals
->use_rel
)
9456 /* Need to refetch addend. */
9457 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
9458 /* ??? Need to determine shift amount from operand size. */
9459 addend
>>= howto
->rightshift
;
9463 /* ??? Isn't value unsigned? */
9464 if ((long) value
> 0x1f || (long) value
< -0x10)
9465 return bfd_reloc_overflow
;
9467 /* ??? Value needs to be properly shifted into place first. */
9468 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
9469 bfd_put_16 (input_bfd
, value
, hit_data
);
9470 return bfd_reloc_ok
;
9472 case R_ARM_THM_ALU_PREL_11_0
:
9473 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9476 bfd_signed_vma relocation
;
9478 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
9479 | bfd_get_16 (input_bfd
, hit_data
+ 2);
9481 if (globals
->use_rel
)
9483 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
9484 | ((insn
& (1 << 26)) >> 15);
9485 if (insn
& 0xf00000)
9486 signed_addend
= -signed_addend
;
9489 relocation
= value
+ signed_addend
;
9490 relocation
-= Pa (input_section
->output_section
->vma
9491 + input_section
->output_offset
9496 if (value
>= 0x1000)
9497 return bfd_reloc_overflow
;
9499 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
9500 | ((value
& 0x700) << 4)
9501 | ((value
& 0x800) << 15);
9505 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
9506 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
9508 return bfd_reloc_ok
;
9512 /* PR 10073: This reloc is not generated by the GNU toolchain,
9513 but it is supported for compatibility with third party libraries
9514 generated by other compilers, specifically the ARM/IAR. */
9517 bfd_signed_vma relocation
;
9519 insn
= bfd_get_16 (input_bfd
, hit_data
);
9521 if (globals
->use_rel
)
9522 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
9524 relocation
= value
+ addend
;
9525 relocation
-= Pa (input_section
->output_section
->vma
9526 + input_section
->output_offset
9531 /* We do not check for overflow of this reloc. Although strictly
9532 speaking this is incorrect, it appears to be necessary in order
9533 to work with IAR generated relocs. Since GCC and GAS do not
9534 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9535 a problem for them. */
9538 insn
= (insn
& 0xff00) | (value
>> 2);
9540 bfd_put_16 (input_bfd
, insn
, hit_data
);
9542 return bfd_reloc_ok
;
9545 case R_ARM_THM_PC12
:
9546 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9549 bfd_signed_vma relocation
;
9551 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
9552 | bfd_get_16 (input_bfd
, hit_data
+ 2);
9554 if (globals
->use_rel
)
9556 signed_addend
= insn
& 0xfff;
9557 if (!(insn
& (1 << 23)))
9558 signed_addend
= -signed_addend
;
9561 relocation
= value
+ signed_addend
;
9562 relocation
-= Pa (input_section
->output_section
->vma
9563 + input_section
->output_offset
9568 if (value
>= 0x1000)
9569 return bfd_reloc_overflow
;
9571 insn
= (insn
& 0xff7ff000) | value
;
9572 if (relocation
>= 0)
9575 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
9576 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
9578 return bfd_reloc_ok
;
9581 case R_ARM_THM_XPC22
:
9582 case R_ARM_THM_CALL
:
9583 case R_ARM_THM_JUMP24
:
9584 /* Thumb BL (branch long instruction). */
9588 bfd_boolean overflow
= FALSE
;
9589 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
9590 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
9591 bfd_signed_vma reloc_signed_max
;
9592 bfd_signed_vma reloc_signed_min
;
9594 bfd_signed_vma signed_check
;
9596 const int thumb2
= using_thumb2 (globals
);
9598 /* A branch to an undefined weak symbol is turned into a jump to
9599 the next instruction unless a PLT entry will be created.
9600 The jump to the next instruction is optimized as a NOP.W for
9601 Thumb-2 enabled architectures. */
9602 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
9603 && plt_offset
== (bfd_vma
) -1)
9605 if (arch_has_thumb2_nop (globals
))
9607 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
9608 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
9612 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
9613 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
9615 return bfd_reloc_ok
;
9618 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9619 with Thumb-1) involving the J1 and J2 bits. */
9620 if (globals
->use_rel
)
9622 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
9623 bfd_vma upper
= upper_insn
& 0x3ff;
9624 bfd_vma lower
= lower_insn
& 0x7ff;
9625 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
9626 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
9627 bfd_vma i1
= j1
^ s
? 0 : 1;
9628 bfd_vma i2
= j2
^ s
? 0 : 1;
9630 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
9632 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
9634 signed_addend
= addend
;
9637 if (r_type
== R_ARM_THM_XPC22
)
9639 /* Check for Thumb to Thumb call. */
9640 /* FIXME: Should we translate the instruction into a BL
9641 instruction instead ? */
9642 if (branch_type
== ST_BRANCH_TO_THUMB
)
9643 (*_bfd_error_handler
)
9644 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9646 h
? h
->root
.root
.string
: "(local)");
9650 /* If it is not a call to Thumb, assume call to Arm.
9651 If it is a call relative to a section name, then it is not a
9652 function call at all, but rather a long jump. Calls through
9653 the PLT do not require stubs. */
9654 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
9656 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
9658 /* Convert BL to BLX. */
9659 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
9661 else if (( r_type
!= R_ARM_THM_CALL
)
9662 && (r_type
!= R_ARM_THM_JUMP24
))
9664 if (elf32_thumb_to_arm_stub
9665 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
9666 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
9668 return bfd_reloc_ok
;
9670 return bfd_reloc_dangerous
;
9673 else if (branch_type
== ST_BRANCH_TO_THUMB
9675 && r_type
== R_ARM_THM_CALL
)
9677 /* Make sure this is a BL. */
9678 lower_insn
|= 0x1800;
9682 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9683 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
9685 /* Check if a stub has to be inserted because the destination
9687 struct elf32_arm_stub_hash_entry
*stub_entry
;
9688 struct elf32_arm_link_hash_entry
*hash
;
9690 hash
= (struct elf32_arm_link_hash_entry
*) h
;
9692 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9693 st_type
, &branch_type
,
9694 hash
, value
, sym_sec
,
9695 input_bfd
, sym_name
);
9697 if (stub_type
!= arm_stub_none
)
9699 /* The target is out of reach or we are changing modes, so
9700 redirect the branch to the local stub for this
9702 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9706 if (stub_entry
!= NULL
)
9708 value
= (stub_entry
->stub_offset
9709 + stub_entry
->stub_sec
->output_offset
9710 + stub_entry
->stub_sec
->output_section
->vma
);
9712 if (plt_offset
!= (bfd_vma
) -1)
9713 *unresolved_reloc_p
= FALSE
;
9716 /* If this call becomes a call to Arm, force BLX. */
9717 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
9720 && !arm_stub_is_thumb (stub_entry
->stub_type
))
9721 || branch_type
!= ST_BRANCH_TO_THUMB
)
9722 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
9727 /* Handle calls via the PLT. */
9728 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
9730 value
= (splt
->output_section
->vma
9731 + splt
->output_offset
9734 if (globals
->use_blx
9735 && r_type
== R_ARM_THM_CALL
9736 && ! using_thumb_only (globals
))
9738 /* If the Thumb BLX instruction is available, convert
9739 the BL to a BLX instruction to call the ARM-mode
9741 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
9742 branch_type
= ST_BRANCH_TO_ARM
;
9746 if (! using_thumb_only (globals
))
9747 /* Target the Thumb stub before the ARM PLT entry. */
9748 value
-= PLT_THUMB_STUB_SIZE
;
9749 branch_type
= ST_BRANCH_TO_THUMB
;
9751 *unresolved_reloc_p
= FALSE
;
9754 relocation
= value
+ signed_addend
;
9756 relocation
-= (input_section
->output_section
->vma
9757 + input_section
->output_offset
9760 check
= relocation
>> howto
->rightshift
;
9762 /* If this is a signed value, the rightshift just dropped
9763 leading 1 bits (assuming twos complement). */
9764 if ((bfd_signed_vma
) relocation
>= 0)
9765 signed_check
= check
;
9767 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
9769 /* Calculate the permissable maximum and minimum values for
9770 this relocation according to whether we're relocating for
9772 bitsize
= howto
->bitsize
;
9775 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
9776 reloc_signed_min
= ~reloc_signed_max
;
9778 /* Assumes two's complement. */
9779 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9782 if ((lower_insn
& 0x5000) == 0x4000)
9783 /* For a BLX instruction, make sure that the relocation is rounded up
9784 to a word boundary. This follows the semantics of the instruction
9785 which specifies that bit 1 of the target address will come from bit
9786 1 of the base address. */
9787 relocation
= (relocation
+ 2) & ~ 3;
9789 /* Put RELOCATION back into the insn. Assumes two's complement.
9790 We use the Thumb-2 encoding, which is safe even if dealing with
9791 a Thumb-1 instruction by virtue of our overflow check above. */
9792 reloc_sign
= (signed_check
< 0) ? 1 : 0;
9793 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
9794 | ((relocation
>> 12) & 0x3ff)
9795 | (reloc_sign
<< 10);
9796 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
9797 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
9798 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
9799 | ((relocation
>> 1) & 0x7ff);
9801 /* Put the relocated value back in the object file: */
9802 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
9803 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
9805 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
9809 case R_ARM_THM_JUMP19
:
9810 /* Thumb32 conditional branch instruction. */
9813 bfd_boolean overflow
= FALSE
;
9814 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
9815 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
9816 bfd_signed_vma reloc_signed_max
= 0xffffe;
9817 bfd_signed_vma reloc_signed_min
= -0x100000;
9818 bfd_signed_vma signed_check
;
9819 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9820 struct elf32_arm_stub_hash_entry
*stub_entry
;
9821 struct elf32_arm_link_hash_entry
*hash
;
9823 /* Need to refetch the addend, reconstruct the top three bits,
9824 and squish the two 11 bit pieces together. */
9825 if (globals
->use_rel
)
9827 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
9828 bfd_vma upper
= (upper_insn
& 0x003f);
9829 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
9830 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
9831 bfd_vma lower
= (lower_insn
& 0x07ff);
9836 upper
-= 0x0100; /* Sign extend. */
9838 addend
= (upper
<< 12) | (lower
<< 1);
9839 signed_addend
= addend
;
9842 /* Handle calls via the PLT. */
9843 if (plt_offset
!= (bfd_vma
) -1)
9845 value
= (splt
->output_section
->vma
9846 + splt
->output_offset
9848 /* Target the Thumb stub before the ARM PLT entry. */
9849 value
-= PLT_THUMB_STUB_SIZE
;
9850 *unresolved_reloc_p
= FALSE
;
9853 hash
= (struct elf32_arm_link_hash_entry
*)h
;
9855 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9856 st_type
, &branch_type
,
9857 hash
, value
, sym_sec
,
9858 input_bfd
, sym_name
);
9859 if (stub_type
!= arm_stub_none
)
9861 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9865 if (stub_entry
!= NULL
)
9867 value
= (stub_entry
->stub_offset
9868 + stub_entry
->stub_sec
->output_offset
9869 + stub_entry
->stub_sec
->output_section
->vma
);
9873 relocation
= value
+ signed_addend
;
9874 relocation
-= (input_section
->output_section
->vma
9875 + input_section
->output_offset
9877 signed_check
= (bfd_signed_vma
) relocation
;
9879 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9882 /* Put RELOCATION back into the insn. */
9884 bfd_vma S
= (relocation
& 0x00100000) >> 20;
9885 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
9886 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
9887 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
9888 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
9890 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
9891 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
9894 /* Put the relocated value back in the object file: */
9895 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
9896 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
9898 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
9901 case R_ARM_THM_JUMP11
:
9902 case R_ARM_THM_JUMP8
:
9903 case R_ARM_THM_JUMP6
:
9904 /* Thumb B (branch) instruction). */
9906 bfd_signed_vma relocation
;
9907 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
9908 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
9909 bfd_signed_vma signed_check
;
9911 /* CZB cannot jump backward. */
9912 if (r_type
== R_ARM_THM_JUMP6
)
9913 reloc_signed_min
= 0;
9915 if (globals
->use_rel
)
9917 /* Need to refetch addend. */
9918 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
9919 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9922 signed_addend
&= ~ howto
->src_mask
;
9923 signed_addend
|= addend
;
9926 signed_addend
= addend
;
9927 /* The value in the insn has been right shifted. We need to
9928 undo this, so that we can perform the address calculation
9929 in terms of bytes. */
9930 signed_addend
<<= howto
->rightshift
;
9932 relocation
= value
+ signed_addend
;
9934 relocation
-= (input_section
->output_section
->vma
9935 + input_section
->output_offset
9938 relocation
>>= howto
->rightshift
;
9939 signed_check
= relocation
;
9941 if (r_type
== R_ARM_THM_JUMP6
)
9942 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
9944 relocation
&= howto
->dst_mask
;
9945 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
9947 bfd_put_16 (input_bfd
, relocation
, hit_data
);
9949 /* Assumes two's complement. */
9950 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9951 return bfd_reloc_overflow
;
9953 return bfd_reloc_ok
;
9956 case R_ARM_ALU_PCREL7_0
:
9957 case R_ARM_ALU_PCREL15_8
:
9958 case R_ARM_ALU_PCREL23_15
:
9963 insn
= bfd_get_32 (input_bfd
, hit_data
);
9964 if (globals
->use_rel
)
9966 /* Extract the addend. */
9967 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
9968 signed_addend
= addend
;
9970 relocation
= value
+ signed_addend
;
9972 relocation
-= (input_section
->output_section
->vma
9973 + input_section
->output_offset
9975 insn
= (insn
& ~0xfff)
9976 | ((howto
->bitpos
<< 7) & 0xf00)
9977 | ((relocation
>> howto
->bitpos
) & 0xff);
9978 bfd_put_32 (input_bfd
, value
, hit_data
);
9980 return bfd_reloc_ok
;
9982 case R_ARM_GNU_VTINHERIT
:
9983 case R_ARM_GNU_VTENTRY
:
9984 return bfd_reloc_ok
;
9986 case R_ARM_GOTOFF32
:
9987 /* Relocation is relative to the start of the
9988 global offset table. */
9990 BFD_ASSERT (sgot
!= NULL
);
9992 return bfd_reloc_notsupported
;
9994 /* If we are addressing a Thumb function, we need to adjust the
9995 address by one, so that attempts to call the function pointer will
9996 correctly interpret it as Thumb code. */
9997 if (branch_type
== ST_BRANCH_TO_THUMB
)
10000 /* Note that sgot->output_offset is not involved in this
10001 calculation. We always want the start of .got. If we
10002 define _GLOBAL_OFFSET_TABLE in a different way, as is
10003 permitted by the ABI, we might have to change this
10005 value
-= sgot
->output_section
->vma
;
10006 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10007 contents
, rel
->r_offset
, value
,
10011 /* Use global offset table as symbol value. */
10012 BFD_ASSERT (sgot
!= NULL
);
10015 return bfd_reloc_notsupported
;
10017 *unresolved_reloc_p
= FALSE
;
10018 value
= sgot
->output_section
->vma
;
10019 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10020 contents
, rel
->r_offset
, value
,
10024 case R_ARM_GOT_PREL
:
10025 /* Relocation is to the entry for this symbol in the
10026 global offset table. */
10028 return bfd_reloc_notsupported
;
10030 if (dynreloc_st_type
== STT_GNU_IFUNC
10031 && plt_offset
!= (bfd_vma
) -1
10032 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
10034 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10035 symbol, and the relocation resolves directly to the runtime
10036 target rather than to the .iplt entry. This means that any
10037 .got entry would be the same value as the .igot.plt entry,
10038 so there's no point creating both. */
10039 sgot
= globals
->root
.igotplt
;
10040 value
= sgot
->output_offset
+ gotplt_offset
;
10042 else if (h
!= NULL
)
10046 off
= h
->got
.offset
;
10047 BFD_ASSERT (off
!= (bfd_vma
) -1);
10048 if ((off
& 1) != 0)
10050 /* We have already processsed one GOT relocation against
10053 if (globals
->root
.dynamic_sections_created
10054 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
10055 *unresolved_reloc_p
= FALSE
;
10059 Elf_Internal_Rela outrel
;
10061 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
10063 /* If the symbol doesn't resolve locally in a static
10064 object, we have an undefined reference. If the
10065 symbol doesn't resolve locally in a dynamic object,
10066 it should be resolved by the dynamic linker. */
10067 if (globals
->root
.dynamic_sections_created
)
10069 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
10070 *unresolved_reloc_p
= FALSE
;
10074 outrel
.r_addend
= 0;
10078 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10079 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
10080 else if (bfd_link_pic (info
) &&
10081 (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10082 || h
->root
.type
!= bfd_link_hash_undefweak
))
10083 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
10086 outrel
.r_addend
= dynreloc_value
;
10089 /* The GOT entry is initialized to zero by default.
10090 See if we should install a different value. */
10091 if (outrel
.r_addend
!= 0
10092 && (outrel
.r_info
== 0 || globals
->use_rel
))
10094 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10095 sgot
->contents
+ off
);
10096 outrel
.r_addend
= 0;
10099 if (outrel
.r_info
!= 0)
10101 outrel
.r_offset
= (sgot
->output_section
->vma
10102 + sgot
->output_offset
10104 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10106 h
->got
.offset
|= 1;
10108 value
= sgot
->output_offset
+ off
;
10114 BFD_ASSERT (local_got_offsets
!= NULL
&&
10115 local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
10117 off
= local_got_offsets
[r_symndx
];
10119 /* The offset must always be a multiple of 4. We use the
10120 least significant bit to record whether we have already
10121 generated the necessary reloc. */
10122 if ((off
& 1) != 0)
10126 if (globals
->use_rel
)
10127 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
10129 if (bfd_link_pic (info
) || dynreloc_st_type
== STT_GNU_IFUNC
)
10131 Elf_Internal_Rela outrel
;
10133 outrel
.r_addend
= addend
+ dynreloc_value
;
10134 outrel
.r_offset
= (sgot
->output_section
->vma
10135 + sgot
->output_offset
10137 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10138 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
10140 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
10141 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10144 local_got_offsets
[r_symndx
] |= 1;
10147 value
= sgot
->output_offset
+ off
;
10149 if (r_type
!= R_ARM_GOT32
)
10150 value
+= sgot
->output_section
->vma
;
10152 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10153 contents
, rel
->r_offset
, value
,
10156 case R_ARM_TLS_LDO32
:
10157 value
= value
- dtpoff_base (info
);
10159 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10160 contents
, rel
->r_offset
, value
,
10163 case R_ARM_TLS_LDM32
:
10170 off
= globals
->tls_ldm_got
.offset
;
10172 if ((off
& 1) != 0)
10176 /* If we don't know the module number, create a relocation
10178 if (bfd_link_pic (info
))
10180 Elf_Internal_Rela outrel
;
10182 if (srelgot
== NULL
)
10185 outrel
.r_addend
= 0;
10186 outrel
.r_offset
= (sgot
->output_section
->vma
10187 + sgot
->output_offset
+ off
);
10188 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
10190 if (globals
->use_rel
)
10191 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10192 sgot
->contents
+ off
);
10194 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10197 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
10199 globals
->tls_ldm_got
.offset
|= 1;
10202 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
10203 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
10205 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10206 contents
, rel
->r_offset
, value
,
10210 case R_ARM_TLS_CALL
:
10211 case R_ARM_THM_TLS_CALL
:
10212 case R_ARM_TLS_GD32
:
10213 case R_ARM_TLS_IE32
:
10214 case R_ARM_TLS_GOTDESC
:
10215 case R_ARM_TLS_DESCSEQ
:
10216 case R_ARM_THM_TLS_DESCSEQ
:
10218 bfd_vma off
, offplt
;
10222 BFD_ASSERT (sgot
!= NULL
);
10227 dyn
= globals
->root
.dynamic_sections_created
;
10228 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
10229 bfd_link_pic (info
),
10231 && (!bfd_link_pic (info
)
10232 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
10234 *unresolved_reloc_p
= FALSE
;
10237 off
= h
->got
.offset
;
10238 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
10239 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
10243 BFD_ASSERT (local_got_offsets
!= NULL
);
10244 off
= local_got_offsets
[r_symndx
];
10245 offplt
= local_tlsdesc_gotents
[r_symndx
];
10246 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
10249 /* Linker relaxations happens from one of the
10250 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10251 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
10252 tls_type
= GOT_TLS_IE
;
10254 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
10256 if ((off
& 1) != 0)
10260 bfd_boolean need_relocs
= FALSE
;
10261 Elf_Internal_Rela outrel
;
10264 /* The GOT entries have not been initialized yet. Do it
10265 now, and emit any relocations. If both an IE GOT and a
10266 GD GOT are necessary, we emit the GD first. */
10268 if ((bfd_link_pic (info
) || indx
!= 0)
10270 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10271 || h
->root
.type
!= bfd_link_hash_undefweak
))
10273 need_relocs
= TRUE
;
10274 BFD_ASSERT (srelgot
!= NULL
);
10277 if (tls_type
& GOT_TLS_GDESC
)
10281 /* We should have relaxed, unless this is an undefined
10283 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
10284 || bfd_link_pic (info
));
10285 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
10286 <= globals
->root
.sgotplt
->size
);
10288 outrel
.r_addend
= 0;
10289 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
10290 + globals
->root
.sgotplt
->output_offset
10292 + globals
->sgotplt_jump_table_size
);
10294 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
10295 sreloc
= globals
->root
.srelplt
;
10296 loc
= sreloc
->contents
;
10297 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
10298 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
10299 <= sreloc
->contents
+ sreloc
->size
);
10301 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
10303 /* For globals, the first word in the relocation gets
10304 the relocation index and the top bit set, or zero,
10305 if we're binding now. For locals, it gets the
10306 symbol's offset in the tls section. */
10307 bfd_put_32 (output_bfd
,
10308 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
10309 : info
->flags
& DF_BIND_NOW
? 0
10310 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
10311 globals
->root
.sgotplt
->contents
+ offplt
10312 + globals
->sgotplt_jump_table_size
);
10314 /* Second word in the relocation is always zero. */
10315 bfd_put_32 (output_bfd
, 0,
10316 globals
->root
.sgotplt
->contents
+ offplt
10317 + globals
->sgotplt_jump_table_size
+ 4);
10319 if (tls_type
& GOT_TLS_GD
)
10323 outrel
.r_addend
= 0;
10324 outrel
.r_offset
= (sgot
->output_section
->vma
10325 + sgot
->output_offset
10327 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
10329 if (globals
->use_rel
)
10330 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10331 sgot
->contents
+ cur_off
);
10333 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10336 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
10337 sgot
->contents
+ cur_off
+ 4);
10340 outrel
.r_addend
= 0;
10341 outrel
.r_info
= ELF32_R_INFO (indx
,
10342 R_ARM_TLS_DTPOFF32
);
10343 outrel
.r_offset
+= 4;
10345 if (globals
->use_rel
)
10346 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10347 sgot
->contents
+ cur_off
+ 4);
10349 elf32_arm_add_dynreloc (output_bfd
, info
,
10355 /* If we are not emitting relocations for a
10356 general dynamic reference, then we must be in a
10357 static link or an executable link with the
10358 symbol binding locally. Mark it as belonging
10359 to module 1, the executable. */
10360 bfd_put_32 (output_bfd
, 1,
10361 sgot
->contents
+ cur_off
);
10362 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
10363 sgot
->contents
+ cur_off
+ 4);
10369 if (tls_type
& GOT_TLS_IE
)
10374 outrel
.r_addend
= value
- dtpoff_base (info
);
10376 outrel
.r_addend
= 0;
10377 outrel
.r_offset
= (sgot
->output_section
->vma
10378 + sgot
->output_offset
10380 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
10382 if (globals
->use_rel
)
10383 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10384 sgot
->contents
+ cur_off
);
10386 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10389 bfd_put_32 (output_bfd
, tpoff (info
, value
),
10390 sgot
->contents
+ cur_off
);
10395 h
->got
.offset
|= 1;
10397 local_got_offsets
[r_symndx
] |= 1;
10400 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
10402 else if (tls_type
& GOT_TLS_GDESC
)
10405 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
10406 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
10408 bfd_signed_vma offset
;
10409 /* TLS stubs are arm mode. The original symbol is a
10410 data object, so branch_type is bogus. */
10411 branch_type
= ST_BRANCH_TO_ARM
;
10412 enum elf32_arm_stub_type stub_type
10413 = arm_type_of_stub (info
, input_section
, rel
,
10414 st_type
, &branch_type
,
10415 (struct elf32_arm_link_hash_entry
*)h
,
10416 globals
->tls_trampoline
, globals
->root
.splt
,
10417 input_bfd
, sym_name
);
10419 if (stub_type
!= arm_stub_none
)
10421 struct elf32_arm_stub_hash_entry
*stub_entry
10422 = elf32_arm_get_stub_entry
10423 (input_section
, globals
->root
.splt
, 0, rel
,
10424 globals
, stub_type
);
10425 offset
= (stub_entry
->stub_offset
10426 + stub_entry
->stub_sec
->output_offset
10427 + stub_entry
->stub_sec
->output_section
->vma
);
10430 offset
= (globals
->root
.splt
->output_section
->vma
10431 + globals
->root
.splt
->output_offset
10432 + globals
->tls_trampoline
);
10434 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
10436 unsigned long inst
;
10438 offset
-= (input_section
->output_section
->vma
10439 + input_section
->output_offset
10440 + rel
->r_offset
+ 8);
10442 inst
= offset
>> 2;
10443 inst
&= 0x00ffffff;
10444 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
10448 /* Thumb blx encodes the offset in a complicated
10450 unsigned upper_insn
, lower_insn
;
10453 offset
-= (input_section
->output_section
->vma
10454 + input_section
->output_offset
10455 + rel
->r_offset
+ 4);
10457 if (stub_type
!= arm_stub_none
10458 && arm_stub_is_thumb (stub_type
))
10460 lower_insn
= 0xd000;
10464 lower_insn
= 0xc000;
10465 /* Round up the offset to a word boundary. */
10466 offset
= (offset
+ 2) & ~2;
10470 upper_insn
= (0xf000
10471 | ((offset
>> 12) & 0x3ff)
10473 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
10474 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
10475 | ((offset
>> 1) & 0x7ff);
10476 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10477 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10478 return bfd_reloc_ok
;
10481 /* These relocations needs special care, as besides the fact
10482 they point somewhere in .gotplt, the addend must be
10483 adjusted accordingly depending on the type of instruction
10485 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
10487 unsigned long data
, insn
;
10490 data
= bfd_get_32 (input_bfd
, hit_data
);
10496 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
10497 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10498 insn
= (insn
<< 16)
10499 | bfd_get_16 (input_bfd
,
10500 contents
+ rel
->r_offset
- data
+ 2);
10501 if ((insn
& 0xf800c000) == 0xf000c000)
10504 else if ((insn
& 0xffffff00) == 0x4400)
10509 (*_bfd_error_handler
)
10510 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10511 input_bfd
, input_section
,
10512 (unsigned long)rel
->r_offset
, insn
);
10513 return bfd_reloc_notsupported
;
10518 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
10520 switch (insn
>> 24)
10522 case 0xeb: /* bl */
10523 case 0xfa: /* blx */
10527 case 0xe0: /* add */
10532 (*_bfd_error_handler
)
10533 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10534 input_bfd
, input_section
,
10535 (unsigned long)rel
->r_offset
, insn
);
10536 return bfd_reloc_notsupported
;
10540 value
+= ((globals
->root
.sgotplt
->output_section
->vma
10541 + globals
->root
.sgotplt
->output_offset
+ off
)
10542 - (input_section
->output_section
->vma
10543 + input_section
->output_offset
10545 + globals
->sgotplt_jump_table_size
);
10548 value
= ((globals
->root
.sgot
->output_section
->vma
10549 + globals
->root
.sgot
->output_offset
+ off
)
10550 - (input_section
->output_section
->vma
10551 + input_section
->output_offset
+ rel
->r_offset
));
10553 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10554 contents
, rel
->r_offset
, value
,
10558 case R_ARM_TLS_LE32
:
10559 if (bfd_link_dll (info
))
10561 (*_bfd_error_handler
)
10562 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10563 input_bfd
, input_section
,
10564 (long) rel
->r_offset
, howto
->name
);
10565 return bfd_reloc_notsupported
;
10568 value
= tpoff (info
, value
);
10570 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10571 contents
, rel
->r_offset
, value
,
10575 if (globals
->fix_v4bx
)
10577 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10579 /* Ensure that we have a BX instruction. */
10580 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
10582 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
10584 /* Branch to veneer. */
10586 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
10587 glue_addr
-= input_section
->output_section
->vma
10588 + input_section
->output_offset
10589 + rel
->r_offset
+ 8;
10590 insn
= (insn
& 0xf0000000) | 0x0a000000
10591 | ((glue_addr
>> 2) & 0x00ffffff);
10595 /* Preserve Rm (lowest four bits) and the condition code
10596 (highest four bits). Other bits encode MOV PC,Rm. */
10597 insn
= (insn
& 0xf000000f) | 0x01a0f000;
10600 bfd_put_32 (input_bfd
, insn
, hit_data
);
10602 return bfd_reloc_ok
;
10604 case R_ARM_MOVW_ABS_NC
:
10605 case R_ARM_MOVT_ABS
:
10606 case R_ARM_MOVW_PREL_NC
:
10607 case R_ARM_MOVT_PREL
:
10608 /* Until we properly support segment-base-relative addressing then
10609 we assume the segment base to be zero, as for the group relocations.
10610 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10611 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10612 case R_ARM_MOVW_BREL_NC
:
10613 case R_ARM_MOVW_BREL
:
10614 case R_ARM_MOVT_BREL
:
10616 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10618 if (globals
->use_rel
)
10620 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
10621 signed_addend
= (addend
^ 0x8000) - 0x8000;
10624 value
+= signed_addend
;
10626 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
10627 value
-= (input_section
->output_section
->vma
10628 + input_section
->output_offset
+ rel
->r_offset
);
10630 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
10631 return bfd_reloc_overflow
;
10633 if (branch_type
== ST_BRANCH_TO_THUMB
)
10636 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
10637 || r_type
== R_ARM_MOVT_BREL
)
10640 insn
&= 0xfff0f000;
10641 insn
|= value
& 0xfff;
10642 insn
|= (value
& 0xf000) << 4;
10643 bfd_put_32 (input_bfd
, insn
, hit_data
);
10645 return bfd_reloc_ok
;
10647 case R_ARM_THM_MOVW_ABS_NC
:
10648 case R_ARM_THM_MOVT_ABS
:
10649 case R_ARM_THM_MOVW_PREL_NC
:
10650 case R_ARM_THM_MOVT_PREL
:
10651 /* Until we properly support segment-base-relative addressing then
10652 we assume the segment base to be zero, as for the above relocations.
10653 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10654 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10655 as R_ARM_THM_MOVT_ABS. */
10656 case R_ARM_THM_MOVW_BREL_NC
:
10657 case R_ARM_THM_MOVW_BREL
:
10658 case R_ARM_THM_MOVT_BREL
:
10662 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
10663 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
10665 if (globals
->use_rel
)
10667 addend
= ((insn
>> 4) & 0xf000)
10668 | ((insn
>> 15) & 0x0800)
10669 | ((insn
>> 4) & 0x0700)
10671 signed_addend
= (addend
^ 0x8000) - 0x8000;
10674 value
+= signed_addend
;
10676 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
10677 value
-= (input_section
->output_section
->vma
10678 + input_section
->output_offset
+ rel
->r_offset
);
10680 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
10681 return bfd_reloc_overflow
;
10683 if (branch_type
== ST_BRANCH_TO_THUMB
)
10686 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
10687 || r_type
== R_ARM_THM_MOVT_BREL
)
10690 insn
&= 0xfbf08f00;
10691 insn
|= (value
& 0xf000) << 4;
10692 insn
|= (value
& 0x0800) << 15;
10693 insn
|= (value
& 0x0700) << 4;
10694 insn
|= (value
& 0x00ff);
10696 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10697 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10699 return bfd_reloc_ok
;
10701 case R_ARM_ALU_PC_G0_NC
:
10702 case R_ARM_ALU_PC_G1_NC
:
10703 case R_ARM_ALU_PC_G0
:
10704 case R_ARM_ALU_PC_G1
:
10705 case R_ARM_ALU_PC_G2
:
10706 case R_ARM_ALU_SB_G0_NC
:
10707 case R_ARM_ALU_SB_G1_NC
:
10708 case R_ARM_ALU_SB_G0
:
10709 case R_ARM_ALU_SB_G1
:
10710 case R_ARM_ALU_SB_G2
:
10712 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10713 bfd_vma pc
= input_section
->output_section
->vma
10714 + input_section
->output_offset
+ rel
->r_offset
;
10715 /* sb is the origin of the *segment* containing the symbol. */
10716 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
10719 bfd_signed_vma signed_value
;
10722 /* Determine which group of bits to select. */
10725 case R_ARM_ALU_PC_G0_NC
:
10726 case R_ARM_ALU_PC_G0
:
10727 case R_ARM_ALU_SB_G0_NC
:
10728 case R_ARM_ALU_SB_G0
:
10732 case R_ARM_ALU_PC_G1_NC
:
10733 case R_ARM_ALU_PC_G1
:
10734 case R_ARM_ALU_SB_G1_NC
:
10735 case R_ARM_ALU_SB_G1
:
10739 case R_ARM_ALU_PC_G2
:
10740 case R_ARM_ALU_SB_G2
:
10748 /* If REL, extract the addend from the insn. If RELA, it will
10749 have already been fetched for us. */
10750 if (globals
->use_rel
)
10753 bfd_vma constant
= insn
& 0xff;
10754 bfd_vma rotation
= (insn
& 0xf00) >> 8;
10757 signed_addend
= constant
;
10760 /* Compensate for the fact that in the instruction, the
10761 rotation is stored in multiples of 2 bits. */
10764 /* Rotate "constant" right by "rotation" bits. */
10765 signed_addend
= (constant
>> rotation
) |
10766 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
10769 /* Determine if the instruction is an ADD or a SUB.
10770 (For REL, this determines the sign of the addend.) */
10771 negative
= identify_add_or_sub (insn
);
10774 (*_bfd_error_handler
)
10775 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10776 input_bfd
, input_section
,
10777 (long) rel
->r_offset
, howto
->name
);
10778 return bfd_reloc_overflow
;
10781 signed_addend
*= negative
;
10784 /* Compute the value (X) to go in the place. */
10785 if (r_type
== R_ARM_ALU_PC_G0_NC
10786 || r_type
== R_ARM_ALU_PC_G1_NC
10787 || r_type
== R_ARM_ALU_PC_G0
10788 || r_type
== R_ARM_ALU_PC_G1
10789 || r_type
== R_ARM_ALU_PC_G2
)
10791 signed_value
= value
- pc
+ signed_addend
;
10793 /* Section base relative. */
10794 signed_value
= value
- sb
+ signed_addend
;
10796 /* If the target symbol is a Thumb function, then set the
10797 Thumb bit in the address. */
10798 if (branch_type
== ST_BRANCH_TO_THUMB
)
10801 /* Calculate the value of the relevant G_n, in encoded
10802 constant-with-rotation format. */
10803 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
10806 /* Check for overflow if required. */
10807 if ((r_type
== R_ARM_ALU_PC_G0
10808 || r_type
== R_ARM_ALU_PC_G1
10809 || r_type
== R_ARM_ALU_PC_G2
10810 || r_type
== R_ARM_ALU_SB_G0
10811 || r_type
== R_ARM_ALU_SB_G1
10812 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
10814 (*_bfd_error_handler
)
10815 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10816 input_bfd
, input_section
,
10817 (long) rel
->r_offset
, signed_value
< 0 ? - signed_value
: signed_value
,
10819 return bfd_reloc_overflow
;
10822 /* Mask out the value and the ADD/SUB part of the opcode; take care
10823 not to destroy the S bit. */
10824 insn
&= 0xff1ff000;
10826 /* Set the opcode according to whether the value to go in the
10827 place is negative. */
10828 if (signed_value
< 0)
10833 /* Encode the offset. */
10836 bfd_put_32 (input_bfd
, insn
, hit_data
);
10838 return bfd_reloc_ok
;
10840 case R_ARM_LDR_PC_G0
:
10841 case R_ARM_LDR_PC_G1
:
10842 case R_ARM_LDR_PC_G2
:
10843 case R_ARM_LDR_SB_G0
:
10844 case R_ARM_LDR_SB_G1
:
10845 case R_ARM_LDR_SB_G2
:
10847 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10848 bfd_vma pc
= input_section
->output_section
->vma
10849 + input_section
->output_offset
+ rel
->r_offset
;
10850 /* sb is the origin of the *segment* containing the symbol. */
10851 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
10853 bfd_signed_vma signed_value
;
10856 /* Determine which groups of bits to calculate. */
10859 case R_ARM_LDR_PC_G0
:
10860 case R_ARM_LDR_SB_G0
:
10864 case R_ARM_LDR_PC_G1
:
10865 case R_ARM_LDR_SB_G1
:
10869 case R_ARM_LDR_PC_G2
:
10870 case R_ARM_LDR_SB_G2
:
10878 /* If REL, extract the addend from the insn. If RELA, it will
10879 have already been fetched for us. */
10880 if (globals
->use_rel
)
10882 int negative
= (insn
& (1 << 23)) ? 1 : -1;
10883 signed_addend
= negative
* (insn
& 0xfff);
10886 /* Compute the value (X) to go in the place. */
10887 if (r_type
== R_ARM_LDR_PC_G0
10888 || r_type
== R_ARM_LDR_PC_G1
10889 || r_type
== R_ARM_LDR_PC_G2
)
10891 signed_value
= value
- pc
+ signed_addend
;
10893 /* Section base relative. */
10894 signed_value
= value
- sb
+ signed_addend
;
10896 /* Calculate the value of the relevant G_{n-1} to obtain
10897 the residual at that stage. */
10898 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
10899 group
- 1, &residual
);
10901 /* Check for overflow. */
10902 if (residual
>= 0x1000)
10904 (*_bfd_error_handler
)
10905 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10906 input_bfd
, input_section
,
10907 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
10908 return bfd_reloc_overflow
;
10911 /* Mask out the value and U bit. */
10912 insn
&= 0xff7ff000;
10914 /* Set the U bit if the value to go in the place is non-negative. */
10915 if (signed_value
>= 0)
10918 /* Encode the offset. */
10921 bfd_put_32 (input_bfd
, insn
, hit_data
);
10923 return bfd_reloc_ok
;
10925 case R_ARM_LDRS_PC_G0
:
10926 case R_ARM_LDRS_PC_G1
:
10927 case R_ARM_LDRS_PC_G2
:
10928 case R_ARM_LDRS_SB_G0
:
10929 case R_ARM_LDRS_SB_G1
:
10930 case R_ARM_LDRS_SB_G2
:
10932 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10933 bfd_vma pc
= input_section
->output_section
->vma
10934 + input_section
->output_offset
+ rel
->r_offset
;
10935 /* sb is the origin of the *segment* containing the symbol. */
10936 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
10938 bfd_signed_vma signed_value
;
10941 /* Determine which groups of bits to calculate. */
10944 case R_ARM_LDRS_PC_G0
:
10945 case R_ARM_LDRS_SB_G0
:
10949 case R_ARM_LDRS_PC_G1
:
10950 case R_ARM_LDRS_SB_G1
:
10954 case R_ARM_LDRS_PC_G2
:
10955 case R_ARM_LDRS_SB_G2
:
10963 /* If REL, extract the addend from the insn. If RELA, it will
10964 have already been fetched for us. */
10965 if (globals
->use_rel
)
10967 int negative
= (insn
& (1 << 23)) ? 1 : -1;
10968 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
10971 /* Compute the value (X) to go in the place. */
10972 if (r_type
== R_ARM_LDRS_PC_G0
10973 || r_type
== R_ARM_LDRS_PC_G1
10974 || r_type
== R_ARM_LDRS_PC_G2
)
10976 signed_value
= value
- pc
+ signed_addend
;
10978 /* Section base relative. */
10979 signed_value
= value
- sb
+ signed_addend
;
10981 /* Calculate the value of the relevant G_{n-1} to obtain
10982 the residual at that stage. */
10983 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
10984 group
- 1, &residual
);
10986 /* Check for overflow. */
10987 if (residual
>= 0x100)
10989 (*_bfd_error_handler
)
10990 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10991 input_bfd
, input_section
,
10992 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
10993 return bfd_reloc_overflow
;
10996 /* Mask out the value and U bit. */
10997 insn
&= 0xff7ff0f0;
10999 /* Set the U bit if the value to go in the place is non-negative. */
11000 if (signed_value
>= 0)
11003 /* Encode the offset. */
11004 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
11006 bfd_put_32 (input_bfd
, insn
, hit_data
);
11008 return bfd_reloc_ok
;
11010 case R_ARM_LDC_PC_G0
:
11011 case R_ARM_LDC_PC_G1
:
11012 case R_ARM_LDC_PC_G2
:
11013 case R_ARM_LDC_SB_G0
:
11014 case R_ARM_LDC_SB_G1
:
11015 case R_ARM_LDC_SB_G2
:
11017 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11018 bfd_vma pc
= input_section
->output_section
->vma
11019 + input_section
->output_offset
+ rel
->r_offset
;
11020 /* sb is the origin of the *segment* containing the symbol. */
11021 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11023 bfd_signed_vma signed_value
;
11026 /* Determine which groups of bits to calculate. */
11029 case R_ARM_LDC_PC_G0
:
11030 case R_ARM_LDC_SB_G0
:
11034 case R_ARM_LDC_PC_G1
:
11035 case R_ARM_LDC_SB_G1
:
11039 case R_ARM_LDC_PC_G2
:
11040 case R_ARM_LDC_SB_G2
:
11048 /* If REL, extract the addend from the insn. If RELA, it will
11049 have already been fetched for us. */
11050 if (globals
->use_rel
)
11052 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11053 signed_addend
= negative
* ((insn
& 0xff) << 2);
11056 /* Compute the value (X) to go in the place. */
11057 if (r_type
== R_ARM_LDC_PC_G0
11058 || r_type
== R_ARM_LDC_PC_G1
11059 || r_type
== R_ARM_LDC_PC_G2
)
11061 signed_value
= value
- pc
+ signed_addend
;
11063 /* Section base relative. */
11064 signed_value
= value
- sb
+ signed_addend
;
11066 /* Calculate the value of the relevant G_{n-1} to obtain
11067 the residual at that stage. */
11068 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11069 group
- 1, &residual
);
11071 /* Check for overflow. (The absolute value to go in the place must be
11072 divisible by four and, after having been divided by four, must
11073 fit in eight bits.) */
11074 if ((residual
& 0x3) != 0 || residual
>= 0x400)
11076 (*_bfd_error_handler
)
11077 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11078 input_bfd
, input_section
,
11079 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
11080 return bfd_reloc_overflow
;
11083 /* Mask out the value and U bit. */
11084 insn
&= 0xff7fff00;
11086 /* Set the U bit if the value to go in the place is non-negative. */
11087 if (signed_value
>= 0)
11090 /* Encode the offset. */
11091 insn
|= residual
>> 2;
11093 bfd_put_32 (input_bfd
, insn
, hit_data
);
11095 return bfd_reloc_ok
;
11097 case R_ARM_THM_ALU_ABS_G0_NC
:
11098 case R_ARM_THM_ALU_ABS_G1_NC
:
11099 case R_ARM_THM_ALU_ABS_G2_NC
:
11100 case R_ARM_THM_ALU_ABS_G3_NC
:
11102 const int shift_array
[4] = {0, 8, 16, 24};
11103 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
11104 bfd_vma addr
= value
;
11105 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
11107 /* Compute address. */
11108 if (globals
->use_rel
)
11109 signed_addend
= insn
& 0xff;
11110 addr
+= signed_addend
;
11111 if (branch_type
== ST_BRANCH_TO_THUMB
)
11113 /* Clean imm8 insn. */
11115 /* And update with correct part of address. */
11116 insn
|= (addr
>> shift
) & 0xff;
11118 bfd_put_16 (input_bfd
, insn
, hit_data
);
11121 *unresolved_reloc_p
= FALSE
;
11122 return bfd_reloc_ok
;
11125 return bfd_reloc_notsupported
;
11129 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11131 arm_add_to_rel (bfd
* abfd
,
11132 bfd_byte
* address
,
11133 reloc_howto_type
* howto
,
11134 bfd_signed_vma increment
)
11136 bfd_signed_vma addend
;
11138 if (howto
->type
== R_ARM_THM_CALL
11139 || howto
->type
== R_ARM_THM_JUMP24
)
11141 int upper_insn
, lower_insn
;
11144 upper_insn
= bfd_get_16 (abfd
, address
);
11145 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
11146 upper
= upper_insn
& 0x7ff;
11147 lower
= lower_insn
& 0x7ff;
11149 addend
= (upper
<< 12) | (lower
<< 1);
11150 addend
+= increment
;
11153 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
11154 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
11156 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
11157 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
11163 contents
= bfd_get_32 (abfd
, address
);
11165 /* Get the (signed) value from the instruction. */
11166 addend
= contents
& howto
->src_mask
;
11167 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11169 bfd_signed_vma mask
;
11172 mask
&= ~ howto
->src_mask
;
11176 /* Add in the increment, (which is a byte value). */
11177 switch (howto
->type
)
11180 addend
+= increment
;
11187 addend
<<= howto
->size
;
11188 addend
+= increment
;
11190 /* Should we check for overflow here ? */
11192 /* Drop any undesired bits. */
11193 addend
>>= howto
->rightshift
;
11197 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
11199 bfd_put_32 (abfd
, contents
, address
);
11203 #define IS_ARM_TLS_RELOC(R_TYPE) \
11204 ((R_TYPE) == R_ARM_TLS_GD32 \
11205 || (R_TYPE) == R_ARM_TLS_LDO32 \
11206 || (R_TYPE) == R_ARM_TLS_LDM32 \
11207 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11208 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11209 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11210 || (R_TYPE) == R_ARM_TLS_LE32 \
11211 || (R_TYPE) == R_ARM_TLS_IE32 \
11212 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11214 /* Specific set of relocations for the gnu tls dialect. */
11215 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11216 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11217 || (R_TYPE) == R_ARM_TLS_CALL \
11218 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11219 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11220 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11222 /* Relocate an ARM ELF section. */
11225 elf32_arm_relocate_section (bfd
* output_bfd
,
11226 struct bfd_link_info
* info
,
11228 asection
* input_section
,
11229 bfd_byte
* contents
,
11230 Elf_Internal_Rela
* relocs
,
11231 Elf_Internal_Sym
* local_syms
,
11232 asection
** local_sections
)
11234 Elf_Internal_Shdr
*symtab_hdr
;
11235 struct elf_link_hash_entry
**sym_hashes
;
11236 Elf_Internal_Rela
*rel
;
11237 Elf_Internal_Rela
*relend
;
11239 struct elf32_arm_link_hash_table
* globals
;
11241 globals
= elf32_arm_hash_table (info
);
11242 if (globals
== NULL
)
11245 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
11246 sym_hashes
= elf_sym_hashes (input_bfd
);
11249 relend
= relocs
+ input_section
->reloc_count
;
11250 for (; rel
< relend
; rel
++)
11253 reloc_howto_type
* howto
;
11254 unsigned long r_symndx
;
11255 Elf_Internal_Sym
* sym
;
11257 struct elf_link_hash_entry
* h
;
11258 bfd_vma relocation
;
11259 bfd_reloc_status_type r
;
11262 bfd_boolean unresolved_reloc
= FALSE
;
11263 char *error_message
= NULL
;
11265 r_symndx
= ELF32_R_SYM (rel
->r_info
);
11266 r_type
= ELF32_R_TYPE (rel
->r_info
);
11267 r_type
= arm_real_reloc_type (globals
, r_type
);
11269 if ( r_type
== R_ARM_GNU_VTENTRY
11270 || r_type
== R_ARM_GNU_VTINHERIT
)
11273 bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
11274 howto
= bfd_reloc
.howto
;
11280 if (r_symndx
< symtab_hdr
->sh_info
)
11282 sym
= local_syms
+ r_symndx
;
11283 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
11284 sec
= local_sections
[r_symndx
];
11286 /* An object file might have a reference to a local
11287 undefined symbol. This is a daft object file, but we
11288 should at least do something about it. V4BX & NONE
11289 relocations do not use the symbol and are explicitly
11290 allowed to use the undefined symbol, so allow those.
11291 Likewise for relocations against STN_UNDEF. */
11292 if (r_type
!= R_ARM_V4BX
11293 && r_type
!= R_ARM_NONE
11294 && r_symndx
!= STN_UNDEF
11295 && bfd_is_und_section (sec
)
11296 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
11298 if (!info
->callbacks
->undefined_symbol
11299 (info
, bfd_elf_string_from_elf_section
11300 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
11301 input_bfd
, input_section
,
11302 rel
->r_offset
, TRUE
))
11306 if (globals
->use_rel
)
11308 relocation
= (sec
->output_section
->vma
11309 + sec
->output_offset
11311 if (!bfd_link_relocatable (info
)
11312 && (sec
->flags
& SEC_MERGE
)
11313 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
11316 bfd_vma addend
, value
;
11320 case R_ARM_MOVW_ABS_NC
:
11321 case R_ARM_MOVT_ABS
:
11322 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
11323 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
11324 addend
= (addend
^ 0x8000) - 0x8000;
11327 case R_ARM_THM_MOVW_ABS_NC
:
11328 case R_ARM_THM_MOVT_ABS
:
11329 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
11331 value
|= bfd_get_16 (input_bfd
,
11332 contents
+ rel
->r_offset
+ 2);
11333 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
11334 | ((value
& 0x04000000) >> 15);
11335 addend
= (addend
^ 0x8000) - 0x8000;
11339 if (howto
->rightshift
11340 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
11342 (*_bfd_error_handler
)
11343 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11344 input_bfd
, input_section
,
11345 (long) rel
->r_offset
, howto
->name
);
11349 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
11351 /* Get the (signed) value from the instruction. */
11352 addend
= value
& howto
->src_mask
;
11353 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11355 bfd_signed_vma mask
;
11358 mask
&= ~ howto
->src_mask
;
11366 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
11368 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
11370 /* Cases here must match those in the preceding
11371 switch statement. */
11374 case R_ARM_MOVW_ABS_NC
:
11375 case R_ARM_MOVT_ABS
:
11376 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
11377 | (addend
& 0xfff);
11378 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
11381 case R_ARM_THM_MOVW_ABS_NC
:
11382 case R_ARM_THM_MOVT_ABS
:
11383 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
11384 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
11385 bfd_put_16 (input_bfd
, value
>> 16,
11386 contents
+ rel
->r_offset
);
11387 bfd_put_16 (input_bfd
, value
,
11388 contents
+ rel
->r_offset
+ 2);
11392 value
= (value
& ~ howto
->dst_mask
)
11393 | (addend
& howto
->dst_mask
);
11394 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
11400 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
11404 bfd_boolean warned
, ignored
;
11406 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
11407 r_symndx
, symtab_hdr
, sym_hashes
,
11408 h
, sec
, relocation
,
11409 unresolved_reloc
, warned
, ignored
);
11411 sym_type
= h
->type
;
11414 if (sec
!= NULL
&& discarded_section (sec
))
11415 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
11416 rel
, 1, relend
, howto
, 0, contents
);
11418 if (bfd_link_relocatable (info
))
11420 /* This is a relocatable link. We don't have to change
11421 anything, unless the reloc is against a section symbol,
11422 in which case we have to adjust according to where the
11423 section symbol winds up in the output section. */
11424 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
11426 if (globals
->use_rel
)
11427 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
11428 howto
, (bfd_signed_vma
) sec
->output_offset
);
11430 rel
->r_addend
+= sec
->output_offset
;
11436 name
= h
->root
.root
.string
;
11439 name
= (bfd_elf_string_from_elf_section
11440 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
11441 if (name
== NULL
|| *name
== '\0')
11442 name
= bfd_section_name (input_bfd
, sec
);
11445 if (r_symndx
!= STN_UNDEF
11446 && r_type
!= R_ARM_NONE
11448 || h
->root
.type
== bfd_link_hash_defined
11449 || h
->root
.type
== bfd_link_hash_defweak
)
11450 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
11452 (*_bfd_error_handler
)
11453 ((sym_type
== STT_TLS
11454 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11455 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11458 (long) rel
->r_offset
,
11463 /* We call elf32_arm_final_link_relocate unless we're completely
11464 done, i.e., the relaxation produced the final output we want,
11465 and we won't let anybody mess with it. Also, we have to do
11466 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11467 both in relaxed and non-relaxed cases. */
11468 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
11469 || (IS_ARM_TLS_GNU_RELOC (r_type
)
11470 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
11471 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
11474 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
11475 contents
, rel
, h
== NULL
);
11476 /* This may have been marked unresolved because it came from
11477 a shared library. But we've just dealt with that. */
11478 unresolved_reloc
= 0;
11481 r
= bfd_reloc_continue
;
11483 if (r
== bfd_reloc_continue
)
11484 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
11485 input_section
, contents
, rel
,
11486 relocation
, info
, sec
, name
, sym_type
,
11487 (h
? h
->target_internal
11488 : ARM_SYM_BRANCH_TYPE (sym
)), h
,
11489 &unresolved_reloc
, &error_message
);
11491 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11492 because such sections are not SEC_ALLOC and thus ld.so will
11493 not process them. */
11494 if (unresolved_reloc
11495 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
11497 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
11498 rel
->r_offset
) != (bfd_vma
) -1)
11500 (*_bfd_error_handler
)
11501 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11504 (long) rel
->r_offset
,
11506 h
->root
.root
.string
);
11510 if (r
!= bfd_reloc_ok
)
11514 case bfd_reloc_overflow
:
11515 /* If the overflowing reloc was to an undefined symbol,
11516 we have already printed one error message and there
11517 is no point complaining again. */
11519 h
->root
.type
!= bfd_link_hash_undefined
)
11520 && (!((*info
->callbacks
->reloc_overflow
)
11521 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
11522 (bfd_vma
) 0, input_bfd
, input_section
,
11527 case bfd_reloc_undefined
:
11528 if (!((*info
->callbacks
->undefined_symbol
)
11529 (info
, name
, input_bfd
, input_section
,
11530 rel
->r_offset
, TRUE
)))
11534 case bfd_reloc_outofrange
:
11535 error_message
= _("out of range");
11538 case bfd_reloc_notsupported
:
11539 error_message
= _("unsupported relocation");
11542 case bfd_reloc_dangerous
:
11543 /* error_message should already be set. */
11547 error_message
= _("unknown error");
11548 /* Fall through. */
11551 BFD_ASSERT (error_message
!= NULL
);
11552 if (!((*info
->callbacks
->reloc_dangerous
)
11553 (info
, error_message
, input_bfd
, input_section
,
11564 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11565 adds the edit to the start of the list. (The list must be built in order of
11566 ascending TINDEX: the function's callers are primarily responsible for
11567 maintaining that condition). */
11570 add_unwind_table_edit (arm_unwind_table_edit
**head
,
11571 arm_unwind_table_edit
**tail
,
11572 arm_unwind_edit_type type
,
11573 asection
*linked_section
,
11574 unsigned int tindex
)
11576 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
11577 xmalloc (sizeof (arm_unwind_table_edit
));
11579 new_edit
->type
= type
;
11580 new_edit
->linked_section
= linked_section
;
11581 new_edit
->index
= tindex
;
11585 new_edit
->next
= NULL
;
11588 (*tail
)->next
= new_edit
;
11590 (*tail
) = new_edit
;
11593 (*head
) = new_edit
;
11597 new_edit
->next
= *head
;
11606 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
11608 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11610 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
11614 if (!exidx_sec
->rawsize
)
11615 exidx_sec
->rawsize
= exidx_sec
->size
;
11617 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
11618 out_sec
= exidx_sec
->output_section
;
11619 /* Adjust size of output section. */
11620 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
11623 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11625 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
11627 struct _arm_elf_section_data
*exidx_arm_data
;
11629 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
11630 add_unwind_table_edit (
11631 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
11632 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
11633 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
11635 exidx_arm_data
->additional_reloc_count
++;
11637 adjust_exidx_size(exidx_sec
, 8);
11640 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11641 made to those tables, such that:
11643 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11644 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11645 codes which have been inlined into the index).
11647 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11649 The edits are applied when the tables are written
11650 (in elf32_arm_write_section). */
11653 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
11654 unsigned int num_text_sections
,
11655 struct bfd_link_info
*info
,
11656 bfd_boolean merge_exidx_entries
)
11659 unsigned int last_second_word
= 0, i
;
11660 asection
*last_exidx_sec
= NULL
;
11661 asection
*last_text_sec
= NULL
;
11662 int last_unwind_type
= -1;
11664 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11666 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
11670 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
11672 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
11673 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
11675 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
11678 if (elf_sec
->linked_to
)
11680 Elf_Internal_Shdr
*linked_hdr
11681 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
11682 struct _arm_elf_section_data
*linked_sec_arm_data
11683 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
11685 if (linked_sec_arm_data
== NULL
)
11688 /* Link this .ARM.exidx section back from the text section it
11690 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
11695 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11696 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11697 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11699 for (i
= 0; i
< num_text_sections
; i
++)
11701 asection
*sec
= text_section_order
[i
];
11702 asection
*exidx_sec
;
11703 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
11704 struct _arm_elf_section_data
*exidx_arm_data
;
11705 bfd_byte
*contents
= NULL
;
11706 int deleted_exidx_bytes
= 0;
11708 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
11709 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
11710 Elf_Internal_Shdr
*hdr
;
11713 if (arm_data
== NULL
)
11716 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
11717 if (exidx_sec
== NULL
)
11719 /* Section has no unwind data. */
11720 if (last_unwind_type
== 0 || !last_exidx_sec
)
11723 /* Ignore zero sized sections. */
11724 if (sec
->size
== 0)
11727 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
11728 last_unwind_type
= 0;
11732 /* Skip /DISCARD/ sections. */
11733 if (bfd_is_abs_section (exidx_sec
->output_section
))
11736 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
11737 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
11740 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
11741 if (exidx_arm_data
== NULL
)
11744 ibfd
= exidx_sec
->owner
;
11746 if (hdr
->contents
!= NULL
)
11747 contents
= hdr
->contents
;
11748 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
11752 if (last_unwind_type
> 0)
11754 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
11755 /* Add cantunwind if first unwind item does not match section
11757 if (first_word
!= sec
->vma
)
11759 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
11760 last_unwind_type
= 0;
11764 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
11766 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
11770 /* An EXIDX_CANTUNWIND entry. */
11771 if (second_word
== 1)
11773 if (last_unwind_type
== 0)
11777 /* Inlined unwinding data. Merge if equal to previous. */
11778 else if ((second_word
& 0x80000000) != 0)
11780 if (merge_exidx_entries
11781 && last_second_word
== second_word
&& last_unwind_type
== 1)
11784 last_second_word
= second_word
;
11786 /* Normal table entry. In theory we could merge these too,
11787 but duplicate entries are likely to be much less common. */
11791 if (elide
&& !bfd_link_relocatable (info
))
11793 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
11794 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
11796 deleted_exidx_bytes
+= 8;
11799 last_unwind_type
= unwind_type
;
11802 /* Free contents if we allocated it ourselves. */
11803 if (contents
!= hdr
->contents
)
11806 /* Record edits to be applied later (in elf32_arm_write_section). */
11807 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
11808 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
11810 if (deleted_exidx_bytes
> 0)
11811 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
11813 last_exidx_sec
= exidx_sec
;
11814 last_text_sec
= sec
;
11817 /* Add terminating CANTUNWIND entry. */
11818 if (!bfd_link_relocatable (info
) && last_exidx_sec
11819 && last_unwind_type
!= 0)
11820 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
11826 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
11827 bfd
*ibfd
, const char *name
)
11829 asection
*sec
, *osec
;
11831 sec
= bfd_get_linker_section (ibfd
, name
);
11832 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
11835 osec
= sec
->output_section
;
11836 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
11839 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
11840 sec
->output_offset
, sec
->size
))
11847 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
11849 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
11850 asection
*sec
, *osec
;
11852 if (globals
== NULL
)
11855 /* Invoke the regular ELF backend linker to do all the work. */
11856 if (!bfd_elf_final_link (abfd
, info
))
11859 /* Process stub sections (eg BE8 encoding, ...). */
11860 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
11862 for (i
=0; i
<htab
->top_id
; i
++)
11864 sec
= htab
->stub_group
[i
].stub_sec
;
11865 /* Only process it once, in its link_sec slot. */
11866 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
11868 osec
= sec
->output_section
;
11869 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
11870 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
11871 sec
->output_offset
, sec
->size
))
11876 /* Write out any glue sections now that we have created all the
11878 if (globals
->bfd_of_glue_owner
!= NULL
)
11880 if (! elf32_arm_output_glue_section (info
, abfd
,
11881 globals
->bfd_of_glue_owner
,
11882 ARM2THUMB_GLUE_SECTION_NAME
))
11885 if (! elf32_arm_output_glue_section (info
, abfd
,
11886 globals
->bfd_of_glue_owner
,
11887 THUMB2ARM_GLUE_SECTION_NAME
))
11890 if (! elf32_arm_output_glue_section (info
, abfd
,
11891 globals
->bfd_of_glue_owner
,
11892 VFP11_ERRATUM_VENEER_SECTION_NAME
))
11895 if (! elf32_arm_output_glue_section (info
, abfd
,
11896 globals
->bfd_of_glue_owner
,
11897 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
11900 if (! elf32_arm_output_glue_section (info
, abfd
,
11901 globals
->bfd_of_glue_owner
,
11902 ARM_BX_GLUE_SECTION_NAME
))
11909 /* Return a best guess for the machine number based on the attributes. */
11911 static unsigned int
11912 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
11914 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
11918 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
11919 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
11920 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
11922 case TAG_CPU_ARCH_V5TE
:
11926 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
11927 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
11931 if (strcmp (name
, "IWMMXT2") == 0)
11932 return bfd_mach_arm_iWMMXt2
;
11934 if (strcmp (name
, "IWMMXT") == 0)
11935 return bfd_mach_arm_iWMMXt
;
11937 if (strcmp (name
, "XSCALE") == 0)
11941 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
11942 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
11945 case 1: return bfd_mach_arm_iWMMXt
;
11946 case 2: return bfd_mach_arm_iWMMXt2
;
11947 default: return bfd_mach_arm_XScale
;
11952 return bfd_mach_arm_5TE
;
11956 return bfd_mach_arm_unknown
;
11960 /* Set the right machine number. */
11963 elf32_arm_object_p (bfd
*abfd
)
11967 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
11969 if (mach
== bfd_mach_arm_unknown
)
11971 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
11972 mach
= bfd_mach_arm_ep9312
;
11974 mach
= bfd_arm_get_mach_from_attributes (abfd
);
11977 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
11981 /* Function to keep ARM specific flags in the ELF header. */
11984 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
11986 if (elf_flags_init (abfd
)
11987 && elf_elfheader (abfd
)->e_flags
!= flags
)
11989 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
11991 if (flags
& EF_ARM_INTERWORK
)
11992 (*_bfd_error_handler
)
11993 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11997 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12003 elf_elfheader (abfd
)->e_flags
= flags
;
12004 elf_flags_init (abfd
) = TRUE
;
12010 /* Copy backend specific data from one object module to another. */
12013 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
12016 flagword out_flags
;
12018 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
12021 in_flags
= elf_elfheader (ibfd
)->e_flags
;
12022 out_flags
= elf_elfheader (obfd
)->e_flags
;
12024 if (elf_flags_init (obfd
)
12025 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
12026 && in_flags
!= out_flags
)
12028 /* Cannot mix APCS26 and APCS32 code. */
12029 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
12032 /* Cannot mix float APCS and non-float APCS code. */
12033 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
12036 /* If the src and dest have different interworking flags
12037 then turn off the interworking bit. */
12038 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
12040 if (out_flags
& EF_ARM_INTERWORK
)
12042 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12045 in_flags
&= ~EF_ARM_INTERWORK
;
12048 /* Likewise for PIC, though don't warn for this case. */
12049 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
12050 in_flags
&= ~EF_ARM_PIC
;
12053 elf_elfheader (obfd
)->e_flags
= in_flags
;
12054 elf_flags_init (obfd
) = TRUE
;
12056 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
12059 /* Values for Tag_ABI_PCS_R9_use. */
12068 /* Values for Tag_ABI_PCS_RW_data. */
12071 AEABI_PCS_RW_data_absolute
,
12072 AEABI_PCS_RW_data_PCrel
,
12073 AEABI_PCS_RW_data_SBrel
,
12074 AEABI_PCS_RW_data_unused
12077 /* Values for Tag_ABI_enum_size. */
12083 AEABI_enum_forced_wide
12086 /* Determine whether an object attribute tag takes an integer, a
12090 elf32_arm_obj_attrs_arg_type (int tag
)
12092 if (tag
== Tag_compatibility
)
12093 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
12094 else if (tag
== Tag_nodefaults
)
12095 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
12096 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
12097 return ATTR_TYPE_FLAG_STR_VAL
;
12099 return ATTR_TYPE_FLAG_INT_VAL
;
12101 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
12104 /* The ABI defines that Tag_conformance should be emitted first, and that
12105 Tag_nodefaults should be second (if either is defined). This sets those
12106 two positions, and bumps up the position of all the remaining tags to
12109 elf32_arm_obj_attrs_order (int num
)
12111 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
12112 return Tag_conformance
;
12113 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
12114 return Tag_nodefaults
;
12115 if ((num
- 2) < Tag_nodefaults
)
12117 if ((num
- 1) < Tag_conformance
)
12122 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12124 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
12126 if ((tag
& 127) < 64)
12129 (_("%B: Unknown mandatory EABI object attribute %d"),
12131 bfd_set_error (bfd_error_bad_value
);
12137 (_("Warning: %B: Unknown EABI object attribute %d"),
12143 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12144 Returns -1 if no architecture could be read. */
12147 get_secondary_compatible_arch (bfd
*abfd
)
12149 obj_attribute
*attr
=
12150 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
12152 /* Note: the tag and its argument below are uleb128 values, though
12153 currently-defined values fit in one byte for each. */
12155 && attr
->s
[0] == Tag_CPU_arch
12156 && (attr
->s
[1] & 128) != 128
12157 && attr
->s
[2] == 0)
12160 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12164 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12165 The tag is removed if ARCH is -1. */
12168 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
12170 obj_attribute
*attr
=
12171 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
12179 /* Note: the tag and its argument below are uleb128 values, though
12180 currently-defined values fit in one byte for each. */
12182 attr
->s
= (char *) bfd_alloc (abfd
, 3);
12183 attr
->s
[0] = Tag_CPU_arch
;
12188 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12192 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
12193 int newtag
, int secondary_compat
)
12195 #define T(X) TAG_CPU_ARCH_##X
12196 int tagl
, tagh
, result
;
12199 T(V6T2
), /* PRE_V4. */
12201 T(V6T2
), /* V4T. */
12202 T(V6T2
), /* V5T. */
12203 T(V6T2
), /* V5TE. */
12204 T(V6T2
), /* V5TEJ. */
12207 T(V6T2
) /* V6T2. */
12211 T(V6K
), /* PRE_V4. */
12215 T(V6K
), /* V5TE. */
12216 T(V6K
), /* V5TEJ. */
12218 T(V6KZ
), /* V6KZ. */
12224 T(V7
), /* PRE_V4. */
12229 T(V7
), /* V5TEJ. */
12242 T(V6K
), /* V5TE. */
12243 T(V6K
), /* V5TEJ. */
12245 T(V6KZ
), /* V6KZ. */
12249 T(V6_M
) /* V6_M. */
12251 const int v6s_m
[] =
12257 T(V6K
), /* V5TE. */
12258 T(V6K
), /* V5TEJ. */
12260 T(V6KZ
), /* V6KZ. */
12264 T(V6S_M
), /* V6_M. */
12265 T(V6S_M
) /* V6S_M. */
12267 const int v7e_m
[] =
12271 T(V7E_M
), /* V4T. */
12272 T(V7E_M
), /* V5T. */
12273 T(V7E_M
), /* V5TE. */
12274 T(V7E_M
), /* V5TEJ. */
12275 T(V7E_M
), /* V6. */
12276 T(V7E_M
), /* V6KZ. */
12277 T(V7E_M
), /* V6T2. */
12278 T(V7E_M
), /* V6K. */
12279 T(V7E_M
), /* V7. */
12280 T(V7E_M
), /* V6_M. */
12281 T(V7E_M
), /* V6S_M. */
12282 T(V7E_M
) /* V7E_M. */
12286 T(V8
), /* PRE_V4. */
12291 T(V8
), /* V5TEJ. */
12298 T(V8
), /* V6S_M. */
12299 T(V8
), /* V7E_M. */
12302 const int v8m_baseline
[] =
12315 T(V8M_BASE
), /* V6_M. */
12316 T(V8M_BASE
), /* V6S_M. */
12320 T(V8M_BASE
) /* V8-M BASELINE. */
12322 const int v8m_mainline
[] =
12334 T(V8M_MAIN
), /* V7. */
12335 T(V8M_MAIN
), /* V6_M. */
12336 T(V8M_MAIN
), /* V6S_M. */
12337 T(V8M_MAIN
), /* V7E_M. */
12340 T(V8M_MAIN
), /* V8-M BASELINE. */
12341 T(V8M_MAIN
) /* V8-M MAINLINE. */
12343 const int v4t_plus_v6_m
[] =
12349 T(V5TE
), /* V5TE. */
12350 T(V5TEJ
), /* V5TEJ. */
12352 T(V6KZ
), /* V6KZ. */
12353 T(V6T2
), /* V6T2. */
12356 T(V6_M
), /* V6_M. */
12357 T(V6S_M
), /* V6S_M. */
12358 T(V7E_M
), /* V7E_M. */
12361 T(V8M_BASE
), /* V8-M BASELINE. */
12362 T(V8M_MAIN
), /* V8-M MAINLINE. */
12363 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
12365 const int *comb
[] =
12377 /* Pseudo-architecture. */
12381 /* Check we've not got a higher architecture than we know about. */
12383 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
12385 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd
);
12389 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12391 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
12392 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
12393 oldtag
= T(V4T_PLUS_V6_M
);
12395 /* And override the new tag if we have a Tag_also_compatible_with on the
12398 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
12399 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
12400 newtag
= T(V4T_PLUS_V6_M
);
12402 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
12403 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
12405 /* Architectures before V6KZ add features monotonically. */
12406 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
12409 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
12411 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12412 as the canonical version. */
12413 if (result
== T(V4T_PLUS_V6_M
))
12416 *secondary_compat_out
= T(V6_M
);
12419 *secondary_compat_out
= -1;
12423 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12424 ibfd
, oldtag
, newtag
);
12432 /* Query attributes object to see if integer divide instructions may be
12433 present in an object. */
12435 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
12437 int arch
= attr
[Tag_CPU_arch
].i
;
12438 int profile
= attr
[Tag_CPU_arch_profile
].i
;
12440 switch (attr
[Tag_DIV_use
].i
)
12443 /* Integer divide allowed if instruction contained in archetecture. */
12444 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
12446 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
12452 /* Integer divide explicitly prohibited. */
12456 /* Unrecognised case - treat as allowing divide everywhere. */
12458 /* Integer divide allowed in ARM state. */
12463 /* Query attributes object to see if integer divide instructions are
12464 forbidden to be in the object. This is not the inverse of
12465 elf32_arm_attributes_accept_div. */
12467 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
12469 return attr
[Tag_DIV_use
].i
== 1;
12472 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12473 are conflicting attributes. */
12476 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, bfd
*obfd
)
12478 obj_attribute
*in_attr
;
12479 obj_attribute
*out_attr
;
12480 /* Some tags have 0 = don't care, 1 = strong requirement,
12481 2 = weak requirement. */
12482 static const int order_021
[3] = {0, 2, 1};
12484 bfd_boolean result
= TRUE
;
12485 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
12487 /* Skip the linker stubs file. This preserves previous behavior
12488 of accepting unknown attributes in the first input file - but
12490 if (ibfd
->flags
& BFD_LINKER_CREATED
)
12493 /* Skip any input that hasn't attribute section.
12494 This enables to link object files without attribute section with
12496 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
12499 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
12501 /* This is the first object. Copy the attributes. */
12502 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
12504 out_attr
= elf_known_obj_attributes_proc (obfd
);
12506 /* Use the Tag_null value to indicate the attributes have been
12510 /* We do not output objects with Tag_MPextension_use_legacy - we move
12511 the attribute's value to Tag_MPextension_use. */
12512 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
12514 if (out_attr
[Tag_MPextension_use
].i
!= 0
12515 && out_attr
[Tag_MPextension_use_legacy
].i
12516 != out_attr
[Tag_MPextension_use
].i
)
12519 (_("Error: %B has both the current and legacy "
12520 "Tag_MPextension_use attributes"), ibfd
);
12524 out_attr
[Tag_MPextension_use
] =
12525 out_attr
[Tag_MPextension_use_legacy
];
12526 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
12527 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
12533 in_attr
= elf_known_obj_attributes_proc (ibfd
);
12534 out_attr
= elf_known_obj_attributes_proc (obfd
);
12535 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12536 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
12538 /* Ignore mismatches if the object doesn't use floating point or is
12539 floating point ABI independent. */
12540 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
12541 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
12542 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
12543 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
12544 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
12545 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
12548 (_("error: %B uses VFP register arguments, %B does not"),
12549 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
12550 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
12555 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
12557 /* Merge this attribute with existing attributes. */
12560 case Tag_CPU_raw_name
:
12562 /* These are merged after Tag_CPU_arch. */
12565 case Tag_ABI_optimization_goals
:
12566 case Tag_ABI_FP_optimization_goals
:
12567 /* Use the first value seen. */
12572 int secondary_compat
= -1, secondary_compat_out
= -1;
12573 unsigned int saved_out_attr
= out_attr
[i
].i
;
12575 static const char *name_table
[] =
12577 /* These aren't real CPU names, but we can't guess
12578 that from the architecture version alone. */
12594 "ARM v8-M.baseline",
12595 "ARM v8-M.mainline",
12598 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12599 secondary_compat
= get_secondary_compatible_arch (ibfd
);
12600 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
12601 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
12602 &secondary_compat_out
,
12606 /* Return with error if failed to merge. */
12607 if (arch_attr
== -1)
12610 out_attr
[i
].i
= arch_attr
;
12612 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
12614 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12615 if (out_attr
[i
].i
== saved_out_attr
)
12616 ; /* Leave the names alone. */
12617 else if (out_attr
[i
].i
== in_attr
[i
].i
)
12619 /* The output architecture has been changed to match the
12620 input architecture. Use the input names. */
12621 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
12622 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
12624 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
12625 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
12630 out_attr
[Tag_CPU_name
].s
= NULL
;
12631 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
12634 /* If we still don't have a value for Tag_CPU_name,
12635 make one up now. Tag_CPU_raw_name remains blank. */
12636 if (out_attr
[Tag_CPU_name
].s
== NULL
12637 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
12638 out_attr
[Tag_CPU_name
].s
=
12639 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
12643 case Tag_ARM_ISA_use
:
12644 case Tag_THUMB_ISA_use
:
12645 case Tag_WMMX_arch
:
12646 case Tag_Advanced_SIMD_arch
:
12647 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12648 case Tag_ABI_FP_rounding
:
12649 case Tag_ABI_FP_exceptions
:
12650 case Tag_ABI_FP_user_exceptions
:
12651 case Tag_ABI_FP_number_model
:
12652 case Tag_FP_HP_extension
:
12653 case Tag_CPU_unaligned_access
:
12655 case Tag_MPextension_use
:
12656 /* Use the largest value specified. */
12657 if (in_attr
[i
].i
> out_attr
[i
].i
)
12658 out_attr
[i
].i
= in_attr
[i
].i
;
12661 case Tag_ABI_align_preserved
:
12662 case Tag_ABI_PCS_RO_data
:
12663 /* Use the smallest value specified. */
12664 if (in_attr
[i
].i
< out_attr
[i
].i
)
12665 out_attr
[i
].i
= in_attr
[i
].i
;
12668 case Tag_ABI_align_needed
:
12669 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
12670 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
12671 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
12673 /* This error message should be enabled once all non-conformant
12674 binaries in the toolchain have had the attributes set
12677 (_("error: %B: 8-byte data alignment conflicts with %B"),
12681 /* Fall through. */
12682 case Tag_ABI_FP_denormal
:
12683 case Tag_ABI_PCS_GOT_use
:
12684 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12685 value if greater than 2 (for future-proofing). */
12686 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
12687 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
12688 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
12689 out_attr
[i
].i
= in_attr
[i
].i
;
12692 case Tag_Virtualization_use
:
12693 /* The virtualization tag effectively stores two bits of
12694 information: the intended use of TrustZone (in bit 0), and the
12695 intended use of Virtualization (in bit 1). */
12696 if (out_attr
[i
].i
== 0)
12697 out_attr
[i
].i
= in_attr
[i
].i
;
12698 else if (in_attr
[i
].i
!= 0
12699 && in_attr
[i
].i
!= out_attr
[i
].i
)
12701 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
12706 (_("error: %B: unable to merge virtualization attributes "
12714 case Tag_CPU_arch_profile
:
12715 if (out_attr
[i
].i
!= in_attr
[i
].i
)
12717 /* 0 will merge with anything.
12718 'A' and 'S' merge to 'A'.
12719 'R' and 'S' merge to 'R'.
12720 'M' and 'A|R|S' is an error. */
12721 if (out_attr
[i
].i
== 0
12722 || (out_attr
[i
].i
== 'S'
12723 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
12724 out_attr
[i
].i
= in_attr
[i
].i
;
12725 else if (in_attr
[i
].i
== 0
12726 || (in_attr
[i
].i
== 'S'
12727 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
12728 ; /* Do nothing. */
12732 (_("error: %B: Conflicting architecture profiles %c/%c"),
12734 in_attr
[i
].i
? in_attr
[i
].i
: '0',
12735 out_attr
[i
].i
? out_attr
[i
].i
: '0');
12741 case Tag_DSP_extension
:
12742 /* No need to change output value if any of:
12743 - pre (<=) ARMv5T input architecture (do not have DSP)
12744 - M input profile not ARMv7E-M and do not have DSP. */
12745 if (in_attr
[Tag_CPU_arch
].i
<= 3
12746 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
12747 && in_attr
[Tag_CPU_arch
].i
!= 13
12748 && in_attr
[i
].i
== 0))
12749 ; /* Do nothing. */
12750 /* Output value should be 0 if DSP part of architecture, ie.
12751 - post (>=) ARMv5te architecture output
12752 - A, R or S profile output or ARMv7E-M output architecture. */
12753 else if (out_attr
[Tag_CPU_arch
].i
>= 4
12754 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
12755 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
12756 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
12757 || out_attr
[Tag_CPU_arch
].i
== 13))
12759 /* Otherwise, DSP instructions are added and not part of output
12767 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12768 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12769 when it's 0. It might mean absence of FP hardware if
12770 Tag_FP_arch is zero. */
12772 #define VFP_VERSION_COUNT 9
12773 static const struct
12777 } vfp_versions
[VFP_VERSION_COUNT
] =
12793 /* If the output has no requirement about FP hardware,
12794 follow the requirement of the input. */
12795 if (out_attr
[i
].i
== 0)
12797 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
12798 out_attr
[i
].i
= in_attr
[i
].i
;
12799 out_attr
[Tag_ABI_HardFP_use
].i
12800 = in_attr
[Tag_ABI_HardFP_use
].i
;
12803 /* If the input has no requirement about FP hardware, do
12805 else if (in_attr
[i
].i
== 0)
12807 BFD_ASSERT (in_attr
[Tag_ABI_HardFP_use
].i
== 0);
12811 /* Both the input and the output have nonzero Tag_FP_arch.
12812 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12814 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12816 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
12817 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
12819 /* If the input and the output have different Tag_ABI_HardFP_use,
12820 the combination of them is 0 (implied by Tag_FP_arch). */
12821 else if (in_attr
[Tag_ABI_HardFP_use
].i
12822 != out_attr
[Tag_ABI_HardFP_use
].i
)
12823 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
12825 /* Now we can handle Tag_FP_arch. */
12827 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12828 pick the biggest. */
12829 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
12830 && in_attr
[i
].i
> out_attr
[i
].i
)
12832 out_attr
[i
] = in_attr
[i
];
12835 /* The output uses the superset of input features
12836 (ISA version) and registers. */
12837 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
12838 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
12839 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
12840 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
12841 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
12842 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
12843 /* This assumes all possible supersets are also a valid
12845 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
12847 if (regs
== vfp_versions
[newval
].regs
12848 && ver
== vfp_versions
[newval
].ver
)
12851 out_attr
[i
].i
= newval
;
12854 case Tag_PCS_config
:
12855 if (out_attr
[i
].i
== 0)
12856 out_attr
[i
].i
= in_attr
[i
].i
;
12857 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
12859 /* It's sometimes ok to mix different configs, so this is only
12862 (_("Warning: %B: Conflicting platform configuration"), ibfd
);
12865 case Tag_ABI_PCS_R9_use
:
12866 if (in_attr
[i
].i
!= out_attr
[i
].i
12867 && out_attr
[i
].i
!= AEABI_R9_unused
12868 && in_attr
[i
].i
!= AEABI_R9_unused
)
12871 (_("error: %B: Conflicting use of R9"), ibfd
);
12874 if (out_attr
[i
].i
== AEABI_R9_unused
)
12875 out_attr
[i
].i
= in_attr
[i
].i
;
12877 case Tag_ABI_PCS_RW_data
:
12878 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
12879 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
12880 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
12883 (_("error: %B: SB relative addressing conflicts with use of R9"),
12887 /* Use the smallest value specified. */
12888 if (in_attr
[i
].i
< out_attr
[i
].i
)
12889 out_attr
[i
].i
= in_attr
[i
].i
;
12891 case Tag_ABI_PCS_wchar_t
:
12892 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
12893 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
12896 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12897 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
12899 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
12900 out_attr
[i
].i
= in_attr
[i
].i
;
12902 case Tag_ABI_enum_size
:
12903 if (in_attr
[i
].i
!= AEABI_enum_unused
)
12905 if (out_attr
[i
].i
== AEABI_enum_unused
12906 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
12908 /* The existing object is compatible with anything.
12909 Use whatever requirements the new object has. */
12910 out_attr
[i
].i
= in_attr
[i
].i
;
12912 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
12913 && out_attr
[i
].i
!= in_attr
[i
].i
12914 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
12916 static const char *aeabi_enum_names
[] =
12917 { "", "variable-size", "32-bit", "" };
12918 const char *in_name
=
12919 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
12920 ? aeabi_enum_names
[in_attr
[i
].i
]
12922 const char *out_name
=
12923 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
12924 ? aeabi_enum_names
[out_attr
[i
].i
]
12927 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12928 ibfd
, in_name
, out_name
);
12932 case Tag_ABI_VFP_args
:
12935 case Tag_ABI_WMMX_args
:
12936 if (in_attr
[i
].i
!= out_attr
[i
].i
)
12939 (_("error: %B uses iWMMXt register arguments, %B does not"),
12944 case Tag_compatibility
:
12945 /* Merged in target-independent code. */
12947 case Tag_ABI_HardFP_use
:
12948 /* This is handled along with Tag_FP_arch. */
12950 case Tag_ABI_FP_16bit_format
:
12951 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
12953 if (in_attr
[i
].i
!= out_attr
[i
].i
)
12956 (_("error: fp16 format mismatch between %B and %B"),
12961 if (in_attr
[i
].i
!= 0)
12962 out_attr
[i
].i
= in_attr
[i
].i
;
12966 /* A value of zero on input means that the divide instruction may
12967 be used if available in the base architecture as specified via
12968 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12969 the user did not want divide instructions. A value of 2
12970 explicitly means that divide instructions were allowed in ARM
12971 and Thumb state. */
12972 if (in_attr
[i
].i
== out_attr
[i
].i
)
12973 /* Do nothing. */ ;
12974 else if (elf32_arm_attributes_forbid_div (in_attr
)
12975 && !elf32_arm_attributes_accept_div (out_attr
))
12977 else if (elf32_arm_attributes_forbid_div (out_attr
)
12978 && elf32_arm_attributes_accept_div (in_attr
))
12979 out_attr
[i
].i
= in_attr
[i
].i
;
12980 else if (in_attr
[i
].i
== 2)
12981 out_attr
[i
].i
= in_attr
[i
].i
;
12984 case Tag_MPextension_use_legacy
:
12985 /* We don't output objects with Tag_MPextension_use_legacy - we
12986 move the value to Tag_MPextension_use. */
12987 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
12989 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
12992 (_("%B has has both the current and legacy "
12993 "Tag_MPextension_use attributes"),
12999 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
13000 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
13004 case Tag_nodefaults
:
13005 /* This tag is set if it exists, but the value is unused (and is
13006 typically zero). We don't actually need to do anything here -
13007 the merge happens automatically when the type flags are merged
13010 case Tag_also_compatible_with
:
13011 /* Already done in Tag_CPU_arch. */
13013 case Tag_conformance
:
13014 /* Keep the attribute if it matches. Throw it away otherwise.
13015 No attribute means no claim to conform. */
13016 if (!in_attr
[i
].s
|| !out_attr
[i
].s
13017 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
13018 out_attr
[i
].s
= NULL
;
13023 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
13026 /* If out_attr was copied from in_attr then it won't have a type yet. */
13027 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
13028 out_attr
[i
].type
= in_attr
[i
].type
;
13031 /* Merge Tag_compatibility attributes and any common GNU ones. */
13032 if (!_bfd_elf_merge_object_attributes (ibfd
, obfd
))
13035 /* Check for any attributes not known on ARM. */
13036 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
13042 /* Return TRUE if the two EABI versions are incompatible. */
13045 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
13047 /* v4 and v5 are the same spec before and after it was released,
13048 so allow mixing them. */
13049 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
13050 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
13053 return (iver
== over
);
13056 /* Merge backend specific data from an object file to the output
13057 object file when linking. */
13060 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
);
13062 /* Display the flags field. */
13065 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
13067 FILE * file
= (FILE *) ptr
;
13068 unsigned long flags
;
13070 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
13072 /* Print normal ELF private data. */
13073 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
13075 flags
= elf_elfheader (abfd
)->e_flags
;
13076 /* Ignore init flag - it may not be set, despite the flags field
13077 containing valid data. */
13079 /* xgettext:c-format */
13080 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
13082 switch (EF_ARM_EABI_VERSION (flags
))
13084 case EF_ARM_EABI_UNKNOWN
:
13085 /* The following flag bits are GNU extensions and not part of the
13086 official ARM ELF extended ABI. Hence they are only decoded if
13087 the EABI version is not set. */
13088 if (flags
& EF_ARM_INTERWORK
)
13089 fprintf (file
, _(" [interworking enabled]"));
13091 if (flags
& EF_ARM_APCS_26
)
13092 fprintf (file
, " [APCS-26]");
13094 fprintf (file
, " [APCS-32]");
13096 if (flags
& EF_ARM_VFP_FLOAT
)
13097 fprintf (file
, _(" [VFP float format]"));
13098 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
13099 fprintf (file
, _(" [Maverick float format]"));
13101 fprintf (file
, _(" [FPA float format]"));
13103 if (flags
& EF_ARM_APCS_FLOAT
)
13104 fprintf (file
, _(" [floats passed in float registers]"));
13106 if (flags
& EF_ARM_PIC
)
13107 fprintf (file
, _(" [position independent]"));
13109 if (flags
& EF_ARM_NEW_ABI
)
13110 fprintf (file
, _(" [new ABI]"));
13112 if (flags
& EF_ARM_OLD_ABI
)
13113 fprintf (file
, _(" [old ABI]"));
13115 if (flags
& EF_ARM_SOFT_FLOAT
)
13116 fprintf (file
, _(" [software FP]"));
13118 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
13119 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
13120 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
13121 | EF_ARM_MAVERICK_FLOAT
);
13124 case EF_ARM_EABI_VER1
:
13125 fprintf (file
, _(" [Version1 EABI]"));
13127 if (flags
& EF_ARM_SYMSARESORTED
)
13128 fprintf (file
, _(" [sorted symbol table]"));
13130 fprintf (file
, _(" [unsorted symbol table]"));
13132 flags
&= ~ EF_ARM_SYMSARESORTED
;
13135 case EF_ARM_EABI_VER2
:
13136 fprintf (file
, _(" [Version2 EABI]"));
13138 if (flags
& EF_ARM_SYMSARESORTED
)
13139 fprintf (file
, _(" [sorted symbol table]"));
13141 fprintf (file
, _(" [unsorted symbol table]"));
13143 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
13144 fprintf (file
, _(" [dynamic symbols use segment index]"));
13146 if (flags
& EF_ARM_MAPSYMSFIRST
)
13147 fprintf (file
, _(" [mapping symbols precede others]"));
13149 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
13150 | EF_ARM_MAPSYMSFIRST
);
13153 case EF_ARM_EABI_VER3
:
13154 fprintf (file
, _(" [Version3 EABI]"));
13157 case EF_ARM_EABI_VER4
:
13158 fprintf (file
, _(" [Version4 EABI]"));
13161 case EF_ARM_EABI_VER5
:
13162 fprintf (file
, _(" [Version5 EABI]"));
13164 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
13165 fprintf (file
, _(" [soft-float ABI]"));
13167 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
13168 fprintf (file
, _(" [hard-float ABI]"));
13170 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
13173 if (flags
& EF_ARM_BE8
)
13174 fprintf (file
, _(" [BE8]"));
13176 if (flags
& EF_ARM_LE8
)
13177 fprintf (file
, _(" [LE8]"));
13179 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
13183 fprintf (file
, _(" <EABI version unrecognised>"));
13187 flags
&= ~ EF_ARM_EABIMASK
;
13189 if (flags
& EF_ARM_RELEXEC
)
13190 fprintf (file
, _(" [relocatable executable]"));
13192 flags
&= ~EF_ARM_RELEXEC
;
13195 fprintf (file
, _("<Unrecognised flag bits set>"));
13197 fputc ('\n', file
);
13203 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
13205 switch (ELF_ST_TYPE (elf_sym
->st_info
))
13207 case STT_ARM_TFUNC
:
13208 return ELF_ST_TYPE (elf_sym
->st_info
);
13210 case STT_ARM_16BIT
:
13211 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13212 This allows us to distinguish between data used by Thumb instructions
13213 and non-data (which is probably code) inside Thumb regions of an
13215 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
13216 return ELF_ST_TYPE (elf_sym
->st_info
);
13227 elf32_arm_gc_mark_hook (asection
*sec
,
13228 struct bfd_link_info
*info
,
13229 Elf_Internal_Rela
*rel
,
13230 struct elf_link_hash_entry
*h
,
13231 Elf_Internal_Sym
*sym
)
13234 switch (ELF32_R_TYPE (rel
->r_info
))
13236 case R_ARM_GNU_VTINHERIT
:
13237 case R_ARM_GNU_VTENTRY
:
13241 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
13244 /* Update the got entry reference counts for the section being removed. */
13247 elf32_arm_gc_sweep_hook (bfd
* abfd
,
13248 struct bfd_link_info
* info
,
13250 const Elf_Internal_Rela
* relocs
)
13252 Elf_Internal_Shdr
*symtab_hdr
;
13253 struct elf_link_hash_entry
**sym_hashes
;
13254 bfd_signed_vma
*local_got_refcounts
;
13255 const Elf_Internal_Rela
*rel
, *relend
;
13256 struct elf32_arm_link_hash_table
* globals
;
13258 if (bfd_link_relocatable (info
))
13261 globals
= elf32_arm_hash_table (info
);
13262 if (globals
== NULL
)
13265 elf_section_data (sec
)->local_dynrel
= NULL
;
13267 symtab_hdr
= & elf_symtab_hdr (abfd
);
13268 sym_hashes
= elf_sym_hashes (abfd
);
13269 local_got_refcounts
= elf_local_got_refcounts (abfd
);
13271 check_use_blx (globals
);
13273 relend
= relocs
+ sec
->reloc_count
;
13274 for (rel
= relocs
; rel
< relend
; rel
++)
13276 unsigned long r_symndx
;
13277 struct elf_link_hash_entry
*h
= NULL
;
13278 struct elf32_arm_link_hash_entry
*eh
;
13280 bfd_boolean call_reloc_p
;
13281 bfd_boolean may_become_dynamic_p
;
13282 bfd_boolean may_need_local_target_p
;
13283 union gotplt_union
*root_plt
;
13284 struct arm_plt_info
*arm_plt
;
13286 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13287 if (r_symndx
>= symtab_hdr
->sh_info
)
13289 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
13290 while (h
->root
.type
== bfd_link_hash_indirect
13291 || h
->root
.type
== bfd_link_hash_warning
)
13292 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
13294 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13296 call_reloc_p
= FALSE
;
13297 may_become_dynamic_p
= FALSE
;
13298 may_need_local_target_p
= FALSE
;
13300 r_type
= ELF32_R_TYPE (rel
->r_info
);
13301 r_type
= arm_real_reloc_type (globals
, r_type
);
13305 case R_ARM_GOT_PREL
:
13306 case R_ARM_TLS_GD32
:
13307 case R_ARM_TLS_IE32
:
13310 if (h
->got
.refcount
> 0)
13311 h
->got
.refcount
-= 1;
13313 else if (local_got_refcounts
!= NULL
)
13315 if (local_got_refcounts
[r_symndx
] > 0)
13316 local_got_refcounts
[r_symndx
] -= 1;
13320 case R_ARM_TLS_LDM32
:
13321 globals
->tls_ldm_got
.refcount
-= 1;
13329 case R_ARM_THM_CALL
:
13330 case R_ARM_THM_JUMP24
:
13331 case R_ARM_THM_JUMP19
:
13332 call_reloc_p
= TRUE
;
13333 may_need_local_target_p
= TRUE
;
13337 if (!globals
->vxworks_p
)
13339 may_need_local_target_p
= TRUE
;
13342 /* Fall through. */
13344 case R_ARM_ABS32_NOI
:
13346 case R_ARM_REL32_NOI
:
13347 case R_ARM_MOVW_ABS_NC
:
13348 case R_ARM_MOVT_ABS
:
13349 case R_ARM_MOVW_PREL_NC
:
13350 case R_ARM_MOVT_PREL
:
13351 case R_ARM_THM_MOVW_ABS_NC
:
13352 case R_ARM_THM_MOVT_ABS
:
13353 case R_ARM_THM_MOVW_PREL_NC
:
13354 case R_ARM_THM_MOVT_PREL
:
13355 /* Should the interworking branches be here also? */
13356 if ((bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
13357 && (sec
->flags
& SEC_ALLOC
) != 0)
13360 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
13362 call_reloc_p
= TRUE
;
13363 may_need_local_target_p
= TRUE
;
13366 may_become_dynamic_p
= TRUE
;
13369 may_need_local_target_p
= TRUE
;
13376 if (may_need_local_target_p
13377 && elf32_arm_get_plt_info (abfd
, eh
, r_symndx
, &root_plt
, &arm_plt
))
13379 /* If PLT refcount book-keeping is wrong and too low, we'll
13380 see a zero value (going to -1) for the root PLT reference
13382 if (root_plt
->refcount
>= 0)
13384 BFD_ASSERT (root_plt
->refcount
!= 0);
13385 root_plt
->refcount
-= 1;
13388 /* A value of -1 means the symbol has become local, forced
13389 or seeing a hidden definition. Any other negative value
13391 BFD_ASSERT (root_plt
->refcount
== -1);
13394 arm_plt
->noncall_refcount
--;
13396 if (r_type
== R_ARM_THM_CALL
)
13397 arm_plt
->maybe_thumb_refcount
--;
13399 if (r_type
== R_ARM_THM_JUMP24
13400 || r_type
== R_ARM_THM_JUMP19
)
13401 arm_plt
->thumb_refcount
--;
13404 if (may_become_dynamic_p
)
13406 struct elf_dyn_relocs
**pp
;
13407 struct elf_dyn_relocs
*p
;
13410 pp
= &(eh
->dyn_relocs
);
13413 Elf_Internal_Sym
*isym
;
13415 isym
= bfd_sym_from_r_symndx (&globals
->sym_cache
,
13419 pp
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
13423 for (; (p
= *pp
) != NULL
; pp
= &p
->next
)
13426 /* Everything must go for SEC. */
13436 /* Look through the relocs for a section during the first phase. */
13439 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
13440 asection
*sec
, const Elf_Internal_Rela
*relocs
)
13442 Elf_Internal_Shdr
*symtab_hdr
;
13443 struct elf_link_hash_entry
**sym_hashes
;
13444 const Elf_Internal_Rela
*rel
;
13445 const Elf_Internal_Rela
*rel_end
;
13448 struct elf32_arm_link_hash_table
*htab
;
13449 bfd_boolean call_reloc_p
;
13450 bfd_boolean may_become_dynamic_p
;
13451 bfd_boolean may_need_local_target_p
;
13452 unsigned long nsyms
;
13454 if (bfd_link_relocatable (info
))
13457 BFD_ASSERT (is_arm_elf (abfd
));
13459 htab
= elf32_arm_hash_table (info
);
13465 /* Create dynamic sections for relocatable executables so that we can
13466 copy relocations. */
13467 if (htab
->root
.is_relocatable_executable
13468 && ! htab
->root
.dynamic_sections_created
)
13470 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
13474 if (htab
->root
.dynobj
== NULL
)
13475 htab
->root
.dynobj
= abfd
;
13476 if (!create_ifunc_sections (info
))
13479 dynobj
= htab
->root
.dynobj
;
13481 symtab_hdr
= & elf_symtab_hdr (abfd
);
13482 sym_hashes
= elf_sym_hashes (abfd
);
13483 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
13485 rel_end
= relocs
+ sec
->reloc_count
;
13486 for (rel
= relocs
; rel
< rel_end
; rel
++)
13488 Elf_Internal_Sym
*isym
;
13489 struct elf_link_hash_entry
*h
;
13490 struct elf32_arm_link_hash_entry
*eh
;
13491 unsigned long r_symndx
;
13494 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13495 r_type
= ELF32_R_TYPE (rel
->r_info
);
13496 r_type
= arm_real_reloc_type (htab
, r_type
);
13498 if (r_symndx
>= nsyms
13499 /* PR 9934: It is possible to have relocations that do not
13500 refer to symbols, thus it is also possible to have an
13501 object file containing relocations but no symbol table. */
13502 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
13504 (*_bfd_error_handler
) (_("%B: bad symbol index: %d"), abfd
,
13513 if (r_symndx
< symtab_hdr
->sh_info
)
13515 /* A local symbol. */
13516 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
13523 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
13524 while (h
->root
.type
== bfd_link_hash_indirect
13525 || h
->root
.type
== bfd_link_hash_warning
)
13526 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
13528 /* PR15323, ref flags aren't set for references in the
13530 h
->root
.non_ir_ref
= 1;
13534 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13536 call_reloc_p
= FALSE
;
13537 may_become_dynamic_p
= FALSE
;
13538 may_need_local_target_p
= FALSE
;
13540 /* Could be done earlier, if h were already available. */
13541 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
13545 case R_ARM_GOT_PREL
:
13546 case R_ARM_TLS_GD32
:
13547 case R_ARM_TLS_IE32
:
13548 case R_ARM_TLS_GOTDESC
:
13549 case R_ARM_TLS_DESCSEQ
:
13550 case R_ARM_THM_TLS_DESCSEQ
:
13551 case R_ARM_TLS_CALL
:
13552 case R_ARM_THM_TLS_CALL
:
13553 /* This symbol requires a global offset table entry. */
13555 int tls_type
, old_tls_type
;
13559 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
13561 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
13563 case R_ARM_TLS_GOTDESC
:
13564 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
13565 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
13566 tls_type
= GOT_TLS_GDESC
; break;
13568 default: tls_type
= GOT_NORMAL
; break;
13571 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
13572 info
->flags
|= DF_STATIC_TLS
;
13577 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
13581 /* This is a global offset table entry for a local symbol. */
13582 if (!elf32_arm_allocate_local_sym_info (abfd
))
13584 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
13585 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
13588 /* If a variable is accessed with both tls methods, two
13589 slots may be created. */
13590 if (GOT_TLS_GD_ANY_P (old_tls_type
)
13591 && GOT_TLS_GD_ANY_P (tls_type
))
13592 tls_type
|= old_tls_type
;
13594 /* We will already have issued an error message if there
13595 is a TLS/non-TLS mismatch, based on the symbol
13596 type. So just combine any TLS types needed. */
13597 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
13598 && tls_type
!= GOT_NORMAL
)
13599 tls_type
|= old_tls_type
;
13601 /* If the symbol is accessed in both IE and GDESC
13602 method, we're able to relax. Turn off the GDESC flag,
13603 without messing up with any other kind of tls types
13604 that may be involved. */
13605 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
13606 tls_type
&= ~GOT_TLS_GDESC
;
13608 if (old_tls_type
!= tls_type
)
13611 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
13613 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
13616 /* Fall through. */
13618 case R_ARM_TLS_LDM32
:
13619 if (r_type
== R_ARM_TLS_LDM32
)
13620 htab
->tls_ldm_got
.refcount
++;
13621 /* Fall through. */
13623 case R_ARM_GOTOFF32
:
13625 if (htab
->root
.sgot
== NULL
13626 && !create_got_section (htab
->root
.dynobj
, info
))
13635 case R_ARM_THM_CALL
:
13636 case R_ARM_THM_JUMP24
:
13637 case R_ARM_THM_JUMP19
:
13638 call_reloc_p
= TRUE
;
13639 may_need_local_target_p
= TRUE
;
13643 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13644 ldr __GOTT_INDEX__ offsets. */
13645 if (!htab
->vxworks_p
)
13647 may_need_local_target_p
= TRUE
;
13650 else goto jump_over
;
13652 /* Fall through. */
13654 case R_ARM_MOVW_ABS_NC
:
13655 case R_ARM_MOVT_ABS
:
13656 case R_ARM_THM_MOVW_ABS_NC
:
13657 case R_ARM_THM_MOVT_ABS
:
13658 if (bfd_link_pic (info
))
13660 (*_bfd_error_handler
)
13661 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13662 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
13663 (h
) ? h
->root
.root
.string
: "a local symbol");
13664 bfd_set_error (bfd_error_bad_value
);
13668 /* Fall through. */
13670 case R_ARM_ABS32_NOI
:
13672 if (h
!= NULL
&& bfd_link_executable (info
))
13674 h
->pointer_equality_needed
= 1;
13676 /* Fall through. */
13678 case R_ARM_REL32_NOI
:
13679 case R_ARM_MOVW_PREL_NC
:
13680 case R_ARM_MOVT_PREL
:
13681 case R_ARM_THM_MOVW_PREL_NC
:
13682 case R_ARM_THM_MOVT_PREL
:
13684 /* Should the interworking branches be listed here? */
13685 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
13686 && (sec
->flags
& SEC_ALLOC
) != 0)
13689 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
13691 /* In shared libraries and relocatable executables,
13692 we treat local relative references as calls;
13693 see the related SYMBOL_CALLS_LOCAL code in
13694 allocate_dynrelocs. */
13695 call_reloc_p
= TRUE
;
13696 may_need_local_target_p
= TRUE
;
13699 /* We are creating a shared library or relocatable
13700 executable, and this is a reloc against a global symbol,
13701 or a non-PC-relative reloc against a local symbol.
13702 We may need to copy the reloc into the output. */
13703 may_become_dynamic_p
= TRUE
;
13706 may_need_local_target_p
= TRUE
;
13709 /* This relocation describes the C++ object vtable hierarchy.
13710 Reconstruct it for later use during GC. */
13711 case R_ARM_GNU_VTINHERIT
:
13712 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
13716 /* This relocation describes which C++ vtable entries are actually
13717 used. Record for later use during GC. */
13718 case R_ARM_GNU_VTENTRY
:
13719 BFD_ASSERT (h
!= NULL
);
13721 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
13729 /* We may need a .plt entry if the function this reloc
13730 refers to is in a different object, regardless of the
13731 symbol's type. We can't tell for sure yet, because
13732 something later might force the symbol local. */
13734 else if (may_need_local_target_p
)
13735 /* If this reloc is in a read-only section, we might
13736 need a copy reloc. We can't check reliably at this
13737 stage whether the section is read-only, as input
13738 sections have not yet been mapped to output sections.
13739 Tentatively set the flag for now, and correct in
13740 adjust_dynamic_symbol. */
13741 h
->non_got_ref
= 1;
13744 if (may_need_local_target_p
13745 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
13747 union gotplt_union
*root_plt
;
13748 struct arm_plt_info
*arm_plt
;
13749 struct arm_local_iplt_info
*local_iplt
;
13753 root_plt
= &h
->plt
;
13754 arm_plt
= &eh
->plt
;
13758 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
13759 if (local_iplt
== NULL
)
13761 root_plt
= &local_iplt
->root
;
13762 arm_plt
= &local_iplt
->arm
;
13765 /* If the symbol is a function that doesn't bind locally,
13766 this relocation will need a PLT entry. */
13767 if (root_plt
->refcount
!= -1)
13768 root_plt
->refcount
+= 1;
13771 arm_plt
->noncall_refcount
++;
13773 /* It's too early to use htab->use_blx here, so we have to
13774 record possible blx references separately from
13775 relocs that definitely need a thumb stub. */
13777 if (r_type
== R_ARM_THM_CALL
)
13778 arm_plt
->maybe_thumb_refcount
+= 1;
13780 if (r_type
== R_ARM_THM_JUMP24
13781 || r_type
== R_ARM_THM_JUMP19
)
13782 arm_plt
->thumb_refcount
+= 1;
13785 if (may_become_dynamic_p
)
13787 struct elf_dyn_relocs
*p
, **head
;
13789 /* Create a reloc section in dynobj. */
13790 if (sreloc
== NULL
)
13792 sreloc
= _bfd_elf_make_dynamic_reloc_section
13793 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
13795 if (sreloc
== NULL
)
13798 /* BPABI objects never have dynamic relocations mapped. */
13799 if (htab
->symbian_p
)
13803 flags
= bfd_get_section_flags (dynobj
, sreloc
);
13804 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
13805 bfd_set_section_flags (dynobj
, sreloc
, flags
);
13809 /* If this is a global symbol, count the number of
13810 relocations we need for this symbol. */
13812 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
13815 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
13821 if (p
== NULL
|| p
->sec
!= sec
)
13823 bfd_size_type amt
= sizeof *p
;
13825 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
13835 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
13844 /* Unwinding tables are not referenced directly. This pass marks them as
13845 required if the corresponding code section is marked. */
13848 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
13849 elf_gc_mark_hook_fn gc_mark_hook
)
13852 Elf_Internal_Shdr
**elf_shdrp
;
13855 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
13857 /* Marking EH data may cause additional code sections to be marked,
13858 requiring multiple passes. */
13863 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
13867 if (! is_arm_elf (sub
))
13870 elf_shdrp
= elf_elfsections (sub
);
13871 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
13873 Elf_Internal_Shdr
*hdr
;
13875 hdr
= &elf_section_data (o
)->this_hdr
;
13876 if (hdr
->sh_type
== SHT_ARM_EXIDX
13878 && hdr
->sh_link
< elf_numsections (sub
)
13880 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
13883 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
13893 /* Treat mapping symbols as special target symbols. */
13896 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
13898 return bfd_is_arm_special_symbol_name (sym
->name
,
13899 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
13902 /* This is a copy of elf_find_function() from elf.c except that
13903 ARM mapping symbols are ignored when looking for function names
13904 and STT_ARM_TFUNC is considered to a function type. */
13907 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
13908 asymbol
** symbols
,
13909 asection
* section
,
13911 const char ** filename_ptr
,
13912 const char ** functionname_ptr
)
13914 const char * filename
= NULL
;
13915 asymbol
* func
= NULL
;
13916 bfd_vma low_func
= 0;
13919 for (p
= symbols
; *p
!= NULL
; p
++)
13921 elf_symbol_type
*q
;
13923 q
= (elf_symbol_type
*) *p
;
13925 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
13930 filename
= bfd_asymbol_name (&q
->symbol
);
13933 case STT_ARM_TFUNC
:
13935 /* Skip mapping symbols. */
13936 if ((q
->symbol
.flags
& BSF_LOCAL
)
13937 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
13938 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
13940 /* Fall through. */
13941 if (bfd_get_section (&q
->symbol
) == section
13942 && q
->symbol
.value
>= low_func
13943 && q
->symbol
.value
<= offset
)
13945 func
= (asymbol
*) q
;
13946 low_func
= q
->symbol
.value
;
13956 *filename_ptr
= filename
;
13957 if (functionname_ptr
)
13958 *functionname_ptr
= bfd_asymbol_name (func
);
13964 /* Find the nearest line to a particular section and offset, for error
13965 reporting. This code is a duplicate of the code in elf.c, except
13966 that it uses arm_elf_find_function. */
13969 elf32_arm_find_nearest_line (bfd
* abfd
,
13970 asymbol
** symbols
,
13971 asection
* section
,
13973 const char ** filename_ptr
,
13974 const char ** functionname_ptr
,
13975 unsigned int * line_ptr
,
13976 unsigned int * discriminator_ptr
)
13978 bfd_boolean found
= FALSE
;
13980 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
13981 filename_ptr
, functionname_ptr
,
13982 line_ptr
, discriminator_ptr
,
13983 dwarf_debug_sections
, 0,
13984 & elf_tdata (abfd
)->dwarf2_find_line_info
))
13986 if (!*functionname_ptr
)
13987 arm_elf_find_function (abfd
, symbols
, section
, offset
,
13988 *filename_ptr
? NULL
: filename_ptr
,
13994 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
13997 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
13998 & found
, filename_ptr
,
13999 functionname_ptr
, line_ptr
,
14000 & elf_tdata (abfd
)->line_info
))
14003 if (found
&& (*functionname_ptr
|| *line_ptr
))
14006 if (symbols
== NULL
)
14009 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
14010 filename_ptr
, functionname_ptr
))
14018 elf32_arm_find_inliner_info (bfd
* abfd
,
14019 const char ** filename_ptr
,
14020 const char ** functionname_ptr
,
14021 unsigned int * line_ptr
)
14024 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
14025 functionname_ptr
, line_ptr
,
14026 & elf_tdata (abfd
)->dwarf2_find_line_info
);
14030 /* Adjust a symbol defined by a dynamic object and referenced by a
14031 regular object. The current definition is in some section of the
14032 dynamic object, but we're not including those sections. We have to
14033 change the definition to something the rest of the link can
14037 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
14038 struct elf_link_hash_entry
* h
)
14042 struct elf32_arm_link_hash_entry
* eh
;
14043 struct elf32_arm_link_hash_table
*globals
;
14045 globals
= elf32_arm_hash_table (info
);
14046 if (globals
== NULL
)
14049 dynobj
= elf_hash_table (info
)->dynobj
;
14051 /* Make sure we know what is going on here. */
14052 BFD_ASSERT (dynobj
!= NULL
14054 || h
->type
== STT_GNU_IFUNC
14055 || h
->u
.weakdef
!= NULL
14058 && !h
->def_regular
)));
14060 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14062 /* If this is a function, put it in the procedure linkage table. We
14063 will fill in the contents of the procedure linkage table later,
14064 when we know the address of the .got section. */
14065 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
14067 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14068 symbol binds locally. */
14069 if (h
->plt
.refcount
<= 0
14070 || (h
->type
!= STT_GNU_IFUNC
14071 && (SYMBOL_CALLS_LOCAL (info
, h
)
14072 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
14073 && h
->root
.type
== bfd_link_hash_undefweak
))))
14075 /* This case can occur if we saw a PLT32 reloc in an input
14076 file, but the symbol was never referred to by a dynamic
14077 object, or if all references were garbage collected. In
14078 such a case, we don't actually need to build a procedure
14079 linkage table, and we can just do a PC24 reloc instead. */
14080 h
->plt
.offset
= (bfd_vma
) -1;
14081 eh
->plt
.thumb_refcount
= 0;
14082 eh
->plt
.maybe_thumb_refcount
= 0;
14083 eh
->plt
.noncall_refcount
= 0;
14091 /* It's possible that we incorrectly decided a .plt reloc was
14092 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14093 in check_relocs. We can't decide accurately between function
14094 and non-function syms in check-relocs; Objects loaded later in
14095 the link may change h->type. So fix it now. */
14096 h
->plt
.offset
= (bfd_vma
) -1;
14097 eh
->plt
.thumb_refcount
= 0;
14098 eh
->plt
.maybe_thumb_refcount
= 0;
14099 eh
->plt
.noncall_refcount
= 0;
14102 /* If this is a weak symbol, and there is a real definition, the
14103 processor independent code will have arranged for us to see the
14104 real definition first, and we can just use the same value. */
14105 if (h
->u
.weakdef
!= NULL
)
14107 BFD_ASSERT (h
->u
.weakdef
->root
.type
== bfd_link_hash_defined
14108 || h
->u
.weakdef
->root
.type
== bfd_link_hash_defweak
);
14109 h
->root
.u
.def
.section
= h
->u
.weakdef
->root
.u
.def
.section
;
14110 h
->root
.u
.def
.value
= h
->u
.weakdef
->root
.u
.def
.value
;
14114 /* If there are no non-GOT references, we do not need a copy
14116 if (!h
->non_got_ref
)
14119 /* This is a reference to a symbol defined by a dynamic object which
14120 is not a function. */
14122 /* If we are creating a shared library, we must presume that the
14123 only references to the symbol are via the global offset table.
14124 For such cases we need not do anything here; the relocations will
14125 be handled correctly by relocate_section. Relocatable executables
14126 can reference data in shared objects directly, so we don't need to
14127 do anything here. */
14128 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
14131 /* We must allocate the symbol in our .dynbss section, which will
14132 become part of the .bss section of the executable. There will be
14133 an entry for this symbol in the .dynsym section. The dynamic
14134 object will contain position independent code, so all references
14135 from the dynamic object to this symbol will go through the global
14136 offset table. The dynamic linker will use the .dynsym entry to
14137 determine the address it must put in the global offset table, so
14138 both the dynamic object and the regular object will refer to the
14139 same memory location for the variable. */
14140 s
= bfd_get_linker_section (dynobj
, ".dynbss");
14141 BFD_ASSERT (s
!= NULL
);
14143 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
14144 linker to copy the initial value out of the dynamic object and into
14145 the runtime process image. We need to remember the offset into the
14146 .rel(a).bss section we are going to use. */
14147 if (info
->nocopyreloc
== 0
14148 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
14153 srel
= bfd_get_linker_section (dynobj
, RELOC_SECTION (globals
, ".bss"));
14154 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
14158 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
14161 /* Allocate space in .plt, .got and associated reloc sections for
14165 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
14167 struct bfd_link_info
*info
;
14168 struct elf32_arm_link_hash_table
*htab
;
14169 struct elf32_arm_link_hash_entry
*eh
;
14170 struct elf_dyn_relocs
*p
;
14172 if (h
->root
.type
== bfd_link_hash_indirect
)
14175 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14177 info
= (struct bfd_link_info
*) inf
;
14178 htab
= elf32_arm_hash_table (info
);
14182 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
14183 && h
->plt
.refcount
> 0)
14185 /* Make sure this symbol is output as a dynamic symbol.
14186 Undefined weak syms won't yet be marked as dynamic. */
14187 if (h
->dynindx
== -1
14188 && !h
->forced_local
)
14190 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14194 /* If the call in the PLT entry binds locally, the associated
14195 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14196 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14197 than the .plt section. */
14198 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
14201 if (eh
->plt
.noncall_refcount
== 0
14202 && SYMBOL_REFERENCES_LOCAL (info
, h
))
14203 /* All non-call references can be resolved directly.
14204 This means that they can (and in some cases, must)
14205 resolve directly to the run-time target, rather than
14206 to the PLT. That in turns means that any .got entry
14207 would be equal to the .igot.plt entry, so there's
14208 no point having both. */
14209 h
->got
.refcount
= 0;
14212 if (bfd_link_pic (info
)
14214 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
14216 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
14218 /* If this symbol is not defined in a regular file, and we are
14219 not generating a shared library, then set the symbol to this
14220 location in the .plt. This is required to make function
14221 pointers compare as equal between the normal executable and
14222 the shared library. */
14223 if (! bfd_link_pic (info
)
14224 && !h
->def_regular
)
14226 h
->root
.u
.def
.section
= htab
->root
.splt
;
14227 h
->root
.u
.def
.value
= h
->plt
.offset
;
14229 /* Make sure the function is not marked as Thumb, in case
14230 it is the target of an ABS32 relocation, which will
14231 point to the PLT entry. */
14232 h
->target_internal
= ST_BRANCH_TO_ARM
;
14235 /* VxWorks executables have a second set of relocations for
14236 each PLT entry. They go in a separate relocation section,
14237 which is processed by the kernel loader. */
14238 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
14240 /* There is a relocation for the initial PLT entry:
14241 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14242 if (h
->plt
.offset
== htab
->plt_header_size
)
14243 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
14245 /* There are two extra relocations for each subsequent
14246 PLT entry: an R_ARM_32 relocation for the GOT entry,
14247 and an R_ARM_32 relocation for the PLT entry. */
14248 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
14253 h
->plt
.offset
= (bfd_vma
) -1;
14259 h
->plt
.offset
= (bfd_vma
) -1;
14263 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14264 eh
->tlsdesc_got
= (bfd_vma
) -1;
14266 if (h
->got
.refcount
> 0)
14270 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14273 /* Make sure this symbol is output as a dynamic symbol.
14274 Undefined weak syms won't yet be marked as dynamic. */
14275 if (h
->dynindx
== -1
14276 && !h
->forced_local
)
14278 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14282 if (!htab
->symbian_p
)
14284 s
= htab
->root
.sgot
;
14285 h
->got
.offset
= s
->size
;
14287 if (tls_type
== GOT_UNKNOWN
)
14290 if (tls_type
== GOT_NORMAL
)
14291 /* Non-TLS symbols need one GOT slot. */
14295 if (tls_type
& GOT_TLS_GDESC
)
14297 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14299 = (htab
->root
.sgotplt
->size
14300 - elf32_arm_compute_jump_table_size (htab
));
14301 htab
->root
.sgotplt
->size
+= 8;
14302 h
->got
.offset
= (bfd_vma
) -2;
14303 /* plt.got_offset needs to know there's a TLS_DESC
14304 reloc in the middle of .got.plt. */
14305 htab
->num_tls_desc
++;
14308 if (tls_type
& GOT_TLS_GD
)
14310 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14311 the symbol is both GD and GDESC, got.offset may
14312 have been overwritten. */
14313 h
->got
.offset
= s
->size
;
14317 if (tls_type
& GOT_TLS_IE
)
14318 /* R_ARM_TLS_IE32 needs one GOT slot. */
14322 dyn
= htab
->root
.dynamic_sections_created
;
14325 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
14326 bfd_link_pic (info
),
14328 && (!bfd_link_pic (info
)
14329 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
14332 if (tls_type
!= GOT_NORMAL
14333 && (bfd_link_pic (info
) || indx
!= 0)
14334 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
14335 || h
->root
.type
!= bfd_link_hash_undefweak
))
14337 if (tls_type
& GOT_TLS_IE
)
14338 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14340 if (tls_type
& GOT_TLS_GD
)
14341 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14343 if (tls_type
& GOT_TLS_GDESC
)
14345 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
14346 /* GDESC needs a trampoline to jump to. */
14347 htab
->tls_trampoline
= -1;
14350 /* Only GD needs it. GDESC just emits one relocation per
14352 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
14353 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14355 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
14357 if (htab
->root
.dynamic_sections_created
)
14358 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14359 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14361 else if (h
->type
== STT_GNU_IFUNC
14362 && eh
->plt
.noncall_refcount
== 0)
14363 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14364 they all resolve dynamically instead. Reserve room for the
14365 GOT entry's R_ARM_IRELATIVE relocation. */
14366 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
14367 else if (bfd_link_pic (info
)
14368 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
14369 || h
->root
.type
!= bfd_link_hash_undefweak
))
14370 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14371 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14375 h
->got
.offset
= (bfd_vma
) -1;
14377 /* Allocate stubs for exported Thumb functions on v4t. */
14378 if (!htab
->use_blx
&& h
->dynindx
!= -1
14380 && h
->target_internal
== ST_BRANCH_TO_THUMB
14381 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
14383 struct elf_link_hash_entry
* th
;
14384 struct bfd_link_hash_entry
* bh
;
14385 struct elf_link_hash_entry
* myh
;
14389 /* Create a new symbol to regist the real location of the function. */
14390 s
= h
->root
.u
.def
.section
;
14391 sprintf (name
, "__real_%s", h
->root
.root
.string
);
14392 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
14393 name
, BSF_GLOBAL
, s
,
14394 h
->root
.u
.def
.value
,
14395 NULL
, TRUE
, FALSE
, &bh
);
14397 myh
= (struct elf_link_hash_entry
*) bh
;
14398 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
14399 myh
->forced_local
= 1;
14400 myh
->target_internal
= ST_BRANCH_TO_THUMB
;
14401 eh
->export_glue
= myh
;
14402 th
= record_arm_to_thumb_glue (info
, h
);
14403 /* Point the symbol at the stub. */
14404 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
14405 h
->target_internal
= ST_BRANCH_TO_ARM
;
14406 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
14407 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
14410 if (eh
->dyn_relocs
== NULL
)
14413 /* In the shared -Bsymbolic case, discard space allocated for
14414 dynamic pc-relative relocs against symbols which turn out to be
14415 defined in regular objects. For the normal shared case, discard
14416 space for pc-relative relocs that have become local due to symbol
14417 visibility changes. */
14419 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
14421 /* Relocs that use pc_count are PC-relative forms, which will appear
14422 on something like ".long foo - ." or "movw REG, foo - .". We want
14423 calls to protected symbols to resolve directly to the function
14424 rather than going via the plt. If people want function pointer
14425 comparisons to work as expected then they should avoid writing
14426 assembly like ".long foo - .". */
14427 if (SYMBOL_CALLS_LOCAL (info
, h
))
14429 struct elf_dyn_relocs
**pp
;
14431 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
14433 p
->count
-= p
->pc_count
;
14442 if (htab
->vxworks_p
)
14444 struct elf_dyn_relocs
**pp
;
14446 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
14448 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
14455 /* Also discard relocs on undefined weak syms with non-default
14457 if (eh
->dyn_relocs
!= NULL
14458 && h
->root
.type
== bfd_link_hash_undefweak
)
14460 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
)
14461 eh
->dyn_relocs
= NULL
;
14463 /* Make sure undefined weak symbols are output as a dynamic
14465 else if (h
->dynindx
== -1
14466 && !h
->forced_local
)
14468 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14473 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
14474 && h
->root
.type
== bfd_link_hash_new
)
14476 /* Output absolute symbols so that we can create relocations
14477 against them. For normal symbols we output a relocation
14478 against the section that contains them. */
14479 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14486 /* For the non-shared case, discard space for relocs against
14487 symbols which turn out to need copy relocs or are not
14490 if (!h
->non_got_ref
14491 && ((h
->def_dynamic
14492 && !h
->def_regular
)
14493 || (htab
->root
.dynamic_sections_created
14494 && (h
->root
.type
== bfd_link_hash_undefweak
14495 || h
->root
.type
== bfd_link_hash_undefined
))))
14497 /* Make sure this symbol is output as a dynamic symbol.
14498 Undefined weak syms won't yet be marked as dynamic. */
14499 if (h
->dynindx
== -1
14500 && !h
->forced_local
)
14502 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14506 /* If that succeeded, we know we'll be keeping all the
14508 if (h
->dynindx
!= -1)
14512 eh
->dyn_relocs
= NULL
;
14517 /* Finally, allocate space. */
14518 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
14520 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
14521 if (h
->type
== STT_GNU_IFUNC
14522 && eh
->plt
.noncall_refcount
== 0
14523 && SYMBOL_REFERENCES_LOCAL (info
, h
))
14524 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
14526 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
14532 /* Find any dynamic relocs that apply to read-only sections. */
14535 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry
* h
, void * inf
)
14537 struct elf32_arm_link_hash_entry
* eh
;
14538 struct elf_dyn_relocs
* p
;
14540 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14541 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
14543 asection
*s
= p
->sec
;
14545 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
14547 struct bfd_link_info
*info
= (struct bfd_link_info
*) inf
;
14549 info
->flags
|= DF_TEXTREL
;
14551 /* Not an error, just cut short the traversal. */
14559 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
14562 struct elf32_arm_link_hash_table
*globals
;
14564 globals
= elf32_arm_hash_table (info
);
14565 if (globals
== NULL
)
14568 globals
->byteswap_code
= byteswap_code
;
14571 /* Set the sizes of the dynamic sections. */
14574 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
14575 struct bfd_link_info
* info
)
14580 bfd_boolean relocs
;
14582 struct elf32_arm_link_hash_table
*htab
;
14584 htab
= elf32_arm_hash_table (info
);
14588 dynobj
= elf_hash_table (info
)->dynobj
;
14589 BFD_ASSERT (dynobj
!= NULL
);
14590 check_use_blx (htab
);
14592 if (elf_hash_table (info
)->dynamic_sections_created
)
14594 /* Set the contents of the .interp section to the interpreter. */
14595 if (bfd_link_executable (info
) && !info
->nointerp
)
14597 s
= bfd_get_linker_section (dynobj
, ".interp");
14598 BFD_ASSERT (s
!= NULL
);
14599 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
14600 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
14604 /* Set up .got offsets for local syms, and space for local dynamic
14606 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
14608 bfd_signed_vma
*local_got
;
14609 bfd_signed_vma
*end_local_got
;
14610 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
14611 char *local_tls_type
;
14612 bfd_vma
*local_tlsdesc_gotent
;
14613 bfd_size_type locsymcount
;
14614 Elf_Internal_Shdr
*symtab_hdr
;
14616 bfd_boolean is_vxworks
= htab
->vxworks_p
;
14617 unsigned int symndx
;
14619 if (! is_arm_elf (ibfd
))
14622 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
14624 struct elf_dyn_relocs
*p
;
14626 for (p
= (struct elf_dyn_relocs
*)
14627 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
14629 if (!bfd_is_abs_section (p
->sec
)
14630 && bfd_is_abs_section (p
->sec
->output_section
))
14632 /* Input section has been discarded, either because
14633 it is a copy of a linkonce section or due to
14634 linker script /DISCARD/, so we'll be discarding
14637 else if (is_vxworks
14638 && strcmp (p
->sec
->output_section
->name
,
14641 /* Relocations in vxworks .tls_vars sections are
14642 handled specially by the loader. */
14644 else if (p
->count
!= 0)
14646 srel
= elf_section_data (p
->sec
)->sreloc
;
14647 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
14648 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
14649 info
->flags
|= DF_TEXTREL
;
14654 local_got
= elf_local_got_refcounts (ibfd
);
14658 symtab_hdr
= & elf_symtab_hdr (ibfd
);
14659 locsymcount
= symtab_hdr
->sh_info
;
14660 end_local_got
= local_got
+ locsymcount
;
14661 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
14662 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
14663 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
14665 s
= htab
->root
.sgot
;
14666 srel
= htab
->root
.srelgot
;
14667 for (; local_got
< end_local_got
;
14668 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
14669 ++local_tlsdesc_gotent
, ++symndx
)
14671 *local_tlsdesc_gotent
= (bfd_vma
) -1;
14672 local_iplt
= *local_iplt_ptr
;
14673 if (local_iplt
!= NULL
)
14675 struct elf_dyn_relocs
*p
;
14677 if (local_iplt
->root
.refcount
> 0)
14679 elf32_arm_allocate_plt_entry (info
, TRUE
,
14682 if (local_iplt
->arm
.noncall_refcount
== 0)
14683 /* All references to the PLT are calls, so all
14684 non-call references can resolve directly to the
14685 run-time target. This means that the .got entry
14686 would be the same as the .igot.plt entry, so there's
14687 no point creating both. */
14692 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
14693 local_iplt
->root
.offset
= (bfd_vma
) -1;
14696 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
14700 psrel
= elf_section_data (p
->sec
)->sreloc
;
14701 if (local_iplt
->arm
.noncall_refcount
== 0)
14702 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
14704 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
14707 if (*local_got
> 0)
14709 Elf_Internal_Sym
*isym
;
14711 *local_got
= s
->size
;
14712 if (*local_tls_type
& GOT_TLS_GD
)
14713 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14715 if (*local_tls_type
& GOT_TLS_GDESC
)
14717 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
14718 - elf32_arm_compute_jump_table_size (htab
);
14719 htab
->root
.sgotplt
->size
+= 8;
14720 *local_got
= (bfd_vma
) -2;
14721 /* plt.got_offset needs to know there's a TLS_DESC
14722 reloc in the middle of .got.plt. */
14723 htab
->num_tls_desc
++;
14725 if (*local_tls_type
& GOT_TLS_IE
)
14728 if (*local_tls_type
& GOT_NORMAL
)
14730 /* If the symbol is both GD and GDESC, *local_got
14731 may have been overwritten. */
14732 *local_got
= s
->size
;
14736 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
14740 /* If all references to an STT_GNU_IFUNC PLT are calls,
14741 then all non-call references, including this GOT entry,
14742 resolve directly to the run-time target. */
14743 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
14744 && (local_iplt
== NULL
14745 || local_iplt
->arm
.noncall_refcount
== 0))
14746 elf32_arm_allocate_irelocs (info
, srel
, 1);
14747 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
)
14749 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
))
14750 || *local_tls_type
& GOT_TLS_GD
)
14751 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
14753 if (bfd_link_pic (info
) && *local_tls_type
& GOT_TLS_GDESC
)
14755 elf32_arm_allocate_dynrelocs (info
,
14756 htab
->root
.srelplt
, 1);
14757 htab
->tls_trampoline
= -1;
14762 *local_got
= (bfd_vma
) -1;
14766 if (htab
->tls_ldm_got
.refcount
> 0)
14768 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14769 for R_ARM_TLS_LDM32 relocations. */
14770 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
14771 htab
->root
.sgot
->size
+= 8;
14772 if (bfd_link_pic (info
))
14773 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14776 htab
->tls_ldm_got
.offset
= -1;
14778 /* Allocate global sym .plt and .got entries, and space for global
14779 sym dynamic relocs. */
14780 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
14782 /* Here we rummage through the found bfds to collect glue information. */
14783 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
14785 if (! is_arm_elf (ibfd
))
14788 /* Initialise mapping tables for code/data. */
14789 bfd_elf32_arm_init_maps (ibfd
);
14791 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
14792 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
14793 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
14794 /* xgettext:c-format */
14795 _bfd_error_handler (_("Errors encountered processing file %s"),
14799 /* Allocate space for the glue sections now that we've sized them. */
14800 bfd_elf32_arm_allocate_interworking_sections (info
);
14802 /* For every jump slot reserved in the sgotplt, reloc_count is
14803 incremented. However, when we reserve space for TLS descriptors,
14804 it's not incremented, so in order to compute the space reserved
14805 for them, it suffices to multiply the reloc count by the jump
14807 if (htab
->root
.srelplt
)
14808 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
14810 if (htab
->tls_trampoline
)
14812 if (htab
->root
.splt
->size
== 0)
14813 htab
->root
.splt
->size
+= htab
->plt_header_size
;
14815 htab
->tls_trampoline
= htab
->root
.splt
->size
;
14816 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
14818 /* If we're not using lazy TLS relocations, don't generate the
14819 PLT and GOT entries they require. */
14820 if (!(info
->flags
& DF_BIND_NOW
))
14822 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
14823 htab
->root
.sgot
->size
+= 4;
14825 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
14826 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
14830 /* The check_relocs and adjust_dynamic_symbol entry points have
14831 determined the sizes of the various dynamic sections. Allocate
14832 memory for them. */
14835 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
14839 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
14842 /* It's OK to base decisions on the section name, because none
14843 of the dynobj section names depend upon the input files. */
14844 name
= bfd_get_section_name (dynobj
, s
);
14846 if (s
== htab
->root
.splt
)
14848 /* Remember whether there is a PLT. */
14849 plt
= s
->size
!= 0;
14851 else if (CONST_STRNEQ (name
, ".rel"))
14855 /* Remember whether there are any reloc sections other
14856 than .rel(a).plt and .rela.plt.unloaded. */
14857 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
14860 /* We use the reloc_count field as a counter if we need
14861 to copy relocs into the output file. */
14862 s
->reloc_count
= 0;
14865 else if (s
!= htab
->root
.sgot
14866 && s
!= htab
->root
.sgotplt
14867 && s
!= htab
->root
.iplt
14868 && s
!= htab
->root
.igotplt
14869 && s
!= htab
->sdynbss
)
14871 /* It's not one of our sections, so don't allocate space. */
14877 /* If we don't need this section, strip it from the
14878 output file. This is mostly to handle .rel(a).bss and
14879 .rel(a).plt. We must create both sections in
14880 create_dynamic_sections, because they must be created
14881 before the linker maps input sections to output
14882 sections. The linker does that before
14883 adjust_dynamic_symbol is called, and it is that
14884 function which decides whether anything needs to go
14885 into these sections. */
14886 s
->flags
|= SEC_EXCLUDE
;
14890 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
14893 /* Allocate memory for the section contents. */
14894 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
14895 if (s
->contents
== NULL
)
14899 if (elf_hash_table (info
)->dynamic_sections_created
)
14901 /* Add some entries to the .dynamic section. We fill in the
14902 values later, in elf32_arm_finish_dynamic_sections, but we
14903 must add the entries now so that we get the correct size for
14904 the .dynamic section. The DT_DEBUG entry is filled in by the
14905 dynamic linker and used by the debugger. */
14906 #define add_dynamic_entry(TAG, VAL) \
14907 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14909 if (bfd_link_executable (info
))
14911 if (!add_dynamic_entry (DT_DEBUG
, 0))
14917 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
14918 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
14919 || !add_dynamic_entry (DT_PLTREL
,
14920 htab
->use_rel
? DT_REL
: DT_RELA
)
14921 || !add_dynamic_entry (DT_JMPREL
, 0))
14924 if (htab
->dt_tlsdesc_plt
&&
14925 (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
14926 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
14934 if (!add_dynamic_entry (DT_REL
, 0)
14935 || !add_dynamic_entry (DT_RELSZ
, 0)
14936 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
14941 if (!add_dynamic_entry (DT_RELA
, 0)
14942 || !add_dynamic_entry (DT_RELASZ
, 0)
14943 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
14948 /* If any dynamic relocs apply to a read-only section,
14949 then we need a DT_TEXTREL entry. */
14950 if ((info
->flags
& DF_TEXTREL
) == 0)
14951 elf_link_hash_traverse (& htab
->root
, elf32_arm_readonly_dynrelocs
,
14954 if ((info
->flags
& DF_TEXTREL
) != 0)
14956 if (!add_dynamic_entry (DT_TEXTREL
, 0))
14959 if (htab
->vxworks_p
14960 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
14963 #undef add_dynamic_entry
14968 /* Size sections even though they're not dynamic. We use it to setup
14969 _TLS_MODULE_BASE_, if needed. */
14972 elf32_arm_always_size_sections (bfd
*output_bfd
,
14973 struct bfd_link_info
*info
)
14977 if (bfd_link_relocatable (info
))
14980 tls_sec
= elf_hash_table (info
)->tls_sec
;
14984 struct elf_link_hash_entry
*tlsbase
;
14986 tlsbase
= elf_link_hash_lookup
14987 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
14991 struct bfd_link_hash_entry
*bh
= NULL
;
14992 const struct elf_backend_data
*bed
14993 = get_elf_backend_data (output_bfd
);
14995 if (!(_bfd_generic_link_add_one_symbol
14996 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
14997 tls_sec
, 0, NULL
, FALSE
,
14998 bed
->collect
, &bh
)))
15001 tlsbase
->type
= STT_TLS
;
15002 tlsbase
= (struct elf_link_hash_entry
*)bh
;
15003 tlsbase
->def_regular
= 1;
15004 tlsbase
->other
= STV_HIDDEN
;
15005 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
15011 /* Finish up dynamic symbol handling. We set the contents of various
15012 dynamic sections here. */
15015 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
15016 struct bfd_link_info
* info
,
15017 struct elf_link_hash_entry
* h
,
15018 Elf_Internal_Sym
* sym
)
15020 struct elf32_arm_link_hash_table
*htab
;
15021 struct elf32_arm_link_hash_entry
*eh
;
15023 htab
= elf32_arm_hash_table (info
);
15027 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15029 if (h
->plt
.offset
!= (bfd_vma
) -1)
15033 BFD_ASSERT (h
->dynindx
!= -1);
15034 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
15039 if (!h
->def_regular
)
15041 /* Mark the symbol as undefined, rather than as defined in
15042 the .plt section. */
15043 sym
->st_shndx
= SHN_UNDEF
;
15044 /* If the symbol is weak we need to clear the value.
15045 Otherwise, the PLT entry would provide a definition for
15046 the symbol even if the symbol wasn't defined anywhere,
15047 and so the symbol would never be NULL. Leave the value if
15048 there were any relocations where pointer equality matters
15049 (this is a clue for the dynamic linker, to make function
15050 pointer comparisons work between an application and shared
15052 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
15055 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
15057 /* At least one non-call relocation references this .iplt entry,
15058 so the .iplt entry is the function's canonical address. */
15059 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
15060 sym
->st_target_internal
= ST_BRANCH_TO_ARM
;
15061 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
15062 (output_bfd
, htab
->root
.iplt
->output_section
));
15063 sym
->st_value
= (h
->plt
.offset
15064 + htab
->root
.iplt
->output_section
->vma
15065 + htab
->root
.iplt
->output_offset
);
15072 Elf_Internal_Rela rel
;
15074 /* This symbol needs a copy reloc. Set it up. */
15075 BFD_ASSERT (h
->dynindx
!= -1
15076 && (h
->root
.type
== bfd_link_hash_defined
15077 || h
->root
.type
== bfd_link_hash_defweak
));
15080 BFD_ASSERT (s
!= NULL
);
15083 rel
.r_offset
= (h
->root
.u
.def
.value
15084 + h
->root
.u
.def
.section
->output_section
->vma
15085 + h
->root
.u
.def
.section
->output_offset
);
15086 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
15087 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
15090 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15091 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15092 to the ".got" section. */
15093 if (h
== htab
->root
.hdynamic
15094 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
15095 sym
->st_shndx
= SHN_ABS
;
15101 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
15103 const unsigned long *template, unsigned count
)
15107 for (ix
= 0; ix
!= count
; ix
++)
15109 unsigned long insn
= template[ix
];
15111 /* Emit mov pc,rx if bx is not permitted. */
15112 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
15113 insn
= (insn
& 0xf000000f) | 0x01a0f000;
15114 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
15118 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15119 other variants, NaCl needs this entry in a static executable's
15120 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15121 zero. For .iplt really only the last bundle is useful, and .iplt
15122 could have a shorter first entry, with each individual PLT entry's
15123 relative branch calculated differently so it targets the last
15124 bundle instead of the instruction before it (labelled .Lplt_tail
15125 above). But it's simpler to keep the size and layout of PLT0
15126 consistent with the dynamic case, at the cost of some dead code at
15127 the start of .iplt and the one dead store to the stack at the start
15130 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
15131 asection
*plt
, bfd_vma got_displacement
)
15135 put_arm_insn (htab
, output_bfd
,
15136 elf32_arm_nacl_plt0_entry
[0]
15137 | arm_movw_immediate (got_displacement
),
15138 plt
->contents
+ 0);
15139 put_arm_insn (htab
, output_bfd
,
15140 elf32_arm_nacl_plt0_entry
[1]
15141 | arm_movt_immediate (got_displacement
),
15142 plt
->contents
+ 4);
15144 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
15145 put_arm_insn (htab
, output_bfd
,
15146 elf32_arm_nacl_plt0_entry
[i
],
15147 plt
->contents
+ (i
* 4));
15150 /* Finish up the dynamic sections. */
15153 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
15158 struct elf32_arm_link_hash_table
*htab
;
15160 htab
= elf32_arm_hash_table (info
);
15164 dynobj
= elf_hash_table (info
)->dynobj
;
15166 sgot
= htab
->root
.sgotplt
;
15167 /* A broken linker script might have discarded the dynamic sections.
15168 Catch this here so that we do not seg-fault later on. */
15169 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
15171 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
15173 if (elf_hash_table (info
)->dynamic_sections_created
)
15176 Elf32_External_Dyn
*dyncon
, *dynconend
;
15178 splt
= htab
->root
.splt
;
15179 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
15180 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
15182 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
15183 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
15185 for (; dyncon
< dynconend
; dyncon
++)
15187 Elf_Internal_Dyn dyn
;
15191 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
15198 if (htab
->vxworks_p
15199 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
15200 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15205 goto get_vma_if_bpabi
;
15208 goto get_vma_if_bpabi
;
15211 goto get_vma_if_bpabi
;
15213 name
= ".gnu.version";
15214 goto get_vma_if_bpabi
;
15216 name
= ".gnu.version_d";
15217 goto get_vma_if_bpabi
;
15219 name
= ".gnu.version_r";
15220 goto get_vma_if_bpabi
;
15226 name
= RELOC_SECTION (htab
, ".plt");
15228 s
= bfd_get_section_by_name (output_bfd
, name
);
15231 /* PR ld/14397: Issue an error message if a required section is missing. */
15232 (*_bfd_error_handler
)
15233 (_("error: required section '%s' not found in the linker script"), name
);
15234 bfd_set_error (bfd_error_invalid_operation
);
15237 if (!htab
->symbian_p
)
15238 dyn
.d_un
.d_ptr
= s
->vma
;
15240 /* In the BPABI, tags in the PT_DYNAMIC section point
15241 at the file offset, not the memory address, for the
15242 convenience of the post linker. */
15243 dyn
.d_un
.d_ptr
= s
->filepos
;
15244 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15248 if (htab
->symbian_p
)
15253 s
= htab
->root
.srelplt
;
15254 BFD_ASSERT (s
!= NULL
);
15255 dyn
.d_un
.d_val
= s
->size
;
15256 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15261 if (!htab
->symbian_p
)
15263 /* My reading of the SVR4 ABI indicates that the
15264 procedure linkage table relocs (DT_JMPREL) should be
15265 included in the overall relocs (DT_REL). This is
15266 what Solaris does. However, UnixWare can not handle
15267 that case. Therefore, we override the DT_RELSZ entry
15268 here to make it not include the JMPREL relocs. Since
15269 the linker script arranges for .rel(a).plt to follow all
15270 other relocation sections, we don't have to worry
15271 about changing the DT_REL entry. */
15272 s
= htab
->root
.srelplt
;
15274 dyn
.d_un
.d_val
-= s
->size
;
15275 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15278 /* Fall through. */
15282 /* In the BPABI, the DT_REL tag must point at the file
15283 offset, not the VMA, of the first relocation
15284 section. So, we use code similar to that in
15285 elflink.c, but do not check for SHF_ALLOC on the
15286 relcoation section, since relocations sections are
15287 never allocated under the BPABI. The comments above
15288 about Unixware notwithstanding, we include all of the
15289 relocations here. */
15290 if (htab
->symbian_p
)
15293 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
15294 ? SHT_REL
: SHT_RELA
);
15295 dyn
.d_un
.d_val
= 0;
15296 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
15298 Elf_Internal_Shdr
*hdr
15299 = elf_elfsections (output_bfd
)[i
];
15300 if (hdr
->sh_type
== type
)
15302 if (dyn
.d_tag
== DT_RELSZ
15303 || dyn
.d_tag
== DT_RELASZ
)
15304 dyn
.d_un
.d_val
+= hdr
->sh_size
;
15305 else if ((ufile_ptr
) hdr
->sh_offset
15306 <= dyn
.d_un
.d_val
- 1)
15307 dyn
.d_un
.d_val
= hdr
->sh_offset
;
15310 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15314 case DT_TLSDESC_PLT
:
15315 s
= htab
->root
.splt
;
15316 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
15317 + htab
->dt_tlsdesc_plt
);
15318 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15321 case DT_TLSDESC_GOT
:
15322 s
= htab
->root
.sgot
;
15323 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
15324 + htab
->dt_tlsdesc_got
);
15325 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15328 /* Set the bottom bit of DT_INIT/FINI if the
15329 corresponding function is Thumb. */
15331 name
= info
->init_function
;
15334 name
= info
->fini_function
;
15336 /* If it wasn't set by elf_bfd_final_link
15337 then there is nothing to adjust. */
15338 if (dyn
.d_un
.d_val
!= 0)
15340 struct elf_link_hash_entry
* eh
;
15342 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
15343 FALSE
, FALSE
, TRUE
);
15344 if (eh
!= NULL
&& eh
->target_internal
== ST_BRANCH_TO_THUMB
)
15346 dyn
.d_un
.d_val
|= 1;
15347 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15354 /* Fill in the first entry in the procedure linkage table. */
15355 if (splt
->size
> 0 && htab
->plt_header_size
)
15357 const bfd_vma
*plt0_entry
;
15358 bfd_vma got_address
, plt_address
, got_displacement
;
15360 /* Calculate the addresses of the GOT and PLT. */
15361 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
15362 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
15364 if (htab
->vxworks_p
)
15366 /* The VxWorks GOT is relocated by the dynamic linker.
15367 Therefore, we must emit relocations rather than simply
15368 computing the values now. */
15369 Elf_Internal_Rela rel
;
15371 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
15372 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
15373 splt
->contents
+ 0);
15374 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
15375 splt
->contents
+ 4);
15376 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
15377 splt
->contents
+ 8);
15378 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
15380 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15381 rel
.r_offset
= plt_address
+ 12;
15382 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
15384 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
15385 htab
->srelplt2
->contents
);
15387 else if (htab
->nacl_p
)
15388 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
15389 got_address
+ 8 - (plt_address
+ 16));
15390 else if (using_thumb_only (htab
))
15392 got_displacement
= got_address
- (plt_address
+ 12);
15394 plt0_entry
= elf32_thumb2_plt0_entry
;
15395 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
15396 splt
->contents
+ 0);
15397 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
15398 splt
->contents
+ 4);
15399 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
15400 splt
->contents
+ 8);
15402 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
15406 got_displacement
= got_address
- (plt_address
+ 16);
15408 plt0_entry
= elf32_arm_plt0_entry
;
15409 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
15410 splt
->contents
+ 0);
15411 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
15412 splt
->contents
+ 4);
15413 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
15414 splt
->contents
+ 8);
15415 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
15416 splt
->contents
+ 12);
15418 #ifdef FOUR_WORD_PLT
15419 /* The displacement value goes in the otherwise-unused
15420 last word of the second entry. */
15421 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
15423 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
15428 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15429 really seem like the right value. */
15430 if (splt
->output_section
->owner
== output_bfd
)
15431 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
15433 if (htab
->dt_tlsdesc_plt
)
15435 bfd_vma got_address
15436 = sgot
->output_section
->vma
+ sgot
->output_offset
;
15437 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
15438 + htab
->root
.sgot
->output_offset
);
15439 bfd_vma plt_address
15440 = splt
->output_section
->vma
+ splt
->output_offset
;
15442 arm_put_trampoline (htab
, output_bfd
,
15443 splt
->contents
+ htab
->dt_tlsdesc_plt
,
15444 dl_tlsdesc_lazy_trampoline
, 6);
15446 bfd_put_32 (output_bfd
,
15447 gotplt_address
+ htab
->dt_tlsdesc_got
15448 - (plt_address
+ htab
->dt_tlsdesc_plt
)
15449 - dl_tlsdesc_lazy_trampoline
[6],
15450 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
15451 bfd_put_32 (output_bfd
,
15452 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
15453 - dl_tlsdesc_lazy_trampoline
[7],
15454 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
15457 if (htab
->tls_trampoline
)
15459 arm_put_trampoline (htab
, output_bfd
,
15460 splt
->contents
+ htab
->tls_trampoline
,
15461 tls_trampoline
, 3);
15462 #ifdef FOUR_WORD_PLT
15463 bfd_put_32 (output_bfd
, 0x00000000,
15464 splt
->contents
+ htab
->tls_trampoline
+ 12);
15468 if (htab
->vxworks_p
15469 && !bfd_link_pic (info
)
15470 && htab
->root
.splt
->size
> 0)
15472 /* Correct the .rel(a).plt.unloaded relocations. They will have
15473 incorrect symbol indexes. */
15477 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
15478 / htab
->plt_entry_size
);
15479 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
15481 for (; num_plts
; num_plts
--)
15483 Elf_Internal_Rela rel
;
15485 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
15486 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
15487 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
15488 p
+= RELOC_SIZE (htab
);
15490 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
15491 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
15492 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
15493 p
+= RELOC_SIZE (htab
);
15498 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
15499 /* NaCl uses a special first entry in .iplt too. */
15500 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
15502 /* Fill in the first three entries in the global offset table. */
15505 if (sgot
->size
> 0)
15508 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
15510 bfd_put_32 (output_bfd
,
15511 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
15513 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
15514 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
15517 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
15524 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
15526 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
15527 struct elf32_arm_link_hash_table
*globals
;
15528 struct elf_segment_map
*m
;
15530 i_ehdrp
= elf_elfheader (abfd
);
15532 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
15533 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
15535 _bfd_elf_post_process_headers (abfd
, link_info
);
15536 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
15540 globals
= elf32_arm_hash_table (link_info
);
15541 if (globals
!= NULL
&& globals
->byteswap_code
)
15542 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
15545 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
15546 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
15548 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
15549 if (abi
== AEABI_VFP_args_vfp
)
15550 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
15552 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
15555 /* Scan segment to set p_flags attribute if it contains only sections with
15556 SHF_ARM_NOREAD flag. */
15557 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
15563 for (j
= 0; j
< m
->count
; j
++)
15565 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_NOREAD
))
15571 m
->p_flags_valid
= 1;
15576 static enum elf_reloc_type_class
15577 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
15578 const asection
*rel_sec ATTRIBUTE_UNUSED
,
15579 const Elf_Internal_Rela
*rela
)
15581 switch ((int) ELF32_R_TYPE (rela
->r_info
))
15583 case R_ARM_RELATIVE
:
15584 return reloc_class_relative
;
15585 case R_ARM_JUMP_SLOT
:
15586 return reloc_class_plt
;
15588 return reloc_class_copy
;
15589 case R_ARM_IRELATIVE
:
15590 return reloc_class_ifunc
;
15592 return reloc_class_normal
;
15597 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
15599 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
15602 /* Return TRUE if this is an unwinding table entry. */
15605 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
15607 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
15608 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
15612 /* Set the type and flags for an ARM section. We do this by
15613 the section name, which is a hack, but ought to work. */
15616 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
15620 name
= bfd_get_section_name (abfd
, sec
);
15622 if (is_arm_elf_unwind_section_name (abfd
, name
))
15624 hdr
->sh_type
= SHT_ARM_EXIDX
;
15625 hdr
->sh_flags
|= SHF_LINK_ORDER
;
15628 if (sec
->flags
& SEC_ELF_NOREAD
)
15629 hdr
->sh_flags
|= SHF_ARM_NOREAD
;
15634 /* Handle an ARM specific section when reading an object file. This is
15635 called when bfd_section_from_shdr finds a section with an unknown
15639 elf32_arm_section_from_shdr (bfd
*abfd
,
15640 Elf_Internal_Shdr
* hdr
,
15644 /* There ought to be a place to keep ELF backend specific flags, but
15645 at the moment there isn't one. We just keep track of the
15646 sections by their name, instead. Fortunately, the ABI gives
15647 names for all the ARM specific sections, so we will probably get
15649 switch (hdr
->sh_type
)
15651 case SHT_ARM_EXIDX
:
15652 case SHT_ARM_PREEMPTMAP
:
15653 case SHT_ARM_ATTRIBUTES
:
15660 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
15666 static _arm_elf_section_data
*
15667 get_arm_elf_section_data (asection
* sec
)
15669 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
15670 return elf32_arm_section_data (sec
);
15678 struct bfd_link_info
*info
;
15681 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
15682 asection
*, struct elf_link_hash_entry
*);
15683 } output_arch_syminfo
;
15685 enum map_symbol_type
15693 /* Output a single mapping symbol. */
15696 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
15697 enum map_symbol_type type
,
15700 static const char *names
[3] = {"$a", "$t", "$d"};
15701 Elf_Internal_Sym sym
;
15703 sym
.st_value
= osi
->sec
->output_section
->vma
15704 + osi
->sec
->output_offset
15708 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
15709 sym
.st_shndx
= osi
->sec_shndx
;
15710 sym
.st_target_internal
= 0;
15711 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
15712 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
15715 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15716 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15719 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
15720 bfd_boolean is_iplt_entry_p
,
15721 union gotplt_union
*root_plt
,
15722 struct arm_plt_info
*arm_plt
)
15724 struct elf32_arm_link_hash_table
*htab
;
15725 bfd_vma addr
, plt_header_size
;
15727 if (root_plt
->offset
== (bfd_vma
) -1)
15730 htab
= elf32_arm_hash_table (osi
->info
);
15734 if (is_iplt_entry_p
)
15736 osi
->sec
= htab
->root
.iplt
;
15737 plt_header_size
= 0;
15741 osi
->sec
= htab
->root
.splt
;
15742 plt_header_size
= htab
->plt_header_size
;
15744 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
15745 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
15747 addr
= root_plt
->offset
& -2;
15748 if (htab
->symbian_p
)
15750 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15752 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
15755 else if (htab
->vxworks_p
)
15757 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15759 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
15761 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
15763 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
15766 else if (htab
->nacl_p
)
15768 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15771 else if (using_thumb_only (htab
))
15773 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
15778 bfd_boolean thumb_stub_p
;
15780 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
15783 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
15786 #ifdef FOUR_WORD_PLT
15787 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15789 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
15792 /* A three-word PLT with no Thumb thunk contains only Arm code,
15793 so only need to output a mapping symbol for the first PLT entry and
15794 entries with thumb thunks. */
15795 if (thumb_stub_p
|| addr
== plt_header_size
)
15797 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15806 /* Output mapping symbols for PLT entries associated with H. */
15809 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
15811 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
15812 struct elf32_arm_link_hash_entry
*eh
;
15814 if (h
->root
.type
== bfd_link_hash_indirect
)
15817 if (h
->root
.type
== bfd_link_hash_warning
)
15818 /* When warning symbols are created, they **replace** the "real"
15819 entry in the hash table, thus we never get to see the real
15820 symbol in a hash traversal. So look at it now. */
15821 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15823 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15824 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
15825 &h
->plt
, &eh
->plt
);
15828 /* Output a single local symbol for a generated stub. */
15831 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
15832 bfd_vma offset
, bfd_vma size
)
15834 Elf_Internal_Sym sym
;
15836 sym
.st_value
= osi
->sec
->output_section
->vma
15837 + osi
->sec
->output_offset
15839 sym
.st_size
= size
;
15841 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
15842 sym
.st_shndx
= osi
->sec_shndx
;
15843 sym
.st_target_internal
= 0;
15844 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
15848 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
15851 struct elf32_arm_stub_hash_entry
*stub_entry
;
15852 asection
*stub_sec
;
15855 output_arch_syminfo
*osi
;
15856 const insn_sequence
*template_sequence
;
15857 enum stub_insn_type prev_type
;
15860 enum map_symbol_type sym_type
;
15862 /* Massage our args to the form they really have. */
15863 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
15864 osi
= (output_arch_syminfo
*) in_arg
;
15866 stub_sec
= stub_entry
->stub_sec
;
15868 /* Ensure this stub is attached to the current section being
15870 if (stub_sec
!= osi
->sec
)
15873 addr
= (bfd_vma
) stub_entry
->stub_offset
;
15874 stub_name
= stub_entry
->output_name
;
15876 template_sequence
= stub_entry
->stub_template
;
15877 switch (template_sequence
[0].type
)
15880 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
, stub_entry
->stub_size
))
15885 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
15886 stub_entry
->stub_size
))
15894 prev_type
= DATA_TYPE
;
15896 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
15898 switch (template_sequence
[i
].type
)
15901 sym_type
= ARM_MAP_ARM
;
15906 sym_type
= ARM_MAP_THUMB
;
15910 sym_type
= ARM_MAP_DATA
;
15918 if (template_sequence
[i
].type
!= prev_type
)
15920 prev_type
= template_sequence
[i
].type
;
15921 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
15925 switch (template_sequence
[i
].type
)
15949 /* Output mapping symbols for linker generated sections,
15950 and for those data-only sections that do not have a
15954 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
15955 struct bfd_link_info
*info
,
15957 int (*func
) (void *, const char *,
15958 Elf_Internal_Sym
*,
15960 struct elf_link_hash_entry
*))
15962 output_arch_syminfo osi
;
15963 struct elf32_arm_link_hash_table
*htab
;
15965 bfd_size_type size
;
15968 htab
= elf32_arm_hash_table (info
);
15972 check_use_blx (htab
);
15974 osi
.flaginfo
= flaginfo
;
15978 /* Add a $d mapping symbol to data-only sections that
15979 don't have any mapping symbol. This may result in (harmless) redundant
15980 mapping symbols. */
15981 for (input_bfd
= info
->input_bfds
;
15983 input_bfd
= input_bfd
->link
.next
)
15985 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
15986 for (osi
.sec
= input_bfd
->sections
;
15988 osi
.sec
= osi
.sec
->next
)
15990 if (osi
.sec
->output_section
!= NULL
15991 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
15993 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
15994 == SEC_HAS_CONTENTS
15995 && get_arm_elf_section_data (osi
.sec
) != NULL
15996 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
15997 && osi
.sec
->size
> 0
15998 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
16000 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16001 (output_bfd
, osi
.sec
->output_section
);
16002 if (osi
.sec_shndx
!= (int)SHN_BAD
)
16003 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
16008 /* ARM->Thumb glue. */
16009 if (htab
->arm_glue_size
> 0)
16011 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16012 ARM2THUMB_GLUE_SECTION_NAME
);
16014 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16015 (output_bfd
, osi
.sec
->output_section
);
16016 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
16017 || htab
->pic_veneer
)
16018 size
= ARM2THUMB_PIC_GLUE_SIZE
;
16019 else if (htab
->use_blx
)
16020 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
16022 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
16024 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
16026 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
16027 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
16031 /* Thumb->ARM glue. */
16032 if (htab
->thumb_glue_size
> 0)
16034 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16035 THUMB2ARM_GLUE_SECTION_NAME
);
16037 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16038 (output_bfd
, osi
.sec
->output_section
);
16039 size
= THUMB2ARM_GLUE_SIZE
;
16041 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
16043 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
16044 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
16048 /* ARMv4 BX veneers. */
16049 if (htab
->bx_glue_size
> 0)
16051 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16052 ARM_BX_GLUE_SECTION_NAME
);
16054 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16055 (output_bfd
, osi
.sec
->output_section
);
16057 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
16060 /* Long calls stubs. */
16061 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
16063 asection
* stub_sec
;
16065 for (stub_sec
= htab
->stub_bfd
->sections
;
16067 stub_sec
= stub_sec
->next
)
16069 /* Ignore non-stub sections. */
16070 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
16073 osi
.sec
= stub_sec
;
16075 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16076 (output_bfd
, osi
.sec
->output_section
);
16078 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
16082 /* Finally, output mapping symbols for the PLT. */
16083 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
16085 osi
.sec
= htab
->root
.splt
;
16086 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
16087 (output_bfd
, osi
.sec
->output_section
));
16089 /* Output mapping symbols for the plt header. SymbianOS does not have a
16091 if (htab
->vxworks_p
)
16093 /* VxWorks shared libraries have no PLT header. */
16094 if (!bfd_link_pic (info
))
16096 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16098 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
16102 else if (htab
->nacl_p
)
16104 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16107 else if (using_thumb_only (htab
))
16109 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
16111 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
16113 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
16116 else if (!htab
->symbian_p
)
16118 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16120 #ifndef FOUR_WORD_PLT
16121 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
16126 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
16128 /* NaCl uses a special first entry in .iplt too. */
16129 osi
.sec
= htab
->root
.iplt
;
16130 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
16131 (output_bfd
, osi
.sec
->output_section
));
16132 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16135 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
16136 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
16138 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
16139 for (input_bfd
= info
->input_bfds
;
16141 input_bfd
= input_bfd
->link
.next
)
16143 struct arm_local_iplt_info
**local_iplt
;
16144 unsigned int i
, num_syms
;
16146 local_iplt
= elf32_arm_local_iplt (input_bfd
);
16147 if (local_iplt
!= NULL
)
16149 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
16150 for (i
= 0; i
< num_syms
; i
++)
16151 if (local_iplt
[i
] != NULL
16152 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
16153 &local_iplt
[i
]->root
,
16154 &local_iplt
[i
]->arm
))
16159 if (htab
->dt_tlsdesc_plt
!= 0)
16161 /* Mapping symbols for the lazy tls trampoline. */
16162 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
16165 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
16166 htab
->dt_tlsdesc_plt
+ 24))
16169 if (htab
->tls_trampoline
!= 0)
16171 /* Mapping symbols for the tls trampoline. */
16172 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
16174 #ifdef FOUR_WORD_PLT
16175 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
16176 htab
->tls_trampoline
+ 12))
16184 /* Allocate target specific section data. */
16187 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
16189 if (!sec
->used_by_bfd
)
16191 _arm_elf_section_data
*sdata
;
16192 bfd_size_type amt
= sizeof (*sdata
);
16194 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
16197 sec
->used_by_bfd
= sdata
;
16200 return _bfd_elf_new_section_hook (abfd
, sec
);
16204 /* Used to order a list of mapping symbols by address. */
16207 elf32_arm_compare_mapping (const void * a
, const void * b
)
16209 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
16210 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
16212 if (amap
->vma
> bmap
->vma
)
16214 else if (amap
->vma
< bmap
->vma
)
16216 else if (amap
->type
> bmap
->type
)
16217 /* Ensure results do not depend on the host qsort for objects with
16218 multiple mapping symbols at the same address by sorting on type
16221 else if (amap
->type
< bmap
->type
)
16227 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16229 static unsigned long
16230 offset_prel31 (unsigned long addr
, bfd_vma offset
)
16232 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
16235 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16239 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
16241 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
16242 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
16244 /* High bit of first word is supposed to be zero. */
16245 if ((first_word
& 0x80000000ul
) == 0)
16246 first_word
= offset_prel31 (first_word
, offset
);
16248 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16249 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16250 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
16251 second_word
= offset_prel31 (second_word
, offset
);
16253 bfd_put_32 (output_bfd
, first_word
, to
);
16254 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
16257 /* Data for make_branch_to_a8_stub(). */
16259 struct a8_branch_to_stub_data
16261 asection
*writing_section
;
16262 bfd_byte
*contents
;
16266 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16267 places for a particular section. */
16270 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
16273 struct elf32_arm_stub_hash_entry
*stub_entry
;
16274 struct a8_branch_to_stub_data
*data
;
16275 bfd_byte
*contents
;
16276 unsigned long branch_insn
;
16277 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
16278 bfd_signed_vma branch_offset
;
16280 unsigned int target
;
16282 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16283 data
= (struct a8_branch_to_stub_data
*) in_arg
;
16285 if (stub_entry
->target_section
!= data
->writing_section
16286 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
16289 contents
= data
->contents
;
16291 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
16292 + stub_entry
->target_section
->output_offset
16293 + stub_entry
->target_value
;
16295 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
16296 + stub_entry
->stub_sec
->output_offset
16297 + stub_entry
->stub_offset
;
16299 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
16300 veneered_insn_loc
&= ~3u;
16302 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
16304 abfd
= stub_entry
->target_section
->owner
;
16305 target
= stub_entry
->target_value
;
16307 /* We attempt to avoid this condition by setting stubs_always_after_branch
16308 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16309 This check is just to be on the safe side... */
16310 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
16312 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub is "
16313 "allocated in unsafe location"), abfd
);
16317 switch (stub_entry
->stub_type
)
16319 case arm_stub_a8_veneer_b
:
16320 case arm_stub_a8_veneer_b_cond
:
16321 branch_insn
= 0xf0009000;
16324 case arm_stub_a8_veneer_blx
:
16325 branch_insn
= 0xf000e800;
16328 case arm_stub_a8_veneer_bl
:
16330 unsigned int i1
, j1
, i2
, j2
, s
;
16332 branch_insn
= 0xf000d000;
16335 if (branch_offset
< -16777216 || branch_offset
> 16777214)
16337 /* There's not much we can do apart from complain if this
16339 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub out "
16340 "of range (input file too large)"), abfd
);
16344 /* i1 = not(j1 eor s), so:
16346 j1 = (not i1) eor s. */
16348 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
16349 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
16350 i2
= (branch_offset
>> 22) & 1;
16351 i1
= (branch_offset
>> 23) & 1;
16352 s
= (branch_offset
>> 24) & 1;
16355 branch_insn
|= j2
<< 11;
16356 branch_insn
|= j1
<< 13;
16357 branch_insn
|= s
<< 26;
16366 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[target
]);
16367 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[target
+ 2]);
16372 /* Beginning of stm32l4xx work-around. */
16374 /* Functions encoding instructions necessary for the emission of the
16375 fix-stm32l4xx-629360.
16376 Encoding is extracted from the
16377 ARM (C) Architecture Reference Manual
16378 ARMv7-A and ARMv7-R edition
16379 ARM DDI 0406C.b (ID072512). */
16381 static inline bfd_vma
16382 create_instruction_branch_absolute (int branch_offset
)
16384 /* A8.8.18 B (A8-334)
16385 B target_address (Encoding T4). */
16386 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16387 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16388 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16390 int s
= ((branch_offset
& 0x1000000) >> 24);
16391 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
16392 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
16394 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
16395 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16397 bfd_vma patched_inst
= 0xf0009000
16399 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
16400 | j1
<< 13 /* J1. */
16401 | j2
<< 11 /* J2. */
16402 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
16404 return patched_inst
;
16407 static inline bfd_vma
16408 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
16410 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16411 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16412 bfd_vma patched_inst
= 0xe8900000
16413 | (/*W=*/wback
<< 21)
16415 | (reg_mask
& 0x0000ffff);
16417 return patched_inst
;
16420 static inline bfd_vma
16421 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
16423 /* A8.8.60 LDMDB/LDMEA (A8-402)
16424 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16425 bfd_vma patched_inst
= 0xe9100000
16426 | (/*W=*/wback
<< 21)
16428 | (reg_mask
& 0x0000ffff);
16430 return patched_inst
;
16433 static inline bfd_vma
16434 create_instruction_mov (int target_reg
, int source_reg
)
16436 /* A8.8.103 MOV (register) (A8-486)
16437 MOV Rd, Rm (Encoding T1). */
16438 bfd_vma patched_inst
= 0x4600
16439 | (target_reg
& 0x7)
16440 | ((target_reg
& 0x8) >> 3) << 7
16441 | (source_reg
<< 3);
16443 return patched_inst
;
16446 static inline bfd_vma
16447 create_instruction_sub (int target_reg
, int source_reg
, int value
)
16449 /* A8.8.221 SUB (immediate) (A8-708)
16450 SUB Rd, Rn, #value (Encoding T3). */
16451 bfd_vma patched_inst
= 0xf1a00000
16452 | (target_reg
<< 8)
16453 | (source_reg
<< 16)
16455 | ((value
& 0x800) >> 11) << 26
16456 | ((value
& 0x700) >> 8) << 12
16459 return patched_inst
;
16462 static inline bfd_vma
16463 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
16466 /* A8.8.332 VLDM (A8-922)
16467 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
16468 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
16469 | (/*W=*/wback
<< 21)
16471 | (num_words
& 0x000000ff)
16472 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
16473 | (first_reg
& 0x00000001) << 22;
16475 return patched_inst
;
16478 static inline bfd_vma
16479 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
16482 /* A8.8.332 VLDM (A8-922)
16483 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
16484 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
16486 | (num_words
& 0x000000ff)
16487 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
16488 | (first_reg
& 0x00000001) << 22;
16490 return patched_inst
;
16493 static inline bfd_vma
16494 create_instruction_udf_w (int value
)
16496 /* A8.8.247 UDF (A8-758)
16497 Undefined (Encoding T2). */
16498 bfd_vma patched_inst
= 0xf7f0a000
16499 | (value
& 0x00000fff)
16500 | (value
& 0x000f0000) << 16;
16502 return patched_inst
;
16505 static inline bfd_vma
16506 create_instruction_udf (int value
)
16508 /* A8.8.247 UDF (A8-758)
16509 Undefined (Encoding T1). */
16510 bfd_vma patched_inst
= 0xde00
16513 return patched_inst
;
16516 /* Functions writing an instruction in memory, returning the next
16517 memory position to write to. */
16519 static inline bfd_byte
*
16520 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
16521 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
16523 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
16527 static inline bfd_byte
*
16528 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
16529 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
16531 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
16535 /* Function filling up a region in memory with T1 and T2 UDFs taking
16536 care of alignment. */
16539 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
16541 const bfd_byte
* const base_stub_contents
,
16542 bfd_byte
* const from_stub_contents
,
16543 const bfd_byte
* const end_stub_contents
)
16545 bfd_byte
*current_stub_contents
= from_stub_contents
;
16547 /* Fill the remaining of the stub with deterministic contents : UDF
16549 Check if realignment is needed on modulo 4 frontier using T1, to
16551 if ((current_stub_contents
< end_stub_contents
)
16552 && !((current_stub_contents
- base_stub_contents
) % 2)
16553 && ((current_stub_contents
- base_stub_contents
) % 4))
16554 current_stub_contents
=
16555 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16556 create_instruction_udf (0));
16558 for (; current_stub_contents
< end_stub_contents
;)
16559 current_stub_contents
=
16560 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16561 create_instruction_udf_w (0));
16563 return current_stub_contents
;
16566 /* Functions writing the stream of instructions equivalent to the
16567 derived sequence for ldmia, ldmdb, vldm respectively. */
16570 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
16572 const insn32 initial_insn
,
16573 const bfd_byte
*const initial_insn_addr
,
16574 bfd_byte
*const base_stub_contents
)
16576 int wback
= (initial_insn
& 0x00200000) >> 21;
16577 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
16578 int insn_all_registers
= initial_insn
& 0x0000ffff;
16579 int insn_low_registers
, insn_high_registers
;
16580 int usable_register_mask
;
16581 int nb_registers
= popcount (insn_all_registers
);
16582 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
16583 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
16584 bfd_byte
*current_stub_contents
= base_stub_contents
;
16586 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
16588 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16589 smaller than 8 registers load sequences that do not cause the
16591 if (nb_registers
<= 8)
16593 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16594 current_stub_contents
=
16595 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16598 /* B initial_insn_addr+4. */
16600 current_stub_contents
=
16601 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16602 create_instruction_branch_absolute
16603 (initial_insn_addr
- current_stub_contents
));
16606 /* Fill the remaining of the stub with deterministic contents. */
16607 current_stub_contents
=
16608 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16609 base_stub_contents
, current_stub_contents
,
16610 base_stub_contents
+
16611 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16616 /* - reg_list[13] == 0. */
16617 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
16619 /* - reg_list[14] & reg_list[15] != 1. */
16620 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
16622 /* - if (wback==1) reg_list[rn] == 0. */
16623 BFD_ASSERT (!wback
|| !restore_rn
);
16625 /* - nb_registers > 8. */
16626 BFD_ASSERT (popcount (insn_all_registers
) > 8);
16628 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16630 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16631 - One with the 7 lowest registers (register mask 0x007F)
16632 This LDM will finally contain between 2 and 7 registers
16633 - One with the 7 highest registers (register mask 0xDF80)
16634 This ldm will finally contain between 2 and 7 registers. */
16635 insn_low_registers
= insn_all_registers
& 0x007F;
16636 insn_high_registers
= insn_all_registers
& 0xDF80;
16638 /* A spare register may be needed during this veneer to temporarily
16639 handle the base register. This register will be restored with the
16640 last LDM operation.
16641 The usable register may be any general purpose register (that
16642 excludes PC, SP, LR : register mask is 0x1FFF). */
16643 usable_register_mask
= 0x1FFF;
16645 /* Generate the stub function. */
16648 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16649 current_stub_contents
=
16650 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16651 create_instruction_ldmia
16652 (rn
, /*wback=*/1, insn_low_registers
));
16654 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16655 current_stub_contents
=
16656 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16657 create_instruction_ldmia
16658 (rn
, /*wback=*/1, insn_high_registers
));
16661 /* B initial_insn_addr+4. */
16662 current_stub_contents
=
16663 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16664 create_instruction_branch_absolute
16665 (initial_insn_addr
- current_stub_contents
));
16668 else /* if (!wback). */
16672 /* If Rn is not part of the high-register-list, move it there. */
16673 if (!(insn_high_registers
& (1 << rn
)))
16675 /* Choose a Ri in the high-register-list that will be restored. */
16676 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16679 current_stub_contents
=
16680 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16681 create_instruction_mov (ri
, rn
));
16684 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16685 current_stub_contents
=
16686 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16687 create_instruction_ldmia
16688 (ri
, /*wback=*/1, insn_low_registers
));
16690 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16691 current_stub_contents
=
16692 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16693 create_instruction_ldmia
16694 (ri
, /*wback=*/0, insn_high_registers
));
16698 /* B initial_insn_addr+4. */
16699 current_stub_contents
=
16700 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16701 create_instruction_branch_absolute
16702 (initial_insn_addr
- current_stub_contents
));
16706 /* Fill the remaining of the stub with deterministic contents. */
16707 current_stub_contents
=
16708 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16709 base_stub_contents
, current_stub_contents
,
16710 base_stub_contents
+
16711 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16715 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
16717 const insn32 initial_insn
,
16718 const bfd_byte
*const initial_insn_addr
,
16719 bfd_byte
*const base_stub_contents
)
16721 int wback
= (initial_insn
& 0x00200000) >> 21;
16722 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
16723 int insn_all_registers
= initial_insn
& 0x0000ffff;
16724 int insn_low_registers
, insn_high_registers
;
16725 int usable_register_mask
;
16726 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
16727 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
16728 int nb_registers
= popcount (insn_all_registers
);
16729 bfd_byte
*current_stub_contents
= base_stub_contents
;
16731 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
16733 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16734 smaller than 8 registers load sequences that do not cause the
16736 if (nb_registers
<= 8)
16738 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16739 current_stub_contents
=
16740 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16743 /* B initial_insn_addr+4. */
16744 current_stub_contents
=
16745 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16746 create_instruction_branch_absolute
16747 (initial_insn_addr
- current_stub_contents
));
16749 /* Fill the remaining of the stub with deterministic contents. */
16750 current_stub_contents
=
16751 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16752 base_stub_contents
, current_stub_contents
,
16753 base_stub_contents
+
16754 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16759 /* - reg_list[13] == 0. */
16760 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
16762 /* - reg_list[14] & reg_list[15] != 1. */
16763 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
16765 /* - if (wback==1) reg_list[rn] == 0. */
16766 BFD_ASSERT (!wback
|| !restore_rn
);
16768 /* - nb_registers > 8. */
16769 BFD_ASSERT (popcount (insn_all_registers
) > 8);
16771 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16773 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16774 - One with the 7 lowest registers (register mask 0x007F)
16775 This LDM will finally contain between 2 and 7 registers
16776 - One with the 7 highest registers (register mask 0xDF80)
16777 This ldm will finally contain between 2 and 7 registers. */
16778 insn_low_registers
= insn_all_registers
& 0x007F;
16779 insn_high_registers
= insn_all_registers
& 0xDF80;
16781 /* A spare register may be needed during this veneer to temporarily
16782 handle the base register. This register will be restored with
16783 the last LDM operation.
16784 The usable register may be any general purpose register (that excludes
16785 PC, SP, LR : register mask is 0x1FFF). */
16786 usable_register_mask
= 0x1FFF;
16788 /* Generate the stub function. */
16789 if (!wback
&& !restore_pc
&& !restore_rn
)
16791 /* Choose a Ri in the low-register-list that will be restored. */
16792 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
16795 current_stub_contents
=
16796 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16797 create_instruction_mov (ri
, rn
));
16799 /* LDMDB Ri!, {R-high-register-list}. */
16800 current_stub_contents
=
16801 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16802 create_instruction_ldmdb
16803 (ri
, /*wback=*/1, insn_high_registers
));
16805 /* LDMDB Ri, {R-low-register-list}. */
16806 current_stub_contents
=
16807 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16808 create_instruction_ldmdb
16809 (ri
, /*wback=*/0, insn_low_registers
));
16811 /* B initial_insn_addr+4. */
16812 current_stub_contents
=
16813 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16814 create_instruction_branch_absolute
16815 (initial_insn_addr
- current_stub_contents
));
16817 else if (wback
&& !restore_pc
&& !restore_rn
)
16819 /* LDMDB Rn!, {R-high-register-list}. */
16820 current_stub_contents
=
16821 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16822 create_instruction_ldmdb
16823 (rn
, /*wback=*/1, insn_high_registers
));
16825 /* LDMDB Rn!, {R-low-register-list}. */
16826 current_stub_contents
=
16827 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16828 create_instruction_ldmdb
16829 (rn
, /*wback=*/1, insn_low_registers
));
16831 /* B initial_insn_addr+4. */
16832 current_stub_contents
=
16833 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16834 create_instruction_branch_absolute
16835 (initial_insn_addr
- current_stub_contents
));
16837 else if (!wback
&& restore_pc
&& !restore_rn
)
16839 /* Choose a Ri in the high-register-list that will be restored. */
16840 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16842 /* SUB Ri, Rn, #(4*nb_registers). */
16843 current_stub_contents
=
16844 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16845 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
16847 /* LDMIA Ri!, {R-low-register-list}. */
16848 current_stub_contents
=
16849 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16850 create_instruction_ldmia
16851 (ri
, /*wback=*/1, insn_low_registers
));
16853 /* LDMIA Ri, {R-high-register-list}. */
16854 current_stub_contents
=
16855 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16856 create_instruction_ldmia
16857 (ri
, /*wback=*/0, insn_high_registers
));
16859 else if (wback
&& restore_pc
&& !restore_rn
)
16861 /* Choose a Ri in the high-register-list that will be restored. */
16862 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16864 /* SUB Rn, Rn, #(4*nb_registers) */
16865 current_stub_contents
=
16866 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16867 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
16870 current_stub_contents
=
16871 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16872 create_instruction_mov (ri
, rn
));
16874 /* LDMIA Ri!, {R-low-register-list}. */
16875 current_stub_contents
=
16876 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16877 create_instruction_ldmia
16878 (ri
, /*wback=*/1, insn_low_registers
));
16880 /* LDMIA Ri, {R-high-register-list}. */
16881 current_stub_contents
=
16882 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16883 create_instruction_ldmia
16884 (ri
, /*wback=*/0, insn_high_registers
));
16886 else if (!wback
&& !restore_pc
&& restore_rn
)
16889 if (!(insn_low_registers
& (1 << rn
)))
16891 /* Choose a Ri in the low-register-list that will be restored. */
16892 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
16895 current_stub_contents
=
16896 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16897 create_instruction_mov (ri
, rn
));
16900 /* LDMDB Ri!, {R-high-register-list}. */
16901 current_stub_contents
=
16902 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16903 create_instruction_ldmdb
16904 (ri
, /*wback=*/1, insn_high_registers
));
16906 /* LDMDB Ri, {R-low-register-list}. */
16907 current_stub_contents
=
16908 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16909 create_instruction_ldmdb
16910 (ri
, /*wback=*/0, insn_low_registers
));
16912 /* B initial_insn_addr+4. */
16913 current_stub_contents
=
16914 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16915 create_instruction_branch_absolute
16916 (initial_insn_addr
- current_stub_contents
));
16918 else if (!wback
&& restore_pc
&& restore_rn
)
16921 if (!(insn_high_registers
& (1 << rn
)))
16923 /* Choose a Ri in the high-register-list that will be restored. */
16924 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16927 /* SUB Ri, Rn, #(4*nb_registers). */
16928 current_stub_contents
=
16929 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16930 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
16932 /* LDMIA Ri!, {R-low-register-list}. */
16933 current_stub_contents
=
16934 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16935 create_instruction_ldmia
16936 (ri
, /*wback=*/1, insn_low_registers
));
16938 /* LDMIA Ri, {R-high-register-list}. */
16939 current_stub_contents
=
16940 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16941 create_instruction_ldmia
16942 (ri
, /*wback=*/0, insn_high_registers
));
16944 else if (wback
&& restore_rn
)
16946 /* The assembler should not have accepted to encode this. */
16947 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
16948 "undefined behavior.\n");
16951 /* Fill the remaining of the stub with deterministic contents. */
16952 current_stub_contents
=
16953 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16954 base_stub_contents
, current_stub_contents
,
16955 base_stub_contents
+
16956 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16961 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
16963 const insn32 initial_insn
,
16964 const bfd_byte
*const initial_insn_addr
,
16965 bfd_byte
*const base_stub_contents
)
16967 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
16968 bfd_byte
*current_stub_contents
= base_stub_contents
;
16970 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
16972 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16973 smaller than 8 words load sequences that do not cause the
16975 if (num_words
<= 8)
16977 /* Untouched instruction. */
16978 current_stub_contents
=
16979 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16982 /* B initial_insn_addr+4. */
16983 current_stub_contents
=
16984 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16985 create_instruction_branch_absolute
16986 (initial_insn_addr
- current_stub_contents
));
16990 bfd_boolean is_dp
= /* DP encoding. */
16991 (initial_insn
& 0xfe100f00) == 0xec100b00;
16992 bfd_boolean is_ia_nobang
= /* (IA without !). */
16993 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
16994 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
16995 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
16996 bfd_boolean is_db_bang
= /* (DB with !). */
16997 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
16998 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
16999 /* d = UInt (Vd:D);. */
17000 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
17001 | (((unsigned int)initial_insn
<< 9) >> 31);
17003 /* Compute the number of 8-words chunks needed to split. */
17004 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
17007 /* The test coverage has been done assuming the following
17008 hypothesis that exactly one of the previous is_ predicates is
17010 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
17011 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
17013 /* We treat the cutting of the words in one pass for all
17014 cases, then we emit the adjustments:
17017 -> vldm rx!, {8_words_or_less} for each needed 8_word
17018 -> sub rx, rx, #size (list)
17021 -> vldm rx!, {8_words_or_less} for each needed 8_word
17022 This also handles vpop instruction (when rx is sp)
17025 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
17026 for (chunk
= 0; chunk
< chunks
; ++chunk
)
17028 bfd_vma new_insn
= 0;
17030 if (is_ia_nobang
|| is_ia_bang
)
17032 new_insn
= create_instruction_vldmia
17036 chunks
- (chunk
+ 1) ?
17037 8 : num_words
- chunk
* 8,
17038 first_reg
+ chunk
* 8);
17040 else if (is_db_bang
)
17042 new_insn
= create_instruction_vldmdb
17045 chunks
- (chunk
+ 1) ?
17046 8 : num_words
- chunk
* 8,
17047 first_reg
+ chunk
* 8);
17051 current_stub_contents
=
17052 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17056 /* Only this case requires the base register compensation
17060 current_stub_contents
=
17061 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17062 create_instruction_sub
17063 (base_reg
, base_reg
, 4*num_words
));
17066 /* B initial_insn_addr+4. */
17067 current_stub_contents
=
17068 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17069 create_instruction_branch_absolute
17070 (initial_insn_addr
- current_stub_contents
));
17073 /* Fill the remaining of the stub with deterministic contents. */
17074 current_stub_contents
=
17075 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17076 base_stub_contents
, current_stub_contents
,
17077 base_stub_contents
+
17078 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
17082 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
17084 const insn32 wrong_insn
,
17085 const bfd_byte
*const wrong_insn_addr
,
17086 bfd_byte
*const stub_contents
)
17088 if (is_thumb2_ldmia (wrong_insn
))
17089 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
17090 wrong_insn
, wrong_insn_addr
,
17092 else if (is_thumb2_ldmdb (wrong_insn
))
17093 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
17094 wrong_insn
, wrong_insn_addr
,
17096 else if (is_thumb2_vldm (wrong_insn
))
17097 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
17098 wrong_insn
, wrong_insn_addr
,
17102 /* End of stm32l4xx work-around. */
17106 elf32_arm_add_relocation (bfd
*output_bfd
, struct bfd_link_info
*info
,
17107 asection
*output_sec
, Elf_Internal_Rela
*rel
)
17109 BFD_ASSERT (output_sec
&& rel
);
17110 struct bfd_elf_section_reloc_data
*output_reldata
;
17111 struct elf32_arm_link_hash_table
*htab
;
17112 struct bfd_elf_section_data
*oesd
= elf_section_data (output_sec
);
17113 Elf_Internal_Shdr
*rel_hdr
;
17118 rel_hdr
= oesd
->rel
.hdr
;
17119 output_reldata
= &(oesd
->rel
);
17121 else if (oesd
->rela
.hdr
)
17123 rel_hdr
= oesd
->rela
.hdr
;
17124 output_reldata
= &(oesd
->rela
);
17131 bfd_byte
*erel
= rel_hdr
->contents
;
17132 erel
+= output_reldata
->count
* rel_hdr
->sh_entsize
;
17133 htab
= elf32_arm_hash_table (info
);
17134 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, erel
);
17135 output_reldata
->count
++;
17138 /* Do code byteswapping. Return FALSE afterwards so that the section is
17139 written out as normal. */
17142 elf32_arm_write_section (bfd
*output_bfd
,
17143 struct bfd_link_info
*link_info
,
17145 bfd_byte
*contents
)
17147 unsigned int mapcount
, errcount
;
17148 _arm_elf_section_data
*arm_data
;
17149 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
17150 elf32_arm_section_map
*map
;
17151 elf32_vfp11_erratum_list
*errnode
;
17152 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
17155 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
17159 if (globals
== NULL
)
17162 /* If this section has not been allocated an _arm_elf_section_data
17163 structure then we cannot record anything. */
17164 arm_data
= get_arm_elf_section_data (sec
);
17165 if (arm_data
== NULL
)
17168 mapcount
= arm_data
->mapcount
;
17169 map
= arm_data
->map
;
17170 errcount
= arm_data
->erratumcount
;
17174 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
17176 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
17177 errnode
= errnode
->next
)
17179 bfd_vma target
= errnode
->vma
- offset
;
17181 switch (errnode
->type
)
17183 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
17185 bfd_vma branch_to_veneer
;
17186 /* Original condition code of instruction, plus bit mask for
17187 ARM B instruction. */
17188 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
17191 /* The instruction is before the label. */
17194 /* Above offset included in -4 below. */
17195 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
17196 - errnode
->vma
- 4;
17198 if ((signed) branch_to_veneer
< -(1 << 25)
17199 || (signed) branch_to_veneer
>= (1 << 25))
17200 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
17201 "range"), output_bfd
);
17203 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
17204 contents
[endianflip
^ target
] = insn
& 0xff;
17205 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
17206 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
17207 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
17211 case VFP11_ERRATUM_ARM_VENEER
:
17213 bfd_vma branch_from_veneer
;
17216 /* Take size of veneer into account. */
17217 branch_from_veneer
= errnode
->u
.v
.branch
->vma
17218 - errnode
->vma
- 12;
17220 if ((signed) branch_from_veneer
< -(1 << 25)
17221 || (signed) branch_from_veneer
>= (1 << 25))
17222 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
17223 "range"), output_bfd
);
17225 /* Original instruction. */
17226 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
17227 contents
[endianflip
^ target
] = insn
& 0xff;
17228 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
17229 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
17230 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
17232 /* Branch back to insn after original insn. */
17233 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
17234 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
17235 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
17236 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
17237 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
17247 if (arm_data
->stm32l4xx_erratumcount
!= 0)
17249 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
17250 stm32l4xx_errnode
!= 0;
17251 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
17253 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
17255 switch (stm32l4xx_errnode
->type
)
17257 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
17260 bfd_vma branch_to_veneer
=
17261 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
17263 if ((signed) branch_to_veneer
< -(1 << 24)
17264 || (signed) branch_to_veneer
>= (1 << 24))
17266 bfd_vma out_of_range
=
17267 ((signed) branch_to_veneer
< -(1 << 24)) ?
17268 - branch_to_veneer
- (1 << 24) :
17269 ((signed) branch_to_veneer
>= (1 << 24)) ?
17270 branch_to_veneer
- (1 << 24) : 0;
17272 (*_bfd_error_handler
)
17273 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17274 "Jump out of range by %ld bytes. "
17275 "Cannot encode branch instruction. "),
17277 (long) (stm32l4xx_errnode
->vma
- 4),
17282 insn
= create_instruction_branch_absolute
17283 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
17285 /* The instruction is before the label. */
17288 put_thumb2_insn (globals
, output_bfd
,
17289 (bfd_vma
) insn
, contents
+ target
);
17293 case STM32L4XX_ERRATUM_VENEER
:
17296 bfd_byte
* veneer_r
;
17299 veneer
= contents
+ target
;
17301 + stm32l4xx_errnode
->u
.b
.veneer
->vma
17302 - stm32l4xx_errnode
->vma
- 4;
17304 if ((signed) (veneer_r
- veneer
-
17305 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
17306 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
17307 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
17308 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
17309 || (signed) (veneer_r
- veneer
) >= (1 << 24))
17311 (*_bfd_error_handler
) (_("%B: error: Cannot create STM32L4XX "
17312 "veneer."), output_bfd
);
17316 /* Original instruction. */
17317 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
17319 stm32l4xx_create_replacing_stub
17320 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
17330 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
17332 arm_unwind_table_edit
*edit_node
17333 = arm_data
->u
.exidx
.unwind_edit_list
;
17334 /* Now, sec->size is the size of the section we will write. The original
17335 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17336 markers) was sec->rawsize. (This isn't the case if we perform no
17337 edits, then rawsize will be zero and we should use size). */
17338 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
17339 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
17340 unsigned int in_index
, out_index
;
17341 bfd_vma add_to_offsets
= 0;
17343 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
17347 unsigned int edit_index
= edit_node
->index
;
17349 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
17351 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
17352 contents
+ in_index
* 8, add_to_offsets
);
17356 else if (in_index
== edit_index
17357 || (in_index
* 8 >= input_size
17358 && edit_index
== UINT_MAX
))
17360 switch (edit_node
->type
)
17362 case DELETE_EXIDX_ENTRY
:
17364 add_to_offsets
+= 8;
17367 case INSERT_EXIDX_CANTUNWIND_AT_END
:
17369 asection
*text_sec
= edit_node
->linked_section
;
17370 bfd_vma text_offset
= text_sec
->output_section
->vma
17371 + text_sec
->output_offset
17373 bfd_vma exidx_offset
= offset
+ out_index
* 8;
17374 unsigned long prel31_offset
;
17376 /* Note: this is meant to be equivalent to an
17377 R_ARM_PREL31 relocation. These synthetic
17378 EXIDX_CANTUNWIND markers are not relocated by the
17379 usual BFD method. */
17380 prel31_offset
= (text_offset
- exidx_offset
)
17382 if (bfd_link_relocatable (link_info
))
17384 /* Here relocation for new EXIDX_CANTUNWIND is
17385 created, so there is no need to
17386 adjust offset by hand. */
17387 prel31_offset
= text_sec
->output_offset
17390 /* New relocation entity. */
17391 asection
*text_out
= text_sec
->output_section
;
17392 Elf_Internal_Rela rel
;
17394 rel
.r_offset
= exidx_offset
;
17395 rel
.r_info
= ELF32_R_INFO (text_out
->target_index
,
17398 elf32_arm_add_relocation (output_bfd
, link_info
,
17399 sec
->output_section
,
17403 /* First address we can't unwind. */
17404 bfd_put_32 (output_bfd
, prel31_offset
,
17405 &edited_contents
[out_index
* 8]);
17407 /* Code for EXIDX_CANTUNWIND. */
17408 bfd_put_32 (output_bfd
, 0x1,
17409 &edited_contents
[out_index
* 8 + 4]);
17412 add_to_offsets
-= 8;
17417 edit_node
= edit_node
->next
;
17422 /* No more edits, copy remaining entries verbatim. */
17423 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
17424 contents
+ in_index
* 8, add_to_offsets
);
17430 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
17431 bfd_set_section_contents (output_bfd
, sec
->output_section
,
17433 (file_ptr
) sec
->output_offset
, sec
->size
);
17438 /* Fix code to point to Cortex-A8 erratum stubs. */
17439 if (globals
->fix_cortex_a8
)
17441 struct a8_branch_to_stub_data data
;
17443 data
.writing_section
= sec
;
17444 data
.contents
= contents
;
17446 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
17453 if (globals
->byteswap_code
)
17455 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
17458 for (i
= 0; i
< mapcount
; i
++)
17460 if (i
== mapcount
- 1)
17463 end
= map
[i
+ 1].vma
;
17465 switch (map
[i
].type
)
17468 /* Byte swap code words. */
17469 while (ptr
+ 3 < end
)
17471 tmp
= contents
[ptr
];
17472 contents
[ptr
] = contents
[ptr
+ 3];
17473 contents
[ptr
+ 3] = tmp
;
17474 tmp
= contents
[ptr
+ 1];
17475 contents
[ptr
+ 1] = contents
[ptr
+ 2];
17476 contents
[ptr
+ 2] = tmp
;
17482 /* Byte swap code halfwords. */
17483 while (ptr
+ 1 < end
)
17485 tmp
= contents
[ptr
];
17486 contents
[ptr
] = contents
[ptr
+ 1];
17487 contents
[ptr
+ 1] = tmp
;
17493 /* Leave data alone. */
17501 arm_data
->mapcount
= -1;
17502 arm_data
->mapsize
= 0;
17503 arm_data
->map
= NULL
;
17508 /* Mangle thumb function symbols as we read them in. */
17511 elf32_arm_swap_symbol_in (bfd
* abfd
,
17514 Elf_Internal_Sym
*dst
)
17516 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
17519 /* New EABI objects mark thumb function symbols by setting the low bit of
17521 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
17522 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
17524 if (dst
->st_value
& 1)
17526 dst
->st_value
&= ~(bfd_vma
) 1;
17527 dst
->st_target_internal
= ST_BRANCH_TO_THUMB
;
17530 dst
->st_target_internal
= ST_BRANCH_TO_ARM
;
17532 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
17534 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
17535 dst
->st_target_internal
= ST_BRANCH_TO_THUMB
;
17537 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
17538 dst
->st_target_internal
= ST_BRANCH_LONG
;
17540 dst
->st_target_internal
= ST_BRANCH_UNKNOWN
;
17546 /* Mangle thumb function symbols as we write them out. */
17549 elf32_arm_swap_symbol_out (bfd
*abfd
,
17550 const Elf_Internal_Sym
*src
,
17554 Elf_Internal_Sym newsym
;
17556 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17557 of the address set, as per the new EABI. We do this unconditionally
17558 because objcopy does not set the elf header flags until after
17559 it writes out the symbol table. */
17560 if (src
->st_target_internal
== ST_BRANCH_TO_THUMB
)
17563 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
17564 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
17565 if (newsym
.st_shndx
!= SHN_UNDEF
)
17567 /* Do this only for defined symbols. At link type, the static
17568 linker will simulate the work of dynamic linker of resolving
17569 symbols and will carry over the thumbness of found symbols to
17570 the output symbol table. It's not clear how it happens, but
17571 the thumbness of undefined symbols can well be different at
17572 runtime, and writing '1' for them will be confusing for users
17573 and possibly for dynamic linker itself.
17575 newsym
.st_value
|= 1;
17580 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
17583 /* Add the PT_ARM_EXIDX program header. */
17586 elf32_arm_modify_segment_map (bfd
*abfd
,
17587 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
17589 struct elf_segment_map
*m
;
17592 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
17593 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
17595 /* If there is already a PT_ARM_EXIDX header, then we do not
17596 want to add another one. This situation arises when running
17597 "strip"; the input binary already has the header. */
17598 m
= elf_seg_map (abfd
);
17599 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
17603 m
= (struct elf_segment_map
*)
17604 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
17607 m
->p_type
= PT_ARM_EXIDX
;
17609 m
->sections
[0] = sec
;
17611 m
->next
= elf_seg_map (abfd
);
17612 elf_seg_map (abfd
) = m
;
17619 /* We may add a PT_ARM_EXIDX program header. */
17622 elf32_arm_additional_program_headers (bfd
*abfd
,
17623 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
17627 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
17628 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
17634 /* Hook called by the linker routine which adds symbols from an object
17638 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
17639 Elf_Internal_Sym
*sym
, const char **namep
,
17640 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
17642 if ((ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
17643 || ELF_ST_BIND (sym
->st_info
) == STB_GNU_UNIQUE
)
17644 && (abfd
->flags
& DYNAMIC
) == 0
17645 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
17646 elf_tdata (info
->output_bfd
)->has_gnu_symbols
= elf_gnu_symbol_any
;
17648 if (elf32_arm_hash_table (info
) == NULL
)
17651 if (elf32_arm_hash_table (info
)->vxworks_p
17652 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
17653 flagsp
, secp
, valp
))
17659 /* We use this to override swap_symbol_in and swap_symbol_out. */
17660 const struct elf_size_info elf32_arm_size_info
=
17662 sizeof (Elf32_External_Ehdr
),
17663 sizeof (Elf32_External_Phdr
),
17664 sizeof (Elf32_External_Shdr
),
17665 sizeof (Elf32_External_Rel
),
17666 sizeof (Elf32_External_Rela
),
17667 sizeof (Elf32_External_Sym
),
17668 sizeof (Elf32_External_Dyn
),
17669 sizeof (Elf_External_Note
),
17673 ELFCLASS32
, EV_CURRENT
,
17674 bfd_elf32_write_out_phdrs
,
17675 bfd_elf32_write_shdrs_and_ehdr
,
17676 bfd_elf32_checksum_contents
,
17677 bfd_elf32_write_relocs
,
17678 elf32_arm_swap_symbol_in
,
17679 elf32_arm_swap_symbol_out
,
17680 bfd_elf32_slurp_reloc_table
,
17681 bfd_elf32_slurp_symbol_table
,
17682 bfd_elf32_swap_dyn_in
,
17683 bfd_elf32_swap_dyn_out
,
17684 bfd_elf32_swap_reloc_in
,
17685 bfd_elf32_swap_reloc_out
,
17686 bfd_elf32_swap_reloca_in
,
17687 bfd_elf32_swap_reloca_out
17691 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
17693 /* V7 BE8 code is always little endian. */
17694 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
17695 return bfd_getl32 (addr
);
17697 return bfd_get_32 (abfd
, addr
);
17701 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
17703 /* V7 BE8 code is always little endian. */
17704 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
17705 return bfd_getl16 (addr
);
17707 return bfd_get_16 (abfd
, addr
);
17710 /* Return size of plt0 entry starting at ADDR
17711 or (bfd_vma) -1 if size can not be determined. */
17714 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
17716 bfd_vma first_word
;
17719 first_word
= read_code32 (abfd
, addr
);
17721 if (first_word
== elf32_arm_plt0_entry
[0])
17722 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
17723 else if (first_word
== elf32_thumb2_plt0_entry
[0])
17724 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
17726 /* We don't yet handle this PLT format. */
17727 return (bfd_vma
) -1;
17732 /* Return size of plt entry starting at offset OFFSET
17733 of plt section located at address START
17734 or (bfd_vma) -1 if size can not be determined. */
17737 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
17739 bfd_vma first_insn
;
17740 bfd_vma plt_size
= 0;
17741 const bfd_byte
*addr
= start
+ offset
;
17743 /* PLT entry size if fixed on Thumb-only platforms. */
17744 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
17745 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
17747 /* Respect Thumb stub if necessary. */
17748 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
17750 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
17753 /* Strip immediate from first add. */
17754 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
17756 #ifdef FOUR_WORD_PLT
17757 if (first_insn
== elf32_arm_plt_entry
[0])
17758 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
17760 if (first_insn
== elf32_arm_plt_entry_long
[0])
17761 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
17762 else if (first_insn
== elf32_arm_plt_entry_short
[0])
17763 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
17766 /* We don't yet handle this PLT format. */
17767 return (bfd_vma
) -1;
17772 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17775 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
17776 long symcount ATTRIBUTE_UNUSED
,
17777 asymbol
**syms ATTRIBUTE_UNUSED
,
17787 Elf_Internal_Shdr
*hdr
;
17795 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
17798 if (dynsymcount
<= 0)
17801 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
17802 if (relplt
== NULL
)
17805 hdr
= &elf_section_data (relplt
)->this_hdr
;
17806 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
17807 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
17810 plt
= bfd_get_section_by_name (abfd
, ".plt");
17814 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
17817 data
= plt
->contents
;
17820 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
17822 bfd_cache_section_contents((asection
*) plt
, data
);
17825 count
= relplt
->size
/ hdr
->sh_entsize
;
17826 size
= count
* sizeof (asymbol
);
17827 p
= relplt
->relocation
;
17828 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
17830 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
17831 if (p
->addend
!= 0)
17832 size
+= sizeof ("+0x") - 1 + 8;
17835 s
= *ret
= (asymbol
*) bfd_malloc (size
);
17839 offset
= elf32_arm_plt0_size (abfd
, data
);
17840 if (offset
== (bfd_vma
) -1)
17843 names
= (char *) (s
+ count
);
17844 p
= relplt
->relocation
;
17846 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
17850 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
17851 if (plt_size
== (bfd_vma
) -1)
17854 *s
= **p
->sym_ptr_ptr
;
17855 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17856 we are defining a symbol, ensure one of them is set. */
17857 if ((s
->flags
& BSF_LOCAL
) == 0)
17858 s
->flags
|= BSF_GLOBAL
;
17859 s
->flags
|= BSF_SYNTHETIC
;
17864 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
17865 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
17867 if (p
->addend
!= 0)
17871 memcpy (names
, "+0x", sizeof ("+0x") - 1);
17872 names
+= sizeof ("+0x") - 1;
17873 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
17874 for (a
= buf
; *a
== '0'; ++a
)
17877 memcpy (names
, a
, len
);
17880 memcpy (names
, "@plt", sizeof ("@plt"));
17881 names
+= sizeof ("@plt");
17883 offset
+= plt_size
;
17890 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
17892 if (hdr
->sh_flags
& SHF_ARM_NOREAD
)
17893 *flags
|= SEC_ELF_NOREAD
;
17898 elf32_arm_lookup_section_flags (char *flag_name
)
17900 if (!strcmp (flag_name
, "SHF_ARM_NOREAD"))
17901 return SHF_ARM_NOREAD
;
17903 return SEC_NO_FLAGS
;
17906 static unsigned int
17907 elf32_arm_count_additional_relocs (asection
*sec
)
17909 struct _arm_elf_section_data
*arm_data
;
17910 arm_data
= get_arm_elf_section_data (sec
);
17911 return arm_data
->additional_reloc_count
;
17914 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
17915 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
17916 FALSE otherwise. ISECTION is the best guess matching section from the
17917 input bfd IBFD, but it might be NULL. */
17920 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
17921 bfd
*obfd ATTRIBUTE_UNUSED
,
17922 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
17923 Elf_Internal_Shdr
*osection
)
17925 switch (osection
->sh_type
)
17927 case SHT_ARM_EXIDX
:
17929 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
17930 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
17933 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
17934 osection
->sh_info
= 0;
17936 /* The sh_link field must be set to the text section associated with
17937 this index section. Unfortunately the ARM EHABI does not specify
17938 exactly how to determine this association. Our caller does try
17939 to match up OSECTION with its corresponding input section however
17940 so that is a good first guess. */
17941 if (isection
!= NULL
17942 && osection
->bfd_section
!= NULL
17943 && isection
->bfd_section
!= NULL
17944 && isection
->bfd_section
->output_section
!= NULL
17945 && isection
->bfd_section
->output_section
== osection
->bfd_section
17946 && iheaders
!= NULL
17947 && isection
->sh_link
> 0
17948 && isection
->sh_link
< elf_numsections (ibfd
)
17949 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
17950 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
17953 for (i
= elf_numsections (obfd
); i
-- > 0;)
17954 if (oheaders
[i
]->bfd_section
17955 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
17961 /* Failing that we have to find a matching section ourselves. If
17962 we had the output section name available we could compare that
17963 with input section names. Unfortunately we don't. So instead
17964 we use a simple heuristic and look for the nearest executable
17965 section before this one. */
17966 for (i
= elf_numsections (obfd
); i
-- > 0;)
17967 if (oheaders
[i
] == osection
)
17973 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
17974 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
17975 == (SHF_ALLOC
| SHF_EXECINSTR
))
17981 osection
->sh_link
= i
;
17982 /* If the text section was part of a group
17983 then the index section should be too. */
17984 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
17985 osection
->sh_flags
|= SHF_GROUP
;
17991 case SHT_ARM_PREEMPTMAP
:
17992 osection
->sh_flags
= SHF_ALLOC
;
17995 case SHT_ARM_ATTRIBUTES
:
17996 case SHT_ARM_DEBUGOVERLAY
:
17997 case SHT_ARM_OVERLAYSECTION
:
18005 #undef elf_backend_copy_special_section_fields
18006 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
18008 #define ELF_ARCH bfd_arch_arm
18009 #define ELF_TARGET_ID ARM_ELF_DATA
18010 #define ELF_MACHINE_CODE EM_ARM
18011 #ifdef __QNXTARGET__
18012 #define ELF_MAXPAGESIZE 0x1000
18014 #define ELF_MAXPAGESIZE 0x10000
18016 #define ELF_MINPAGESIZE 0x1000
18017 #define ELF_COMMONPAGESIZE 0x1000
18019 #define bfd_elf32_mkobject elf32_arm_mkobject
18021 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
18022 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
18023 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
18024 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
18025 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
18026 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
18027 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
18028 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
18029 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
18030 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
18031 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
18032 #define bfd_elf32_bfd_final_link elf32_arm_final_link
18033 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
18035 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
18036 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
18037 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
18038 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
18039 #define elf_backend_check_relocs elf32_arm_check_relocs
18040 #define elf_backend_relocate_section elf32_arm_relocate_section
18041 #define elf_backend_write_section elf32_arm_write_section
18042 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
18043 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
18044 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
18045 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
18046 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
18047 #define elf_backend_always_size_sections elf32_arm_always_size_sections
18048 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
18049 #define elf_backend_post_process_headers elf32_arm_post_process_headers
18050 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
18051 #define elf_backend_object_p elf32_arm_object_p
18052 #define elf_backend_fake_sections elf32_arm_fake_sections
18053 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
18054 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18055 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
18056 #define elf_backend_size_info elf32_arm_size_info
18057 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18058 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
18059 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
18060 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
18061 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
18062 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
18064 #define elf_backend_can_refcount 1
18065 #define elf_backend_can_gc_sections 1
18066 #define elf_backend_plt_readonly 1
18067 #define elf_backend_want_got_plt 1
18068 #define elf_backend_want_plt_sym 0
18069 #define elf_backend_may_use_rel_p 1
18070 #define elf_backend_may_use_rela_p 0
18071 #define elf_backend_default_use_rela_p 0
18073 #define elf_backend_got_header_size 12
18074 #define elf_backend_extern_protected_data 1
18076 #undef elf_backend_obj_attrs_vendor
18077 #define elf_backend_obj_attrs_vendor "aeabi"
18078 #undef elf_backend_obj_attrs_section
18079 #define elf_backend_obj_attrs_section ".ARM.attributes"
18080 #undef elf_backend_obj_attrs_arg_type
18081 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
18082 #undef elf_backend_obj_attrs_section_type
18083 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
18084 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
18085 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
18087 #undef elf_backend_section_flags
18088 #define elf_backend_section_flags elf32_arm_section_flags
18089 #undef elf_backend_lookup_section_flags_hook
18090 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
18092 #include "elf32-target.h"
18094 /* Native Client targets. */
18096 #undef TARGET_LITTLE_SYM
18097 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
18098 #undef TARGET_LITTLE_NAME
18099 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
18100 #undef TARGET_BIG_SYM
18101 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
18102 #undef TARGET_BIG_NAME
18103 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
18105 /* Like elf32_arm_link_hash_table_create -- but overrides
18106 appropriately for NaCl. */
18108 static struct bfd_link_hash_table
*
18109 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
18111 struct bfd_link_hash_table
*ret
;
18113 ret
= elf32_arm_link_hash_table_create (abfd
);
18116 struct elf32_arm_link_hash_table
*htab
18117 = (struct elf32_arm_link_hash_table
*) ret
;
18121 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
18122 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
18127 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
18128 really need to use elf32_arm_modify_segment_map. But we do it
18129 anyway just to reduce gratuitous differences with the stock ARM backend. */
18132 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
18134 return (elf32_arm_modify_segment_map (abfd
, info
)
18135 && nacl_modify_segment_map (abfd
, info
));
18139 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
18141 elf32_arm_final_write_processing (abfd
, linker
);
18142 nacl_final_write_processing (abfd
, linker
);
18146 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
18147 const arelent
*rel ATTRIBUTE_UNUSED
)
18150 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
18151 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
18155 #define elf32_bed elf32_arm_nacl_bed
18156 #undef bfd_elf32_bfd_link_hash_table_create
18157 #define bfd_elf32_bfd_link_hash_table_create \
18158 elf32_arm_nacl_link_hash_table_create
18159 #undef elf_backend_plt_alignment
18160 #define elf_backend_plt_alignment 4
18161 #undef elf_backend_modify_segment_map
18162 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18163 #undef elf_backend_modify_program_headers
18164 #define elf_backend_modify_program_headers nacl_modify_program_headers
18165 #undef elf_backend_final_write_processing
18166 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18167 #undef bfd_elf32_get_synthetic_symtab
18168 #undef elf_backend_plt_sym_val
18169 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18170 #undef elf_backend_copy_special_section_fields
18172 #undef ELF_MINPAGESIZE
18173 #undef ELF_COMMONPAGESIZE
18176 #include "elf32-target.h"
18178 /* Reset to defaults. */
18179 #undef elf_backend_plt_alignment
18180 #undef elf_backend_modify_segment_map
18181 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18182 #undef elf_backend_modify_program_headers
18183 #undef elf_backend_final_write_processing
18184 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18185 #undef ELF_MINPAGESIZE
18186 #define ELF_MINPAGESIZE 0x1000
18187 #undef ELF_COMMONPAGESIZE
18188 #define ELF_COMMONPAGESIZE 0x1000
18191 /* VxWorks Targets. */
18193 #undef TARGET_LITTLE_SYM
18194 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18195 #undef TARGET_LITTLE_NAME
18196 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18197 #undef TARGET_BIG_SYM
18198 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18199 #undef TARGET_BIG_NAME
18200 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18202 /* Like elf32_arm_link_hash_table_create -- but overrides
18203 appropriately for VxWorks. */
18205 static struct bfd_link_hash_table
*
18206 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
18208 struct bfd_link_hash_table
*ret
;
18210 ret
= elf32_arm_link_hash_table_create (abfd
);
18213 struct elf32_arm_link_hash_table
*htab
18214 = (struct elf32_arm_link_hash_table
*) ret
;
18216 htab
->vxworks_p
= 1;
18222 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
18224 elf32_arm_final_write_processing (abfd
, linker
);
18225 elf_vxworks_final_write_processing (abfd
, linker
);
18229 #define elf32_bed elf32_arm_vxworks_bed
18231 #undef bfd_elf32_bfd_link_hash_table_create
18232 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18233 #undef elf_backend_final_write_processing
18234 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18235 #undef elf_backend_emit_relocs
18236 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18238 #undef elf_backend_may_use_rel_p
18239 #define elf_backend_may_use_rel_p 0
18240 #undef elf_backend_may_use_rela_p
18241 #define elf_backend_may_use_rela_p 1
18242 #undef elf_backend_default_use_rela_p
18243 #define elf_backend_default_use_rela_p 1
18244 #undef elf_backend_want_plt_sym
18245 #define elf_backend_want_plt_sym 1
18246 #undef ELF_MAXPAGESIZE
18247 #define ELF_MAXPAGESIZE 0x1000
18249 #include "elf32-target.h"
18252 /* Merge backend specific data from an object file to the output
18253 object file when linking. */
18256 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
)
18258 flagword out_flags
;
18260 bfd_boolean flags_compatible
= TRUE
;
18263 /* Check if we have the same endianness. */
18264 if (! _bfd_generic_verify_endian_match (ibfd
, obfd
))
18267 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
18270 if (!elf32_arm_merge_eabi_attributes (ibfd
, obfd
))
18273 /* The input BFD must have had its flags initialised. */
18274 /* The following seems bogus to me -- The flags are initialized in
18275 the assembler but I don't think an elf_flags_init field is
18276 written into the object. */
18277 /* BFD_ASSERT (elf_flags_init (ibfd)); */
18279 in_flags
= elf_elfheader (ibfd
)->e_flags
;
18280 out_flags
= elf_elfheader (obfd
)->e_flags
;
18282 /* In theory there is no reason why we couldn't handle this. However
18283 in practice it isn't even close to working and there is no real
18284 reason to want it. */
18285 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
18286 && !(ibfd
->flags
& DYNAMIC
)
18287 && (in_flags
& EF_ARM_BE8
))
18289 _bfd_error_handler (_("error: %B is already in final BE8 format"),
18294 if (!elf_flags_init (obfd
))
18296 /* If the input is the default architecture and had the default
18297 flags then do not bother setting the flags for the output
18298 architecture, instead allow future merges to do this. If no
18299 future merges ever set these flags then they will retain their
18300 uninitialised values, which surprise surprise, correspond
18301 to the default values. */
18302 if (bfd_get_arch_info (ibfd
)->the_default
18303 && elf_elfheader (ibfd
)->e_flags
== 0)
18306 elf_flags_init (obfd
) = TRUE
;
18307 elf_elfheader (obfd
)->e_flags
= in_flags
;
18309 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
18310 && bfd_get_arch_info (obfd
)->the_default
)
18311 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
18316 /* Determine what should happen if the input ARM architecture
18317 does not match the output ARM architecture. */
18318 if (! bfd_arm_merge_machines (ibfd
, obfd
))
18321 /* Identical flags must be compatible. */
18322 if (in_flags
== out_flags
)
18325 /* Check to see if the input BFD actually contains any sections. If
18326 not, its flags may not have been initialised either, but it
18327 cannot actually cause any incompatiblity. Do not short-circuit
18328 dynamic objects; their section list may be emptied by
18329 elf_link_add_object_symbols.
18331 Also check to see if there are no code sections in the input.
18332 In this case there is no need to check for code specific flags.
18333 XXX - do we need to worry about floating-point format compatability
18334 in data sections ? */
18335 if (!(ibfd
->flags
& DYNAMIC
))
18337 bfd_boolean null_input_bfd
= TRUE
;
18338 bfd_boolean only_data_sections
= TRUE
;
18340 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
18342 /* Ignore synthetic glue sections. */
18343 if (strcmp (sec
->name
, ".glue_7")
18344 && strcmp (sec
->name
, ".glue_7t"))
18346 if ((bfd_get_section_flags (ibfd
, sec
)
18347 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
18348 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
18349 only_data_sections
= FALSE
;
18351 null_input_bfd
= FALSE
;
18356 if (null_input_bfd
|| only_data_sections
)
18360 /* Complain about various flag mismatches. */
18361 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
18362 EF_ARM_EABI_VERSION (out_flags
)))
18365 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18367 (in_flags
& EF_ARM_EABIMASK
) >> 24,
18368 (out_flags
& EF_ARM_EABIMASK
) >> 24);
18372 /* Not sure what needs to be checked for EABI versions >= 1. */
18373 /* VxWorks libraries do not use these flags. */
18374 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
18375 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
18376 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
18378 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
18381 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18383 in_flags
& EF_ARM_APCS_26
? 26 : 32,
18384 out_flags
& EF_ARM_APCS_26
? 26 : 32);
18385 flags_compatible
= FALSE
;
18388 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
18390 if (in_flags
& EF_ARM_APCS_FLOAT
)
18392 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18396 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18399 flags_compatible
= FALSE
;
18402 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
18404 if (in_flags
& EF_ARM_VFP_FLOAT
)
18406 (_("error: %B uses VFP instructions, whereas %B does not"),
18410 (_("error: %B uses FPA instructions, whereas %B does not"),
18413 flags_compatible
= FALSE
;
18416 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
18418 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
18420 (_("error: %B uses Maverick instructions, whereas %B does not"),
18424 (_("error: %B does not use Maverick instructions, whereas %B does"),
18427 flags_compatible
= FALSE
;
18430 #ifdef EF_ARM_SOFT_FLOAT
18431 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
18433 /* We can allow interworking between code that is VFP format
18434 layout, and uses either soft float or integer regs for
18435 passing floating point arguments and results. We already
18436 know that the APCS_FLOAT flags match; similarly for VFP
18438 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
18439 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
18441 if (in_flags
& EF_ARM_SOFT_FLOAT
)
18443 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18447 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18450 flags_compatible
= FALSE
;
18455 /* Interworking mismatch is only a warning. */
18456 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
18458 if (in_flags
& EF_ARM_INTERWORK
)
18461 (_("Warning: %B supports interworking, whereas %B does not"),
18467 (_("Warning: %B does not support interworking, whereas %B does"),
18473 return flags_compatible
;
18477 /* Symbian OS Targets. */
18479 #undef TARGET_LITTLE_SYM
18480 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18481 #undef TARGET_LITTLE_NAME
18482 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18483 #undef TARGET_BIG_SYM
18484 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18485 #undef TARGET_BIG_NAME
18486 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18488 /* Like elf32_arm_link_hash_table_create -- but overrides
18489 appropriately for Symbian OS. */
18491 static struct bfd_link_hash_table
*
18492 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
18494 struct bfd_link_hash_table
*ret
;
18496 ret
= elf32_arm_link_hash_table_create (abfd
);
18499 struct elf32_arm_link_hash_table
*htab
18500 = (struct elf32_arm_link_hash_table
*)ret
;
18501 /* There is no PLT header for Symbian OS. */
18502 htab
->plt_header_size
= 0;
18503 /* The PLT entries are each one instruction and one word. */
18504 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
18505 htab
->symbian_p
= 1;
18506 /* Symbian uses armv5t or above, so use_blx is always true. */
18508 htab
->root
.is_relocatable_executable
= 1;
18513 static const struct bfd_elf_special_section
18514 elf32_arm_symbian_special_sections
[] =
18516 /* In a BPABI executable, the dynamic linking sections do not go in
18517 the loadable read-only segment. The post-linker may wish to
18518 refer to these sections, but they are not part of the final
18520 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
18521 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
18522 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
18523 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
18524 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
18525 /* These sections do not need to be writable as the SymbianOS
18526 postlinker will arrange things so that no dynamic relocation is
18528 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
18529 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
18530 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
18531 { NULL
, 0, 0, 0, 0 }
18535 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
18536 struct bfd_link_info
*link_info
)
18538 /* BPABI objects are never loaded directly by an OS kernel; they are
18539 processed by a postlinker first, into an OS-specific format. If
18540 the D_PAGED bit is set on the file, BFD will align segments on
18541 page boundaries, so that an OS can directly map the file. With
18542 BPABI objects, that just results in wasted space. In addition,
18543 because we clear the D_PAGED bit, map_sections_to_segments will
18544 recognize that the program headers should not be mapped into any
18545 loadable segment. */
18546 abfd
->flags
&= ~D_PAGED
;
18547 elf32_arm_begin_write_processing (abfd
, link_info
);
18551 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
18552 struct bfd_link_info
*info
)
18554 struct elf_segment_map
*m
;
18557 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18558 segment. However, because the .dynamic section is not marked
18559 with SEC_LOAD, the generic ELF code will not create such a
18561 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
18564 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
18565 if (m
->p_type
== PT_DYNAMIC
)
18570 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
18571 m
->next
= elf_seg_map (abfd
);
18572 elf_seg_map (abfd
) = m
;
18576 /* Also call the generic arm routine. */
18577 return elf32_arm_modify_segment_map (abfd
, info
);
18580 /* Return address for Ith PLT stub in section PLT, for relocation REL
18581 or (bfd_vma) -1 if it should not be included. */
18584 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
18585 const arelent
*rel ATTRIBUTE_UNUSED
)
18587 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
18591 #define elf32_bed elf32_arm_symbian_bed
18593 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18594 will process them and then discard them. */
18595 #undef ELF_DYNAMIC_SEC_FLAGS
18596 #define ELF_DYNAMIC_SEC_FLAGS \
18597 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18599 #undef elf_backend_emit_relocs
18601 #undef bfd_elf32_bfd_link_hash_table_create
18602 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18603 #undef elf_backend_special_sections
18604 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18605 #undef elf_backend_begin_write_processing
18606 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18607 #undef elf_backend_final_write_processing
18608 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18610 #undef elf_backend_modify_segment_map
18611 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18613 /* There is no .got section for BPABI objects, and hence no header. */
18614 #undef elf_backend_got_header_size
18615 #define elf_backend_got_header_size 0
18617 /* Similarly, there is no .got.plt section. */
18618 #undef elf_backend_want_got_plt
18619 #define elf_backend_want_got_plt 0
18621 #undef elf_backend_plt_sym_val
18622 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18624 #undef elf_backend_may_use_rel_p
18625 #define elf_backend_may_use_rel_p 1
18626 #undef elf_backend_may_use_rela_p
18627 #define elf_backend_may_use_rela_p 0
18628 #undef elf_backend_default_use_rela_p
18629 #define elf_backend_default_use_rela_p 0
18630 #undef elf_backend_want_plt_sym
18631 #define elf_backend_want_plt_sym 0
18632 #undef ELF_MAXPAGESIZE
18633 #define ELF_MAXPAGESIZE 0x8000
18635 #include "elf32-target.h"