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elf32-arm.c build breakage
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 /* The name of the dynamic interpreter. This is put in the .interp
2142 section. */
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2144
2145 static const unsigned long tls_trampoline [] =
2146 {
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2150 };
2151
2152 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2153 {
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2163 };
2164
2165 #ifdef FOUR_WORD_PLT
2166
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2170 linker first. */
2171 static const bfd_vma elf32_arm_plt0_entry [] =
2172 {
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2177 };
2178
2179 /* Subsequent entries in a procedure linkage table look like
2180 this. */
2181 static const bfd_vma elf32_arm_plt_entry [] =
2182 {
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2187 };
2188
2189 #else /* not FOUR_WORD_PLT */
2190
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2194 linker first. */
2195 static const bfd_vma elf32_arm_plt0_entry [] =
2196 {
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2202 };
2203
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short [] =
2207 {
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2211 };
2212
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long [] =
2216 {
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2221 };
2222
2223 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2224
2225 #endif /* not FOUR_WORD_PLT */
2226
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry [] =
2231 {
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2236 /* add lr, pc */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2239 };
2240
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2242 look like this. */
2243 static const bfd_vma elf32_thumb2_plt_entry [] =
2244 {
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2251 /* nop */
2252 };
2253
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2257 {
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2262 };
2263
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2266 {
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2273 };
2274
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2277 {
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2284 };
2285
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2289 {
2290 0x4778, /* bx pc */
2291 0x46c0 /* nop */
2292 };
2293
2294 /* The entries in a PLT when using a DLL-based target with multiple
2295 address spaces. */
2296 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2297 {
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2300 };
2301
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2305 linker first. */
2306 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2307 {
2308 /* First bundle: */
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2318 /* Third bundle: */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2322 /* .Lplt_tail: */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2329 };
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2331
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2334 {
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2339 };
2340
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2349
2350 enum stub_insn_type
2351 {
2352 THUMB16_TYPE = 1,
2353 THUMB32_TYPE,
2354 ARM_TYPE,
2355 DATA_TYPE
2356 };
2357
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2367
2368 typedef struct
2369 {
2370 bfd_vma data;
2371 enum stub_insn_type type;
2372 unsigned int r_type;
2373 int reloc_addend;
2374 } insn_sequence;
2375
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2379 {
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2382 };
2383
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2385 available. */
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2387 {
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2391 };
2392
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2395 {
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2403 };
2404
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2406 allowed. */
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2408 {
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2414 };
2415
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2417 available. */
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2419 {
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2424 };
2425
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2429 {
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2433 };
2434
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2438 {
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2442 };
2443
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2447 ARMv7). */
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2449 {
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2454 };
2455
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2458 {
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2463 };
2464
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2467 {
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2473 };
2474
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2476 architectures. */
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2478 {
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2486 };
2487
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2489 allowed. */
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2491 {
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2498 };
2499
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2503 {
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2507 };
2508
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2512 {
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2522 {
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2531 };
2532
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2535 {
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2544 };
2545
2546
2547 /* Cortex-A8 erratum-workaround stubs. */
2548
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2551
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2553 {
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2557 };
2558
2559 /* Stub used for b.w and bl.w instructions. */
2560
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2562 {
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2564 };
2565
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2567 {
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2569 };
2570
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2574
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2576 {
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2578 };
2579
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2583 applied.
2584
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2588
2589 const char * stubborn_problems[] = { "np" };
2590
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2592 section called:
2593
2594 .data.rel.local.stubborn_problems
2595
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2597
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2600 continue;
2601
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2604 C identifier. */
2605 #define STUB_SUFFIX ".__stub"
2606
2607 /* One entry per long/short branch stub defined above. */
2608 #define DEF_STUBS \
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2629
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2632 {
2633 arm_stub_none,
2634 DEF_STUBS
2635 max_stub_type
2636 };
2637 #undef DEF_STUB
2638
2639 /* Note the first a8_veneer type. */
2640 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2641
2642 typedef struct
2643 {
2644 const insn_sequence* template_sequence;
2645 int template_size;
2646 } stub_def;
2647
2648 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2649 static const stub_def stub_definitions[] =
2650 {
2651 {NULL, 0},
2652 DEF_STUBS
2653 };
2654
2655 struct elf32_arm_stub_hash_entry
2656 {
2657 /* Base hash table entry structure. */
2658 struct bfd_hash_entry root;
2659
2660 /* The stub section. */
2661 asection *stub_sec;
2662
2663 /* Offset within stub_sec of the beginning of this stub. */
2664 bfd_vma stub_offset;
2665
2666 /* Given the symbol's value and its section we can determine its final
2667 value when building the stubs (so the stub knows where to jump). */
2668 bfd_vma target_value;
2669 asection *target_section;
2670
2671 /* Same as above but for the source of the branch to the stub. Used for
2672 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2673 such, source section does not need to be recorded since Cortex-A8 erratum
2674 workaround stubs are only generated when both source and target are in the
2675 same section. */
2676 bfd_vma source_value;
2677
2678 /* The instruction which caused this stub to be generated (only valid for
2679 Cortex-A8 erratum workaround stubs at present). */
2680 unsigned long orig_insn;
2681
2682 /* The stub type. */
2683 enum elf32_arm_stub_type stub_type;
2684 /* Its encoding size in bytes. */
2685 int stub_size;
2686 /* Its template. */
2687 const insn_sequence *stub_template;
2688 /* The size of the template (number of entries). */
2689 int stub_template_size;
2690
2691 /* The symbol table entry, if any, that this was derived from. */
2692 struct elf32_arm_link_hash_entry *h;
2693
2694 /* Type of branch. */
2695 enum arm_st_branch_type branch_type;
2696
2697 /* Where this stub is being called from, or, in the case of combined
2698 stub sections, the first input section in the group. */
2699 asection *id_sec;
2700
2701 /* The name for the local symbol at the start of this stub. The
2702 stub name in the hash table has to be unique; this does not, so
2703 it can be friendlier. */
2704 char *output_name;
2705 };
2706
2707 /* Used to build a map of a section. This is required for mixed-endian
2708 code/data. */
2709
2710 typedef struct elf32_elf_section_map
2711 {
2712 bfd_vma vma;
2713 char type;
2714 }
2715 elf32_arm_section_map;
2716
2717 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2718
2719 typedef enum
2720 {
2721 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2722 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2723 VFP11_ERRATUM_ARM_VENEER,
2724 VFP11_ERRATUM_THUMB_VENEER
2725 }
2726 elf32_vfp11_erratum_type;
2727
2728 typedef struct elf32_vfp11_erratum_list
2729 {
2730 struct elf32_vfp11_erratum_list *next;
2731 bfd_vma vma;
2732 union
2733 {
2734 struct
2735 {
2736 struct elf32_vfp11_erratum_list *veneer;
2737 unsigned int vfp_insn;
2738 } b;
2739 struct
2740 {
2741 struct elf32_vfp11_erratum_list *branch;
2742 unsigned int id;
2743 } v;
2744 } u;
2745 elf32_vfp11_erratum_type type;
2746 }
2747 elf32_vfp11_erratum_list;
2748
2749 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2750 veneer. */
2751 typedef enum
2752 {
2753 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2754 STM32L4XX_ERRATUM_VENEER
2755 }
2756 elf32_stm32l4xx_erratum_type;
2757
2758 typedef struct elf32_stm32l4xx_erratum_list
2759 {
2760 struct elf32_stm32l4xx_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_stm32l4xx_erratum_list *veneer;
2767 unsigned int insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_stm32l4xx_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_stm32l4xx_erratum_type type;
2776 }
2777 elf32_stm32l4xx_erratum_list;
2778
2779 typedef enum
2780 {
2781 DELETE_EXIDX_ENTRY,
2782 INSERT_EXIDX_CANTUNWIND_AT_END
2783 }
2784 arm_unwind_edit_type;
2785
2786 /* A (sorted) list of edits to apply to an unwind table. */
2787 typedef struct arm_unwind_table_edit
2788 {
2789 arm_unwind_edit_type type;
2790 /* Note: we sometimes want to insert an unwind entry corresponding to a
2791 section different from the one we're currently writing out, so record the
2792 (text) section this edit relates to here. */
2793 asection *linked_section;
2794 unsigned int index;
2795 struct arm_unwind_table_edit *next;
2796 }
2797 arm_unwind_table_edit;
2798
2799 typedef struct _arm_elf_section_data
2800 {
2801 /* Information about mapping symbols. */
2802 struct bfd_elf_section_data elf;
2803 unsigned int mapcount;
2804 unsigned int mapsize;
2805 elf32_arm_section_map *map;
2806 /* Information about CPU errata. */
2807 unsigned int erratumcount;
2808 elf32_vfp11_erratum_list *erratumlist;
2809 unsigned int stm32l4xx_erratumcount;
2810 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2811 unsigned int additional_reloc_count;
2812 /* Information about unwind tables. */
2813 union
2814 {
2815 /* Unwind info attached to a text section. */
2816 struct
2817 {
2818 asection *arm_exidx_sec;
2819 } text;
2820
2821 /* Unwind info attached to an .ARM.exidx section. */
2822 struct
2823 {
2824 arm_unwind_table_edit *unwind_edit_list;
2825 arm_unwind_table_edit *unwind_edit_tail;
2826 } exidx;
2827 } u;
2828 }
2829 _arm_elf_section_data;
2830
2831 #define elf32_arm_section_data(sec) \
2832 ((_arm_elf_section_data *) elf_section_data (sec))
2833
2834 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2835 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2836 so may be created multiple times: we use an array of these entries whilst
2837 relaxing which we can refresh easily, then create stubs for each potentially
2838 erratum-triggering instruction once we've settled on a solution. */
2839
2840 struct a8_erratum_fix
2841 {
2842 bfd *input_bfd;
2843 asection *section;
2844 bfd_vma offset;
2845 bfd_vma target_offset;
2846 unsigned long orig_insn;
2847 char *stub_name;
2848 enum elf32_arm_stub_type stub_type;
2849 enum arm_st_branch_type branch_type;
2850 };
2851
2852 /* A table of relocs applied to branches which might trigger Cortex-A8
2853 erratum. */
2854
2855 struct a8_erratum_reloc
2856 {
2857 bfd_vma from;
2858 bfd_vma destination;
2859 struct elf32_arm_link_hash_entry *hash;
2860 const char *sym_name;
2861 unsigned int r_type;
2862 enum arm_st_branch_type branch_type;
2863 bfd_boolean non_a8_stub;
2864 };
2865
2866 /* The size of the thread control block. */
2867 #define TCB_SIZE 8
2868
2869 /* ARM-specific information about a PLT entry, over and above the usual
2870 gotplt_union. */
2871 struct arm_plt_info
2872 {
2873 /* We reference count Thumb references to a PLT entry separately,
2874 so that we can emit the Thumb trampoline only if needed. */
2875 bfd_signed_vma thumb_refcount;
2876
2877 /* Some references from Thumb code may be eliminated by BL->BLX
2878 conversion, so record them separately. */
2879 bfd_signed_vma maybe_thumb_refcount;
2880
2881 /* How many of the recorded PLT accesses were from non-call relocations.
2882 This information is useful when deciding whether anything takes the
2883 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2884 non-call references to the function should resolve directly to the
2885 real runtime target. */
2886 unsigned int noncall_refcount;
2887
2888 /* Since PLT entries have variable size if the Thumb prologue is
2889 used, we need to record the index into .got.plt instead of
2890 recomputing it from the PLT offset. */
2891 bfd_signed_vma got_offset;
2892 };
2893
2894 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2895 struct arm_local_iplt_info
2896 {
2897 /* The information that is usually found in the generic ELF part of
2898 the hash table entry. */
2899 union gotplt_union root;
2900
2901 /* The information that is usually found in the ARM-specific part of
2902 the hash table entry. */
2903 struct arm_plt_info arm;
2904
2905 /* A list of all potential dynamic relocations against this symbol. */
2906 struct elf_dyn_relocs *dyn_relocs;
2907 };
2908
2909 struct elf_arm_obj_tdata
2910 {
2911 struct elf_obj_tdata root;
2912
2913 /* tls_type for each local got entry. */
2914 char *local_got_tls_type;
2915
2916 /* GOTPLT entries for TLS descriptors. */
2917 bfd_vma *local_tlsdesc_gotent;
2918
2919 /* Information for local symbols that need entries in .iplt. */
2920 struct arm_local_iplt_info **local_iplt;
2921
2922 /* Zero to warn when linking objects with incompatible enum sizes. */
2923 int no_enum_size_warning;
2924
2925 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2926 int no_wchar_size_warning;
2927 };
2928
2929 #define elf_arm_tdata(bfd) \
2930 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2931
2932 #define elf32_arm_local_got_tls_type(bfd) \
2933 (elf_arm_tdata (bfd)->local_got_tls_type)
2934
2935 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2936 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2937
2938 #define elf32_arm_local_iplt(bfd) \
2939 (elf_arm_tdata (bfd)->local_iplt)
2940
2941 #define is_arm_elf(bfd) \
2942 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2943 && elf_tdata (bfd) != NULL \
2944 && elf_object_id (bfd) == ARM_ELF_DATA)
2945
2946 static bfd_boolean
2947 elf32_arm_mkobject (bfd *abfd)
2948 {
2949 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2950 ARM_ELF_DATA);
2951 }
2952
2953 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2954
2955 /* Arm ELF linker hash entry. */
2956 struct elf32_arm_link_hash_entry
2957 {
2958 struct elf_link_hash_entry root;
2959
2960 /* Track dynamic relocs copied for this symbol. */
2961 struct elf_dyn_relocs *dyn_relocs;
2962
2963 /* ARM-specific PLT information. */
2964 struct arm_plt_info plt;
2965
2966 #define GOT_UNKNOWN 0
2967 #define GOT_NORMAL 1
2968 #define GOT_TLS_GD 2
2969 #define GOT_TLS_IE 4
2970 #define GOT_TLS_GDESC 8
2971 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2972 unsigned int tls_type : 8;
2973
2974 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2975 unsigned int is_iplt : 1;
2976
2977 unsigned int unused : 23;
2978
2979 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2980 starting at the end of the jump table. */
2981 bfd_vma tlsdesc_got;
2982
2983 /* The symbol marking the real symbol location for exported thumb
2984 symbols with Arm stubs. */
2985 struct elf_link_hash_entry *export_glue;
2986
2987 /* A pointer to the most recently used stub hash entry against this
2988 symbol. */
2989 struct elf32_arm_stub_hash_entry *stub_cache;
2990 };
2991
2992 /* Traverse an arm ELF linker hash table. */
2993 #define elf32_arm_link_hash_traverse(table, func, info) \
2994 (elf_link_hash_traverse \
2995 (&(table)->root, \
2996 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2997 (info)))
2998
2999 /* Get the ARM elf linker hash table from a link_info structure. */
3000 #define elf32_arm_hash_table(info) \
3001 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3002 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3003
3004 #define arm_stub_hash_lookup(table, string, create, copy) \
3005 ((struct elf32_arm_stub_hash_entry *) \
3006 bfd_hash_lookup ((table), (string), (create), (copy)))
3007
3008 /* Array to keep track of which stub sections have been created, and
3009 information on stub grouping. */
3010 struct map_stub
3011 {
3012 /* This is the section to which stubs in the group will be
3013 attached. */
3014 asection *link_sec;
3015 /* The stub section. */
3016 asection *stub_sec;
3017 };
3018
3019 #define elf32_arm_compute_jump_table_size(htab) \
3020 ((htab)->next_tls_desc_index * 4)
3021
3022 /* ARM ELF linker hash table. */
3023 struct elf32_arm_link_hash_table
3024 {
3025 /* The main hash table. */
3026 struct elf_link_hash_table root;
3027
3028 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3029 bfd_size_type thumb_glue_size;
3030
3031 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3032 bfd_size_type arm_glue_size;
3033
3034 /* The size in bytes of section containing the ARMv4 BX veneers. */
3035 bfd_size_type bx_glue_size;
3036
3037 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3038 veneer has been populated. */
3039 bfd_vma bx_glue_offset[15];
3040
3041 /* The size in bytes of the section containing glue for VFP11 erratum
3042 veneers. */
3043 bfd_size_type vfp11_erratum_glue_size;
3044
3045 /* The size in bytes of the section containing glue for STM32L4XX erratum
3046 veneers. */
3047 bfd_size_type stm32l4xx_erratum_glue_size;
3048
3049 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3050 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3051 elf32_arm_write_section(). */
3052 struct a8_erratum_fix *a8_erratum_fixes;
3053 unsigned int num_a8_erratum_fixes;
3054
3055 /* An arbitrary input BFD chosen to hold the glue sections. */
3056 bfd * bfd_of_glue_owner;
3057
3058 /* Nonzero to output a BE8 image. */
3059 int byteswap_code;
3060
3061 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3062 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3063 int target1_is_rel;
3064
3065 /* The relocation to use for R_ARM_TARGET2 relocations. */
3066 int target2_reloc;
3067
3068 /* 0 = Ignore R_ARM_V4BX.
3069 1 = Convert BX to MOV PC.
3070 2 = Generate v4 interworing stubs. */
3071 int fix_v4bx;
3072
3073 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3074 int fix_cortex_a8;
3075
3076 /* Whether we should fix the ARM1176 BLX immediate issue. */
3077 int fix_arm1176;
3078
3079 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3080 int use_blx;
3081
3082 /* What sort of code sequences we should look for which may trigger the
3083 VFP11 denorm erratum. */
3084 bfd_arm_vfp11_fix vfp11_fix;
3085
3086 /* Global counter for the number of fixes we have emitted. */
3087 int num_vfp11_fixes;
3088
3089 /* What sort of code sequences we should look for which may trigger the
3090 STM32L4XX erratum. */
3091 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3092
3093 /* Global counter for the number of fixes we have emitted. */
3094 int num_stm32l4xx_fixes;
3095
3096 /* Nonzero to force PIC branch veneers. */
3097 int pic_veneer;
3098
3099 /* The number of bytes in the initial entry in the PLT. */
3100 bfd_size_type plt_header_size;
3101
3102 /* The number of bytes in the subsequent PLT etries. */
3103 bfd_size_type plt_entry_size;
3104
3105 /* True if the target system is VxWorks. */
3106 int vxworks_p;
3107
3108 /* True if the target system is Symbian OS. */
3109 int symbian_p;
3110
3111 /* True if the target system is Native Client. */
3112 int nacl_p;
3113
3114 /* True if the target uses REL relocations. */
3115 int use_rel;
3116
3117 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3118 bfd_vma next_tls_desc_index;
3119
3120 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3121 bfd_vma num_tls_desc;
3122
3123 /* Short-cuts to get to dynamic linker sections. */
3124 asection *sdynbss;
3125 asection *srelbss;
3126
3127 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3128 asection *srelplt2;
3129
3130 /* The offset into splt of the PLT entry for the TLS descriptor
3131 resolver. Special values are 0, if not necessary (or not found
3132 to be necessary yet), and -1 if needed but not determined
3133 yet. */
3134 bfd_vma dt_tlsdesc_plt;
3135
3136 /* The offset into sgot of the GOT entry used by the PLT entry
3137 above. */
3138 bfd_vma dt_tlsdesc_got;
3139
3140 /* Offset in .plt section of tls_arm_trampoline. */
3141 bfd_vma tls_trampoline;
3142
3143 /* Data for R_ARM_TLS_LDM32 relocations. */
3144 union
3145 {
3146 bfd_signed_vma refcount;
3147 bfd_vma offset;
3148 } tls_ldm_got;
3149
3150 /* Small local sym cache. */
3151 struct sym_cache sym_cache;
3152
3153 /* For convenience in allocate_dynrelocs. */
3154 bfd * obfd;
3155
3156 /* The amount of space used by the reserved portion of the sgotplt
3157 section, plus whatever space is used by the jump slots. */
3158 bfd_vma sgotplt_jump_table_size;
3159
3160 /* The stub hash table. */
3161 struct bfd_hash_table stub_hash_table;
3162
3163 /* Linker stub bfd. */
3164 bfd *stub_bfd;
3165
3166 /* Linker call-backs. */
3167 asection * (*add_stub_section) (const char *, asection *, asection *,
3168 unsigned int);
3169 void (*layout_sections_again) (void);
3170
3171 /* Array to keep track of which stub sections have been created, and
3172 information on stub grouping. */
3173 struct map_stub *stub_group;
3174
3175 /* Number of elements in stub_group. */
3176 unsigned int top_id;
3177
3178 /* Assorted information used by elf32_arm_size_stubs. */
3179 unsigned int bfd_count;
3180 unsigned int top_index;
3181 asection **input_list;
3182 };
3183
3184 static inline int
3185 ctz (unsigned int mask)
3186 {
3187 #if GCC_VERSION >= 3004
3188 return __builtin_ctz (mask);
3189 #else
3190 unsigned int i;
3191
3192 for (i = 0; i < 8 * sizeof (mask); i++)
3193 {
3194 if (mask & 0x1)
3195 break;
3196 mask = (mask >> 1);
3197 }
3198 return i;
3199 #endif
3200 }
3201
3202 static inline int
3203 popcount (unsigned int mask)
3204 {
3205 #if GCC_VERSION >= 3004
3206 return __builtin_popcount (mask);
3207 #else
3208 unsigned int i, sum = 0;
3209
3210 for (i = 0; i < 8 * sizeof (mask); i++)
3211 {
3212 if (mask & 0x1)
3213 sum++;
3214 mask = (mask >> 1);
3215 }
3216 return sum;
3217 #endif
3218 }
3219
3220 /* Create an entry in an ARM ELF linker hash table. */
3221
3222 static struct bfd_hash_entry *
3223 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3224 struct bfd_hash_table * table,
3225 const char * string)
3226 {
3227 struct elf32_arm_link_hash_entry * ret =
3228 (struct elf32_arm_link_hash_entry *) entry;
3229
3230 /* Allocate the structure if it has not already been allocated by a
3231 subclass. */
3232 if (ret == NULL)
3233 ret = (struct elf32_arm_link_hash_entry *)
3234 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3235 if (ret == NULL)
3236 return (struct bfd_hash_entry *) ret;
3237
3238 /* Call the allocation method of the superclass. */
3239 ret = ((struct elf32_arm_link_hash_entry *)
3240 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3241 table, string));
3242 if (ret != NULL)
3243 {
3244 ret->dyn_relocs = NULL;
3245 ret->tls_type = GOT_UNKNOWN;
3246 ret->tlsdesc_got = (bfd_vma) -1;
3247 ret->plt.thumb_refcount = 0;
3248 ret->plt.maybe_thumb_refcount = 0;
3249 ret->plt.noncall_refcount = 0;
3250 ret->plt.got_offset = -1;
3251 ret->is_iplt = FALSE;
3252 ret->export_glue = NULL;
3253
3254 ret->stub_cache = NULL;
3255 }
3256
3257 return (struct bfd_hash_entry *) ret;
3258 }
3259
3260 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3261 symbols. */
3262
3263 static bfd_boolean
3264 elf32_arm_allocate_local_sym_info (bfd *abfd)
3265 {
3266 if (elf_local_got_refcounts (abfd) == NULL)
3267 {
3268 bfd_size_type num_syms;
3269 bfd_size_type size;
3270 char *data;
3271
3272 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3273 size = num_syms * (sizeof (bfd_signed_vma)
3274 + sizeof (struct arm_local_iplt_info *)
3275 + sizeof (bfd_vma)
3276 + sizeof (char));
3277 data = bfd_zalloc (abfd, size);
3278 if (data == NULL)
3279 return FALSE;
3280
3281 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3282 data += num_syms * sizeof (bfd_signed_vma);
3283
3284 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3285 data += num_syms * sizeof (struct arm_local_iplt_info *);
3286
3287 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3288 data += num_syms * sizeof (bfd_vma);
3289
3290 elf32_arm_local_got_tls_type (abfd) = data;
3291 }
3292 return TRUE;
3293 }
3294
3295 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3296 to input bfd ABFD. Create the information if it doesn't already exist.
3297 Return null if an allocation fails. */
3298
3299 static struct arm_local_iplt_info *
3300 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3301 {
3302 struct arm_local_iplt_info **ptr;
3303
3304 if (!elf32_arm_allocate_local_sym_info (abfd))
3305 return NULL;
3306
3307 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3308 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3309 if (*ptr == NULL)
3310 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3311 return *ptr;
3312 }
3313
3314 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3315 in ABFD's symbol table. If the symbol is global, H points to its
3316 hash table entry, otherwise H is null.
3317
3318 Return true if the symbol does have PLT information. When returning
3319 true, point *ROOT_PLT at the target-independent reference count/offset
3320 union and *ARM_PLT at the ARM-specific information. */
3321
3322 static bfd_boolean
3323 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3324 unsigned long r_symndx, union gotplt_union **root_plt,
3325 struct arm_plt_info **arm_plt)
3326 {
3327 struct arm_local_iplt_info *local_iplt;
3328
3329 if (h != NULL)
3330 {
3331 *root_plt = &h->root.plt;
3332 *arm_plt = &h->plt;
3333 return TRUE;
3334 }
3335
3336 if (elf32_arm_local_iplt (abfd) == NULL)
3337 return FALSE;
3338
3339 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3340 if (local_iplt == NULL)
3341 return FALSE;
3342
3343 *root_plt = &local_iplt->root;
3344 *arm_plt = &local_iplt->arm;
3345 return TRUE;
3346 }
3347
3348 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3349 before it. */
3350
3351 static bfd_boolean
3352 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3353 struct arm_plt_info *arm_plt)
3354 {
3355 struct elf32_arm_link_hash_table *htab;
3356
3357 htab = elf32_arm_hash_table (info);
3358 return (arm_plt->thumb_refcount != 0
3359 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3360 }
3361
3362 /* Return a pointer to the head of the dynamic reloc list that should
3363 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3364 ABFD's symbol table. Return null if an error occurs. */
3365
3366 static struct elf_dyn_relocs **
3367 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3368 Elf_Internal_Sym *isym)
3369 {
3370 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3371 {
3372 struct arm_local_iplt_info *local_iplt;
3373
3374 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3375 if (local_iplt == NULL)
3376 return NULL;
3377 return &local_iplt->dyn_relocs;
3378 }
3379 else
3380 {
3381 /* Track dynamic relocs needed for local syms too.
3382 We really need local syms available to do this
3383 easily. Oh well. */
3384 asection *s;
3385 void *vpp;
3386
3387 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3388 if (s == NULL)
3389 abort ();
3390
3391 vpp = &elf_section_data (s)->local_dynrel;
3392 return (struct elf_dyn_relocs **) vpp;
3393 }
3394 }
3395
3396 /* Initialize an entry in the stub hash table. */
3397
3398 static struct bfd_hash_entry *
3399 stub_hash_newfunc (struct bfd_hash_entry *entry,
3400 struct bfd_hash_table *table,
3401 const char *string)
3402 {
3403 /* Allocate the structure if it has not already been allocated by a
3404 subclass. */
3405 if (entry == NULL)
3406 {
3407 entry = (struct bfd_hash_entry *)
3408 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3409 if (entry == NULL)
3410 return entry;
3411 }
3412
3413 /* Call the allocation method of the superclass. */
3414 entry = bfd_hash_newfunc (entry, table, string);
3415 if (entry != NULL)
3416 {
3417 struct elf32_arm_stub_hash_entry *eh;
3418
3419 /* Initialize the local fields. */
3420 eh = (struct elf32_arm_stub_hash_entry *) entry;
3421 eh->stub_sec = NULL;
3422 eh->stub_offset = 0;
3423 eh->source_value = 0;
3424 eh->target_value = 0;
3425 eh->target_section = NULL;
3426 eh->orig_insn = 0;
3427 eh->stub_type = arm_stub_none;
3428 eh->stub_size = 0;
3429 eh->stub_template = NULL;
3430 eh->stub_template_size = 0;
3431 eh->h = NULL;
3432 eh->id_sec = NULL;
3433 eh->output_name = NULL;
3434 }
3435
3436 return entry;
3437 }
3438
3439 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3440 shortcuts to them in our hash table. */
3441
3442 static bfd_boolean
3443 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3444 {
3445 struct elf32_arm_link_hash_table *htab;
3446
3447 htab = elf32_arm_hash_table (info);
3448 if (htab == NULL)
3449 return FALSE;
3450
3451 /* BPABI objects never have a GOT, or associated sections. */
3452 if (htab->symbian_p)
3453 return TRUE;
3454
3455 if (! _bfd_elf_create_got_section (dynobj, info))
3456 return FALSE;
3457
3458 return TRUE;
3459 }
3460
3461 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3462
3463 static bfd_boolean
3464 create_ifunc_sections (struct bfd_link_info *info)
3465 {
3466 struct elf32_arm_link_hash_table *htab;
3467 const struct elf_backend_data *bed;
3468 bfd *dynobj;
3469 asection *s;
3470 flagword flags;
3471
3472 htab = elf32_arm_hash_table (info);
3473 dynobj = htab->root.dynobj;
3474 bed = get_elf_backend_data (dynobj);
3475 flags = bed->dynamic_sec_flags;
3476
3477 if (htab->root.iplt == NULL)
3478 {
3479 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3480 flags | SEC_READONLY | SEC_CODE);
3481 if (s == NULL
3482 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3483 return FALSE;
3484 htab->root.iplt = s;
3485 }
3486
3487 if (htab->root.irelplt == NULL)
3488 {
3489 s = bfd_make_section_anyway_with_flags (dynobj,
3490 RELOC_SECTION (htab, ".iplt"),
3491 flags | SEC_READONLY);
3492 if (s == NULL
3493 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3494 return FALSE;
3495 htab->root.irelplt = s;
3496 }
3497
3498 if (htab->root.igotplt == NULL)
3499 {
3500 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3501 if (s == NULL
3502 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3503 return FALSE;
3504 htab->root.igotplt = s;
3505 }
3506 return TRUE;
3507 }
3508
3509 /* Determine if we're dealing with a Thumb only architecture. */
3510
3511 static bfd_boolean
3512 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3513 {
3514 int arch;
3515 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3516 Tag_CPU_arch_profile);
3517
3518 if (profile)
3519 return profile == 'M';
3520
3521 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3522
3523 if (arch == TAG_CPU_ARCH_V6_M
3524 || arch == TAG_CPU_ARCH_V6S_M
3525 || arch == TAG_CPU_ARCH_V7E_M
3526 || arch == TAG_CPU_ARCH_V8M_BASE
3527 || arch == TAG_CPU_ARCH_V8M_MAIN)
3528 return TRUE;
3529
3530 return FALSE;
3531 }
3532
3533 /* Determine if we're dealing with a Thumb-2 object. */
3534
3535 static bfd_boolean
3536 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3537 {
3538 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3539 Tag_CPU_arch);
3540 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3541 }
3542
3543 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3544 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3545 hash table. */
3546
3547 static bfd_boolean
3548 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3549 {
3550 struct elf32_arm_link_hash_table *htab;
3551
3552 htab = elf32_arm_hash_table (info);
3553 if (htab == NULL)
3554 return FALSE;
3555
3556 if (!htab->root.sgot && !create_got_section (dynobj, info))
3557 return FALSE;
3558
3559 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3560 return FALSE;
3561
3562 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3563 if (!bfd_link_pic (info))
3564 htab->srelbss = bfd_get_linker_section (dynobj,
3565 RELOC_SECTION (htab, ".bss"));
3566
3567 if (htab->vxworks_p)
3568 {
3569 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3570 return FALSE;
3571
3572 if (bfd_link_pic (info))
3573 {
3574 htab->plt_header_size = 0;
3575 htab->plt_entry_size
3576 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3577 }
3578 else
3579 {
3580 htab->plt_header_size
3581 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3582 htab->plt_entry_size
3583 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3584 }
3585
3586 if (elf_elfheader (dynobj))
3587 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3588 }
3589 else
3590 {
3591 /* PR ld/16017
3592 Test for thumb only architectures. Note - we cannot just call
3593 using_thumb_only() as the attributes in the output bfd have not been
3594 initialised at this point, so instead we use the input bfd. */
3595 bfd * saved_obfd = htab->obfd;
3596
3597 htab->obfd = dynobj;
3598 if (using_thumb_only (htab))
3599 {
3600 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3601 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3602 }
3603 htab->obfd = saved_obfd;
3604 }
3605
3606 if (!htab->root.splt
3607 || !htab->root.srelplt
3608 || !htab->sdynbss
3609 || (!bfd_link_pic (info) && !htab->srelbss))
3610 abort ();
3611
3612 return TRUE;
3613 }
3614
3615 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3616
3617 static void
3618 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3619 struct elf_link_hash_entry *dir,
3620 struct elf_link_hash_entry *ind)
3621 {
3622 struct elf32_arm_link_hash_entry *edir, *eind;
3623
3624 edir = (struct elf32_arm_link_hash_entry *) dir;
3625 eind = (struct elf32_arm_link_hash_entry *) ind;
3626
3627 if (eind->dyn_relocs != NULL)
3628 {
3629 if (edir->dyn_relocs != NULL)
3630 {
3631 struct elf_dyn_relocs **pp;
3632 struct elf_dyn_relocs *p;
3633
3634 /* Add reloc counts against the indirect sym to the direct sym
3635 list. Merge any entries against the same section. */
3636 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3637 {
3638 struct elf_dyn_relocs *q;
3639
3640 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3641 if (q->sec == p->sec)
3642 {
3643 q->pc_count += p->pc_count;
3644 q->count += p->count;
3645 *pp = p->next;
3646 break;
3647 }
3648 if (q == NULL)
3649 pp = &p->next;
3650 }
3651 *pp = edir->dyn_relocs;
3652 }
3653
3654 edir->dyn_relocs = eind->dyn_relocs;
3655 eind->dyn_relocs = NULL;
3656 }
3657
3658 if (ind->root.type == bfd_link_hash_indirect)
3659 {
3660 /* Copy over PLT info. */
3661 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3662 eind->plt.thumb_refcount = 0;
3663 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3664 eind->plt.maybe_thumb_refcount = 0;
3665 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3666 eind->plt.noncall_refcount = 0;
3667
3668 /* We should only allocate a function to .iplt once the final
3669 symbol information is known. */
3670 BFD_ASSERT (!eind->is_iplt);
3671
3672 if (dir->got.refcount <= 0)
3673 {
3674 edir->tls_type = eind->tls_type;
3675 eind->tls_type = GOT_UNKNOWN;
3676 }
3677 }
3678
3679 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3680 }
3681
3682 /* Destroy an ARM elf linker hash table. */
3683
3684 static void
3685 elf32_arm_link_hash_table_free (bfd *obfd)
3686 {
3687 struct elf32_arm_link_hash_table *ret
3688 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3689
3690 bfd_hash_table_free (&ret->stub_hash_table);
3691 _bfd_elf_link_hash_table_free (obfd);
3692 }
3693
3694 /* Create an ARM elf linker hash table. */
3695
3696 static struct bfd_link_hash_table *
3697 elf32_arm_link_hash_table_create (bfd *abfd)
3698 {
3699 struct elf32_arm_link_hash_table *ret;
3700 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3701
3702 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3703 if (ret == NULL)
3704 return NULL;
3705
3706 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3707 elf32_arm_link_hash_newfunc,
3708 sizeof (struct elf32_arm_link_hash_entry),
3709 ARM_ELF_DATA))
3710 {
3711 free (ret);
3712 return NULL;
3713 }
3714
3715 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3716 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3717 #ifdef FOUR_WORD_PLT
3718 ret->plt_header_size = 16;
3719 ret->plt_entry_size = 16;
3720 #else
3721 ret->plt_header_size = 20;
3722 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3723 #endif
3724 ret->use_rel = 1;
3725 ret->obfd = abfd;
3726
3727 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3728 sizeof (struct elf32_arm_stub_hash_entry)))
3729 {
3730 _bfd_elf_link_hash_table_free (abfd);
3731 return NULL;
3732 }
3733 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3734
3735 return &ret->root.root;
3736 }
3737
3738 /* Determine what kind of NOPs are available. */
3739
3740 static bfd_boolean
3741 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3742 {
3743 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3744 Tag_CPU_arch);
3745 return arch == TAG_CPU_ARCH_V6T2
3746 || arch == TAG_CPU_ARCH_V6K
3747 || arch == TAG_CPU_ARCH_V7
3748 || arch == TAG_CPU_ARCH_V7E_M;
3749 }
3750
3751 static bfd_boolean
3752 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3753 {
3754 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3755 Tag_CPU_arch);
3756 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3757 || arch == TAG_CPU_ARCH_V7E_M);
3758 }
3759
3760 static bfd_boolean
3761 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3762 {
3763 switch (stub_type)
3764 {
3765 case arm_stub_long_branch_thumb_only:
3766 case arm_stub_long_branch_v4t_thumb_arm:
3767 case arm_stub_short_branch_v4t_thumb_arm:
3768 case arm_stub_long_branch_v4t_thumb_arm_pic:
3769 case arm_stub_long_branch_v4t_thumb_tls_pic:
3770 case arm_stub_long_branch_thumb_only_pic:
3771 return TRUE;
3772 case arm_stub_none:
3773 BFD_FAIL ();
3774 return FALSE;
3775 break;
3776 default:
3777 return FALSE;
3778 }
3779 }
3780
3781 /* Determine the type of stub needed, if any, for a call. */
3782
3783 static enum elf32_arm_stub_type
3784 arm_type_of_stub (struct bfd_link_info *info,
3785 asection *input_sec,
3786 const Elf_Internal_Rela *rel,
3787 unsigned char st_type,
3788 enum arm_st_branch_type *actual_branch_type,
3789 struct elf32_arm_link_hash_entry *hash,
3790 bfd_vma destination,
3791 asection *sym_sec,
3792 bfd *input_bfd,
3793 const char *name)
3794 {
3795 bfd_vma location;
3796 bfd_signed_vma branch_offset;
3797 unsigned int r_type;
3798 struct elf32_arm_link_hash_table * globals;
3799 int thumb2;
3800 int thumb_only;
3801 enum elf32_arm_stub_type stub_type = arm_stub_none;
3802 int use_plt = 0;
3803 enum arm_st_branch_type branch_type = *actual_branch_type;
3804 union gotplt_union *root_plt;
3805 struct arm_plt_info *arm_plt;
3806
3807 if (branch_type == ST_BRANCH_LONG)
3808 return stub_type;
3809
3810 globals = elf32_arm_hash_table (info);
3811 if (globals == NULL)
3812 return stub_type;
3813
3814 thumb_only = using_thumb_only (globals);
3815
3816 thumb2 = using_thumb2 (globals);
3817
3818 /* Determine where the call point is. */
3819 location = (input_sec->output_offset
3820 + input_sec->output_section->vma
3821 + rel->r_offset);
3822
3823 r_type = ELF32_R_TYPE (rel->r_info);
3824
3825 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3826 are considering a function call relocation. */
3827 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3828 || r_type == R_ARM_THM_JUMP19)
3829 && branch_type == ST_BRANCH_TO_ARM)
3830 branch_type = ST_BRANCH_TO_THUMB;
3831
3832 /* For TLS call relocs, it is the caller's responsibility to provide
3833 the address of the appropriate trampoline. */
3834 if (r_type != R_ARM_TLS_CALL
3835 && r_type != R_ARM_THM_TLS_CALL
3836 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3837 &root_plt, &arm_plt)
3838 && root_plt->offset != (bfd_vma) -1)
3839 {
3840 asection *splt;
3841
3842 if (hash == NULL || hash->is_iplt)
3843 splt = globals->root.iplt;
3844 else
3845 splt = globals->root.splt;
3846 if (splt != NULL)
3847 {
3848 use_plt = 1;
3849
3850 /* Note when dealing with PLT entries: the main PLT stub is in
3851 ARM mode, so if the branch is in Thumb mode, another
3852 Thumb->ARM stub will be inserted later just before the ARM
3853 PLT stub. We don't take this extra distance into account
3854 here, because if a long branch stub is needed, we'll add a
3855 Thumb->Arm one and branch directly to the ARM PLT entry
3856 because it avoids spreading offset corrections in several
3857 places. */
3858
3859 destination = (splt->output_section->vma
3860 + splt->output_offset
3861 + root_plt->offset);
3862 st_type = STT_FUNC;
3863 branch_type = ST_BRANCH_TO_ARM;
3864 }
3865 }
3866 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3867 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3868
3869 branch_offset = (bfd_signed_vma)(destination - location);
3870
3871 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3872 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3873 {
3874 /* Handle cases where:
3875 - this call goes too far (different Thumb/Thumb2 max
3876 distance)
3877 - it's a Thumb->Arm call and blx is not available, or it's a
3878 Thumb->Arm branch (not bl). A stub is needed in this case,
3879 but only if this call is not through a PLT entry. Indeed,
3880 PLT stubs handle mode switching already.
3881 */
3882 if ((!thumb2
3883 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3884 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3885 || (thumb2
3886 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3887 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3888 || (thumb2
3889 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3890 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3891 && (r_type == R_ARM_THM_JUMP19))
3892 || (branch_type == ST_BRANCH_TO_ARM
3893 && (((r_type == R_ARM_THM_CALL
3894 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3895 || (r_type == R_ARM_THM_JUMP24)
3896 || (r_type == R_ARM_THM_JUMP19))
3897 && !use_plt))
3898 {
3899 if (branch_type == ST_BRANCH_TO_THUMB)
3900 {
3901 /* Thumb to thumb. */
3902 if (!thumb_only)
3903 {
3904 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3905 /* PIC stubs. */
3906 ? ((globals->use_blx
3907 && (r_type == R_ARM_THM_CALL))
3908 /* V5T and above. Stub starts with ARM code, so
3909 we must be able to switch mode before
3910 reaching it, which is only possible for 'bl'
3911 (ie R_ARM_THM_CALL relocation). */
3912 ? arm_stub_long_branch_any_thumb_pic
3913 /* On V4T, use Thumb code only. */
3914 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3915
3916 /* non-PIC stubs. */
3917 : ((globals->use_blx
3918 && (r_type == R_ARM_THM_CALL))
3919 /* V5T and above. */
3920 ? arm_stub_long_branch_any_any
3921 /* V4T. */
3922 : arm_stub_long_branch_v4t_thumb_thumb);
3923 }
3924 else
3925 {
3926 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3927 /* PIC stub. */
3928 ? arm_stub_long_branch_thumb_only_pic
3929 /* non-PIC stub. */
3930 : arm_stub_long_branch_thumb_only;
3931 }
3932 }
3933 else
3934 {
3935 /* Thumb to arm. */
3936 if (sym_sec != NULL
3937 && sym_sec->owner != NULL
3938 && !INTERWORK_FLAG (sym_sec->owner))
3939 {
3940 (*_bfd_error_handler)
3941 (_("%B(%s): warning: interworking not enabled.\n"
3942 " first occurrence: %B: Thumb call to ARM"),
3943 sym_sec->owner, input_bfd, name);
3944 }
3945
3946 stub_type =
3947 (bfd_link_pic (info) | globals->pic_veneer)
3948 /* PIC stubs. */
3949 ? (r_type == R_ARM_THM_TLS_CALL
3950 /* TLS PIC stubs. */
3951 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3952 : arm_stub_long_branch_v4t_thumb_tls_pic)
3953 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3954 /* V5T PIC and above. */
3955 ? arm_stub_long_branch_any_arm_pic
3956 /* V4T PIC stub. */
3957 : arm_stub_long_branch_v4t_thumb_arm_pic))
3958
3959 /* non-PIC stubs. */
3960 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3961 /* V5T and above. */
3962 ? arm_stub_long_branch_any_any
3963 /* V4T. */
3964 : arm_stub_long_branch_v4t_thumb_arm);
3965
3966 /* Handle v4t short branches. */
3967 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3968 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3969 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3970 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3971 }
3972 }
3973 }
3974 else if (r_type == R_ARM_CALL
3975 || r_type == R_ARM_JUMP24
3976 || r_type == R_ARM_PLT32
3977 || r_type == R_ARM_TLS_CALL)
3978 {
3979 if (branch_type == ST_BRANCH_TO_THUMB)
3980 {
3981 /* Arm to thumb. */
3982
3983 if (sym_sec != NULL
3984 && sym_sec->owner != NULL
3985 && !INTERWORK_FLAG (sym_sec->owner))
3986 {
3987 (*_bfd_error_handler)
3988 (_("%B(%s): warning: interworking not enabled.\n"
3989 " first occurrence: %B: ARM call to Thumb"),
3990 sym_sec->owner, input_bfd, name);
3991 }
3992
3993 /* We have an extra 2-bytes reach because of
3994 the mode change (bit 24 (H) of BLX encoding). */
3995 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3996 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3997 || (r_type == R_ARM_CALL && !globals->use_blx)
3998 || (r_type == R_ARM_JUMP24)
3999 || (r_type == R_ARM_PLT32))
4000 {
4001 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4002 /* PIC stubs. */
4003 ? ((globals->use_blx)
4004 /* V5T and above. */
4005 ? arm_stub_long_branch_any_thumb_pic
4006 /* V4T stub. */
4007 : arm_stub_long_branch_v4t_arm_thumb_pic)
4008
4009 /* non-PIC stubs. */
4010 : ((globals->use_blx)
4011 /* V5T and above. */
4012 ? arm_stub_long_branch_any_any
4013 /* V4T. */
4014 : arm_stub_long_branch_v4t_arm_thumb);
4015 }
4016 }
4017 else
4018 {
4019 /* Arm to arm. */
4020 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4021 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4022 {
4023 stub_type =
4024 (bfd_link_pic (info) | globals->pic_veneer)
4025 /* PIC stubs. */
4026 ? (r_type == R_ARM_TLS_CALL
4027 /* TLS PIC Stub. */
4028 ? arm_stub_long_branch_any_tls_pic
4029 : (globals->nacl_p
4030 ? arm_stub_long_branch_arm_nacl_pic
4031 : arm_stub_long_branch_any_arm_pic))
4032 /* non-PIC stubs. */
4033 : (globals->nacl_p
4034 ? arm_stub_long_branch_arm_nacl
4035 : arm_stub_long_branch_any_any);
4036 }
4037 }
4038 }
4039
4040 /* If a stub is needed, record the actual destination type. */
4041 if (stub_type != arm_stub_none)
4042 *actual_branch_type = branch_type;
4043
4044 return stub_type;
4045 }
4046
4047 /* Build a name for an entry in the stub hash table. */
4048
4049 static char *
4050 elf32_arm_stub_name (const asection *input_section,
4051 const asection *sym_sec,
4052 const struct elf32_arm_link_hash_entry *hash,
4053 const Elf_Internal_Rela *rel,
4054 enum elf32_arm_stub_type stub_type)
4055 {
4056 char *stub_name;
4057 bfd_size_type len;
4058
4059 if (hash)
4060 {
4061 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4062 stub_name = (char *) bfd_malloc (len);
4063 if (stub_name != NULL)
4064 sprintf (stub_name, "%08x_%s+%x_%d",
4065 input_section->id & 0xffffffff,
4066 hash->root.root.root.string,
4067 (int) rel->r_addend & 0xffffffff,
4068 (int) stub_type);
4069 }
4070 else
4071 {
4072 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4073 stub_name = (char *) bfd_malloc (len);
4074 if (stub_name != NULL)
4075 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4076 input_section->id & 0xffffffff,
4077 sym_sec->id & 0xffffffff,
4078 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4079 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4080 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4081 (int) rel->r_addend & 0xffffffff,
4082 (int) stub_type);
4083 }
4084
4085 return stub_name;
4086 }
4087
4088 /* Look up an entry in the stub hash. Stub entries are cached because
4089 creating the stub name takes a bit of time. */
4090
4091 static struct elf32_arm_stub_hash_entry *
4092 elf32_arm_get_stub_entry (const asection *input_section,
4093 const asection *sym_sec,
4094 struct elf_link_hash_entry *hash,
4095 const Elf_Internal_Rela *rel,
4096 struct elf32_arm_link_hash_table *htab,
4097 enum elf32_arm_stub_type stub_type)
4098 {
4099 struct elf32_arm_stub_hash_entry *stub_entry;
4100 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4101 const asection *id_sec;
4102
4103 if ((input_section->flags & SEC_CODE) == 0)
4104 return NULL;
4105
4106 /* If this input section is part of a group of sections sharing one
4107 stub section, then use the id of the first section in the group.
4108 Stub names need to include a section id, as there may well be
4109 more than one stub used to reach say, printf, and we need to
4110 distinguish between them. */
4111 id_sec = htab->stub_group[input_section->id].link_sec;
4112
4113 if (h != NULL && h->stub_cache != NULL
4114 && h->stub_cache->h == h
4115 && h->stub_cache->id_sec == id_sec
4116 && h->stub_cache->stub_type == stub_type)
4117 {
4118 stub_entry = h->stub_cache;
4119 }
4120 else
4121 {
4122 char *stub_name;
4123
4124 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4125 if (stub_name == NULL)
4126 return NULL;
4127
4128 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4129 stub_name, FALSE, FALSE);
4130 if (h != NULL)
4131 h->stub_cache = stub_entry;
4132
4133 free (stub_name);
4134 }
4135
4136 return stub_entry;
4137 }
4138
4139 /* Find or create a stub section. Returns a pointer to the stub section, and
4140 the section to which the stub section will be attached (in *LINK_SEC_P).
4141 LINK_SEC_P may be NULL. */
4142
4143 static asection *
4144 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4145 struct elf32_arm_link_hash_table *htab)
4146 {
4147 asection *link_sec;
4148 asection *stub_sec;
4149 asection *out_sec;
4150
4151 link_sec = htab->stub_group[section->id].link_sec;
4152 BFD_ASSERT (link_sec != NULL);
4153 stub_sec = htab->stub_group[section->id].stub_sec;
4154
4155 if (stub_sec == NULL)
4156 {
4157 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4158 if (stub_sec == NULL)
4159 {
4160 size_t namelen;
4161 bfd_size_type len;
4162 char *s_name;
4163
4164 namelen = strlen (link_sec->name);
4165 len = namelen + sizeof (STUB_SUFFIX);
4166 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4167 if (s_name == NULL)
4168 return NULL;
4169
4170 memcpy (s_name, link_sec->name, namelen);
4171 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4172 out_sec = link_sec->output_section;
4173 stub_sec = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4174 htab->nacl_p ? 4 : 3);
4175 if (stub_sec == NULL)
4176 return NULL;
4177 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4178 }
4179 htab->stub_group[section->id].stub_sec = stub_sec;
4180 }
4181
4182 if (link_sec_p)
4183 *link_sec_p = link_sec;
4184
4185 return stub_sec;
4186 }
4187
4188 /* Add a new stub entry to the stub hash. Not all fields of the new
4189 stub entry are initialised. */
4190
4191 static struct elf32_arm_stub_hash_entry *
4192 elf32_arm_add_stub (const char *stub_name,
4193 asection *section,
4194 struct elf32_arm_link_hash_table *htab)
4195 {
4196 asection *link_sec;
4197 asection *stub_sec;
4198 struct elf32_arm_stub_hash_entry *stub_entry;
4199
4200 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4201 if (stub_sec == NULL)
4202 return NULL;
4203
4204 /* Enter this entry into the linker stub hash table. */
4205 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4206 TRUE, FALSE);
4207 if (stub_entry == NULL)
4208 {
4209 if (section == NULL)
4210 section = stub_sec;
4211 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4212 section->owner,
4213 stub_name);
4214 return NULL;
4215 }
4216
4217 stub_entry->stub_sec = stub_sec;
4218 stub_entry->stub_offset = 0;
4219 stub_entry->id_sec = link_sec;
4220
4221 return stub_entry;
4222 }
4223
4224 /* Store an Arm insn into an output section not processed by
4225 elf32_arm_write_section. */
4226
4227 static void
4228 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4229 bfd * output_bfd, bfd_vma val, void * ptr)
4230 {
4231 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4232 bfd_putl32 (val, ptr);
4233 else
4234 bfd_putb32 (val, ptr);
4235 }
4236
4237 /* Store a 16-bit Thumb insn into an output section not processed by
4238 elf32_arm_write_section. */
4239
4240 static void
4241 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4242 bfd * output_bfd, bfd_vma val, void * ptr)
4243 {
4244 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4245 bfd_putl16 (val, ptr);
4246 else
4247 bfd_putb16 (val, ptr);
4248 }
4249
4250 /* Store a Thumb2 insn into an output section not processed by
4251 elf32_arm_write_section. */
4252
4253 static void
4254 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4255 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4256 {
4257 /* T2 instructions are 16-bit streamed. */
4258 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4259 {
4260 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4261 bfd_putl16 ((val & 0xffff), ptr + 2);
4262 }
4263 else
4264 {
4265 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4266 bfd_putb16 ((val & 0xffff), ptr + 2);
4267 }
4268 }
4269
4270 /* If it's possible to change R_TYPE to a more efficient access
4271 model, return the new reloc type. */
4272
4273 static unsigned
4274 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4275 struct elf_link_hash_entry *h)
4276 {
4277 int is_local = (h == NULL);
4278
4279 if (bfd_link_pic (info)
4280 || (h && h->root.type == bfd_link_hash_undefweak))
4281 return r_type;
4282
4283 /* We do not support relaxations for Old TLS models. */
4284 switch (r_type)
4285 {
4286 case R_ARM_TLS_GOTDESC:
4287 case R_ARM_TLS_CALL:
4288 case R_ARM_THM_TLS_CALL:
4289 case R_ARM_TLS_DESCSEQ:
4290 case R_ARM_THM_TLS_DESCSEQ:
4291 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4292 }
4293
4294 return r_type;
4295 }
4296
4297 static bfd_reloc_status_type elf32_arm_final_link_relocate
4298 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4299 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4300 const char *, unsigned char, enum arm_st_branch_type,
4301 struct elf_link_hash_entry *, bfd_boolean *, char **);
4302
4303 static unsigned int
4304 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4305 {
4306 switch (stub_type)
4307 {
4308 case arm_stub_a8_veneer_b_cond:
4309 case arm_stub_a8_veneer_b:
4310 case arm_stub_a8_veneer_bl:
4311 return 2;
4312
4313 case arm_stub_long_branch_any_any:
4314 case arm_stub_long_branch_v4t_arm_thumb:
4315 case arm_stub_long_branch_thumb_only:
4316 case arm_stub_long_branch_v4t_thumb_thumb:
4317 case arm_stub_long_branch_v4t_thumb_arm:
4318 case arm_stub_short_branch_v4t_thumb_arm:
4319 case arm_stub_long_branch_any_arm_pic:
4320 case arm_stub_long_branch_any_thumb_pic:
4321 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4322 case arm_stub_long_branch_v4t_arm_thumb_pic:
4323 case arm_stub_long_branch_v4t_thumb_arm_pic:
4324 case arm_stub_long_branch_thumb_only_pic:
4325 case arm_stub_long_branch_any_tls_pic:
4326 case arm_stub_long_branch_v4t_thumb_tls_pic:
4327 case arm_stub_a8_veneer_blx:
4328 return 4;
4329
4330 case arm_stub_long_branch_arm_nacl:
4331 case arm_stub_long_branch_arm_nacl_pic:
4332 return 16;
4333
4334 default:
4335 abort (); /* Should be unreachable. */
4336 }
4337 }
4338
4339 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4340 veneering (TRUE) or have their own symbol (FALSE). */
4341
4342 static bfd_boolean
4343 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4344 {
4345 if (stub_type >= max_stub_type)
4346 abort (); /* Should be unreachable. */
4347
4348 return FALSE;
4349 }
4350
4351 static bfd_boolean
4352 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4353 void * in_arg)
4354 {
4355 #define MAXRELOCS 3
4356 struct elf32_arm_stub_hash_entry *stub_entry;
4357 struct elf32_arm_link_hash_table *globals;
4358 struct bfd_link_info *info;
4359 asection *stub_sec;
4360 bfd *stub_bfd;
4361 bfd_byte *loc;
4362 bfd_vma sym_value;
4363 int template_size;
4364 int size;
4365 const insn_sequence *template_sequence;
4366 int i;
4367 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4368 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4369 int nrelocs = 0;
4370
4371 /* Massage our args to the form they really have. */
4372 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4373 info = (struct bfd_link_info *) in_arg;
4374
4375 globals = elf32_arm_hash_table (info);
4376 if (globals == NULL)
4377 return FALSE;
4378
4379 stub_sec = stub_entry->stub_sec;
4380
4381 if ((globals->fix_cortex_a8 < 0)
4382 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4383 /* We have to do less-strictly-aligned fixes last. */
4384 return TRUE;
4385
4386 /* Make a note of the offset within the stubs for this entry. */
4387 stub_entry->stub_offset = stub_sec->size;
4388 loc = stub_sec->contents + stub_entry->stub_offset;
4389
4390 stub_bfd = stub_sec->owner;
4391
4392 /* This is the address of the stub destination. */
4393 sym_value = (stub_entry->target_value
4394 + stub_entry->target_section->output_offset
4395 + stub_entry->target_section->output_section->vma);
4396
4397 template_sequence = stub_entry->stub_template;
4398 template_size = stub_entry->stub_template_size;
4399
4400 size = 0;
4401 for (i = 0; i < template_size; i++)
4402 {
4403 switch (template_sequence[i].type)
4404 {
4405 case THUMB16_TYPE:
4406 {
4407 bfd_vma data = (bfd_vma) template_sequence[i].data;
4408 if (template_sequence[i].reloc_addend != 0)
4409 {
4410 /* We've borrowed the reloc_addend field to mean we should
4411 insert a condition code into this (Thumb-1 branch)
4412 instruction. See THUMB16_BCOND_INSN. */
4413 BFD_ASSERT ((data & 0xff00) == 0xd000);
4414 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4415 }
4416 bfd_put_16 (stub_bfd, data, loc + size);
4417 size += 2;
4418 }
4419 break;
4420
4421 case THUMB32_TYPE:
4422 bfd_put_16 (stub_bfd,
4423 (template_sequence[i].data >> 16) & 0xffff,
4424 loc + size);
4425 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4426 loc + size + 2);
4427 if (template_sequence[i].r_type != R_ARM_NONE)
4428 {
4429 stub_reloc_idx[nrelocs] = i;
4430 stub_reloc_offset[nrelocs++] = size;
4431 }
4432 size += 4;
4433 break;
4434
4435 case ARM_TYPE:
4436 bfd_put_32 (stub_bfd, template_sequence[i].data,
4437 loc + size);
4438 /* Handle cases where the target is encoded within the
4439 instruction. */
4440 if (template_sequence[i].r_type == R_ARM_JUMP24)
4441 {
4442 stub_reloc_idx[nrelocs] = i;
4443 stub_reloc_offset[nrelocs++] = size;
4444 }
4445 size += 4;
4446 break;
4447
4448 case DATA_TYPE:
4449 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4450 stub_reloc_idx[nrelocs] = i;
4451 stub_reloc_offset[nrelocs++] = size;
4452 size += 4;
4453 break;
4454
4455 default:
4456 BFD_FAIL ();
4457 return FALSE;
4458 }
4459 }
4460
4461 stub_sec->size += size;
4462
4463 /* Stub size has already been computed in arm_size_one_stub. Check
4464 consistency. */
4465 BFD_ASSERT (size == stub_entry->stub_size);
4466
4467 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4468 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4469 sym_value |= 1;
4470
4471 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4472 in each stub. */
4473 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4474
4475 for (i = 0; i < nrelocs; i++)
4476 {
4477 Elf_Internal_Rela rel;
4478 bfd_boolean unresolved_reloc;
4479 char *error_message;
4480 bfd_vma points_to =
4481 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4482
4483 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4484 rel.r_info = ELF32_R_INFO (0,
4485 template_sequence[stub_reloc_idx[i]].r_type);
4486 rel.r_addend = 0;
4487
4488 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4489 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4490 template should refer back to the instruction after the original
4491 branch. We use target_section as Cortex-A8 erratum workaround stubs
4492 are only generated when both source and target are in the same
4493 section. */
4494 points_to = stub_entry->target_section->output_section->vma
4495 + stub_entry->target_section->output_offset
4496 + stub_entry->source_value;
4497
4498 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4499 (template_sequence[stub_reloc_idx[i]].r_type),
4500 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4501 points_to, info, stub_entry->target_section, "", STT_FUNC,
4502 stub_entry->branch_type,
4503 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4504 &error_message);
4505 }
4506
4507 return TRUE;
4508 #undef MAXRELOCS
4509 }
4510
4511 /* Calculate the template, template size and instruction size for a stub.
4512 Return value is the instruction size. */
4513
4514 static unsigned int
4515 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4516 const insn_sequence **stub_template,
4517 int *stub_template_size)
4518 {
4519 const insn_sequence *template_sequence = NULL;
4520 int template_size = 0, i;
4521 unsigned int size;
4522
4523 template_sequence = stub_definitions[stub_type].template_sequence;
4524 if (stub_template)
4525 *stub_template = template_sequence;
4526
4527 template_size = stub_definitions[stub_type].template_size;
4528 if (stub_template_size)
4529 *stub_template_size = template_size;
4530
4531 size = 0;
4532 for (i = 0; i < template_size; i++)
4533 {
4534 switch (template_sequence[i].type)
4535 {
4536 case THUMB16_TYPE:
4537 size += 2;
4538 break;
4539
4540 case ARM_TYPE:
4541 case THUMB32_TYPE:
4542 case DATA_TYPE:
4543 size += 4;
4544 break;
4545
4546 default:
4547 BFD_FAIL ();
4548 return 0;
4549 }
4550 }
4551
4552 return size;
4553 }
4554
4555 /* As above, but don't actually build the stub. Just bump offset so
4556 we know stub section sizes. */
4557
4558 static bfd_boolean
4559 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4560 void *in_arg ATTRIBUTE_UNUSED)
4561 {
4562 struct elf32_arm_stub_hash_entry *stub_entry;
4563 const insn_sequence *template_sequence;
4564 int template_size, size;
4565
4566 /* Massage our args to the form they really have. */
4567 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4568
4569 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4570 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4571
4572 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4573 &template_size);
4574
4575 stub_entry->stub_size = size;
4576 stub_entry->stub_template = template_sequence;
4577 stub_entry->stub_template_size = template_size;
4578
4579 size = (size + 7) & ~7;
4580 stub_entry->stub_sec->size += size;
4581
4582 return TRUE;
4583 }
4584
4585 /* External entry points for sizing and building linker stubs. */
4586
4587 /* Set up various things so that we can make a list of input sections
4588 for each output section included in the link. Returns -1 on error,
4589 0 when no stubs will be needed, and 1 on success. */
4590
4591 int
4592 elf32_arm_setup_section_lists (bfd *output_bfd,
4593 struct bfd_link_info *info)
4594 {
4595 bfd *input_bfd;
4596 unsigned int bfd_count;
4597 unsigned int top_id, top_index;
4598 asection *section;
4599 asection **input_list, **list;
4600 bfd_size_type amt;
4601 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4602
4603 if (htab == NULL)
4604 return 0;
4605 if (! is_elf_hash_table (htab))
4606 return 0;
4607
4608 /* Count the number of input BFDs and find the top input section id. */
4609 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4610 input_bfd != NULL;
4611 input_bfd = input_bfd->link.next)
4612 {
4613 bfd_count += 1;
4614 for (section = input_bfd->sections;
4615 section != NULL;
4616 section = section->next)
4617 {
4618 if (top_id < section->id)
4619 top_id = section->id;
4620 }
4621 }
4622 htab->bfd_count = bfd_count;
4623
4624 amt = sizeof (struct map_stub) * (top_id + 1);
4625 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4626 if (htab->stub_group == NULL)
4627 return -1;
4628 htab->top_id = top_id;
4629
4630 /* We can't use output_bfd->section_count here to find the top output
4631 section index as some sections may have been removed, and
4632 _bfd_strip_section_from_output doesn't renumber the indices. */
4633 for (section = output_bfd->sections, top_index = 0;
4634 section != NULL;
4635 section = section->next)
4636 {
4637 if (top_index < section->index)
4638 top_index = section->index;
4639 }
4640
4641 htab->top_index = top_index;
4642 amt = sizeof (asection *) * (top_index + 1);
4643 input_list = (asection **) bfd_malloc (amt);
4644 htab->input_list = input_list;
4645 if (input_list == NULL)
4646 return -1;
4647
4648 /* For sections we aren't interested in, mark their entries with a
4649 value we can check later. */
4650 list = input_list + top_index;
4651 do
4652 *list = bfd_abs_section_ptr;
4653 while (list-- != input_list);
4654
4655 for (section = output_bfd->sections;
4656 section != NULL;
4657 section = section->next)
4658 {
4659 if ((section->flags & SEC_CODE) != 0)
4660 input_list[section->index] = NULL;
4661 }
4662
4663 return 1;
4664 }
4665
4666 /* The linker repeatedly calls this function for each input section,
4667 in the order that input sections are linked into output sections.
4668 Build lists of input sections to determine groupings between which
4669 we may insert linker stubs. */
4670
4671 void
4672 elf32_arm_next_input_section (struct bfd_link_info *info,
4673 asection *isec)
4674 {
4675 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4676
4677 if (htab == NULL)
4678 return;
4679
4680 if (isec->output_section->index <= htab->top_index)
4681 {
4682 asection **list = htab->input_list + isec->output_section->index;
4683
4684 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4685 {
4686 /* Steal the link_sec pointer for our list. */
4687 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4688 /* This happens to make the list in reverse order,
4689 which we reverse later. */
4690 PREV_SEC (isec) = *list;
4691 *list = isec;
4692 }
4693 }
4694 }
4695
4696 /* See whether we can group stub sections together. Grouping stub
4697 sections may result in fewer stubs. More importantly, we need to
4698 put all .init* and .fini* stubs at the end of the .init or
4699 .fini output sections respectively, because glibc splits the
4700 _init and _fini functions into multiple parts. Putting a stub in
4701 the middle of a function is not a good idea. */
4702
4703 static void
4704 group_sections (struct elf32_arm_link_hash_table *htab,
4705 bfd_size_type stub_group_size,
4706 bfd_boolean stubs_always_after_branch)
4707 {
4708 asection **list = htab->input_list;
4709
4710 do
4711 {
4712 asection *tail = *list;
4713 asection *head;
4714
4715 if (tail == bfd_abs_section_ptr)
4716 continue;
4717
4718 /* Reverse the list: we must avoid placing stubs at the
4719 beginning of the section because the beginning of the text
4720 section may be required for an interrupt vector in bare metal
4721 code. */
4722 #define NEXT_SEC PREV_SEC
4723 head = NULL;
4724 while (tail != NULL)
4725 {
4726 /* Pop from tail. */
4727 asection *item = tail;
4728 tail = PREV_SEC (item);
4729
4730 /* Push on head. */
4731 NEXT_SEC (item) = head;
4732 head = item;
4733 }
4734
4735 while (head != NULL)
4736 {
4737 asection *curr;
4738 asection *next;
4739 bfd_vma stub_group_start = head->output_offset;
4740 bfd_vma end_of_next;
4741
4742 curr = head;
4743 while (NEXT_SEC (curr) != NULL)
4744 {
4745 next = NEXT_SEC (curr);
4746 end_of_next = next->output_offset + next->size;
4747 if (end_of_next - stub_group_start >= stub_group_size)
4748 /* End of NEXT is too far from start, so stop. */
4749 break;
4750 /* Add NEXT to the group. */
4751 curr = next;
4752 }
4753
4754 /* OK, the size from the start to the start of CURR is less
4755 than stub_group_size and thus can be handled by one stub
4756 section. (Or the head section is itself larger than
4757 stub_group_size, in which case we may be toast.)
4758 We should really be keeping track of the total size of
4759 stubs added here, as stubs contribute to the final output
4760 section size. */
4761 do
4762 {
4763 next = NEXT_SEC (head);
4764 /* Set up this stub group. */
4765 htab->stub_group[head->id].link_sec = curr;
4766 }
4767 while (head != curr && (head = next) != NULL);
4768
4769 /* But wait, there's more! Input sections up to stub_group_size
4770 bytes after the stub section can be handled by it too. */
4771 if (!stubs_always_after_branch)
4772 {
4773 stub_group_start = curr->output_offset + curr->size;
4774
4775 while (next != NULL)
4776 {
4777 end_of_next = next->output_offset + next->size;
4778 if (end_of_next - stub_group_start >= stub_group_size)
4779 /* End of NEXT is too far from stubs, so stop. */
4780 break;
4781 /* Add NEXT to the stub group. */
4782 head = next;
4783 next = NEXT_SEC (head);
4784 htab->stub_group[head->id].link_sec = curr;
4785 }
4786 }
4787 head = next;
4788 }
4789 }
4790 while (list++ != htab->input_list + htab->top_index);
4791
4792 free (htab->input_list);
4793 #undef PREV_SEC
4794 #undef NEXT_SEC
4795 }
4796
4797 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4798 erratum fix. */
4799
4800 static int
4801 a8_reloc_compare (const void *a, const void *b)
4802 {
4803 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4804 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4805
4806 if (ra->from < rb->from)
4807 return -1;
4808 else if (ra->from > rb->from)
4809 return 1;
4810 else
4811 return 0;
4812 }
4813
4814 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4815 const char *, char **);
4816
4817 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4818 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4819 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4820 otherwise. */
4821
4822 static bfd_boolean
4823 cortex_a8_erratum_scan (bfd *input_bfd,
4824 struct bfd_link_info *info,
4825 struct a8_erratum_fix **a8_fixes_p,
4826 unsigned int *num_a8_fixes_p,
4827 unsigned int *a8_fix_table_size_p,
4828 struct a8_erratum_reloc *a8_relocs,
4829 unsigned int num_a8_relocs,
4830 unsigned prev_num_a8_fixes,
4831 bfd_boolean *stub_changed_p)
4832 {
4833 asection *section;
4834 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4835 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4836 unsigned int num_a8_fixes = *num_a8_fixes_p;
4837 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4838
4839 if (htab == NULL)
4840 return FALSE;
4841
4842 for (section = input_bfd->sections;
4843 section != NULL;
4844 section = section->next)
4845 {
4846 bfd_byte *contents = NULL;
4847 struct _arm_elf_section_data *sec_data;
4848 unsigned int span;
4849 bfd_vma base_vma;
4850
4851 if (elf_section_type (section) != SHT_PROGBITS
4852 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4853 || (section->flags & SEC_EXCLUDE) != 0
4854 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4855 || (section->output_section == bfd_abs_section_ptr))
4856 continue;
4857
4858 base_vma = section->output_section->vma + section->output_offset;
4859
4860 if (elf_section_data (section)->this_hdr.contents != NULL)
4861 contents = elf_section_data (section)->this_hdr.contents;
4862 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4863 return TRUE;
4864
4865 sec_data = elf32_arm_section_data (section);
4866
4867 for (span = 0; span < sec_data->mapcount; span++)
4868 {
4869 unsigned int span_start = sec_data->map[span].vma;
4870 unsigned int span_end = (span == sec_data->mapcount - 1)
4871 ? section->size : sec_data->map[span + 1].vma;
4872 unsigned int i;
4873 char span_type = sec_data->map[span].type;
4874 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4875
4876 if (span_type != 't')
4877 continue;
4878
4879 /* Span is entirely within a single 4KB region: skip scanning. */
4880 if (((base_vma + span_start) & ~0xfff)
4881 == ((base_vma + span_end) & ~0xfff))
4882 continue;
4883
4884 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4885
4886 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4887 * The branch target is in the same 4KB region as the
4888 first half of the branch.
4889 * The instruction before the branch is a 32-bit
4890 length non-branch instruction. */
4891 for (i = span_start; i < span_end;)
4892 {
4893 unsigned int insn = bfd_getl16 (&contents[i]);
4894 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4895 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4896
4897 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4898 insn_32bit = TRUE;
4899
4900 if (insn_32bit)
4901 {
4902 /* Load the rest of the insn (in manual-friendly order). */
4903 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4904
4905 /* Encoding T4: B<c>.W. */
4906 is_b = (insn & 0xf800d000) == 0xf0009000;
4907 /* Encoding T1: BL<c>.W. */
4908 is_bl = (insn & 0xf800d000) == 0xf000d000;
4909 /* Encoding T2: BLX<c>.W. */
4910 is_blx = (insn & 0xf800d000) == 0xf000c000;
4911 /* Encoding T3: B<c>.W (not permitted in IT block). */
4912 is_bcc = (insn & 0xf800d000) == 0xf0008000
4913 && (insn & 0x07f00000) != 0x03800000;
4914 }
4915
4916 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4917
4918 if (((base_vma + i) & 0xfff) == 0xffe
4919 && insn_32bit
4920 && is_32bit_branch
4921 && last_was_32bit
4922 && ! last_was_branch)
4923 {
4924 bfd_signed_vma offset = 0;
4925 bfd_boolean force_target_arm = FALSE;
4926 bfd_boolean force_target_thumb = FALSE;
4927 bfd_vma target;
4928 enum elf32_arm_stub_type stub_type = arm_stub_none;
4929 struct a8_erratum_reloc key, *found;
4930 bfd_boolean use_plt = FALSE;
4931
4932 key.from = base_vma + i;
4933 found = (struct a8_erratum_reloc *)
4934 bsearch (&key, a8_relocs, num_a8_relocs,
4935 sizeof (struct a8_erratum_reloc),
4936 &a8_reloc_compare);
4937
4938 if (found)
4939 {
4940 char *error_message = NULL;
4941 struct elf_link_hash_entry *entry;
4942
4943 /* We don't care about the error returned from this
4944 function, only if there is glue or not. */
4945 entry = find_thumb_glue (info, found->sym_name,
4946 &error_message);
4947
4948 if (entry)
4949 found->non_a8_stub = TRUE;
4950
4951 /* Keep a simpler condition, for the sake of clarity. */
4952 if (htab->root.splt != NULL && found->hash != NULL
4953 && found->hash->root.plt.offset != (bfd_vma) -1)
4954 use_plt = TRUE;
4955
4956 if (found->r_type == R_ARM_THM_CALL)
4957 {
4958 if (found->branch_type == ST_BRANCH_TO_ARM
4959 || use_plt)
4960 force_target_arm = TRUE;
4961 else
4962 force_target_thumb = TRUE;
4963 }
4964 }
4965
4966 /* Check if we have an offending branch instruction. */
4967
4968 if (found && found->non_a8_stub)
4969 /* We've already made a stub for this instruction, e.g.
4970 it's a long branch or a Thumb->ARM stub. Assume that
4971 stub will suffice to work around the A8 erratum (see
4972 setting of always_after_branch above). */
4973 ;
4974 else if (is_bcc)
4975 {
4976 offset = (insn & 0x7ff) << 1;
4977 offset |= (insn & 0x3f0000) >> 4;
4978 offset |= (insn & 0x2000) ? 0x40000 : 0;
4979 offset |= (insn & 0x800) ? 0x80000 : 0;
4980 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4981 if (offset & 0x100000)
4982 offset |= ~ ((bfd_signed_vma) 0xfffff);
4983 stub_type = arm_stub_a8_veneer_b_cond;
4984 }
4985 else if (is_b || is_bl || is_blx)
4986 {
4987 int s = (insn & 0x4000000) != 0;
4988 int j1 = (insn & 0x2000) != 0;
4989 int j2 = (insn & 0x800) != 0;
4990 int i1 = !(j1 ^ s);
4991 int i2 = !(j2 ^ s);
4992
4993 offset = (insn & 0x7ff) << 1;
4994 offset |= (insn & 0x3ff0000) >> 4;
4995 offset |= i2 << 22;
4996 offset |= i1 << 23;
4997 offset |= s << 24;
4998 if (offset & 0x1000000)
4999 offset |= ~ ((bfd_signed_vma) 0xffffff);
5000
5001 if (is_blx)
5002 offset &= ~ ((bfd_signed_vma) 3);
5003
5004 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5005 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5006 }
5007
5008 if (stub_type != arm_stub_none)
5009 {
5010 bfd_vma pc_for_insn = base_vma + i + 4;
5011
5012 /* The original instruction is a BL, but the target is
5013 an ARM instruction. If we were not making a stub,
5014 the BL would have been converted to a BLX. Use the
5015 BLX stub instead in that case. */
5016 if (htab->use_blx && force_target_arm
5017 && stub_type == arm_stub_a8_veneer_bl)
5018 {
5019 stub_type = arm_stub_a8_veneer_blx;
5020 is_blx = TRUE;
5021 is_bl = FALSE;
5022 }
5023 /* Conversely, if the original instruction was
5024 BLX but the target is Thumb mode, use the BL
5025 stub. */
5026 else if (force_target_thumb
5027 && stub_type == arm_stub_a8_veneer_blx)
5028 {
5029 stub_type = arm_stub_a8_veneer_bl;
5030 is_blx = FALSE;
5031 is_bl = TRUE;
5032 }
5033
5034 if (is_blx)
5035 pc_for_insn &= ~ ((bfd_vma) 3);
5036
5037 /* If we found a relocation, use the proper destination,
5038 not the offset in the (unrelocated) instruction.
5039 Note this is always done if we switched the stub type
5040 above. */
5041 if (found)
5042 offset =
5043 (bfd_signed_vma) (found->destination - pc_for_insn);
5044
5045 /* If the stub will use a Thumb-mode branch to a
5046 PLT target, redirect it to the preceding Thumb
5047 entry point. */
5048 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5049 offset -= PLT_THUMB_STUB_SIZE;
5050
5051 target = pc_for_insn + offset;
5052
5053 /* The BLX stub is ARM-mode code. Adjust the offset to
5054 take the different PC value (+8 instead of +4) into
5055 account. */
5056 if (stub_type == arm_stub_a8_veneer_blx)
5057 offset += 4;
5058
5059 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5060 {
5061 char *stub_name = NULL;
5062
5063 if (num_a8_fixes == a8_fix_table_size)
5064 {
5065 a8_fix_table_size *= 2;
5066 a8_fixes = (struct a8_erratum_fix *)
5067 bfd_realloc (a8_fixes,
5068 sizeof (struct a8_erratum_fix)
5069 * a8_fix_table_size);
5070 }
5071
5072 if (num_a8_fixes < prev_num_a8_fixes)
5073 {
5074 /* If we're doing a subsequent scan,
5075 check if we've found the same fix as
5076 before, and try and reuse the stub
5077 name. */
5078 stub_name = a8_fixes[num_a8_fixes].stub_name;
5079 if ((a8_fixes[num_a8_fixes].section != section)
5080 || (a8_fixes[num_a8_fixes].offset != i))
5081 {
5082 free (stub_name);
5083 stub_name = NULL;
5084 *stub_changed_p = TRUE;
5085 }
5086 }
5087
5088 if (!stub_name)
5089 {
5090 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5091 if (stub_name != NULL)
5092 sprintf (stub_name, "%x:%x", section->id, i);
5093 }
5094
5095 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5096 a8_fixes[num_a8_fixes].section = section;
5097 a8_fixes[num_a8_fixes].offset = i;
5098 a8_fixes[num_a8_fixes].target_offset =
5099 target - base_vma;
5100 a8_fixes[num_a8_fixes].orig_insn = insn;
5101 a8_fixes[num_a8_fixes].stub_name = stub_name;
5102 a8_fixes[num_a8_fixes].stub_type = stub_type;
5103 a8_fixes[num_a8_fixes].branch_type =
5104 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5105
5106 num_a8_fixes++;
5107 }
5108 }
5109 }
5110
5111 i += insn_32bit ? 4 : 2;
5112 last_was_32bit = insn_32bit;
5113 last_was_branch = is_32bit_branch;
5114 }
5115 }
5116
5117 if (elf_section_data (section)->this_hdr.contents == NULL)
5118 free (contents);
5119 }
5120
5121 *a8_fixes_p = a8_fixes;
5122 *num_a8_fixes_p = num_a8_fixes;
5123 *a8_fix_table_size_p = a8_fix_table_size;
5124
5125 return FALSE;
5126 }
5127
5128 /* Create or update a stub entry depending on whether the stub can already be
5129 found in HTAB. The stub is identified by:
5130 - its type STUB_TYPE
5131 - its source branch (note that several can share the same stub) whose
5132 section and relocation (if any) are given by SECTION and IRELA
5133 respectively
5134 - its target symbol whose input section, hash, name, value and branch type
5135 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5136 respectively
5137
5138 If found, the value of the stub's target symbol is updated from SYM_VALUE
5139 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5140 TRUE and the stub entry is initialized.
5141
5142 Returns whether the stub could be successfully created or updated, or FALSE
5143 if an error occured. */
5144
5145 static bfd_boolean
5146 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5147 enum elf32_arm_stub_type stub_type, asection *section,
5148 Elf_Internal_Rela *irela, asection *sym_sec,
5149 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5150 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5151 bfd_boolean *new_stub)
5152 {
5153 const asection *id_sec;
5154 char *stub_name;
5155 struct elf32_arm_stub_hash_entry *stub_entry;
5156 unsigned int r_type;
5157 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5158
5159 BFD_ASSERT (stub_type != arm_stub_none);
5160 *new_stub = FALSE;
5161
5162 if (sym_claimed)
5163 stub_name = sym_name;
5164 else
5165 {
5166 BFD_ASSERT (irela);
5167 BFD_ASSERT (section);
5168
5169 /* Support for grouping stub sections. */
5170 id_sec = htab->stub_group[section->id].link_sec;
5171
5172 /* Get the name of this stub. */
5173 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5174 stub_type);
5175 if (!stub_name)
5176 return FALSE;
5177 }
5178
5179 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5180 FALSE);
5181 /* The proper stub has already been created, just update its value. */
5182 if (stub_entry != NULL)
5183 {
5184 if (!sym_claimed)
5185 free (stub_name);
5186 stub_entry->target_value = sym_value;
5187 return TRUE;
5188 }
5189
5190 stub_entry = elf32_arm_add_stub (stub_name, section, htab);
5191 if (stub_entry == NULL)
5192 {
5193 if (!sym_claimed)
5194 free (stub_name);
5195 return FALSE;
5196 }
5197
5198 stub_entry->target_value = sym_value;
5199 stub_entry->target_section = sym_sec;
5200 stub_entry->stub_type = stub_type;
5201 stub_entry->h = hash;
5202 stub_entry->branch_type = branch_type;
5203
5204 if (sym_claimed)
5205 stub_entry->output_name = sym_name;
5206 else
5207 {
5208 if (sym_name == NULL)
5209 sym_name = "unnamed";
5210 stub_entry->output_name = (char *)
5211 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5212 + strlen (sym_name));
5213 if (stub_entry->output_name == NULL)
5214 {
5215 free (stub_name);
5216 return FALSE;
5217 }
5218
5219 /* For historical reasons, use the existing names for ARM-to-Thumb and
5220 Thumb-to-ARM stubs. */
5221 r_type = ELF32_R_TYPE (irela->r_info);
5222 if ((r_type == (unsigned int) R_ARM_THM_CALL
5223 || r_type == (unsigned int) R_ARM_THM_JUMP24
5224 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5225 && branch_type == ST_BRANCH_TO_ARM)
5226 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5227 else if ((r_type == (unsigned int) R_ARM_CALL
5228 || r_type == (unsigned int) R_ARM_JUMP24)
5229 && branch_type == ST_BRANCH_TO_THUMB)
5230 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5231 else
5232 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5233 }
5234
5235 *new_stub = TRUE;
5236 return TRUE;
5237 }
5238
5239 /* Determine and set the size of the stub section for a final link.
5240
5241 The basic idea here is to examine all the relocations looking for
5242 PC-relative calls to a target that is unreachable with a "bl"
5243 instruction. */
5244
5245 bfd_boolean
5246 elf32_arm_size_stubs (bfd *output_bfd,
5247 bfd *stub_bfd,
5248 struct bfd_link_info *info,
5249 bfd_signed_vma group_size,
5250 asection * (*add_stub_section) (const char *, asection *,
5251 asection *,
5252 unsigned int),
5253 void (*layout_sections_again) (void))
5254 {
5255 bfd_size_type stub_group_size;
5256 bfd_boolean stubs_always_after_branch;
5257 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5258 struct a8_erratum_fix *a8_fixes = NULL;
5259 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
5260 struct a8_erratum_reloc *a8_relocs = NULL;
5261 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
5262
5263 if (htab == NULL)
5264 return FALSE;
5265
5266 if (htab->fix_cortex_a8)
5267 {
5268 a8_fixes = (struct a8_erratum_fix *)
5269 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
5270 a8_relocs = (struct a8_erratum_reloc *)
5271 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
5272 }
5273
5274 /* Propagate mach to stub bfd, because it may not have been
5275 finalized when we created stub_bfd. */
5276 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5277 bfd_get_mach (output_bfd));
5278
5279 /* Stash our params away. */
5280 htab->stub_bfd = stub_bfd;
5281 htab->add_stub_section = add_stub_section;
5282 htab->layout_sections_again = layout_sections_again;
5283 stubs_always_after_branch = group_size < 0;
5284
5285 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5286 as the first half of a 32-bit branch straddling two 4K pages. This is a
5287 crude way of enforcing that. */
5288 if (htab->fix_cortex_a8)
5289 stubs_always_after_branch = 1;
5290
5291 if (group_size < 0)
5292 stub_group_size = -group_size;
5293 else
5294 stub_group_size = group_size;
5295
5296 if (stub_group_size == 1)
5297 {
5298 /* Default values. */
5299 /* Thumb branch range is +-4MB has to be used as the default
5300 maximum size (a given section can contain both ARM and Thumb
5301 code, so the worst case has to be taken into account).
5302
5303 This value is 24K less than that, which allows for 2025
5304 12-byte stubs. If we exceed that, then we will fail to link.
5305 The user will have to relink with an explicit group size
5306 option. */
5307 stub_group_size = 4170000;
5308 }
5309
5310 group_sections (htab, stub_group_size, stubs_always_after_branch);
5311
5312 /* If we're applying the cortex A8 fix, we need to determine the
5313 program header size now, because we cannot change it later --
5314 that could alter section placements. Notice the A8 erratum fix
5315 ends up requiring the section addresses to remain unchanged
5316 modulo the page size. That's something we cannot represent
5317 inside BFD, and we don't want to force the section alignment to
5318 be the page size. */
5319 if (htab->fix_cortex_a8)
5320 (*htab->layout_sections_again) ();
5321
5322 while (1)
5323 {
5324 bfd *input_bfd;
5325 unsigned int bfd_indx;
5326 asection *stub_sec;
5327 bfd_boolean stub_changed = FALSE;
5328 unsigned prev_num_a8_fixes = num_a8_fixes;
5329
5330 num_a8_fixes = 0;
5331 for (input_bfd = info->input_bfds, bfd_indx = 0;
5332 input_bfd != NULL;
5333 input_bfd = input_bfd->link.next, bfd_indx++)
5334 {
5335 Elf_Internal_Shdr *symtab_hdr;
5336 asection *section;
5337 Elf_Internal_Sym *local_syms = NULL;
5338
5339 if (!is_arm_elf (input_bfd))
5340 continue;
5341
5342 num_a8_relocs = 0;
5343
5344 /* We'll need the symbol table in a second. */
5345 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5346 if (symtab_hdr->sh_info == 0)
5347 continue;
5348
5349 /* Walk over each section attached to the input bfd. */
5350 for (section = input_bfd->sections;
5351 section != NULL;
5352 section = section->next)
5353 {
5354 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5355
5356 /* If there aren't any relocs, then there's nothing more
5357 to do. */
5358 if ((section->flags & SEC_RELOC) == 0
5359 || section->reloc_count == 0
5360 || (section->flags & SEC_CODE) == 0)
5361 continue;
5362
5363 /* If this section is a link-once section that will be
5364 discarded, then don't create any stubs. */
5365 if (section->output_section == NULL
5366 || section->output_section->owner != output_bfd)
5367 continue;
5368
5369 /* Get the relocs. */
5370 internal_relocs
5371 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5372 NULL, info->keep_memory);
5373 if (internal_relocs == NULL)
5374 goto error_ret_free_local;
5375
5376 /* Now examine each relocation. */
5377 irela = internal_relocs;
5378 irelaend = irela + section->reloc_count;
5379 for (; irela < irelaend; irela++)
5380 {
5381 unsigned int r_type, r_indx;
5382 enum elf32_arm_stub_type stub_type;
5383 asection *sym_sec;
5384 bfd_vma sym_value;
5385 bfd_vma destination;
5386 struct elf32_arm_link_hash_entry *hash;
5387 const char *sym_name;
5388 unsigned char st_type;
5389 enum arm_st_branch_type branch_type;
5390 bfd_boolean created_stub = FALSE;
5391
5392 r_type = ELF32_R_TYPE (irela->r_info);
5393 r_indx = ELF32_R_SYM (irela->r_info);
5394
5395 if (r_type >= (unsigned int) R_ARM_max)
5396 {
5397 bfd_set_error (bfd_error_bad_value);
5398 error_ret_free_internal:
5399 if (elf_section_data (section)->relocs == NULL)
5400 free (internal_relocs);
5401 /* Fall through. */
5402 error_ret_free_local:
5403 if (local_syms != NULL
5404 && (symtab_hdr->contents
5405 != (unsigned char *) local_syms))
5406 free (local_syms);
5407 return FALSE;
5408 }
5409
5410 hash = NULL;
5411 if (r_indx >= symtab_hdr->sh_info)
5412 hash = elf32_arm_hash_entry
5413 (elf_sym_hashes (input_bfd)
5414 [r_indx - symtab_hdr->sh_info]);
5415
5416 /* Only look for stubs on branch instructions, or
5417 non-relaxed TLSCALL */
5418 if ((r_type != (unsigned int) R_ARM_CALL)
5419 && (r_type != (unsigned int) R_ARM_THM_CALL)
5420 && (r_type != (unsigned int) R_ARM_JUMP24)
5421 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5422 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5423 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5424 && (r_type != (unsigned int) R_ARM_PLT32)
5425 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5426 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5427 && r_type == elf32_arm_tls_transition
5428 (info, r_type, &hash->root)
5429 && ((hash ? hash->tls_type
5430 : (elf32_arm_local_got_tls_type
5431 (input_bfd)[r_indx]))
5432 & GOT_TLS_GDESC) != 0))
5433 continue;
5434
5435 /* Now determine the call target, its name, value,
5436 section. */
5437 sym_sec = NULL;
5438 sym_value = 0;
5439 destination = 0;
5440 sym_name = NULL;
5441
5442 if (r_type == (unsigned int) R_ARM_TLS_CALL
5443 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5444 {
5445 /* A non-relaxed TLS call. The target is the
5446 plt-resident trampoline and nothing to do
5447 with the symbol. */
5448 BFD_ASSERT (htab->tls_trampoline > 0);
5449 sym_sec = htab->root.splt;
5450 sym_value = htab->tls_trampoline;
5451 hash = 0;
5452 st_type = STT_FUNC;
5453 branch_type = ST_BRANCH_TO_ARM;
5454 }
5455 else if (!hash)
5456 {
5457 /* It's a local symbol. */
5458 Elf_Internal_Sym *sym;
5459
5460 if (local_syms == NULL)
5461 {
5462 local_syms
5463 = (Elf_Internal_Sym *) symtab_hdr->contents;
5464 if (local_syms == NULL)
5465 local_syms
5466 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5467 symtab_hdr->sh_info, 0,
5468 NULL, NULL, NULL);
5469 if (local_syms == NULL)
5470 goto error_ret_free_internal;
5471 }
5472
5473 sym = local_syms + r_indx;
5474 if (sym->st_shndx == SHN_UNDEF)
5475 sym_sec = bfd_und_section_ptr;
5476 else if (sym->st_shndx == SHN_ABS)
5477 sym_sec = bfd_abs_section_ptr;
5478 else if (sym->st_shndx == SHN_COMMON)
5479 sym_sec = bfd_com_section_ptr;
5480 else
5481 sym_sec =
5482 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5483
5484 if (!sym_sec)
5485 /* This is an undefined symbol. It can never
5486 be resolved. */
5487 continue;
5488
5489 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5490 sym_value = sym->st_value;
5491 destination = (sym_value + irela->r_addend
5492 + sym_sec->output_offset
5493 + sym_sec->output_section->vma);
5494 st_type = ELF_ST_TYPE (sym->st_info);
5495 branch_type =
5496 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
5497 sym_name
5498 = bfd_elf_string_from_elf_section (input_bfd,
5499 symtab_hdr->sh_link,
5500 sym->st_name);
5501 }
5502 else
5503 {
5504 /* It's an external symbol. */
5505 while (hash->root.root.type == bfd_link_hash_indirect
5506 || hash->root.root.type == bfd_link_hash_warning)
5507 hash = ((struct elf32_arm_link_hash_entry *)
5508 hash->root.root.u.i.link);
5509
5510 if (hash->root.root.type == bfd_link_hash_defined
5511 || hash->root.root.type == bfd_link_hash_defweak)
5512 {
5513 sym_sec = hash->root.root.u.def.section;
5514 sym_value = hash->root.root.u.def.value;
5515
5516 struct elf32_arm_link_hash_table *globals =
5517 elf32_arm_hash_table (info);
5518
5519 /* For a destination in a shared library,
5520 use the PLT stub as target address to
5521 decide whether a branch stub is
5522 needed. */
5523 if (globals != NULL
5524 && globals->root.splt != NULL
5525 && hash != NULL
5526 && hash->root.plt.offset != (bfd_vma) -1)
5527 {
5528 sym_sec = globals->root.splt;
5529 sym_value = hash->root.plt.offset;
5530 if (sym_sec->output_section != NULL)
5531 destination = (sym_value
5532 + sym_sec->output_offset
5533 + sym_sec->output_section->vma);
5534 }
5535 else if (sym_sec->output_section != NULL)
5536 destination = (sym_value + irela->r_addend
5537 + sym_sec->output_offset
5538 + sym_sec->output_section->vma);
5539 }
5540 else if ((hash->root.root.type == bfd_link_hash_undefined)
5541 || (hash->root.root.type == bfd_link_hash_undefweak))
5542 {
5543 /* For a shared library, use the PLT stub as
5544 target address to decide whether a long
5545 branch stub is needed.
5546 For absolute code, they cannot be handled. */
5547 struct elf32_arm_link_hash_table *globals =
5548 elf32_arm_hash_table (info);
5549
5550 if (globals != NULL
5551 && globals->root.splt != NULL
5552 && hash != NULL
5553 && hash->root.plt.offset != (bfd_vma) -1)
5554 {
5555 sym_sec = globals->root.splt;
5556 sym_value = hash->root.plt.offset;
5557 if (sym_sec->output_section != NULL)
5558 destination = (sym_value
5559 + sym_sec->output_offset
5560 + sym_sec->output_section->vma);
5561 }
5562 else
5563 continue;
5564 }
5565 else
5566 {
5567 bfd_set_error (bfd_error_bad_value);
5568 goto error_ret_free_internal;
5569 }
5570 st_type = hash->root.type;
5571 branch_type =
5572 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5573 sym_name = hash->root.root.root.string;
5574 }
5575
5576 do
5577 {
5578 bfd_boolean new_stub;
5579
5580 /* Determine what (if any) linker stub is needed. */
5581 stub_type = arm_type_of_stub (info, section, irela,
5582 st_type, &branch_type,
5583 hash, destination, sym_sec,
5584 input_bfd, sym_name);
5585 if (stub_type == arm_stub_none)
5586 break;
5587
5588 /* We've either created a stub for this reloc already,
5589 or we are about to. */
5590 created_stub =
5591 elf32_arm_create_stub (htab, stub_type, section, irela,
5592 sym_sec, hash,
5593 (char *) sym_name, sym_value,
5594 branch_type, &new_stub);
5595
5596 if (!created_stub)
5597 goto error_ret_free_internal;
5598 else if (!new_stub)
5599 break;
5600 else
5601 stub_changed = TRUE;
5602 }
5603 while (0);
5604
5605 /* Look for relocations which might trigger Cortex-A8
5606 erratum. */
5607 if (htab->fix_cortex_a8
5608 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5609 || r_type == (unsigned int) R_ARM_THM_JUMP19
5610 || r_type == (unsigned int) R_ARM_THM_CALL
5611 || r_type == (unsigned int) R_ARM_THM_XPC22))
5612 {
5613 bfd_vma from = section->output_section->vma
5614 + section->output_offset
5615 + irela->r_offset;
5616
5617 if ((from & 0xfff) == 0xffe)
5618 {
5619 /* Found a candidate. Note we haven't checked the
5620 destination is within 4K here: if we do so (and
5621 don't create an entry in a8_relocs) we can't tell
5622 that a branch should have been relocated when
5623 scanning later. */
5624 if (num_a8_relocs == a8_reloc_table_size)
5625 {
5626 a8_reloc_table_size *= 2;
5627 a8_relocs = (struct a8_erratum_reloc *)
5628 bfd_realloc (a8_relocs,
5629 sizeof (struct a8_erratum_reloc)
5630 * a8_reloc_table_size);
5631 }
5632
5633 a8_relocs[num_a8_relocs].from = from;
5634 a8_relocs[num_a8_relocs].destination = destination;
5635 a8_relocs[num_a8_relocs].r_type = r_type;
5636 a8_relocs[num_a8_relocs].branch_type = branch_type;
5637 a8_relocs[num_a8_relocs].sym_name = sym_name;
5638 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5639 a8_relocs[num_a8_relocs].hash = hash;
5640
5641 num_a8_relocs++;
5642 }
5643 }
5644 }
5645
5646 /* We're done with the internal relocs, free them. */
5647 if (elf_section_data (section)->relocs == NULL)
5648 free (internal_relocs);
5649 }
5650
5651 if (htab->fix_cortex_a8)
5652 {
5653 /* Sort relocs which might apply to Cortex-A8 erratum. */
5654 qsort (a8_relocs, num_a8_relocs,
5655 sizeof (struct a8_erratum_reloc),
5656 &a8_reloc_compare);
5657
5658 /* Scan for branches which might trigger Cortex-A8 erratum. */
5659 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5660 &num_a8_fixes, &a8_fix_table_size,
5661 a8_relocs, num_a8_relocs,
5662 prev_num_a8_fixes, &stub_changed)
5663 != 0)
5664 goto error_ret_free_local;
5665 }
5666
5667 if (local_syms != NULL
5668 && symtab_hdr->contents != (unsigned char *) local_syms)
5669 {
5670 if (!info->keep_memory)
5671 free (local_syms);
5672 else
5673 symtab_hdr->contents = (unsigned char *) local_syms;
5674 }
5675 }
5676
5677 if (prev_num_a8_fixes != num_a8_fixes)
5678 stub_changed = TRUE;
5679
5680 if (!stub_changed)
5681 break;
5682
5683 /* OK, we've added some stubs. Find out the new size of the
5684 stub sections. */
5685 for (stub_sec = htab->stub_bfd->sections;
5686 stub_sec != NULL;
5687 stub_sec = stub_sec->next)
5688 {
5689 /* Ignore non-stub sections. */
5690 if (!strstr (stub_sec->name, STUB_SUFFIX))
5691 continue;
5692
5693 stub_sec->size = 0;
5694 }
5695
5696 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5697
5698 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5699 if (htab->fix_cortex_a8)
5700 for (i = 0; i < num_a8_fixes; i++)
5701 {
5702 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5703 a8_fixes[i].section, htab);
5704
5705 if (stub_sec == NULL)
5706 return FALSE;
5707
5708 stub_sec->size
5709 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5710 NULL);
5711 }
5712
5713
5714 /* Ask the linker to do its stuff. */
5715 (*htab->layout_sections_again) ();
5716 }
5717
5718 /* Add stubs for Cortex-A8 erratum fixes now. */
5719 if (htab->fix_cortex_a8)
5720 {
5721 for (i = 0; i < num_a8_fixes; i++)
5722 {
5723 struct elf32_arm_stub_hash_entry *stub_entry;
5724 char *stub_name = a8_fixes[i].stub_name;
5725 asection *section = a8_fixes[i].section;
5726 unsigned int section_id = a8_fixes[i].section->id;
5727 asection *link_sec = htab->stub_group[section_id].link_sec;
5728 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5729 const insn_sequence *template_sequence;
5730 int template_size, size = 0;
5731
5732 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5733 TRUE, FALSE);
5734 if (stub_entry == NULL)
5735 {
5736 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5737 section->owner,
5738 stub_name);
5739 return FALSE;
5740 }
5741
5742 stub_entry->stub_sec = stub_sec;
5743 stub_entry->stub_offset = 0;
5744 stub_entry->id_sec = link_sec;
5745 stub_entry->stub_type = a8_fixes[i].stub_type;
5746 stub_entry->source_value = a8_fixes[i].offset;
5747 stub_entry->target_section = a8_fixes[i].section;
5748 stub_entry->target_value = a8_fixes[i].target_offset;
5749 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5750 stub_entry->branch_type = a8_fixes[i].branch_type;
5751
5752 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5753 &template_sequence,
5754 &template_size);
5755
5756 stub_entry->stub_size = size;
5757 stub_entry->stub_template = template_sequence;
5758 stub_entry->stub_template_size = template_size;
5759 }
5760
5761 /* Stash the Cortex-A8 erratum fix array for use later in
5762 elf32_arm_write_section(). */
5763 htab->a8_erratum_fixes = a8_fixes;
5764 htab->num_a8_erratum_fixes = num_a8_fixes;
5765 }
5766 else
5767 {
5768 htab->a8_erratum_fixes = NULL;
5769 htab->num_a8_erratum_fixes = 0;
5770 }
5771 return TRUE;
5772 }
5773
5774 /* Build all the stubs associated with the current output file. The
5775 stubs are kept in a hash table attached to the main linker hash
5776 table. We also set up the .plt entries for statically linked PIC
5777 functions here. This function is called via arm_elf_finish in the
5778 linker. */
5779
5780 bfd_boolean
5781 elf32_arm_build_stubs (struct bfd_link_info *info)
5782 {
5783 asection *stub_sec;
5784 struct bfd_hash_table *table;
5785 struct elf32_arm_link_hash_table *htab;
5786
5787 htab = elf32_arm_hash_table (info);
5788 if (htab == NULL)
5789 return FALSE;
5790
5791 for (stub_sec = htab->stub_bfd->sections;
5792 stub_sec != NULL;
5793 stub_sec = stub_sec->next)
5794 {
5795 bfd_size_type size;
5796
5797 /* Ignore non-stub sections. */
5798 if (!strstr (stub_sec->name, STUB_SUFFIX))
5799 continue;
5800
5801 /* Allocate memory to hold the linker stubs. */
5802 size = stub_sec->size;
5803 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5804 if (stub_sec->contents == NULL && size != 0)
5805 return FALSE;
5806 stub_sec->size = 0;
5807 }
5808
5809 /* Build the stubs as directed by the stub hash table. */
5810 table = &htab->stub_hash_table;
5811 bfd_hash_traverse (table, arm_build_one_stub, info);
5812 if (htab->fix_cortex_a8)
5813 {
5814 /* Place the cortex a8 stubs last. */
5815 htab->fix_cortex_a8 = -1;
5816 bfd_hash_traverse (table, arm_build_one_stub, info);
5817 }
5818
5819 return TRUE;
5820 }
5821
5822 /* Locate the Thumb encoded calling stub for NAME. */
5823
5824 static struct elf_link_hash_entry *
5825 find_thumb_glue (struct bfd_link_info *link_info,
5826 const char *name,
5827 char **error_message)
5828 {
5829 char *tmp_name;
5830 struct elf_link_hash_entry *hash;
5831 struct elf32_arm_link_hash_table *hash_table;
5832
5833 /* We need a pointer to the armelf specific hash table. */
5834 hash_table = elf32_arm_hash_table (link_info);
5835 if (hash_table == NULL)
5836 return NULL;
5837
5838 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5839 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5840
5841 BFD_ASSERT (tmp_name);
5842
5843 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5844
5845 hash = elf_link_hash_lookup
5846 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5847
5848 if (hash == NULL
5849 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5850 tmp_name, name) == -1)
5851 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5852
5853 free (tmp_name);
5854
5855 return hash;
5856 }
5857
5858 /* Locate the ARM encoded calling stub for NAME. */
5859
5860 static struct elf_link_hash_entry *
5861 find_arm_glue (struct bfd_link_info *link_info,
5862 const char *name,
5863 char **error_message)
5864 {
5865 char *tmp_name;
5866 struct elf_link_hash_entry *myh;
5867 struct elf32_arm_link_hash_table *hash_table;
5868
5869 /* We need a pointer to the elfarm specific hash table. */
5870 hash_table = elf32_arm_hash_table (link_info);
5871 if (hash_table == NULL)
5872 return NULL;
5873
5874 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5875 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5876
5877 BFD_ASSERT (tmp_name);
5878
5879 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5880
5881 myh = elf_link_hash_lookup
5882 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5883
5884 if (myh == NULL
5885 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5886 tmp_name, name) == -1)
5887 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5888
5889 free (tmp_name);
5890
5891 return myh;
5892 }
5893
5894 /* ARM->Thumb glue (static images):
5895
5896 .arm
5897 __func_from_arm:
5898 ldr r12, __func_addr
5899 bx r12
5900 __func_addr:
5901 .word func @ behave as if you saw a ARM_32 reloc.
5902
5903 (v5t static images)
5904 .arm
5905 __func_from_arm:
5906 ldr pc, __func_addr
5907 __func_addr:
5908 .word func @ behave as if you saw a ARM_32 reloc.
5909
5910 (relocatable images)
5911 .arm
5912 __func_from_arm:
5913 ldr r12, __func_offset
5914 add r12, r12, pc
5915 bx r12
5916 __func_offset:
5917 .word func - . */
5918
5919 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5920 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5921 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5922 static const insn32 a2t3_func_addr_insn = 0x00000001;
5923
5924 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5925 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5926 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5927
5928 #define ARM2THUMB_PIC_GLUE_SIZE 16
5929 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5930 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5931 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5932
5933 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5934
5935 .thumb .thumb
5936 .align 2 .align 2
5937 __func_from_thumb: __func_from_thumb:
5938 bx pc push {r6, lr}
5939 nop ldr r6, __func_addr
5940 .arm mov lr, pc
5941 b func bx r6
5942 .arm
5943 ;; back_to_thumb
5944 ldmia r13! {r6, lr}
5945 bx lr
5946 __func_addr:
5947 .word func */
5948
5949 #define THUMB2ARM_GLUE_SIZE 8
5950 static const insn16 t2a1_bx_pc_insn = 0x4778;
5951 static const insn16 t2a2_noop_insn = 0x46c0;
5952 static const insn32 t2a3_b_insn = 0xea000000;
5953
5954 #define VFP11_ERRATUM_VENEER_SIZE 8
5955 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5956 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5957
5958 #define ARM_BX_VENEER_SIZE 12
5959 static const insn32 armbx1_tst_insn = 0xe3100001;
5960 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5961 static const insn32 armbx3_bx_insn = 0xe12fff10;
5962
5963 #ifndef ELFARM_NABI_C_INCLUDED
5964 static void
5965 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5966 {
5967 asection * s;
5968 bfd_byte * contents;
5969
5970 if (size == 0)
5971 {
5972 /* Do not include empty glue sections in the output. */
5973 if (abfd != NULL)
5974 {
5975 s = bfd_get_linker_section (abfd, name);
5976 if (s != NULL)
5977 s->flags |= SEC_EXCLUDE;
5978 }
5979 return;
5980 }
5981
5982 BFD_ASSERT (abfd != NULL);
5983
5984 s = bfd_get_linker_section (abfd, name);
5985 BFD_ASSERT (s != NULL);
5986
5987 contents = (bfd_byte *) bfd_alloc (abfd, size);
5988
5989 BFD_ASSERT (s->size == size);
5990 s->contents = contents;
5991 }
5992
5993 bfd_boolean
5994 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5995 {
5996 struct elf32_arm_link_hash_table * globals;
5997
5998 globals = elf32_arm_hash_table (info);
5999 BFD_ASSERT (globals != NULL);
6000
6001 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6002 globals->arm_glue_size,
6003 ARM2THUMB_GLUE_SECTION_NAME);
6004
6005 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6006 globals->thumb_glue_size,
6007 THUMB2ARM_GLUE_SECTION_NAME);
6008
6009 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6010 globals->vfp11_erratum_glue_size,
6011 VFP11_ERRATUM_VENEER_SECTION_NAME);
6012
6013 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6014 globals->stm32l4xx_erratum_glue_size,
6015 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6016
6017 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6018 globals->bx_glue_size,
6019 ARM_BX_GLUE_SECTION_NAME);
6020
6021 return TRUE;
6022 }
6023
6024 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6025 returns the symbol identifying the stub. */
6026
6027 static struct elf_link_hash_entry *
6028 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6029 struct elf_link_hash_entry * h)
6030 {
6031 const char * name = h->root.root.string;
6032 asection * s;
6033 char * tmp_name;
6034 struct elf_link_hash_entry * myh;
6035 struct bfd_link_hash_entry * bh;
6036 struct elf32_arm_link_hash_table * globals;
6037 bfd_vma val;
6038 bfd_size_type size;
6039
6040 globals = elf32_arm_hash_table (link_info);
6041 BFD_ASSERT (globals != NULL);
6042 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6043
6044 s = bfd_get_linker_section
6045 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6046
6047 BFD_ASSERT (s != NULL);
6048
6049 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6050 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6051
6052 BFD_ASSERT (tmp_name);
6053
6054 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6055
6056 myh = elf_link_hash_lookup
6057 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6058
6059 if (myh != NULL)
6060 {
6061 /* We've already seen this guy. */
6062 free (tmp_name);
6063 return myh;
6064 }
6065
6066 /* The only trick here is using hash_table->arm_glue_size as the value.
6067 Even though the section isn't allocated yet, this is where we will be
6068 putting it. The +1 on the value marks that the stub has not been
6069 output yet - not that it is a Thumb function. */
6070 bh = NULL;
6071 val = globals->arm_glue_size + 1;
6072 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6073 tmp_name, BSF_GLOBAL, s, val,
6074 NULL, TRUE, FALSE, &bh);
6075
6076 myh = (struct elf_link_hash_entry *) bh;
6077 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6078 myh->forced_local = 1;
6079
6080 free (tmp_name);
6081
6082 if (bfd_link_pic (link_info)
6083 || globals->root.is_relocatable_executable
6084 || globals->pic_veneer)
6085 size = ARM2THUMB_PIC_GLUE_SIZE;
6086 else if (globals->use_blx)
6087 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6088 else
6089 size = ARM2THUMB_STATIC_GLUE_SIZE;
6090
6091 s->size += size;
6092 globals->arm_glue_size += size;
6093
6094 return myh;
6095 }
6096
6097 /* Allocate space for ARMv4 BX veneers. */
6098
6099 static void
6100 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6101 {
6102 asection * s;
6103 struct elf32_arm_link_hash_table *globals;
6104 char *tmp_name;
6105 struct elf_link_hash_entry *myh;
6106 struct bfd_link_hash_entry *bh;
6107 bfd_vma val;
6108
6109 /* BX PC does not need a veneer. */
6110 if (reg == 15)
6111 return;
6112
6113 globals = elf32_arm_hash_table (link_info);
6114 BFD_ASSERT (globals != NULL);
6115 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6116
6117 /* Check if this veneer has already been allocated. */
6118 if (globals->bx_glue_offset[reg])
6119 return;
6120
6121 s = bfd_get_linker_section
6122 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
6123
6124 BFD_ASSERT (s != NULL);
6125
6126 /* Add symbol for veneer. */
6127 tmp_name = (char *)
6128 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
6129
6130 BFD_ASSERT (tmp_name);
6131
6132 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
6133
6134 myh = elf_link_hash_lookup
6135 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
6136
6137 BFD_ASSERT (myh == NULL);
6138
6139 bh = NULL;
6140 val = globals->bx_glue_size;
6141 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6142 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6143 NULL, TRUE, FALSE, &bh);
6144
6145 myh = (struct elf_link_hash_entry *) bh;
6146 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6147 myh->forced_local = 1;
6148
6149 s->size += ARM_BX_VENEER_SIZE;
6150 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
6151 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
6152 }
6153
6154
6155 /* Add an entry to the code/data map for section SEC. */
6156
6157 static void
6158 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
6159 {
6160 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6161 unsigned int newidx;
6162
6163 if (sec_data->map == NULL)
6164 {
6165 sec_data->map = (elf32_arm_section_map *)
6166 bfd_malloc (sizeof (elf32_arm_section_map));
6167 sec_data->mapcount = 0;
6168 sec_data->mapsize = 1;
6169 }
6170
6171 newidx = sec_data->mapcount++;
6172
6173 if (sec_data->mapcount > sec_data->mapsize)
6174 {
6175 sec_data->mapsize *= 2;
6176 sec_data->map = (elf32_arm_section_map *)
6177 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
6178 * sizeof (elf32_arm_section_map));
6179 }
6180
6181 if (sec_data->map)
6182 {
6183 sec_data->map[newidx].vma = vma;
6184 sec_data->map[newidx].type = type;
6185 }
6186 }
6187
6188
6189 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6190 veneers are handled for now. */
6191
6192 static bfd_vma
6193 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
6194 elf32_vfp11_erratum_list *branch,
6195 bfd *branch_bfd,
6196 asection *branch_sec,
6197 unsigned int offset)
6198 {
6199 asection *s;
6200 struct elf32_arm_link_hash_table *hash_table;
6201 char *tmp_name;
6202 struct elf_link_hash_entry *myh;
6203 struct bfd_link_hash_entry *bh;
6204 bfd_vma val;
6205 struct _arm_elf_section_data *sec_data;
6206 elf32_vfp11_erratum_list *newerr;
6207
6208 hash_table = elf32_arm_hash_table (link_info);
6209 BFD_ASSERT (hash_table != NULL);
6210 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6211
6212 s = bfd_get_linker_section
6213 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
6214
6215 sec_data = elf32_arm_section_data (s);
6216
6217 BFD_ASSERT (s != NULL);
6218
6219 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6220 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6221
6222 BFD_ASSERT (tmp_name);
6223
6224 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6225 hash_table->num_vfp11_fixes);
6226
6227 myh = elf_link_hash_lookup
6228 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6229
6230 BFD_ASSERT (myh == NULL);
6231
6232 bh = NULL;
6233 val = hash_table->vfp11_erratum_glue_size;
6234 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6235 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6236 NULL, TRUE, FALSE, &bh);
6237
6238 myh = (struct elf_link_hash_entry *) bh;
6239 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6240 myh->forced_local = 1;
6241
6242 /* Link veneer back to calling location. */
6243 sec_data->erratumcount += 1;
6244 newerr = (elf32_vfp11_erratum_list *)
6245 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6246
6247 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6248 newerr->vma = -1;
6249 newerr->u.v.branch = branch;
6250 newerr->u.v.id = hash_table->num_vfp11_fixes;
6251 branch->u.b.veneer = newerr;
6252
6253 newerr->next = sec_data->erratumlist;
6254 sec_data->erratumlist = newerr;
6255
6256 /* A symbol for the return from the veneer. */
6257 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6258 hash_table->num_vfp11_fixes);
6259
6260 myh = elf_link_hash_lookup
6261 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6262
6263 if (myh != NULL)
6264 abort ();
6265
6266 bh = NULL;
6267 val = offset + 4;
6268 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6269 branch_sec, val, NULL, TRUE, FALSE, &bh);
6270
6271 myh = (struct elf_link_hash_entry *) bh;
6272 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6273 myh->forced_local = 1;
6274
6275 free (tmp_name);
6276
6277 /* Generate a mapping symbol for the veneer section, and explicitly add an
6278 entry for that symbol to the code/data map for the section. */
6279 if (hash_table->vfp11_erratum_glue_size == 0)
6280 {
6281 bh = NULL;
6282 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6283 ever requires this erratum fix. */
6284 _bfd_generic_link_add_one_symbol (link_info,
6285 hash_table->bfd_of_glue_owner, "$a",
6286 BSF_LOCAL, s, 0, NULL,
6287 TRUE, FALSE, &bh);
6288
6289 myh = (struct elf_link_hash_entry *) bh;
6290 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6291 myh->forced_local = 1;
6292
6293 /* The elf32_arm_init_maps function only cares about symbols from input
6294 BFDs. We must make a note of this generated mapping symbol
6295 ourselves so that code byteswapping works properly in
6296 elf32_arm_write_section. */
6297 elf32_arm_section_map_add (s, 'a', 0);
6298 }
6299
6300 s->size += VFP11_ERRATUM_VENEER_SIZE;
6301 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6302 hash_table->num_vfp11_fixes++;
6303
6304 /* The offset of the veneer. */
6305 return val;
6306 }
6307
6308 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6309 veneers need to be handled because used only in Cortex-M. */
6310
6311 static bfd_vma
6312 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
6313 elf32_stm32l4xx_erratum_list *branch,
6314 bfd *branch_bfd,
6315 asection *branch_sec,
6316 unsigned int offset,
6317 bfd_size_type veneer_size)
6318 {
6319 asection *s;
6320 struct elf32_arm_link_hash_table *hash_table;
6321 char *tmp_name;
6322 struct elf_link_hash_entry *myh;
6323 struct bfd_link_hash_entry *bh;
6324 bfd_vma val;
6325 struct _arm_elf_section_data *sec_data;
6326 elf32_stm32l4xx_erratum_list *newerr;
6327
6328 hash_table = elf32_arm_hash_table (link_info);
6329 BFD_ASSERT (hash_table != NULL);
6330 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6331
6332 s = bfd_get_linker_section
6333 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6334
6335 BFD_ASSERT (s != NULL);
6336
6337 sec_data = elf32_arm_section_data (s);
6338
6339 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6340 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
6341
6342 BFD_ASSERT (tmp_name);
6343
6344 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
6345 hash_table->num_stm32l4xx_fixes);
6346
6347 myh = elf_link_hash_lookup
6348 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6349
6350 BFD_ASSERT (myh == NULL);
6351
6352 bh = NULL;
6353 val = hash_table->stm32l4xx_erratum_glue_size;
6354 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6355 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6356 NULL, TRUE, FALSE, &bh);
6357
6358 myh = (struct elf_link_hash_entry *) bh;
6359 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6360 myh->forced_local = 1;
6361
6362 /* Link veneer back to calling location. */
6363 sec_data->stm32l4xx_erratumcount += 1;
6364 newerr = (elf32_stm32l4xx_erratum_list *)
6365 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
6366
6367 newerr->type = STM32L4XX_ERRATUM_VENEER;
6368 newerr->vma = -1;
6369 newerr->u.v.branch = branch;
6370 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
6371 branch->u.b.veneer = newerr;
6372
6373 newerr->next = sec_data->stm32l4xx_erratumlist;
6374 sec_data->stm32l4xx_erratumlist = newerr;
6375
6376 /* A symbol for the return from the veneer. */
6377 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
6378 hash_table->num_stm32l4xx_fixes);
6379
6380 myh = elf_link_hash_lookup
6381 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6382
6383 if (myh != NULL)
6384 abort ();
6385
6386 bh = NULL;
6387 val = offset + 4;
6388 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6389 branch_sec, val, NULL, TRUE, FALSE, &bh);
6390
6391 myh = (struct elf_link_hash_entry *) bh;
6392 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6393 myh->forced_local = 1;
6394
6395 free (tmp_name);
6396
6397 /* Generate a mapping symbol for the veneer section, and explicitly add an
6398 entry for that symbol to the code/data map for the section. */
6399 if (hash_table->stm32l4xx_erratum_glue_size == 0)
6400 {
6401 bh = NULL;
6402 /* Creates a THUMB symbol since there is no other choice. */
6403 _bfd_generic_link_add_one_symbol (link_info,
6404 hash_table->bfd_of_glue_owner, "$t",
6405 BSF_LOCAL, s, 0, NULL,
6406 TRUE, FALSE, &bh);
6407
6408 myh = (struct elf_link_hash_entry *) bh;
6409 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6410 myh->forced_local = 1;
6411
6412 /* The elf32_arm_init_maps function only cares about symbols from input
6413 BFDs. We must make a note of this generated mapping symbol
6414 ourselves so that code byteswapping works properly in
6415 elf32_arm_write_section. */
6416 elf32_arm_section_map_add (s, 't', 0);
6417 }
6418
6419 s->size += veneer_size;
6420 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
6421 hash_table->num_stm32l4xx_fixes++;
6422
6423 /* The offset of the veneer. */
6424 return val;
6425 }
6426
6427 #define ARM_GLUE_SECTION_FLAGS \
6428 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6429 | SEC_READONLY | SEC_LINKER_CREATED)
6430
6431 /* Create a fake section for use by the ARM backend of the linker. */
6432
6433 static bfd_boolean
6434 arm_make_glue_section (bfd * abfd, const char * name)
6435 {
6436 asection * sec;
6437
6438 sec = bfd_get_linker_section (abfd, name);
6439 if (sec != NULL)
6440 /* Already made. */
6441 return TRUE;
6442
6443 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6444
6445 if (sec == NULL
6446 || !bfd_set_section_alignment (abfd, sec, 2))
6447 return FALSE;
6448
6449 /* Set the gc mark to prevent the section from being removed by garbage
6450 collection, despite the fact that no relocs refer to this section. */
6451 sec->gc_mark = 1;
6452
6453 return TRUE;
6454 }
6455
6456 /* Set size of .plt entries. This function is called from the
6457 linker scripts in ld/emultempl/{armelf}.em. */
6458
6459 void
6460 bfd_elf32_arm_use_long_plt (void)
6461 {
6462 elf32_arm_use_long_plt_entry = TRUE;
6463 }
6464
6465 /* Add the glue sections to ABFD. This function is called from the
6466 linker scripts in ld/emultempl/{armelf}.em. */
6467
6468 bfd_boolean
6469 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6470 struct bfd_link_info *info)
6471 {
6472 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
6473 bfd_boolean dostm32l4xx = globals
6474 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
6475 bfd_boolean addglue;
6476
6477 /* If we are only performing a partial
6478 link do not bother adding the glue. */
6479 if (bfd_link_relocatable (info))
6480 return TRUE;
6481
6482 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6483 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6484 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6485 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6486
6487 if (!dostm32l4xx)
6488 return addglue;
6489
6490 return addglue
6491 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6492 }
6493
6494 /* Select a BFD to be used to hold the sections used by the glue code.
6495 This function is called from the linker scripts in ld/emultempl/
6496 {armelf/pe}.em. */
6497
6498 bfd_boolean
6499 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6500 {
6501 struct elf32_arm_link_hash_table *globals;
6502
6503 /* If we are only performing a partial link
6504 do not bother getting a bfd to hold the glue. */
6505 if (bfd_link_relocatable (info))
6506 return TRUE;
6507
6508 /* Make sure we don't attach the glue sections to a dynamic object. */
6509 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6510
6511 globals = elf32_arm_hash_table (info);
6512 BFD_ASSERT (globals != NULL);
6513
6514 if (globals->bfd_of_glue_owner != NULL)
6515 return TRUE;
6516
6517 /* Save the bfd for later use. */
6518 globals->bfd_of_glue_owner = abfd;
6519
6520 return TRUE;
6521 }
6522
6523 static void
6524 check_use_blx (struct elf32_arm_link_hash_table *globals)
6525 {
6526 int cpu_arch;
6527
6528 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6529 Tag_CPU_arch);
6530
6531 if (globals->fix_arm1176)
6532 {
6533 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6534 globals->use_blx = 1;
6535 }
6536 else
6537 {
6538 if (cpu_arch > TAG_CPU_ARCH_V4T)
6539 globals->use_blx = 1;
6540 }
6541 }
6542
6543 bfd_boolean
6544 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6545 struct bfd_link_info *link_info)
6546 {
6547 Elf_Internal_Shdr *symtab_hdr;
6548 Elf_Internal_Rela *internal_relocs = NULL;
6549 Elf_Internal_Rela *irel, *irelend;
6550 bfd_byte *contents = NULL;
6551
6552 asection *sec;
6553 struct elf32_arm_link_hash_table *globals;
6554
6555 /* If we are only performing a partial link do not bother
6556 to construct any glue. */
6557 if (bfd_link_relocatable (link_info))
6558 return TRUE;
6559
6560 /* Here we have a bfd that is to be included on the link. We have a
6561 hook to do reloc rummaging, before section sizes are nailed down. */
6562 globals = elf32_arm_hash_table (link_info);
6563 BFD_ASSERT (globals != NULL);
6564
6565 check_use_blx (globals);
6566
6567 if (globals->byteswap_code && !bfd_big_endian (abfd))
6568 {
6569 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6570 abfd);
6571 return FALSE;
6572 }
6573
6574 /* PR 5398: If we have not decided to include any loadable sections in
6575 the output then we will not have a glue owner bfd. This is OK, it
6576 just means that there is nothing else for us to do here. */
6577 if (globals->bfd_of_glue_owner == NULL)
6578 return TRUE;
6579
6580 /* Rummage around all the relocs and map the glue vectors. */
6581 sec = abfd->sections;
6582
6583 if (sec == NULL)
6584 return TRUE;
6585
6586 for (; sec != NULL; sec = sec->next)
6587 {
6588 if (sec->reloc_count == 0)
6589 continue;
6590
6591 if ((sec->flags & SEC_EXCLUDE) != 0)
6592 continue;
6593
6594 symtab_hdr = & elf_symtab_hdr (abfd);
6595
6596 /* Load the relocs. */
6597 internal_relocs
6598 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6599
6600 if (internal_relocs == NULL)
6601 goto error_return;
6602
6603 irelend = internal_relocs + sec->reloc_count;
6604 for (irel = internal_relocs; irel < irelend; irel++)
6605 {
6606 long r_type;
6607 unsigned long r_index;
6608
6609 struct elf_link_hash_entry *h;
6610
6611 r_type = ELF32_R_TYPE (irel->r_info);
6612 r_index = ELF32_R_SYM (irel->r_info);
6613
6614 /* These are the only relocation types we care about. */
6615 if ( r_type != R_ARM_PC24
6616 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6617 continue;
6618
6619 /* Get the section contents if we haven't done so already. */
6620 if (contents == NULL)
6621 {
6622 /* Get cached copy if it exists. */
6623 if (elf_section_data (sec)->this_hdr.contents != NULL)
6624 contents = elf_section_data (sec)->this_hdr.contents;
6625 else
6626 {
6627 /* Go get them off disk. */
6628 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6629 goto error_return;
6630 }
6631 }
6632
6633 if (r_type == R_ARM_V4BX)
6634 {
6635 int reg;
6636
6637 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6638 record_arm_bx_glue (link_info, reg);
6639 continue;
6640 }
6641
6642 /* If the relocation is not against a symbol it cannot concern us. */
6643 h = NULL;
6644
6645 /* We don't care about local symbols. */
6646 if (r_index < symtab_hdr->sh_info)
6647 continue;
6648
6649 /* This is an external symbol. */
6650 r_index -= symtab_hdr->sh_info;
6651 h = (struct elf_link_hash_entry *)
6652 elf_sym_hashes (abfd)[r_index];
6653
6654 /* If the relocation is against a static symbol it must be within
6655 the current section and so cannot be a cross ARM/Thumb relocation. */
6656 if (h == NULL)
6657 continue;
6658
6659 /* If the call will go through a PLT entry then we do not need
6660 glue. */
6661 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6662 continue;
6663
6664 switch (r_type)
6665 {
6666 case R_ARM_PC24:
6667 /* This one is a call from arm code. We need to look up
6668 the target of the call. If it is a thumb target, we
6669 insert glue. */
6670 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
6671 == ST_BRANCH_TO_THUMB)
6672 record_arm_to_thumb_glue (link_info, h);
6673 break;
6674
6675 default:
6676 abort ();
6677 }
6678 }
6679
6680 if (contents != NULL
6681 && elf_section_data (sec)->this_hdr.contents != contents)
6682 free (contents);
6683 contents = NULL;
6684
6685 if (internal_relocs != NULL
6686 && elf_section_data (sec)->relocs != internal_relocs)
6687 free (internal_relocs);
6688 internal_relocs = NULL;
6689 }
6690
6691 return TRUE;
6692
6693 error_return:
6694 if (contents != NULL
6695 && elf_section_data (sec)->this_hdr.contents != contents)
6696 free (contents);
6697 if (internal_relocs != NULL
6698 && elf_section_data (sec)->relocs != internal_relocs)
6699 free (internal_relocs);
6700
6701 return FALSE;
6702 }
6703 #endif
6704
6705
6706 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6707
6708 void
6709 bfd_elf32_arm_init_maps (bfd *abfd)
6710 {
6711 Elf_Internal_Sym *isymbuf;
6712 Elf_Internal_Shdr *hdr;
6713 unsigned int i, localsyms;
6714
6715 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6716 if (! is_arm_elf (abfd))
6717 return;
6718
6719 if ((abfd->flags & DYNAMIC) != 0)
6720 return;
6721
6722 hdr = & elf_symtab_hdr (abfd);
6723 localsyms = hdr->sh_info;
6724
6725 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6726 should contain the number of local symbols, which should come before any
6727 global symbols. Mapping symbols are always local. */
6728 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6729 NULL);
6730
6731 /* No internal symbols read? Skip this BFD. */
6732 if (isymbuf == NULL)
6733 return;
6734
6735 for (i = 0; i < localsyms; i++)
6736 {
6737 Elf_Internal_Sym *isym = &isymbuf[i];
6738 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6739 const char *name;
6740
6741 if (sec != NULL
6742 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6743 {
6744 name = bfd_elf_string_from_elf_section (abfd,
6745 hdr->sh_link, isym->st_name);
6746
6747 if (bfd_is_arm_special_symbol_name (name,
6748 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6749 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6750 }
6751 }
6752 }
6753
6754
6755 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6756 say what they wanted. */
6757
6758 void
6759 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6760 {
6761 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6762 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6763
6764 if (globals == NULL)
6765 return;
6766
6767 if (globals->fix_cortex_a8 == -1)
6768 {
6769 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6770 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6771 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6772 || out_attr[Tag_CPU_arch_profile].i == 0))
6773 globals->fix_cortex_a8 = 1;
6774 else
6775 globals->fix_cortex_a8 = 0;
6776 }
6777 }
6778
6779
6780 void
6781 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6782 {
6783 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6784 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6785
6786 if (globals == NULL)
6787 return;
6788 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6789 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6790 {
6791 switch (globals->vfp11_fix)
6792 {
6793 case BFD_ARM_VFP11_FIX_DEFAULT:
6794 case BFD_ARM_VFP11_FIX_NONE:
6795 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6796 break;
6797
6798 default:
6799 /* Give a warning, but do as the user requests anyway. */
6800 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6801 "workaround is not necessary for target architecture"), obfd);
6802 }
6803 }
6804 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6805 /* For earlier architectures, we might need the workaround, but do not
6806 enable it by default. If users is running with broken hardware, they
6807 must enable the erratum fix explicitly. */
6808 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6809 }
6810
6811 void
6812 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
6813 {
6814 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6815 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6816
6817 if (globals == NULL)
6818 return;
6819
6820 /* We assume only Cortex-M4 may require the fix. */
6821 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
6822 || out_attr[Tag_CPU_arch_profile].i != 'M')
6823 {
6824 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
6825 /* Give a warning, but do as the user requests anyway. */
6826 (*_bfd_error_handler)
6827 (_("%B: warning: selected STM32L4XX erratum "
6828 "workaround is not necessary for target architecture"), obfd);
6829 }
6830 }
6831
6832 enum bfd_arm_vfp11_pipe
6833 {
6834 VFP11_FMAC,
6835 VFP11_LS,
6836 VFP11_DS,
6837 VFP11_BAD
6838 };
6839
6840 /* Return a VFP register number. This is encoded as RX:X for single-precision
6841 registers, or X:RX for double-precision registers, where RX is the group of
6842 four bits in the instruction encoding and X is the single extension bit.
6843 RX and X fields are specified using their lowest (starting) bit. The return
6844 value is:
6845
6846 0...31: single-precision registers s0...s31
6847 32...63: double-precision registers d0...d31.
6848
6849 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6850 encounter VFP3 instructions, so we allow the full range for DP registers. */
6851
6852 static unsigned int
6853 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6854 unsigned int x)
6855 {
6856 if (is_double)
6857 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6858 else
6859 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6860 }
6861
6862 /* Set bits in *WMASK according to a register number REG as encoded by
6863 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6864
6865 static void
6866 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6867 {
6868 if (reg < 32)
6869 *wmask |= 1 << reg;
6870 else if (reg < 48)
6871 *wmask |= 3 << ((reg - 32) * 2);
6872 }
6873
6874 /* Return TRUE if WMASK overwrites anything in REGS. */
6875
6876 static bfd_boolean
6877 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6878 {
6879 int i;
6880
6881 for (i = 0; i < numregs; i++)
6882 {
6883 unsigned int reg = regs[i];
6884
6885 if (reg < 32 && (wmask & (1 << reg)) != 0)
6886 return TRUE;
6887
6888 reg -= 32;
6889
6890 if (reg >= 16)
6891 continue;
6892
6893 if ((wmask & (3 << (reg * 2))) != 0)
6894 return TRUE;
6895 }
6896
6897 return FALSE;
6898 }
6899
6900 /* In this function, we're interested in two things: finding input registers
6901 for VFP data-processing instructions, and finding the set of registers which
6902 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6903 hold the written set, so FLDM etc. are easy to deal with (we're only
6904 interested in 32 SP registers or 16 dp registers, due to the VFP version
6905 implemented by the chip in question). DP registers are marked by setting
6906 both SP registers in the write mask). */
6907
6908 static enum bfd_arm_vfp11_pipe
6909 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6910 int *numregs)
6911 {
6912 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6913 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6914
6915 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6916 {
6917 unsigned int pqrs;
6918 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6919 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6920
6921 pqrs = ((insn & 0x00800000) >> 20)
6922 | ((insn & 0x00300000) >> 19)
6923 | ((insn & 0x00000040) >> 6);
6924
6925 switch (pqrs)
6926 {
6927 case 0: /* fmac[sd]. */
6928 case 1: /* fnmac[sd]. */
6929 case 2: /* fmsc[sd]. */
6930 case 3: /* fnmsc[sd]. */
6931 vpipe = VFP11_FMAC;
6932 bfd_arm_vfp11_write_mask (destmask, fd);
6933 regs[0] = fd;
6934 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6935 regs[2] = fm;
6936 *numregs = 3;
6937 break;
6938
6939 case 4: /* fmul[sd]. */
6940 case 5: /* fnmul[sd]. */
6941 case 6: /* fadd[sd]. */
6942 case 7: /* fsub[sd]. */
6943 vpipe = VFP11_FMAC;
6944 goto vfp_binop;
6945
6946 case 8: /* fdiv[sd]. */
6947 vpipe = VFP11_DS;
6948 vfp_binop:
6949 bfd_arm_vfp11_write_mask (destmask, fd);
6950 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6951 regs[1] = fm;
6952 *numregs = 2;
6953 break;
6954
6955 case 15: /* extended opcode. */
6956 {
6957 unsigned int extn = ((insn >> 15) & 0x1e)
6958 | ((insn >> 7) & 1);
6959
6960 switch (extn)
6961 {
6962 case 0: /* fcpy[sd]. */
6963 case 1: /* fabs[sd]. */
6964 case 2: /* fneg[sd]. */
6965 case 8: /* fcmp[sd]. */
6966 case 9: /* fcmpe[sd]. */
6967 case 10: /* fcmpz[sd]. */
6968 case 11: /* fcmpez[sd]. */
6969 case 16: /* fuito[sd]. */
6970 case 17: /* fsito[sd]. */
6971 case 24: /* ftoui[sd]. */
6972 case 25: /* ftouiz[sd]. */
6973 case 26: /* ftosi[sd]. */
6974 case 27: /* ftosiz[sd]. */
6975 /* These instructions will not bounce due to underflow. */
6976 *numregs = 0;
6977 vpipe = VFP11_FMAC;
6978 break;
6979
6980 case 3: /* fsqrt[sd]. */
6981 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6982 registers to cause the erratum in previous instructions. */
6983 bfd_arm_vfp11_write_mask (destmask, fd);
6984 vpipe = VFP11_DS;
6985 break;
6986
6987 case 15: /* fcvt{ds,sd}. */
6988 {
6989 int rnum = 0;
6990
6991 bfd_arm_vfp11_write_mask (destmask, fd);
6992
6993 /* Only FCVTSD can underflow. */
6994 if ((insn & 0x100) != 0)
6995 regs[rnum++] = fm;
6996
6997 *numregs = rnum;
6998
6999 vpipe = VFP11_FMAC;
7000 }
7001 break;
7002
7003 default:
7004 return VFP11_BAD;
7005 }
7006 }
7007 break;
7008
7009 default:
7010 return VFP11_BAD;
7011 }
7012 }
7013 /* Two-register transfer. */
7014 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7015 {
7016 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7017
7018 if ((insn & 0x100000) == 0)
7019 {
7020 if (is_double)
7021 bfd_arm_vfp11_write_mask (destmask, fm);
7022 else
7023 {
7024 bfd_arm_vfp11_write_mask (destmask, fm);
7025 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7026 }
7027 }
7028
7029 vpipe = VFP11_LS;
7030 }
7031 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7032 {
7033 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7034 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7035
7036 switch (puw)
7037 {
7038 case 0: /* Two-reg transfer. We should catch these above. */
7039 abort ();
7040
7041 case 2: /* fldm[sdx]. */
7042 case 3:
7043 case 5:
7044 {
7045 unsigned int i, offset = insn & 0xff;
7046
7047 if (is_double)
7048 offset >>= 1;
7049
7050 for (i = fd; i < fd + offset; i++)
7051 bfd_arm_vfp11_write_mask (destmask, i);
7052 }
7053 break;
7054
7055 case 4: /* fld[sd]. */
7056 case 6:
7057 bfd_arm_vfp11_write_mask (destmask, fd);
7058 break;
7059
7060 default:
7061 return VFP11_BAD;
7062 }
7063
7064 vpipe = VFP11_LS;
7065 }
7066 /* Single-register transfer. Note L==0. */
7067 else if ((insn & 0x0f100e10) == 0x0e000a10)
7068 {
7069 unsigned int opcode = (insn >> 21) & 7;
7070 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7071
7072 switch (opcode)
7073 {
7074 case 0: /* fmsr/fmdlr. */
7075 case 1: /* fmdhr. */
7076 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7077 destination register. I don't know if this is exactly right,
7078 but it is the conservative choice. */
7079 bfd_arm_vfp11_write_mask (destmask, fn);
7080 break;
7081
7082 case 7: /* fmxr. */
7083 break;
7084 }
7085
7086 vpipe = VFP11_LS;
7087 }
7088
7089 return vpipe;
7090 }
7091
7092
7093 static int elf32_arm_compare_mapping (const void * a, const void * b);
7094
7095
7096 /* Look for potentially-troublesome code sequences which might trigger the
7097 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7098 (available from ARM) for details of the erratum. A short version is
7099 described in ld.texinfo. */
7100
7101 bfd_boolean
7102 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
7103 {
7104 asection *sec;
7105 bfd_byte *contents = NULL;
7106 int state = 0;
7107 int regs[3], numregs = 0;
7108 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7109 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
7110
7111 if (globals == NULL)
7112 return FALSE;
7113
7114 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7115 The states transition as follows:
7116
7117 0 -> 1 (vector) or 0 -> 2 (scalar)
7118 A VFP FMAC-pipeline instruction has been seen. Fill
7119 regs[0]..regs[numregs-1] with its input operands. Remember this
7120 instruction in 'first_fmac'.
7121
7122 1 -> 2
7123 Any instruction, except for a VFP instruction which overwrites
7124 regs[*].
7125
7126 1 -> 3 [ -> 0 ] or
7127 2 -> 3 [ -> 0 ]
7128 A VFP instruction has been seen which overwrites any of regs[*].
7129 We must make a veneer! Reset state to 0 before examining next
7130 instruction.
7131
7132 2 -> 0
7133 If we fail to match anything in state 2, reset to state 0 and reset
7134 the instruction pointer to the instruction after 'first_fmac'.
7135
7136 If the VFP11 vector mode is in use, there must be at least two unrelated
7137 instructions between anti-dependent VFP11 instructions to properly avoid
7138 triggering the erratum, hence the use of the extra state 1. */
7139
7140 /* If we are only performing a partial link do not bother
7141 to construct any glue. */
7142 if (bfd_link_relocatable (link_info))
7143 return TRUE;
7144
7145 /* Skip if this bfd does not correspond to an ELF image. */
7146 if (! is_arm_elf (abfd))
7147 return TRUE;
7148
7149 /* We should have chosen a fix type by the time we get here. */
7150 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
7151
7152 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
7153 return TRUE;
7154
7155 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7156 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7157 return TRUE;
7158
7159 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7160 {
7161 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
7162 struct _arm_elf_section_data *sec_data;
7163
7164 /* If we don't have executable progbits, we're not interested in this
7165 section. Also skip if section is to be excluded. */
7166 if (elf_section_type (sec) != SHT_PROGBITS
7167 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7168 || (sec->flags & SEC_EXCLUDE) != 0
7169 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7170 || sec->output_section == bfd_abs_section_ptr
7171 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
7172 continue;
7173
7174 sec_data = elf32_arm_section_data (sec);
7175
7176 if (sec_data->mapcount == 0)
7177 continue;
7178
7179 if (elf_section_data (sec)->this_hdr.contents != NULL)
7180 contents = elf_section_data (sec)->this_hdr.contents;
7181 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7182 goto error_return;
7183
7184 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7185 elf32_arm_compare_mapping);
7186
7187 for (span = 0; span < sec_data->mapcount; span++)
7188 {
7189 unsigned int span_start = sec_data->map[span].vma;
7190 unsigned int span_end = (span == sec_data->mapcount - 1)
7191 ? sec->size : sec_data->map[span + 1].vma;
7192 char span_type = sec_data->map[span].type;
7193
7194 /* FIXME: Only ARM mode is supported at present. We may need to
7195 support Thumb-2 mode also at some point. */
7196 if (span_type != 'a')
7197 continue;
7198
7199 for (i = span_start; i < span_end;)
7200 {
7201 unsigned int next_i = i + 4;
7202 unsigned int insn = bfd_big_endian (abfd)
7203 ? (contents[i] << 24)
7204 | (contents[i + 1] << 16)
7205 | (contents[i + 2] << 8)
7206 | contents[i + 3]
7207 : (contents[i + 3] << 24)
7208 | (contents[i + 2] << 16)
7209 | (contents[i + 1] << 8)
7210 | contents[i];
7211 unsigned int writemask = 0;
7212 enum bfd_arm_vfp11_pipe vpipe;
7213
7214 switch (state)
7215 {
7216 case 0:
7217 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
7218 &numregs);
7219 /* I'm assuming the VFP11 erratum can trigger with denorm
7220 operands on either the FMAC or the DS pipeline. This might
7221 lead to slightly overenthusiastic veneer insertion. */
7222 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
7223 {
7224 state = use_vector ? 1 : 2;
7225 first_fmac = i;
7226 veneer_of_insn = insn;
7227 }
7228 break;
7229
7230 case 1:
7231 {
7232 int other_regs[3], other_numregs;
7233 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7234 other_regs,
7235 &other_numregs);
7236 if (vpipe != VFP11_BAD
7237 && bfd_arm_vfp11_antidependency (writemask, regs,
7238 numregs))
7239 state = 3;
7240 else
7241 state = 2;
7242 }
7243 break;
7244
7245 case 2:
7246 {
7247 int other_regs[3], other_numregs;
7248 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7249 other_regs,
7250 &other_numregs);
7251 if (vpipe != VFP11_BAD
7252 && bfd_arm_vfp11_antidependency (writemask, regs,
7253 numregs))
7254 state = 3;
7255 else
7256 {
7257 state = 0;
7258 next_i = first_fmac + 4;
7259 }
7260 }
7261 break;
7262
7263 case 3:
7264 abort (); /* Should be unreachable. */
7265 }
7266
7267 if (state == 3)
7268 {
7269 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
7270 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7271
7272 elf32_arm_section_data (sec)->erratumcount += 1;
7273
7274 newerr->u.b.vfp_insn = veneer_of_insn;
7275
7276 switch (span_type)
7277 {
7278 case 'a':
7279 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
7280 break;
7281
7282 default:
7283 abort ();
7284 }
7285
7286 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
7287 first_fmac);
7288
7289 newerr->vma = -1;
7290
7291 newerr->next = sec_data->erratumlist;
7292 sec_data->erratumlist = newerr;
7293
7294 state = 0;
7295 }
7296
7297 i = next_i;
7298 }
7299 }
7300
7301 if (contents != NULL
7302 && elf_section_data (sec)->this_hdr.contents != contents)
7303 free (contents);
7304 contents = NULL;
7305 }
7306
7307 return TRUE;
7308
7309 error_return:
7310 if (contents != NULL
7311 && elf_section_data (sec)->this_hdr.contents != contents)
7312 free (contents);
7313
7314 return FALSE;
7315 }
7316
7317 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7318 after sections have been laid out, using specially-named symbols. */
7319
7320 void
7321 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
7322 struct bfd_link_info *link_info)
7323 {
7324 asection *sec;
7325 struct elf32_arm_link_hash_table *globals;
7326 char *tmp_name;
7327
7328 if (bfd_link_relocatable (link_info))
7329 return;
7330
7331 /* Skip if this bfd does not correspond to an ELF image. */
7332 if (! is_arm_elf (abfd))
7333 return;
7334
7335 globals = elf32_arm_hash_table (link_info);
7336 if (globals == NULL)
7337 return;
7338
7339 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7340 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7341
7342 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7343 {
7344 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7345 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
7346
7347 for (; errnode != NULL; errnode = errnode->next)
7348 {
7349 struct elf_link_hash_entry *myh;
7350 bfd_vma vma;
7351
7352 switch (errnode->type)
7353 {
7354 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
7355 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
7356 /* Find veneer symbol. */
7357 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7358 errnode->u.b.veneer->u.v.id);
7359
7360 myh = elf_link_hash_lookup
7361 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7362
7363 if (myh == NULL)
7364 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7365 "`%s'"), abfd, tmp_name);
7366
7367 vma = myh->root.u.def.section->output_section->vma
7368 + myh->root.u.def.section->output_offset
7369 + myh->root.u.def.value;
7370
7371 errnode->u.b.veneer->vma = vma;
7372 break;
7373
7374 case VFP11_ERRATUM_ARM_VENEER:
7375 case VFP11_ERRATUM_THUMB_VENEER:
7376 /* Find return location. */
7377 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7378 errnode->u.v.id);
7379
7380 myh = elf_link_hash_lookup
7381 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7382
7383 if (myh == NULL)
7384 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7385 "`%s'"), abfd, tmp_name);
7386
7387 vma = myh->root.u.def.section->output_section->vma
7388 + myh->root.u.def.section->output_offset
7389 + myh->root.u.def.value;
7390
7391 errnode->u.v.branch->vma = vma;
7392 break;
7393
7394 default:
7395 abort ();
7396 }
7397 }
7398 }
7399
7400 free (tmp_name);
7401 }
7402
7403 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7404 return locations after sections have been laid out, using
7405 specially-named symbols. */
7406
7407 void
7408 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
7409 struct bfd_link_info *link_info)
7410 {
7411 asection *sec;
7412 struct elf32_arm_link_hash_table *globals;
7413 char *tmp_name;
7414
7415 if (bfd_link_relocatable (link_info))
7416 return;
7417
7418 /* Skip if this bfd does not correspond to an ELF image. */
7419 if (! is_arm_elf (abfd))
7420 return;
7421
7422 globals = elf32_arm_hash_table (link_info);
7423 if (globals == NULL)
7424 return;
7425
7426 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7427 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7428
7429 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7430 {
7431 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7432 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
7433
7434 for (; errnode != NULL; errnode = errnode->next)
7435 {
7436 struct elf_link_hash_entry *myh;
7437 bfd_vma vma;
7438
7439 switch (errnode->type)
7440 {
7441 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
7442 /* Find veneer symbol. */
7443 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7444 errnode->u.b.veneer->u.v.id);
7445
7446 myh = elf_link_hash_lookup
7447 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7448
7449 if (myh == NULL)
7450 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7451 "`%s'"), abfd, tmp_name);
7452
7453 vma = myh->root.u.def.section->output_section->vma
7454 + myh->root.u.def.section->output_offset
7455 + myh->root.u.def.value;
7456
7457 errnode->u.b.veneer->vma = vma;
7458 break;
7459
7460 case STM32L4XX_ERRATUM_VENEER:
7461 /* Find return location. */
7462 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7463 errnode->u.v.id);
7464
7465 myh = elf_link_hash_lookup
7466 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7467
7468 if (myh == NULL)
7469 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7470 "`%s'"), abfd, tmp_name);
7471
7472 vma = myh->root.u.def.section->output_section->vma
7473 + myh->root.u.def.section->output_offset
7474 + myh->root.u.def.value;
7475
7476 errnode->u.v.branch->vma = vma;
7477 break;
7478
7479 default:
7480 abort ();
7481 }
7482 }
7483 }
7484
7485 free (tmp_name);
7486 }
7487
7488 static inline bfd_boolean
7489 is_thumb2_ldmia (const insn32 insn)
7490 {
7491 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7492 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7493 return (insn & 0xffd02000) == 0xe8900000;
7494 }
7495
7496 static inline bfd_boolean
7497 is_thumb2_ldmdb (const insn32 insn)
7498 {
7499 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7500 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7501 return (insn & 0xffd02000) == 0xe9100000;
7502 }
7503
7504 static inline bfd_boolean
7505 is_thumb2_vldm (const insn32 insn)
7506 {
7507 /* A6.5 Extension register load or store instruction
7508 A7.7.229
7509 We look for SP 32-bit and DP 64-bit registers.
7510 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
7511 <list> is consecutive 64-bit registers
7512 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
7513 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7514 <list> is consecutive 32-bit registers
7515 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7516 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7517 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7518 return
7519 (((insn & 0xfe100f00) == 0xec100b00) ||
7520 ((insn & 0xfe100f00) == 0xec100a00))
7521 && /* (IA without !). */
7522 (((((insn << 7) >> 28) & 0xd) == 0x4)
7523 /* (IA with !), includes VPOP (when reg number is SP). */
7524 || ((((insn << 7) >> 28) & 0xd) == 0x5)
7525 /* (DB with !). */
7526 || ((((insn << 7) >> 28) & 0xd) == 0x9));
7527 }
7528
7529 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7530 VLDM opcode and:
7531 - computes the number and the mode of memory accesses
7532 - decides if the replacement should be done:
7533 . replaces only if > 8-word accesses
7534 . or (testing purposes only) replaces all accesses. */
7535
7536 static bfd_boolean
7537 stm32l4xx_need_create_replacing_stub (const insn32 insn,
7538 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
7539 {
7540 int nb_words = 0;
7541
7542 /* The field encoding the register list is the same for both LDMIA
7543 and LDMDB encodings. */
7544 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
7545 nb_words = popcount (insn & 0x0000ffff);
7546 else if (is_thumb2_vldm (insn))
7547 nb_words = (insn & 0xff);
7548
7549 /* DEFAULT mode accounts for the real bug condition situation,
7550 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7551 return
7552 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
7553 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
7554 }
7555
7556 /* Look for potentially-troublesome code sequences which might trigger
7557 the STM STM32L4XX erratum. */
7558
7559 bfd_boolean
7560 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
7561 struct bfd_link_info *link_info)
7562 {
7563 asection *sec;
7564 bfd_byte *contents = NULL;
7565 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7566
7567 if (globals == NULL)
7568 return FALSE;
7569
7570 /* If we are only performing a partial link do not bother
7571 to construct any glue. */
7572 if (bfd_link_relocatable (link_info))
7573 return TRUE;
7574
7575 /* Skip if this bfd does not correspond to an ELF image. */
7576 if (! is_arm_elf (abfd))
7577 return TRUE;
7578
7579 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
7580 return TRUE;
7581
7582 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7583 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7584 return TRUE;
7585
7586 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7587 {
7588 unsigned int i, span;
7589 struct _arm_elf_section_data *sec_data;
7590
7591 /* If we don't have executable progbits, we're not interested in this
7592 section. Also skip if section is to be excluded. */
7593 if (elf_section_type (sec) != SHT_PROGBITS
7594 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7595 || (sec->flags & SEC_EXCLUDE) != 0
7596 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7597 || sec->output_section == bfd_abs_section_ptr
7598 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
7599 continue;
7600
7601 sec_data = elf32_arm_section_data (sec);
7602
7603 if (sec_data->mapcount == 0)
7604 continue;
7605
7606 if (elf_section_data (sec)->this_hdr.contents != NULL)
7607 contents = elf_section_data (sec)->this_hdr.contents;
7608 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7609 goto error_return;
7610
7611 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7612 elf32_arm_compare_mapping);
7613
7614 for (span = 0; span < sec_data->mapcount; span++)
7615 {
7616 unsigned int span_start = sec_data->map[span].vma;
7617 unsigned int span_end = (span == sec_data->mapcount - 1)
7618 ? sec->size : sec_data->map[span + 1].vma;
7619 char span_type = sec_data->map[span].type;
7620 int itblock_current_pos = 0;
7621
7622 /* Only Thumb2 mode need be supported with this CM4 specific
7623 code, we should not encounter any arm mode eg span_type
7624 != 'a'. */
7625 if (span_type != 't')
7626 continue;
7627
7628 for (i = span_start; i < span_end;)
7629 {
7630 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
7631 bfd_boolean insn_32bit = FALSE;
7632 bfd_boolean is_ldm = FALSE;
7633 bfd_boolean is_vldm = FALSE;
7634 bfd_boolean is_not_last_in_it_block = FALSE;
7635
7636 /* The first 16-bits of all 32-bit thumb2 instructions start
7637 with opcode[15..13]=0b111 and the encoded op1 can be anything
7638 except opcode[12..11]!=0b00.
7639 See 32-bit Thumb instruction encoding. */
7640 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
7641 insn_32bit = TRUE;
7642
7643 /* Compute the predicate that tells if the instruction
7644 is concerned by the IT block
7645 - Creates an error if there is a ldm that is not
7646 last in the IT block thus cannot be replaced
7647 - Otherwise we can create a branch at the end of the
7648 IT block, it will be controlled naturally by IT
7649 with the proper pseudo-predicate
7650 - So the only interesting predicate is the one that
7651 tells that we are not on the last item of an IT
7652 block. */
7653 if (itblock_current_pos != 0)
7654 is_not_last_in_it_block = !!--itblock_current_pos;
7655
7656 if (insn_32bit)
7657 {
7658 /* Load the rest of the insn (in manual-friendly order). */
7659 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
7660 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
7661 is_vldm = is_thumb2_vldm (insn);
7662
7663 /* Veneers are created for (v)ldm depending on
7664 option flags and memory accesses conditions; but
7665 if the instruction is not the last instruction of
7666 an IT block, we cannot create a jump there, so we
7667 bail out. */
7668 if ((is_ldm || is_vldm) &&
7669 stm32l4xx_need_create_replacing_stub
7670 (insn, globals->stm32l4xx_fix))
7671 {
7672 if (is_not_last_in_it_block)
7673 {
7674 (*_bfd_error_handler)
7675 /* Note - overlong line used here to allow for translation. */
7676 (_("\
7677 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7678 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7679 abfd, sec, (long)i);
7680 }
7681 else
7682 {
7683 elf32_stm32l4xx_erratum_list *newerr =
7684 (elf32_stm32l4xx_erratum_list *)
7685 bfd_zmalloc
7686 (sizeof (elf32_stm32l4xx_erratum_list));
7687
7688 elf32_arm_section_data (sec)
7689 ->stm32l4xx_erratumcount += 1;
7690 newerr->u.b.insn = insn;
7691 /* We create only thumb branches. */
7692 newerr->type =
7693 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
7694 record_stm32l4xx_erratum_veneer
7695 (link_info, newerr, abfd, sec,
7696 i,
7697 is_ldm ?
7698 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
7699 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
7700 newerr->vma = -1;
7701 newerr->next = sec_data->stm32l4xx_erratumlist;
7702 sec_data->stm32l4xx_erratumlist = newerr;
7703 }
7704 }
7705 }
7706 else
7707 {
7708 /* A7.7.37 IT p208
7709 IT blocks are only encoded in T1
7710 Encoding T1: IT{x{y{z}}} <firstcond>
7711 1 0 1 1 - 1 1 1 1 - firstcond - mask
7712 if mask = '0000' then see 'related encodings'
7713 We don't deal with UNPREDICTABLE, just ignore these.
7714 There can be no nested IT blocks so an IT block
7715 is naturally a new one for which it is worth
7716 computing its size. */
7717 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) &&
7718 ((insn & 0x000f) != 0x0000);
7719 /* If we have a new IT block we compute its size. */
7720 if (is_newitblock)
7721 {
7722 /* Compute the number of instructions controlled
7723 by the IT block, it will be used to decide
7724 whether we are inside an IT block or not. */
7725 unsigned int mask = insn & 0x000f;
7726 itblock_current_pos = 4 - ctz (mask);
7727 }
7728 }
7729
7730 i += insn_32bit ? 4 : 2;
7731 }
7732 }
7733
7734 if (contents != NULL
7735 && elf_section_data (sec)->this_hdr.contents != contents)
7736 free (contents);
7737 contents = NULL;
7738 }
7739
7740 return TRUE;
7741
7742 error_return:
7743 if (contents != NULL
7744 && elf_section_data (sec)->this_hdr.contents != contents)
7745 free (contents);
7746
7747 return FALSE;
7748 }
7749
7750 /* Set target relocation values needed during linking. */
7751
7752 void
7753 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7754 struct bfd_link_info *link_info,
7755 int target1_is_rel,
7756 char * target2_type,
7757 int fix_v4bx,
7758 int use_blx,
7759 bfd_arm_vfp11_fix vfp11_fix,
7760 bfd_arm_stm32l4xx_fix stm32l4xx_fix,
7761 int no_enum_warn, int no_wchar_warn,
7762 int pic_veneer, int fix_cortex_a8,
7763 int fix_arm1176)
7764 {
7765 struct elf32_arm_link_hash_table *globals;
7766
7767 globals = elf32_arm_hash_table (link_info);
7768 if (globals == NULL)
7769 return;
7770
7771 globals->target1_is_rel = target1_is_rel;
7772 if (strcmp (target2_type, "rel") == 0)
7773 globals->target2_reloc = R_ARM_REL32;
7774 else if (strcmp (target2_type, "abs") == 0)
7775 globals->target2_reloc = R_ARM_ABS32;
7776 else if (strcmp (target2_type, "got-rel") == 0)
7777 globals->target2_reloc = R_ARM_GOT_PREL;
7778 else
7779 {
7780 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7781 target2_type);
7782 }
7783 globals->fix_v4bx = fix_v4bx;
7784 globals->use_blx |= use_blx;
7785 globals->vfp11_fix = vfp11_fix;
7786 globals->stm32l4xx_fix = stm32l4xx_fix;
7787 globals->pic_veneer = pic_veneer;
7788 globals->fix_cortex_a8 = fix_cortex_a8;
7789 globals->fix_arm1176 = fix_arm1176;
7790
7791 BFD_ASSERT (is_arm_elf (output_bfd));
7792 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7793 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7794 }
7795
7796 /* Replace the target offset of a Thumb bl or b.w instruction. */
7797
7798 static void
7799 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7800 {
7801 bfd_vma upper;
7802 bfd_vma lower;
7803 int reloc_sign;
7804
7805 BFD_ASSERT ((offset & 1) == 0);
7806
7807 upper = bfd_get_16 (abfd, insn);
7808 lower = bfd_get_16 (abfd, insn + 2);
7809 reloc_sign = (offset < 0) ? 1 : 0;
7810 upper = (upper & ~(bfd_vma) 0x7ff)
7811 | ((offset >> 12) & 0x3ff)
7812 | (reloc_sign << 10);
7813 lower = (lower & ~(bfd_vma) 0x2fff)
7814 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7815 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7816 | ((offset >> 1) & 0x7ff);
7817 bfd_put_16 (abfd, upper, insn);
7818 bfd_put_16 (abfd, lower, insn + 2);
7819 }
7820
7821 /* Thumb code calling an ARM function. */
7822
7823 static int
7824 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7825 const char * name,
7826 bfd * input_bfd,
7827 bfd * output_bfd,
7828 asection * input_section,
7829 bfd_byte * hit_data,
7830 asection * sym_sec,
7831 bfd_vma offset,
7832 bfd_signed_vma addend,
7833 bfd_vma val,
7834 char **error_message)
7835 {
7836 asection * s = 0;
7837 bfd_vma my_offset;
7838 long int ret_offset;
7839 struct elf_link_hash_entry * myh;
7840 struct elf32_arm_link_hash_table * globals;
7841
7842 myh = find_thumb_glue (info, name, error_message);
7843 if (myh == NULL)
7844 return FALSE;
7845
7846 globals = elf32_arm_hash_table (info);
7847 BFD_ASSERT (globals != NULL);
7848 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7849
7850 my_offset = myh->root.u.def.value;
7851
7852 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7853 THUMB2ARM_GLUE_SECTION_NAME);
7854
7855 BFD_ASSERT (s != NULL);
7856 BFD_ASSERT (s->contents != NULL);
7857 BFD_ASSERT (s->output_section != NULL);
7858
7859 if ((my_offset & 0x01) == 0x01)
7860 {
7861 if (sym_sec != NULL
7862 && sym_sec->owner != NULL
7863 && !INTERWORK_FLAG (sym_sec->owner))
7864 {
7865 (*_bfd_error_handler)
7866 (_("%B(%s): warning: interworking not enabled.\n"
7867 " first occurrence: %B: Thumb call to ARM"),
7868 sym_sec->owner, input_bfd, name);
7869
7870 return FALSE;
7871 }
7872
7873 --my_offset;
7874 myh->root.u.def.value = my_offset;
7875
7876 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7877 s->contents + my_offset);
7878
7879 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7880 s->contents + my_offset + 2);
7881
7882 ret_offset =
7883 /* Address of destination of the stub. */
7884 ((bfd_signed_vma) val)
7885 - ((bfd_signed_vma)
7886 /* Offset from the start of the current section
7887 to the start of the stubs. */
7888 (s->output_offset
7889 /* Offset of the start of this stub from the start of the stubs. */
7890 + my_offset
7891 /* Address of the start of the current section. */
7892 + s->output_section->vma)
7893 /* The branch instruction is 4 bytes into the stub. */
7894 + 4
7895 /* ARM branches work from the pc of the instruction + 8. */
7896 + 8);
7897
7898 put_arm_insn (globals, output_bfd,
7899 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7900 s->contents + my_offset + 4);
7901 }
7902
7903 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7904
7905 /* Now go back and fix up the original BL insn to point to here. */
7906 ret_offset =
7907 /* Address of where the stub is located. */
7908 (s->output_section->vma + s->output_offset + my_offset)
7909 /* Address of where the BL is located. */
7910 - (input_section->output_section->vma + input_section->output_offset
7911 + offset)
7912 /* Addend in the relocation. */
7913 - addend
7914 /* Biassing for PC-relative addressing. */
7915 - 8;
7916
7917 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7918
7919 return TRUE;
7920 }
7921
7922 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7923
7924 static struct elf_link_hash_entry *
7925 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7926 const char * name,
7927 bfd * input_bfd,
7928 bfd * output_bfd,
7929 asection * sym_sec,
7930 bfd_vma val,
7931 asection * s,
7932 char ** error_message)
7933 {
7934 bfd_vma my_offset;
7935 long int ret_offset;
7936 struct elf_link_hash_entry * myh;
7937 struct elf32_arm_link_hash_table * globals;
7938
7939 myh = find_arm_glue (info, name, error_message);
7940 if (myh == NULL)
7941 return NULL;
7942
7943 globals = elf32_arm_hash_table (info);
7944 BFD_ASSERT (globals != NULL);
7945 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7946
7947 my_offset = myh->root.u.def.value;
7948
7949 if ((my_offset & 0x01) == 0x01)
7950 {
7951 if (sym_sec != NULL
7952 && sym_sec->owner != NULL
7953 && !INTERWORK_FLAG (sym_sec->owner))
7954 {
7955 (*_bfd_error_handler)
7956 (_("%B(%s): warning: interworking not enabled.\n"
7957 " first occurrence: %B: arm call to thumb"),
7958 sym_sec->owner, input_bfd, name);
7959 }
7960
7961 --my_offset;
7962 myh->root.u.def.value = my_offset;
7963
7964 if (bfd_link_pic (info)
7965 || globals->root.is_relocatable_executable
7966 || globals->pic_veneer)
7967 {
7968 /* For relocatable objects we can't use absolute addresses,
7969 so construct the address from a relative offset. */
7970 /* TODO: If the offset is small it's probably worth
7971 constructing the address with adds. */
7972 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7973 s->contents + my_offset);
7974 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7975 s->contents + my_offset + 4);
7976 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7977 s->contents + my_offset + 8);
7978 /* Adjust the offset by 4 for the position of the add,
7979 and 8 for the pipeline offset. */
7980 ret_offset = (val - (s->output_offset
7981 + s->output_section->vma
7982 + my_offset + 12))
7983 | 1;
7984 bfd_put_32 (output_bfd, ret_offset,
7985 s->contents + my_offset + 12);
7986 }
7987 else if (globals->use_blx)
7988 {
7989 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7990 s->contents + my_offset);
7991
7992 /* It's a thumb address. Add the low order bit. */
7993 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7994 s->contents + my_offset + 4);
7995 }
7996 else
7997 {
7998 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7999 s->contents + my_offset);
8000
8001 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8002 s->contents + my_offset + 4);
8003
8004 /* It's a thumb address. Add the low order bit. */
8005 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8006 s->contents + my_offset + 8);
8007
8008 my_offset += 12;
8009 }
8010 }
8011
8012 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8013
8014 return myh;
8015 }
8016
8017 /* Arm code calling a Thumb function. */
8018
8019 static int
8020 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8021 const char * name,
8022 bfd * input_bfd,
8023 bfd * output_bfd,
8024 asection * input_section,
8025 bfd_byte * hit_data,
8026 asection * sym_sec,
8027 bfd_vma offset,
8028 bfd_signed_vma addend,
8029 bfd_vma val,
8030 char **error_message)
8031 {
8032 unsigned long int tmp;
8033 bfd_vma my_offset;
8034 asection * s;
8035 long int ret_offset;
8036 struct elf_link_hash_entry * myh;
8037 struct elf32_arm_link_hash_table * globals;
8038
8039 globals = elf32_arm_hash_table (info);
8040 BFD_ASSERT (globals != NULL);
8041 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8042
8043 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8044 ARM2THUMB_GLUE_SECTION_NAME);
8045 BFD_ASSERT (s != NULL);
8046 BFD_ASSERT (s->contents != NULL);
8047 BFD_ASSERT (s->output_section != NULL);
8048
8049 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8050 sym_sec, val, s, error_message);
8051 if (!myh)
8052 return FALSE;
8053
8054 my_offset = myh->root.u.def.value;
8055 tmp = bfd_get_32 (input_bfd, hit_data);
8056 tmp = tmp & 0xFF000000;
8057
8058 /* Somehow these are both 4 too far, so subtract 8. */
8059 ret_offset = (s->output_offset
8060 + my_offset
8061 + s->output_section->vma
8062 - (input_section->output_offset
8063 + input_section->output_section->vma
8064 + offset + addend)
8065 - 8);
8066
8067 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
8068
8069 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
8070
8071 return TRUE;
8072 }
8073
8074 /* Populate Arm stub for an exported Thumb function. */
8075
8076 static bfd_boolean
8077 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
8078 {
8079 struct bfd_link_info * info = (struct bfd_link_info *) inf;
8080 asection * s;
8081 struct elf_link_hash_entry * myh;
8082 struct elf32_arm_link_hash_entry *eh;
8083 struct elf32_arm_link_hash_table * globals;
8084 asection *sec;
8085 bfd_vma val;
8086 char *error_message;
8087
8088 eh = elf32_arm_hash_entry (h);
8089 /* Allocate stubs for exported Thumb functions on v4t. */
8090 if (eh->export_glue == NULL)
8091 return TRUE;
8092
8093 globals = elf32_arm_hash_table (info);
8094 BFD_ASSERT (globals != NULL);
8095 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8096
8097 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8098 ARM2THUMB_GLUE_SECTION_NAME);
8099 BFD_ASSERT (s != NULL);
8100 BFD_ASSERT (s->contents != NULL);
8101 BFD_ASSERT (s->output_section != NULL);
8102
8103 sec = eh->export_glue->root.u.def.section;
8104
8105 BFD_ASSERT (sec->output_section != NULL);
8106
8107 val = eh->export_glue->root.u.def.value + sec->output_offset
8108 + sec->output_section->vma;
8109
8110 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
8111 h->root.u.def.section->owner,
8112 globals->obfd, sec, val, s,
8113 &error_message);
8114 BFD_ASSERT (myh);
8115 return TRUE;
8116 }
8117
8118 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8119
8120 static bfd_vma
8121 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
8122 {
8123 bfd_byte *p;
8124 bfd_vma glue_addr;
8125 asection *s;
8126 struct elf32_arm_link_hash_table *globals;
8127
8128 globals = elf32_arm_hash_table (info);
8129 BFD_ASSERT (globals != NULL);
8130 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8131
8132 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8133 ARM_BX_GLUE_SECTION_NAME);
8134 BFD_ASSERT (s != NULL);
8135 BFD_ASSERT (s->contents != NULL);
8136 BFD_ASSERT (s->output_section != NULL);
8137
8138 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
8139
8140 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
8141
8142 if ((globals->bx_glue_offset[reg] & 1) == 0)
8143 {
8144 p = s->contents + glue_addr;
8145 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
8146 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
8147 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
8148 globals->bx_glue_offset[reg] |= 1;
8149 }
8150
8151 return glue_addr + s->output_section->vma + s->output_offset;
8152 }
8153
8154 /* Generate Arm stubs for exported Thumb symbols. */
8155 static void
8156 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
8157 struct bfd_link_info *link_info)
8158 {
8159 struct elf32_arm_link_hash_table * globals;
8160
8161 if (link_info == NULL)
8162 /* Ignore this if we are not called by the ELF backend linker. */
8163 return;
8164
8165 globals = elf32_arm_hash_table (link_info);
8166 if (globals == NULL)
8167 return;
8168
8169 /* If blx is available then exported Thumb symbols are OK and there is
8170 nothing to do. */
8171 if (globals->use_blx)
8172 return;
8173
8174 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
8175 link_info);
8176 }
8177
8178 /* Reserve space for COUNT dynamic relocations in relocation selection
8179 SRELOC. */
8180
8181 static void
8182 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
8183 bfd_size_type count)
8184 {
8185 struct elf32_arm_link_hash_table *htab;
8186
8187 htab = elf32_arm_hash_table (info);
8188 BFD_ASSERT (htab->root.dynamic_sections_created);
8189 if (sreloc == NULL)
8190 abort ();
8191 sreloc->size += RELOC_SIZE (htab) * count;
8192 }
8193
8194 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8195 dynamic, the relocations should go in SRELOC, otherwise they should
8196 go in the special .rel.iplt section. */
8197
8198 static void
8199 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
8200 bfd_size_type count)
8201 {
8202 struct elf32_arm_link_hash_table *htab;
8203
8204 htab = elf32_arm_hash_table (info);
8205 if (!htab->root.dynamic_sections_created)
8206 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
8207 else
8208 {
8209 BFD_ASSERT (sreloc != NULL);
8210 sreloc->size += RELOC_SIZE (htab) * count;
8211 }
8212 }
8213
8214 /* Add relocation REL to the end of relocation section SRELOC. */
8215
8216 static void
8217 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
8218 asection *sreloc, Elf_Internal_Rela *rel)
8219 {
8220 bfd_byte *loc;
8221 struct elf32_arm_link_hash_table *htab;
8222
8223 htab = elf32_arm_hash_table (info);
8224 if (!htab->root.dynamic_sections_created
8225 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
8226 sreloc = htab->root.irelplt;
8227 if (sreloc == NULL)
8228 abort ();
8229 loc = sreloc->contents;
8230 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
8231 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
8232 abort ();
8233 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
8234 }
8235
8236 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8237 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8238 to .plt. */
8239
8240 static void
8241 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
8242 bfd_boolean is_iplt_entry,
8243 union gotplt_union *root_plt,
8244 struct arm_plt_info *arm_plt)
8245 {
8246 struct elf32_arm_link_hash_table *htab;
8247 asection *splt;
8248 asection *sgotplt;
8249
8250 htab = elf32_arm_hash_table (info);
8251
8252 if (is_iplt_entry)
8253 {
8254 splt = htab->root.iplt;
8255 sgotplt = htab->root.igotplt;
8256
8257 /* NaCl uses a special first entry in .iplt too. */
8258 if (htab->nacl_p && splt->size == 0)
8259 splt->size += htab->plt_header_size;
8260
8261 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8262 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
8263 }
8264 else
8265 {
8266 splt = htab->root.splt;
8267 sgotplt = htab->root.sgotplt;
8268
8269 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8270 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
8271
8272 /* If this is the first .plt entry, make room for the special
8273 first entry. */
8274 if (splt->size == 0)
8275 splt->size += htab->plt_header_size;
8276
8277 htab->next_tls_desc_index++;
8278 }
8279
8280 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8281 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8282 splt->size += PLT_THUMB_STUB_SIZE;
8283 root_plt->offset = splt->size;
8284 splt->size += htab->plt_entry_size;
8285
8286 if (!htab->symbian_p)
8287 {
8288 /* We also need to make an entry in the .got.plt section, which
8289 will be placed in the .got section by the linker script. */
8290 if (is_iplt_entry)
8291 arm_plt->got_offset = sgotplt->size;
8292 else
8293 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
8294 sgotplt->size += 4;
8295 }
8296 }
8297
8298 static bfd_vma
8299 arm_movw_immediate (bfd_vma value)
8300 {
8301 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
8302 }
8303
8304 static bfd_vma
8305 arm_movt_immediate (bfd_vma value)
8306 {
8307 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
8308 }
8309
8310 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8311 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8312 Otherwise, DYNINDX is the index of the symbol in the dynamic
8313 symbol table and SYM_VALUE is undefined.
8314
8315 ROOT_PLT points to the offset of the PLT entry from the start of its
8316 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8317 bookkeeping information.
8318
8319 Returns FALSE if there was a problem. */
8320
8321 static bfd_boolean
8322 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
8323 union gotplt_union *root_plt,
8324 struct arm_plt_info *arm_plt,
8325 int dynindx, bfd_vma sym_value)
8326 {
8327 struct elf32_arm_link_hash_table *htab;
8328 asection *sgot;
8329 asection *splt;
8330 asection *srel;
8331 bfd_byte *loc;
8332 bfd_vma plt_index;
8333 Elf_Internal_Rela rel;
8334 bfd_vma plt_header_size;
8335 bfd_vma got_header_size;
8336
8337 htab = elf32_arm_hash_table (info);
8338
8339 /* Pick the appropriate sections and sizes. */
8340 if (dynindx == -1)
8341 {
8342 splt = htab->root.iplt;
8343 sgot = htab->root.igotplt;
8344 srel = htab->root.irelplt;
8345
8346 /* There are no reserved entries in .igot.plt, and no special
8347 first entry in .iplt. */
8348 got_header_size = 0;
8349 plt_header_size = 0;
8350 }
8351 else
8352 {
8353 splt = htab->root.splt;
8354 sgot = htab->root.sgotplt;
8355 srel = htab->root.srelplt;
8356
8357 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
8358 plt_header_size = htab->plt_header_size;
8359 }
8360 BFD_ASSERT (splt != NULL && srel != NULL);
8361
8362 /* Fill in the entry in the procedure linkage table. */
8363 if (htab->symbian_p)
8364 {
8365 BFD_ASSERT (dynindx >= 0);
8366 put_arm_insn (htab, output_bfd,
8367 elf32_arm_symbian_plt_entry[0],
8368 splt->contents + root_plt->offset);
8369 bfd_put_32 (output_bfd,
8370 elf32_arm_symbian_plt_entry[1],
8371 splt->contents + root_plt->offset + 4);
8372
8373 /* Fill in the entry in the .rel.plt section. */
8374 rel.r_offset = (splt->output_section->vma
8375 + splt->output_offset
8376 + root_plt->offset + 4);
8377 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
8378
8379 /* Get the index in the procedure linkage table which
8380 corresponds to this symbol. This is the index of this symbol
8381 in all the symbols for which we are making plt entries. The
8382 first entry in the procedure linkage table is reserved. */
8383 plt_index = ((root_plt->offset - plt_header_size)
8384 / htab->plt_entry_size);
8385 }
8386 else
8387 {
8388 bfd_vma got_offset, got_address, plt_address;
8389 bfd_vma got_displacement, initial_got_entry;
8390 bfd_byte * ptr;
8391
8392 BFD_ASSERT (sgot != NULL);
8393
8394 /* Get the offset into the .(i)got.plt table of the entry that
8395 corresponds to this function. */
8396 got_offset = (arm_plt->got_offset & -2);
8397
8398 /* Get the index in the procedure linkage table which
8399 corresponds to this symbol. This is the index of this symbol
8400 in all the symbols for which we are making plt entries.
8401 After the reserved .got.plt entries, all symbols appear in
8402 the same order as in .plt. */
8403 plt_index = (got_offset - got_header_size) / 4;
8404
8405 /* Calculate the address of the GOT entry. */
8406 got_address = (sgot->output_section->vma
8407 + sgot->output_offset
8408 + got_offset);
8409
8410 /* ...and the address of the PLT entry. */
8411 plt_address = (splt->output_section->vma
8412 + splt->output_offset
8413 + root_plt->offset);
8414
8415 ptr = splt->contents + root_plt->offset;
8416 if (htab->vxworks_p && bfd_link_pic (info))
8417 {
8418 unsigned int i;
8419 bfd_vma val;
8420
8421 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8422 {
8423 val = elf32_arm_vxworks_shared_plt_entry[i];
8424 if (i == 2)
8425 val |= got_address - sgot->output_section->vma;
8426 if (i == 5)
8427 val |= plt_index * RELOC_SIZE (htab);
8428 if (i == 2 || i == 5)
8429 bfd_put_32 (output_bfd, val, ptr);
8430 else
8431 put_arm_insn (htab, output_bfd, val, ptr);
8432 }
8433 }
8434 else if (htab->vxworks_p)
8435 {
8436 unsigned int i;
8437 bfd_vma val;
8438
8439 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8440 {
8441 val = elf32_arm_vxworks_exec_plt_entry[i];
8442 if (i == 2)
8443 val |= got_address;
8444 if (i == 4)
8445 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
8446 if (i == 5)
8447 val |= plt_index * RELOC_SIZE (htab);
8448 if (i == 2 || i == 5)
8449 bfd_put_32 (output_bfd, val, ptr);
8450 else
8451 put_arm_insn (htab, output_bfd, val, ptr);
8452 }
8453
8454 loc = (htab->srelplt2->contents
8455 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8456
8457 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8458 referencing the GOT for this PLT entry. */
8459 rel.r_offset = plt_address + 8;
8460 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8461 rel.r_addend = got_offset;
8462 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8463 loc += RELOC_SIZE (htab);
8464
8465 /* Create the R_ARM_ABS32 relocation referencing the
8466 beginning of the PLT for this GOT entry. */
8467 rel.r_offset = got_address;
8468 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8469 rel.r_addend = 0;
8470 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8471 }
8472 else if (htab->nacl_p)
8473 {
8474 /* Calculate the displacement between the PLT slot and the
8475 common tail that's part of the special initial PLT slot. */
8476 int32_t tail_displacement
8477 = ((splt->output_section->vma + splt->output_offset
8478 + ARM_NACL_PLT_TAIL_OFFSET)
8479 - (plt_address + htab->plt_entry_size + 4));
8480 BFD_ASSERT ((tail_displacement & 3) == 0);
8481 tail_displacement >>= 2;
8482
8483 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
8484 || (-tail_displacement & 0xff000000) == 0);
8485
8486 /* Calculate the displacement between the PLT slot and the entry
8487 in the GOT. The offset accounts for the value produced by
8488 adding to pc in the penultimate instruction of the PLT stub. */
8489 got_displacement = (got_address
8490 - (plt_address + htab->plt_entry_size));
8491
8492 /* NaCl does not support interworking at all. */
8493 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
8494
8495 put_arm_insn (htab, output_bfd,
8496 elf32_arm_nacl_plt_entry[0]
8497 | arm_movw_immediate (got_displacement),
8498 ptr + 0);
8499 put_arm_insn (htab, output_bfd,
8500 elf32_arm_nacl_plt_entry[1]
8501 | arm_movt_immediate (got_displacement),
8502 ptr + 4);
8503 put_arm_insn (htab, output_bfd,
8504 elf32_arm_nacl_plt_entry[2],
8505 ptr + 8);
8506 put_arm_insn (htab, output_bfd,
8507 elf32_arm_nacl_plt_entry[3]
8508 | (tail_displacement & 0x00ffffff),
8509 ptr + 12);
8510 }
8511 else if (using_thumb_only (htab))
8512 {
8513 /* PR ld/16017: Generate thumb only PLT entries. */
8514 if (!using_thumb2 (htab))
8515 {
8516 /* FIXME: We ought to be able to generate thumb-1 PLT
8517 instructions... */
8518 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8519 output_bfd);
8520 return FALSE;
8521 }
8522
8523 /* Calculate the displacement between the PLT slot and the entry in
8524 the GOT. The 12-byte offset accounts for the value produced by
8525 adding to pc in the 3rd instruction of the PLT stub. */
8526 got_displacement = got_address - (plt_address + 12);
8527
8528 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8529 instead of 'put_thumb_insn'. */
8530 put_arm_insn (htab, output_bfd,
8531 elf32_thumb2_plt_entry[0]
8532 | ((got_displacement & 0x000000ff) << 16)
8533 | ((got_displacement & 0x00000700) << 20)
8534 | ((got_displacement & 0x00000800) >> 1)
8535 | ((got_displacement & 0x0000f000) >> 12),
8536 ptr + 0);
8537 put_arm_insn (htab, output_bfd,
8538 elf32_thumb2_plt_entry[1]
8539 | ((got_displacement & 0x00ff0000) )
8540 | ((got_displacement & 0x07000000) << 4)
8541 | ((got_displacement & 0x08000000) >> 17)
8542 | ((got_displacement & 0xf0000000) >> 28),
8543 ptr + 4);
8544 put_arm_insn (htab, output_bfd,
8545 elf32_thumb2_plt_entry[2],
8546 ptr + 8);
8547 put_arm_insn (htab, output_bfd,
8548 elf32_thumb2_plt_entry[3],
8549 ptr + 12);
8550 }
8551 else
8552 {
8553 /* Calculate the displacement between the PLT slot and the
8554 entry in the GOT. The eight-byte offset accounts for the
8555 value produced by adding to pc in the first instruction
8556 of the PLT stub. */
8557 got_displacement = got_address - (plt_address + 8);
8558
8559 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8560 {
8561 put_thumb_insn (htab, output_bfd,
8562 elf32_arm_plt_thumb_stub[0], ptr - 4);
8563 put_thumb_insn (htab, output_bfd,
8564 elf32_arm_plt_thumb_stub[1], ptr - 2);
8565 }
8566
8567 if (!elf32_arm_use_long_plt_entry)
8568 {
8569 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8570
8571 put_arm_insn (htab, output_bfd,
8572 elf32_arm_plt_entry_short[0]
8573 | ((got_displacement & 0x0ff00000) >> 20),
8574 ptr + 0);
8575 put_arm_insn (htab, output_bfd,
8576 elf32_arm_plt_entry_short[1]
8577 | ((got_displacement & 0x000ff000) >> 12),
8578 ptr+ 4);
8579 put_arm_insn (htab, output_bfd,
8580 elf32_arm_plt_entry_short[2]
8581 | (got_displacement & 0x00000fff),
8582 ptr + 8);
8583 #ifdef FOUR_WORD_PLT
8584 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
8585 #endif
8586 }
8587 else
8588 {
8589 put_arm_insn (htab, output_bfd,
8590 elf32_arm_plt_entry_long[0]
8591 | ((got_displacement & 0xf0000000) >> 28),
8592 ptr + 0);
8593 put_arm_insn (htab, output_bfd,
8594 elf32_arm_plt_entry_long[1]
8595 | ((got_displacement & 0x0ff00000) >> 20),
8596 ptr + 4);
8597 put_arm_insn (htab, output_bfd,
8598 elf32_arm_plt_entry_long[2]
8599 | ((got_displacement & 0x000ff000) >> 12),
8600 ptr+ 8);
8601 put_arm_insn (htab, output_bfd,
8602 elf32_arm_plt_entry_long[3]
8603 | (got_displacement & 0x00000fff),
8604 ptr + 12);
8605 }
8606 }
8607
8608 /* Fill in the entry in the .rel(a).(i)plt section. */
8609 rel.r_offset = got_address;
8610 rel.r_addend = 0;
8611 if (dynindx == -1)
8612 {
8613 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8614 The dynamic linker or static executable then calls SYM_VALUE
8615 to determine the correct run-time value of the .igot.plt entry. */
8616 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
8617 initial_got_entry = sym_value;
8618 }
8619 else
8620 {
8621 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
8622 initial_got_entry = (splt->output_section->vma
8623 + splt->output_offset);
8624 }
8625
8626 /* Fill in the entry in the global offset table. */
8627 bfd_put_32 (output_bfd, initial_got_entry,
8628 sgot->contents + got_offset);
8629 }
8630
8631 if (dynindx == -1)
8632 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
8633 else
8634 {
8635 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8636 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8637 }
8638
8639 return TRUE;
8640 }
8641
8642 /* Some relocations map to different relocations depending on the
8643 target. Return the real relocation. */
8644
8645 static int
8646 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
8647 int r_type)
8648 {
8649 switch (r_type)
8650 {
8651 case R_ARM_TARGET1:
8652 if (globals->target1_is_rel)
8653 return R_ARM_REL32;
8654 else
8655 return R_ARM_ABS32;
8656
8657 case R_ARM_TARGET2:
8658 return globals->target2_reloc;
8659
8660 default:
8661 return r_type;
8662 }
8663 }
8664
8665 /* Return the base VMA address which should be subtracted from real addresses
8666 when resolving @dtpoff relocation.
8667 This is PT_TLS segment p_vaddr. */
8668
8669 static bfd_vma
8670 dtpoff_base (struct bfd_link_info *info)
8671 {
8672 /* If tls_sec is NULL, we should have signalled an error already. */
8673 if (elf_hash_table (info)->tls_sec == NULL)
8674 return 0;
8675 return elf_hash_table (info)->tls_sec->vma;
8676 }
8677
8678 /* Return the relocation value for @tpoff relocation
8679 if STT_TLS virtual address is ADDRESS. */
8680
8681 static bfd_vma
8682 tpoff (struct bfd_link_info *info, bfd_vma address)
8683 {
8684 struct elf_link_hash_table *htab = elf_hash_table (info);
8685 bfd_vma base;
8686
8687 /* If tls_sec is NULL, we should have signalled an error already. */
8688 if (htab->tls_sec == NULL)
8689 return 0;
8690 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
8691 return address - htab->tls_sec->vma + base;
8692 }
8693
8694 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8695 VALUE is the relocation value. */
8696
8697 static bfd_reloc_status_type
8698 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
8699 {
8700 if (value > 0xfff)
8701 return bfd_reloc_overflow;
8702
8703 value |= bfd_get_32 (abfd, data) & 0xfffff000;
8704 bfd_put_32 (abfd, value, data);
8705 return bfd_reloc_ok;
8706 }
8707
8708 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8709 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8710 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8711
8712 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8713 is to then call final_link_relocate. Return other values in the
8714 case of error.
8715
8716 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8717 the pre-relaxed code. It would be nice if the relocs were updated
8718 to match the optimization. */
8719
8720 static bfd_reloc_status_type
8721 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
8722 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
8723 Elf_Internal_Rela *rel, unsigned long is_local)
8724 {
8725 unsigned long insn;
8726
8727 switch (ELF32_R_TYPE (rel->r_info))
8728 {
8729 default:
8730 return bfd_reloc_notsupported;
8731
8732 case R_ARM_TLS_GOTDESC:
8733 if (is_local)
8734 insn = 0;
8735 else
8736 {
8737 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8738 if (insn & 1)
8739 insn -= 5; /* THUMB */
8740 else
8741 insn -= 8; /* ARM */
8742 }
8743 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8744 return bfd_reloc_continue;
8745
8746 case R_ARM_THM_TLS_DESCSEQ:
8747 /* Thumb insn. */
8748 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8749 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8750 {
8751 if (is_local)
8752 /* nop */
8753 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8754 }
8755 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8756 {
8757 if (is_local)
8758 /* nop */
8759 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8760 else
8761 /* ldr rx,[ry] */
8762 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8763 }
8764 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8765 {
8766 if (is_local)
8767 /* nop */
8768 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8769 else
8770 /* mov r0, rx */
8771 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8772 contents + rel->r_offset);
8773 }
8774 else
8775 {
8776 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8777 /* It's a 32 bit instruction, fetch the rest of it for
8778 error generation. */
8779 insn = (insn << 16)
8780 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8781 (*_bfd_error_handler)
8782 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8783 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8784 return bfd_reloc_notsupported;
8785 }
8786 break;
8787
8788 case R_ARM_TLS_DESCSEQ:
8789 /* arm insn. */
8790 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8791 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8792 {
8793 if (is_local)
8794 /* mov rx, ry */
8795 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8796 contents + rel->r_offset);
8797 }
8798 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8799 {
8800 if (is_local)
8801 /* nop */
8802 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8803 else
8804 /* ldr rx,[ry] */
8805 bfd_put_32 (input_bfd, insn & 0xfffff000,
8806 contents + rel->r_offset);
8807 }
8808 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8809 {
8810 if (is_local)
8811 /* nop */
8812 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8813 else
8814 /* mov r0, rx */
8815 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8816 contents + rel->r_offset);
8817 }
8818 else
8819 {
8820 (*_bfd_error_handler)
8821 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8822 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8823 return bfd_reloc_notsupported;
8824 }
8825 break;
8826
8827 case R_ARM_TLS_CALL:
8828 /* GD->IE relaxation, turn the instruction into 'nop' or
8829 'ldr r0, [pc,r0]' */
8830 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8831 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8832 break;
8833
8834 case R_ARM_THM_TLS_CALL:
8835 /* GD->IE relaxation. */
8836 if (!is_local)
8837 /* add r0,pc; ldr r0, [r0] */
8838 insn = 0x44786800;
8839 else if (arch_has_thumb2_nop (globals))
8840 /* nop.w */
8841 insn = 0xf3af8000;
8842 else
8843 /* nop; nop */
8844 insn = 0xbf00bf00;
8845
8846 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8847 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8848 break;
8849 }
8850 return bfd_reloc_ok;
8851 }
8852
8853 /* For a given value of n, calculate the value of G_n as required to
8854 deal with group relocations. We return it in the form of an
8855 encoded constant-and-rotation, together with the final residual. If n is
8856 specified as less than zero, then final_residual is filled with the
8857 input value and no further action is performed. */
8858
8859 static bfd_vma
8860 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8861 {
8862 int current_n;
8863 bfd_vma g_n;
8864 bfd_vma encoded_g_n = 0;
8865 bfd_vma residual = value; /* Also known as Y_n. */
8866
8867 for (current_n = 0; current_n <= n; current_n++)
8868 {
8869 int shift;
8870
8871 /* Calculate which part of the value to mask. */
8872 if (residual == 0)
8873 shift = 0;
8874 else
8875 {
8876 int msb;
8877
8878 /* Determine the most significant bit in the residual and
8879 align the resulting value to a 2-bit boundary. */
8880 for (msb = 30; msb >= 0; msb -= 2)
8881 if (residual & (3 << msb))
8882 break;
8883
8884 /* The desired shift is now (msb - 6), or zero, whichever
8885 is the greater. */
8886 shift = msb - 6;
8887 if (shift < 0)
8888 shift = 0;
8889 }
8890
8891 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8892 g_n = residual & (0xff << shift);
8893 encoded_g_n = (g_n >> shift)
8894 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8895
8896 /* Calculate the residual for the next time around. */
8897 residual &= ~g_n;
8898 }
8899
8900 *final_residual = residual;
8901
8902 return encoded_g_n;
8903 }
8904
8905 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8906 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8907
8908 static int
8909 identify_add_or_sub (bfd_vma insn)
8910 {
8911 int opcode = insn & 0x1e00000;
8912
8913 if (opcode == 1 << 23) /* ADD */
8914 return 1;
8915
8916 if (opcode == 1 << 22) /* SUB */
8917 return -1;
8918
8919 return 0;
8920 }
8921
8922 /* Perform a relocation as part of a final link. */
8923
8924 static bfd_reloc_status_type
8925 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8926 bfd * input_bfd,
8927 bfd * output_bfd,
8928 asection * input_section,
8929 bfd_byte * contents,
8930 Elf_Internal_Rela * rel,
8931 bfd_vma value,
8932 struct bfd_link_info * info,
8933 asection * sym_sec,
8934 const char * sym_name,
8935 unsigned char st_type,
8936 enum arm_st_branch_type branch_type,
8937 struct elf_link_hash_entry * h,
8938 bfd_boolean * unresolved_reloc_p,
8939 char ** error_message)
8940 {
8941 unsigned long r_type = howto->type;
8942 unsigned long r_symndx;
8943 bfd_byte * hit_data = contents + rel->r_offset;
8944 bfd_vma * local_got_offsets;
8945 bfd_vma * local_tlsdesc_gotents;
8946 asection * sgot;
8947 asection * splt;
8948 asection * sreloc = NULL;
8949 asection * srelgot;
8950 bfd_vma addend;
8951 bfd_signed_vma signed_addend;
8952 unsigned char dynreloc_st_type;
8953 bfd_vma dynreloc_value;
8954 struct elf32_arm_link_hash_table * globals;
8955 struct elf32_arm_link_hash_entry *eh;
8956 union gotplt_union *root_plt;
8957 struct arm_plt_info *arm_plt;
8958 bfd_vma plt_offset;
8959 bfd_vma gotplt_offset;
8960 bfd_boolean has_iplt_entry;
8961
8962 globals = elf32_arm_hash_table (info);
8963 if (globals == NULL)
8964 return bfd_reloc_notsupported;
8965
8966 BFD_ASSERT (is_arm_elf (input_bfd));
8967
8968 /* Some relocation types map to different relocations depending on the
8969 target. We pick the right one here. */
8970 r_type = arm_real_reloc_type (globals, r_type);
8971
8972 /* It is possible to have linker relaxations on some TLS access
8973 models. Update our information here. */
8974 r_type = elf32_arm_tls_transition (info, r_type, h);
8975
8976 if (r_type != howto->type)
8977 howto = elf32_arm_howto_from_type (r_type);
8978
8979 eh = (struct elf32_arm_link_hash_entry *) h;
8980 sgot = globals->root.sgot;
8981 local_got_offsets = elf_local_got_offsets (input_bfd);
8982 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8983
8984 if (globals->root.dynamic_sections_created)
8985 srelgot = globals->root.srelgot;
8986 else
8987 srelgot = NULL;
8988
8989 r_symndx = ELF32_R_SYM (rel->r_info);
8990
8991 if (globals->use_rel)
8992 {
8993 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8994
8995 if (addend & ((howto->src_mask + 1) >> 1))
8996 {
8997 signed_addend = -1;
8998 signed_addend &= ~ howto->src_mask;
8999 signed_addend |= addend;
9000 }
9001 else
9002 signed_addend = addend;
9003 }
9004 else
9005 addend = signed_addend = rel->r_addend;
9006
9007 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9008 are resolving a function call relocation. */
9009 if (using_thumb_only (globals)
9010 && (r_type == R_ARM_THM_CALL
9011 || r_type == R_ARM_THM_JUMP24)
9012 && branch_type == ST_BRANCH_TO_ARM)
9013 branch_type = ST_BRANCH_TO_THUMB;
9014
9015 /* Record the symbol information that should be used in dynamic
9016 relocations. */
9017 dynreloc_st_type = st_type;
9018 dynreloc_value = value;
9019 if (branch_type == ST_BRANCH_TO_THUMB)
9020 dynreloc_value |= 1;
9021
9022 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9023 VALUE appropriately for relocations that we resolve at link time. */
9024 has_iplt_entry = FALSE;
9025 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
9026 && root_plt->offset != (bfd_vma) -1)
9027 {
9028 plt_offset = root_plt->offset;
9029 gotplt_offset = arm_plt->got_offset;
9030
9031 if (h == NULL || eh->is_iplt)
9032 {
9033 has_iplt_entry = TRUE;
9034 splt = globals->root.iplt;
9035
9036 /* Populate .iplt entries here, because not all of them will
9037 be seen by finish_dynamic_symbol. The lower bit is set if
9038 we have already populated the entry. */
9039 if (plt_offset & 1)
9040 plt_offset--;
9041 else
9042 {
9043 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9044 -1, dynreloc_value))
9045 root_plt->offset |= 1;
9046 else
9047 return bfd_reloc_notsupported;
9048 }
9049
9050 /* Static relocations always resolve to the .iplt entry. */
9051 st_type = STT_FUNC;
9052 value = (splt->output_section->vma
9053 + splt->output_offset
9054 + plt_offset);
9055 branch_type = ST_BRANCH_TO_ARM;
9056
9057 /* If there are non-call relocations that resolve to the .iplt
9058 entry, then all dynamic ones must too. */
9059 if (arm_plt->noncall_refcount != 0)
9060 {
9061 dynreloc_st_type = st_type;
9062 dynreloc_value = value;
9063 }
9064 }
9065 else
9066 /* We populate the .plt entry in finish_dynamic_symbol. */
9067 splt = globals->root.splt;
9068 }
9069 else
9070 {
9071 splt = NULL;
9072 plt_offset = (bfd_vma) -1;
9073 gotplt_offset = (bfd_vma) -1;
9074 }
9075
9076 switch (r_type)
9077 {
9078 case R_ARM_NONE:
9079 /* We don't need to find a value for this symbol. It's just a
9080 marker. */
9081 *unresolved_reloc_p = FALSE;
9082 return bfd_reloc_ok;
9083
9084 case R_ARM_ABS12:
9085 if (!globals->vxworks_p)
9086 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9087
9088 case R_ARM_PC24:
9089 case R_ARM_ABS32:
9090 case R_ARM_ABS32_NOI:
9091 case R_ARM_REL32:
9092 case R_ARM_REL32_NOI:
9093 case R_ARM_CALL:
9094 case R_ARM_JUMP24:
9095 case R_ARM_XPC25:
9096 case R_ARM_PREL31:
9097 case R_ARM_PLT32:
9098 /* Handle relocations which should use the PLT entry. ABS32/REL32
9099 will use the symbol's value, which may point to a PLT entry, but we
9100 don't need to handle that here. If we created a PLT entry, all
9101 branches in this object should go to it, except if the PLT is too
9102 far away, in which case a long branch stub should be inserted. */
9103 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
9104 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
9105 && r_type != R_ARM_CALL
9106 && r_type != R_ARM_JUMP24
9107 && r_type != R_ARM_PLT32)
9108 && plt_offset != (bfd_vma) -1)
9109 {
9110 /* If we've created a .plt section, and assigned a PLT entry
9111 to this function, it must either be a STT_GNU_IFUNC reference
9112 or not be known to bind locally. In other cases, we should
9113 have cleared the PLT entry by now. */
9114 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
9115
9116 value = (splt->output_section->vma
9117 + splt->output_offset
9118 + plt_offset);
9119 *unresolved_reloc_p = FALSE;
9120 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9121 contents, rel->r_offset, value,
9122 rel->r_addend);
9123 }
9124
9125 /* When generating a shared object or relocatable executable, these
9126 relocations are copied into the output file to be resolved at
9127 run time. */
9128 if ((bfd_link_pic (info)
9129 || globals->root.is_relocatable_executable)
9130 && (input_section->flags & SEC_ALLOC)
9131 && !(globals->vxworks_p
9132 && strcmp (input_section->output_section->name,
9133 ".tls_vars") == 0)
9134 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
9135 || !SYMBOL_CALLS_LOCAL (info, h))
9136 && !(input_bfd == globals->stub_bfd
9137 && strstr (input_section->name, STUB_SUFFIX))
9138 && (h == NULL
9139 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9140 || h->root.type != bfd_link_hash_undefweak)
9141 && r_type != R_ARM_PC24
9142 && r_type != R_ARM_CALL
9143 && r_type != R_ARM_JUMP24
9144 && r_type != R_ARM_PREL31
9145 && r_type != R_ARM_PLT32)
9146 {
9147 Elf_Internal_Rela outrel;
9148 bfd_boolean skip, relocate;
9149
9150 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
9151 && !h->def_regular)
9152 {
9153 char *v = _("shared object");
9154
9155 if (bfd_link_executable (info))
9156 v = _("PIE executable");
9157
9158 (*_bfd_error_handler)
9159 (_("%B: relocation %s against external or undefined symbol `%s'"
9160 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
9161 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
9162 return bfd_reloc_notsupported;
9163 }
9164
9165 *unresolved_reloc_p = FALSE;
9166
9167 if (sreloc == NULL && globals->root.dynamic_sections_created)
9168 {
9169 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
9170 ! globals->use_rel);
9171
9172 if (sreloc == NULL)
9173 return bfd_reloc_notsupported;
9174 }
9175
9176 skip = FALSE;
9177 relocate = FALSE;
9178
9179 outrel.r_addend = addend;
9180 outrel.r_offset =
9181 _bfd_elf_section_offset (output_bfd, info, input_section,
9182 rel->r_offset);
9183 if (outrel.r_offset == (bfd_vma) -1)
9184 skip = TRUE;
9185 else if (outrel.r_offset == (bfd_vma) -2)
9186 skip = TRUE, relocate = TRUE;
9187 outrel.r_offset += (input_section->output_section->vma
9188 + input_section->output_offset);
9189
9190 if (skip)
9191 memset (&outrel, 0, sizeof outrel);
9192 else if (h != NULL
9193 && h->dynindx != -1
9194 && (!bfd_link_pic (info)
9195 || !SYMBOLIC_BIND (info, h)
9196 || !h->def_regular))
9197 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
9198 else
9199 {
9200 int symbol;
9201
9202 /* This symbol is local, or marked to become local. */
9203 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
9204 if (globals->symbian_p)
9205 {
9206 asection *osec;
9207
9208 /* On Symbian OS, the data segment and text segement
9209 can be relocated independently. Therefore, we
9210 must indicate the segment to which this
9211 relocation is relative. The BPABI allows us to
9212 use any symbol in the right segment; we just use
9213 the section symbol as it is convenient. (We
9214 cannot use the symbol given by "h" directly as it
9215 will not appear in the dynamic symbol table.)
9216
9217 Note that the dynamic linker ignores the section
9218 symbol value, so we don't subtract osec->vma
9219 from the emitted reloc addend. */
9220 if (sym_sec)
9221 osec = sym_sec->output_section;
9222 else
9223 osec = input_section->output_section;
9224 symbol = elf_section_data (osec)->dynindx;
9225 if (symbol == 0)
9226 {
9227 struct elf_link_hash_table *htab = elf_hash_table (info);
9228
9229 if ((osec->flags & SEC_READONLY) == 0
9230 && htab->data_index_section != NULL)
9231 osec = htab->data_index_section;
9232 else
9233 osec = htab->text_index_section;
9234 symbol = elf_section_data (osec)->dynindx;
9235 }
9236 BFD_ASSERT (symbol != 0);
9237 }
9238 else
9239 /* On SVR4-ish systems, the dynamic loader cannot
9240 relocate the text and data segments independently,
9241 so the symbol does not matter. */
9242 symbol = 0;
9243 if (dynreloc_st_type == STT_GNU_IFUNC)
9244 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9245 to the .iplt entry. Instead, every non-call reference
9246 must use an R_ARM_IRELATIVE relocation to obtain the
9247 correct run-time address. */
9248 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
9249 else
9250 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
9251 if (globals->use_rel)
9252 relocate = TRUE;
9253 else
9254 outrel.r_addend += dynreloc_value;
9255 }
9256
9257 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9258
9259 /* If this reloc is against an external symbol, we do not want to
9260 fiddle with the addend. Otherwise, we need to include the symbol
9261 value so that it becomes an addend for the dynamic reloc. */
9262 if (! relocate)
9263 return bfd_reloc_ok;
9264
9265 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9266 contents, rel->r_offset,
9267 dynreloc_value, (bfd_vma) 0);
9268 }
9269 else switch (r_type)
9270 {
9271 case R_ARM_ABS12:
9272 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9273
9274 case R_ARM_XPC25: /* Arm BLX instruction. */
9275 case R_ARM_CALL:
9276 case R_ARM_JUMP24:
9277 case R_ARM_PC24: /* Arm B/BL instruction. */
9278 case R_ARM_PLT32:
9279 {
9280 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
9281
9282 if (r_type == R_ARM_XPC25)
9283 {
9284 /* Check for Arm calling Arm function. */
9285 /* FIXME: Should we translate the instruction into a BL
9286 instruction instead ? */
9287 if (branch_type != ST_BRANCH_TO_THUMB)
9288 (*_bfd_error_handler)
9289 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9290 input_bfd,
9291 h ? h->root.root.string : "(local)");
9292 }
9293 else if (r_type == R_ARM_PC24)
9294 {
9295 /* Check for Arm calling Thumb function. */
9296 if (branch_type == ST_BRANCH_TO_THUMB)
9297 {
9298 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
9299 output_bfd, input_section,
9300 hit_data, sym_sec, rel->r_offset,
9301 signed_addend, value,
9302 error_message))
9303 return bfd_reloc_ok;
9304 else
9305 return bfd_reloc_dangerous;
9306 }
9307 }
9308
9309 /* Check if a stub has to be inserted because the
9310 destination is too far or we are changing mode. */
9311 if ( r_type == R_ARM_CALL
9312 || r_type == R_ARM_JUMP24
9313 || r_type == R_ARM_PLT32)
9314 {
9315 enum elf32_arm_stub_type stub_type = arm_stub_none;
9316 struct elf32_arm_link_hash_entry *hash;
9317
9318 hash = (struct elf32_arm_link_hash_entry *) h;
9319 stub_type = arm_type_of_stub (info, input_section, rel,
9320 st_type, &branch_type,
9321 hash, value, sym_sec,
9322 input_bfd, sym_name);
9323
9324 if (stub_type != arm_stub_none)
9325 {
9326 /* The target is out of reach, so redirect the
9327 branch to the local stub for this function. */
9328 stub_entry = elf32_arm_get_stub_entry (input_section,
9329 sym_sec, h,
9330 rel, globals,
9331 stub_type);
9332 {
9333 if (stub_entry != NULL)
9334 value = (stub_entry->stub_offset
9335 + stub_entry->stub_sec->output_offset
9336 + stub_entry->stub_sec->output_section->vma);
9337
9338 if (plt_offset != (bfd_vma) -1)
9339 *unresolved_reloc_p = FALSE;
9340 }
9341 }
9342 else
9343 {
9344 /* If the call goes through a PLT entry, make sure to
9345 check distance to the right destination address. */
9346 if (plt_offset != (bfd_vma) -1)
9347 {
9348 value = (splt->output_section->vma
9349 + splt->output_offset
9350 + plt_offset);
9351 *unresolved_reloc_p = FALSE;
9352 /* The PLT entry is in ARM mode, regardless of the
9353 target function. */
9354 branch_type = ST_BRANCH_TO_ARM;
9355 }
9356 }
9357 }
9358
9359 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9360 where:
9361 S is the address of the symbol in the relocation.
9362 P is address of the instruction being relocated.
9363 A is the addend (extracted from the instruction) in bytes.
9364
9365 S is held in 'value'.
9366 P is the base address of the section containing the
9367 instruction plus the offset of the reloc into that
9368 section, ie:
9369 (input_section->output_section->vma +
9370 input_section->output_offset +
9371 rel->r_offset).
9372 A is the addend, converted into bytes, ie:
9373 (signed_addend * 4)
9374
9375 Note: None of these operations have knowledge of the pipeline
9376 size of the processor, thus it is up to the assembler to
9377 encode this information into the addend. */
9378 value -= (input_section->output_section->vma
9379 + input_section->output_offset);
9380 value -= rel->r_offset;
9381 if (globals->use_rel)
9382 value += (signed_addend << howto->size);
9383 else
9384 /* RELA addends do not have to be adjusted by howto->size. */
9385 value += signed_addend;
9386
9387 signed_addend = value;
9388 signed_addend >>= howto->rightshift;
9389
9390 /* A branch to an undefined weak symbol is turned into a jump to
9391 the next instruction unless a PLT entry will be created.
9392 Do the same for local undefined symbols (but not for STN_UNDEF).
9393 The jump to the next instruction is optimized as a NOP depending
9394 on the architecture. */
9395 if (h ? (h->root.type == bfd_link_hash_undefweak
9396 && plt_offset == (bfd_vma) -1)
9397 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
9398 {
9399 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
9400
9401 if (arch_has_arm_nop (globals))
9402 value |= 0x0320f000;
9403 else
9404 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9405 }
9406 else
9407 {
9408 /* Perform a signed range check. */
9409 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
9410 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
9411 return bfd_reloc_overflow;
9412
9413 addend = (value & 2);
9414
9415 value = (signed_addend & howto->dst_mask)
9416 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
9417
9418 if (r_type == R_ARM_CALL)
9419 {
9420 /* Set the H bit in the BLX instruction. */
9421 if (branch_type == ST_BRANCH_TO_THUMB)
9422 {
9423 if (addend)
9424 value |= (1 << 24);
9425 else
9426 value &= ~(bfd_vma)(1 << 24);
9427 }
9428
9429 /* Select the correct instruction (BL or BLX). */
9430 /* Only if we are not handling a BL to a stub. In this
9431 case, mode switching is performed by the stub. */
9432 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
9433 value |= (1 << 28);
9434 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
9435 {
9436 value &= ~(bfd_vma)(1 << 28);
9437 value |= (1 << 24);
9438 }
9439 }
9440 }
9441 }
9442 break;
9443
9444 case R_ARM_ABS32:
9445 value += addend;
9446 if (branch_type == ST_BRANCH_TO_THUMB)
9447 value |= 1;
9448 break;
9449
9450 case R_ARM_ABS32_NOI:
9451 value += addend;
9452 break;
9453
9454 case R_ARM_REL32:
9455 value += addend;
9456 if (branch_type == ST_BRANCH_TO_THUMB)
9457 value |= 1;
9458 value -= (input_section->output_section->vma
9459 + input_section->output_offset + rel->r_offset);
9460 break;
9461
9462 case R_ARM_REL32_NOI:
9463 value += addend;
9464 value -= (input_section->output_section->vma
9465 + input_section->output_offset + rel->r_offset);
9466 break;
9467
9468 case R_ARM_PREL31:
9469 value -= (input_section->output_section->vma
9470 + input_section->output_offset + rel->r_offset);
9471 value += signed_addend;
9472 if (! h || h->root.type != bfd_link_hash_undefweak)
9473 {
9474 /* Check for overflow. */
9475 if ((value ^ (value >> 1)) & (1 << 30))
9476 return bfd_reloc_overflow;
9477 }
9478 value &= 0x7fffffff;
9479 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
9480 if (branch_type == ST_BRANCH_TO_THUMB)
9481 value |= 1;
9482 break;
9483 }
9484
9485 bfd_put_32 (input_bfd, value, hit_data);
9486 return bfd_reloc_ok;
9487
9488 case R_ARM_ABS8:
9489 /* PR 16202: Refectch the addend using the correct size. */
9490 if (globals->use_rel)
9491 addend = bfd_get_8 (input_bfd, hit_data);
9492 value += addend;
9493
9494 /* There is no way to tell whether the user intended to use a signed or
9495 unsigned addend. When checking for overflow we accept either,
9496 as specified by the AAELF. */
9497 if ((long) value > 0xff || (long) value < -0x80)
9498 return bfd_reloc_overflow;
9499
9500 bfd_put_8 (input_bfd, value, hit_data);
9501 return bfd_reloc_ok;
9502
9503 case R_ARM_ABS16:
9504 /* PR 16202: Refectch the addend using the correct size. */
9505 if (globals->use_rel)
9506 addend = bfd_get_16 (input_bfd, hit_data);
9507 value += addend;
9508
9509 /* See comment for R_ARM_ABS8. */
9510 if ((long) value > 0xffff || (long) value < -0x8000)
9511 return bfd_reloc_overflow;
9512
9513 bfd_put_16 (input_bfd, value, hit_data);
9514 return bfd_reloc_ok;
9515
9516 case R_ARM_THM_ABS5:
9517 /* Support ldr and str instructions for the thumb. */
9518 if (globals->use_rel)
9519 {
9520 /* Need to refetch addend. */
9521 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9522 /* ??? Need to determine shift amount from operand size. */
9523 addend >>= howto->rightshift;
9524 }
9525 value += addend;
9526
9527 /* ??? Isn't value unsigned? */
9528 if ((long) value > 0x1f || (long) value < -0x10)
9529 return bfd_reloc_overflow;
9530
9531 /* ??? Value needs to be properly shifted into place first. */
9532 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
9533 bfd_put_16 (input_bfd, value, hit_data);
9534 return bfd_reloc_ok;
9535
9536 case R_ARM_THM_ALU_PREL_11_0:
9537 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9538 {
9539 bfd_vma insn;
9540 bfd_signed_vma relocation;
9541
9542 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9543 | bfd_get_16 (input_bfd, hit_data + 2);
9544
9545 if (globals->use_rel)
9546 {
9547 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
9548 | ((insn & (1 << 26)) >> 15);
9549 if (insn & 0xf00000)
9550 signed_addend = -signed_addend;
9551 }
9552
9553 relocation = value + signed_addend;
9554 relocation -= Pa (input_section->output_section->vma
9555 + input_section->output_offset
9556 + rel->r_offset);
9557
9558 value = relocation;
9559
9560 if (value >= 0x1000)
9561 return bfd_reloc_overflow;
9562
9563 insn = (insn & 0xfb0f8f00) | (value & 0xff)
9564 | ((value & 0x700) << 4)
9565 | ((value & 0x800) << 15);
9566 if (relocation < 0)
9567 insn |= 0xa00000;
9568
9569 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9570 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9571
9572 return bfd_reloc_ok;
9573 }
9574
9575 case R_ARM_THM_PC8:
9576 /* PR 10073: This reloc is not generated by the GNU toolchain,
9577 but it is supported for compatibility with third party libraries
9578 generated by other compilers, specifically the ARM/IAR. */
9579 {
9580 bfd_vma insn;
9581 bfd_signed_vma relocation;
9582
9583 insn = bfd_get_16 (input_bfd, hit_data);
9584
9585 if (globals->use_rel)
9586 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
9587
9588 relocation = value + addend;
9589 relocation -= Pa (input_section->output_section->vma
9590 + input_section->output_offset
9591 + rel->r_offset);
9592
9593 value = relocation;
9594
9595 /* We do not check for overflow of this reloc. Although strictly
9596 speaking this is incorrect, it appears to be necessary in order
9597 to work with IAR generated relocs. Since GCC and GAS do not
9598 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9599 a problem for them. */
9600 value &= 0x3fc;
9601
9602 insn = (insn & 0xff00) | (value >> 2);
9603
9604 bfd_put_16 (input_bfd, insn, hit_data);
9605
9606 return bfd_reloc_ok;
9607 }
9608
9609 case R_ARM_THM_PC12:
9610 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9611 {
9612 bfd_vma insn;
9613 bfd_signed_vma relocation;
9614
9615 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9616 | bfd_get_16 (input_bfd, hit_data + 2);
9617
9618 if (globals->use_rel)
9619 {
9620 signed_addend = insn & 0xfff;
9621 if (!(insn & (1 << 23)))
9622 signed_addend = -signed_addend;
9623 }
9624
9625 relocation = value + signed_addend;
9626 relocation -= Pa (input_section->output_section->vma
9627 + input_section->output_offset
9628 + rel->r_offset);
9629
9630 value = relocation;
9631
9632 if (value >= 0x1000)
9633 return bfd_reloc_overflow;
9634
9635 insn = (insn & 0xff7ff000) | value;
9636 if (relocation >= 0)
9637 insn |= (1 << 23);
9638
9639 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9640 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9641
9642 return bfd_reloc_ok;
9643 }
9644
9645 case R_ARM_THM_XPC22:
9646 case R_ARM_THM_CALL:
9647 case R_ARM_THM_JUMP24:
9648 /* Thumb BL (branch long instruction). */
9649 {
9650 bfd_vma relocation;
9651 bfd_vma reloc_sign;
9652 bfd_boolean overflow = FALSE;
9653 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9654 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9655 bfd_signed_vma reloc_signed_max;
9656 bfd_signed_vma reloc_signed_min;
9657 bfd_vma check;
9658 bfd_signed_vma signed_check;
9659 int bitsize;
9660 const int thumb2 = using_thumb2 (globals);
9661
9662 /* A branch to an undefined weak symbol is turned into a jump to
9663 the next instruction unless a PLT entry will be created.
9664 The jump to the next instruction is optimized as a NOP.W for
9665 Thumb-2 enabled architectures. */
9666 if (h && h->root.type == bfd_link_hash_undefweak
9667 && plt_offset == (bfd_vma) -1)
9668 {
9669 if (arch_has_thumb2_nop (globals))
9670 {
9671 bfd_put_16 (input_bfd, 0xf3af, hit_data);
9672 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
9673 }
9674 else
9675 {
9676 bfd_put_16 (input_bfd, 0xe000, hit_data);
9677 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
9678 }
9679 return bfd_reloc_ok;
9680 }
9681
9682 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9683 with Thumb-1) involving the J1 and J2 bits. */
9684 if (globals->use_rel)
9685 {
9686 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
9687 bfd_vma upper = upper_insn & 0x3ff;
9688 bfd_vma lower = lower_insn & 0x7ff;
9689 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
9690 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
9691 bfd_vma i1 = j1 ^ s ? 0 : 1;
9692 bfd_vma i2 = j2 ^ s ? 0 : 1;
9693
9694 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
9695 /* Sign extend. */
9696 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
9697
9698 signed_addend = addend;
9699 }
9700
9701 if (r_type == R_ARM_THM_XPC22)
9702 {
9703 /* Check for Thumb to Thumb call. */
9704 /* FIXME: Should we translate the instruction into a BL
9705 instruction instead ? */
9706 if (branch_type == ST_BRANCH_TO_THUMB)
9707 (*_bfd_error_handler)
9708 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9709 input_bfd,
9710 h ? h->root.root.string : "(local)");
9711 }
9712 else
9713 {
9714 /* If it is not a call to Thumb, assume call to Arm.
9715 If it is a call relative to a section name, then it is not a
9716 function call at all, but rather a long jump. Calls through
9717 the PLT do not require stubs. */
9718 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
9719 {
9720 if (globals->use_blx && r_type == R_ARM_THM_CALL)
9721 {
9722 /* Convert BL to BLX. */
9723 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9724 }
9725 else if (( r_type != R_ARM_THM_CALL)
9726 && (r_type != R_ARM_THM_JUMP24))
9727 {
9728 if (elf32_thumb_to_arm_stub
9729 (info, sym_name, input_bfd, output_bfd, input_section,
9730 hit_data, sym_sec, rel->r_offset, signed_addend, value,
9731 error_message))
9732 return bfd_reloc_ok;
9733 else
9734 return bfd_reloc_dangerous;
9735 }
9736 }
9737 else if (branch_type == ST_BRANCH_TO_THUMB
9738 && globals->use_blx
9739 && r_type == R_ARM_THM_CALL)
9740 {
9741 /* Make sure this is a BL. */
9742 lower_insn |= 0x1800;
9743 }
9744 }
9745
9746 enum elf32_arm_stub_type stub_type = arm_stub_none;
9747 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
9748 {
9749 /* Check if a stub has to be inserted because the destination
9750 is too far. */
9751 struct elf32_arm_stub_hash_entry *stub_entry;
9752 struct elf32_arm_link_hash_entry *hash;
9753
9754 hash = (struct elf32_arm_link_hash_entry *) h;
9755
9756 stub_type = arm_type_of_stub (info, input_section, rel,
9757 st_type, &branch_type,
9758 hash, value, sym_sec,
9759 input_bfd, sym_name);
9760
9761 if (stub_type != arm_stub_none)
9762 {
9763 /* The target is out of reach or we are changing modes, so
9764 redirect the branch to the local stub for this
9765 function. */
9766 stub_entry = elf32_arm_get_stub_entry (input_section,
9767 sym_sec, h,
9768 rel, globals,
9769 stub_type);
9770 if (stub_entry != NULL)
9771 {
9772 value = (stub_entry->stub_offset
9773 + stub_entry->stub_sec->output_offset
9774 + stub_entry->stub_sec->output_section->vma);
9775
9776 if (plt_offset != (bfd_vma) -1)
9777 *unresolved_reloc_p = FALSE;
9778 }
9779
9780 /* If this call becomes a call to Arm, force BLX. */
9781 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9782 {
9783 if ((stub_entry
9784 && !arm_stub_is_thumb (stub_entry->stub_type))
9785 || branch_type != ST_BRANCH_TO_THUMB)
9786 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9787 }
9788 }
9789 }
9790
9791 /* Handle calls via the PLT. */
9792 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9793 {
9794 value = (splt->output_section->vma
9795 + splt->output_offset
9796 + plt_offset);
9797
9798 if (globals->use_blx
9799 && r_type == R_ARM_THM_CALL
9800 && ! using_thumb_only (globals))
9801 {
9802 /* If the Thumb BLX instruction is available, convert
9803 the BL to a BLX instruction to call the ARM-mode
9804 PLT entry. */
9805 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9806 branch_type = ST_BRANCH_TO_ARM;
9807 }
9808 else
9809 {
9810 if (! using_thumb_only (globals))
9811 /* Target the Thumb stub before the ARM PLT entry. */
9812 value -= PLT_THUMB_STUB_SIZE;
9813 branch_type = ST_BRANCH_TO_THUMB;
9814 }
9815 *unresolved_reloc_p = FALSE;
9816 }
9817
9818 relocation = value + signed_addend;
9819
9820 relocation -= (input_section->output_section->vma
9821 + input_section->output_offset
9822 + rel->r_offset);
9823
9824 check = relocation >> howto->rightshift;
9825
9826 /* If this is a signed value, the rightshift just dropped
9827 leading 1 bits (assuming twos complement). */
9828 if ((bfd_signed_vma) relocation >= 0)
9829 signed_check = check;
9830 else
9831 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9832
9833 /* Calculate the permissable maximum and minimum values for
9834 this relocation according to whether we're relocating for
9835 Thumb-2 or not. */
9836 bitsize = howto->bitsize;
9837 if (!thumb2)
9838 bitsize -= 2;
9839 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9840 reloc_signed_min = ~reloc_signed_max;
9841
9842 /* Assumes two's complement. */
9843 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9844 overflow = TRUE;
9845
9846 if ((lower_insn & 0x5000) == 0x4000)
9847 /* For a BLX instruction, make sure that the relocation is rounded up
9848 to a word boundary. This follows the semantics of the instruction
9849 which specifies that bit 1 of the target address will come from bit
9850 1 of the base address. */
9851 relocation = (relocation + 2) & ~ 3;
9852
9853 /* Put RELOCATION back into the insn. Assumes two's complement.
9854 We use the Thumb-2 encoding, which is safe even if dealing with
9855 a Thumb-1 instruction by virtue of our overflow check above. */
9856 reloc_sign = (signed_check < 0) ? 1 : 0;
9857 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9858 | ((relocation >> 12) & 0x3ff)
9859 | (reloc_sign << 10);
9860 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9861 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9862 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9863 | ((relocation >> 1) & 0x7ff);
9864
9865 /* Put the relocated value back in the object file: */
9866 bfd_put_16 (input_bfd, upper_insn, hit_data);
9867 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9868
9869 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9870 }
9871 break;
9872
9873 case R_ARM_THM_JUMP19:
9874 /* Thumb32 conditional branch instruction. */
9875 {
9876 bfd_vma relocation;
9877 bfd_boolean overflow = FALSE;
9878 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9879 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9880 bfd_signed_vma reloc_signed_max = 0xffffe;
9881 bfd_signed_vma reloc_signed_min = -0x100000;
9882 bfd_signed_vma signed_check;
9883 enum elf32_arm_stub_type stub_type = arm_stub_none;
9884 struct elf32_arm_stub_hash_entry *stub_entry;
9885 struct elf32_arm_link_hash_entry *hash;
9886
9887 /* Need to refetch the addend, reconstruct the top three bits,
9888 and squish the two 11 bit pieces together. */
9889 if (globals->use_rel)
9890 {
9891 bfd_vma S = (upper_insn & 0x0400) >> 10;
9892 bfd_vma upper = (upper_insn & 0x003f);
9893 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9894 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9895 bfd_vma lower = (lower_insn & 0x07ff);
9896
9897 upper |= J1 << 6;
9898 upper |= J2 << 7;
9899 upper |= (!S) << 8;
9900 upper -= 0x0100; /* Sign extend. */
9901
9902 addend = (upper << 12) | (lower << 1);
9903 signed_addend = addend;
9904 }
9905
9906 /* Handle calls via the PLT. */
9907 if (plt_offset != (bfd_vma) -1)
9908 {
9909 value = (splt->output_section->vma
9910 + splt->output_offset
9911 + plt_offset);
9912 /* Target the Thumb stub before the ARM PLT entry. */
9913 value -= PLT_THUMB_STUB_SIZE;
9914 *unresolved_reloc_p = FALSE;
9915 }
9916
9917 hash = (struct elf32_arm_link_hash_entry *)h;
9918
9919 stub_type = arm_type_of_stub (info, input_section, rel,
9920 st_type, &branch_type,
9921 hash, value, sym_sec,
9922 input_bfd, sym_name);
9923 if (stub_type != arm_stub_none)
9924 {
9925 stub_entry = elf32_arm_get_stub_entry (input_section,
9926 sym_sec, h,
9927 rel, globals,
9928 stub_type);
9929 if (stub_entry != NULL)
9930 {
9931 value = (stub_entry->stub_offset
9932 + stub_entry->stub_sec->output_offset
9933 + stub_entry->stub_sec->output_section->vma);
9934 }
9935 }
9936
9937 relocation = value + signed_addend;
9938 relocation -= (input_section->output_section->vma
9939 + input_section->output_offset
9940 + rel->r_offset);
9941 signed_check = (bfd_signed_vma) relocation;
9942
9943 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9944 overflow = TRUE;
9945
9946 /* Put RELOCATION back into the insn. */
9947 {
9948 bfd_vma S = (relocation & 0x00100000) >> 20;
9949 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9950 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9951 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9952 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9953
9954 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9955 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9956 }
9957
9958 /* Put the relocated value back in the object file: */
9959 bfd_put_16 (input_bfd, upper_insn, hit_data);
9960 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9961
9962 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9963 }
9964
9965 case R_ARM_THM_JUMP11:
9966 case R_ARM_THM_JUMP8:
9967 case R_ARM_THM_JUMP6:
9968 /* Thumb B (branch) instruction). */
9969 {
9970 bfd_signed_vma relocation;
9971 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9972 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9973 bfd_signed_vma signed_check;
9974
9975 /* CZB cannot jump backward. */
9976 if (r_type == R_ARM_THM_JUMP6)
9977 reloc_signed_min = 0;
9978
9979 if (globals->use_rel)
9980 {
9981 /* Need to refetch addend. */
9982 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9983 if (addend & ((howto->src_mask + 1) >> 1))
9984 {
9985 signed_addend = -1;
9986 signed_addend &= ~ howto->src_mask;
9987 signed_addend |= addend;
9988 }
9989 else
9990 signed_addend = addend;
9991 /* The value in the insn has been right shifted. We need to
9992 undo this, so that we can perform the address calculation
9993 in terms of bytes. */
9994 signed_addend <<= howto->rightshift;
9995 }
9996 relocation = value + signed_addend;
9997
9998 relocation -= (input_section->output_section->vma
9999 + input_section->output_offset
10000 + rel->r_offset);
10001
10002 relocation >>= howto->rightshift;
10003 signed_check = relocation;
10004
10005 if (r_type == R_ARM_THM_JUMP6)
10006 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10007 else
10008 relocation &= howto->dst_mask;
10009 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10010
10011 bfd_put_16 (input_bfd, relocation, hit_data);
10012
10013 /* Assumes two's complement. */
10014 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10015 return bfd_reloc_overflow;
10016
10017 return bfd_reloc_ok;
10018 }
10019
10020 case R_ARM_ALU_PCREL7_0:
10021 case R_ARM_ALU_PCREL15_8:
10022 case R_ARM_ALU_PCREL23_15:
10023 {
10024 bfd_vma insn;
10025 bfd_vma relocation;
10026
10027 insn = bfd_get_32 (input_bfd, hit_data);
10028 if (globals->use_rel)
10029 {
10030 /* Extract the addend. */
10031 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10032 signed_addend = addend;
10033 }
10034 relocation = value + signed_addend;
10035
10036 relocation -= (input_section->output_section->vma
10037 + input_section->output_offset
10038 + rel->r_offset);
10039 insn = (insn & ~0xfff)
10040 | ((howto->bitpos << 7) & 0xf00)
10041 | ((relocation >> howto->bitpos) & 0xff);
10042 bfd_put_32 (input_bfd, value, hit_data);
10043 }
10044 return bfd_reloc_ok;
10045
10046 case R_ARM_GNU_VTINHERIT:
10047 case R_ARM_GNU_VTENTRY:
10048 return bfd_reloc_ok;
10049
10050 case R_ARM_GOTOFF32:
10051 /* Relocation is relative to the start of the
10052 global offset table. */
10053
10054 BFD_ASSERT (sgot != NULL);
10055 if (sgot == NULL)
10056 return bfd_reloc_notsupported;
10057
10058 /* If we are addressing a Thumb function, we need to adjust the
10059 address by one, so that attempts to call the function pointer will
10060 correctly interpret it as Thumb code. */
10061 if (branch_type == ST_BRANCH_TO_THUMB)
10062 value += 1;
10063
10064 /* Note that sgot->output_offset is not involved in this
10065 calculation. We always want the start of .got. If we
10066 define _GLOBAL_OFFSET_TABLE in a different way, as is
10067 permitted by the ABI, we might have to change this
10068 calculation. */
10069 value -= sgot->output_section->vma;
10070 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10071 contents, rel->r_offset, value,
10072 rel->r_addend);
10073
10074 case R_ARM_GOTPC:
10075 /* Use global offset table as symbol value. */
10076 BFD_ASSERT (sgot != NULL);
10077
10078 if (sgot == NULL)
10079 return bfd_reloc_notsupported;
10080
10081 *unresolved_reloc_p = FALSE;
10082 value = sgot->output_section->vma;
10083 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10084 contents, rel->r_offset, value,
10085 rel->r_addend);
10086
10087 case R_ARM_GOT32:
10088 case R_ARM_GOT_PREL:
10089 /* Relocation is to the entry for this symbol in the
10090 global offset table. */
10091 if (sgot == NULL)
10092 return bfd_reloc_notsupported;
10093
10094 if (dynreloc_st_type == STT_GNU_IFUNC
10095 && plt_offset != (bfd_vma) -1
10096 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
10097 {
10098 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10099 symbol, and the relocation resolves directly to the runtime
10100 target rather than to the .iplt entry. This means that any
10101 .got entry would be the same value as the .igot.plt entry,
10102 so there's no point creating both. */
10103 sgot = globals->root.igotplt;
10104 value = sgot->output_offset + gotplt_offset;
10105 }
10106 else if (h != NULL)
10107 {
10108 bfd_vma off;
10109
10110 off = h->got.offset;
10111 BFD_ASSERT (off != (bfd_vma) -1);
10112 if ((off & 1) != 0)
10113 {
10114 /* We have already processsed one GOT relocation against
10115 this symbol. */
10116 off &= ~1;
10117 if (globals->root.dynamic_sections_created
10118 && !SYMBOL_REFERENCES_LOCAL (info, h))
10119 *unresolved_reloc_p = FALSE;
10120 }
10121 else
10122 {
10123 Elf_Internal_Rela outrel;
10124
10125 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
10126 {
10127 /* If the symbol doesn't resolve locally in a static
10128 object, we have an undefined reference. If the
10129 symbol doesn't resolve locally in a dynamic object,
10130 it should be resolved by the dynamic linker. */
10131 if (globals->root.dynamic_sections_created)
10132 {
10133 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
10134 *unresolved_reloc_p = FALSE;
10135 }
10136 else
10137 outrel.r_info = 0;
10138 outrel.r_addend = 0;
10139 }
10140 else
10141 {
10142 if (dynreloc_st_type == STT_GNU_IFUNC)
10143 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10144 else if (bfd_link_pic (info) &&
10145 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10146 || h->root.type != bfd_link_hash_undefweak))
10147 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10148 else
10149 outrel.r_info = 0;
10150 outrel.r_addend = dynreloc_value;
10151 }
10152
10153 /* The GOT entry is initialized to zero by default.
10154 See if we should install a different value. */
10155 if (outrel.r_addend != 0
10156 && (outrel.r_info == 0 || globals->use_rel))
10157 {
10158 bfd_put_32 (output_bfd, outrel.r_addend,
10159 sgot->contents + off);
10160 outrel.r_addend = 0;
10161 }
10162
10163 if (outrel.r_info != 0)
10164 {
10165 outrel.r_offset = (sgot->output_section->vma
10166 + sgot->output_offset
10167 + off);
10168 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10169 }
10170 h->got.offset |= 1;
10171 }
10172 value = sgot->output_offset + off;
10173 }
10174 else
10175 {
10176 bfd_vma off;
10177
10178 BFD_ASSERT (local_got_offsets != NULL &&
10179 local_got_offsets[r_symndx] != (bfd_vma) -1);
10180
10181 off = local_got_offsets[r_symndx];
10182
10183 /* The offset must always be a multiple of 4. We use the
10184 least significant bit to record whether we have already
10185 generated the necessary reloc. */
10186 if ((off & 1) != 0)
10187 off &= ~1;
10188 else
10189 {
10190 if (globals->use_rel)
10191 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
10192
10193 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
10194 {
10195 Elf_Internal_Rela outrel;
10196
10197 outrel.r_addend = addend + dynreloc_value;
10198 outrel.r_offset = (sgot->output_section->vma
10199 + sgot->output_offset
10200 + off);
10201 if (dynreloc_st_type == STT_GNU_IFUNC)
10202 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10203 else
10204 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10205 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10206 }
10207
10208 local_got_offsets[r_symndx] |= 1;
10209 }
10210
10211 value = sgot->output_offset + off;
10212 }
10213 if (r_type != R_ARM_GOT32)
10214 value += sgot->output_section->vma;
10215
10216 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10217 contents, rel->r_offset, value,
10218 rel->r_addend);
10219
10220 case R_ARM_TLS_LDO32:
10221 value = value - dtpoff_base (info);
10222
10223 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10224 contents, rel->r_offset, value,
10225 rel->r_addend);
10226
10227 case R_ARM_TLS_LDM32:
10228 {
10229 bfd_vma off;
10230
10231 if (sgot == NULL)
10232 abort ();
10233
10234 off = globals->tls_ldm_got.offset;
10235
10236 if ((off & 1) != 0)
10237 off &= ~1;
10238 else
10239 {
10240 /* If we don't know the module number, create a relocation
10241 for it. */
10242 if (bfd_link_pic (info))
10243 {
10244 Elf_Internal_Rela outrel;
10245
10246 if (srelgot == NULL)
10247 abort ();
10248
10249 outrel.r_addend = 0;
10250 outrel.r_offset = (sgot->output_section->vma
10251 + sgot->output_offset + off);
10252 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
10253
10254 if (globals->use_rel)
10255 bfd_put_32 (output_bfd, outrel.r_addend,
10256 sgot->contents + off);
10257
10258 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10259 }
10260 else
10261 bfd_put_32 (output_bfd, 1, sgot->contents + off);
10262
10263 globals->tls_ldm_got.offset |= 1;
10264 }
10265
10266 value = sgot->output_section->vma + sgot->output_offset + off
10267 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
10268
10269 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10270 contents, rel->r_offset, value,
10271 rel->r_addend);
10272 }
10273
10274 case R_ARM_TLS_CALL:
10275 case R_ARM_THM_TLS_CALL:
10276 case R_ARM_TLS_GD32:
10277 case R_ARM_TLS_IE32:
10278 case R_ARM_TLS_GOTDESC:
10279 case R_ARM_TLS_DESCSEQ:
10280 case R_ARM_THM_TLS_DESCSEQ:
10281 {
10282 bfd_vma off, offplt;
10283 int indx = 0;
10284 char tls_type;
10285
10286 BFD_ASSERT (sgot != NULL);
10287
10288 if (h != NULL)
10289 {
10290 bfd_boolean dyn;
10291 dyn = globals->root.dynamic_sections_created;
10292 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
10293 bfd_link_pic (info),
10294 h)
10295 && (!bfd_link_pic (info)
10296 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10297 {
10298 *unresolved_reloc_p = FALSE;
10299 indx = h->dynindx;
10300 }
10301 off = h->got.offset;
10302 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
10303 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
10304 }
10305 else
10306 {
10307 BFD_ASSERT (local_got_offsets != NULL);
10308 off = local_got_offsets[r_symndx];
10309 offplt = local_tlsdesc_gotents[r_symndx];
10310 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
10311 }
10312
10313 /* Linker relaxations happens from one of the
10314 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10315 if (ELF32_R_TYPE(rel->r_info) != r_type)
10316 tls_type = GOT_TLS_IE;
10317
10318 BFD_ASSERT (tls_type != GOT_UNKNOWN);
10319
10320 if ((off & 1) != 0)
10321 off &= ~1;
10322 else
10323 {
10324 bfd_boolean need_relocs = FALSE;
10325 Elf_Internal_Rela outrel;
10326 int cur_off = off;
10327
10328 /* The GOT entries have not been initialized yet. Do it
10329 now, and emit any relocations. If both an IE GOT and a
10330 GD GOT are necessary, we emit the GD first. */
10331
10332 if ((bfd_link_pic (info) || indx != 0)
10333 && (h == NULL
10334 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10335 || h->root.type != bfd_link_hash_undefweak))
10336 {
10337 need_relocs = TRUE;
10338 BFD_ASSERT (srelgot != NULL);
10339 }
10340
10341 if (tls_type & GOT_TLS_GDESC)
10342 {
10343 bfd_byte *loc;
10344
10345 /* We should have relaxed, unless this is an undefined
10346 weak symbol. */
10347 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
10348 || bfd_link_pic (info));
10349 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
10350 <= globals->root.sgotplt->size);
10351
10352 outrel.r_addend = 0;
10353 outrel.r_offset = (globals->root.sgotplt->output_section->vma
10354 + globals->root.sgotplt->output_offset
10355 + offplt
10356 + globals->sgotplt_jump_table_size);
10357
10358 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
10359 sreloc = globals->root.srelplt;
10360 loc = sreloc->contents;
10361 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
10362 BFD_ASSERT (loc + RELOC_SIZE (globals)
10363 <= sreloc->contents + sreloc->size);
10364
10365 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
10366
10367 /* For globals, the first word in the relocation gets
10368 the relocation index and the top bit set, or zero,
10369 if we're binding now. For locals, it gets the
10370 symbol's offset in the tls section. */
10371 bfd_put_32 (output_bfd,
10372 !h ? value - elf_hash_table (info)->tls_sec->vma
10373 : info->flags & DF_BIND_NOW ? 0
10374 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
10375 globals->root.sgotplt->contents + offplt
10376 + globals->sgotplt_jump_table_size);
10377
10378 /* Second word in the relocation is always zero. */
10379 bfd_put_32 (output_bfd, 0,
10380 globals->root.sgotplt->contents + offplt
10381 + globals->sgotplt_jump_table_size + 4);
10382 }
10383 if (tls_type & GOT_TLS_GD)
10384 {
10385 if (need_relocs)
10386 {
10387 outrel.r_addend = 0;
10388 outrel.r_offset = (sgot->output_section->vma
10389 + sgot->output_offset
10390 + cur_off);
10391 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
10392
10393 if (globals->use_rel)
10394 bfd_put_32 (output_bfd, outrel.r_addend,
10395 sgot->contents + cur_off);
10396
10397 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10398
10399 if (indx == 0)
10400 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10401 sgot->contents + cur_off + 4);
10402 else
10403 {
10404 outrel.r_addend = 0;
10405 outrel.r_info = ELF32_R_INFO (indx,
10406 R_ARM_TLS_DTPOFF32);
10407 outrel.r_offset += 4;
10408
10409 if (globals->use_rel)
10410 bfd_put_32 (output_bfd, outrel.r_addend,
10411 sgot->contents + cur_off + 4);
10412
10413 elf32_arm_add_dynreloc (output_bfd, info,
10414 srelgot, &outrel);
10415 }
10416 }
10417 else
10418 {
10419 /* If we are not emitting relocations for a
10420 general dynamic reference, then we must be in a
10421 static link or an executable link with the
10422 symbol binding locally. Mark it as belonging
10423 to module 1, the executable. */
10424 bfd_put_32 (output_bfd, 1,
10425 sgot->contents + cur_off);
10426 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10427 sgot->contents + cur_off + 4);
10428 }
10429
10430 cur_off += 8;
10431 }
10432
10433 if (tls_type & GOT_TLS_IE)
10434 {
10435 if (need_relocs)
10436 {
10437 if (indx == 0)
10438 outrel.r_addend = value - dtpoff_base (info);
10439 else
10440 outrel.r_addend = 0;
10441 outrel.r_offset = (sgot->output_section->vma
10442 + sgot->output_offset
10443 + cur_off);
10444 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
10445
10446 if (globals->use_rel)
10447 bfd_put_32 (output_bfd, outrel.r_addend,
10448 sgot->contents + cur_off);
10449
10450 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10451 }
10452 else
10453 bfd_put_32 (output_bfd, tpoff (info, value),
10454 sgot->contents + cur_off);
10455 cur_off += 4;
10456 }
10457
10458 if (h != NULL)
10459 h->got.offset |= 1;
10460 else
10461 local_got_offsets[r_symndx] |= 1;
10462 }
10463
10464 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
10465 off += 8;
10466 else if (tls_type & GOT_TLS_GDESC)
10467 off = offplt;
10468
10469 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
10470 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
10471 {
10472 bfd_signed_vma offset;
10473 /* TLS stubs are arm mode. The original symbol is a
10474 data object, so branch_type is bogus. */
10475 branch_type = ST_BRANCH_TO_ARM;
10476 enum elf32_arm_stub_type stub_type
10477 = arm_type_of_stub (info, input_section, rel,
10478 st_type, &branch_type,
10479 (struct elf32_arm_link_hash_entry *)h,
10480 globals->tls_trampoline, globals->root.splt,
10481 input_bfd, sym_name);
10482
10483 if (stub_type != arm_stub_none)
10484 {
10485 struct elf32_arm_stub_hash_entry *stub_entry
10486 = elf32_arm_get_stub_entry
10487 (input_section, globals->root.splt, 0, rel,
10488 globals, stub_type);
10489 offset = (stub_entry->stub_offset
10490 + stub_entry->stub_sec->output_offset
10491 + stub_entry->stub_sec->output_section->vma);
10492 }
10493 else
10494 offset = (globals->root.splt->output_section->vma
10495 + globals->root.splt->output_offset
10496 + globals->tls_trampoline);
10497
10498 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
10499 {
10500 unsigned long inst;
10501
10502 offset -= (input_section->output_section->vma
10503 + input_section->output_offset
10504 + rel->r_offset + 8);
10505
10506 inst = offset >> 2;
10507 inst &= 0x00ffffff;
10508 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
10509 }
10510 else
10511 {
10512 /* Thumb blx encodes the offset in a complicated
10513 fashion. */
10514 unsigned upper_insn, lower_insn;
10515 unsigned neg;
10516
10517 offset -= (input_section->output_section->vma
10518 + input_section->output_offset
10519 + rel->r_offset + 4);
10520
10521 if (stub_type != arm_stub_none
10522 && arm_stub_is_thumb (stub_type))
10523 {
10524 lower_insn = 0xd000;
10525 }
10526 else
10527 {
10528 lower_insn = 0xc000;
10529 /* Round up the offset to a word boundary. */
10530 offset = (offset + 2) & ~2;
10531 }
10532
10533 neg = offset < 0;
10534 upper_insn = (0xf000
10535 | ((offset >> 12) & 0x3ff)
10536 | (neg << 10));
10537 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
10538 | (((!((offset >> 22) & 1)) ^ neg) << 11)
10539 | ((offset >> 1) & 0x7ff);
10540 bfd_put_16 (input_bfd, upper_insn, hit_data);
10541 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10542 return bfd_reloc_ok;
10543 }
10544 }
10545 /* These relocations needs special care, as besides the fact
10546 they point somewhere in .gotplt, the addend must be
10547 adjusted accordingly depending on the type of instruction
10548 we refer to. */
10549 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
10550 {
10551 unsigned long data, insn;
10552 unsigned thumb;
10553
10554 data = bfd_get_32 (input_bfd, hit_data);
10555 thumb = data & 1;
10556 data &= ~1u;
10557
10558 if (thumb)
10559 {
10560 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
10561 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10562 insn = (insn << 16)
10563 | bfd_get_16 (input_bfd,
10564 contents + rel->r_offset - data + 2);
10565 if ((insn & 0xf800c000) == 0xf000c000)
10566 /* bl/blx */
10567 value = -6;
10568 else if ((insn & 0xffffff00) == 0x4400)
10569 /* add */
10570 value = -5;
10571 else
10572 {
10573 (*_bfd_error_handler)
10574 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10575 input_bfd, input_section,
10576 (unsigned long)rel->r_offset, insn);
10577 return bfd_reloc_notsupported;
10578 }
10579 }
10580 else
10581 {
10582 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
10583
10584 switch (insn >> 24)
10585 {
10586 case 0xeb: /* bl */
10587 case 0xfa: /* blx */
10588 value = -4;
10589 break;
10590
10591 case 0xe0: /* add */
10592 value = -8;
10593 break;
10594
10595 default:
10596 (*_bfd_error_handler)
10597 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10598 input_bfd, input_section,
10599 (unsigned long)rel->r_offset, insn);
10600 return bfd_reloc_notsupported;
10601 }
10602 }
10603
10604 value += ((globals->root.sgotplt->output_section->vma
10605 + globals->root.sgotplt->output_offset + off)
10606 - (input_section->output_section->vma
10607 + input_section->output_offset
10608 + rel->r_offset)
10609 + globals->sgotplt_jump_table_size);
10610 }
10611 else
10612 value = ((globals->root.sgot->output_section->vma
10613 + globals->root.sgot->output_offset + off)
10614 - (input_section->output_section->vma
10615 + input_section->output_offset + rel->r_offset));
10616
10617 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10618 contents, rel->r_offset, value,
10619 rel->r_addend);
10620 }
10621
10622 case R_ARM_TLS_LE32:
10623 if (bfd_link_dll (info))
10624 {
10625 (*_bfd_error_handler)
10626 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10627 input_bfd, input_section,
10628 (long) rel->r_offset, howto->name);
10629 return bfd_reloc_notsupported;
10630 }
10631 else
10632 value = tpoff (info, value);
10633
10634 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10635 contents, rel->r_offset, value,
10636 rel->r_addend);
10637
10638 case R_ARM_V4BX:
10639 if (globals->fix_v4bx)
10640 {
10641 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10642
10643 /* Ensure that we have a BX instruction. */
10644 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
10645
10646 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
10647 {
10648 /* Branch to veneer. */
10649 bfd_vma glue_addr;
10650 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
10651 glue_addr -= input_section->output_section->vma
10652 + input_section->output_offset
10653 + rel->r_offset + 8;
10654 insn = (insn & 0xf0000000) | 0x0a000000
10655 | ((glue_addr >> 2) & 0x00ffffff);
10656 }
10657 else
10658 {
10659 /* Preserve Rm (lowest four bits) and the condition code
10660 (highest four bits). Other bits encode MOV PC,Rm. */
10661 insn = (insn & 0xf000000f) | 0x01a0f000;
10662 }
10663
10664 bfd_put_32 (input_bfd, insn, hit_data);
10665 }
10666 return bfd_reloc_ok;
10667
10668 case R_ARM_MOVW_ABS_NC:
10669 case R_ARM_MOVT_ABS:
10670 case R_ARM_MOVW_PREL_NC:
10671 case R_ARM_MOVT_PREL:
10672 /* Until we properly support segment-base-relative addressing then
10673 we assume the segment base to be zero, as for the group relocations.
10674 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10675 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10676 case R_ARM_MOVW_BREL_NC:
10677 case R_ARM_MOVW_BREL:
10678 case R_ARM_MOVT_BREL:
10679 {
10680 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10681
10682 if (globals->use_rel)
10683 {
10684 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
10685 signed_addend = (addend ^ 0x8000) - 0x8000;
10686 }
10687
10688 value += signed_addend;
10689
10690 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
10691 value -= (input_section->output_section->vma
10692 + input_section->output_offset + rel->r_offset);
10693
10694 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
10695 return bfd_reloc_overflow;
10696
10697 if (branch_type == ST_BRANCH_TO_THUMB)
10698 value |= 1;
10699
10700 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
10701 || r_type == R_ARM_MOVT_BREL)
10702 value >>= 16;
10703
10704 insn &= 0xfff0f000;
10705 insn |= value & 0xfff;
10706 insn |= (value & 0xf000) << 4;
10707 bfd_put_32 (input_bfd, insn, hit_data);
10708 }
10709 return bfd_reloc_ok;
10710
10711 case R_ARM_THM_MOVW_ABS_NC:
10712 case R_ARM_THM_MOVT_ABS:
10713 case R_ARM_THM_MOVW_PREL_NC:
10714 case R_ARM_THM_MOVT_PREL:
10715 /* Until we properly support segment-base-relative addressing then
10716 we assume the segment base to be zero, as for the above relocations.
10717 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10718 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10719 as R_ARM_THM_MOVT_ABS. */
10720 case R_ARM_THM_MOVW_BREL_NC:
10721 case R_ARM_THM_MOVW_BREL:
10722 case R_ARM_THM_MOVT_BREL:
10723 {
10724 bfd_vma insn;
10725
10726 insn = bfd_get_16 (input_bfd, hit_data) << 16;
10727 insn |= bfd_get_16 (input_bfd, hit_data + 2);
10728
10729 if (globals->use_rel)
10730 {
10731 addend = ((insn >> 4) & 0xf000)
10732 | ((insn >> 15) & 0x0800)
10733 | ((insn >> 4) & 0x0700)
10734 | (insn & 0x00ff);
10735 signed_addend = (addend ^ 0x8000) - 0x8000;
10736 }
10737
10738 value += signed_addend;
10739
10740 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
10741 value -= (input_section->output_section->vma
10742 + input_section->output_offset + rel->r_offset);
10743
10744 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
10745 return bfd_reloc_overflow;
10746
10747 if (branch_type == ST_BRANCH_TO_THUMB)
10748 value |= 1;
10749
10750 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
10751 || r_type == R_ARM_THM_MOVT_BREL)
10752 value >>= 16;
10753
10754 insn &= 0xfbf08f00;
10755 insn |= (value & 0xf000) << 4;
10756 insn |= (value & 0x0800) << 15;
10757 insn |= (value & 0x0700) << 4;
10758 insn |= (value & 0x00ff);
10759
10760 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10761 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10762 }
10763 return bfd_reloc_ok;
10764
10765 case R_ARM_ALU_PC_G0_NC:
10766 case R_ARM_ALU_PC_G1_NC:
10767 case R_ARM_ALU_PC_G0:
10768 case R_ARM_ALU_PC_G1:
10769 case R_ARM_ALU_PC_G2:
10770 case R_ARM_ALU_SB_G0_NC:
10771 case R_ARM_ALU_SB_G1_NC:
10772 case R_ARM_ALU_SB_G0:
10773 case R_ARM_ALU_SB_G1:
10774 case R_ARM_ALU_SB_G2:
10775 {
10776 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10777 bfd_vma pc = input_section->output_section->vma
10778 + input_section->output_offset + rel->r_offset;
10779 /* sb is the origin of the *segment* containing the symbol. */
10780 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10781 bfd_vma residual;
10782 bfd_vma g_n;
10783 bfd_signed_vma signed_value;
10784 int group = 0;
10785
10786 /* Determine which group of bits to select. */
10787 switch (r_type)
10788 {
10789 case R_ARM_ALU_PC_G0_NC:
10790 case R_ARM_ALU_PC_G0:
10791 case R_ARM_ALU_SB_G0_NC:
10792 case R_ARM_ALU_SB_G0:
10793 group = 0;
10794 break;
10795
10796 case R_ARM_ALU_PC_G1_NC:
10797 case R_ARM_ALU_PC_G1:
10798 case R_ARM_ALU_SB_G1_NC:
10799 case R_ARM_ALU_SB_G1:
10800 group = 1;
10801 break;
10802
10803 case R_ARM_ALU_PC_G2:
10804 case R_ARM_ALU_SB_G2:
10805 group = 2;
10806 break;
10807
10808 default:
10809 abort ();
10810 }
10811
10812 /* If REL, extract the addend from the insn. If RELA, it will
10813 have already been fetched for us. */
10814 if (globals->use_rel)
10815 {
10816 int negative;
10817 bfd_vma constant = insn & 0xff;
10818 bfd_vma rotation = (insn & 0xf00) >> 8;
10819
10820 if (rotation == 0)
10821 signed_addend = constant;
10822 else
10823 {
10824 /* Compensate for the fact that in the instruction, the
10825 rotation is stored in multiples of 2 bits. */
10826 rotation *= 2;
10827
10828 /* Rotate "constant" right by "rotation" bits. */
10829 signed_addend = (constant >> rotation) |
10830 (constant << (8 * sizeof (bfd_vma) - rotation));
10831 }
10832
10833 /* Determine if the instruction is an ADD or a SUB.
10834 (For REL, this determines the sign of the addend.) */
10835 negative = identify_add_or_sub (insn);
10836 if (negative == 0)
10837 {
10838 (*_bfd_error_handler)
10839 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10840 input_bfd, input_section,
10841 (long) rel->r_offset, howto->name);
10842 return bfd_reloc_overflow;
10843 }
10844
10845 signed_addend *= negative;
10846 }
10847
10848 /* Compute the value (X) to go in the place. */
10849 if (r_type == R_ARM_ALU_PC_G0_NC
10850 || r_type == R_ARM_ALU_PC_G1_NC
10851 || r_type == R_ARM_ALU_PC_G0
10852 || r_type == R_ARM_ALU_PC_G1
10853 || r_type == R_ARM_ALU_PC_G2)
10854 /* PC relative. */
10855 signed_value = value - pc + signed_addend;
10856 else
10857 /* Section base relative. */
10858 signed_value = value - sb + signed_addend;
10859
10860 /* If the target symbol is a Thumb function, then set the
10861 Thumb bit in the address. */
10862 if (branch_type == ST_BRANCH_TO_THUMB)
10863 signed_value |= 1;
10864
10865 /* Calculate the value of the relevant G_n, in encoded
10866 constant-with-rotation format. */
10867 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10868 group, &residual);
10869
10870 /* Check for overflow if required. */
10871 if ((r_type == R_ARM_ALU_PC_G0
10872 || r_type == R_ARM_ALU_PC_G1
10873 || r_type == R_ARM_ALU_PC_G2
10874 || r_type == R_ARM_ALU_SB_G0
10875 || r_type == R_ARM_ALU_SB_G1
10876 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10877 {
10878 (*_bfd_error_handler)
10879 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10880 input_bfd, input_section,
10881 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
10882 howto->name);
10883 return bfd_reloc_overflow;
10884 }
10885
10886 /* Mask out the value and the ADD/SUB part of the opcode; take care
10887 not to destroy the S bit. */
10888 insn &= 0xff1ff000;
10889
10890 /* Set the opcode according to whether the value to go in the
10891 place is negative. */
10892 if (signed_value < 0)
10893 insn |= 1 << 22;
10894 else
10895 insn |= 1 << 23;
10896
10897 /* Encode the offset. */
10898 insn |= g_n;
10899
10900 bfd_put_32 (input_bfd, insn, hit_data);
10901 }
10902 return bfd_reloc_ok;
10903
10904 case R_ARM_LDR_PC_G0:
10905 case R_ARM_LDR_PC_G1:
10906 case R_ARM_LDR_PC_G2:
10907 case R_ARM_LDR_SB_G0:
10908 case R_ARM_LDR_SB_G1:
10909 case R_ARM_LDR_SB_G2:
10910 {
10911 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10912 bfd_vma pc = input_section->output_section->vma
10913 + input_section->output_offset + rel->r_offset;
10914 /* sb is the origin of the *segment* containing the symbol. */
10915 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10916 bfd_vma residual;
10917 bfd_signed_vma signed_value;
10918 int group = 0;
10919
10920 /* Determine which groups of bits to calculate. */
10921 switch (r_type)
10922 {
10923 case R_ARM_LDR_PC_G0:
10924 case R_ARM_LDR_SB_G0:
10925 group = 0;
10926 break;
10927
10928 case R_ARM_LDR_PC_G1:
10929 case R_ARM_LDR_SB_G1:
10930 group = 1;
10931 break;
10932
10933 case R_ARM_LDR_PC_G2:
10934 case R_ARM_LDR_SB_G2:
10935 group = 2;
10936 break;
10937
10938 default:
10939 abort ();
10940 }
10941
10942 /* If REL, extract the addend from the insn. If RELA, it will
10943 have already been fetched for us. */
10944 if (globals->use_rel)
10945 {
10946 int negative = (insn & (1 << 23)) ? 1 : -1;
10947 signed_addend = negative * (insn & 0xfff);
10948 }
10949
10950 /* Compute the value (X) to go in the place. */
10951 if (r_type == R_ARM_LDR_PC_G0
10952 || r_type == R_ARM_LDR_PC_G1
10953 || r_type == R_ARM_LDR_PC_G2)
10954 /* PC relative. */
10955 signed_value = value - pc + signed_addend;
10956 else
10957 /* Section base relative. */
10958 signed_value = value - sb + signed_addend;
10959
10960 /* Calculate the value of the relevant G_{n-1} to obtain
10961 the residual at that stage. */
10962 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10963 group - 1, &residual);
10964
10965 /* Check for overflow. */
10966 if (residual >= 0x1000)
10967 {
10968 (*_bfd_error_handler)
10969 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10970 input_bfd, input_section,
10971 (long) rel->r_offset, labs (signed_value), howto->name);
10972 return bfd_reloc_overflow;
10973 }
10974
10975 /* Mask out the value and U bit. */
10976 insn &= 0xff7ff000;
10977
10978 /* Set the U bit if the value to go in the place is non-negative. */
10979 if (signed_value >= 0)
10980 insn |= 1 << 23;
10981
10982 /* Encode the offset. */
10983 insn |= residual;
10984
10985 bfd_put_32 (input_bfd, insn, hit_data);
10986 }
10987 return bfd_reloc_ok;
10988
10989 case R_ARM_LDRS_PC_G0:
10990 case R_ARM_LDRS_PC_G1:
10991 case R_ARM_LDRS_PC_G2:
10992 case R_ARM_LDRS_SB_G0:
10993 case R_ARM_LDRS_SB_G1:
10994 case R_ARM_LDRS_SB_G2:
10995 {
10996 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10997 bfd_vma pc = input_section->output_section->vma
10998 + input_section->output_offset + rel->r_offset;
10999 /* sb is the origin of the *segment* containing the symbol. */
11000 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11001 bfd_vma residual;
11002 bfd_signed_vma signed_value;
11003 int group = 0;
11004
11005 /* Determine which groups of bits to calculate. */
11006 switch (r_type)
11007 {
11008 case R_ARM_LDRS_PC_G0:
11009 case R_ARM_LDRS_SB_G0:
11010 group = 0;
11011 break;
11012
11013 case R_ARM_LDRS_PC_G1:
11014 case R_ARM_LDRS_SB_G1:
11015 group = 1;
11016 break;
11017
11018 case R_ARM_LDRS_PC_G2:
11019 case R_ARM_LDRS_SB_G2:
11020 group = 2;
11021 break;
11022
11023 default:
11024 abort ();
11025 }
11026
11027 /* If REL, extract the addend from the insn. If RELA, it will
11028 have already been fetched for us. */
11029 if (globals->use_rel)
11030 {
11031 int negative = (insn & (1 << 23)) ? 1 : -1;
11032 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11033 }
11034
11035 /* Compute the value (X) to go in the place. */
11036 if (r_type == R_ARM_LDRS_PC_G0
11037 || r_type == R_ARM_LDRS_PC_G1
11038 || r_type == R_ARM_LDRS_PC_G2)
11039 /* PC relative. */
11040 signed_value = value - pc + signed_addend;
11041 else
11042 /* Section base relative. */
11043 signed_value = value - sb + signed_addend;
11044
11045 /* Calculate the value of the relevant G_{n-1} to obtain
11046 the residual at that stage. */
11047 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11048 group - 1, &residual);
11049
11050 /* Check for overflow. */
11051 if (residual >= 0x100)
11052 {
11053 (*_bfd_error_handler)
11054 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11055 input_bfd, input_section,
11056 (long) rel->r_offset, labs (signed_value), howto->name);
11057 return bfd_reloc_overflow;
11058 }
11059
11060 /* Mask out the value and U bit. */
11061 insn &= 0xff7ff0f0;
11062
11063 /* Set the U bit if the value to go in the place is non-negative. */
11064 if (signed_value >= 0)
11065 insn |= 1 << 23;
11066
11067 /* Encode the offset. */
11068 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
11069
11070 bfd_put_32 (input_bfd, insn, hit_data);
11071 }
11072 return bfd_reloc_ok;
11073
11074 case R_ARM_LDC_PC_G0:
11075 case R_ARM_LDC_PC_G1:
11076 case R_ARM_LDC_PC_G2:
11077 case R_ARM_LDC_SB_G0:
11078 case R_ARM_LDC_SB_G1:
11079 case R_ARM_LDC_SB_G2:
11080 {
11081 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11082 bfd_vma pc = input_section->output_section->vma
11083 + input_section->output_offset + rel->r_offset;
11084 /* sb is the origin of the *segment* containing the symbol. */
11085 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11086 bfd_vma residual;
11087 bfd_signed_vma signed_value;
11088 int group = 0;
11089
11090 /* Determine which groups of bits to calculate. */
11091 switch (r_type)
11092 {
11093 case R_ARM_LDC_PC_G0:
11094 case R_ARM_LDC_SB_G0:
11095 group = 0;
11096 break;
11097
11098 case R_ARM_LDC_PC_G1:
11099 case R_ARM_LDC_SB_G1:
11100 group = 1;
11101 break;
11102
11103 case R_ARM_LDC_PC_G2:
11104 case R_ARM_LDC_SB_G2:
11105 group = 2;
11106 break;
11107
11108 default:
11109 abort ();
11110 }
11111
11112 /* If REL, extract the addend from the insn. If RELA, it will
11113 have already been fetched for us. */
11114 if (globals->use_rel)
11115 {
11116 int negative = (insn & (1 << 23)) ? 1 : -1;
11117 signed_addend = negative * ((insn & 0xff) << 2);
11118 }
11119
11120 /* Compute the value (X) to go in the place. */
11121 if (r_type == R_ARM_LDC_PC_G0
11122 || r_type == R_ARM_LDC_PC_G1
11123 || r_type == R_ARM_LDC_PC_G2)
11124 /* PC relative. */
11125 signed_value = value - pc + signed_addend;
11126 else
11127 /* Section base relative. */
11128 signed_value = value - sb + signed_addend;
11129
11130 /* Calculate the value of the relevant G_{n-1} to obtain
11131 the residual at that stage. */
11132 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11133 group - 1, &residual);
11134
11135 /* Check for overflow. (The absolute value to go in the place must be
11136 divisible by four and, after having been divided by four, must
11137 fit in eight bits.) */
11138 if ((residual & 0x3) != 0 || residual >= 0x400)
11139 {
11140 (*_bfd_error_handler)
11141 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11142 input_bfd, input_section,
11143 (long) rel->r_offset, labs (signed_value), howto->name);
11144 return bfd_reloc_overflow;
11145 }
11146
11147 /* Mask out the value and U bit. */
11148 insn &= 0xff7fff00;
11149
11150 /* Set the U bit if the value to go in the place is non-negative. */
11151 if (signed_value >= 0)
11152 insn |= 1 << 23;
11153
11154 /* Encode the offset. */
11155 insn |= residual >> 2;
11156
11157 bfd_put_32 (input_bfd, insn, hit_data);
11158 }
11159 return bfd_reloc_ok;
11160
11161 case R_ARM_THM_ALU_ABS_G0_NC:
11162 case R_ARM_THM_ALU_ABS_G1_NC:
11163 case R_ARM_THM_ALU_ABS_G2_NC:
11164 case R_ARM_THM_ALU_ABS_G3_NC:
11165 {
11166 const int shift_array[4] = {0, 8, 16, 24};
11167 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
11168 bfd_vma addr = value;
11169 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
11170
11171 /* Compute address. */
11172 if (globals->use_rel)
11173 signed_addend = insn & 0xff;
11174 addr += signed_addend;
11175 if (branch_type == ST_BRANCH_TO_THUMB)
11176 addr |= 1;
11177 /* Clean imm8 insn. */
11178 insn &= 0xff00;
11179 /* And update with correct part of address. */
11180 insn |= (addr >> shift) & 0xff;
11181 /* Update insn. */
11182 bfd_put_16 (input_bfd, insn, hit_data);
11183 }
11184
11185 *unresolved_reloc_p = FALSE;
11186 return bfd_reloc_ok;
11187
11188 default:
11189 return bfd_reloc_notsupported;
11190 }
11191 }
11192
11193 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11194 static void
11195 arm_add_to_rel (bfd * abfd,
11196 bfd_byte * address,
11197 reloc_howto_type * howto,
11198 bfd_signed_vma increment)
11199 {
11200 bfd_signed_vma addend;
11201
11202 if (howto->type == R_ARM_THM_CALL
11203 || howto->type == R_ARM_THM_JUMP24)
11204 {
11205 int upper_insn, lower_insn;
11206 int upper, lower;
11207
11208 upper_insn = bfd_get_16 (abfd, address);
11209 lower_insn = bfd_get_16 (abfd, address + 2);
11210 upper = upper_insn & 0x7ff;
11211 lower = lower_insn & 0x7ff;
11212
11213 addend = (upper << 12) | (lower << 1);
11214 addend += increment;
11215 addend >>= 1;
11216
11217 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
11218 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
11219
11220 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
11221 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
11222 }
11223 else
11224 {
11225 bfd_vma contents;
11226
11227 contents = bfd_get_32 (abfd, address);
11228
11229 /* Get the (signed) value from the instruction. */
11230 addend = contents & howto->src_mask;
11231 if (addend & ((howto->src_mask + 1) >> 1))
11232 {
11233 bfd_signed_vma mask;
11234
11235 mask = -1;
11236 mask &= ~ howto->src_mask;
11237 addend |= mask;
11238 }
11239
11240 /* Add in the increment, (which is a byte value). */
11241 switch (howto->type)
11242 {
11243 default:
11244 addend += increment;
11245 break;
11246
11247 case R_ARM_PC24:
11248 case R_ARM_PLT32:
11249 case R_ARM_CALL:
11250 case R_ARM_JUMP24:
11251 addend <<= howto->size;
11252 addend += increment;
11253
11254 /* Should we check for overflow here ? */
11255
11256 /* Drop any undesired bits. */
11257 addend >>= howto->rightshift;
11258 break;
11259 }
11260
11261 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
11262
11263 bfd_put_32 (abfd, contents, address);
11264 }
11265 }
11266
11267 #define IS_ARM_TLS_RELOC(R_TYPE) \
11268 ((R_TYPE) == R_ARM_TLS_GD32 \
11269 || (R_TYPE) == R_ARM_TLS_LDO32 \
11270 || (R_TYPE) == R_ARM_TLS_LDM32 \
11271 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11272 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11273 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11274 || (R_TYPE) == R_ARM_TLS_LE32 \
11275 || (R_TYPE) == R_ARM_TLS_IE32 \
11276 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11277
11278 /* Specific set of relocations for the gnu tls dialect. */
11279 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11280 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11281 || (R_TYPE) == R_ARM_TLS_CALL \
11282 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11283 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11284 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11285
11286 /* Relocate an ARM ELF section. */
11287
11288 static bfd_boolean
11289 elf32_arm_relocate_section (bfd * output_bfd,
11290 struct bfd_link_info * info,
11291 bfd * input_bfd,
11292 asection * input_section,
11293 bfd_byte * contents,
11294 Elf_Internal_Rela * relocs,
11295 Elf_Internal_Sym * local_syms,
11296 asection ** local_sections)
11297 {
11298 Elf_Internal_Shdr *symtab_hdr;
11299 struct elf_link_hash_entry **sym_hashes;
11300 Elf_Internal_Rela *rel;
11301 Elf_Internal_Rela *relend;
11302 const char *name;
11303 struct elf32_arm_link_hash_table * globals;
11304
11305 globals = elf32_arm_hash_table (info);
11306 if (globals == NULL)
11307 return FALSE;
11308
11309 symtab_hdr = & elf_symtab_hdr (input_bfd);
11310 sym_hashes = elf_sym_hashes (input_bfd);
11311
11312 rel = relocs;
11313 relend = relocs + input_section->reloc_count;
11314 for (; rel < relend; rel++)
11315 {
11316 int r_type;
11317 reloc_howto_type * howto;
11318 unsigned long r_symndx;
11319 Elf_Internal_Sym * sym;
11320 asection * sec;
11321 struct elf_link_hash_entry * h;
11322 bfd_vma relocation;
11323 bfd_reloc_status_type r;
11324 arelent bfd_reloc;
11325 char sym_type;
11326 bfd_boolean unresolved_reloc = FALSE;
11327 char *error_message = NULL;
11328
11329 r_symndx = ELF32_R_SYM (rel->r_info);
11330 r_type = ELF32_R_TYPE (rel->r_info);
11331 r_type = arm_real_reloc_type (globals, r_type);
11332
11333 if ( r_type == R_ARM_GNU_VTENTRY
11334 || r_type == R_ARM_GNU_VTINHERIT)
11335 continue;
11336
11337 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
11338 howto = bfd_reloc.howto;
11339
11340 h = NULL;
11341 sym = NULL;
11342 sec = NULL;
11343
11344 if (r_symndx < symtab_hdr->sh_info)
11345 {
11346 sym = local_syms + r_symndx;
11347 sym_type = ELF32_ST_TYPE (sym->st_info);
11348 sec = local_sections[r_symndx];
11349
11350 /* An object file might have a reference to a local
11351 undefined symbol. This is a daft object file, but we
11352 should at least do something about it. V4BX & NONE
11353 relocations do not use the symbol and are explicitly
11354 allowed to use the undefined symbol, so allow those.
11355 Likewise for relocations against STN_UNDEF. */
11356 if (r_type != R_ARM_V4BX
11357 && r_type != R_ARM_NONE
11358 && r_symndx != STN_UNDEF
11359 && bfd_is_und_section (sec)
11360 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
11361 {
11362 if (!info->callbacks->undefined_symbol
11363 (info, bfd_elf_string_from_elf_section
11364 (input_bfd, symtab_hdr->sh_link, sym->st_name),
11365 input_bfd, input_section,
11366 rel->r_offset, TRUE))
11367 return FALSE;
11368 }
11369
11370 if (globals->use_rel)
11371 {
11372 relocation = (sec->output_section->vma
11373 + sec->output_offset
11374 + sym->st_value);
11375 if (!bfd_link_relocatable (info)
11376 && (sec->flags & SEC_MERGE)
11377 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11378 {
11379 asection *msec;
11380 bfd_vma addend, value;
11381
11382 switch (r_type)
11383 {
11384 case R_ARM_MOVW_ABS_NC:
11385 case R_ARM_MOVT_ABS:
11386 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11387 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
11388 addend = (addend ^ 0x8000) - 0x8000;
11389 break;
11390
11391 case R_ARM_THM_MOVW_ABS_NC:
11392 case R_ARM_THM_MOVT_ABS:
11393 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
11394 << 16;
11395 value |= bfd_get_16 (input_bfd,
11396 contents + rel->r_offset + 2);
11397 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
11398 | ((value & 0x04000000) >> 15);
11399 addend = (addend ^ 0x8000) - 0x8000;
11400 break;
11401
11402 default:
11403 if (howto->rightshift
11404 || (howto->src_mask & (howto->src_mask + 1)))
11405 {
11406 (*_bfd_error_handler)
11407 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11408 input_bfd, input_section,
11409 (long) rel->r_offset, howto->name);
11410 return FALSE;
11411 }
11412
11413 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11414
11415 /* Get the (signed) value from the instruction. */
11416 addend = value & howto->src_mask;
11417 if (addend & ((howto->src_mask + 1) >> 1))
11418 {
11419 bfd_signed_vma mask;
11420
11421 mask = -1;
11422 mask &= ~ howto->src_mask;
11423 addend |= mask;
11424 }
11425 break;
11426 }
11427
11428 msec = sec;
11429 addend =
11430 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
11431 - relocation;
11432 addend += msec->output_section->vma + msec->output_offset;
11433
11434 /* Cases here must match those in the preceding
11435 switch statement. */
11436 switch (r_type)
11437 {
11438 case R_ARM_MOVW_ABS_NC:
11439 case R_ARM_MOVT_ABS:
11440 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
11441 | (addend & 0xfff);
11442 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11443 break;
11444
11445 case R_ARM_THM_MOVW_ABS_NC:
11446 case R_ARM_THM_MOVT_ABS:
11447 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
11448 | (addend & 0xff) | ((addend & 0x0800) << 15);
11449 bfd_put_16 (input_bfd, value >> 16,
11450 contents + rel->r_offset);
11451 bfd_put_16 (input_bfd, value,
11452 contents + rel->r_offset + 2);
11453 break;
11454
11455 default:
11456 value = (value & ~ howto->dst_mask)
11457 | (addend & howto->dst_mask);
11458 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11459 break;
11460 }
11461 }
11462 }
11463 else
11464 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
11465 }
11466 else
11467 {
11468 bfd_boolean warned, ignored;
11469
11470 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
11471 r_symndx, symtab_hdr, sym_hashes,
11472 h, sec, relocation,
11473 unresolved_reloc, warned, ignored);
11474
11475 sym_type = h->type;
11476 }
11477
11478 if (sec != NULL && discarded_section (sec))
11479 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
11480 rel, 1, relend, howto, 0, contents);
11481
11482 if (bfd_link_relocatable (info))
11483 {
11484 /* This is a relocatable link. We don't have to change
11485 anything, unless the reloc is against a section symbol,
11486 in which case we have to adjust according to where the
11487 section symbol winds up in the output section. */
11488 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11489 {
11490 if (globals->use_rel)
11491 arm_add_to_rel (input_bfd, contents + rel->r_offset,
11492 howto, (bfd_signed_vma) sec->output_offset);
11493 else
11494 rel->r_addend += sec->output_offset;
11495 }
11496 continue;
11497 }
11498
11499 if (h != NULL)
11500 name = h->root.root.string;
11501 else
11502 {
11503 name = (bfd_elf_string_from_elf_section
11504 (input_bfd, symtab_hdr->sh_link, sym->st_name));
11505 if (name == NULL || *name == '\0')
11506 name = bfd_section_name (input_bfd, sec);
11507 }
11508
11509 if (r_symndx != STN_UNDEF
11510 && r_type != R_ARM_NONE
11511 && (h == NULL
11512 || h->root.type == bfd_link_hash_defined
11513 || h->root.type == bfd_link_hash_defweak)
11514 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
11515 {
11516 (*_bfd_error_handler)
11517 ((sym_type == STT_TLS
11518 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11519 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11520 input_bfd,
11521 input_section,
11522 (long) rel->r_offset,
11523 howto->name,
11524 name);
11525 }
11526
11527 /* We call elf32_arm_final_link_relocate unless we're completely
11528 done, i.e., the relaxation produced the final output we want,
11529 and we won't let anybody mess with it. Also, we have to do
11530 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11531 both in relaxed and non-relaxed cases. */
11532 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
11533 || (IS_ARM_TLS_GNU_RELOC (r_type)
11534 && !((h ? elf32_arm_hash_entry (h)->tls_type :
11535 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
11536 & GOT_TLS_GDESC)))
11537 {
11538 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
11539 contents, rel, h == NULL);
11540 /* This may have been marked unresolved because it came from
11541 a shared library. But we've just dealt with that. */
11542 unresolved_reloc = 0;
11543 }
11544 else
11545 r = bfd_reloc_continue;
11546
11547 if (r == bfd_reloc_continue)
11548 {
11549 unsigned char branch_type =
11550 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
11551 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
11552
11553 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
11554 input_section, contents, rel,
11555 relocation, info, sec, name,
11556 sym_type, branch_type, h,
11557 &unresolved_reloc,
11558 &error_message);
11559 }
11560
11561 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11562 because such sections are not SEC_ALLOC and thus ld.so will
11563 not process them. */
11564 if (unresolved_reloc
11565 && !((input_section->flags & SEC_DEBUGGING) != 0
11566 && h->def_dynamic)
11567 && _bfd_elf_section_offset (output_bfd, info, input_section,
11568 rel->r_offset) != (bfd_vma) -1)
11569 {
11570 (*_bfd_error_handler)
11571 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11572 input_bfd,
11573 input_section,
11574 (long) rel->r_offset,
11575 howto->name,
11576 h->root.root.string);
11577 return FALSE;
11578 }
11579
11580 if (r != bfd_reloc_ok)
11581 {
11582 switch (r)
11583 {
11584 case bfd_reloc_overflow:
11585 /* If the overflowing reloc was to an undefined symbol,
11586 we have already printed one error message and there
11587 is no point complaining again. */
11588 if ((! h ||
11589 h->root.type != bfd_link_hash_undefined)
11590 && (!((*info->callbacks->reloc_overflow)
11591 (info, (h ? &h->root : NULL), name, howto->name,
11592 (bfd_vma) 0, input_bfd, input_section,
11593 rel->r_offset))))
11594 return FALSE;
11595 break;
11596
11597 case bfd_reloc_undefined:
11598 if (!((*info->callbacks->undefined_symbol)
11599 (info, name, input_bfd, input_section,
11600 rel->r_offset, TRUE)))
11601 return FALSE;
11602 break;
11603
11604 case bfd_reloc_outofrange:
11605 error_message = _("out of range");
11606 goto common_error;
11607
11608 case bfd_reloc_notsupported:
11609 error_message = _("unsupported relocation");
11610 goto common_error;
11611
11612 case bfd_reloc_dangerous:
11613 /* error_message should already be set. */
11614 goto common_error;
11615
11616 default:
11617 error_message = _("unknown error");
11618 /* Fall through. */
11619
11620 common_error:
11621 BFD_ASSERT (error_message != NULL);
11622 if (!((*info->callbacks->reloc_dangerous)
11623 (info, error_message, input_bfd, input_section,
11624 rel->r_offset)))
11625 return FALSE;
11626 break;
11627 }
11628 }
11629 }
11630
11631 return TRUE;
11632 }
11633
11634 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11635 adds the edit to the start of the list. (The list must be built in order of
11636 ascending TINDEX: the function's callers are primarily responsible for
11637 maintaining that condition). */
11638
11639 static void
11640 add_unwind_table_edit (arm_unwind_table_edit **head,
11641 arm_unwind_table_edit **tail,
11642 arm_unwind_edit_type type,
11643 asection *linked_section,
11644 unsigned int tindex)
11645 {
11646 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
11647 xmalloc (sizeof (arm_unwind_table_edit));
11648
11649 new_edit->type = type;
11650 new_edit->linked_section = linked_section;
11651 new_edit->index = tindex;
11652
11653 if (tindex > 0)
11654 {
11655 new_edit->next = NULL;
11656
11657 if (*tail)
11658 (*tail)->next = new_edit;
11659
11660 (*tail) = new_edit;
11661
11662 if (!*head)
11663 (*head) = new_edit;
11664 }
11665 else
11666 {
11667 new_edit->next = *head;
11668
11669 if (!*tail)
11670 *tail = new_edit;
11671
11672 *head = new_edit;
11673 }
11674 }
11675
11676 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
11677
11678 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11679 static void
11680 adjust_exidx_size(asection *exidx_sec, int adjust)
11681 {
11682 asection *out_sec;
11683
11684 if (!exidx_sec->rawsize)
11685 exidx_sec->rawsize = exidx_sec->size;
11686
11687 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
11688 out_sec = exidx_sec->output_section;
11689 /* Adjust size of output section. */
11690 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
11691 }
11692
11693 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11694 static void
11695 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
11696 {
11697 struct _arm_elf_section_data *exidx_arm_data;
11698
11699 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11700 add_unwind_table_edit (
11701 &exidx_arm_data->u.exidx.unwind_edit_list,
11702 &exidx_arm_data->u.exidx.unwind_edit_tail,
11703 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
11704
11705 exidx_arm_data->additional_reloc_count++;
11706
11707 adjust_exidx_size(exidx_sec, 8);
11708 }
11709
11710 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11711 made to those tables, such that:
11712
11713 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11714 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11715 codes which have been inlined into the index).
11716
11717 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11718
11719 The edits are applied when the tables are written
11720 (in elf32_arm_write_section). */
11721
11722 bfd_boolean
11723 elf32_arm_fix_exidx_coverage (asection **text_section_order,
11724 unsigned int num_text_sections,
11725 struct bfd_link_info *info,
11726 bfd_boolean merge_exidx_entries)
11727 {
11728 bfd *inp;
11729 unsigned int last_second_word = 0, i;
11730 asection *last_exidx_sec = NULL;
11731 asection *last_text_sec = NULL;
11732 int last_unwind_type = -1;
11733
11734 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11735 text sections. */
11736 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
11737 {
11738 asection *sec;
11739
11740 for (sec = inp->sections; sec != NULL; sec = sec->next)
11741 {
11742 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
11743 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
11744
11745 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
11746 continue;
11747
11748 if (elf_sec->linked_to)
11749 {
11750 Elf_Internal_Shdr *linked_hdr
11751 = &elf_section_data (elf_sec->linked_to)->this_hdr;
11752 struct _arm_elf_section_data *linked_sec_arm_data
11753 = get_arm_elf_section_data (linked_hdr->bfd_section);
11754
11755 if (linked_sec_arm_data == NULL)
11756 continue;
11757
11758 /* Link this .ARM.exidx section back from the text section it
11759 describes. */
11760 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
11761 }
11762 }
11763 }
11764
11765 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11766 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11767 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11768
11769 for (i = 0; i < num_text_sections; i++)
11770 {
11771 asection *sec = text_section_order[i];
11772 asection *exidx_sec;
11773 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
11774 struct _arm_elf_section_data *exidx_arm_data;
11775 bfd_byte *contents = NULL;
11776 int deleted_exidx_bytes = 0;
11777 bfd_vma j;
11778 arm_unwind_table_edit *unwind_edit_head = NULL;
11779 arm_unwind_table_edit *unwind_edit_tail = NULL;
11780 Elf_Internal_Shdr *hdr;
11781 bfd *ibfd;
11782
11783 if (arm_data == NULL)
11784 continue;
11785
11786 exidx_sec = arm_data->u.text.arm_exidx_sec;
11787 if (exidx_sec == NULL)
11788 {
11789 /* Section has no unwind data. */
11790 if (last_unwind_type == 0 || !last_exidx_sec)
11791 continue;
11792
11793 /* Ignore zero sized sections. */
11794 if (sec->size == 0)
11795 continue;
11796
11797 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11798 last_unwind_type = 0;
11799 continue;
11800 }
11801
11802 /* Skip /DISCARD/ sections. */
11803 if (bfd_is_abs_section (exidx_sec->output_section))
11804 continue;
11805
11806 hdr = &elf_section_data (exidx_sec)->this_hdr;
11807 if (hdr->sh_type != SHT_ARM_EXIDX)
11808 continue;
11809
11810 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11811 if (exidx_arm_data == NULL)
11812 continue;
11813
11814 ibfd = exidx_sec->owner;
11815
11816 if (hdr->contents != NULL)
11817 contents = hdr->contents;
11818 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11819 /* An error? */
11820 continue;
11821
11822 if (last_unwind_type > 0)
11823 {
11824 unsigned int first_word = bfd_get_32 (ibfd, contents);
11825 /* Add cantunwind if first unwind item does not match section
11826 start. */
11827 if (first_word != sec->vma)
11828 {
11829 insert_cantunwind_after (last_text_sec, last_exidx_sec);
11830 last_unwind_type = 0;
11831 }
11832 }
11833
11834 for (j = 0; j < hdr->sh_size; j += 8)
11835 {
11836 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11837 int unwind_type;
11838 int elide = 0;
11839
11840 /* An EXIDX_CANTUNWIND entry. */
11841 if (second_word == 1)
11842 {
11843 if (last_unwind_type == 0)
11844 elide = 1;
11845 unwind_type = 0;
11846 }
11847 /* Inlined unwinding data. Merge if equal to previous. */
11848 else if ((second_word & 0x80000000) != 0)
11849 {
11850 if (merge_exidx_entries
11851 && last_second_word == second_word && last_unwind_type == 1)
11852 elide = 1;
11853 unwind_type = 1;
11854 last_second_word = second_word;
11855 }
11856 /* Normal table entry. In theory we could merge these too,
11857 but duplicate entries are likely to be much less common. */
11858 else
11859 unwind_type = 2;
11860
11861 if (elide && !bfd_link_relocatable (info))
11862 {
11863 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11864 DELETE_EXIDX_ENTRY, NULL, j / 8);
11865
11866 deleted_exidx_bytes += 8;
11867 }
11868
11869 last_unwind_type = unwind_type;
11870 }
11871
11872 /* Free contents if we allocated it ourselves. */
11873 if (contents != hdr->contents)
11874 free (contents);
11875
11876 /* Record edits to be applied later (in elf32_arm_write_section). */
11877 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11878 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11879
11880 if (deleted_exidx_bytes > 0)
11881 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11882
11883 last_exidx_sec = exidx_sec;
11884 last_text_sec = sec;
11885 }
11886
11887 /* Add terminating CANTUNWIND entry. */
11888 if (!bfd_link_relocatable (info) && last_exidx_sec
11889 && last_unwind_type != 0)
11890 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11891
11892 return TRUE;
11893 }
11894
11895 static bfd_boolean
11896 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11897 bfd *ibfd, const char *name)
11898 {
11899 asection *sec, *osec;
11900
11901 sec = bfd_get_linker_section (ibfd, name);
11902 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11903 return TRUE;
11904
11905 osec = sec->output_section;
11906 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11907 return TRUE;
11908
11909 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11910 sec->output_offset, sec->size))
11911 return FALSE;
11912
11913 return TRUE;
11914 }
11915
11916 static bfd_boolean
11917 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11918 {
11919 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11920 asection *sec, *osec;
11921
11922 if (globals == NULL)
11923 return FALSE;
11924
11925 /* Invoke the regular ELF backend linker to do all the work. */
11926 if (!bfd_elf_final_link (abfd, info))
11927 return FALSE;
11928
11929 /* Process stub sections (eg BE8 encoding, ...). */
11930 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11931 unsigned int i;
11932 for (i=0; i<htab->top_id; i++)
11933 {
11934 sec = htab->stub_group[i].stub_sec;
11935 /* Only process it once, in its link_sec slot. */
11936 if (sec && i == htab->stub_group[i].link_sec->id)
11937 {
11938 osec = sec->output_section;
11939 elf32_arm_write_section (abfd, info, sec, sec->contents);
11940 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11941 sec->output_offset, sec->size))
11942 return FALSE;
11943 }
11944 }
11945
11946 /* Write out any glue sections now that we have created all the
11947 stubs. */
11948 if (globals->bfd_of_glue_owner != NULL)
11949 {
11950 if (! elf32_arm_output_glue_section (info, abfd,
11951 globals->bfd_of_glue_owner,
11952 ARM2THUMB_GLUE_SECTION_NAME))
11953 return FALSE;
11954
11955 if (! elf32_arm_output_glue_section (info, abfd,
11956 globals->bfd_of_glue_owner,
11957 THUMB2ARM_GLUE_SECTION_NAME))
11958 return FALSE;
11959
11960 if (! elf32_arm_output_glue_section (info, abfd,
11961 globals->bfd_of_glue_owner,
11962 VFP11_ERRATUM_VENEER_SECTION_NAME))
11963 return FALSE;
11964
11965 if (! elf32_arm_output_glue_section (info, abfd,
11966 globals->bfd_of_glue_owner,
11967 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
11968 return FALSE;
11969
11970 if (! elf32_arm_output_glue_section (info, abfd,
11971 globals->bfd_of_glue_owner,
11972 ARM_BX_GLUE_SECTION_NAME))
11973 return FALSE;
11974 }
11975
11976 return TRUE;
11977 }
11978
11979 /* Return a best guess for the machine number based on the attributes. */
11980
11981 static unsigned int
11982 bfd_arm_get_mach_from_attributes (bfd * abfd)
11983 {
11984 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11985
11986 switch (arch)
11987 {
11988 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11989 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11990 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11991
11992 case TAG_CPU_ARCH_V5TE:
11993 {
11994 char * name;
11995
11996 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11997 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11998
11999 if (name)
12000 {
12001 if (strcmp (name, "IWMMXT2") == 0)
12002 return bfd_mach_arm_iWMMXt2;
12003
12004 if (strcmp (name, "IWMMXT") == 0)
12005 return bfd_mach_arm_iWMMXt;
12006
12007 if (strcmp (name, "XSCALE") == 0)
12008 {
12009 int wmmx;
12010
12011 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12012 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12013 switch (wmmx)
12014 {
12015 case 1: return bfd_mach_arm_iWMMXt;
12016 case 2: return bfd_mach_arm_iWMMXt2;
12017 default: return bfd_mach_arm_XScale;
12018 }
12019 }
12020 }
12021
12022 return bfd_mach_arm_5TE;
12023 }
12024
12025 default:
12026 return bfd_mach_arm_unknown;
12027 }
12028 }
12029
12030 /* Set the right machine number. */
12031
12032 static bfd_boolean
12033 elf32_arm_object_p (bfd *abfd)
12034 {
12035 unsigned int mach;
12036
12037 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12038
12039 if (mach == bfd_mach_arm_unknown)
12040 {
12041 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12042 mach = bfd_mach_arm_ep9312;
12043 else
12044 mach = bfd_arm_get_mach_from_attributes (abfd);
12045 }
12046
12047 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12048 return TRUE;
12049 }
12050
12051 /* Function to keep ARM specific flags in the ELF header. */
12052
12053 static bfd_boolean
12054 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
12055 {
12056 if (elf_flags_init (abfd)
12057 && elf_elfheader (abfd)->e_flags != flags)
12058 {
12059 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
12060 {
12061 if (flags & EF_ARM_INTERWORK)
12062 (*_bfd_error_handler)
12063 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
12064 abfd);
12065 else
12066 _bfd_error_handler
12067 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12068 abfd);
12069 }
12070 }
12071 else
12072 {
12073 elf_elfheader (abfd)->e_flags = flags;
12074 elf_flags_init (abfd) = TRUE;
12075 }
12076
12077 return TRUE;
12078 }
12079
12080 /* Copy backend specific data from one object module to another. */
12081
12082 static bfd_boolean
12083 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
12084 {
12085 flagword in_flags;
12086 flagword out_flags;
12087
12088 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
12089 return TRUE;
12090
12091 in_flags = elf_elfheader (ibfd)->e_flags;
12092 out_flags = elf_elfheader (obfd)->e_flags;
12093
12094 if (elf_flags_init (obfd)
12095 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
12096 && in_flags != out_flags)
12097 {
12098 /* Cannot mix APCS26 and APCS32 code. */
12099 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
12100 return FALSE;
12101
12102 /* Cannot mix float APCS and non-float APCS code. */
12103 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
12104 return FALSE;
12105
12106 /* If the src and dest have different interworking flags
12107 then turn off the interworking bit. */
12108 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
12109 {
12110 if (out_flags & EF_ARM_INTERWORK)
12111 _bfd_error_handler
12112 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12113 obfd, ibfd);
12114
12115 in_flags &= ~EF_ARM_INTERWORK;
12116 }
12117
12118 /* Likewise for PIC, though don't warn for this case. */
12119 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
12120 in_flags &= ~EF_ARM_PIC;
12121 }
12122
12123 elf_elfheader (obfd)->e_flags = in_flags;
12124 elf_flags_init (obfd) = TRUE;
12125
12126 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
12127 }
12128
12129 /* Values for Tag_ABI_PCS_R9_use. */
12130 enum
12131 {
12132 AEABI_R9_V6,
12133 AEABI_R9_SB,
12134 AEABI_R9_TLS,
12135 AEABI_R9_unused
12136 };
12137
12138 /* Values for Tag_ABI_PCS_RW_data. */
12139 enum
12140 {
12141 AEABI_PCS_RW_data_absolute,
12142 AEABI_PCS_RW_data_PCrel,
12143 AEABI_PCS_RW_data_SBrel,
12144 AEABI_PCS_RW_data_unused
12145 };
12146
12147 /* Values for Tag_ABI_enum_size. */
12148 enum
12149 {
12150 AEABI_enum_unused,
12151 AEABI_enum_short,
12152 AEABI_enum_wide,
12153 AEABI_enum_forced_wide
12154 };
12155
12156 /* Determine whether an object attribute tag takes an integer, a
12157 string or both. */
12158
12159 static int
12160 elf32_arm_obj_attrs_arg_type (int tag)
12161 {
12162 if (tag == Tag_compatibility)
12163 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
12164 else if (tag == Tag_nodefaults)
12165 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
12166 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
12167 return ATTR_TYPE_FLAG_STR_VAL;
12168 else if (tag < 32)
12169 return ATTR_TYPE_FLAG_INT_VAL;
12170 else
12171 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
12172 }
12173
12174 /* The ABI defines that Tag_conformance should be emitted first, and that
12175 Tag_nodefaults should be second (if either is defined). This sets those
12176 two positions, and bumps up the position of all the remaining tags to
12177 compensate. */
12178 static int
12179 elf32_arm_obj_attrs_order (int num)
12180 {
12181 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
12182 return Tag_conformance;
12183 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
12184 return Tag_nodefaults;
12185 if ((num - 2) < Tag_nodefaults)
12186 return num - 2;
12187 if ((num - 1) < Tag_conformance)
12188 return num - 1;
12189 return num;
12190 }
12191
12192 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12193 static bfd_boolean
12194 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
12195 {
12196 if ((tag & 127) < 64)
12197 {
12198 _bfd_error_handler
12199 (_("%B: Unknown mandatory EABI object attribute %d"),
12200 abfd, tag);
12201 bfd_set_error (bfd_error_bad_value);
12202 return FALSE;
12203 }
12204 else
12205 {
12206 _bfd_error_handler
12207 (_("Warning: %B: Unknown EABI object attribute %d"),
12208 abfd, tag);
12209 return TRUE;
12210 }
12211 }
12212
12213 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12214 Returns -1 if no architecture could be read. */
12215
12216 static int
12217 get_secondary_compatible_arch (bfd *abfd)
12218 {
12219 obj_attribute *attr =
12220 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12221
12222 /* Note: the tag and its argument below are uleb128 values, though
12223 currently-defined values fit in one byte for each. */
12224 if (attr->s
12225 && attr->s[0] == Tag_CPU_arch
12226 && (attr->s[1] & 128) != 128
12227 && attr->s[2] == 0)
12228 return attr->s[1];
12229
12230 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12231 return -1;
12232 }
12233
12234 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12235 The tag is removed if ARCH is -1. */
12236
12237 static void
12238 set_secondary_compatible_arch (bfd *abfd, int arch)
12239 {
12240 obj_attribute *attr =
12241 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12242
12243 if (arch == -1)
12244 {
12245 attr->s = NULL;
12246 return;
12247 }
12248
12249 /* Note: the tag and its argument below are uleb128 values, though
12250 currently-defined values fit in one byte for each. */
12251 if (!attr->s)
12252 attr->s = (char *) bfd_alloc (abfd, 3);
12253 attr->s[0] = Tag_CPU_arch;
12254 attr->s[1] = arch;
12255 attr->s[2] = '\0';
12256 }
12257
12258 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12259 into account. */
12260
12261 static int
12262 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
12263 int newtag, int secondary_compat)
12264 {
12265 #define T(X) TAG_CPU_ARCH_##X
12266 int tagl, tagh, result;
12267 const int v6t2[] =
12268 {
12269 T(V6T2), /* PRE_V4. */
12270 T(V6T2), /* V4. */
12271 T(V6T2), /* V4T. */
12272 T(V6T2), /* V5T. */
12273 T(V6T2), /* V5TE. */
12274 T(V6T2), /* V5TEJ. */
12275 T(V6T2), /* V6. */
12276 T(V7), /* V6KZ. */
12277 T(V6T2) /* V6T2. */
12278 };
12279 const int v6k[] =
12280 {
12281 T(V6K), /* PRE_V4. */
12282 T(V6K), /* V4. */
12283 T(V6K), /* V4T. */
12284 T(V6K), /* V5T. */
12285 T(V6K), /* V5TE. */
12286 T(V6K), /* V5TEJ. */
12287 T(V6K), /* V6. */
12288 T(V6KZ), /* V6KZ. */
12289 T(V7), /* V6T2. */
12290 T(V6K) /* V6K. */
12291 };
12292 const int v7[] =
12293 {
12294 T(V7), /* PRE_V4. */
12295 T(V7), /* V4. */
12296 T(V7), /* V4T. */
12297 T(V7), /* V5T. */
12298 T(V7), /* V5TE. */
12299 T(V7), /* V5TEJ. */
12300 T(V7), /* V6. */
12301 T(V7), /* V6KZ. */
12302 T(V7), /* V6T2. */
12303 T(V7), /* V6K. */
12304 T(V7) /* V7. */
12305 };
12306 const int v6_m[] =
12307 {
12308 -1, /* PRE_V4. */
12309 -1, /* V4. */
12310 T(V6K), /* V4T. */
12311 T(V6K), /* V5T. */
12312 T(V6K), /* V5TE. */
12313 T(V6K), /* V5TEJ. */
12314 T(V6K), /* V6. */
12315 T(V6KZ), /* V6KZ. */
12316 T(V7), /* V6T2. */
12317 T(V6K), /* V6K. */
12318 T(V7), /* V7. */
12319 T(V6_M) /* V6_M. */
12320 };
12321 const int v6s_m[] =
12322 {
12323 -1, /* PRE_V4. */
12324 -1, /* V4. */
12325 T(V6K), /* V4T. */
12326 T(V6K), /* V5T. */
12327 T(V6K), /* V5TE. */
12328 T(V6K), /* V5TEJ. */
12329 T(V6K), /* V6. */
12330 T(V6KZ), /* V6KZ. */
12331 T(V7), /* V6T2. */
12332 T(V6K), /* V6K. */
12333 T(V7), /* V7. */
12334 T(V6S_M), /* V6_M. */
12335 T(V6S_M) /* V6S_M. */
12336 };
12337 const int v7e_m[] =
12338 {
12339 -1, /* PRE_V4. */
12340 -1, /* V4. */
12341 T(V7E_M), /* V4T. */
12342 T(V7E_M), /* V5T. */
12343 T(V7E_M), /* V5TE. */
12344 T(V7E_M), /* V5TEJ. */
12345 T(V7E_M), /* V6. */
12346 T(V7E_M), /* V6KZ. */
12347 T(V7E_M), /* V6T2. */
12348 T(V7E_M), /* V6K. */
12349 T(V7E_M), /* V7. */
12350 T(V7E_M), /* V6_M. */
12351 T(V7E_M), /* V6S_M. */
12352 T(V7E_M) /* V7E_M. */
12353 };
12354 const int v8[] =
12355 {
12356 T(V8), /* PRE_V4. */
12357 T(V8), /* V4. */
12358 T(V8), /* V4T. */
12359 T(V8), /* V5T. */
12360 T(V8), /* V5TE. */
12361 T(V8), /* V5TEJ. */
12362 T(V8), /* V6. */
12363 T(V8), /* V6KZ. */
12364 T(V8), /* V6T2. */
12365 T(V8), /* V6K. */
12366 T(V8), /* V7. */
12367 T(V8), /* V6_M. */
12368 T(V8), /* V6S_M. */
12369 T(V8), /* V7E_M. */
12370 T(V8) /* V8. */
12371 };
12372 const int v8m_baseline[] =
12373 {
12374 -1, /* PRE_V4. */
12375 -1, /* V4. */
12376 -1, /* V4T. */
12377 -1, /* V5T. */
12378 -1, /* V5TE. */
12379 -1, /* V5TEJ. */
12380 -1, /* V6. */
12381 -1, /* V6KZ. */
12382 -1, /* V6T2. */
12383 -1, /* V6K. */
12384 -1, /* V7. */
12385 T(V8M_BASE), /* V6_M. */
12386 T(V8M_BASE), /* V6S_M. */
12387 -1, /* V7E_M. */
12388 -1, /* V8. */
12389 -1,
12390 T(V8M_BASE) /* V8-M BASELINE. */
12391 };
12392 const int v8m_mainline[] =
12393 {
12394 -1, /* PRE_V4. */
12395 -1, /* V4. */
12396 -1, /* V4T. */
12397 -1, /* V5T. */
12398 -1, /* V5TE. */
12399 -1, /* V5TEJ. */
12400 -1, /* V6. */
12401 -1, /* V6KZ. */
12402 -1, /* V6T2. */
12403 -1, /* V6K. */
12404 T(V8M_MAIN), /* V7. */
12405 T(V8M_MAIN), /* V6_M. */
12406 T(V8M_MAIN), /* V6S_M. */
12407 T(V8M_MAIN), /* V7E_M. */
12408 -1, /* V8. */
12409 -1,
12410 T(V8M_MAIN), /* V8-M BASELINE. */
12411 T(V8M_MAIN) /* V8-M MAINLINE. */
12412 };
12413 const int v4t_plus_v6_m[] =
12414 {
12415 -1, /* PRE_V4. */
12416 -1, /* V4. */
12417 T(V4T), /* V4T. */
12418 T(V5T), /* V5T. */
12419 T(V5TE), /* V5TE. */
12420 T(V5TEJ), /* V5TEJ. */
12421 T(V6), /* V6. */
12422 T(V6KZ), /* V6KZ. */
12423 T(V6T2), /* V6T2. */
12424 T(V6K), /* V6K. */
12425 T(V7), /* V7. */
12426 T(V6_M), /* V6_M. */
12427 T(V6S_M), /* V6S_M. */
12428 T(V7E_M), /* V7E_M. */
12429 T(V8), /* V8. */
12430 -1, /* Unused. */
12431 T(V8M_BASE), /* V8-M BASELINE. */
12432 T(V8M_MAIN), /* V8-M MAINLINE. */
12433 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
12434 };
12435 const int *comb[] =
12436 {
12437 v6t2,
12438 v6k,
12439 v7,
12440 v6_m,
12441 v6s_m,
12442 v7e_m,
12443 v8,
12444 NULL,
12445 v8m_baseline,
12446 v8m_mainline,
12447 /* Pseudo-architecture. */
12448 v4t_plus_v6_m
12449 };
12450
12451 /* Check we've not got a higher architecture than we know about. */
12452
12453 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
12454 {
12455 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
12456 return -1;
12457 }
12458
12459 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12460
12461 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
12462 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
12463 oldtag = T(V4T_PLUS_V6_M);
12464
12465 /* And override the new tag if we have a Tag_also_compatible_with on the
12466 input. */
12467
12468 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
12469 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
12470 newtag = T(V4T_PLUS_V6_M);
12471
12472 tagl = (oldtag < newtag) ? oldtag : newtag;
12473 result = tagh = (oldtag > newtag) ? oldtag : newtag;
12474
12475 /* Architectures before V6KZ add features monotonically. */
12476 if (tagh <= TAG_CPU_ARCH_V6KZ)
12477 return result;
12478
12479 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
12480
12481 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12482 as the canonical version. */
12483 if (result == T(V4T_PLUS_V6_M))
12484 {
12485 result = T(V4T);
12486 *secondary_compat_out = T(V6_M);
12487 }
12488 else
12489 *secondary_compat_out = -1;
12490
12491 if (result == -1)
12492 {
12493 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12494 ibfd, oldtag, newtag);
12495 return -1;
12496 }
12497
12498 return result;
12499 #undef T
12500 }
12501
12502 /* Query attributes object to see if integer divide instructions may be
12503 present in an object. */
12504 static bfd_boolean
12505 elf32_arm_attributes_accept_div (const obj_attribute *attr)
12506 {
12507 int arch = attr[Tag_CPU_arch].i;
12508 int profile = attr[Tag_CPU_arch_profile].i;
12509
12510 switch (attr[Tag_DIV_use].i)
12511 {
12512 case 0:
12513 /* Integer divide allowed if instruction contained in archetecture. */
12514 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
12515 return TRUE;
12516 else if (arch >= TAG_CPU_ARCH_V7E_M)
12517 return TRUE;
12518 else
12519 return FALSE;
12520
12521 case 1:
12522 /* Integer divide explicitly prohibited. */
12523 return FALSE;
12524
12525 default:
12526 /* Unrecognised case - treat as allowing divide everywhere. */
12527 case 2:
12528 /* Integer divide allowed in ARM state. */
12529 return TRUE;
12530 }
12531 }
12532
12533 /* Query attributes object to see if integer divide instructions are
12534 forbidden to be in the object. This is not the inverse of
12535 elf32_arm_attributes_accept_div. */
12536 static bfd_boolean
12537 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
12538 {
12539 return attr[Tag_DIV_use].i == 1;
12540 }
12541
12542 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12543 are conflicting attributes. */
12544
12545 static bfd_boolean
12546 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
12547 {
12548 obj_attribute *in_attr;
12549 obj_attribute *out_attr;
12550 /* Some tags have 0 = don't care, 1 = strong requirement,
12551 2 = weak requirement. */
12552 static const int order_021[3] = {0, 2, 1};
12553 int i;
12554 bfd_boolean result = TRUE;
12555 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
12556
12557 /* Skip the linker stubs file. This preserves previous behavior
12558 of accepting unknown attributes in the first input file - but
12559 is that a bug? */
12560 if (ibfd->flags & BFD_LINKER_CREATED)
12561 return TRUE;
12562
12563 /* Skip any input that hasn't attribute section.
12564 This enables to link object files without attribute section with
12565 any others. */
12566 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
12567 return TRUE;
12568
12569 if (!elf_known_obj_attributes_proc (obfd)[0].i)
12570 {
12571 /* This is the first object. Copy the attributes. */
12572 _bfd_elf_copy_obj_attributes (ibfd, obfd);
12573
12574 out_attr = elf_known_obj_attributes_proc (obfd);
12575
12576 /* Use the Tag_null value to indicate the attributes have been
12577 initialized. */
12578 out_attr[0].i = 1;
12579
12580 /* We do not output objects with Tag_MPextension_use_legacy - we move
12581 the attribute's value to Tag_MPextension_use. */
12582 if (out_attr[Tag_MPextension_use_legacy].i != 0)
12583 {
12584 if (out_attr[Tag_MPextension_use].i != 0
12585 && out_attr[Tag_MPextension_use_legacy].i
12586 != out_attr[Tag_MPextension_use].i)
12587 {
12588 _bfd_error_handler
12589 (_("Error: %B has both the current and legacy "
12590 "Tag_MPextension_use attributes"), ibfd);
12591 result = FALSE;
12592 }
12593
12594 out_attr[Tag_MPextension_use] =
12595 out_attr[Tag_MPextension_use_legacy];
12596 out_attr[Tag_MPextension_use_legacy].type = 0;
12597 out_attr[Tag_MPextension_use_legacy].i = 0;
12598 }
12599
12600 return result;
12601 }
12602
12603 in_attr = elf_known_obj_attributes_proc (ibfd);
12604 out_attr = elf_known_obj_attributes_proc (obfd);
12605 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12606 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
12607 {
12608 /* Ignore mismatches if the object doesn't use floating point or is
12609 floating point ABI independent. */
12610 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
12611 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12612 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
12613 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
12614 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12615 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
12616 {
12617 _bfd_error_handler
12618 (_("error: %B uses VFP register arguments, %B does not"),
12619 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
12620 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
12621 result = FALSE;
12622 }
12623 }
12624
12625 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
12626 {
12627 /* Merge this attribute with existing attributes. */
12628 switch (i)
12629 {
12630 case Tag_CPU_raw_name:
12631 case Tag_CPU_name:
12632 /* These are merged after Tag_CPU_arch. */
12633 break;
12634
12635 case Tag_ABI_optimization_goals:
12636 case Tag_ABI_FP_optimization_goals:
12637 /* Use the first value seen. */
12638 break;
12639
12640 case Tag_CPU_arch:
12641 {
12642 int secondary_compat = -1, secondary_compat_out = -1;
12643 unsigned int saved_out_attr = out_attr[i].i;
12644 int arch_attr;
12645 static const char *name_table[] =
12646 {
12647 /* These aren't real CPU names, but we can't guess
12648 that from the architecture version alone. */
12649 "Pre v4",
12650 "ARM v4",
12651 "ARM v4T",
12652 "ARM v5T",
12653 "ARM v5TE",
12654 "ARM v5TEJ",
12655 "ARM v6",
12656 "ARM v6KZ",
12657 "ARM v6T2",
12658 "ARM v6K",
12659 "ARM v7",
12660 "ARM v6-M",
12661 "ARM v6S-M",
12662 "ARM v8",
12663 "",
12664 "ARM v8-M.baseline",
12665 "ARM v8-M.mainline",
12666 };
12667
12668 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12669 secondary_compat = get_secondary_compatible_arch (ibfd);
12670 secondary_compat_out = get_secondary_compatible_arch (obfd);
12671 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
12672 &secondary_compat_out,
12673 in_attr[i].i,
12674 secondary_compat);
12675
12676 /* Return with error if failed to merge. */
12677 if (arch_attr == -1)
12678 return FALSE;
12679
12680 out_attr[i].i = arch_attr;
12681
12682 set_secondary_compatible_arch (obfd, secondary_compat_out);
12683
12684 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12685 if (out_attr[i].i == saved_out_attr)
12686 ; /* Leave the names alone. */
12687 else if (out_attr[i].i == in_attr[i].i)
12688 {
12689 /* The output architecture has been changed to match the
12690 input architecture. Use the input names. */
12691 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
12692 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
12693 : NULL;
12694 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
12695 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
12696 : NULL;
12697 }
12698 else
12699 {
12700 out_attr[Tag_CPU_name].s = NULL;
12701 out_attr[Tag_CPU_raw_name].s = NULL;
12702 }
12703
12704 /* If we still don't have a value for Tag_CPU_name,
12705 make one up now. Tag_CPU_raw_name remains blank. */
12706 if (out_attr[Tag_CPU_name].s == NULL
12707 && out_attr[i].i < ARRAY_SIZE (name_table))
12708 out_attr[Tag_CPU_name].s =
12709 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
12710 }
12711 break;
12712
12713 case Tag_ARM_ISA_use:
12714 case Tag_THUMB_ISA_use:
12715 case Tag_WMMX_arch:
12716 case Tag_Advanced_SIMD_arch:
12717 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12718 case Tag_ABI_FP_rounding:
12719 case Tag_ABI_FP_exceptions:
12720 case Tag_ABI_FP_user_exceptions:
12721 case Tag_ABI_FP_number_model:
12722 case Tag_FP_HP_extension:
12723 case Tag_CPU_unaligned_access:
12724 case Tag_T2EE_use:
12725 case Tag_MPextension_use:
12726 /* Use the largest value specified. */
12727 if (in_attr[i].i > out_attr[i].i)
12728 out_attr[i].i = in_attr[i].i;
12729 break;
12730
12731 case Tag_ABI_align_preserved:
12732 case Tag_ABI_PCS_RO_data:
12733 /* Use the smallest value specified. */
12734 if (in_attr[i].i < out_attr[i].i)
12735 out_attr[i].i = in_attr[i].i;
12736 break;
12737
12738 case Tag_ABI_align_needed:
12739 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
12740 && (in_attr[Tag_ABI_align_preserved].i == 0
12741 || out_attr[Tag_ABI_align_preserved].i == 0))
12742 {
12743 /* This error message should be enabled once all non-conformant
12744 binaries in the toolchain have had the attributes set
12745 properly.
12746 _bfd_error_handler
12747 (_("error: %B: 8-byte data alignment conflicts with %B"),
12748 obfd, ibfd);
12749 result = FALSE; */
12750 }
12751 /* Fall through. */
12752 case Tag_ABI_FP_denormal:
12753 case Tag_ABI_PCS_GOT_use:
12754 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12755 value if greater than 2 (for future-proofing). */
12756 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
12757 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
12758 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
12759 out_attr[i].i = in_attr[i].i;
12760 break;
12761
12762 case Tag_Virtualization_use:
12763 /* The virtualization tag effectively stores two bits of
12764 information: the intended use of TrustZone (in bit 0), and the
12765 intended use of Virtualization (in bit 1). */
12766 if (out_attr[i].i == 0)
12767 out_attr[i].i = in_attr[i].i;
12768 else if (in_attr[i].i != 0
12769 && in_attr[i].i != out_attr[i].i)
12770 {
12771 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
12772 out_attr[i].i = 3;
12773 else
12774 {
12775 _bfd_error_handler
12776 (_("error: %B: unable to merge virtualization attributes "
12777 "with %B"),
12778 obfd, ibfd);
12779 result = FALSE;
12780 }
12781 }
12782 break;
12783
12784 case Tag_CPU_arch_profile:
12785 if (out_attr[i].i != in_attr[i].i)
12786 {
12787 /* 0 will merge with anything.
12788 'A' and 'S' merge to 'A'.
12789 'R' and 'S' merge to 'R'.
12790 'M' and 'A|R|S' is an error. */
12791 if (out_attr[i].i == 0
12792 || (out_attr[i].i == 'S'
12793 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
12794 out_attr[i].i = in_attr[i].i;
12795 else if (in_attr[i].i == 0
12796 || (in_attr[i].i == 'S'
12797 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
12798 ; /* Do nothing. */
12799 else
12800 {
12801 _bfd_error_handler
12802 (_("error: %B: Conflicting architecture profiles %c/%c"),
12803 ibfd,
12804 in_attr[i].i ? in_attr[i].i : '0',
12805 out_attr[i].i ? out_attr[i].i : '0');
12806 result = FALSE;
12807 }
12808 }
12809 break;
12810
12811 case Tag_DSP_extension:
12812 /* No need to change output value if any of:
12813 - pre (<=) ARMv5T input architecture (do not have DSP)
12814 - M input profile not ARMv7E-M and do not have DSP. */
12815 if (in_attr[Tag_CPU_arch].i <= 3
12816 || (in_attr[Tag_CPU_arch_profile].i == 'M'
12817 && in_attr[Tag_CPU_arch].i != 13
12818 && in_attr[i].i == 0))
12819 ; /* Do nothing. */
12820 /* Output value should be 0 if DSP part of architecture, ie.
12821 - post (>=) ARMv5te architecture output
12822 - A, R or S profile output or ARMv7E-M output architecture. */
12823 else if (out_attr[Tag_CPU_arch].i >= 4
12824 && (out_attr[Tag_CPU_arch_profile].i == 'A'
12825 || out_attr[Tag_CPU_arch_profile].i == 'R'
12826 || out_attr[Tag_CPU_arch_profile].i == 'S'
12827 || out_attr[Tag_CPU_arch].i == 13))
12828 out_attr[i].i = 0;
12829 /* Otherwise, DSP instructions are added and not part of output
12830 architecture. */
12831 else
12832 out_attr[i].i = 1;
12833 break;
12834
12835 case Tag_FP_arch:
12836 {
12837 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12838 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12839 when it's 0. It might mean absence of FP hardware if
12840 Tag_FP_arch is zero. */
12841
12842 #define VFP_VERSION_COUNT 9
12843 static const struct
12844 {
12845 int ver;
12846 int regs;
12847 } vfp_versions[VFP_VERSION_COUNT] =
12848 {
12849 {0, 0},
12850 {1, 16},
12851 {2, 16},
12852 {3, 32},
12853 {3, 16},
12854 {4, 32},
12855 {4, 16},
12856 {8, 32},
12857 {8, 16}
12858 };
12859 int ver;
12860 int regs;
12861 int newval;
12862
12863 /* If the output has no requirement about FP hardware,
12864 follow the requirement of the input. */
12865 if (out_attr[i].i == 0)
12866 {
12867 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
12868 out_attr[i].i = in_attr[i].i;
12869 out_attr[Tag_ABI_HardFP_use].i
12870 = in_attr[Tag_ABI_HardFP_use].i;
12871 break;
12872 }
12873 /* If the input has no requirement about FP hardware, do
12874 nothing. */
12875 else if (in_attr[i].i == 0)
12876 {
12877 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
12878 break;
12879 }
12880
12881 /* Both the input and the output have nonzero Tag_FP_arch.
12882 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12883
12884 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12885 do nothing. */
12886 if (in_attr[Tag_ABI_HardFP_use].i == 0
12887 && out_attr[Tag_ABI_HardFP_use].i == 0)
12888 ;
12889 /* If the input and the output have different Tag_ABI_HardFP_use,
12890 the combination of them is 0 (implied by Tag_FP_arch). */
12891 else if (in_attr[Tag_ABI_HardFP_use].i
12892 != out_attr[Tag_ABI_HardFP_use].i)
12893 out_attr[Tag_ABI_HardFP_use].i = 0;
12894
12895 /* Now we can handle Tag_FP_arch. */
12896
12897 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12898 pick the biggest. */
12899 if (in_attr[i].i >= VFP_VERSION_COUNT
12900 && in_attr[i].i > out_attr[i].i)
12901 {
12902 out_attr[i] = in_attr[i];
12903 break;
12904 }
12905 /* The output uses the superset of input features
12906 (ISA version) and registers. */
12907 ver = vfp_versions[in_attr[i].i].ver;
12908 if (ver < vfp_versions[out_attr[i].i].ver)
12909 ver = vfp_versions[out_attr[i].i].ver;
12910 regs = vfp_versions[in_attr[i].i].regs;
12911 if (regs < vfp_versions[out_attr[i].i].regs)
12912 regs = vfp_versions[out_attr[i].i].regs;
12913 /* This assumes all possible supersets are also a valid
12914 options. */
12915 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
12916 {
12917 if (regs == vfp_versions[newval].regs
12918 && ver == vfp_versions[newval].ver)
12919 break;
12920 }
12921 out_attr[i].i = newval;
12922 }
12923 break;
12924 case Tag_PCS_config:
12925 if (out_attr[i].i == 0)
12926 out_attr[i].i = in_attr[i].i;
12927 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
12928 {
12929 /* It's sometimes ok to mix different configs, so this is only
12930 a warning. */
12931 _bfd_error_handler
12932 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12933 }
12934 break;
12935 case Tag_ABI_PCS_R9_use:
12936 if (in_attr[i].i != out_attr[i].i
12937 && out_attr[i].i != AEABI_R9_unused
12938 && in_attr[i].i != AEABI_R9_unused)
12939 {
12940 _bfd_error_handler
12941 (_("error: %B: Conflicting use of R9"), ibfd);
12942 result = FALSE;
12943 }
12944 if (out_attr[i].i == AEABI_R9_unused)
12945 out_attr[i].i = in_attr[i].i;
12946 break;
12947 case Tag_ABI_PCS_RW_data:
12948 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12949 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12950 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12951 {
12952 _bfd_error_handler
12953 (_("error: %B: SB relative addressing conflicts with use of R9"),
12954 ibfd);
12955 result = FALSE;
12956 }
12957 /* Use the smallest value specified. */
12958 if (in_attr[i].i < out_attr[i].i)
12959 out_attr[i].i = in_attr[i].i;
12960 break;
12961 case Tag_ABI_PCS_wchar_t:
12962 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12963 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12964 {
12965 _bfd_error_handler
12966 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12967 ibfd, in_attr[i].i, out_attr[i].i);
12968 }
12969 else if (in_attr[i].i && !out_attr[i].i)
12970 out_attr[i].i = in_attr[i].i;
12971 break;
12972 case Tag_ABI_enum_size:
12973 if (in_attr[i].i != AEABI_enum_unused)
12974 {
12975 if (out_attr[i].i == AEABI_enum_unused
12976 || out_attr[i].i == AEABI_enum_forced_wide)
12977 {
12978 /* The existing object is compatible with anything.
12979 Use whatever requirements the new object has. */
12980 out_attr[i].i = in_attr[i].i;
12981 }
12982 else if (in_attr[i].i != AEABI_enum_forced_wide
12983 && out_attr[i].i != in_attr[i].i
12984 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12985 {
12986 static const char *aeabi_enum_names[] =
12987 { "", "variable-size", "32-bit", "" };
12988 const char *in_name =
12989 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12990 ? aeabi_enum_names[in_attr[i].i]
12991 : "<unknown>";
12992 const char *out_name =
12993 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12994 ? aeabi_enum_names[out_attr[i].i]
12995 : "<unknown>";
12996 _bfd_error_handler
12997 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12998 ibfd, in_name, out_name);
12999 }
13000 }
13001 break;
13002 case Tag_ABI_VFP_args:
13003 /* Aready done. */
13004 break;
13005 case Tag_ABI_WMMX_args:
13006 if (in_attr[i].i != out_attr[i].i)
13007 {
13008 _bfd_error_handler
13009 (_("error: %B uses iWMMXt register arguments, %B does not"),
13010 ibfd, obfd);
13011 result = FALSE;
13012 }
13013 break;
13014 case Tag_compatibility:
13015 /* Merged in target-independent code. */
13016 break;
13017 case Tag_ABI_HardFP_use:
13018 /* This is handled along with Tag_FP_arch. */
13019 break;
13020 case Tag_ABI_FP_16bit_format:
13021 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13022 {
13023 if (in_attr[i].i != out_attr[i].i)
13024 {
13025 _bfd_error_handler
13026 (_("error: fp16 format mismatch between %B and %B"),
13027 ibfd, obfd);
13028 result = FALSE;
13029 }
13030 }
13031 if (in_attr[i].i != 0)
13032 out_attr[i].i = in_attr[i].i;
13033 break;
13034
13035 case Tag_DIV_use:
13036 /* A value of zero on input means that the divide instruction may
13037 be used if available in the base architecture as specified via
13038 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13039 the user did not want divide instructions. A value of 2
13040 explicitly means that divide instructions were allowed in ARM
13041 and Thumb state. */
13042 if (in_attr[i].i == out_attr[i].i)
13043 /* Do nothing. */ ;
13044 else if (elf32_arm_attributes_forbid_div (in_attr)
13045 && !elf32_arm_attributes_accept_div (out_attr))
13046 out_attr[i].i = 1;
13047 else if (elf32_arm_attributes_forbid_div (out_attr)
13048 && elf32_arm_attributes_accept_div (in_attr))
13049 out_attr[i].i = in_attr[i].i;
13050 else if (in_attr[i].i == 2)
13051 out_attr[i].i = in_attr[i].i;
13052 break;
13053
13054 case Tag_MPextension_use_legacy:
13055 /* We don't output objects with Tag_MPextension_use_legacy - we
13056 move the value to Tag_MPextension_use. */
13057 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
13058 {
13059 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
13060 {
13061 _bfd_error_handler
13062 (_("%B has has both the current and legacy "
13063 "Tag_MPextension_use attributes"),
13064 ibfd);
13065 result = FALSE;
13066 }
13067 }
13068
13069 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
13070 out_attr[Tag_MPextension_use] = in_attr[i];
13071
13072 break;
13073
13074 case Tag_nodefaults:
13075 /* This tag is set if it exists, but the value is unused (and is
13076 typically zero). We don't actually need to do anything here -
13077 the merge happens automatically when the type flags are merged
13078 below. */
13079 break;
13080 case Tag_also_compatible_with:
13081 /* Already done in Tag_CPU_arch. */
13082 break;
13083 case Tag_conformance:
13084 /* Keep the attribute if it matches. Throw it away otherwise.
13085 No attribute means no claim to conform. */
13086 if (!in_attr[i].s || !out_attr[i].s
13087 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
13088 out_attr[i].s = NULL;
13089 break;
13090
13091 default:
13092 result
13093 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
13094 }
13095
13096 /* If out_attr was copied from in_attr then it won't have a type yet. */
13097 if (in_attr[i].type && !out_attr[i].type)
13098 out_attr[i].type = in_attr[i].type;
13099 }
13100
13101 /* Merge Tag_compatibility attributes and any common GNU ones. */
13102 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
13103 return FALSE;
13104
13105 /* Check for any attributes not known on ARM. */
13106 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
13107
13108 return result;
13109 }
13110
13111
13112 /* Return TRUE if the two EABI versions are incompatible. */
13113
13114 static bfd_boolean
13115 elf32_arm_versions_compatible (unsigned iver, unsigned over)
13116 {
13117 /* v4 and v5 are the same spec before and after it was released,
13118 so allow mixing them. */
13119 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
13120 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
13121 return TRUE;
13122
13123 return (iver == over);
13124 }
13125
13126 /* Merge backend specific data from an object file to the output
13127 object file when linking. */
13128
13129 static bfd_boolean
13130 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
13131
13132 /* Display the flags field. */
13133
13134 static bfd_boolean
13135 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
13136 {
13137 FILE * file = (FILE *) ptr;
13138 unsigned long flags;
13139
13140 BFD_ASSERT (abfd != NULL && ptr != NULL);
13141
13142 /* Print normal ELF private data. */
13143 _bfd_elf_print_private_bfd_data (abfd, ptr);
13144
13145 flags = elf_elfheader (abfd)->e_flags;
13146 /* Ignore init flag - it may not be set, despite the flags field
13147 containing valid data. */
13148
13149 /* xgettext:c-format */
13150 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
13151
13152 switch (EF_ARM_EABI_VERSION (flags))
13153 {
13154 case EF_ARM_EABI_UNKNOWN:
13155 /* The following flag bits are GNU extensions and not part of the
13156 official ARM ELF extended ABI. Hence they are only decoded if
13157 the EABI version is not set. */
13158 if (flags & EF_ARM_INTERWORK)
13159 fprintf (file, _(" [interworking enabled]"));
13160
13161 if (flags & EF_ARM_APCS_26)
13162 fprintf (file, " [APCS-26]");
13163 else
13164 fprintf (file, " [APCS-32]");
13165
13166 if (flags & EF_ARM_VFP_FLOAT)
13167 fprintf (file, _(" [VFP float format]"));
13168 else if (flags & EF_ARM_MAVERICK_FLOAT)
13169 fprintf (file, _(" [Maverick float format]"));
13170 else
13171 fprintf (file, _(" [FPA float format]"));
13172
13173 if (flags & EF_ARM_APCS_FLOAT)
13174 fprintf (file, _(" [floats passed in float registers]"));
13175
13176 if (flags & EF_ARM_PIC)
13177 fprintf (file, _(" [position independent]"));
13178
13179 if (flags & EF_ARM_NEW_ABI)
13180 fprintf (file, _(" [new ABI]"));
13181
13182 if (flags & EF_ARM_OLD_ABI)
13183 fprintf (file, _(" [old ABI]"));
13184
13185 if (flags & EF_ARM_SOFT_FLOAT)
13186 fprintf (file, _(" [software FP]"));
13187
13188 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
13189 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
13190 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
13191 | EF_ARM_MAVERICK_FLOAT);
13192 break;
13193
13194 case EF_ARM_EABI_VER1:
13195 fprintf (file, _(" [Version1 EABI]"));
13196
13197 if (flags & EF_ARM_SYMSARESORTED)
13198 fprintf (file, _(" [sorted symbol table]"));
13199 else
13200 fprintf (file, _(" [unsorted symbol table]"));
13201
13202 flags &= ~ EF_ARM_SYMSARESORTED;
13203 break;
13204
13205 case EF_ARM_EABI_VER2:
13206 fprintf (file, _(" [Version2 EABI]"));
13207
13208 if (flags & EF_ARM_SYMSARESORTED)
13209 fprintf (file, _(" [sorted symbol table]"));
13210 else
13211 fprintf (file, _(" [unsorted symbol table]"));
13212
13213 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
13214 fprintf (file, _(" [dynamic symbols use segment index]"));
13215
13216 if (flags & EF_ARM_MAPSYMSFIRST)
13217 fprintf (file, _(" [mapping symbols precede others]"));
13218
13219 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
13220 | EF_ARM_MAPSYMSFIRST);
13221 break;
13222
13223 case EF_ARM_EABI_VER3:
13224 fprintf (file, _(" [Version3 EABI]"));
13225 break;
13226
13227 case EF_ARM_EABI_VER4:
13228 fprintf (file, _(" [Version4 EABI]"));
13229 goto eabi;
13230
13231 case EF_ARM_EABI_VER5:
13232 fprintf (file, _(" [Version5 EABI]"));
13233
13234 if (flags & EF_ARM_ABI_FLOAT_SOFT)
13235 fprintf (file, _(" [soft-float ABI]"));
13236
13237 if (flags & EF_ARM_ABI_FLOAT_HARD)
13238 fprintf (file, _(" [hard-float ABI]"));
13239
13240 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
13241
13242 eabi:
13243 if (flags & EF_ARM_BE8)
13244 fprintf (file, _(" [BE8]"));
13245
13246 if (flags & EF_ARM_LE8)
13247 fprintf (file, _(" [LE8]"));
13248
13249 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
13250 break;
13251
13252 default:
13253 fprintf (file, _(" <EABI version unrecognised>"));
13254 break;
13255 }
13256
13257 flags &= ~ EF_ARM_EABIMASK;
13258
13259 if (flags & EF_ARM_RELEXEC)
13260 fprintf (file, _(" [relocatable executable]"));
13261
13262 flags &= ~EF_ARM_RELEXEC;
13263
13264 if (flags)
13265 fprintf (file, _("<Unrecognised flag bits set>"));
13266
13267 fputc ('\n', file);
13268
13269 return TRUE;
13270 }
13271
13272 static int
13273 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
13274 {
13275 switch (ELF_ST_TYPE (elf_sym->st_info))
13276 {
13277 case STT_ARM_TFUNC:
13278 return ELF_ST_TYPE (elf_sym->st_info);
13279
13280 case STT_ARM_16BIT:
13281 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13282 This allows us to distinguish between data used by Thumb instructions
13283 and non-data (which is probably code) inside Thumb regions of an
13284 executable. */
13285 if (type != STT_OBJECT && type != STT_TLS)
13286 return ELF_ST_TYPE (elf_sym->st_info);
13287 break;
13288
13289 default:
13290 break;
13291 }
13292
13293 return type;
13294 }
13295
13296 static asection *
13297 elf32_arm_gc_mark_hook (asection *sec,
13298 struct bfd_link_info *info,
13299 Elf_Internal_Rela *rel,
13300 struct elf_link_hash_entry *h,
13301 Elf_Internal_Sym *sym)
13302 {
13303 if (h != NULL)
13304 switch (ELF32_R_TYPE (rel->r_info))
13305 {
13306 case R_ARM_GNU_VTINHERIT:
13307 case R_ARM_GNU_VTENTRY:
13308 return NULL;
13309 }
13310
13311 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
13312 }
13313
13314 /* Update the got entry reference counts for the section being removed. */
13315
13316 static bfd_boolean
13317 elf32_arm_gc_sweep_hook (bfd * abfd,
13318 struct bfd_link_info * info,
13319 asection * sec,
13320 const Elf_Internal_Rela * relocs)
13321 {
13322 Elf_Internal_Shdr *symtab_hdr;
13323 struct elf_link_hash_entry **sym_hashes;
13324 bfd_signed_vma *local_got_refcounts;
13325 const Elf_Internal_Rela *rel, *relend;
13326 struct elf32_arm_link_hash_table * globals;
13327
13328 if (bfd_link_relocatable (info))
13329 return TRUE;
13330
13331 globals = elf32_arm_hash_table (info);
13332 if (globals == NULL)
13333 return FALSE;
13334
13335 elf_section_data (sec)->local_dynrel = NULL;
13336
13337 symtab_hdr = & elf_symtab_hdr (abfd);
13338 sym_hashes = elf_sym_hashes (abfd);
13339 local_got_refcounts = elf_local_got_refcounts (abfd);
13340
13341 check_use_blx (globals);
13342
13343 relend = relocs + sec->reloc_count;
13344 for (rel = relocs; rel < relend; rel++)
13345 {
13346 unsigned long r_symndx;
13347 struct elf_link_hash_entry *h = NULL;
13348 struct elf32_arm_link_hash_entry *eh;
13349 int r_type;
13350 bfd_boolean call_reloc_p;
13351 bfd_boolean may_become_dynamic_p;
13352 bfd_boolean may_need_local_target_p;
13353 union gotplt_union *root_plt;
13354 struct arm_plt_info *arm_plt;
13355
13356 r_symndx = ELF32_R_SYM (rel->r_info);
13357 if (r_symndx >= symtab_hdr->sh_info)
13358 {
13359 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13360 while (h->root.type == bfd_link_hash_indirect
13361 || h->root.type == bfd_link_hash_warning)
13362 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13363 }
13364 eh = (struct elf32_arm_link_hash_entry *) h;
13365
13366 call_reloc_p = FALSE;
13367 may_become_dynamic_p = FALSE;
13368 may_need_local_target_p = FALSE;
13369
13370 r_type = ELF32_R_TYPE (rel->r_info);
13371 r_type = arm_real_reloc_type (globals, r_type);
13372 switch (r_type)
13373 {
13374 case R_ARM_GOT32:
13375 case R_ARM_GOT_PREL:
13376 case R_ARM_TLS_GD32:
13377 case R_ARM_TLS_IE32:
13378 if (h != NULL)
13379 {
13380 if (h->got.refcount > 0)
13381 h->got.refcount -= 1;
13382 }
13383 else if (local_got_refcounts != NULL)
13384 {
13385 if (local_got_refcounts[r_symndx] > 0)
13386 local_got_refcounts[r_symndx] -= 1;
13387 }
13388 break;
13389
13390 case R_ARM_TLS_LDM32:
13391 globals->tls_ldm_got.refcount -= 1;
13392 break;
13393
13394 case R_ARM_PC24:
13395 case R_ARM_PLT32:
13396 case R_ARM_CALL:
13397 case R_ARM_JUMP24:
13398 case R_ARM_PREL31:
13399 case R_ARM_THM_CALL:
13400 case R_ARM_THM_JUMP24:
13401 case R_ARM_THM_JUMP19:
13402 call_reloc_p = TRUE;
13403 may_need_local_target_p = TRUE;
13404 break;
13405
13406 case R_ARM_ABS12:
13407 if (!globals->vxworks_p)
13408 {
13409 may_need_local_target_p = TRUE;
13410 break;
13411 }
13412 /* Fall through. */
13413 case R_ARM_ABS32:
13414 case R_ARM_ABS32_NOI:
13415 case R_ARM_REL32:
13416 case R_ARM_REL32_NOI:
13417 case R_ARM_MOVW_ABS_NC:
13418 case R_ARM_MOVT_ABS:
13419 case R_ARM_MOVW_PREL_NC:
13420 case R_ARM_MOVT_PREL:
13421 case R_ARM_THM_MOVW_ABS_NC:
13422 case R_ARM_THM_MOVT_ABS:
13423 case R_ARM_THM_MOVW_PREL_NC:
13424 case R_ARM_THM_MOVT_PREL:
13425 /* Should the interworking branches be here also? */
13426 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
13427 && (sec->flags & SEC_ALLOC) != 0)
13428 {
13429 if (h == NULL
13430 && elf32_arm_howto_from_type (r_type)->pc_relative)
13431 {
13432 call_reloc_p = TRUE;
13433 may_need_local_target_p = TRUE;
13434 }
13435 else
13436 may_become_dynamic_p = TRUE;
13437 }
13438 else
13439 may_need_local_target_p = TRUE;
13440 break;
13441
13442 default:
13443 break;
13444 }
13445
13446 if (may_need_local_target_p
13447 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
13448 {
13449 /* If PLT refcount book-keeping is wrong and too low, we'll
13450 see a zero value (going to -1) for the root PLT reference
13451 count. */
13452 if (root_plt->refcount >= 0)
13453 {
13454 BFD_ASSERT (root_plt->refcount != 0);
13455 root_plt->refcount -= 1;
13456 }
13457 else
13458 /* A value of -1 means the symbol has become local, forced
13459 or seeing a hidden definition. Any other negative value
13460 is an error. */
13461 BFD_ASSERT (root_plt->refcount == -1);
13462
13463 if (!call_reloc_p)
13464 arm_plt->noncall_refcount--;
13465
13466 if (r_type == R_ARM_THM_CALL)
13467 arm_plt->maybe_thumb_refcount--;
13468
13469 if (r_type == R_ARM_THM_JUMP24
13470 || r_type == R_ARM_THM_JUMP19)
13471 arm_plt->thumb_refcount--;
13472 }
13473
13474 if (may_become_dynamic_p)
13475 {
13476 struct elf_dyn_relocs **pp;
13477 struct elf_dyn_relocs *p;
13478
13479 if (h != NULL)
13480 pp = &(eh->dyn_relocs);
13481 else
13482 {
13483 Elf_Internal_Sym *isym;
13484
13485 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
13486 abfd, r_symndx);
13487 if (isym == NULL)
13488 return FALSE;
13489 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13490 if (pp == NULL)
13491 return FALSE;
13492 }
13493 for (; (p = *pp) != NULL; pp = &p->next)
13494 if (p->sec == sec)
13495 {
13496 /* Everything must go for SEC. */
13497 *pp = p->next;
13498 break;
13499 }
13500 }
13501 }
13502
13503 return TRUE;
13504 }
13505
13506 /* Look through the relocs for a section during the first phase. */
13507
13508 static bfd_boolean
13509 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
13510 asection *sec, const Elf_Internal_Rela *relocs)
13511 {
13512 Elf_Internal_Shdr *symtab_hdr;
13513 struct elf_link_hash_entry **sym_hashes;
13514 const Elf_Internal_Rela *rel;
13515 const Elf_Internal_Rela *rel_end;
13516 bfd *dynobj;
13517 asection *sreloc;
13518 struct elf32_arm_link_hash_table *htab;
13519 bfd_boolean call_reloc_p;
13520 bfd_boolean may_become_dynamic_p;
13521 bfd_boolean may_need_local_target_p;
13522 unsigned long nsyms;
13523
13524 if (bfd_link_relocatable (info))
13525 return TRUE;
13526
13527 BFD_ASSERT (is_arm_elf (abfd));
13528
13529 htab = elf32_arm_hash_table (info);
13530 if (htab == NULL)
13531 return FALSE;
13532
13533 sreloc = NULL;
13534
13535 /* Create dynamic sections for relocatable executables so that we can
13536 copy relocations. */
13537 if (htab->root.is_relocatable_executable
13538 && ! htab->root.dynamic_sections_created)
13539 {
13540 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
13541 return FALSE;
13542 }
13543
13544 if (htab->root.dynobj == NULL)
13545 htab->root.dynobj = abfd;
13546 if (!create_ifunc_sections (info))
13547 return FALSE;
13548
13549 dynobj = htab->root.dynobj;
13550
13551 symtab_hdr = & elf_symtab_hdr (abfd);
13552 sym_hashes = elf_sym_hashes (abfd);
13553 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
13554
13555 rel_end = relocs + sec->reloc_count;
13556 for (rel = relocs; rel < rel_end; rel++)
13557 {
13558 Elf_Internal_Sym *isym;
13559 struct elf_link_hash_entry *h;
13560 struct elf32_arm_link_hash_entry *eh;
13561 unsigned long r_symndx;
13562 int r_type;
13563
13564 r_symndx = ELF32_R_SYM (rel->r_info);
13565 r_type = ELF32_R_TYPE (rel->r_info);
13566 r_type = arm_real_reloc_type (htab, r_type);
13567
13568 if (r_symndx >= nsyms
13569 /* PR 9934: It is possible to have relocations that do not
13570 refer to symbols, thus it is also possible to have an
13571 object file containing relocations but no symbol table. */
13572 && (r_symndx > STN_UNDEF || nsyms > 0))
13573 {
13574 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
13575 r_symndx);
13576 return FALSE;
13577 }
13578
13579 h = NULL;
13580 isym = NULL;
13581 if (nsyms > 0)
13582 {
13583 if (r_symndx < symtab_hdr->sh_info)
13584 {
13585 /* A local symbol. */
13586 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
13587 abfd, r_symndx);
13588 if (isym == NULL)
13589 return FALSE;
13590 }
13591 else
13592 {
13593 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13594 while (h->root.type == bfd_link_hash_indirect
13595 || h->root.type == bfd_link_hash_warning)
13596 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13597
13598 /* PR15323, ref flags aren't set for references in the
13599 same object. */
13600 h->root.non_ir_ref = 1;
13601 }
13602 }
13603
13604 eh = (struct elf32_arm_link_hash_entry *) h;
13605
13606 call_reloc_p = FALSE;
13607 may_become_dynamic_p = FALSE;
13608 may_need_local_target_p = FALSE;
13609
13610 /* Could be done earlier, if h were already available. */
13611 r_type = elf32_arm_tls_transition (info, r_type, h);
13612 switch (r_type)
13613 {
13614 case R_ARM_GOT32:
13615 case R_ARM_GOT_PREL:
13616 case R_ARM_TLS_GD32:
13617 case R_ARM_TLS_IE32:
13618 case R_ARM_TLS_GOTDESC:
13619 case R_ARM_TLS_DESCSEQ:
13620 case R_ARM_THM_TLS_DESCSEQ:
13621 case R_ARM_TLS_CALL:
13622 case R_ARM_THM_TLS_CALL:
13623 /* This symbol requires a global offset table entry. */
13624 {
13625 int tls_type, old_tls_type;
13626
13627 switch (r_type)
13628 {
13629 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
13630
13631 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
13632
13633 case R_ARM_TLS_GOTDESC:
13634 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
13635 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
13636 tls_type = GOT_TLS_GDESC; break;
13637
13638 default: tls_type = GOT_NORMAL; break;
13639 }
13640
13641 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
13642 info->flags |= DF_STATIC_TLS;
13643
13644 if (h != NULL)
13645 {
13646 h->got.refcount++;
13647 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
13648 }
13649 else
13650 {
13651 /* This is a global offset table entry for a local symbol. */
13652 if (!elf32_arm_allocate_local_sym_info (abfd))
13653 return FALSE;
13654 elf_local_got_refcounts (abfd)[r_symndx] += 1;
13655 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
13656 }
13657
13658 /* If a variable is accessed with both tls methods, two
13659 slots may be created. */
13660 if (GOT_TLS_GD_ANY_P (old_tls_type)
13661 && GOT_TLS_GD_ANY_P (tls_type))
13662 tls_type |= old_tls_type;
13663
13664 /* We will already have issued an error message if there
13665 is a TLS/non-TLS mismatch, based on the symbol
13666 type. So just combine any TLS types needed. */
13667 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
13668 && tls_type != GOT_NORMAL)
13669 tls_type |= old_tls_type;
13670
13671 /* If the symbol is accessed in both IE and GDESC
13672 method, we're able to relax. Turn off the GDESC flag,
13673 without messing up with any other kind of tls types
13674 that may be involved. */
13675 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
13676 tls_type &= ~GOT_TLS_GDESC;
13677
13678 if (old_tls_type != tls_type)
13679 {
13680 if (h != NULL)
13681 elf32_arm_hash_entry (h)->tls_type = tls_type;
13682 else
13683 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
13684 }
13685 }
13686 /* Fall through. */
13687
13688 case R_ARM_TLS_LDM32:
13689 if (r_type == R_ARM_TLS_LDM32)
13690 htab->tls_ldm_got.refcount++;
13691 /* Fall through. */
13692
13693 case R_ARM_GOTOFF32:
13694 case R_ARM_GOTPC:
13695 if (htab->root.sgot == NULL
13696 && !create_got_section (htab->root.dynobj, info))
13697 return FALSE;
13698 break;
13699
13700 case R_ARM_PC24:
13701 case R_ARM_PLT32:
13702 case R_ARM_CALL:
13703 case R_ARM_JUMP24:
13704 case R_ARM_PREL31:
13705 case R_ARM_THM_CALL:
13706 case R_ARM_THM_JUMP24:
13707 case R_ARM_THM_JUMP19:
13708 call_reloc_p = TRUE;
13709 may_need_local_target_p = TRUE;
13710 break;
13711
13712 case R_ARM_ABS12:
13713 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13714 ldr __GOTT_INDEX__ offsets. */
13715 if (!htab->vxworks_p)
13716 {
13717 may_need_local_target_p = TRUE;
13718 break;
13719 }
13720 else goto jump_over;
13721
13722 /* Fall through. */
13723
13724 case R_ARM_MOVW_ABS_NC:
13725 case R_ARM_MOVT_ABS:
13726 case R_ARM_THM_MOVW_ABS_NC:
13727 case R_ARM_THM_MOVT_ABS:
13728 if (bfd_link_pic (info))
13729 {
13730 (*_bfd_error_handler)
13731 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13732 abfd, elf32_arm_howto_table_1[r_type].name,
13733 (h) ? h->root.root.string : "a local symbol");
13734 bfd_set_error (bfd_error_bad_value);
13735 return FALSE;
13736 }
13737
13738 /* Fall through. */
13739 case R_ARM_ABS32:
13740 case R_ARM_ABS32_NOI:
13741 jump_over:
13742 if (h != NULL && bfd_link_executable (info))
13743 {
13744 h->pointer_equality_needed = 1;
13745 }
13746 /* Fall through. */
13747 case R_ARM_REL32:
13748 case R_ARM_REL32_NOI:
13749 case R_ARM_MOVW_PREL_NC:
13750 case R_ARM_MOVT_PREL:
13751 case R_ARM_THM_MOVW_PREL_NC:
13752 case R_ARM_THM_MOVT_PREL:
13753
13754 /* Should the interworking branches be listed here? */
13755 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
13756 && (sec->flags & SEC_ALLOC) != 0)
13757 {
13758 if (h == NULL
13759 && elf32_arm_howto_from_type (r_type)->pc_relative)
13760 {
13761 /* In shared libraries and relocatable executables,
13762 we treat local relative references as calls;
13763 see the related SYMBOL_CALLS_LOCAL code in
13764 allocate_dynrelocs. */
13765 call_reloc_p = TRUE;
13766 may_need_local_target_p = TRUE;
13767 }
13768 else
13769 /* We are creating a shared library or relocatable
13770 executable, and this is a reloc against a global symbol,
13771 or a non-PC-relative reloc against a local symbol.
13772 We may need to copy the reloc into the output. */
13773 may_become_dynamic_p = TRUE;
13774 }
13775 else
13776 may_need_local_target_p = TRUE;
13777 break;
13778
13779 /* This relocation describes the C++ object vtable hierarchy.
13780 Reconstruct it for later use during GC. */
13781 case R_ARM_GNU_VTINHERIT:
13782 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
13783 return FALSE;
13784 break;
13785
13786 /* This relocation describes which C++ vtable entries are actually
13787 used. Record for later use during GC. */
13788 case R_ARM_GNU_VTENTRY:
13789 BFD_ASSERT (h != NULL);
13790 if (h != NULL
13791 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
13792 return FALSE;
13793 break;
13794 }
13795
13796 if (h != NULL)
13797 {
13798 if (call_reloc_p)
13799 /* We may need a .plt entry if the function this reloc
13800 refers to is in a different object, regardless of the
13801 symbol's type. We can't tell for sure yet, because
13802 something later might force the symbol local. */
13803 h->needs_plt = 1;
13804 else if (may_need_local_target_p)
13805 /* If this reloc is in a read-only section, we might
13806 need a copy reloc. We can't check reliably at this
13807 stage whether the section is read-only, as input
13808 sections have not yet been mapped to output sections.
13809 Tentatively set the flag for now, and correct in
13810 adjust_dynamic_symbol. */
13811 h->non_got_ref = 1;
13812 }
13813
13814 if (may_need_local_target_p
13815 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
13816 {
13817 union gotplt_union *root_plt;
13818 struct arm_plt_info *arm_plt;
13819 struct arm_local_iplt_info *local_iplt;
13820
13821 if (h != NULL)
13822 {
13823 root_plt = &h->plt;
13824 arm_plt = &eh->plt;
13825 }
13826 else
13827 {
13828 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
13829 if (local_iplt == NULL)
13830 return FALSE;
13831 root_plt = &local_iplt->root;
13832 arm_plt = &local_iplt->arm;
13833 }
13834
13835 /* If the symbol is a function that doesn't bind locally,
13836 this relocation will need a PLT entry. */
13837 if (root_plt->refcount != -1)
13838 root_plt->refcount += 1;
13839
13840 if (!call_reloc_p)
13841 arm_plt->noncall_refcount++;
13842
13843 /* It's too early to use htab->use_blx here, so we have to
13844 record possible blx references separately from
13845 relocs that definitely need a thumb stub. */
13846
13847 if (r_type == R_ARM_THM_CALL)
13848 arm_plt->maybe_thumb_refcount += 1;
13849
13850 if (r_type == R_ARM_THM_JUMP24
13851 || r_type == R_ARM_THM_JUMP19)
13852 arm_plt->thumb_refcount += 1;
13853 }
13854
13855 if (may_become_dynamic_p)
13856 {
13857 struct elf_dyn_relocs *p, **head;
13858
13859 /* Create a reloc section in dynobj. */
13860 if (sreloc == NULL)
13861 {
13862 sreloc = _bfd_elf_make_dynamic_reloc_section
13863 (sec, dynobj, 2, abfd, ! htab->use_rel);
13864
13865 if (sreloc == NULL)
13866 return FALSE;
13867
13868 /* BPABI objects never have dynamic relocations mapped. */
13869 if (htab->symbian_p)
13870 {
13871 flagword flags;
13872
13873 flags = bfd_get_section_flags (dynobj, sreloc);
13874 flags &= ~(SEC_LOAD | SEC_ALLOC);
13875 bfd_set_section_flags (dynobj, sreloc, flags);
13876 }
13877 }
13878
13879 /* If this is a global symbol, count the number of
13880 relocations we need for this symbol. */
13881 if (h != NULL)
13882 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
13883 else
13884 {
13885 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13886 if (head == NULL)
13887 return FALSE;
13888 }
13889
13890 p = *head;
13891 if (p == NULL || p->sec != sec)
13892 {
13893 bfd_size_type amt = sizeof *p;
13894
13895 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13896 if (p == NULL)
13897 return FALSE;
13898 p->next = *head;
13899 *head = p;
13900 p->sec = sec;
13901 p->count = 0;
13902 p->pc_count = 0;
13903 }
13904
13905 if (elf32_arm_howto_from_type (r_type)->pc_relative)
13906 p->pc_count += 1;
13907 p->count += 1;
13908 }
13909 }
13910
13911 return TRUE;
13912 }
13913
13914 /* Unwinding tables are not referenced directly. This pass marks them as
13915 required if the corresponding code section is marked. */
13916
13917 static bfd_boolean
13918 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13919 elf_gc_mark_hook_fn gc_mark_hook)
13920 {
13921 bfd *sub;
13922 Elf_Internal_Shdr **elf_shdrp;
13923 bfd_boolean again;
13924
13925 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13926
13927 /* Marking EH data may cause additional code sections to be marked,
13928 requiring multiple passes. */
13929 again = TRUE;
13930 while (again)
13931 {
13932 again = FALSE;
13933 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
13934 {
13935 asection *o;
13936
13937 if (! is_arm_elf (sub))
13938 continue;
13939
13940 elf_shdrp = elf_elfsections (sub);
13941 for (o = sub->sections; o != NULL; o = o->next)
13942 {
13943 Elf_Internal_Shdr *hdr;
13944
13945 hdr = &elf_section_data (o)->this_hdr;
13946 if (hdr->sh_type == SHT_ARM_EXIDX
13947 && hdr->sh_link
13948 && hdr->sh_link < elf_numsections (sub)
13949 && !o->gc_mark
13950 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13951 {
13952 again = TRUE;
13953 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13954 return FALSE;
13955 }
13956 }
13957 }
13958 }
13959
13960 return TRUE;
13961 }
13962
13963 /* Treat mapping symbols as special target symbols. */
13964
13965 static bfd_boolean
13966 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13967 {
13968 return bfd_is_arm_special_symbol_name (sym->name,
13969 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13970 }
13971
13972 /* This is a copy of elf_find_function() from elf.c except that
13973 ARM mapping symbols are ignored when looking for function names
13974 and STT_ARM_TFUNC is considered to a function type. */
13975
13976 static bfd_boolean
13977 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13978 asymbol ** symbols,
13979 asection * section,
13980 bfd_vma offset,
13981 const char ** filename_ptr,
13982 const char ** functionname_ptr)
13983 {
13984 const char * filename = NULL;
13985 asymbol * func = NULL;
13986 bfd_vma low_func = 0;
13987 asymbol ** p;
13988
13989 for (p = symbols; *p != NULL; p++)
13990 {
13991 elf_symbol_type *q;
13992
13993 q = (elf_symbol_type *) *p;
13994
13995 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13996 {
13997 default:
13998 break;
13999 case STT_FILE:
14000 filename = bfd_asymbol_name (&q->symbol);
14001 break;
14002 case STT_FUNC:
14003 case STT_ARM_TFUNC:
14004 case STT_NOTYPE:
14005 /* Skip mapping symbols. */
14006 if ((q->symbol.flags & BSF_LOCAL)
14007 && bfd_is_arm_special_symbol_name (q->symbol.name,
14008 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
14009 continue;
14010 /* Fall through. */
14011 if (bfd_get_section (&q->symbol) == section
14012 && q->symbol.value >= low_func
14013 && q->symbol.value <= offset)
14014 {
14015 func = (asymbol *) q;
14016 low_func = q->symbol.value;
14017 }
14018 break;
14019 }
14020 }
14021
14022 if (func == NULL)
14023 return FALSE;
14024
14025 if (filename_ptr)
14026 *filename_ptr = filename;
14027 if (functionname_ptr)
14028 *functionname_ptr = bfd_asymbol_name (func);
14029
14030 return TRUE;
14031 }
14032
14033
14034 /* Find the nearest line to a particular section and offset, for error
14035 reporting. This code is a duplicate of the code in elf.c, except
14036 that it uses arm_elf_find_function. */
14037
14038 static bfd_boolean
14039 elf32_arm_find_nearest_line (bfd * abfd,
14040 asymbol ** symbols,
14041 asection * section,
14042 bfd_vma offset,
14043 const char ** filename_ptr,
14044 const char ** functionname_ptr,
14045 unsigned int * line_ptr,
14046 unsigned int * discriminator_ptr)
14047 {
14048 bfd_boolean found = FALSE;
14049
14050 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
14051 filename_ptr, functionname_ptr,
14052 line_ptr, discriminator_ptr,
14053 dwarf_debug_sections, 0,
14054 & elf_tdata (abfd)->dwarf2_find_line_info))
14055 {
14056 if (!*functionname_ptr)
14057 arm_elf_find_function (abfd, symbols, section, offset,
14058 *filename_ptr ? NULL : filename_ptr,
14059 functionname_ptr);
14060
14061 return TRUE;
14062 }
14063
14064 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
14065 uses DWARF1. */
14066
14067 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
14068 & found, filename_ptr,
14069 functionname_ptr, line_ptr,
14070 & elf_tdata (abfd)->line_info))
14071 return FALSE;
14072
14073 if (found && (*functionname_ptr || *line_ptr))
14074 return TRUE;
14075
14076 if (symbols == NULL)
14077 return FALSE;
14078
14079 if (! arm_elf_find_function (abfd, symbols, section, offset,
14080 filename_ptr, functionname_ptr))
14081 return FALSE;
14082
14083 *line_ptr = 0;
14084 return TRUE;
14085 }
14086
14087 static bfd_boolean
14088 elf32_arm_find_inliner_info (bfd * abfd,
14089 const char ** filename_ptr,
14090 const char ** functionname_ptr,
14091 unsigned int * line_ptr)
14092 {
14093 bfd_boolean found;
14094 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
14095 functionname_ptr, line_ptr,
14096 & elf_tdata (abfd)->dwarf2_find_line_info);
14097 return found;
14098 }
14099
14100 /* Adjust a symbol defined by a dynamic object and referenced by a
14101 regular object. The current definition is in some section of the
14102 dynamic object, but we're not including those sections. We have to
14103 change the definition to something the rest of the link can
14104 understand. */
14105
14106 static bfd_boolean
14107 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
14108 struct elf_link_hash_entry * h)
14109 {
14110 bfd * dynobj;
14111 asection * s;
14112 struct elf32_arm_link_hash_entry * eh;
14113 struct elf32_arm_link_hash_table *globals;
14114
14115 globals = elf32_arm_hash_table (info);
14116 if (globals == NULL)
14117 return FALSE;
14118
14119 dynobj = elf_hash_table (info)->dynobj;
14120
14121 /* Make sure we know what is going on here. */
14122 BFD_ASSERT (dynobj != NULL
14123 && (h->needs_plt
14124 || h->type == STT_GNU_IFUNC
14125 || h->u.weakdef != NULL
14126 || (h->def_dynamic
14127 && h->ref_regular
14128 && !h->def_regular)));
14129
14130 eh = (struct elf32_arm_link_hash_entry *) h;
14131
14132 /* If this is a function, put it in the procedure linkage table. We
14133 will fill in the contents of the procedure linkage table later,
14134 when we know the address of the .got section. */
14135 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
14136 {
14137 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14138 symbol binds locally. */
14139 if (h->plt.refcount <= 0
14140 || (h->type != STT_GNU_IFUNC
14141 && (SYMBOL_CALLS_LOCAL (info, h)
14142 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
14143 && h->root.type == bfd_link_hash_undefweak))))
14144 {
14145 /* This case can occur if we saw a PLT32 reloc in an input
14146 file, but the symbol was never referred to by a dynamic
14147 object, or if all references were garbage collected. In
14148 such a case, we don't actually need to build a procedure
14149 linkage table, and we can just do a PC24 reloc instead. */
14150 h->plt.offset = (bfd_vma) -1;
14151 eh->plt.thumb_refcount = 0;
14152 eh->plt.maybe_thumb_refcount = 0;
14153 eh->plt.noncall_refcount = 0;
14154 h->needs_plt = 0;
14155 }
14156
14157 return TRUE;
14158 }
14159 else
14160 {
14161 /* It's possible that we incorrectly decided a .plt reloc was
14162 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14163 in check_relocs. We can't decide accurately between function
14164 and non-function syms in check-relocs; Objects loaded later in
14165 the link may change h->type. So fix it now. */
14166 h->plt.offset = (bfd_vma) -1;
14167 eh->plt.thumb_refcount = 0;
14168 eh->plt.maybe_thumb_refcount = 0;
14169 eh->plt.noncall_refcount = 0;
14170 }
14171
14172 /* If this is a weak symbol, and there is a real definition, the
14173 processor independent code will have arranged for us to see the
14174 real definition first, and we can just use the same value. */
14175 if (h->u.weakdef != NULL)
14176 {
14177 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
14178 || h->u.weakdef->root.type == bfd_link_hash_defweak);
14179 h->root.u.def.section = h->u.weakdef->root.u.def.section;
14180 h->root.u.def.value = h->u.weakdef->root.u.def.value;
14181 return TRUE;
14182 }
14183
14184 /* If there are no non-GOT references, we do not need a copy
14185 relocation. */
14186 if (!h->non_got_ref)
14187 return TRUE;
14188
14189 /* This is a reference to a symbol defined by a dynamic object which
14190 is not a function. */
14191
14192 /* If we are creating a shared library, we must presume that the
14193 only references to the symbol are via the global offset table.
14194 For such cases we need not do anything here; the relocations will
14195 be handled correctly by relocate_section. Relocatable executables
14196 can reference data in shared objects directly, so we don't need to
14197 do anything here. */
14198 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
14199 return TRUE;
14200
14201 /* We must allocate the symbol in our .dynbss section, which will
14202 become part of the .bss section of the executable. There will be
14203 an entry for this symbol in the .dynsym section. The dynamic
14204 object will contain position independent code, so all references
14205 from the dynamic object to this symbol will go through the global
14206 offset table. The dynamic linker will use the .dynsym entry to
14207 determine the address it must put in the global offset table, so
14208 both the dynamic object and the regular object will refer to the
14209 same memory location for the variable. */
14210 s = bfd_get_linker_section (dynobj, ".dynbss");
14211 BFD_ASSERT (s != NULL);
14212
14213 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
14214 linker to copy the initial value out of the dynamic object and into
14215 the runtime process image. We need to remember the offset into the
14216 .rel(a).bss section we are going to use. */
14217 if (info->nocopyreloc == 0
14218 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
14219 && h->size != 0)
14220 {
14221 asection *srel;
14222
14223 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
14224 elf32_arm_allocate_dynrelocs (info, srel, 1);
14225 h->needs_copy = 1;
14226 }
14227
14228 return _bfd_elf_adjust_dynamic_copy (info, h, s);
14229 }
14230
14231 /* Allocate space in .plt, .got and associated reloc sections for
14232 dynamic relocs. */
14233
14234 static bfd_boolean
14235 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
14236 {
14237 struct bfd_link_info *info;
14238 struct elf32_arm_link_hash_table *htab;
14239 struct elf32_arm_link_hash_entry *eh;
14240 struct elf_dyn_relocs *p;
14241
14242 if (h->root.type == bfd_link_hash_indirect)
14243 return TRUE;
14244
14245 eh = (struct elf32_arm_link_hash_entry *) h;
14246
14247 info = (struct bfd_link_info *) inf;
14248 htab = elf32_arm_hash_table (info);
14249 if (htab == NULL)
14250 return FALSE;
14251
14252 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
14253 && h->plt.refcount > 0)
14254 {
14255 /* Make sure this symbol is output as a dynamic symbol.
14256 Undefined weak syms won't yet be marked as dynamic. */
14257 if (h->dynindx == -1
14258 && !h->forced_local)
14259 {
14260 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14261 return FALSE;
14262 }
14263
14264 /* If the call in the PLT entry binds locally, the associated
14265 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14266 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14267 than the .plt section. */
14268 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
14269 {
14270 eh->is_iplt = 1;
14271 if (eh->plt.noncall_refcount == 0
14272 && SYMBOL_REFERENCES_LOCAL (info, h))
14273 /* All non-call references can be resolved directly.
14274 This means that they can (and in some cases, must)
14275 resolve directly to the run-time target, rather than
14276 to the PLT. That in turns means that any .got entry
14277 would be equal to the .igot.plt entry, so there's
14278 no point having both. */
14279 h->got.refcount = 0;
14280 }
14281
14282 if (bfd_link_pic (info)
14283 || eh->is_iplt
14284 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
14285 {
14286 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
14287
14288 /* If this symbol is not defined in a regular file, and we are
14289 not generating a shared library, then set the symbol to this
14290 location in the .plt. This is required to make function
14291 pointers compare as equal between the normal executable and
14292 the shared library. */
14293 if (! bfd_link_pic (info)
14294 && !h->def_regular)
14295 {
14296 h->root.u.def.section = htab->root.splt;
14297 h->root.u.def.value = h->plt.offset;
14298
14299 /* Make sure the function is not marked as Thumb, in case
14300 it is the target of an ABS32 relocation, which will
14301 point to the PLT entry. */
14302 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
14303 }
14304
14305 /* VxWorks executables have a second set of relocations for
14306 each PLT entry. They go in a separate relocation section,
14307 which is processed by the kernel loader. */
14308 if (htab->vxworks_p && !bfd_link_pic (info))
14309 {
14310 /* There is a relocation for the initial PLT entry:
14311 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14312 if (h->plt.offset == htab->plt_header_size)
14313 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
14314
14315 /* There are two extra relocations for each subsequent
14316 PLT entry: an R_ARM_32 relocation for the GOT entry,
14317 and an R_ARM_32 relocation for the PLT entry. */
14318 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
14319 }
14320 }
14321 else
14322 {
14323 h->plt.offset = (bfd_vma) -1;
14324 h->needs_plt = 0;
14325 }
14326 }
14327 else
14328 {
14329 h->plt.offset = (bfd_vma) -1;
14330 h->needs_plt = 0;
14331 }
14332
14333 eh = (struct elf32_arm_link_hash_entry *) h;
14334 eh->tlsdesc_got = (bfd_vma) -1;
14335
14336 if (h->got.refcount > 0)
14337 {
14338 asection *s;
14339 bfd_boolean dyn;
14340 int tls_type = elf32_arm_hash_entry (h)->tls_type;
14341 int indx;
14342
14343 /* Make sure this symbol is output as a dynamic symbol.
14344 Undefined weak syms won't yet be marked as dynamic. */
14345 if (h->dynindx == -1
14346 && !h->forced_local)
14347 {
14348 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14349 return FALSE;
14350 }
14351
14352 if (!htab->symbian_p)
14353 {
14354 s = htab->root.sgot;
14355 h->got.offset = s->size;
14356
14357 if (tls_type == GOT_UNKNOWN)
14358 abort ();
14359
14360 if (tls_type == GOT_NORMAL)
14361 /* Non-TLS symbols need one GOT slot. */
14362 s->size += 4;
14363 else
14364 {
14365 if (tls_type & GOT_TLS_GDESC)
14366 {
14367 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14368 eh->tlsdesc_got
14369 = (htab->root.sgotplt->size
14370 - elf32_arm_compute_jump_table_size (htab));
14371 htab->root.sgotplt->size += 8;
14372 h->got.offset = (bfd_vma) -2;
14373 /* plt.got_offset needs to know there's a TLS_DESC
14374 reloc in the middle of .got.plt. */
14375 htab->num_tls_desc++;
14376 }
14377
14378 if (tls_type & GOT_TLS_GD)
14379 {
14380 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14381 the symbol is both GD and GDESC, got.offset may
14382 have been overwritten. */
14383 h->got.offset = s->size;
14384 s->size += 8;
14385 }
14386
14387 if (tls_type & GOT_TLS_IE)
14388 /* R_ARM_TLS_IE32 needs one GOT slot. */
14389 s->size += 4;
14390 }
14391
14392 dyn = htab->root.dynamic_sections_created;
14393
14394 indx = 0;
14395 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
14396 bfd_link_pic (info),
14397 h)
14398 && (!bfd_link_pic (info)
14399 || !SYMBOL_REFERENCES_LOCAL (info, h)))
14400 indx = h->dynindx;
14401
14402 if (tls_type != GOT_NORMAL
14403 && (bfd_link_pic (info) || indx != 0)
14404 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14405 || h->root.type != bfd_link_hash_undefweak))
14406 {
14407 if (tls_type & GOT_TLS_IE)
14408 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14409
14410 if (tls_type & GOT_TLS_GD)
14411 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14412
14413 if (tls_type & GOT_TLS_GDESC)
14414 {
14415 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
14416 /* GDESC needs a trampoline to jump to. */
14417 htab->tls_trampoline = -1;
14418 }
14419
14420 /* Only GD needs it. GDESC just emits one relocation per
14421 2 entries. */
14422 if ((tls_type & GOT_TLS_GD) && indx != 0)
14423 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14424 }
14425 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
14426 {
14427 if (htab->root.dynamic_sections_created)
14428 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14429 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14430 }
14431 else if (h->type == STT_GNU_IFUNC
14432 && eh->plt.noncall_refcount == 0)
14433 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14434 they all resolve dynamically instead. Reserve room for the
14435 GOT entry's R_ARM_IRELATIVE relocation. */
14436 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
14437 else if (bfd_link_pic (info)
14438 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14439 || h->root.type != bfd_link_hash_undefweak))
14440 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14441 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14442 }
14443 }
14444 else
14445 h->got.offset = (bfd_vma) -1;
14446
14447 /* Allocate stubs for exported Thumb functions on v4t. */
14448 if (!htab->use_blx && h->dynindx != -1
14449 && h->def_regular
14450 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
14451 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
14452 {
14453 struct elf_link_hash_entry * th;
14454 struct bfd_link_hash_entry * bh;
14455 struct elf_link_hash_entry * myh;
14456 char name[1024];
14457 asection *s;
14458 bh = NULL;
14459 /* Create a new symbol to regist the real location of the function. */
14460 s = h->root.u.def.section;
14461 sprintf (name, "__real_%s", h->root.root.string);
14462 _bfd_generic_link_add_one_symbol (info, s->owner,
14463 name, BSF_GLOBAL, s,
14464 h->root.u.def.value,
14465 NULL, TRUE, FALSE, &bh);
14466
14467 myh = (struct elf_link_hash_entry *) bh;
14468 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14469 myh->forced_local = 1;
14470 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
14471 eh->export_glue = myh;
14472 th = record_arm_to_thumb_glue (info, h);
14473 /* Point the symbol at the stub. */
14474 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
14475 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
14476 h->root.u.def.section = th->root.u.def.section;
14477 h->root.u.def.value = th->root.u.def.value & ~1;
14478 }
14479
14480 if (eh->dyn_relocs == NULL)
14481 return TRUE;
14482
14483 /* In the shared -Bsymbolic case, discard space allocated for
14484 dynamic pc-relative relocs against symbols which turn out to be
14485 defined in regular objects. For the normal shared case, discard
14486 space for pc-relative relocs that have become local due to symbol
14487 visibility changes. */
14488
14489 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
14490 {
14491 /* Relocs that use pc_count are PC-relative forms, which will appear
14492 on something like ".long foo - ." or "movw REG, foo - .". We want
14493 calls to protected symbols to resolve directly to the function
14494 rather than going via the plt. If people want function pointer
14495 comparisons to work as expected then they should avoid writing
14496 assembly like ".long foo - .". */
14497 if (SYMBOL_CALLS_LOCAL (info, h))
14498 {
14499 struct elf_dyn_relocs **pp;
14500
14501 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14502 {
14503 p->count -= p->pc_count;
14504 p->pc_count = 0;
14505 if (p->count == 0)
14506 *pp = p->next;
14507 else
14508 pp = &p->next;
14509 }
14510 }
14511
14512 if (htab->vxworks_p)
14513 {
14514 struct elf_dyn_relocs **pp;
14515
14516 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14517 {
14518 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
14519 *pp = p->next;
14520 else
14521 pp = &p->next;
14522 }
14523 }
14524
14525 /* Also discard relocs on undefined weak syms with non-default
14526 visibility. */
14527 if (eh->dyn_relocs != NULL
14528 && h->root.type == bfd_link_hash_undefweak)
14529 {
14530 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
14531 eh->dyn_relocs = NULL;
14532
14533 /* Make sure undefined weak symbols are output as a dynamic
14534 symbol in PIEs. */
14535 else if (h->dynindx == -1
14536 && !h->forced_local)
14537 {
14538 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14539 return FALSE;
14540 }
14541 }
14542
14543 else if (htab->root.is_relocatable_executable && h->dynindx == -1
14544 && h->root.type == bfd_link_hash_new)
14545 {
14546 /* Output absolute symbols so that we can create relocations
14547 against them. For normal symbols we output a relocation
14548 against the section that contains them. */
14549 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14550 return FALSE;
14551 }
14552
14553 }
14554 else
14555 {
14556 /* For the non-shared case, discard space for relocs against
14557 symbols which turn out to need copy relocs or are not
14558 dynamic. */
14559
14560 if (!h->non_got_ref
14561 && ((h->def_dynamic
14562 && !h->def_regular)
14563 || (htab->root.dynamic_sections_created
14564 && (h->root.type == bfd_link_hash_undefweak
14565 || h->root.type == bfd_link_hash_undefined))))
14566 {
14567 /* Make sure this symbol is output as a dynamic symbol.
14568 Undefined weak syms won't yet be marked as dynamic. */
14569 if (h->dynindx == -1
14570 && !h->forced_local)
14571 {
14572 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14573 return FALSE;
14574 }
14575
14576 /* If that succeeded, we know we'll be keeping all the
14577 relocs. */
14578 if (h->dynindx != -1)
14579 goto keep;
14580 }
14581
14582 eh->dyn_relocs = NULL;
14583
14584 keep: ;
14585 }
14586
14587 /* Finally, allocate space. */
14588 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14589 {
14590 asection *sreloc = elf_section_data (p->sec)->sreloc;
14591 if (h->type == STT_GNU_IFUNC
14592 && eh->plt.noncall_refcount == 0
14593 && SYMBOL_REFERENCES_LOCAL (info, h))
14594 elf32_arm_allocate_irelocs (info, sreloc, p->count);
14595 else
14596 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
14597 }
14598
14599 return TRUE;
14600 }
14601
14602 /* Find any dynamic relocs that apply to read-only sections. */
14603
14604 static bfd_boolean
14605 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
14606 {
14607 struct elf32_arm_link_hash_entry * eh;
14608 struct elf_dyn_relocs * p;
14609
14610 eh = (struct elf32_arm_link_hash_entry *) h;
14611 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14612 {
14613 asection *s = p->sec;
14614
14615 if (s != NULL && (s->flags & SEC_READONLY) != 0)
14616 {
14617 struct bfd_link_info *info = (struct bfd_link_info *) inf;
14618
14619 info->flags |= DF_TEXTREL;
14620
14621 /* Not an error, just cut short the traversal. */
14622 return FALSE;
14623 }
14624 }
14625 return TRUE;
14626 }
14627
14628 void
14629 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
14630 int byteswap_code)
14631 {
14632 struct elf32_arm_link_hash_table *globals;
14633
14634 globals = elf32_arm_hash_table (info);
14635 if (globals == NULL)
14636 return;
14637
14638 globals->byteswap_code = byteswap_code;
14639 }
14640
14641 /* Set the sizes of the dynamic sections. */
14642
14643 static bfd_boolean
14644 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
14645 struct bfd_link_info * info)
14646 {
14647 bfd * dynobj;
14648 asection * s;
14649 bfd_boolean plt;
14650 bfd_boolean relocs;
14651 bfd *ibfd;
14652 struct elf32_arm_link_hash_table *htab;
14653
14654 htab = elf32_arm_hash_table (info);
14655 if (htab == NULL)
14656 return FALSE;
14657
14658 dynobj = elf_hash_table (info)->dynobj;
14659 BFD_ASSERT (dynobj != NULL);
14660 check_use_blx (htab);
14661
14662 if (elf_hash_table (info)->dynamic_sections_created)
14663 {
14664 /* Set the contents of the .interp section to the interpreter. */
14665 if (bfd_link_executable (info) && !info->nointerp)
14666 {
14667 s = bfd_get_linker_section (dynobj, ".interp");
14668 BFD_ASSERT (s != NULL);
14669 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
14670 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
14671 }
14672 }
14673
14674 /* Set up .got offsets for local syms, and space for local dynamic
14675 relocs. */
14676 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14677 {
14678 bfd_signed_vma *local_got;
14679 bfd_signed_vma *end_local_got;
14680 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
14681 char *local_tls_type;
14682 bfd_vma *local_tlsdesc_gotent;
14683 bfd_size_type locsymcount;
14684 Elf_Internal_Shdr *symtab_hdr;
14685 asection *srel;
14686 bfd_boolean is_vxworks = htab->vxworks_p;
14687 unsigned int symndx;
14688
14689 if (! is_arm_elf (ibfd))
14690 continue;
14691
14692 for (s = ibfd->sections; s != NULL; s = s->next)
14693 {
14694 struct elf_dyn_relocs *p;
14695
14696 for (p = (struct elf_dyn_relocs *)
14697 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
14698 {
14699 if (!bfd_is_abs_section (p->sec)
14700 && bfd_is_abs_section (p->sec->output_section))
14701 {
14702 /* Input section has been discarded, either because
14703 it is a copy of a linkonce section or due to
14704 linker script /DISCARD/, so we'll be discarding
14705 the relocs too. */
14706 }
14707 else if (is_vxworks
14708 && strcmp (p->sec->output_section->name,
14709 ".tls_vars") == 0)
14710 {
14711 /* Relocations in vxworks .tls_vars sections are
14712 handled specially by the loader. */
14713 }
14714 else if (p->count != 0)
14715 {
14716 srel = elf_section_data (p->sec)->sreloc;
14717 elf32_arm_allocate_dynrelocs (info, srel, p->count);
14718 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
14719 info->flags |= DF_TEXTREL;
14720 }
14721 }
14722 }
14723
14724 local_got = elf_local_got_refcounts (ibfd);
14725 if (!local_got)
14726 continue;
14727
14728 symtab_hdr = & elf_symtab_hdr (ibfd);
14729 locsymcount = symtab_hdr->sh_info;
14730 end_local_got = local_got + locsymcount;
14731 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
14732 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
14733 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
14734 symndx = 0;
14735 s = htab->root.sgot;
14736 srel = htab->root.srelgot;
14737 for (; local_got < end_local_got;
14738 ++local_got, ++local_iplt_ptr, ++local_tls_type,
14739 ++local_tlsdesc_gotent, ++symndx)
14740 {
14741 *local_tlsdesc_gotent = (bfd_vma) -1;
14742 local_iplt = *local_iplt_ptr;
14743 if (local_iplt != NULL)
14744 {
14745 struct elf_dyn_relocs *p;
14746
14747 if (local_iplt->root.refcount > 0)
14748 {
14749 elf32_arm_allocate_plt_entry (info, TRUE,
14750 &local_iplt->root,
14751 &local_iplt->arm);
14752 if (local_iplt->arm.noncall_refcount == 0)
14753 /* All references to the PLT are calls, so all
14754 non-call references can resolve directly to the
14755 run-time target. This means that the .got entry
14756 would be the same as the .igot.plt entry, so there's
14757 no point creating both. */
14758 *local_got = 0;
14759 }
14760 else
14761 {
14762 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
14763 local_iplt->root.offset = (bfd_vma) -1;
14764 }
14765
14766 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
14767 {
14768 asection *psrel;
14769
14770 psrel = elf_section_data (p->sec)->sreloc;
14771 if (local_iplt->arm.noncall_refcount == 0)
14772 elf32_arm_allocate_irelocs (info, psrel, p->count);
14773 else
14774 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
14775 }
14776 }
14777 if (*local_got > 0)
14778 {
14779 Elf_Internal_Sym *isym;
14780
14781 *local_got = s->size;
14782 if (*local_tls_type & GOT_TLS_GD)
14783 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14784 s->size += 8;
14785 if (*local_tls_type & GOT_TLS_GDESC)
14786 {
14787 *local_tlsdesc_gotent = htab->root.sgotplt->size
14788 - elf32_arm_compute_jump_table_size (htab);
14789 htab->root.sgotplt->size += 8;
14790 *local_got = (bfd_vma) -2;
14791 /* plt.got_offset needs to know there's a TLS_DESC
14792 reloc in the middle of .got.plt. */
14793 htab->num_tls_desc++;
14794 }
14795 if (*local_tls_type & GOT_TLS_IE)
14796 s->size += 4;
14797
14798 if (*local_tls_type & GOT_NORMAL)
14799 {
14800 /* If the symbol is both GD and GDESC, *local_got
14801 may have been overwritten. */
14802 *local_got = s->size;
14803 s->size += 4;
14804 }
14805
14806 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
14807 if (isym == NULL)
14808 return FALSE;
14809
14810 /* If all references to an STT_GNU_IFUNC PLT are calls,
14811 then all non-call references, including this GOT entry,
14812 resolve directly to the run-time target. */
14813 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
14814 && (local_iplt == NULL
14815 || local_iplt->arm.noncall_refcount == 0))
14816 elf32_arm_allocate_irelocs (info, srel, 1);
14817 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
14818 {
14819 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
14820 || *local_tls_type & GOT_TLS_GD)
14821 elf32_arm_allocate_dynrelocs (info, srel, 1);
14822
14823 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
14824 {
14825 elf32_arm_allocate_dynrelocs (info,
14826 htab->root.srelplt, 1);
14827 htab->tls_trampoline = -1;
14828 }
14829 }
14830 }
14831 else
14832 *local_got = (bfd_vma) -1;
14833 }
14834 }
14835
14836 if (htab->tls_ldm_got.refcount > 0)
14837 {
14838 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14839 for R_ARM_TLS_LDM32 relocations. */
14840 htab->tls_ldm_got.offset = htab->root.sgot->size;
14841 htab->root.sgot->size += 8;
14842 if (bfd_link_pic (info))
14843 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14844 }
14845 else
14846 htab->tls_ldm_got.offset = -1;
14847
14848 /* Allocate global sym .plt and .got entries, and space for global
14849 sym dynamic relocs. */
14850 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
14851
14852 /* Here we rummage through the found bfds to collect glue information. */
14853 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14854 {
14855 if (! is_arm_elf (ibfd))
14856 continue;
14857
14858 /* Initialise mapping tables for code/data. */
14859 bfd_elf32_arm_init_maps (ibfd);
14860
14861 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
14862 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
14863 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
14864 /* xgettext:c-format */
14865 _bfd_error_handler (_("Errors encountered processing file %s"),
14866 ibfd->filename);
14867 }
14868
14869 /* Allocate space for the glue sections now that we've sized them. */
14870 bfd_elf32_arm_allocate_interworking_sections (info);
14871
14872 /* For every jump slot reserved in the sgotplt, reloc_count is
14873 incremented. However, when we reserve space for TLS descriptors,
14874 it's not incremented, so in order to compute the space reserved
14875 for them, it suffices to multiply the reloc count by the jump
14876 slot size. */
14877 if (htab->root.srelplt)
14878 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
14879
14880 if (htab->tls_trampoline)
14881 {
14882 if (htab->root.splt->size == 0)
14883 htab->root.splt->size += htab->plt_header_size;
14884
14885 htab->tls_trampoline = htab->root.splt->size;
14886 htab->root.splt->size += htab->plt_entry_size;
14887
14888 /* If we're not using lazy TLS relocations, don't generate the
14889 PLT and GOT entries they require. */
14890 if (!(info->flags & DF_BIND_NOW))
14891 {
14892 htab->dt_tlsdesc_got = htab->root.sgot->size;
14893 htab->root.sgot->size += 4;
14894
14895 htab->dt_tlsdesc_plt = htab->root.splt->size;
14896 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14897 }
14898 }
14899
14900 /* The check_relocs and adjust_dynamic_symbol entry points have
14901 determined the sizes of the various dynamic sections. Allocate
14902 memory for them. */
14903 plt = FALSE;
14904 relocs = FALSE;
14905 for (s = dynobj->sections; s != NULL; s = s->next)
14906 {
14907 const char * name;
14908
14909 if ((s->flags & SEC_LINKER_CREATED) == 0)
14910 continue;
14911
14912 /* It's OK to base decisions on the section name, because none
14913 of the dynobj section names depend upon the input files. */
14914 name = bfd_get_section_name (dynobj, s);
14915
14916 if (s == htab->root.splt)
14917 {
14918 /* Remember whether there is a PLT. */
14919 plt = s->size != 0;
14920 }
14921 else if (CONST_STRNEQ (name, ".rel"))
14922 {
14923 if (s->size != 0)
14924 {
14925 /* Remember whether there are any reloc sections other
14926 than .rel(a).plt and .rela.plt.unloaded. */
14927 if (s != htab->root.srelplt && s != htab->srelplt2)
14928 relocs = TRUE;
14929
14930 /* We use the reloc_count field as a counter if we need
14931 to copy relocs into the output file. */
14932 s->reloc_count = 0;
14933 }
14934 }
14935 else if (s != htab->root.sgot
14936 && s != htab->root.sgotplt
14937 && s != htab->root.iplt
14938 && s != htab->root.igotplt
14939 && s != htab->sdynbss)
14940 {
14941 /* It's not one of our sections, so don't allocate space. */
14942 continue;
14943 }
14944
14945 if (s->size == 0)
14946 {
14947 /* If we don't need this section, strip it from the
14948 output file. This is mostly to handle .rel(a).bss and
14949 .rel(a).plt. We must create both sections in
14950 create_dynamic_sections, because they must be created
14951 before the linker maps input sections to output
14952 sections. The linker does that before
14953 adjust_dynamic_symbol is called, and it is that
14954 function which decides whether anything needs to go
14955 into these sections. */
14956 s->flags |= SEC_EXCLUDE;
14957 continue;
14958 }
14959
14960 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14961 continue;
14962
14963 /* Allocate memory for the section contents. */
14964 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14965 if (s->contents == NULL)
14966 return FALSE;
14967 }
14968
14969 if (elf_hash_table (info)->dynamic_sections_created)
14970 {
14971 /* Add some entries to the .dynamic section. We fill in the
14972 values later, in elf32_arm_finish_dynamic_sections, but we
14973 must add the entries now so that we get the correct size for
14974 the .dynamic section. The DT_DEBUG entry is filled in by the
14975 dynamic linker and used by the debugger. */
14976 #define add_dynamic_entry(TAG, VAL) \
14977 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14978
14979 if (bfd_link_executable (info))
14980 {
14981 if (!add_dynamic_entry (DT_DEBUG, 0))
14982 return FALSE;
14983 }
14984
14985 if (plt)
14986 {
14987 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14988 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14989 || !add_dynamic_entry (DT_PLTREL,
14990 htab->use_rel ? DT_REL : DT_RELA)
14991 || !add_dynamic_entry (DT_JMPREL, 0))
14992 return FALSE;
14993
14994 if (htab->dt_tlsdesc_plt &&
14995 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14996 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14997 return FALSE;
14998 }
14999
15000 if (relocs)
15001 {
15002 if (htab->use_rel)
15003 {
15004 if (!add_dynamic_entry (DT_REL, 0)
15005 || !add_dynamic_entry (DT_RELSZ, 0)
15006 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
15007 return FALSE;
15008 }
15009 else
15010 {
15011 if (!add_dynamic_entry (DT_RELA, 0)
15012 || !add_dynamic_entry (DT_RELASZ, 0)
15013 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
15014 return FALSE;
15015 }
15016 }
15017
15018 /* If any dynamic relocs apply to a read-only section,
15019 then we need a DT_TEXTREL entry. */
15020 if ((info->flags & DF_TEXTREL) == 0)
15021 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
15022 info);
15023
15024 if ((info->flags & DF_TEXTREL) != 0)
15025 {
15026 if (!add_dynamic_entry (DT_TEXTREL, 0))
15027 return FALSE;
15028 }
15029 if (htab->vxworks_p
15030 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
15031 return FALSE;
15032 }
15033 #undef add_dynamic_entry
15034
15035 return TRUE;
15036 }
15037
15038 /* Size sections even though they're not dynamic. We use it to setup
15039 _TLS_MODULE_BASE_, if needed. */
15040
15041 static bfd_boolean
15042 elf32_arm_always_size_sections (bfd *output_bfd,
15043 struct bfd_link_info *info)
15044 {
15045 asection *tls_sec;
15046
15047 if (bfd_link_relocatable (info))
15048 return TRUE;
15049
15050 tls_sec = elf_hash_table (info)->tls_sec;
15051
15052 if (tls_sec)
15053 {
15054 struct elf_link_hash_entry *tlsbase;
15055
15056 tlsbase = elf_link_hash_lookup
15057 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
15058
15059 if (tlsbase)
15060 {
15061 struct bfd_link_hash_entry *bh = NULL;
15062 const struct elf_backend_data *bed
15063 = get_elf_backend_data (output_bfd);
15064
15065 if (!(_bfd_generic_link_add_one_symbol
15066 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
15067 tls_sec, 0, NULL, FALSE,
15068 bed->collect, &bh)))
15069 return FALSE;
15070
15071 tlsbase->type = STT_TLS;
15072 tlsbase = (struct elf_link_hash_entry *)bh;
15073 tlsbase->def_regular = 1;
15074 tlsbase->other = STV_HIDDEN;
15075 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
15076 }
15077 }
15078 return TRUE;
15079 }
15080
15081 /* Finish up dynamic symbol handling. We set the contents of various
15082 dynamic sections here. */
15083
15084 static bfd_boolean
15085 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
15086 struct bfd_link_info * info,
15087 struct elf_link_hash_entry * h,
15088 Elf_Internal_Sym * sym)
15089 {
15090 struct elf32_arm_link_hash_table *htab;
15091 struct elf32_arm_link_hash_entry *eh;
15092
15093 htab = elf32_arm_hash_table (info);
15094 if (htab == NULL)
15095 return FALSE;
15096
15097 eh = (struct elf32_arm_link_hash_entry *) h;
15098
15099 if (h->plt.offset != (bfd_vma) -1)
15100 {
15101 if (!eh->is_iplt)
15102 {
15103 BFD_ASSERT (h->dynindx != -1);
15104 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
15105 h->dynindx, 0))
15106 return FALSE;
15107 }
15108
15109 if (!h->def_regular)
15110 {
15111 /* Mark the symbol as undefined, rather than as defined in
15112 the .plt section. */
15113 sym->st_shndx = SHN_UNDEF;
15114 /* If the symbol is weak we need to clear the value.
15115 Otherwise, the PLT entry would provide a definition for
15116 the symbol even if the symbol wasn't defined anywhere,
15117 and so the symbol would never be NULL. Leave the value if
15118 there were any relocations where pointer equality matters
15119 (this is a clue for the dynamic linker, to make function
15120 pointer comparisons work between an application and shared
15121 library). */
15122 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
15123 sym->st_value = 0;
15124 }
15125 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
15126 {
15127 /* At least one non-call relocation references this .iplt entry,
15128 so the .iplt entry is the function's canonical address. */
15129 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
15130 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
15131 sym->st_shndx = (_bfd_elf_section_from_bfd_section
15132 (output_bfd, htab->root.iplt->output_section));
15133 sym->st_value = (h->plt.offset
15134 + htab->root.iplt->output_section->vma
15135 + htab->root.iplt->output_offset);
15136 }
15137 }
15138
15139 if (h->needs_copy)
15140 {
15141 asection * s;
15142 Elf_Internal_Rela rel;
15143
15144 /* This symbol needs a copy reloc. Set it up. */
15145 BFD_ASSERT (h->dynindx != -1
15146 && (h->root.type == bfd_link_hash_defined
15147 || h->root.type == bfd_link_hash_defweak));
15148
15149 s = htab->srelbss;
15150 BFD_ASSERT (s != NULL);
15151
15152 rel.r_addend = 0;
15153 rel.r_offset = (h->root.u.def.value
15154 + h->root.u.def.section->output_section->vma
15155 + h->root.u.def.section->output_offset);
15156 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
15157 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
15158 }
15159
15160 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15161 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15162 to the ".got" section. */
15163 if (h == htab->root.hdynamic
15164 || (!htab->vxworks_p && h == htab->root.hgot))
15165 sym->st_shndx = SHN_ABS;
15166
15167 return TRUE;
15168 }
15169
15170 static void
15171 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15172 void *contents,
15173 const unsigned long *template, unsigned count)
15174 {
15175 unsigned ix;
15176
15177 for (ix = 0; ix != count; ix++)
15178 {
15179 unsigned long insn = template[ix];
15180
15181 /* Emit mov pc,rx if bx is not permitted. */
15182 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
15183 insn = (insn & 0xf000000f) | 0x01a0f000;
15184 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
15185 }
15186 }
15187
15188 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15189 other variants, NaCl needs this entry in a static executable's
15190 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15191 zero. For .iplt really only the last bundle is useful, and .iplt
15192 could have a shorter first entry, with each individual PLT entry's
15193 relative branch calculated differently so it targets the last
15194 bundle instead of the instruction before it (labelled .Lplt_tail
15195 above). But it's simpler to keep the size and layout of PLT0
15196 consistent with the dynamic case, at the cost of some dead code at
15197 the start of .iplt and the one dead store to the stack at the start
15198 of .Lplt_tail. */
15199 static void
15200 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15201 asection *plt, bfd_vma got_displacement)
15202 {
15203 unsigned int i;
15204
15205 put_arm_insn (htab, output_bfd,
15206 elf32_arm_nacl_plt0_entry[0]
15207 | arm_movw_immediate (got_displacement),
15208 plt->contents + 0);
15209 put_arm_insn (htab, output_bfd,
15210 elf32_arm_nacl_plt0_entry[1]
15211 | arm_movt_immediate (got_displacement),
15212 plt->contents + 4);
15213
15214 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
15215 put_arm_insn (htab, output_bfd,
15216 elf32_arm_nacl_plt0_entry[i],
15217 plt->contents + (i * 4));
15218 }
15219
15220 /* Finish up the dynamic sections. */
15221
15222 static bfd_boolean
15223 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
15224 {
15225 bfd * dynobj;
15226 asection * sgot;
15227 asection * sdyn;
15228 struct elf32_arm_link_hash_table *htab;
15229
15230 htab = elf32_arm_hash_table (info);
15231 if (htab == NULL)
15232 return FALSE;
15233
15234 dynobj = elf_hash_table (info)->dynobj;
15235
15236 sgot = htab->root.sgotplt;
15237 /* A broken linker script might have discarded the dynamic sections.
15238 Catch this here so that we do not seg-fault later on. */
15239 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
15240 return FALSE;
15241 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
15242
15243 if (elf_hash_table (info)->dynamic_sections_created)
15244 {
15245 asection *splt;
15246 Elf32_External_Dyn *dyncon, *dynconend;
15247
15248 splt = htab->root.splt;
15249 BFD_ASSERT (splt != NULL && sdyn != NULL);
15250 BFD_ASSERT (htab->symbian_p || sgot != NULL);
15251
15252 dyncon = (Elf32_External_Dyn *) sdyn->contents;
15253 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
15254
15255 for (; dyncon < dynconend; dyncon++)
15256 {
15257 Elf_Internal_Dyn dyn;
15258 const char * name;
15259 asection * s;
15260
15261 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
15262
15263 switch (dyn.d_tag)
15264 {
15265 unsigned int type;
15266
15267 default:
15268 if (htab->vxworks_p
15269 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
15270 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15271 break;
15272
15273 case DT_HASH:
15274 name = ".hash";
15275 goto get_vma_if_bpabi;
15276 case DT_STRTAB:
15277 name = ".dynstr";
15278 goto get_vma_if_bpabi;
15279 case DT_SYMTAB:
15280 name = ".dynsym";
15281 goto get_vma_if_bpabi;
15282 case DT_VERSYM:
15283 name = ".gnu.version";
15284 goto get_vma_if_bpabi;
15285 case DT_VERDEF:
15286 name = ".gnu.version_d";
15287 goto get_vma_if_bpabi;
15288 case DT_VERNEED:
15289 name = ".gnu.version_r";
15290 goto get_vma_if_bpabi;
15291
15292 case DT_PLTGOT:
15293 name = htab->symbian_p ? ".got" : ".got.plt";
15294 goto get_vma;
15295 case DT_JMPREL:
15296 name = RELOC_SECTION (htab, ".plt");
15297 get_vma:
15298 s = bfd_get_linker_section (dynobj, name);
15299 if (s == NULL)
15300 {
15301 (*_bfd_error_handler)
15302 (_("could not find section %s"), name);
15303 bfd_set_error (bfd_error_invalid_operation);
15304 return FALSE;
15305 }
15306 if (!htab->symbian_p)
15307 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
15308 else
15309 /* In the BPABI, tags in the PT_DYNAMIC section point
15310 at the file offset, not the memory address, for the
15311 convenience of the post linker. */
15312 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
15313 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15314 break;
15315
15316 get_vma_if_bpabi:
15317 if (htab->symbian_p)
15318 goto get_vma;
15319 break;
15320
15321 case DT_PLTRELSZ:
15322 s = htab->root.srelplt;
15323 BFD_ASSERT (s != NULL);
15324 dyn.d_un.d_val = s->size;
15325 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15326 break;
15327
15328 case DT_RELSZ:
15329 case DT_RELASZ:
15330 if (!htab->symbian_p)
15331 {
15332 /* My reading of the SVR4 ABI indicates that the
15333 procedure linkage table relocs (DT_JMPREL) should be
15334 included in the overall relocs (DT_REL). This is
15335 what Solaris does. However, UnixWare can not handle
15336 that case. Therefore, we override the DT_RELSZ entry
15337 here to make it not include the JMPREL relocs. Since
15338 the linker script arranges for .rel(a).plt to follow all
15339 other relocation sections, we don't have to worry
15340 about changing the DT_REL entry. */
15341 s = htab->root.srelplt;
15342 if (s != NULL)
15343 dyn.d_un.d_val -= s->size;
15344 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15345 break;
15346 }
15347 /* Fall through. */
15348
15349 case DT_REL:
15350 case DT_RELA:
15351 /* In the BPABI, the DT_REL tag must point at the file
15352 offset, not the VMA, of the first relocation
15353 section. So, we use code similar to that in
15354 elflink.c, but do not check for SHF_ALLOC on the
15355 relcoation section, since relocations sections are
15356 never allocated under the BPABI. The comments above
15357 about Unixware notwithstanding, we include all of the
15358 relocations here. */
15359 if (htab->symbian_p)
15360 {
15361 unsigned int i;
15362 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
15363 ? SHT_REL : SHT_RELA);
15364 dyn.d_un.d_val = 0;
15365 for (i = 1; i < elf_numsections (output_bfd); i++)
15366 {
15367 Elf_Internal_Shdr *hdr
15368 = elf_elfsections (output_bfd)[i];
15369 if (hdr->sh_type == type)
15370 {
15371 if (dyn.d_tag == DT_RELSZ
15372 || dyn.d_tag == DT_RELASZ)
15373 dyn.d_un.d_val += hdr->sh_size;
15374 else if ((ufile_ptr) hdr->sh_offset
15375 <= dyn.d_un.d_val - 1)
15376 dyn.d_un.d_val = hdr->sh_offset;
15377 }
15378 }
15379 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15380 }
15381 break;
15382
15383 case DT_TLSDESC_PLT:
15384 s = htab->root.splt;
15385 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15386 + htab->dt_tlsdesc_plt);
15387 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15388 break;
15389
15390 case DT_TLSDESC_GOT:
15391 s = htab->root.sgot;
15392 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15393 + htab->dt_tlsdesc_got);
15394 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15395 break;
15396
15397 /* Set the bottom bit of DT_INIT/FINI if the
15398 corresponding function is Thumb. */
15399 case DT_INIT:
15400 name = info->init_function;
15401 goto get_sym;
15402 case DT_FINI:
15403 name = info->fini_function;
15404 get_sym:
15405 /* If it wasn't set by elf_bfd_final_link
15406 then there is nothing to adjust. */
15407 if (dyn.d_un.d_val != 0)
15408 {
15409 struct elf_link_hash_entry * eh;
15410
15411 eh = elf_link_hash_lookup (elf_hash_table (info), name,
15412 FALSE, FALSE, TRUE);
15413 if (eh != NULL
15414 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
15415 == ST_BRANCH_TO_THUMB)
15416 {
15417 dyn.d_un.d_val |= 1;
15418 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15419 }
15420 }
15421 break;
15422 }
15423 }
15424
15425 /* Fill in the first entry in the procedure linkage table. */
15426 if (splt->size > 0 && htab->plt_header_size)
15427 {
15428 const bfd_vma *plt0_entry;
15429 bfd_vma got_address, plt_address, got_displacement;
15430
15431 /* Calculate the addresses of the GOT and PLT. */
15432 got_address = sgot->output_section->vma + sgot->output_offset;
15433 plt_address = splt->output_section->vma + splt->output_offset;
15434
15435 if (htab->vxworks_p)
15436 {
15437 /* The VxWorks GOT is relocated by the dynamic linker.
15438 Therefore, we must emit relocations rather than simply
15439 computing the values now. */
15440 Elf_Internal_Rela rel;
15441
15442 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
15443 put_arm_insn (htab, output_bfd, plt0_entry[0],
15444 splt->contents + 0);
15445 put_arm_insn (htab, output_bfd, plt0_entry[1],
15446 splt->contents + 4);
15447 put_arm_insn (htab, output_bfd, plt0_entry[2],
15448 splt->contents + 8);
15449 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
15450
15451 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15452 rel.r_offset = plt_address + 12;
15453 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15454 rel.r_addend = 0;
15455 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
15456 htab->srelplt2->contents);
15457 }
15458 else if (htab->nacl_p)
15459 arm_nacl_put_plt0 (htab, output_bfd, splt,
15460 got_address + 8 - (plt_address + 16));
15461 else if (using_thumb_only (htab))
15462 {
15463 got_displacement = got_address - (plt_address + 12);
15464
15465 plt0_entry = elf32_thumb2_plt0_entry;
15466 put_arm_insn (htab, output_bfd, plt0_entry[0],
15467 splt->contents + 0);
15468 put_arm_insn (htab, output_bfd, plt0_entry[1],
15469 splt->contents + 4);
15470 put_arm_insn (htab, output_bfd, plt0_entry[2],
15471 splt->contents + 8);
15472
15473 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
15474 }
15475 else
15476 {
15477 got_displacement = got_address - (plt_address + 16);
15478
15479 plt0_entry = elf32_arm_plt0_entry;
15480 put_arm_insn (htab, output_bfd, plt0_entry[0],
15481 splt->contents + 0);
15482 put_arm_insn (htab, output_bfd, plt0_entry[1],
15483 splt->contents + 4);
15484 put_arm_insn (htab, output_bfd, plt0_entry[2],
15485 splt->contents + 8);
15486 put_arm_insn (htab, output_bfd, plt0_entry[3],
15487 splt->contents + 12);
15488
15489 #ifdef FOUR_WORD_PLT
15490 /* The displacement value goes in the otherwise-unused
15491 last word of the second entry. */
15492 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
15493 #else
15494 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
15495 #endif
15496 }
15497 }
15498
15499 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15500 really seem like the right value. */
15501 if (splt->output_section->owner == output_bfd)
15502 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
15503
15504 if (htab->dt_tlsdesc_plt)
15505 {
15506 bfd_vma got_address
15507 = sgot->output_section->vma + sgot->output_offset;
15508 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
15509 + htab->root.sgot->output_offset);
15510 bfd_vma plt_address
15511 = splt->output_section->vma + splt->output_offset;
15512
15513 arm_put_trampoline (htab, output_bfd,
15514 splt->contents + htab->dt_tlsdesc_plt,
15515 dl_tlsdesc_lazy_trampoline, 6);
15516
15517 bfd_put_32 (output_bfd,
15518 gotplt_address + htab->dt_tlsdesc_got
15519 - (plt_address + htab->dt_tlsdesc_plt)
15520 - dl_tlsdesc_lazy_trampoline[6],
15521 splt->contents + htab->dt_tlsdesc_plt + 24);
15522 bfd_put_32 (output_bfd,
15523 got_address - (plt_address + htab->dt_tlsdesc_plt)
15524 - dl_tlsdesc_lazy_trampoline[7],
15525 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
15526 }
15527
15528 if (htab->tls_trampoline)
15529 {
15530 arm_put_trampoline (htab, output_bfd,
15531 splt->contents + htab->tls_trampoline,
15532 tls_trampoline, 3);
15533 #ifdef FOUR_WORD_PLT
15534 bfd_put_32 (output_bfd, 0x00000000,
15535 splt->contents + htab->tls_trampoline + 12);
15536 #endif
15537 }
15538
15539 if (htab->vxworks_p
15540 && !bfd_link_pic (info)
15541 && htab->root.splt->size > 0)
15542 {
15543 /* Correct the .rel(a).plt.unloaded relocations. They will have
15544 incorrect symbol indexes. */
15545 int num_plts;
15546 unsigned char *p;
15547
15548 num_plts = ((htab->root.splt->size - htab->plt_header_size)
15549 / htab->plt_entry_size);
15550 p = htab->srelplt2->contents + RELOC_SIZE (htab);
15551
15552 for (; num_plts; num_plts--)
15553 {
15554 Elf_Internal_Rela rel;
15555
15556 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15557 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15558 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15559 p += RELOC_SIZE (htab);
15560
15561 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15562 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
15563 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15564 p += RELOC_SIZE (htab);
15565 }
15566 }
15567 }
15568
15569 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
15570 /* NaCl uses a special first entry in .iplt too. */
15571 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
15572
15573 /* Fill in the first three entries in the global offset table. */
15574 if (sgot)
15575 {
15576 if (sgot->size > 0)
15577 {
15578 if (sdyn == NULL)
15579 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
15580 else
15581 bfd_put_32 (output_bfd,
15582 sdyn->output_section->vma + sdyn->output_offset,
15583 sgot->contents);
15584 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
15585 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
15586 }
15587
15588 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
15589 }
15590
15591 return TRUE;
15592 }
15593
15594 static void
15595 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
15596 {
15597 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
15598 struct elf32_arm_link_hash_table *globals;
15599 struct elf_segment_map *m;
15600
15601 i_ehdrp = elf_elfheader (abfd);
15602
15603 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
15604 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
15605 else
15606 _bfd_elf_post_process_headers (abfd, link_info);
15607 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
15608
15609 if (link_info)
15610 {
15611 globals = elf32_arm_hash_table (link_info);
15612 if (globals != NULL && globals->byteswap_code)
15613 i_ehdrp->e_flags |= EF_ARM_BE8;
15614 }
15615
15616 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
15617 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
15618 {
15619 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
15620 if (abi == AEABI_VFP_args_vfp)
15621 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
15622 else
15623 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
15624 }
15625
15626 /* Scan segment to set p_flags attribute if it contains only sections with
15627 SHF_ARM_NOREAD flag. */
15628 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
15629 {
15630 unsigned int j;
15631
15632 if (m->count == 0)
15633 continue;
15634 for (j = 0; j < m->count; j++)
15635 {
15636 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_NOREAD))
15637 break;
15638 }
15639 if (j == m->count)
15640 {
15641 m->p_flags = PF_X;
15642 m->p_flags_valid = 1;
15643 }
15644 }
15645 }
15646
15647 static enum elf_reloc_type_class
15648 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
15649 const asection *rel_sec ATTRIBUTE_UNUSED,
15650 const Elf_Internal_Rela *rela)
15651 {
15652 switch ((int) ELF32_R_TYPE (rela->r_info))
15653 {
15654 case R_ARM_RELATIVE:
15655 return reloc_class_relative;
15656 case R_ARM_JUMP_SLOT:
15657 return reloc_class_plt;
15658 case R_ARM_COPY:
15659 return reloc_class_copy;
15660 case R_ARM_IRELATIVE:
15661 return reloc_class_ifunc;
15662 default:
15663 return reloc_class_normal;
15664 }
15665 }
15666
15667 static void
15668 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
15669 {
15670 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
15671 }
15672
15673 /* Return TRUE if this is an unwinding table entry. */
15674
15675 static bfd_boolean
15676 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
15677 {
15678 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
15679 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
15680 }
15681
15682
15683 /* Set the type and flags for an ARM section. We do this by
15684 the section name, which is a hack, but ought to work. */
15685
15686 static bfd_boolean
15687 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
15688 {
15689 const char * name;
15690
15691 name = bfd_get_section_name (abfd, sec);
15692
15693 if (is_arm_elf_unwind_section_name (abfd, name))
15694 {
15695 hdr->sh_type = SHT_ARM_EXIDX;
15696 hdr->sh_flags |= SHF_LINK_ORDER;
15697 }
15698
15699 if (sec->flags & SEC_ELF_NOREAD)
15700 hdr->sh_flags |= SHF_ARM_NOREAD;
15701
15702 return TRUE;
15703 }
15704
15705 /* Handle an ARM specific section when reading an object file. This is
15706 called when bfd_section_from_shdr finds a section with an unknown
15707 type. */
15708
15709 static bfd_boolean
15710 elf32_arm_section_from_shdr (bfd *abfd,
15711 Elf_Internal_Shdr * hdr,
15712 const char *name,
15713 int shindex)
15714 {
15715 /* There ought to be a place to keep ELF backend specific flags, but
15716 at the moment there isn't one. We just keep track of the
15717 sections by their name, instead. Fortunately, the ABI gives
15718 names for all the ARM specific sections, so we will probably get
15719 away with this. */
15720 switch (hdr->sh_type)
15721 {
15722 case SHT_ARM_EXIDX:
15723 case SHT_ARM_PREEMPTMAP:
15724 case SHT_ARM_ATTRIBUTES:
15725 break;
15726
15727 default:
15728 return FALSE;
15729 }
15730
15731 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
15732 return FALSE;
15733
15734 return TRUE;
15735 }
15736
15737 static _arm_elf_section_data *
15738 get_arm_elf_section_data (asection * sec)
15739 {
15740 if (sec && sec->owner && is_arm_elf (sec->owner))
15741 return elf32_arm_section_data (sec);
15742 else
15743 return NULL;
15744 }
15745
15746 typedef struct
15747 {
15748 void *flaginfo;
15749 struct bfd_link_info *info;
15750 asection *sec;
15751 int sec_shndx;
15752 int (*func) (void *, const char *, Elf_Internal_Sym *,
15753 asection *, struct elf_link_hash_entry *);
15754 } output_arch_syminfo;
15755
15756 enum map_symbol_type
15757 {
15758 ARM_MAP_ARM,
15759 ARM_MAP_THUMB,
15760 ARM_MAP_DATA
15761 };
15762
15763
15764 /* Output a single mapping symbol. */
15765
15766 static bfd_boolean
15767 elf32_arm_output_map_sym (output_arch_syminfo *osi,
15768 enum map_symbol_type type,
15769 bfd_vma offset)
15770 {
15771 static const char *names[3] = {"$a", "$t", "$d"};
15772 Elf_Internal_Sym sym;
15773
15774 sym.st_value = osi->sec->output_section->vma
15775 + osi->sec->output_offset
15776 + offset;
15777 sym.st_size = 0;
15778 sym.st_other = 0;
15779 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
15780 sym.st_shndx = osi->sec_shndx;
15781 sym.st_target_internal = 0;
15782 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
15783 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
15784 }
15785
15786 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15787 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15788
15789 static bfd_boolean
15790 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
15791 bfd_boolean is_iplt_entry_p,
15792 union gotplt_union *root_plt,
15793 struct arm_plt_info *arm_plt)
15794 {
15795 struct elf32_arm_link_hash_table *htab;
15796 bfd_vma addr, plt_header_size;
15797
15798 if (root_plt->offset == (bfd_vma) -1)
15799 return TRUE;
15800
15801 htab = elf32_arm_hash_table (osi->info);
15802 if (htab == NULL)
15803 return FALSE;
15804
15805 if (is_iplt_entry_p)
15806 {
15807 osi->sec = htab->root.iplt;
15808 plt_header_size = 0;
15809 }
15810 else
15811 {
15812 osi->sec = htab->root.splt;
15813 plt_header_size = htab->plt_header_size;
15814 }
15815 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
15816 (osi->info->output_bfd, osi->sec->output_section));
15817
15818 addr = root_plt->offset & -2;
15819 if (htab->symbian_p)
15820 {
15821 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15822 return FALSE;
15823 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
15824 return FALSE;
15825 }
15826 else if (htab->vxworks_p)
15827 {
15828 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15829 return FALSE;
15830 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
15831 return FALSE;
15832 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
15833 return FALSE;
15834 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
15835 return FALSE;
15836 }
15837 else if (htab->nacl_p)
15838 {
15839 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15840 return FALSE;
15841 }
15842 else if (using_thumb_only (htab))
15843 {
15844 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
15845 return FALSE;
15846 }
15847 else
15848 {
15849 bfd_boolean thumb_stub_p;
15850
15851 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
15852 if (thumb_stub_p)
15853 {
15854 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
15855 return FALSE;
15856 }
15857 #ifdef FOUR_WORD_PLT
15858 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15859 return FALSE;
15860 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
15861 return FALSE;
15862 #else
15863 /* A three-word PLT with no Thumb thunk contains only Arm code,
15864 so only need to output a mapping symbol for the first PLT entry and
15865 entries with thumb thunks. */
15866 if (thumb_stub_p || addr == plt_header_size)
15867 {
15868 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15869 return FALSE;
15870 }
15871 #endif
15872 }
15873
15874 return TRUE;
15875 }
15876
15877 /* Output mapping symbols for PLT entries associated with H. */
15878
15879 static bfd_boolean
15880 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
15881 {
15882 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
15883 struct elf32_arm_link_hash_entry *eh;
15884
15885 if (h->root.type == bfd_link_hash_indirect)
15886 return TRUE;
15887
15888 if (h->root.type == bfd_link_hash_warning)
15889 /* When warning symbols are created, they **replace** the "real"
15890 entry in the hash table, thus we never get to see the real
15891 symbol in a hash traversal. So look at it now. */
15892 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15893
15894 eh = (struct elf32_arm_link_hash_entry *) h;
15895 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
15896 &h->plt, &eh->plt);
15897 }
15898
15899 /* Bind a veneered symbol to its veneer identified by its hash entry
15900 STUB_ENTRY. The veneered location thus loose its symbol. */
15901
15902 static void
15903 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
15904 {
15905 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
15906
15907 BFD_ASSERT (hash);
15908 hash->root.root.u.def.section = stub_entry->stub_sec;
15909 hash->root.root.u.def.value = stub_entry->stub_offset;
15910 hash->root.size = stub_entry->stub_size;
15911 }
15912
15913 /* Output a single local symbol for a generated stub. */
15914
15915 static bfd_boolean
15916 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
15917 bfd_vma offset, bfd_vma size)
15918 {
15919 Elf_Internal_Sym sym;
15920
15921 sym.st_value = osi->sec->output_section->vma
15922 + osi->sec->output_offset
15923 + offset;
15924 sym.st_size = size;
15925 sym.st_other = 0;
15926 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15927 sym.st_shndx = osi->sec_shndx;
15928 sym.st_target_internal = 0;
15929 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
15930 }
15931
15932 static bfd_boolean
15933 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
15934 void * in_arg)
15935 {
15936 struct elf32_arm_stub_hash_entry *stub_entry;
15937 asection *stub_sec;
15938 bfd_vma addr;
15939 char *stub_name;
15940 output_arch_syminfo *osi;
15941 const insn_sequence *template_sequence;
15942 enum stub_insn_type prev_type;
15943 int size;
15944 int i;
15945 enum map_symbol_type sym_type;
15946
15947 /* Massage our args to the form they really have. */
15948 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15949 osi = (output_arch_syminfo *) in_arg;
15950
15951 stub_sec = stub_entry->stub_sec;
15952
15953 /* Ensure this stub is attached to the current section being
15954 processed. */
15955 if (stub_sec != osi->sec)
15956 return TRUE;
15957
15958 addr = (bfd_vma) stub_entry->stub_offset;
15959 template_sequence = stub_entry->stub_template;
15960
15961 if (arm_stub_sym_claimed (stub_entry->stub_type))
15962 arm_stub_claim_sym (stub_entry);
15963 else
15964 {
15965 stub_name = stub_entry->output_name;
15966 switch (template_sequence[0].type)
15967 {
15968 case ARM_TYPE:
15969 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
15970 stub_entry->stub_size))
15971 return FALSE;
15972 break;
15973 case THUMB16_TYPE:
15974 case THUMB32_TYPE:
15975 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15976 stub_entry->stub_size))
15977 return FALSE;
15978 break;
15979 default:
15980 BFD_FAIL ();
15981 return 0;
15982 }
15983 }
15984
15985 prev_type = DATA_TYPE;
15986 size = 0;
15987 for (i = 0; i < stub_entry->stub_template_size; i++)
15988 {
15989 switch (template_sequence[i].type)
15990 {
15991 case ARM_TYPE:
15992 sym_type = ARM_MAP_ARM;
15993 break;
15994
15995 case THUMB16_TYPE:
15996 case THUMB32_TYPE:
15997 sym_type = ARM_MAP_THUMB;
15998 break;
15999
16000 case DATA_TYPE:
16001 sym_type = ARM_MAP_DATA;
16002 break;
16003
16004 default:
16005 BFD_FAIL ();
16006 return FALSE;
16007 }
16008
16009 if (template_sequence[i].type != prev_type)
16010 {
16011 prev_type = template_sequence[i].type;
16012 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
16013 return FALSE;
16014 }
16015
16016 switch (template_sequence[i].type)
16017 {
16018 case ARM_TYPE:
16019 case THUMB32_TYPE:
16020 size += 4;
16021 break;
16022
16023 case THUMB16_TYPE:
16024 size += 2;
16025 break;
16026
16027 case DATA_TYPE:
16028 size += 4;
16029 break;
16030
16031 default:
16032 BFD_FAIL ();
16033 return FALSE;
16034 }
16035 }
16036
16037 return TRUE;
16038 }
16039
16040 /* Output mapping symbols for linker generated sections,
16041 and for those data-only sections that do not have a
16042 $d. */
16043
16044 static bfd_boolean
16045 elf32_arm_output_arch_local_syms (bfd *output_bfd,
16046 struct bfd_link_info *info,
16047 void *flaginfo,
16048 int (*func) (void *, const char *,
16049 Elf_Internal_Sym *,
16050 asection *,
16051 struct elf_link_hash_entry *))
16052 {
16053 output_arch_syminfo osi;
16054 struct elf32_arm_link_hash_table *htab;
16055 bfd_vma offset;
16056 bfd_size_type size;
16057 bfd *input_bfd;
16058
16059 htab = elf32_arm_hash_table (info);
16060 if (htab == NULL)
16061 return FALSE;
16062
16063 check_use_blx (htab);
16064
16065 osi.flaginfo = flaginfo;
16066 osi.info = info;
16067 osi.func = func;
16068
16069 /* Add a $d mapping symbol to data-only sections that
16070 don't have any mapping symbol. This may result in (harmless) redundant
16071 mapping symbols. */
16072 for (input_bfd = info->input_bfds;
16073 input_bfd != NULL;
16074 input_bfd = input_bfd->link.next)
16075 {
16076 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
16077 for (osi.sec = input_bfd->sections;
16078 osi.sec != NULL;
16079 osi.sec = osi.sec->next)
16080 {
16081 if (osi.sec->output_section != NULL
16082 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
16083 != 0)
16084 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
16085 == SEC_HAS_CONTENTS
16086 && get_arm_elf_section_data (osi.sec) != NULL
16087 && get_arm_elf_section_data (osi.sec)->mapcount == 0
16088 && osi.sec->size > 0
16089 && (osi.sec->flags & SEC_EXCLUDE) == 0)
16090 {
16091 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16092 (output_bfd, osi.sec->output_section);
16093 if (osi.sec_shndx != (int)SHN_BAD)
16094 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
16095 }
16096 }
16097 }
16098
16099 /* ARM->Thumb glue. */
16100 if (htab->arm_glue_size > 0)
16101 {
16102 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16103 ARM2THUMB_GLUE_SECTION_NAME);
16104
16105 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16106 (output_bfd, osi.sec->output_section);
16107 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
16108 || htab->pic_veneer)
16109 size = ARM2THUMB_PIC_GLUE_SIZE;
16110 else if (htab->use_blx)
16111 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
16112 else
16113 size = ARM2THUMB_STATIC_GLUE_SIZE;
16114
16115 for (offset = 0; offset < htab->arm_glue_size; offset += size)
16116 {
16117 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
16118 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
16119 }
16120 }
16121
16122 /* Thumb->ARM glue. */
16123 if (htab->thumb_glue_size > 0)
16124 {
16125 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16126 THUMB2ARM_GLUE_SECTION_NAME);
16127
16128 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16129 (output_bfd, osi.sec->output_section);
16130 size = THUMB2ARM_GLUE_SIZE;
16131
16132 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
16133 {
16134 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
16135 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
16136 }
16137 }
16138
16139 /* ARMv4 BX veneers. */
16140 if (htab->bx_glue_size > 0)
16141 {
16142 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16143 ARM_BX_GLUE_SECTION_NAME);
16144
16145 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16146 (output_bfd, osi.sec->output_section);
16147
16148 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
16149 }
16150
16151 /* Long calls stubs. */
16152 if (htab->stub_bfd && htab->stub_bfd->sections)
16153 {
16154 asection* stub_sec;
16155
16156 for (stub_sec = htab->stub_bfd->sections;
16157 stub_sec != NULL;
16158 stub_sec = stub_sec->next)
16159 {
16160 /* Ignore non-stub sections. */
16161 if (!strstr (stub_sec->name, STUB_SUFFIX))
16162 continue;
16163
16164 osi.sec = stub_sec;
16165
16166 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16167 (output_bfd, osi.sec->output_section);
16168
16169 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
16170 }
16171 }
16172
16173 /* Finally, output mapping symbols for the PLT. */
16174 if (htab->root.splt && htab->root.splt->size > 0)
16175 {
16176 osi.sec = htab->root.splt;
16177 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16178 (output_bfd, osi.sec->output_section));
16179
16180 /* Output mapping symbols for the plt header. SymbianOS does not have a
16181 plt header. */
16182 if (htab->vxworks_p)
16183 {
16184 /* VxWorks shared libraries have no PLT header. */
16185 if (!bfd_link_pic (info))
16186 {
16187 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16188 return FALSE;
16189 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16190 return FALSE;
16191 }
16192 }
16193 else if (htab->nacl_p)
16194 {
16195 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16196 return FALSE;
16197 }
16198 else if (using_thumb_only (htab))
16199 {
16200 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
16201 return FALSE;
16202 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16203 return FALSE;
16204 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
16205 return FALSE;
16206 }
16207 else if (!htab->symbian_p)
16208 {
16209 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16210 return FALSE;
16211 #ifndef FOUR_WORD_PLT
16212 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
16213 return FALSE;
16214 #endif
16215 }
16216 }
16217 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
16218 {
16219 /* NaCl uses a special first entry in .iplt too. */
16220 osi.sec = htab->root.iplt;
16221 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16222 (output_bfd, osi.sec->output_section));
16223 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16224 return FALSE;
16225 }
16226 if ((htab->root.splt && htab->root.splt->size > 0)
16227 || (htab->root.iplt && htab->root.iplt->size > 0))
16228 {
16229 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
16230 for (input_bfd = info->input_bfds;
16231 input_bfd != NULL;
16232 input_bfd = input_bfd->link.next)
16233 {
16234 struct arm_local_iplt_info **local_iplt;
16235 unsigned int i, num_syms;
16236
16237 local_iplt = elf32_arm_local_iplt (input_bfd);
16238 if (local_iplt != NULL)
16239 {
16240 num_syms = elf_symtab_hdr (input_bfd).sh_info;
16241 for (i = 0; i < num_syms; i++)
16242 if (local_iplt[i] != NULL
16243 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
16244 &local_iplt[i]->root,
16245 &local_iplt[i]->arm))
16246 return FALSE;
16247 }
16248 }
16249 }
16250 if (htab->dt_tlsdesc_plt != 0)
16251 {
16252 /* Mapping symbols for the lazy tls trampoline. */
16253 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
16254 return FALSE;
16255
16256 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16257 htab->dt_tlsdesc_plt + 24))
16258 return FALSE;
16259 }
16260 if (htab->tls_trampoline != 0)
16261 {
16262 /* Mapping symbols for the tls trampoline. */
16263 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
16264 return FALSE;
16265 #ifdef FOUR_WORD_PLT
16266 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16267 htab->tls_trampoline + 12))
16268 return FALSE;
16269 #endif
16270 }
16271
16272 return TRUE;
16273 }
16274
16275 /* Allocate target specific section data. */
16276
16277 static bfd_boolean
16278 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
16279 {
16280 if (!sec->used_by_bfd)
16281 {
16282 _arm_elf_section_data *sdata;
16283 bfd_size_type amt = sizeof (*sdata);
16284
16285 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
16286 if (sdata == NULL)
16287 return FALSE;
16288 sec->used_by_bfd = sdata;
16289 }
16290
16291 return _bfd_elf_new_section_hook (abfd, sec);
16292 }
16293
16294
16295 /* Used to order a list of mapping symbols by address. */
16296
16297 static int
16298 elf32_arm_compare_mapping (const void * a, const void * b)
16299 {
16300 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
16301 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
16302
16303 if (amap->vma > bmap->vma)
16304 return 1;
16305 else if (amap->vma < bmap->vma)
16306 return -1;
16307 else if (amap->type > bmap->type)
16308 /* Ensure results do not depend on the host qsort for objects with
16309 multiple mapping symbols at the same address by sorting on type
16310 after vma. */
16311 return 1;
16312 else if (amap->type < bmap->type)
16313 return -1;
16314 else
16315 return 0;
16316 }
16317
16318 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16319
16320 static unsigned long
16321 offset_prel31 (unsigned long addr, bfd_vma offset)
16322 {
16323 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
16324 }
16325
16326 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16327 relocations. */
16328
16329 static void
16330 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
16331 {
16332 unsigned long first_word = bfd_get_32 (output_bfd, from);
16333 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
16334
16335 /* High bit of first word is supposed to be zero. */
16336 if ((first_word & 0x80000000ul) == 0)
16337 first_word = offset_prel31 (first_word, offset);
16338
16339 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16340 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16341 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
16342 second_word = offset_prel31 (second_word, offset);
16343
16344 bfd_put_32 (output_bfd, first_word, to);
16345 bfd_put_32 (output_bfd, second_word, to + 4);
16346 }
16347
16348 /* Data for make_branch_to_a8_stub(). */
16349
16350 struct a8_branch_to_stub_data
16351 {
16352 asection *writing_section;
16353 bfd_byte *contents;
16354 };
16355
16356
16357 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16358 places for a particular section. */
16359
16360 static bfd_boolean
16361 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
16362 void *in_arg)
16363 {
16364 struct elf32_arm_stub_hash_entry *stub_entry;
16365 struct a8_branch_to_stub_data *data;
16366 bfd_byte *contents;
16367 unsigned long branch_insn;
16368 bfd_vma veneered_insn_loc, veneer_entry_loc;
16369 bfd_signed_vma branch_offset;
16370 bfd *abfd;
16371 unsigned int loc;
16372
16373 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16374 data = (struct a8_branch_to_stub_data *) in_arg;
16375
16376 if (stub_entry->target_section != data->writing_section
16377 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
16378 return TRUE;
16379
16380 contents = data->contents;
16381
16382 /* We use target_section as Cortex-A8 erratum workaround stubs are only
16383 generated when both source and target are in the same section. */
16384 veneered_insn_loc = stub_entry->target_section->output_section->vma
16385 + stub_entry->target_section->output_offset
16386 + stub_entry->source_value;
16387
16388 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
16389 + stub_entry->stub_sec->output_offset
16390 + stub_entry->stub_offset;
16391
16392 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
16393 veneered_insn_loc &= ~3u;
16394
16395 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
16396
16397 abfd = stub_entry->target_section->owner;
16398 loc = stub_entry->source_value;
16399
16400 /* We attempt to avoid this condition by setting stubs_always_after_branch
16401 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16402 This check is just to be on the safe side... */
16403 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
16404 {
16405 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
16406 "allocated in unsafe location"), abfd);
16407 return FALSE;
16408 }
16409
16410 switch (stub_entry->stub_type)
16411 {
16412 case arm_stub_a8_veneer_b:
16413 case arm_stub_a8_veneer_b_cond:
16414 branch_insn = 0xf0009000;
16415 goto jump24;
16416
16417 case arm_stub_a8_veneer_blx:
16418 branch_insn = 0xf000e800;
16419 goto jump24;
16420
16421 case arm_stub_a8_veneer_bl:
16422 {
16423 unsigned int i1, j1, i2, j2, s;
16424
16425 branch_insn = 0xf000d000;
16426
16427 jump24:
16428 if (branch_offset < -16777216 || branch_offset > 16777214)
16429 {
16430 /* There's not much we can do apart from complain if this
16431 happens. */
16432 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
16433 "of range (input file too large)"), abfd);
16434 return FALSE;
16435 }
16436
16437 /* i1 = not(j1 eor s), so:
16438 not i1 = j1 eor s
16439 j1 = (not i1) eor s. */
16440
16441 branch_insn |= (branch_offset >> 1) & 0x7ff;
16442 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
16443 i2 = (branch_offset >> 22) & 1;
16444 i1 = (branch_offset >> 23) & 1;
16445 s = (branch_offset >> 24) & 1;
16446 j1 = (!i1) ^ s;
16447 j2 = (!i2) ^ s;
16448 branch_insn |= j2 << 11;
16449 branch_insn |= j1 << 13;
16450 branch_insn |= s << 26;
16451 }
16452 break;
16453
16454 default:
16455 BFD_FAIL ();
16456 return FALSE;
16457 }
16458
16459 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
16460 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
16461
16462 return TRUE;
16463 }
16464
16465 /* Beginning of stm32l4xx work-around. */
16466
16467 /* Functions encoding instructions necessary for the emission of the
16468 fix-stm32l4xx-629360.
16469 Encoding is extracted from the
16470 ARM (C) Architecture Reference Manual
16471 ARMv7-A and ARMv7-R edition
16472 ARM DDI 0406C.b (ID072512). */
16473
16474 static inline bfd_vma
16475 create_instruction_branch_absolute (int branch_offset)
16476 {
16477 /* A8.8.18 B (A8-334)
16478 B target_address (Encoding T4). */
16479 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16480 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16481 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16482
16483 int s = ((branch_offset & 0x1000000) >> 24);
16484 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
16485 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
16486
16487 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
16488 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16489
16490 bfd_vma patched_inst = 0xf0009000
16491 | s << 26 /* S. */
16492 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
16493 | j1 << 13 /* J1. */
16494 | j2 << 11 /* J2. */
16495 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
16496
16497 return patched_inst;
16498 }
16499
16500 static inline bfd_vma
16501 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
16502 {
16503 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16504 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16505 bfd_vma patched_inst = 0xe8900000
16506 | (/*W=*/wback << 21)
16507 | (base_reg << 16)
16508 | (reg_mask & 0x0000ffff);
16509
16510 return patched_inst;
16511 }
16512
16513 static inline bfd_vma
16514 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
16515 {
16516 /* A8.8.60 LDMDB/LDMEA (A8-402)
16517 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16518 bfd_vma patched_inst = 0xe9100000
16519 | (/*W=*/wback << 21)
16520 | (base_reg << 16)
16521 | (reg_mask & 0x0000ffff);
16522
16523 return patched_inst;
16524 }
16525
16526 static inline bfd_vma
16527 create_instruction_mov (int target_reg, int source_reg)
16528 {
16529 /* A8.8.103 MOV (register) (A8-486)
16530 MOV Rd, Rm (Encoding T1). */
16531 bfd_vma patched_inst = 0x4600
16532 | (target_reg & 0x7)
16533 | ((target_reg & 0x8) >> 3) << 7
16534 | (source_reg << 3);
16535
16536 return patched_inst;
16537 }
16538
16539 static inline bfd_vma
16540 create_instruction_sub (int target_reg, int source_reg, int value)
16541 {
16542 /* A8.8.221 SUB (immediate) (A8-708)
16543 SUB Rd, Rn, #value (Encoding T3). */
16544 bfd_vma patched_inst = 0xf1a00000
16545 | (target_reg << 8)
16546 | (source_reg << 16)
16547 | (/*S=*/0 << 20)
16548 | ((value & 0x800) >> 11) << 26
16549 | ((value & 0x700) >> 8) << 12
16550 | (value & 0x0ff);
16551
16552 return patched_inst;
16553 }
16554
16555 static inline bfd_vma
16556 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
16557 int first_reg)
16558 {
16559 /* A8.8.332 VLDM (A8-922)
16560 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
16561 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
16562 | (/*W=*/wback << 21)
16563 | (base_reg << 16)
16564 | (num_words & 0x000000ff)
16565 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
16566 | (first_reg & 0x00000001) << 22;
16567
16568 return patched_inst;
16569 }
16570
16571 static inline bfd_vma
16572 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
16573 int first_reg)
16574 {
16575 /* A8.8.332 VLDM (A8-922)
16576 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
16577 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
16578 | (base_reg << 16)
16579 | (num_words & 0x000000ff)
16580 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
16581 | (first_reg & 0x00000001) << 22;
16582
16583 return patched_inst;
16584 }
16585
16586 static inline bfd_vma
16587 create_instruction_udf_w (int value)
16588 {
16589 /* A8.8.247 UDF (A8-758)
16590 Undefined (Encoding T2). */
16591 bfd_vma patched_inst = 0xf7f0a000
16592 | (value & 0x00000fff)
16593 | (value & 0x000f0000) << 16;
16594
16595 return patched_inst;
16596 }
16597
16598 static inline bfd_vma
16599 create_instruction_udf (int value)
16600 {
16601 /* A8.8.247 UDF (A8-758)
16602 Undefined (Encoding T1). */
16603 bfd_vma patched_inst = 0xde00
16604 | (value & 0xff);
16605
16606 return patched_inst;
16607 }
16608
16609 /* Functions writing an instruction in memory, returning the next
16610 memory position to write to. */
16611
16612 static inline bfd_byte *
16613 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
16614 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16615 {
16616 put_thumb2_insn (htab, output_bfd, insn, pt);
16617 return pt + 4;
16618 }
16619
16620 static inline bfd_byte *
16621 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
16622 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16623 {
16624 put_thumb_insn (htab, output_bfd, insn, pt);
16625 return pt + 2;
16626 }
16627
16628 /* Function filling up a region in memory with T1 and T2 UDFs taking
16629 care of alignment. */
16630
16631 static bfd_byte *
16632 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
16633 bfd * output_bfd,
16634 const bfd_byte * const base_stub_contents,
16635 bfd_byte * const from_stub_contents,
16636 const bfd_byte * const end_stub_contents)
16637 {
16638 bfd_byte *current_stub_contents = from_stub_contents;
16639
16640 /* Fill the remaining of the stub with deterministic contents : UDF
16641 instructions.
16642 Check if realignment is needed on modulo 4 frontier using T1, to
16643 further use T2. */
16644 if ((current_stub_contents < end_stub_contents)
16645 && !((current_stub_contents - base_stub_contents) % 2)
16646 && ((current_stub_contents - base_stub_contents) % 4))
16647 current_stub_contents =
16648 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16649 create_instruction_udf (0));
16650
16651 for (; current_stub_contents < end_stub_contents;)
16652 current_stub_contents =
16653 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16654 create_instruction_udf_w (0));
16655
16656 return current_stub_contents;
16657 }
16658
16659 /* Functions writing the stream of instructions equivalent to the
16660 derived sequence for ldmia, ldmdb, vldm respectively. */
16661
16662 static void
16663 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
16664 bfd * output_bfd,
16665 const insn32 initial_insn,
16666 const bfd_byte *const initial_insn_addr,
16667 bfd_byte *const base_stub_contents)
16668 {
16669 int wback = (initial_insn & 0x00200000) >> 21;
16670 int ri, rn = (initial_insn & 0x000F0000) >> 16;
16671 int insn_all_registers = initial_insn & 0x0000ffff;
16672 int insn_low_registers, insn_high_registers;
16673 int usable_register_mask;
16674 int nb_registers = popcount (insn_all_registers);
16675 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16676 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16677 bfd_byte *current_stub_contents = base_stub_contents;
16678
16679 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
16680
16681 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16682 smaller than 8 registers load sequences that do not cause the
16683 hardware issue. */
16684 if (nb_registers <= 8)
16685 {
16686 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16687 current_stub_contents =
16688 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16689 initial_insn);
16690
16691 /* B initial_insn_addr+4. */
16692 if (!restore_pc)
16693 current_stub_contents =
16694 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16695 create_instruction_branch_absolute
16696 (initial_insn_addr - current_stub_contents));
16697
16698
16699 /* Fill the remaining of the stub with deterministic contents. */
16700 current_stub_contents =
16701 stm32l4xx_fill_stub_udf (htab, output_bfd,
16702 base_stub_contents, current_stub_contents,
16703 base_stub_contents +
16704 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16705
16706 return;
16707 }
16708
16709 /* - reg_list[13] == 0. */
16710 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
16711
16712 /* - reg_list[14] & reg_list[15] != 1. */
16713 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16714
16715 /* - if (wback==1) reg_list[rn] == 0. */
16716 BFD_ASSERT (!wback || !restore_rn);
16717
16718 /* - nb_registers > 8. */
16719 BFD_ASSERT (popcount (insn_all_registers) > 8);
16720
16721 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16722
16723 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16724 - One with the 7 lowest registers (register mask 0x007F)
16725 This LDM will finally contain between 2 and 7 registers
16726 - One with the 7 highest registers (register mask 0xDF80)
16727 This ldm will finally contain between 2 and 7 registers. */
16728 insn_low_registers = insn_all_registers & 0x007F;
16729 insn_high_registers = insn_all_registers & 0xDF80;
16730
16731 /* A spare register may be needed during this veneer to temporarily
16732 handle the base register. This register will be restored with the
16733 last LDM operation.
16734 The usable register may be any general purpose register (that
16735 excludes PC, SP, LR : register mask is 0x1FFF). */
16736 usable_register_mask = 0x1FFF;
16737
16738 /* Generate the stub function. */
16739 if (wback)
16740 {
16741 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16742 current_stub_contents =
16743 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16744 create_instruction_ldmia
16745 (rn, /*wback=*/1, insn_low_registers));
16746
16747 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16748 current_stub_contents =
16749 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16750 create_instruction_ldmia
16751 (rn, /*wback=*/1, insn_high_registers));
16752 if (!restore_pc)
16753 {
16754 /* B initial_insn_addr+4. */
16755 current_stub_contents =
16756 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16757 create_instruction_branch_absolute
16758 (initial_insn_addr - current_stub_contents));
16759 }
16760 }
16761 else /* if (!wback). */
16762 {
16763 ri = rn;
16764
16765 /* If Rn is not part of the high-register-list, move it there. */
16766 if (!(insn_high_registers & (1 << rn)))
16767 {
16768 /* Choose a Ri in the high-register-list that will be restored. */
16769 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16770
16771 /* MOV Ri, Rn. */
16772 current_stub_contents =
16773 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16774 create_instruction_mov (ri, rn));
16775 }
16776
16777 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16778 current_stub_contents =
16779 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16780 create_instruction_ldmia
16781 (ri, /*wback=*/1, insn_low_registers));
16782
16783 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16784 current_stub_contents =
16785 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16786 create_instruction_ldmia
16787 (ri, /*wback=*/0, insn_high_registers));
16788
16789 if (!restore_pc)
16790 {
16791 /* B initial_insn_addr+4. */
16792 current_stub_contents =
16793 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16794 create_instruction_branch_absolute
16795 (initial_insn_addr - current_stub_contents));
16796 }
16797 }
16798
16799 /* Fill the remaining of the stub with deterministic contents. */
16800 current_stub_contents =
16801 stm32l4xx_fill_stub_udf (htab, output_bfd,
16802 base_stub_contents, current_stub_contents,
16803 base_stub_contents +
16804 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16805 }
16806
16807 static void
16808 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
16809 bfd * output_bfd,
16810 const insn32 initial_insn,
16811 const bfd_byte *const initial_insn_addr,
16812 bfd_byte *const base_stub_contents)
16813 {
16814 int wback = (initial_insn & 0x00200000) >> 21;
16815 int ri, rn = (initial_insn & 0x000f0000) >> 16;
16816 int insn_all_registers = initial_insn & 0x0000ffff;
16817 int insn_low_registers, insn_high_registers;
16818 int usable_register_mask;
16819 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16820 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16821 int nb_registers = popcount (insn_all_registers);
16822 bfd_byte *current_stub_contents = base_stub_contents;
16823
16824 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
16825
16826 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16827 smaller than 8 registers load sequences that do not cause the
16828 hardware issue. */
16829 if (nb_registers <= 8)
16830 {
16831 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16832 current_stub_contents =
16833 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16834 initial_insn);
16835
16836 /* B initial_insn_addr+4. */
16837 current_stub_contents =
16838 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16839 create_instruction_branch_absolute
16840 (initial_insn_addr - current_stub_contents));
16841
16842 /* Fill the remaining of the stub with deterministic contents. */
16843 current_stub_contents =
16844 stm32l4xx_fill_stub_udf (htab, output_bfd,
16845 base_stub_contents, current_stub_contents,
16846 base_stub_contents +
16847 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16848
16849 return;
16850 }
16851
16852 /* - reg_list[13] == 0. */
16853 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
16854
16855 /* - reg_list[14] & reg_list[15] != 1. */
16856 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16857
16858 /* - if (wback==1) reg_list[rn] == 0. */
16859 BFD_ASSERT (!wback || !restore_rn);
16860
16861 /* - nb_registers > 8. */
16862 BFD_ASSERT (popcount (insn_all_registers) > 8);
16863
16864 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16865
16866 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16867 - One with the 7 lowest registers (register mask 0x007F)
16868 This LDM will finally contain between 2 and 7 registers
16869 - One with the 7 highest registers (register mask 0xDF80)
16870 This ldm will finally contain between 2 and 7 registers. */
16871 insn_low_registers = insn_all_registers & 0x007F;
16872 insn_high_registers = insn_all_registers & 0xDF80;
16873
16874 /* A spare register may be needed during this veneer to temporarily
16875 handle the base register. This register will be restored with
16876 the last LDM operation.
16877 The usable register may be any general purpose register (that excludes
16878 PC, SP, LR : register mask is 0x1FFF). */
16879 usable_register_mask = 0x1FFF;
16880
16881 /* Generate the stub function. */
16882 if (!wback && !restore_pc && !restore_rn)
16883 {
16884 /* Choose a Ri in the low-register-list that will be restored. */
16885 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16886
16887 /* MOV Ri, Rn. */
16888 current_stub_contents =
16889 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16890 create_instruction_mov (ri, rn));
16891
16892 /* LDMDB Ri!, {R-high-register-list}. */
16893 current_stub_contents =
16894 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16895 create_instruction_ldmdb
16896 (ri, /*wback=*/1, insn_high_registers));
16897
16898 /* LDMDB Ri, {R-low-register-list}. */
16899 current_stub_contents =
16900 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16901 create_instruction_ldmdb
16902 (ri, /*wback=*/0, insn_low_registers));
16903
16904 /* B initial_insn_addr+4. */
16905 current_stub_contents =
16906 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16907 create_instruction_branch_absolute
16908 (initial_insn_addr - current_stub_contents));
16909 }
16910 else if (wback && !restore_pc && !restore_rn)
16911 {
16912 /* LDMDB Rn!, {R-high-register-list}. */
16913 current_stub_contents =
16914 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16915 create_instruction_ldmdb
16916 (rn, /*wback=*/1, insn_high_registers));
16917
16918 /* LDMDB Rn!, {R-low-register-list}. */
16919 current_stub_contents =
16920 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16921 create_instruction_ldmdb
16922 (rn, /*wback=*/1, insn_low_registers));
16923
16924 /* B initial_insn_addr+4. */
16925 current_stub_contents =
16926 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16927 create_instruction_branch_absolute
16928 (initial_insn_addr - current_stub_contents));
16929 }
16930 else if (!wback && restore_pc && !restore_rn)
16931 {
16932 /* Choose a Ri in the high-register-list that will be restored. */
16933 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16934
16935 /* SUB Ri, Rn, #(4*nb_registers). */
16936 current_stub_contents =
16937 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16938 create_instruction_sub (ri, rn, (4 * nb_registers)));
16939
16940 /* LDMIA Ri!, {R-low-register-list}. */
16941 current_stub_contents =
16942 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16943 create_instruction_ldmia
16944 (ri, /*wback=*/1, insn_low_registers));
16945
16946 /* LDMIA Ri, {R-high-register-list}. */
16947 current_stub_contents =
16948 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16949 create_instruction_ldmia
16950 (ri, /*wback=*/0, insn_high_registers));
16951 }
16952 else if (wback && restore_pc && !restore_rn)
16953 {
16954 /* Choose a Ri in the high-register-list that will be restored. */
16955 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16956
16957 /* SUB Rn, Rn, #(4*nb_registers) */
16958 current_stub_contents =
16959 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16960 create_instruction_sub (rn, rn, (4 * nb_registers)));
16961
16962 /* MOV Ri, Rn. */
16963 current_stub_contents =
16964 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16965 create_instruction_mov (ri, rn));
16966
16967 /* LDMIA Ri!, {R-low-register-list}. */
16968 current_stub_contents =
16969 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16970 create_instruction_ldmia
16971 (ri, /*wback=*/1, insn_low_registers));
16972
16973 /* LDMIA Ri, {R-high-register-list}. */
16974 current_stub_contents =
16975 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16976 create_instruction_ldmia
16977 (ri, /*wback=*/0, insn_high_registers));
16978 }
16979 else if (!wback && !restore_pc && restore_rn)
16980 {
16981 ri = rn;
16982 if (!(insn_low_registers & (1 << rn)))
16983 {
16984 /* Choose a Ri in the low-register-list that will be restored. */
16985 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16986
16987 /* MOV Ri, Rn. */
16988 current_stub_contents =
16989 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16990 create_instruction_mov (ri, rn));
16991 }
16992
16993 /* LDMDB Ri!, {R-high-register-list}. */
16994 current_stub_contents =
16995 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16996 create_instruction_ldmdb
16997 (ri, /*wback=*/1, insn_high_registers));
16998
16999 /* LDMDB Ri, {R-low-register-list}. */
17000 current_stub_contents =
17001 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17002 create_instruction_ldmdb
17003 (ri, /*wback=*/0, insn_low_registers));
17004
17005 /* B initial_insn_addr+4. */
17006 current_stub_contents =
17007 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17008 create_instruction_branch_absolute
17009 (initial_insn_addr - current_stub_contents));
17010 }
17011 else if (!wback && restore_pc && restore_rn)
17012 {
17013 ri = rn;
17014 if (!(insn_high_registers & (1 << rn)))
17015 {
17016 /* Choose a Ri in the high-register-list that will be restored. */
17017 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17018 }
17019
17020 /* SUB Ri, Rn, #(4*nb_registers). */
17021 current_stub_contents =
17022 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17023 create_instruction_sub (ri, rn, (4 * nb_registers)));
17024
17025 /* LDMIA Ri!, {R-low-register-list}. */
17026 current_stub_contents =
17027 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17028 create_instruction_ldmia
17029 (ri, /*wback=*/1, insn_low_registers));
17030
17031 /* LDMIA Ri, {R-high-register-list}. */
17032 current_stub_contents =
17033 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17034 create_instruction_ldmia
17035 (ri, /*wback=*/0, insn_high_registers));
17036 }
17037 else if (wback && restore_rn)
17038 {
17039 /* The assembler should not have accepted to encode this. */
17040 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
17041 "undefined behavior.\n");
17042 }
17043
17044 /* Fill the remaining of the stub with deterministic contents. */
17045 current_stub_contents =
17046 stm32l4xx_fill_stub_udf (htab, output_bfd,
17047 base_stub_contents, current_stub_contents,
17048 base_stub_contents +
17049 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17050
17051 }
17052
17053 static void
17054 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
17055 bfd * output_bfd,
17056 const insn32 initial_insn,
17057 const bfd_byte *const initial_insn_addr,
17058 bfd_byte *const base_stub_contents)
17059 {
17060 int num_words = ((unsigned int) initial_insn << 24) >> 24;
17061 bfd_byte *current_stub_contents = base_stub_contents;
17062
17063 BFD_ASSERT (is_thumb2_vldm (initial_insn));
17064
17065 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17066 smaller than 8 words load sequences that do not cause the
17067 hardware issue. */
17068 if (num_words <= 8)
17069 {
17070 /* Untouched instruction. */
17071 current_stub_contents =
17072 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17073 initial_insn);
17074
17075 /* B initial_insn_addr+4. */
17076 current_stub_contents =
17077 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17078 create_instruction_branch_absolute
17079 (initial_insn_addr - current_stub_contents));
17080 }
17081 else
17082 {
17083 bfd_boolean is_dp = /* DP encoding. */
17084 (initial_insn & 0xfe100f00) == 0xec100b00;
17085 bfd_boolean is_ia_nobang = /* (IA without !). */
17086 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
17087 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
17088 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
17089 bfd_boolean is_db_bang = /* (DB with !). */
17090 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
17091 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
17092 /* d = UInt (Vd:D);. */
17093 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
17094 | (((unsigned int)initial_insn << 9) >> 31);
17095
17096 /* Compute the number of 8-words chunks needed to split. */
17097 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
17098 int chunk;
17099
17100 /* The test coverage has been done assuming the following
17101 hypothesis that exactly one of the previous is_ predicates is
17102 true. */
17103 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
17104 && !(is_ia_nobang & is_ia_bang & is_db_bang));
17105
17106 /* We treat the cutting of the words in one pass for all
17107 cases, then we emit the adjustments:
17108
17109 vldm rx, {...}
17110 -> vldm rx!, {8_words_or_less} for each needed 8_word
17111 -> sub rx, rx, #size (list)
17112
17113 vldm rx!, {...}
17114 -> vldm rx!, {8_words_or_less} for each needed 8_word
17115 This also handles vpop instruction (when rx is sp)
17116
17117 vldmd rx!, {...}
17118 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
17119 for (chunk = 0; chunk < chunks; ++chunk)
17120 {
17121 bfd_vma new_insn = 0;
17122
17123 if (is_ia_nobang || is_ia_bang)
17124 {
17125 new_insn = create_instruction_vldmia
17126 (base_reg,
17127 is_dp,
17128 /*wback= . */1,
17129 chunks - (chunk + 1) ?
17130 8 : num_words - chunk * 8,
17131 first_reg + chunk * 8);
17132 }
17133 else if (is_db_bang)
17134 {
17135 new_insn = create_instruction_vldmdb
17136 (base_reg,
17137 is_dp,
17138 chunks - (chunk + 1) ?
17139 8 : num_words - chunk * 8,
17140 first_reg + chunk * 8);
17141 }
17142
17143 if (new_insn)
17144 current_stub_contents =
17145 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17146 new_insn);
17147 }
17148
17149 /* Only this case requires the base register compensation
17150 subtract. */
17151 if (is_ia_nobang)
17152 {
17153 current_stub_contents =
17154 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17155 create_instruction_sub
17156 (base_reg, base_reg, 4*num_words));
17157 }
17158
17159 /* B initial_insn_addr+4. */
17160 current_stub_contents =
17161 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17162 create_instruction_branch_absolute
17163 (initial_insn_addr - current_stub_contents));
17164 }
17165
17166 /* Fill the remaining of the stub with deterministic contents. */
17167 current_stub_contents =
17168 stm32l4xx_fill_stub_udf (htab, output_bfd,
17169 base_stub_contents, current_stub_contents,
17170 base_stub_contents +
17171 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
17172 }
17173
17174 static void
17175 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
17176 bfd * output_bfd,
17177 const insn32 wrong_insn,
17178 const bfd_byte *const wrong_insn_addr,
17179 bfd_byte *const stub_contents)
17180 {
17181 if (is_thumb2_ldmia (wrong_insn))
17182 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
17183 wrong_insn, wrong_insn_addr,
17184 stub_contents);
17185 else if (is_thumb2_ldmdb (wrong_insn))
17186 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
17187 wrong_insn, wrong_insn_addr,
17188 stub_contents);
17189 else if (is_thumb2_vldm (wrong_insn))
17190 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
17191 wrong_insn, wrong_insn_addr,
17192 stub_contents);
17193 }
17194
17195 /* End of stm32l4xx work-around. */
17196
17197
17198 static void
17199 elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info,
17200 asection *output_sec, Elf_Internal_Rela *rel)
17201 {
17202 BFD_ASSERT (output_sec && rel);
17203 struct bfd_elf_section_reloc_data *output_reldata;
17204 struct elf32_arm_link_hash_table *htab;
17205 struct bfd_elf_section_data *oesd = elf_section_data (output_sec);
17206 Elf_Internal_Shdr *rel_hdr;
17207
17208
17209 if (oesd->rel.hdr)
17210 {
17211 rel_hdr = oesd->rel.hdr;
17212 output_reldata = &(oesd->rel);
17213 }
17214 else if (oesd->rela.hdr)
17215 {
17216 rel_hdr = oesd->rela.hdr;
17217 output_reldata = &(oesd->rela);
17218 }
17219 else
17220 {
17221 abort ();
17222 }
17223
17224 bfd_byte *erel = rel_hdr->contents;
17225 erel += output_reldata->count * rel_hdr->sh_entsize;
17226 htab = elf32_arm_hash_table (info);
17227 SWAP_RELOC_OUT (htab) (output_bfd, rel, erel);
17228 output_reldata->count++;
17229 }
17230
17231 /* Do code byteswapping. Return FALSE afterwards so that the section is
17232 written out as normal. */
17233
17234 static bfd_boolean
17235 elf32_arm_write_section (bfd *output_bfd,
17236 struct bfd_link_info *link_info,
17237 asection *sec,
17238 bfd_byte *contents)
17239 {
17240 unsigned int mapcount, errcount;
17241 _arm_elf_section_data *arm_data;
17242 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
17243 elf32_arm_section_map *map;
17244 elf32_vfp11_erratum_list *errnode;
17245 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
17246 bfd_vma ptr;
17247 bfd_vma end;
17248 bfd_vma offset = sec->output_section->vma + sec->output_offset;
17249 bfd_byte tmp;
17250 unsigned int i;
17251
17252 if (globals == NULL)
17253 return FALSE;
17254
17255 /* If this section has not been allocated an _arm_elf_section_data
17256 structure then we cannot record anything. */
17257 arm_data = get_arm_elf_section_data (sec);
17258 if (arm_data == NULL)
17259 return FALSE;
17260
17261 mapcount = arm_data->mapcount;
17262 map = arm_data->map;
17263 errcount = arm_data->erratumcount;
17264
17265 if (errcount != 0)
17266 {
17267 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
17268
17269 for (errnode = arm_data->erratumlist; errnode != 0;
17270 errnode = errnode->next)
17271 {
17272 bfd_vma target = errnode->vma - offset;
17273
17274 switch (errnode->type)
17275 {
17276 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
17277 {
17278 bfd_vma branch_to_veneer;
17279 /* Original condition code of instruction, plus bit mask for
17280 ARM B instruction. */
17281 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
17282 | 0x0a000000;
17283
17284 /* The instruction is before the label. */
17285 target -= 4;
17286
17287 /* Above offset included in -4 below. */
17288 branch_to_veneer = errnode->u.b.veneer->vma
17289 - errnode->vma - 4;
17290
17291 if ((signed) branch_to_veneer < -(1 << 25)
17292 || (signed) branch_to_veneer >= (1 << 25))
17293 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17294 "range"), output_bfd);
17295
17296 insn |= (branch_to_veneer >> 2) & 0xffffff;
17297 contents[endianflip ^ target] = insn & 0xff;
17298 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17299 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17300 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17301 }
17302 break;
17303
17304 case VFP11_ERRATUM_ARM_VENEER:
17305 {
17306 bfd_vma branch_from_veneer;
17307 unsigned int insn;
17308
17309 /* Take size of veneer into account. */
17310 branch_from_veneer = errnode->u.v.branch->vma
17311 - errnode->vma - 12;
17312
17313 if ((signed) branch_from_veneer < -(1 << 25)
17314 || (signed) branch_from_veneer >= (1 << 25))
17315 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17316 "range"), output_bfd);
17317
17318 /* Original instruction. */
17319 insn = errnode->u.v.branch->u.b.vfp_insn;
17320 contents[endianflip ^ target] = insn & 0xff;
17321 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17322 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17323 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17324
17325 /* Branch back to insn after original insn. */
17326 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
17327 contents[endianflip ^ (target + 4)] = insn & 0xff;
17328 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
17329 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
17330 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
17331 }
17332 break;
17333
17334 default:
17335 abort ();
17336 }
17337 }
17338 }
17339
17340 if (arm_data->stm32l4xx_erratumcount != 0)
17341 {
17342 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
17343 stm32l4xx_errnode != 0;
17344 stm32l4xx_errnode = stm32l4xx_errnode->next)
17345 {
17346 bfd_vma target = stm32l4xx_errnode->vma - offset;
17347
17348 switch (stm32l4xx_errnode->type)
17349 {
17350 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
17351 {
17352 unsigned int insn;
17353 bfd_vma branch_to_veneer =
17354 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
17355
17356 if ((signed) branch_to_veneer < -(1 << 24)
17357 || (signed) branch_to_veneer >= (1 << 24))
17358 {
17359 bfd_vma out_of_range =
17360 ((signed) branch_to_veneer < -(1 << 24)) ?
17361 - branch_to_veneer - (1 << 24) :
17362 ((signed) branch_to_veneer >= (1 << 24)) ?
17363 branch_to_veneer - (1 << 24) : 0;
17364
17365 (*_bfd_error_handler)
17366 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17367 "Jump out of range by %ld bytes. "
17368 "Cannot encode branch instruction. "),
17369 output_bfd,
17370 (long) (stm32l4xx_errnode->vma - 4),
17371 out_of_range);
17372 continue;
17373 }
17374
17375 insn = create_instruction_branch_absolute
17376 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
17377
17378 /* The instruction is before the label. */
17379 target -= 4;
17380
17381 put_thumb2_insn (globals, output_bfd,
17382 (bfd_vma) insn, contents + target);
17383 }
17384 break;
17385
17386 case STM32L4XX_ERRATUM_VENEER:
17387 {
17388 bfd_byte * veneer;
17389 bfd_byte * veneer_r;
17390 unsigned int insn;
17391
17392 veneer = contents + target;
17393 veneer_r = veneer
17394 + stm32l4xx_errnode->u.b.veneer->vma
17395 - stm32l4xx_errnode->vma - 4;
17396
17397 if ((signed) (veneer_r - veneer -
17398 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
17399 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
17400 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
17401 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
17402 || (signed) (veneer_r - veneer) >= (1 << 24))
17403 {
17404 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
17405 "veneer."), output_bfd);
17406 continue;
17407 }
17408
17409 /* Original instruction. */
17410 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
17411
17412 stm32l4xx_create_replacing_stub
17413 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
17414 }
17415 break;
17416
17417 default:
17418 abort ();
17419 }
17420 }
17421 }
17422
17423 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
17424 {
17425 arm_unwind_table_edit *edit_node
17426 = arm_data->u.exidx.unwind_edit_list;
17427 /* Now, sec->size is the size of the section we will write. The original
17428 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17429 markers) was sec->rawsize. (This isn't the case if we perform no
17430 edits, then rawsize will be zero and we should use size). */
17431 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
17432 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
17433 unsigned int in_index, out_index;
17434 bfd_vma add_to_offsets = 0;
17435
17436 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
17437 {
17438 if (edit_node)
17439 {
17440 unsigned int edit_index = edit_node->index;
17441
17442 if (in_index < edit_index && in_index * 8 < input_size)
17443 {
17444 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17445 contents + in_index * 8, add_to_offsets);
17446 out_index++;
17447 in_index++;
17448 }
17449 else if (in_index == edit_index
17450 || (in_index * 8 >= input_size
17451 && edit_index == UINT_MAX))
17452 {
17453 switch (edit_node->type)
17454 {
17455 case DELETE_EXIDX_ENTRY:
17456 in_index++;
17457 add_to_offsets += 8;
17458 break;
17459
17460 case INSERT_EXIDX_CANTUNWIND_AT_END:
17461 {
17462 asection *text_sec = edit_node->linked_section;
17463 bfd_vma text_offset = text_sec->output_section->vma
17464 + text_sec->output_offset
17465 + text_sec->size;
17466 bfd_vma exidx_offset = offset + out_index * 8;
17467 unsigned long prel31_offset;
17468
17469 /* Note: this is meant to be equivalent to an
17470 R_ARM_PREL31 relocation. These synthetic
17471 EXIDX_CANTUNWIND markers are not relocated by the
17472 usual BFD method. */
17473 prel31_offset = (text_offset - exidx_offset)
17474 & 0x7ffffffful;
17475 if (bfd_link_relocatable (link_info))
17476 {
17477 /* Here relocation for new EXIDX_CANTUNWIND is
17478 created, so there is no need to
17479 adjust offset by hand. */
17480 prel31_offset = text_sec->output_offset
17481 + text_sec->size;
17482
17483 /* New relocation entity. */
17484 asection *text_out = text_sec->output_section;
17485 Elf_Internal_Rela rel;
17486 rel.r_addend = 0;
17487 rel.r_offset = exidx_offset;
17488 rel.r_info = ELF32_R_INFO (text_out->target_index,
17489 R_ARM_PREL31);
17490
17491 elf32_arm_add_relocation (output_bfd, link_info,
17492 sec->output_section,
17493 &rel);
17494 }
17495
17496 /* First address we can't unwind. */
17497 bfd_put_32 (output_bfd, prel31_offset,
17498 &edited_contents[out_index * 8]);
17499
17500 /* Code for EXIDX_CANTUNWIND. */
17501 bfd_put_32 (output_bfd, 0x1,
17502 &edited_contents[out_index * 8 + 4]);
17503
17504 out_index++;
17505 add_to_offsets -= 8;
17506 }
17507 break;
17508 }
17509
17510 edit_node = edit_node->next;
17511 }
17512 }
17513 else
17514 {
17515 /* No more edits, copy remaining entries verbatim. */
17516 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17517 contents + in_index * 8, add_to_offsets);
17518 out_index++;
17519 in_index++;
17520 }
17521 }
17522
17523 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
17524 bfd_set_section_contents (output_bfd, sec->output_section,
17525 edited_contents,
17526 (file_ptr) sec->output_offset, sec->size);
17527
17528 return TRUE;
17529 }
17530
17531 /* Fix code to point to Cortex-A8 erratum stubs. */
17532 if (globals->fix_cortex_a8)
17533 {
17534 struct a8_branch_to_stub_data data;
17535
17536 data.writing_section = sec;
17537 data.contents = contents;
17538
17539 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
17540 & data);
17541 }
17542
17543 if (mapcount == 0)
17544 return FALSE;
17545
17546 if (globals->byteswap_code)
17547 {
17548 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
17549
17550 ptr = map[0].vma;
17551 for (i = 0; i < mapcount; i++)
17552 {
17553 if (i == mapcount - 1)
17554 end = sec->size;
17555 else
17556 end = map[i + 1].vma;
17557
17558 switch (map[i].type)
17559 {
17560 case 'a':
17561 /* Byte swap code words. */
17562 while (ptr + 3 < end)
17563 {
17564 tmp = contents[ptr];
17565 contents[ptr] = contents[ptr + 3];
17566 contents[ptr + 3] = tmp;
17567 tmp = contents[ptr + 1];
17568 contents[ptr + 1] = contents[ptr + 2];
17569 contents[ptr + 2] = tmp;
17570 ptr += 4;
17571 }
17572 break;
17573
17574 case 't':
17575 /* Byte swap code halfwords. */
17576 while (ptr + 1 < end)
17577 {
17578 tmp = contents[ptr];
17579 contents[ptr] = contents[ptr + 1];
17580 contents[ptr + 1] = tmp;
17581 ptr += 2;
17582 }
17583 break;
17584
17585 case 'd':
17586 /* Leave data alone. */
17587 break;
17588 }
17589 ptr = end;
17590 }
17591 }
17592
17593 free (map);
17594 arm_data->mapcount = -1;
17595 arm_data->mapsize = 0;
17596 arm_data->map = NULL;
17597
17598 return FALSE;
17599 }
17600
17601 /* Mangle thumb function symbols as we read them in. */
17602
17603 static bfd_boolean
17604 elf32_arm_swap_symbol_in (bfd * abfd,
17605 const void *psrc,
17606 const void *pshn,
17607 Elf_Internal_Sym *dst)
17608 {
17609 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
17610 return FALSE;
17611 dst->st_target_internal = 0;
17612
17613 /* New EABI objects mark thumb function symbols by setting the low bit of
17614 the address. */
17615 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
17616 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
17617 {
17618 if (dst->st_value & 1)
17619 {
17620 dst->st_value &= ~(bfd_vma) 1;
17621 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
17622 ST_BRANCH_TO_THUMB);
17623 }
17624 else
17625 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
17626 }
17627 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
17628 {
17629 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
17630 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
17631 }
17632 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
17633 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
17634 else
17635 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
17636
17637 return TRUE;
17638 }
17639
17640
17641 /* Mangle thumb function symbols as we write them out. */
17642
17643 static void
17644 elf32_arm_swap_symbol_out (bfd *abfd,
17645 const Elf_Internal_Sym *src,
17646 void *cdst,
17647 void *shndx)
17648 {
17649 Elf_Internal_Sym newsym;
17650
17651 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17652 of the address set, as per the new EABI. We do this unconditionally
17653 because objcopy does not set the elf header flags until after
17654 it writes out the symbol table. */
17655 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
17656 {
17657 newsym = *src;
17658 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
17659 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
17660 if (newsym.st_shndx != SHN_UNDEF)
17661 {
17662 /* Do this only for defined symbols. At link type, the static
17663 linker will simulate the work of dynamic linker of resolving
17664 symbols and will carry over the thumbness of found symbols to
17665 the output symbol table. It's not clear how it happens, but
17666 the thumbness of undefined symbols can well be different at
17667 runtime, and writing '1' for them will be confusing for users
17668 and possibly for dynamic linker itself.
17669 */
17670 newsym.st_value |= 1;
17671 }
17672
17673 src = &newsym;
17674 }
17675 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
17676 }
17677
17678 /* Add the PT_ARM_EXIDX program header. */
17679
17680 static bfd_boolean
17681 elf32_arm_modify_segment_map (bfd *abfd,
17682 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17683 {
17684 struct elf_segment_map *m;
17685 asection *sec;
17686
17687 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17688 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17689 {
17690 /* If there is already a PT_ARM_EXIDX header, then we do not
17691 want to add another one. This situation arises when running
17692 "strip"; the input binary already has the header. */
17693 m = elf_seg_map (abfd);
17694 while (m && m->p_type != PT_ARM_EXIDX)
17695 m = m->next;
17696 if (!m)
17697 {
17698 m = (struct elf_segment_map *)
17699 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
17700 if (m == NULL)
17701 return FALSE;
17702 m->p_type = PT_ARM_EXIDX;
17703 m->count = 1;
17704 m->sections[0] = sec;
17705
17706 m->next = elf_seg_map (abfd);
17707 elf_seg_map (abfd) = m;
17708 }
17709 }
17710
17711 return TRUE;
17712 }
17713
17714 /* We may add a PT_ARM_EXIDX program header. */
17715
17716 static int
17717 elf32_arm_additional_program_headers (bfd *abfd,
17718 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17719 {
17720 asection *sec;
17721
17722 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17723 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17724 return 1;
17725 else
17726 return 0;
17727 }
17728
17729 /* Hook called by the linker routine which adds symbols from an object
17730 file. */
17731
17732 static bfd_boolean
17733 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
17734 Elf_Internal_Sym *sym, const char **namep,
17735 flagword *flagsp, asection **secp, bfd_vma *valp)
17736 {
17737 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
17738 && (abfd->flags & DYNAMIC) == 0
17739 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
17740 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
17741
17742 if (elf32_arm_hash_table (info) == NULL)
17743 return FALSE;
17744
17745 if (elf32_arm_hash_table (info)->vxworks_p
17746 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
17747 flagsp, secp, valp))
17748 return FALSE;
17749
17750 return TRUE;
17751 }
17752
17753 /* We use this to override swap_symbol_in and swap_symbol_out. */
17754 const struct elf_size_info elf32_arm_size_info =
17755 {
17756 sizeof (Elf32_External_Ehdr),
17757 sizeof (Elf32_External_Phdr),
17758 sizeof (Elf32_External_Shdr),
17759 sizeof (Elf32_External_Rel),
17760 sizeof (Elf32_External_Rela),
17761 sizeof (Elf32_External_Sym),
17762 sizeof (Elf32_External_Dyn),
17763 sizeof (Elf_External_Note),
17764 4,
17765 1,
17766 32, 2,
17767 ELFCLASS32, EV_CURRENT,
17768 bfd_elf32_write_out_phdrs,
17769 bfd_elf32_write_shdrs_and_ehdr,
17770 bfd_elf32_checksum_contents,
17771 bfd_elf32_write_relocs,
17772 elf32_arm_swap_symbol_in,
17773 elf32_arm_swap_symbol_out,
17774 bfd_elf32_slurp_reloc_table,
17775 bfd_elf32_slurp_symbol_table,
17776 bfd_elf32_swap_dyn_in,
17777 bfd_elf32_swap_dyn_out,
17778 bfd_elf32_swap_reloc_in,
17779 bfd_elf32_swap_reloc_out,
17780 bfd_elf32_swap_reloca_in,
17781 bfd_elf32_swap_reloca_out
17782 };
17783
17784 static bfd_vma
17785 read_code32 (const bfd *abfd, const bfd_byte *addr)
17786 {
17787 /* V7 BE8 code is always little endian. */
17788 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17789 return bfd_getl32 (addr);
17790
17791 return bfd_get_32 (abfd, addr);
17792 }
17793
17794 static bfd_vma
17795 read_code16 (const bfd *abfd, const bfd_byte *addr)
17796 {
17797 /* V7 BE8 code is always little endian. */
17798 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17799 return bfd_getl16 (addr);
17800
17801 return bfd_get_16 (abfd, addr);
17802 }
17803
17804 /* Return size of plt0 entry starting at ADDR
17805 or (bfd_vma) -1 if size can not be determined. */
17806
17807 static bfd_vma
17808 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
17809 {
17810 bfd_vma first_word;
17811 bfd_vma plt0_size;
17812
17813 first_word = read_code32 (abfd, addr);
17814
17815 if (first_word == elf32_arm_plt0_entry[0])
17816 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
17817 else if (first_word == elf32_thumb2_plt0_entry[0])
17818 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
17819 else
17820 /* We don't yet handle this PLT format. */
17821 return (bfd_vma) -1;
17822
17823 return plt0_size;
17824 }
17825
17826 /* Return size of plt entry starting at offset OFFSET
17827 of plt section located at address START
17828 or (bfd_vma) -1 if size can not be determined. */
17829
17830 static bfd_vma
17831 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
17832 {
17833 bfd_vma first_insn;
17834 bfd_vma plt_size = 0;
17835 const bfd_byte *addr = start + offset;
17836
17837 /* PLT entry size if fixed on Thumb-only platforms. */
17838 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
17839 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
17840
17841 /* Respect Thumb stub if necessary. */
17842 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
17843 {
17844 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
17845 }
17846
17847 /* Strip immediate from first add. */
17848 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
17849
17850 #ifdef FOUR_WORD_PLT
17851 if (first_insn == elf32_arm_plt_entry[0])
17852 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
17853 #else
17854 if (first_insn == elf32_arm_plt_entry_long[0])
17855 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
17856 else if (first_insn == elf32_arm_plt_entry_short[0])
17857 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
17858 #endif
17859 else
17860 /* We don't yet handle this PLT format. */
17861 return (bfd_vma) -1;
17862
17863 return plt_size;
17864 }
17865
17866 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17867
17868 static long
17869 elf32_arm_get_synthetic_symtab (bfd *abfd,
17870 long symcount ATTRIBUTE_UNUSED,
17871 asymbol **syms ATTRIBUTE_UNUSED,
17872 long dynsymcount,
17873 asymbol **dynsyms,
17874 asymbol **ret)
17875 {
17876 asection *relplt;
17877 asymbol *s;
17878 arelent *p;
17879 long count, i, n;
17880 size_t size;
17881 Elf_Internal_Shdr *hdr;
17882 char *names;
17883 asection *plt;
17884 bfd_vma offset;
17885 bfd_byte *data;
17886
17887 *ret = NULL;
17888
17889 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
17890 return 0;
17891
17892 if (dynsymcount <= 0)
17893 return 0;
17894
17895 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
17896 if (relplt == NULL)
17897 return 0;
17898
17899 hdr = &elf_section_data (relplt)->this_hdr;
17900 if (hdr->sh_link != elf_dynsymtab (abfd)
17901 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
17902 return 0;
17903
17904 plt = bfd_get_section_by_name (abfd, ".plt");
17905 if (plt == NULL)
17906 return 0;
17907
17908 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
17909 return -1;
17910
17911 data = plt->contents;
17912 if (data == NULL)
17913 {
17914 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
17915 return -1;
17916 bfd_cache_section_contents((asection *) plt, data);
17917 }
17918
17919 count = relplt->size / hdr->sh_entsize;
17920 size = count * sizeof (asymbol);
17921 p = relplt->relocation;
17922 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17923 {
17924 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
17925 if (p->addend != 0)
17926 size += sizeof ("+0x") - 1 + 8;
17927 }
17928
17929 s = *ret = (asymbol *) bfd_malloc (size);
17930 if (s == NULL)
17931 return -1;
17932
17933 offset = elf32_arm_plt0_size (abfd, data);
17934 if (offset == (bfd_vma) -1)
17935 return -1;
17936
17937 names = (char *) (s + count);
17938 p = relplt->relocation;
17939 n = 0;
17940 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17941 {
17942 size_t len;
17943
17944 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
17945 if (plt_size == (bfd_vma) -1)
17946 break;
17947
17948 *s = **p->sym_ptr_ptr;
17949 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17950 we are defining a symbol, ensure one of them is set. */
17951 if ((s->flags & BSF_LOCAL) == 0)
17952 s->flags |= BSF_GLOBAL;
17953 s->flags |= BSF_SYNTHETIC;
17954 s->section = plt;
17955 s->value = offset;
17956 s->name = names;
17957 s->udata.p = NULL;
17958 len = strlen ((*p->sym_ptr_ptr)->name);
17959 memcpy (names, (*p->sym_ptr_ptr)->name, len);
17960 names += len;
17961 if (p->addend != 0)
17962 {
17963 char buf[30], *a;
17964
17965 memcpy (names, "+0x", sizeof ("+0x") - 1);
17966 names += sizeof ("+0x") - 1;
17967 bfd_sprintf_vma (abfd, buf, p->addend);
17968 for (a = buf; *a == '0'; ++a)
17969 ;
17970 len = strlen (a);
17971 memcpy (names, a, len);
17972 names += len;
17973 }
17974 memcpy (names, "@plt", sizeof ("@plt"));
17975 names += sizeof ("@plt");
17976 ++s, ++n;
17977 offset += plt_size;
17978 }
17979
17980 return n;
17981 }
17982
17983 static bfd_boolean
17984 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
17985 {
17986 if (hdr->sh_flags & SHF_ARM_NOREAD)
17987 *flags |= SEC_ELF_NOREAD;
17988 return TRUE;
17989 }
17990
17991 static flagword
17992 elf32_arm_lookup_section_flags (char *flag_name)
17993 {
17994 if (!strcmp (flag_name, "SHF_ARM_NOREAD"))
17995 return SHF_ARM_NOREAD;
17996
17997 return SEC_NO_FLAGS;
17998 }
17999
18000 static unsigned int
18001 elf32_arm_count_additional_relocs (asection *sec)
18002 {
18003 struct _arm_elf_section_data *arm_data;
18004 arm_data = get_arm_elf_section_data (sec);
18005 return arm_data->additional_reloc_count;
18006 }
18007
18008 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
18009 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
18010 FALSE otherwise. ISECTION is the best guess matching section from the
18011 input bfd IBFD, but it might be NULL. */
18012
18013 static bfd_boolean
18014 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
18015 bfd *obfd ATTRIBUTE_UNUSED,
18016 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
18017 Elf_Internal_Shdr *osection)
18018 {
18019 switch (osection->sh_type)
18020 {
18021 case SHT_ARM_EXIDX:
18022 {
18023 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
18024 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
18025 unsigned i = 0;
18026
18027 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
18028 osection->sh_info = 0;
18029
18030 /* The sh_link field must be set to the text section associated with
18031 this index section. Unfortunately the ARM EHABI does not specify
18032 exactly how to determine this association. Our caller does try
18033 to match up OSECTION with its corresponding input section however
18034 so that is a good first guess. */
18035 if (isection != NULL
18036 && osection->bfd_section != NULL
18037 && isection->bfd_section != NULL
18038 && isection->bfd_section->output_section != NULL
18039 && isection->bfd_section->output_section == osection->bfd_section
18040 && iheaders != NULL
18041 && isection->sh_link > 0
18042 && isection->sh_link < elf_numsections (ibfd)
18043 && iheaders[isection->sh_link]->bfd_section != NULL
18044 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
18045 )
18046 {
18047 for (i = elf_numsections (obfd); i-- > 0;)
18048 if (oheaders[i]->bfd_section
18049 == iheaders[isection->sh_link]->bfd_section->output_section)
18050 break;
18051 }
18052
18053 if (i == 0)
18054 {
18055 /* Failing that we have to find a matching section ourselves. If
18056 we had the output section name available we could compare that
18057 with input section names. Unfortunately we don't. So instead
18058 we use a simple heuristic and look for the nearest executable
18059 section before this one. */
18060 for (i = elf_numsections (obfd); i-- > 0;)
18061 if (oheaders[i] == osection)
18062 break;
18063 if (i == 0)
18064 break;
18065
18066 while (i-- > 0)
18067 if (oheaders[i]->sh_type == SHT_PROGBITS
18068 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
18069 == (SHF_ALLOC | SHF_EXECINSTR))
18070 break;
18071 }
18072
18073 if (i)
18074 {
18075 osection->sh_link = i;
18076 /* If the text section was part of a group
18077 then the index section should be too. */
18078 if (oheaders[i]->sh_flags & SHF_GROUP)
18079 osection->sh_flags |= SHF_GROUP;
18080 return TRUE;
18081 }
18082 }
18083 break;
18084
18085 case SHT_ARM_PREEMPTMAP:
18086 osection->sh_flags = SHF_ALLOC;
18087 break;
18088
18089 case SHT_ARM_ATTRIBUTES:
18090 case SHT_ARM_DEBUGOVERLAY:
18091 case SHT_ARM_OVERLAYSECTION:
18092 default:
18093 break;
18094 }
18095
18096 return FALSE;
18097 }
18098
18099 #undef elf_backend_copy_special_section_fields
18100 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
18101
18102 #define ELF_ARCH bfd_arch_arm
18103 #define ELF_TARGET_ID ARM_ELF_DATA
18104 #define ELF_MACHINE_CODE EM_ARM
18105 #ifdef __QNXTARGET__
18106 #define ELF_MAXPAGESIZE 0x1000
18107 #else
18108 #define ELF_MAXPAGESIZE 0x10000
18109 #endif
18110 #define ELF_MINPAGESIZE 0x1000
18111 #define ELF_COMMONPAGESIZE 0x1000
18112
18113 #define bfd_elf32_mkobject elf32_arm_mkobject
18114
18115 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
18116 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
18117 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
18118 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
18119 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
18120 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
18121 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
18122 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
18123 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
18124 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
18125 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
18126 #define bfd_elf32_bfd_final_link elf32_arm_final_link
18127 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
18128
18129 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
18130 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
18131 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
18132 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
18133 #define elf_backend_check_relocs elf32_arm_check_relocs
18134 #define elf_backend_relocate_section elf32_arm_relocate_section
18135 #define elf_backend_write_section elf32_arm_write_section
18136 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
18137 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
18138 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
18139 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
18140 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
18141 #define elf_backend_always_size_sections elf32_arm_always_size_sections
18142 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
18143 #define elf_backend_post_process_headers elf32_arm_post_process_headers
18144 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
18145 #define elf_backend_object_p elf32_arm_object_p
18146 #define elf_backend_fake_sections elf32_arm_fake_sections
18147 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
18148 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18149 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
18150 #define elf_backend_size_info elf32_arm_size_info
18151 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18152 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
18153 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
18154 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
18155 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
18156 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
18157
18158 #define elf_backend_can_refcount 1
18159 #define elf_backend_can_gc_sections 1
18160 #define elf_backend_plt_readonly 1
18161 #define elf_backend_want_got_plt 1
18162 #define elf_backend_want_plt_sym 0
18163 #define elf_backend_may_use_rel_p 1
18164 #define elf_backend_may_use_rela_p 0
18165 #define elf_backend_default_use_rela_p 0
18166
18167 #define elf_backend_got_header_size 12
18168 #define elf_backend_extern_protected_data 1
18169
18170 #undef elf_backend_obj_attrs_vendor
18171 #define elf_backend_obj_attrs_vendor "aeabi"
18172 #undef elf_backend_obj_attrs_section
18173 #define elf_backend_obj_attrs_section ".ARM.attributes"
18174 #undef elf_backend_obj_attrs_arg_type
18175 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
18176 #undef elf_backend_obj_attrs_section_type
18177 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
18178 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
18179 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
18180
18181 #undef elf_backend_section_flags
18182 #define elf_backend_section_flags elf32_arm_section_flags
18183 #undef elf_backend_lookup_section_flags_hook
18184 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
18185
18186 #include "elf32-target.h"
18187
18188 /* Native Client targets. */
18189
18190 #undef TARGET_LITTLE_SYM
18191 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
18192 #undef TARGET_LITTLE_NAME
18193 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
18194 #undef TARGET_BIG_SYM
18195 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
18196 #undef TARGET_BIG_NAME
18197 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
18198
18199 /* Like elf32_arm_link_hash_table_create -- but overrides
18200 appropriately for NaCl. */
18201
18202 static struct bfd_link_hash_table *
18203 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
18204 {
18205 struct bfd_link_hash_table *ret;
18206
18207 ret = elf32_arm_link_hash_table_create (abfd);
18208 if (ret)
18209 {
18210 struct elf32_arm_link_hash_table *htab
18211 = (struct elf32_arm_link_hash_table *) ret;
18212
18213 htab->nacl_p = 1;
18214
18215 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
18216 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
18217 }
18218 return ret;
18219 }
18220
18221 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
18222 really need to use elf32_arm_modify_segment_map. But we do it
18223 anyway just to reduce gratuitous differences with the stock ARM backend. */
18224
18225 static bfd_boolean
18226 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
18227 {
18228 return (elf32_arm_modify_segment_map (abfd, info)
18229 && nacl_modify_segment_map (abfd, info));
18230 }
18231
18232 static void
18233 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
18234 {
18235 elf32_arm_final_write_processing (abfd, linker);
18236 nacl_final_write_processing (abfd, linker);
18237 }
18238
18239 static bfd_vma
18240 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
18241 const arelent *rel ATTRIBUTE_UNUSED)
18242 {
18243 return plt->vma
18244 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
18245 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
18246 }
18247
18248 #undef elf32_bed
18249 #define elf32_bed elf32_arm_nacl_bed
18250 #undef bfd_elf32_bfd_link_hash_table_create
18251 #define bfd_elf32_bfd_link_hash_table_create \
18252 elf32_arm_nacl_link_hash_table_create
18253 #undef elf_backend_plt_alignment
18254 #define elf_backend_plt_alignment 4
18255 #undef elf_backend_modify_segment_map
18256 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18257 #undef elf_backend_modify_program_headers
18258 #define elf_backend_modify_program_headers nacl_modify_program_headers
18259 #undef elf_backend_final_write_processing
18260 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18261 #undef bfd_elf32_get_synthetic_symtab
18262 #undef elf_backend_plt_sym_val
18263 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18264 #undef elf_backend_copy_special_section_fields
18265
18266 #undef ELF_MINPAGESIZE
18267 #undef ELF_COMMONPAGESIZE
18268
18269
18270 #include "elf32-target.h"
18271
18272 /* Reset to defaults. */
18273 #undef elf_backend_plt_alignment
18274 #undef elf_backend_modify_segment_map
18275 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18276 #undef elf_backend_modify_program_headers
18277 #undef elf_backend_final_write_processing
18278 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18279 #undef ELF_MINPAGESIZE
18280 #define ELF_MINPAGESIZE 0x1000
18281 #undef ELF_COMMONPAGESIZE
18282 #define ELF_COMMONPAGESIZE 0x1000
18283
18284
18285 /* VxWorks Targets. */
18286
18287 #undef TARGET_LITTLE_SYM
18288 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18289 #undef TARGET_LITTLE_NAME
18290 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18291 #undef TARGET_BIG_SYM
18292 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18293 #undef TARGET_BIG_NAME
18294 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18295
18296 /* Like elf32_arm_link_hash_table_create -- but overrides
18297 appropriately for VxWorks. */
18298
18299 static struct bfd_link_hash_table *
18300 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
18301 {
18302 struct bfd_link_hash_table *ret;
18303
18304 ret = elf32_arm_link_hash_table_create (abfd);
18305 if (ret)
18306 {
18307 struct elf32_arm_link_hash_table *htab
18308 = (struct elf32_arm_link_hash_table *) ret;
18309 htab->use_rel = 0;
18310 htab->vxworks_p = 1;
18311 }
18312 return ret;
18313 }
18314
18315 static void
18316 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
18317 {
18318 elf32_arm_final_write_processing (abfd, linker);
18319 elf_vxworks_final_write_processing (abfd, linker);
18320 }
18321
18322 #undef elf32_bed
18323 #define elf32_bed elf32_arm_vxworks_bed
18324
18325 #undef bfd_elf32_bfd_link_hash_table_create
18326 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18327 #undef elf_backend_final_write_processing
18328 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18329 #undef elf_backend_emit_relocs
18330 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18331
18332 #undef elf_backend_may_use_rel_p
18333 #define elf_backend_may_use_rel_p 0
18334 #undef elf_backend_may_use_rela_p
18335 #define elf_backend_may_use_rela_p 1
18336 #undef elf_backend_default_use_rela_p
18337 #define elf_backend_default_use_rela_p 1
18338 #undef elf_backend_want_plt_sym
18339 #define elf_backend_want_plt_sym 1
18340 #undef ELF_MAXPAGESIZE
18341 #define ELF_MAXPAGESIZE 0x1000
18342
18343 #include "elf32-target.h"
18344
18345
18346 /* Merge backend specific data from an object file to the output
18347 object file when linking. */
18348
18349 static bfd_boolean
18350 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
18351 {
18352 flagword out_flags;
18353 flagword in_flags;
18354 bfd_boolean flags_compatible = TRUE;
18355 asection *sec;
18356
18357 /* Check if we have the same endianness. */
18358 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
18359 return FALSE;
18360
18361 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
18362 return TRUE;
18363
18364 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
18365 return FALSE;
18366
18367 /* The input BFD must have had its flags initialised. */
18368 /* The following seems bogus to me -- The flags are initialized in
18369 the assembler but I don't think an elf_flags_init field is
18370 written into the object. */
18371 /* BFD_ASSERT (elf_flags_init (ibfd)); */
18372
18373 in_flags = elf_elfheader (ibfd)->e_flags;
18374 out_flags = elf_elfheader (obfd)->e_flags;
18375
18376 /* In theory there is no reason why we couldn't handle this. However
18377 in practice it isn't even close to working and there is no real
18378 reason to want it. */
18379 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
18380 && !(ibfd->flags & DYNAMIC)
18381 && (in_flags & EF_ARM_BE8))
18382 {
18383 _bfd_error_handler (_("error: %B is already in final BE8 format"),
18384 ibfd);
18385 return FALSE;
18386 }
18387
18388 if (!elf_flags_init (obfd))
18389 {
18390 /* If the input is the default architecture and had the default
18391 flags then do not bother setting the flags for the output
18392 architecture, instead allow future merges to do this. If no
18393 future merges ever set these flags then they will retain their
18394 uninitialised values, which surprise surprise, correspond
18395 to the default values. */
18396 if (bfd_get_arch_info (ibfd)->the_default
18397 && elf_elfheader (ibfd)->e_flags == 0)
18398 return TRUE;
18399
18400 elf_flags_init (obfd) = TRUE;
18401 elf_elfheader (obfd)->e_flags = in_flags;
18402
18403 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
18404 && bfd_get_arch_info (obfd)->the_default)
18405 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
18406
18407 return TRUE;
18408 }
18409
18410 /* Determine what should happen if the input ARM architecture
18411 does not match the output ARM architecture. */
18412 if (! bfd_arm_merge_machines (ibfd, obfd))
18413 return FALSE;
18414
18415 /* Identical flags must be compatible. */
18416 if (in_flags == out_flags)
18417 return TRUE;
18418
18419 /* Check to see if the input BFD actually contains any sections. If
18420 not, its flags may not have been initialised either, but it
18421 cannot actually cause any incompatiblity. Do not short-circuit
18422 dynamic objects; their section list may be emptied by
18423 elf_link_add_object_symbols.
18424
18425 Also check to see if there are no code sections in the input.
18426 In this case there is no need to check for code specific flags.
18427 XXX - do we need to worry about floating-point format compatability
18428 in data sections ? */
18429 if (!(ibfd->flags & DYNAMIC))
18430 {
18431 bfd_boolean null_input_bfd = TRUE;
18432 bfd_boolean only_data_sections = TRUE;
18433
18434 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
18435 {
18436 /* Ignore synthetic glue sections. */
18437 if (strcmp (sec->name, ".glue_7")
18438 && strcmp (sec->name, ".glue_7t"))
18439 {
18440 if ((bfd_get_section_flags (ibfd, sec)
18441 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18442 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18443 only_data_sections = FALSE;
18444
18445 null_input_bfd = FALSE;
18446 break;
18447 }
18448 }
18449
18450 if (null_input_bfd || only_data_sections)
18451 return TRUE;
18452 }
18453
18454 /* Complain about various flag mismatches. */
18455 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
18456 EF_ARM_EABI_VERSION (out_flags)))
18457 {
18458 _bfd_error_handler
18459 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18460 ibfd, obfd,
18461 (in_flags & EF_ARM_EABIMASK) >> 24,
18462 (out_flags & EF_ARM_EABIMASK) >> 24);
18463 return FALSE;
18464 }
18465
18466 /* Not sure what needs to be checked for EABI versions >= 1. */
18467 /* VxWorks libraries do not use these flags. */
18468 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
18469 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
18470 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
18471 {
18472 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
18473 {
18474 _bfd_error_handler
18475 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18476 ibfd, obfd,
18477 in_flags & EF_ARM_APCS_26 ? 26 : 32,
18478 out_flags & EF_ARM_APCS_26 ? 26 : 32);
18479 flags_compatible = FALSE;
18480 }
18481
18482 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
18483 {
18484 if (in_flags & EF_ARM_APCS_FLOAT)
18485 _bfd_error_handler
18486 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18487 ibfd, obfd);
18488 else
18489 _bfd_error_handler
18490 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18491 ibfd, obfd);
18492
18493 flags_compatible = FALSE;
18494 }
18495
18496 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
18497 {
18498 if (in_flags & EF_ARM_VFP_FLOAT)
18499 _bfd_error_handler
18500 (_("error: %B uses VFP instructions, whereas %B does not"),
18501 ibfd, obfd);
18502 else
18503 _bfd_error_handler
18504 (_("error: %B uses FPA instructions, whereas %B does not"),
18505 ibfd, obfd);
18506
18507 flags_compatible = FALSE;
18508 }
18509
18510 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
18511 {
18512 if (in_flags & EF_ARM_MAVERICK_FLOAT)
18513 _bfd_error_handler
18514 (_("error: %B uses Maverick instructions, whereas %B does not"),
18515 ibfd, obfd);
18516 else
18517 _bfd_error_handler
18518 (_("error: %B does not use Maverick instructions, whereas %B does"),
18519 ibfd, obfd);
18520
18521 flags_compatible = FALSE;
18522 }
18523
18524 #ifdef EF_ARM_SOFT_FLOAT
18525 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
18526 {
18527 /* We can allow interworking between code that is VFP format
18528 layout, and uses either soft float or integer regs for
18529 passing floating point arguments and results. We already
18530 know that the APCS_FLOAT flags match; similarly for VFP
18531 flags. */
18532 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
18533 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
18534 {
18535 if (in_flags & EF_ARM_SOFT_FLOAT)
18536 _bfd_error_handler
18537 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18538 ibfd, obfd);
18539 else
18540 _bfd_error_handler
18541 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18542 ibfd, obfd);
18543
18544 flags_compatible = FALSE;
18545 }
18546 }
18547 #endif
18548
18549 /* Interworking mismatch is only a warning. */
18550 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
18551 {
18552 if (in_flags & EF_ARM_INTERWORK)
18553 {
18554 _bfd_error_handler
18555 (_("Warning: %B supports interworking, whereas %B does not"),
18556 ibfd, obfd);
18557 }
18558 else
18559 {
18560 _bfd_error_handler
18561 (_("Warning: %B does not support interworking, whereas %B does"),
18562 ibfd, obfd);
18563 }
18564 }
18565 }
18566
18567 return flags_compatible;
18568 }
18569
18570
18571 /* Symbian OS Targets. */
18572
18573 #undef TARGET_LITTLE_SYM
18574 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18575 #undef TARGET_LITTLE_NAME
18576 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18577 #undef TARGET_BIG_SYM
18578 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18579 #undef TARGET_BIG_NAME
18580 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18581
18582 /* Like elf32_arm_link_hash_table_create -- but overrides
18583 appropriately for Symbian OS. */
18584
18585 static struct bfd_link_hash_table *
18586 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
18587 {
18588 struct bfd_link_hash_table *ret;
18589
18590 ret = elf32_arm_link_hash_table_create (abfd);
18591 if (ret)
18592 {
18593 struct elf32_arm_link_hash_table *htab
18594 = (struct elf32_arm_link_hash_table *)ret;
18595 /* There is no PLT header for Symbian OS. */
18596 htab->plt_header_size = 0;
18597 /* The PLT entries are each one instruction and one word. */
18598 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
18599 htab->symbian_p = 1;
18600 /* Symbian uses armv5t or above, so use_blx is always true. */
18601 htab->use_blx = 1;
18602 htab->root.is_relocatable_executable = 1;
18603 }
18604 return ret;
18605 }
18606
18607 static const struct bfd_elf_special_section
18608 elf32_arm_symbian_special_sections[] =
18609 {
18610 /* In a BPABI executable, the dynamic linking sections do not go in
18611 the loadable read-only segment. The post-linker may wish to
18612 refer to these sections, but they are not part of the final
18613 program image. */
18614 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
18615 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
18616 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
18617 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
18618 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
18619 /* These sections do not need to be writable as the SymbianOS
18620 postlinker will arrange things so that no dynamic relocation is
18621 required. */
18622 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
18623 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
18624 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
18625 { NULL, 0, 0, 0, 0 }
18626 };
18627
18628 static void
18629 elf32_arm_symbian_begin_write_processing (bfd *abfd,
18630 struct bfd_link_info *link_info)
18631 {
18632 /* BPABI objects are never loaded directly by an OS kernel; they are
18633 processed by a postlinker first, into an OS-specific format. If
18634 the D_PAGED bit is set on the file, BFD will align segments on
18635 page boundaries, so that an OS can directly map the file. With
18636 BPABI objects, that just results in wasted space. In addition,
18637 because we clear the D_PAGED bit, map_sections_to_segments will
18638 recognize that the program headers should not be mapped into any
18639 loadable segment. */
18640 abfd->flags &= ~D_PAGED;
18641 elf32_arm_begin_write_processing (abfd, link_info);
18642 }
18643
18644 static bfd_boolean
18645 elf32_arm_symbian_modify_segment_map (bfd *abfd,
18646 struct bfd_link_info *info)
18647 {
18648 struct elf_segment_map *m;
18649 asection *dynsec;
18650
18651 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18652 segment. However, because the .dynamic section is not marked
18653 with SEC_LOAD, the generic ELF code will not create such a
18654 segment. */
18655 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
18656 if (dynsec)
18657 {
18658 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
18659 if (m->p_type == PT_DYNAMIC)
18660 break;
18661
18662 if (m == NULL)
18663 {
18664 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
18665 m->next = elf_seg_map (abfd);
18666 elf_seg_map (abfd) = m;
18667 }
18668 }
18669
18670 /* Also call the generic arm routine. */
18671 return elf32_arm_modify_segment_map (abfd, info);
18672 }
18673
18674 /* Return address for Ith PLT stub in section PLT, for relocation REL
18675 or (bfd_vma) -1 if it should not be included. */
18676
18677 static bfd_vma
18678 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
18679 const arelent *rel ATTRIBUTE_UNUSED)
18680 {
18681 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
18682 }
18683
18684 #undef elf32_bed
18685 #define elf32_bed elf32_arm_symbian_bed
18686
18687 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18688 will process them and then discard them. */
18689 #undef ELF_DYNAMIC_SEC_FLAGS
18690 #define ELF_DYNAMIC_SEC_FLAGS \
18691 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18692
18693 #undef elf_backend_emit_relocs
18694
18695 #undef bfd_elf32_bfd_link_hash_table_create
18696 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18697 #undef elf_backend_special_sections
18698 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18699 #undef elf_backend_begin_write_processing
18700 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18701 #undef elf_backend_final_write_processing
18702 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18703
18704 #undef elf_backend_modify_segment_map
18705 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18706
18707 /* There is no .got section for BPABI objects, and hence no header. */
18708 #undef elf_backend_got_header_size
18709 #define elf_backend_got_header_size 0
18710
18711 /* Similarly, there is no .got.plt section. */
18712 #undef elf_backend_want_got_plt
18713 #define elf_backend_want_got_plt 0
18714
18715 #undef elf_backend_plt_sym_val
18716 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18717
18718 #undef elf_backend_may_use_rel_p
18719 #define elf_backend_may_use_rel_p 1
18720 #undef elf_backend_may_use_rela_p
18721 #define elf_backend_may_use_rela_p 0
18722 #undef elf_backend_default_use_rela_p
18723 #define elf_backend_default_use_rela_p 0
18724 #undef elf_backend_want_plt_sym
18725 #define elf_backend_want_plt_sym 0
18726 #undef ELF_MAXPAGESIZE
18727 #define ELF_MAXPAGESIZE 0x8000
18728
18729 #include "elf32-target.h"
GDB Binutils - Deliverables
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