* elf-hppa.h (elf_hppa_relocate_section): If relocatable, return
[deliverable/binutils-gdb.git] / bfd / elf32-m32r.c
1 /* M32R-specific support for 32-bit ELF.
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "bfd.h"
22 #include "sysdep.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/m32r.h"
26
27 static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
28 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
29 static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
30 PARAMS ((bfd *, reloc_howto_type *, asection *,
31 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
32 static bfd_reloc_status_type m32r_elf_hi16_reloc
33 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
34 static void m32r_elf_relocate_hi16
35 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
36 bfd_byte *, bfd_vma));
37 bfd_reloc_status_type m32r_elf_lo16_reloc
38 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
39 bfd_reloc_status_type m32r_elf_generic_reloc
40 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
41 static bfd_reloc_status_type m32r_elf_sda16_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
43 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
44 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
45 static void m32r_info_to_howto_rel
46 PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
47 boolean _bfd_m32r_elf_section_from_bfd_section
48 PARAMS ((bfd *, asection *, int *));
49 void _bfd_m32r_elf_symbol_processing
50 PARAMS ((bfd *, asymbol *));
51 static boolean m32r_elf_add_symbol_hook
52 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
53 const char **, flagword *, asection **, bfd_vma *));
54 static boolean m32r_elf_relocate_section
55 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
56 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
57 #if 0 /* not yet */
58 static boolean m32r_elf_relax_delete_bytes
59 PARAMS ((bfd *, asection *, bfd_vma, int));
60 #endif
61 static bfd_reloc_status_type m32r_elf_final_sda_base
62 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
63 static boolean m32r_elf_object_p
64 PARAMS ((bfd *));
65 static void m32r_elf_final_write_processing
66 PARAMS ((bfd *, boolean));
67 static boolean m32r_elf_set_private_flags
68 PARAMS ((bfd *, flagword));
69 static boolean m32r_elf_merge_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71 static boolean m32r_elf_print_private_bfd_data
72 PARAMS ((bfd *, PTR));
73 static boolean m32r_elf_gc_sweep_hook
74 PARAMS ((bfd *, struct bfd_link_info *, asection *,
75 const Elf_Internal_Rela *));
76 static boolean m32r_elf_check_relocs
77 PARAMS ((bfd *, struct bfd_link_info *, asection *,
78 const Elf_Internal_Rela *));
79
80 asection * m32r_elf_gc_mark_hook
81 PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *,
82 struct elf_link_hash_entry *, Elf_Internal_Sym *));
83
84 #define NOP_INSN 0x7000
85 #define MAKE_PARALLEL(insn) ((insn) | 0x8000)
86
87 /* Use REL instead of RELA to save space.
88 This only saves space in libraries and object files, but perhaps
89 relocs will be put in ROM? All in all though, REL relocs are a pain
90 to work with. */
91 #define USE_REL
92
93 static reloc_howto_type m32r_elf_howto_table[] =
94 {
95 /* This reloc does nothing. */
96 HOWTO (R_M32R_NONE, /* type */
97 0, /* rightshift */
98 2, /* size (0 = byte, 1 = short, 2 = long) */
99 32, /* bitsize */
100 false, /* pc_relative */
101 0, /* bitpos */
102 complain_overflow_bitfield, /* complain_on_overflow */
103 bfd_elf_generic_reloc, /* special_function */
104 "R_M32R_NONE", /* name */
105 false, /* partial_inplace */
106 0, /* src_mask */
107 0, /* dst_mask */
108 false), /* pcrel_offset */
109
110 /* A 16 bit absolute relocation. */
111 HOWTO (R_M32R_16, /* type */
112 0, /* rightshift */
113 1, /* size (0 = byte, 1 = short, 2 = long) */
114 16, /* bitsize */
115 false, /* pc_relative */
116 0, /* bitpos */
117 complain_overflow_bitfield, /* complain_on_overflow */
118 m32r_elf_generic_reloc,/* special_function */
119 "R_M32R_16", /* name */
120 true, /* partial_inplace */
121 0xffff, /* src_mask */
122 0xffff, /* dst_mask */
123 false), /* pcrel_offset */
124
125 /* A 32 bit absolute relocation. */
126 HOWTO (R_M32R_32, /* type */
127 0, /* rightshift */
128 2, /* size (0 = byte, 1 = short, 2 = long) */
129 32, /* bitsize */
130 false, /* pc_relative */
131 0, /* bitpos */
132 complain_overflow_bitfield, /* complain_on_overflow */
133 m32r_elf_generic_reloc,/* special_function */
134 "R_M32R_32", /* name */
135 true, /* partial_inplace */
136 0xffffffff, /* src_mask */
137 0xffffffff, /* dst_mask */
138 false), /* pcrel_offset */
139
140 /* A 24 bit address. */
141 HOWTO (R_M32R_24, /* type */
142 0, /* rightshift */
143 2, /* size (0 = byte, 1 = short, 2 = long) */
144 24, /* bitsize */
145 false, /* pc_relative */
146 0, /* bitpos */
147 complain_overflow_unsigned, /* complain_on_overflow */
148 m32r_elf_generic_reloc,/* special_function */
149 "R_M32R_24", /* name */
150 true, /* partial_inplace */
151 0xffffff, /* src_mask */
152 0xffffff, /* dst_mask */
153 false), /* pcrel_offset */
154
155 /* An PC Relative 10-bit relocation, shifted by 2.
156 This reloc is complicated because relocations are relative to pc & -4.
157 i.e. branches in the right insn slot use the address of the left insn
158 slot for pc. */
159 /* ??? It's not clear whether this should have partial_inplace set or not.
160 Branch relaxing in the assembler can store the addend in the insn,
161 and if bfd_install_relocation gets called the addend may get added
162 again. */
163 HOWTO (R_M32R_10_PCREL, /* type */
164 2, /* rightshift */
165 1, /* size (0 = byte, 1 = short, 2 = long) */
166 10, /* bitsize */
167 true, /* pc_relative */
168 0, /* bitpos */
169 complain_overflow_signed, /* complain_on_overflow */
170 m32r_elf_10_pcrel_reloc, /* special_function */
171 "R_M32R_10_PCREL", /* name */
172 false, /* partial_inplace */
173 0xff, /* src_mask */
174 0xff, /* dst_mask */
175 true), /* pcrel_offset */
176
177 /* A relative 18 bit relocation, right shifted by 2. */
178 HOWTO (R_M32R_18_PCREL, /* type */
179 2, /* rightshift */
180 2, /* size (0 = byte, 1 = short, 2 = long) */
181 16, /* bitsize */
182 true, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_signed, /* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_M32R_18_PCREL", /* name */
187 false, /* partial_inplace */
188 0xffff, /* src_mask */
189 0xffff, /* dst_mask */
190 true), /* pcrel_offset */
191
192 /* A relative 26 bit relocation, right shifted by 2. */
193 /* ??? It's not clear whether this should have partial_inplace set or not.
194 Branch relaxing in the assembler can store the addend in the insn,
195 and if bfd_install_relocation gets called the addend may get added
196 again. */
197 HOWTO (R_M32R_26_PCREL, /* type */
198 2, /* rightshift */
199 2, /* size (0 = byte, 1 = short, 2 = long) */
200 26, /* bitsize */
201 true, /* pc_relative */
202 0, /* bitpos */
203 complain_overflow_signed, /* complain_on_overflow */
204 bfd_elf_generic_reloc, /* special_function */
205 "R_M32R_26_PCREL", /* name */
206 false, /* partial_inplace */
207 0xffffff, /* src_mask */
208 0xffffff, /* dst_mask */
209 true), /* pcrel_offset */
210
211 /* High 16 bits of address when lower 16 is or'd in. */
212 HOWTO (R_M32R_HI16_ULO, /* type */
213 16, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 16, /* bitsize */
216 false, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont, /* complain_on_overflow */
219 m32r_elf_hi16_reloc, /* special_function */
220 "R_M32R_HI16_ULO", /* name */
221 true, /* partial_inplace */
222 0x0000ffff, /* src_mask */
223 0x0000ffff, /* dst_mask */
224 false), /* pcrel_offset */
225
226 /* High 16 bits of address when lower 16 is added in. */
227 HOWTO (R_M32R_HI16_SLO, /* type */
228 16, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 16, /* bitsize */
231 false, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_dont, /* complain_on_overflow */
234 m32r_elf_hi16_reloc, /* special_function */
235 "R_M32R_HI16_SLO", /* name */
236 true, /* partial_inplace */
237 0x0000ffff, /* src_mask */
238 0x0000ffff, /* dst_mask */
239 false), /* pcrel_offset */
240
241 /* Lower 16 bits of address. */
242 HOWTO (R_M32R_LO16, /* type */
243 0, /* rightshift */
244 2, /* size (0 = byte, 1 = short, 2 = long) */
245 16, /* bitsize */
246 false, /* pc_relative */
247 0, /* bitpos */
248 complain_overflow_dont, /* complain_on_overflow */
249 m32r_elf_lo16_reloc, /* special_function */
250 "R_M32R_LO16", /* name */
251 true, /* partial_inplace */
252 0x0000ffff, /* src_mask */
253 0x0000ffff, /* dst_mask */
254 false), /* pcrel_offset */
255
256 /* Small data area 16 bits offset. */
257 HOWTO (R_M32R_SDA16, /* type */
258 0, /* rightshift */
259 2, /* size (0 = byte, 1 = short, 2 = long) */
260 16, /* bitsize */
261 false, /* pc_relative */
262 0, /* bitpos */
263 complain_overflow_signed, /* complain_on_overflow */
264 m32r_elf_sda16_reloc, /* special_function */
265 "R_M32R_SDA16", /* name */
266 true, /* partial_inplace */ /* FIXME: correct? */
267 0x0000ffff, /* src_mask */
268 0x0000ffff, /* dst_mask */
269 false), /* pcrel_offset */
270
271 /* GNU extension to record C++ vtable hierarchy */
272 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
273 0, /* rightshift */
274 2, /* size (0 = byte, 1 = short, 2 = long) */
275 0, /* bitsize */
276 false, /* pc_relative */
277 0, /* bitpos */
278 complain_overflow_dont, /* complain_on_overflow */
279 NULL, /* special_function */
280 "R_M32R_GNU_VTINHERIT", /* name */
281 false, /* partial_inplace */
282 0, /* src_mask */
283 0, /* dst_mask */
284 false), /* pcrel_offset */
285
286 /* GNU extension to record C++ vtable member usage */
287 HOWTO (R_M32R_GNU_VTENTRY, /* type */
288 0, /* rightshift */
289 2, /* size (0 = byte, 1 = short, 2 = long) */
290 0, /* bitsize */
291 false, /* pc_relative */
292 0, /* bitpos */
293 complain_overflow_dont, /* complain_on_overflow */
294 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
295 "R_M32R_GNU_VTENTRY", /* name */
296 false, /* partial_inplace */
297 0, /* src_mask */
298 0, /* dst_mask */
299 false), /* pcrel_offset */
300
301 };
302 \f
303 /* Handle the R_M32R_10_PCREL reloc. */
304
305 static bfd_reloc_status_type
306 m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
307 input_section, output_bfd, error_message)
308 bfd * abfd;
309 arelent * reloc_entry;
310 asymbol * symbol;
311 PTR data;
312 asection * input_section;
313 bfd * output_bfd;
314 char ** error_message ATTRIBUTE_UNUSED;
315 {
316 /* This part is from bfd_elf_generic_reloc. */
317 if (output_bfd != (bfd *) NULL
318 && (symbol->flags & BSF_SECTION_SYM) == 0
319 && (! reloc_entry->howto->partial_inplace
320 || reloc_entry->addend == 0))
321 {
322 reloc_entry->address += input_section->output_offset;
323 return bfd_reloc_ok;
324 }
325
326 if (output_bfd != NULL)
327 {
328 /* FIXME: See bfd_perform_relocation. Is this right? */
329 return bfd_reloc_continue;
330 }
331
332 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
333 input_section,
334 data, reloc_entry->address,
335 symbol->section,
336 (symbol->value
337 + symbol->section->output_section->vma
338 + symbol->section->output_offset),
339 reloc_entry->addend);
340 }
341
342 /* Utility to actually perform an R_M32R_10_PCREL reloc. */
343
344 static bfd_reloc_status_type
345 m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
346 symbol_section, symbol_value, addend)
347 bfd *abfd;
348 reloc_howto_type *howto;
349 asection *input_section;
350 bfd_byte *data;
351 bfd_vma offset;
352 asection *symbol_section ATTRIBUTE_UNUSED;
353 bfd_vma symbol_value;
354 bfd_vma addend;
355 {
356 bfd_signed_vma relocation;
357 unsigned long x;
358 bfd_reloc_status_type status;
359
360 /* Sanity check the address (offset in section). */
361 if (offset > input_section->_cooked_size)
362 return bfd_reloc_outofrange;
363
364 relocation = symbol_value + addend;
365 /* Make it pc relative. */
366 relocation -= (input_section->output_section->vma
367 + input_section->output_offset);
368 /* These jumps mask off the lower two bits of the current address
369 before doing pcrel calculations. */
370 relocation -= (offset & -(bfd_vma) 4);
371
372 if (relocation < -0x200 || relocation > 0x1ff)
373 status = bfd_reloc_overflow;
374 else
375 status = bfd_reloc_ok;
376
377 x = bfd_get_16 (abfd, data + offset);
378 relocation >>= howto->rightshift;
379 relocation <<= howto->bitpos;
380 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
381 bfd_put_16 (abfd, (bfd_vma) x, data + offset);
382
383 return status;
384 }
385
386 /* Handle the R_M32R_HI16_[SU]LO relocs.
387 HI16_SLO is for the add3 and load/store with displacement instructions.
388 HI16_ULO is for the or3 instruction.
389 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
390 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
391 we must add one to the high 16 bytes (which will get subtracted off when
392 the low 16 bits are added).
393 These relocs have to be done in combination with an R_M32R_LO16 reloc
394 because there is a carry from the LO16 to the HI16. Here we just save
395 the information we need; we do the actual relocation when we see the LO16.
396 This code is copied from the elf32-mips.c. We also support an arbitrary
397 number of HI16 relocs to be associated with a single LO16 reloc. The
398 assembler sorts the relocs to ensure each HI16 immediately precedes its
399 LO16. However if there are multiple copies, the assembler may not find
400 the real LO16 so it picks the first one it finds. */
401
402 struct m32r_hi16
403 {
404 struct m32r_hi16 *next;
405 bfd_byte *addr;
406 bfd_vma addend;
407 };
408
409 /* FIXME: This should not be a static variable. */
410
411 static struct m32r_hi16 *m32r_hi16_list;
412
413 static bfd_reloc_status_type
414 m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
415 input_section, output_bfd, error_message)
416 bfd *abfd ATTRIBUTE_UNUSED;
417 arelent *reloc_entry;
418 asymbol *symbol;
419 PTR data;
420 asection *input_section;
421 bfd *output_bfd;
422 char **error_message ATTRIBUTE_UNUSED;
423 {
424 bfd_reloc_status_type ret;
425 bfd_vma relocation;
426 struct m32r_hi16 *n;
427
428 /* This part is from bfd_elf_generic_reloc.
429 If we're relocating, and this an external symbol, we don't want
430 to change anything. */
431 if (output_bfd != (bfd *) NULL
432 && (symbol->flags & BSF_SECTION_SYM) == 0
433 && reloc_entry->addend == 0)
434 {
435 reloc_entry->address += input_section->output_offset;
436 return bfd_reloc_ok;
437 }
438
439 /* Sanity check the address (offset in section). */
440 if (reloc_entry->address > input_section->_cooked_size)
441 return bfd_reloc_outofrange;
442
443 ret = bfd_reloc_ok;
444 if (bfd_is_und_section (symbol->section)
445 && output_bfd == (bfd *) NULL)
446 ret = bfd_reloc_undefined;
447
448 if (bfd_is_com_section (symbol->section))
449 relocation = 0;
450 else
451 relocation = symbol->value;
452
453 relocation += symbol->section->output_section->vma;
454 relocation += symbol->section->output_offset;
455 relocation += reloc_entry->addend;
456
457 /* Save the information, and let LO16 do the actual relocation. */
458 n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n);
459 if (n == NULL)
460 return bfd_reloc_outofrange;
461 n->addr = (bfd_byte *) data + reloc_entry->address;
462 n->addend = relocation;
463 n->next = m32r_hi16_list;
464 m32r_hi16_list = n;
465
466 if (output_bfd != (bfd *) NULL)
467 reloc_entry->address += input_section->output_offset;
468
469 return ret;
470 }
471
472 /* Handle an M32R ELF HI16 reloc. */
473
474 static void
475 m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
476 bfd *input_bfd;
477 int type;
478 Elf_Internal_Rela *relhi;
479 Elf_Internal_Rela *rello;
480 bfd_byte *contents;
481 bfd_vma addend;
482 {
483 unsigned long insn;
484 bfd_vma addlo;
485
486 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
487
488 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
489 if (type == R_M32R_HI16_SLO)
490 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
491 else
492 addlo &= 0xffff;
493
494 addend += ((insn & 0xffff) << 16) + addlo;
495
496 /* Reaccount for sign extension of low part. */
497 if (type == R_M32R_HI16_SLO
498 && (addend & 0x8000) != 0)
499 addend += 0x10000;
500
501 bfd_put_32 (input_bfd,
502 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
503 contents + relhi->r_offset);
504 }
505
506 /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
507 inplace relocation; this function exists in order to do the
508 R_M32R_HI16_[SU]LO relocation described above. */
509
510 bfd_reloc_status_type
511 m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data,
512 input_section, output_bfd, error_message)
513 bfd *input_bfd;
514 arelent *reloc_entry;
515 asymbol *symbol;
516 PTR data;
517 asection *input_section;
518 bfd *output_bfd;
519 char **error_message;
520 {
521 /* This part is from bfd_elf_generic_reloc.
522 If we're relocating, and this an external symbol, we don't want
523 to change anything. */
524 if (output_bfd != (bfd *) NULL
525 && (symbol->flags & BSF_SECTION_SYM) == 0
526 && reloc_entry->addend == 0)
527 {
528 reloc_entry->address += input_section->output_offset;
529 return bfd_reloc_ok;
530 }
531
532 if (m32r_hi16_list != NULL)
533 {
534 struct m32r_hi16 *l;
535
536 l = m32r_hi16_list;
537 while (l != NULL)
538 {
539 unsigned long insn;
540 unsigned long val;
541 unsigned long vallo;
542 struct m32r_hi16 *next;
543
544 /* Do the HI16 relocation. Note that we actually don't need
545 to know anything about the LO16 itself, except where to
546 find the low 16 bits of the addend needed by the LO16. */
547 insn = bfd_get_32 (input_bfd, l->addr);
548 vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address)
549 & 0xffff) ^ 0x8000) - 0x8000;
550 val = ((insn & 0xffff) << 16) + vallo;
551 val += l->addend;
552
553 /* Reaccount for sign extension of low part. */
554 if ((val & 0x8000) != 0)
555 val += 0x10000;
556
557 insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff);
558 bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr);
559
560 next = l->next;
561 free (l);
562 l = next;
563 }
564
565 m32r_hi16_list = NULL;
566 }
567
568 /* Now do the LO16 reloc in the usual way.
569 ??? It would be nice to call bfd_elf_generic_reloc here,
570 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
571 pass the handling back to bfd_install_relocation which will install
572 a section relative addend which is wrong. */
573 return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
574 input_section, output_bfd, error_message);
575 }
576
577 /* Do generic partial_inplace relocation.
578 This is a local replacement for bfd_elf_generic_reloc. */
579
580 bfd_reloc_status_type
581 m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
582 input_section, output_bfd, error_message)
583 bfd *input_bfd;
584 arelent *reloc_entry;
585 asymbol *symbol;
586 PTR data;
587 asection *input_section;
588 bfd *output_bfd;
589 char **error_message ATTRIBUTE_UNUSED;
590 {
591 bfd_reloc_status_type ret;
592 bfd_vma relocation;
593 bfd_byte *inplace_address;
594
595 /* This part is from bfd_elf_generic_reloc.
596 If we're relocating, and this an external symbol, we don't want
597 to change anything. */
598 if (output_bfd != (bfd *) NULL
599 && (symbol->flags & BSF_SECTION_SYM) == 0
600 && reloc_entry->addend == 0)
601 {
602 reloc_entry->address += input_section->output_offset;
603 return bfd_reloc_ok;
604 }
605
606 /* Now do the reloc in the usual way.
607 ??? It would be nice to call bfd_elf_generic_reloc here,
608 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
609 pass the handling back to bfd_install_relocation which will install
610 a section relative addend which is wrong. */
611
612 /* Sanity check the address (offset in section). */
613 if (reloc_entry->address > input_section->_cooked_size)
614 return bfd_reloc_outofrange;
615
616 ret = bfd_reloc_ok;
617 if (bfd_is_und_section (symbol->section)
618 && output_bfd == (bfd *) NULL)
619 ret = bfd_reloc_undefined;
620
621 if (bfd_is_com_section (symbol->section)
622 || output_bfd != (bfd *) NULL)
623 relocation = 0;
624 else
625 relocation = symbol->value;
626
627 /* Only do this for a final link. */
628 if (output_bfd == (bfd *) NULL)
629 {
630 relocation += symbol->section->output_section->vma;
631 relocation += symbol->section->output_offset;
632 }
633
634 relocation += reloc_entry->addend;
635 inplace_address = (bfd_byte *) data + reloc_entry->address;
636
637 #define DOIT(x) \
638 x = ( (x & ~reloc_entry->howto->dst_mask) | \
639 (((x & reloc_entry->howto->src_mask) + relocation) & \
640 reloc_entry->howto->dst_mask))
641
642 switch (reloc_entry->howto->size)
643 {
644 case 1:
645 {
646 short x = bfd_get_16 (input_bfd, inplace_address);
647 DOIT (x);
648 bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address);
649 }
650 break;
651 case 2:
652 {
653 unsigned long x = bfd_get_32 (input_bfd, inplace_address);
654 DOIT (x);
655 bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address);
656 }
657 break;
658 default:
659 BFD_ASSERT (0);
660 }
661
662 if (output_bfd != (bfd *) NULL)
663 reloc_entry->address += input_section->output_offset;
664
665 return ret;
666 }
667
668 /* Handle the R_M32R_SDA16 reloc.
669 This reloc is used to compute the address of objects in the small data area
670 and to perform loads and stores from that area.
671 The lower 16 bits are sign extended and added to the register specified
672 in the instruction, which is assumed to point to _SDA_BASE_. */
673
674 static bfd_reloc_status_type
675 m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
676 input_section, output_bfd, error_message)
677 bfd *abfd ATTRIBUTE_UNUSED;
678 arelent *reloc_entry;
679 asymbol *symbol;
680 PTR data ATTRIBUTE_UNUSED;
681 asection *input_section;
682 bfd *output_bfd;
683 char **error_message ATTRIBUTE_UNUSED;
684 {
685 /* This part is from bfd_elf_generic_reloc. */
686 if (output_bfd != (bfd *) NULL
687 && (symbol->flags & BSF_SECTION_SYM) == 0
688 && (! reloc_entry->howto->partial_inplace
689 || reloc_entry->addend == 0))
690 {
691 reloc_entry->address += input_section->output_offset;
692 return bfd_reloc_ok;
693 }
694
695 if (output_bfd != NULL)
696 {
697 /* FIXME: See bfd_perform_relocation. Is this right? */
698 return bfd_reloc_continue;
699 }
700
701 /* FIXME: not sure what to do here yet. But then again, the linker
702 may never call us. */
703 abort ();
704 }
705 \f
706 /* Map BFD reloc types to M32R ELF reloc types. */
707
708 struct m32r_reloc_map
709 {
710 bfd_reloc_code_real_type bfd_reloc_val;
711 unsigned char elf_reloc_val;
712 };
713
714 static const struct m32r_reloc_map m32r_reloc_map[] =
715 {
716 { BFD_RELOC_NONE, R_M32R_NONE },
717 { BFD_RELOC_16, R_M32R_16 },
718 { BFD_RELOC_32, R_M32R_32 },
719 { BFD_RELOC_M32R_24, R_M32R_24 },
720 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
721 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
722 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
723 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
724 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
725 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
726 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
727 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
728 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
729 };
730
731 static reloc_howto_type *
732 bfd_elf32_bfd_reloc_type_lookup (abfd, code)
733 bfd *abfd ATTRIBUTE_UNUSED;
734 bfd_reloc_code_real_type code;
735 {
736 unsigned int i;
737
738 for (i = 0;
739 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
740 i++)
741 {
742 if (m32r_reloc_map[i].bfd_reloc_val == code)
743 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
744 }
745
746 return NULL;
747 }
748
749 /* Set the howto pointer for an M32R ELF reloc. */
750
751 static void
752 m32r_info_to_howto_rel (abfd, cache_ptr, dst)
753 bfd *abfd ATTRIBUTE_UNUSED;
754 arelent *cache_ptr;
755 Elf32_Internal_Rel *dst;
756 {
757 unsigned int r_type;
758
759 r_type = ELF32_R_TYPE (dst->r_info);
760 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
761 cache_ptr->howto = &m32r_elf_howto_table[r_type];
762 }
763 \f
764 /* Given a BFD section, try to locate the corresponding ELF section
765 index. */
766
767 boolean
768 _bfd_m32r_elf_section_from_bfd_section (abfd, sec, retval)
769 bfd *abfd ATTRIBUTE_UNUSED;
770 asection *sec;
771 int *retval;
772 {
773 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
774 {
775 *retval = SHN_M32R_SCOMMON;
776 return true;
777 }
778 return false;
779 }
780
781 /* M32R ELF uses two common sections. One is the usual one, and the other
782 is for small objects. All the small objects are kept together, and then
783 referenced via one register, which yields faster assembler code. It is
784 up to the compiler to emit an instruction to load the register with
785 _SDA_BASE. This is what we use for the small common section. This
786 approach is copied from elf32-mips.c. */
787 static asection m32r_elf_scom_section;
788 static asymbol m32r_elf_scom_symbol;
789 static asymbol *m32r_elf_scom_symbol_ptr;
790
791 /* Handle the special M32R section numbers that a symbol may use. */
792
793 void
794 _bfd_m32r_elf_symbol_processing (abfd, asym)
795 bfd *abfd ATTRIBUTE_UNUSED;
796 asymbol *asym;
797 {
798 elf_symbol_type *elfsym;
799
800 elfsym = (elf_symbol_type *) asym;
801
802 switch (elfsym->internal_elf_sym.st_shndx)
803 {
804 case SHN_M32R_SCOMMON:
805 if (m32r_elf_scom_section.name == NULL)
806 {
807 /* Initialize the small common section. */
808 m32r_elf_scom_section.name = ".scommon";
809 m32r_elf_scom_section.flags = SEC_IS_COMMON;
810 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
811 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
812 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
813 m32r_elf_scom_symbol.name = ".scommon";
814 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
815 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
816 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
817 }
818 asym->section = &m32r_elf_scom_section;
819 asym->value = elfsym->internal_elf_sym.st_size;
820 break;
821 }
822 }
823
824 /* Hook called by the linker routine which adds symbols from an object
825 file. We must handle the special M32R section numbers here.
826 We also keep watching for whether we need to create the sdata special
827 linker sections. */
828
829 static boolean
830 m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
831 bfd *abfd;
832 struct bfd_link_info *info;
833 const Elf_Internal_Sym *sym;
834 const char **namep;
835 flagword *flagsp ATTRIBUTE_UNUSED;
836 asection **secp;
837 bfd_vma *valp;
838 {
839 if (! info->relocateable
840 && (*namep)[0] == '_' && (*namep)[1] == 'S'
841 && strcmp (*namep, "_SDA_BASE_") == 0
842 && info->hash->creator->flavour == bfd_target_elf_flavour)
843 {
844 /* This is simpler than using _bfd_elf_create_linker_section
845 (our needs are simpler than ppc's needs). Also
846 _bfd_elf_create_linker_section currently has a bug where if a .sdata
847 section already exists a new one is created that follows it which
848 screws of _SDA_BASE_ address calcs because output_offset != 0. */
849 struct elf_link_hash_entry *h;
850 asection *s = bfd_get_section_by_name (abfd, ".sdata");
851
852 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
853
854 if (s == NULL)
855 {
856 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
857 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
858
859 s = bfd_make_section_anyway (abfd, ".sdata");
860 if (s == NULL)
861 return false;
862 bfd_set_section_flags (abfd, s, flags);
863 bfd_set_section_alignment (abfd, s, 2);
864 }
865
866 h = (struct elf_link_hash_entry *)
867 bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false);
868
869 if ((h == NULL || h->root.type == bfd_link_hash_undefined)
870 && !(_bfd_generic_link_add_one_symbol (info,
871 abfd,
872 "_SDA_BASE_",
873 BSF_GLOBAL,
874 s,
875 (bfd_vma) 32768,
876 (const char *) NULL,
877 false,
878 get_elf_backend_data (abfd)->collect,
879 (struct bfd_link_hash_entry **) &h)))
880 return false;
881 h->type = STT_OBJECT;
882 }
883
884 switch (sym->st_shndx)
885 {
886 case SHN_M32R_SCOMMON:
887 *secp = bfd_make_section_old_way (abfd, ".scommon");
888 (*secp)->flags |= SEC_IS_COMMON;
889 *valp = sym->st_size;
890 break;
891 }
892
893 return true;
894 }
895
896 /* We have to figure out the SDA_BASE value, so that we can adjust the
897 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
898 BFD. If we can't find it, we're stuck. We cache it in the ELF
899 target data. We don't need to adjust the symbol value for an
900 external symbol if we are producing relocateable output. */
901
902 static bfd_reloc_status_type
903 m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
904 bfd *output_bfd;
905 struct bfd_link_info *info;
906 const char **error_message;
907 bfd_vma *psb;
908 {
909 if (elf_gp (output_bfd) == 0)
910 {
911 struct bfd_link_hash_entry *h;
912
913 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
914 if (h != (struct bfd_link_hash_entry *) NULL
915 && h->type == bfd_link_hash_defined)
916 elf_gp (output_bfd) = (h->u.def.value
917 + h->u.def.section->output_section->vma
918 + h->u.def.section->output_offset);
919 else
920 {
921 /* Only get the error once. */
922 *psb = elf_gp (output_bfd) = 4;
923 *error_message =
924 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
925 return bfd_reloc_dangerous;
926 }
927 }
928 *psb = elf_gp (output_bfd);
929 return bfd_reloc_ok;
930 }
931 \f
932 /* Relocate an M32R/D ELF section.
933 There is some attempt to make this function usable for many architectures,
934 both for RELA and REL type relocs, if only to serve as a learning tool.
935
936 The RELOCATE_SECTION function is called by the new ELF backend linker
937 to handle the relocations for a section.
938
939 The relocs are always passed as Rela structures; if the section
940 actually uses Rel structures, the r_addend field will always be
941 zero.
942
943 This function is responsible for adjust the section contents as
944 necessary, and (if using Rela relocs and generating a
945 relocateable output file) adjusting the reloc addend as
946 necessary.
947
948 This function does not have to worry about setting the reloc
949 address or the reloc symbol index.
950
951 LOCAL_SYMS is a pointer to the swapped in local symbols.
952
953 LOCAL_SECTIONS is an array giving the section in the input file
954 corresponding to the st_shndx field of each local symbol.
955
956 The global hash table entry for the global symbols can be found
957 via elf_sym_hashes (input_bfd).
958
959 When generating relocateable output, this function must handle
960 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
961 going to be the section symbol corresponding to the output
962 section, which means that the addend must be adjusted
963 accordingly. */
964
965 static boolean
966 m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
967 contents, relocs, local_syms, local_sections)
968 bfd *output_bfd ATTRIBUTE_UNUSED;
969 struct bfd_link_info *info;
970 bfd *input_bfd;
971 asection *input_section;
972 bfd_byte *contents;
973 Elf_Internal_Rela *relocs;
974 Elf_Internal_Sym *local_syms;
975 asection **local_sections;
976 {
977 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
978 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
979 Elf_Internal_Rela *rel, *relend;
980 /* Assume success. */
981 boolean ret = true;
982
983 #ifndef USE_REL
984 if (info->relocateable)
985 return true;
986 #endif
987
988 rel = relocs;
989 relend = relocs + input_section->reloc_count;
990 for (; rel < relend; rel++)
991 {
992 int r_type;
993 reloc_howto_type *howto;
994 unsigned long r_symndx;
995 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
996 ensure it's zero (we use REL relocs, not RELA). Therefore this
997 should be assigning zero to `addend', but for clarity we use
998 `r_addend'. */
999 bfd_vma addend = rel->r_addend;
1000 bfd_vma offset = rel->r_offset;
1001 struct elf_link_hash_entry *h;
1002 Elf_Internal_Sym *sym;
1003 asection *sec;
1004 const char *sym_name;
1005 bfd_reloc_status_type r;
1006 const char *errmsg = NULL;
1007
1008 h = NULL;
1009 r_type = ELF32_R_TYPE (rel->r_info);
1010 if (r_type < 0 || r_type >= (int) R_M32R_max)
1011 {
1012 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
1013 bfd_archive_filename (input_bfd),
1014 (int) r_type);
1015 bfd_set_error (bfd_error_bad_value);
1016 ret = false;
1017 continue;
1018 }
1019
1020 if (r_type == R_M32R_GNU_VTENTRY
1021 || r_type == R_M32R_GNU_VTINHERIT)
1022 continue;
1023
1024 howto = m32r_elf_howto_table + r_type;
1025 r_symndx = ELF32_R_SYM (rel->r_info);
1026
1027 #ifdef USE_REL
1028 if (info->relocateable)
1029 {
1030 /* This is a relocateable link. We don't have to change
1031 anything, unless the reloc is against a section symbol,
1032 in which case we have to adjust according to where the
1033 section symbol winds up in the output section. */
1034 sec = NULL;
1035 if (r_symndx >= symtab_hdr->sh_info)
1036 {
1037 /* External symbol. */
1038 continue;
1039 }
1040
1041 /* Local symbol. */
1042 sym = local_syms + r_symndx;
1043 sym_name = "<local symbol>";
1044 /* STT_SECTION: symbol is associated with a section. */
1045 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
1046 {
1047 /* Symbol isn't associated with a section. Nothing to do. */
1048 continue;
1049 }
1050
1051 sec = local_sections[r_symndx];
1052 addend += sec->output_offset + sym->st_value;
1053
1054 /* If partial_inplace, we need to store any additional addend
1055 back in the section. */
1056 if (! howto->partial_inplace)
1057 continue;
1058 /* ??? Here is a nice place to call a special_function
1059 like handler. */
1060 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
1061 r = _bfd_relocate_contents (howto, input_bfd,
1062 addend, contents + offset);
1063 else
1064 {
1065 Elf_Internal_Rela *lorel;
1066
1067 /* We allow an arbitrary number of HI16 relocs before the
1068 LO16 reloc. This permits gcc to emit the HI and LO relocs
1069 itself. */
1070 for (lorel = rel + 1;
1071 (lorel < relend
1072 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1073 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1074 lorel++)
1075 continue;
1076 if (lorel < relend
1077 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1078 {
1079 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1080 contents, addend);
1081 r = bfd_reloc_ok;
1082 }
1083 else
1084 r = _bfd_relocate_contents (howto, input_bfd,
1085 addend, contents + offset);
1086 }
1087 }
1088 else
1089 #endif /* USE_REL */
1090 {
1091 bfd_vma relocation;
1092
1093 /* This is a final link. */
1094 sym = NULL;
1095 sec = NULL;
1096
1097 if (r_symndx < symtab_hdr->sh_info)
1098 {
1099 /* Local symbol. */
1100 sym = local_syms + r_symndx;
1101 sec = local_sections[r_symndx];
1102 sym_name = "<local symbol>";
1103 #ifndef USE_REL
1104 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel);
1105 addend = rel->r_addend;
1106 #else
1107 /* FIXME: This won't handle local relocations against SEC_MERGE
1108 symbols. See elf32-i386.c for how to do this. */
1109 relocation = (sec->output_section->vma
1110 + sec->output_offset
1111 + sym->st_value);
1112 #endif
1113 }
1114 else
1115 {
1116 /* External symbol. */
1117 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1118 while (h->root.type == bfd_link_hash_indirect
1119 || h->root.type == bfd_link_hash_warning)
1120 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1121 sym_name = h->root.root.string;
1122
1123 if (h->root.type == bfd_link_hash_defined
1124 || h->root.type == bfd_link_hash_defweak)
1125 {
1126 sec = h->root.u.def.section;
1127 if (sec->output_section == NULL)
1128 relocation = 0;
1129 else
1130 relocation = (h->root.u.def.value
1131 + sec->output_section->vma
1132 + sec->output_offset);
1133 }
1134 else if (h->root.type == bfd_link_hash_undefweak)
1135 relocation = 0;
1136 else
1137 {
1138 if (! ((*info->callbacks->undefined_symbol)
1139 (info, h->root.root.string, input_bfd,
1140 input_section, offset, true)))
1141 return false;
1142 relocation = 0;
1143 }
1144 }
1145
1146 /* Sanity check the address. */
1147 if (offset > input_section->_raw_size)
1148 {
1149 r = bfd_reloc_outofrange;
1150 goto check_reloc;
1151 }
1152
1153 switch ((int) r_type)
1154 {
1155 case (int) R_M32R_10_PCREL :
1156 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1157 contents, offset,
1158 sec, relocation, addend);
1159 break;
1160
1161 case (int) R_M32R_HI16_SLO :
1162 case (int) R_M32R_HI16_ULO :
1163 {
1164 Elf_Internal_Rela *lorel;
1165
1166 /* We allow an arbitrary number of HI16 relocs before the
1167 LO16 reloc. This permits gcc to emit the HI and LO relocs
1168 itself. */
1169 for (lorel = rel + 1;
1170 (lorel < relend
1171 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1172 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1173 lorel++)
1174 continue;
1175 if (lorel < relend
1176 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1177 {
1178 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1179 contents, relocation + addend);
1180 r = bfd_reloc_ok;
1181 }
1182 else
1183 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1184 contents, offset,
1185 relocation, addend);
1186 }
1187 break;
1188
1189 case (int) R_M32R_SDA16 :
1190 {
1191 const char *name;
1192
1193 BFD_ASSERT (sec != NULL);
1194 name = bfd_get_section_name (abfd, sec);
1195
1196 if (strcmp (name, ".sdata") == 0
1197 || strcmp (name, ".sbss") == 0
1198 || strcmp (name, ".scommon") == 0)
1199 {
1200 bfd_vma sda_base;
1201 bfd *out_bfd = sec->output_section->owner;
1202
1203 r = m32r_elf_final_sda_base (out_bfd, info,
1204 &errmsg,
1205 &sda_base);
1206 if (r != bfd_reloc_ok)
1207 {
1208 ret = false;
1209 goto check_reloc;
1210 }
1211
1212 /* At this point `relocation' contains the object's
1213 address. */
1214 relocation -= sda_base;
1215 /* Now it contains the offset from _SDA_BASE_. */
1216 }
1217 else
1218 {
1219 (*_bfd_error_handler)
1220 (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1221 bfd_archive_filename (input_bfd),
1222 sym_name,
1223 m32r_elf_howto_table[(int) r_type].name,
1224 bfd_get_section_name (abfd, sec));
1225 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1226 ret = false;
1227 continue;
1228 }
1229 }
1230 /* fall through */
1231
1232 default :
1233 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1234 contents, offset,
1235 relocation, addend);
1236 break;
1237 }
1238 }
1239
1240 check_reloc:
1241
1242 if (r != bfd_reloc_ok)
1243 {
1244 /* FIXME: This should be generic enough to go in a utility. */
1245 const char *name;
1246
1247 if (h != NULL)
1248 name = h->root.root.string;
1249 else
1250 {
1251 name = (bfd_elf_string_from_elf_section
1252 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1253 if (name == NULL || *name == '\0')
1254 name = bfd_section_name (input_bfd, sec);
1255 }
1256
1257 if (errmsg != NULL)
1258 goto common_error;
1259
1260 switch (r)
1261 {
1262 case bfd_reloc_overflow:
1263 if (! ((*info->callbacks->reloc_overflow)
1264 (info, name, howto->name, (bfd_vma) 0,
1265 input_bfd, input_section, offset)))
1266 return false;
1267 break;
1268
1269 case bfd_reloc_undefined:
1270 if (! ((*info->callbacks->undefined_symbol)
1271 (info, name, input_bfd, input_section,
1272 offset, true)))
1273 return false;
1274 break;
1275
1276 case bfd_reloc_outofrange:
1277 errmsg = _("internal error: out of range error");
1278 goto common_error;
1279
1280 case bfd_reloc_notsupported:
1281 errmsg = _("internal error: unsupported relocation error");
1282 goto common_error;
1283
1284 case bfd_reloc_dangerous:
1285 errmsg = _("internal error: dangerous error");
1286 goto common_error;
1287
1288 default:
1289 errmsg = _("internal error: unknown error");
1290 /* fall through */
1291
1292 common_error:
1293 if (!((*info->callbacks->warning)
1294 (info, errmsg, name, input_bfd, input_section,
1295 offset)))
1296 return false;
1297 break;
1298 }
1299 }
1300 }
1301
1302 return ret;
1303 }
1304 \f
1305 #if 0 /* relaxing not supported yet */
1306
1307 /* This function handles relaxing for the m32r.
1308 Relaxing on the m32r is tricky because of instruction alignment
1309 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1310
1311 The following relaxing opportunities are handled:
1312
1313 seth/add3/jl -> bl24 or bl8
1314 seth/add3 -> ld24
1315
1316 It would be nice to handle bl24 -> bl8 but given:
1317
1318 - 4 byte insns must be on 4 byte boundaries
1319 - branch instructions only branch to insns on 4 byte boundaries
1320
1321 this isn't much of a win because the insn in the 2 "deleted" bytes
1322 must become a nop. With some complexity some real relaxation could be
1323 done but the frequency just wouldn't make it worth it; it's better to
1324 try to do all the code compaction one can elsewhere.
1325 When the chip supports parallel 16 bit insns, things may change.
1326 */
1327
1328 static boolean
1329 m32r_elf_relax_section (abfd, sec, link_info, again)
1330 bfd *abfd;
1331 asection *sec;
1332 struct bfd_link_info *link_info;
1333 boolean *again;
1334 {
1335 Elf_Internal_Shdr *symtab_hdr;
1336 /* The Rela structures are used here because that's what
1337 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1338 field to 0]. */
1339 Elf_Internal_Rela *internal_relocs = NULL;
1340 Elf_Internal_Rela *irel, *irelend;
1341 bfd_byte *contents = NULL;
1342 Elf_Internal_Sym *isymbuf = NULL;
1343
1344 /* Assume nothing changes. */
1345 *again = false;
1346
1347 /* We don't have to do anything for a relocateable link, if
1348 this section does not have relocs, or if this is not a
1349 code section. */
1350 if (link_info->relocateable
1351 || (sec->flags & SEC_RELOC) == 0
1352 || sec->reloc_count == 0
1353 || (sec->flags & SEC_CODE) == 0
1354 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1355 return true;
1356
1357 /* If this is the first time we have been called for this section,
1358 initialize the cooked size. */
1359 if (sec->_cooked_size == 0)
1360 sec->_cooked_size = sec->_raw_size;
1361
1362 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1363
1364 /* Get a copy of the native relocations. */
1365 internal_relocs = (_bfd_elf32_link_read_relocs
1366 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1367 link_info->keep_memory));
1368 if (internal_relocs == NULL)
1369 goto error_return;
1370
1371 /* Walk through them looking for relaxing opportunities. */
1372 irelend = internal_relocs + sec->reloc_count;
1373 for (irel = internal_relocs; irel < irelend; irel++)
1374 {
1375 bfd_vma symval;
1376
1377 /* If this isn't something that can be relaxed, then ignore
1378 this reloc. */
1379 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1380 continue;
1381
1382 /* Get the section contents if we haven't done so already. */
1383 if (contents == NULL)
1384 {
1385 /* Get cached copy if it exists. */
1386 if (elf_section_data (sec)->this_hdr.contents != NULL)
1387 contents = elf_section_data (sec)->this_hdr.contents;
1388 else
1389 {
1390 /* Go get them off disk. */
1391 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1392 if (contents == NULL)
1393 goto error_return;
1394
1395 if (! bfd_get_section_contents (abfd, sec, contents,
1396 (file_ptr) 0, sec->_raw_size))
1397 goto error_return;
1398 }
1399 }
1400
1401 /* Read this BFD's local symbols if we haven't done so already. */
1402 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
1403 {
1404 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1405 if (isymbuf == NULL)
1406 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1407 symtab_hdr->sh_info, 0,
1408 NULL, NULL, NULL);
1409 if (isymbuf == NULL)
1410 goto error_return;
1411 }
1412
1413 /* Get the value of the symbol referred to by the reloc. */
1414 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1415 {
1416 /* A local symbol. */
1417 Elf_Internal_Sym *isym;
1418 asection *sym_sec;
1419
1420 isym = isymbuf + ELF32_R_SYM (irel->r_info),
1421 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1422 symval = (isym->st_value
1423 + sym_sec->output_section->vma
1424 + sym_sec->output_offset);
1425 }
1426 else
1427 {
1428 unsigned long indx;
1429 struct elf_link_hash_entry *h;
1430
1431 /* An external symbol. */
1432 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1433 h = elf_sym_hashes (abfd)[indx];
1434 BFD_ASSERT (h != NULL);
1435 if (h->root.type != bfd_link_hash_defined
1436 && h->root.type != bfd_link_hash_defweak)
1437 {
1438 /* This appears to be a reference to an undefined
1439 symbol. Just ignore it--it will be caught by the
1440 regular reloc processing. */
1441 continue;
1442 }
1443
1444 symval = (h->root.u.def.value
1445 + h->root.u.def.section->output_section->vma
1446 + h->root.u.def.section->output_offset);
1447 }
1448
1449 /* For simplicity of coding, we are going to modify the section
1450 contents, the section relocs, and the BFD symbol table. We
1451 must tell the rest of the code not to free up this
1452 information. It would be possible to instead create a table
1453 of changes which have to be made, as is done in coff-mips.c;
1454 that would be more work, but would require less memory when
1455 the linker is run. */
1456
1457 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1458 This sequence is generated by the compiler when compiling in
1459 32 bit mode. Also look for seth/add3 -> ld24. */
1460
1461 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1462 {
1463 Elf_Internal_Rela *nrel;
1464 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1465 + irel->r_offset);
1466 bfd_signed_vma pcrel_value = symval - pc;
1467 unsigned int code,reg;
1468 int addend,nop_p,bl8_p,to_delete;
1469
1470 /* The tests are ordered so that we get out as quickly as possible
1471 if this isn't something we can relax, taking into account that
1472 we are looking for two separate possibilities (jl/ld24). */
1473
1474 /* Do nothing if no room in the section for this to be what we're
1475 looking for. */
1476 if (irel->r_offset > sec->_cooked_size - 8)
1477 continue;
1478
1479 /* Make sure the next relocation applies to the next
1480 instruction and that it's the add3's reloc. */
1481 nrel = irel + 1;
1482 if (nrel == irelend
1483 || irel->r_offset + 4 != nrel->r_offset
1484 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1485 continue;
1486
1487 /* See if the instructions are seth/add3. */
1488 /* FIXME: This is where macros from cgen can come in. */
1489 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1490 if ((code & 0xf0ff) != 0xd0c0)
1491 continue; /* not seth rN,foo */
1492 reg = (code & 0x0f00) >> 8;
1493 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1494 if (code != (0x80a0 | reg | (reg << 8)))
1495 continue; /* not add3 rN,rN,foo */
1496
1497 /* At this point we've confirmed we have seth/add3. Now check
1498 whether the next insn is a jl, in which case try to change this
1499 to bl24 or bl8. */
1500
1501 /* Ensure the branch target is in range.
1502 The bl24 instruction has a 24 bit operand which is the target
1503 address right shifted by 2, giving a signed range of 26 bits.
1504 Note that 4 bytes are added to the high value because the target
1505 will be at least 4 bytes closer if we can relax. It'll actually
1506 be 4 or 8 bytes closer, but we don't know which just yet and
1507 the difference isn't significant enough to worry about. */
1508 #ifndef USE_REL /* put in for learning purposes */
1509 pcrel_value += irel->r_addend;
1510 #else
1511 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1512 pcrel_value += addend;
1513 #endif
1514
1515 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1516 /* Do nothing if no room in the section for this to be what we're
1517 looking for. */
1518 && (irel->r_offset <= sec->_cooked_size - 12)
1519 /* Ensure the next insn is "jl rN". */
1520 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1521 code != (0x1ec0 | reg)))
1522 {
1523 /* We can relax to bl24/bl8. */
1524
1525 /* See if there's a nop following the jl.
1526 Also see if we can use a bl8 insn. */
1527 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1528 nop_p = (code & 0x7fff) == NOP_INSN;
1529 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1530
1531 if (bl8_p)
1532 {
1533 /* Change "seth rN,foo" to "bl8 foo || nop".
1534 We OR in CODE just in case it's not a nop (technically,
1535 CODE currently must be a nop, but for cleanness we
1536 allow it to be anything). */
1537 #ifndef USE_REL /* put in for learning purposes */
1538 code = 0x7e000000 | MAKE_PARALLEL (code);
1539 #else
1540 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1541 #endif
1542 to_delete = 8;
1543 }
1544 else
1545 {
1546 /* Change the seth rN,foo to a bl24 foo. */
1547 #ifndef USE_REL /* put in for learning purposes */
1548 code = 0xfe000000;
1549 #else
1550 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1551 #endif
1552 to_delete = nop_p ? 8 : 4;
1553 }
1554
1555 bfd_put_32 (abfd, code, contents + irel->r_offset);
1556
1557 /* Set the new reloc type. */
1558 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1559 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1560
1561 /* Delete the add3 reloc by making it a null reloc. */
1562 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1563 R_M32R_NONE);
1564 }
1565 else if (addend >= 0
1566 && symval + addend <= 0xffffff)
1567 {
1568 /* We can relax to ld24. */
1569
1570 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1571 bfd_put_32 (abfd, code, contents + irel->r_offset);
1572 to_delete = 4;
1573 /* Tell the following code a nop filler isn't needed. */
1574 nop_p = 1;
1575 }
1576 else
1577 {
1578 /* Can't do anything here. */
1579 continue;
1580 }
1581
1582 /* Note that we've changed the relocs, section contents, etc. */
1583 elf_section_data (sec)->relocs = internal_relocs;
1584 elf_section_data (sec)->this_hdr.contents = contents;
1585 symtab_hdr->contents = (unsigned char *) isymbuf;
1586
1587 /* Delete TO_DELETE bytes of data. */
1588 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1589 irel->r_offset + 4, to_delete))
1590 goto error_return;
1591
1592 /* Now that the following bytes have been moved into place, see if
1593 we need to replace the jl with a nop. This happens when we had
1594 to use a bl24 insn and the insn following the jl isn't a nop.
1595 Technically, this situation can't happen (since the insn can
1596 never be executed) but to be clean we do this. When the chip
1597 supports parallel 16 bit insns things may change.
1598 We don't need to do this in the case of relaxing to ld24,
1599 and the above code sets nop_p so this isn't done. */
1600 if (! nop_p && to_delete == 4)
1601 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1602
1603 /* That will change things, so we should relax again.
1604 Note that this is not required, and it may be slow. */
1605 *again = true;
1606
1607 continue;
1608 }
1609
1610 /* loop to try the next reloc */
1611 }
1612
1613 if (isymbuf != NULL
1614 && symtab_hdr->contents != (unsigned char *) isymbuf)
1615 {
1616 if (! link_info->keep_memory)
1617 free (isymbuf);
1618 else
1619 {
1620 /* Cache the symbols for elf_link_input_bfd. */
1621 symtab_hdr->contents = (unsigned char *) isymbuf;
1622 }
1623 }
1624
1625 if (contents != NULL
1626 && elf_section_data (sec)->this_hdr.contents != contents)
1627 {
1628 if (! link_info->keep_memory)
1629 free (contents);
1630 else
1631 {
1632 /* Cache the section contents for elf_link_input_bfd. */
1633 elf_section_data (sec)->this_hdr.contents = contents;
1634 }
1635 }
1636
1637 if (internal_relocs != NULL
1638 && elf_section_data (sec)->relocs != internal_relocs)
1639 free (internal_relocs);
1640
1641 return true;
1642
1643 error_return:
1644 if (isymbuf != NULL
1645 && symtab_hdr->contents != (unsigned char *) isymbuf)
1646 free (isymbuf);
1647 if (contents != NULL
1648 && elf_section_data (sec)->this_hdr.contents != contents)
1649 free (contents);
1650 if (internal_relocs != NULL
1651 && elf_section_data (sec)->relocs != internal_relocs)
1652 free (internal_relocs);
1653
1654 return false;
1655 }
1656
1657 /* Delete some bytes from a section while relaxing. */
1658
1659 static boolean
1660 m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1661 bfd *abfd;
1662 asection *sec;
1663 bfd_vma addr;
1664 int count;
1665 {
1666 Elf_Internal_Shdr *symtab_hdr;
1667 int shndx;
1668 bfd_byte *contents;
1669 Elf_Internal_Rela *irel, *irelend;
1670 Elf_Internal_Rela *irelalign;
1671 bfd_vma toaddr;
1672 Elf_Internal_Sym *isym, *isymend;
1673 struct elf_link_hash_entry **sym_hashes;
1674 struct elf_link_hash_entry **end_hashes;
1675 unsigned int symcount;
1676
1677 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1678
1679 contents = elf_section_data (sec)->this_hdr.contents;
1680
1681 /* The deletion must stop at the next ALIGN reloc for an aligment
1682 power larger than the number of bytes we are deleting. */
1683
1684 irelalign = NULL;
1685 toaddr = sec->_cooked_size;
1686
1687 irel = elf_section_data (sec)->relocs;
1688 irelend = irel + sec->reloc_count;
1689
1690 /* Actually delete the bytes. */
1691 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1692 sec->_cooked_size -= count;
1693
1694 /* Adjust all the relocs. */
1695 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1696 {
1697 /* Get the new reloc address. */
1698 if ((irel->r_offset > addr
1699 && irel->r_offset < toaddr))
1700 irel->r_offset -= count;
1701 }
1702
1703 /* Adjust the local symbols defined in this section. */
1704 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1705 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1706 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
1707 {
1708 if (isym->st_shndx == shndx
1709 && isym->st_value > addr
1710 && isym->st_value < toaddr)
1711 isym->st_value -= count;
1712 }
1713
1714 /* Now adjust the global symbols defined in this section. */
1715 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1716 - symtab_hdr->sh_info);
1717 sym_hashes = elf_sym_hashes (abfd);
1718 end_hashes = sym_hashes + symcount;
1719 for (; sym_hashes < end_hashes; sym_hashes++)
1720 {
1721 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1722
1723 if ((sym_hash->root.type == bfd_link_hash_defined
1724 || sym_hash->root.type == bfd_link_hash_defweak)
1725 && sym_hash->root.u.def.section == sec
1726 && sym_hash->root.u.def.value > addr
1727 && sym_hash->root.u.def.value < toaddr)
1728 {
1729 sym_hash->root.u.def.value -= count;
1730 }
1731 }
1732
1733 return true;
1734 }
1735
1736 /* This is a version of bfd_generic_get_relocated_section_contents
1737 which uses m32r_elf_relocate_section. */
1738
1739 static bfd_byte *
1740 m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1741 data, relocateable, symbols)
1742 bfd *output_bfd;
1743 struct bfd_link_info *link_info;
1744 struct bfd_link_order *link_order;
1745 bfd_byte *data;
1746 boolean relocateable;
1747 asymbol **symbols;
1748 {
1749 Elf_Internal_Shdr *symtab_hdr;
1750 asection *input_section = link_order->u.indirect.section;
1751 bfd *input_bfd = input_section->owner;
1752 asection **sections = NULL;
1753 Elf_Internal_Rela *internal_relocs = NULL;
1754 Elf_Internal_Sym *isymbuf = NULL;
1755 bfd_size_type amt;
1756
1757 /* We only need to handle the case of relaxing, or of having a
1758 particular set of section contents, specially. */
1759 if (relocateable
1760 || elf_section_data (input_section)->this_hdr.contents == NULL)
1761 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1762 link_order, data,
1763 relocateable,
1764 symbols);
1765
1766 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1767
1768 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1769 input_section->_raw_size);
1770
1771 if ((input_section->flags & SEC_RELOC) != 0
1772 && input_section->reloc_count > 0)
1773 {
1774 Elf_Internal_Sym *isymp;
1775 asection **secpp;
1776 Elf32_External_Sym *esym, *esymend;
1777
1778 internal_relocs = (_bfd_elf32_link_read_relocs
1779 (input_bfd, input_section, (PTR) NULL,
1780 (Elf_Internal_Rela *) NULL, false));
1781 if (internal_relocs == NULL)
1782 goto error_return;
1783
1784 if (symtab_hdr->sh_info != 0)
1785 {
1786 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1787 if (isymbuf == NULL)
1788 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1789 symtab_hdr->sh_info, 0,
1790 NULL, NULL, NULL);
1791 if (isymbuf == NULL)
1792 goto error_return;
1793 }
1794
1795 amt = symtab_hdr->sh_info;
1796 amt *= sizeof (asection *);
1797 sections = (asection **) bfd_malloc (amt);
1798 if (sections == NULL && symtab_hdr->sh_info > 0)
1799 goto error_return;
1800
1801 isymend = isymbuf + symtab_hdr->sh_info;
1802 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
1803 {
1804 asection *isec;
1805
1806 if (isym->st_shndx == SHN_UNDEF)
1807 isec = bfd_und_section_ptr;
1808 else if (isym->st_shndx == SHN_ABS)
1809 isec = bfd_abs_section_ptr;
1810 else if (isym->st_shndx == SHN_COMMON)
1811 isec = bfd_com_section_ptr;
1812 else if (isym->st_shndx == SHN_M32R_SCOMMON)
1813 isec = &m32r_elf_scom_section;
1814 else
1815 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
1816
1817 *secpp = isec;
1818 }
1819
1820 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1821 input_section, data, internal_relocs,
1822 isymbuf, sections))
1823 goto error_return;
1824
1825 if (sections != NULL)
1826 free (sections);
1827 if (isymbuf != NULL
1828 && symtab_hdr->contents != (unsigned char *) isymbuf)
1829 free (isymbuf);
1830 if (elf_section_data (input_section)->relocs != internal_relocs)
1831 free (internal_relocs);
1832 }
1833
1834 return data;
1835
1836 error_return:
1837 if (sections != NULL)
1838 free (sections);
1839 if (isymbuf != NULL
1840 && symtab_hdr->contents != (unsigned char *) isymbuf)
1841 free (isymbuf);
1842 if (internal_relocs != NULL
1843 && elf_section_data (input_section)->relocs != internal_relocs)
1844 free (internal_relocs);
1845 return NULL;
1846 }
1847
1848 #endif /* #if 0 */
1849 \f
1850 /* Set the right machine number. */
1851 static boolean
1852 m32r_elf_object_p (abfd)
1853 bfd *abfd;
1854 {
1855 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1856 {
1857 default:
1858 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
1859 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
1860 }
1861 return true;
1862 }
1863
1864 /* Store the machine number in the flags field. */
1865 static void
1866 m32r_elf_final_write_processing (abfd, linker)
1867 bfd * abfd;
1868 boolean linker ATTRIBUTE_UNUSED;
1869 {
1870 unsigned long val;
1871
1872 switch (bfd_get_mach (abfd))
1873 {
1874 default:
1875 case bfd_mach_m32r: val = E_M32R_ARCH; break;
1876 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
1877 }
1878
1879 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1880 elf_elfheader (abfd)->e_flags |= val;
1881 }
1882
1883 /* Function to keep M32R specific file flags. */
1884 static boolean
1885 m32r_elf_set_private_flags (abfd, flags)
1886 bfd * abfd;
1887 flagword flags;
1888 {
1889 BFD_ASSERT (!elf_flags_init (abfd)
1890 || elf_elfheader (abfd)->e_flags == flags);
1891
1892 elf_elfheader (abfd)->e_flags = flags;
1893 elf_flags_init (abfd) = true;
1894 return true;
1895 }
1896
1897 /* Merge backend specific data from an object file to the output
1898 object file when linking. */
1899 static boolean
1900 m32r_elf_merge_private_bfd_data (ibfd, obfd)
1901 bfd * ibfd;
1902 bfd * obfd;
1903 {
1904 flagword out_flags;
1905 flagword in_flags;
1906
1907 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1908 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1909 return true;
1910
1911 in_flags = elf_elfheader (ibfd)->e_flags;
1912 out_flags = elf_elfheader (obfd)->e_flags;
1913
1914 if (! elf_flags_init (obfd))
1915 {
1916 /* If the input is the default architecture then do not
1917 bother setting the flags for the output architecture,
1918 instead allow future merges to do this. If no future
1919 merges ever set these flags then they will retain their
1920 unitialised values, which surprise surprise, correspond
1921 to the default values. */
1922 if (bfd_get_arch_info (ibfd)->the_default)
1923 return true;
1924
1925 elf_flags_init (obfd) = true;
1926 elf_elfheader (obfd)->e_flags = in_flags;
1927
1928 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1929 && bfd_get_arch_info (obfd)->the_default)
1930 {
1931 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
1932 }
1933
1934 return true;
1935 }
1936
1937 /* Check flag compatibility. */
1938 if (in_flags == out_flags)
1939 return true;
1940
1941 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
1942 {
1943 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
1944 {
1945 (*_bfd_error_handler)
1946 (_("%s: Instruction set mismatch with previous modules"),
1947 bfd_archive_filename (ibfd));
1948
1949 bfd_set_error (bfd_error_bad_value);
1950 return false;
1951 }
1952 }
1953
1954 return true;
1955 }
1956
1957 /* Display the flags field */
1958 static boolean
1959 m32r_elf_print_private_bfd_data (abfd, ptr)
1960 bfd * abfd;
1961 PTR ptr;
1962 {
1963 FILE * file = (FILE *) ptr;
1964
1965 BFD_ASSERT (abfd != NULL && ptr != NULL)
1966
1967 _bfd_elf_print_private_bfd_data (abfd, ptr);
1968
1969 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
1970
1971 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1972 {
1973 default:
1974 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
1975 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
1976 }
1977
1978 fputc ('\n', file);
1979
1980 return true;
1981 }
1982
1983 asection *
1984 m32r_elf_gc_mark_hook (sec, info, rel, h, sym)
1985 asection *sec;
1986 struct bfd_link_info *info ATTRIBUTE_UNUSED;
1987 Elf_Internal_Rela *rel;
1988 struct elf_link_hash_entry *h;
1989 Elf_Internal_Sym *sym;
1990 {
1991 if (h != NULL)
1992 {
1993 switch (ELF32_R_TYPE (rel->r_info))
1994 {
1995 case R_M32R_GNU_VTINHERIT:
1996 case R_M32R_GNU_VTENTRY:
1997 break;
1998
1999 default:
2000 switch (h->root.type)
2001 {
2002 case bfd_link_hash_defined:
2003 case bfd_link_hash_defweak:
2004 return h->root.u.def.section;
2005
2006 case bfd_link_hash_common:
2007 return h->root.u.c.p->section;
2008
2009 default:
2010 break;
2011 }
2012 }
2013 }
2014 else
2015 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
2016
2017 return NULL;
2018 }
2019
2020 static boolean
2021 m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
2022 bfd *abfd ATTRIBUTE_UNUSED;
2023 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2024 asection *sec ATTRIBUTE_UNUSED;
2025 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
2026 {
2027 /* we don't use got and plt entries for m32r */
2028 return true;
2029 }
2030
2031 /* Look through the relocs for a section during the first phase.
2032 Since we don't do .gots or .plts, we just need to consider the
2033 virtual table relocs for gc. */
2034
2035 static boolean
2036 m32r_elf_check_relocs (abfd, info, sec, relocs)
2037 bfd *abfd;
2038 struct bfd_link_info *info;
2039 asection *sec;
2040 const Elf_Internal_Rela *relocs;
2041 {
2042 Elf_Internal_Shdr *symtab_hdr;
2043 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2044 const Elf_Internal_Rela *rel;
2045 const Elf_Internal_Rela *rel_end;
2046
2047 if (info->relocateable)
2048 return true;
2049
2050 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2051 sym_hashes = elf_sym_hashes (abfd);
2052 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
2053 if (!elf_bad_symtab (abfd))
2054 sym_hashes_end -= symtab_hdr->sh_info;
2055
2056 rel_end = relocs + sec->reloc_count;
2057 for (rel = relocs; rel < rel_end; rel++)
2058 {
2059 struct elf_link_hash_entry *h;
2060 unsigned long r_symndx;
2061
2062 r_symndx = ELF32_R_SYM (rel->r_info);
2063 if (r_symndx < symtab_hdr->sh_info)
2064 h = NULL;
2065 else
2066 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
2067
2068 switch (ELF32_R_TYPE (rel->r_info))
2069 {
2070 /* This relocation describes the C++ object vtable hierarchy.
2071 Reconstruct it for later use during GC. */
2072 case R_M32R_GNU_VTINHERIT:
2073 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2074 return false;
2075 break;
2076
2077 /* This relocation describes which C++ vtable entries are actually
2078 used. Record for later use during GC. */
2079 case R_M32R_GNU_VTENTRY:
2080 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2081 return false;
2082 break;
2083 }
2084 }
2085
2086 return true;
2087 }
2088 \f
2089 #define ELF_ARCH bfd_arch_m32r
2090 #define ELF_MACHINE_CODE EM_M32R
2091 #define ELF_MACHINE_ALT1 EM_CYGNUS_M32R
2092 #define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
2093
2094 #define TARGET_BIG_SYM bfd_elf32_m32r_vec
2095 #define TARGET_BIG_NAME "elf32-m32r"
2096
2097 #define elf_info_to_howto 0
2098 #define elf_info_to_howto_rel m32r_info_to_howto_rel
2099 #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2100 #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2101 #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2102 #define elf_backend_relocate_section m32r_elf_relocate_section
2103 #define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2104 #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2105 #define elf_backend_check_relocs m32r_elf_check_relocs
2106
2107 #define elf_backend_can_gc_sections 1
2108 #ifndef USE_REL
2109 #define elf_backend_rela_normal 1
2110 #endif
2111 #if 0 /* not yet */
2112 /* relax support */
2113 #define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2114 #define bfd_elf32_bfd_get_relocated_section_contents \
2115 m32r_elf_get_relocated_section_contents
2116 #endif
2117
2118 #define elf_backend_object_p m32r_elf_object_p
2119 #define elf_backend_final_write_processing m32r_elf_final_write_processing
2120 #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2121 #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2122 #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
2123
2124 #include "elf32-target.h"
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