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[deliverable/binutils-gdb.git] / bfd / elf32-msp430.c
1 /* MSP430-specific support for 32-bit ELF
2 Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
3 Contributed by Dmitry Diky <diwil@mail.ru>
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 #include "bfd.h"
22 #include "sysdep.h"
23 #include "libiberty.h"
24 #include "libbfd.h"
25 #include "elf-bfd.h"
26 #include "elf/msp430.h"
27
28 /* Use RELA instead of REL. */
29 #undef USE_REL
30
31 static reloc_howto_type elf_msp430_howto_table[] =
32 {
33 HOWTO (R_MSP430_NONE, /* type */
34 0, /* rightshift */
35 2, /* size (0 = byte, 1 = short, 2 = long) */
36 32, /* bitsize */
37 FALSE, /* pc_relative */
38 0, /* bitpos */
39 complain_overflow_bitfield,/* complain_on_overflow */
40 bfd_elf_generic_reloc, /* special_function */
41 "R_MSP430_NONE", /* name */
42 FALSE, /* partial_inplace */
43 0, /* src_mask */
44 0, /* dst_mask */
45 FALSE), /* pcrel_offset */
46
47 HOWTO (R_MSP430_32, /* type */
48 0, /* rightshift */
49 2, /* size (0 = byte, 1 = short, 2 = long) */
50 32, /* bitsize */
51 FALSE, /* pc_relative */
52 0, /* bitpos */
53 complain_overflow_bitfield,/* complain_on_overflow */
54 bfd_elf_generic_reloc, /* special_function */
55 "R_MSP430_32", /* name */
56 FALSE, /* partial_inplace */
57 0xffffffff, /* src_mask */
58 0xffffffff, /* dst_mask */
59 FALSE), /* pcrel_offset */
60
61 /* A 13 bit PC relative relocation. */
62 HOWTO (R_MSP430_10_PCREL, /* type */
63 1, /* rightshift */
64 1, /* size (0 = byte, 1 = short, 2 = long) */
65 10, /* bitsize */
66 TRUE, /* pc_relative */
67 0, /* bitpos */
68 complain_overflow_bitfield,/* complain_on_overflow */
69 bfd_elf_generic_reloc, /* special_function */
70 "R_MSP430_13_PCREL", /* name */
71 FALSE, /* partial_inplace */
72 0xfff, /* src_mask */
73 0xfff, /* dst_mask */
74 TRUE), /* pcrel_offset */
75
76 /* A 16 bit absolute relocation. */
77 HOWTO (R_MSP430_16, /* type */
78 0, /* rightshift */
79 1, /* size (0 = byte, 1 = short, 2 = long) */
80 16, /* bitsize */
81 FALSE, /* pc_relative */
82 0, /* bitpos */
83 complain_overflow_dont,/* complain_on_overflow */
84 bfd_elf_generic_reloc, /* special_function */
85 "R_MSP430_16", /* name */
86 FALSE, /* partial_inplace */
87 0, /* src_mask */
88 0xffff, /* dst_mask */
89 FALSE), /* pcrel_offset */
90
91 /* A 16 bit absolute relocation for command address. */
92 HOWTO (R_MSP430_16_PCREL, /* type */
93 1, /* rightshift */
94 1, /* size (0 = byte, 1 = short, 2 = long) */
95 16, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_dont,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_MSP430_16_PCREL", /* name */
101 FALSE, /* partial_inplace */
102 0, /* src_mask */
103 0xffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* A 16 bit absolute relocation, byte operations. */
107 HOWTO (R_MSP430_16_BYTE, /* type */
108 0, /* rightshift */
109 1, /* size (0 = byte, 1 = short, 2 = long) */
110 16, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_dont,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_MSP430_16_BYTE", /* name */
116 FALSE, /* partial_inplace */
117 0xffff, /* src_mask */
118 0xffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* A 16 bit absolute relocation for command address. */
122 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
123 1, /* rightshift */
124 1, /* size (0 = byte, 1 = short, 2 = long) */
125 16, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_dont,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_MSP430_16_PCREL_BYTE",/* name */
131 FALSE, /* partial_inplace */
132 0xffff, /* src_mask */
133 0xffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
136 /* A 13 bit PC relative relocation for complicated polymorphs. */
137 HOWTO (R_MSP430_2X_PCREL, /* type */
138 1, /* rightshift */
139 2, /* size (0 = byte, 1 = short, 2 = long) */
140 10, /* bitsize */
141 TRUE, /* pc_relative */
142 0, /* bitpos */
143 complain_overflow_bitfield,/* complain_on_overflow */
144 bfd_elf_generic_reloc, /* special_function */
145 "R_MSP430_2X_PCREL", /* name */
146 FALSE, /* partial_inplace */
147 0xfff, /* src_mask */
148 0xfff, /* dst_mask */
149 TRUE), /* pcrel_offset */
150
151 /* A 16 bit relaxable relocation for command address. */
152 HOWTO (R_MSP430_RL_PCREL, /* type */
153 1, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 TRUE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_dont,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_MSP430_RL_PCREL", /* name */
161 FALSE, /* partial_inplace */
162 0, /* src_mask */
163 0xffff, /* dst_mask */
164 TRUE) /* pcrel_offset */
165 };
166
167 /* Map BFD reloc types to MSP430 ELF reloc types. */
168
169 struct msp430_reloc_map
170 {
171 bfd_reloc_code_real_type bfd_reloc_val;
172 unsigned int elf_reloc_val;
173 };
174
175 static const struct msp430_reloc_map msp430_reloc_map[] =
176 {
177 {BFD_RELOC_NONE, R_MSP430_NONE},
178 {BFD_RELOC_32, R_MSP430_32},
179 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
180 {BFD_RELOC_16, R_MSP430_16_BYTE},
181 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
182 {BFD_RELOC_MSP430_16, R_MSP430_16},
183 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
184 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
185 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
186 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
187 };
188
189 static reloc_howto_type *
190 bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
191 bfd_reloc_code_real_type code)
192 {
193 unsigned int i;
194
195 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
196 if (msp430_reloc_map[i].bfd_reloc_val == code)
197 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
198
199 return NULL;
200 }
201
202 /* Set the howto pointer for an MSP430 ELF reloc. */
203
204 static void
205 msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
206 arelent * cache_ptr,
207 Elf_Internal_Rela * dst)
208 {
209 unsigned int r_type;
210
211 r_type = ELF32_R_TYPE (dst->r_info);
212 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
213 cache_ptr->howto = &elf_msp430_howto_table[r_type];
214 }
215
216 static asection *
217 elf32_msp430_gc_mark_hook (asection * sec,
218 struct bfd_link_info * info ATTRIBUTE_UNUSED,
219 Elf_Internal_Rela * rel,
220 struct elf_link_hash_entry * h,
221 Elf_Internal_Sym * sym)
222 {
223 if (h != NULL)
224 {
225 switch (ELF32_R_TYPE (rel->r_info))
226 {
227 default:
228 switch (h->root.type)
229 {
230 case bfd_link_hash_defined:
231 case bfd_link_hash_defweak:
232 return h->root.u.def.section;
233
234 case bfd_link_hash_common:
235 return h->root.u.c.p->section;
236
237 default:
238 break;
239 }
240 }
241 }
242 else
243 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
244
245 return NULL;
246 }
247
248 static bfd_boolean
249 elf32_msp430_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
250 struct bfd_link_info * info ATTRIBUTE_UNUSED,
251 asection * sec ATTRIBUTE_UNUSED,
252 const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
253 {
254 /* We don't use got and plt entries for msp430. */
255 return TRUE;
256 }
257
258 /* Look through the relocs for a section during the first phase.
259 Since we don't do .gots or .plts, we just need to consider the
260 virtual table relocs for gc. */
261
262 static bfd_boolean
263 elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
264 asection * sec, const Elf_Internal_Rela * relocs)
265 {
266 Elf_Internal_Shdr *symtab_hdr;
267 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
268 const Elf_Internal_Rela *rel;
269 const Elf_Internal_Rela *rel_end;
270
271 if (info->relocatable)
272 return TRUE;
273
274 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
275 sym_hashes = elf_sym_hashes (abfd);
276 sym_hashes_end =
277 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
278 if (!elf_bad_symtab (abfd))
279 sym_hashes_end -= symtab_hdr->sh_info;
280
281 rel_end = relocs + sec->reloc_count;
282 for (rel = relocs; rel < rel_end; rel++)
283 {
284 struct elf_link_hash_entry *h;
285 unsigned long r_symndx;
286
287 r_symndx = ELF32_R_SYM (rel->r_info);
288 if (r_symndx < symtab_hdr->sh_info)
289 h = NULL;
290 else
291 {
292 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
293 while (h->root.type == bfd_link_hash_indirect
294 || h->root.type == bfd_link_hash_warning)
295 h = (struct elf_link_hash_entry *) h->root.u.i.link;
296 }
297 }
298
299 return TRUE;
300 }
301
302 /* Perform a single relocation. By default we use the standard BFD
303 routines, but a few relocs, we have to do them ourselves. */
304
305 static bfd_reloc_status_type
306 msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
307 asection * input_section, bfd_byte * contents,
308 Elf_Internal_Rela * rel, bfd_vma relocation)
309 {
310 bfd_reloc_status_type r = bfd_reloc_ok;
311 bfd_vma x;
312 bfd_signed_vma srel;
313
314 switch (howto->type)
315 {
316 case R_MSP430_10_PCREL:
317 contents += rel->r_offset;
318 srel = (bfd_signed_vma) relocation;
319 srel += rel->r_addend;
320 srel -= rel->r_offset;
321 srel -= 2; /* Branch instructions add 2 to the PC... */
322 srel -= (input_section->output_section->vma +
323 input_section->output_offset);
324
325 if (srel & 1)
326 return bfd_reloc_outofrange;
327
328 /* MSP430 addresses commands as words. */
329 srel >>= 1;
330
331 /* Check for an overflow. */
332 if (srel < -512 || srel > 511)
333 return bfd_reloc_overflow;
334
335 x = bfd_get_16 (input_bfd, contents);
336 x = (x & 0xfc00) | (srel & 0x3ff);
337 bfd_put_16 (input_bfd, x, contents);
338 break;
339
340 case R_MSP430_2X_PCREL:
341 contents += rel->r_offset;
342 srel = (bfd_signed_vma) relocation;
343 srel += rel->r_addend;
344 srel -= rel->r_offset;
345 srel -= 2; /* Branch instructions add 2 to the PC... */
346 srel -= (input_section->output_section->vma +
347 input_section->output_offset);
348
349 if (srel & 1)
350 return bfd_reloc_outofrange;
351
352 /* MSP430 addresses commands as words. */
353 srel >>= 1;
354
355 /* Check for an overflow. */
356 if (srel < -512 || srel > 511)
357 return bfd_reloc_overflow;
358
359 x = bfd_get_16 (input_bfd, contents);
360 x = (x & 0xfc00) | (srel & 0x3ff);
361 bfd_put_16 (input_bfd, x, contents);
362 /* Handle second jump instruction. */
363 x = bfd_get_16 (input_bfd, contents - 2);
364 srel += 1;
365 x = (x & 0xfc00) | (srel & 0x3ff);
366 bfd_put_16 (input_bfd, x, contents - 2);
367 break;
368
369 case R_MSP430_16_PCREL:
370 case R_MSP430_RL_PCREL:
371 contents += rel->r_offset;
372 srel = (bfd_signed_vma) relocation;
373 srel += rel->r_addend;
374 srel -= rel->r_offset;
375 /* Only branch instructions add 2 to the PC... */
376 srel -= (input_section->output_section->vma +
377 input_section->output_offset);
378
379 if (srel & 1)
380 return bfd_reloc_outofrange;
381
382 bfd_put_16 (input_bfd, srel & 0xffff, contents);
383 break;
384
385 case R_MSP430_16_PCREL_BYTE:
386 contents += rel->r_offset;
387 srel = (bfd_signed_vma) relocation;
388 srel += rel->r_addend;
389 srel -= rel->r_offset;
390 /* Only branch instructions add 2 to the PC... */
391 srel -= (input_section->output_section->vma +
392 input_section->output_offset);
393
394 bfd_put_16 (input_bfd, srel & 0xffff, contents);
395 break;
396
397 case R_MSP430_16_BYTE:
398 contents += rel->r_offset;
399 srel = (bfd_signed_vma) relocation;
400 srel += rel->r_addend;
401 bfd_put_16 (input_bfd, srel & 0xffff, contents);
402 break;
403
404 case R_MSP430_16:
405 contents += rel->r_offset;
406 srel = (bfd_signed_vma) relocation;
407 srel += rel->r_addend;
408
409 if (srel & 1)
410 return bfd_reloc_notsupported;
411
412 bfd_put_16 (input_bfd, srel & 0xffff, contents);
413 break;
414
415 default:
416 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
417 contents, rel->r_offset,
418 relocation, rel->r_addend);
419 }
420
421 return r;
422 }
423
424 /* Relocate an MSP430 ELF section. */
425
426 static bfd_boolean
427 elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
428 struct bfd_link_info * info,
429 bfd * input_bfd,
430 asection * input_section,
431 bfd_byte * contents,
432 Elf_Internal_Rela * relocs,
433 Elf_Internal_Sym * local_syms,
434 asection ** local_sections)
435 {
436 Elf_Internal_Shdr *symtab_hdr;
437 struct elf_link_hash_entry **sym_hashes;
438 Elf_Internal_Rela *rel;
439 Elf_Internal_Rela *relend;
440
441 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
442 sym_hashes = elf_sym_hashes (input_bfd);
443 relend = relocs + input_section->reloc_count;
444
445 for (rel = relocs; rel < relend; rel++)
446 {
447 reloc_howto_type *howto;
448 unsigned long r_symndx;
449 Elf_Internal_Sym *sym;
450 asection *sec;
451 struct elf_link_hash_entry *h;
452 bfd_vma relocation;
453 bfd_reloc_status_type r;
454 const char *name = NULL;
455 int r_type;
456
457 /* This is a final link. */
458
459 r_type = ELF32_R_TYPE (rel->r_info);
460 r_symndx = ELF32_R_SYM (rel->r_info);
461 howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
462 h = NULL;
463 sym = NULL;
464 sec = NULL;
465
466 if (r_symndx < symtab_hdr->sh_info)
467 {
468 sym = local_syms + r_symndx;
469 sec = local_sections[r_symndx];
470 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
471
472 name = bfd_elf_string_from_elf_section
473 (input_bfd, symtab_hdr->sh_link, sym->st_name);
474 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
475 }
476 else
477 {
478 bfd_boolean unresolved_reloc, warned;
479
480 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
481 r_symndx, symtab_hdr, sym_hashes,
482 h, sec, relocation,
483 unresolved_reloc, warned);
484 }
485
486 r = msp430_final_link_relocate (howto, input_bfd, input_section,
487 contents, rel, relocation);
488
489 if (r != bfd_reloc_ok)
490 {
491 const char *msg = (const char *) NULL;
492
493 switch (r)
494 {
495 case bfd_reloc_overflow:
496 r = info->callbacks->reloc_overflow
497 (info, (h ? &h->root : NULL), name, howto->name,
498 (bfd_vma) 0, input_bfd, input_section,
499 rel->r_offset);
500 break;
501
502 case bfd_reloc_undefined:
503 r = info->callbacks->undefined_symbol
504 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
505 break;
506
507 case bfd_reloc_outofrange:
508 msg = _("internal error: out of range error");
509 break;
510
511 case bfd_reloc_notsupported:
512 msg = _("internal error: unsupported relocation error");
513 break;
514
515 case bfd_reloc_dangerous:
516 msg = _("internal error: dangerous relocation");
517 break;
518
519 default:
520 msg = _("internal error: unknown error");
521 break;
522 }
523
524 if (msg)
525 r = info->callbacks->warning
526 (info, msg, name, input_bfd, input_section, rel->r_offset);
527
528 if (!r)
529 return FALSE;
530 }
531
532 }
533
534 return TRUE;
535 }
536
537 /* The final processing done just before writing out a MSP430 ELF object
538 file. This gets the MSP430 architecture right based on the machine
539 number. */
540
541 static void
542 bfd_elf_msp430_final_write_processing (bfd * abfd,
543 bfd_boolean linker ATTRIBUTE_UNUSED)
544 {
545 unsigned long val;
546
547 switch (bfd_get_mach (abfd))
548 {
549 default:
550 case bfd_mach_msp110:
551 val = E_MSP430_MACH_MSP430x11x1;
552 break;
553
554 case bfd_mach_msp11:
555 val = E_MSP430_MACH_MSP430x11;
556 break;
557
558 case bfd_mach_msp12:
559 val = E_MSP430_MACH_MSP430x12;
560 break;
561
562 case bfd_mach_msp13:
563 val = E_MSP430_MACH_MSP430x13;
564 break;
565
566 case bfd_mach_msp14:
567 val = E_MSP430_MACH_MSP430x14;
568 break;
569
570 case bfd_mach_msp15:
571 val = E_MSP430_MACH_MSP430x15;
572 break;
573
574 case bfd_mach_msp16:
575 val = E_MSP430_MACH_MSP430x16;
576 break;
577
578 case bfd_mach_msp31:
579 val = E_MSP430_MACH_MSP430x31;
580 break;
581
582 case bfd_mach_msp32:
583 val = E_MSP430_MACH_MSP430x32;
584 break;
585
586 case bfd_mach_msp33:
587 val = E_MSP430_MACH_MSP430x33;
588 break;
589
590 case bfd_mach_msp41:
591 val = E_MSP430_MACH_MSP430x41;
592 break;
593
594 case bfd_mach_msp42:
595 val = E_MSP430_MACH_MSP430x42;
596 break;
597
598 case bfd_mach_msp43:
599 val = E_MSP430_MACH_MSP430x43;
600 break;
601
602 case bfd_mach_msp44:
603 val = E_MSP430_MACH_MSP430x44;
604 break;
605 }
606
607 elf_elfheader (abfd)->e_machine = EM_MSP430;
608 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
609 elf_elfheader (abfd)->e_flags |= val;
610 }
611
612 /* Set the right machine number. */
613
614 static bfd_boolean
615 elf32_msp430_object_p (bfd * abfd)
616 {
617 int e_set = bfd_mach_msp14;
618
619 if (elf_elfheader (abfd)->e_machine == EM_MSP430
620 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
621 {
622 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
623
624 switch (e_mach)
625 {
626 default:
627 case E_MSP430_MACH_MSP430x11:
628 e_set = bfd_mach_msp11;
629 break;
630
631 case E_MSP430_MACH_MSP430x11x1:
632 e_set = bfd_mach_msp110;
633 break;
634
635 case E_MSP430_MACH_MSP430x12:
636 e_set = bfd_mach_msp12;
637 break;
638
639 case E_MSP430_MACH_MSP430x13:
640 e_set = bfd_mach_msp13;
641 break;
642
643 case E_MSP430_MACH_MSP430x14:
644 e_set = bfd_mach_msp14;
645 break;
646
647 case E_MSP430_MACH_MSP430x15:
648 e_set = bfd_mach_msp15;
649 break;
650
651 case E_MSP430_MACH_MSP430x16:
652 e_set = bfd_mach_msp16;
653 break;
654
655 case E_MSP430_MACH_MSP430x31:
656 e_set = bfd_mach_msp31;
657 break;
658
659 case E_MSP430_MACH_MSP430x32:
660 e_set = bfd_mach_msp32;
661 break;
662
663 case E_MSP430_MACH_MSP430x33:
664 e_set = bfd_mach_msp33;
665 break;
666
667 case E_MSP430_MACH_MSP430x41:
668 e_set = bfd_mach_msp41;
669 break;
670
671 case E_MSP430_MACH_MSP430x42:
672 e_set = bfd_mach_msp42;
673 break;
674
675 case E_MSP430_MACH_MSP430x43:
676 e_set = bfd_mach_msp43;
677 break;
678
679 case E_MSP430_MACH_MSP430x44:
680 e_set = bfd_mach_msp44;
681 break;
682 }
683 }
684
685 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
686 }
687
688 static void
689 elf32_msp430_post_process_headers (bfd * abfd,
690 struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
691 {
692 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
693
694 i_ehdrp = elf_elfheader (abfd);
695
696 #ifndef ELFOSABI_STANDALONE
697 #define ELFOSABI_STANDALONE 255
698 #endif
699
700 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE;
701 }
702
703 /* These functions handle relaxing for the msp430.
704 Relaxation required only in two cases:
705 - Bad hand coding like jumps from one section to another or
706 from file to file.
707 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
708 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
709 do not work in gcc's port by the reason I do not know.
710 Anyway, if a relaxation required, user should pass -relax option to the
711 linker.
712
713 There are quite a few relaxing opportunities available on the msp430:
714
715 ================================================================
716
717 1. 3 words -> 1 word
718
719 eq == jeq label jne +4; br lab
720 ne != jne label jeq +4; br lab
721 lt < jl label jge +4; br lab
722 ltu < jlo label lhs +4; br lab
723 ge >= jge label jl +4; br lab
724 geu >= jhs label jlo +4; br lab
725
726 2. 4 words -> 1 word
727
728 ltn < jn jn +2; jmp +4; br lab
729
730 3. 4 words -> 2 words
731
732 gt > jeq +2; jge label jeq +6; jl +4; br label
733 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
734
735 4. 4 words -> 2 words and 2 labels
736
737 leu <= jeq label; jlo label jeq +2; jhs +4; br label
738 le <= jeq label; jl label jeq +2; jge +4; br label
739 =================================================================
740
741 codemap for first cases is (labels masked ):
742 eq: 0x2002,0x4010,0x0000 -> 0x2400
743 ne: 0x2402,0x4010,0x0000 -> 0x2000
744 lt: 0x3402,0x4010,0x0000 -> 0x3800
745 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
746 ge: 0x3802,0x4010,0x0000 -> 0x3400
747 geu: 0x2802,0x4010,0x0000 -> 0x2c00
748
749 second case:
750 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
751
752 third case:
753 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
754 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
755
756 fourth case:
757 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
758 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
759
760 Unspecified case :)
761 jump: 0x4010,0x0000 -> 0x3c00. */
762
763 #define NUMB_RELAX_CODES 12
764 static struct rcodes_s
765 {
766 int f0, f1; /* From code. */
767 int t0, t1; /* To code. */
768 int labels; /* Position of labels: 1 - one label at first
769 word, 2 - one at second word, 3 - two
770 labels at both. */
771 int cdx; /* Words to match. */
772 int bs; /* Shrink bytes. */
773 int off; /* Offset from old label for new code. */
774 int ncl; /* New code length. */
775 } rcode[] =
776 {/* lab,cdx,bs,off,ncl */
777 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
778 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
779 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
780 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
781 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
782 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
783 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
784 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
785 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
786 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
787 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
788 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
789 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
790 };
791
792 /* Return TRUE if a symbol exists at the given address. */
793
794 static bfd_boolean
795 msp430_elf_symbol_address_p (bfd * abfd,
796 asection * sec,
797 Elf_Internal_Sym * isym,
798 bfd_vma addr)
799 {
800 Elf_Internal_Shdr *symtab_hdr;
801 unsigned int sec_shndx;
802 Elf_Internal_Sym *isymend;
803 struct elf_link_hash_entry **sym_hashes;
804 struct elf_link_hash_entry **end_hashes;
805 unsigned int symcount;
806
807 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
808
809 /* Examine all the local symbols. */
810 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
811 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
812 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
813 return TRUE;
814
815 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
816 - symtab_hdr->sh_info);
817 sym_hashes = elf_sym_hashes (abfd);
818 end_hashes = sym_hashes + symcount;
819 for (; sym_hashes < end_hashes; sym_hashes++)
820 {
821 struct elf_link_hash_entry *sym_hash = *sym_hashes;
822
823 if ((sym_hash->root.type == bfd_link_hash_defined
824 || sym_hash->root.type == bfd_link_hash_defweak)
825 && sym_hash->root.u.def.section == sec
826 && sym_hash->root.u.def.value == addr)
827 return TRUE;
828 }
829
830 return FALSE;
831 }
832
833 /* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx)
834 referenced from current and other sections */
835 static bfd_boolean
836 msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr,
837 int count, unsigned int sec_shndx, bfd_vma toaddr)
838 {
839 Elf_Internal_Shdr *symtab_hdr;
840 Elf_Internal_Rela *irel;
841 Elf_Internal_Rela *irelend;
842 Elf_Internal_Sym *isym;
843
844 irel = elf_section_data (sec)->relocs;
845 irelend = irel + sec->reloc_count;
846 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
847 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
848
849 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
850 {
851 int sidx = ELF32_R_SYM(irel->r_info);
852 Elf_Internal_Sym *lsym = isym + sidx;
853
854 /* Adjust symbols referenced by .sec+0xXX */
855 if (irel->r_addend > addr && irel->r_addend < toaddr
856 && lsym->st_shndx == sec_shndx)
857 irel->r_addend -= count;
858 }
859
860 return TRUE;
861 }
862
863 /* Delete some bytes from a section while relaxing. */
864
865 static bfd_boolean
866 msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
867 int count)
868 {
869 Elf_Internal_Shdr *symtab_hdr;
870 unsigned int sec_shndx;
871 bfd_byte *contents;
872 Elf_Internal_Rela *irel;
873 Elf_Internal_Rela *irelend;
874 Elf_Internal_Rela *irelalign;
875 bfd_vma toaddr;
876 Elf_Internal_Sym *isym;
877 Elf_Internal_Sym *isymend;
878 struct elf_link_hash_entry **sym_hashes;
879 struct elf_link_hash_entry **end_hashes;
880 unsigned int symcount;
881 asection *p;
882
883 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
884
885 contents = elf_section_data (sec)->this_hdr.contents;
886
887 /* The deletion must stop at the next ALIGN reloc for an aligment
888 power larger than the number of bytes we are deleting. */
889
890 irelalign = NULL;
891 toaddr = sec->size;
892
893 irel = elf_section_data (sec)->relocs;
894 irelend = irel + sec->reloc_count;
895
896 /* Actually delete the bytes. */
897 memmove (contents + addr, contents + addr + count,
898 (size_t) (toaddr - addr - count));
899 sec->size -= count;
900
901 /* Adjust all the relocs. */
902 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
903 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
904 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
905 {
906 /* Get the new reloc address. */
907 if ((irel->r_offset > addr && irel->r_offset < toaddr))
908 irel->r_offset -= count;
909 }
910
911 for (p = abfd->sections; p != NULL; p = p->next)
912 msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr);
913
914 /* Adjust the local symbols defined in this section. */
915 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
916 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
917 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
918 if (isym->st_shndx == sec_shndx
919 && isym->st_value > addr && isym->st_value < toaddr)
920 isym->st_value -= count;
921
922 /* Now adjust the global symbols defined in this section. */
923 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
924 - symtab_hdr->sh_info);
925 sym_hashes = elf_sym_hashes (abfd);
926 end_hashes = sym_hashes + symcount;
927 for (; sym_hashes < end_hashes; sym_hashes++)
928 {
929 struct elf_link_hash_entry *sym_hash = *sym_hashes;
930
931 if ((sym_hash->root.type == bfd_link_hash_defined
932 || sym_hash->root.type == bfd_link_hash_defweak)
933 && sym_hash->root.u.def.section == sec
934 && sym_hash->root.u.def.value > addr
935 && sym_hash->root.u.def.value < toaddr)
936 sym_hash->root.u.def.value -= count;
937 }
938
939 return TRUE;
940 }
941
942
943 static bfd_boolean
944 msp430_elf_relax_section (bfd * abfd, asection * sec,
945 struct bfd_link_info * link_info,
946 bfd_boolean * again)
947 {
948 Elf_Internal_Shdr * symtab_hdr;
949 Elf_Internal_Rela * internal_relocs;
950 Elf_Internal_Rela * irel;
951 Elf_Internal_Rela * irelend;
952 bfd_byte * contents = NULL;
953 Elf_Internal_Sym * isymbuf = NULL;
954
955 /* Assume nothing changes. */
956 *again = FALSE;
957
958 /* We don't have to do anything for a relocatable link, if
959 this section does not have relocs, or if this is not a
960 code section. */
961 if (link_info->relocatable
962 || (sec->flags & SEC_RELOC) == 0
963 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
964 return TRUE;
965
966 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
967
968 /* Get a copy of the native relocations. */
969 internal_relocs =
970 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
971 if (internal_relocs == NULL)
972 goto error_return;
973
974 /* Walk through them looking for relaxing opportunities. */
975 irelend = internal_relocs + sec->reloc_count;
976 for (irel = internal_relocs; irel < irelend; irel++)
977 {
978 bfd_vma symval;
979
980 /* If this isn't something that can be relaxed, then ignore
981 this reloc. */
982 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
983 continue;
984
985 /* Get the section contents if we haven't done so already. */
986 if (contents == NULL)
987 {
988 /* Get cached copy if it exists. */
989 if (elf_section_data (sec)->this_hdr.contents != NULL)
990 contents = elf_section_data (sec)->this_hdr.contents;
991 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
992 goto error_return;
993 }
994
995 /* Read this BFD's local symbols if we haven't done so already. */
996 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
997 {
998 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
999 if (isymbuf == NULL)
1000 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1001 symtab_hdr->sh_info, 0,
1002 NULL, NULL, NULL);
1003 if (isymbuf == NULL)
1004 goto error_return;
1005 }
1006
1007 /* Get the value of the symbol referred to by the reloc. */
1008 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1009 {
1010 /* A local symbol. */
1011 Elf_Internal_Sym *isym;
1012 asection *sym_sec;
1013
1014 isym = isymbuf + ELF32_R_SYM (irel->r_info);
1015 if (isym->st_shndx == SHN_UNDEF)
1016 sym_sec = bfd_und_section_ptr;
1017 else if (isym->st_shndx == SHN_ABS)
1018 sym_sec = bfd_abs_section_ptr;
1019 else if (isym->st_shndx == SHN_COMMON)
1020 sym_sec = bfd_com_section_ptr;
1021 else
1022 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1023 symval = (isym->st_value
1024 + sym_sec->output_section->vma + sym_sec->output_offset);
1025 }
1026 else
1027 {
1028 unsigned long indx;
1029 struct elf_link_hash_entry *h;
1030
1031 /* An external symbol. */
1032 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1033 h = elf_sym_hashes (abfd)[indx];
1034 BFD_ASSERT (h != NULL);
1035
1036 if (h->root.type != bfd_link_hash_defined
1037 && h->root.type != bfd_link_hash_defweak)
1038 /* This appears to be a reference to an undefined
1039 symbol. Just ignore it--it will be caught by the
1040 regular reloc processing. */
1041 continue;
1042
1043 symval = (h->root.u.def.value
1044 + h->root.u.def.section->output_section->vma
1045 + h->root.u.def.section->output_offset);
1046 }
1047
1048 /* For simplicity of coding, we are going to modify the section
1049 contents, the section relocs, and the BFD symbol table. We
1050 must tell the rest of the code not to free up this
1051 information. It would be possible to instead create a table
1052 of changes which have to be made, as is done in coff-mips.c;
1053 that would be more work, but would require less memory when
1054 the linker is run. */
1055
1056 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1057 branch. */
1058 /* Paranoia? paranoia... */
1059 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1060 {
1061 bfd_vma value = symval;
1062
1063 /* Deal with pc-relative gunk. */
1064 value -= (sec->output_section->vma + sec->output_offset);
1065 value -= irel->r_offset;
1066 value += irel->r_addend;
1067
1068 /* See if the value will fit in 10 bits, note the high value is
1069 1016 as the target will be two bytes closer if we are
1070 able to relax. */
1071 if ((long) value < 1016 && (long) value > -1016)
1072 {
1073 int code0 = 0, code1 = 0, code2 = 0;
1074 int i;
1075 struct rcodes_s *rx;
1076
1077 /* Get the opcode. */
1078 if (irel->r_offset >= 6)
1079 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1080
1081 if (irel->r_offset >= 4)
1082 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1083
1084 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1085
1086 if (code2 != 0x4010)
1087 continue;
1088
1089 /* Check r4 and r3. */
1090 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1091 {
1092 rx = &rcode[i];
1093 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1094 break;
1095 else if (rx->cdx == 1 && rx->f1 == code1)
1096 break;
1097 else if (rx->cdx == 0) /* This is an unconditional jump. */
1098 break;
1099 }
1100
1101 /* Check labels:
1102 .Label0: ; we do not care about this label
1103 jeq +6
1104 .Label1: ; make sure there is no label here
1105 jl +4
1106 .Label2: ; make sure there is no label here
1107 br .Label_dst
1108
1109 So, if there is .Label1 or .Label2 we cannot relax this code.
1110 This actually should not happen, cause for relaxable
1111 instructions we use RL_PCREL reloc instead of 16_PCREL.
1112 Will change this in the future. */
1113
1114 if (rx->cdx > 0
1115 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1116 irel->r_offset - 2))
1117 continue;
1118 if (rx->cdx > 1
1119 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1120 irel->r_offset - 4))
1121 continue;
1122
1123 /* Note that we've changed the relocs, section contents, etc. */
1124 elf_section_data (sec)->relocs = internal_relocs;
1125 elf_section_data (sec)->this_hdr.contents = contents;
1126 symtab_hdr->contents = (unsigned char *) isymbuf;
1127
1128 /* Fix the relocation's type. */
1129 if (rx->labels == 3) /* Handle special cases. */
1130 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1131 R_MSP430_2X_PCREL);
1132 else
1133 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1134 R_MSP430_10_PCREL);
1135
1136 /* Fix the opcode right way. */
1137 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1138 if (rx->t1)
1139 bfd_put_16 (abfd, rx->t1,
1140 contents + irel->r_offset - rx->off + 2);
1141
1142 /* Delete bytes. */
1143 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1144 irel->r_offset - rx->off +
1145 rx->ncl, rx->bs))
1146 goto error_return;
1147
1148 /* Handle unconditional jumps. */
1149 if (rx->cdx == 0)
1150 irel->r_offset -= 2;
1151
1152 /* That will change things, so, we should relax again.
1153 Note that this is not required, and it may be slow. */
1154 *again = TRUE;
1155 }
1156 }
1157 }
1158
1159 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1160 {
1161 if (!link_info->keep_memory)
1162 free (isymbuf);
1163 else
1164 {
1165 /* Cache the symbols for elf_link_input_bfd. */
1166 symtab_hdr->contents = (unsigned char *) isymbuf;
1167 }
1168 }
1169
1170 if (contents != NULL
1171 && elf_section_data (sec)->this_hdr.contents != contents)
1172 {
1173 if (!link_info->keep_memory)
1174 free (contents);
1175 else
1176 {
1177 /* Cache the section contents for elf_link_input_bfd. */
1178 elf_section_data (sec)->this_hdr.contents = contents;
1179 }
1180 }
1181
1182 if (internal_relocs != NULL
1183 && elf_section_data (sec)->relocs != internal_relocs)
1184 free (internal_relocs);
1185
1186 return TRUE;
1187
1188 error_return:
1189 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1190 free (isymbuf);
1191 if (contents != NULL
1192 && elf_section_data (sec)->this_hdr.contents != contents)
1193 free (contents);
1194 if (internal_relocs != NULL
1195 && elf_section_data (sec)->relocs != internal_relocs)
1196 free (internal_relocs);
1197
1198 return FALSE;
1199 }
1200
1201
1202 #define ELF_ARCH bfd_arch_msp430
1203 #define ELF_MACHINE_CODE EM_MSP430
1204 #define ELF_MACHINE_ALT1 EM_MSP430_OLD
1205 #define ELF_MAXPAGESIZE 1
1206
1207 #define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1208 #define TARGET_LITTLE_NAME "elf32-msp430"
1209
1210 #define elf_info_to_howto msp430_info_to_howto_rela
1211 #define elf_info_to_howto_rel NULL
1212 #define elf_backend_relocate_section elf32_msp430_relocate_section
1213 #define elf_backend_gc_mark_hook elf32_msp430_gc_mark_hook
1214 #define elf_backend_gc_sweep_hook elf32_msp430_gc_sweep_hook
1215 #define elf_backend_check_relocs elf32_msp430_check_relocs
1216 #define elf_backend_can_gc_sections 1
1217 #define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1218 #define elf_backend_object_p elf32_msp430_object_p
1219 #define elf_backend_post_process_headers elf32_msp430_post_process_headers
1220 #define bfd_elf32_bfd_relax_section msp430_elf_relax_section
1221
1222 #include "elf32-target.h"
GDB Binutils - Deliverables
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