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[AArch64][4/6] LD support TLSLD move/add relocation types
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2015 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36
37 /* Relocation HOWTO functions. */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55 /* Helper functions for HOWTO. */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59 static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66 /* Target hooks. */
67 static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69 static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71 static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74 static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77 static bfd_boolean nds32_elf_object_p (bfd *);
78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80 static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82 static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84 static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86 static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89 static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91 static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93 static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95 static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97 static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
100 static bfd_boolean nds32_elf_mkobject (bfd *);
101
102 /* Nds32 helper functions. */
103 static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107 static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110 static bfd_vma calculate_memory_address
111 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112 static int nds32_get_section_contents (bfd *, asection *,
113 bfd_byte **, bfd_boolean);
114 static bfd_boolean nds32_elf_ex9_build_hash_table
115 (bfd *, asection *, struct bfd_link_info *);
116 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
117 static void nds32_elf_ex9_import_table (struct bfd_link_info *);
118 static void nds32_elf_ex9_finish (struct bfd_link_info *);
119 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
120 static void nds32_elf_get_insn_with_reg
121 (Elf_Internal_Rela *, uint32_t, uint32_t *);
122 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
123 Elf_Internal_Sym **);
124 static bfd_boolean nds32_elf_ex9_replace_instruction
125 (struct bfd_link_info *, bfd *, asection *);
126 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
127 asection *);
128 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
129 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
130 static bfd_boolean nds32_elf_ifc_reloc (void);
131 static bfd_boolean nds32_relax_fp_as_gp
132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
134 Elf_Internal_Sym *isymbuf);
135 static bfd_boolean nds32_fag_remove_unused_fpbase
136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
137 Elf_Internal_Rela *irelend);
138 static bfd_byte *
139 nds32_elf_get_relocated_section_contents (bfd *abfd,
140 struct bfd_link_info *link_info,
141 struct bfd_link_order *link_order,
142 bfd_byte *data,
143 bfd_boolean relocatable,
144 asymbol **symbols);
145
146 enum
147 {
148 MACH_V1 = bfd_mach_n1h,
149 MACH_V2 = bfd_mach_n1h_v2,
150 MACH_V3 = bfd_mach_n1h_v3,
151 MACH_V3M = bfd_mach_n1h_v3m
152 };
153
154 #define MIN(a, b) ((a) > (b) ? (b) : (a))
155 #define MAX(a, b) ((a) > (b) ? (a) : (b))
156
157 /* The name of the dynamic interpreter. This is put in the .interp
158 section. */
159 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
160
161 /* The nop opcode we use. */
162 #define NDS32_NOP32 0x40000009
163 #define NDS32_NOP16 0x9200
164
165 /* The size in bytes of an entry in the procedure linkage table. */
166 #define PLT_ENTRY_SIZE 24
167 #define PLT_HEADER_SIZE 24
168
169 /* The first entry in a procedure linkage table are reserved,
170 and the initial contents are unimportant (we zero them out).
171 Subsequent entries look like this. */
172 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
173 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
174 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
175 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
176 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
177
178 /* $ta is change to $r15 (from $r25). */
179 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
180 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
181 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
182 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
183 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
184 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
185
186 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
187 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
188 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
189 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
190 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
191
192 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
193 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
194 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
195 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
196 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
197 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
198
199 /* These are macros used to get the relocation accurate value. */
200 #define ACCURATE_8BIT_S1 (0x100)
201 #define ACCURATE_U9BIT_S1 (0x400)
202 #define ACCURATE_12BIT_S1 (0x2000)
203 #define ACCURATE_14BIT_S1 (0x4000)
204 #define ACCURATE_19BIT (0x40000)
205
206 /* These are macros used to get the relocation conservative value. */
207 #define CONSERVATIVE_8BIT_S1 (0x100 - 4)
208 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
209 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
210 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
211 /* These must be more conservative because the address may be in
212 different segment. */
213 #define CONSERVATIVE_15BIT (0x4000 - 0x1000)
214 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
215 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
216 #define CONSERVATIVE_19BIT (0x40000 - 0x1000)
217 #define CONSERVATIVE_20BIT (0x80000 - 0x1000)
218
219 /* Size of small data/bss sections, used to calculate SDA_BASE. */
220 static long got_size = 0;
221 static int is_SDA_BASE_set = 0;
222 static int is_ITB_BASE_set = 0;
223
224 /* Convert ELF-VER in eflags to string for debugging purpose. */
225 static const char *const nds32_elfver_strtab[] =
226 {
227 "ELF-1.2",
228 "ELF-1.3",
229 "ELF-1.4",
230 };
231
232 /* The nds32 linker needs to keep track of the number of relocs that it
233 decides to copy in check_relocs for each symbol. This is so that
234 it can discard PC relative relocs if it doesn't need them when
235 linking with -Bsymbolic. We store the information in a field
236 extending the regular ELF linker hash table. */
237
238 /* This structure keeps track of the number of PC relative relocs we
239 have copied for a given symbol. */
240
241 struct elf_nds32_pcrel_relocs_copied
242 {
243 /* Next section. */
244 struct elf_nds32_pcrel_relocs_copied *next;
245 /* A section in dynobj. */
246 asection *section;
247 /* Number of relocs copied in this section. */
248 bfd_size_type count;
249 };
250
251 /* The sh linker needs to keep track of the number of relocs that it
252 decides to copy as dynamic relocs in check_relocs for each symbol.
253 This is so that it can later discard them if they are found to be
254 unnecessary. We store the information in a field extending the
255 regular ELF linker hash table. */
256
257 struct elf_nds32_dyn_relocs
258 {
259 struct elf_nds32_dyn_relocs *next;
260
261 /* The input section of the reloc. */
262 asection *sec;
263
264 /* Total number of relocs copied for the input section. */
265 bfd_size_type count;
266
267 /* Number of pc-relative relocs copied for the input section. */
268 bfd_size_type pc_count;
269 };
270
271 /* Nds32 ELF linker hash entry. */
272
273 struct elf_nds32_link_hash_entry
274 {
275 struct elf_link_hash_entry root;
276
277 /* Track dynamic relocs copied for this symbol. */
278 struct elf_nds32_dyn_relocs *dyn_relocs;
279
280 /* For checking relocation type. */
281 #define GOT_UNKNOWN 0
282 #define GOT_NORMAL 1
283 #define GOT_TLS_IE 2
284 unsigned int tls_type;
285 };
286
287 /* Get the nds32 ELF linker hash table from a link_info structure. */
288
289 #define FP_BASE_NAME "_FP_BASE_"
290 static int check_start_export_sym = 0;
291 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
292
293 /* The offset for executable tls relaxation. */
294 #define TP_OFFSET 0x0
295
296 struct elf_nds32_obj_tdata
297 {
298 struct elf_obj_tdata root;
299
300 /* tls_type for each local got entry. */
301 char *local_got_tls_type;
302 };
303
304 #define elf_nds32_tdata(bfd) \
305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
306
307 #define elf32_nds32_local_got_tls_type(bfd) \
308 (elf_nds32_tdata (bfd)->local_got_tls_type)
309
310 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
311
312 static bfd_boolean
313 nds32_elf_mkobject (bfd *abfd)
314 {
315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
316 NDS32_ELF_DATA);
317 }
318
319 /* Relocations used for relocation. */
320 static reloc_howto_type nds32_elf_howto_table[] =
321 {
322 /* This reloc does nothing. */
323 HOWTO (R_NDS32_NONE, /* type */
324 0, /* rightshift */
325 3, /* size (0 = byte, 1 = short, 2 = long) */
326 0, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_dont, /* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_NDS32_NONE", /* name */
332 FALSE, /* partial_inplace */
333 0, /* src_mask */
334 0, /* dst_mask */
335 FALSE), /* pcrel_offset */
336
337 /* A 16 bit absolute relocation. */
338 HOWTO (R_NDS32_16, /* type */
339 0, /* rightshift */
340 1, /* size (0 = byte, 1 = short, 2 = long) */
341 16, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield, /* complain_on_overflow */
345 nds32_elf_generic_reloc, /* special_function */
346 "R_NDS32_16", /* name */
347 FALSE, /* partial_inplace */
348 0xffff, /* src_mask */
349 0xffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 /* A 32 bit absolute relocation. */
353 HOWTO (R_NDS32_32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield, /* complain_on_overflow */
360 nds32_elf_generic_reloc, /* special_function */
361 "R_NDS32_32", /* name */
362 FALSE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* A 20 bit address. */
368 HOWTO (R_NDS32_20, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 20, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_unsigned, /* complain_on_overflow */
375 nds32_elf_generic_reloc, /* special_function */
376 "R_NDS32_20", /* name */
377 FALSE, /* partial_inplace */
378 0xfffff, /* src_mask */
379 0xfffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 /* An PC Relative 9-bit relocation, shifted by 2.
383 This reloc is complicated because relocations are relative to pc & -4.
384 i.e. branches in the right insn slot use the address of the left insn
385 slot for pc. */
386 /* ??? It's not clear whether this should have partial_inplace set or not.
387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
390 HOWTO (R_NDS32_9_PCREL, /* type */
391 1, /* rightshift */
392 1, /* size (0 = byte, 1 = short, 2 = long) */
393 8, /* bitsize */
394 TRUE, /* pc_relative */
395 0, /* bitpos */
396 complain_overflow_signed, /* complain_on_overflow */
397 nds32_elf_9_pcrel_reloc, /* special_function */
398 "R_NDS32_9_PCREL", /* name */
399 FALSE, /* partial_inplace */
400 0xff, /* src_mask */
401 0xff, /* dst_mask */
402 TRUE), /* pcrel_offset */
403
404 /* A relative 15 bit relocation, right shifted by 1. */
405 HOWTO (R_NDS32_15_PCREL, /* type */
406 1, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 14, /* bitsize */
409 TRUE, /* pc_relative */
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 bfd_elf_generic_reloc, /* special_function */
413 "R_NDS32_15_PCREL", /* name */
414 FALSE, /* partial_inplace */
415 0x3fff, /* src_mask */
416 0x3fff, /* dst_mask */
417 TRUE), /* pcrel_offset */
418
419 /* A relative 17 bit relocation, right shifted by 1. */
420 HOWTO (R_NDS32_17_PCREL, /* type */
421 1, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 16, /* bitsize */
424 TRUE, /* pc_relative */
425 0, /* bitpos */
426 complain_overflow_signed, /* complain_on_overflow */
427 bfd_elf_generic_reloc, /* special_function */
428 "R_NDS32_17_PCREL", /* name */
429 FALSE, /* partial_inplace */
430 0xffff, /* src_mask */
431 0xffff, /* dst_mask */
432 TRUE), /* pcrel_offset */
433
434 /* A relative 25 bit relocation, right shifted by 1. */
435 /* ??? It's not clear whether this should have partial_inplace set or not.
436 Branch relaxing in the assembler can store the addend in the insn,
437 and if bfd_install_relocation gets called the addend may get added
438 again. */
439 HOWTO (R_NDS32_25_PCREL, /* type */
440 1, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 24, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_signed, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_NDS32_25_PCREL", /* name */
448 FALSE, /* partial_inplace */
449 0xffffff, /* src_mask */
450 0xffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 /* High 20 bits of address when lower 12 is or'd in. */
454 HOWTO (R_NDS32_HI20, /* type */
455 12, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 20, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_dont,/* complain_on_overflow */
461 nds32_elf_hi20_reloc, /* special_function */
462 "R_NDS32_HI20", /* name */
463 FALSE, /* partial_inplace */
464 0x000fffff, /* src_mask */
465 0x000fffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 /* Lower 12 bits of address. */
469 HOWTO (R_NDS32_LO12S3, /* type */
470 3, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 9, /* bitsize */
473 FALSE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_dont,/* complain_on_overflow */
476 nds32_elf_lo12_reloc, /* special_function */
477 "R_NDS32_LO12S3", /* name */
478 FALSE, /* partial_inplace */
479 0x000001ff, /* src_mask */
480 0x000001ff, /* dst_mask */
481 FALSE), /* pcrel_offset */
482
483 /* Lower 12 bits of address. */
484 HOWTO (R_NDS32_LO12S2, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 10, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_dont,/* complain_on_overflow */
491 nds32_elf_lo12_reloc, /* special_function */
492 "R_NDS32_LO12S2", /* name */
493 FALSE, /* partial_inplace */
494 0x000003ff, /* src_mask */
495 0x000003ff, /* dst_mask */
496 FALSE), /* pcrel_offset */
497
498 /* Lower 12 bits of address. */
499 HOWTO (R_NDS32_LO12S1, /* type */
500 1, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 11, /* bitsize */
503 FALSE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_dont,/* complain_on_overflow */
506 nds32_elf_lo12_reloc, /* special_function */
507 "R_NDS32_LO12S1", /* name */
508 FALSE, /* partial_inplace */
509 0x000007ff, /* src_mask */
510 0x000007ff, /* dst_mask */
511 FALSE), /* pcrel_offset */
512
513 /* Lower 12 bits of address. */
514 HOWTO (R_NDS32_LO12S0, /* type */
515 0, /* rightshift */
516 2, /* size (0 = byte, 1 = short, 2 = long) */
517 12, /* bitsize */
518 FALSE, /* pc_relative */
519 0, /* bitpos */
520 complain_overflow_dont,/* complain_on_overflow */
521 nds32_elf_lo12_reloc, /* special_function */
522 "R_NDS32_LO12S0", /* name */
523 FALSE, /* partial_inplace */
524 0x00000fff, /* src_mask */
525 0x00000fff, /* dst_mask */
526 FALSE), /* pcrel_offset */
527
528 /* Small data area 15 bits offset. */
529 HOWTO (R_NDS32_SDA15S3, /* type */
530 3, /* rightshift */
531 2, /* size (0 = byte, 1 = short, 2 = long) */
532 15, /* bitsize */
533 FALSE, /* pc_relative */
534 0, /* bitpos */
535 complain_overflow_signed, /* complain_on_overflow */
536 nds32_elf_sda15_reloc, /* special_function */
537 "R_NDS32_SDA15S3", /* name */
538 FALSE, /* partial_inplace */
539 0x00007fff, /* src_mask */
540 0x00007fff, /* dst_mask */
541 FALSE), /* pcrel_offset */
542
543 /* Small data area 15 bits offset. */
544 HOWTO (R_NDS32_SDA15S2, /* type */
545 2, /* rightshift */
546 2, /* size (0 = byte, 1 = short, 2 = long) */
547 15, /* bitsize */
548 FALSE, /* pc_relative */
549 0, /* bitpos */
550 complain_overflow_signed, /* complain_on_overflow */
551 nds32_elf_sda15_reloc, /* special_function */
552 "R_NDS32_SDA15S2", /* name */
553 FALSE, /* partial_inplace */
554 0x00007fff, /* src_mask */
555 0x00007fff, /* dst_mask */
556 FALSE), /* pcrel_offset */
557
558 /* Small data area 15 bits offset. */
559 HOWTO (R_NDS32_SDA15S1, /* type */
560 1, /* rightshift */
561 2, /* size (0 = byte, 1 = short, 2 = long) */
562 15, /* bitsize */
563 FALSE, /* pc_relative */
564 0, /* bitpos */
565 complain_overflow_signed, /* complain_on_overflow */
566 nds32_elf_sda15_reloc, /* special_function */
567 "R_NDS32_SDA15S1", /* name */
568 FALSE, /* partial_inplace */
569 0x00007fff, /* src_mask */
570 0x00007fff, /* dst_mask */
571 FALSE), /* pcrel_offset */
572
573 /* Small data area 15 bits offset. */
574 HOWTO (R_NDS32_SDA15S0, /* type */
575 0, /* rightshift */
576 2, /* size (0 = byte, 1 = short, 2 = long) */
577 15, /* bitsize */
578 FALSE, /* pc_relative */
579 0, /* bitpos */
580 complain_overflow_signed, /* complain_on_overflow */
581 nds32_elf_sda15_reloc, /* special_function */
582 "R_NDS32_SDA15S0", /* name */
583 FALSE, /* partial_inplace */
584 0x00007fff, /* src_mask */
585 0x00007fff, /* dst_mask */
586 FALSE), /* pcrel_offset */
587
588 /* GNU extension to record C++ vtable hierarchy */
589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
590 0, /* rightshift */
591 2, /* size (0 = byte, 1 = short, 2 = long) */
592 0, /* bitsize */
593 FALSE, /* pc_relative */
594 0, /* bitpos */
595 complain_overflow_dont,/* complain_on_overflow */
596 NULL, /* special_function */
597 "R_NDS32_GNU_VTINHERIT", /* name */
598 FALSE, /* partial_inplace */
599 0, /* src_mask */
600 0, /* dst_mask */
601 FALSE), /* pcrel_offset */
602
603 /* GNU extension to record C++ vtable member usage */
604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 0, /* bitsize */
608 FALSE, /* pc_relative */
609 0, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
612 "R_NDS32_GNU_VTENTRY", /* name */
613 FALSE, /* partial_inplace */
614 0, /* src_mask */
615 0, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 /* A 16 bit absolute relocation. */
619 HOWTO (R_NDS32_16_RELA, /* type */
620 0, /* rightshift */
621 1, /* size (0 = byte, 1 = short, 2 = long) */
622 16, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_bitfield, /* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_NDS32_16_RELA", /* name */
628 FALSE, /* partial_inplace */
629 0xffff, /* src_mask */
630 0xffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 /* A 32 bit absolute relocation. */
634 HOWTO (R_NDS32_32_RELA, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_bitfield, /* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_NDS32_32_RELA", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 /* A 20 bit address. */
649 HOWTO (R_NDS32_20_RELA, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 20, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_signed, /* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_NDS32_20_RELA", /* name */
658 FALSE, /* partial_inplace */
659 0xfffff, /* src_mask */
660 0xfffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
664 1, /* rightshift */
665 1, /* size (0 = byte, 1 = short, 2 = long) */
666 8, /* bitsize */
667 TRUE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed, /* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_NDS32_9_PCREL_RELA",/* name */
672 FALSE, /* partial_inplace */
673 0xff, /* src_mask */
674 0xff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 /* A relative 15 bit relocation, right shifted by 1. */
678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
679 1, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 14, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed, /* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_NDS32_15_PCREL_RELA", /* name */
687 FALSE, /* partial_inplace */
688 0x3fff, /* src_mask */
689 0x3fff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 /* A relative 17 bit relocation, right shifted by 1. */
693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
694 1, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 TRUE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_signed, /* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_NDS32_17_PCREL_RELA", /* name */
702 FALSE, /* partial_inplace */
703 0xffff, /* src_mask */
704 0xffff, /* dst_mask */
705 TRUE), /* pcrel_offset */
706
707 /* A relative 25 bit relocation, right shifted by 2. */
708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
709 1, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 24, /* bitsize */
712 TRUE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_signed, /* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_NDS32_25_PCREL_RELA", /* name */
717 FALSE, /* partial_inplace */
718 0xffffff, /* src_mask */
719 0xffffff, /* dst_mask */
720 TRUE), /* pcrel_offset */
721
722 /* High 20 bits of address when lower 16 is or'd in. */
723 HOWTO (R_NDS32_HI20_RELA, /* type */
724 12, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 20, /* bitsize */
727 FALSE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_NDS32_HI20_RELA", /* name */
732 FALSE, /* partial_inplace */
733 0x000fffff, /* src_mask */
734 0x000fffff, /* dst_mask */
735 FALSE), /* pcrel_offset */
736
737 /* Lower 12 bits of address. */
738 HOWTO (R_NDS32_LO12S3_RELA, /* type */
739 3, /* rightshift */
740 2, /* size (0 = byte, 1 = short, 2 = long) */
741 9, /* bitsize */
742 FALSE, /* pc_relative */
743 0, /* bitpos */
744 complain_overflow_dont,/* complain_on_overflow */
745 bfd_elf_generic_reloc, /* special_function */
746 "R_NDS32_LO12S3_RELA", /* name */
747 FALSE, /* partial_inplace */
748 0x000001ff, /* src_mask */
749 0x000001ff, /* dst_mask */
750 FALSE), /* pcrel_offset */
751
752 /* Lower 12 bits of address. */
753 HOWTO (R_NDS32_LO12S2_RELA, /* type */
754 2, /* rightshift */
755 2, /* size (0 = byte, 1 = short, 2 = long) */
756 10, /* bitsize */
757 FALSE, /* pc_relative */
758 0, /* bitpos */
759 complain_overflow_dont,/* complain_on_overflow */
760 bfd_elf_generic_reloc, /* special_function */
761 "R_NDS32_LO12S2_RELA", /* name */
762 FALSE, /* partial_inplace */
763 0x000003ff, /* src_mask */
764 0x000003ff, /* dst_mask */
765 FALSE), /* pcrel_offset */
766
767 /* Lower 12 bits of address. */
768 HOWTO (R_NDS32_LO12S1_RELA, /* type */
769 1, /* rightshift */
770 2, /* size (0 = byte, 1 = short, 2 = long) */
771 11, /* bitsize */
772 FALSE, /* pc_relative */
773 0, /* bitpos */
774 complain_overflow_dont,/* complain_on_overflow */
775 bfd_elf_generic_reloc, /* special_function */
776 "R_NDS32_LO12S1_RELA", /* name */
777 FALSE, /* partial_inplace */
778 0x000007ff, /* src_mask */
779 0x000007ff, /* dst_mask */
780 FALSE), /* pcrel_offset */
781
782 /* Lower 12 bits of address. */
783 HOWTO (R_NDS32_LO12S0_RELA, /* type */
784 0, /* rightshift */
785 2, /* size (0 = byte, 1 = short, 2 = long) */
786 12, /* bitsize */
787 FALSE, /* pc_relative */
788 0, /* bitpos */
789 complain_overflow_dont,/* complain_on_overflow */
790 bfd_elf_generic_reloc, /* special_function */
791 "R_NDS32_LO12S0_RELA", /* name */
792 FALSE, /* partial_inplace */
793 0x00000fff, /* src_mask */
794 0x00000fff, /* dst_mask */
795 FALSE), /* pcrel_offset */
796
797 /* Small data area 15 bits offset. */
798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
799 3, /* rightshift */
800 2, /* size (0 = byte, 1 = short, 2 = long) */
801 15, /* bitsize */
802 FALSE, /* pc_relative */
803 0, /* bitpos */
804 complain_overflow_signed, /* complain_on_overflow */
805 bfd_elf_generic_reloc, /* special_function */
806 "R_NDS32_SDA15S3_RELA",/* name */
807 FALSE, /* partial_inplace */
808 0x00007fff, /* src_mask */
809 0x00007fff, /* dst_mask */
810 FALSE), /* pcrel_offset */
811
812 /* Small data area 15 bits offset. */
813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
814 2, /* rightshift */
815 2, /* size (0 = byte, 1 = short, 2 = long) */
816 15, /* bitsize */
817 FALSE, /* pc_relative */
818 0, /* bitpos */
819 complain_overflow_signed, /* complain_on_overflow */
820 bfd_elf_generic_reloc, /* special_function */
821 "R_NDS32_SDA15S2_RELA",/* name */
822 FALSE, /* partial_inplace */
823 0x00007fff, /* src_mask */
824 0x00007fff, /* dst_mask */
825 FALSE), /* pcrel_offset */
826
827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 15, /* bitsize */
831 FALSE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_SDA15S1_RELA",/* name */
836 FALSE, /* partial_inplace */
837 0x00007fff, /* src_mask */
838 0x00007fff, /* dst_mask */
839 FALSE), /* pcrel_offset */
840
841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
842 0, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 15, /* bitsize */
845 FALSE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_signed, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 "R_NDS32_SDA15S0_RELA",/* name */
850 FALSE, /* partial_inplace */
851 0x00007fff, /* src_mask */
852 0x00007fff, /* dst_mask */
853 FALSE), /* pcrel_offset */
854
855 /* GNU extension to record C++ vtable hierarchy */
856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
857 0, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 0, /* bitsize */
860 FALSE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont,/* complain_on_overflow */
863 NULL, /* special_function */
864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
865 FALSE, /* partial_inplace */
866 0, /* src_mask */
867 0, /* dst_mask */
868 FALSE), /* pcrel_offset */
869
870 /* GNU extension to record C++ vtable member usage */
871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
872 0, /* rightshift */
873 2, /* size (0 = byte, 1 = short, 2 = long) */
874 0, /* bitsize */
875 FALSE, /* pc_relative */
876 0, /* bitpos */
877 complain_overflow_dont,/* complain_on_overflow */
878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
879 "R_NDS32_RELA_GNU_VTENTRY", /* name */
880 FALSE, /* partial_inplace */
881 0, /* src_mask */
882 0, /* dst_mask */
883 FALSE), /* pcrel_offset */
884
885 /* Like R_NDS32_20, but referring to the GOT table entry for
886 the symbol. */
887 HOWTO (R_NDS32_GOT20, /* type */
888 0, /* rightshift */
889 2, /* size (0 = byte, 1 = short, 2 = long) */
890 20, /* bitsize */
891 FALSE, /* pc_relative */
892 0, /* bitpos */
893 complain_overflow_signed, /* complain_on_overflow */
894 bfd_elf_generic_reloc, /* special_function */
895 "R_NDS32_GOT20", /* name */
896 FALSE, /* partial_inplace */
897 0xfffff, /* src_mask */
898 0xfffff, /* dst_mask */
899 FALSE), /* pcrel_offset */
900
901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
902 entry for the symbol. */
903 HOWTO (R_NDS32_25_PLTREL, /* type */
904 1, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 24, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_signed, /* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_NDS32_25_PLTREL", /* name */
912 FALSE, /* partial_inplace */
913 0xffffff, /* src_mask */
914 0xffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 /* This is used only by the dynamic linker. The symbol should exist
918 both in the object being run and in some shared library. The
919 dynamic linker copies the data addressed by the symbol from the
920 shared library into the object, because the object being
921 run has to have the data at some particular address. */
922 HOWTO (R_NDS32_COPY, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 FALSE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_bitfield, /* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_NDS32_COPY", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 FALSE), /* pcrel_offset */
935
936 /* Like R_NDS32_20, but used when setting global offset table
937 entries. */
938 HOWTO (R_NDS32_GLOB_DAT, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 FALSE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_bitfield, /* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_NDS32_GLOB_DAT", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 FALSE), /* pcrel_offset */
951
952 /* Marks a procedure linkage table entry for a symbol. */
953 HOWTO (R_NDS32_JMP_SLOT, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 32, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_bitfield, /* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_JMP_SLOT", /* name */
962 FALSE, /* partial_inplace */
963 0xffffffff, /* src_mask */
964 0xffffffff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* Used only by the dynamic linker. When the object is run, this
968 longword is set to the load address of the object, plus the
969 addend. */
970 HOWTO (R_NDS32_RELATIVE, /* type */
971 0, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 32, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_bitfield, /* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_RELATIVE", /* name */
979 FALSE, /* partial_inplace */
980 0xffffffff, /* src_mask */
981 0xffffffff, /* dst_mask */
982 FALSE), /* pcrel_offset */
983
984 HOWTO (R_NDS32_GOTOFF, /* type */
985 0, /* rightshift */
986 2, /* size (0 = byte, 1 = short, 2 = long) */
987 20, /* bitsize */
988 FALSE, /* pc_relative */
989 0, /* bitpos */
990 complain_overflow_signed, /* complain_on_overflow */
991 bfd_elf_generic_reloc, /* special_function */
992 "R_NDS32_GOTOFF", /* name */
993 FALSE, /* partial_inplace */
994 0xfffff, /* src_mask */
995 0xfffff, /* dst_mask */
996 FALSE), /* pcrel_offset */
997
998 /* An PC Relative 20-bit relocation used when setting PIC offset
999 table register. */
1000 HOWTO (R_NDS32_GOTPC20, /* type */
1001 0, /* rightshift */
1002 2, /* size (0 = byte, 1 = short, 2 = long) */
1003 20, /* bitsize */
1004 TRUE, /* pc_relative */
1005 0, /* bitpos */
1006 complain_overflow_signed, /* complain_on_overflow */
1007 bfd_elf_generic_reloc, /* special_function */
1008 "R_NDS32_GOTPC20", /* name */
1009 FALSE, /* partial_inplace */
1010 0xfffff, /* src_mask */
1011 0xfffff, /* dst_mask */
1012 TRUE), /* pcrel_offset */
1013
1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1015 the symbol. */
1016 HOWTO (R_NDS32_GOT_HI20, /* type */
1017 12, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 20, /* bitsize */
1020 FALSE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_NDS32_GOT_HI20", /* name */
1025 FALSE, /* partial_inplace */
1026 0x000fffff, /* src_mask */
1027 0x000fffff, /* dst_mask */
1028 FALSE), /* pcrel_offset */
1029 HOWTO (R_NDS32_GOT_LO12, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 12, /* bitsize */
1033 FALSE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_NDS32_GOT_LO12", /* name */
1038 FALSE, /* partial_inplace */
1039 0x00000fff, /* src_mask */
1040 0x00000fff, /* dst_mask */
1041 FALSE), /* pcrel_offset */
1042
1043 /* An PC Relative relocation used when setting PIC offset table register.
1044 Like R_NDS32_HI20, but referring to the GOT table entry for
1045 the symbol. */
1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1047 12, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 20, /* bitsize */
1050 FALSE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_NDS32_GOTPC_HI20", /* name */
1055 FALSE, /* partial_inplace */
1056 0x000fffff, /* src_mask */
1057 0x000fffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 12, /* bitsize */
1063 FALSE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont, /* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_NDS32_GOTPC_LO12", /* name */
1068 FALSE, /* partial_inplace */
1069 0x00000fff, /* src_mask */
1070 0x00000fff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1074 12, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 20, /* bitsize */
1077 FALSE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_NDS32_GOTOFF_HI20", /* name */
1082 FALSE, /* partial_inplace */
1083 0x000fffff, /* src_mask */
1084 0x000fffff, /* dst_mask */
1085 FALSE), /* pcrel_offset */
1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 12, /* bitsize */
1090 FALSE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_NDS32_GOTOFF_LO12", /* name */
1095 FALSE, /* partial_inplace */
1096 0x00000fff, /* src_mask */
1097 0x00000fff, /* dst_mask */
1098 FALSE), /* pcrel_offset */
1099
1100 /* Alignment hint for relaxable instruction. This is used with
1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1102 in order to make next label aligned on word boundary. */
1103 HOWTO (R_NDS32_INSN16, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 FALSE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 nds32_elf_ignore_reloc,/* special_function */
1111 "R_NDS32_INSN16", /* name */
1112 FALSE, /* partial_inplace */
1113 0x00000fff, /* src_mask */
1114 0x00000fff, /* dst_mask */
1115 FALSE), /* pcrel_offset */
1116
1117 /* Alignment hint for label. */
1118 HOWTO (R_NDS32_LABEL, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 FALSE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 nds32_elf_ignore_reloc,/* special_function */
1126 "R_NDS32_LABEL", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 FALSE), /* pcrel_offset */
1131
1132 /* Relax hint for unconditional call sequence */
1133 HOWTO (R_NDS32_LONGCALL1, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 FALSE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 nds32_elf_ignore_reloc,/* special_function */
1141 "R_NDS32_LONGCALL1", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 FALSE), /* pcrel_offset */
1146
1147 /* Relax hint for conditional call sequence. */
1148 HOWTO (R_NDS32_LONGCALL2, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 FALSE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 nds32_elf_ignore_reloc,/* special_function */
1156 "R_NDS32_LONGCALL2", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 FALSE), /* pcrel_offset */
1161
1162 /* Relax hint for conditional call sequence. */
1163 HOWTO (R_NDS32_LONGCALL3, /* type */
1164 0, /* rightshift */
1165 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 32, /* bitsize */
1167 FALSE, /* pc_relative */
1168 0, /* bitpos */
1169 complain_overflow_dont,/* complain_on_overflow */
1170 nds32_elf_ignore_reloc,/* special_function */
1171 "R_NDS32_LONGCALL3", /* name */
1172 FALSE, /* partial_inplace */
1173 0xffffffff, /* src_mask */
1174 0xffffffff, /* dst_mask */
1175 FALSE), /* pcrel_offset */
1176
1177 /* Relax hint for unconditional branch sequence. */
1178 HOWTO (R_NDS32_LONGJUMP1, /* type */
1179 0, /* rightshift */
1180 2, /* size (0 = byte, 1 = short, 2 = long) */
1181 32, /* bitsize */
1182 FALSE, /* pc_relative */
1183 0, /* bitpos */
1184 complain_overflow_dont,/* complain_on_overflow */
1185 nds32_elf_ignore_reloc,/* special_function */
1186 "R_NDS32_LONGJUMP1", /* name */
1187 FALSE, /* partial_inplace */
1188 0xffffffff, /* src_mask */
1189 0xffffffff, /* dst_mask */
1190 FALSE), /* pcrel_offset */
1191
1192 /* Relax hint for conditional branch sequence. */
1193 HOWTO (R_NDS32_LONGJUMP2, /* type */
1194 0, /* rightshift */
1195 2, /* size (0 = byte, 1 = short, 2 = long) */
1196 32, /* bitsize */
1197 FALSE, /* pc_relative */
1198 0, /* bitpos */
1199 complain_overflow_dont,/* complain_on_overflow */
1200 nds32_elf_ignore_reloc,/* special_function */
1201 "R_NDS32_LONGJUMP2", /* name */
1202 FALSE, /* partial_inplace */
1203 0xffffffff, /* src_mask */
1204 0xffffffff, /* dst_mask */
1205 FALSE), /* pcrel_offset */
1206
1207 /* Relax hint for conditional branch sequence. */
1208 HOWTO (R_NDS32_LONGJUMP3, /* type */
1209 0, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 32, /* bitsize */
1212 FALSE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont,/* complain_on_overflow */
1215 nds32_elf_ignore_reloc,/* special_function */
1216 "R_NDS32_LONGJUMP3", /* name */
1217 FALSE, /* partial_inplace */
1218 0xffffffff, /* src_mask */
1219 0xffffffff, /* dst_mask */
1220 FALSE), /* pcrel_offset */
1221
1222 /* Relax hint for load/store sequence. */
1223 HOWTO (R_NDS32_LOADSTORE, /* type */
1224 0, /* rightshift */
1225 2, /* size (0 = byte, 1 = short, 2 = long) */
1226 32, /* bitsize */
1227 FALSE, /* pc_relative */
1228 0, /* bitpos */
1229 complain_overflow_dont,/* complain_on_overflow */
1230 nds32_elf_ignore_reloc,/* special_function */
1231 "R_NDS32_LOADSTORE", /* name */
1232 FALSE, /* partial_inplace */
1233 0xffffffff, /* src_mask */
1234 0xffffffff, /* dst_mask */
1235 FALSE), /* pcrel_offset */
1236
1237 /* Relax hint for load/store sequence. */
1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1239 0, /* rightshift */
1240 1, /* size (0 = byte, 1 = short, 2 = long) */
1241 16, /* bitsize */
1242 FALSE, /* pc_relative */
1243 0, /* bitpos */
1244 complain_overflow_dont,/* complain_on_overflow */
1245 nds32_elf_ignore_reloc,/* special_function */
1246 "R_NDS32_9_FIXED_RELA",/* name */
1247 FALSE, /* partial_inplace */
1248 0x000000ff, /* src_mask */
1249 0x000000ff, /* dst_mask */
1250 FALSE), /* pcrel_offset */
1251
1252 /* Relax hint for load/store sequence. */
1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 FALSE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 nds32_elf_ignore_reloc,/* special_function */
1261 "R_NDS32_15_FIXED_RELA", /* name */
1262 FALSE, /* partial_inplace */
1263 0x00003fff, /* src_mask */
1264 0x00003fff, /* dst_mask */
1265 FALSE), /* pcrel_offset */
1266
1267 /* Relax hint for load/store sequence. */
1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1269 0, /* rightshift */
1270 2, /* size (0 = byte, 1 = short, 2 = long) */
1271 32, /* bitsize */
1272 FALSE, /* pc_relative */
1273 0, /* bitpos */
1274 complain_overflow_dont,/* complain_on_overflow */
1275 nds32_elf_ignore_reloc,/* special_function */
1276 "R_NDS32_17_FIXED_RELA", /* name */
1277 FALSE, /* partial_inplace */
1278 0x0000ffff, /* src_mask */
1279 0x0000ffff, /* dst_mask */
1280 FALSE), /* pcrel_offset */
1281
1282 /* Relax hint for load/store sequence. */
1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 32, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_dont,/* complain_on_overflow */
1290 nds32_elf_ignore_reloc,/* special_function */
1291 "R_NDS32_25_FIXED_RELA", /* name */
1292 FALSE, /* partial_inplace */
1293 0x00ffffff, /* src_mask */
1294 0x00ffffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 /* High 20 bits of PLT symbol offset relative to PC. */
1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1299 12, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 20, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_NDS32_PLTREL_HI20", /* name */
1307 FALSE, /* partial_inplace */
1308 0x000fffff, /* src_mask */
1309 0x000fffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 /* Low 12 bits of PLT symbol offset relative to PC. */
1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 12, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_NDS32_PLTREL_LO12", /* name */
1322 FALSE, /* partial_inplace */
1323 0x00000fff, /* src_mask */
1324 0x00000fff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1329 12, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 20, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_dont,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_NDS32_PLT_GOTREL_HI20", /* name */
1337 FALSE, /* partial_inplace */
1338 0x000fffff, /* src_mask */
1339 0x000fffff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 12, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_NDS32_PLT_GOTREL_LO12", /* name */
1352 FALSE, /* partial_inplace */
1353 0x00000fff, /* src_mask */
1354 0x00000fff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 /* Small data area 12 bits offset. */
1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1359 2, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 12, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_signed, /* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_NDS32_SDA12S2_DP_RELA", /* name */
1367 FALSE, /* partial_inplace */
1368 0x00000fff, /* src_mask */
1369 0x00000fff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 /* Small data area 12 bits offset. */
1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1374 2, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 12, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_signed, /* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_NDS32_SDA12S2_SP_RELA", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00000fff, /* src_mask */
1384 0x00000fff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386 /* Lower 12 bits of address. */
1387
1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1389 2, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 10, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_NDS32_LO12S2_DP_RELA", /* name */
1397 FALSE, /* partial_inplace */
1398 0x000003ff, /* src_mask */
1399 0x000003ff, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 /* Lower 12 bits of address. */
1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1404 2, /* rightshift */
1405 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 10, /* bitsize */
1407 FALSE, /* pc_relative */
1408 0, /* bitpos */
1409 complain_overflow_dont,/* complain_on_overflow */
1410 bfd_elf_generic_reloc, /* special_function */
1411 "R_NDS32_LO12S2_SP_RELA", /* name */
1412 FALSE, /* partial_inplace */
1413 0x000003ff, /* src_mask */
1414 0x000003ff, /* dst_mask */
1415 FALSE), /* pcrel_offset */
1416 /* Lower 12 bits of address. Special identity for or case. */
1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1418 0, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont,/* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 "R_NDS32_LO12S0_ORI_RELA", /* name */
1426 FALSE, /* partial_inplace */
1427 0x00000fff, /* src_mask */
1428 0x00000fff, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430 /* Small data area 19 bits offset. */
1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1432 3, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 16, /* bitsize */
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
1437 complain_overflow_signed, /* complain_on_overflow */
1438 bfd_elf_generic_reloc, /* special_function */
1439 "R_NDS32_SDA16S3_RELA",/* name */
1440 FALSE, /* partial_inplace */
1441 0x0000ffff, /* src_mask */
1442 0x0000ffff, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* Small data area 15 bits offset. */
1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1447 2, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 17, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_signed, /* complain_on_overflow */
1453 bfd_elf_generic_reloc, /* special_function */
1454 "R_NDS32_SDA17S2_RELA",/* name */
1455 FALSE, /* partial_inplace */
1456 0x0001ffff, /* src_mask */
1457 0x0001ffff, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1461 1, /* rightshift */
1462 2, /* size (0 = byte, 1 = short, 2 = long) */
1463 18, /* bitsize */
1464 FALSE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_NDS32_SDA18S1_RELA",/* name */
1469 FALSE, /* partial_inplace */
1470 0x0003ffff, /* src_mask */
1471 0x0003ffff, /* dst_mask */
1472 FALSE), /* pcrel_offset */
1473
1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1475 0, /* rightshift */
1476 2, /* size (0 = byte, 1 = short, 2 = long) */
1477 19, /* bitsize */
1478 FALSE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_NDS32_SDA19S0_RELA",/* name */
1483 FALSE, /* partial_inplace */
1484 0x0007ffff, /* src_mask */
1485 0x0007ffff, /* dst_mask */
1486 FALSE), /* pcrel_offset */
1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1488 0, /* rightshift */
1489 0, /* size (0 = byte, 1 = short, 2 = long) */
1490 8, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont,/* complain_on_overflow */
1494 nds32_elf_ignore_reloc,/* special_function */
1495 "R_NDS32_DWARF2_OP1_RELA", /* name */
1496 FALSE, /* partial_inplace */
1497 0xff, /* src_mask */
1498 0xff, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1501 0, /* rightshift */
1502 1, /* size (0 = byte, 1 = short, 2 = long) */
1503 16, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont,/* complain_on_overflow */
1507 nds32_elf_ignore_reloc,/* special_function */
1508 "R_NDS32_DWARF2_OP2_RELA", /* name */
1509 FALSE, /* partial_inplace */
1510 0xffff, /* src_mask */
1511 0xffff, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1514 0, /* rightshift */
1515 2, /* size (0 = byte, 1 = short, 2 = long) */
1516 32, /* bitsize */
1517 FALSE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_dont,/* complain_on_overflow */
1520 nds32_elf_ignore_reloc,/* special_function */
1521 "R_NDS32_DWARF2_LEB_RELA", /* name */
1522 FALSE, /* partial_inplace */
1523 0xffffffff, /* src_mask */
1524 0xffffffff, /* dst_mask */
1525 FALSE), /* pcrel_offset */
1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1527 0, /* rightshift */
1528 1, /* size (0 = byte, 1 = short, 2 = long) */
1529 16, /* bitsize */
1530 FALSE, /* pc_relative */
1531 0, /* bitpos */
1532 complain_overflow_dont,/* complain_on_overflow */
1533 nds32_elf_ignore_reloc,/* special_function */
1534 "R_NDS32_UPDATE_TA_RELA", /* name */
1535 FALSE, /* partial_inplace */
1536 0xffff, /* src_mask */
1537 0xffff, /* dst_mask */
1538 FALSE), /* pcrel_offset */
1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1540 entry for the symbol. */
1541 HOWTO (R_NDS32_9_PLTREL, /* type */
1542 1, /* rightshift */
1543 1, /* size (0 = byte, 1 = short, 2 = long) */
1544 8, /* bitsize */
1545 TRUE, /* pc_relative */
1546 0, /* bitpos */
1547 complain_overflow_signed, /* complain_on_overflow */
1548 bfd_elf_generic_reloc, /* special_function */
1549 "R_NDS32_9_PLTREL", /* name */
1550 FALSE, /* partial_inplace */
1551 0xff, /* src_mask */
1552 0xff, /* dst_mask */
1553 TRUE), /* pcrel_offset */
1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1556 0, /* rightshift */
1557 2, /* size (0 = byte, 1 = short, 2 = long) */
1558 20, /* bitsize */
1559 FALSE, /* pc_relative */
1560 0, /* bitpos */
1561 complain_overflow_dont,/* complain_on_overflow */
1562 bfd_elf_generic_reloc, /* special_function */
1563 "R_NDS32_PLT_GOTREL_LO20", /* name */
1564 FALSE, /* partial_inplace */
1565 0x000fffff, /* src_mask */
1566 0x000fffff, /* dst_mask */
1567 FALSE), /* pcrel_offset */
1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 15, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont,/* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 "R_NDS32_PLT_GOTREL_LO15", /* name */
1578 FALSE, /* partial_inplace */
1579 0x00007fff, /* src_mask */
1580 0x00007fff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1584 0, /* rightshift */
1585 2, /* size (0 = byte, 1 = short, 2 = long) */
1586 19, /* bitsize */
1587 FALSE, /* pc_relative */
1588 0, /* bitpos */
1589 complain_overflow_dont,/* complain_on_overflow */
1590 bfd_elf_generic_reloc, /* special_function */
1591 "R_NDS32_PLT_GOTREL_LO19", /* name */
1592 FALSE, /* partial_inplace */
1593 0x0007ffff, /* src_mask */
1594 0x0007ffff, /* dst_mask */
1595 FALSE), /* pcrel_offset */
1596 HOWTO (R_NDS32_GOT_LO15, /* type */
1597 0, /* rightshift */
1598 2, /* size (0 = byte, 1 = short, 2 = long) */
1599 15, /* bitsize */
1600 FALSE, /* pc_relative */
1601 0, /* bitpos */
1602 complain_overflow_dont,/* complain_on_overflow */
1603 bfd_elf_generic_reloc, /* special_function */
1604 "R_NDS32_GOT_LO15", /* name */
1605 FALSE, /* partial_inplace */
1606 0x00007fff, /* src_mask */
1607 0x00007fff, /* dst_mask */
1608 FALSE), /* pcrel_offset */
1609 HOWTO (R_NDS32_GOT_LO19, /* type */
1610 0, /* rightshift */
1611 2, /* size (0 = byte, 1 = short, 2 = long) */
1612 19, /* bitsize */
1613 FALSE, /* pc_relative */
1614 0, /* bitpos */
1615 complain_overflow_dont,/* complain_on_overflow */
1616 bfd_elf_generic_reloc, /* special_function */
1617 "R_NDS32_GOT_LO19", /* name */
1618 FALSE, /* partial_inplace */
1619 0x0007ffff, /* src_mask */
1620 0x0007ffff, /* dst_mask */
1621 FALSE), /* pcrel_offset */
1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1623 0, /* rightshift */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 15, /* bitsize */
1626 FALSE, /* pc_relative */
1627 0, /* bitpos */
1628 complain_overflow_dont,/* complain_on_overflow */
1629 bfd_elf_generic_reloc, /* special_function */
1630 "R_NDS32_GOTOFF_LO15", /* name */
1631 FALSE, /* partial_inplace */
1632 0x00007fff, /* src_mask */
1633 0x00007fff, /* dst_mask */
1634 FALSE), /* pcrel_offset */
1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1636 0, /* rightshift */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 19, /* bitsize */
1639 FALSE, /* pc_relative */
1640 0, /* bitpos */
1641 complain_overflow_dont,/* complain_on_overflow */
1642 bfd_elf_generic_reloc, /* special_function */
1643 "R_NDS32_GOTOFF_LO19", /* name */
1644 FALSE, /* partial_inplace */
1645 0x0007ffff, /* src_mask */
1646 0x0007ffff, /* dst_mask */
1647 FALSE), /* pcrel_offset */
1648 /* GOT 15 bits offset. */
1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1650 2, /* rightshift */
1651 2, /* size (0 = byte, 1 = short, 2 = long) */
1652 15, /* bitsize */
1653 FALSE, /* pc_relative */
1654 0, /* bitpos */
1655 complain_overflow_signed, /* complain_on_overflow */
1656 bfd_elf_generic_reloc, /* special_function */
1657 "R_NDS32_GOT15S2_RELA",/* name */
1658 FALSE, /* partial_inplace */
1659 0x00007fff, /* src_mask */
1660 0x00007fff, /* dst_mask */
1661 FALSE), /* pcrel_offset */
1662 /* GOT 17 bits offset. */
1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1664 2, /* rightshift */
1665 2, /* size (0 = byte, 1 = short, 2 = long) */
1666 17, /* bitsize */
1667 FALSE, /* pc_relative */
1668 0, /* bitpos */
1669 complain_overflow_signed, /* complain_on_overflow */
1670 bfd_elf_generic_reloc, /* special_function */
1671 "R_NDS32_GOT17S2_RELA",/* name */
1672 FALSE, /* partial_inplace */
1673 0x0001ffff, /* src_mask */
1674 0x0001ffff, /* dst_mask */
1675 FALSE), /* pcrel_offset */
1676 /* A 5 bit address. */
1677 HOWTO (R_NDS32_5_RELA, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 5, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_signed, /* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_NDS32_5_RELA", /* name */
1686 FALSE, /* partial_inplace */
1687 0x1f, /* src_mask */
1688 0x1f, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1691 1, /* rightshift */
1692 1, /* size (0 = byte, 1 = short, 2 = long) */
1693 9, /* bitsize */
1694 TRUE, /* pc_relative */
1695 0, /* bitpos */
1696 complain_overflow_unsigned, /* complain_on_overflow */
1697 bfd_elf_generic_reloc, /* special_function */
1698 "R_NDS32_10_UPCREL_RELA", /* name */
1699 FALSE, /* partial_inplace */
1700 0x1ff, /* src_mask */
1701 0x1ff, /* dst_mask */
1702 TRUE), /* pcrel_offset */
1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1704 2, /* rightshift */
1705 1, /* size (0 = byte, 1 = short, 2 = long) */
1706 7, /* bitsize */
1707 FALSE, /* pc_relative */
1708 0, /* bitpos */
1709 complain_overflow_unsigned, /* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_SDA_FP7U2_RELA", /* name */
1712 FALSE, /* partial_inplace */
1713 0x0000007f, /* src_mask */
1714 0x0000007f, /* dst_mask */
1715 FALSE), /* pcrel_offset */
1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1717 1, /* rightshift */
1718 2, /* size (0 = byte, 1 = short, 2 = long) */
1719 8, /* bitsize */
1720 TRUE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_signed, /* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1725 FALSE, /* partial_inplace */
1726 0xff, /* src_mask */
1727 0xff, /* dst_mask */
1728 TRUE), /* pcrel_offset */
1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1730 1, /* rightshift */
1731 2, /* size (0 = byte, 1 = short, 2 = long) */
1732 24, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_NDS32_25_ABS_RELA", /* name */
1738 FALSE, /* partial_inplace */
1739 0xffffff, /* src_mask */
1740 0xffffff, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1745 1, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 16, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_NDS32_17IFC_PCREL_RELA", /* name */
1753 FALSE, /* partial_inplace */
1754 0xffff, /* src_mask */
1755 0xffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1760 1, /* rightshift */
1761 1, /* size (0 = byte, 1 = short, 2 = long) */
1762 9, /* bitsize */
1763 TRUE, /* pc_relative */
1764 0, /* bitpos */
1765 complain_overflow_unsigned, /* complain_on_overflow */
1766 bfd_elf_generic_reloc, /* special_function */
1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1768 FALSE, /* partial_inplace */
1769 0x1ff, /* src_mask */
1770 0x1ff, /* dst_mask */
1771 TRUE), /* pcrel_offset */
1772
1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1775 12, /* rightshift */
1776 2, /* size (0 = byte, 1 = short, 2 = long) */
1777 20, /* bitsize */
1778 FALSE, /* pc_relative */
1779 0, /* bitpos */
1780 complain_overflow_dont, /* complain_on_overflow */
1781 bfd_elf_generic_reloc, /* special_function */
1782 "R_NDS32_TLS_LE_HI20", /* name */
1783 FALSE, /* partial_inplace */
1784 0x000fffff, /* src_mask */
1785 0x000fffff, /* dst_mask */
1786 FALSE), /* pcrel_offset */
1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1788 0, /* rightshift */
1789 2, /* size (0 = byte, 1 = short, 2 = long) */
1790 12, /* bitsize */
1791 FALSE, /* pc_relative */
1792 0, /* bitpos */
1793 complain_overflow_dont, /* complain_on_overflow */
1794 bfd_elf_generic_reloc, /* special_function */
1795 "R_NDS32_TLS_LE_LO12", /* name */
1796 FALSE, /* partial_inplace */
1797 0x00000fff, /* src_mask */
1798 0x00000fff, /* dst_mask */
1799 FALSE), /* pcrel_offset */
1800
1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1803 12, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 20, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_dont, /* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_NDS32_TLS_IE_HI20", /* name */
1811 FALSE, /* partial_inplace */
1812 0x000fffff, /* src_mask */
1813 0x000fffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1816 2, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 10, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_dont, /* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_NDS32_TLS_IE_LO12S2", /* name */
1824 FALSE, /* partial_inplace */
1825 0x000003ff, /* src_mask */
1826 0x000003ff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 /* Mark a TLS IE entry in GOT. */
1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield, /* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_NDS32_TLS_TPOFF", /* name */
1838 FALSE, /* partial_inplace */
1839 0xffffffff, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 /* A 20 bit address. */
1843 HOWTO (R_NDS32_TLS_LE_20, /* type */
1844 0, /* rightshift */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 20, /* bitsize */
1847 FALSE, /* pc_relative */
1848 0, /* bitpos */
1849 complain_overflow_signed, /* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_NDS32_TLS_LE_20", /* name */
1852 FALSE, /* partial_inplace */
1853 0xfffff, /* src_mask */
1854 0xfffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1857 0, /* rightshift */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1859 15, /* bitsize */
1860 FALSE, /* pc_relative */
1861 0, /* bitpos */
1862 complain_overflow_signed, /* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_NDS32_TLS_LE_15S0", /* name */
1865 FALSE, /* partial_inplace */
1866 0x7fff, /* src_mask */
1867 0x7fff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1870 1, /* rightshift */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1872 15, /* bitsize */
1873 FALSE, /* pc_relative */
1874 0, /* bitpos */
1875 complain_overflow_signed, /* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_NDS32_TLS_LE_15S1", /* name */
1878 FALSE, /* partial_inplace */
1879 0x7fff, /* src_mask */
1880 0x7fff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1883 2, /* rightshift */
1884 2, /* size (0 = byte, 1 = short, 2 = long) */
1885 15, /* bitsize */
1886 FALSE, /* pc_relative */
1887 0, /* bitpos */
1888 complain_overflow_signed, /* complain_on_overflow */
1889 bfd_elf_generic_reloc, /* special_function */
1890 "R_NDS32_TLS_LE_15S2", /* name */
1891 FALSE, /* partial_inplace */
1892 0x7fff, /* src_mask */
1893 0x7fff, /* dst_mask */
1894 FALSE), /* pcrel_offset */
1895
1896 /* Relax hint for unconditional call sequence */
1897 HOWTO (R_NDS32_LONGCALL4, /* type */
1898 0, /* rightshift */
1899 2, /* size (0 = byte, 1 = short, 2 = long) */
1900 32, /* bitsize */
1901 FALSE, /* pc_relative */
1902 0, /* bitpos */
1903 complain_overflow_dont, /* complain_on_overflow */
1904 nds32_elf_ignore_reloc, /* special_function */
1905 "R_NDS32_LONGCALL4", /* name */
1906 FALSE, /* partial_inplace */
1907 0xffffffff, /* src_mask */
1908 0xffffffff, /* dst_mask */
1909 FALSE), /* pcrel_offset */
1910
1911 /* Relax hint for conditional call sequence. */
1912 HOWTO (R_NDS32_LONGCALL5, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont, /* complain_on_overflow */
1919 nds32_elf_ignore_reloc, /* special_function */
1920 "R_NDS32_LONGCALL5", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925
1926 /* Relax hint for conditional call sequence. */
1927 HOWTO (R_NDS32_LONGCALL6, /* type */
1928 0, /* rightshift */
1929 2, /* size (0 = byte, 1 = short, 2 = long) */
1930 32, /* bitsize */
1931 FALSE, /* pc_relative */
1932 0, /* bitpos */
1933 complain_overflow_dont, /* complain_on_overflow */
1934 nds32_elf_ignore_reloc, /* special_function */
1935 "R_NDS32_LONGCALL6", /* name */
1936 FALSE, /* partial_inplace */
1937 0xffffffff, /* src_mask */
1938 0xffffffff, /* dst_mask */
1939 FALSE), /* pcrel_offset */
1940
1941 /* Relax hint for unconditional branch sequence. */
1942 HOWTO (R_NDS32_LONGJUMP4, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont, /* complain_on_overflow */
1949 nds32_elf_ignore_reloc, /* special_function */
1950 "R_NDS32_LONGJUMP4", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955
1956 /* Relax hint for conditional branch sequence. */
1957 HOWTO (R_NDS32_LONGJUMP5, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 32, /* bitsize */
1961 FALSE, /* pc_relative */
1962 0, /* bitpos */
1963 complain_overflow_dont, /* complain_on_overflow */
1964 nds32_elf_ignore_reloc, /* special_function */
1965 "R_NDS32_LONGJUMP5", /* name */
1966 FALSE, /* partial_inplace */
1967 0xffffffff, /* src_mask */
1968 0xffffffff, /* dst_mask */
1969 FALSE), /* pcrel_offset */
1970
1971 /* Relax hint for conditional branch sequence. */
1972 HOWTO (R_NDS32_LONGJUMP6, /* type */
1973 0, /* rightshift */
1974 2, /* size (0 = byte, 1 = short, 2 = long) */
1975 32, /* bitsize */
1976 FALSE, /* pc_relative */
1977 0, /* bitpos */
1978 complain_overflow_dont, /* complain_on_overflow */
1979 nds32_elf_ignore_reloc, /* special_function */
1980 "R_NDS32_LONGJUMP6", /* name */
1981 FALSE, /* partial_inplace */
1982 0xffffffff, /* src_mask */
1983 0xffffffff, /* dst_mask */
1984 FALSE), /* pcrel_offset */
1985
1986 /* Relax hint for conditional branch sequence. */
1987 HOWTO (R_NDS32_LONGJUMP7, /* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 32, /* bitsize */
1991 FALSE, /* pc_relative */
1992 0, /* bitpos */
1993 complain_overflow_dont, /* complain_on_overflow */
1994 nds32_elf_ignore_reloc, /* special_function */
1995 "R_NDS32_LONGJUMP7", /* name */
1996 FALSE, /* partial_inplace */
1997 0xffffffff, /* src_mask */
1998 0xffffffff, /* dst_mask */
1999 FALSE), /* pcrel_offset */
2000 };
2001
2002 /* Relocations used for relaxation. */
2003 static reloc_howto_type nds32_elf_relax_howto_table[] =
2004 {
2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2006 0, /* rightshift */
2007 2, /* size (0 = byte, 1 = short, 2 = long) */
2008 32, /* bitsize */
2009 FALSE, /* pc_relative */
2010 0, /* bitpos */
2011 complain_overflow_dont,/* complain_on_overflow */
2012 nds32_elf_ignore_reloc,/* special_function */
2013 "R_NDS32_RELAX_ENTRY", /* name */
2014 FALSE, /* partial_inplace */
2015 0xffffffff, /* src_mask */
2016 0xffffffff, /* dst_mask */
2017 FALSE), /* pcrel_offset */
2018 HOWTO (R_NDS32_GOT_SUFF, /* type */
2019 0, /* rightshift */
2020 2, /* size (0 = byte, 1 = short, 2 = long) */
2021 32, /* bitsize */
2022 FALSE, /* pc_relative */
2023 0, /* bitpos */
2024 complain_overflow_dont,/* complain_on_overflow */
2025 nds32_elf_ignore_reloc,/* special_function */
2026 "R_NDS32_GOT_SUFF", /* name */
2027 FALSE, /* partial_inplace */
2028 0xffffffff, /* src_mask */
2029 0xffffffff, /* dst_mask */
2030 FALSE), /* pcrel_offset */
2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2032 0, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 32, /* bitsize */
2035 FALSE, /* pc_relative */
2036 0, /* bitpos */
2037 complain_overflow_bitfield, /* complain_on_overflow */
2038 nds32_elf_ignore_reloc,/* special_function */
2039 "R_NDS32_GOTOFF_SUFF", /* name */
2040 FALSE, /* partial_inplace */
2041 0xffffffff, /* src_mask */
2042 0xffffffff, /* dst_mask */
2043 FALSE), /* pcrel_offset */
2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2045 0, /* rightshift */
2046 2, /* size (0 = byte, 1 = short, 2 = long) */
2047 32, /* bitsize */
2048 FALSE, /* pc_relative */
2049 0, /* bitpos */
2050 complain_overflow_dont,/* complain_on_overflow */
2051 nds32_elf_ignore_reloc,/* special_function */
2052 "R_NDS32_PLT_GOT_SUFF",/* name */
2053 FALSE, /* partial_inplace */
2054 0xffffffff, /* src_mask */
2055 0xffffffff, /* dst_mask */
2056 FALSE), /* pcrel_offset */
2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2058 0, /* rightshift */
2059 2, /* size (0 = byte, 1 = short, 2 = long) */
2060 32, /* bitsize */
2061 FALSE, /* pc_relative */
2062 0, /* bitpos */
2063 complain_overflow_dont,/* complain_on_overflow */
2064 nds32_elf_ignore_reloc,/* special_function */
2065 "R_NDS32_MULCALL_SUFF",/* name */
2066 FALSE, /* partial_inplace */
2067 0xffffffff, /* src_mask */
2068 0xffffffff, /* dst_mask */
2069 FALSE), /* pcrel_offset */
2070 HOWTO (R_NDS32_PTR, /* type */
2071 0, /* rightshift */
2072 2, /* size (0 = byte, 1 = short, 2 = long) */
2073 32, /* bitsize */
2074 FALSE, /* pc_relative */
2075 0, /* bitpos */
2076 complain_overflow_dont,/* complain_on_overflow */
2077 nds32_elf_ignore_reloc,/* special_function */
2078 "R_NDS32_PTR", /* name */
2079 FALSE, /* partial_inplace */
2080 0xffffffff, /* src_mask */
2081 0xffffffff, /* dst_mask */
2082 FALSE), /* pcrel_offset */
2083 HOWTO (R_NDS32_PTR_COUNT, /* type */
2084 0, /* rightshift */
2085 2, /* size (0 = byte, 1 = short, 2 = long) */
2086 32, /* bitsize */
2087 FALSE, /* pc_relative */
2088 0, /* bitpos */
2089 complain_overflow_dont,/* complain_on_overflow */
2090 nds32_elf_ignore_reloc,/* special_function */
2091 "R_NDS32_PTR_COUNT", /* name */
2092 FALSE, /* partial_inplace */
2093 0xffffffff, /* src_mask */
2094 0xffffffff, /* dst_mask */
2095 FALSE), /* pcrel_offset */
2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_PTR_RESOLVED",/* name */
2105 FALSE, /* partial_inplace */
2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
2108 FALSE), /* pcrel_offset */
2109 HOWTO (R_NDS32_PLTBLOCK, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
2113 FALSE, /* pc_relative */
2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_PLTBLOCK", /* name */
2118 FALSE, /* partial_inplace */
2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
2121 FALSE), /* pcrel_offset */
2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
2126 FALSE, /* pc_relative */
2127 0, /* bitpos */
2128 complain_overflow_dont,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2131 FALSE, /* partial_inplace */
2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
2134 FALSE), /* pcrel_offset */
2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
2139 FALSE, /* pc_relative */
2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_RELAX_REGION_END", /* name */
2144 FALSE, /* partial_inplace */
2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
2147 FALSE), /* pcrel_offset */
2148 HOWTO (R_NDS32_MINUEND, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
2152 FALSE, /* pc_relative */
2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MINUEND", /* name */
2157 FALSE, /* partial_inplace */
2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
2160 FALSE), /* pcrel_offset */
2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
2165 FALSE, /* pc_relative */
2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_SUBTRAHEND", /* name */
2170 FALSE, /* partial_inplace */
2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
2173 FALSE), /* pcrel_offset */
2174 HOWTO (R_NDS32_DIFF8, /* type */
2175 0, /* rightshift */
2176 0, /* size (0 = byte, 1 = short, 2 = long) */
2177 8, /* bitsize */
2178 FALSE, /* pc_relative */
2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_DIFF8", /* name */
2183 FALSE, /* partial_inplace */
2184 0x000000ff, /* src_mask */
2185 0x000000ff, /* dst_mask */
2186 FALSE), /* pcrel_offset */
2187 HOWTO (R_NDS32_DIFF16, /* type */
2188 0, /* rightshift */
2189 1, /* size (0 = byte, 1 = short, 2 = long) */
2190 16, /* bitsize */
2191 FALSE, /* pc_relative */
2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_DIFF16", /* name */
2196 FALSE, /* partial_inplace */
2197 0x0000ffff, /* src_mask */
2198 0x0000ffff, /* dst_mask */
2199 FALSE), /* pcrel_offset */
2200 HOWTO (R_NDS32_DIFF32, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
2204 FALSE, /* pc_relative */
2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_DIFF32", /* name */
2209 FALSE, /* partial_inplace */
2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
2212 FALSE), /* pcrel_offset */
2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2214 0, /* rightshift */
2215 0, /* size (0 = byte, 1 = short, 2 = long) */
2216 0, /* bitsize */
2217 FALSE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_DIFF_ULEB128",/* name */
2222 FALSE, /* partial_inplace */
2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
2225 FALSE), /* pcrel_offset */
2226 HOWTO (R_NDS32_DATA, /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_DATA", /* name */
2235 FALSE, /* partial_inplace */
2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239 HOWTO (R_NDS32_TRAN, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
2243 FALSE, /* pc_relative */
2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_TRAN", /* name */
2248 FALSE, /* partial_inplace */
2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
2251 FALSE), /* pcrel_offset */
2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
2256 FALSE, /* pc_relative */
2257 0, /* bitpos */
2258 complain_overflow_dont, /* complain_on_overflow */
2259 nds32_elf_ignore_reloc, /* special_function */
2260 "R_NDS32_TLS_LE_ADD", /* name */
2261 FALSE, /* partial_inplace */
2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
2264 FALSE), /* pcrel_offset */
2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2266 0, /* rightshift */
2267 2, /* size (0 = byte, 1 = short, 2 = long) */
2268 32, /* bitsize */
2269 FALSE, /* pc_relative */
2270 0, /* bitpos */
2271 complain_overflow_dont, /* complain_on_overflow */
2272 nds32_elf_ignore_reloc, /* special_function */
2273 "R_NDS32_TLS_LE_LS", /* name */
2274 FALSE, /* partial_inplace */
2275 0xffffffff, /* src_mask */
2276 0xffffffff, /* dst_mask */
2277 FALSE), /* pcrel_offset */
2278 HOWTO (R_NDS32_EMPTY, /* type */
2279 0, /* rightshift */
2280 2, /* size (0 = byte, 1 = short, 2 = long) */
2281 32, /* bitsize */
2282 FALSE, /* pc_relative */
2283 0, /* bitpos */
2284 complain_overflow_dont, /* complain_on_overflow */
2285 nds32_elf_ignore_reloc, /* special_function */
2286 "R_NDS32_EMPTY", /* name */
2287 FALSE, /* partial_inplace */
2288 0xffffffff, /* src_mask */
2289 0xffffffff, /* dst_mask */
2290 FALSE), /* pcrel_offset */
2291 };
2292
2293 \f
2294 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
2295 This prototype is the same as qsort (). */
2296
2297 void
2298 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2299 int (*compar) (const void *lhs, const void *rhs))
2300 {
2301 char *ptr = (char *) base;
2302 int i, j;
2303 char *tmp = alloca (size);
2304
2305 /* If i is less than j, i is inserted before j.
2306
2307 |---- j ----- i --------------|
2308 \ / \ /
2309 sorted unsorted
2310 */
2311
2312 for (i = 1; i < (int) nmemb; i++)
2313 {
2314 for (j = (i - 1); j >= 0; j--)
2315 if (compar (ptr + i * size, ptr + j * size) >= 0)
2316 break;
2317
2318 j++;
2319
2320 if (i == j)
2321 continue; /* i is in order. */
2322
2323 memcpy (tmp, ptr + i * size, size);
2324 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2325 memcpy (ptr + j * size, tmp, size);
2326 }
2327 }
2328
2329 /* Sort relocation by r_offset.
2330
2331 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2332 algorithm. Relocations at the same r_offset must keep their order.
2333 For example, RELAX_ENTRY must be the very first relocation entry.
2334
2335 Currently, this function implements insertion-sort.
2336
2337 FIXME: If we already sort them in assembler, why bother sort them
2338 here again? */
2339
2340 static int
2341 compar_reloc (const void *lhs, const void *rhs)
2342 {
2343 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2344 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2345
2346 if (l->r_offset > r->r_offset)
2347 return 1;
2348 else if (l->r_offset == r->r_offset)
2349 return 0;
2350 else
2351 return -1;
2352 }
2353
2354 /* Functions listed below are only used for old relocs.
2355 * nds32_elf_9_pcrel_reloc
2356 * nds32_elf_do_9_pcrel_reloc
2357 * nds32_elf_hi20_reloc
2358 * nds32_elf_relocate_hi20
2359 * nds32_elf_lo12_reloc
2360 * nds32_elf_sda15_reloc
2361 * nds32_elf_generic_reloc
2362 */
2363
2364 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2365
2366 static bfd_reloc_status_type
2367 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2368 void *data, asection *input_section, bfd *output_bfd,
2369 char **error_message ATTRIBUTE_UNUSED)
2370 {
2371 /* This part is from bfd_elf_generic_reloc. */
2372 if (output_bfd != (bfd *) NULL
2373 && (symbol->flags & BSF_SECTION_SYM) == 0
2374 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2375 {
2376 reloc_entry->address += input_section->output_offset;
2377 return bfd_reloc_ok;
2378 }
2379
2380 if (output_bfd != NULL)
2381 {
2382 /* FIXME: See bfd_perform_relocation. Is this right? */
2383 return bfd_reloc_continue;
2384 }
2385
2386 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2387 input_section,
2388 data, reloc_entry->address,
2389 symbol->section,
2390 (symbol->value
2391 + symbol->section->output_section->vma
2392 + symbol->section->output_offset),
2393 reloc_entry->addend);
2394 }
2395
2396 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2397 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2398
2399 static bfd_reloc_status_type
2400 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2401 asection *input_section, bfd_byte *data,
2402 bfd_vma offset,
2403 asection *symbol_section ATTRIBUTE_UNUSED,
2404 bfd_vma symbol_value, bfd_vma addend)
2405 {
2406 bfd_signed_vma relocation;
2407 unsigned short x;
2408 bfd_reloc_status_type status;
2409
2410 /* Sanity check the address (offset in section). */
2411 if (offset > bfd_get_section_limit (abfd, input_section))
2412 return bfd_reloc_outofrange;
2413
2414 relocation = symbol_value + addend;
2415 /* Make it pc relative. */
2416 relocation -= (input_section->output_section->vma
2417 + input_section->output_offset);
2418 /* These jumps mask off the lower two bits of the current address
2419 before doing pcrel calculations. */
2420 relocation -= (offset & -(bfd_vma) 2);
2421
2422 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2423 status = bfd_reloc_overflow;
2424 else
2425 status = bfd_reloc_ok;
2426
2427 x = bfd_getb16 (data + offset);
2428
2429 relocation >>= howto->rightshift;
2430 relocation <<= howto->bitpos;
2431 x = (x & ~howto->dst_mask)
2432 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2433
2434 bfd_putb16 ((bfd_vma) x, data + offset);
2435
2436 return status;
2437 }
2438
2439 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2440 HI20_SLO is for the add3 and load/store with displacement instructions.
2441 HI20 is for the or3 instruction.
2442 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2443 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2444 we must add one to the high 16 bytes (which will get subtracted off when
2445 the low 16 bits are added).
2446 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2447 because there is a carry from the LO12 to the HI20. Here we just save
2448 the information we need; we do the actual relocation when we see the LO12.
2449 This code is copied from the elf32-mips.c. We also support an arbitrary
2450 number of HI20 relocs to be associated with a single LO12 reloc. The
2451 assembler sorts the relocs to ensure each HI20 immediately precedes its
2452 LO12. However if there are multiple copies, the assembler may not find
2453 the real LO12 so it picks the first one it finds. */
2454
2455 struct nds32_hi20
2456 {
2457 struct nds32_hi20 *next;
2458 bfd_byte *addr;
2459 bfd_vma addend;
2460 };
2461
2462 static struct nds32_hi20 *nds32_hi20_list;
2463
2464 static bfd_reloc_status_type
2465 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2466 asymbol *symbol, void *data, asection *input_section,
2467 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2468 {
2469 bfd_reloc_status_type ret;
2470 bfd_vma relocation;
2471 struct nds32_hi20 *n;
2472
2473 /* This part is from bfd_elf_generic_reloc.
2474 If we're relocating, and this an external symbol, we don't want
2475 to change anything. */
2476 if (output_bfd != (bfd *) NULL
2477 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2478 {
2479 reloc_entry->address += input_section->output_offset;
2480 return bfd_reloc_ok;
2481 }
2482
2483 /* Sanity check the address (offset in section). */
2484 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2485 return bfd_reloc_outofrange;
2486
2487 ret = bfd_reloc_ok;
2488 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2489 ret = bfd_reloc_undefined;
2490
2491 if (bfd_is_com_section (symbol->section))
2492 relocation = 0;
2493 else
2494 relocation = symbol->value;
2495
2496 relocation += symbol->section->output_section->vma;
2497 relocation += symbol->section->output_offset;
2498 relocation += reloc_entry->addend;
2499
2500 /* Save the information, and let LO12 do the actual relocation. */
2501 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2502 if (n == NULL)
2503 return bfd_reloc_outofrange;
2504
2505 n->addr = (bfd_byte *) data + reloc_entry->address;
2506 n->addend = relocation;
2507 n->next = nds32_hi20_list;
2508 nds32_hi20_list = n;
2509
2510 if (output_bfd != (bfd *) NULL)
2511 reloc_entry->address += input_section->output_offset;
2512
2513 return ret;
2514 }
2515
2516 /* Handle an NDS32 ELF HI20 reloc. */
2517
2518 static void
2519 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2520 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2521 Elf_Internal_Rela *rello, bfd_byte *contents,
2522 bfd_vma addend)
2523 {
2524 unsigned long insn;
2525 bfd_vma addlo;
2526
2527 insn = bfd_getb32 (contents + relhi->r_offset);
2528
2529 addlo = bfd_getb32 (contents + rello->r_offset);
2530 addlo &= 0xfff;
2531
2532 addend += ((insn & 0xfffff) << 20) + addlo;
2533
2534 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2535 bfd_putb32 (insn, contents + relhi->r_offset);
2536 }
2537
2538 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2539 inplace relocation; this function exists in order to do the
2540 R_NDS32_HI20_[SU]LO relocation described above. */
2541
2542 static bfd_reloc_status_type
2543 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2544 void *data, asection *input_section, bfd *output_bfd,
2545 char **error_message)
2546 {
2547 /* This part is from bfd_elf_generic_reloc.
2548 If we're relocating, and this an external symbol, we don't want
2549 to change anything. */
2550 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2551 && reloc_entry->addend == 0)
2552 {
2553 reloc_entry->address += input_section->output_offset;
2554 return bfd_reloc_ok;
2555 }
2556
2557 if (nds32_hi20_list != NULL)
2558 {
2559 struct nds32_hi20 *l;
2560
2561 l = nds32_hi20_list;
2562 while (l != NULL)
2563 {
2564 unsigned long insn;
2565 unsigned long val;
2566 unsigned long vallo;
2567 struct nds32_hi20 *next;
2568
2569 /* Do the HI20 relocation. Note that we actually don't need
2570 to know anything about the LO12 itself, except where to
2571 find the low 12 bits of the addend needed by the LO12. */
2572 insn = bfd_getb32 (l->addr);
2573 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2574 vallo &= 0xfff;
2575 switch (reloc_entry->howto->type)
2576 {
2577 case R_NDS32_LO12S3:
2578 vallo <<= 3;
2579 break;
2580
2581 case R_NDS32_LO12S2:
2582 vallo <<= 2;
2583 break;
2584
2585 case R_NDS32_LO12S1:
2586 vallo <<= 1;
2587 break;
2588
2589 case R_NDS32_LO12S0:
2590 vallo <<= 0;
2591 break;
2592 }
2593
2594 val = ((insn & 0xfffff) << 12) + vallo;
2595 val += l->addend;
2596
2597 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2598 bfd_putb32 ((bfd_vma) insn, l->addr);
2599
2600 next = l->next;
2601 free (l);
2602 l = next;
2603 }
2604
2605 nds32_hi20_list = NULL;
2606 }
2607
2608 /* Now do the LO12 reloc in the usual way.
2609 ??? It would be nice to call bfd_elf_generic_reloc here,
2610 but we have partial_inplace set. bfd_elf_generic_reloc will
2611 pass the handling back to bfd_install_relocation which will install
2612 a section relative addend which is wrong. */
2613 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2614 input_section, output_bfd, error_message);
2615 }
2616
2617 /* Do generic partial_inplace relocation.
2618 This is a local replacement for bfd_elf_generic_reloc. */
2619
2620 static bfd_reloc_status_type
2621 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2622 asymbol *symbol, void *data, asection *input_section,
2623 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2624 {
2625 bfd_reloc_status_type ret;
2626 bfd_vma relocation;
2627 bfd_byte *inplace_address;
2628
2629 /* This part is from bfd_elf_generic_reloc.
2630 If we're relocating, and this an external symbol, we don't want
2631 to change anything. */
2632 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2633 && reloc_entry->addend == 0)
2634 {
2635 reloc_entry->address += input_section->output_offset;
2636 return bfd_reloc_ok;
2637 }
2638
2639 /* Now do the reloc in the usual way.
2640 ??? It would be nice to call bfd_elf_generic_reloc here,
2641 but we have partial_inplace set. bfd_elf_generic_reloc will
2642 pass the handling back to bfd_install_relocation which will install
2643 a section relative addend which is wrong. */
2644
2645 /* Sanity check the address (offset in section). */
2646 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2647 return bfd_reloc_outofrange;
2648
2649 ret = bfd_reloc_ok;
2650 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2651 ret = bfd_reloc_undefined;
2652
2653 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2654 relocation = 0;
2655 else
2656 relocation = symbol->value;
2657
2658 /* Only do this for a final link. */
2659 if (output_bfd == (bfd *) NULL)
2660 {
2661 relocation += symbol->section->output_section->vma;
2662 relocation += symbol->section->output_offset;
2663 }
2664
2665 relocation += reloc_entry->addend;
2666 switch (reloc_entry->howto->type)
2667 {
2668 case R_NDS32_LO12S3:
2669 relocation >>= 3;
2670 break;
2671
2672 case R_NDS32_LO12S2:
2673 relocation >>= 2;
2674 break;
2675
2676 case R_NDS32_LO12S1:
2677 relocation >>= 1;
2678 break;
2679
2680 case R_NDS32_LO12S0:
2681 default:
2682 relocation >>= 0;
2683 break;
2684 }
2685
2686 inplace_address = (bfd_byte *) data + reloc_entry->address;
2687
2688 #define DOIT(x) \
2689 x = ((x & ~reloc_entry->howto->dst_mask) | \
2690 (((x & reloc_entry->howto->src_mask) + relocation) & \
2691 reloc_entry->howto->dst_mask))
2692
2693 switch (reloc_entry->howto->size)
2694 {
2695 case 1:
2696 {
2697 short x = bfd_getb16 (inplace_address);
2698
2699 DOIT (x);
2700 bfd_putb16 ((bfd_vma) x, inplace_address);
2701 }
2702 break;
2703 case 2:
2704 {
2705 unsigned long x = bfd_getb32 (inplace_address);
2706
2707 DOIT (x);
2708 bfd_putb32 ((bfd_vma) x, inplace_address);
2709 }
2710 break;
2711 default:
2712 BFD_ASSERT (0);
2713 }
2714
2715 if (output_bfd != (bfd *) NULL)
2716 reloc_entry->address += input_section->output_offset;
2717
2718 return ret;
2719 }
2720
2721 /* Handle the R_NDS32_SDA15 reloc.
2722 This reloc is used to compute the address of objects in the small data area
2723 and to perform loads and stores from that area.
2724 The lower 15 bits are sign extended and added to the register specified
2725 in the instruction, which is assumed to point to _SDA_BASE_.
2726
2727 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2728 the access size, this must be taken care of. */
2729
2730 static bfd_reloc_status_type
2731 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2732 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2733 asection *input_section, bfd *output_bfd,
2734 char **error_message ATTRIBUTE_UNUSED)
2735 {
2736 /* This part is from bfd_elf_generic_reloc. */
2737 if (output_bfd != (bfd *) NULL
2738 && (symbol->flags & BSF_SECTION_SYM) == 0
2739 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2740 {
2741 reloc_entry->address += input_section->output_offset;
2742 return bfd_reloc_ok;
2743 }
2744
2745 if (output_bfd != NULL)
2746 {
2747 /* FIXME: See bfd_perform_relocation. Is this right? */
2748 return bfd_reloc_continue;
2749 }
2750
2751 /* FIXME: not sure what to do here yet. But then again, the linker
2752 may never call us. */
2753 abort ();
2754 }
2755
2756 /* nds32_elf_ignore_reloc is the special function for
2757 relocation types which don't need to be relocated
2758 like relaxation relocation types.
2759 This function simply return bfd_reloc_ok when it is
2760 invoked. */
2761
2762 static bfd_reloc_status_type
2763 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2764 asymbol *symbol ATTRIBUTE_UNUSED,
2765 void *data ATTRIBUTE_UNUSED, asection *input_section,
2766 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2767 {
2768 if (output_bfd != NULL)
2769 reloc_entry->address += input_section->output_offset;
2770
2771 return bfd_reloc_ok;
2772 }
2773 \f
2774
2775 /* Map BFD reloc types to NDS32 ELF reloc types. */
2776
2777 struct nds32_reloc_map_entry
2778 {
2779 bfd_reloc_code_real_type bfd_reloc_val;
2780 unsigned char elf_reloc_val;
2781 };
2782
2783 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2784 {
2785 {BFD_RELOC_NONE, R_NDS32_NONE},
2786 {BFD_RELOC_16, R_NDS32_16_RELA},
2787 {BFD_RELOC_32, R_NDS32_32_RELA},
2788 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2789 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2790 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2791 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2793 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2794 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2795 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2796 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2797 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2798 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2799 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2800 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2801 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2802 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2803 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2804 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2805 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2806 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2807 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2808
2809 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2810 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2811 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2812 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2813 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2814 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2815 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2816 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2817 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2818 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2819 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2820 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2821 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2822 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2823 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2824 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2825 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2826 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2827 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2828 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2829 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2830 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2831 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2832 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2833 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2834 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2835 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2836 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2837 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2838 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2839 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2840 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2841 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2842 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2843 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2844 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2845 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2846 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2847 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2848 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2849 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2850 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2855 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2856 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2857 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2859 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2860 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2861 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2862 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2863 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2864 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2867 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2868 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2869 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2870 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2871 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2872 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2873 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2874 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2875 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2876 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2877 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2878 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2879 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2880 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2881 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2882 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2883 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2884
2885 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2886 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2887 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2888 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2889 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2890 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2891 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2892 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2893 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2894 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2895 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2896 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2897 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2898 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2899 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2900 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2901 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2902 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2903 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2904 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2905 };
2906
2907 /* Patch tag. */
2908
2909 static reloc_howto_type *
2910 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2911 const char *r_name)
2912 {
2913 unsigned int i;
2914
2915 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2916 if (nds32_elf_howto_table[i].name != NULL
2917 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2918 return &nds32_elf_howto_table[i];
2919
2920 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2921 if (nds32_elf_relax_howto_table[i].name != NULL
2922 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2923 return &nds32_elf_relax_howto_table[i];
2924
2925 return NULL;
2926 }
2927
2928 static reloc_howto_type *
2929 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2930 {
2931 if (code < R_NDS32_RELAX_ENTRY)
2932 {
2933 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2934 return &nds32_elf_howto_table[code];
2935 }
2936 else
2937 {
2938 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2939 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2940 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2941 }
2942 }
2943
2944 static reloc_howto_type *
2945 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2946 bfd_reloc_code_real_type code)
2947 {
2948 unsigned int i;
2949
2950 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2951 {
2952 if (nds32_reloc_map[i].bfd_reloc_val == code)
2953 return bfd_elf32_bfd_reloc_type_table_lookup
2954 (nds32_reloc_map[i].elf_reloc_val);
2955 }
2956
2957 return NULL;
2958 }
2959
2960 /* Set the howto pointer for an NDS32 ELF reloc. */
2961
2962 static void
2963 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2964 Elf_Internal_Rela *dst)
2965 {
2966 enum elf_nds32_reloc_type r_type;
2967
2968 r_type = ELF32_R_TYPE (dst->r_info);
2969 if (r_type > R_NDS32_GNU_VTENTRY)
2970 {
2971 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
2972 r_type = 0;
2973 }
2974 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2975 }
2976
2977 static void
2978 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2979 Elf_Internal_Rela *dst)
2980 {
2981 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2982 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2983 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2984 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2985 }
2986
2987 /* Support for core dump NOTE sections.
2988 Reference to include/linux/elfcore.h in Linux. */
2989
2990 static bfd_boolean
2991 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2992 {
2993 int offset;
2994 size_t size;
2995
2996 switch (note->descsz)
2997 {
2998 case 0x114:
2999 /* Linux/NDS32 32-bit, ABI1 */
3000
3001 /* pr_cursig */
3002 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3003
3004 /* pr_pid */
3005 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3006
3007 /* pr_reg */
3008 offset = 72;
3009 size = 200;
3010 break;
3011
3012 case 0xfc:
3013 /* Linux/NDS32 32-bit */
3014
3015 /* pr_cursig */
3016 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3017
3018 /* pr_pid */
3019 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3020
3021 /* pr_reg */
3022 offset = 72;
3023 size = 176;
3024 break;
3025
3026 default:
3027 return FALSE;
3028 }
3029
3030 /* Make a ".reg" section. */
3031 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3032 size, note->descpos + offset);
3033 }
3034
3035 static bfd_boolean
3036 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3037 {
3038 switch (note->descsz)
3039 {
3040 case 124:
3041 /* Linux/NDS32 */
3042
3043 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3044 elf_tdata (abfd)->core->program =
3045 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3046 elf_tdata (abfd)->core->command =
3047 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3048
3049 default:
3050 return FALSE;
3051 }
3052
3053 /* Note that for some reason, a spurious space is tacked
3054 onto the end of the args in some (at least one anyway)
3055 implementations, so strip it off if it exists. */
3056 {
3057 char *command = elf_tdata (abfd)->core->command;
3058 int n = strlen (command);
3059
3060 if (0 < n && command[n - 1] == ' ')
3061 command[n - 1] = '\0';
3062 }
3063
3064 return TRUE;
3065 }
3066
3067 /* Hook called by the linker routine which adds symbols from an object
3068 file. We must handle the special NDS32 section numbers here.
3069 We also keep watching for whether we need to create the sdata special
3070 linker sections. */
3071
3072 static bfd_boolean
3073 nds32_elf_add_symbol_hook (bfd *abfd,
3074 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3075 Elf_Internal_Sym *sym,
3076 const char **namep ATTRIBUTE_UNUSED,
3077 flagword *flagsp ATTRIBUTE_UNUSED,
3078 asection **secp, bfd_vma *valp)
3079 {
3080 switch (sym->st_shndx)
3081 {
3082 case SHN_COMMON:
3083 /* Common symbols less than the GP size are automatically
3084 treated as SHN_MIPS_SCOMMON symbols. */
3085 if (sym->st_size > elf_gp_size (abfd)
3086 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3087 break;
3088
3089 /* st_value is the alignemnt constraint.
3090 That might be its actual size if it is an array or structure. */
3091 switch (sym->st_value)
3092 {
3093 case 1:
3094 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3095 break;
3096 case 2:
3097 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3098 break;
3099 case 4:
3100 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3101 break;
3102 case 8:
3103 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3104 break;
3105 default:
3106 return TRUE;
3107 }
3108
3109 (*secp)->flags |= SEC_IS_COMMON;
3110 *valp = sym->st_size;
3111 break;
3112 }
3113
3114 return TRUE;
3115 }
3116
3117
3118 /* This function can figure out the best location for a base register to access
3119 data relative to this base register
3120 INPUT:
3121 sda_d0: size of first DOUBLE WORD data section
3122 sda_w0: size of first WORD data section
3123 sda_h0: size of first HALF WORD data section
3124 sda_b : size of BYTE data section
3125 sda_hi: size of second HALF WORD data section
3126 sda_w1: size of second WORD data section
3127 sda_d1: size of second DOUBLE WORD data section
3128 OUTPUT:
3129 offset (always positive) from the beginning of sda_d0 if OK
3130 a negative error value if fail
3131 NOTE:
3132 these 7 sections have to be located back to back if exist
3133 a pass in 0 value for non-existing section */
3134
3135 /* Due to the interpretation of simm15 field of load/store depending on
3136 data accessing size, the organization of base register relative data shall
3137 like the following figure
3138 -------------------------------------------
3139 | DOUBLE WORD sized data (range +/- 128K)
3140 -------------------------------------------
3141 | WORD sized data (range +/- 64K)
3142 -------------------------------------------
3143 | HALF WORD sized data (range +/- 32K)
3144 -------------------------------------------
3145 | BYTE sized data (range +/- 16K)
3146 -------------------------------------------
3147 | HALF WORD sized data (range +/- 32K)
3148 -------------------------------------------
3149 | WORD sized data (range +/- 64K)
3150 -------------------------------------------
3151 | DOUBLE WORD sized data (range +/- 128K)
3152 -------------------------------------------
3153 Its base register shall be set to access these data freely. */
3154
3155 /* We have to figure out the SDA_BASE value, so that we can adjust the
3156 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3157 BFD. If we can't find it, we're stuck. We cache it in the ELF
3158 target data. We don't need to adjust the symbol value for an
3159 external symbol if we are producing relocatable output. */
3160
3161 static asection *sda_rela_sec = NULL;
3162
3163 #define SDA_SECTION_NUM 10
3164
3165 static bfd_reloc_status_type
3166 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3167 bfd_vma *psb, bfd_boolean add_symbol)
3168 {
3169 int relax_fp_as_gp;
3170 struct elf_nds32_link_hash_table *table;
3171 struct bfd_link_hash_entry *h, *h2;
3172 long unsigned int total = 0;
3173
3174 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3175 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3176 {
3177 asection *first = NULL, *final = NULL, *temp;
3178 bfd_vma sda_base;
3179 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3180 4 byte-aligned. Therefore, it has to set the first section ".data"
3181 4 byte-aligned. */
3182 static const char sec_name[SDA_SECTION_NUM][10] =
3183 {
3184 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3185 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3186 };
3187 size_t i = 0;
3188
3189 if (output_bfd->sections == NULL)
3190 {
3191 *psb = elf_gp (output_bfd);
3192 return bfd_reloc_ok;
3193 }
3194
3195 /* Get the first and final section. */
3196 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3197 {
3198 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3199 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3200 first = temp;
3201 if (temp && (temp->size != 0 || temp->rawsize != 0))
3202 final = temp;
3203
3204 /* Summarize the sections in order to check if joining .bss. */
3205 if (temp && temp->size != 0)
3206 total += temp->size;
3207 else if (temp && temp->rawsize != 0)
3208 total += temp->rawsize;
3209
3210 i++;
3211 }
3212
3213 /* Check .bss size. */
3214 temp = bfd_get_section_by_name (output_bfd, ".bss");
3215 if (temp)
3216 {
3217 if (temp->size != 0)
3218 total += temp->size;
3219 else if (temp->rawsize != 0)
3220 total += temp->rawsize;
3221
3222 if (total < 0x80000)
3223 {
3224 if (!first && (temp->size != 0 || temp->rawsize != 0))
3225 first = temp;
3226 if ((temp->size != 0 || temp->rawsize != 0))
3227 final = temp;
3228 }
3229 }
3230
3231 if (first && final)
3232 {
3233 /* The middle of data region. */
3234 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3235
3236 /* Find the section sda_base located. */
3237 i = 0;
3238 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3239 {
3240 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3241 if (final && (final->size != 0 || final->rawsize != 0)
3242 && sda_base >= final->vma)
3243 {
3244 first = final;
3245 i++;
3246 }
3247 else
3248 break;
3249 }
3250 }
3251 else
3252 {
3253 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3254 first output section. */
3255 first = output_bfd->sections;
3256 while (first && first->size == 0 && first->rawsize == 0)
3257 first = first->next;
3258 if (!first)
3259 {
3260 *psb = elf_gp (output_bfd);
3261 return bfd_reloc_ok;
3262 }
3263 sda_base = first->vma + first->rawsize;
3264 }
3265
3266 sda_base -= first->vma;
3267 sda_base = sda_base & (~7);
3268
3269 if (!_bfd_generic_link_add_one_symbol
3270 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3271 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3272 get_elf_backend_data (output_bfd)->collect, &h))
3273 return FALSE;
3274
3275 sda_rela_sec = first;
3276
3277 table = nds32_elf_hash_table (info);
3278 relax_fp_as_gp = table->relax_fp_as_gp;
3279 if (relax_fp_as_gp)
3280 {
3281 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3282 FALSE, FALSE, FALSE);
3283 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3284 And set FP equal to SDA_BASE to do relaxation for
3285 la $fp, _FP_BASE_. */
3286 if (!_bfd_generic_link_add_one_symbol
3287 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3288 first, (bfd_vma) sda_base, (const char *) NULL,
3289 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3290 return FALSE;
3291 }
3292 }
3293
3294 if (add_symbol == TRUE)
3295 {
3296 if (h)
3297 {
3298 /* Now set gp. */
3299 elf_gp (output_bfd) = (h->u.def.value
3300 + h->u.def.section->output_section->vma
3301 + h->u.def.section->output_offset);
3302 }
3303 else
3304 {
3305 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3306 return bfd_reloc_dangerous;
3307 }
3308 }
3309
3310 *psb = h->u.def.value + h->u.def.section->output_section->vma
3311 + h->u.def.section->output_offset;
3312 return bfd_reloc_ok;
3313 }
3314 \f
3315
3316 /* Return size of a PLT entry. */
3317 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3318
3319
3320 /* Create an entry in an nds32 ELF linker hash table. */
3321
3322 static struct bfd_hash_entry *
3323 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3324 struct bfd_hash_table *table,
3325 const char *string)
3326 {
3327 struct elf_nds32_link_hash_entry *ret;
3328
3329 ret = (struct elf_nds32_link_hash_entry *) entry;
3330
3331 /* Allocate the structure if it has not already been allocated by a
3332 subclass. */
3333 if (ret == NULL)
3334 ret = (struct elf_nds32_link_hash_entry *)
3335 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3336
3337 if (ret == NULL)
3338 return (struct bfd_hash_entry *) ret;
3339
3340 /* Call the allocation method of the superclass. */
3341 ret = (struct elf_nds32_link_hash_entry *)
3342 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3343
3344 if (ret != NULL)
3345 {
3346 struct elf_nds32_link_hash_entry *eh;
3347
3348 eh = (struct elf_nds32_link_hash_entry *) ret;
3349 eh->dyn_relocs = NULL;
3350 eh->tls_type = GOT_UNKNOWN;
3351 }
3352
3353 return (struct bfd_hash_entry *) ret;
3354 }
3355
3356 /* Create an nds32 ELF linker hash table. */
3357
3358 static struct bfd_link_hash_table *
3359 nds32_elf_link_hash_table_create (bfd *abfd)
3360 {
3361 struct elf_nds32_link_hash_table *ret;
3362
3363 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3364
3365 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3366 if (ret == NULL)
3367 return NULL;
3368
3369 /* patch tag. */
3370 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3371 nds32_elf_link_hash_newfunc,
3372 sizeof (struct elf_nds32_link_hash_entry),
3373 NDS32_ELF_DATA))
3374 {
3375 free (ret);
3376 return NULL;
3377 }
3378
3379 ret->sgot = NULL;
3380 ret->sgotplt = NULL;
3381 ret->srelgot = NULL;
3382 ret->splt = NULL;
3383 ret->srelplt = NULL;
3384 ret->sdynbss = NULL;
3385 ret->srelbss = NULL;
3386 ret->sym_ld_script = NULL;
3387 ret->ex9_export_file = NULL;
3388 ret->ex9_import_file = NULL;
3389
3390 return &ret->root.root;
3391 }
3392
3393 /* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3394 shortcuts to them in our hash table. */
3395
3396 static bfd_boolean
3397 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3398 {
3399 struct elf_nds32_link_hash_table *htab;
3400
3401 if (!_bfd_elf_create_got_section (dynobj, info))
3402 return FALSE;
3403
3404 htab = nds32_elf_hash_table (info);
3405 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3406 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3407 if (!htab->sgot || !htab->sgotplt)
3408 abort ();
3409
3410 /* _bfd_elf_create_got_section will create it for us. */
3411 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3412 if (htab->srelgot == NULL
3413 || !bfd_set_section_flags (dynobj, htab->srelgot,
3414 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3415 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3416 | SEC_READONLY))
3417 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3418 return FALSE;
3419
3420 return TRUE;
3421 }
3422
3423 /* Create dynamic sections when linking against a dynamic object. */
3424
3425 static bfd_boolean
3426 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3427 {
3428 struct elf_nds32_link_hash_table *htab;
3429 flagword flags, pltflags;
3430 register asection *s;
3431 const struct elf_backend_data *bed;
3432 int ptralign = 2; /* 32-bit */
3433
3434 bed = get_elf_backend_data (abfd);
3435
3436 htab = nds32_elf_hash_table (info);
3437
3438 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3439 .rel[a].bss sections. */
3440
3441 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3442 | SEC_LINKER_CREATED);
3443
3444 pltflags = flags;
3445 pltflags |= SEC_CODE;
3446 if (bed->plt_not_loaded)
3447 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3448 if (bed->plt_readonly)
3449 pltflags |= SEC_READONLY;
3450
3451 s = bfd_make_section (abfd, ".plt");
3452 htab->splt = s;
3453 if (s == NULL
3454 || !bfd_set_section_flags (abfd, s, pltflags)
3455 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3456 return FALSE;
3457
3458 if (bed->want_plt_sym)
3459 {
3460 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3461 .plt section. */
3462 struct bfd_link_hash_entry *bh = NULL;
3463 struct elf_link_hash_entry *h;
3464
3465 if (!(_bfd_generic_link_add_one_symbol
3466 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3467 (bfd_vma) 0, (const char *) NULL, FALSE,
3468 get_elf_backend_data (abfd)->collect, &bh)))
3469 return FALSE;
3470
3471 h = (struct elf_link_hash_entry *) bh;
3472 h->def_regular = 1;
3473 h->type = STT_OBJECT;
3474
3475 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
3476 return FALSE;
3477 }
3478
3479 s = bfd_make_section (abfd,
3480 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3481 htab->srelplt = s;
3482 if (s == NULL
3483 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3484 || !bfd_set_section_alignment (abfd, s, ptralign))
3485 return FALSE;
3486
3487 if (htab->sgot == NULL && !create_got_section (abfd, info))
3488 return FALSE;
3489
3490 {
3491 const char *secname;
3492 char *relname;
3493 flagword secflags;
3494 asection *sec;
3495
3496 for (sec = abfd->sections; sec; sec = sec->next)
3497 {
3498 secflags = bfd_get_section_flags (abfd, sec);
3499 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3500 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3501 continue;
3502 secname = bfd_get_section_name (abfd, sec);
3503 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3504 strcpy (relname, ".rela");
3505 strcat (relname, secname);
3506 if (bfd_get_section_by_name (abfd, secname))
3507 continue;
3508 s = bfd_make_section (abfd, relname);
3509 if (s == NULL
3510 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3511 || !bfd_set_section_alignment (abfd, s, ptralign))
3512 return FALSE;
3513 }
3514 }
3515
3516 if (bed->want_dynbss)
3517 {
3518 /* The .dynbss section is a place to put symbols which are defined
3519 by dynamic objects, are referenced by regular objects, and are
3520 not functions. We must allocate space for them in the process
3521 image and use a R_*_COPY reloc to tell the dynamic linker to
3522 initialize them at run time. The linker script puts the .dynbss
3523 section into the .bss section of the final image. */
3524 s = bfd_make_section (abfd, ".dynbss");
3525 htab->sdynbss = s;
3526 if (s == NULL
3527 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3528 return FALSE;
3529 /* The .rel[a].bss section holds copy relocs. This section is not
3530 normally needed. We need to create it here, though, so that the
3531 linker will map it to an output section. We can't just create it
3532 only if we need it, because we will not know whether we need it
3533 until we have seen all the input files, and the first time the
3534 main linker code calls BFD after examining all the input files
3535 (size_dynamic_sections) the input sections have already been
3536 mapped to the output sections. If the section turns out not to
3537 be needed, we can discard it later. We will never need this
3538 section when generating a shared object, since they do not use
3539 copy relocs. */
3540 if (!bfd_link_pic (info))
3541 {
3542 s = bfd_make_section (abfd, (bed->default_use_rela_p
3543 ? ".rela.bss" : ".rel.bss"));
3544 htab->srelbss = s;
3545 if (s == NULL
3546 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3547 || !bfd_set_section_alignment (abfd, s, ptralign))
3548 return FALSE;
3549 }
3550 }
3551
3552 return TRUE;
3553 }
3554
3555 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3556 static void
3557 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3558 struct elf_link_hash_entry *dir,
3559 struct elf_link_hash_entry *ind)
3560 {
3561 struct elf_nds32_link_hash_entry *edir, *eind;
3562
3563 edir = (struct elf_nds32_link_hash_entry *) dir;
3564 eind = (struct elf_nds32_link_hash_entry *) ind;
3565
3566 if (eind->dyn_relocs != NULL)
3567 {
3568 if (edir->dyn_relocs != NULL)
3569 {
3570 struct elf_nds32_dyn_relocs **pp;
3571 struct elf_nds32_dyn_relocs *p;
3572
3573 if (ind->root.type == bfd_link_hash_indirect)
3574 abort ();
3575
3576 /* Add reloc counts against the weak sym to the strong sym
3577 list. Merge any entries against the same section. */
3578 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3579 {
3580 struct elf_nds32_dyn_relocs *q;
3581
3582 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3583 if (q->sec == p->sec)
3584 {
3585 q->pc_count += p->pc_count;
3586 q->count += p->count;
3587 *pp = p->next;
3588 break;
3589 }
3590 if (q == NULL)
3591 pp = &p->next;
3592 }
3593 *pp = edir->dyn_relocs;
3594 }
3595
3596 edir->dyn_relocs = eind->dyn_relocs;
3597 eind->dyn_relocs = NULL;
3598 }
3599
3600 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3601 }
3602 \f
3603
3604 /* Adjust a symbol defined by a dynamic object and referenced by a
3605 regular object. The current definition is in some section of the
3606 dynamic object, but we're not including those sections. We have to
3607 change the definition to something the rest of the link can
3608 understand. */
3609
3610 static bfd_boolean
3611 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3612 struct elf_link_hash_entry *h)
3613 {
3614 struct elf_nds32_link_hash_table *htab;
3615 struct elf_nds32_link_hash_entry *eh;
3616 struct elf_nds32_dyn_relocs *p;
3617 bfd *dynobj;
3618 asection *s;
3619 unsigned int power_of_two;
3620
3621 dynobj = elf_hash_table (info)->dynobj;
3622
3623 /* Make sure we know what is going on here. */
3624 BFD_ASSERT (dynobj != NULL
3625 && (h->needs_plt
3626 || h->u.weakdef != NULL
3627 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3628
3629
3630 /* If this is a function, put it in the procedure linkage table. We
3631 will fill in the contents of the procedure linkage table later,
3632 when we know the address of the .got section. */
3633 if (h->type == STT_FUNC || h->needs_plt)
3634 {
3635 if (!bfd_link_pic (info)
3636 && !h->def_dynamic
3637 && !h->ref_dynamic
3638 && h->root.type != bfd_link_hash_undefweak
3639 && h->root.type != bfd_link_hash_undefined)
3640 {
3641 /* This case can occur if we saw a PLT reloc in an input
3642 file, but the symbol was never referred to by a dynamic
3643 object. In such a case, we don't actually need to build
3644 a procedure linkage table, and we can just do a PCREL
3645 reloc instead. */
3646 h->plt.offset = (bfd_vma) - 1;
3647 h->needs_plt = 0;
3648 }
3649
3650 return TRUE;
3651 }
3652 else
3653 h->plt.offset = (bfd_vma) - 1;
3654
3655 /* If this is a weak symbol, and there is a real definition, the
3656 processor independent code will have arranged for us to see the
3657 real definition first, and we can just use the same value. */
3658 if (h->u.weakdef != NULL)
3659 {
3660 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3661 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3662 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3663 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3664 return TRUE;
3665 }
3666
3667 /* This is a reference to a symbol defined by a dynamic object which
3668 is not a function. */
3669
3670 /* If we are creating a shared library, we must presume that the
3671 only references to the symbol are via the global offset table.
3672 For such cases we need not do anything here; the relocations will
3673 be handled correctly by relocate_section. */
3674 if (bfd_link_pic (info))
3675 return TRUE;
3676
3677 /* If there are no references to this symbol that do not use the
3678 GOT, we don't need to generate a copy reloc. */
3679 if (!h->non_got_ref)
3680 return TRUE;
3681
3682 /* If -z nocopyreloc was given, we won't generate them either. */
3683 if (info->nocopyreloc)
3684 {
3685 h->non_got_ref = 0;
3686 return TRUE;
3687 }
3688
3689 eh = (struct elf_nds32_link_hash_entry *) h;
3690 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3691 {
3692 s = p->sec->output_section;
3693 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3694 break;
3695 }
3696
3697 /* If we didn't find any dynamic relocs in sections which needs the
3698 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3699 the copy reloc. */
3700 if (p == NULL)
3701 {
3702 h->non_got_ref = 0;
3703 return TRUE;
3704 }
3705
3706 /* We must allocate the symbol in our .dynbss section, which will
3707 become part of the .bss section of the executable. There will be
3708 an entry for this symbol in the .dynsym section. The dynamic
3709 object will contain position independent code, so all references
3710 from the dynamic object to this symbol will go through the global
3711 offset table. The dynamic linker will use the .dynsym entry to
3712 determine the address it must put in the global offset table, so
3713 both the dynamic object and the regular object will refer to the
3714 same memory location for the variable. */
3715
3716 htab = nds32_elf_hash_table (info);
3717 s = htab->sdynbss;
3718 BFD_ASSERT (s != NULL);
3719
3720 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3721 to copy the initial value out of the dynamic object and into the
3722 runtime process image. We need to remember the offset into the
3723 .rela.bss section we are going to use. */
3724 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3725 {
3726 asection *srel;
3727
3728 srel = htab->srelbss;
3729 BFD_ASSERT (srel != NULL);
3730 srel->size += sizeof (Elf32_External_Rela);
3731 h->needs_copy = 1;
3732 }
3733
3734 /* We need to figure out the alignment required for this symbol. I
3735 have no idea how ELF linkers handle this. */
3736 power_of_two = bfd_log2 (h->size);
3737 if (power_of_two > 3)
3738 power_of_two = 3;
3739
3740 /* Apply the required alignment. */
3741 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3742 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3743 {
3744 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3745 return FALSE;
3746 }
3747
3748 /* Define the symbol as being at this point in the section. */
3749 h->root.u.def.section = s;
3750 h->root.u.def.value = s->size;
3751
3752 /* Increment the section size to make room for the symbol. */
3753 s->size += h->size;
3754
3755 return TRUE;
3756 }
3757
3758 /* Allocate space in .plt, .got and associated reloc sections for
3759 dynamic relocs. */
3760
3761 static bfd_boolean
3762 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3763 {
3764 struct bfd_link_info *info;
3765 struct elf_nds32_link_hash_table *htab;
3766 struct elf_nds32_link_hash_entry *eh;
3767 struct elf_nds32_dyn_relocs *p;
3768
3769 if (h->root.type == bfd_link_hash_indirect)
3770 return TRUE;
3771
3772 if (h->root.type == bfd_link_hash_warning)
3773 /* When warning symbols are created, they **replace** the "real"
3774 entry in the hash table, thus we never get to see the real
3775 symbol in a hash traversal. So look at it now. */
3776 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3777
3778 info = (struct bfd_link_info *) inf;
3779 htab = nds32_elf_hash_table (info);
3780
3781 eh = (struct elf_nds32_link_hash_entry *) h;
3782
3783 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3784 {
3785 /* Make sure this symbol is output as a dynamic symbol.
3786 Undefined weak syms won't yet be marked as dynamic. */
3787 if (h->dynindx == -1 && !h->forced_local)
3788 {
3789 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3790 return FALSE;
3791 }
3792
3793 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
3794 {
3795 asection *s = htab->splt;
3796
3797 /* If this is the first .plt entry, make room for the special
3798 first entry. */
3799 if (s->size == 0)
3800 s->size += PLT_ENTRY_SIZE;
3801
3802 h->plt.offset = s->size;
3803
3804 /* If this symbol is not defined in a regular file, and we are
3805 not generating a shared library, then set the symbol to this
3806 location in the .plt. This is required to make function
3807 pointers compare as equal between the normal executable and
3808 the shared library. */
3809 if (!bfd_link_pic (info) && !h->def_regular)
3810 {
3811 h->root.u.def.section = s;
3812 h->root.u.def.value = h->plt.offset;
3813 }
3814
3815 /* Make room for this entry. */
3816 s->size += PLT_ENTRY_SIZE;
3817
3818 /* We also need to make an entry in the .got.plt section, which
3819 will be placed in the .got section by the linker script. */
3820 htab->sgotplt->size += 4;
3821
3822 /* We also need to make an entry in the .rel.plt section. */
3823 htab->srelplt->size += sizeof (Elf32_External_Rela);
3824 }
3825 else
3826 {
3827 h->plt.offset = (bfd_vma) - 1;
3828 h->needs_plt = 0;
3829 }
3830 }
3831 else
3832 {
3833 h->plt.offset = (bfd_vma) - 1;
3834 h->needs_plt = 0;
3835 }
3836
3837 if (h->got.refcount > 0)
3838 {
3839 asection *s;
3840 bfd_boolean dyn;
3841 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3842
3843 /* Make sure this symbol is output as a dynamic symbol.
3844 Undefined weak syms won't yet be marked as dynamic. */
3845 if (h->dynindx == -1 && !h->forced_local)
3846 {
3847 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3848 return FALSE;
3849 }
3850
3851 s = htab->sgot;
3852 h->got.offset = s->size;
3853
3854 if (tls_type == GOT_UNKNOWN)
3855 abort ();
3856 else if (tls_type == GOT_NORMAL
3857 || tls_type == GOT_TLS_IE)
3858 /* Need a GOT slot. */
3859 s->size += 4;
3860
3861 dyn = htab->root.dynamic_sections_created;
3862 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
3863 htab->srelgot->size += sizeof (Elf32_External_Rela);
3864 }
3865 else
3866 h->got.offset = (bfd_vma) - 1;
3867
3868 if (eh->dyn_relocs == NULL)
3869 return TRUE;
3870
3871 /* In the shared -Bsymbolic case, discard space allocated for
3872 dynamic pc-relative relocs against symbols which turn out to be
3873 defined in regular objects. For the normal shared case, discard
3874 space for pc-relative relocs that have become local due to symbol
3875 visibility changes. */
3876
3877 if (bfd_link_pic (info))
3878 {
3879 if (h->def_regular && (h->forced_local || info->symbolic))
3880 {
3881 struct elf_nds32_dyn_relocs **pp;
3882
3883 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3884 {
3885 p->count -= p->pc_count;
3886 p->pc_count = 0;
3887 if (p->count == 0)
3888 *pp = p->next;
3889 else
3890 pp = &p->next;
3891 }
3892 }
3893 }
3894 else
3895 {
3896 /* For the non-shared case, discard space for relocs against
3897 symbols which turn out to need copy relocs or are not dynamic. */
3898
3899 if (!h->non_got_ref
3900 && ((h->def_dynamic
3901 && !h->def_regular)
3902 || (htab->root.dynamic_sections_created
3903 && (h->root.type == bfd_link_hash_undefweak
3904 || h->root.type == bfd_link_hash_undefined))))
3905 {
3906 /* Make sure this symbol is output as a dynamic symbol.
3907 Undefined weak syms won't yet be marked as dynamic. */
3908 if (h->dynindx == -1 && !h->forced_local)
3909 {
3910 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3911 return FALSE;
3912 }
3913
3914 /* If that succeeded, we know we'll be keeping all the
3915 relocs. */
3916 if (h->dynindx != -1)
3917 goto keep;
3918 }
3919
3920 eh->dyn_relocs = NULL;
3921
3922 keep:;
3923 }
3924
3925 /* Finally, allocate space. */
3926 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3927 {
3928 asection *sreloc = elf_section_data (p->sec)->sreloc;
3929 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3930 }
3931
3932 return TRUE;
3933 }
3934
3935 /* Find any dynamic relocs that apply to read-only sections. */
3936
3937 static bfd_boolean
3938 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3939 {
3940 struct elf_nds32_link_hash_entry *eh;
3941 struct elf_nds32_dyn_relocs *p;
3942
3943 if (h->root.type == bfd_link_hash_warning)
3944 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3945
3946 eh = (struct elf_nds32_link_hash_entry *) h;
3947 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3948 {
3949 asection *s = p->sec->output_section;
3950
3951 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3952 {
3953 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3954
3955 info->flags |= DF_TEXTREL;
3956
3957 /* Not an error, just cut short the traversal. */
3958 return FALSE;
3959 }
3960 }
3961 return TRUE;
3962 }
3963
3964 /* Set the sizes of the dynamic sections. */
3965
3966 static bfd_boolean
3967 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3968 struct bfd_link_info *info)
3969 {
3970 struct elf_nds32_link_hash_table *htab;
3971 bfd *dynobj;
3972 asection *s;
3973 bfd_boolean relocs;
3974 bfd *ibfd;
3975
3976 htab = nds32_elf_hash_table (info);
3977 dynobj = htab->root.dynobj;
3978 BFD_ASSERT (dynobj != NULL);
3979
3980 if (htab->root.dynamic_sections_created)
3981 {
3982 /* Set the contents of the .interp section to the interpreter. */
3983 if (!bfd_link_pic (info))
3984 {
3985 s = bfd_get_section_by_name (dynobj, ".interp");
3986 BFD_ASSERT (s != NULL);
3987 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3988 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3989 }
3990 }
3991
3992 /* Set up .got offsets for local syms, and space for local dynamic
3993 relocs. */
3994 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3995 {
3996 bfd_signed_vma *local_got;
3997 bfd_signed_vma *end_local_got;
3998 bfd_size_type locsymcount;
3999 Elf_Internal_Shdr *symtab_hdr;
4000 asection *srel;
4001
4002 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4003 continue;
4004
4005 for (s = ibfd->sections; s != NULL; s = s->next)
4006 {
4007 struct elf_nds32_dyn_relocs *p;
4008
4009 for (p = ((struct elf_nds32_dyn_relocs *)
4010 elf_section_data (s)->local_dynrel);
4011 p != NULL; p = p->next)
4012 {
4013 if (!bfd_is_abs_section (p->sec)
4014 && bfd_is_abs_section (p->sec->output_section))
4015 {
4016 /* Input section has been discarded, either because
4017 it is a copy of a linkonce section or due to
4018 linker script /DISCARD/, so we'll be discarding
4019 the relocs too. */
4020 }
4021 else if (p->count != 0)
4022 {
4023 srel = elf_section_data (p->sec)->sreloc;
4024 srel->size += p->count * sizeof (Elf32_External_Rela);
4025 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4026 info->flags |= DF_TEXTREL;
4027 }
4028 }
4029 }
4030
4031 local_got = elf_local_got_refcounts (ibfd);
4032 if (!local_got)
4033 continue;
4034
4035 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4036 locsymcount = symtab_hdr->sh_info;
4037 end_local_got = local_got + locsymcount;
4038 s = htab->sgot;
4039 srel = htab->srelgot;
4040 for (; local_got < end_local_got; ++local_got)
4041 {
4042 if (*local_got > 0)
4043 {
4044 *local_got = s->size;
4045 s->size += 4;
4046 if (bfd_link_pic (info))
4047 srel->size += sizeof (Elf32_External_Rela);
4048 }
4049 else
4050 *local_got = (bfd_vma) - 1;
4051 }
4052 }
4053
4054 /* Allocate global sym .plt and .got entries, and space for global
4055 sym dynamic relocs. */
4056 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4057
4058 /* We now have determined the sizes of the various dynamic sections.
4059 Allocate memory for them. */
4060 relocs = FALSE;
4061 for (s = dynobj->sections; s != NULL; s = s->next)
4062 {
4063 if ((s->flags & SEC_LINKER_CREATED) == 0)
4064 continue;
4065
4066 if (s == htab->splt)
4067 {
4068 /* Strip this section if we don't need it; see the
4069 comment below. */
4070 }
4071 else if (s == htab->sgot)
4072 {
4073 got_size += s->size;
4074 }
4075 else if (s == htab->sgotplt)
4076 {
4077 got_size += s->size;
4078 }
4079 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4080 {
4081 if (s->size != 0 && s != htab->srelplt)
4082 relocs = TRUE;
4083
4084 /* We use the reloc_count field as a counter if we need
4085 to copy relocs into the output file. */
4086 s->reloc_count = 0;
4087 }
4088 else
4089 {
4090 /* It's not one of our sections, so don't allocate space. */
4091 continue;
4092 }
4093
4094 if (s->size == 0)
4095 {
4096 /* If we don't need this section, strip it from the
4097 output file. This is mostly to handle .rela.bss and
4098 .rela.plt. We must create both sections in
4099 create_dynamic_sections, because they must be created
4100 before the linker maps input sections to output
4101 sections. The linker does that before
4102 adjust_dynamic_symbol is called, and it is that
4103 function which decides whether anything needs to go
4104 into these sections. */
4105 s->flags |= SEC_EXCLUDE;
4106 continue;
4107 }
4108
4109 /* Allocate memory for the section contents. We use bfd_zalloc
4110 here in case unused entries are not reclaimed before the
4111 section's contents are written out. This should not happen,
4112 but this way if it does, we get a R_NDS32_NONE reloc instead
4113 of garbage. */
4114 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4115 if (s->contents == NULL)
4116 return FALSE;
4117 }
4118
4119
4120 if (htab->root.dynamic_sections_created)
4121 {
4122 /* Add some entries to the .dynamic section. We fill in the
4123 values later, in nds32_elf_finish_dynamic_sections, but we
4124 must add the entries now so that we get the correct size for
4125 the .dynamic section. The DT_DEBUG entry is filled in by the
4126 dynamic linker and used by the debugger. */
4127 #define add_dynamic_entry(TAG, VAL) \
4128 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4129
4130 if (!bfd_link_pic (info))
4131 {
4132 if (!add_dynamic_entry (DT_DEBUG, 0))
4133 return FALSE;
4134 }
4135
4136 if (htab->splt->size != 0)
4137 {
4138 if (!add_dynamic_entry (DT_PLTGOT, 0)
4139 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4140 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4141 || !add_dynamic_entry (DT_JMPREL, 0))
4142 return FALSE;
4143 }
4144
4145 if (relocs)
4146 {
4147 if (!add_dynamic_entry (DT_RELA, 0)
4148 || !add_dynamic_entry (DT_RELASZ, 0)
4149 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4150 return FALSE;
4151
4152 /* If any dynamic relocs apply to a read-only section,
4153 then we need a DT_TEXTREL entry. */
4154 if ((info->flags & DF_TEXTREL) == 0)
4155 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4156 (void *) info);
4157
4158 if ((info->flags & DF_TEXTREL) != 0)
4159 {
4160 if (!add_dynamic_entry (DT_TEXTREL, 0))
4161 return FALSE;
4162 }
4163 }
4164 }
4165 #undef add_dynamic_entry
4166
4167 return TRUE;
4168 }
4169
4170 static bfd_reloc_status_type
4171 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4172 bfd_vma relocation, bfd_byte *location)
4173 {
4174 int size;
4175 bfd_vma x = 0;
4176 bfd_reloc_status_type flag;
4177 unsigned int rightshift = howto->rightshift;
4178 unsigned int bitpos = howto->bitpos;
4179
4180 /* If the size is negative, negate RELOCATION. This isn't very
4181 general. */
4182 if (howto->size < 0)
4183 relocation = -relocation;
4184
4185 /* Get the value we are going to relocate. */
4186 size = bfd_get_reloc_size (howto);
4187 switch (size)
4188 {
4189 default:
4190 abort ();
4191 break;
4192 case 0:
4193 return bfd_reloc_ok;
4194 case 2:
4195 x = bfd_getb16 (location);
4196 break;
4197 case 4:
4198 x = bfd_getb32 (location);
4199 break;
4200 }
4201
4202 /* Check for overflow. FIXME: We may drop bits during the addition
4203 which we don't check for. We must either check at every single
4204 operation, which would be tedious, or we must do the computations
4205 in a type larger than bfd_vma, which would be inefficient. */
4206 flag = bfd_reloc_ok;
4207 if (howto->complain_on_overflow != complain_overflow_dont)
4208 {
4209 bfd_vma addrmask, fieldmask, signmask, ss;
4210 bfd_vma a, b, sum;
4211
4212 /* Get the values to be added together. For signed and unsigned
4213 relocations, we assume that all values should be truncated to
4214 the size of an address. For bitfields, all the bits matter.
4215 See also bfd_check_overflow. */
4216 fieldmask = N_ONES (howto->bitsize);
4217 signmask = ~fieldmask;
4218 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4219 a = (relocation & addrmask) >> rightshift;
4220 b = (x & howto->src_mask & addrmask) >> bitpos;
4221
4222 switch (howto->complain_on_overflow)
4223 {
4224 case complain_overflow_signed:
4225 /* If any sign bits are set, all sign bits must be set.
4226 That is, A must be a valid negative address after
4227 shifting. */
4228 signmask = ~(fieldmask >> 1);
4229 /* Fall through. */
4230
4231 case complain_overflow_bitfield:
4232 /* Much like the signed check, but for a field one bit
4233 wider. We allow a bitfield to represent numbers in the
4234 range -2**n to 2**n-1, where n is the number of bits in the
4235 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4236 can't overflow, which is exactly what we want. */
4237 ss = a & signmask;
4238 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4239 flag = bfd_reloc_overflow;
4240
4241 /* We only need this next bit of code if the sign bit of B
4242 is below the sign bit of A. This would only happen if
4243 SRC_MASK had fewer bits than BITSIZE. Note that if
4244 SRC_MASK has more bits than BITSIZE, we can get into
4245 trouble; we would need to verify that B is in range, as
4246 we do for A above. */
4247 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4248 ss >>= bitpos;
4249
4250 /* Set all the bits above the sign bit. */
4251 b = (b ^ ss) - ss;
4252
4253 /* Now we can do the addition. */
4254 sum = a + b;
4255
4256 /* See if the result has the correct sign. Bits above the
4257 sign bit are junk now; ignore them. If the sum is
4258 positive, make sure we did not have all negative inputs;
4259 if the sum is negative, make sure we did not have all
4260 positive inputs. The test below looks only at the sign
4261 bits, and it really just
4262 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4263
4264 We mask with addrmask here to explicitly allow an address
4265 wrap-around. The Linux kernel relies on it, and it is
4266 the only way to write assembler code which can run when
4267 loaded at a location 0x80000000 away from the location at
4268 which it is linked. */
4269 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4270 flag = bfd_reloc_overflow;
4271
4272 break;
4273
4274 case complain_overflow_unsigned:
4275 /* Checking for an unsigned overflow is relatively easy:
4276 trim the addresses and add, and trim the result as well.
4277 Overflow is normally indicated when the result does not
4278 fit in the field. However, we also need to consider the
4279 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4280 input is 0x80000000, and bfd_vma is only 32 bits; then we
4281 will get sum == 0, but there is an overflow, since the
4282 inputs did not fit in the field. Instead of doing a
4283 separate test, we can check for this by or-ing in the
4284 operands when testing for the sum overflowing its final
4285 field. */
4286 sum = (a + b) & addrmask;
4287 if ((a | b | sum) & signmask)
4288 flag = bfd_reloc_overflow;
4289 break;
4290
4291 default:
4292 abort ();
4293 }
4294 }
4295
4296 /* Put RELOCATION in the right bits. */
4297 relocation >>= (bfd_vma) rightshift;
4298 relocation <<= (bfd_vma) bitpos;
4299
4300 /* Add RELOCATION to the right bits of X. */
4301 /* FIXME : 090616
4302 Because the relaxation may generate duplicate relocation at one address,
4303 an addition to immediate in the instruction may cause the relocation added
4304 several times.
4305 This bug should be fixed in assembler, but a check is also needed here. */
4306 if (howto->partial_inplace)
4307 x = ((x & ~howto->dst_mask)
4308 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4309 else
4310 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4311
4312
4313 /* Put the relocated value back in the object file. */
4314 switch (size)
4315 {
4316 default:
4317 case 0:
4318 case 1:
4319 case 8:
4320 abort ();
4321 break;
4322 case 2:
4323 bfd_putb16 (x, location);
4324 break;
4325 case 4:
4326 bfd_putb32 (x, location);
4327 break;
4328 }
4329
4330 return flag;
4331 }
4332
4333 static bfd_reloc_status_type
4334 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4335 asection *input_section, bfd_byte *contents,
4336 bfd_vma address, bfd_vma value, bfd_vma addend)
4337 {
4338 bfd_vma relocation;
4339
4340 /* Sanity check the address. */
4341 if (address > bfd_get_section_limit (input_bfd, input_section))
4342 return bfd_reloc_outofrange;
4343
4344 /* This function assumes that we are dealing with a basic relocation
4345 against a symbol. We want to compute the value of the symbol to
4346 relocate to. This is just VALUE, the value of the symbol, plus
4347 ADDEND, any addend associated with the reloc. */
4348 relocation = value + addend;
4349
4350 /* If the relocation is PC relative, we want to set RELOCATION to
4351 the distance between the symbol (currently in RELOCATION) and the
4352 location we are relocating. Some targets (e.g., i386-aout)
4353 arrange for the contents of the section to be the negative of the
4354 offset of the location within the section; for such targets
4355 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4356 simply leave the contents of the section as zero; for such
4357 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4358 need to subtract out the offset of the location within the
4359 section (which is just ADDRESS). */
4360 if (howto->pc_relative)
4361 {
4362 relocation -= (input_section->output_section->vma
4363 + input_section->output_offset);
4364 if (howto->pcrel_offset)
4365 relocation -= address;
4366 }
4367
4368 return nds32_relocate_contents (howto, input_bfd, relocation,
4369 contents + address);
4370 }
4371
4372 static bfd_boolean
4373 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4374 const char *name,
4375 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4376 asection *input_sec,
4377 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4378 {
4379 const char *source;
4380 FILE *sym_ld_script = NULL;
4381 struct elf_nds32_link_hash_table *table;
4382
4383 table = nds32_elf_hash_table (info);
4384 sym_ld_script = table->sym_ld_script;
4385 if (!sym_ld_script)
4386 return TRUE;
4387
4388 if (!h || !name || *name == '\0')
4389 return TRUE;
4390
4391 if (input_sec->flags & SEC_EXCLUDE)
4392 return TRUE;
4393
4394 if (!check_start_export_sym)
4395 {
4396 fprintf (sym_ld_script, "SECTIONS\n{\n");
4397 check_start_export_sym = 1;
4398 }
4399
4400 if (h->root.type == bfd_link_hash_defined
4401 || h->root.type == bfd_link_hash_defweak)
4402 {
4403 if (!h->root.u.def.section->output_section)
4404 return TRUE;
4405
4406 if (bfd_is_const_section (input_sec))
4407 source = input_sec->name;
4408 else
4409 source = input_sec->owner->filename;
4410
4411 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4412 h->root.root.string,
4413 (long) (h->root.u.def.value
4414 + h->root.u.def.section->output_section->vma
4415 + h->root.u.def.section->output_offset), source);
4416 }
4417
4418 return TRUE;
4419 }
4420
4421 /* Relocate an NDS32/D ELF section.
4422 There is some attempt to make this function usable for many architectures,
4423 both for RELA and REL type relocs, if only to serve as a learning tool.
4424
4425 The RELOCATE_SECTION function is called by the new ELF backend linker
4426 to handle the relocations for a section.
4427
4428 The relocs are always passed as Rela structures; if the section
4429 actually uses Rel structures, the r_addend field will always be
4430 zero.
4431
4432 This function is responsible for adjust the section contents as
4433 necessary, and (if using Rela relocs and generating a
4434 relocatable output file) adjusting the reloc addend as
4435 necessary.
4436
4437 This function does not have to worry about setting the reloc
4438 address or the reloc symbol index.
4439
4440 LOCAL_SYMS is a pointer to the swapped in local symbols.
4441
4442 LOCAL_SECTIONS is an array giving the section in the input file
4443 corresponding to the st_shndx field of each local symbol.
4444
4445 The global hash table entry for the global symbols can be found
4446 via elf_sym_hashes (input_bfd).
4447
4448 When generating relocatable output, this function must handle
4449 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4450 going to be the section symbol corresponding to the output
4451 section, which means that the addend must be adjusted
4452 accordingly. */
4453
4454 static bfd_vma
4455 dtpoff_base (struct bfd_link_info *info)
4456 {
4457 /* If tls_sec is NULL, we should have signalled an error already. */
4458 if (elf_hash_table (info)->tls_sec == NULL)
4459 return 0;
4460 return elf_hash_table (info)->tls_sec->vma;
4461 }
4462
4463 static bfd_boolean
4464 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4465 struct bfd_link_info * info,
4466 bfd * input_bfd,
4467 asection * input_section,
4468 bfd_byte * contents,
4469 Elf_Internal_Rela * relocs,
4470 Elf_Internal_Sym * local_syms,
4471 asection ** local_sections)
4472 {
4473 Elf_Internal_Shdr *symtab_hdr;
4474 struct elf_link_hash_entry **sym_hashes;
4475 Elf_Internal_Rela *rel, *relend;
4476 bfd_boolean ret = TRUE; /* Assume success. */
4477 int align = 0;
4478 bfd_reloc_status_type r;
4479 const char *errmsg = NULL;
4480 bfd_vma gp;
4481 struct elf_nds32_link_hash_table *htab;
4482 bfd *dynobj;
4483 bfd_vma *local_got_offsets;
4484 asection *sgot, *splt, *sreloc;
4485 bfd_vma high_address;
4486 struct elf_nds32_link_hash_table *table;
4487 int eliminate_gc_relocs;
4488 bfd_vma fpbase_addr;
4489
4490 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4491 sym_hashes = elf_sym_hashes (input_bfd);
4492 htab = nds32_elf_hash_table (info);
4493 high_address = bfd_get_section_limit (input_bfd, input_section);
4494
4495 dynobj = htab->root.dynobj;
4496 local_got_offsets = elf_local_got_offsets (input_bfd);
4497
4498 sgot = htab->sgot;
4499 splt = htab->splt;
4500 sreloc = NULL;
4501
4502 rel = relocs;
4503 relend = relocs + input_section->reloc_count;
4504
4505 table = nds32_elf_hash_table (info);
4506 eliminate_gc_relocs = table->eliminate_gc_relocs;
4507 /* By this time, we can adjust the value of _SDA_BASE_. */
4508 if ((!bfd_link_relocatable (info)))
4509 {
4510 is_SDA_BASE_set = 1;
4511 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4512 if (r != bfd_reloc_ok)
4513 return FALSE;
4514 }
4515
4516 if (is_ITB_BASE_set == 0)
4517 {
4518 /* Set the _ITB_BASE_. */
4519 if (!nds32_elf_ex9_itb_base (info))
4520 {
4521 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"),
4522 output_bfd);
4523 bfd_set_error (bfd_error_bad_value);
4524 }
4525 }
4526
4527 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4528 if (!nds32_elf_ifc_reloc ())
4529 (*_bfd_error_handler) (_("error: IFC relocation error."));
4530
4531 /* Relocation for .ex9.itable. */
4532 if (table->target_optimize & NDS32_RELAX_EX9_ON
4533 || (table->ex9_import_file && table->update_ex9_table))
4534 nds32_elf_ex9_reloc_jmp (info);
4535
4536 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4537 the fp value is set as gp, and it has be reverted for instruction
4538 setting fp. */
4539 fpbase_addr = elf_gp (output_bfd);
4540
4541 for (rel = relocs; rel < relend; rel++)
4542 {
4543 enum elf_nds32_reloc_type r_type;
4544 reloc_howto_type *howto = NULL;
4545 unsigned long r_symndx;
4546 struct elf_link_hash_entry *h = NULL;
4547 Elf_Internal_Sym *sym = NULL;
4548 asection *sec;
4549 bfd_vma relocation;
4550
4551 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4552 ensure it's zero (we use REL relocs, not RELA). Therefore this
4553 should be assigning zero to `addend', but for clarity we use
4554 `r_addend'. */
4555
4556 bfd_vma addend = rel->r_addend;
4557 bfd_vma offset = rel->r_offset;
4558
4559 r_type = ELF32_R_TYPE (rel->r_info);
4560 if (r_type >= R_NDS32_max)
4561 {
4562 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4563 input_bfd, r_type);
4564 bfd_set_error (bfd_error_bad_value);
4565 ret = FALSE;
4566 continue;
4567 }
4568
4569 if (r_type == R_NDS32_GNU_VTENTRY
4570 || r_type == R_NDS32_GNU_VTINHERIT
4571 || r_type == R_NDS32_NONE
4572 || r_type == R_NDS32_RELA_GNU_VTENTRY
4573 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4574 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4575 || r_type == R_NDS32_DATA
4576 || r_type == R_NDS32_TRAN
4577 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
4578 continue;
4579
4580 /* If we enter the fp-as-gp region. Resolve the address
4581 of best fp-base. */
4582 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4583 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4584 {
4585 int dist;
4586
4587 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4588 dist = rel->r_addend >> 16;
4589 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4590 local_syms, symtab_hdr);
4591 }
4592 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4593 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4594 {
4595 fpbase_addr = elf_gp (output_bfd);
4596 }
4597
4598 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4599 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4600 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
4601 continue;
4602
4603 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4604 r_symndx = ELF32_R_SYM (rel->r_info);
4605
4606 /* This is a final link. */
4607 sym = NULL;
4608 sec = NULL;
4609 h = NULL;
4610
4611 if (r_symndx < symtab_hdr->sh_info)
4612 {
4613 /* Local symbol. */
4614 sym = local_syms + r_symndx;
4615 sec = local_sections[r_symndx];
4616
4617 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4618 addend = rel->r_addend;
4619 }
4620 else
4621 {
4622 /* External symbol. */
4623 bfd_boolean warned, ignored, unresolved_reloc;
4624 int symndx = r_symndx - symtab_hdr->sh_info;
4625
4626 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4627 r_symndx, symtab_hdr, sym_hashes, h, sec,
4628 relocation, unresolved_reloc, warned,
4629 ignored);
4630
4631 /* la $fp, _FP_BASE_ is per-function (region).
4632 Handle it specially. */
4633 switch ((int) r_type)
4634 {
4635 case R_NDS32_SDA19S0_RELA:
4636 case R_NDS32_SDA15S0_RELA:
4637 case R_NDS32_20_RELA:
4638 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4639 FP_BASE_NAME) == 0)
4640 {
4641 relocation = fpbase_addr;
4642 break;
4643 }
4644 }
4645
4646 }
4647
4648 if (bfd_link_relocatable (info))
4649 {
4650 /* This is a relocatable link. We don't have to change
4651 anything, unless the reloc is against a section symbol,
4652 in which case we have to adjust according to where the
4653 section symbol winds up in the output section. */
4654 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4655 rel->r_addend += sec->output_offset + sym->st_value;
4656
4657 continue;
4658 }
4659
4660 /* Sanity check the address. */
4661 if (offset > high_address)
4662 {
4663 r = bfd_reloc_outofrange;
4664 goto check_reloc;
4665 }
4666
4667 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4668 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4669 || r_type >= R_NDS32_RELAX_ENTRY)
4670 continue;
4671
4672 switch ((int) r_type)
4673 {
4674 case R_NDS32_GOTOFF:
4675 /* Relocation is relative to the start of the global offset
4676 table (for ld24 rx, #uimm24), e.g. access at label+addend
4677
4678 ld24 rx. #label@GOTOFF + addend
4679 sub rx, r12. */
4680 case R_NDS32_GOTOFF_HI20:
4681 case R_NDS32_GOTOFF_LO12:
4682 case R_NDS32_GOTOFF_LO15:
4683 case R_NDS32_GOTOFF_LO19:
4684 BFD_ASSERT (sgot != NULL);
4685
4686 relocation -= elf_gp (output_bfd);
4687 break;
4688
4689 case R_NDS32_9_PLTREL:
4690 case R_NDS32_25_PLTREL:
4691 /* Relocation is to the entry for this symbol in the
4692 procedure linkage table. */
4693
4694 /* The native assembler will generate a 25_PLTREL reloc
4695 for a local symbol if you assemble a call from one
4696 section to another when using -K pic. */
4697 if (h == NULL)
4698 break;
4699
4700 if (h->forced_local)
4701 break;
4702
4703 /* We didn't make a PLT entry for this symbol. This
4704 happens when statically linking PIC code, or when
4705 using -Bsymbolic. */
4706 if (h->plt.offset == (bfd_vma) - 1)
4707 break;
4708
4709 relocation = (splt->output_section->vma
4710 + splt->output_offset + h->plt.offset);
4711 break;
4712
4713 case R_NDS32_PLT_GOTREL_HI20:
4714 case R_NDS32_PLT_GOTREL_LO12:
4715 case R_NDS32_PLT_GOTREL_LO15:
4716 case R_NDS32_PLT_GOTREL_LO19:
4717 case R_NDS32_PLT_GOTREL_LO20:
4718 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4719 {
4720 /* We didn't make a PLT entry for this symbol. This
4721 happens when statically linking PIC code, or when
4722 using -Bsymbolic. */
4723 relocation -= elf_gp (output_bfd);
4724 break;
4725 }
4726
4727 relocation = (splt->output_section->vma
4728 + splt->output_offset + h->plt.offset);
4729
4730 relocation -= elf_gp (output_bfd);
4731 break;
4732
4733 case R_NDS32_PLTREL_HI20:
4734 case R_NDS32_PLTREL_LO12:
4735
4736 /* Relocation is to the entry for this symbol in the
4737 procedure linkage table. */
4738
4739 /* The native assembler will generate a 25_PLTREL reloc
4740 for a local symbol if you assemble a call from one
4741 section to another when using -K pic. */
4742 if (h == NULL)
4743 break;
4744
4745 if (h->forced_local)
4746 break;
4747
4748 if (h->plt.offset == (bfd_vma) - 1)
4749 /* We didn't make a PLT entry for this symbol. This
4750 happens when statically linking PIC code, or when
4751 using -Bsymbolic. */
4752 break;
4753
4754 if (splt == NULL)
4755 break;
4756
4757 relocation = (splt->output_section->vma
4758 + splt->output_offset
4759 + h->plt.offset + 4)
4760 - (input_section->output_section->vma
4761 + input_section->output_offset
4762 + rel->r_offset);
4763
4764 break;
4765
4766 case R_NDS32_GOTPC20:
4767 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4768 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4769 relocation = elf_gp (output_bfd);
4770 break;
4771
4772 case R_NDS32_GOTPC_HI20:
4773 case R_NDS32_GOTPC_LO12:
4774 {
4775 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4776 bl .+4
4777 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4778 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4779 or
4780 bl .+4
4781 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4782 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4783 */
4784 relocation = elf_gp (output_bfd);
4785 relocation -= (input_section->output_section->vma
4786 + input_section->output_offset + rel->r_offset);
4787 break;
4788 }
4789
4790 case R_NDS32_GOT20:
4791 /* Fall through. */
4792 case R_NDS32_GOT_HI20:
4793 case R_NDS32_GOT_LO12:
4794 case R_NDS32_GOT_LO15:
4795 case R_NDS32_GOT_LO19:
4796 /* Relocation is to the entry for this symbol in the global
4797 offset table. */
4798 BFD_ASSERT (sgot != NULL);
4799
4800 if (h != NULL)
4801 {
4802 bfd_boolean dyn;
4803 bfd_vma off;
4804
4805 off = h->got.offset;
4806 BFD_ASSERT (off != (bfd_vma) - 1);
4807 dyn = htab->root.dynamic_sections_created;
4808 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4809 bfd_link_pic (info),
4810 h)
4811 || (bfd_link_pic (info)
4812 && (info->symbolic
4813 || h->dynindx == -1
4814 || h->forced_local) && h->def_regular))
4815 {
4816 /* This is actually a static link, or it is a
4817 -Bsymbolic link and the symbol is defined
4818 locally, or the symbol was forced to be local
4819 because of a version file. We must initialize
4820 this entry in the global offset table. Since the
4821 offset must always be a multiple of 4, we use the
4822 least significant bit to record whether we have
4823 initialized it already.
4824
4825 When doing a dynamic link, we create a .rela.got
4826 relocation entry to initialize the value. This
4827 is done in the finish_dynamic_symbol routine. */
4828 if ((off & 1) != 0)
4829 off &= ~1;
4830 else
4831 {
4832 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4833 h->got.offset |= 1;
4834 }
4835 }
4836 relocation = sgot->output_section->vma + sgot->output_offset + off
4837 - elf_gp (output_bfd);
4838 }
4839 else
4840 {
4841 bfd_vma off;
4842 bfd_byte *loc;
4843
4844 BFD_ASSERT (local_got_offsets != NULL
4845 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4846
4847 off = local_got_offsets[r_symndx];
4848
4849 /* The offset must always be a multiple of 4. We use
4850 the least significant bit to record whether we have
4851 already processed this entry. */
4852 if ((off & 1) != 0)
4853 off &= ~1;
4854 else
4855 {
4856 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4857
4858 if (bfd_link_pic (info))
4859 {
4860 asection *srelgot;
4861 Elf_Internal_Rela outrel;
4862
4863 /* We need to generate a R_NDS32_RELATIVE reloc
4864 for the dynamic linker. */
4865 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4866 BFD_ASSERT (srelgot != NULL);
4867
4868 outrel.r_offset = (elf_gp (output_bfd)
4869 + sgot->output_offset + off);
4870 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4871 outrel.r_addend = relocation;
4872 loc = srelgot->contents;
4873 loc +=
4874 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4875 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4876 ++srelgot->reloc_count;
4877 }
4878 local_got_offsets[r_symndx] |= 1;
4879 }
4880 relocation = sgot->output_section->vma + sgot->output_offset + off
4881 - elf_gp (output_bfd);
4882 }
4883
4884 break;
4885
4886 case R_NDS32_16_RELA:
4887 case R_NDS32_20_RELA:
4888 case R_NDS32_5_RELA:
4889 case R_NDS32_32_RELA:
4890 case R_NDS32_9_PCREL_RELA:
4891 case R_NDS32_WORD_9_PCREL_RELA:
4892 case R_NDS32_10_UPCREL_RELA:
4893 case R_NDS32_15_PCREL_RELA:
4894 case R_NDS32_17_PCREL_RELA:
4895 case R_NDS32_25_PCREL_RELA:
4896 case R_NDS32_HI20_RELA:
4897 case R_NDS32_LO12S3_RELA:
4898 case R_NDS32_LO12S2_RELA:
4899 case R_NDS32_LO12S2_DP_RELA:
4900 case R_NDS32_LO12S2_SP_RELA:
4901 case R_NDS32_LO12S1_RELA:
4902 case R_NDS32_LO12S0_RELA:
4903 case R_NDS32_LO12S0_ORI_RELA:
4904 if (bfd_link_pic (info) && r_symndx != 0
4905 && (input_section->flags & SEC_ALLOC) != 0
4906 && (eliminate_gc_relocs == 0
4907 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4908 && ((r_type != R_NDS32_9_PCREL_RELA
4909 && r_type != R_NDS32_WORD_9_PCREL_RELA
4910 && r_type != R_NDS32_10_UPCREL_RELA
4911 && r_type != R_NDS32_15_PCREL_RELA
4912 && r_type != R_NDS32_17_PCREL_RELA
4913 && r_type != R_NDS32_25_PCREL_RELA
4914 && !(r_type == R_NDS32_32_RELA
4915 && strcmp (input_section->name, ".eh_frame") == 0))
4916 || (h != NULL && h->dynindx != -1
4917 && (!info->symbolic || !h->def_regular))))
4918 {
4919 Elf_Internal_Rela outrel;
4920 bfd_boolean skip, relocate;
4921 bfd_byte *loc;
4922
4923 /* When generating a shared object, these relocations
4924 are copied into the output file to be resolved at run
4925 time. */
4926
4927 if (sreloc == NULL)
4928 {
4929 const char *name;
4930
4931 name = bfd_elf_string_from_elf_section
4932 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4933 elf_section_data (input_section)->rela.hdr->sh_name);
4934 if (name == NULL)
4935 return FALSE;
4936
4937 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4938 && strcmp (bfd_get_section_name (input_bfd,
4939 input_section),
4940 name + 5) == 0);
4941
4942 sreloc = bfd_get_section_by_name (dynobj, name);
4943 BFD_ASSERT (sreloc != NULL);
4944 }
4945
4946 skip = FALSE;
4947 relocate = FALSE;
4948
4949 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4950 info,
4951 input_section,
4952 rel->r_offset);
4953 if (outrel.r_offset == (bfd_vma) - 1)
4954 skip = TRUE;
4955 else if (outrel.r_offset == (bfd_vma) - 2)
4956 skip = TRUE, relocate = TRUE;
4957 outrel.r_offset += (input_section->output_section->vma
4958 + input_section->output_offset);
4959
4960 if (skip)
4961 memset (&outrel, 0, sizeof outrel);
4962 else if (r_type == R_NDS32_17_PCREL_RELA
4963 || r_type == R_NDS32_15_PCREL_RELA
4964 || r_type == R_NDS32_25_PCREL_RELA)
4965 {
4966 BFD_ASSERT (h != NULL && h->dynindx != -1);
4967 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4968 outrel.r_addend = rel->r_addend;
4969 }
4970 else
4971 {
4972 /* h->dynindx may be -1 if this symbol was marked to
4973 become local. */
4974 if (h == NULL
4975 || ((info->symbolic || h->dynindx == -1)
4976 && h->def_regular))
4977 {
4978 relocate = TRUE;
4979 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4980 outrel.r_addend = relocation + rel->r_addend;
4981 }
4982 else
4983 {
4984 BFD_ASSERT (h->dynindx != -1);
4985 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4986 outrel.r_addend = rel->r_addend;
4987 }
4988 }
4989
4990 loc = sreloc->contents;
4991 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4992 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4993 ++sreloc->reloc_count;
4994
4995 /* If this reloc is against an external symbol, we do
4996 not want to fiddle with the addend. Otherwise, we
4997 need to include the symbol value so that it becomes
4998 an addend for the dynamic reloc. */
4999 if (!relocate)
5000 continue;
5001 }
5002 break;
5003
5004 case R_NDS32_25_ABS_RELA:
5005 if (bfd_link_pic (info))
5006 {
5007 (*_bfd_error_handler)
5008 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5009 "mode."), bfd_get_filename (input_bfd));
5010 return FALSE;
5011 }
5012 break;
5013
5014 case R_NDS32_9_PCREL:
5015 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5016 contents, offset,
5017 sec, relocation, addend);
5018 goto check_reloc;
5019
5020 case R_NDS32_HI20:
5021 {
5022 Elf_Internal_Rela *lorel;
5023
5024 /* We allow an arbitrary number of HI20 relocs before the
5025 LO12 reloc. This permits gcc to emit the HI and LO relocs
5026 itself. */
5027 for (lorel = rel + 1;
5028 (lorel < relend
5029 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5030 continue;
5031 if (lorel < relend
5032 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5033 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5034 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5035 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5036 {
5037 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5038 contents, relocation + addend);
5039 r = bfd_reloc_ok;
5040 }
5041 else
5042 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5043 contents, offset, relocation,
5044 addend);
5045 }
5046
5047 goto check_reloc;
5048
5049 case R_NDS32_GOT17S2_RELA:
5050 case R_NDS32_GOT15S2_RELA:
5051 {
5052 bfd_vma off;
5053
5054 BFD_ASSERT (sgot != NULL);
5055
5056 if (h != NULL)
5057 {
5058 bfd_boolean dyn;
5059
5060 off = h->got.offset;
5061 BFD_ASSERT (off != (bfd_vma) - 1);
5062
5063 dyn = htab->root.dynamic_sections_created;
5064 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5065 (dyn, bfd_link_pic (info), h)
5066 || (bfd_link_pic (info)
5067 && (info->symbolic
5068 || h->dynindx == -1
5069 || h->forced_local)
5070 && h->def_regular))
5071 {
5072 /* This is actually a static link, or it is a
5073 -Bsymbolic link and the symbol is defined
5074 locally, or the symbol was forced to be local
5075 because of a version file. We must initialize
5076 this entry in the global offset table. Since the
5077 offset must always be a multiple of 4, we use the
5078 least significant bit to record whether we have
5079 initialized it already.
5080
5081 When doing a dynamic link, we create a .rela.got
5082 relocation entry to initialize the value. This
5083 is done in the finish_dynamic_symbol routine. */
5084 if ((off & 1) != 0)
5085 off &= ~1;
5086 else
5087 {
5088 bfd_put_32 (output_bfd, relocation,
5089 sgot->contents + off);
5090 h->got.offset |= 1;
5091 }
5092 }
5093 }
5094 else
5095 {
5096 bfd_byte *loc;
5097
5098 BFD_ASSERT (local_got_offsets != NULL
5099 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5100
5101 off = local_got_offsets[r_symndx];
5102
5103 /* The offset must always be a multiple of 4. We use
5104 the least significant bit to record whether we have
5105 already processed this entry. */
5106 if ((off & 1) != 0)
5107 off &= ~1;
5108 else
5109 {
5110 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5111
5112 if (bfd_link_pic (info))
5113 {
5114 asection *srelgot;
5115 Elf_Internal_Rela outrel;
5116
5117 /* We need to generate a R_NDS32_RELATIVE reloc
5118 for the dynamic linker. */
5119 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5120 BFD_ASSERT (srelgot != NULL);
5121
5122 outrel.r_offset = (elf_gp (output_bfd)
5123 + sgot->output_offset + off);
5124 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5125 outrel.r_addend = relocation;
5126 loc = srelgot->contents;
5127 loc +=
5128 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5129 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5130 ++srelgot->reloc_count;
5131 }
5132 local_got_offsets[r_symndx] |= 1;
5133 }
5134 }
5135 relocation = sgot->output_section->vma + sgot->output_offset + off
5136 - elf_gp (output_bfd);
5137 }
5138 if (relocation & align)
5139 {
5140 /* Incorrect alignment. */
5141 (*_bfd_error_handler)
5142 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5143 ret = FALSE;
5144 r = bfd_reloc_dangerous;
5145 goto check_reloc;
5146 }
5147 break;
5148
5149 case R_NDS32_SDA16S3_RELA:
5150 case R_NDS32_SDA15S3_RELA:
5151 case R_NDS32_SDA15S3:
5152 align = 0x7;
5153 goto handle_sda;
5154
5155 case R_NDS32_SDA17S2_RELA:
5156 case R_NDS32_SDA15S2_RELA:
5157 case R_NDS32_SDA12S2_SP_RELA:
5158 case R_NDS32_SDA12S2_DP_RELA:
5159 case R_NDS32_SDA15S2:
5160 case R_NDS32_SDA_FP7U2_RELA:
5161 align = 0x3;
5162 goto handle_sda;
5163
5164 case R_NDS32_SDA18S1_RELA:
5165 case R_NDS32_SDA15S1_RELA:
5166 case R_NDS32_SDA15S1:
5167 align = 0x1;
5168 goto handle_sda;
5169
5170 case R_NDS32_SDA19S0_RELA:
5171 case R_NDS32_SDA15S0_RELA:
5172 case R_NDS32_SDA15S0:
5173 {
5174 align = 0x0;
5175 handle_sda:
5176 BFD_ASSERT (sec != NULL);
5177
5178 /* If the symbol is in the abs section, the out_bfd will be null.
5179 This happens when the relocation has a symbol@GOTOFF. */
5180 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5181 if (r != bfd_reloc_ok)
5182 {
5183 (*_bfd_error_handler)
5184 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5185 ret = FALSE;
5186 goto check_reloc;
5187 }
5188
5189 /* At this point `relocation' contains the object's
5190 address. */
5191 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5192 {
5193 relocation -= fpbase_addr;
5194 }
5195 else
5196 relocation -= gp;
5197 /* Now it contains the offset from _SDA_BASE_. */
5198
5199 /* Make sure alignment is correct. */
5200
5201 if (relocation & align)
5202 {
5203 /* Incorrect alignment. */
5204 (*_bfd_error_handler)
5205 (_("%B(%A): warning: unaligned small data access of type %d."),
5206 input_bfd, input_section, r_type);
5207 ret = FALSE;
5208 goto check_reloc;
5209 }
5210 }
5211
5212 break;
5213 case R_NDS32_17IFC_PCREL_RELA:
5214 case R_NDS32_10IFCU_PCREL_RELA:
5215 /* do nothing */
5216 break;
5217
5218 case R_NDS32_TLS_LE_HI20:
5219 case R_NDS32_TLS_LE_LO12:
5220 case R_NDS32_TLS_LE_20:
5221 case R_NDS32_TLS_LE_15S0:
5222 case R_NDS32_TLS_LE_15S1:
5223 case R_NDS32_TLS_LE_15S2:
5224 if (elf_hash_table (info)->tls_sec != NULL)
5225 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5226 break;
5227 case R_NDS32_TLS_IE_HI20:
5228 case R_NDS32_TLS_IE_LO12S2:
5229 {
5230 /* Relocation is to the entry for this symbol in the global
5231 offset table. */
5232 unsigned int tls_type;
5233 asection *srelgot;
5234 Elf_Internal_Rela outrel;
5235 bfd_vma off;
5236 bfd_byte *loc;
5237 int indx = 0;
5238
5239 BFD_ASSERT (sgot != NULL);
5240 if (h != NULL)
5241 {
5242 bfd_boolean dyn;
5243
5244 off = h->got.offset;
5245 BFD_ASSERT (off != (bfd_vma) - 1);
5246 dyn = htab->root.dynamic_sections_created;
5247 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5248 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5249 && (!bfd_link_pic (info)
5250 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5251 indx = h->dynindx;
5252 }
5253 else
5254 {
5255 /* Never happen currently. */
5256 BFD_ASSERT (local_got_offsets != NULL
5257 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5258
5259 off = local_got_offsets[r_symndx];
5260
5261 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5262 }
5263 relocation = sgot->output_section->vma + sgot->output_offset + off;
5264
5265 if (r_type == R_NDS32_TLS_IE_LO12S2)
5266 break;
5267
5268 /* The offset must always be a multiple of 4. We use
5269 the least significant bit to record whether we have
5270 already processed this entry. */
5271 if ((off & 1) != 0)
5272 off &= ~1;
5273 else
5274 {
5275 bfd_boolean need_relocs = FALSE;
5276 srelgot = htab->srelgot;
5277 if ((bfd_link_pic (info) || indx != 0)
5278 && (h == NULL
5279 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5280 || h->root.type != bfd_link_hash_undefweak))
5281 {
5282 need_relocs = TRUE;
5283 BFD_ASSERT (srelgot != NULL);
5284 }
5285 if (tls_type & GOT_TLS_IE)
5286 {
5287 if (need_relocs)
5288 {
5289 if (h->dynindx == 0)
5290 outrel.r_addend = relocation - dtpoff_base (info);
5291 else
5292 outrel.r_addend = 0;
5293 outrel.r_offset = (sgot->output_section->vma
5294 + sgot->output_offset
5295 + off);
5296 outrel.r_info =
5297 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5298
5299 loc = srelgot->contents;
5300 loc +=
5301 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5302 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5303 ++srelgot->reloc_count;
5304 }
5305 else
5306 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5307 sgot->contents + off);
5308 }
5309 }
5310 }
5311 break;
5312
5313 /* DON'T fall through. */
5314
5315 default:
5316 /* OLD_NDS32_RELOC. */
5317
5318 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5319 contents, offset, relocation, addend);
5320 goto check_reloc;
5321 }
5322
5323 switch ((int) r_type)
5324 {
5325 case R_NDS32_20_RELA:
5326 case R_NDS32_5_RELA:
5327 case R_NDS32_9_PCREL_RELA:
5328 case R_NDS32_WORD_9_PCREL_RELA:
5329 case R_NDS32_10_UPCREL_RELA:
5330 case R_NDS32_15_PCREL_RELA:
5331 case R_NDS32_17_PCREL_RELA:
5332 case R_NDS32_25_PCREL_RELA:
5333 case R_NDS32_25_ABS_RELA:
5334 case R_NDS32_HI20_RELA:
5335 case R_NDS32_LO12S3_RELA:
5336 case R_NDS32_LO12S2_RELA:
5337 case R_NDS32_LO12S2_DP_RELA:
5338 case R_NDS32_LO12S2_SP_RELA:
5339 case R_NDS32_LO12S1_RELA:
5340 case R_NDS32_LO12S0_RELA:
5341 case R_NDS32_LO12S0_ORI_RELA:
5342 case R_NDS32_SDA16S3_RELA:
5343 case R_NDS32_SDA17S2_RELA:
5344 case R_NDS32_SDA18S1_RELA:
5345 case R_NDS32_SDA19S0_RELA:
5346 case R_NDS32_SDA15S3_RELA:
5347 case R_NDS32_SDA15S2_RELA:
5348 case R_NDS32_SDA12S2_DP_RELA:
5349 case R_NDS32_SDA12S2_SP_RELA:
5350 case R_NDS32_SDA15S1_RELA:
5351 case R_NDS32_SDA15S0_RELA:
5352 case R_NDS32_SDA_FP7U2_RELA:
5353 case R_NDS32_9_PLTREL:
5354 case R_NDS32_25_PLTREL:
5355 case R_NDS32_GOT20:
5356 case R_NDS32_GOT_HI20:
5357 case R_NDS32_GOT_LO12:
5358 case R_NDS32_GOT_LO15:
5359 case R_NDS32_GOT_LO19:
5360 case R_NDS32_GOT15S2_RELA:
5361 case R_NDS32_GOT17S2_RELA:
5362 case R_NDS32_GOTPC20:
5363 case R_NDS32_GOTPC_HI20:
5364 case R_NDS32_GOTPC_LO12:
5365 case R_NDS32_GOTOFF:
5366 case R_NDS32_GOTOFF_HI20:
5367 case R_NDS32_GOTOFF_LO12:
5368 case R_NDS32_GOTOFF_LO15:
5369 case R_NDS32_GOTOFF_LO19:
5370 case R_NDS32_PLTREL_HI20:
5371 case R_NDS32_PLTREL_LO12:
5372 case R_NDS32_PLT_GOTREL_HI20:
5373 case R_NDS32_PLT_GOTREL_LO12:
5374 case R_NDS32_PLT_GOTREL_LO15:
5375 case R_NDS32_PLT_GOTREL_LO19:
5376 case R_NDS32_PLT_GOTREL_LO20:
5377 case R_NDS32_17IFC_PCREL_RELA:
5378 case R_NDS32_10IFCU_PCREL_RELA:
5379 case R_NDS32_TLS_LE_HI20:
5380 case R_NDS32_TLS_LE_LO12:
5381 case R_NDS32_TLS_IE_HI20:
5382 case R_NDS32_TLS_IE_LO12S2:
5383 case R_NDS32_TLS_LE_20:
5384 case R_NDS32_TLS_LE_15S0:
5385 case R_NDS32_TLS_LE_15S1:
5386 case R_NDS32_TLS_LE_15S2:
5387 /* Instruction related relocs must handle endian properly. */
5388 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
5389 r = nds32_elf_final_link_relocate (howto, input_bfd,
5390 input_section, contents,
5391 rel->r_offset, relocation,
5392 rel->r_addend);
5393 break;
5394
5395 default:
5396 /* All other relocs can use default handler. */
5397 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5398 contents, rel->r_offset,
5399 relocation, rel->r_addend);
5400 break;
5401 }
5402
5403 check_reloc:
5404
5405 if (r != bfd_reloc_ok)
5406 {
5407 /* FIXME: This should be generic enough to go in a utility. */
5408 const char *name;
5409
5410 if (h != NULL)
5411 name = h->root.root.string;
5412 else
5413 {
5414 name = bfd_elf_string_from_elf_section
5415 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5416 if (name == NULL || *name == '\0')
5417 name = bfd_section_name (input_bfd, sec);
5418 }
5419
5420 if (errmsg != NULL)
5421 goto common_error;
5422
5423 switch (r)
5424 {
5425 case bfd_reloc_overflow:
5426 if (!((*info->callbacks->reloc_overflow)
5427 (info, (h ? &h->root : NULL), name, howto->name,
5428 (bfd_vma) 0, input_bfd, input_section, offset)))
5429 return FALSE;
5430 break;
5431
5432 case bfd_reloc_undefined:
5433 if (!((*info->callbacks->undefined_symbol)
5434 (info, name, input_bfd, input_section, offset, TRUE)))
5435 return FALSE;
5436 break;
5437
5438 case bfd_reloc_outofrange:
5439 errmsg = _("internal error: out of range error");
5440 goto common_error;
5441
5442 case bfd_reloc_notsupported:
5443 errmsg = _("internal error: unsupported relocation error");
5444 goto common_error;
5445
5446 case bfd_reloc_dangerous:
5447 errmsg = _("internal error: dangerous error");
5448 goto common_error;
5449
5450 default:
5451 errmsg = _("internal error: unknown error");
5452 /* Fall through. */
5453
5454 common_error:
5455 if (!((*info->callbacks->warning)
5456 (info, errmsg, name, input_bfd, input_section, offset)))
5457 return FALSE;
5458 break;
5459 }
5460 }
5461 }
5462
5463 return ret;
5464 }
5465
5466 /* Finish up dynamic symbol handling. We set the contents of various
5467 dynamic sections here. */
5468
5469 static bfd_boolean
5470 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5471 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5472 {
5473 struct elf_nds32_link_hash_table *htab;
5474 bfd_byte *loc;
5475
5476 htab = nds32_elf_hash_table (info);
5477
5478 if (h->plt.offset != (bfd_vma) - 1)
5479 {
5480 asection *splt;
5481 asection *sgot;
5482 asection *srela;
5483
5484 bfd_vma plt_index;
5485 bfd_vma got_offset;
5486 bfd_vma local_plt_offset;
5487 Elf_Internal_Rela rela;
5488
5489 /* This symbol has an entry in the procedure linkage table. Set
5490 it up. */
5491
5492 BFD_ASSERT (h->dynindx != -1);
5493
5494 splt = htab->splt;
5495 sgot = htab->sgotplt;
5496 srela = htab->srelplt;
5497 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5498
5499 /* Get the index in the procedure linkage table which
5500 corresponds to this symbol. This is the index of this symbol
5501 in all the symbols for which we are making plt entries. The
5502 first entry in the procedure linkage table is reserved. */
5503 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5504
5505 /* Get the offset into the .got table of the entry that
5506 corresponds to this function. Each .got entry is 4 bytes.
5507 The first three are reserved. */
5508 got_offset = (plt_index + 3) * 4;
5509
5510 /* Fill in the entry in the procedure linkage table. */
5511 if (!bfd_link_pic (info))
5512 {
5513 unsigned long insn;
5514
5515 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5516 + sgot->output_offset + got_offset) >> 12)
5517 & 0xfffff);
5518 bfd_putb32 (insn, splt->contents + h->plt.offset);
5519
5520 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5521 + sgot->output_offset + got_offset) & 0x0fff)
5522 >> 2);
5523 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5524
5525 insn = PLT_ENTRY_WORD2;
5526 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5527
5528 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5529 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5530
5531 insn = PLT_ENTRY_WORD4
5532 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5533 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5534 local_plt_offset = 12;
5535 }
5536 else
5537 {
5538 /* sda_base must be set at this time. */
5539 unsigned long insn;
5540 long offset;
5541
5542 /* FIXME, sda_base is 65536, it will damage opcode. */
5543 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5544 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5545 - elf_gp (output_bfd);
5546 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5547 bfd_putb32 (insn, splt->contents + h->plt.offset);
5548
5549 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5550 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5551
5552 insn = PLT_PIC_ENTRY_WORD2;
5553 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5554
5555 insn = PLT_PIC_ENTRY_WORD3;
5556 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5557
5558 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5559 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5560
5561 insn = PLT_PIC_ENTRY_WORD5
5562 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5563 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5564
5565 local_plt_offset = 16;
5566 }
5567
5568 /* Fill in the entry in the global offset table,
5569 so it will fall through to the next instruction for the first time. */
5570 bfd_put_32 (output_bfd,
5571 (splt->output_section->vma + splt->output_offset
5572 + h->plt.offset + local_plt_offset),
5573 sgot->contents + got_offset);
5574
5575 /* Fill in the entry in the .rela.plt section. */
5576 rela.r_offset = (sgot->output_section->vma
5577 + sgot->output_offset + got_offset);
5578 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5579 rela.r_addend = 0;
5580 loc = srela->contents;
5581 loc += plt_index * sizeof (Elf32_External_Rela);
5582 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5583
5584 if (!h->def_regular)
5585 {
5586 /* Mark the symbol as undefined, rather than as defined in
5587 the .plt section. Leave the value alone. */
5588 sym->st_shndx = SHN_UNDEF;
5589 if (!h->ref_regular_nonweak)
5590 sym->st_value = 0;
5591 }
5592 }
5593
5594 if (h->got.offset != (bfd_vma) - 1)
5595 {
5596 asection *sgot;
5597 asection *srela;
5598 Elf_Internal_Rela rela;
5599
5600 /* This symbol has an entry in the global offset table.
5601 Set it up. */
5602
5603 sgot = htab->sgot;
5604 srela = htab->srelgot;
5605 BFD_ASSERT (sgot != NULL && srela != NULL);
5606
5607 rela.r_offset = (sgot->output_section->vma
5608 + sgot->output_offset + (h->got.offset & ~1));
5609
5610 /* If this is a -Bsymbolic link, and the symbol is defined
5611 locally, we just want to emit a RELATIVE reloc. Likewise if
5612 the symbol was forced to be local because of a version file.
5613 The entry in the global offset table will already have been
5614 initialized in the relocate_section function. */
5615 if (bfd_link_pic (info)
5616 && (info->symbolic
5617 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5618 {
5619 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5620 rela.r_addend = (h->root.u.def.value
5621 + h->root.u.def.section->output_section->vma
5622 + h->root.u.def.section->output_offset);
5623 }
5624 else
5625 {
5626 BFD_ASSERT ((h->got.offset & 1) == 0);
5627 bfd_put_32 (output_bfd, (bfd_vma) 0,
5628 sgot->contents + h->got.offset);
5629 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5630 rela.r_addend = 0;
5631 }
5632
5633 loc = srela->contents;
5634 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5635 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5636 ++srela->reloc_count;
5637 }
5638
5639 if (h->needs_copy)
5640 {
5641 asection *s;
5642 Elf_Internal_Rela rela;
5643
5644 /* This symbols needs a copy reloc. Set it up. */
5645
5646 BFD_ASSERT (h->dynindx != -1
5647 && (h->root.type == bfd_link_hash_defined
5648 || h->root.type == bfd_link_hash_defweak));
5649
5650 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5651 BFD_ASSERT (s != NULL);
5652
5653 rela.r_offset = (h->root.u.def.value
5654 + h->root.u.def.section->output_section->vma
5655 + h->root.u.def.section->output_offset);
5656 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5657 rela.r_addend = 0;
5658 loc = s->contents;
5659 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5660 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5661 ++s->reloc_count;
5662 }
5663
5664 /* Mark some specially defined symbols as absolute. */
5665 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5666 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5667 sym->st_shndx = SHN_ABS;
5668
5669 return TRUE;
5670 }
5671
5672
5673 /* Finish up the dynamic sections. */
5674
5675 static bfd_boolean
5676 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5677 {
5678 struct elf_nds32_link_hash_table *htab;
5679 bfd *dynobj;
5680 asection *sdyn;
5681 asection *sgot;
5682
5683 htab = nds32_elf_hash_table (info);
5684 dynobj = htab->root.dynobj;
5685
5686 sgot = htab->sgotplt;
5687 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5688
5689 if (htab->root.dynamic_sections_created)
5690 {
5691 asection *splt;
5692 Elf32_External_Dyn *dyncon, *dynconend;
5693
5694 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5695
5696 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5697 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5698
5699 for (; dyncon < dynconend; dyncon++)
5700 {
5701 Elf_Internal_Dyn dyn;
5702 asection *s;
5703
5704 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5705
5706 switch (dyn.d_tag)
5707 {
5708 default:
5709 break;
5710
5711 case DT_PLTGOT:
5712 /* name = ".got"; */
5713 s = htab->sgot->output_section;
5714 goto get_vma;
5715 case DT_JMPREL:
5716 s = htab->srelplt->output_section;
5717 get_vma:
5718 BFD_ASSERT (s != NULL);
5719 dyn.d_un.d_ptr = s->vma;
5720 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5721 break;
5722
5723 case DT_PLTRELSZ:
5724 s = htab->srelplt->output_section;
5725 BFD_ASSERT (s != NULL);
5726 dyn.d_un.d_val = s->size;
5727 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5728 break;
5729
5730 case DT_RELASZ:
5731 /* My reading of the SVR4 ABI indicates that the
5732 procedure linkage table relocs (DT_JMPREL) should be
5733 included in the overall relocs (DT_RELA). This is
5734 what Solaris does. However, UnixWare can not handle
5735 that case. Therefore, we override the DT_RELASZ entry
5736 here to make it not include the JMPREL relocs. Since
5737 the linker script arranges for .rela.plt to follow all
5738 other relocation sections, we don't have to worry
5739 about changing the DT_RELA entry. */
5740 if (htab->srelplt != NULL)
5741 {
5742 s = htab->srelplt->output_section;
5743 dyn.d_un.d_val -= s->size;
5744 }
5745 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5746 break;
5747 }
5748 }
5749
5750 /* Fill in the first entry in the procedure linkage table. */
5751 splt = htab->splt;
5752 if (splt && splt->size > 0)
5753 {
5754 if (bfd_link_pic (info))
5755 {
5756 unsigned long insn;
5757 long offset;
5758
5759 /* FIXME, sda_base is 65536, it will damage opcode. */
5760 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5761 offset = sgot->output_section->vma + sgot->output_offset + 4
5762 - elf_gp (output_bfd);
5763 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5764 bfd_putb32 (insn, splt->contents);
5765
5766 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5767 /* here has a typo? */
5768 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5769 bfd_putb32 (insn, splt->contents + 4);
5770
5771 insn = PLT0_PIC_ENTRY_WORD2;
5772 bfd_putb32 (insn, splt->contents + 8);
5773
5774 insn = PLT0_PIC_ENTRY_WORD3;
5775 bfd_putb32 (insn, splt->contents + 12);
5776
5777 insn = PLT0_PIC_ENTRY_WORD4;
5778 bfd_putb32 (insn, splt->contents + 16);
5779
5780 insn = PLT0_PIC_ENTRY_WORD5;
5781 bfd_putb32 (insn, splt->contents + 20);
5782 }
5783 else
5784 {
5785 unsigned long insn;
5786 unsigned long addr;
5787
5788 /* addr = .got + 4 */
5789 addr = sgot->output_section->vma + sgot->output_offset + 4;
5790 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5791 bfd_putb32 (insn, splt->contents);
5792
5793 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5794 bfd_putb32 (insn, splt->contents + 4);
5795
5796 insn = PLT0_ENTRY_WORD2;
5797 bfd_putb32 (insn, splt->contents + 8);
5798
5799 insn = PLT0_ENTRY_WORD3;
5800 bfd_putb32 (insn, splt->contents + 12);
5801
5802 insn = PLT0_ENTRY_WORD4;
5803 bfd_putb32 (insn, splt->contents + 16);
5804 }
5805
5806 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5807 PLT_ENTRY_SIZE;
5808 }
5809 }
5810
5811 /* Fill in the first three entries in the global offset table. */
5812 if (sgot && sgot->size > 0)
5813 {
5814 if (sdyn == NULL)
5815 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5816 else
5817 bfd_put_32 (output_bfd,
5818 sdyn->output_section->vma + sdyn->output_offset,
5819 sgot->contents);
5820 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5821 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5822
5823 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5824 }
5825
5826 return TRUE;
5827 }
5828 \f
5829
5830 /* Set the right machine number. */
5831
5832 static bfd_boolean
5833 nds32_elf_object_p (bfd *abfd)
5834 {
5835 static unsigned int cur_arch = 0;
5836
5837 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5838 {
5839 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5840 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5841 }
5842
5843 switch (cur_arch)
5844 {
5845 default:
5846 case E_N1_ARCH:
5847 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5848 break;
5849 case E_N1H_ARCH:
5850 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5851 break;
5852 case E_NDS_ARCH_STAR_V2_0:
5853 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5854 break;
5855 case E_NDS_ARCH_STAR_V3_0:
5856 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5857 break;
5858 case E_NDS_ARCH_STAR_V3_M:
5859 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5860 break;
5861 }
5862
5863 return TRUE;
5864 }
5865
5866 /* Store the machine number in the flags field. */
5867
5868 static void
5869 nds32_elf_final_write_processing (bfd *abfd,
5870 bfd_boolean linker ATTRIBUTE_UNUSED)
5871 {
5872 unsigned long val;
5873 static unsigned int cur_mach = 0;
5874
5875 if (bfd_mach_n1 != bfd_get_mach (abfd))
5876 {
5877 cur_mach = bfd_get_mach (abfd);
5878 }
5879
5880 switch (cur_mach)
5881 {
5882 case bfd_mach_n1:
5883 /* Only happen when object is empty, since the case is abandon. */
5884 val = E_N1_ARCH;
5885 val |= E_NDS_ABI_AABI;
5886 val |= E_NDS32_ELF_VER_1_4;
5887 break;
5888 case bfd_mach_n1h:
5889 val = E_N1H_ARCH;
5890 break;
5891 case bfd_mach_n1h_v2:
5892 val = E_NDS_ARCH_STAR_V2_0;
5893 break;
5894 case bfd_mach_n1h_v3:
5895 val = E_NDS_ARCH_STAR_V3_0;
5896 break;
5897 case bfd_mach_n1h_v3m:
5898 val = E_NDS_ARCH_STAR_V3_M;
5899 break;
5900 default:
5901 val = 0;
5902 break;
5903 }
5904
5905 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5906 elf_elfheader (abfd)->e_flags |= val;
5907 }
5908
5909 /* Function to keep NDS32 specific file flags. */
5910
5911 static bfd_boolean
5912 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5913 {
5914 BFD_ASSERT (!elf_flags_init (abfd)
5915 || elf_elfheader (abfd)->e_flags == flags);
5916
5917 elf_elfheader (abfd)->e_flags = flags;
5918 elf_flags_init (abfd) = TRUE;
5919 return TRUE;
5920 }
5921
5922 static unsigned int
5923 convert_e_flags (unsigned int e_flags, unsigned int arch)
5924 {
5925 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5926 {
5927 /* From 0.9 to 1.0. */
5928 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5929
5930 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5931 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5932 if (arch == E_NDS_ARCH_STAR_V1_0)
5933 {
5934 /* Done. */
5935 return e_flags;
5936 }
5937 }
5938
5939 /* From 1.0 to 2.0. */
5940 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5941
5942 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5943 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5944
5945 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5946 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5947 return e_flags;
5948 }
5949
5950 static bfd_boolean
5951 nds32_check_vec_size (bfd *ibfd)
5952 {
5953 static unsigned int nds32_vec_size = 0;
5954
5955 asection *sec_t = NULL;
5956 bfd_byte *contents = NULL;
5957
5958 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5959
5960 if (sec_t && sec_t->size >= 4)
5961 {
5962 /* Get vec_size in file. */
5963 unsigned int flag_t;
5964
5965 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
5966 flag_t = bfd_get_32 (ibfd, contents);
5967
5968 /* The value could only be 4 or 16. */
5969
5970 if (!nds32_vec_size)
5971 /* Set if not set yet. */
5972 nds32_vec_size = (flag_t & 0x3);
5973 else if (nds32_vec_size != (flag_t & 0x3))
5974 {
5975 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5976 " with previous modules, previous %u-byte, current %u-byte"),
5977 ibfd,
5978 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5979 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5980 return FALSE;
5981 }
5982 else
5983 /* Only keep the first vec_size section. */
5984 sec_t->flags |= SEC_EXCLUDE;
5985 }
5986
5987 return TRUE;
5988 }
5989
5990 /* Merge backend specific data from an object file to the output
5991 object file when linking. */
5992
5993 static bfd_boolean
5994 nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5995 {
5996 flagword out_flags;
5997 flagword in_flags;
5998 flagword out_16regs;
5999 flagword in_no_mac;
6000 flagword out_no_mac;
6001 flagword in_16regs;
6002 flagword out_version;
6003 flagword in_version;
6004 flagword out_fpu_config;
6005 flagword in_fpu_config;
6006
6007 /* TODO: Revise to use object-attributes instead. */
6008 if (!nds32_check_vec_size (ibfd))
6009 return FALSE;
6010
6011 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6012 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6013 return TRUE;
6014
6015 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6016 {
6017 (*_bfd_error_handler)
6018 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6019
6020 bfd_set_error (bfd_error_bad_value);
6021 return FALSE;
6022 }
6023
6024 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6025 if (in_version == E_NDS32_ELF_VER_1_2)
6026 {
6027 (*_bfd_error_handler)
6028 (_("%B: warning: Older version of object file encountered, "
6029 "Please recompile with current tool chain."), ibfd);
6030 }
6031
6032 /* We may need to merge V1 and V2 arch object files to V2. */
6033 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6034 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6035 {
6036 /* Need to convert version. */
6037 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6038 == E_NDS_ARCH_STAR_RESERVED)
6039 {
6040 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6041 }
6042 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6043 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6044 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6045 {
6046 elf_elfheader (obfd)->e_flags =
6047 convert_e_flags (elf_elfheader (obfd)->e_flags,
6048 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6049 }
6050 else
6051 {
6052 elf_elfheader (ibfd)->e_flags =
6053 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6054 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6055 }
6056 }
6057
6058 /* Extract some flags. */
6059 in_flags = elf_elfheader (ibfd)->e_flags
6060 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6061 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6062
6063 /* The following flags need special treatment. */
6064 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6065 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6066 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6067
6068 /* Extract some flags. */
6069 out_flags = elf_elfheader (obfd)->e_flags
6070 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6071 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6072
6073 /* The following flags need special treatment. */
6074 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6075 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6076 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6077 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6078 if (!elf_flags_init (obfd))
6079 {
6080 /* If the input is the default architecture then do not
6081 bother setting the flags for the output architecture,
6082 instead allow future merges to do this. If no future
6083 merges ever set these flags then they will retain their
6084 unitialised values, which surprise surprise, correspond
6085 to the default values. */
6086 if (bfd_get_arch_info (ibfd)->the_default)
6087 return TRUE;
6088
6089 elf_flags_init (obfd) = TRUE;
6090 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6091
6092 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6093 && bfd_get_arch_info (obfd)->the_default)
6094 {
6095 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6096 bfd_get_mach (ibfd));
6097 }
6098
6099 return TRUE;
6100 }
6101
6102 /* Check flag compatibility. */
6103 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6104 {
6105 (*_bfd_error_handler)
6106 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6107
6108 bfd_set_error (bfd_error_bad_value);
6109 return FALSE;
6110 }
6111
6112 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6113 {
6114 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6115 {
6116 (*_bfd_error_handler)
6117 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6118
6119 bfd_set_error (bfd_error_bad_value);
6120 return FALSE;
6121 }
6122 }
6123
6124 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6125 and perf ext1 and DIV are mergerd to perf ext1. */
6126 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6127 {
6128 elf_elfheader (obfd)->e_flags =
6129 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6130 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6131 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6132 ? E_NDS32_HAS_EXT_INST : 0)
6133 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6134 ? E_NDS32_HAS_EXT_INST : 0)
6135 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6136 | ((in_version > out_version) ? out_version : in_version);
6137 }
6138 else
6139 {
6140 if (in_version != out_version)
6141 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6142 ibfd, nds32_elfver_strtab[out_version],
6143 nds32_elfver_strtab[in_version]);
6144
6145 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6146 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6147 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6148 | (in_version > out_version ? out_version : in_version);
6149 }
6150
6151 return TRUE;
6152 }
6153
6154 /* Display the flags field. */
6155
6156 static bfd_boolean
6157 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6158 {
6159 FILE *file = (FILE *) ptr;
6160
6161 BFD_ASSERT (abfd != NULL && ptr != NULL);
6162
6163 _bfd_elf_print_private_bfd_data (abfd, ptr);
6164
6165 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6166
6167 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6168 {
6169 default:
6170 case E_N1_ARCH:
6171 fprintf (file, _(": n1 instructions"));
6172 break;
6173 case E_N1H_ARCH:
6174 fprintf (file, _(": n1h instructions"));
6175 break;
6176 }
6177
6178 fputc ('\n', file);
6179
6180 return TRUE;
6181 }
6182
6183 static unsigned int
6184 nds32_elf_action_discarded (asection *sec)
6185 {
6186
6187 if (strncmp
6188 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6189 return 0;
6190
6191 return _bfd_elf_default_action_discarded (sec);
6192 }
6193
6194 static asection *
6195 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6196 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6197 Elf_Internal_Sym *sym)
6198 {
6199 if (h != NULL)
6200 switch (ELF32_R_TYPE (rel->r_info))
6201 {
6202 case R_NDS32_GNU_VTINHERIT:
6203 case R_NDS32_GNU_VTENTRY:
6204 case R_NDS32_RELA_GNU_VTINHERIT:
6205 case R_NDS32_RELA_GNU_VTENTRY:
6206 return NULL;
6207 }
6208
6209 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6210 }
6211
6212 static bfd_boolean
6213 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6214 const Elf_Internal_Rela *relocs)
6215 {
6216 /* Update the got entry reference counts for the section being removed. */
6217 Elf_Internal_Shdr *symtab_hdr;
6218 struct elf_link_hash_entry **sym_hashes;
6219 bfd_signed_vma *local_got_refcounts;
6220 const Elf_Internal_Rela *rel, *relend;
6221
6222 elf_section_data (sec)->local_dynrel = NULL;
6223
6224 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6225 sym_hashes = elf_sym_hashes (abfd);
6226 local_got_refcounts = elf_local_got_refcounts (abfd);
6227
6228 relend = relocs + sec->reloc_count;
6229 for (rel = relocs; rel < relend; rel++)
6230 {
6231 unsigned long r_symndx;
6232 struct elf_link_hash_entry *h = NULL;
6233
6234 r_symndx = ELF32_R_SYM (rel->r_info);
6235 if (r_symndx >= symtab_hdr->sh_info)
6236 {
6237 /* External symbol. */
6238 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6239 while (h->root.type == bfd_link_hash_indirect
6240 || h->root.type == bfd_link_hash_warning)
6241 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6242 }
6243
6244 switch (ELF32_R_TYPE (rel->r_info))
6245 {
6246 case R_NDS32_GOT_HI20:
6247 case R_NDS32_GOT_LO12:
6248 case R_NDS32_GOT_LO15:
6249 case R_NDS32_GOT_LO19:
6250 case R_NDS32_GOT17S2_RELA:
6251 case R_NDS32_GOT15S2_RELA:
6252 case R_NDS32_GOTOFF:
6253 case R_NDS32_GOTOFF_HI20:
6254 case R_NDS32_GOTOFF_LO12:
6255 case R_NDS32_GOTOFF_LO15:
6256 case R_NDS32_GOTOFF_LO19:
6257 case R_NDS32_GOT20:
6258 case R_NDS32_GOTPC_HI20:
6259 case R_NDS32_GOTPC_LO12:
6260 case R_NDS32_GOTPC20:
6261 if (h != NULL)
6262 {
6263 if (h->got.refcount > 0)
6264 h->got.refcount--;
6265 }
6266 else
6267 {
6268 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6269 local_got_refcounts[r_symndx]--;
6270 }
6271 break;
6272
6273 case R_NDS32_16_RELA:
6274 case R_NDS32_20_RELA:
6275 case R_NDS32_5_RELA:
6276 case R_NDS32_32_RELA:
6277 case R_NDS32_HI20_RELA:
6278 case R_NDS32_LO12S3_RELA:
6279 case R_NDS32_LO12S2_RELA:
6280 case R_NDS32_LO12S2_DP_RELA:
6281 case R_NDS32_LO12S2_SP_RELA:
6282 case R_NDS32_LO12S1_RELA:
6283 case R_NDS32_LO12S0_RELA:
6284 case R_NDS32_LO12S0_ORI_RELA:
6285 case R_NDS32_SDA16S3_RELA:
6286 case R_NDS32_SDA17S2_RELA:
6287 case R_NDS32_SDA18S1_RELA:
6288 case R_NDS32_SDA19S0_RELA:
6289 case R_NDS32_SDA15S3_RELA:
6290 case R_NDS32_SDA15S2_RELA:
6291 case R_NDS32_SDA12S2_DP_RELA:
6292 case R_NDS32_SDA12S2_SP_RELA:
6293 case R_NDS32_SDA15S1_RELA:
6294 case R_NDS32_SDA15S0_RELA:
6295 case R_NDS32_SDA_FP7U2_RELA:
6296 case R_NDS32_15_PCREL_RELA:
6297 case R_NDS32_17_PCREL_RELA:
6298 case R_NDS32_25_PCREL_RELA:
6299 if (h != NULL)
6300 {
6301 struct elf_nds32_link_hash_entry *eh;
6302 struct elf_nds32_dyn_relocs **pp;
6303 struct elf_nds32_dyn_relocs *p;
6304
6305 if (!bfd_link_pic (info) && h->plt.refcount > 0)
6306 h->plt.refcount -= 1;
6307
6308 eh = (struct elf_nds32_link_hash_entry *) h;
6309
6310 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6311 if (p->sec == sec)
6312 {
6313 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6314 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6315 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6316 p->pc_count -= 1;
6317 p->count -= 1;
6318 if (p->count == 0)
6319 *pp = p->next;
6320 break;
6321 }
6322 }
6323 break;
6324
6325 case R_NDS32_9_PLTREL:
6326 case R_NDS32_25_PLTREL:
6327 if (h != NULL)
6328 {
6329 if (h->plt.refcount > 0)
6330 h->plt.refcount--;
6331 }
6332 break;
6333
6334 default:
6335 break;
6336 }
6337 }
6338
6339 return TRUE;
6340 }
6341
6342 /* Look through the relocs for a section during the first phase.
6343 Since we don't do .gots or .plts, we just need to consider the
6344 virtual table relocs for gc. */
6345
6346 static bfd_boolean
6347 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6348 asection *sec, const Elf_Internal_Rela *relocs)
6349 {
6350 Elf_Internal_Shdr *symtab_hdr;
6351 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6352 const Elf_Internal_Rela *rel;
6353 const Elf_Internal_Rela *rel_end;
6354 struct elf_nds32_link_hash_table *htab;
6355 bfd *dynobj;
6356 asection *sreloc = NULL;
6357
6358 if (bfd_link_relocatable (info))
6359 return TRUE;
6360
6361 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6362 sym_hashes = elf_sym_hashes (abfd);
6363 sym_hashes_end =
6364 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6365 if (!elf_bad_symtab (abfd))
6366 sym_hashes_end -= symtab_hdr->sh_info;
6367
6368 htab = nds32_elf_hash_table (info);
6369 dynobj = htab->root.dynobj;
6370
6371 rel_end = relocs + sec->reloc_count;
6372 for (rel = relocs; rel < rel_end; rel++)
6373 {
6374 enum elf_nds32_reloc_type r_type;
6375 struct elf_link_hash_entry *h;
6376 unsigned long r_symndx;
6377 int tls_type, old_tls_type;
6378
6379 r_symndx = ELF32_R_SYM (rel->r_info);
6380 r_type = ELF32_R_TYPE (rel->r_info);
6381 if (r_symndx < symtab_hdr->sh_info)
6382 h = NULL;
6383 else
6384 {
6385 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6386 while (h->root.type == bfd_link_hash_indirect
6387 || h->root.type == bfd_link_hash_warning)
6388 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6389 }
6390
6391 /* Some relocs require a global offset table. We create
6392 got section here, since these relocation need got section
6393 and it is not created yet. */
6394 if (htab->sgot == NULL)
6395 {
6396 switch (r_type)
6397 {
6398 case R_NDS32_GOT_HI20:
6399 case R_NDS32_GOT_LO12:
6400 case R_NDS32_GOT_LO15:
6401 case R_NDS32_GOT_LO19:
6402 case R_NDS32_GOT17S2_RELA:
6403 case R_NDS32_GOT15S2_RELA:
6404 case R_NDS32_GOTOFF:
6405 case R_NDS32_GOTOFF_HI20:
6406 case R_NDS32_GOTOFF_LO12:
6407 case R_NDS32_GOTOFF_LO15:
6408 case R_NDS32_GOTOFF_LO19:
6409 case R_NDS32_GOTPC20:
6410 case R_NDS32_GOTPC_HI20:
6411 case R_NDS32_GOTPC_LO12:
6412 case R_NDS32_GOT20:
6413 case R_NDS32_TLS_IE_HI20:
6414 case R_NDS32_TLS_IE_LO12S2:
6415 if (dynobj == NULL)
6416 htab->root.dynobj = dynobj = abfd;
6417 if (!create_got_section (dynobj, info))
6418 return FALSE;
6419 break;
6420
6421 default:
6422 break;
6423 }
6424 }
6425
6426 switch ((int) r_type)
6427 {
6428 case R_NDS32_GOT_HI20:
6429 case R_NDS32_GOT_LO12:
6430 case R_NDS32_GOT_LO15:
6431 case R_NDS32_GOT_LO19:
6432 case R_NDS32_GOT20:
6433 case R_NDS32_TLS_IE_HI20:
6434 case R_NDS32_TLS_IE_LO12S2:
6435 switch (r_type)
6436 {
6437 case R_NDS32_TLS_IE_HI20:
6438 case R_NDS32_TLS_IE_LO12S2:
6439 tls_type = GOT_TLS_IE;
6440 break;
6441 default:
6442 tls_type = GOT_NORMAL;
6443 break;
6444 }
6445 if (h != NULL)
6446 {
6447 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6448 h->got.refcount += 1;
6449 }
6450 else
6451 {
6452 bfd_signed_vma *local_got_refcounts;
6453
6454 /* This is a global offset table entry for a local
6455 symbol. */
6456 local_got_refcounts = elf_local_got_refcounts (abfd);
6457 if (local_got_refcounts == NULL)
6458 {
6459 bfd_size_type size;
6460
6461 size = symtab_hdr->sh_info;
6462 size *= sizeof (bfd_signed_vma);
6463 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6464 if (local_got_refcounts == NULL)
6465 return FALSE;
6466 elf_local_got_refcounts (abfd) = local_got_refcounts;
6467 }
6468 local_got_refcounts[r_symndx] += 1;
6469 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6470 }
6471
6472 /* We will already have issued an error message if there
6473 is a TLS/non-TLS mismatch, based on the symbol
6474 type. So just combine any TLS types needed. */
6475 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6476 && tls_type != GOT_NORMAL)
6477 tls_type |= old_tls_type;
6478
6479 if (old_tls_type != tls_type)
6480 {
6481 if (h != NULL)
6482 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6483 else
6484 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6485 }
6486 break;
6487 case R_NDS32_9_PLTREL:
6488 case R_NDS32_25_PLTREL:
6489 case R_NDS32_PLTREL_HI20:
6490 case R_NDS32_PLTREL_LO12:
6491 case R_NDS32_PLT_GOTREL_HI20:
6492 case R_NDS32_PLT_GOTREL_LO12:
6493 case R_NDS32_PLT_GOTREL_LO15:
6494 case R_NDS32_PLT_GOTREL_LO19:
6495 case R_NDS32_PLT_GOTREL_LO20:
6496
6497 /* This symbol requires a procedure linkage table entry. We
6498 actually build the entry in adjust_dynamic_symbol,
6499 because this might be a case of linking PIC code without
6500 linking in any dynamic objects, in which case we don't
6501 need to generate a procedure linkage table after all. */
6502
6503 /* If this is a local symbol, we resolve it directly without
6504 creating a procedure linkage table entry. */
6505 if (h == NULL)
6506 continue;
6507
6508 if (h->forced_local)
6509 break;
6510
6511 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6512 h->needs_plt = 1;
6513 h->plt.refcount += 1;
6514 break;
6515
6516 case R_NDS32_16_RELA:
6517 case R_NDS32_20_RELA:
6518 case R_NDS32_5_RELA:
6519 case R_NDS32_32_RELA:
6520 case R_NDS32_HI20_RELA:
6521 case R_NDS32_LO12S3_RELA:
6522 case R_NDS32_LO12S2_RELA:
6523 case R_NDS32_LO12S2_DP_RELA:
6524 case R_NDS32_LO12S2_SP_RELA:
6525 case R_NDS32_LO12S1_RELA:
6526 case R_NDS32_LO12S0_RELA:
6527 case R_NDS32_LO12S0_ORI_RELA:
6528 case R_NDS32_SDA16S3_RELA:
6529 case R_NDS32_SDA17S2_RELA:
6530 case R_NDS32_SDA18S1_RELA:
6531 case R_NDS32_SDA19S0_RELA:
6532 case R_NDS32_SDA15S3_RELA:
6533 case R_NDS32_SDA15S2_RELA:
6534 case R_NDS32_SDA12S2_DP_RELA:
6535 case R_NDS32_SDA12S2_SP_RELA:
6536 case R_NDS32_SDA15S1_RELA:
6537 case R_NDS32_SDA15S0_RELA:
6538 case R_NDS32_SDA_FP7U2_RELA:
6539 case R_NDS32_15_PCREL_RELA:
6540 case R_NDS32_17_PCREL_RELA:
6541 case R_NDS32_25_PCREL_RELA:
6542
6543 if (h != NULL && !bfd_link_pic (info))
6544 {
6545 h->non_got_ref = 1;
6546 h->plt.refcount += 1;
6547 }
6548
6549 /* If we are creating a shared library, and this is a reloc against
6550 a global symbol, or a non PC relative reloc against a local
6551 symbol, then we need to copy the reloc into the shared library.
6552 However, if we are linking with -Bsymbolic, we do not need to
6553 copy a reloc against a global symbol which is defined in an
6554 object we are including in the link (i.e., DEF_REGULAR is set).
6555 At this point we have not seen all the input files, so it is
6556 possible that DEF_REGULAR is not set now but will be set later
6557 (it is never cleared). We account for that possibility below by
6558 storing information in the dyn_relocs field of the hash table
6559 entry. A similar situation occurs when creating shared libraries
6560 and symbol visibility changes render the symbol local.
6561
6562 If on the other hand, we are creating an executable, we may need
6563 to keep relocations for symbols satisfied by a dynamic library
6564 if we manage to avoid copy relocs for the symbol. */
6565 if ((bfd_link_pic (info)
6566 && (sec->flags & SEC_ALLOC) != 0
6567 && ((r_type != R_NDS32_25_PCREL_RELA
6568 && r_type != R_NDS32_15_PCREL_RELA
6569 && r_type != R_NDS32_17_PCREL_RELA
6570 && !(r_type == R_NDS32_32_RELA
6571 && strcmp (sec->name, ".eh_frame") == 0))
6572 || (h != NULL
6573 && (!info->symbolic
6574 || h->root.type == bfd_link_hash_defweak
6575 || !h->def_regular))))
6576 || (!bfd_link_pic (info)
6577 && (sec->flags & SEC_ALLOC) != 0
6578 && h != NULL
6579 && (h->root.type == bfd_link_hash_defweak
6580 || !h->def_regular)))
6581 {
6582 struct elf_nds32_dyn_relocs *p;
6583 struct elf_nds32_dyn_relocs **head;
6584
6585 if (dynobj == NULL)
6586 htab->root.dynobj = dynobj = abfd;
6587
6588 /* When creating a shared object, we must copy these
6589 relocs into the output file. We create a reloc
6590 section in dynobj and make room for the reloc. */
6591 if (sreloc == NULL)
6592 {
6593 const char *name;
6594
6595 name = bfd_elf_string_from_elf_section
6596 (abfd, elf_elfheader (abfd)->e_shstrndx,
6597 elf_section_data (sec)->rela.hdr->sh_name);
6598 if (name == NULL)
6599 return FALSE;
6600
6601 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6602 && strcmp (bfd_get_section_name (abfd, sec),
6603 name + 5) == 0);
6604
6605 sreloc = bfd_get_section_by_name (dynobj, name);
6606 if (sreloc == NULL)
6607 {
6608 flagword flags;
6609
6610 sreloc = bfd_make_section (dynobj, name);
6611 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6612 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6613 if ((sec->flags & SEC_ALLOC) != 0)
6614 flags |= SEC_ALLOC | SEC_LOAD;
6615 if (sreloc == NULL
6616 || !bfd_set_section_flags (dynobj, sreloc, flags)
6617 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6618 return FALSE;
6619
6620 elf_section_type (sreloc) = SHT_RELA;
6621 }
6622 elf_section_data (sec)->sreloc = sreloc;
6623 }
6624
6625 /* If this is a global symbol, we count the number of
6626 relocations we need for this symbol. */
6627 if (h != NULL)
6628 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6629 else
6630 {
6631 asection *s;
6632
6633 Elf_Internal_Sym *isym;
6634 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6635 if (isym == NULL)
6636 return FALSE;
6637
6638 /* Track dynamic relocs needed for local syms too. */
6639 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6640 if (s == NULL)
6641 return FALSE;
6642
6643 head = ((struct elf_nds32_dyn_relocs **)
6644 &elf_section_data (s)->local_dynrel);
6645 }
6646
6647 p = *head;
6648 if (p == NULL || p->sec != sec)
6649 {
6650 bfd_size_type amt = sizeof (*p);
6651 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6652 if (p == NULL)
6653 return FALSE;
6654 p->next = *head;
6655 *head = p;
6656 p->sec = sec;
6657 p->count = 0;
6658 p->pc_count = 0;
6659 }
6660
6661 p->count += 1;
6662 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6663 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6664 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6665 p->pc_count += 1;
6666 }
6667 break;
6668
6669 /* This relocation describes the C++ object vtable hierarchy.
6670 Reconstruct it for later use during GC. */
6671 case R_NDS32_RELA_GNU_VTINHERIT:
6672 case R_NDS32_GNU_VTINHERIT:
6673 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6674 return FALSE;
6675 break;
6676
6677 /* This relocation describes which C++ vtable entries are actually
6678 used. Record for later use during GC. */
6679 case R_NDS32_GNU_VTENTRY:
6680 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6681 return FALSE;
6682 break;
6683 case R_NDS32_RELA_GNU_VTENTRY:
6684 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6685 return FALSE;
6686 break;
6687 }
6688 }
6689
6690 return TRUE;
6691 }
6692
6693 /* Write VAL in uleb128 format to P, returning a pointer to the
6694 following byte.
6695 This code is copied from elf-attr.c. */
6696
6697 static bfd_byte *
6698 write_uleb128 (bfd_byte *p, unsigned int val)
6699 {
6700 bfd_byte c;
6701 do
6702 {
6703 c = val & 0x7f;
6704 val >>= 7;
6705 if (val)
6706 c |= 0x80;
6707 *(p++) = c;
6708 }
6709 while (val);
6710 return p;
6711 }
6712
6713 static bfd_signed_vma
6714 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6715 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6716 int *pic_ext_target)
6717 {
6718 bfd_signed_vma foff;
6719 bfd_vma symval, addend;
6720 asection *sym_sec;
6721
6722 /* Get the value of the symbol referred to by the reloc. */
6723 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6724 {
6725 Elf_Internal_Sym *isym;
6726
6727 /* A local symbol. */
6728 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6729
6730 if (isym->st_shndx == SHN_UNDEF)
6731 sym_sec = bfd_und_section_ptr;
6732 else if (isym->st_shndx == SHN_ABS)
6733 sym_sec = bfd_abs_section_ptr;
6734 else if (isym->st_shndx == SHN_COMMON)
6735 sym_sec = bfd_com_section_ptr;
6736 else
6737 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6738 symval = isym->st_value + sym_sec->output_section->vma
6739 + sym_sec->output_offset;
6740 }
6741 else
6742 {
6743 unsigned long indx;
6744 struct elf_link_hash_entry *h;
6745 bfd *owner;
6746
6747 /* An external symbol. */
6748 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6749 h = elf_sym_hashes (abfd)[indx];
6750 BFD_ASSERT (h != NULL);
6751
6752 if (h->root.type != bfd_link_hash_defined
6753 && h->root.type != bfd_link_hash_defweak)
6754 /* This appears to be a reference to an undefined
6755 symbol. Just ignore it--it will be caught by the
6756 regular reloc processing. */
6757 return 0;
6758 owner = h->root.u.def.section->owner;
6759 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6760 *pic_ext_target = 1;
6761
6762 if (h->root.u.def.section->flags & SEC_MERGE)
6763 {
6764 sym_sec = h->root.u.def.section;
6765 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6766 elf_section_data (sym_sec)->sec_info,
6767 h->root.u.def.value);
6768 symval = symval + sym_sec->output_section->vma
6769 + sym_sec->output_offset;
6770 }
6771 else
6772 symval = (h->root.u.def.value
6773 + h->root.u.def.section->output_section->vma
6774 + h->root.u.def.section->output_offset);
6775 }
6776
6777 addend = irel->r_addend;
6778
6779 foff = (symval + addend
6780 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6781 return foff;
6782 }
6783
6784 static bfd_vma
6785 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6786 Elf_Internal_Sym *isymbuf,
6787 Elf_Internal_Rela *irel,
6788 Elf_Internal_Shdr *symtab_hdr)
6789 {
6790 bfd_vma symval;
6791
6792 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6793 {
6794 Elf_Internal_Sym *isym;
6795 asection *sym_sec;
6796 /* A local symbol. */
6797 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6798
6799 if (isym->st_shndx == SHN_UNDEF)
6800 sym_sec = bfd_und_section_ptr;
6801 else if (isym->st_shndx == SHN_ABS)
6802 sym_sec = bfd_abs_section_ptr;
6803 else if (isym->st_shndx == SHN_COMMON)
6804 sym_sec = bfd_com_section_ptr;
6805 else
6806 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6807 symval = isym->st_value + sym_sec->output_section->vma
6808 + sym_sec->output_offset;
6809 }
6810 else
6811 {
6812 unsigned long indx;
6813 struct elf_link_hash_entry *h;
6814 struct elf_nds32_link_hash_table *htab;
6815 asection *splt;
6816
6817 /* An external symbol. */
6818 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6819 h = elf_sym_hashes (abfd)[indx];
6820 BFD_ASSERT (h != NULL);
6821 htab = nds32_elf_hash_table (link_info);
6822 splt = htab->splt;
6823
6824 while (h->root.type == bfd_link_hash_indirect
6825 || h->root.type == bfd_link_hash_warning)
6826 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6827
6828 if (h->plt.offset == (bfd_vma) - 1)
6829 {
6830 if (h->root.type != bfd_link_hash_defined
6831 && h->root.type != bfd_link_hash_defweak)
6832 /* This appears to be a reference to an undefined
6833 * symbol. Just ignore it--it will be caught by the
6834 * regular reloc processing. */
6835 return 0;
6836 symval = (h->root.u.def.value
6837 + h->root.u.def.section->output_section->vma
6838 + h->root.u.def.section->output_offset);
6839 }
6840 else
6841 symval = splt->output_section->vma + h->plt.offset;
6842 }
6843
6844 return symval;
6845 }
6846
6847 static bfd_signed_vma
6848 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6849 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6850 Elf_Internal_Shdr *symtab_hdr)
6851 {
6852 bfd_vma foff;
6853 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6854 symtab_hdr)) == 0)
6855 return 0;
6856 else
6857 return foff - (irel->r_offset
6858 + sec->output_section->vma + sec->output_offset);
6859 }
6860 \f
6861 /* Convert a 32-bit instruction to 16-bit one.
6862 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6863 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6864 type of INSN16. Return 1 if successful. */
6865
6866 static int
6867 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6868 int *pinsn_type)
6869 {
6870 uint16_t insn16 = 0;
6871 int insn_type;
6872 unsigned long mach = bfd_get_mach (abfd);
6873
6874 if (N32_SH5 (insn) != 0)
6875 return 0;
6876
6877 switch (N32_SUB5 (insn))
6878 {
6879 case N32_ALU1_ADD_SLLI:
6880 case N32_ALU1_ADD_SRLI:
6881 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6882 {
6883 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6884 N32_RB5 (insn));
6885 insn_type = NDS32_INSN_ADD333;
6886 }
6887 else if (N32_IS_RT4 (insn))
6888 {
6889 if (N32_RT5 (insn) == N32_RA5 (insn))
6890 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6891 else if (N32_RT5 (insn) == N32_RB5 (insn))
6892 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6893 insn_type = NDS32_INSN_ADD45;
6894 }
6895 break;
6896
6897 case N32_ALU1_SUB_SLLI:
6898 case N32_ALU1_SUB_SRLI:
6899 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6900 {
6901 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6902 N32_RB5 (insn));
6903 insn_type = NDS32_INSN_SUB333;
6904 }
6905 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6906 {
6907 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6908 insn_type = NDS32_INSN_SUB45;
6909 }
6910 break;
6911
6912 case N32_ALU1_AND_SLLI:
6913 case N32_ALU1_AND_SRLI:
6914 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6915 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6916 && N32_IS_RB3 (insn))
6917 {
6918 if (N32_RT5 (insn) == N32_RA5 (insn))
6919 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6920 else if (N32_RT5 (insn) == N32_RB5 (insn))
6921 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6922 if (insn16)
6923 insn_type = NDS32_INSN_AND33;
6924 }
6925 break;
6926
6927 case N32_ALU1_XOR_SLLI:
6928 case N32_ALU1_XOR_SRLI:
6929 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6930 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6931 && N32_IS_RB3 (insn))
6932 {
6933 if (N32_RT5 (insn) == N32_RA5 (insn))
6934 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6935 else if (N32_RT5 (insn) == N32_RB5 (insn))
6936 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6937 if (insn16)
6938 insn_type = NDS32_INSN_XOR33;
6939 }
6940 break;
6941
6942 case N32_ALU1_OR_SLLI:
6943 case N32_ALU1_OR_SRLI:
6944 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6945 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6946 && N32_IS_RB3 (insn))
6947 {
6948 if (N32_RT5 (insn) == N32_RA5 (insn))
6949 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6950 else if (N32_RT5 (insn) == N32_RB5 (insn))
6951 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6952 if (insn16)
6953 insn_type = NDS32_INSN_OR33;
6954 }
6955 break;
6956 case N32_ALU1_NOR:
6957 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6958 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6959 && N32_RA5 (insn) == N32_RB5 (insn))
6960 {
6961 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6962 insn_type = NDS32_INSN_NOT33;
6963 }
6964 break;
6965 case N32_ALU1_SRAI:
6966 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6967 {
6968 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6969 insn_type = NDS32_INSN_SRAI45;
6970 }
6971 break;
6972
6973 case N32_ALU1_SRLI:
6974 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6975 {
6976 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6977 insn_type = NDS32_INSN_SRLI45;
6978 }
6979 break;
6980
6981 case N32_ALU1_SLLI:
6982 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6983 {
6984 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6985 N32_UB5 (insn));
6986 insn_type = NDS32_INSN_SLLI333;
6987 }
6988 break;
6989
6990 case N32_ALU1_ZEH:
6991 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6992 {
6993 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6994 insn_type = NDS32_INSN_ZEH33;
6995 }
6996 break;
6997
6998 case N32_ALU1_SEB:
6999 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7000 {
7001 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7002 insn_type = NDS32_INSN_SEB33;
7003 }
7004 break;
7005
7006 case N32_ALU1_SEH:
7007 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7008 {
7009 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7010 insn_type = NDS32_INSN_SEH33;
7011 }
7012 break;
7013
7014 case N32_ALU1_SLT:
7015 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7016 {
7017 /* Implicit r15. */
7018 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7019 insn_type = NDS32_INSN_SLT45;
7020 }
7021 break;
7022
7023 case N32_ALU1_SLTS:
7024 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7025 {
7026 /* Implicit r15. */
7027 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7028 insn_type = NDS32_INSN_SLTS45;
7029 }
7030 break;
7031 }
7032
7033 if ((insn16 & 0x8000) == 0)
7034 return 0;
7035
7036 if (pinsn16)
7037 *pinsn16 = insn16;
7038 if (pinsn_type)
7039 *pinsn_type = insn_type;
7040 return 1;
7041 }
7042
7043 static int
7044 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7045 int *pinsn_type)
7046 {
7047 uint16_t insn16 = 0;
7048 int insn_type;
7049 unsigned long mach = bfd_get_mach (abfd);
7050
7051 /* TODO: bset, bclr, btgl, btst. */
7052 if (__GF (insn, 6, 4) != 0)
7053 return 0;
7054
7055 switch (N32_IMMU (insn, 6))
7056 {
7057 case N32_ALU2_MUL:
7058 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7059 && N32_IS_RB3 (insn))
7060 {
7061 if (N32_RT5 (insn) == N32_RA5 (insn))
7062 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7063 else if (N32_RT5 (insn) == N32_RB5 (insn))
7064 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7065 if (insn16)
7066 insn_type = NDS32_INSN_MUL33;
7067 }
7068 }
7069
7070 if ((insn16 & 0x8000) == 0)
7071 return 0;
7072
7073 if (pinsn16)
7074 *pinsn16 = insn16;
7075 if (pinsn_type)
7076 *pinsn_type = insn_type;
7077 return 1;
7078 }
7079
7080 int
7081 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7082 int *pinsn_type)
7083 {
7084 int op6;
7085 uint16_t insn16 = 0;
7086 int insn_type;
7087 unsigned long mach = bfd_get_mach (abfd);
7088
7089 /* Decode 32-bit instruction. */
7090 if (insn & 0x80000000)
7091 {
7092 /* Not 32-bit insn. */
7093 return 0;
7094 }
7095
7096 op6 = N32_OP6 (insn);
7097
7098 /* Convert it to 16-bit instruction. */
7099 switch (op6)
7100 {
7101 case N32_OP6_MOVI:
7102 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7103 {
7104 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7105 insn_type = NDS32_INSN_MOVI55;
7106 }
7107 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7108 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7109 {
7110 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7111 N32_IMM20S (insn) - 16);
7112 insn_type = NDS32_INSN_MOVPI45;
7113 }
7114 break;
7115
7116 case N32_OP6_ADDI:
7117 if (N32_IMM15S (insn) == 0)
7118 {
7119 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7120 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7121 if (mach <= MACH_V2
7122 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7123 {
7124 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7125 insn_type = NDS32_INSN_MOV55;
7126 }
7127 }
7128 else if (N32_IMM15S (insn) > 0)
7129 {
7130 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7131 {
7132 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7133 N32_IMM15S (insn));
7134 insn_type = NDS32_INSN_ADDI333;
7135 }
7136 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7137 && N32_IMM15S (insn) < 32)
7138 {
7139 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7140 insn_type = NDS32_INSN_ADDI45;
7141 }
7142 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7143 && N32_RT5 (insn) == N32_RA5 (insn)
7144 && N32_IMM15S (insn) < 512)
7145 {
7146 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7147 insn_type = NDS32_INSN_ADDI10_SP;
7148 }
7149 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7150 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7151 && (N32_IMM15S (insn) % 4 == 0))
7152 {
7153 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7154 N32_IMM15S (insn) >> 2);
7155 insn_type = NDS32_INSN_ADDRI36_SP;
7156 }
7157 }
7158 else
7159 {
7160 /* Less than 0. */
7161 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7162 {
7163 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7164 0 - N32_IMM15S (insn));
7165 insn_type = NDS32_INSN_SUBI333;
7166 }
7167 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7168 && N32_IMM15S (insn) > -32)
7169 {
7170 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7171 0 - N32_IMM15S (insn));
7172 insn_type = NDS32_INSN_SUBI45;
7173 }
7174 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7175 && N32_RT5 (insn) == N32_RA5 (insn)
7176 && N32_IMM15S (insn) >= -512)
7177 {
7178 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7179 insn_type = NDS32_INSN_ADDI10_SP;
7180 }
7181 }
7182 break;
7183
7184 case N32_OP6_ORI:
7185 if (N32_IMM15S (insn) == 0)
7186 {
7187 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7188 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7189 if (mach <= MACH_V2
7190 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7191 {
7192 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7193 insn_type = NDS32_INSN_MOV55;
7194 }
7195 }
7196 break;
7197
7198 case N32_OP6_SUBRI:
7199 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7200 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7201 {
7202 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7203 insn_type = NDS32_INSN_NEG33;
7204 }
7205 break;
7206
7207 case N32_OP6_ANDI:
7208 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7209 {
7210 if (N32_IMM15U (insn) == 1)
7211 {
7212 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7213 insn_type = NDS32_INSN_XLSB33;
7214 }
7215 else if (N32_IMM15U (insn) == 0x7ff)
7216 {
7217 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7218 insn_type = NDS32_INSN_X11B33;
7219 }
7220 else if (N32_IMM15U (insn) == 0xff)
7221 {
7222 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7223 insn_type = NDS32_INSN_ZEB33;
7224 }
7225 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7226 && N32_IMM15U (insn) < 256)
7227 {
7228 int imm15u = N32_IMM15U (insn);
7229
7230 if (__builtin_popcount (imm15u) == 1)
7231 {
7232 /* BMSKI33 */
7233 int imm3u = __builtin_ctz (imm15u);
7234
7235 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7236 insn_type = NDS32_INSN_BMSKI33;
7237 }
7238 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7239 {
7240 /* FEXTI33 */
7241 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7242
7243 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7244 insn_type = NDS32_INSN_FEXTI33;
7245 }
7246 }
7247 }
7248 break;
7249
7250 case N32_OP6_SLTI:
7251 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7252 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7253 {
7254 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7255 insn_type = NDS32_INSN_SLTI45;
7256 }
7257 break;
7258
7259 case N32_OP6_SLTSI:
7260 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7261 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7262 {
7263 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7264 insn_type = NDS32_INSN_SLTSI45;
7265 }
7266 break;
7267
7268 case N32_OP6_LWI:
7269 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7270 {
7271 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7272 insn_type = NDS32_INSN_LWI450;
7273 }
7274 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7275 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7276 {
7277 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7278 N32_IMM15S (insn));
7279 insn_type = NDS32_INSN_LWI333;
7280 }
7281 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7282 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7283 {
7284 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7285 insn_type = NDS32_INSN_LWI37;
7286 }
7287 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7288 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7289 {
7290 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7291 insn_type = NDS32_INSN_LWI37_SP;
7292 }
7293 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7294 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7295 {
7296 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7297 N32_IMM15S (insn) + 32);
7298 insn_type = NDS32_INSN_LWI45_FE;
7299 }
7300 break;
7301
7302 case N32_OP6_SWI:
7303 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7304 {
7305 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7306 insn_type = NDS32_INSN_SWI450;
7307 }
7308 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7309 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7310 {
7311 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7312 N32_IMM15S (insn));
7313 insn_type = NDS32_INSN_SWI333;
7314 }
7315 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7316 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7317 {
7318 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7319 insn_type = NDS32_INSN_SWI37;
7320 }
7321 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7322 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7323 {
7324 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7325 insn_type = NDS32_INSN_SWI37_SP;
7326 }
7327 break;
7328
7329 case N32_OP6_LWI_BI:
7330 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7331 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7332 {
7333 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7334 N32_IMM15S (insn));
7335 insn_type = NDS32_INSN_LWI333_BI;
7336 }
7337 break;
7338
7339 case N32_OP6_SWI_BI:
7340 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7341 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7342 {
7343 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7344 N32_IMM15S (insn));
7345 insn_type = NDS32_INSN_SWI333_BI;
7346 }
7347 break;
7348
7349 case N32_OP6_LHI:
7350 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7351 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7352 {
7353 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7354 N32_IMM15S (insn));
7355 insn_type = NDS32_INSN_LHI333;
7356 }
7357 break;
7358
7359 case N32_OP6_SHI:
7360 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7361 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7362 {
7363 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7364 N32_IMM15S (insn));
7365 insn_type = NDS32_INSN_SHI333;
7366 }
7367 break;
7368
7369 case N32_OP6_LBI:
7370 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7371 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7372 {
7373 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7374 N32_IMM15S (insn));
7375 insn_type = NDS32_INSN_LBI333;
7376 }
7377 break;
7378
7379 case N32_OP6_SBI:
7380 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7381 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7382 {
7383 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7384 N32_IMM15S (insn));
7385 insn_type = NDS32_INSN_SBI333;
7386 }
7387 break;
7388
7389 case N32_OP6_ALU1:
7390 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7391
7392 case N32_OP6_ALU2:
7393 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7394
7395 case N32_OP6_BR1:
7396 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7397 goto done;
7398
7399 if ((insn & __BIT (14)) == 0)
7400 {
7401 /* N32_BR1_BEQ */
7402 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7403 && N32_RT5 (insn) != REG_R5)
7404 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7405 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7406 && N32_RA5 (insn) != REG_R5)
7407 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7408 insn_type = NDS32_INSN_BEQS38;
7409 break;
7410 }
7411 else
7412 {
7413 /* N32_BR1_BNE */
7414 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7415 && N32_RT5 (insn) != REG_R5)
7416 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7417 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7418 && N32_RA5 (insn) != REG_R5)
7419 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7420 insn_type = NDS32_INSN_BNES38;
7421 break;
7422 }
7423 break;
7424
7425 case N32_OP6_BR2:
7426 switch (N32_BR2_SUB (insn))
7427 {
7428 case N32_BR2_BEQZ:
7429 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7430 {
7431 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7432 insn_type = NDS32_INSN_BEQZ38;
7433 }
7434 else if (N32_RT5 (insn) == REG_R15
7435 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7436 {
7437 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7438 insn_type = NDS32_INSN_BEQZS8;
7439 }
7440 break;
7441
7442 case N32_BR2_BNEZ:
7443 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7444 {
7445 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7446 insn_type = NDS32_INSN_BNEZ38;
7447 }
7448 else if (N32_RT5 (insn) == REG_R15
7449 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7450 {
7451 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7452 insn_type = NDS32_INSN_BNEZS8;
7453 }
7454 break;
7455
7456 case N32_BR2_IFCALL:
7457 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7458 {
7459 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7460 insn_type = NDS32_INSN_IFCALL9;
7461 }
7462 break;
7463 }
7464 break;
7465
7466 case N32_OP6_JI:
7467 if ((insn & __BIT (24)) == 0)
7468 {
7469 /* N32_JI_J */
7470 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7471 {
7472 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7473 insn_type = NDS32_INSN_J8;
7474 }
7475 }
7476 break;
7477
7478 case N32_OP6_JREG:
7479 if (__GF (insn, 8, 2) != 0)
7480 goto done;
7481
7482 switch (N32_IMMU (insn, 5))
7483 {
7484 case N32_JREG_JR:
7485 if (N32_JREG_HINT (insn) == 0)
7486 {
7487 /* jr */
7488 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7489 insn_type = NDS32_INSN_JR5;
7490 }
7491 else if (N32_JREG_HINT (insn) == 1)
7492 {
7493 /* ret */
7494 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7495 insn_type = NDS32_INSN_RET5;
7496 }
7497 else if (N32_JREG_HINT (insn) == 3)
7498 {
7499 /* ifret = mov55 $sp, $sp */
7500 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7501 insn_type = NDS32_INSN_IFRET;
7502 }
7503 break;
7504
7505 case N32_JREG_JRAL:
7506 /* It's convertible when return rt5 is $lp and address
7507 translation is kept. */
7508 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7509 {
7510 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7511 insn_type = NDS32_INSN_JRAL5;
7512 }
7513 break;
7514 }
7515 break;
7516
7517 case N32_OP6_MISC:
7518 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7519 {
7520 /* For v3, swid above 31 are used for ex9.it. */
7521 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7522 insn_type = NDS32_INSN_BREAK16;
7523 }
7524 break;
7525
7526 default:
7527 /* This instruction has no 16-bit variant. */
7528 goto done;
7529 }
7530
7531 done:
7532 /* Bit-15 of insn16 should be set for a valid instruction. */
7533 if ((insn16 & 0x8000) == 0)
7534 return 0;
7535
7536 if (pinsn16)
7537 *pinsn16 = insn16;
7538 if (pinsn_type)
7539 *pinsn_type = insn_type;
7540 return 1;
7541 }
7542
7543 static int
7544 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7545 Elf_Internal_Rela *reloc)
7546 {
7547 uint16_t insn16 = 0;
7548
7549 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7550 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7551 return 0;
7552
7553 if (!N32_IS_RT3 (insn))
7554 return 0;
7555
7556 switch (N32_OP6 (insn))
7557 {
7558 case N32_OP6_LWI:
7559 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7560 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7561 break;
7562 case N32_OP6_SWI:
7563 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7564 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7565 break;
7566 case N32_OP6_HWGP:
7567 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7568 break;
7569
7570 if (__GF (insn, 17, 3) == 6)
7571 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7572 else if (__GF (insn, 17, 3) == 7)
7573 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7574 break;
7575 }
7576
7577 if ((insn16 & 0x8000) == 0)
7578 return 0;
7579
7580 *pinsn16 = insn16;
7581 return 1;
7582 }
7583
7584 /* Convert a 16-bit instruction to 32-bit one.
7585 INSN16 it the input and PINSN it the point to output.
7586 Return non-zero on successful. Otherwise 0 is returned. */
7587
7588 int
7589 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7590 {
7591 uint32_t insn = 0xffffffff;
7592 unsigned long mach = bfd_get_mach (abfd);
7593
7594 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7595
7596 switch (__GF (insn16, 9, 6))
7597 {
7598 case 0x4: /* add45 */
7599 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7600 N16_RA5 (insn16));
7601 goto done;
7602 case 0x5: /* sub45 */
7603 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7604 N16_RA5 (insn16));
7605 goto done;
7606 case 0x6: /* addi45 */
7607 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7608 N16_IMM5U (insn16));
7609 goto done;
7610 case 0x7: /* subi45 */
7611 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7612 -N16_IMM5U (insn16));
7613 goto done;
7614 case 0x8: /* srai45 */
7615 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7616 N16_IMM5U (insn16));
7617 goto done;
7618 case 0x9: /* srli45 */
7619 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7620 N16_IMM5U (insn16));
7621 goto done;
7622 case 0xa: /* slli333 */
7623 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7624 N16_IMM3U (insn16));
7625 goto done;
7626 case 0xc: /* add333 */
7627 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7628 N16_RB3 (insn16));
7629 goto done;
7630 case 0xd: /* sub333 */
7631 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7632 N16_RB3 (insn16));
7633 goto done;
7634 case 0xe: /* addi333 */
7635 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7636 N16_IMM3U (insn16));
7637 goto done;
7638 case 0xf: /* subi333 */
7639 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7640 -N16_IMM3U (insn16));
7641 goto done;
7642 case 0x10: /* lwi333 */
7643 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7644 N16_IMM3U (insn16));
7645 goto done;
7646 case 0x12: /* lhi333 */
7647 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7648 N16_IMM3U (insn16));
7649 goto done;
7650 case 0x13: /* lbi333 */
7651 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7652 N16_IMM3U (insn16));
7653 goto done;
7654 case 0x11: /* lwi333.bi */
7655 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7656 N16_IMM3U (insn16));
7657 goto done;
7658 case 0x14: /* swi333 */
7659 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7660 N16_IMM3U (insn16));
7661 goto done;
7662 case 0x16: /* shi333 */
7663 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7664 N16_IMM3U (insn16));
7665 goto done;
7666 case 0x17: /* sbi333 */
7667 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7668 N16_IMM3U (insn16));
7669 goto done;
7670 case 0x15: /* swi333.bi */
7671 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7672 N16_IMM3U (insn16));
7673 goto done;
7674 case 0x18: /* addri36.sp */
7675 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7676 N16_IMM6U (insn16) << 2);
7677 goto done;
7678 case 0x19: /* lwi45.fe */
7679 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7680 (N16_IMM5U (insn16) - 32));
7681 goto done;
7682 case 0x1a: /* lwi450 */
7683 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7684 goto done;
7685 case 0x1b: /* swi450 */
7686 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7687 goto done;
7688
7689 /* These are r15 implied instructions. */
7690 case 0x30: /* slts45 */
7691 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7692 goto done;
7693 case 0x31: /* slt45 */
7694 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7695 goto done;
7696 case 0x32: /* sltsi45 */
7697 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7698 goto done;
7699 case 0x33: /* slti45 */
7700 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7701 goto done;
7702 case 0x34: /* beqzs8, bnezs8 */
7703 if (insn16 & __BIT (8))
7704 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7705 else
7706 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7707 goto done;
7708
7709 case 0x35: /* break16, ex9.it */
7710 /* Only consider range of v3 break16. */
7711 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7712 goto done;
7713
7714 case 0x3c: /* ifcall9 */
7715 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7716 goto done;
7717 case 0x3d: /* movpi45 */
7718 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7719 goto done;
7720
7721 case 0x3f: /* MISC33 */
7722 switch (insn16 & 0x7)
7723 {
7724 case 2: /* neg33 */
7725 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7726 break;
7727 case 3: /* not33 */
7728 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7729 N16_RA3 (insn16));
7730 break;
7731 case 4: /* mul33 */
7732 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7733 N16_RA3 (insn16));
7734 break;
7735 case 5: /* xor33 */
7736 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7737 N16_RA3 (insn16));
7738 break;
7739 case 6: /* and33 */
7740 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7741 N16_RA3 (insn16));
7742 break;
7743 case 7: /* or33 */
7744 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7745 N16_RA3 (insn16));
7746 break;
7747 }
7748 goto done;
7749
7750 case 0xb:
7751 switch (insn16 & 0x7)
7752 {
7753 case 0: /* zeb33 */
7754 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7755 break;
7756 case 1: /* zeh33 */
7757 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7758 break;
7759 case 2: /* seb33 */
7760 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7761 break;
7762 case 3: /* seh33 */
7763 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7764 break;
7765 case 4: /* xlsb33 */
7766 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7767 break;
7768 case 5: /* x11b33 */
7769 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7770 break;
7771 case 6: /* bmski33 */
7772 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7773 1 << __GF (insn16, 3, 3));
7774 break;
7775 case 7: /* fexti33 */
7776 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7777 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7778 break;
7779 }
7780 goto done;
7781 }
7782
7783 switch (__GF (insn16, 10, 5))
7784 {
7785 case 0x0: /* mov55 or ifret16 */
7786 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7787 && N16_RT5 (insn16) == N16_RA5 (insn16))
7788 insn = N32_JREG (JR, 0, 0, 0, 3);
7789 else
7790 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7791 goto done;
7792 case 0x1: /* movi55 */
7793 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7794 goto done;
7795 case 0x1b: /* addi10s (V2) */
7796 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7797 goto done;
7798 }
7799
7800 switch (__GF (insn16, 11, 4))
7801 {
7802 case 0x7: /* lwi37.fp/swi37.fp */
7803 if (insn16 & __BIT (7)) /* swi37.fp */
7804 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7805 else /* lwi37.fp */
7806 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7807 goto done;
7808 case 0x8: /* beqz38 */
7809 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7810 goto done;
7811 case 0x9: /* bnez38 */
7812 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7813 goto done;
7814 case 0xa: /* beqs38/j8, implied r5 */
7815 if (N16_RT38 (insn16) == 5)
7816 insn = N32_JI (J, N16_IMM8S (insn16));
7817 else
7818 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7819 goto done;
7820 case 0xb: /* bnes38 and others */
7821 if (N16_RT38 (insn16) == 5)
7822 {
7823 switch (__GF (insn16, 5, 3))
7824 {
7825 case 0: /* jr5 */
7826 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7827 break;
7828 case 4: /* ret5 */
7829 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7830 break;
7831 case 1: /* jral5 */
7832 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7833 break;
7834 case 2: /* ex9.it imm5 */
7835 /* ex9.it had no 32-bit variantl. */
7836 break;
7837 case 5: /* add5.pc */
7838 /* add5.pc had no 32-bit variantl. */
7839 break;
7840 }
7841 }
7842 else /* bnes38 */
7843 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7844 goto done;
7845 case 0xe: /* lwi37/swi37 */
7846 if (insn16 & (1 << 7)) /* swi37.sp */
7847 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7848 else /* lwi37.sp */
7849 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7850 goto done;
7851 }
7852
7853 done:
7854 if (insn & 0x80000000)
7855 return 0;
7856
7857 if (pinsn)
7858 *pinsn = insn;
7859 return 1;
7860 }
7861 \f
7862 static bfd_boolean
7863 is_sda_access_insn (unsigned long insn)
7864 {
7865 switch (N32_OP6 (insn))
7866 {
7867 case N32_OP6_LWI:
7868 case N32_OP6_LHI:
7869 case N32_OP6_LHSI:
7870 case N32_OP6_LBI:
7871 case N32_OP6_LBSI:
7872 case N32_OP6_SWI:
7873 case N32_OP6_SHI:
7874 case N32_OP6_SBI:
7875 case N32_OP6_LWC:
7876 case N32_OP6_LDC:
7877 case N32_OP6_SWC:
7878 case N32_OP6_SDC:
7879 return TRUE;
7880 default:
7881 ;
7882 }
7883 return FALSE;
7884 }
7885
7886 static unsigned long
7887 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7888 {
7889 uint32_t oinsn = 0;
7890
7891 switch (type)
7892 {
7893 case R_NDS32_GOT_LO12:
7894 case R_NDS32_GOTOFF_LO12:
7895 case R_NDS32_PLTREL_LO12:
7896 case R_NDS32_PLT_GOTREL_LO12:
7897 case R_NDS32_LO12S0_RELA:
7898 switch (N32_OP6 (insn))
7899 {
7900 case N32_OP6_LBI:
7901 /* lbi.gp */
7902 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7903 break;
7904 case N32_OP6_LBSI:
7905 /* lbsi.gp */
7906 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7907 break;
7908 case N32_OP6_SBI:
7909 /* sbi.gp */
7910 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7911 break;
7912 case N32_OP6_ORI:
7913 /* addi.gp */
7914 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7915 break;
7916 }
7917 break;
7918
7919 case R_NDS32_LO12S1_RELA:
7920 switch (N32_OP6 (insn))
7921 {
7922 case N32_OP6_LHI:
7923 /* lhi.gp */
7924 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7925 break;
7926 case N32_OP6_LHSI:
7927 /* lhsi.gp */
7928 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7929 break;
7930 case N32_OP6_SHI:
7931 /* shi.gp */
7932 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7933 break;
7934 }
7935 break;
7936
7937 case R_NDS32_LO12S2_RELA:
7938 switch (N32_OP6 (insn))
7939 {
7940 case N32_OP6_LWI:
7941 /* lwi.gp */
7942 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7943 break;
7944 case N32_OP6_SWI:
7945 /* swi.gp */
7946 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7947 break;
7948 }
7949 break;
7950
7951 case R_NDS32_LO12S2_DP_RELA:
7952 case R_NDS32_LO12S2_SP_RELA:
7953 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7954 break;
7955 }
7956
7957 if (oinsn)
7958 *pinsn = oinsn;
7959
7960 return oinsn != 0;
7961 }
7962
7963 /* Linker hasn't found the correct merge section for non-section symbol
7964 in relax time, this work is left to the function elf_link_input_bfd().
7965 So for non-section symbol, _bfd_merged_section_offset is also needed
7966 to find the correct symbol address. */
7967
7968 static bfd_vma
7969 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7970 asection **psec, Elf_Internal_Rela *rel)
7971 {
7972 asection *sec = *psec;
7973 bfd_vma relocation;
7974
7975 relocation = (sec->output_section->vma
7976 + sec->output_offset + sym->st_value);
7977 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7978 {
7979 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7980 rel->r_addend =
7981 _bfd_merged_section_offset (abfd, psec,
7982 elf_section_data (sec)->sec_info,
7983 sym->st_value + rel->r_addend);
7984 else
7985 rel->r_addend =
7986 _bfd_merged_section_offset (abfd, psec,
7987 elf_section_data (sec)->sec_info,
7988 sym->st_value) + rel->r_addend;
7989
7990 if (sec != *psec)
7991 {
7992 /* If we have changed the section, and our original section is
7993 marked with SEC_EXCLUDE, it means that the original
7994 SEC_MERGE section has been completely subsumed in some
7995 other SEC_MERGE section. In this case, we need to leave
7996 some info around for --emit-relocs. */
7997 if ((sec->flags & SEC_EXCLUDE) != 0)
7998 sec->kept_section = *psec;
7999 sec = *psec;
8000 }
8001 rel->r_addend -= relocation;
8002 rel->r_addend += sec->output_section->vma + sec->output_offset;
8003 }
8004 return relocation;
8005 }
8006
8007 static bfd_vma
8008 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8009 Elf_Internal_Sym *isymbuf,
8010 Elf_Internal_Shdr *symtab_hdr)
8011 {
8012 bfd_signed_vma foff;
8013 bfd_vma symval, addend;
8014 Elf_Internal_Rela irel_fn;
8015 Elf_Internal_Sym *isym;
8016 asection *sym_sec;
8017
8018 /* Get the value of the symbol referred to by the reloc. */
8019 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8020 {
8021 /* A local symbol. */
8022 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8023
8024 if (isym->st_shndx == SHN_UNDEF)
8025 sym_sec = bfd_und_section_ptr;
8026 else if (isym->st_shndx == SHN_ABS)
8027 sym_sec = bfd_abs_section_ptr;
8028 else if (isym->st_shndx == SHN_COMMON)
8029 sym_sec = bfd_com_section_ptr;
8030 else
8031 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8032 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8033 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8034 addend = irel_fn.r_addend;
8035 }
8036 else
8037 {
8038 unsigned long indx;
8039 struct elf_link_hash_entry *h;
8040
8041 /* An external symbol. */
8042 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8043 h = elf_sym_hashes (abfd)[indx];
8044 BFD_ASSERT (h != NULL);
8045
8046 while (h->root.type == bfd_link_hash_indirect
8047 || h->root.type == bfd_link_hash_warning)
8048 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8049
8050 if (h->root.type != bfd_link_hash_defined
8051 && h->root.type != bfd_link_hash_defweak)
8052 /* This appears to be a reference to an undefined
8053 symbol. Just ignore it--it will be caught by the
8054 regular reloc processing. */
8055 return 0;
8056
8057 if (h->root.u.def.section->flags & SEC_MERGE)
8058 {
8059 sym_sec = h->root.u.def.section;
8060 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8061 (sym_sec)->sec_info, h->root.u.def.value);
8062 symval = symval + sym_sec->output_section->vma
8063 + sym_sec->output_offset;
8064 }
8065 else
8066 symval = (h->root.u.def.value
8067 + h->root.u.def.section->output_section->vma
8068 + h->root.u.def.section->output_offset);
8069 addend = irel->r_addend;
8070 }
8071
8072 foff = symval + addend;
8073
8074 return foff;
8075 }
8076
8077 static bfd_vma
8078 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8079 Elf_Internal_Rela *irel,
8080 Elf_Internal_Shdr *symtab_hdr)
8081 {
8082 int symndx;
8083 bfd_vma *local_got_offsets;
8084 /* Get the value of the symbol referred to by the reloc. */
8085 struct elf_link_hash_entry *h;
8086 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8087
8088 /* An external symbol. */
8089 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8090 h = elf_sym_hashes (abfd)[symndx];
8091 while (h->root.type == bfd_link_hash_indirect
8092 || h->root.type == bfd_link_hash_warning)
8093 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8094
8095 if (symndx >= 0)
8096 {
8097 BFD_ASSERT (h != NULL);
8098 return htab->sgot->output_section->vma + htab->sgot->output_offset
8099 + h->got.offset;
8100 }
8101 else
8102 {
8103 local_got_offsets = elf_local_got_offsets (abfd);
8104 BFD_ASSERT (local_got_offsets != NULL);
8105 return htab->sgot->output_section->vma + htab->sgot->output_offset
8106 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8107 }
8108
8109 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8110 /* The check of h->root.type is passed. */
8111 }
8112
8113 static int
8114 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8115 asection *sec, Elf_Internal_Rela *rel)
8116 {
8117 bfd_byte *contents;
8118 unsigned short insn16;
8119
8120 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8121 return FALSE;
8122 contents = elf_section_data (sec)->this_hdr.contents;
8123 insn16 = bfd_getb16 (contents + rel->r_offset);
8124 if (insn16 == NDS32_NOP16)
8125 return TRUE;
8126 return FALSE;
8127 }
8128
8129 /* It checks whether the instruction could be converted to
8130 16-bit form and returns the converted one.
8131
8132 `internal_relocs' is supposed to be sorted. */
8133
8134 static int
8135 is_convert_32_to_16 (bfd *abfd, asection *sec,
8136 Elf_Internal_Rela *reloc,
8137 Elf_Internal_Rela *internal_relocs,
8138 Elf_Internal_Rela *irelend,
8139 uint16_t *insn16)
8140 {
8141 #define NORMAL_32_TO_16 (1 << 0)
8142 #define SPECIAL_32_TO_16 (1 << 1)
8143 bfd_byte *contents = NULL;
8144 bfd_signed_vma off;
8145 bfd_vma mem_addr;
8146 uint32_t insn = 0;
8147 Elf_Internal_Rela *pc_rel;
8148 int pic_ext_target = 0;
8149 Elf_Internal_Shdr *symtab_hdr;
8150 Elf_Internal_Sym *isymbuf = NULL;
8151 int convert_type;
8152 bfd_vma offset;
8153
8154 if (reloc->r_offset + 4 > sec->size)
8155 return FALSE;
8156
8157 offset = reloc->r_offset;
8158
8159 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
8160 return FALSE;
8161 insn = bfd_getb32 (contents + offset);
8162
8163 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8164 convert_type = NORMAL_32_TO_16;
8165 else if (special_convert_32_to_16 (insn, insn16, reloc))
8166 convert_type = SPECIAL_32_TO_16;
8167 else
8168 return FALSE;
8169
8170 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8171 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8172 return FALSE;
8173
8174 /* Find the first relocation of the same relocation-type,
8175 so we iteratie them forward. */
8176 pc_rel = reloc;
8177 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
8178 pc_rel--;
8179
8180 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8181 {
8182 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8183 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8184 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8185 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8186 {
8187 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8188 &pic_ext_target);
8189 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8190 || off == 0)
8191 return FALSE;
8192 break;
8193 }
8194 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8195 {
8196 /* movi => movi55 */
8197 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8198 symtab_hdr);
8199 /* mem_addr is unsigned, but the value should
8200 be between [-16, 15]. */
8201 if ((mem_addr + 0x10) >> 5)
8202 return FALSE;
8203 break;
8204 }
8205 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8206 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8207 {
8208 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8209 because it can be relaxed to addi for TLS_LE_ADD. */
8210 return FALSE;
8211 }
8212 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8213 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8214 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8215 && convert_type == SPECIAL_32_TO_16)
8216 {
8217 /* fp-as-gp
8218 We've selected a best fp-base for this access, so we can
8219 always resolve it anyway. Do nothing. */
8220 break;
8221 }
8222 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8223 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8224 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8225 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8226 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8227 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8228 {
8229 /* Prevent unresolved addi instruction translate
8230 to addi45 or addi333. */
8231 return FALSE;
8232 }
8233 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8234 {
8235 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8236 &pic_ext_target);
8237 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8238 return FALSE;
8239 break;
8240 }
8241 }
8242
8243 return TRUE;
8244 }
8245
8246 static void
8247 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8248 Elf_Internal_Rela *reloc,
8249 Elf_Internal_Rela *internal_relocs,
8250 Elf_Internal_Rela *irelend,
8251 unsigned short insn16)
8252 {
8253 Elf_Internal_Rela *pc_rel;
8254 bfd_vma offset;
8255
8256 offset = reloc->r_offset;
8257 bfd_putb16 (insn16, contents + offset);
8258 /* Find the first relocation of the same relocation-type,
8259 so we iteratie them forward. */
8260 pc_rel = reloc;
8261 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8262 pc_rel--;
8263
8264 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8265 {
8266 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8267 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8268 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8269 {
8270 pc_rel->r_info =
8271 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8272 }
8273 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8274 pc_rel->r_info =
8275 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8276 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8277 pc_rel->r_info =
8278 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8279 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8280 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8281 pc_rel->r_info =
8282 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8283 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8284 pc_rel->r_info =
8285 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8286 }
8287 }
8288
8289 /* Find a relocation of type specified by `reloc_type'
8290 of the same r_offset with reloc.
8291 If not found, return irelend.
8292
8293 Assuming relocations are sorted by r_offset,
8294 we find the relocation from `reloc' backward untill relocs,
8295 or find it from `reloc' forward untill irelend. */
8296
8297 static Elf_Internal_Rela *
8298 find_relocs_at_address (Elf_Internal_Rela *reloc,
8299 Elf_Internal_Rela *relocs,
8300 Elf_Internal_Rela *irelend,
8301 enum elf_nds32_reloc_type reloc_type)
8302 {
8303 Elf_Internal_Rela *rel_t;
8304
8305 /* Find backward. */
8306 for (rel_t = reloc;
8307 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8308 rel_t--)
8309 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8310 return rel_t;
8311
8312 /* We didn't find it backward. Try find it forward. */
8313 for (rel_t = reloc;
8314 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8315 rel_t++)
8316 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8317 return rel_t;
8318
8319 return irelend;
8320 }
8321
8322 /* Find a relocation of specified type and offset.
8323 `reloc' is just a refence point to find a relocation at specified offset.
8324 If not found, return irelend.
8325
8326 Assuming relocations are sorted by r_offset,
8327 we find the relocation from `reloc' backward untill relocs,
8328 or find it from `reloc' forward untill irelend. */
8329
8330 static Elf_Internal_Rela *
8331 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8332 Elf_Internal_Rela *relocs,
8333 Elf_Internal_Rela *irelend,
8334 unsigned char reloc_type,
8335 bfd_vma offset_p)
8336 {
8337 Elf_Internal_Rela *rel_t = NULL;
8338
8339 /* First, we try to find a relocation of offset `offset_p',
8340 and then we use find_relocs_at_address to find specific type. */
8341
8342 if (reloc->r_offset > offset_p)
8343 {
8344 /* Find backward. */
8345 for (rel_t = reloc;
8346 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8347 /* Do nothing. */;
8348 }
8349 else if (reloc->r_offset < offset_p)
8350 {
8351 /* Find forward. */
8352 for (rel_t = reloc;
8353 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8354 /* Do nothing. */;
8355 }
8356 else
8357 rel_t = reloc;
8358
8359 /* Not found? */
8360 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8361 return irelend;
8362
8363 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8364 }
8365
8366 static bfd_boolean
8367 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8368 Elf_Internal_Rela *internal_relocs,
8369 Elf_Internal_Rela *irelend,
8370 unsigned char reloc_type)
8371 {
8372 Elf_Internal_Rela *rel_t;
8373
8374 for (rel_t = reloc;
8375 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8376 rel_t--)
8377 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8378 {
8379 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8380 && rel_t->r_addend == reloc->r_addend)
8381 continue;
8382 return TRUE;
8383 }
8384
8385 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8386 rel_t++)
8387 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8388 {
8389 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8390 && rel_t->r_addend == reloc->r_addend)
8391 continue;
8392 return TRUE;
8393 }
8394
8395 return FALSE;
8396 }
8397
8398 typedef struct nds32_elf_blank nds32_elf_blank_t;
8399 struct nds32_elf_blank
8400 {
8401 /* Where the blank begins. */
8402 bfd_vma offset;
8403 /* The size of the blank. */
8404 bfd_vma size;
8405 /* The accumulative size before this blank. */
8406 bfd_vma total_size;
8407 nds32_elf_blank_t *next;
8408 nds32_elf_blank_t *prev;
8409 };
8410
8411 static nds32_elf_blank_t *blank_free_list = NULL;
8412
8413 static nds32_elf_blank_t *
8414 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8415 {
8416 nds32_elf_blank_t *blank_t;
8417
8418 if (blank_free_list)
8419 {
8420 blank_t = blank_free_list;
8421 blank_free_list = blank_free_list->next;
8422 }
8423 else
8424 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8425
8426 if (blank_t == NULL)
8427 return NULL;
8428
8429 blank_t->offset = offset_p;
8430 blank_t->size = size_p;
8431 blank_t->total_size = 0;
8432 blank_t->next = NULL;
8433 blank_t->prev = NULL;
8434
8435 return blank_t;
8436 }
8437
8438 static void
8439 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8440 {
8441 if (blank_free_list)
8442 {
8443 blank_free_list->prev = blank_p;
8444 blank_p->next = blank_free_list;
8445 }
8446 else
8447 blank_p->next = NULL;
8448
8449 blank_p->prev = NULL;
8450 blank_free_list = blank_p;
8451 }
8452
8453 static void
8454 clean_nds32_elf_blank (void)
8455 {
8456 nds32_elf_blank_t *blank_t;
8457
8458 while (blank_free_list)
8459 {
8460 blank_t = blank_free_list;
8461 blank_free_list = blank_free_list->next;
8462 free (blank_t);
8463 }
8464 }
8465
8466 static nds32_elf_blank_t *
8467 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8468 {
8469 nds32_elf_blank_t *blank_t;
8470
8471 if (!blank_p)
8472 return NULL;
8473 blank_t = blank_p;
8474
8475 while (blank_t && addr < blank_t->offset)
8476 blank_t = blank_t->prev;
8477 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8478 blank_t = blank_t->next;
8479
8480 return blank_t;
8481 }
8482
8483 static bfd_vma
8484 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8485 int overwrite)
8486 {
8487 nds32_elf_blank_t *blank_t;
8488
8489 blank_t = search_nds32_elf_blank (*blank_p, addr);
8490 if (!blank_t)
8491 return 0;
8492
8493 if (overwrite)
8494 *blank_p = blank_t;
8495
8496 if (addr < blank_t->offset + blank_t->size)
8497 return blank_t->total_size + (addr - blank_t->offset);
8498 else
8499 return blank_t->total_size + blank_t->size;
8500 }
8501
8502 static bfd_boolean
8503 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8504 {
8505 nds32_elf_blank_t *blank_t, *blank_t2;
8506
8507 if (!*blank_p)
8508 {
8509 *blank_p = create_nds32_elf_blank (addr, len);
8510 return *blank_p ? TRUE : FALSE;
8511 }
8512
8513 blank_t = search_nds32_elf_blank (*blank_p, addr);
8514
8515 if (blank_t == NULL)
8516 {
8517 blank_t = create_nds32_elf_blank (addr, len);
8518 if (!blank_t)
8519 return FALSE;
8520 while ((*blank_p)->prev != NULL)
8521 *blank_p = (*blank_p)->prev;
8522 blank_t->next = *blank_p;
8523 (*blank_p)->prev = blank_t;
8524 (*blank_p) = blank_t;
8525 return TRUE;
8526 }
8527
8528 if (addr < blank_t->offset + blank_t->size)
8529 {
8530 if (addr > blank_t->offset + blank_t->size)
8531 blank_t->size = addr - blank_t->offset;
8532 }
8533 else
8534 {
8535 blank_t2 = create_nds32_elf_blank (addr, len);
8536 if (!blank_t2)
8537 return FALSE;
8538 if (blank_t->next)
8539 {
8540 blank_t->next->prev = blank_t2;
8541 blank_t2->next = blank_t->next;
8542 }
8543 blank_t2->prev = blank_t;
8544 blank_t->next = blank_t2;
8545 *blank_p = blank_t2;
8546 }
8547
8548 return TRUE;
8549 }
8550
8551 static bfd_boolean
8552 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8553 bfd_vma len)
8554 {
8555 nds32_elf_blank_t *blank_t;
8556
8557 if (!insert_nds32_elf_blank (blank_p, addr, len))
8558 return FALSE;
8559
8560 blank_t = *blank_p;
8561
8562 if (!blank_t->prev)
8563 {
8564 blank_t->total_size = 0;
8565 blank_t = blank_t->next;
8566 }
8567
8568 while (blank_t)
8569 {
8570 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8571 blank_t = blank_t->next;
8572 }
8573
8574 return TRUE;
8575 }
8576
8577 static void
8578 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8579 {
8580 nds32_elf_blank_t *blank_t;
8581 bfd_vma total_size = 0;
8582
8583 if (!blank_p)
8584 return;
8585
8586 blank_t = blank_p;
8587 while (blank_t->prev)
8588 blank_t = blank_t->prev;
8589 while (blank_t)
8590 {
8591 blank_t->total_size = total_size;
8592 total_size += blank_t->size;
8593 blank_t = blank_t->next;
8594 }
8595 }
8596
8597 static bfd_boolean
8598 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8599 nds32_elf_blank_t *blank_p)
8600 {
8601 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
8602 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
8603 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8604 unsigned int sec_shndx; /* The section the be relaxed. */
8605 bfd_byte *contents; /* Contents data of iterating section. */
8606 Elf_Internal_Rela *internal_relocs;
8607 Elf_Internal_Rela *irel;
8608 Elf_Internal_Rela *irelend;
8609 struct elf_link_hash_entry **sym_hashes;
8610 struct elf_link_hash_entry **end_hashes;
8611 unsigned int symcount;
8612 asection *sect;
8613 nds32_elf_blank_t *blank_t;
8614 nds32_elf_blank_t *blank_t2;
8615 nds32_elf_blank_t *blank_head;
8616
8617 blank_head = blank_t = blank_p;
8618 while (blank_head->prev != NULL)
8619 blank_head = blank_head->prev;
8620 while (blank_t->next != NULL)
8621 blank_t = blank_t->next;
8622
8623 if (blank_t->offset + blank_t->size <= sec->size)
8624 {
8625 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8626 blank_t->next->prev = blank_t;
8627 }
8628 if (blank_head->offset > 0)
8629 {
8630 blank_head->prev = create_nds32_elf_blank (0, 0);
8631 blank_head->prev->next = blank_head;
8632 blank_head = blank_head->prev;
8633 }
8634
8635 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8636
8637 /* The deletion must stop at the next ALIGN reloc for an alignment
8638 power larger than the number of bytes we are deleting. */
8639
8640 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8641 if (!nds32_get_local_syms (abfd, sec, &isym))
8642 return FALSE;
8643
8644 if (isym == NULL)
8645 {
8646 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8647 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8648 symtab_hdr->contents = (bfd_byte *) isym;
8649 }
8650
8651 if (isym == NULL || symtab_hdr->sh_info == 0)
8652 return FALSE;
8653
8654 blank_t = blank_head;
8655 calc_nds32_blank_total (blank_head);
8656
8657 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8658 {
8659 /* Adjust all the relocs. */
8660
8661 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8662 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8663 TRUE /* keep_memory */);
8664 irelend = internal_relocs + sect->reloc_count;
8665
8666 blank_t = blank_head;
8667 blank_t2 = blank_head;
8668
8669 if (!(sect->flags & SEC_RELOC))
8670 continue;
8671
8672 nds32_get_section_contents (abfd, sect, &contents, TRUE);
8673
8674 for (irel = internal_relocs; irel < irelend; irel++)
8675 {
8676 bfd_vma raddr;
8677
8678 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8679 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8680 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8681 {
8682 unsigned long val = 0;
8683 unsigned long mask;
8684 long before, between;
8685 long offset;
8686
8687 switch (ELF32_R_TYPE (irel->r_info))
8688 {
8689 case R_NDS32_DIFF8:
8690 offset = bfd_get_8 (abfd, contents + irel->r_offset);
8691 break;
8692 case R_NDS32_DIFF16:
8693 offset = bfd_get_16 (abfd, contents + irel->r_offset);
8694 break;
8695 case R_NDS32_DIFF32:
8696 val = bfd_get_32 (abfd, contents + irel->r_offset);
8697 /* Get the signed bit and mask for the high part. The
8698 gcc will alarm when right shift 32-bit since the
8699 type size of long may be 32-bit. */
8700 mask = 0 - (val >> 31);
8701 if (mask)
8702 offset = (val | (mask - 0xffffffff));
8703 else
8704 offset = val;
8705 break;
8706 default:
8707 BFD_ASSERT (0);
8708 }
8709
8710 /* DIFF value
8711 0 |encoded in location|
8712 |------------|-------------------|---------
8713 sym+off(addend)
8714 -- before ---| *****************
8715 --------------------- between ---|
8716
8717 We only care how much data are relax between DIFF,
8718 marked as ***. */
8719
8720 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8721 between = get_nds32_elf_blank_total (&blank_t,
8722 irel->r_addend + offset, 0);
8723 if (between == before)
8724 goto done_adjust_diff;
8725
8726 switch (ELF32_R_TYPE (irel->r_info))
8727 {
8728 case R_NDS32_DIFF8:
8729 bfd_put_8 (abfd, offset - (between - before),
8730 contents + irel->r_offset);
8731 break;
8732 case R_NDS32_DIFF16:
8733 bfd_put_16 (abfd, offset - (between - before),
8734 contents + irel->r_offset);
8735 break;
8736 case R_NDS32_DIFF32:
8737 bfd_put_32 (abfd, offset - (between - before),
8738 contents + irel->r_offset);
8739 break;
8740 }
8741 }
8742 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8743 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8744 {
8745 bfd_vma val = 0;
8746 unsigned int len = 0;
8747 unsigned long before, between;
8748 bfd_byte *endp, *p;
8749
8750 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8751 &len);
8752
8753 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8754 between = get_nds32_elf_blank_total (&blank_t,
8755 irel->r_addend + val, 0);
8756 if (between == before)
8757 goto done_adjust_diff;
8758
8759 p = contents + irel->r_offset;
8760 endp = p + len -1;
8761 memset (p, 0x80, len);
8762 *(endp) = 0;
8763 p = write_uleb128 (p, val - (between - before)) - 1;
8764 if (p < endp)
8765 *p |= 0x80;
8766 }
8767 done_adjust_diff:
8768
8769 if (sec == sect)
8770 {
8771 raddr = irel->r_offset;
8772 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8773 irel->r_offset, 1);
8774
8775 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8776 continue;
8777 if (blank_t2 && blank_t2->next
8778 && (blank_t2->offset > raddr
8779 || blank_t2->next->offset <= raddr))
8780 (*_bfd_error_handler)
8781 (_("%B: %s\n"), abfd,
8782 "Error: search_nds32_elf_blank reports wrong node");
8783
8784 /* Mark reloc in deleted portion as NONE.
8785 For some relocs like R_NDS32_LABEL that doesn't modify the
8786 content in the section. R_NDS32_LABEL doesn't belong to the
8787 instruction in the section, so we should preserve it. */
8788 if (raddr >= blank_t2->offset
8789 && raddr < blank_t2->offset + blank_t2->size
8790 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8793 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8794 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8795 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8796 {
8797 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8798 R_NDS32_NONE);
8799 continue;
8800 }
8801 }
8802
8803 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8804 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8805 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8806 continue;
8807
8808 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8809 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8810 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8811 {
8812 if (irel->r_addend <= sec->size)
8813 irel->r_addend -=
8814 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8815 }
8816 }
8817 }
8818
8819 /* Adjust the local symbols defined in this section. */
8820 blank_t = blank_head;
8821 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8822 {
8823 if (isym->st_shndx == sec_shndx)
8824 {
8825 if (isym->st_value <= sec->size)
8826 {
8827 bfd_vma ahead;
8828 bfd_vma orig_addr = isym->st_value;
8829
8830 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8831 isym->st_value -= ahead;
8832
8833 /* Adjust function size. */
8834 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8835 && isym->st_size > 0)
8836 isym->st_size -=
8837 get_nds32_elf_blank_total
8838 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8839 }
8840 }
8841 }
8842
8843 /* Now adjust the global symbols defined in this section. */
8844 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8845 - symtab_hdr->sh_info);
8846 sym_hashes = elf_sym_hashes (abfd);
8847 end_hashes = sym_hashes + symcount;
8848 blank_t = blank_head;
8849 for (; sym_hashes < end_hashes; sym_hashes++)
8850 {
8851 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8852
8853 if ((sym_hash->root.type == bfd_link_hash_defined
8854 || sym_hash->root.type == bfd_link_hash_defweak)
8855 && sym_hash->root.u.def.section == sec)
8856 {
8857 if (sym_hash->root.u.def.value <= sec->size)
8858 {
8859 bfd_vma ahead;
8860 bfd_vma orig_addr = sym_hash->root.u.def.value;
8861
8862 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8863 sym_hash->root.u.def.value -= ahead;
8864
8865 /* Adjust function size. */
8866 if (sym_hash->type == STT_FUNC)
8867 sym_hash->size -=
8868 get_nds32_elf_blank_total
8869 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8870
8871 }
8872 }
8873 }
8874
8875 contents = elf_section_data (sec)->this_hdr.contents;
8876 blank_t = blank_head;
8877 while (blank_t->next)
8878 {
8879 /* Actually delete the bytes. */
8880
8881 /* If current blank is the last blank overlap with current section,
8882 go to finish process. */
8883 if (sec->size <= (blank_t->next->offset))
8884 break;
8885
8886 memmove (contents + blank_t->offset - blank_t->total_size,
8887 contents + blank_t->offset + blank_t->size,
8888 blank_t->next->offset - (blank_t->offset + blank_t->size));
8889
8890 blank_t = blank_t->next;
8891 }
8892
8893 if (sec->size > (blank_t->offset + blank_t->size))
8894 {
8895 /* There are remaining code between blank and section boundary.
8896 Move the remaining code to appropriate location. */
8897 memmove (contents + blank_t->offset - blank_t->total_size,
8898 contents + blank_t->offset + blank_t->size,
8899 sec->size - (blank_t->offset + blank_t->size));
8900 sec->size -= blank_t->total_size + blank_t->size;
8901 }
8902 else
8903 /* This blank is not entirely included in the section,
8904 reduce the section size by only part of the blank size. */
8905 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8906
8907 while (blank_head)
8908 {
8909 blank_t = blank_head;
8910 blank_head = blank_head->next;
8911 remove_nds32_elf_blank (blank_t);
8912 }
8913
8914 return TRUE;
8915 }
8916
8917 /* Get the contents of a section. */
8918
8919 static int
8920 nds32_get_section_contents (bfd *abfd, asection *sec,
8921 bfd_byte **contents_p, bfd_boolean cache)
8922 {
8923 /* Get the section contents. */
8924 if (elf_section_data (sec)->this_hdr.contents != NULL)
8925 *contents_p = elf_section_data (sec)->this_hdr.contents;
8926 else
8927 {
8928 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8929 return FALSE;
8930 if (cache)
8931 elf_section_data (sec)->this_hdr.contents = *contents_p;
8932 }
8933
8934 return TRUE;
8935 }
8936
8937 /* Get the contents of the internal symbol of abfd. */
8938
8939 static int
8940 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8941 Elf_Internal_Sym **isymbuf_p)
8942 {
8943 Elf_Internal_Shdr *symtab_hdr;
8944 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8945
8946 /* Read this BFD's local symbols if we haven't done so already. */
8947 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8948 {
8949 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8950 if (*isymbuf_p == NULL)
8951 {
8952 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8953 symtab_hdr->sh_info, 0,
8954 NULL, NULL, NULL);
8955 if (*isymbuf_p == NULL)
8956 return FALSE;
8957 }
8958 }
8959 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8960
8961 return TRUE;
8962 }
8963
8964 /* Range of small data. */
8965 static bfd_vma sdata_range[2][2];
8966 static bfd_vma const sdata_init_range[2] =
8967 { ACCURATE_12BIT_S1, ACCURATE_19BIT };
8968
8969 static int
8970 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8971 bfd_byte *contents, bfd_vma addr)
8972 {
8973 unsigned long insn = bfd_getb32 (contents + addr);
8974
8975 if (insn & 0x80000000)
8976 return 2;
8977
8978 return 4;
8979 }
8980
8981 /* Set the gp relax range. We have to measure the safe range
8982 to do gp relaxation. */
8983
8984 static void
8985 relax_range_measurement (bfd *abfd)
8986 {
8987 asection *sec_f, *sec_b;
8988 /* For upper bound. */
8989 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8990 bfd_vma align;
8991 static int decide_relax_range = 0;
8992 int i;
8993 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8994
8995 if (decide_relax_range)
8996 return;
8997 decide_relax_range = 1;
8998
8999 if (sda_rela_sec == NULL)
9000 {
9001 /* Since there is no data sections, we assume the range is page size. */
9002 for (i = 0; i < range_number; i++)
9003 {
9004 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9005 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9006 }
9007 return;
9008 }
9009
9010 /* Get the biggest alignment power after the gp located section. */
9011 sec_f = sda_rela_sec->output_section;
9012 sec_b = sec_f->next;
9013 align = 0;
9014 while (sec_b != NULL)
9015 {
9016 if ((unsigned)(1 << sec_b->alignment_power) > align)
9017 align = (1 << sec_b->alignment_power);
9018 sec_b = sec_b->next;
9019 }
9020
9021 /* I guess we can not determine the section before
9022 gp located section, so we assume the align is max page size. */
9023 for (i = 0; i < range_number; i++)
9024 {
9025 sdata_range[i][1] = sdata_init_range[i] - align;
9026 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
9027 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
9028 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9029 }
9030 }
9031
9032 /* These are macros used to check flags encoded in r_addend.
9033 They are only used by nds32_elf_relax_section (). */
9034 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9035 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9036 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9037 #define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9038
9039 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9040
9041 static bfd_boolean
9042 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9043 Elf_Internal_Rela *internal_relocs, int *insn_len,
9044 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9045 Elf_Internal_Shdr *symtab_hdr)
9046 {
9047 /* There are 3 variations for LONGCALL1
9048 case 4-4-2; 16-bit on, optimize off or optimize for space
9049 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9050 ori ta, ta, lo12(symbol) ; LO12S0
9051 jral5 ta ;
9052
9053 case 4-4-4; 16-bit off, optimize don't care
9054 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9055 ori ta, ta, lo12(symbol) ; LO12S0
9056 jral ta ;
9057
9058 case 4-4-4; 16-bit on, optimize for speed
9059 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9060 ori ta, ta, lo12(symbol) ; LO12S0
9061 jral ta ;
9062 Check code for -mlong-calls output. */
9063
9064 /* Get the reloc for the address from which the register is
9065 being loaded. This reloc will tell us which function is
9066 actually being called. */
9067
9068 bfd_vma laddr;
9069 int seq_len; /* Original length of instruction sequence. */
9070 uint32_t insn;
9071 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9072 int pic_ext_target = 0;
9073 bfd_signed_vma foff;
9074 uint16_t insn16;
9075
9076 irelend = internal_relocs + sec->reloc_count;
9077 seq_len = GET_SEQ_LEN (irel->r_addend);
9078 laddr = irel->r_offset;
9079 *insn_len = seq_len;
9080
9081 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9082 R_NDS32_HI20_RELA, laddr);
9083 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9084 R_NDS32_LO12S0_ORI_RELA,
9085 laddr + 4);
9086
9087 if (hi_irelfn == irelend || lo_irelfn == irelend)
9088 {
9089 (*_bfd_error_handler)
9090 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9091 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9092 return FALSE;
9093 }
9094
9095 /* Get the value of the symbol referred to by the reloc. */
9096 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9097 &pic_ext_target);
9098
9099 /* This condition only happened when symbol is undefined. */
9100 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9101 || foff >= CONSERVATIVE_24BIT_S1)
9102 return FALSE;
9103
9104 /* Relax to: jal symbol; 25_PCREL */
9105 /* For simplicity of coding, we are going to modify the section
9106 contents, the section relocs, and the BFD symbol table. We
9107 must tell the rest of the code not to free up this
9108 information. It would be possible to instead create a table
9109 of changes which have to be made, as is done in coff-mips.c;
9110 that would be more work, but would require less memory when
9111 the linker is run. */
9112
9113 /* Replace the long call with a jal. */
9114 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9115 R_NDS32_25_PCREL_RELA);
9116 irel->r_addend = hi_irelfn->r_addend;
9117
9118 /* We don't resolve this here but resolve it in relocate_section. */
9119 insn = INSN_JAL;
9120 bfd_putb32 (insn, contents + irel->r_offset);
9121
9122 hi_irelfn->r_info =
9123 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9124 lo_irelfn->r_info =
9125 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9126 *insn_len = 4;
9127
9128 if (seq_len & 0x2)
9129 {
9130 insn16 = NDS32_NOP16;
9131 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9132 lo_irelfn->r_info =
9133 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9134 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9135 *insn_len += 2;
9136 }
9137 return TRUE;
9138 }
9139
9140 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9141 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
9142
9143 static bfd_boolean
9144 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9145 Elf_Internal_Rela *internal_relocs, int *insn_len,
9146 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9147 Elf_Internal_Shdr *symtab_hdr)
9148 {
9149 /* bltz rt, .L1 ; LONGCALL2
9150 jal symbol ; 25_PCREL
9151 .L1: */
9152
9153 /* Get the reloc for the address from which the register is
9154 being loaded. This reloc will tell us which function is
9155 actually being called. */
9156
9157 bfd_vma laddr;
9158 uint32_t insn;
9159 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9160 int pic_ext_target = 0;
9161 bfd_signed_vma foff;
9162
9163 irelend = internal_relocs + sec->reloc_count;
9164 laddr = irel->r_offset;
9165 i1_irelfn =
9166 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9167 R_NDS32_25_PCREL_RELA, laddr + 4);
9168
9169 if (i1_irelfn == irelend)
9170 {
9171 (*_bfd_error_handler)
9172 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9173 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9174 return FALSE;
9175 }
9176
9177 insn = bfd_getb32 (contents + laddr);
9178
9179 /* Get the value of the symbol referred to by the reloc. */
9180 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9181 &pic_ext_target);
9182
9183 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9184 || foff >= CONSERVATIVE_16BIT_S1)
9185 return FALSE;
9186
9187 /* Relax to bgezal rt, label ; 17_PCREL
9188 or bltzal rt, label ; 17_PCREL */
9189
9190 /* Convert to complimentary conditional call. */
9191 insn = CONVERT_CONDITION_CALL (insn);
9192
9193 /* For simplicity of coding, we are going to modify the section
9194 contents, the section relocs, and the BFD symbol table. We
9195 must tell the rest of the code not to free up this
9196 information. It would be possible to instead create a table
9197 of changes which have to be made, as is done in coff-mips.c;
9198 that would be more work, but would require less memory when
9199 the linker is run. */
9200
9201 /* Clean unnessary relocations. */
9202 i1_irelfn->r_info =
9203 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9204 cond_irelfn =
9205 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9206 R_NDS32_17_PCREL_RELA, laddr);
9207 if (cond_irelfn != irelend)
9208 cond_irelfn->r_info =
9209 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9210
9211 /* Replace the long call with a bgezal. */
9212 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9213 R_NDS32_17_PCREL_RELA);
9214 irel->r_addend = i1_irelfn->r_addend;
9215
9216 bfd_putb32 (insn, contents + irel->r_offset);
9217
9218 *insn_len = 4;
9219 return TRUE;
9220 }
9221
9222 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9223
9224 static bfd_boolean
9225 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9226 Elf_Internal_Rela *internal_relocs, int *insn_len,
9227 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9228 Elf_Internal_Shdr *symtab_hdr)
9229 {
9230 /* There are 3 variations for LONGCALL3
9231 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9232 bltz rt, $1 ; LONGCALL3
9233 sethi ta, hi20(symbol) ; HI20
9234 ori ta, ta, lo12(symbol) ; LO12S0
9235 jral5 ta ;
9236 $1
9237
9238 case 4-4-4-4; 16-bit off, optimize don't care
9239 bltz rt, $1 ; LONGCALL3
9240 sethi ta, hi20(symbol) ; HI20
9241 ori ta, ta, lo12(symbol) ; LO12S0
9242 jral ta ;
9243 $1
9244
9245 case 4-4-4-4; 16-bit on, optimize for speed
9246 bltz rt, $1 ; LONGCALL3
9247 sethi ta, hi20(symbol) ; HI20
9248 ori ta, ta, lo12(symbol) ; LO12S0
9249 jral ta ;
9250 $1 */
9251
9252 /* Get the reloc for the address from which the register is
9253 being loaded. This reloc will tell us which function is
9254 actually being called. */
9255
9256 bfd_vma laddr;
9257 int seq_len; /* Original length of instruction sequence. */
9258 uint32_t insn;
9259 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9260 int pic_ext_target = 0;
9261 bfd_signed_vma foff;
9262 uint16_t insn16;
9263
9264 irelend = internal_relocs + sec->reloc_count;
9265 seq_len = GET_SEQ_LEN (irel->r_addend);
9266 laddr = irel->r_offset;
9267 *insn_len = seq_len;
9268
9269 hi_irelfn =
9270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9271 R_NDS32_HI20_RELA, laddr + 4);
9272 lo_irelfn =
9273 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9274 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9275
9276 if (hi_irelfn == irelend || lo_irelfn == irelend)
9277 {
9278 (*_bfd_error_handler)
9279 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9280 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9281 return FALSE;
9282 }
9283
9284 /* Get the value of the symbol referred to by the reloc. */
9285 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9286 &pic_ext_target);
9287
9288 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9289 || foff >= CONSERVATIVE_24BIT_S1)
9290 return FALSE;
9291
9292 insn = bfd_getb32 (contents + laddr);
9293 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9294 {
9295 /* Relax to bgezal rt, label ; 17_PCREL
9296 or bltzal rt, label ; 17_PCREL */
9297
9298 /* Convert to complimentary conditional call. */
9299 insn = CONVERT_CONDITION_CALL (insn);
9300 bfd_putb32 (insn, contents + irel->r_offset);
9301
9302 *insn_len = 4;
9303 irel->r_info =
9304 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9305 hi_irelfn->r_info =
9306 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9307 lo_irelfn->r_info =
9308 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9309
9310 cond_irelfn =
9311 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9312 R_NDS32_17_PCREL_RELA, laddr);
9313 if (cond_irelfn != irelend)
9314 {
9315 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9316 R_NDS32_17_PCREL_RELA);
9317 cond_irelfn->r_addend = hi_irelfn->r_addend;
9318 }
9319
9320 if (seq_len & 0x2)
9321 {
9322 insn16 = NDS32_NOP16;
9323 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9324 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9325 R_NDS32_INSN16);
9326 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9327 insn_len += 2;
9328 }
9329 }
9330 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9331 {
9332 /* Relax to the following instruction sequence
9333 bltz rt, $1 ; LONGCALL2
9334 jal symbol ; 25_PCREL
9335 $1 */
9336 *insn_len = 8;
9337 insn = INSN_JAL;
9338 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9339
9340 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9341 R_NDS32_25_PCREL_RELA);
9342 irel->r_info =
9343 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9344
9345 lo_irelfn->r_info =
9346 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9347
9348 if (seq_len & 0x2)
9349 {
9350 insn16 = NDS32_NOP16;
9351 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9352 lo_irelfn->r_info =
9353 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9354 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9355 insn_len += 2;
9356 }
9357 }
9358 return TRUE;
9359 }
9360
9361 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
9362
9363 static bfd_boolean
9364 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9365 Elf_Internal_Rela *internal_relocs, int *insn_len,
9366 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9367 Elf_Internal_Shdr *symtab_hdr)
9368 {
9369 /* There are 3 variations for LONGJUMP1
9370 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9371 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9372 ori ta, ta, lo12(symbol) ; LO12S0
9373 jr5 ta ;
9374
9375 case 4-4-4; 16-bit off, optimize don't care
9376 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9377 ori ta, ta, lo12(symbol) ; LO12S0
9378 jr ta ;
9379
9380 case 4-4-4; 16-bit on, optimize for speed
9381 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9382 ori ta, ta, lo12(symbol) ; LO12S0
9383 jr ta ; */
9384
9385 /* Get the reloc for the address from which the register is
9386 being loaded. This reloc will tell us which function is
9387 actually being called. */
9388
9389 bfd_vma laddr;
9390 int seq_len; /* Original length of instruction sequence. */
9391 int insn16_on; /* 16-bit on/off. */
9392 uint32_t insn;
9393 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9394 int pic_ext_target = 0;
9395 bfd_signed_vma foff;
9396 uint16_t insn16;
9397 unsigned long reloc;
9398
9399 irelend = internal_relocs + sec->reloc_count;
9400 seq_len = GET_SEQ_LEN (irel->r_addend);
9401 laddr = irel->r_offset;
9402 *insn_len = seq_len;
9403 insn16_on = IS_16BIT_ON (irel->r_addend);
9404
9405 hi_irelfn =
9406 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9407 R_NDS32_HI20_RELA, laddr);
9408 lo_irelfn =
9409 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9410 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9411 if (hi_irelfn == irelend || lo_irelfn == irelend)
9412 {
9413 (*_bfd_error_handler)
9414 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9415 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9416 return FALSE;
9417 }
9418
9419 /* Get the value of the symbol referred to by the reloc. */
9420 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9421 &pic_ext_target);
9422
9423 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9424 || foff < -CONSERVATIVE_24BIT_S1)
9425 return FALSE;
9426
9427 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9428 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9429 {
9430 /* j8 label */
9431 /* 16-bit on, but not optimized for speed. */
9432 reloc = R_NDS32_9_PCREL_RELA;
9433 insn16 = INSN_J8;
9434 bfd_putb16 (insn16, contents + irel->r_offset);
9435 *insn_len = 2;
9436 irel->r_info =
9437 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9438 }
9439 else
9440 {
9441 /* j label */
9442 reloc = R_NDS32_25_PCREL_RELA;
9443 insn = INSN_J;
9444 bfd_putb32 (insn, contents + irel->r_offset);
9445 *insn_len = 4;
9446 irel->r_info =
9447 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9448 irel->r_addend = 0;
9449 }
9450
9451 hi_irelfn->r_info =
9452 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9453 lo_irelfn->r_info =
9454 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9455
9456 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9457 {
9458 insn16 = NDS32_NOP16;
9459 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9460 lo_irelfn->r_info =
9461 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9462 R_NDS32_INSN16);
9463 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9464 *insn_len += 2;
9465 }
9466 return TRUE;
9467 }
9468
9469 /* Revert condition branch. This function does not check if the input
9470 instruction is condition branch or not. */
9471
9472 static void
9473 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9474 uint16_t *re_insn16, uint32_t *re_insn)
9475 {
9476 uint32_t comp_insn = 0;
9477 uint16_t comp_insn16 = 0;
9478
9479 if (insn)
9480 {
9481 if (N32_OP6 (insn) == N32_OP6_BR1)
9482 {
9483 /* beqs label. */
9484 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9485 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9486 {
9487 /* Insn can be contracted to 16-bit implied r5. */
9488 comp_insn16 =
9489 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9490 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9491 }
9492 }
9493 else if (N32_OP6 (insn) == N32_OP6_BR3)
9494 {
9495 /* bnec $ta, imm11, label. */
9496 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9497 }
9498 else
9499 {
9500 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9501 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9502 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9503 {
9504 if (N32_IS_RT3 (insn))
9505 {
9506 /* Insn can be contracted to 16-bit. */
9507 comp_insn16 =
9508 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9509 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9510 }
9511 else if (N32_RT5 (insn) == REG_R15)
9512 {
9513 /* Insn can be contracted to 16-bit. */
9514 comp_insn16 =
9515 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9516 }
9517 }
9518 }
9519 }
9520 else
9521 {
9522 switch ((insn16 & 0xf000) >> 12)
9523 {
9524 case 0xc:
9525 /* beqz38 or bnez38 */
9526 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9527 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9528 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9529 break;
9530
9531 case 0xd:
9532 /* beqs38 or bnes38 */
9533 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9534 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9535 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9536 | (REG_R5 << 15);
9537 break;
9538
9539 case 0xe:
9540 /* beqzS8 or bnezS8 */
9541 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9542 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9543 comp_insn |= REG_R15 << 20;
9544 break;
9545
9546 default:
9547 break;
9548 }
9549 }
9550 if (comp_insn && re_insn)
9551 *re_insn = comp_insn;
9552 if (comp_insn16 && re_insn16)
9553 *re_insn16 = comp_insn16;
9554 }
9555
9556 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
9557
9558 static bfd_boolean
9559 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9560 Elf_Internal_Rela *internal_relocs, int *insn_len,
9561 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9562 Elf_Internal_Shdr *symtab_hdr)
9563 {
9564 /* There are 3 variations for LONGJUMP2
9565 case 2-4; 1st insn convertible, 16-bit on,
9566 optimize off or optimize for space
9567 bnes38 rt, ra, $1 ; LONGJUMP2
9568 j label ; 25_PCREL
9569 $1:
9570
9571 case 4-4; 1st insn not convertible
9572 bne rt, ra, $1 ; LONGJUMP2
9573 j label ; 25_PCREL
9574 $1:
9575
9576 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9577 bne rt, ra, $1 ; LONGJUMP2
9578 j label ; 25_PCREL
9579 $1: */
9580
9581 /* Get the reloc for the address from which the register is
9582 being loaded. This reloc will tell us which function is
9583 actually being called. */
9584
9585 bfd_vma laddr;
9586 int seq_len; /* Original length of instruction sequence. */
9587 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9588 int pic_ext_target = 0, first_size;
9589 unsigned int i;
9590 bfd_signed_vma foff;
9591 uint32_t insn, re_insn = 0;
9592 uint16_t insn16, re_insn16 = 0;
9593 unsigned long reloc, cond_reloc;
9594
9595 enum elf_nds32_reloc_type checked_types[] =
9596 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9597
9598 irelend = internal_relocs + sec->reloc_count;
9599 seq_len = GET_SEQ_LEN (irel->r_addend);
9600 laddr = irel->r_offset;
9601 *insn_len = seq_len;
9602 first_size = (seq_len == 6) ? 2 : 4;
9603
9604 i2_irelfn =
9605 find_relocs_at_address_addr (irel, internal_relocs,
9606 irelend, R_NDS32_25_PCREL_RELA,
9607 laddr + first_size);
9608
9609 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9610 {
9611 cond_irelfn =
9612 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9613 checked_types[i], laddr);
9614 if (cond_irelfn != irelend)
9615 break;
9616 }
9617
9618 if (i2_irelfn == irelend || cond_irelfn == irelend)
9619 {
9620 (*_bfd_error_handler)
9621 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9622 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9623 return FALSE;
9624 }
9625
9626 /* Get the value of the symbol referred to by the reloc. */
9627 foff =
9628 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9629 &pic_ext_target);
9630 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9631 || foff >= CONSERVATIVE_16BIT_S1)
9632 return FALSE;
9633
9634 /* Get the all corresponding instructions. */
9635 if (first_size == 4)
9636 {
9637 insn = bfd_getb32 (contents + laddr);
9638 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9639 }
9640 else
9641 {
9642 insn16 = bfd_getb16 (contents + laddr);
9643 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9644 }
9645
9646 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9647 && foff < ACCURATE_8BIT_S1 - first_size)
9648 {
9649 if (first_size == 4)
9650 {
9651 /* Don't convert it to 16-bit now, keep this as relaxable for
9652 ``label reloc; INSN16''. */
9653
9654 /* Save comp_insn32 to buffer. */
9655 bfd_putb32 (re_insn, contents + irel->r_offset);
9656 *insn_len = 4;
9657 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9658 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9659 cond_reloc = R_NDS32_INSN16;
9660 }
9661 else
9662 {
9663 bfd_putb16 (re_insn16, contents + irel->r_offset);
9664 *insn_len = 2;
9665 reloc = R_NDS32_9_PCREL_RELA;
9666 cond_reloc = R_NDS32_NONE;
9667 }
9668 }
9669 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9670 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9671 && foff < ACCURATE_14BIT_S1 - first_size))
9672 {
9673 /* beqs label ; 15_PCREL */
9674 bfd_putb32 (re_insn, contents + irel->r_offset);
9675 *insn_len = 4;
9676 reloc = R_NDS32_15_PCREL_RELA;
9677 cond_reloc = R_NDS32_NONE;
9678 }
9679 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9680 && foff >= -CONSERVATIVE_16BIT_S1
9681 && foff < CONSERVATIVE_16BIT_S1)
9682 {
9683 /* beqz label ; 17_PCREL */
9684 bfd_putb32 (re_insn, contents + irel->r_offset);
9685 *insn_len = 4;
9686 reloc = R_NDS32_17_PCREL_RELA;
9687 cond_reloc = R_NDS32_NONE;
9688 }
9689 else
9690 return FALSE;
9691
9692 /* Set all relocations. */
9693 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9694 irel->r_addend = i2_irelfn->r_addend;
9695
9696 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9697 cond_reloc);
9698 cond_irelfn->r_addend = 0;
9699
9700 if ((seq_len ^ *insn_len ) & 0x2)
9701 {
9702 insn16 = NDS32_NOP16;
9703 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9704 i2_irelfn->r_offset = 4;
9705 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9706 R_NDS32_INSN16);
9707 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9708 *insn_len += 2;
9709 }
9710 else
9711 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9712 R_NDS32_NONE);
9713 return TRUE;
9714 }
9715
9716 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
9717
9718 static bfd_boolean
9719 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9720 Elf_Internal_Rela *internal_relocs, int *insn_len,
9721 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9722 Elf_Internal_Shdr *symtab_hdr)
9723 {
9724 /* There are 5 variations for LONGJUMP3
9725 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9726 optimize off or optimize for space
9727 bnes38 rt, ra, $1 ; LONGJUMP3
9728 sethi ta, hi20(symbol) ; HI20
9729 ori ta, ta, lo12(symbol) ; LO12S0
9730 jr5 ta ;
9731 $1: ;
9732
9733 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9734 bnes38 rt, ra, $1 ; LONGJUMP3
9735 sethi ta, hi20(symbol) ; HI20
9736 ori ta, ta, lo12(symbol) ; LO12S0
9737 jr5 ta ;
9738 $1: ; LABEL
9739
9740 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9741 optimize off or optimize for space
9742 bne rt, ra, $1 ; LONGJUMP3
9743 sethi ta, hi20(symbol) ; HI20
9744 ori ta, ta, lo12(symbol) ; LO12S0
9745 jr5 ta ;
9746 $1: ;
9747
9748 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9749 16-bit off if no INSN16
9750 bne rt, ra, $1 ; LONGJUMP3
9751 sethi ta, hi20(symbol) ; HI20
9752 ori ta, ta, lo12(symbol) ; LO12S0
9753 jr ta ;
9754 $1: ;
9755
9756 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9757 16-bit off if no INSN16
9758 bne rt, ra, $1 ; LONGJUMP3
9759 sethi ta, hi20(symbol) ; HI20
9760 ori ta, ta, lo12(symbol) ; LO12S0
9761 jr ta ;
9762 $1: ; LABEL */
9763
9764 /* Get the reloc for the address from which the register is
9765 being loaded. This reloc will tell us which function is
9766 actually being called. */
9767 enum elf_nds32_reloc_type checked_types[] =
9768 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9769
9770 int reloc_off = 0, cond_removed = 0, convertible;
9771 bfd_vma laddr;
9772 int seq_len; /* Original length of instruction sequence. */
9773 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9774 int pic_ext_target = 0, first_size;
9775 unsigned int i;
9776 bfd_signed_vma foff;
9777 uint32_t insn, re_insn = 0;
9778 uint16_t insn16, re_insn16 = 0;
9779 unsigned long reloc, cond_reloc;
9780
9781 irelend = internal_relocs + sec->reloc_count;
9782 seq_len = GET_SEQ_LEN (irel->r_addend);
9783 laddr = irel->r_offset;
9784 *insn_len = seq_len;
9785
9786 convertible = IS_1ST_CONVERT (irel->r_addend);
9787
9788 if (convertible)
9789 first_size = 2;
9790 else
9791 first_size = 4;
9792
9793 /* Get all needed relocations. */
9794 hi_irelfn =
9795 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9796 R_NDS32_HI20_RELA, laddr + first_size);
9797 lo_irelfn =
9798 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9799 R_NDS32_LO12S0_ORI_RELA,
9800 laddr + first_size + 4);
9801
9802 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9803 {
9804 cond_irelfn =
9805 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9806 checked_types[i], laddr);
9807 if (cond_irelfn != irelend)
9808 break;
9809 }
9810
9811 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9812 {
9813 (*_bfd_error_handler)
9814 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9815 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9816 return FALSE;
9817 }
9818
9819 /* Get the value of the symbol referred to by the reloc. */
9820 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9821 &pic_ext_target);
9822
9823 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9824 || foff >= CONSERVATIVE_24BIT_S1)
9825 return FALSE;
9826
9827 /* Get the all corresponding instructions. */
9828 if (first_size == 4)
9829 {
9830 insn = bfd_getb32 (contents + laddr);
9831 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9832 }
9833 else
9834 {
9835 insn16 = bfd_getb16 (contents + laddr);
9836 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9837 }
9838
9839 /* For simplicity of coding, we are going to modify the section
9840 contents, the section relocs, and the BFD symbol table. We
9841 must tell the rest of the code not to free up this
9842 information. It would be possible to instead create a table
9843 of changes which have to be made, as is done in coff-mips.c;
9844 that would be more work, but would require less memory when
9845 the linker is run. */
9846
9847 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9848 && foff < ACCURATE_8BIT_S1 - first_size)
9849 {
9850 if (!(seq_len & 0x2))
9851 {
9852 /* Don't convert it to 16-bit now, keep this as relaxable
9853 for ``label reloc; INSN1a''6. */
9854 /* Save comp_insn32 to buffer. */
9855 bfd_putb32 (re_insn, contents + irel->r_offset);
9856 *insn_len = 4;
9857 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9858 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9859 cond_reloc = R_NDS32_INSN16;
9860 }
9861 else
9862 {
9863 /* Not optimize for speed; convert sequence to 16-bit. */
9864 /* Save comp_insn16 to buffer. */
9865 bfd_putb16 (re_insn16, contents + irel->r_offset);
9866 *insn_len = 2;
9867 reloc = R_NDS32_9_PCREL_RELA;
9868 cond_reloc = R_NDS32_NONE;
9869 }
9870 cond_removed = 1;
9871 }
9872 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9873 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9874 && foff < ACCURATE_14BIT_S1 - first_size))
9875 {
9876 /* beqs label ; 15_PCREL */
9877 bfd_putb32 (re_insn, contents + irel->r_offset);
9878 *insn_len = 4;
9879 reloc = R_NDS32_15_PCREL_RELA;
9880 cond_reloc = R_NDS32_NONE;
9881 cond_removed = 1;
9882 }
9883 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9884 && foff >= -CONSERVATIVE_16BIT_S1
9885 && foff < CONSERVATIVE_16BIT_S1)
9886 {
9887 /* beqz label ; 17_PCREL */
9888 bfd_putb32 (re_insn, contents + irel->r_offset);
9889 *insn_len = 4;
9890 reloc = R_NDS32_17_PCREL_RELA;
9891 cond_reloc = R_NDS32_NONE;
9892 cond_removed = 1;
9893 }
9894 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9895 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9896 {
9897 /* Relax to one of the following 3 variations
9898
9899 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9900 for space
9901 bnes38 rt, $1 ; LONGJUMP2
9902 j label ; 25_PCREL
9903 $1
9904
9905 case 4-4; 1st insn not convertible, others don't care
9906 bne rt, ra, $1 ; LONGJUMP2
9907 j label ; 25_PCREL
9908 $1
9909
9910 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9911 bne rt, ra, $1 ; LONGJUMP2
9912 j label ; 25_PCREL
9913 $1 */
9914
9915 /* Offset for first instruction. */
9916
9917 /* Use j label as second instruction. */
9918 *insn_len = 4 + first_size;
9919 insn = INSN_J;
9920 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9921 reloc = R_NDS32_LONGJUMP2;
9922 cond_reloc = R_NDS32_25_PLTREL;
9923 }
9924 else
9925 return FALSE;
9926
9927 if (cond_removed == 1)
9928 {
9929 /* Set all relocations. */
9930 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9931 irel->r_addend = hi_irelfn->r_addend;
9932
9933 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9934 cond_reloc);
9935 cond_irelfn->r_addend = 0;
9936 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9937 R_NDS32_NONE);
9938 }
9939 else
9940 {
9941 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9942 irel->r_addend = irel->r_addend;
9943 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9944 cond_reloc);
9945 }
9946
9947 if ((seq_len ^ *insn_len ) & 0x2)
9948 {
9949 insn16 = NDS32_NOP16;
9950 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9951 lo_irelfn->r_offset = *insn_len;
9952 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9953 R_NDS32_INSN16);
9954 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9955 *insn_len += 2;
9956 }
9957 else
9958 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9959 R_NDS32_NONE);
9960 return TRUE;
9961 }
9962
9963 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
9964
9965 static bfd_boolean
9966 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9967 Elf_Internal_Rela *internal_relocs, int *insn_len,
9968 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9969 Elf_Internal_Shdr *symtab_hdr)
9970 {
9971 /* The pattern for LONGCALL4. Support for function cse.
9972 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9973 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9974 jral ta ; PTR_RES/EMPTY/INSN16 */
9975
9976 bfd_vma laddr;
9977 uint32_t insn;
9978 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9979 Elf_Internal_Rela *irelend;
9980 int pic_ext_target = 0;
9981 bfd_signed_vma foff;
9982
9983 irelend = internal_relocs + sec->reloc_count;
9984 laddr = irel->r_offset;
9985
9986 /* Get the reloc for the address from which the register is
9987 being loaded. This reloc will tell us which function is
9988 actually being called. */
9989 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9990 R_NDS32_HI20_RELA, laddr);
9991
9992 if (hi_irel == irelend)
9993 {
9994 (*_bfd_error_handler)
9995 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9996 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9997 return FALSE;
9998 }
9999
10000 /* Get the value of the symbol referred to by the reloc. */
10001 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10002 &pic_ext_target);
10003
10004 /* This condition only happened when symbol is undefined. */
10005 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10006 || foff >= CONSERVATIVE_24BIT_S1)
10007 return FALSE;
10008
10009 /* Relax to: jal symbol; 25_PCREL */
10010 /* For simplicity of coding, we are going to modify the section
10011 contents, the section relocs, and the BFD symbol table. We
10012 must tell the rest of the code not to free up this
10013 information. It would be possible to instead create a table
10014 of changes which have to be made, as is done in coff-mips.c;
10015 that would be more work, but would require less memory when
10016 the linker is run. */
10017
10018 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10019 R_NDS32_PTR_RESOLVED, irel->r_addend);
10020 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10021 R_NDS32_EMPTY, irel->r_addend);
10022
10023 if (ptr_irel == irelend || em_irel == irelend)
10024 {
10025 (*_bfd_error_handler)
10026 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10027 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10028 return FALSE;
10029 }
10030 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10031 insn = bfd_getb32 (contents + irel->r_addend);
10032 if (insn & 0x80000000)
10033 return FALSE;
10034
10035 /* Replace the long call with a jal. */
10036 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10037 R_NDS32_25_PCREL_RELA);
10038 ptr_irel->r_addend = 1;
10039
10040 /* We don't resolve this here but resolve it in relocate_section. */
10041 insn = INSN_JAL;
10042 bfd_putb32 (insn, contents + em_irel->r_offset);
10043
10044 irel->r_info =
10045 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10046
10047 /* If there is function cse, HI20 can not remove now. */
10048 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10049 R_NDS32_LONGCALL4, laddr);
10050 if (call_irel == irelend)
10051 {
10052 *insn_len = 0;
10053 hi_irel->r_info =
10054 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10055 }
10056
10057 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10058 R_NDS32_INSN16, irel->r_addend);
10059 if (insn_irel != irelend)
10060 insn_irel->r_info =
10061 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10062
10063 return TRUE;
10064 }
10065
10066 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
10067
10068 static bfd_boolean
10069 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10070 Elf_Internal_Rela *internal_relocs, int *insn_len,
10071 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10072 Elf_Internal_Shdr *symtab_hdr)
10073 {
10074 /* The pattern for LONGCALL5.
10075 bltz rt, .L1 ; LONGCALL5/17_PCREL
10076 jal symbol ; 25_PCREL
10077 .L1: */
10078
10079 bfd_vma laddr;
10080 uint32_t insn;
10081 Elf_Internal_Rela *cond_irel, *irelend;
10082 int pic_ext_target = 0;
10083 bfd_signed_vma foff;
10084
10085 irelend = internal_relocs + sec->reloc_count;
10086 laddr = irel->r_offset;
10087 insn = bfd_getb32 (contents + laddr);
10088
10089 /* Get the reloc for the address from which the register is
10090 being loaded. This reloc will tell us which function is
10091 actually being called. */
10092 cond_irel =
10093 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10094 R_NDS32_25_PCREL_RELA, irel->r_addend);
10095 if (cond_irel == irelend)
10096 {
10097 (*_bfd_error_handler)
10098 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10099 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10100 return FALSE;
10101 }
10102
10103 /* Get the value of the symbol referred to by the reloc. */
10104 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10105 &pic_ext_target);
10106
10107 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10108 || foff >= CONSERVATIVE_16BIT_S1)
10109 return FALSE;
10110
10111 /* Relax to bgezal rt, label ; 17_PCREL
10112 or bltzal rt, label ; 17_PCREL */
10113
10114 /* Convert to complimentary conditional call. */
10115 insn = CONVERT_CONDITION_CALL (insn);
10116
10117 /* For simplicity of coding, we are going to modify the section
10118 contents, the section relocs, and the BFD symbol table. We
10119 must tell the rest of the code not to free up this
10120 information. It would be possible to instead create a table
10121 of changes which have to be made, as is done in coff-mips.c;
10122 that would be more work, but would require less memory when
10123 the linker is run. */
10124
10125 /* Modify relocation and contents. */
10126 cond_irel->r_info =
10127 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
10128
10129 /* Replace the long call with a bgezal. */
10130 bfd_putb32 (insn, contents + cond_irel->r_offset);
10131 *insn_len = 0;
10132
10133 /* Clean unnessary relocations. */
10134 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10135
10136 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10137 R_NDS32_17_PCREL_RELA, laddr);
10138 cond_irel->r_info =
10139 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10140
10141 return TRUE;
10142 }
10143
10144 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
10145
10146 static bfd_boolean
10147 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10148 Elf_Internal_Rela *internal_relocs, int *insn_len,
10149 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10150 Elf_Internal_Shdr *symtab_hdr)
10151 {
10152 /* The pattern for LONGCALL6.
10153 bltz rt, .L1 ; LONGCALL6/17_PCREL
10154 sethi ta, hi20(symbol) ; HI20/PTR
10155 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10156 jral ta ; PTR_RES/EMPTY/INSN16
10157 .L1 */
10158
10159 bfd_vma laddr;
10160 uint32_t insn;
10161 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10162 int pic_ext_target = 0;
10163 bfd_signed_vma foff;
10164
10165 irelend = internal_relocs + sec->reloc_count;
10166 laddr = irel->r_offset;
10167
10168 /* Get the reloc for the address from which the register is
10169 being loaded. This reloc will tell us which function is
10170 actually being called. */
10171 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10172 R_NDS32_EMPTY, irel->r_addend);
10173
10174 if (em_irel == irelend)
10175 {
10176 (*_bfd_error_handler)
10177 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10178 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10179 return FALSE;
10180 }
10181
10182 /* Get the value of the symbol referred to by the reloc. */
10183 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10184 &pic_ext_target);
10185
10186 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10187 || foff >= CONSERVATIVE_24BIT_S1)
10188 return FALSE;
10189
10190 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10191 insn = bfd_getb32 (contents + irel->r_addend);
10192 if (insn & 0x80000000)
10193 return FALSE;
10194
10195 insn = bfd_getb32 (contents + laddr);
10196 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10197 {
10198 /* Relax to bgezal rt, label ; 17_PCREL
10199 or bltzal rt, label ; 17_PCREL */
10200
10201 /* Convert to complimentary conditional call. */
10202 *insn_len = 0;
10203 insn = CONVERT_CONDITION_CALL (insn);
10204 bfd_putb32 (insn, contents + em_irel->r_offset);
10205
10206 em_irel->r_info =
10207 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10208
10209 /* Set resolved relocation. */
10210 cond_irel =
10211 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10212 R_NDS32_PTR_RESOLVED, irel->r_addend);
10213 if (cond_irel == irelend)
10214 {
10215 (*_bfd_error_handler)
10216 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10217 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10218 return FALSE;
10219 }
10220 cond_irel->r_addend = 1;
10221
10222 /* Clear relocations. */
10223
10224 irel->r_info =
10225 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10226
10227 cond_irel =
10228 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10229 R_NDS32_17_PCREL_RELA, laddr);
10230 if (cond_irel != irelend)
10231 cond_irel->r_info =
10232 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10233
10234 cond_irel =
10235 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10236 R_NDS32_INSN16, irel->r_addend);
10237 if (cond_irel != irelend)
10238 cond_irel->r_info =
10239 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10240
10241 }
10242 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10243 {
10244 /* Relax to the following instruction sequence
10245 bltz rt, .L1 ; LONGCALL2/17_PCREL
10246 jal symbol ; 25_PCREL/PTR_RES
10247 .L1 */
10248 *insn_len = 4;
10249 /* Convert instruction. */
10250 insn = INSN_JAL;
10251 bfd_putb32 (insn, contents + em_irel->r_offset);
10252
10253 /* Convert relocations. */
10254 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10255 R_NDS32_25_PCREL_RELA);
10256 irel->r_info =
10257 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
10258
10259 /* Set resolved relocation. */
10260 cond_irel =
10261 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10262 R_NDS32_PTR_RESOLVED, irel->r_addend);
10263 if (cond_irel == irelend)
10264 {
10265 (*_bfd_error_handler)
10266 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10267 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10268 return FALSE;
10269 }
10270 cond_irel->r_addend = 1;
10271
10272 cond_irel =
10273 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10274 R_NDS32_INSN16, irel->r_addend);
10275 if (cond_irel != irelend)
10276 cond_irel->r_info =
10277 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10278 }
10279 return TRUE;
10280 }
10281
10282 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
10283
10284 static bfd_boolean
10285 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10286 Elf_Internal_Rela *internal_relocs, int *insn_len,
10287 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10288 Elf_Internal_Shdr *symtab_hdr)
10289 {
10290 /* The pattern for LONGJUMP4.
10291 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10292 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10293 jr ta ; PTR_RES/INSN16/EMPTY */
10294
10295 bfd_vma laddr;
10296 int seq_len; /* Original length of instruction sequence. */
10297 uint32_t insn;
10298 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10299 int pic_ext_target = 0;
10300 bfd_signed_vma foff;
10301
10302 irelend = internal_relocs + sec->reloc_count;
10303 seq_len = GET_SEQ_LEN (irel->r_addend);
10304 laddr = irel->r_offset;
10305 *insn_len = seq_len;
10306
10307 /* Get the reloc for the address from which the register is
10308 being loaded. This reloc will tell us which function is
10309 actually being called. */
10310
10311 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10312 R_NDS32_HI20_RELA, laddr);
10313
10314 if (hi_irel == irelend)
10315 {
10316 (*_bfd_error_handler)
10317 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10318 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10319 return FALSE;
10320 }
10321
10322 /* Get the value of the symbol referred to by the reloc. */
10323 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10324 &pic_ext_target);
10325
10326 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10327 || foff < -CONSERVATIVE_24BIT_S1)
10328 return FALSE;
10329
10330 /* Convert it to "j label", it may be converted to j8 in the final
10331 pass of relaxation. Therefore, we do not consider this currently. */
10332 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10333 R_NDS32_PTR_RESOLVED, irel->r_addend);
10334 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10335 R_NDS32_EMPTY, irel->r_addend);
10336
10337 if (ptr_irel == irelend || em_irel == irelend)
10338 {
10339 (*_bfd_error_handler)
10340 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10341 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10342 return FALSE;
10343 }
10344
10345 em_irel->r_info =
10346 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10347 ptr_irel->r_addend = 1;
10348
10349 /* Write instruction. */
10350 insn = INSN_J;
10351 bfd_putb32 (insn, contents + em_irel->r_offset);
10352
10353 /* Clear relocations. */
10354 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10355
10356 /* If there is function cse, HI20 can not remove now. */
10357 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10358 R_NDS32_LONGJUMP4, laddr);
10359 if (call_irel == irelend)
10360 {
10361 *insn_len = 0;
10362 hi_irel->r_info =
10363 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10364 }
10365
10366 return TRUE;
10367 }
10368
10369 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
10370
10371 static bfd_boolean
10372 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10373 Elf_Internal_Rela *internal_relocs, int *insn_len,
10374 int *seq_len, bfd_byte *contents,
10375 Elf_Internal_Sym *isymbuf,
10376 Elf_Internal_Shdr *symtab_hdr)
10377 {
10378 /* There are 2 variations for LONGJUMP5
10379 case 2-4; 1st insn convertible, 16-bit on.
10380 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10381 j label ; 25_PCREL/INSN16
10382 $1:
10383
10384 case 4-4; 1st insn not convertible
10385 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10386 j label ; 25_PCREL/INSN16
10387 .L1: */
10388
10389 bfd_vma laddr;
10390 Elf_Internal_Rela *cond_irel, *irelend;
10391 int pic_ext_target = 0;
10392 unsigned int i;
10393 bfd_signed_vma foff;
10394 uint32_t insn, re_insn = 0;
10395 uint16_t insn16, re_insn16 = 0;
10396 unsigned long reloc;
10397
10398 enum elf_nds32_reloc_type checked_types[] =
10399 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10400 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10401
10402 irelend = internal_relocs + sec->reloc_count;
10403 laddr = irel->r_offset;
10404
10405 /* Get the reloc for the address from which the register is
10406 being loaded. This reloc will tell us which function is
10407 actually being called. */
10408
10409 cond_irel =
10410 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10411 R_NDS32_25_PCREL_RELA, irel->r_addend);
10412 if (cond_irel == irelend)
10413 {
10414 (*_bfd_error_handler)
10415 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10416 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10417 return FALSE;
10418 }
10419
10420 /* Get the value of the symbol referred to by the reloc. */
10421 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10422 &pic_ext_target);
10423
10424 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10425 || foff >= CONSERVATIVE_16BIT_S1)
10426 return FALSE;
10427
10428 /* Get the all corresponding instructions. */
10429 insn = bfd_getb32 (contents + laddr);
10430 /* Check instruction size. */
10431 if (insn & 0x80000000)
10432 {
10433 *seq_len = 0;
10434 insn16 = insn >> 16;
10435 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10436 }
10437 else
10438 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10439
10440 if (N32_OP6 (re_insn) == N32_OP6_BR1
10441 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10442 {
10443 /* beqs label ; 15_PCREL. */
10444 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10445 reloc = R_NDS32_15_PCREL_RELA;
10446 }
10447 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10448 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10449 {
10450 /* beqz label ; 17_PCREL. */
10451 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10452 reloc = R_NDS32_17_PCREL_RELA;
10453 }
10454 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10455 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10456 {
10457 /* beqc label ; 9_PCREL. */
10458 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10459 reloc = R_NDS32_WORD_9_PCREL_RELA;
10460 }
10461 else
10462 return FALSE;
10463
10464 /* Set all relocations. */
10465 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10466
10467 /* Clean relocations. */
10468 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10469 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10470 {
10471 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10472 checked_types[i], laddr);
10473 if (cond_irel != irelend)
10474 {
10475 if (*seq_len == 0
10476 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10477 {
10478 /* If the branch instruction is 2 byte, it cannot remove
10479 directly. Only convert it to nop16 and remove it after
10480 checking alignment issue. */
10481 insn16 = NDS32_NOP16;
10482 bfd_putb16 (insn16, contents + laddr);
10483 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10484 }
10485 else
10486 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10487 R_NDS32_NONE);
10488 }
10489 }
10490 *insn_len = 0;
10491
10492 return TRUE;
10493 }
10494
10495 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
10496
10497 static bfd_boolean
10498 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10499 Elf_Internal_Rela *internal_relocs, int *insn_len,
10500 int *seq_len, bfd_byte *contents,
10501 Elf_Internal_Sym *isymbuf,
10502 Elf_Internal_Shdr *symtab_hdr)
10503 {
10504 /* There are 5 variations for LONGJUMP6
10505 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10506 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10507 sethi ta, hi20(symbol) ; HI20/PTR
10508 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10509 jr ta ; PTR_RES/INSN16/EMPTY
10510 .L1:
10511
10512 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10513 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10514 sethi ta, hi20(symbol) ; HI20/PTR
10515 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10516 jr ta ; PTR_RES/INSN16/EMPTY
10517 .L1: */
10518
10519 enum elf_nds32_reloc_type checked_types[] =
10520 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10521 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10522
10523 int reloc_off = 0, cond_removed = 0;
10524 bfd_vma laddr;
10525 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10526 int pic_ext_target = 0;
10527 unsigned int i;
10528 bfd_signed_vma foff;
10529 uint32_t insn, re_insn = 0;
10530 uint16_t insn16, re_insn16 = 0;
10531 unsigned long reloc;
10532
10533 irelend = internal_relocs + sec->reloc_count;
10534 laddr = irel->r_offset;
10535
10536 /* Get the reloc for the address from which the register is
10537 being loaded. This reloc will tell us which function is
10538 actually being called. */
10539 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10540 R_NDS32_EMPTY, irel->r_addend);
10541
10542 if (em_irel == irelend)
10543 {
10544 (*_bfd_error_handler)
10545 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10546 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10547 return FALSE;
10548 }
10549
10550 /* Get the value of the symbol referred to by the reloc. */
10551 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10552 &pic_ext_target);
10553
10554 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10555 || foff >= CONSERVATIVE_24BIT_S1)
10556 return FALSE;
10557
10558 insn = bfd_getb32 (contents + laddr);
10559 /* Check instruction size. */
10560 if (insn & 0x80000000)
10561 {
10562 *seq_len = 0;
10563 insn16 = insn >> 16;
10564 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10565 }
10566 else
10567 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10568
10569 /* For simplicity of coding, we are going to modify the section
10570 contents, the section relocs, and the BFD symbol table. We
10571 must tell the rest of the code not to free up this
10572 information. It would be possible to instead create a table
10573 of changes which have to be made, as is done in coff-mips.c;
10574 that would be more work, but would require less memory when
10575 the linker is run. */
10576
10577 if (N32_OP6 (re_insn) == N32_OP6_BR1
10578 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10579 {
10580 /* beqs label ; 15_PCREL */
10581 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10582 reloc = R_NDS32_15_PCREL_RELA;
10583 cond_removed = 1;
10584 }
10585 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10586 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10587 {
10588 /* beqz label ; 17_PCREL */
10589 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10590 reloc = R_NDS32_17_PCREL_RELA;
10591 cond_removed = 1;
10592 }
10593 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10594 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10595 {
10596 /* Relax to one of the following 2 variations
10597
10598 case 2-4; 1st insn convertible, 16-bit on.
10599 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10600 j label ; 25_PCREL/INSN16
10601 $1:
10602
10603 case 4-4; 1st insn not convertible
10604 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10605 j label ; 25_PCREL/INSN16
10606 .L1: */
10607
10608 /* Use j label as second instruction. */
10609 insn = INSN_J;
10610 reloc = R_NDS32_25_PCREL_RELA;
10611 bfd_putb32 (insn, contents + em_irel->r_offset);
10612 }
10613 else
10614 return FALSE;
10615
10616 /* Set all relocations. */
10617 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10618
10619 cond_irel =
10620 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10621 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10622 cond_irel->r_addend = 1;
10623
10624 /* Use INSN16 of first branch instruction to distinguish if keeping
10625 INSN16 of final instruction or not. */
10626 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10627 R_NDS32_INSN16, irel->r_offset);
10628 if (insn_irel == irelend)
10629 {
10630 /* Clean the final INSN16. */
10631 insn_irel =
10632 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10633 R_NDS32_INSN16, em_irel->r_offset);
10634 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10635 R_NDS32_NONE);
10636 }
10637
10638 if (cond_removed == 1)
10639 {
10640 *insn_len = 0;
10641
10642 /* Clear relocations. */
10643 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10644
10645 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10646 {
10647 cond_irel =
10648 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10649 checked_types[i], laddr);
10650 if (cond_irel != irelend)
10651 {
10652 if (*seq_len == 0
10653 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10654 {
10655 /* If the branch instruction is 2 byte, it cannot remove
10656 directly. Only convert it to nop16 and remove it after
10657 checking alignment issue. */
10658 insn16 = NDS32_NOP16;
10659 bfd_putb16 (insn16, contents + laddr);
10660 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10661 }
10662 else
10663 cond_irel->r_info =
10664 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10665 }
10666 }
10667 }
10668 else
10669 {
10670 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10671 R_NDS32_LONGJUMP5);
10672 }
10673
10674 return TRUE;
10675 }
10676
10677 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
10678
10679 static bfd_boolean
10680 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10681 Elf_Internal_Rela *internal_relocs, int *insn_len,
10682 int *seq_len, bfd_byte *contents,
10683 Elf_Internal_Sym *isymbuf,
10684 Elf_Internal_Shdr *symtab_hdr)
10685 {
10686 /* There are 2 variations for LONGJUMP5
10687 case 2-4; 1st insn convertible, 16-bit on.
10688 movi55 ta, imm11 ; LONGJUMP7/INSN16
10689 beq rt, ta, label ; 15_PCREL
10690
10691 case 4-4; 1st insn not convertible
10692 movi55 ta, imm11 ; LONGJUMP7/INSN16
10693 beq rt, ta, label ; 15_PCREL */
10694
10695 bfd_vma laddr;
10696 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10697 int pic_ext_target = 0;
10698 bfd_signed_vma foff;
10699 uint32_t insn, re_insn = 0;
10700 uint16_t insn16;
10701 uint32_t imm11;
10702
10703 irelend = internal_relocs + sec->reloc_count;
10704 laddr = irel->r_offset;
10705
10706 /* Get the reloc for the address from which the register is
10707 being loaded. This reloc will tell us which function is
10708 actually being called. */
10709
10710 cond_irel =
10711 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10712 R_NDS32_15_PCREL_RELA, irel->r_addend);
10713 if (cond_irel == irelend)
10714 {
10715 (*_bfd_error_handler)
10716 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10717 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10718 return FALSE;
10719 }
10720
10721 /* Get the value of the symbol referred to by the reloc. */
10722 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10723 &pic_ext_target);
10724
10725 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10726 || foff >= CONSERVATIVE_8BIT_S1)
10727 return FALSE;
10728
10729 /* Get the first instruction for its size. */
10730 insn = bfd_getb32 (contents + laddr);
10731 if (insn & 0x80000000)
10732 {
10733 *seq_len = 0;
10734 /* Get the immediate from movi55. */
10735 imm11 = N16_IMM5S (insn >> 16);
10736 }
10737 else
10738 {
10739 /* Get the immediate from movi. */
10740 imm11 = N32_IMM20S (insn);
10741 }
10742
10743 /* Get the branch instruction. */
10744 insn = bfd_getb32 (contents + irel->r_addend);
10745 /* Convert instruction to BR3. */
10746 if ((insn >> 14) & 0x1)
10747 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10748 else
10749 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10750
10751 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10752
10753 /* Set all relocations. */
10754 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10755 R_NDS32_WORD_9_PCREL_RELA);
10756
10757 /* Clean relocations. */
10758 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10759 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10760 R_NDS32_INSN16, irel->r_offset);
10761 if (insn_irel != irelend)
10762 {
10763 if (*seq_len == 0)
10764 {
10765 /* If the first insntruction is 16bit, convert it to nop16. */
10766 insn16 = NDS32_NOP16;
10767 bfd_putb16 (insn16, contents + laddr);
10768 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10769 }
10770 else
10771 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10772 R_NDS32_NONE);
10773 }
10774 *insn_len = 0;
10775
10776 return TRUE;
10777 }
10778
10779 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10780
10781 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */
10782
10783 static bfd_boolean
10784 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10785 asection *sec, Elf_Internal_Rela *irel,
10786 Elf_Internal_Rela *internal_relocs, int *insn_len,
10787 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10788 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10789 {
10790 int eliminate_sethi = 0, range_type, i;
10791 bfd_vma local_sda, laddr;
10792 int seq_len; /* Original length of instruction sequence. */
10793 uint32_t insn;
10794 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10795 bfd_vma access_addr = 0;
10796 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10797 enum elf_nds32_reloc_type checked_types[] =
10798 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10799 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10800 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10801 R_NDS32_TLS_LE_HI20
10802 };
10803
10804 irelend = internal_relocs + sec->reloc_count;
10805 seq_len = GET_SEQ_LEN (irel->r_addend);
10806 laddr = irel->r_offset;
10807 *insn_len = seq_len;
10808
10809 /* Get the high part relocation. */
10810 for (i = 0; (unsigned) i < sizeof (checked_types); i++)
10811 {
10812 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10813 checked_types[i], laddr);
10814 if (hi_irelfn != irelend)
10815 break;
10816 }
10817
10818 if (hi_irelfn == irelend)
10819 {
10820 (*_bfd_error_handler)
10821 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10822 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10823 return FALSE;
10824 }
10825
10826 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10827 nds32_elf_final_sda_base (sec->output_section->owner,
10828 link_info, &local_sda, FALSE);
10829
10830 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10831 {
10832 case R_NDS32_HI20_RELA:
10833 insn = bfd_getb32 (contents + laddr);
10834 access_addr =
10835 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10836
10837 if (range_type == NDS32_LOADSTORE_IMM)
10838 {
10839 struct elf_link_hash_entry *h = NULL;
10840 int indx;
10841
10842 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10843 {
10844 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10845 h = elf_sym_hashes (abfd)[indx];
10846 }
10847
10848 if ((access_addr < CONSERVATIVE_20BIT)
10849 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10850 {
10851 eliminate_sethi = 1;
10852 break;
10853 }
10854
10855 /* This is avoid to relax symbol address which is fixed
10856 relocations. Ex: _stack. */
10857 if (h && bfd_is_abs_section (h->root.u.def.section))
10858 return FALSE;
10859 }
10860
10861 if (!load_store_relax)
10862 return FALSE;
10863
10864 /* Case for set gp register. */
10865 if (N32_RT5 (insn) == REG_GP)
10866 break;
10867
10868 if (range_type == NDS32_LOADSTORE_FLOAT_S
10869 || range_type == NDS32_LOADSTORE_FLOAT_S)
10870 {
10871 range_l = sdata_range[0][0];
10872 range_h = sdata_range[0][1];
10873 }
10874 else
10875 {
10876 range_l = sdata_range[1][0];
10877 range_h = sdata_range[1][1];
10878 }
10879 break;
10880
10881 case R_NDS32_GOT_HI20:
10882 access_addr =
10883 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10884
10885 /* If this symbol is not in .got, the return value will be -1.
10886 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10887 a negative offset is allowed. */
10888 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10889 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10890 eliminate_sethi = 1;
10891 break;
10892
10893 case R_NDS32_PLT_GOTREL_HI20:
10894 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10895 hi_irelfn, symtab_hdr);
10896
10897 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10898 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10899 eliminate_sethi = 1;
10900 break;
10901
10902 case R_NDS32_GOTOFF_HI20:
10903 access_addr =
10904 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10905
10906 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10907 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10908 eliminate_sethi = 1;
10909 break;
10910
10911 case R_NDS32_GOTPC_HI20:
10912 /* The access_addr must consider r_addend of hi_irel. */
10913 access_addr = sec->output_section->vma + sec->output_offset
10914 + irel->r_offset + hi_irelfn->r_addend;
10915
10916 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10917 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10918 eliminate_sethi = 1;
10919 break;
10920
10921 case R_NDS32_TLS_LE_HI20:
10922 access_addr =
10923 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10924 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10925 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10926 if ((range_type == NDS32_LOADSTORE_IMM)
10927 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10928 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10929 eliminate_sethi = 1;
10930 break;
10931
10932 default:
10933 return FALSE;
10934 }
10935
10936 /* Delete sethi instruction. */
10937 if (eliminate_sethi == 1
10938 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10939 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10940 {
10941 hi_irelfn->r_info =
10942 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10943 irel->r_info =
10944 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10945 *insn_len = 0;
10946 }
10947 return TRUE;
10948 }
10949
10950 /* Relax LO12 relocation for nds32_elf_relax_section. */
10951
10952 static void
10953 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10954 asection *sec, Elf_Internal_Rela *irel,
10955 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10956 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10957 {
10958 uint32_t insn;
10959 bfd_vma local_sda, laddr;
10960 unsigned long reloc;
10961 bfd_vma access_addr;
10962 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10963 Elf_Internal_Rela *irelfn = NULL, *irelend;
10964 struct elf_link_hash_entry *h = NULL;
10965 int indx;
10966
10967 /* For SDA base relative relaxation. */
10968 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10969 &local_sda, FALSE);
10970
10971 irelend = internal_relocs + sec->reloc_count;
10972 laddr = irel->r_offset;
10973 insn = bfd_getb32 (contents + laddr);
10974
10975 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10976 return;
10977
10978 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10979
10980 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10981 {
10982 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10983 h = elf_sym_hashes (abfd)[indx];
10984 }
10985
10986 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10987 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10988 {
10989 reloc = R_NDS32_20_RELA;
10990 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10991 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10992 bfd_putb32 (insn, contents + laddr);
10993 }
10994 /* This is avoid to relax symbol address which is fixed
10995 relocations. Ex: _stack. */
10996 else if (N32_OP6 (insn) == N32_OP6_ORI
10997 && h && bfd_is_abs_section (h->root.u.def.section))
10998 return;
10999 else
11000 {
11001 range_l = sdata_range[1][0];
11002 range_h = sdata_range[1][1];
11003 switch (ELF32_R_TYPE (irel->r_info))
11004 {
11005 case R_NDS32_LO12S0_RELA:
11006 reloc = R_NDS32_SDA19S0_RELA;
11007 break;
11008 case R_NDS32_LO12S1_RELA:
11009 reloc = R_NDS32_SDA18S1_RELA;
11010 break;
11011 case R_NDS32_LO12S2_RELA:
11012 reloc = R_NDS32_SDA17S2_RELA;
11013 break;
11014 case R_NDS32_LO12S2_DP_RELA:
11015 range_l = sdata_range[0][0];
11016 range_h = sdata_range[0][1];
11017 reloc = R_NDS32_SDA12S2_DP_RELA;
11018 break;
11019 case R_NDS32_LO12S2_SP_RELA:
11020 range_l = sdata_range[0][0];
11021 range_h = sdata_range[0][1];
11022 reloc = R_NDS32_SDA12S2_SP_RELA;
11023 break;
11024 default:
11025 return;
11026 }
11027
11028 /* There are range_h and range_l because linker has to promise
11029 all sections move cross one page together. */
11030 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11031 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11032 {
11033 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
11034 {
11035 /* Maybe we should add R_NDS32_INSN16 reloc type here
11036 or manually do some optimization. sethi can't be
11037 eliminated when updating $gp so the relative ori
11038 needs to be preserved. */
11039 return;
11040 }
11041 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11042 &insn))
11043 return;
11044 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11045 bfd_putb32 (insn, contents + laddr);
11046
11047 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11048 R_NDS32_INSN16);
11049 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11050 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11051 irelfn->r_info =
11052 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11053
11054 }
11055 }
11056 return;
11057 }
11058
11059 /* Relax low part of PIC instruction pattern. */
11060
11061 static void
11062 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11063 asection *sec, Elf_Internal_Rela *irel,
11064 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11065 Elf_Internal_Shdr *symtab_hdr)
11066 {
11067 uint32_t insn;
11068 bfd_vma local_sda, laddr;
11069 bfd_signed_vma foff;
11070 unsigned long reloc;
11071
11072 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11073 &local_sda, FALSE);
11074 laddr = irel->r_offset;
11075 insn = bfd_getb32 (contents + laddr);
11076
11077 if (N32_OP6 (insn) != N32_OP6_ORI)
11078 return;
11079
11080 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11081 {
11082 foff = calculate_got_memory_address (abfd, link_info, irel,
11083 symtab_hdr) - local_sda;
11084 reloc = R_NDS32_GOT20;
11085 }
11086 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11087 {
11088 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11089 symtab_hdr) - local_sda;
11090 reloc = R_NDS32_PLT_GOTREL_LO20;
11091 }
11092 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11093 {
11094 foff = calculate_memory_address (abfd, irel, isymbuf,
11095 symtab_hdr) - local_sda;
11096 reloc = R_NDS32_GOTOFF;
11097 }
11098 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11099 {
11100 foff = local_sda - sec->output_section->vma + sec->output_offset
11101 + irel->r_offset + irel->r_addend;
11102 reloc = R_NDS32_GOTPC20;
11103 }
11104 else
11105 return;
11106
11107 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11108 {
11109 /* Turn into MOVI. */
11110 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11111 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11112 bfd_putb32 (insn, contents + laddr);
11113 }
11114 }
11115
11116 /* Relax low part of LE TLS instruction pattern. */
11117
11118 static void
11119 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11120 Elf_Internal_Rela *irel,
11121 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11122 Elf_Internal_Shdr *symtab_hdr)
11123 {
11124 uint32_t insn;
11125 bfd_vma laddr;
11126 bfd_signed_vma foff;
11127 unsigned long reloc;
11128
11129 laddr = irel->r_offset;
11130 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11131 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11132 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11133 insn = bfd_getb32 (contents + laddr);
11134
11135 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11136 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11137 {
11138 /* Pattern sethi-ori transform to movi. */
11139 reloc = R_NDS32_TLS_LE_20;
11140 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11141 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11142 bfd_putb32 (insn, contents + laddr);
11143 }
11144 }
11145
11146 /* Relax LE TLS calculate address instruction pattern. */
11147
11148 static void
11149 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11150 asection *sec, Elf_Internal_Rela *irel,
11151 Elf_Internal_Rela *internal_relocs,
11152 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11153 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11154 {
11155 /* Local TLS non-pic
11156 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11157 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11158 add ra, ta, tp ; TLS_LE_ADD */
11159
11160 uint32_t insn;
11161 bfd_vma laddr;
11162 bfd_signed_vma foff;
11163 Elf_Internal_Rela *i1_irelfn, *irelend;
11164
11165 irelend = internal_relocs + sec->reloc_count;
11166 laddr = irel->r_offset;
11167 insn = bfd_getb32 (contents + laddr);
11168 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11169 R_NDS32_PTR_RESOLVED);
11170 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11171 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11172 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11173
11174 /* The range is +/-16k. */
11175 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11176 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11177 {
11178 /* Transform add to addi. */
11179 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11180 irel->r_info =
11181 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11182
11183 bfd_putb32 (insn, contents + laddr);
11184 if (i1_irelfn != irelend)
11185 {
11186 i1_irelfn->r_addend |= 1;
11187 *again = TRUE;
11188 }
11189 }
11190 }
11191
11192 /* Relax LE TLS load store instruction pattern. */
11193
11194 static void
11195 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11196 asection *sec, Elf_Internal_Rela *irel,
11197 Elf_Internal_Rela *internal_relocs,
11198 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11199 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11200 {
11201
11202 uint32_t insn;
11203 bfd_vma laddr;
11204 bfd_signed_vma foff;
11205 Elf_Internal_Rela *i1_irelfn, *irelend;
11206 int success = 0;
11207
11208 irelend = internal_relocs + sec->reloc_count;
11209 laddr = irel->r_offset;
11210 insn = bfd_getb32 (contents + laddr);
11211 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11212 R_NDS32_PTR_RESOLVED);
11213 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11214 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11215 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11216
11217 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11218 {
11219 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11220 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11221 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11222 /* The range is +/-16k. */
11223 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11224 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11225 {
11226 insn =
11227 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11228 irel->r_info =
11229 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11230 success = 1;
11231 break;
11232 }
11233 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11234 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11235 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11236 /* The range is +/-32k. */
11237 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11238 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
11239 {
11240 insn =
11241 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11242 irel->r_info =
11243 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11244 success = 1;
11245 break;
11246 }
11247 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11248 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11249 /* The range is +/-64k. */
11250 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11251 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11252 {
11253 insn =
11254 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11255 irel->r_info =
11256 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11257 success = 1;
11258 break;
11259 }
11260 default:
11261 break;
11262 }
11263
11264 if (success)
11265 {
11266 bfd_putb32 (insn, contents + laddr);
11267 if (i1_irelfn != irelend)
11268 {
11269 i1_irelfn->r_addend |= 1;
11270 *again = TRUE;
11271 }
11272 }
11273 }
11274
11275 /* Relax PTR relocation for nds32_elf_relax_section. */
11276
11277 static bfd_boolean
11278 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11279 Elf_Internal_Rela *internal_relocs, int *insn_len,
11280 int *seq_len, bfd_byte *contents)
11281 {
11282 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11283
11284 irelend = internal_relocs + sec->reloc_count;
11285
11286 re_irel =
11287 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11288 R_NDS32_PTR_RESOLVED, irel->r_addend);
11289
11290 if (re_irel == irelend)
11291 {
11292 (*_bfd_error_handler)
11293 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11294 abfd, (long) irel->r_offset);
11295 return FALSE;
11296 }
11297
11298 if (re_irel->r_addend != 1)
11299 return FALSE;
11300
11301 /* Pointed target is relaxed and no longer needs this void *,
11302 change the type to NONE. */
11303 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11304
11305 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11306 not exist, it means only count 1 and remove it directly. */
11307 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11308 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11309 R_NDS32_PTR_COUNT);
11310 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11311 R_NDS32_PTR);
11312 if (count_irel != irelend)
11313 {
11314 if (--count_irel->r_addend > 0)
11315 return FALSE;
11316 }
11317
11318 if (ptr_irel != irelend)
11319 return FALSE;
11320
11321 /* If the PTR_COUNT is already 0, remove current instruction. */
11322 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11323 *insn_len = 0;
11324 return TRUE;
11325 }
11326
11327 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11328
11329 static void
11330 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11331 asection *sec, Elf_Internal_Rela *irel,
11332 Elf_Internal_Rela *internal_relocs,
11333 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11334 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11335 {
11336 uint32_t insn;
11337 bfd_signed_vma foff;
11338 Elf_Internal_Rela *i1_irelfn, *irelend;
11339 bfd_vma local_sda, laddr;
11340
11341 irelend = internal_relocs + sec->reloc_count;
11342 laddr = irel->r_offset;
11343 insn = bfd_getb32 (contents + laddr);
11344
11345 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11346 we need additional space. It might be help if we could
11347 borrow some space from instructions to be eliminated
11348 such as sethi, ori, add. */
11349 if (insn & 0x80000000)
11350 return;
11351
11352 if (nds32_elf_check_dup_relocs
11353 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11354 return;
11355
11356 i1_irelfn =
11357 find_relocs_at_address (irel, internal_relocs, irelend,
11358 R_NDS32_PTR_RESOLVED);
11359
11360 /* FIXIT 090606
11361 The boundary should be reduced since the .plt section hasn't
11362 been created and the address of specific entry is still unknown
11363 Maybe the range between the function call and the begin of the
11364 .text section can be used to decide if the .plt is in the range
11365 of function call. */
11366
11367 if (N32_OP6 (insn) == N32_OP6_ALU1
11368 && N32_SUB5 (insn) == N32_ALU1_ADD)
11369 {
11370 /* Get the value of the symbol referred to by the reloc. */
11371 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11372 &local_sda, FALSE);
11373 foff = (bfd_signed_vma) (calculate_plt_memory_address
11374 (abfd, link_info, isymbuf, irel,
11375 symtab_hdr) - local_sda);
11376 /* This condition only happened when symbol is undefined. */
11377 if (foff == 0)
11378 return;
11379
11380 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11381 return;
11382 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11383 R_NDS32_PLT_GOTREL_LO19);
11384 /* addi.gp */
11385 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11386 }
11387 else if (N32_OP6 (insn) == N32_OP6_JREG
11388 && N32_SUB5 (insn) == N32_JREG_JRAL)
11389 {
11390 /* Get the value of the symbol referred to by the reloc. */
11391 foff =
11392 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11393 /* This condition only happened when symbol is undefined. */
11394 if (foff == 0)
11395 return;
11396 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11397 return;
11398 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11399 insn = INSN_JAL;
11400 }
11401 else
11402 return;
11403
11404 bfd_putb32 (insn, contents + laddr);
11405 if (i1_irelfn != irelend)
11406 {
11407 i1_irelfn->r_addend |= 1;
11408 *again = TRUE;
11409 }
11410 }
11411
11412 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11413
11414 static void
11415 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11416 asection *sec, Elf_Internal_Rela *irel,
11417 Elf_Internal_Rela *internal_relocs,
11418 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11419 bfd_boolean *again)
11420 {
11421 uint32_t insn;
11422 bfd_signed_vma foff;
11423 Elf_Internal_Rela *i1_irelfn, *irelend;
11424 bfd_vma local_sda, laddr;
11425
11426 irelend = internal_relocs + sec->reloc_count;
11427 laddr = irel->r_offset;
11428 insn = bfd_getb32 (contents + laddr);
11429 if (insn & 0x80000000)
11430 return;
11431
11432 if (nds32_elf_check_dup_relocs
11433 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11434 return;
11435
11436 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11437 R_NDS32_PTR_RESOLVED);
11438
11439 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11440 &local_sda, FALSE);
11441 foff = calculate_got_memory_address (abfd, link_info, irel,
11442 symtab_hdr) - local_sda;
11443
11444 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11445 {
11446 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11447 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11448 irel->r_info =
11449 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11450 bfd_putb32 (insn, contents + laddr);
11451 if (i1_irelfn != irelend)
11452 {
11453 i1_irelfn->r_addend |= 1;
11454 *again = TRUE;
11455 }
11456 }
11457 }
11458
11459 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11460
11461 static void
11462 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11463 asection *sec, Elf_Internal_Rela *irel,
11464 Elf_Internal_Rela *internal_relocs,
11465 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11466 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11467 {
11468 int opc_insn_gotoff;
11469 uint32_t insn;
11470 bfd_signed_vma foff;
11471 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11472 bfd_vma local_sda, laddr;
11473
11474 irelend = internal_relocs + sec->reloc_count;
11475 laddr = irel->r_offset;
11476 insn = bfd_getb32 (contents + laddr);
11477
11478 if (insn & 0x80000000)
11479 return;
11480
11481 if (nds32_elf_check_dup_relocs
11482 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11483 return;
11484
11485 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11486 R_NDS32_PTR_RESOLVED);
11487 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11488 &local_sda, FALSE);
11489 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11490 foff = foff - local_sda;
11491
11492 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11493 return;
11494
11495 /* Concatenate opcode and sub-opcode for switch case.
11496 It may be MEM or ALU1. */
11497 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11498 switch (opc_insn_gotoff)
11499 {
11500 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11501 /* 4-byte aligned. */
11502 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11503 irel->r_info =
11504 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11505 break;
11506 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11507 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11508 irel->r_info =
11509 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11510 break;
11511 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11512 /* 2-byte aligned. */
11513 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11514 irel->r_info =
11515 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11516 break;
11517 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11518 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11519 irel->r_info =
11520 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11521 break;
11522 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11523 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11524 irel->r_info =
11525 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11526 break;
11527 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11528 /* 1-byte aligned. */
11529 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11530 irel->r_info =
11531 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11532 break;
11533 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11534 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11535 irel->r_info =
11536 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11537 break;
11538 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11539 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11540 irel->r_info =
11541 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11542 break;
11543 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11544 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11545 irel->r_info =
11546 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11547 break;
11548 default:
11549 return;
11550 }
11551
11552 bfd_putb32 (insn, contents + laddr);
11553 if (i1_irelfn != irelend)
11554 {
11555 i1_irelfn->r_addend |= 1;
11556 *again = TRUE;
11557 }
11558 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11559 R_NDS32_INSN16)) != irelend)
11560 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11561
11562 }
11563
11564 static bfd_boolean
11565 nds32_relax_adjust_label (bfd *abfd, asection *sec,
11566 Elf_Internal_Rela *internal_relocs,
11567 bfd_byte *contents,
11568 nds32_elf_blank_t **relax_blank_list,
11569 int optimize, int opt_size)
11570 {
11571 /* This code block is used to adjust 4-byte alignment by relax a pair
11572 of instruction a time.
11573
11574 It recognizes three types of relocations.
11575 1. R_NDS32_LABEL - a aligment.
11576 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11577 3. is_16bit_NOP () - remove a 16-bit instruction. */
11578
11579 /* TODO: It seems currently implementation only support 4-byte aligment.
11580 We should handle any-aligment. */
11581
11582 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11583 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11584 Elf_Internal_Rela rel_temp;
11585 Elf_Internal_Rela *irelend;
11586 bfd_vma address;
11587 uint16_t insn16;
11588
11589 /* Checking for branch relaxation relies on the relocations to
11590 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11591 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11592 sizeof (Elf_Internal_Rela), compar_reloc);
11593
11594 irelend = internal_relocs + sec->reloc_count;
11595
11596 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11597 /* FIXME: Can we generate the right order in assembler?
11598 So we don't have to swapping them here. */
11599
11600 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11601 label_rel < irelend; label_rel++)
11602 {
11603 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11604 continue;
11605
11606 /* Find the first reloc has the same offset with label_rel. */
11607 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11608 insn_rel++;
11609
11610 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11611 insn_rel++)
11612 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11613 address. */
11614 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11615 break;
11616
11617 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11618 && insn_rel < label_rel)
11619 {
11620 /* Swap the two reloc if the R_NDS32_INSN16 is
11621 before R_NDS32_LABEL. */
11622 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11623 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11624 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11625 }
11626 }
11627
11628 label_rel = NULL;
11629 insn_rel = NULL;
11630 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11631 or higher, remove other R_NDS32_LABEL with lower alignment.
11632 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11633 then the R_NDS32_LABEL sequence is broke. */
11634 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11635 {
11636 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11637 {
11638 if (label_rel == NULL)
11639 {
11640 if (tmp_rel->r_addend < 2)
11641 label_rel = tmp_rel;
11642 continue;
11643 }
11644 else if (tmp_rel->r_addend > 1)
11645 {
11646 /* Remove all LABEL relocation from label_rel to tmp_rel
11647 including relocations with same offset as tmp_rel. */
11648 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11649 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11650 {
11651 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11652 && tmp2_rel->r_addend < 2)
11653 tmp2_rel->r_info =
11654 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11655 R_NDS32_NONE);
11656 }
11657 label_rel = NULL;
11658 }
11659 }
11660 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11661 {
11662 /* A new INSN16 which can be converted, so clear label_rel. */
11663 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11664 irelend, &insn16)
11665 || is_16bit_NOP (abfd, sec, tmp_rel))
11666 label_rel = NULL;
11667 }
11668 }
11669
11670 label_rel = NULL;
11671 insn_rel = NULL;
11672 /* Optimized for speed and nothing has not been relaxed.
11673 It's time to align labels.
11674 We may convert a 16-bit instruction right before a label to
11675 32-bit, in order to align the label if necessary
11676 all reloc entries has been sorted by r_offset. */
11677 for (irel = internal_relocs; irel < irelend; irel++)
11678 {
11679 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11680 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11681 continue;
11682
11683 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11684 {
11685 /* A new INSN16 found, resize the old one. */
11686 if (is_convert_32_to_16
11687 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11688 || is_16bit_NOP (abfd, sec, irel))
11689 {
11690 if (insn_rel)
11691 {
11692 /* Previous INSN16 reloc exists, reduce its
11693 size to 16-bit. */
11694 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11695 irelend, &insn16))
11696 {
11697 nds32_elf_write_16 (abfd, contents, insn_rel,
11698 internal_relocs, irelend, insn16);
11699
11700 if (!insert_nds32_elf_blank_recalc_total
11701 (relax_blank_list, insn_rel->r_offset + 2, 2))
11702 return FALSE;
11703 }
11704 else if (is_16bit_NOP (abfd, sec, insn_rel))
11705 {
11706 if (!insert_nds32_elf_blank_recalc_total
11707 (relax_blank_list, insn_rel->r_offset, 2))
11708 return FALSE;
11709 }
11710 insn_rel->r_info =
11711 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11712 }
11713 /* Save the new one for later use. */
11714 insn_rel = irel;
11715 }
11716 else
11717 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11718 R_NDS32_NONE);
11719 }
11720 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11721 {
11722 /* Search for label. */
11723 int force_relax = 0;
11724
11725 /* Label on 16-bit instruction or optimization
11726 needless, just reset this reloc. */
11727 insn16 = bfd_getb16 (contents + irel->r_offset);
11728 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11729 {
11730 irel->r_info =
11731 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11732 continue;
11733 }
11734
11735 address =
11736 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11737 irel->r_offset, 1);
11738
11739 if (!insn_rel)
11740 {
11741 /* Check if there is case which can not be aligned. */
11742 if (irel->r_addend == 2 && address & 0x2)
11743 return FALSE;
11744 continue;
11745 }
11746
11747 /* Try to align this label. */
11748
11749 if ((irel->r_addend & 0x1f) < 2)
11750 {
11751 /* Check if there is a INSN16 at the same address.
11752 Label_rel always seats before insn_rel after
11753 our sort. */
11754
11755 /* Search for INSN16 at LABEL location. If INSN16 is at
11756 same location and this LABEL alignment is lower than 2,
11757 the INSN16 can be converted to 2-byte. */
11758 for (tmp_rel = irel;
11759 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11760 tmp_rel++)
11761 {
11762 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11763 && (is_convert_32_to_16
11764 (abfd, sec, tmp_rel, internal_relocs,
11765 irelend, &insn16)
11766 || is_16bit_NOP (abfd, sec, tmp_rel)))
11767 {
11768 force_relax = 1;
11769 break;
11770 }
11771 }
11772 }
11773
11774 if (force_relax || irel->r_addend == 1 || address & 0x2)
11775 {
11776 /* Label not aligned. */
11777 /* Previous reloc exists, reduce its size to 16-bit. */
11778 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11779 internal_relocs, irelend, &insn16))
11780 {
11781 nds32_elf_write_16 (abfd, contents, insn_rel,
11782 internal_relocs, irelend, insn16);
11783
11784 if (!insert_nds32_elf_blank_recalc_total
11785 (relax_blank_list, insn_rel->r_offset + 2, 2))
11786 return FALSE;
11787 }
11788 else if (is_16bit_NOP (abfd, sec, insn_rel))
11789 {
11790 if (!insert_nds32_elf_blank_recalc_total
11791 (relax_blank_list, insn_rel->r_offset, 2))
11792 return FALSE;
11793 }
11794
11795 }
11796 /* INSN16 reloc is used. */
11797 insn_rel = NULL;
11798 }
11799 }
11800
11801 address =
11802 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11803 if (insn_rel && (address & 0x2 || opt_size))
11804 {
11805 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11806 irelend, &insn16))
11807 {
11808 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11809 irelend, insn16);
11810 if (!insert_nds32_elf_blank_recalc_total
11811 (relax_blank_list, insn_rel->r_offset + 2, 2))
11812 return FALSE;
11813 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11814 R_NDS32_NONE);
11815 }
11816 else if (is_16bit_NOP (abfd, sec, insn_rel))
11817 {
11818 if (!insert_nds32_elf_blank_recalc_total
11819 (relax_blank_list, insn_rel->r_offset, 2))
11820 return FALSE;
11821 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11822 R_NDS32_NONE);
11823 }
11824 }
11825 insn_rel = NULL;
11826 return TRUE;
11827 }
11828
11829 /* Pick relaxation round. */
11830
11831 static int
11832 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11833 struct elf_nds32_link_hash_table *table,
11834 struct bfd_link_info *link_info)
11835 {
11836 static asection *final_sec, *first_sec = NULL;
11837 static bfd_boolean normal_again = FALSE;
11838 static bfd_boolean set = FALSE;
11839 static bfd_boolean first = TRUE;
11840 int round_table[] = {
11841 NDS32_RELAX_NORMAL_ROUND,
11842 NDS32_RELAX_JUMP_IFC_ROUND,
11843 NDS32_RELAX_EX9_BUILD_ROUND,
11844 NDS32_RELAX_EX9_REPLACE_ROUND,
11845 };
11846 static int pass = 0;
11847 static int relax_round;
11848
11849 /* The new round. */
11850 if (init && first_sec == sec)
11851 {
11852 set = TRUE;
11853 normal_again = FALSE;
11854 }
11855
11856 if (first)
11857 {
11858 /* Run an empty run to get the final section. */
11859 relax_round = NDS32_RELAX_EMPTY_ROUND;
11860
11861 /* It has to enter relax again because we can
11862 not make sure what the final turn is. */
11863 *again = TRUE;
11864
11865 first = FALSE;
11866 first_sec = sec;
11867 }
11868
11869 if (!set)
11870 {
11871 /* Not reenter yet. */
11872 final_sec = sec;
11873 return relax_round;
11874 }
11875
11876 relax_round = round_table[pass];
11877
11878 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11879 normal_again = TRUE;
11880
11881 if (!init && final_sec == sec)
11882 {
11883 switch (relax_round)
11884 {
11885 case NDS32_RELAX_NORMAL_ROUND:
11886 if (!normal_again)
11887 {
11888 /* Normal relaxation done. */
11889 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11890 {
11891 pass++;
11892 *again = TRUE;
11893 }
11894 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11895 {
11896 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11897 *again = TRUE;
11898 }
11899 else if (table->ex9_import_file)
11900 {
11901 /* Import ex9 table. */
11902 if (table->update_ex9_table)
11903 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11904 else
11905 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11906 nds32_elf_ex9_import_table (link_info);
11907 *again = TRUE;
11908 }
11909 }
11910 break;
11911 case NDS32_RELAX_JUMP_IFC_ROUND:
11912 if (!nds32_elf_ifc_finish (link_info))
11913 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11914 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11915 {
11916 pass++;
11917 *again = TRUE;
11918 }
11919 break;
11920 case NDS32_RELAX_EX9_BUILD_ROUND:
11921 nds32_elf_ex9_finish (link_info);
11922 pass++;
11923 *again = TRUE;
11924 break;
11925 case NDS32_RELAX_EX9_REPLACE_ROUND:
11926 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11927 {
11928 /* Do jump IFC optimization again. */
11929 if (!nds32_elf_ifc_finish (link_info))
11930 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11931 }
11932 break;
11933 default:
11934 break;
11935 }
11936 }
11937
11938 return relax_round;
11939 }
11940
11941 static bfd_boolean
11942 nds32_elf_relax_section (bfd *abfd, asection *sec,
11943 struct bfd_link_info *link_info, bfd_boolean *again)
11944 {
11945 nds32_elf_blank_t *relax_blank_list = NULL;
11946 Elf_Internal_Shdr *symtab_hdr;
11947 Elf_Internal_Rela *internal_relocs;
11948 Elf_Internal_Rela *irel;
11949 Elf_Internal_Rela *irelend;
11950 Elf_Internal_Sym *isymbuf = NULL;
11951 bfd_byte *contents = NULL;
11952 bfd_boolean result = TRUE;
11953 int optimize = 0;
11954 int opt_size = 0;
11955 uint32_t insn;
11956 uint16_t insn16;
11957
11958 /* Target dependnet option. */
11959 struct elf_nds32_link_hash_table *table;
11960 int load_store_relax;
11961 int relax_round;
11962
11963 relax_blank_list = NULL;
11964
11965 *again = FALSE;
11966
11967 /* Nothing to do for
11968 * relocatable link or
11969 * non-relocatable section or
11970 * non-code section or
11971 * empty content or
11972 * no reloc entry. */
11973 if (bfd_link_relocatable (link_info)
11974 || (sec->flags & SEC_RELOC) == 0
11975 || (sec->flags & SEC_EXCLUDE) == 1
11976 || (sec->flags & SEC_CODE) == 0
11977 || sec->size == 0)
11978 return TRUE;
11979
11980 /* 09.12.11 Workaround. */
11981 /* We have to adjust align for R_NDS32_LABEL if needed.
11982 The adjust approach only can fix 2-byte align once. */
11983 if (sec->alignment_power > 2)
11984 return TRUE;
11985
11986 /* The optimization type to do. */
11987
11988 table = nds32_elf_hash_table (link_info);
11989 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11990 switch (relax_round)
11991 {
11992 case NDS32_RELAX_JUMP_IFC_ROUND:
11993 /* Here is the entrance of ifc jump relaxation. */
11994 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11995 return FALSE;
11996 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11997 return TRUE;
11998
11999 case NDS32_RELAX_EX9_BUILD_ROUND:
12000 /* Here is the entrance of ex9 relaxation. There are two pass of
12001 ex9 relaxation. The one is to traverse all instructions and build
12002 the hash table. The other one is to compare instructions and replace
12003 it by ex9.it. */
12004 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12005 return FALSE;
12006 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12007 return TRUE;
12008
12009 case NDS32_RELAX_EX9_REPLACE_ROUND:
12010 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12011 return FALSE;
12012 return TRUE;
12013
12014 case NDS32_RELAX_EMPTY_ROUND:
12015 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12016 return TRUE;
12017
12018 case NDS32_RELAX_NORMAL_ROUND:
12019 default:
12020 if (sec->reloc_count == 0)
12021 return TRUE;
12022 break;
12023 }
12024
12025 /* The begining of general relaxation. */
12026
12027 if (is_SDA_BASE_set == 0)
12028 {
12029 bfd_vma gp;
12030 is_SDA_BASE_set = 1;
12031 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12032 &gp, FALSE);
12033 relax_range_measurement (abfd);
12034 }
12035
12036 if (is_ITB_BASE_set == 0)
12037 {
12038 /* Set the _ITB_BASE_. */
12039 if (!nds32_elf_ex9_itb_base (link_info))
12040 {
12041 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12042 bfd_set_error (bfd_error_bad_value);
12043 }
12044 }
12045
12046 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12047 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12048 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12049 TRUE /* keep_memory */);
12050 if (internal_relocs == NULL)
12051 goto error_return;
12052
12053 irelend = internal_relocs + sec->reloc_count;
12054 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12055 irelend, R_NDS32_RELAX_ENTRY);
12056
12057 if (irel == irelend)
12058 return TRUE;
12059
12060 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12061 {
12062 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
12063 {
12064 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12065 return TRUE;
12066 }
12067
12068 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12069 optimize = 1;
12070
12071 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12072 opt_size = 1;
12073 }
12074
12075 load_store_relax = table->load_store_relax;
12076
12077 /* Get symbol table and section content. */
12078 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12079 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12080 goto error_return;
12081
12082 /* Do relax loop only when finalize is not done.
12083 Take care of relaxable relocs except INSN16. */
12084 for (irel = internal_relocs; irel < irelend; irel++)
12085 {
12086 int seq_len; /* Original length of instruction sequence. */
12087 int insn_len = 0; /* Final length of instruction sequence. */
12088 bfd_boolean removed;
12089
12090 insn = 0;
12091 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12092 && (irel->r_addend & 0x1f) >= 2)
12093 optimize = 1;
12094
12095 /* Relocation Types
12096 R_NDS32_LONGCALL1 53
12097 R_NDS32_LONGCALL2 54
12098 R_NDS32_LONGCALL3 55
12099 R_NDS32_LONGJUMP1 56
12100 R_NDS32_LONGJUMP2 57
12101 R_NDS32_LONGJUMP3 58
12102 R_NDS32_LOADSTORE 59 */
12103 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12104 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12105 seq_len = GET_SEQ_LEN (irel->r_addend);
12106
12107 /* Relocation Types
12108 R_NDS32_LONGCALL4 107
12109 R_NDS32_LONGCALL5 108
12110 R_NDS32_LONGCALL6 109
12111 R_NDS32_LONGJUMP4 110
12112 R_NDS32_LONGJUMP5 111
12113 R_NDS32_LONGJUMP6 112
12114 R_NDS32_LONGJUMP7 113 */
12115 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12116 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12117 seq_len = 4;
12118
12119 /* Relocation Types
12120 R_NDS32_LO12S0_RELA 30
12121 R_NDS32_LO12S1_RELA 29
12122 R_NDS32_LO12S2_RELA 28
12123 R_NDS32_LO12S2_SP_RELA 71
12124 R_NDS32_LO12S2_DP_RELA 70
12125 R_NDS32_GOT_LO12 46
12126 R_NDS32_GOTOFF_LO12 50
12127 R_NDS32_PLTREL_LO12 65
12128 R_NDS32_PLT_GOTREL_LO12 67
12129 R_NDS32_17IFC_PCREL_RELA 96
12130 R_NDS32_GOT_SUFF 193
12131 R_NDS32_GOTOFF_SUFF 194
12132 R_NDS32_PLT_GOT_SUFF 195
12133 R_NDS32_MULCALL_SUFF 196
12134 R_NDS32_PTR 197 */
12135 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12136 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12137 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12138 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12139 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12144 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12145 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12147 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12148 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12149 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12150 seq_len = 0;
12151 else
12152 continue;
12153
12154 insn_len = seq_len;
12155 removed = FALSE;
12156
12157 switch (ELF32_R_TYPE (irel->r_info))
12158 {
12159 case R_NDS32_LONGCALL1:
12160 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12161 &insn_len, contents, isymbuf,
12162 symtab_hdr);
12163 break;
12164 case R_NDS32_LONGCALL2:
12165 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12166 &insn_len, contents, isymbuf,
12167 symtab_hdr);
12168 break;
12169 case R_NDS32_LONGCALL3:
12170 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12171 &insn_len, contents, isymbuf,
12172 symtab_hdr);
12173 break;
12174 case R_NDS32_LONGJUMP1:
12175 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12176 &insn_len, contents, isymbuf,
12177 symtab_hdr);
12178 break;
12179 case R_NDS32_LONGJUMP2:
12180 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12181 &insn_len, contents, isymbuf,
12182 symtab_hdr);
12183 break;
12184 case R_NDS32_LONGJUMP3:
12185 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12186 &insn_len, contents, isymbuf,
12187 symtab_hdr);
12188 break;
12189 case R_NDS32_LONGCALL4:
12190 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12191 &insn_len, contents, isymbuf,
12192 symtab_hdr);
12193 break;
12194 case R_NDS32_LONGCALL5:
12195 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12196 &insn_len, contents, isymbuf,
12197 symtab_hdr);
12198 break;
12199 case R_NDS32_LONGCALL6:
12200 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12201 &insn_len, contents, isymbuf,
12202 symtab_hdr);
12203 break;
12204 case R_NDS32_LONGJUMP4:
12205 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12206 &insn_len, contents, isymbuf,
12207 symtab_hdr);
12208 break;
12209 case R_NDS32_LONGJUMP5:
12210 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12211 &insn_len, &seq_len, contents,
12212 isymbuf, symtab_hdr);
12213 break;
12214 case R_NDS32_LONGJUMP6:
12215 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12216 &insn_len, &seq_len, contents,
12217 isymbuf, symtab_hdr);
12218 break;
12219 case R_NDS32_LONGJUMP7:
12220 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12221 &insn_len, &seq_len, contents,
12222 isymbuf, symtab_hdr);
12223 break;
12224 case R_NDS32_LOADSTORE:
12225 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12226 internal_relocs, &insn_len,
12227 contents, isymbuf, symtab_hdr,
12228 load_store_relax);
12229 break;
12230 case R_NDS32_LO12S0_RELA:
12231 case R_NDS32_LO12S1_RELA:
12232 case R_NDS32_LO12S2_DP_RELA:
12233 case R_NDS32_LO12S2_SP_RELA:
12234 case R_NDS32_LO12S2_RELA:
12235 /* Relax for low part. */
12236 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12237 contents, isymbuf, symtab_hdr);
12238
12239 /* It is impossible to delete blank, so just continue. */
12240 continue;
12241 case R_NDS32_GOT_LO12:
12242 case R_NDS32_GOTOFF_LO12:
12243 case R_NDS32_PLTREL_LO12:
12244 case R_NDS32_PLT_GOTREL_LO12:
12245 case R_NDS32_GOTPC_LO12:
12246 /* Relax for PIC gp-relative low part. */
12247 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12248 isymbuf, symtab_hdr);
12249
12250 /* It is impossible to delete blank, so just continue. */
12251 continue;
12252 case R_NDS32_TLS_LE_LO12:
12253 /* Relax for LE TLS low part. */
12254 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12255 isymbuf, symtab_hdr);
12256
12257 /* It is impossible to delete blank, so just continue. */
12258 continue;
12259 case R_NDS32_TLS_LE_ADD:
12260 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12261 contents, isymbuf, symtab_hdr, again);
12262 /* It is impossible to delete blank, so just continue. */
12263 continue;
12264 case R_NDS32_TLS_LE_LS:
12265 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12266 contents, isymbuf, symtab_hdr, again);
12267 continue;
12268 case R_NDS32_PTR:
12269 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12270 &insn_len, &seq_len, contents);
12271 break;
12272 case R_NDS32_PLT_GOT_SUFF:
12273 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12274 internal_relocs, contents,
12275 isymbuf, symtab_hdr, again);
12276 /* It is impossible to delete blank, so just continue. */
12277 continue;
12278 case R_NDS32_GOT_SUFF:
12279 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12280 internal_relocs, contents,
12281 symtab_hdr, again);
12282 /* It is impossible to delete blank, so just continue. */
12283 continue;
12284 case R_NDS32_GOTOFF_SUFF:
12285 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12286 internal_relocs, contents,
12287 isymbuf, symtab_hdr, again);
12288 /* It is impossible to delete blank, so just continue. */
12289 continue;
12290 default:
12291 continue;
12292
12293 }
12294 if (removed && seq_len - insn_len > 0)
12295 {
12296 if (!insert_nds32_elf_blank
12297 (&relax_blank_list, irel->r_offset + insn_len,
12298 seq_len - insn_len))
12299 goto error_return;
12300 *again = TRUE;
12301 }
12302 }
12303
12304 calc_nds32_blank_total (relax_blank_list);
12305
12306 if (table->relax_fp_as_gp)
12307 {
12308 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12309 irelend, isymbuf))
12310 goto error_return;
12311
12312 if (*again == FALSE)
12313 {
12314 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12315 irelend))
12316 goto error_return;
12317 }
12318 }
12319
12320 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12321
12322 if (*again == FALSE)
12323 {
12324 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12325 &relax_blank_list, optimize, opt_size))
12326 goto error_return;
12327 }
12328
12329 /* It doesn't matter optimize_for_space_no_align anymore.
12330 If object file is assembled with flag '-Os',
12331 the we don't adjust jump-destination on 4-byte boundary. */
12332
12333 if (relax_blank_list)
12334 {
12335 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12336 relax_blank_list = NULL;
12337 }
12338
12339 if (*again == FALSE)
12340 {
12341 /* Closing the section, so we don't relax it anymore. */
12342 bfd_vma sec_size_align;
12343 Elf_Internal_Rela *tmp_rel;
12344
12345 /* Pad to alignment boundary. Only handle current section alignment. */
12346 sec_size_align = (sec->size + (~((-1) << sec->alignment_power)))
12347 & ((-1) << sec->alignment_power);
12348 if ((sec_size_align - sec->size) & 0x2)
12349 {
12350 insn16 = NDS32_NOP16;
12351 bfd_putb16 (insn16, contents + sec->size);
12352 sec->size += 2;
12353 }
12354
12355 while (sec_size_align != sec->size)
12356 {
12357 insn = NDS32_NOP32;
12358 bfd_putb32 (insn, contents + sec->size);
12359 sec->size += 4;
12360 }
12361
12362 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12363 irelend, R_NDS32_RELAX_ENTRY);
12364 if (tmp_rel != irelend)
12365 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12366
12367 clean_nds32_elf_blank ();
12368 }
12369
12370 finish:
12371 if (internal_relocs != NULL
12372 && elf_section_data (sec)->relocs != internal_relocs)
12373 free (internal_relocs);
12374
12375 if (contents != NULL
12376 && elf_section_data (sec)->this_hdr.contents != contents)
12377 free (contents);
12378
12379 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12380 free (isymbuf);
12381
12382 return result;
12383
12384 error_return:
12385 result = FALSE;
12386 goto finish;
12387 }
12388
12389 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12390 {
12391 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12392 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12393 {NULL, 0, 0, 0, 0}
12394 };
12395
12396 static bfd_boolean
12397 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12398 struct bfd_link_info *info,
12399 void *finfo ATTRIBUTE_UNUSED,
12400 bfd_boolean (*func) (void *, const char *,
12401 Elf_Internal_Sym *,
12402 asection *,
12403 struct elf_link_hash_entry *)
12404 ATTRIBUTE_UNUSED)
12405 {
12406 FILE *sym_ld_script = NULL;
12407 struct elf_nds32_link_hash_table *table;
12408
12409 table = nds32_elf_hash_table (info);
12410 sym_ld_script = table->sym_ld_script;
12411
12412 if (check_start_export_sym)
12413 fprintf (sym_ld_script, "}\n");
12414
12415 return TRUE;
12416 }
12417
12418 static enum elf_reloc_type_class
12419 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12420 const asection *rel_sec ATTRIBUTE_UNUSED,
12421 const Elf_Internal_Rela *rela)
12422 {
12423 switch ((int) ELF32_R_TYPE (rela->r_info))
12424 {
12425 case R_NDS32_RELATIVE:
12426 return reloc_class_relative;
12427 case R_NDS32_JMP_SLOT:
12428 return reloc_class_plt;
12429 case R_NDS32_COPY:
12430 return reloc_class_copy;
12431 default:
12432 return reloc_class_normal;
12433 }
12434 }
12435
12436 /* Put target dependent option into info hash table. */
12437 void
12438 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12439 int relax_fp_as_gp,
12440 int eliminate_gc_relocs,
12441 FILE * sym_ld_script, int load_store_relax,
12442 int target_optimize, int relax_status,
12443 int relax_round, FILE * ex9_export_file,
12444 FILE * ex9_import_file,
12445 int update_ex9_table, int ex9_limit,
12446 bfd_boolean ex9_loop_aware,
12447 bfd_boolean ifc_loop_aware)
12448 {
12449 struct elf_nds32_link_hash_table *table;
12450
12451 table = nds32_elf_hash_table (link_info);
12452 if (table == NULL)
12453 return;
12454
12455 table->relax_fp_as_gp = relax_fp_as_gp;
12456 table->eliminate_gc_relocs = eliminate_gc_relocs;
12457 table->sym_ld_script = sym_ld_script;
12458 table ->load_store_relax = load_store_relax;
12459 table->target_optimize = target_optimize;
12460 table->relax_status = relax_status;
12461 table->relax_round = relax_round;
12462 table->ex9_export_file = ex9_export_file;
12463 table->ex9_import_file = ex9_import_file;
12464 table->update_ex9_table = update_ex9_table;
12465 table->ex9_limit = ex9_limit;
12466 table->ex9_loop_aware = ex9_loop_aware;
12467 table->ifc_loop_aware = ifc_loop_aware;
12468 }
12469 \f
12470 /* These functions and data-structures are used for fp-as-gp
12471 optimization. */
12472
12473 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */
12474 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12475 the read-only section and read-write section. */
12476 #define FAG_WINDOW (508 - 32)
12477
12478 /* An nds32_fag represent a gp-relative access.
12479 We find best fp-base by using a sliding window
12480 to find a base address which can cover most gp-access. */
12481 struct nds32_fag
12482 {
12483 struct nds32_fag *next; /* NULL-teminated linked list. */
12484 bfd_vma addr; /* The address of this fag. */
12485 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12486 It is used for applying FP7U2_FLAG. */
12487 int count; /* How many times this address is referred.
12488 There should be exactly `count' relocations
12489 in relas. */
12490 int relas_capcity; /* The buffer size of relas.
12491 We use an array instead of linked-list,
12492 and realloc is used to adjust buffer size. */
12493 };
12494
12495 static void
12496 nds32_fag_init (struct nds32_fag *head)
12497 {
12498 memset (head, 0, sizeof (struct nds32_fag));
12499 }
12500
12501 static void
12502 nds32_fag_verify (struct nds32_fag *head)
12503 {
12504 struct nds32_fag *iter;
12505 struct nds32_fag *prev;
12506
12507 prev = NULL;
12508 iter = head->next;
12509 while (iter)
12510 {
12511 if (prev && prev->addr >= iter->addr)
12512 puts ("Bug in fp-as-gp insertion.");
12513 prev = iter;
12514 iter = iter->next;
12515 }
12516 }
12517
12518 /* Insert a fag in ascending order.
12519 If a fag of the same address already exists,
12520 they are chained by relas array. */
12521
12522 static void
12523 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12524 Elf_Internal_Rela * rel)
12525 {
12526 struct nds32_fag *iter;
12527 struct nds32_fag *new_fag;
12528 const int INIT_RELAS_CAP = 4;
12529
12530 for (iter = head;
12531 iter->next && iter->next->addr <= addr;
12532 iter = iter->next)
12533 /* Find somewhere to insert. */ ;
12534
12535 /* `iter' will be equal to `head' if the list is empty. */
12536 if (iter != head && iter->addr == addr)
12537 {
12538 /* The address exists in the list.
12539 Insert `rel' into relocation list, relas. */
12540
12541 /* Check whether relas is big enough. */
12542 if (iter->count >= iter->relas_capcity)
12543 {
12544 iter->relas_capcity *= 2;
12545 iter->relas = bfd_realloc
12546 (iter->relas, iter->relas_capcity * sizeof (void *));
12547 }
12548 iter->relas[iter->count++] = rel;
12549 return;
12550 }
12551
12552 /* This is a new address. Create a fag node for it. */
12553 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12554 memset (new_fag, 0, sizeof (*new_fag));
12555 new_fag->addr = addr;
12556 new_fag->count = 1;
12557 new_fag->next = iter->next;
12558 new_fag->relas_capcity = INIT_RELAS_CAP;
12559 new_fag->relas = (Elf_Internal_Rela **)
12560 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12561 new_fag->relas[0] = rel;
12562 iter->next = new_fag;
12563
12564 nds32_fag_verify (head);
12565 }
12566
12567 static void
12568 nds32_fag_free_list (struct nds32_fag *head)
12569 {
12570 struct nds32_fag *iter;
12571
12572 iter = head->next;
12573 while (iter)
12574 {
12575 struct nds32_fag *tmp = iter;
12576 iter = iter->next;
12577 free (tmp->relas);
12578 tmp->relas = NULL;
12579 free (tmp);
12580 }
12581 }
12582
12583 /* Find the best fp-base address.
12584 The relocation associated with that address is returned,
12585 so we can track the symbol instead of a fixed address.
12586
12587 When relaxation, the address of an datum may change,
12588 because a text section is shrinked, so the data section
12589 moves forward. If the aligments of text and data section
12590 are different, their distance may change too.
12591 Therefore, tracking a fixed address is not appriate. */
12592
12593 static int
12594 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12595 {
12596 struct nds32_fag *base; /* First fag in the window. */
12597 struct nds32_fag *last; /* First fag outside the window. */
12598 int accu = 0; /* Usage accumulation. */
12599 struct nds32_fag *best; /* Best fag. */
12600 int baccu = 0; /* Best accumulation. */
12601
12602 /* Use first fag for initial, and find the last fag in the window.
12603
12604 In each iteration, we could simply subtract previous fag
12605 and accumulate following fags which are inside the window,
12606 untill we each the end. */
12607
12608 if (head->next == NULL)
12609 {
12610 *bestpp = NULL;
12611 return 0;
12612 }
12613
12614 /* Initialize base. */
12615 base = head->next;
12616 best = base;
12617 for (last = base;
12618 last && last->addr < base->addr + FAG_WINDOW;
12619 last = last->next)
12620 accu += last->count;
12621
12622 baccu = accu;
12623
12624 /* Record the best base in each iteration. */
12625 while (base->next)
12626 {
12627 accu -= base->count;
12628 base = base->next;
12629 /* Account fags in window. */
12630 for (/* Nothing. */;
12631 last && last->addr < base->addr + FAG_WINDOW;
12632 last = last->next)
12633 accu += last->count;
12634
12635 /* A better fp-base? */
12636 if (accu > baccu)
12637 {
12638 best = base;
12639 baccu = accu;
12640 }
12641 }
12642
12643 if (bestpp)
12644 *bestpp = best;
12645 return baccu;
12646 }
12647
12648 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12649 so we can convert it fo fp-relative access later.
12650 `best_fag' is the best fp-base. Only those inside the window
12651 of best_fag is applied the flag. */
12652
12653 static bfd_boolean
12654 nds32_fag_mark_relax (struct bfd_link_info *link_info,
12655 bfd *abfd, struct nds32_fag *best_fag,
12656 Elf_Internal_Rela *internal_relocs,
12657 Elf_Internal_Rela *irelend)
12658 {
12659 struct nds32_fag *ifag;
12660 bfd_vma best_fpbase, gp;
12661 bfd *output_bfd;
12662
12663 output_bfd = abfd->sections->output_section->owner;
12664 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12665 best_fpbase = best_fag->addr;
12666
12667 if (best_fpbase > gp + sdata_range[1][1]
12668 || best_fpbase < gp - sdata_range[1][0])
12669 return FALSE;
12670
12671 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12672 so we know they can be converted to lwi37.fp. */
12673 for (ifag = best_fag;
12674 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12675 {
12676 int i;
12677
12678 for (i = 0; i < ifag->count; i++)
12679 {
12680 Elf_Internal_Rela *insn16_rel;
12681 Elf_Internal_Rela *fag_rel;
12682
12683 fag_rel = ifag->relas[i];
12684
12685 /* Only if this is within the WINDOWS, FP7U2_FLAG
12686 is applied. */
12687
12688 insn16_rel = find_relocs_at_address
12689 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12690
12691 if (insn16_rel != irelend)
12692 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12693 }
12694 }
12695 return TRUE;
12696 }
12697
12698 /* Reset INSN16 to clean fp as gp. */
12699
12700 static void
12701 nds32_fag_unmark_relax (struct nds32_fag *fag,
12702 Elf_Internal_Rela *internal_relocs,
12703 Elf_Internal_Rela *irelend)
12704 {
12705 struct nds32_fag *ifag;
12706 int i;
12707 Elf_Internal_Rela *insn16_rel;
12708 Elf_Internal_Rela *fag_rel;
12709
12710 for (ifag = fag; ifag; ifag = ifag->next)
12711 {
12712 for (i = 0; i < ifag->count; i++)
12713 {
12714 fag_rel = ifag->relas[i];
12715
12716 /* Restore the INSN16 relocation. */
12717 insn16_rel = find_relocs_at_address
12718 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12719
12720 if (insn16_rel != irelend)
12721 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12722 }
12723 }
12724 }
12725
12726 /* This is the main function of fp-as-gp optimization.
12727 It should be called by relax_section. */
12728
12729 static bfd_boolean
12730 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12731 bfd *abfd, asection *sec,
12732 Elf_Internal_Rela *internal_relocs,
12733 Elf_Internal_Rela *irelend,
12734 Elf_Internal_Sym *isymbuf)
12735 {
12736 Elf_Internal_Rela *begin_rel = NULL;
12737 Elf_Internal_Rela *irel;
12738 struct nds32_fag fag_head;
12739 Elf_Internal_Shdr *symtab_hdr;
12740 bfd_byte *contents;
12741 bfd_boolean ifc_inside = FALSE;
12742
12743 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12744
12745 /* Per-function fp-base selection.
12746 1. Create a list for all the gp-relative access.
12747 2. Base on those gp-relative address,
12748 find a fp-base which can cover most access.
12749 3. Use the fp-base for fp-as-gp relaxation.
12750
12751 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12752 we should
12753 1. delete the `la $fp, _FP_BASE_' instruction and
12754 2. not convert lwi.gp to lwi37.fp.
12755
12756 To delete the _FP_BASE_ instruction, we simply apply
12757 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12758
12759 To suppress the conversion, we simply NOT to apply
12760 R_NDS32_INSN16_FP7U2_FLAG flag. */
12761
12762 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12763
12764 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12765 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12766 return FALSE;
12767
12768 /* Check whether it is worth for fp-as-gp optimization,
12769 i.e., at least 3 gp-load.
12770
12771 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12772 apply this optimization. */
12773
12774 for (irel = internal_relocs; irel < irelend; irel++)
12775 {
12776 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12777 One we enter the begin of the region, we track all the LW/ST
12778 instructions, so when we leave the region, we try to find
12779 the best fp-base address for those LW/ST instructions. */
12780
12781 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12782 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12783 {
12784 /* Begin of the region. */
12785 if (begin_rel)
12786 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12787
12788 begin_rel = irel;
12789 nds32_fag_init (&fag_head);
12790 ifc_inside = FALSE;
12791 }
12792 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12793 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12794 {
12795 int accu;
12796 struct nds32_fag *best_fag, *tmp_fag;
12797 int dist;
12798
12799 /* End of the region.
12800 Check whether it is worth to do fp-as-gp. */
12801
12802 if (begin_rel == NULL)
12803 {
12804 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12805 continue;
12806 }
12807
12808 accu = nds32_fag_find_base (&fag_head, &best_fag);
12809
12810 /* Clean FP7U2_FLAG because they may set ever. */
12811 tmp_fag = fag_head.next;
12812 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12813
12814 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12815 if (accu < FAG_THRESHOLD
12816 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12817 internal_relocs, irelend))
12818 {
12819 /* Not worth to do fp-as-gp. */
12820 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12821 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12822 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12823 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12824 nds32_fag_free_list (&fag_head);
12825 begin_rel = NULL;
12826 continue;
12827 }
12828
12829 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12830 so we use it to record the distance to the reloction of best
12831 fp-base. */
12832 dist = best_fag->relas[0] - begin_rel;
12833 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12834 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12835 relocation. And get the base value when relocating. */
12836 begin_rel->r_addend &= (0x1 << 16) - 1;
12837 begin_rel->r_addend |= dist << 16;
12838
12839 nds32_fag_free_list (&fag_head);
12840 begin_rel = NULL;
12841 }
12842
12843 if (begin_rel == NULL || ifc_inside)
12844 /* Skip if we are not in the region of fp-as-gp. */
12845 continue;
12846
12847 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12848 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12849 {
12850 bfd_vma addr;
12851 uint32_t insn;
12852
12853 /* A gp-relative access is found. Insert it to the fag-list. */
12854
12855 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12856 insn = bfd_getb32 (contents + irel->r_offset);
12857 if (!N32_IS_RT3 (insn))
12858 continue;
12859
12860 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12861 nds32_fag_insert (&fag_head, addr, irel);
12862 }
12863 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12864 {
12865 begin_rel = NULL;
12866 }
12867 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12868 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12869 {
12870 /* Suppress fp as gp when encounter ifc. */
12871 ifc_inside = TRUE;
12872 }
12873 }
12874
12875 return TRUE;
12876 }
12877
12878 /* Remove unused `la $fp, _FD_BASE_' instruction. */
12879
12880 static bfd_boolean
12881 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12882 Elf_Internal_Rela *internal_relocs,
12883 Elf_Internal_Rela *irelend)
12884 {
12885 Elf_Internal_Rela *irel;
12886 Elf_Internal_Shdr *symtab_hdr;
12887 bfd_byte *contents = NULL;
12888 nds32_elf_blank_t *relax_blank_list = NULL;
12889 bfd_boolean result = TRUE;
12890 bfd_boolean unused_region = FALSE;
12891
12892 /*
12893 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12894 * R_NDS32_17IFC_PCREL_RELA
12895 * R_NDS32_10IFCU_PCREL_RELA
12896
12897 CASE??????????????
12898 */
12899
12900 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12901 nds32_get_section_contents (abfd, sec, &contents, TRUE);
12902
12903 for (irel = internal_relocs; irel < irelend; irel++)
12904 {
12905 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12906 we marked to in previous pass.
12907 DO NOT scan relocations again, since we've alreadly decided it
12908 and set the flag. */
12909 const char *syname;
12910 int syndx;
12911 uint32_t insn;
12912
12913 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12914 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12915 unused_region = TRUE;
12916 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12917 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12918 unused_region = FALSE;
12919
12920 /* We're not in the region. */
12921 if (!unused_region)
12922 continue;
12923
12924 /* _FP_BASE_ must be a GLOBAL symbol. */
12925 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12926 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12927 continue;
12928
12929 /* The symbol name must be _FP_BASE_. */
12930 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12931 if (strcmp (syname, FP_BASE_NAME) != 0)
12932 continue;
12933
12934 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12935 {
12936 /* addi.gp $fp, -256 */
12937 insn = bfd_getb32 (contents + irel->r_offset);
12938 if (insn != INSN_ADDIGP_TO_FP)
12939 continue;
12940 }
12941 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12942 {
12943 /* addi $fp, $gp, -256 */
12944 insn = bfd_getb32 (contents + irel->r_offset);
12945 if (insn != INSN_ADDI_GP_TO_FP)
12946 continue;
12947 }
12948 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12949 {
12950 /* movi $fp, FP_BASE */
12951 insn = bfd_getb32 (contents + irel->r_offset);
12952 if (insn != INSN_MOVI_TO_FP)
12953 continue;
12954 }
12955 else
12956 continue;
12957
12958 /* We got here because a FP_BASE instruction is found. */
12959 if (!insert_nds32_elf_blank_recalc_total
12960 (&relax_blank_list, irel->r_offset, 4))
12961 goto error_return;
12962 }
12963
12964 finish:
12965 if (relax_blank_list)
12966 {
12967 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12968 relax_blank_list = NULL;
12969 }
12970 return result;
12971
12972 error_return:
12973 result = FALSE;
12974 goto finish;
12975 }
12976
12977 /* This is a version of bfd_generic_get_relocated_section_contents.
12978 We need this variety because relaxation will modify the dwarf
12979 infomation. When there is undefined symbol reference error mesage,
12980 linker need to dump line number where the symbol be used. However
12981 the address is be relaxed, it can not get the original dwarf contents.
12982 The variety only modify function call for reading in the section. */
12983
12984 static bfd_byte *
12985 nds32_elf_get_relocated_section_contents (bfd *abfd,
12986 struct bfd_link_info *link_info,
12987 struct bfd_link_order *link_order,
12988 bfd_byte *data,
12989 bfd_boolean relocatable,
12990 asymbol **symbols)
12991 {
12992 bfd *input_bfd = link_order->u.indirect.section->owner;
12993 asection *input_section = link_order->u.indirect.section;
12994 long reloc_size;
12995 arelent **reloc_vector;
12996 long reloc_count;
12997
12998 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12999 if (reloc_size < 0)
13000 return NULL;
13001
13002 /* Read in the section. */
13003 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
13004 return NULL;
13005
13006 if (reloc_size == 0)
13007 return data;
13008
13009 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13010 if (reloc_vector == NULL)
13011 return NULL;
13012
13013 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13014 reloc_vector, symbols);
13015 if (reloc_count < 0)
13016 goto error_return;
13017
13018 if (reloc_count > 0)
13019 {
13020 arelent **parent;
13021 for (parent = reloc_vector; *parent != NULL; parent++)
13022 {
13023 char *error_message = NULL;
13024 asymbol *symbol;
13025 bfd_reloc_status_type r;
13026
13027 symbol = *(*parent)->sym_ptr_ptr;
13028 if (symbol->section && discarded_section (symbol->section))
13029 {
13030 bfd_byte *p;
13031 static reloc_howto_type none_howto
13032 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13033 "unused", FALSE, 0, 0, FALSE);
13034
13035 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13036 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13037 p);
13038 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13039 (*parent)->addend = 0;
13040 (*parent)->howto = &none_howto;
13041 r = bfd_reloc_ok;
13042 }
13043 else
13044 r = bfd_perform_relocation (input_bfd, *parent, data,
13045 input_section,
13046 relocatable ? abfd : NULL,
13047 &error_message);
13048
13049 if (relocatable)
13050 {
13051 asection *os = input_section->output_section;
13052
13053 /* A partial link, so keep the relocs. */
13054 os->orelocation[os->reloc_count] = *parent;
13055 os->reloc_count++;
13056 }
13057
13058 if (r != bfd_reloc_ok)
13059 {
13060 switch (r)
13061 {
13062 case bfd_reloc_undefined:
13063 if (!((*link_info->callbacks->undefined_symbol)
13064 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13065 input_bfd, input_section, (*parent)->address, TRUE)))
13066 goto error_return;
13067 break;
13068 case bfd_reloc_dangerous:
13069 BFD_ASSERT (error_message != NULL);
13070 if (!((*link_info->callbacks->reloc_dangerous)
13071 (link_info, error_message, input_bfd, input_section,
13072 (*parent)->address)))
13073 goto error_return;
13074 break;
13075 case bfd_reloc_overflow:
13076 if (!((*link_info->callbacks->reloc_overflow)
13077 (link_info, NULL,
13078 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13079 (*parent)->howto->name, (*parent)->addend,
13080 input_bfd, input_section, (*parent)->address)))
13081 goto error_return;
13082 break;
13083 case bfd_reloc_outofrange:
13084 /* PR ld/13730:
13085 This error can result when processing some partially
13086 complete binaries. Do not abort, but issue an error
13087 message instead. */
13088 link_info->callbacks->einfo
13089 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13090 abfd, input_section, * parent);
13091 goto error_return;
13092
13093 default:
13094 abort ();
13095 break;
13096 }
13097 }
13098 }
13099 }
13100
13101 free (reloc_vector);
13102 return data;
13103
13104 error_return:
13105 free (reloc_vector);
13106 return NULL;
13107 }
13108 \f
13109 /* Link-time IFC relaxation.
13110 In this optimization, we chains jump instructions
13111 of the same destination with ifcall. */
13112
13113
13114 /* List to save jal and j relocation. */
13115 struct elf_nds32_ifc_symbol_entry
13116 {
13117 asection *sec;
13118 struct elf_link_hash_entry *h;
13119 struct elf_nds32_ifc_irel_list *irel_head;
13120 unsigned long insn;
13121 int times;
13122 int enable; /* Apply ifc. */
13123 int ex9_enable; /* Apply ifc after ex9. */
13124 struct elf_nds32_ifc_symbol_entry *next;
13125 };
13126
13127 struct elf_nds32_ifc_irel_list
13128 {
13129 Elf_Internal_Rela *irel;
13130 asection *sec;
13131 bfd_vma addr;
13132 /* If this is set, then it is the last instruction for
13133 ifc-chain, so it must be keep for the actual branching. */
13134 int keep;
13135 struct elf_nds32_ifc_irel_list *next;
13136 };
13137
13138 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13139
13140 /* Insert symbol of jal and j for ifc. */
13141
13142 static void
13143 nds32_elf_ifc_insert_symbol (asection *sec,
13144 struct elf_link_hash_entry *h,
13145 Elf_Internal_Rela *irel,
13146 unsigned long insn)
13147 {
13148 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13149
13150 /* Check there is target of existing entry the same as the new one. */
13151 while (ptr != NULL)
13152 {
13153 if (((h == NULL && ptr->sec == sec
13154 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13155 && ptr->irel_head->irel->r_addend == irel->r_addend)
13156 || h != NULL)
13157 && ptr->h == h
13158 && ptr->insn == insn)
13159 {
13160 /* The same target exist, so insert into list. */
13161 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13162
13163 while (irel_list->next != NULL)
13164 irel_list = irel_list->next;
13165 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13166 irel_list = irel_list->next;
13167 irel_list->irel = irel;
13168 irel_list->keep = 1;
13169
13170 if (h == NULL)
13171 irel_list->sec = NULL;
13172 else
13173 irel_list->sec = sec;
13174 irel_list->next = NULL;
13175 return;
13176 }
13177 if (ptr->next == NULL)
13178 break;
13179 ptr = ptr->next;
13180 }
13181
13182 /* There is no same target entry, so build a new one. */
13183 if (ifc_symbol_head == NULL)
13184 {
13185 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13186 ptr = ifc_symbol_head;
13187 }
13188 else
13189 {
13190 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13191 ptr = ptr->next;
13192 }
13193
13194 ptr->h = h;
13195 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13196 ptr->irel_head->irel = irel;
13197 ptr->insn = insn;
13198 ptr->irel_head->keep = 1;
13199
13200 if (h == NULL)
13201 {
13202 /* Local symbols. */
13203 ptr->sec = sec;
13204 ptr->irel_head->sec = NULL;
13205 }
13206 else
13207 {
13208 /* Global symbol. */
13209 ptr->sec = NULL;
13210 ptr->irel_head->sec = sec;
13211 }
13212
13213 ptr->irel_head->next = NULL;
13214 ptr->times = 0;
13215 ptr->enable = 0;
13216 ptr->ex9_enable = 0;
13217 ptr->next = NULL;
13218 }
13219
13220 /* Gather all jal and j instructions. */
13221
13222 static bfd_boolean
13223 nds32_elf_ifc_calc (struct bfd_link_info *info,
13224 bfd *abfd, asection *sec)
13225 {
13226 Elf_Internal_Rela *internal_relocs;
13227 Elf_Internal_Rela *irelend;
13228 Elf_Internal_Rela *irel;
13229 Elf_Internal_Shdr *symtab_hdr;
13230 bfd_byte *contents = NULL;
13231 uint32_t insn, insn_with_reg;
13232 unsigned long r_symndx;
13233 struct elf_link_hash_entry *h;
13234 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13235 struct elf_nds32_link_hash_table *table;
13236 bfd_boolean ifc_loop_aware;
13237
13238 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13239 TRUE /* keep_memory */);
13240 irelend = internal_relocs + sec->reloc_count;
13241 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13242
13243 /* Check if the object enable ifc. */
13244 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13245 R_NDS32_RELAX_ENTRY);
13246
13247 if (irel == NULL
13248 || irel >= irelend
13249 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13250 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13251 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13252 return TRUE;
13253
13254 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
13255 return FALSE;
13256
13257 table = nds32_elf_hash_table (info);
13258 ifc_loop_aware = table->ifc_loop_aware;
13259 while (irel != NULL && irel < irelend)
13260 {
13261 /* Traverse all relocation and gather all of them to build the list. */
13262
13263 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13264 {
13265 if (ifc_loop_aware == 1
13266 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13267 {
13268 /* Check the region if loop or not. If it is true and
13269 ifc-loop-aware is true, ignore the region till region end. */
13270 while (irel != NULL
13271 && irel < irelend
13272 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13273 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13274 irel++;
13275 }
13276 }
13277
13278 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13279 {
13280 insn = bfd_getb32 (contents + irel->r_offset);
13281 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13282 r_symndx = ELF32_R_SYM (irel->r_info);
13283 if (r_symndx < symtab_hdr->sh_info)
13284 {
13285 /* Local symbol. */
13286 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13287 }
13288 else
13289 {
13290 /* External symbol. */
13291 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13292 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13293 }
13294 }
13295 irel++;
13296 }
13297 return TRUE;
13298 }
13299
13300 /* Determine whether j and jal should be substituted. */
13301
13302 static void
13303 nds32_elf_ifc_filter (struct bfd_link_info *info)
13304 {
13305 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13306 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13307 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13308 struct elf_nds32_link_hash_table *table;
13309 int target_optimize;
13310 bfd_vma address;
13311
13312 table = nds32_elf_hash_table (info);
13313 target_optimize = table->target_optimize;
13314 while (ptr)
13315 {
13316 irel_ptr = ptr->irel_head;
13317 if (ptr->h == NULL)
13318 {
13319 /* Local symbol. */
13320 irel_keeper = irel_ptr;
13321 while (irel_ptr && irel_ptr->next)
13322 {
13323 /* Check there is jump target can be used. */
13324 if ((irel_ptr->next->irel->r_offset
13325 - irel_keeper->irel->r_offset) > 1022)
13326 irel_keeper = irel_ptr->next;
13327 else
13328 {
13329 ptr->enable = 1;
13330 irel_ptr->keep = 0;
13331 }
13332 irel_ptr = irel_ptr->next;
13333 }
13334 }
13335 else
13336 {
13337 /* Global symbol. */
13338 /* We have to get the absolute address and decide
13339 whether to keep it or not. */
13340 while (irel_ptr)
13341 {
13342 address = (irel_ptr->irel->r_offset
13343 + irel_ptr->sec->output_section->vma
13344 + irel_ptr->sec->output_offset);
13345 irel_ptr->addr = address;
13346 irel_ptr = irel_ptr->next;
13347 }
13348
13349 irel_ptr = ptr->irel_head;
13350 while (irel_ptr)
13351 {
13352 /* Sort by address. */
13353 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13354 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13355 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13356 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13357
13358 /* Get the smallest one. */
13359 while (irel_temp->next)
13360 {
13361 if (irel_temp->next->addr < irel_dest->addr)
13362 {
13363 irel_dest_prev = irel_temp;
13364 irel_dest = irel_temp->next;
13365 }
13366 irel_temp = irel_temp->next;
13367 }
13368
13369 if (irel_dest != irel_ptr)
13370 {
13371 if (irel_ptr_prev)
13372 irel_ptr_prev->next = irel_dest;
13373 if (irel_dest_prev)
13374 irel_dest_prev->next = irel_ptr;
13375 irel_temp = irel_ptr->next;
13376 irel_ptr->next = irel_dest->next;
13377 irel_dest->next = irel_temp;
13378 }
13379 irel_ptr_prev = irel_ptr;
13380 irel_ptr = irel_ptr->next;
13381 }
13382
13383 irel_ptr = ptr->irel_head;
13384 irel_keeper = irel_ptr;
13385 while (irel_ptr && irel_ptr->next)
13386 {
13387 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13388 irel_keeper = irel_ptr->next;
13389 else
13390 {
13391 ptr->enable = 1;
13392 irel_ptr->keep = 0;
13393 }
13394 irel_ptr = irel_ptr->next;
13395 }
13396 }
13397
13398 /* Ex9 enable. Reserve it for ex9. */
13399 if ((target_optimize & NDS32_RELAX_EX9_ON)
13400 && ptr->irel_head != irel_keeper)
13401 ptr->enable = 0;
13402 ptr = ptr->next;
13403 }
13404 }
13405
13406 /* Determine whether j and jal should be substituted after ex9 done. */
13407
13408 static void
13409 nds32_elf_ifc_filter_after_ex9 (void)
13410 {
13411 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13412 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13413
13414 while (ptr)
13415 {
13416 if (ptr->enable == 0)
13417 {
13418 /* Check whether ifc is applied or not. */
13419 irel_ptr = ptr->irel_head;
13420 ptr->ex9_enable = 1;
13421 while (irel_ptr)
13422 {
13423 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13424 {
13425 /* Ex9 already. */
13426 ptr->ex9_enable = 0;
13427 break;
13428 }
13429 irel_ptr = irel_ptr->next;
13430 }
13431 }
13432 ptr = ptr->next;
13433 }
13434 }
13435
13436 /* Wrapper to do ifc relaxation. */
13437
13438 bfd_boolean
13439 nds32_elf_ifc_finish (struct bfd_link_info *info)
13440 {
13441 int relax_status;
13442 struct elf_nds32_link_hash_table *table;
13443
13444 table = nds32_elf_hash_table (info);
13445 relax_status = table->relax_status;
13446
13447 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13448 nds32_elf_ifc_filter (info);
13449 else
13450 nds32_elf_ifc_filter_after_ex9 ();
13451
13452 if (!nds32_elf_ifc_replace (info))
13453 return FALSE;
13454
13455 if (table)
13456 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13457 return TRUE;
13458 }
13459
13460 /* Traverse the result of ifc filter and replace it with ifcall9. */
13461
13462 static bfd_boolean
13463 nds32_elf_ifc_replace (struct bfd_link_info *info)
13464 {
13465 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13466 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13467 nds32_elf_blank_t *relax_blank_list = NULL;
13468 bfd_byte *contents = NULL;
13469 Elf_Internal_Rela *internal_relocs;
13470 Elf_Internal_Rela *irel;
13471 Elf_Internal_Rela *irelend;
13472 unsigned short insn16 = INSN_IFCALL9;
13473 struct elf_nds32_link_hash_table *table;
13474 int relax_status;
13475
13476 table = nds32_elf_hash_table (info);
13477 relax_status = table->relax_status;
13478
13479 while (ptr)
13480 {
13481 /* Traverse the ifc gather list, and replace the
13482 filter entries by ifcall9. */
13483 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13484 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13485 && ptr->ex9_enable == 1))
13486 {
13487 irel_ptr = ptr->irel_head;
13488 if (ptr->h == NULL)
13489 {
13490 /* Local symbol. */
13491 internal_relocs = _bfd_elf_link_read_relocs
13492 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13493 irelend = internal_relocs + ptr->sec->reloc_count;
13494
13495 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13496 &contents, TRUE))
13497 return FALSE;
13498
13499 while (irel_ptr)
13500 {
13501 if (irel_ptr->keep == 0 && irel_ptr->next)
13502 {
13503 /* The one can be replaced. We have to check whether
13504 there is any alignment point in the region. */
13505 irel = irel_ptr->irel;
13506 while (((irel_ptr->next->keep == 0
13507 && irel < irel_ptr->next->irel)
13508 || (irel_ptr->next->keep == 1 && irel < irelend))
13509 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13510 && (irel->r_addend & 0x1f) == 2))
13511 irel++;
13512 if (irel >= irelend
13513 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13514 && (irel->r_addend & 0x1f) == 2
13515 && ((irel->r_offset - get_nds32_elf_blank_total
13516 (&relax_blank_list, irel->r_offset, 1))
13517 & 0x02) == 0))
13518 {
13519 /* Replace by ifcall9. */
13520 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13521 if (!insert_nds32_elf_blank_recalc_total
13522 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13523 return FALSE;
13524 irel_ptr->irel->r_info =
13525 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13526 R_NDS32_10IFCU_PCREL_RELA);
13527 }
13528 }
13529 irel_ptr = irel_ptr->next;
13530 }
13531
13532 /* Delete the redundant code. */
13533 if (relax_blank_list)
13534 {
13535 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13536 relax_blank_list);
13537 relax_blank_list = NULL;
13538 }
13539 }
13540 else
13541 {
13542 /* Global symbol. */
13543 while (irel_ptr)
13544 {
13545 if (irel_ptr->keep == 0 && irel_ptr->next)
13546 {
13547 /* The one can be replaced, and we have to check
13548 whether there is any alignment point in the region. */
13549 internal_relocs = _bfd_elf_link_read_relocs
13550 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13551 TRUE /* keep_memory */);
13552 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13553 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13554 irel_ptr->sec, &contents,
13555 TRUE))
13556 return FALSE;
13557
13558 irel = irel_ptr->irel;
13559 while (((irel_ptr->sec == irel_ptr->next->sec
13560 && irel_ptr->next->keep == 0
13561 && irel < irel_ptr->next->irel)
13562 || ((irel_ptr->sec != irel_ptr->next->sec
13563 || irel_ptr->next->keep == 1)
13564 && irel < irelend))
13565 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13566 && (irel->r_addend & 0x1f) == 2))
13567 irel++;
13568 if (irel >= irelend
13569 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13570 && (irel->r_addend & 0x1f) == 2
13571 && ((irel->r_offset
13572 - get_nds32_elf_blank_total (&relax_blank_list,
13573 irel->r_offset, 1)) & 0x02) == 0))
13574 {
13575 /* Replace by ifcall9. */
13576 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13577 if (!insert_nds32_elf_blank_recalc_total
13578 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13579 return FALSE;
13580
13581 /* Delete the redundant code, and clear the relocation. */
13582 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13583 irel_ptr->sec,
13584 relax_blank_list);
13585 irel_ptr->irel->r_info =
13586 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13587 R_NDS32_10IFCU_PCREL_RELA);
13588 relax_blank_list = NULL;
13589 }
13590 }
13591
13592 irel_ptr = irel_ptr->next;
13593 }
13594 }
13595 }
13596 ptr = ptr->next;
13597 }
13598
13599 return TRUE;
13600 }
13601
13602 /* Relocate ifcall. */
13603
13604 static bfd_boolean
13605 nds32_elf_ifc_reloc (void)
13606 {
13607 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13608 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13609 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13610 bfd_vma relocation, address;
13611 unsigned short insn16;
13612 bfd_byte *contents = NULL;
13613 static bfd_boolean done = FALSE;
13614
13615 if (done)
13616 return TRUE;
13617
13618 done = TRUE;
13619
13620 while (ptr)
13621 {
13622 /* Check the entry is enable ifcall. */
13623 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13624 {
13625 /* Get the reserve jump. */
13626 irel_ptr = ptr->irel_head;
13627 while (irel_ptr)
13628 {
13629 if (irel_ptr->keep == 1)
13630 {
13631 irel_keeper = irel_ptr;
13632 break;
13633 }
13634 irel_ptr = irel_ptr->next;
13635 }
13636
13637 irel_ptr = ptr->irel_head;
13638 if (ptr->h == NULL)
13639 {
13640 /* Local symbol. */
13641 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13642 &contents, TRUE))
13643 return FALSE;
13644
13645 while (irel_ptr)
13646 {
13647 if (irel_ptr->keep == 0
13648 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13649 {
13650 relocation = irel_keeper->irel->r_offset;
13651 relocation = relocation - irel_ptr->irel->r_offset;
13652 while (irel_keeper && relocation > 1022)
13653 {
13654 irel_keeper = irel_keeper->next;
13655 if (irel_keeper && irel_keeper->keep == 1)
13656 {
13657 relocation = irel_keeper->irel->r_offset;
13658 relocation = relocation - irel_ptr->irel->r_offset;
13659 }
13660 }
13661 if (relocation > 1022)
13662 {
13663 /* Double check. */
13664 irel_keeper = ptr->irel_head;
13665 while (irel_keeper)
13666 {
13667 if (irel_keeper->keep == 1)
13668 {
13669 relocation = irel_keeper->irel->r_offset;
13670 relocation = relocation - irel_ptr->irel->r_offset;
13671 }
13672 if (relocation <= 1022)
13673 break;
13674 irel_keeper = irel_keeper->next;
13675 }
13676 if (!irel_keeper)
13677 return FALSE;
13678 }
13679 irel_ptr->irel->r_info =
13680 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13681 R_NDS32_NONE);
13682 insn16 = INSN_IFCALL9 | (relocation >> 1);
13683 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13684 }
13685 irel_ptr = irel_ptr->next;
13686 }
13687 }
13688 else
13689 {
13690 /* Global symbol. */
13691 while (irel_ptr)
13692 {
13693 if (irel_ptr->keep == 0
13694 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13695 {
13696 /* Get the distance between ifcall and jump. */
13697 relocation = (irel_keeper->irel->r_offset
13698 + irel_keeper->sec->output_section->vma
13699 + irel_keeper->sec->output_offset);
13700 address = (irel_ptr->irel->r_offset
13701 + irel_ptr->sec->output_section->vma
13702 + irel_ptr->sec->output_offset);
13703 relocation = relocation - address;
13704
13705 /* The distance is over ragne, find callee again. */
13706 while (irel_keeper && relocation > 1022)
13707 {
13708 irel_keeper = irel_keeper->next;
13709 if (irel_keeper && irel_keeper->keep ==1)
13710 {
13711 relocation = (irel_keeper->irel->r_offset
13712 + irel_keeper->sec->output_section->vma
13713 + irel_keeper->sec->output_offset);
13714 relocation = relocation - address;
13715 }
13716 }
13717
13718 if (relocation > 1022)
13719 {
13720 /* Double check. */
13721 irel_keeper = ptr->irel_head;
13722 while (irel_keeper)
13723 {
13724 if (irel_keeper->keep == 1)
13725 {
13726
13727 relocation = (irel_keeper->irel->r_offset
13728 + irel_keeper->sec->output_section->vma
13729 + irel_keeper->sec->output_offset);
13730 relocation = relocation - address;
13731 }
13732 if (relocation <= 1022)
13733 break;
13734 irel_keeper = irel_keeper->next;
13735 }
13736 if (!irel_keeper)
13737 return FALSE;
13738 }
13739 if (!nds32_get_section_contents
13740 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
13741 return FALSE;
13742 insn16 = INSN_IFCALL9 | (relocation >> 1);
13743 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13744 irel_ptr->irel->r_info =
13745 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13746 R_NDS32_NONE);
13747 }
13748 irel_ptr =irel_ptr->next;
13749 }
13750 }
13751 }
13752 ptr = ptr->next;
13753 }
13754
13755 return TRUE;
13756 }
13757
13758 /* End of IFC relaxation. */
13759 \f
13760 /* EX9 Instruction Table Relaxation. */
13761
13762 /* Global hash list. */
13763 struct elf_link_hash_entry_list
13764 {
13765 struct elf_link_hash_entry *h;
13766 struct elf_link_hash_entry_list *next;
13767 };
13768
13769 /* Save different destination but same insn. */
13770 struct elf_link_hash_entry_mul_list
13771 {
13772 /* Global symbol times. */
13773 int times;
13774 /* Save relocation for each global symbol but useful?? */
13775 Elf_Internal_Rela *irel;
13776 /* For sethi, two sethi may have the same high-part but different low-parts. */
13777 Elf_Internal_Rela rel_backup;
13778 struct elf_link_hash_entry_list *h_list;
13779 struct elf_link_hash_entry_mul_list *next;
13780 };
13781
13782 /* Instruction hash table. */
13783 struct elf_nds32_code_hash_entry
13784 {
13785 struct bfd_hash_entry root;
13786 int times;
13787 /* For insn that can use relocation or constant ex: sethi. */
13788 int const_insn;
13789 asection *sec;
13790 struct elf_link_hash_entry_mul_list *m_list;
13791 /* Using r_addend. */
13792 Elf_Internal_Rela *irel;
13793 /* Using r_info. */
13794 Elf_Internal_Rela rel_backup;
13795 };
13796
13797 /* Instruction count list. */
13798 struct elf_nds32_insn_times_entry
13799 {
13800 const char *string;
13801 int times;
13802 int order;
13803 asection *sec;
13804 struct elf_link_hash_entry_mul_list *m_list;
13805 Elf_Internal_Rela *irel;
13806 Elf_Internal_Rela rel_backup;
13807 struct elf_nds32_insn_times_entry *next;
13808 };
13809
13810 /* J and JAL symbol list. */
13811 struct elf_nds32_symbol_entry
13812 {
13813 char *string;
13814 unsigned long insn;
13815 struct elf_nds32_symbol_entry *next;
13816 };
13817
13818 /* Relocation list. */
13819 struct elf_nds32_irel_entry
13820 {
13821 Elf_Internal_Rela *irel;
13822 struct elf_nds32_irel_entry *next;
13823 };
13824
13825 /* ex9.it insn need to be fixed. */
13826 struct elf_nds32_ex9_refix
13827 {
13828 Elf_Internal_Rela *irel;
13829 asection *sec;
13830 struct elf_link_hash_entry *h;
13831 int order;
13832 struct elf_nds32_ex9_refix *next;
13833 };
13834
13835 static struct bfd_hash_table ex9_code_table;
13836 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13837 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13838
13839 /* EX9 hash function. */
13840
13841 static struct bfd_hash_entry *
13842 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13843 struct bfd_hash_table *table,
13844 const char *string)
13845 {
13846 struct elf_nds32_code_hash_entry *ret;
13847
13848 /* Allocate the structure if it has not already been allocated by a
13849 subclass. */
13850 if (entry == NULL)
13851 {
13852 entry = (struct bfd_hash_entry *)
13853 bfd_hash_allocate (table, sizeof (*ret));
13854 if (entry == NULL)
13855 return entry;
13856 }
13857
13858 /* Call the allocation method of the superclass. */
13859 entry = bfd_hash_newfunc (entry, table, string);
13860 if (entry == NULL)
13861 return entry;
13862
13863 ret = (struct elf_nds32_code_hash_entry*) entry;
13864 ret->times = 0;
13865 ret->const_insn = 0;
13866 ret->m_list = NULL;
13867 ret->sec = NULL;
13868 ret->irel = NULL;
13869 return &ret->root;
13870 }
13871
13872 /* Insert ex9 entry
13873 this insert must be stable sorted by times. */
13874
13875 static void
13876 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13877 {
13878 struct elf_nds32_insn_times_entry *temp;
13879 struct elf_nds32_insn_times_entry *temp2;
13880
13881 if (ex9_insn_head == NULL)
13882 {
13883 ex9_insn_head = ptr;
13884 ptr->next = NULL;
13885 }
13886 else
13887 {
13888 temp = ex9_insn_head;
13889 temp2 = ex9_insn_head;
13890 while (temp->next &&
13891 (temp->next->times >= ptr->times
13892 || temp->times == -1))
13893 {
13894 if (temp->times == -1)
13895 temp2 = temp;
13896 temp = temp->next;
13897 }
13898 if (ptr->times > temp->times && temp->times != -1)
13899 {
13900 ptr->next = temp;
13901 if (temp2->times == -1)
13902 temp2->next = ptr;
13903 else
13904 ex9_insn_head = ptr;
13905 }
13906 else if (temp->next == NULL)
13907 {
13908 temp->next = ptr;
13909 ptr->next = NULL;
13910 }
13911 else
13912 {
13913 ptr->next = temp->next;
13914 temp->next = ptr;
13915 }
13916 }
13917 }
13918
13919 /* Examine each insn times in hash table.
13920 Handle multi-link hash entry.
13921
13922 TODO: This function doesn't assign so much info since it is fake. */
13923
13924 static int
13925 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13926 {
13927 struct elf_nds32_insn_times_entry *ptr;
13928 int times;
13929
13930 if (h->m_list == NULL)
13931 {
13932 /* Local symbol insn or insn without relocation. */
13933 if (h->times < 3)
13934 return TRUE;
13935
13936 ptr = (struct elf_nds32_insn_times_entry *)
13937 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13938 ptr->times = h->times;
13939 ptr->string = h->root.string;
13940 ptr->m_list = NULL;
13941 ptr->sec = h->sec;
13942 ptr->irel = h->irel;
13943 ptr->rel_backup = h->rel_backup;
13944 nds32_elf_ex9_insert_entry (ptr);
13945 }
13946 else
13947 {
13948 /* Global symbol insn. */
13949 /* Only sethi insn has multiple m_list. */
13950 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13951
13952 times = 0;
13953 while (m_list)
13954 {
13955 times += m_list->times;
13956 m_list = m_list->next;
13957 }
13958 if (times >= 3)
13959 {
13960 m_list = h->m_list;
13961 ptr = (struct elf_nds32_insn_times_entry *)
13962 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13963 ptr->times = times; /* Use the total times. */
13964 ptr->string = h->root.string;
13965 ptr->m_list = m_list;
13966 ptr->sec = h->sec;
13967 ptr->irel = m_list->irel;
13968 ptr->rel_backup = m_list->rel_backup;
13969 nds32_elf_ex9_insert_entry (ptr);
13970 }
13971 if (h->const_insn == 1)
13972 {
13973 /* sethi with constant value. */
13974 if (h->times < 3)
13975 return TRUE;
13976
13977 ptr = (struct elf_nds32_insn_times_entry *)
13978 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13979 ptr->times = h->times;
13980 ptr->string = h->root.string;
13981 ptr->m_list = NULL;
13982 ptr->sec = NULL;
13983 ptr->irel = NULL;
13984 ptr->rel_backup = h->rel_backup;
13985 nds32_elf_ex9_insert_entry (ptr);
13986 }
13987 }
13988 return TRUE;
13989 }
13990
13991 /* Count each insn times in hash table.
13992 Handle multi-link hash entry. */
13993
13994 static int
13995 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13996 {
13997 int reservation, times;
13998 unsigned long relocation, min_relocation;
13999 struct elf_nds32_insn_times_entry *ptr;
14000
14001 if (h->m_list == NULL)
14002 {
14003 /* Local symbol insn or insn without relocation. */
14004 if (h->times < 3)
14005 return TRUE;
14006 ptr = (struct elf_nds32_insn_times_entry *)
14007 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14008 ptr->times = h->times;
14009 ptr->string = h->root.string;
14010 ptr->m_list = NULL;
14011 ptr->sec = h->sec;
14012 ptr->irel = h->irel;
14013 ptr->rel_backup = h->rel_backup;
14014 nds32_elf_ex9_insert_entry (ptr);
14015 }
14016 else
14017 {
14018 /* Global symbol insn. */
14019 /* Only sethi insn has multiple m_list. */
14020 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14021
14022 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14023 && m_list->next != NULL)
14024 {
14025 /* Sethi insn has different symbol or addend but has same hi20. */
14026 times = 0;
14027 reservation = 1;
14028 relocation = 0;
14029 min_relocation = 0xffffffff;
14030 while (m_list)
14031 {
14032 /* Get the minimum sethi address
14033 and calculate how many entry the sethi-list have to use. */
14034 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14035 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14036 && (m_list->h_list->h->root.u.def.section != NULL
14037 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14038 {
14039 relocation = (m_list->h_list->h->root.u.def.value +
14040 m_list->h_list->h->root.u.def.section->output_section->vma +
14041 m_list->h_list->h->root.u.def.section->output_offset);
14042 relocation += m_list->irel->r_addend;
14043 }
14044 else
14045 relocation = 0;
14046 if (relocation < min_relocation)
14047 min_relocation = relocation;
14048 times += m_list->times;
14049 m_list = m_list->next;
14050 }
14051 if (min_relocation < ex9_relax_size)
14052 reservation = (min_relocation >> 12) + 1;
14053 else
14054 reservation = (min_relocation >> 12)
14055 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14056 if (reservation < (times / 3))
14057 {
14058 /* Efficient enough to use ex9. */
14059 int i;
14060
14061 for (i = reservation ; i > 0; i--)
14062 {
14063 /* Allocate number of reservation ex9 entry. */
14064 ptr = (struct elf_nds32_insn_times_entry *)
14065 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14066 ptr->times = h->m_list->times / reservation;
14067 ptr->string = h->root.string;
14068 ptr->m_list = h->m_list;
14069 ptr->sec = h->sec;
14070 ptr->irel = h->m_list->irel;
14071 ptr->rel_backup = h->m_list->rel_backup;
14072 nds32_elf_ex9_insert_entry (ptr);
14073 }
14074 }
14075 }
14076 else
14077 {
14078 /* Normal global symbol that means no different address symbol
14079 using same ex9 entry. */
14080 if (m_list->times >= 3)
14081 {
14082 ptr = (struct elf_nds32_insn_times_entry *)
14083 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14084 ptr->times = m_list->times;
14085 ptr->string = h->root.string;
14086 ptr->m_list = h->m_list;
14087 ptr->sec = h->sec;
14088 ptr->irel = h->m_list->irel;
14089 ptr->rel_backup = h->m_list->rel_backup;
14090 nds32_elf_ex9_insert_entry (ptr);
14091 }
14092 }
14093
14094 if (h->const_insn == 1)
14095 {
14096 /* sethi with constant value. */
14097 if (h->times < 3)
14098 return TRUE;
14099
14100 ptr = (struct elf_nds32_insn_times_entry *)
14101 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14102 ptr->times = h->times;
14103 ptr->string = h->root.string;
14104 ptr->m_list = NULL;
14105 ptr->sec = NULL;
14106 ptr->irel = NULL;
14107 ptr->rel_backup = h->rel_backup;
14108 nds32_elf_ex9_insert_entry (ptr);
14109 }
14110 }
14111
14112 return TRUE;
14113 }
14114
14115 /* Hash table traverse function. */
14116
14117 static void
14118 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14119 {
14120 unsigned int i;
14121
14122 ex9_code_table.frozen = 1;
14123 for (i = 0; i < ex9_code_table.size; i++)
14124 {
14125 struct bfd_hash_entry *p;
14126
14127 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14128 if (!func ((struct elf_nds32_code_hash_entry *) p))
14129 goto out;
14130 }
14131 out:
14132 ex9_code_table.frozen = 0;
14133 }
14134
14135
14136 /* Give order number to insn list. */
14137
14138 static void
14139 nds32_elf_order_insn_times (struct bfd_link_info *info)
14140 {
14141 struct elf_nds32_insn_times_entry *ex9_insn;
14142 struct elf_nds32_insn_times_entry *temp = NULL;
14143 struct elf_nds32_link_hash_table *table;
14144 int ex9_limit;
14145 int number = 0;
14146
14147 if (ex9_insn_head == NULL)
14148 return;
14149
14150 /* The max number of entries is 512. */
14151 ex9_insn = ex9_insn_head;
14152 table = nds32_elf_hash_table (info);
14153 ex9_limit = table->ex9_limit;
14154
14155 ex9_insn = ex9_insn_head;
14156
14157 while (ex9_insn != NULL && number < ex9_limit)
14158 {
14159 ex9_insn->order = number;
14160 number++;
14161 temp = ex9_insn;
14162 ex9_insn = ex9_insn->next;
14163 }
14164
14165 if (ex9_insn && temp)
14166 temp->next = NULL;
14167
14168 while (ex9_insn != NULL)
14169 {
14170 /* Free useless entry. */
14171 temp = ex9_insn;
14172 ex9_insn = ex9_insn->next;
14173 free (temp);
14174 }
14175 }
14176
14177 /* Build .ex9.itable section. */
14178
14179 static void
14180 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14181 {
14182 asection *table_sec;
14183 struct elf_nds32_insn_times_entry *ptr;
14184 bfd *it_abfd;
14185 int number = 0;
14186 bfd_byte *contents = NULL;
14187
14188 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14189 it_abfd = it_abfd->link.next)
14190 {
14191 /* Find the section .ex9.itable, and put all entries into it. */
14192 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14193 if (table_sec != NULL)
14194 {
14195 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
14196 return;
14197
14198 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14199 number++;
14200
14201 table_sec->size = number * 4;
14202
14203 if (number == 0)
14204 return;
14205
14206 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14207 number = 0;
14208 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14209 {
14210 long val;
14211
14212 val = strtol (ptr->string, NULL, 16);
14213 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14214 number++;
14215 }
14216 break;
14217 }
14218 }
14219 }
14220
14221 /* Get insn with regs according to relocation type. */
14222
14223 static void
14224 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
14225 uint32_t insn, uint32_t *insn_with_reg)
14226 {
14227 reloc_howto_type *howto = NULL;
14228
14229 if (irel == NULL
14230 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14231 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14232 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14233 {
14234 *insn_with_reg = insn;
14235 return;
14236 }
14237
14238 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14239 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14240 }
14241
14242 /* Mask number of address bits according to relocation. */
14243
14244 static unsigned long
14245 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14246 {
14247 reloc_howto_type *howto = NULL;
14248
14249 if (irel == NULL
14250 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14251 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14252 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14253 return 0;
14254
14255 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14256 return howto->dst_mask;
14257 }
14258
14259 static void
14260 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14261 struct elf_nds32_irel_entry *irel_ptr)
14262 {
14263 if (*irel_list == NULL)
14264 {
14265 *irel_list = irel_ptr;
14266 irel_ptr->next = NULL;
14267 }
14268 else
14269 {
14270 irel_ptr->next = *irel_list;
14271 *irel_list = irel_ptr;
14272 }
14273 }
14274
14275 static void
14276 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14277 struct elf_link_hash_entry *h, int order)
14278 {
14279 struct elf_nds32_ex9_refix *ptr;
14280
14281 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14282 ptr->sec = sec;
14283 ptr->irel = irel;
14284 ptr->h = h;
14285 ptr->order = order;
14286 ptr->next = NULL;
14287
14288 if (ex9_refix_head == NULL)
14289 ex9_refix_head = ptr;
14290 else
14291 {
14292 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14293
14294 while (temp->next != NULL)
14295 temp = temp->next;
14296 temp->next = ptr;
14297 }
14298 }
14299
14300 enum
14301 {
14302 DATA_EXIST = 1,
14303 CLEAN_PRE = 1 << 1,
14304 PUSH_PRE = 1 << 2
14305 };
14306
14307 /* Check relocation type if supporting for ex9. */
14308
14309 static int
14310 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14311 Elf_Internal_Rela **irel,
14312 Elf_Internal_Rela *irelend,
14313 nds32_elf_blank_t *relax_blank_list,
14314 asection *sec,bfd_vma *off,
14315 bfd_byte *contents)
14316 {
14317 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14318 bfd_boolean nested_ex9, nested_loop;
14319 bfd_boolean ex9_loop_aware;
14320 /* We use the highest 1 byte of result to record
14321 how many bytes location counter has to move. */
14322 int result = 0;
14323 Elf_Internal_Rela *irel_save = NULL;
14324 struct elf_nds32_link_hash_table *table;
14325
14326 table = nds32_elf_hash_table (info);
14327 ex9_loop_aware = table->ex9_loop_aware;
14328
14329 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14330 {
14331 switch (ELF32_R_TYPE ((*irel)->r_info))
14332 {
14333 case R_NDS32_RELAX_REGION_BEGIN:
14334 /* Ignore code block. */
14335 nested_ex9 = FALSE;
14336 nested_loop = FALSE;
14337 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14338 || (ex9_loop_aware
14339 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14340 {
14341 /* Check the region if loop or not. If it is true and
14342 ex9-loop-aware is true, ignore the region till region end. */
14343 /* To save the status for in .no_relax ex9 region and
14344 loop region to conform the block can do ex9 relaxation. */
14345 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14346 nested_loop = (ex9_loop_aware
14347 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14348 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14349 {
14350 (*irel)++;
14351 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14352 {
14353 /* There may be nested region. */
14354 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14355 nested_ex9 = TRUE;
14356 else if (ex9_loop_aware
14357 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14358 nested_loop = TRUE;
14359 }
14360 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14361 {
14362 /* The end of region. */
14363 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14364 nested_ex9 = FALSE;
14365 else if (ex9_loop_aware
14366 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14367 nested_loop = FALSE;
14368 }
14369 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14370 && ((*irel)->r_addend & 0x1f) == 2)
14371 {
14372 /* Alignment exist in the region. */
14373 result |= CLEAN_PRE;
14374 if (((*irel)->r_offset -
14375 get_nds32_elf_blank_total (&relax_blank_list,
14376 (*irel)->r_offset, 0)) & 0x02)
14377 result |= PUSH_PRE;
14378 }
14379 }
14380 if ((*irel) >= irelend)
14381 *off = sec->size;
14382 else
14383 *off = (*irel)->r_offset;
14384
14385 /* The final instruction in the region, regard this one as data to ignore it. */
14386 result |= DATA_EXIST;
14387 return result;
14388 }
14389 break;
14390
14391 case R_NDS32_LABEL:
14392 if (((*irel)->r_addend & 0x1f) == 2)
14393 {
14394 /* Check this point is align and decide to do ex9 or not. */
14395 result |= CLEAN_PRE;
14396 if (((*irel)->r_offset -
14397 get_nds32_elf_blank_total (&relax_blank_list,
14398 (*irel)->r_offset, 0)) & 0x02)
14399 result |= PUSH_PRE;
14400 }
14401 break;
14402 case R_NDS32_32_RELA:
14403 /* Data. */
14404 result |= (4 << 24);
14405 result |= DATA_EXIST;
14406 break;
14407 case R_NDS32_16_RELA:
14408 /* Data. */
14409 result |= (2 << 24);
14410 result |= DATA_EXIST;
14411 break;
14412 case R_NDS32_DATA:
14413 /* Data. */
14414 /* The least code alignment is 2. If the data is only one byte,
14415 we have to shift one more byte. */
14416 if ((*irel)->r_addend == 1)
14417 result |= ((*irel)->r_addend << 25) ;
14418 else
14419 result |= ((*irel)->r_addend << 24) ;
14420
14421 result |= DATA_EXIST;
14422 break;
14423
14424 case R_NDS32_25_PCREL_RELA:
14425 case R_NDS32_SDA16S3_RELA:
14426 case R_NDS32_SDA15S3_RELA:
14427 case R_NDS32_SDA15S3:
14428 case R_NDS32_SDA17S2_RELA:
14429 case R_NDS32_SDA15S2_RELA:
14430 case R_NDS32_SDA12S2_SP_RELA:
14431 case R_NDS32_SDA12S2_DP_RELA:
14432 case R_NDS32_SDA15S2:
14433 case R_NDS32_SDA18S1_RELA:
14434 case R_NDS32_SDA15S1_RELA:
14435 case R_NDS32_SDA15S1:
14436 case R_NDS32_SDA19S0_RELA:
14437 case R_NDS32_SDA15S0_RELA:
14438 case R_NDS32_SDA15S0:
14439 case R_NDS32_HI20_RELA:
14440 case R_NDS32_LO12S0_ORI_RELA:
14441 case R_NDS32_LO12S0_RELA:
14442 case R_NDS32_LO12S1_RELA:
14443 case R_NDS32_LO12S2_RELA:
14444 /* These relocation is supported ex9 relaxation currently. */
14445 /* We have to save the relocation for using later, since we have
14446 to check there is any alignment in the same address. */
14447 irel_save = *irel;
14448 break;
14449 default:
14450 /* Not support relocations. */
14451 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14452 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14453 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14454 {
14455 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14456 But we have to consider if there is any side-effect. */
14457 if (!(result & DATA_EXIST))
14458 {
14459 /* We have to confirm there is no data relocation in the
14460 same address. In general case, this won't happen. */
14461 /* We have to do ex9 conservative, for those relocation not
14462 considerd we ignore instruction. */
14463 result |= DATA_EXIST;
14464 if (*(contents + *off) & 0x80)
14465 result |= (2 << 24);
14466 else
14467 result |= (4 << 24);
14468 break;
14469 }
14470 }
14471 }
14472 if ((*irel) < irelend
14473 && ((*irel) + 1) < irelend
14474 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14475 /* There are relocations pointing to the same address, we have to
14476 check all of them. */
14477 (*irel)++;
14478 else
14479 {
14480 if (irel_save)
14481 *irel = irel_save;
14482 return result;
14483 }
14484 }
14485 return result;
14486 }
14487
14488 /* Replace with ex9 instruction. */
14489
14490 static bfd_boolean
14491 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14492 nds32_elf_blank_t **relax_blank_list,
14493 struct elf_nds32_irel_entry *pre_irel_ptr,
14494 struct elf_nds32_irel_entry **irel_list)
14495 {
14496 if (insn16 != 0)
14497 {
14498 /* Implement the ex9 relaxation. */
14499 bfd_putb16 (insn16, contents + pre_off);
14500 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14501 pre_off + 2, 2))
14502 return FALSE;
14503 if (pre_irel_ptr != NULL)
14504 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14505 }
14506 return TRUE;
14507 }
14508
14509 /* Replace input file instruction which is in ex9 itable. */
14510
14511 static bfd_boolean
14512 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14513 {
14514 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14515 bfd_byte *contents = NULL;
14516 bfd_vma off;
14517 uint16_t insn16, insn_ex9;
14518 /* `pre_*' are used to track previous instruction that can use ex9.it. */
14519 bfd_vma pre_off = -1;
14520 uint16_t pre_insn16 = 0;
14521 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14522 Elf_Internal_Rela *internal_relocs;
14523 Elf_Internal_Rela *irel;
14524 Elf_Internal_Rela *irelend;
14525 Elf_Internal_Shdr *symtab_hdr;
14526 Elf_Internal_Sym *isym = NULL;
14527 nds32_elf_blank_t *relax_blank_list = NULL;
14528 uint32_t insn = 0;
14529 uint32_t insn_with_reg = 0;
14530 uint32_t it_insn;
14531 uint32_t it_insn_with_reg;
14532 unsigned long r_symndx;
14533 asection *isec;
14534 struct elf_nds32_irel_entry *irel_list = NULL;
14535 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14536 int data_flag, do_replace, save_irel;
14537 struct elf_link_hash_entry_list *h_list;
14538
14539
14540 /* Load section instructions, relocations, and symbol table. */
14541 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
14542 || !nds32_get_local_syms (abfd, sec, &isym))
14543 return FALSE;
14544 internal_relocs =
14545 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14546 irelend = internal_relocs + sec->reloc_count;
14547 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14548
14549 off = 0;
14550
14551 /* Check if the object enable ex9. */
14552 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14553 irelend, R_NDS32_RELAX_ENTRY);
14554
14555 /* Check this section trigger ex9 relaxation. */
14556 if (irel == NULL
14557 || irel >= irelend
14558 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14559 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14560 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14561 return TRUE;
14562
14563 irel = internal_relocs;
14564
14565 /* Check alignment and fetch proper relocation. */
14566 while (off < sec->size)
14567 {
14568 struct elf_link_hash_entry *h = NULL;
14569 struct elf_nds32_irel_entry *irel_ptr = NULL;
14570
14571 /* Syn the instruction and the relocation. */
14572 while (irel != NULL && irel < irelend && irel->r_offset < off)
14573 irel++;
14574
14575 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14576 relax_blank_list, sec,
14577 &off, contents);
14578 if (data_flag & PUSH_PRE)
14579 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14580 &relax_blank_list, pre_irel_ptr,
14581 &irel_list))
14582 return FALSE;
14583
14584 if (data_flag & CLEAN_PRE)
14585 {
14586 pre_off = 0;
14587 pre_insn16 = 0;
14588 pre_irel_ptr = NULL;
14589 }
14590 if (data_flag & DATA_EXIST)
14591 {
14592 /* We save the move offset in the highest byte. */
14593 off += (data_flag >> 24);
14594 continue;
14595 }
14596
14597 if (*(contents + off) & 0x80)
14598 {
14599 /* 2-byte instruction. */
14600 off += 2;
14601 continue;
14602 }
14603
14604 /* Load the instruction and its opcode with register for comparing. */
14605 ex9_insn = ex9_insn_head;
14606 insn = bfd_getb32 (contents + off);
14607 insn_with_reg = 0;
14608 while (ex9_insn)
14609 {
14610 it_insn = strtol (ex9_insn->string, NULL, 16);
14611 it_insn_with_reg = 0;
14612 do_replace = 0;
14613 save_irel = 0;
14614
14615 if (irel != NULL && irel < irelend && irel->r_offset == off)
14616 {
14617 /* Insn with relocation. */
14618 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14619
14620 if (ex9_insn->irel != NULL)
14621 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14622 &it_insn_with_reg);
14623
14624 if (ex9_insn->irel != NULL
14625 && (ELF32_R_TYPE (irel->r_info) ==
14626 ELF32_R_TYPE (ex9_insn->irel->r_info))
14627 && (insn_with_reg == it_insn_with_reg))
14628 {
14629 /* Insn relocation and format is the same as table entry. */
14630
14631 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14632 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14633 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14634 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14635 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14636 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14637 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14638 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14639 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14640 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14641 && ELF32_R_TYPE (irel->r_info) <=
14642 R_NDS32_SDA12S2_SP_RELA)
14643 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14644 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14645 {
14646 r_symndx = ELF32_R_SYM (irel->r_info);
14647 if (r_symndx < symtab_hdr->sh_info)
14648 {
14649 /* Local symbol. */
14650 int shndx = isym[r_symndx].st_shndx;
14651
14652 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14653 if (ex9_insn->sec == isec
14654 && ex9_insn->irel->r_addend == irel->r_addend
14655 && ex9_insn->irel->r_info == irel->r_info)
14656 {
14657 do_replace = 1;
14658 save_irel = 1;
14659 }
14660 }
14661 else
14662 {
14663 /* External symbol. */
14664 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14665 if (ex9_insn->m_list)
14666 {
14667 h_list = ex9_insn->m_list->h_list;
14668 while (h_list)
14669 {
14670 if (h == h_list->h
14671 && (ex9_insn->m_list->irel->r_addend ==
14672 irel->r_addend))
14673 {
14674 do_replace = 1;
14675 save_irel = 1;
14676 break;
14677 }
14678 h_list = h_list->next;
14679 }
14680 }
14681 }
14682 }
14683 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14684 {
14685 r_symndx = ELF32_R_SYM (irel->r_info);
14686 if (r_symndx < symtab_hdr->sh_info)
14687 {
14688 /* Local symbols. Compare its base symbol and offset. */
14689 int shndx = isym[r_symndx].st_shndx;
14690
14691 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14692 if (ex9_insn->sec == isec
14693 && ex9_insn->irel->r_addend == irel->r_addend
14694 && ex9_insn->irel->r_info == irel->r_info)
14695 {
14696 do_replace = 1;
14697 save_irel = 1;
14698 }
14699 }
14700 else
14701 {
14702 /* External symbol. */
14703 struct elf_link_hash_entry_mul_list *m_list;
14704
14705 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14706 m_list = ex9_insn->m_list;
14707
14708 while (m_list)
14709 {
14710 h_list = m_list->h_list;
14711
14712 while (h_list)
14713 {
14714 if (h == h_list->h
14715 && (m_list->irel->r_addend
14716 == irel->r_addend))
14717 {
14718 do_replace = 1;
14719 save_irel = 1;
14720 if (ex9_insn->next
14721 && ex9_insn->m_list
14722 && ex9_insn->m_list == ex9_insn->next->m_list)
14723 {
14724 /* sethi multiple entry must be fixed */
14725 nds32_elf_ex9_insert_fix (sec, irel,
14726 h, ex9_insn->order);
14727 }
14728 break;
14729 }
14730 h_list = h_list->next;
14731 }
14732 m_list = m_list->next;
14733 }
14734 }
14735 }
14736 }
14737
14738 /* Import table: Check the symbol hash table and the
14739 jump target. Only R_NDS32_25_PCREL_RELA now. */
14740 else if (ex9_insn->times == -1
14741 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14742 {
14743 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14744 if (insn_with_reg == it_insn_with_reg)
14745 {
14746 char code[10];
14747 bfd_vma relocation;
14748
14749 r_symndx = ELF32_R_SYM (irel->r_info);
14750 if (r_symndx >= symtab_hdr->sh_info)
14751 {
14752 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14753 if ((h->root.type == bfd_link_hash_defined
14754 || h->root.type == bfd_link_hash_defweak)
14755 && h->root.u.def.section != NULL
14756 && h->root.u.def.section->output_section != NULL
14757 && h->root.u.def.section->gc_mark == 1
14758 && bfd_is_abs_section (h->root.u.def.section)
14759 && h->root.u.def.value > sec->size)
14760 {
14761 relocation = h->root.u.def.value +
14762 h->root.u.def.section->output_section->vma +
14763 h->root.u.def.section->output_offset;
14764 relocation += irel->r_addend;
14765 insn = insn_with_reg
14766 | ((relocation >> 1) & 0xffffff);
14767 snprintf (code, sizeof (code), "%08x", insn);
14768 if (strcmp (code, ex9_insn->string) == 0)
14769 {
14770 do_replace = 1;
14771 save_irel = 1;
14772 }
14773 }
14774 }
14775 }
14776 }
14777 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14778 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14779 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14780 {
14781 /* These relocations do not have to relocate contens, so it can
14782 be regard as instruction without relocation. */
14783 if (insn == it_insn && ex9_insn->irel == NULL)
14784 do_replace = 1;
14785 }
14786 }
14787 else
14788 {
14789 /* Instruction without relocation, we only
14790 have to compare their byte code. */
14791 if (insn == it_insn && ex9_insn->irel == NULL)
14792 do_replace = 1;
14793 }
14794
14795 /* Insntruction match so replacing the code here. */
14796 if (do_replace == 1)
14797 {
14798 /* There are two formats of ex9 instruction. */
14799 if (ex9_insn->order < 32)
14800 insn_ex9 = INSN_EX9_IT_2;
14801 else
14802 insn_ex9 = INSN_EX9_IT_1;
14803 insn16 = insn_ex9 | ex9_insn->order;
14804
14805 /* Insert ex9 instruction. */
14806 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14807 &relax_blank_list, pre_irel_ptr,
14808 &irel_list);
14809 pre_off = off;
14810 pre_insn16 = insn16;
14811
14812 if (save_irel)
14813 {
14814 /* For instuction with relocation do relax. */
14815 irel_ptr = (struct elf_nds32_irel_entry *)
14816 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14817 irel_ptr->irel = irel;
14818 irel_ptr->next = NULL;
14819 pre_irel_ptr = irel_ptr;
14820 }
14821 else
14822 pre_irel_ptr = NULL;
14823 break;
14824 }
14825 ex9_insn = ex9_insn->next;
14826 }
14827 off += 4;
14828 }
14829
14830 /* Insert ex9 instruction. */
14831 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14832 &relax_blank_list, pre_irel_ptr,
14833 &irel_list);
14834
14835 /* Delete the redundant code. */
14836 if (relax_blank_list)
14837 {
14838 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14839 relax_blank_list = NULL;
14840 }
14841
14842 /* Clear the relocation that is replaced by ex9. */
14843 while (irel_list)
14844 {
14845 struct elf_nds32_irel_entry *irel_ptr;
14846
14847 irel_ptr = irel_list;
14848 irel_list = irel_ptr->next;
14849 irel_ptr->irel->r_info =
14850 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14851 free (irel_ptr);
14852 }
14853 return TRUE;
14854 }
14855
14856 /* Initialize ex9 hash table. */
14857
14858 int
14859 nds32_elf_ex9_init (void)
14860 {
14861 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14862 sizeof (struct elf_nds32_code_hash_entry),
14863 1023))
14864 {
14865 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14866 return FALSE;
14867 }
14868 return TRUE;
14869 }
14870
14871 /* Predict how many bytes will be relaxed with ex9 and ifc. */
14872
14873 static void
14874 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14875 {
14876 struct elf_nds32_insn_times_entry *ex9_insn;
14877 struct elf_nds32_insn_times_entry *temp;
14878 int target_optimize;
14879 struct elf_nds32_link_hash_table *table;
14880
14881 if (ex9_insn_head == NULL)
14882 return;
14883
14884 table = nds32_elf_hash_table (info);
14885 target_optimize = table->target_optimize;
14886 ex9_insn = ex9_insn_head;
14887 while (ex9_insn)
14888 {
14889 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14890 temp = ex9_insn;
14891 ex9_insn = ex9_insn->next;
14892 free (temp);
14893 }
14894 ex9_insn_head = NULL;
14895
14896 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14897 {
14898 /* Examine ifc reduce size. */
14899 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14900 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14901 int size = 0;
14902
14903 while (ifc_ent)
14904 {
14905 if (ifc_ent->enable == 0)
14906 {
14907 /* Not ifc yet. */
14908 irel_ptr = ifc_ent->irel_head;
14909 while (irel_ptr)
14910 {
14911 size += 2;
14912 irel_ptr = irel_ptr->next;
14913 }
14914 }
14915 size -= 2;
14916 ifc_ent = ifc_ent->next;
14917 }
14918 ex9_relax_size += size;
14919 }
14920 }
14921
14922 /* Finish ex9 table. */
14923
14924 void
14925 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14926 {
14927 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14928 nds32_elf_order_insn_times (link_info);
14929 nds32_elf_ex9_total_relax (link_info);
14930 /* Traverse the hash table and count its times. */
14931 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14932 nds32_elf_order_insn_times (link_info);
14933 nds32_elf_ex9_build_itable (link_info);
14934 }
14935
14936 /* Relocate the entries in ex9 table. */
14937
14938 static bfd_vma
14939 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14940 struct bfd_link_info *link_info)
14941 {
14942 Elf_Internal_Sym *isym = NULL;
14943 bfd_vma relocation = -1;
14944 struct elf_link_hash_entry *h;
14945
14946 if (ptr->m_list != NULL)
14947 {
14948 /* Global symbol. */
14949 h = ptr->m_list->h_list->h;
14950 if ((h->root.type == bfd_link_hash_defined
14951 || h->root.type == bfd_link_hash_defweak)
14952 && h->root.u.def.section != NULL
14953 && h->root.u.def.section->output_section != NULL)
14954 {
14955
14956 relocation = h->root.u.def.value +
14957 h->root.u.def.section->output_section->vma +
14958 h->root.u.def.section->output_offset;
14959 relocation += ptr->m_list->irel->r_addend;
14960 }
14961 else
14962 relocation = 0;
14963 }
14964 else if (ptr->sec !=NULL)
14965 {
14966 /* Local symbol. */
14967 Elf_Internal_Sym sym;
14968 asection *sec = NULL;
14969 asection isec;
14970 asection *isec_ptr = &isec;
14971 Elf_Internal_Rela irel_backup = *(ptr->irel);
14972 asection *sec_backup = ptr->sec;
14973 bfd *abfd = ptr->sec->owner;
14974
14975 if (!nds32_get_local_syms (abfd, sec, &isym))
14976 return FALSE;
14977 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14978
14979 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14980 if (sec != NULL)
14981 *isec_ptr = *sec;
14982 sym = *isym;
14983
14984 /* The purpose is same as elf_link_input_bfd. */
14985 if (isec_ptr != NULL
14986 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14987 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14988 {
14989 sym.st_value =
14990 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14991 elf_section_data (isec_ptr)->sec_info,
14992 isym->st_value);
14993 }
14994 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14995 &ptr->sec, ptr->irel);
14996 if (ptr->irel != NULL)
14997 relocation += ptr->irel->r_addend;
14998
14999 /* Restore origin value since there may be some insntructions that
15000 could not be replaced with ex9.it. */
15001 *(ptr->irel) = irel_backup;
15002 ptr->sec = sec_backup;
15003 }
15004
15005 return relocation;
15006 }
15007
15008 /* Import ex9 table and build list. */
15009
15010 void
15011 nds32_elf_ex9_import_table (struct bfd_link_info *info)
15012 {
15013 int num = 0;
15014 bfd_byte *contents;
15015 unsigned long insn;
15016 FILE *ex9_import_file;
15017 int update_ex9_table;
15018 struct elf_nds32_link_hash_table *table;
15019
15020 table = nds32_elf_hash_table (info);
15021 ex9_import_file = table->ex9_import_file;
15022 rewind (table->ex9_import_file);
15023
15024 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15025
15026 /* Read instructions from the input file and build the list. */
15027 while (!feof (ex9_import_file))
15028 {
15029 char *code;
15030 struct elf_nds32_insn_times_entry *ptr;
15031 size_t nread;
15032
15033 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
15034 /* Ignore the final byte 0x0a. */
15035 if (nread < 1)
15036 break;
15037 insn = bfd_getb32 (contents);
15038 code = bfd_malloc (sizeof (char) * 9);
15039 snprintf (code, 9, "%08lx", insn);
15040 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15041 ptr->string = code;
15042 ptr->order = num;
15043 ptr->times = -1;
15044 ptr->sec = NULL;
15045 ptr->m_list = NULL;
15046 ptr->rel_backup.r_offset = 0;
15047 ptr->rel_backup.r_info = 0;
15048 ptr->rel_backup.r_addend = 0;
15049 ptr->irel = NULL;
15050 ptr->next = NULL;
15051 nds32_elf_ex9_insert_entry (ptr);
15052 num++;
15053 }
15054
15055 update_ex9_table = table->update_ex9_table;
15056 if (update_ex9_table == 1)
15057 {
15058 /* It has to consider of sethi need to use multiple page
15059 but it not be done yet. */
15060 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15061 nds32_elf_order_insn_times (info);
15062 }
15063 }
15064
15065 /* Export ex9 table. */
15066
15067 static void
15068 nds32_elf_ex9_export (struct bfd_link_info *info,
15069 bfd_byte *contents, int size)
15070 {
15071 FILE *ex9_export_file;
15072 struct elf_nds32_link_hash_table *table;
15073
15074 table = nds32_elf_hash_table (info);
15075 ex9_export_file = table->ex9_export_file;
15076 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15077 fclose (ex9_export_file);
15078 }
15079
15080 /* Adjust relocations of J and JAL in ex9.itable.
15081 Export ex9 table. */
15082
15083 static void
15084 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15085 {
15086 asection *table_sec = NULL;
15087 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15088 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15089 bfd *it_abfd;
15090 uint32_t insn, insn_with_reg, source_insn;
15091 bfd_byte *contents = NULL, *source_contents = NULL;
15092 int size = 0;
15093 bfd_vma gp;
15094 int shift, update_ex9_table, offset = 0;
15095 reloc_howto_type *howto = NULL;
15096 Elf_Internal_Rela rel_backup;
15097 unsigned short insn_ex9;
15098 struct elf_nds32_link_hash_table *table;
15099 FILE *ex9_export_file;
15100 static bfd_boolean done = FALSE;
15101
15102 if (done)
15103 return;
15104
15105 done = TRUE;
15106
15107 table = nds32_elf_hash_table (link_info);
15108 if (table)
15109 table->relax_status |= NDS32_RELAX_EX9_DONE;
15110
15111
15112 update_ex9_table = table->update_ex9_table;
15113 /* Generated ex9.itable exactly. */
15114 if (update_ex9_table == 0)
15115 {
15116 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
15117 it_abfd = it_abfd->link.next)
15118 {
15119 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15120 if (table_sec != NULL)
15121 break;
15122 }
15123
15124 if (table_sec != NULL)
15125 {
15126 bfd *output_bfd;
15127
15128 output_bfd = table_sec->output_section->owner;
15129 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15130 if (table_sec->size == 0)
15131 return;
15132
15133 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
15134 return;
15135 }
15136 }
15137 else
15138 {
15139 /* Set gp. */
15140 bfd *output_bfd;
15141
15142 output_bfd = link_info->input_bfds->sections->output_section->owner;
15143 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15144 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15145 }
15146
15147 /* Relocate instruction. */
15148 while (ex9_insn)
15149 {
15150 bfd_vma relocation, min_relocation = 0xffffffff;
15151
15152 insn = strtol (ex9_insn->string, NULL, 16);
15153 insn_with_reg = 0;
15154 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15155 {
15156 if (ex9_insn->m_list)
15157 rel_backup = ex9_insn->m_list->rel_backup;
15158 else
15159 rel_backup = ex9_insn->rel_backup;
15160
15161 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15162 howto =
15163 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15164 (rel_backup.r_info));
15165 shift = howto->rightshift;
15166 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15167 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15168 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15169 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15170 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15171 {
15172 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15173 insn =
15174 insn_with_reg | ((relocation >> shift) &
15175 nds32_elf_irel_mask (&rel_backup));
15176 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15177 }
15178 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15179 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15180 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15181 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15182 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15183 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15184 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15185 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15186 {
15187 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15188 insn =
15189 insn_with_reg | (((relocation - gp) >> shift) &
15190 nds32_elf_irel_mask (&rel_backup));
15191 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15192 }
15193 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15194 {
15195 /* Sethi may be multiple entry for one insn. */
15196 if (ex9_insn->next && ex9_insn->m_list
15197 && ex9_insn->m_list == ex9_insn->next->m_list)
15198 {
15199 struct elf_link_hash_entry_mul_list *m_list;
15200 struct elf_nds32_ex9_refix *fix_ptr;
15201 struct elf_link_hash_entry *h;
15202
15203 temp_ptr = ex9_insn;
15204 temp_ptr2 = ex9_insn;
15205 m_list = ex9_insn->m_list;
15206 while (m_list)
15207 {
15208 h = m_list->h_list->h;
15209 relocation = h->root.u.def.value +
15210 h->root.u.def.section->output_section->vma +
15211 h->root.u.def.section->output_offset;
15212 relocation += m_list->irel->r_addend;
15213
15214 if (relocation < min_relocation)
15215 min_relocation = relocation;
15216 m_list = m_list->next;
15217 }
15218 relocation = min_relocation;
15219
15220 /* Put insntruction into ex9 table. */
15221 insn = insn_with_reg
15222 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15223 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15224 relocation = relocation + 0x1000; /* hi20 */
15225
15226 while (ex9_insn->next && ex9_insn->m_list
15227 && ex9_insn->m_list == ex9_insn->next->m_list)
15228 {
15229 /* Multiple sethi. */
15230 ex9_insn = ex9_insn->next;
15231 size += 4;
15232 insn =
15233 insn_with_reg | ((relocation >> shift) &
15234 nds32_elf_irel_mask (&rel_backup));
15235 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15236 relocation = relocation + 0x1000; /* hi20 */
15237 }
15238
15239 fix_ptr = ex9_refix_head;
15240 while (fix_ptr)
15241 {
15242 /* Fix ex9 insn. */
15243 /* temp_ptr2 points to the head of multiple sethi. */
15244 temp_ptr = temp_ptr2;
15245 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15246 {
15247 fix_ptr = fix_ptr->next;
15248 }
15249 if (fix_ptr->order != temp_ptr->order)
15250 break;
15251
15252 /* Set source insn. */
15253 relocation =
15254 fix_ptr->h->root.u.def.value +
15255 fix_ptr->h->root.u.def.section->output_section->vma +
15256 fix_ptr->h->root.u.def.section->output_offset;
15257 relocation += fix_ptr->irel->r_addend;
15258 /* sethi imm is imm20s. */
15259 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15260
15261 while (temp_ptr)
15262 {
15263 /* Match entry and source code. */
15264 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15265 if (insn == source_insn)
15266 {
15267 /* Fix the ex9 insn. */
15268 if (temp_ptr->order != fix_ptr->order)
15269 {
15270 if (!nds32_get_section_contents
15271 (fix_ptr->sec->owner, fix_ptr->sec,
15272 &source_contents, TRUE))
15273 (*_bfd_error_handler)
15274 (_("Linker: error cannot fixed ex9 relocation \n"));
15275 if (temp_ptr->order < 32)
15276 insn_ex9 = INSN_EX9_IT_2;
15277 else
15278 insn_ex9 = INSN_EX9_IT_1;
15279 insn_ex9 = insn_ex9 | temp_ptr->order;
15280 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15281 }
15282 break;
15283 }
15284 else
15285 {
15286 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15287 (*_bfd_error_handler)
15288 (_("Linker: error cannot fixed ex9 relocation \n"));
15289 else
15290 temp_ptr = temp_ptr->next;
15291 }
15292 }
15293 fix_ptr = fix_ptr->next;
15294 }
15295 }
15296 else
15297 {
15298 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15299 insn = insn_with_reg
15300 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15301 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15302 }
15303 }
15304 }
15305 else
15306 {
15307 /* Insn without relocation does not have to be fixed
15308 if need to update export table. */
15309 if (update_ex9_table == 1)
15310 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15311 }
15312 ex9_insn = ex9_insn->next;
15313 size += 4;
15314 }
15315
15316 ex9_export_file = table->ex9_export_file;
15317 if (ex9_export_file != NULL)
15318 nds32_elf_ex9_export (link_info, contents, table_sec->size);
15319 else if (update_ex9_table == 1)
15320 {
15321 table->ex9_export_file = table->ex9_import_file;
15322 rewind (table->ex9_export_file);
15323 nds32_elf_ex9_export (link_info, contents, size);
15324 }
15325 }
15326
15327 /* Generate ex9 hash table. */
15328
15329 static bfd_boolean
15330 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15331 struct bfd_link_info *link_info)
15332 {
15333 Elf_Internal_Rela *internal_relocs;
15334 Elf_Internal_Rela *irelend;
15335 Elf_Internal_Rela *irel;
15336 Elf_Internal_Rela *jrel;
15337 Elf_Internal_Rela rel_backup;
15338 Elf_Internal_Shdr *symtab_hdr;
15339 Elf_Internal_Sym *isym = NULL;
15340 asection *isec;
15341 struct elf_link_hash_entry **sym_hashes;
15342 bfd_byte *contents = NULL;
15343 bfd_vma off = 0;
15344 unsigned long r_symndx;
15345 uint32_t insn, insn_with_reg;
15346 struct elf_link_hash_entry *h;
15347 int data_flag, shift, align;
15348 bfd_vma relocation;
15349 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15350 reloc_howto_type *howto = NULL;
15351
15352 sym_hashes = elf_sym_hashes (abfd);
15353 /* Load section instructions, relocations, and symbol table. */
15354 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
15355 return FALSE;
15356
15357 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15358 TRUE /* keep_memory */);
15359 irelend = internal_relocs + sec->reloc_count;
15360 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15361 if (!nds32_get_local_syms (abfd, sec, &isym))
15362 return FALSE;
15363
15364 /* Check the object if enable ex9. */
15365 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15366 R_NDS32_RELAX_ENTRY);
15367
15368 /* Check this section trigger ex9 relaxation. */
15369 if (irel == NULL
15370 || irel >= irelend
15371 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15372 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15373 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15374 return TRUE;
15375
15376 irel = internal_relocs;
15377
15378 /* Push each insn into hash table. */
15379 while (off < sec->size)
15380 {
15381 char code[10];
15382 struct elf_nds32_code_hash_entry *entry;
15383
15384 while (irel != NULL && irel < irelend && irel->r_offset < off)
15385 irel++;
15386
15387 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15388 NULL, sec, &off, contents);
15389 if (data_flag & DATA_EXIST)
15390 {
15391 /* We save the move offset in the highest byte. */
15392 off += (data_flag >> 24);
15393 continue;
15394 }
15395
15396 if (*(contents + off) & 0x80)
15397 {
15398 off += 2;
15399 }
15400 else
15401 {
15402 h = NULL;
15403 isec = NULL;
15404 jrel = NULL;
15405 rel_backup.r_info = 0;
15406 rel_backup.r_offset = 0;
15407 rel_backup.r_addend = 0;
15408 /* Load the instruction and its opcode with register for comparing. */
15409 insn = bfd_getb32 (contents + off);
15410 insn_with_reg = 0;
15411 if (irel != NULL && irel < irelend && irel->r_offset == off)
15412 {
15413 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15414 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15415 shift = howto->rightshift;
15416 align = (1 << shift) - 1;
15417 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15418 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15419 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15420 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15421 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15422 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15423 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15424 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15425 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15426 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15427 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15428 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15429 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15430 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15431 {
15432 r_symndx = ELF32_R_SYM (irel->r_info);
15433 jrel = irel;
15434 rel_backup = *irel;
15435 if (r_symndx < symtab_hdr->sh_info)
15436 {
15437 /* Local symbol. */
15438 int shndx = isym[r_symndx].st_shndx;
15439
15440 bfd_vma st_value = (isym + r_symndx)->st_value;
15441 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15442 relocation = (isec->output_section->vma + isec->output_offset
15443 + st_value + irel->r_addend);
15444 }
15445 else
15446 {
15447 /* External symbol. */
15448 bfd_boolean warned ATTRIBUTE_UNUSED;
15449 bfd_boolean ignored ATTRIBUTE_UNUSED;
15450 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15451 asection *sym_sec;
15452
15453 /* Maybe there is a better way to get h and relocation */
15454 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15455 r_symndx, symtab_hdr, sym_hashes,
15456 h, sym_sec, relocation,
15457 unresolved_reloc, warned, ignored);
15458 relocation += irel->r_addend;
15459 if ((h->root.type != bfd_link_hash_defined
15460 && h->root.type != bfd_link_hash_defweak)
15461 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15462 {
15463 off += 4;
15464 continue;
15465 }
15466 }
15467
15468 /* Check for gp relative instruction alignment. */
15469 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15470 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15471 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15472 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15473 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15474 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15475 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15476 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15477 {
15478 bfd_vma gp;
15479 bfd *output_bfd = sec->output_section->owner;
15480 bfd_reloc_status_type r;
15481
15482 /* If the symbol is in the abs section, the out_bfd will be null.
15483 This happens when the relocation has a symbol@GOTOFF. */
15484 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15485 if (r != bfd_reloc_ok)
15486 {
15487 off += 4;
15488 continue;
15489 }
15490
15491 relocation -= gp;
15492
15493 /* Make sure alignment is correct. */
15494 if (relocation & align)
15495 {
15496 /* Incorrect alignment. */
15497 (*_bfd_error_handler)
15498 (_("%s: warning: unaligned small data access. "
15499 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15500 bfd_get_filename (abfd), irel->r_offset,
15501 irel->r_info, irel->r_addend, relocation, align);
15502 off += 4;
15503 continue;
15504 }
15505 }
15506
15507 insn = insn_with_reg
15508 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15509 }
15510 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15511 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15512 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15513 {
15514 /* These relocations do not have to relocate contens, so it can
15515 be regard as instruction without relocation. */
15516 }
15517 else
15518 {
15519 off += 4;
15520 continue;
15521 }
15522 }
15523
15524 snprintf (code, sizeof (code), "%08x", insn);
15525 /* Copy "code". */
15526 entry = (struct elf_nds32_code_hash_entry*)
15527 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15528 if (entry == NULL)
15529 {
15530 (*_bfd_error_handler)
15531 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15532 return FALSE;
15533 }
15534 if (h)
15535 {
15536 if (h->root.type == bfd_link_hash_undefined)
15537 return TRUE;
15538 /* Global symbol. */
15539 /* In order to do sethi with different symbol but same value. */
15540 if (entry->m_list == NULL)
15541 {
15542 struct elf_link_hash_entry_mul_list *m_list_new;
15543 struct elf_link_hash_entry_list *h_list_new;
15544
15545 m_list_new = (struct elf_link_hash_entry_mul_list *)
15546 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15547 h_list_new = (struct elf_link_hash_entry_list *)
15548 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15549 entry->m_list = m_list_new;
15550 m_list_new->h_list = h_list_new;
15551 m_list_new->rel_backup = rel_backup;
15552 m_list_new->times = 1;
15553 m_list_new->irel = jrel;
15554 m_list_new->next = NULL;
15555 h_list_new->h = h;
15556 h_list_new->next = NULL;
15557 }
15558 else
15559 {
15560 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15561 struct elf_link_hash_entry_list *h_list;
15562
15563 while (m_list)
15564 {
15565 /* Build the different symbols that point to the same address. */
15566 h_list = m_list->h_list;
15567 if (h_list->h->root.u.def.value == h->root.u.def.value
15568 && h_list->h->root.u.def.section->output_section->vma
15569 == h->root.u.def.section->output_section->vma
15570 && h_list->h->root.u.def.section->output_offset
15571 == h->root.u.def.section->output_offset
15572 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15573 {
15574 m_list->times++;
15575 m_list->irel = jrel;
15576 while (h_list->h != h && h_list->next)
15577 h_list = h_list->next;
15578 if (h_list->h != h)
15579 {
15580 struct elf_link_hash_entry_list *h_list_new;
15581
15582 h_list_new = (struct elf_link_hash_entry_list *)
15583 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15584 h_list->next = h_list_new;
15585 h_list_new->h = h;
15586 h_list_new->next = NULL;
15587 }
15588 break;
15589 }
15590 /* The sethi case may have different address but the
15591 hi20 is the same. */
15592 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15593 && m_list->next == NULL)
15594 {
15595 struct elf_link_hash_entry_mul_list *m_list_new;
15596 struct elf_link_hash_entry_list *h_list_new;
15597
15598 m_list_new = (struct elf_link_hash_entry_mul_list *)
15599 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15600 h_list_new = (struct elf_link_hash_entry_list *)
15601 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15602 m_list->next = m_list_new;
15603 m_list_new->h_list = h_list_new;
15604 m_list_new->rel_backup = rel_backup;
15605 m_list_new->times = 1;
15606 m_list_new->irel = jrel;
15607 m_list_new->next = NULL;
15608 h_list_new->h = h;
15609 h_list_new->next = NULL;
15610 break;
15611 }
15612 m_list = m_list->next;
15613 }
15614 if (!m_list)
15615 {
15616 off += 4;
15617 continue;
15618 }
15619 }
15620 }
15621 else
15622 {
15623 /* Local symbol and insn without relocation*/
15624 entry->times++;
15625 entry->rel_backup = rel_backup;
15626 }
15627
15628 /* Use in sethi insn with constant and global symbol in same format. */
15629 if (!jrel)
15630 entry->const_insn = 1;
15631 else
15632 entry->irel = jrel;
15633 entry->sec = isec;
15634 off += 4;
15635 }
15636 }
15637 return TRUE;
15638 }
15639
15640 /* Set the _ITB_BASE, and point it to ex9 table. */
15641
15642 bfd_boolean
15643 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15644 {
15645 bfd *abfd;
15646 asection *sec;
15647 bfd *output_bfd = NULL;
15648 struct bfd_link_hash_entry *bh = NULL;
15649
15650 if (is_ITB_BASE_set == 1)
15651 return TRUE;
15652
15653 is_ITB_BASE_set = 1;
15654
15655 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15656
15657 if (bh && (bh->type == bfd_link_hash_defined
15658 || bh->type == bfd_link_hash_defweak))
15659 return TRUE;
15660
15661 for (abfd = link_info->input_bfds; abfd != NULL;
15662 abfd = abfd->link.next)
15663 {
15664 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15665 if (sec != NULL)
15666 {
15667 output_bfd = sec->output_section->owner;
15668 break;
15669 }
15670 }
15671 if (output_bfd == NULL)
15672 {
15673 output_bfd = link_info->output_bfd;
15674 if (output_bfd->sections == NULL)
15675 return TRUE;
15676 else
15677 sec = bfd_abs_section_ptr;
15678 }
15679 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15680 FALSE, FALSE, TRUE);
15681 return (_bfd_generic_link_add_one_symbol
15682 (link_info, output_bfd, "_ITB_BASE_",
15683 BSF_GLOBAL | BSF_WEAK, sec, 0,
15684 (const char *) NULL, FALSE, get_elf_backend_data
15685 (output_bfd)->collect, &bh));
15686 } /* End EX9.IT */
15687 \f
15688
15689 #define ELF_ARCH bfd_arch_nds32
15690 #define ELF_MACHINE_CODE EM_NDS32
15691 #define ELF_MAXPAGESIZE 0x1000
15692 #define ELF_TARGET_ID NDS32_ELF_DATA
15693
15694 #define TARGET_BIG_SYM nds32_elf32_be_vec
15695 #define TARGET_BIG_NAME "elf32-nds32be"
15696 #define TARGET_LITTLE_SYM nds32_elf32_le_vec
15697 #define TARGET_LITTLE_NAME "elf32-nds32le"
15698
15699 #define elf_info_to_howto nds32_info_to_howto
15700 #define elf_info_to_howto_rel nds32_info_to_howto_rel
15701
15702 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15703 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15704 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15705 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15706 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15707
15708 #define bfd_elf32_mkobject nds32_elf_mkobject
15709 #define elf_backend_action_discarded nds32_elf_action_discarded
15710 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15711 #define elf_backend_check_relocs nds32_elf_check_relocs
15712 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15713 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15714 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15715 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15716 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15717 #define elf_backend_relocate_section nds32_elf_relocate_section
15718 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15719 #define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15720 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15721 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15722 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15723 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15724 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15725 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15726 #define elf_backend_object_p nds32_elf_object_p
15727 #define elf_backend_final_write_processing nds32_elf_final_write_processing
15728 #define elf_backend_special_sections nds32_elf_special_sections
15729 #define bfd_elf32_bfd_get_relocated_section_contents \
15730 nds32_elf_get_relocated_section_contents
15731
15732 #define elf_backend_can_gc_sections 1
15733 #define elf_backend_can_refcount 1
15734 #define elf_backend_want_got_plt 1
15735 #define elf_backend_plt_readonly 1
15736 #define elf_backend_want_plt_sym 0
15737 #define elf_backend_got_header_size 12
15738 #define elf_backend_may_use_rel_p 1
15739 #define elf_backend_default_use_rela_p 1
15740 #define elf_backend_may_use_rela_p 1
15741
15742 #include "elf32-target.h"
15743
15744 #undef ELF_MAXPAGESIZE
15745 #define ELF_MAXPAGESIZE 0x2000
15746
15747 #undef TARGET_BIG_SYM
15748 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec
15749 #undef TARGET_BIG_NAME
15750 #define TARGET_BIG_NAME "elf32-nds32be-linux"
15751 #undef TARGET_LITTLE_SYM
15752 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
15753 #undef TARGET_LITTLE_NAME
15754 #define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15755 #undef elf32_bed
15756 #define elf32_bed elf32_nds32_lin_bed
15757
15758 #include "elf32-target.h"
GDB Binutils - Deliverables
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