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dyn_relocs tidy
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2017 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36
37 /* Relocation HOWTO functions. */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55 /* Helper functions for HOWTO. */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59
60 /* Nds32 helper functions. */
61 static bfd_vma calculate_memory_address
62 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63 static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
65 static bfd_boolean nds32_elf_ex9_build_hash_table
66 (bfd *, asection *, struct bfd_link_info *);
67 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
68 static void nds32_elf_ex9_import_table (struct bfd_link_info *);
69 static void nds32_elf_ex9_finish (struct bfd_link_info *);
70 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
71 static void nds32_elf_get_insn_with_reg
72 (Elf_Internal_Rela *, uint32_t, uint32_t *);
73 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
74 Elf_Internal_Sym **);
75 static bfd_boolean nds32_elf_ex9_replace_instruction
76 (struct bfd_link_info *, bfd *, asection *);
77 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
78 asection *);
79 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
80 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
81 static bfd_boolean nds32_elf_ifc_reloc (void);
82 static bfd_boolean nds32_relax_fp_as_gp
83 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
84 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
85 Elf_Internal_Sym *isymbuf);
86 static bfd_boolean nds32_fag_remove_unused_fpbase
87 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
88 Elf_Internal_Rela *irelend);
89
90 enum
91 {
92 MACH_V1 = bfd_mach_n1h,
93 MACH_V2 = bfd_mach_n1h_v2,
94 MACH_V3 = bfd_mach_n1h_v3,
95 MACH_V3M = bfd_mach_n1h_v3m
96 };
97
98 #define MIN(a, b) ((a) > (b) ? (b) : (a))
99 #define MAX(a, b) ((a) > (b) ? (a) : (b))
100
101 /* The name of the dynamic interpreter. This is put in the .interp
102 section. */
103 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
104
105 /* The nop opcode we use. */
106 #define NDS32_NOP32 0x40000009
107 #define NDS32_NOP16 0x9200
108
109 /* The size in bytes of an entry in the procedure linkage table. */
110 #define PLT_ENTRY_SIZE 24
111 #define PLT_HEADER_SIZE 24
112
113 /* The first entry in a procedure linkage table are reserved,
114 and the initial contents are unimportant (we zero them out).
115 Subsequent entries look like this. */
116 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
117 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
118 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
119 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
120 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
121
122 /* $ta is change to $r15 (from $r25). */
123 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
124 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
125 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
126 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
127 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
128 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
129
130 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
131 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
132 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
133 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
134 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
135
136 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
137 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
138 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
139 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
140 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
141 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
142
143 /* These are macros used to get the relocation accurate value. */
144 #define ACCURATE_8BIT_S1 (0x100)
145 #define ACCURATE_U9BIT_S1 (0x400)
146 #define ACCURATE_12BIT_S1 (0x2000)
147 #define ACCURATE_14BIT_S1 (0x4000)
148 #define ACCURATE_19BIT (0x40000)
149
150 /* These are macros used to get the relocation conservative value. */
151 #define CONSERVATIVE_8BIT_S1 (0x100 - 4)
152 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
153 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
154 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
155 /* These must be more conservative because the address may be in
156 different segment. */
157 #define CONSERVATIVE_15BIT (0x4000 - 0x1000)
158 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
159 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
160 #define CONSERVATIVE_19BIT (0x40000 - 0x1000)
161 #define CONSERVATIVE_20BIT (0x80000 - 0x1000)
162
163 /* Size of small data/bss sections, used to calculate SDA_BASE. */
164 static long got_size = 0;
165 static int is_SDA_BASE_set = 0;
166 static int is_ITB_BASE_set = 0;
167
168 /* Convert ELF-VER in eflags to string for debugging purpose. */
169 static const char *const nds32_elfver_strtab[] =
170 {
171 "ELF-1.2",
172 "ELF-1.3",
173 "ELF-1.4",
174 };
175
176 /* The nds32 linker needs to keep track of the number of relocs that it
177 decides to copy in check_relocs for each symbol. This is so that
178 it can discard PC relative relocs if it doesn't need them when
179 linking with -Bsymbolic. We store the information in a field
180 extending the regular ELF linker hash table. */
181
182 /* This structure keeps track of the number of PC relative relocs we
183 have copied for a given symbol. */
184
185 struct elf_nds32_pcrel_relocs_copied
186 {
187 /* Next section. */
188 struct elf_nds32_pcrel_relocs_copied *next;
189 /* A section in dynobj. */
190 asection *section;
191 /* Number of relocs copied in this section. */
192 bfd_size_type count;
193 };
194
195 /* Nds32 ELF linker hash entry. */
196
197 struct elf_nds32_link_hash_entry
198 {
199 struct elf_link_hash_entry root;
200
201 /* Track dynamic relocs copied for this symbol. */
202 struct elf_dyn_relocs *dyn_relocs;
203
204 /* For checking relocation type. */
205 #define GOT_UNKNOWN 0
206 #define GOT_NORMAL 1
207 #define GOT_TLS_IE 2
208 unsigned int tls_type;
209 };
210
211 /* Get the nds32 ELF linker hash table from a link_info structure. */
212
213 #define FP_BASE_NAME "_FP_BASE_"
214 static int check_start_export_sym = 0;
215 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
216
217 /* The offset for executable tls relaxation. */
218 #define TP_OFFSET 0x0
219
220 struct elf_nds32_obj_tdata
221 {
222 struct elf_obj_tdata root;
223
224 /* tls_type for each local got entry. */
225 char *local_got_tls_type;
226 };
227
228 #define elf_nds32_tdata(bfd) \
229 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
230
231 #define elf32_nds32_local_got_tls_type(bfd) \
232 (elf_nds32_tdata (bfd)->local_got_tls_type)
233
234 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
235
236 static bfd_boolean
237 nds32_elf_mkobject (bfd *abfd)
238 {
239 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
240 NDS32_ELF_DATA);
241 }
242
243 /* Relocations used for relocation. */
244 static reloc_howto_type nds32_elf_howto_table[] =
245 {
246 /* This reloc does nothing. */
247 HOWTO (R_NDS32_NONE, /* type */
248 0, /* rightshift */
249 3, /* size (0 = byte, 1 = short, 2 = long) */
250 0, /* bitsize */
251 FALSE, /* pc_relative */
252 0, /* bitpos */
253 complain_overflow_dont, /* complain_on_overflow */
254 bfd_elf_generic_reloc, /* special_function */
255 "R_NDS32_NONE", /* name */
256 FALSE, /* partial_inplace */
257 0, /* src_mask */
258 0, /* dst_mask */
259 FALSE), /* pcrel_offset */
260
261 /* A 16 bit absolute relocation. */
262 HOWTO (R_NDS32_16, /* type */
263 0, /* rightshift */
264 1, /* size (0 = byte, 1 = short, 2 = long) */
265 16, /* bitsize */
266 FALSE, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_bitfield, /* complain_on_overflow */
269 nds32_elf_generic_reloc, /* special_function */
270 "R_NDS32_16", /* name */
271 FALSE, /* partial_inplace */
272 0xffff, /* src_mask */
273 0xffff, /* dst_mask */
274 FALSE), /* pcrel_offset */
275
276 /* A 32 bit absolute relocation. */
277 HOWTO (R_NDS32_32, /* type */
278 0, /* rightshift */
279 2, /* size (0 = byte, 1 = short, 2 = long) */
280 32, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_bitfield, /* complain_on_overflow */
284 nds32_elf_generic_reloc, /* special_function */
285 "R_NDS32_32", /* name */
286 FALSE, /* partial_inplace */
287 0xffffffff, /* src_mask */
288 0xffffffff, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* A 20 bit address. */
292 HOWTO (R_NDS32_20, /* type */
293 0, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 20, /* bitsize */
296 FALSE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_unsigned, /* complain_on_overflow */
299 nds32_elf_generic_reloc, /* special_function */
300 "R_NDS32_20", /* name */
301 FALSE, /* partial_inplace */
302 0xfffff, /* src_mask */
303 0xfffff, /* dst_mask */
304 FALSE), /* pcrel_offset */
305
306 /* An PC Relative 9-bit relocation, shifted by 2.
307 This reloc is complicated because relocations are relative to pc & -4.
308 i.e. branches in the right insn slot use the address of the left insn
309 slot for pc. */
310 /* ??? It's not clear whether this should have partial_inplace set or not.
311 Branch relaxing in the assembler can store the addend in the insn,
312 and if bfd_install_relocation gets called the addend may get added
313 again. */
314 HOWTO (R_NDS32_9_PCREL, /* type */
315 1, /* rightshift */
316 1, /* size (0 = byte, 1 = short, 2 = long) */
317 8, /* bitsize */
318 TRUE, /* pc_relative */
319 0, /* bitpos */
320 complain_overflow_signed, /* complain_on_overflow */
321 nds32_elf_9_pcrel_reloc, /* special_function */
322 "R_NDS32_9_PCREL", /* name */
323 FALSE, /* partial_inplace */
324 0xff, /* src_mask */
325 0xff, /* dst_mask */
326 TRUE), /* pcrel_offset */
327
328 /* A relative 15 bit relocation, right shifted by 1. */
329 HOWTO (R_NDS32_15_PCREL, /* type */
330 1, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 14, /* bitsize */
333 TRUE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_signed, /* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_NDS32_15_PCREL", /* name */
338 FALSE, /* partial_inplace */
339 0x3fff, /* src_mask */
340 0x3fff, /* dst_mask */
341 TRUE), /* pcrel_offset */
342
343 /* A relative 17 bit relocation, right shifted by 1. */
344 HOWTO (R_NDS32_17_PCREL, /* type */
345 1, /* rightshift */
346 2, /* size (0 = byte, 1 = short, 2 = long) */
347 16, /* bitsize */
348 TRUE, /* pc_relative */
349 0, /* bitpos */
350 complain_overflow_signed, /* complain_on_overflow */
351 bfd_elf_generic_reloc, /* special_function */
352 "R_NDS32_17_PCREL", /* name */
353 FALSE, /* partial_inplace */
354 0xffff, /* src_mask */
355 0xffff, /* dst_mask */
356 TRUE), /* pcrel_offset */
357
358 /* A relative 25 bit relocation, right shifted by 1. */
359 /* ??? It's not clear whether this should have partial_inplace set or not.
360 Branch relaxing in the assembler can store the addend in the insn,
361 and if bfd_install_relocation gets called the addend may get added
362 again. */
363 HOWTO (R_NDS32_25_PCREL, /* type */
364 1, /* rightshift */
365 2, /* size (0 = byte, 1 = short, 2 = long) */
366 24, /* bitsize */
367 TRUE, /* pc_relative */
368 0, /* bitpos */
369 complain_overflow_signed, /* complain_on_overflow */
370 bfd_elf_generic_reloc, /* special_function */
371 "R_NDS32_25_PCREL", /* name */
372 FALSE, /* partial_inplace */
373 0xffffff, /* src_mask */
374 0xffffff, /* dst_mask */
375 TRUE), /* pcrel_offset */
376
377 /* High 20 bits of address when lower 12 is or'd in. */
378 HOWTO (R_NDS32_HI20, /* type */
379 12, /* rightshift */
380 2, /* size (0 = byte, 1 = short, 2 = long) */
381 20, /* bitsize */
382 FALSE, /* pc_relative */
383 0, /* bitpos */
384 complain_overflow_dont,/* complain_on_overflow */
385 nds32_elf_hi20_reloc, /* special_function */
386 "R_NDS32_HI20", /* name */
387 FALSE, /* partial_inplace */
388 0x000fffff, /* src_mask */
389 0x000fffff, /* dst_mask */
390 FALSE), /* pcrel_offset */
391
392 /* Lower 12 bits of address. */
393 HOWTO (R_NDS32_LO12S3, /* type */
394 3, /* rightshift */
395 2, /* size (0 = byte, 1 = short, 2 = long) */
396 9, /* bitsize */
397 FALSE, /* pc_relative */
398 0, /* bitpos */
399 complain_overflow_dont,/* complain_on_overflow */
400 nds32_elf_lo12_reloc, /* special_function */
401 "R_NDS32_LO12S3", /* name */
402 FALSE, /* partial_inplace */
403 0x000001ff, /* src_mask */
404 0x000001ff, /* dst_mask */
405 FALSE), /* pcrel_offset */
406
407 /* Lower 12 bits of address. */
408 HOWTO (R_NDS32_LO12S2, /* type */
409 2, /* rightshift */
410 2, /* size (0 = byte, 1 = short, 2 = long) */
411 10, /* bitsize */
412 FALSE, /* pc_relative */
413 0, /* bitpos */
414 complain_overflow_dont,/* complain_on_overflow */
415 nds32_elf_lo12_reloc, /* special_function */
416 "R_NDS32_LO12S2", /* name */
417 FALSE, /* partial_inplace */
418 0x000003ff, /* src_mask */
419 0x000003ff, /* dst_mask */
420 FALSE), /* pcrel_offset */
421
422 /* Lower 12 bits of address. */
423 HOWTO (R_NDS32_LO12S1, /* type */
424 1, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 11, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_dont,/* complain_on_overflow */
430 nds32_elf_lo12_reloc, /* special_function */
431 "R_NDS32_LO12S1", /* name */
432 FALSE, /* partial_inplace */
433 0x000007ff, /* src_mask */
434 0x000007ff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 /* Lower 12 bits of address. */
438 HOWTO (R_NDS32_LO12S0, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 12, /* bitsize */
442 FALSE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_dont,/* complain_on_overflow */
445 nds32_elf_lo12_reloc, /* special_function */
446 "R_NDS32_LO12S0", /* name */
447 FALSE, /* partial_inplace */
448 0x00000fff, /* src_mask */
449 0x00000fff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451
452 /* Small data area 15 bits offset. */
453 HOWTO (R_NDS32_SDA15S3, /* type */
454 3, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 15, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_signed, /* complain_on_overflow */
460 nds32_elf_sda15_reloc, /* special_function */
461 "R_NDS32_SDA15S3", /* name */
462 FALSE, /* partial_inplace */
463 0x00007fff, /* src_mask */
464 0x00007fff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Small data area 15 bits offset. */
468 HOWTO (R_NDS32_SDA15S2, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 15, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_signed, /* complain_on_overflow */
475 nds32_elf_sda15_reloc, /* special_function */
476 "R_NDS32_SDA15S2", /* name */
477 FALSE, /* partial_inplace */
478 0x00007fff, /* src_mask */
479 0x00007fff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Small data area 15 bits offset. */
483 HOWTO (R_NDS32_SDA15S1, /* type */
484 1, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 15, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_signed, /* complain_on_overflow */
490 nds32_elf_sda15_reloc, /* special_function */
491 "R_NDS32_SDA15S1", /* name */
492 FALSE, /* partial_inplace */
493 0x00007fff, /* src_mask */
494 0x00007fff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Small data area 15 bits offset. */
498 HOWTO (R_NDS32_SDA15S0, /* type */
499 0, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 15, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed, /* complain_on_overflow */
505 nds32_elf_sda15_reloc, /* special_function */
506 "R_NDS32_SDA15S0", /* name */
507 FALSE, /* partial_inplace */
508 0x00007fff, /* src_mask */
509 0x00007fff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* GNU extension to record C++ vtable hierarchy */
513 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 0, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 NULL, /* special_function */
521 "R_NDS32_GNU_VTINHERIT", /* name */
522 FALSE, /* partial_inplace */
523 0, /* src_mask */
524 0, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* GNU extension to record C++ vtable member usage */
528 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
529 0, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 0, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_dont,/* complain_on_overflow */
535 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
536 "R_NDS32_GNU_VTENTRY", /* name */
537 FALSE, /* partial_inplace */
538 0, /* src_mask */
539 0, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* A 16 bit absolute relocation. */
543 HOWTO (R_NDS32_16_RELA, /* type */
544 0, /* rightshift */
545 1, /* size (0 = byte, 1 = short, 2 = long) */
546 16, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_bitfield, /* complain_on_overflow */
550 bfd_elf_generic_reloc, /* special_function */
551 "R_NDS32_16_RELA", /* name */
552 FALSE, /* partial_inplace */
553 0xffff, /* src_mask */
554 0xffff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* A 32 bit absolute relocation. */
558 HOWTO (R_NDS32_32_RELA, /* type */
559 0, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 32, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_bitfield, /* complain_on_overflow */
565 bfd_elf_generic_reloc, /* special_function */
566 "R_NDS32_32_RELA", /* name */
567 FALSE, /* partial_inplace */
568 0xffffffff, /* src_mask */
569 0xffffffff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* A 20 bit address. */
573 HOWTO (R_NDS32_20_RELA, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 20, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 bfd_elf_generic_reloc, /* special_function */
581 "R_NDS32_20_RELA", /* name */
582 FALSE, /* partial_inplace */
583 0xfffff, /* src_mask */
584 0xfffff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
588 1, /* rightshift */
589 1, /* size (0 = byte, 1 = short, 2 = long) */
590 8, /* bitsize */
591 TRUE, /* pc_relative */
592 0, /* bitpos */
593 complain_overflow_signed, /* complain_on_overflow */
594 bfd_elf_generic_reloc, /* special_function */
595 "R_NDS32_9_PCREL_RELA",/* name */
596 FALSE, /* partial_inplace */
597 0xff, /* src_mask */
598 0xff, /* dst_mask */
599 TRUE), /* pcrel_offset */
600
601 /* A relative 15 bit relocation, right shifted by 1. */
602 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
603 1, /* rightshift */
604 2, /* size (0 = byte, 1 = short, 2 = long) */
605 14, /* bitsize */
606 TRUE, /* pc_relative */
607 0, /* bitpos */
608 complain_overflow_signed, /* complain_on_overflow */
609 bfd_elf_generic_reloc, /* special_function */
610 "R_NDS32_15_PCREL_RELA", /* name */
611 FALSE, /* partial_inplace */
612 0x3fff, /* src_mask */
613 0x3fff, /* dst_mask */
614 TRUE), /* pcrel_offset */
615
616 /* A relative 17 bit relocation, right shifted by 1. */
617 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
618 1, /* rightshift */
619 2, /* size (0 = byte, 1 = short, 2 = long) */
620 16, /* bitsize */
621 TRUE, /* pc_relative */
622 0, /* bitpos */
623 complain_overflow_signed, /* complain_on_overflow */
624 bfd_elf_generic_reloc, /* special_function */
625 "R_NDS32_17_PCREL_RELA", /* name */
626 FALSE, /* partial_inplace */
627 0xffff, /* src_mask */
628 0xffff, /* dst_mask */
629 TRUE), /* pcrel_offset */
630
631 /* A relative 25 bit relocation, right shifted by 2. */
632 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
633 1, /* rightshift */
634 2, /* size (0 = byte, 1 = short, 2 = long) */
635 24, /* bitsize */
636 TRUE, /* pc_relative */
637 0, /* bitpos */
638 complain_overflow_signed, /* complain_on_overflow */
639 bfd_elf_generic_reloc, /* special_function */
640 "R_NDS32_25_PCREL_RELA", /* name */
641 FALSE, /* partial_inplace */
642 0xffffff, /* src_mask */
643 0xffffff, /* dst_mask */
644 TRUE), /* pcrel_offset */
645
646 /* High 20 bits of address when lower 16 is or'd in. */
647 HOWTO (R_NDS32_HI20_RELA, /* type */
648 12, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 20, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_NDS32_HI20_RELA", /* name */
656 FALSE, /* partial_inplace */
657 0x000fffff, /* src_mask */
658 0x000fffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 /* Lower 12 bits of address. */
662 HOWTO (R_NDS32_LO12S3_RELA, /* type */
663 3, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 9, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_dont,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_LO12S3_RELA", /* name */
671 FALSE, /* partial_inplace */
672 0x000001ff, /* src_mask */
673 0x000001ff, /* dst_mask */
674 FALSE), /* pcrel_offset */
675
676 /* Lower 12 bits of address. */
677 HOWTO (R_NDS32_LO12S2_RELA, /* type */
678 2, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 10, /* bitsize */
681 FALSE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_dont,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_LO12S2_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x000003ff, /* src_mask */
688 0x000003ff, /* dst_mask */
689 FALSE), /* pcrel_offset */
690
691 /* Lower 12 bits of address. */
692 HOWTO (R_NDS32_LO12S1_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 11, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_LO12S1_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0x000007ff, /* src_mask */
703 0x000007ff, /* dst_mask */
704 FALSE), /* pcrel_offset */
705
706 /* Lower 12 bits of address. */
707 HOWTO (R_NDS32_LO12S0_RELA, /* type */
708 0, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 12, /* bitsize */
711 FALSE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_dont,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_LO12S0_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0x00000fff, /* src_mask */
718 0x00000fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
720
721 /* Small data area 15 bits offset. */
722 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
723 3, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 15, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_signed, /* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_SDA15S3_RELA",/* name */
731 FALSE, /* partial_inplace */
732 0x00007fff, /* src_mask */
733 0x00007fff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Small data area 15 bits offset. */
737 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
738 2, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 15, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_signed, /* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_SDA15S2_RELA",/* name */
746 FALSE, /* partial_inplace */
747 0x00007fff, /* src_mask */
748 0x00007fff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
752 1, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 15, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_signed, /* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_NDS32_SDA15S1_RELA",/* name */
760 FALSE, /* partial_inplace */
761 0x00007fff, /* src_mask */
762 0x00007fff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 15, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_signed, /* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_NDS32_SDA15S0_RELA",/* name */
774 FALSE, /* partial_inplace */
775 0x00007fff, /* src_mask */
776 0x00007fff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 /* GNU extension to record C++ vtable hierarchy */
780 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
781 0, /* rightshift */
782 2, /* size (0 = byte, 1 = short, 2 = long) */
783 0, /* bitsize */
784 FALSE, /* pc_relative */
785 0, /* bitpos */
786 complain_overflow_dont,/* complain_on_overflow */
787 NULL, /* special_function */
788 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
789 FALSE, /* partial_inplace */
790 0, /* src_mask */
791 0, /* dst_mask */
792 FALSE), /* pcrel_offset */
793
794 /* GNU extension to record C++ vtable member usage */
795 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
796 0, /* rightshift */
797 2, /* size (0 = byte, 1 = short, 2 = long) */
798 0, /* bitsize */
799 FALSE, /* pc_relative */
800 0, /* bitpos */
801 complain_overflow_dont,/* complain_on_overflow */
802 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
803 "R_NDS32_RELA_GNU_VTENTRY", /* name */
804 FALSE, /* partial_inplace */
805 0, /* src_mask */
806 0, /* dst_mask */
807 FALSE), /* pcrel_offset */
808
809 /* Like R_NDS32_20, but referring to the GOT table entry for
810 the symbol. */
811 HOWTO (R_NDS32_GOT20, /* type */
812 0, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 20, /* bitsize */
815 FALSE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_signed, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 "R_NDS32_GOT20", /* name */
820 FALSE, /* partial_inplace */
821 0xfffff, /* src_mask */
822 0xfffff, /* dst_mask */
823 FALSE), /* pcrel_offset */
824
825 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
826 entry for the symbol. */
827 HOWTO (R_NDS32_25_PLTREL, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 24, /* bitsize */
831 TRUE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_25_PLTREL", /* name */
836 FALSE, /* partial_inplace */
837 0xffffff, /* src_mask */
838 0xffffff, /* dst_mask */
839 TRUE), /* pcrel_offset */
840
841 /* This is used only by the dynamic linker. The symbol should exist
842 both in the object being run and in some shared library. The
843 dynamic linker copies the data addressed by the symbol from the
844 shared library into the object, because the object being
845 run has to have the data at some particular address. */
846 HOWTO (R_NDS32_COPY, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 32, /* bitsize */
850 FALSE, /* pc_relative */
851 0, /* bitpos */
852 complain_overflow_bitfield, /* complain_on_overflow */
853 bfd_elf_generic_reloc, /* special_function */
854 "R_NDS32_COPY", /* name */
855 FALSE, /* partial_inplace */
856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
858 FALSE), /* pcrel_offset */
859
860 /* Like R_NDS32_20, but used when setting global offset table
861 entries. */
862 HOWTO (R_NDS32_GLOB_DAT, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_bitfield, /* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_NDS32_GLOB_DAT", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 /* Marks a procedure linkage table entry for a symbol. */
877 HOWTO (R_NDS32_JMP_SLOT, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_JMP_SLOT", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 /* Used only by the dynamic linker. When the object is run, this
892 longword is set to the load address of the object, plus the
893 addend. */
894 HOWTO (R_NDS32_RELATIVE, /* type */
895 0, /* rightshift */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
897 32, /* bitsize */
898 FALSE, /* pc_relative */
899 0, /* bitpos */
900 complain_overflow_bitfield, /* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_NDS32_RELATIVE", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 FALSE), /* pcrel_offset */
907
908 HOWTO (R_NDS32_GOTOFF, /* type */
909 0, /* rightshift */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
911 20, /* bitsize */
912 FALSE, /* pc_relative */
913 0, /* bitpos */
914 complain_overflow_signed, /* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_NDS32_GOTOFF", /* name */
917 FALSE, /* partial_inplace */
918 0xfffff, /* src_mask */
919 0xfffff, /* dst_mask */
920 FALSE), /* pcrel_offset */
921
922 /* An PC Relative 20-bit relocation used when setting PIC offset
923 table register. */
924 HOWTO (R_NDS32_GOTPC20, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 20, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_signed, /* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_NDS32_GOTPC20", /* name */
933 FALSE, /* partial_inplace */
934 0xfffff, /* src_mask */
935 0xfffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 /* Like R_NDS32_HI20, but referring to the GOT table entry for
939 the symbol. */
940 HOWTO (R_NDS32_GOT_HI20, /* type */
941 12, /* rightshift */
942 2, /* size (0 = byte, 1 = short, 2 = long) */
943 20, /* bitsize */
944 FALSE, /* pc_relative */
945 0, /* bitpos */
946 complain_overflow_dont,/* complain_on_overflow */
947 bfd_elf_generic_reloc, /* special_function */
948 "R_NDS32_GOT_HI20", /* name */
949 FALSE, /* partial_inplace */
950 0x000fffff, /* src_mask */
951 0x000fffff, /* dst_mask */
952 FALSE), /* pcrel_offset */
953 HOWTO (R_NDS32_GOT_LO12, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 12, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOT_LO12", /* name */
962 FALSE, /* partial_inplace */
963 0x00000fff, /* src_mask */
964 0x00000fff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* An PC Relative relocation used when setting PIC offset table register.
968 Like R_NDS32_HI20, but referring to the GOT table entry for
969 the symbol. */
970 HOWTO (R_NDS32_GOTPC_HI20, /* type */
971 12, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 20, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_dont,/* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_GOTPC_HI20", /* name */
979 FALSE, /* partial_inplace */
980 0x000fffff, /* src_mask */
981 0x000fffff, /* dst_mask */
982 TRUE), /* pcrel_offset */
983 HOWTO (R_NDS32_GOTPC_LO12, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 12, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_dont, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTPC_LO12", /* name */
992 FALSE, /* partial_inplace */
993 0x00000fff, /* src_mask */
994 0x00000fff, /* dst_mask */
995 TRUE), /* pcrel_offset */
996
997 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
998 12, /* rightshift */
999 2, /* size (0 = byte, 1 = short, 2 = long) */
1000 20, /* bitsize */
1001 FALSE, /* pc_relative */
1002 0, /* bitpos */
1003 complain_overflow_dont,/* complain_on_overflow */
1004 bfd_elf_generic_reloc, /* special_function */
1005 "R_NDS32_GOTOFF_HI20", /* name */
1006 FALSE, /* partial_inplace */
1007 0x000fffff, /* src_mask */
1008 0x000fffff, /* dst_mask */
1009 FALSE), /* pcrel_offset */
1010 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 12, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 bfd_elf_generic_reloc, /* special_function */
1018 "R_NDS32_GOTOFF_LO12", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for relaxable instruction. This is used with
1025 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1026 in order to make next label aligned on word boundary. */
1027 HOWTO (R_NDS32_INSN16, /* type */
1028 0, /* rightshift */
1029 2, /* size (0 = byte, 1 = short, 2 = long) */
1030 32, /* bitsize */
1031 FALSE, /* pc_relative */
1032 0, /* bitpos */
1033 complain_overflow_dont,/* complain_on_overflow */
1034 nds32_elf_ignore_reloc,/* special_function */
1035 "R_NDS32_INSN16", /* name */
1036 FALSE, /* partial_inplace */
1037 0x00000fff, /* src_mask */
1038 0x00000fff, /* dst_mask */
1039 FALSE), /* pcrel_offset */
1040
1041 /* Alignment hint for label. */
1042 HOWTO (R_NDS32_LABEL, /* type */
1043 0, /* rightshift */
1044 2, /* size (0 = byte, 1 = short, 2 = long) */
1045 32, /* bitsize */
1046 FALSE, /* pc_relative */
1047 0, /* bitpos */
1048 complain_overflow_dont,/* complain_on_overflow */
1049 nds32_elf_ignore_reloc,/* special_function */
1050 "R_NDS32_LABEL", /* name */
1051 FALSE, /* partial_inplace */
1052 0xffffffff, /* src_mask */
1053 0xffffffff, /* dst_mask */
1054 FALSE), /* pcrel_offset */
1055
1056 /* Relax hint for unconditional call sequence */
1057 HOWTO (R_NDS32_LONGCALL1, /* type */
1058 0, /* rightshift */
1059 2, /* size (0 = byte, 1 = short, 2 = long) */
1060 32, /* bitsize */
1061 FALSE, /* pc_relative */
1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_LONGCALL1", /* name */
1066 FALSE, /* partial_inplace */
1067 0xffffffff, /* src_mask */
1068 0xffffffff, /* dst_mask */
1069 FALSE), /* pcrel_offset */
1070
1071 /* Relax hint for conditional call sequence. */
1072 HOWTO (R_NDS32_LONGCALL2, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LONGCALL2", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085
1086 /* Relax hint for conditional call sequence. */
1087 HOWTO (R_NDS32_LONGCALL3, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL3", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Relax hint for unconditional branch sequence. */
1102 HOWTO (R_NDS32_LONGJUMP1, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGJUMP1", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Relax hint for conditional branch sequence. */
1117 HOWTO (R_NDS32_LONGJUMP2, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGJUMP2", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for conditional branch sequence. */
1132 HOWTO (R_NDS32_LONGJUMP3, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP3", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for load/store sequence. */
1147 HOWTO (R_NDS32_LOADSTORE, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LOADSTORE", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for load/store sequence. */
1162 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1163 0, /* rightshift */
1164 1, /* size (0 = byte, 1 = short, 2 = long) */
1165 16, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_9_FIXED_RELA",/* name */
1171 FALSE, /* partial_inplace */
1172 0x000000ff, /* src_mask */
1173 0x000000ff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for load/store sequence. */
1177 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_15_FIXED_RELA", /* name */
1186 FALSE, /* partial_inplace */
1187 0x00003fff, /* src_mask */
1188 0x00003fff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for load/store sequence. */
1192 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_17_FIXED_RELA", /* name */
1201 FALSE, /* partial_inplace */
1202 0x0000ffff, /* src_mask */
1203 0x0000ffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for load/store sequence. */
1207 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_25_FIXED_RELA", /* name */
1216 FALSE, /* partial_inplace */
1217 0x00ffffff, /* src_mask */
1218 0x00ffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* High 20 bits of PLT symbol offset relative to PC. */
1222 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1223 12, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 20, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 bfd_elf_generic_reloc, /* special_function */
1230 "R_NDS32_PLTREL_HI20", /* name */
1231 FALSE, /* partial_inplace */
1232 0x000fffff, /* src_mask */
1233 0x000fffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Low 12 bits of PLT symbol offset relative to PC. */
1237 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1238 0, /* rightshift */
1239 2, /* size (0 = byte, 1 = short, 2 = long) */
1240 12, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 bfd_elf_generic_reloc, /* special_function */
1245 "R_NDS32_PLTREL_LO12", /* name */
1246 FALSE, /* partial_inplace */
1247 0x00000fff, /* src_mask */
1248 0x00000fff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1252 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1253 12, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 20, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLT_GOTREL_HI20", /* name */
1261 FALSE, /* partial_inplace */
1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1267 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 12, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLT_GOTREL_LO12", /* name */
1276 FALSE, /* partial_inplace */
1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Small data area 12 bits offset. */
1282 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1283 2, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 12, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_signed, /* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_SDA12S2_DP_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00000fff, /* src_mask */
1293 0x00000fff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* Small data area 12 bits offset. */
1297 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1298 2, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 12, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_signed, /* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_SDA12S2_SP_RELA", /* name */
1306 FALSE, /* partial_inplace */
1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310 /* Lower 12 bits of address. */
1311
1312 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1313 2, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 10, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_LO12S2_DP_RELA", /* name */
1321 FALSE, /* partial_inplace */
1322 0x000003ff, /* src_mask */
1323 0x000003ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* Lower 12 bits of address. */
1327 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1328 2, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 10, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_LO12S2_SP_RELA", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000003ff, /* src_mask */
1338 0x000003ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340 /* Lower 12 bits of address. Special identity for or case. */
1341 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 12, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_NDS32_LO12S0_ORI_RELA", /* name */
1350 FALSE, /* partial_inplace */
1351 0x00000fff, /* src_mask */
1352 0x00000fff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354 /* Small data area 19 bits offset. */
1355 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1356 3, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 16, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_signed, /* complain_on_overflow */
1362 bfd_elf_generic_reloc, /* special_function */
1363 "R_NDS32_SDA16S3_RELA",/* name */
1364 FALSE, /* partial_inplace */
1365 0x0000ffff, /* src_mask */
1366 0x0000ffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 /* Small data area 15 bits offset. */
1370 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1371 2, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 17, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_signed, /* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_NDS32_SDA17S2_RELA",/* name */
1379 FALSE, /* partial_inplace */
1380 0x0001ffff, /* src_mask */
1381 0x0001ffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1385 1, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 18, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_signed, /* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_NDS32_SDA18S1_RELA",/* name */
1393 FALSE, /* partial_inplace */
1394 0x0003ffff, /* src_mask */
1395 0x0003ffff, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 19, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_signed, /* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_NDS32_SDA19S0_RELA",/* name */
1407 FALSE, /* partial_inplace */
1408 0x0007ffff, /* src_mask */
1409 0x0007ffff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
1411 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1412 0, /* rightshift */
1413 0, /* size (0 = byte, 1 = short, 2 = long) */
1414 8, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 nds32_elf_ignore_reloc,/* special_function */
1419 "R_NDS32_DWARF2_OP1_RELA", /* name */
1420 FALSE, /* partial_inplace */
1421 0xff, /* src_mask */
1422 0xff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1425 0, /* rightshift */
1426 1, /* size (0 = byte, 1 = short, 2 = long) */
1427 16, /* bitsize */
1428 FALSE, /* pc_relative */
1429 0, /* bitpos */
1430 complain_overflow_dont,/* complain_on_overflow */
1431 nds32_elf_ignore_reloc,/* special_function */
1432 "R_NDS32_DWARF2_OP2_RELA", /* name */
1433 FALSE, /* partial_inplace */
1434 0xffff, /* src_mask */
1435 0xffff, /* dst_mask */
1436 FALSE), /* pcrel_offset */
1437 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1438 0, /* rightshift */
1439 2, /* size (0 = byte, 1 = short, 2 = long) */
1440 32, /* bitsize */
1441 FALSE, /* pc_relative */
1442 0, /* bitpos */
1443 complain_overflow_dont,/* complain_on_overflow */
1444 nds32_elf_ignore_reloc,/* special_function */
1445 "R_NDS32_DWARF2_LEB_RELA", /* name */
1446 FALSE, /* partial_inplace */
1447 0xffffffff, /* src_mask */
1448 0xffffffff, /* dst_mask */
1449 FALSE), /* pcrel_offset */
1450 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1451 0, /* rightshift */
1452 1, /* size (0 = byte, 1 = short, 2 = long) */
1453 16, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont,/* complain_on_overflow */
1457 nds32_elf_ignore_reloc,/* special_function */
1458 "R_NDS32_UPDATE_TA_RELA", /* name */
1459 FALSE, /* partial_inplace */
1460 0xffff, /* src_mask */
1461 0xffff, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1464 entry for the symbol. */
1465 HOWTO (R_NDS32_9_PLTREL, /* type */
1466 1, /* rightshift */
1467 1, /* size (0 = byte, 1 = short, 2 = long) */
1468 8, /* bitsize */
1469 TRUE, /* pc_relative */
1470 0, /* bitpos */
1471 complain_overflow_signed, /* complain_on_overflow */
1472 bfd_elf_generic_reloc, /* special_function */
1473 "R_NDS32_9_PLTREL", /* name */
1474 FALSE, /* partial_inplace */
1475 0xff, /* src_mask */
1476 0xff, /* dst_mask */
1477 TRUE), /* pcrel_offset */
1478 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1479 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1480 0, /* rightshift */
1481 2, /* size (0 = byte, 1 = short, 2 = long) */
1482 20, /* bitsize */
1483 FALSE, /* pc_relative */
1484 0, /* bitpos */
1485 complain_overflow_dont,/* complain_on_overflow */
1486 bfd_elf_generic_reloc, /* special_function */
1487 "R_NDS32_PLT_GOTREL_LO20", /* name */
1488 FALSE, /* partial_inplace */
1489 0x000fffff, /* src_mask */
1490 0x000fffff, /* dst_mask */
1491 FALSE), /* pcrel_offset */
1492 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1493 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 15, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_dont,/* complain_on_overflow */
1500 bfd_elf_generic_reloc, /* special_function */
1501 "R_NDS32_PLT_GOTREL_LO15", /* name */
1502 FALSE, /* partial_inplace */
1503 0x00007fff, /* src_mask */
1504 0x00007fff, /* dst_mask */
1505 FALSE), /* pcrel_offset */
1506 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1507 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 19, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_dont,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_NDS32_PLT_GOTREL_LO19", /* name */
1516 FALSE, /* partial_inplace */
1517 0x0007ffff, /* src_mask */
1518 0x0007ffff, /* dst_mask */
1519 FALSE), /* pcrel_offset */
1520 HOWTO (R_NDS32_GOT_LO15, /* type */
1521 0, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 15, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_dont,/* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 "R_NDS32_GOT_LO15", /* name */
1529 FALSE, /* partial_inplace */
1530 0x00007fff, /* src_mask */
1531 0x00007fff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533 HOWTO (R_NDS32_GOT_LO19, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 19, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_dont,/* complain_on_overflow */
1540 bfd_elf_generic_reloc, /* special_function */
1541 "R_NDS32_GOT_LO19", /* name */
1542 FALSE, /* partial_inplace */
1543 0x0007ffff, /* src_mask */
1544 0x0007ffff, /* dst_mask */
1545 FALSE), /* pcrel_offset */
1546 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 15, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_GOTOFF_LO15", /* name */
1555 FALSE, /* partial_inplace */
1556 0x00007fff, /* src_mask */
1557 0x00007fff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 19, /* bitsize */
1563 FALSE, /* pc_relative */
1564 0, /* bitpos */
1565 complain_overflow_dont,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_NDS32_GOTOFF_LO19", /* name */
1568 FALSE, /* partial_inplace */
1569 0x0007ffff, /* src_mask */
1570 0x0007ffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1572 /* GOT 15 bits offset. */
1573 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1574 2, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 15, /* bitsize */
1577 FALSE, /* pc_relative */
1578 0, /* bitpos */
1579 complain_overflow_signed, /* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_NDS32_GOT15S2_RELA",/* name */
1582 FALSE, /* partial_inplace */
1583 0x00007fff, /* src_mask */
1584 0x00007fff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1586 /* GOT 17 bits offset. */
1587 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1588 2, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 17, /* bitsize */
1591 FALSE, /* pc_relative */
1592 0, /* bitpos */
1593 complain_overflow_signed, /* complain_on_overflow */
1594 bfd_elf_generic_reloc, /* special_function */
1595 "R_NDS32_GOT17S2_RELA",/* name */
1596 FALSE, /* partial_inplace */
1597 0x0001ffff, /* src_mask */
1598 0x0001ffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600 /* A 5 bit address. */
1601 HOWTO (R_NDS32_5_RELA, /* type */
1602 0, /* rightshift */
1603 1, /* size (0 = byte, 1 = short, 2 = long) */
1604 5, /* bitsize */
1605 FALSE, /* pc_relative */
1606 0, /* bitpos */
1607 complain_overflow_signed, /* complain_on_overflow */
1608 bfd_elf_generic_reloc, /* special_function */
1609 "R_NDS32_5_RELA", /* name */
1610 FALSE, /* partial_inplace */
1611 0x1f, /* src_mask */
1612 0x1f, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1614 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1615 1, /* rightshift */
1616 1, /* size (0 = byte, 1 = short, 2 = long) */
1617 9, /* bitsize */
1618 TRUE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_unsigned, /* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_NDS32_10_UPCREL_RELA", /* name */
1623 FALSE, /* partial_inplace */
1624 0x1ff, /* src_mask */
1625 0x1ff, /* dst_mask */
1626 TRUE), /* pcrel_offset */
1627 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1628 2, /* rightshift */
1629 1, /* size (0 = byte, 1 = short, 2 = long) */
1630 7, /* bitsize */
1631 FALSE, /* pc_relative */
1632 0, /* bitpos */
1633 complain_overflow_unsigned, /* complain_on_overflow */
1634 bfd_elf_generic_reloc, /* special_function */
1635 "R_NDS32_SDA_FP7U2_RELA", /* name */
1636 FALSE, /* partial_inplace */
1637 0x0000007f, /* src_mask */
1638 0x0000007f, /* dst_mask */
1639 FALSE), /* pcrel_offset */
1640 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1641 1, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 8, /* bitsize */
1644 TRUE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_signed, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1649 FALSE, /* partial_inplace */
1650 0xff, /* src_mask */
1651 0xff, /* dst_mask */
1652 TRUE), /* pcrel_offset */
1653 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1654 1, /* rightshift */
1655 2, /* size (0 = byte, 1 = short, 2 = long) */
1656 24, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_NDS32_25_ABS_RELA", /* name */
1662 FALSE, /* partial_inplace */
1663 0xffffff, /* src_mask */
1664 0xffffff, /* dst_mask */
1665 FALSE), /* pcrel_offset */
1666
1667 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1668 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1669 1, /* rightshift */
1670 2, /* size (0 = byte, 1 = short, 2 = long) */
1671 16, /* bitsize */
1672 TRUE, /* pc_relative */
1673 0, /* bitpos */
1674 complain_overflow_signed, /* complain_on_overflow */
1675 bfd_elf_generic_reloc, /* special_function */
1676 "R_NDS32_17IFC_PCREL_RELA", /* name */
1677 FALSE, /* partial_inplace */
1678 0xffff, /* src_mask */
1679 0xffff, /* dst_mask */
1680 TRUE), /* pcrel_offset */
1681
1682 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1683 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1684 1, /* rightshift */
1685 1, /* size (0 = byte, 1 = short, 2 = long) */
1686 9, /* bitsize */
1687 TRUE, /* pc_relative */
1688 0, /* bitpos */
1689 complain_overflow_unsigned, /* complain_on_overflow */
1690 bfd_elf_generic_reloc, /* special_function */
1691 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1692 FALSE, /* partial_inplace */
1693 0x1ff, /* src_mask */
1694 0x1ff, /* dst_mask */
1695 TRUE), /* pcrel_offset */
1696
1697 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1698 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1699 12, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 20, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_dont, /* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_NDS32_TLS_LE_HI20", /* name */
1707 FALSE, /* partial_inplace */
1708 0x000fffff, /* src_mask */
1709 0x000fffff, /* dst_mask */
1710 FALSE), /* pcrel_offset */
1711 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1712 0, /* rightshift */
1713 2, /* size (0 = byte, 1 = short, 2 = long) */
1714 12, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont, /* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_NDS32_TLS_LE_LO12", /* name */
1720 FALSE, /* partial_inplace */
1721 0x00000fff, /* src_mask */
1722 0x00000fff, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1726 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1727 12, /* rightshift */
1728 2, /* size (0 = byte, 1 = short, 2 = long) */
1729 20, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont, /* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_NDS32_TLS_IE_HI20", /* name */
1735 FALSE, /* partial_inplace */
1736 0x000fffff, /* src_mask */
1737 0x000fffff, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1740 2, /* rightshift */
1741 2, /* size (0 = byte, 1 = short, 2 = long) */
1742 10, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont, /* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_NDS32_TLS_IE_LO12S2", /* name */
1748 FALSE, /* partial_inplace */
1749 0x000003ff, /* src_mask */
1750 0x000003ff, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752 /* Mark a TLS IE entry in GOT. */
1753 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1754 0, /* rightshift */
1755 2, /* size (0 = byte, 1 = short, 2 = long) */
1756 32, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_bitfield, /* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_NDS32_TLS_TPOFF", /* name */
1762 FALSE, /* partial_inplace */
1763 0xffffffff, /* src_mask */
1764 0xffffffff, /* dst_mask */
1765 FALSE), /* pcrel_offset */
1766 /* A 20 bit address. */
1767 HOWTO (R_NDS32_TLS_LE_20, /* type */
1768 0, /* rightshift */
1769 2, /* size (0 = byte, 1 = short, 2 = long) */
1770 20, /* bitsize */
1771 FALSE, /* pc_relative */
1772 0, /* bitpos */
1773 complain_overflow_signed, /* complain_on_overflow */
1774 bfd_elf_generic_reloc, /* special_function */
1775 "R_NDS32_TLS_LE_20", /* name */
1776 FALSE, /* partial_inplace */
1777 0xfffff, /* src_mask */
1778 0xfffff, /* dst_mask */
1779 FALSE), /* pcrel_offset */
1780 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1781 0, /* rightshift */
1782 2, /* size (0 = byte, 1 = short, 2 = long) */
1783 15, /* bitsize */
1784 FALSE, /* pc_relative */
1785 0, /* bitpos */
1786 complain_overflow_signed, /* complain_on_overflow */
1787 bfd_elf_generic_reloc, /* special_function */
1788 "R_NDS32_TLS_LE_15S0", /* name */
1789 FALSE, /* partial_inplace */
1790 0x7fff, /* src_mask */
1791 0x7fff, /* dst_mask */
1792 FALSE), /* pcrel_offset */
1793 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1794 1, /* rightshift */
1795 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 15, /* bitsize */
1797 FALSE, /* pc_relative */
1798 0, /* bitpos */
1799 complain_overflow_signed, /* complain_on_overflow */
1800 bfd_elf_generic_reloc, /* special_function */
1801 "R_NDS32_TLS_LE_15S1", /* name */
1802 FALSE, /* partial_inplace */
1803 0x7fff, /* src_mask */
1804 0x7fff, /* dst_mask */
1805 FALSE), /* pcrel_offset */
1806 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1807 2, /* rightshift */
1808 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 15, /* bitsize */
1810 FALSE, /* pc_relative */
1811 0, /* bitpos */
1812 complain_overflow_signed, /* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_LE_15S2", /* name */
1815 FALSE, /* partial_inplace */
1816 0x7fff, /* src_mask */
1817 0x7fff, /* dst_mask */
1818 FALSE), /* pcrel_offset */
1819
1820 /* Relax hint for unconditional call sequence */
1821 HOWTO (R_NDS32_LONGCALL4, /* type */
1822 0, /* rightshift */
1823 2, /* size (0 = byte, 1 = short, 2 = long) */
1824 32, /* bitsize */
1825 FALSE, /* pc_relative */
1826 0, /* bitpos */
1827 complain_overflow_dont, /* complain_on_overflow */
1828 nds32_elf_ignore_reloc, /* special_function */
1829 "R_NDS32_LONGCALL4", /* name */
1830 FALSE, /* partial_inplace */
1831 0xffffffff, /* src_mask */
1832 0xffffffff, /* dst_mask */
1833 FALSE), /* pcrel_offset */
1834
1835 /* Relax hint for conditional call sequence. */
1836 HOWTO (R_NDS32_LONGCALL5, /* type */
1837 0, /* rightshift */
1838 2, /* size (0 = byte, 1 = short, 2 = long) */
1839 32, /* bitsize */
1840 FALSE, /* pc_relative */
1841 0, /* bitpos */
1842 complain_overflow_dont, /* complain_on_overflow */
1843 nds32_elf_ignore_reloc, /* special_function */
1844 "R_NDS32_LONGCALL5", /* name */
1845 FALSE, /* partial_inplace */
1846 0xffffffff, /* src_mask */
1847 0xffffffff, /* dst_mask */
1848 FALSE), /* pcrel_offset */
1849
1850 /* Relax hint for conditional call sequence. */
1851 HOWTO (R_NDS32_LONGCALL6, /* type */
1852 0, /* rightshift */
1853 2, /* size (0 = byte, 1 = short, 2 = long) */
1854 32, /* bitsize */
1855 FALSE, /* pc_relative */
1856 0, /* bitpos */
1857 complain_overflow_dont, /* complain_on_overflow */
1858 nds32_elf_ignore_reloc, /* special_function */
1859 "R_NDS32_LONGCALL6", /* name */
1860 FALSE, /* partial_inplace */
1861 0xffffffff, /* src_mask */
1862 0xffffffff, /* dst_mask */
1863 FALSE), /* pcrel_offset */
1864
1865 /* Relax hint for unconditional branch sequence. */
1866 HOWTO (R_NDS32_LONGJUMP4, /* type */
1867 0, /* rightshift */
1868 2, /* size (0 = byte, 1 = short, 2 = long) */
1869 32, /* bitsize */
1870 FALSE, /* pc_relative */
1871 0, /* bitpos */
1872 complain_overflow_dont, /* complain_on_overflow */
1873 nds32_elf_ignore_reloc, /* special_function */
1874 "R_NDS32_LONGJUMP4", /* name */
1875 FALSE, /* partial_inplace */
1876 0xffffffff, /* src_mask */
1877 0xffffffff, /* dst_mask */
1878 FALSE), /* pcrel_offset */
1879
1880 /* Relax hint for conditional branch sequence. */
1881 HOWTO (R_NDS32_LONGJUMP5, /* type */
1882 0, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 32, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_dont, /* complain_on_overflow */
1888 nds32_elf_ignore_reloc, /* special_function */
1889 "R_NDS32_LONGJUMP5", /* name */
1890 FALSE, /* partial_inplace */
1891 0xffffffff, /* src_mask */
1892 0xffffffff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for conditional branch sequence. */
1896 HOWTO (R_NDS32_LONGJUMP6, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGJUMP6", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional branch sequence. */
1911 HOWTO (R_NDS32_LONGJUMP7, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGJUMP7", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
1924 };
1925
1926 /* Relocations used for relaxation. */
1927 static reloc_howto_type nds32_elf_relax_howto_table[] =
1928 {
1929 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1930 0, /* rightshift */
1931 2, /* size (0 = byte, 1 = short, 2 = long) */
1932 32, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 nds32_elf_ignore_reloc,/* special_function */
1937 "R_NDS32_RELAX_ENTRY", /* name */
1938 FALSE, /* partial_inplace */
1939 0xffffffff, /* src_mask */
1940 0xffffffff, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942 HOWTO (R_NDS32_GOT_SUFF, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont,/* complain_on_overflow */
1949 nds32_elf_ignore_reloc,/* special_function */
1950 "R_NDS32_GOT_SUFF", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1956 0, /* rightshift */
1957 2, /* size (0 = byte, 1 = short, 2 = long) */
1958 32, /* bitsize */
1959 FALSE, /* pc_relative */
1960 0, /* bitpos */
1961 complain_overflow_bitfield, /* complain_on_overflow */
1962 nds32_elf_ignore_reloc,/* special_function */
1963 "R_NDS32_GOTOFF_SUFF", /* name */
1964 FALSE, /* partial_inplace */
1965 0xffffffff, /* src_mask */
1966 0xffffffff, /* dst_mask */
1967 FALSE), /* pcrel_offset */
1968 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1969 0, /* rightshift */
1970 2, /* size (0 = byte, 1 = short, 2 = long) */
1971 32, /* bitsize */
1972 FALSE, /* pc_relative */
1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_PLT_GOT_SUFF",/* name */
1977 FALSE, /* partial_inplace */
1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
1980 FALSE), /* pcrel_offset */
1981 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1982 0, /* rightshift */
1983 2, /* size (0 = byte, 1 = short, 2 = long) */
1984 32, /* bitsize */
1985 FALSE, /* pc_relative */
1986 0, /* bitpos */
1987 complain_overflow_dont,/* complain_on_overflow */
1988 nds32_elf_ignore_reloc,/* special_function */
1989 "R_NDS32_MULCALL_SUFF",/* name */
1990 FALSE, /* partial_inplace */
1991 0xffffffff, /* src_mask */
1992 0xffffffff, /* dst_mask */
1993 FALSE), /* pcrel_offset */
1994 HOWTO (R_NDS32_PTR, /* type */
1995 0, /* rightshift */
1996 2, /* size (0 = byte, 1 = short, 2 = long) */
1997 32, /* bitsize */
1998 FALSE, /* pc_relative */
1999 0, /* bitpos */
2000 complain_overflow_dont,/* complain_on_overflow */
2001 nds32_elf_ignore_reloc,/* special_function */
2002 "R_NDS32_PTR", /* name */
2003 FALSE, /* partial_inplace */
2004 0xffffffff, /* src_mask */
2005 0xffffffff, /* dst_mask */
2006 FALSE), /* pcrel_offset */
2007 HOWTO (R_NDS32_PTR_COUNT, /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 32, /* bitsize */
2011 FALSE, /* pc_relative */
2012 0, /* bitpos */
2013 complain_overflow_dont,/* complain_on_overflow */
2014 nds32_elf_ignore_reloc,/* special_function */
2015 "R_NDS32_PTR_COUNT", /* name */
2016 FALSE, /* partial_inplace */
2017 0xffffffff, /* src_mask */
2018 0xffffffff, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2021 0, /* rightshift */
2022 2, /* size (0 = byte, 1 = short, 2 = long) */
2023 32, /* bitsize */
2024 FALSE, /* pc_relative */
2025 0, /* bitpos */
2026 complain_overflow_dont,/* complain_on_overflow */
2027 nds32_elf_ignore_reloc,/* special_function */
2028 "R_NDS32_PTR_RESOLVED",/* name */
2029 FALSE, /* partial_inplace */
2030 0xffffffff, /* src_mask */
2031 0xffffffff, /* dst_mask */
2032 FALSE), /* pcrel_offset */
2033 HOWTO (R_NDS32_PLTBLOCK, /* type */
2034 0, /* rightshift */
2035 2, /* size (0 = byte, 1 = short, 2 = long) */
2036 32, /* bitsize */
2037 FALSE, /* pc_relative */
2038 0, /* bitpos */
2039 complain_overflow_dont,/* complain_on_overflow */
2040 nds32_elf_ignore_reloc,/* special_function */
2041 "R_NDS32_PLTBLOCK", /* name */
2042 FALSE, /* partial_inplace */
2043 0xffffffff, /* src_mask */
2044 0xffffffff, /* dst_mask */
2045 FALSE), /* pcrel_offset */
2046 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2047 0, /* rightshift */
2048 2, /* size (0 = byte, 1 = short, 2 = long) */
2049 32, /* bitsize */
2050 FALSE, /* pc_relative */
2051 0, /* bitpos */
2052 complain_overflow_dont,/* complain_on_overflow */
2053 nds32_elf_ignore_reloc,/* special_function */
2054 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2055 FALSE, /* partial_inplace */
2056 0xffffffff, /* src_mask */
2057 0xffffffff, /* dst_mask */
2058 FALSE), /* pcrel_offset */
2059 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2060 0, /* rightshift */
2061 2, /* size (0 = byte, 1 = short, 2 = long) */
2062 32, /* bitsize */
2063 FALSE, /* pc_relative */
2064 0, /* bitpos */
2065 complain_overflow_dont,/* complain_on_overflow */
2066 nds32_elf_ignore_reloc,/* special_function */
2067 "R_NDS32_RELAX_REGION_END", /* name */
2068 FALSE, /* partial_inplace */
2069 0xffffffff, /* src_mask */
2070 0xffffffff, /* dst_mask */
2071 FALSE), /* pcrel_offset */
2072 HOWTO (R_NDS32_MINUEND, /* type */
2073 0, /* rightshift */
2074 2, /* size (0 = byte, 1 = short, 2 = long) */
2075 32, /* bitsize */
2076 FALSE, /* pc_relative */
2077 0, /* bitpos */
2078 complain_overflow_dont,/* complain_on_overflow */
2079 nds32_elf_ignore_reloc,/* special_function */
2080 "R_NDS32_MINUEND", /* name */
2081 FALSE, /* partial_inplace */
2082 0xffffffff, /* src_mask */
2083 0xffffffff, /* dst_mask */
2084 FALSE), /* pcrel_offset */
2085 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2086 0, /* rightshift */
2087 2, /* size (0 = byte, 1 = short, 2 = long) */
2088 32, /* bitsize */
2089 FALSE, /* pc_relative */
2090 0, /* bitpos */
2091 complain_overflow_dont,/* complain_on_overflow */
2092 nds32_elf_ignore_reloc,/* special_function */
2093 "R_NDS32_SUBTRAHEND", /* name */
2094 FALSE, /* partial_inplace */
2095 0xffffffff, /* src_mask */
2096 0xffffffff, /* dst_mask */
2097 FALSE), /* pcrel_offset */
2098 HOWTO (R_NDS32_DIFF8, /* type */
2099 0, /* rightshift */
2100 0, /* size (0 = byte, 1 = short, 2 = long) */
2101 8, /* bitsize */
2102 FALSE, /* pc_relative */
2103 0, /* bitpos */
2104 complain_overflow_dont,/* complain_on_overflow */
2105 nds32_elf_ignore_reloc,/* special_function */
2106 "R_NDS32_DIFF8", /* name */
2107 FALSE, /* partial_inplace */
2108 0x000000ff, /* src_mask */
2109 0x000000ff, /* dst_mask */
2110 FALSE), /* pcrel_offset */
2111 HOWTO (R_NDS32_DIFF16, /* type */
2112 0, /* rightshift */
2113 1, /* size (0 = byte, 1 = short, 2 = long) */
2114 16, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
2117 complain_overflow_dont,/* complain_on_overflow */
2118 nds32_elf_ignore_reloc,/* special_function */
2119 "R_NDS32_DIFF16", /* name */
2120 FALSE, /* partial_inplace */
2121 0x0000ffff, /* src_mask */
2122 0x0000ffff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124 HOWTO (R_NDS32_DIFF32, /* type */
2125 0, /* rightshift */
2126 2, /* size (0 = byte, 1 = short, 2 = long) */
2127 32, /* bitsize */
2128 FALSE, /* pc_relative */
2129 0, /* bitpos */
2130 complain_overflow_dont,/* complain_on_overflow */
2131 nds32_elf_ignore_reloc,/* special_function */
2132 "R_NDS32_DIFF32", /* name */
2133 FALSE, /* partial_inplace */
2134 0xffffffff, /* src_mask */
2135 0xffffffff, /* dst_mask */
2136 FALSE), /* pcrel_offset */
2137 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2138 0, /* rightshift */
2139 0, /* size (0 = byte, 1 = short, 2 = long) */
2140 0, /* bitsize */
2141 FALSE, /* pc_relative */
2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_DIFF_ULEB128",/* name */
2146 FALSE, /* partial_inplace */
2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
2149 FALSE), /* pcrel_offset */
2150 HOWTO (R_NDS32_DATA, /* type */
2151 0, /* rightshift */
2152 2, /* size (0 = byte, 1 = short, 2 = long) */
2153 32, /* bitsize */
2154 FALSE, /* pc_relative */
2155 0, /* bitpos */
2156 complain_overflow_dont,/* complain_on_overflow */
2157 nds32_elf_ignore_reloc,/* special_function */
2158 "R_NDS32_DATA", /* name */
2159 FALSE, /* partial_inplace */
2160 0xffffffff, /* src_mask */
2161 0xffffffff, /* dst_mask */
2162 FALSE), /* pcrel_offset */
2163 HOWTO (R_NDS32_TRAN, /* type */
2164 0, /* rightshift */
2165 2, /* size (0 = byte, 1 = short, 2 = long) */
2166 32, /* bitsize */
2167 FALSE, /* pc_relative */
2168 0, /* bitpos */
2169 complain_overflow_dont,/* complain_on_overflow */
2170 nds32_elf_ignore_reloc,/* special_function */
2171 "R_NDS32_TRAN", /* name */
2172 FALSE, /* partial_inplace */
2173 0xffffffff, /* src_mask */
2174 0xffffffff, /* dst_mask */
2175 FALSE), /* pcrel_offset */
2176 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2177 0, /* rightshift */
2178 2, /* size (0 = byte, 1 = short, 2 = long) */
2179 32, /* bitsize */
2180 FALSE, /* pc_relative */
2181 0, /* bitpos */
2182 complain_overflow_dont, /* complain_on_overflow */
2183 nds32_elf_ignore_reloc, /* special_function */
2184 "R_NDS32_TLS_LE_ADD", /* name */
2185 FALSE, /* partial_inplace */
2186 0xffffffff, /* src_mask */
2187 0xffffffff, /* dst_mask */
2188 FALSE), /* pcrel_offset */
2189 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2190 0, /* rightshift */
2191 2, /* size (0 = byte, 1 = short, 2 = long) */
2192 32, /* bitsize */
2193 FALSE, /* pc_relative */
2194 0, /* bitpos */
2195 complain_overflow_dont, /* complain_on_overflow */
2196 nds32_elf_ignore_reloc, /* special_function */
2197 "R_NDS32_TLS_LE_LS", /* name */
2198 FALSE, /* partial_inplace */
2199 0xffffffff, /* src_mask */
2200 0xffffffff, /* dst_mask */
2201 FALSE), /* pcrel_offset */
2202 HOWTO (R_NDS32_EMPTY, /* type */
2203 0, /* rightshift */
2204 2, /* size (0 = byte, 1 = short, 2 = long) */
2205 32, /* bitsize */
2206 FALSE, /* pc_relative */
2207 0, /* bitpos */
2208 complain_overflow_dont, /* complain_on_overflow */
2209 nds32_elf_ignore_reloc, /* special_function */
2210 "R_NDS32_EMPTY", /* name */
2211 FALSE, /* partial_inplace */
2212 0xffffffff, /* src_mask */
2213 0xffffffff, /* dst_mask */
2214 FALSE), /* pcrel_offset */
2215 };
2216
2217 \f
2218 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
2219 This prototype is the same as qsort (). */
2220
2221 void
2222 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2223 int (*compar) (const void *lhs, const void *rhs))
2224 {
2225 char *ptr = (char *) base;
2226 int i, j;
2227 char *tmp = xmalloc (size);
2228
2229 /* If i is less than j, i is inserted before j.
2230
2231 |---- j ----- i --------------|
2232 \ / \ /
2233 sorted unsorted
2234 */
2235
2236 for (i = 1; i < (int) nmemb; i++)
2237 {
2238 for (j = (i - 1); j >= 0; j--)
2239 if (compar (ptr + i * size, ptr + j * size) >= 0)
2240 break;
2241
2242 j++;
2243
2244 if (i == j)
2245 continue; /* i is in order. */
2246
2247 memcpy (tmp, ptr + i * size, size);
2248 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2249 memcpy (ptr + j * size, tmp, size);
2250 }
2251 free (tmp);
2252 }
2253
2254 /* Sort relocation by r_offset.
2255
2256 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2257 algorithm. Relocations at the same r_offset must keep their order.
2258 For example, RELAX_ENTRY must be the very first relocation entry.
2259
2260 Currently, this function implements insertion-sort.
2261
2262 FIXME: If we already sort them in assembler, why bother sort them
2263 here again? */
2264
2265 static int
2266 compar_reloc (const void *lhs, const void *rhs)
2267 {
2268 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2269 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2270
2271 if (l->r_offset > r->r_offset)
2272 return 1;
2273 else if (l->r_offset == r->r_offset)
2274 return 0;
2275 else
2276 return -1;
2277 }
2278
2279 /* Functions listed below are only used for old relocs.
2280 * nds32_elf_9_pcrel_reloc
2281 * nds32_elf_do_9_pcrel_reloc
2282 * nds32_elf_hi20_reloc
2283 * nds32_elf_relocate_hi20
2284 * nds32_elf_lo12_reloc
2285 * nds32_elf_sda15_reloc
2286 * nds32_elf_generic_reloc
2287 */
2288
2289 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2290
2291 static bfd_reloc_status_type
2292 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2293 void *data, asection *input_section, bfd *output_bfd,
2294 char **error_message ATTRIBUTE_UNUSED)
2295 {
2296 /* This part is from bfd_elf_generic_reloc. */
2297 if (output_bfd != (bfd *) NULL
2298 && (symbol->flags & BSF_SECTION_SYM) == 0
2299 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2300 {
2301 reloc_entry->address += input_section->output_offset;
2302 return bfd_reloc_ok;
2303 }
2304
2305 if (output_bfd != NULL)
2306 {
2307 /* FIXME: See bfd_perform_relocation. Is this right? */
2308 return bfd_reloc_continue;
2309 }
2310
2311 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2312 input_section,
2313 data, reloc_entry->address,
2314 symbol->section,
2315 (symbol->value
2316 + symbol->section->output_section->vma
2317 + symbol->section->output_offset),
2318 reloc_entry->addend);
2319 }
2320
2321 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2322 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2323
2324 static bfd_reloc_status_type
2325 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2326 asection *input_section, bfd_byte *data,
2327 bfd_vma offset,
2328 asection *symbol_section ATTRIBUTE_UNUSED,
2329 bfd_vma symbol_value, bfd_vma addend)
2330 {
2331 bfd_signed_vma relocation;
2332 unsigned short x;
2333 bfd_reloc_status_type status;
2334
2335 /* Sanity check the address (offset in section). */
2336 if (offset > bfd_get_section_limit (abfd, input_section))
2337 return bfd_reloc_outofrange;
2338
2339 relocation = symbol_value + addend;
2340 /* Make it pc relative. */
2341 relocation -= (input_section->output_section->vma
2342 + input_section->output_offset);
2343 /* These jumps mask off the lower two bits of the current address
2344 before doing pcrel calculations. */
2345 relocation -= (offset & -(bfd_vma) 2);
2346
2347 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2348 status = bfd_reloc_overflow;
2349 else
2350 status = bfd_reloc_ok;
2351
2352 x = bfd_getb16 (data + offset);
2353
2354 relocation >>= howto->rightshift;
2355 relocation <<= howto->bitpos;
2356 x = (x & ~howto->dst_mask)
2357 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2358
2359 bfd_putb16 ((bfd_vma) x, data + offset);
2360
2361 return status;
2362 }
2363
2364 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2365 HI20_SLO is for the add3 and load/store with displacement instructions.
2366 HI20 is for the or3 instruction.
2367 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2368 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2369 we must add one to the high 16 bytes (which will get subtracted off when
2370 the low 16 bits are added).
2371 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2372 because there is a carry from the LO12 to the HI20. Here we just save
2373 the information we need; we do the actual relocation when we see the LO12.
2374 This code is copied from the elf32-mips.c. We also support an arbitrary
2375 number of HI20 relocs to be associated with a single LO12 reloc. The
2376 assembler sorts the relocs to ensure each HI20 immediately precedes its
2377 LO12. However if there are multiple copies, the assembler may not find
2378 the real LO12 so it picks the first one it finds. */
2379
2380 struct nds32_hi20
2381 {
2382 struct nds32_hi20 *next;
2383 bfd_byte *addr;
2384 bfd_vma addend;
2385 };
2386
2387 static struct nds32_hi20 *nds32_hi20_list;
2388
2389 static bfd_reloc_status_type
2390 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2391 asymbol *symbol, void *data, asection *input_section,
2392 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2393 {
2394 bfd_reloc_status_type ret;
2395 bfd_vma relocation;
2396 struct nds32_hi20 *n;
2397
2398 /* This part is from bfd_elf_generic_reloc.
2399 If we're relocating, and this an external symbol, we don't want
2400 to change anything. */
2401 if (output_bfd != (bfd *) NULL
2402 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2403 {
2404 reloc_entry->address += input_section->output_offset;
2405 return bfd_reloc_ok;
2406 }
2407
2408 /* Sanity check the address (offset in section). */
2409 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2410 return bfd_reloc_outofrange;
2411
2412 ret = bfd_reloc_ok;
2413 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2414 ret = bfd_reloc_undefined;
2415
2416 if (bfd_is_com_section (symbol->section))
2417 relocation = 0;
2418 else
2419 relocation = symbol->value;
2420
2421 relocation += symbol->section->output_section->vma;
2422 relocation += symbol->section->output_offset;
2423 relocation += reloc_entry->addend;
2424
2425 /* Save the information, and let LO12 do the actual relocation. */
2426 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2427 if (n == NULL)
2428 return bfd_reloc_outofrange;
2429
2430 n->addr = (bfd_byte *) data + reloc_entry->address;
2431 n->addend = relocation;
2432 n->next = nds32_hi20_list;
2433 nds32_hi20_list = n;
2434
2435 if (output_bfd != (bfd *) NULL)
2436 reloc_entry->address += input_section->output_offset;
2437
2438 return ret;
2439 }
2440
2441 /* Handle an NDS32 ELF HI20 reloc. */
2442
2443 static void
2444 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2445 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2446 Elf_Internal_Rela *rello, bfd_byte *contents,
2447 bfd_vma addend)
2448 {
2449 unsigned long insn;
2450 bfd_vma addlo;
2451
2452 insn = bfd_getb32 (contents + relhi->r_offset);
2453
2454 addlo = bfd_getb32 (contents + rello->r_offset);
2455 addlo &= 0xfff;
2456
2457 addend += ((insn & 0xfffff) << 20) + addlo;
2458
2459 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2460 bfd_putb32 (insn, contents + relhi->r_offset);
2461 }
2462
2463 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2464 inplace relocation; this function exists in order to do the
2465 R_NDS32_HI20_[SU]LO relocation described above. */
2466
2467 static bfd_reloc_status_type
2468 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2469 void *data, asection *input_section, bfd *output_bfd,
2470 char **error_message)
2471 {
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2476 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 if (nds32_hi20_list != NULL)
2483 {
2484 struct nds32_hi20 *l;
2485
2486 l = nds32_hi20_list;
2487 while (l != NULL)
2488 {
2489 unsigned long insn;
2490 unsigned long val;
2491 unsigned long vallo;
2492 struct nds32_hi20 *next;
2493
2494 /* Do the HI20 relocation. Note that we actually don't need
2495 to know anything about the LO12 itself, except where to
2496 find the low 12 bits of the addend needed by the LO12. */
2497 insn = bfd_getb32 (l->addr);
2498 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2499 vallo &= 0xfff;
2500 switch (reloc_entry->howto->type)
2501 {
2502 case R_NDS32_LO12S3:
2503 vallo <<= 3;
2504 break;
2505
2506 case R_NDS32_LO12S2:
2507 vallo <<= 2;
2508 break;
2509
2510 case R_NDS32_LO12S1:
2511 vallo <<= 1;
2512 break;
2513
2514 case R_NDS32_LO12S0:
2515 vallo <<= 0;
2516 break;
2517 }
2518
2519 val = ((insn & 0xfffff) << 12) + vallo;
2520 val += l->addend;
2521
2522 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2523 bfd_putb32 ((bfd_vma) insn, l->addr);
2524
2525 next = l->next;
2526 free (l);
2527 l = next;
2528 }
2529
2530 nds32_hi20_list = NULL;
2531 }
2532
2533 /* Now do the LO12 reloc in the usual way.
2534 ??? It would be nice to call bfd_elf_generic_reloc here,
2535 but we have partial_inplace set. bfd_elf_generic_reloc will
2536 pass the handling back to bfd_install_relocation which will install
2537 a section relative addend which is wrong. */
2538 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2539 input_section, output_bfd, error_message);
2540 }
2541
2542 /* Do generic partial_inplace relocation.
2543 This is a local replacement for bfd_elf_generic_reloc. */
2544
2545 static bfd_reloc_status_type
2546 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2547 asymbol *symbol, void *data, asection *input_section,
2548 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2549 {
2550 bfd_reloc_status_type ret;
2551 bfd_vma relocation;
2552 bfd_byte *inplace_address;
2553
2554 /* This part is from bfd_elf_generic_reloc.
2555 If we're relocating, and this an external symbol, we don't want
2556 to change anything. */
2557 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2558 && reloc_entry->addend == 0)
2559 {
2560 reloc_entry->address += input_section->output_offset;
2561 return bfd_reloc_ok;
2562 }
2563
2564 /* Now do the reloc in the usual way.
2565 ??? It would be nice to call bfd_elf_generic_reloc here,
2566 but we have partial_inplace set. bfd_elf_generic_reloc will
2567 pass the handling back to bfd_install_relocation which will install
2568 a section relative addend which is wrong. */
2569
2570 /* Sanity check the address (offset in section). */
2571 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2572 return bfd_reloc_outofrange;
2573
2574 ret = bfd_reloc_ok;
2575 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2576 ret = bfd_reloc_undefined;
2577
2578 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2579 relocation = 0;
2580 else
2581 relocation = symbol->value;
2582
2583 /* Only do this for a final link. */
2584 if (output_bfd == (bfd *) NULL)
2585 {
2586 relocation += symbol->section->output_section->vma;
2587 relocation += symbol->section->output_offset;
2588 }
2589
2590 relocation += reloc_entry->addend;
2591 switch (reloc_entry->howto->type)
2592 {
2593 case R_NDS32_LO12S3:
2594 relocation >>= 3;
2595 break;
2596
2597 case R_NDS32_LO12S2:
2598 relocation >>= 2;
2599 break;
2600
2601 case R_NDS32_LO12S1:
2602 relocation >>= 1;
2603 break;
2604
2605 case R_NDS32_LO12S0:
2606 default:
2607 relocation >>= 0;
2608 break;
2609 }
2610
2611 inplace_address = (bfd_byte *) data + reloc_entry->address;
2612
2613 #define DOIT(x) \
2614 x = ((x & ~reloc_entry->howto->dst_mask) | \
2615 (((x & reloc_entry->howto->src_mask) + relocation) & \
2616 reloc_entry->howto->dst_mask))
2617
2618 switch (reloc_entry->howto->size)
2619 {
2620 case 1:
2621 {
2622 short x = bfd_getb16 (inplace_address);
2623
2624 DOIT (x);
2625 bfd_putb16 ((bfd_vma) x, inplace_address);
2626 }
2627 break;
2628 case 2:
2629 {
2630 unsigned long x = bfd_getb32 (inplace_address);
2631
2632 DOIT (x);
2633 bfd_putb32 ((bfd_vma) x, inplace_address);
2634 }
2635 break;
2636 default:
2637 BFD_ASSERT (0);
2638 }
2639
2640 if (output_bfd != (bfd *) NULL)
2641 reloc_entry->address += input_section->output_offset;
2642
2643 return ret;
2644 }
2645
2646 /* Handle the R_NDS32_SDA15 reloc.
2647 This reloc is used to compute the address of objects in the small data area
2648 and to perform loads and stores from that area.
2649 The lower 15 bits are sign extended and added to the register specified
2650 in the instruction, which is assumed to point to _SDA_BASE_.
2651
2652 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2653 the access size, this must be taken care of. */
2654
2655 static bfd_reloc_status_type
2656 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2657 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2658 asection *input_section, bfd *output_bfd,
2659 char **error_message ATTRIBUTE_UNUSED)
2660 {
2661 /* This part is from bfd_elf_generic_reloc. */
2662 if (output_bfd != (bfd *) NULL
2663 && (symbol->flags & BSF_SECTION_SYM) == 0
2664 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2665 {
2666 reloc_entry->address += input_section->output_offset;
2667 return bfd_reloc_ok;
2668 }
2669
2670 if (output_bfd != NULL)
2671 {
2672 /* FIXME: See bfd_perform_relocation. Is this right? */
2673 return bfd_reloc_continue;
2674 }
2675
2676 /* FIXME: not sure what to do here yet. But then again, the linker
2677 may never call us. */
2678 abort ();
2679 }
2680
2681 /* nds32_elf_ignore_reloc is the special function for
2682 relocation types which don't need to be relocated
2683 like relaxation relocation types.
2684 This function simply return bfd_reloc_ok when it is
2685 invoked. */
2686
2687 static bfd_reloc_status_type
2688 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2689 asymbol *symbol ATTRIBUTE_UNUSED,
2690 void *data ATTRIBUTE_UNUSED, asection *input_section,
2691 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2692 {
2693 if (output_bfd != NULL)
2694 reloc_entry->address += input_section->output_offset;
2695
2696 return bfd_reloc_ok;
2697 }
2698 \f
2699
2700 /* Map BFD reloc types to NDS32 ELF reloc types. */
2701
2702 struct nds32_reloc_map_entry
2703 {
2704 bfd_reloc_code_real_type bfd_reloc_val;
2705 unsigned char elf_reloc_val;
2706 };
2707
2708 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2709 {
2710 {BFD_RELOC_NONE, R_NDS32_NONE},
2711 {BFD_RELOC_16, R_NDS32_16_RELA},
2712 {BFD_RELOC_32, R_NDS32_32_RELA},
2713 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2714 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2715 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2716 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2717 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2718 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2719 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2720 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2721 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2722 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2723 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2724 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2725 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2726 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2727 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2728 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2729 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2730 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2731 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2732 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2733
2734 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2735 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2736 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2737 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2738 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2739 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2740 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2741 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2742 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2743 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2744 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2745 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2746 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2747 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2748 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2749 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2750 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2751 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2752 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2753 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2754 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2755 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2756 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2757 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2758 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2759 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2760 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2761 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2762 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2763 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2764 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2765 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2766 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2767 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2768 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2769 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2770 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2771 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2772 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2773 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2774 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2775 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2776 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2777 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2778 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2779 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2780 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2781 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2782 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2783 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2784 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2785 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2786 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2787 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2788 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2789 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2790 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2791 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2792 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2793 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2794 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2795 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2796 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2797 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2798 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2799 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2800 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2801 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2802 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2803 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2804 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2805 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2806 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2807 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2808 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2809
2810 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2811 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2812 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2813 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2814 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2815 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2816 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2817 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2818 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2819 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2820 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2821 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2822 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2823 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2824 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2825 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2826 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2827 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2828 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2829 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2830 };
2831
2832 /* Patch tag. */
2833
2834 static reloc_howto_type *
2835 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2836 const char *r_name)
2837 {
2838 unsigned int i;
2839
2840 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2841 if (nds32_elf_howto_table[i].name != NULL
2842 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2843 return &nds32_elf_howto_table[i];
2844
2845 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2846 if (nds32_elf_relax_howto_table[i].name != NULL
2847 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2848 return &nds32_elf_relax_howto_table[i];
2849
2850 return NULL;
2851 }
2852
2853 static reloc_howto_type *
2854 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2855 {
2856 if (code < R_NDS32_RELAX_ENTRY)
2857 {
2858 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2859 return &nds32_elf_howto_table[code];
2860 }
2861 else
2862 {
2863 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2864 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2865 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2866 }
2867 }
2868
2869 static reloc_howto_type *
2870 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2871 bfd_reloc_code_real_type code)
2872 {
2873 unsigned int i;
2874
2875 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2876 {
2877 if (nds32_reloc_map[i].bfd_reloc_val == code)
2878 return bfd_elf32_bfd_reloc_type_table_lookup
2879 (nds32_reloc_map[i].elf_reloc_val);
2880 }
2881
2882 return NULL;
2883 }
2884
2885 /* Set the howto pointer for an NDS32 ELF reloc. */
2886
2887 static void
2888 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2889 Elf_Internal_Rela *dst)
2890 {
2891 enum elf_nds32_reloc_type r_type;
2892
2893 r_type = ELF32_R_TYPE (dst->r_info);
2894 if (r_type > R_NDS32_GNU_VTENTRY)
2895 {
2896 /* xgettext:c-format */
2897 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
2898 r_type = 0;
2899 }
2900 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2901 }
2902
2903 static void
2904 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2905 Elf_Internal_Rela *dst)
2906 {
2907 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2908 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2909 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2910 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2911 }
2912
2913 /* Support for core dump NOTE sections.
2914 Reference to include/linux/elfcore.h in Linux. */
2915
2916 static bfd_boolean
2917 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2918 {
2919 int offset;
2920 size_t size;
2921
2922 switch (note->descsz)
2923 {
2924 case 0x114:
2925 /* Linux/NDS32 32-bit, ABI1 */
2926
2927 /* pr_cursig */
2928 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2929
2930 /* pr_pid */
2931 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2932
2933 /* pr_reg */
2934 offset = 72;
2935 size = 200;
2936 break;
2937
2938 case 0xfc:
2939 /* Linux/NDS32 32-bit */
2940
2941 /* pr_cursig */
2942 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2943
2944 /* pr_pid */
2945 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2946
2947 /* pr_reg */
2948 offset = 72;
2949 size = 176;
2950 break;
2951
2952 default:
2953 return FALSE;
2954 }
2955
2956 /* Make a ".reg" section. */
2957 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2958 size, note->descpos + offset);
2959 }
2960
2961 static bfd_boolean
2962 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2963 {
2964 switch (note->descsz)
2965 {
2966 case 124:
2967 /* Linux/NDS32 */
2968
2969 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2970 elf_tdata (abfd)->core->program =
2971 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2972 elf_tdata (abfd)->core->command =
2973 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2974 break;
2975
2976 default:
2977 return FALSE;
2978 }
2979
2980 /* Note that for some reason, a spurious space is tacked
2981 onto the end of the args in some (at least one anyway)
2982 implementations, so strip it off if it exists. */
2983 {
2984 char *command = elf_tdata (abfd)->core->command;
2985 int n = strlen (command);
2986
2987 if (0 < n && command[n - 1] == ' ')
2988 command[n - 1] = '\0';
2989 }
2990
2991 return TRUE;
2992 }
2993
2994 /* Hook called by the linker routine which adds symbols from an object
2995 file. We must handle the special NDS32 section numbers here.
2996 We also keep watching for whether we need to create the sdata special
2997 linker sections. */
2998
2999 static bfd_boolean
3000 nds32_elf_add_symbol_hook (bfd *abfd,
3001 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3002 Elf_Internal_Sym *sym,
3003 const char **namep ATTRIBUTE_UNUSED,
3004 flagword *flagsp ATTRIBUTE_UNUSED,
3005 asection **secp, bfd_vma *valp)
3006 {
3007 switch (sym->st_shndx)
3008 {
3009 case SHN_COMMON:
3010 /* Common symbols less than the GP size are automatically
3011 treated as SHN_MIPS_SCOMMON symbols. */
3012 if (sym->st_size > elf_gp_size (abfd)
3013 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3014 break;
3015
3016 /* st_value is the alignemnt constraint.
3017 That might be its actual size if it is an array or structure. */
3018 switch (sym->st_value)
3019 {
3020 case 1:
3021 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3022 break;
3023 case 2:
3024 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3025 break;
3026 case 4:
3027 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3028 break;
3029 case 8:
3030 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3031 break;
3032 default:
3033 return TRUE;
3034 }
3035
3036 (*secp)->flags |= SEC_IS_COMMON;
3037 *valp = sym->st_size;
3038 break;
3039 }
3040
3041 return TRUE;
3042 }
3043
3044
3045 /* This function can figure out the best location for a base register to access
3046 data relative to this base register
3047 INPUT:
3048 sda_d0: size of first DOUBLE WORD data section
3049 sda_w0: size of first WORD data section
3050 sda_h0: size of first HALF WORD data section
3051 sda_b : size of BYTE data section
3052 sda_hi: size of second HALF WORD data section
3053 sda_w1: size of second WORD data section
3054 sda_d1: size of second DOUBLE WORD data section
3055 OUTPUT:
3056 offset (always positive) from the beginning of sda_d0 if OK
3057 a negative error value if fail
3058 NOTE:
3059 these 7 sections have to be located back to back if exist
3060 a pass in 0 value for non-existing section */
3061
3062 /* Due to the interpretation of simm15 field of load/store depending on
3063 data accessing size, the organization of base register relative data shall
3064 like the following figure
3065 -------------------------------------------
3066 | DOUBLE WORD sized data (range +/- 128K)
3067 -------------------------------------------
3068 | WORD sized data (range +/- 64K)
3069 -------------------------------------------
3070 | HALF WORD sized data (range +/- 32K)
3071 -------------------------------------------
3072 | BYTE sized data (range +/- 16K)
3073 -------------------------------------------
3074 | HALF WORD sized data (range +/- 32K)
3075 -------------------------------------------
3076 | WORD sized data (range +/- 64K)
3077 -------------------------------------------
3078 | DOUBLE WORD sized data (range +/- 128K)
3079 -------------------------------------------
3080 Its base register shall be set to access these data freely. */
3081
3082 /* We have to figure out the SDA_BASE value, so that we can adjust the
3083 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3084 BFD. If we can't find it, we're stuck. We cache it in the ELF
3085 target data. We don't need to adjust the symbol value for an
3086 external symbol if we are producing relocatable output. */
3087
3088 static asection *sda_rela_sec = NULL;
3089
3090 #define SDA_SECTION_NUM 10
3091
3092 static bfd_reloc_status_type
3093 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3094 bfd_vma *psb, bfd_boolean add_symbol)
3095 {
3096 int relax_fp_as_gp;
3097 struct elf_nds32_link_hash_table *table;
3098 struct bfd_link_hash_entry *h, *h2;
3099 long unsigned int total = 0;
3100
3101 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3102 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3103 {
3104 asection *first = NULL, *final = NULL, *temp;
3105 bfd_vma sda_base;
3106 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3107 4 byte-aligned. Therefore, it has to set the first section ".data"
3108 4 byte-aligned. */
3109 static const char sec_name[SDA_SECTION_NUM][10] =
3110 {
3111 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3112 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3113 };
3114 size_t i = 0;
3115
3116 if (output_bfd->sections == NULL)
3117 {
3118 *psb = elf_gp (output_bfd);
3119 return bfd_reloc_ok;
3120 }
3121
3122 /* Get the first and final section. */
3123 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3124 {
3125 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3126 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3127 first = temp;
3128 if (temp && (temp->size != 0 || temp->rawsize != 0))
3129 final = temp;
3130
3131 /* Summarize the sections in order to check if joining .bss. */
3132 if (temp && temp->size != 0)
3133 total += temp->size;
3134 else if (temp && temp->rawsize != 0)
3135 total += temp->rawsize;
3136
3137 i++;
3138 }
3139
3140 /* Check .bss size. */
3141 temp = bfd_get_section_by_name (output_bfd, ".bss");
3142 if (temp)
3143 {
3144 if (temp->size != 0)
3145 total += temp->size;
3146 else if (temp->rawsize != 0)
3147 total += temp->rawsize;
3148
3149 if (total < 0x80000)
3150 {
3151 if (!first && (temp->size != 0 || temp->rawsize != 0))
3152 first = temp;
3153 if ((temp->size != 0 || temp->rawsize != 0))
3154 final = temp;
3155 }
3156 }
3157
3158 if (first && final)
3159 {
3160 /* The middle of data region. */
3161 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3162
3163 /* Find the section sda_base located. */
3164 i = 0;
3165 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3166 {
3167 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3168 if (final && (final->size != 0 || final->rawsize != 0)
3169 && sda_base >= final->vma)
3170 {
3171 first = final;
3172 i++;
3173 }
3174 else
3175 break;
3176 }
3177 }
3178 else
3179 {
3180 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3181 first output section. */
3182 first = output_bfd->sections;
3183 while (first && first->size == 0 && first->rawsize == 0)
3184 first = first->next;
3185 if (!first)
3186 {
3187 *psb = elf_gp (output_bfd);
3188 return bfd_reloc_ok;
3189 }
3190 sda_base = first->vma + first->rawsize;
3191 }
3192
3193 sda_base -= first->vma;
3194 sda_base = sda_base & (~7);
3195
3196 if (!_bfd_generic_link_add_one_symbol
3197 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3198 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3199 get_elf_backend_data (output_bfd)->collect, &h))
3200 return FALSE;
3201
3202 sda_rela_sec = first;
3203
3204 table = nds32_elf_hash_table (info);
3205 relax_fp_as_gp = table->relax_fp_as_gp;
3206 if (relax_fp_as_gp)
3207 {
3208 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3209 FALSE, FALSE, FALSE);
3210 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3211 And set FP equal to SDA_BASE to do relaxation for
3212 la $fp, _FP_BASE_. */
3213 if (!_bfd_generic_link_add_one_symbol
3214 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3215 first, (bfd_vma) sda_base, (const char *) NULL,
3216 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3217 return FALSE;
3218 }
3219 }
3220
3221 if (add_symbol)
3222 {
3223 if (h)
3224 {
3225 /* Now set gp. */
3226 elf_gp (output_bfd) = (h->u.def.value
3227 + h->u.def.section->output_section->vma
3228 + h->u.def.section->output_offset);
3229 }
3230 else
3231 {
3232 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_."));
3233 return bfd_reloc_dangerous;
3234 }
3235 }
3236
3237 *psb = h->u.def.value + h->u.def.section->output_section->vma
3238 + h->u.def.section->output_offset;
3239 return bfd_reloc_ok;
3240 }
3241 \f
3242
3243 /* Return size of a PLT entry. */
3244 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3245
3246
3247 /* Create an entry in an nds32 ELF linker hash table. */
3248
3249 static struct bfd_hash_entry *
3250 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3251 struct bfd_hash_table *table,
3252 const char *string)
3253 {
3254 struct elf_nds32_link_hash_entry *ret;
3255
3256 ret = (struct elf_nds32_link_hash_entry *) entry;
3257
3258 /* Allocate the structure if it has not already been allocated by a
3259 subclass. */
3260 if (ret == NULL)
3261 ret = (struct elf_nds32_link_hash_entry *)
3262 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3263
3264 if (ret == NULL)
3265 return (struct bfd_hash_entry *) ret;
3266
3267 /* Call the allocation method of the superclass. */
3268 ret = (struct elf_nds32_link_hash_entry *)
3269 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3270
3271 if (ret != NULL)
3272 {
3273 struct elf_nds32_link_hash_entry *eh;
3274
3275 eh = (struct elf_nds32_link_hash_entry *) ret;
3276 eh->dyn_relocs = NULL;
3277 eh->tls_type = GOT_UNKNOWN;
3278 }
3279
3280 return (struct bfd_hash_entry *) ret;
3281 }
3282
3283 /* Create an nds32 ELF linker hash table. */
3284
3285 static struct bfd_link_hash_table *
3286 nds32_elf_link_hash_table_create (bfd *abfd)
3287 {
3288 struct elf_nds32_link_hash_table *ret;
3289
3290 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3291
3292 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3293 if (ret == NULL)
3294 return NULL;
3295
3296 /* patch tag. */
3297 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3298 nds32_elf_link_hash_newfunc,
3299 sizeof (struct elf_nds32_link_hash_entry),
3300 NDS32_ELF_DATA))
3301 {
3302 free (ret);
3303 return NULL;
3304 }
3305
3306 return &ret->root.root;
3307 }
3308
3309 /* Create dynamic sections when linking against a dynamic object. */
3310
3311 static bfd_boolean
3312 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3313 {
3314 struct elf_nds32_link_hash_table *htab;
3315 flagword flags, pltflags;
3316 register asection *s;
3317 const struct elf_backend_data *bed;
3318 int ptralign = 2; /* 32-bit */
3319
3320 bed = get_elf_backend_data (abfd);
3321
3322 htab = nds32_elf_hash_table (info);
3323
3324 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3325 .rel[a].bss sections. */
3326
3327 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3328 | SEC_LINKER_CREATED);
3329
3330 pltflags = flags;
3331 pltflags |= SEC_CODE;
3332 if (bed->plt_not_loaded)
3333 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3334 if (bed->plt_readonly)
3335 pltflags |= SEC_READONLY;
3336
3337 s = bfd_make_section (abfd, ".plt");
3338 htab->root.splt = s;
3339 if (s == NULL
3340 || !bfd_set_section_flags (abfd, s, pltflags)
3341 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3342 return FALSE;
3343
3344 if (bed->want_plt_sym)
3345 {
3346 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3347 .plt section. */
3348 struct bfd_link_hash_entry *bh = NULL;
3349 struct elf_link_hash_entry *h;
3350
3351 if (!(_bfd_generic_link_add_one_symbol
3352 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3353 (bfd_vma) 0, (const char *) NULL, FALSE,
3354 get_elf_backend_data (abfd)->collect, &bh)))
3355 return FALSE;
3356
3357 h = (struct elf_link_hash_entry *) bh;
3358 h->def_regular = 1;
3359 h->type = STT_OBJECT;
3360
3361 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
3362 return FALSE;
3363 }
3364
3365 s = bfd_make_section (abfd,
3366 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3367 htab->root.srelplt = s;
3368 if (s == NULL
3369 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3370 || !bfd_set_section_alignment (abfd, s, ptralign))
3371 return FALSE;
3372
3373 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
3374 return FALSE;
3375
3376 {
3377 const char *secname;
3378 char *relname;
3379 flagword secflags;
3380 asection *sec;
3381
3382 for (sec = abfd->sections; sec; sec = sec->next)
3383 {
3384 secflags = bfd_get_section_flags (abfd, sec);
3385 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3386 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3387 continue;
3388 secname = bfd_get_section_name (abfd, sec);
3389 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3390 strcpy (relname, ".rela");
3391 strcat (relname, secname);
3392 if (bfd_get_section_by_name (abfd, secname))
3393 continue;
3394 s = bfd_make_section (abfd, relname);
3395 if (s == NULL
3396 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3397 || !bfd_set_section_alignment (abfd, s, ptralign))
3398 return FALSE;
3399 }
3400 }
3401
3402 if (bed->want_dynbss)
3403 {
3404 /* The .dynbss section is a place to put symbols which are defined
3405 by dynamic objects, are referenced by regular objects, and are
3406 not functions. We must allocate space for them in the process
3407 image and use a R_*_COPY reloc to tell the dynamic linker to
3408 initialize them at run time. The linker script puts the .dynbss
3409 section into the .bss section of the final image. */
3410 s = bfd_make_section (abfd, ".dynbss");
3411 htab->sdynbss = s;
3412 if (s == NULL
3413 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3414 return FALSE;
3415 /* The .rel[a].bss section holds copy relocs. This section is not
3416 normally needed. We need to create it here, though, so that the
3417 linker will map it to an output section. We can't just create it
3418 only if we need it, because we will not know whether we need it
3419 until we have seen all the input files, and the first time the
3420 main linker code calls BFD after examining all the input files
3421 (size_dynamic_sections) the input sections have already been
3422 mapped to the output sections. If the section turns out not to
3423 be needed, we can discard it later. We will never need this
3424 section when generating a shared object, since they do not use
3425 copy relocs. */
3426 if (!bfd_link_pic (info))
3427 {
3428 s = bfd_make_section (abfd, (bed->default_use_rela_p
3429 ? ".rela.bss" : ".rel.bss"));
3430 htab->srelbss = s;
3431 if (s == NULL
3432 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3433 || !bfd_set_section_alignment (abfd, s, ptralign))
3434 return FALSE;
3435 }
3436 }
3437
3438 return TRUE;
3439 }
3440
3441 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3442 static void
3443 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3444 struct elf_link_hash_entry *dir,
3445 struct elf_link_hash_entry *ind)
3446 {
3447 struct elf_nds32_link_hash_entry *edir, *eind;
3448
3449 edir = (struct elf_nds32_link_hash_entry *) dir;
3450 eind = (struct elf_nds32_link_hash_entry *) ind;
3451
3452 if (eind->dyn_relocs != NULL)
3453 {
3454 if (edir->dyn_relocs != NULL)
3455 {
3456 struct elf_dyn_relocs **pp;
3457 struct elf_dyn_relocs *p;
3458
3459 if (ind->root.type == bfd_link_hash_indirect)
3460 abort ();
3461
3462 /* Add reloc counts against the weak sym to the strong sym
3463 list. Merge any entries against the same section. */
3464 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3465 {
3466 struct elf_dyn_relocs *q;
3467
3468 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3469 if (q->sec == p->sec)
3470 {
3471 q->pc_count += p->pc_count;
3472 q->count += p->count;
3473 *pp = p->next;
3474 break;
3475 }
3476 if (q == NULL)
3477 pp = &p->next;
3478 }
3479 *pp = edir->dyn_relocs;
3480 }
3481
3482 edir->dyn_relocs = eind->dyn_relocs;
3483 eind->dyn_relocs = NULL;
3484 }
3485
3486 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3487 }
3488 \f
3489 /* Find dynamic relocs for H that apply to read-only sections. */
3490
3491 static asection *
3492 readonly_dynrelocs (struct elf_link_hash_entry *h)
3493 {
3494 struct elf_dyn_relocs *p;
3495
3496 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3497 {
3498 asection *s = p->sec->output_section;
3499
3500 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3501 return p->sec;
3502 }
3503 return NULL;
3504 }
3505
3506 /* Adjust a symbol defined by a dynamic object and referenced by a
3507 regular object. The current definition is in some section of the
3508 dynamic object, but we're not including those sections. We have to
3509 change the definition to something the rest of the link can
3510 understand. */
3511
3512 static bfd_boolean
3513 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3514 struct elf_link_hash_entry *h)
3515 {
3516 struct elf_nds32_link_hash_table *htab;
3517 bfd *dynobj;
3518 asection *s;
3519 unsigned int power_of_two;
3520
3521 dynobj = elf_hash_table (info)->dynobj;
3522
3523 /* Make sure we know what is going on here. */
3524 BFD_ASSERT (dynobj != NULL
3525 && (h->needs_plt
3526 || h->is_weakalias
3527 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3528
3529
3530 /* If this is a function, put it in the procedure linkage table. We
3531 will fill in the contents of the procedure linkage table later,
3532 when we know the address of the .got section. */
3533 if (h->type == STT_FUNC || h->needs_plt)
3534 {
3535 if (!bfd_link_pic (info)
3536 && !h->def_dynamic
3537 && !h->ref_dynamic
3538 && h->root.type != bfd_link_hash_undefweak
3539 && h->root.type != bfd_link_hash_undefined)
3540 {
3541 /* This case can occur if we saw a PLT reloc in an input
3542 file, but the symbol was never referred to by a dynamic
3543 object. In such a case, we don't actually need to build
3544 a procedure linkage table, and we can just do a PCREL
3545 reloc instead. */
3546 h->plt.offset = (bfd_vma) - 1;
3547 h->needs_plt = 0;
3548 }
3549
3550 return TRUE;
3551 }
3552 else
3553 h->plt.offset = (bfd_vma) - 1;
3554
3555 /* If this is a weak symbol, and there is a real definition, the
3556 processor independent code will have arranged for us to see the
3557 real definition first, and we can just use the same value. */
3558 if (h->is_weakalias)
3559 {
3560 struct elf_link_hash_entry *def = weakdef (h);
3561 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3562 h->root.u.def.section = def->root.u.def.section;
3563 h->root.u.def.value = def->root.u.def.value;
3564 return TRUE;
3565 }
3566
3567 /* This is a reference to a symbol defined by a dynamic object which
3568 is not a function. */
3569
3570 /* If we are creating a shared library, we must presume that the
3571 only references to the symbol are via the global offset table.
3572 For such cases we need not do anything here; the relocations will
3573 be handled correctly by relocate_section. */
3574 if (bfd_link_pic (info))
3575 return TRUE;
3576
3577 /* If there are no references to this symbol that do not use the
3578 GOT, we don't need to generate a copy reloc. */
3579 if (!h->non_got_ref)
3580 return TRUE;
3581
3582 /* If -z nocopyreloc was given, we won't generate them either. */
3583 if (0 && info->nocopyreloc)
3584 {
3585 h->non_got_ref = 0;
3586 return TRUE;
3587 }
3588
3589 /* If we don't find any dynamic relocs in read-only sections, then
3590 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3591 if (0 && !readonly_dynrelocs (h))
3592 {
3593 h->non_got_ref = 0;
3594 return TRUE;
3595 }
3596
3597 /* We must allocate the symbol in our .dynbss section, which will
3598 become part of the .bss section of the executable. There will be
3599 an entry for this symbol in the .dynsym section. The dynamic
3600 object will contain position independent code, so all references
3601 from the dynamic object to this symbol will go through the global
3602 offset table. The dynamic linker will use the .dynsym entry to
3603 determine the address it must put in the global offset table, so
3604 both the dynamic object and the regular object will refer to the
3605 same memory location for the variable. */
3606
3607 htab = nds32_elf_hash_table (info);
3608 s = htab->sdynbss;
3609 BFD_ASSERT (s != NULL);
3610
3611 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3612 to copy the initial value out of the dynamic object and into the
3613 runtime process image. We need to remember the offset into the
3614 .rela.bss section we are going to use. */
3615 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3616 {
3617 asection *srel;
3618
3619 srel = htab->srelbss;
3620 BFD_ASSERT (srel != NULL);
3621 srel->size += sizeof (Elf32_External_Rela);
3622 h->needs_copy = 1;
3623 }
3624
3625 /* We need to figure out the alignment required for this symbol. I
3626 have no idea how ELF linkers handle this. */
3627 power_of_two = bfd_log2 (h->size);
3628 if (power_of_two > 3)
3629 power_of_two = 3;
3630
3631 /* Apply the required alignment. */
3632 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3633 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3634 {
3635 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3636 return FALSE;
3637 }
3638
3639 /* Define the symbol as being at this point in the section. */
3640 h->root.u.def.section = s;
3641 h->root.u.def.value = s->size;
3642
3643 /* Increment the section size to make room for the symbol. */
3644 s->size += h->size;
3645
3646 return TRUE;
3647 }
3648
3649 /* Allocate space in .plt, .got and associated reloc sections for
3650 dynamic relocs. */
3651
3652 static bfd_boolean
3653 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3654 {
3655 struct bfd_link_info *info;
3656 struct elf_nds32_link_hash_table *htab;
3657 struct elf_nds32_link_hash_entry *eh;
3658 struct elf_dyn_relocs *p;
3659
3660 if (h->root.type == bfd_link_hash_indirect)
3661 return TRUE;
3662
3663 if (h->root.type == bfd_link_hash_warning)
3664 /* When warning symbols are created, they **replace** the "real"
3665 entry in the hash table, thus we never get to see the real
3666 symbol in a hash traversal. So look at it now. */
3667 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3668
3669 info = (struct bfd_link_info *) inf;
3670 htab = nds32_elf_hash_table (info);
3671
3672 eh = (struct elf_nds32_link_hash_entry *) h;
3673
3674 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3675 {
3676 /* Make sure this symbol is output as a dynamic symbol.
3677 Undefined weak syms won't yet be marked as dynamic. */
3678 if (h->dynindx == -1 && !h->forced_local)
3679 {
3680 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3681 return FALSE;
3682 }
3683
3684 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
3685 {
3686 asection *s = htab->root.splt;
3687
3688 /* If this is the first .plt entry, make room for the special
3689 first entry. */
3690 if (s->size == 0)
3691 s->size += PLT_ENTRY_SIZE;
3692
3693 h->plt.offset = s->size;
3694
3695 /* If this symbol is not defined in a regular file, and we are
3696 not generating a shared library, then set the symbol to this
3697 location in the .plt. This is required to make function
3698 pointers compare as equal between the normal executable and
3699 the shared library. */
3700 if (!bfd_link_pic (info) && !h->def_regular)
3701 {
3702 h->root.u.def.section = s;
3703 h->root.u.def.value = h->plt.offset;
3704 }
3705
3706 /* Make room for this entry. */
3707 s->size += PLT_ENTRY_SIZE;
3708
3709 /* We also need to make an entry in the .got.plt section, which
3710 will be placed in the .got section by the linker script. */
3711 htab->root.sgotplt->size += 4;
3712
3713 /* We also need to make an entry in the .rel.plt section. */
3714 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
3715 }
3716 else
3717 {
3718 h->plt.offset = (bfd_vma) - 1;
3719 h->needs_plt = 0;
3720 }
3721 }
3722 else
3723 {
3724 h->plt.offset = (bfd_vma) - 1;
3725 h->needs_plt = 0;
3726 }
3727
3728 if (h->got.refcount > 0)
3729 {
3730 asection *s;
3731 bfd_boolean dyn;
3732 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3733
3734 /* Make sure this symbol is output as a dynamic symbol.
3735 Undefined weak syms won't yet be marked as dynamic. */
3736 if (h->dynindx == -1 && !h->forced_local)
3737 {
3738 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3739 return FALSE;
3740 }
3741
3742 s = htab->root.sgot;
3743 h->got.offset = s->size;
3744
3745 if (tls_type == GOT_UNKNOWN)
3746 abort ();
3747 else if (tls_type == GOT_NORMAL
3748 || tls_type == GOT_TLS_IE)
3749 /* Need a GOT slot. */
3750 s->size += 4;
3751
3752 dyn = htab->root.dynamic_sections_created;
3753 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
3754 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
3755 }
3756 else
3757 h->got.offset = (bfd_vma) - 1;
3758
3759 if (eh->dyn_relocs == NULL)
3760 return TRUE;
3761
3762 /* In the shared -Bsymbolic case, discard space allocated for
3763 dynamic pc-relative relocs against symbols which turn out to be
3764 defined in regular objects. For the normal shared case, discard
3765 space for pc-relative relocs that have become local due to symbol
3766 visibility changes. */
3767
3768 if (bfd_link_pic (info))
3769 {
3770 if (h->def_regular && (h->forced_local || info->symbolic))
3771 {
3772 struct elf_dyn_relocs **pp;
3773
3774 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3775 {
3776 p->count -= p->pc_count;
3777 p->pc_count = 0;
3778 if (p->count == 0)
3779 *pp = p->next;
3780 else
3781 pp = &p->next;
3782 }
3783 }
3784 }
3785 else
3786 {
3787 /* For the non-shared case, discard space for relocs against
3788 symbols which turn out to need copy relocs or are not dynamic. */
3789
3790 if (!h->non_got_ref
3791 && ((h->def_dynamic
3792 && !h->def_regular)
3793 || (htab->root.dynamic_sections_created
3794 && (h->root.type == bfd_link_hash_undefweak
3795 || h->root.type == bfd_link_hash_undefined))))
3796 {
3797 /* Make sure this symbol is output as a dynamic symbol.
3798 Undefined weak syms won't yet be marked as dynamic. */
3799 if (h->dynindx == -1 && !h->forced_local)
3800 {
3801 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3802 return FALSE;
3803 }
3804
3805 /* If that succeeded, we know we'll be keeping all the
3806 relocs. */
3807 if (h->dynindx != -1)
3808 goto keep;
3809 }
3810
3811 eh->dyn_relocs = NULL;
3812
3813 keep:;
3814 }
3815
3816 /* Finally, allocate space. */
3817 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3818 {
3819 asection *sreloc = elf_section_data (p->sec)->sreloc;
3820 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3821 }
3822
3823 return TRUE;
3824 }
3825
3826 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
3827 read-only sections. */
3828
3829 static bfd_boolean
3830 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
3831 {
3832 asection *sec;
3833
3834 if (h->root.type == bfd_link_hash_indirect)
3835 return TRUE;
3836
3837 sec = readonly_dynrelocs (h);
3838 if (sec != NULL)
3839 {
3840 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
3841
3842 info->flags |= DF_TEXTREL;
3843 info->callbacks->minfo
3844 (_("%B: dynamic relocation against `%T' in read-only section `%A'\n"),
3845 sec->owner, h->root.root.string, sec);
3846
3847 /* Not an error, just cut short the traversal. */
3848 return FALSE;
3849 }
3850 return TRUE;
3851 }
3852
3853 /* Set the sizes of the dynamic sections. */
3854
3855 static bfd_boolean
3856 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3857 struct bfd_link_info *info)
3858 {
3859 struct elf_nds32_link_hash_table *htab;
3860 bfd *dynobj;
3861 asection *s;
3862 bfd_boolean relocs;
3863 bfd *ibfd;
3864
3865 htab = nds32_elf_hash_table (info);
3866 dynobj = htab->root.dynobj;
3867 BFD_ASSERT (dynobj != NULL);
3868
3869 if (htab->root.dynamic_sections_created)
3870 {
3871 /* Set the contents of the .interp section to the interpreter. */
3872 if (bfd_link_executable (info) && !info->nointerp)
3873 {
3874 s = bfd_get_section_by_name (dynobj, ".interp");
3875 BFD_ASSERT (s != NULL);
3876 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3877 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3878 }
3879 }
3880
3881 /* Set up .got offsets for local syms, and space for local dynamic
3882 relocs. */
3883 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3884 {
3885 bfd_signed_vma *local_got;
3886 bfd_signed_vma *end_local_got;
3887 bfd_size_type locsymcount;
3888 Elf_Internal_Shdr *symtab_hdr;
3889 asection *srel;
3890
3891 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3892 continue;
3893
3894 for (s = ibfd->sections; s != NULL; s = s->next)
3895 {
3896 struct elf_dyn_relocs *p;
3897
3898 for (p = ((struct elf_dyn_relocs *)
3899 elf_section_data (s)->local_dynrel);
3900 p != NULL; p = p->next)
3901 {
3902 if (!bfd_is_abs_section (p->sec)
3903 && bfd_is_abs_section (p->sec->output_section))
3904 {
3905 /* Input section has been discarded, either because
3906 it is a copy of a linkonce section or due to
3907 linker script /DISCARD/, so we'll be discarding
3908 the relocs too. */
3909 }
3910 else if (p->count != 0)
3911 {
3912 srel = elf_section_data (p->sec)->sreloc;
3913 srel->size += p->count * sizeof (Elf32_External_Rela);
3914 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3915 info->flags |= DF_TEXTREL;
3916 }
3917 }
3918 }
3919
3920 local_got = elf_local_got_refcounts (ibfd);
3921 if (!local_got)
3922 continue;
3923
3924 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3925 locsymcount = symtab_hdr->sh_info;
3926 end_local_got = local_got + locsymcount;
3927 s = htab->root.sgot;
3928 srel = htab->root.srelgot;
3929 for (; local_got < end_local_got; ++local_got)
3930 {
3931 if (*local_got > 0)
3932 {
3933 *local_got = s->size;
3934 s->size += 4;
3935 if (bfd_link_pic (info))
3936 srel->size += sizeof (Elf32_External_Rela);
3937 }
3938 else
3939 *local_got = (bfd_vma) - 1;
3940 }
3941 }
3942
3943 /* Allocate global sym .plt and .got entries, and space for global
3944 sym dynamic relocs. */
3945 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3946
3947 /* We now have determined the sizes of the various dynamic sections.
3948 Allocate memory for them. */
3949 relocs = FALSE;
3950 for (s = dynobj->sections; s != NULL; s = s->next)
3951 {
3952 if ((s->flags & SEC_LINKER_CREATED) == 0)
3953 continue;
3954
3955 if (s == htab->root.splt)
3956 {
3957 /* Strip this section if we don't need it; see the
3958 comment below. */
3959 }
3960 else if (s == htab->root.sgot)
3961 {
3962 got_size += s->size;
3963 }
3964 else if (s == htab->root.sgotplt)
3965 {
3966 got_size += s->size;
3967 }
3968 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3969 {
3970 if (s->size != 0 && s != htab->root.srelplt)
3971 relocs = TRUE;
3972
3973 /* We use the reloc_count field as a counter if we need
3974 to copy relocs into the output file. */
3975 s->reloc_count = 0;
3976 }
3977 else
3978 {
3979 /* It's not one of our sections, so don't allocate space. */
3980 continue;
3981 }
3982
3983 if (s->size == 0)
3984 {
3985 /* If we don't need this section, strip it from the
3986 output file. This is mostly to handle .rela.bss and
3987 .rela.plt. We must create both sections in
3988 create_dynamic_sections, because they must be created
3989 before the linker maps input sections to output
3990 sections. The linker does that before
3991 adjust_dynamic_symbol is called, and it is that
3992 function which decides whether anything needs to go
3993 into these sections. */
3994 s->flags |= SEC_EXCLUDE;
3995 continue;
3996 }
3997
3998 /* Allocate memory for the section contents. We use bfd_zalloc
3999 here in case unused entries are not reclaimed before the
4000 section's contents are written out. This should not happen,
4001 but this way if it does, we get a R_NDS32_NONE reloc instead
4002 of garbage. */
4003 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4004 if (s->contents == NULL)
4005 return FALSE;
4006 }
4007
4008
4009 if (htab->root.dynamic_sections_created)
4010 {
4011 /* Add some entries to the .dynamic section. We fill in the
4012 values later, in nds32_elf_finish_dynamic_sections, but we
4013 must add the entries now so that we get the correct size for
4014 the .dynamic section. The DT_DEBUG entry is filled in by the
4015 dynamic linker and used by the debugger. */
4016 #define add_dynamic_entry(TAG, VAL) \
4017 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4018
4019 if (!bfd_link_pic (info))
4020 {
4021 if (!add_dynamic_entry (DT_DEBUG, 0))
4022 return FALSE;
4023 }
4024
4025 if (htab->root.splt->size != 0)
4026 {
4027 if (!add_dynamic_entry (DT_PLTGOT, 0)
4028 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4029 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4030 || !add_dynamic_entry (DT_JMPREL, 0))
4031 return FALSE;
4032 }
4033
4034 if (relocs)
4035 {
4036 if (!add_dynamic_entry (DT_RELA, 0)
4037 || !add_dynamic_entry (DT_RELASZ, 0)
4038 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4039 return FALSE;
4040
4041 /* If any dynamic relocs apply to a read-only section,
4042 then we need a DT_TEXTREL entry. */
4043 if ((info->flags & DF_TEXTREL) == 0)
4044 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
4045 (void *) info);
4046
4047 if ((info->flags & DF_TEXTREL) != 0)
4048 {
4049 if (!add_dynamic_entry (DT_TEXTREL, 0))
4050 return FALSE;
4051 }
4052 }
4053 }
4054 #undef add_dynamic_entry
4055
4056 return TRUE;
4057 }
4058
4059 static bfd_reloc_status_type
4060 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4061 bfd_vma relocation, bfd_byte *location)
4062 {
4063 int size;
4064 bfd_vma x = 0;
4065 bfd_reloc_status_type flag;
4066 unsigned int rightshift = howto->rightshift;
4067 unsigned int bitpos = howto->bitpos;
4068
4069 /* If the size is negative, negate RELOCATION. This isn't very
4070 general. */
4071 if (howto->size < 0)
4072 relocation = -relocation;
4073
4074 /* Get the value we are going to relocate. */
4075 size = bfd_get_reloc_size (howto);
4076 switch (size)
4077 {
4078 default:
4079 abort ();
4080 break;
4081 case 0:
4082 return bfd_reloc_ok;
4083 case 2:
4084 x = bfd_getb16 (location);
4085 break;
4086 case 4:
4087 x = bfd_getb32 (location);
4088 break;
4089 }
4090
4091 /* Check for overflow. FIXME: We may drop bits during the addition
4092 which we don't check for. We must either check at every single
4093 operation, which would be tedious, or we must do the computations
4094 in a type larger than bfd_vma, which would be inefficient. */
4095 flag = bfd_reloc_ok;
4096 if (howto->complain_on_overflow != complain_overflow_dont)
4097 {
4098 bfd_vma addrmask, fieldmask, signmask, ss;
4099 bfd_vma a, b, sum;
4100
4101 /* Get the values to be added together. For signed and unsigned
4102 relocations, we assume that all values should be truncated to
4103 the size of an address. For bitfields, all the bits matter.
4104 See also bfd_check_overflow. */
4105 fieldmask = N_ONES (howto->bitsize);
4106 signmask = ~fieldmask;
4107 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4108 a = (relocation & addrmask) >> rightshift;
4109 b = (x & howto->src_mask & addrmask) >> bitpos;
4110
4111 switch (howto->complain_on_overflow)
4112 {
4113 case complain_overflow_signed:
4114 /* If any sign bits are set, all sign bits must be set.
4115 That is, A must be a valid negative address after
4116 shifting. */
4117 signmask = ~(fieldmask >> 1);
4118 /* Fall through. */
4119
4120 case complain_overflow_bitfield:
4121 /* Much like the signed check, but for a field one bit
4122 wider. We allow a bitfield to represent numbers in the
4123 range -2**n to 2**n-1, where n is the number of bits in the
4124 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4125 can't overflow, which is exactly what we want. */
4126 ss = a & signmask;
4127 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4128 flag = bfd_reloc_overflow;
4129
4130 /* We only need this next bit of code if the sign bit of B
4131 is below the sign bit of A. This would only happen if
4132 SRC_MASK had fewer bits than BITSIZE. Note that if
4133 SRC_MASK has more bits than BITSIZE, we can get into
4134 trouble; we would need to verify that B is in range, as
4135 we do for A above. */
4136 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4137 ss >>= bitpos;
4138
4139 /* Set all the bits above the sign bit. */
4140 b = (b ^ ss) - ss;
4141
4142 /* Now we can do the addition. */
4143 sum = a + b;
4144
4145 /* See if the result has the correct sign. Bits above the
4146 sign bit are junk now; ignore them. If the sum is
4147 positive, make sure we did not have all negative inputs;
4148 if the sum is negative, make sure we did not have all
4149 positive inputs. The test below looks only at the sign
4150 bits, and it really just
4151 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4152
4153 We mask with addrmask here to explicitly allow an address
4154 wrap-around. The Linux kernel relies on it, and it is
4155 the only way to write assembler code which can run when
4156 loaded at a location 0x80000000 away from the location at
4157 which it is linked. */
4158 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4159 flag = bfd_reloc_overflow;
4160
4161 break;
4162
4163 case complain_overflow_unsigned:
4164 /* Checking for an unsigned overflow is relatively easy:
4165 trim the addresses and add, and trim the result as well.
4166 Overflow is normally indicated when the result does not
4167 fit in the field. However, we also need to consider the
4168 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4169 input is 0x80000000, and bfd_vma is only 32 bits; then we
4170 will get sum == 0, but there is an overflow, since the
4171 inputs did not fit in the field. Instead of doing a
4172 separate test, we can check for this by or-ing in the
4173 operands when testing for the sum overflowing its final
4174 field. */
4175 sum = (a + b) & addrmask;
4176 if ((a | b | sum) & signmask)
4177 flag = bfd_reloc_overflow;
4178 break;
4179
4180 default:
4181 abort ();
4182 }
4183 }
4184
4185 /* Put RELOCATION in the right bits. */
4186 relocation >>= (bfd_vma) rightshift;
4187 relocation <<= (bfd_vma) bitpos;
4188
4189 /* Add RELOCATION to the right bits of X. */
4190 /* FIXME : 090616
4191 Because the relaxation may generate duplicate relocation at one address,
4192 an addition to immediate in the instruction may cause the relocation added
4193 several times.
4194 This bug should be fixed in assembler, but a check is also needed here. */
4195 if (howto->partial_inplace)
4196 x = ((x & ~howto->dst_mask)
4197 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4198 else
4199 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4200
4201
4202 /* Put the relocated value back in the object file. */
4203 switch (size)
4204 {
4205 default:
4206 case 0:
4207 case 1:
4208 case 8:
4209 abort ();
4210 break;
4211 case 2:
4212 bfd_putb16 (x, location);
4213 break;
4214 case 4:
4215 bfd_putb32 (x, location);
4216 break;
4217 }
4218
4219 return flag;
4220 }
4221
4222 static bfd_reloc_status_type
4223 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4224 asection *input_section, bfd_byte *contents,
4225 bfd_vma address, bfd_vma value, bfd_vma addend)
4226 {
4227 bfd_vma relocation;
4228
4229 /* Sanity check the address. */
4230 if (address > bfd_get_section_limit (input_bfd, input_section))
4231 return bfd_reloc_outofrange;
4232
4233 /* This function assumes that we are dealing with a basic relocation
4234 against a symbol. We want to compute the value of the symbol to
4235 relocate to. This is just VALUE, the value of the symbol, plus
4236 ADDEND, any addend associated with the reloc. */
4237 relocation = value + addend;
4238
4239 /* If the relocation is PC relative, we want to set RELOCATION to
4240 the distance between the symbol (currently in RELOCATION) and the
4241 location we are relocating. Some targets (e.g., i386-aout)
4242 arrange for the contents of the section to be the negative of the
4243 offset of the location within the section; for such targets
4244 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4245 simply leave the contents of the section as zero; for such
4246 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4247 need to subtract out the offset of the location within the
4248 section (which is just ADDRESS). */
4249 if (howto->pc_relative)
4250 {
4251 relocation -= (input_section->output_section->vma
4252 + input_section->output_offset);
4253 if (howto->pcrel_offset)
4254 relocation -= address;
4255 }
4256
4257 return nds32_relocate_contents (howto, input_bfd, relocation,
4258 contents + address);
4259 }
4260
4261 static bfd_boolean
4262 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4263 const char *name,
4264 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4265 asection *input_sec,
4266 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4267 {
4268 const char *source;
4269 FILE *sym_ld_script = NULL;
4270 struct elf_nds32_link_hash_table *table;
4271
4272 table = nds32_elf_hash_table (info);
4273 sym_ld_script = table->sym_ld_script;
4274 if (!sym_ld_script)
4275 return TRUE;
4276
4277 if (!h || !name || *name == '\0')
4278 return TRUE;
4279
4280 if (input_sec->flags & SEC_EXCLUDE)
4281 return TRUE;
4282
4283 if (!check_start_export_sym)
4284 {
4285 fprintf (sym_ld_script, "SECTIONS\n{\n");
4286 check_start_export_sym = 1;
4287 }
4288
4289 if (h->root.type == bfd_link_hash_defined
4290 || h->root.type == bfd_link_hash_defweak)
4291 {
4292 if (!h->root.u.def.section->output_section)
4293 return TRUE;
4294
4295 if (bfd_is_const_section (input_sec))
4296 source = input_sec->name;
4297 else
4298 source = input_sec->owner->filename;
4299
4300 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4301 h->root.root.string,
4302 (long) (h->root.u.def.value
4303 + h->root.u.def.section->output_section->vma
4304 + h->root.u.def.section->output_offset), source);
4305 }
4306
4307 return TRUE;
4308 }
4309
4310 /* Relocate an NDS32/D ELF section.
4311 There is some attempt to make this function usable for many architectures,
4312 both for RELA and REL type relocs, if only to serve as a learning tool.
4313
4314 The RELOCATE_SECTION function is called by the new ELF backend linker
4315 to handle the relocations for a section.
4316
4317 The relocs are always passed as Rela structures; if the section
4318 actually uses Rel structures, the r_addend field will always be
4319 zero.
4320
4321 This function is responsible for adjust the section contents as
4322 necessary, and (if using Rela relocs and generating a
4323 relocatable output file) adjusting the reloc addend as
4324 necessary.
4325
4326 This function does not have to worry about setting the reloc
4327 address or the reloc symbol index.
4328
4329 LOCAL_SYMS is a pointer to the swapped in local symbols.
4330
4331 LOCAL_SECTIONS is an array giving the section in the input file
4332 corresponding to the st_shndx field of each local symbol.
4333
4334 The global hash table entry for the global symbols can be found
4335 via elf_sym_hashes (input_bfd).
4336
4337 When generating relocatable output, this function must handle
4338 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4339 going to be the section symbol corresponding to the output
4340 section, which means that the addend must be adjusted
4341 accordingly. */
4342
4343 static bfd_vma
4344 dtpoff_base (struct bfd_link_info *info)
4345 {
4346 /* If tls_sec is NULL, we should have signalled an error already. */
4347 if (elf_hash_table (info)->tls_sec == NULL)
4348 return 0;
4349 return elf_hash_table (info)->tls_sec->vma;
4350 }
4351
4352 static bfd_boolean
4353 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4354 struct bfd_link_info * info,
4355 bfd * input_bfd,
4356 asection * input_section,
4357 bfd_byte * contents,
4358 Elf_Internal_Rela * relocs,
4359 Elf_Internal_Sym * local_syms,
4360 asection ** local_sections)
4361 {
4362 Elf_Internal_Shdr *symtab_hdr;
4363 struct elf_link_hash_entry **sym_hashes;
4364 Elf_Internal_Rela *rel, *relend;
4365 bfd_boolean ret = TRUE; /* Assume success. */
4366 int align = 0;
4367 bfd_reloc_status_type r;
4368 const char *errmsg = NULL;
4369 bfd_vma gp;
4370 struct elf_nds32_link_hash_table *htab;
4371 bfd *dynobj;
4372 bfd_vma *local_got_offsets;
4373 asection *sgot, *splt, *sreloc;
4374 bfd_vma high_address;
4375 struct elf_nds32_link_hash_table *table;
4376 int eliminate_gc_relocs;
4377 bfd_vma fpbase_addr;
4378
4379 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4380 sym_hashes = elf_sym_hashes (input_bfd);
4381 htab = nds32_elf_hash_table (info);
4382 high_address = bfd_get_section_limit (input_bfd, input_section);
4383
4384 dynobj = htab->root.dynobj;
4385 local_got_offsets = elf_local_got_offsets (input_bfd);
4386
4387 sgot = htab->root.sgot;
4388 splt = htab->root.splt;
4389 sreloc = NULL;
4390
4391 rel = relocs;
4392 relend = relocs + input_section->reloc_count;
4393
4394 table = nds32_elf_hash_table (info);
4395 eliminate_gc_relocs = table->eliminate_gc_relocs;
4396 /* By this time, we can adjust the value of _SDA_BASE_. */
4397 if ((!bfd_link_relocatable (info)))
4398 {
4399 is_SDA_BASE_set = 1;
4400 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4401 if (r != bfd_reloc_ok)
4402 return FALSE;
4403 }
4404
4405 if (is_ITB_BASE_set == 0)
4406 {
4407 /* Set the _ITB_BASE_. */
4408 if (!nds32_elf_ex9_itb_base (info))
4409 {
4410 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"),
4411 output_bfd);
4412 bfd_set_error (bfd_error_bad_value);
4413 }
4414 }
4415
4416 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4417 if (!nds32_elf_ifc_reloc ())
4418 _bfd_error_handler (_("error: IFC relocation error."));
4419
4420 /* Relocation for .ex9.itable. */
4421 if (table->target_optimize & NDS32_RELAX_EX9_ON
4422 || (table->ex9_import_file && table->update_ex9_table))
4423 nds32_elf_ex9_reloc_jmp (info);
4424
4425 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4426 the fp value is set as gp, and it has be reverted for instruction
4427 setting fp. */
4428 fpbase_addr = elf_gp (output_bfd);
4429
4430 for (rel = relocs; rel < relend; rel++)
4431 {
4432 enum elf_nds32_reloc_type r_type;
4433 reloc_howto_type *howto = NULL;
4434 unsigned long r_symndx;
4435 struct elf_link_hash_entry *h = NULL;
4436 Elf_Internal_Sym *sym = NULL;
4437 asection *sec;
4438 bfd_vma relocation;
4439
4440 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4441 ensure it's zero (we use REL relocs, not RELA). Therefore this
4442 should be assigning zero to `addend', but for clarity we use
4443 `r_addend'. */
4444
4445 bfd_vma addend = rel->r_addend;
4446 bfd_vma offset = rel->r_offset;
4447
4448 r_type = ELF32_R_TYPE (rel->r_info);
4449 if (r_type >= R_NDS32_max)
4450 {
4451 /* xgettext:c-format */
4452 _bfd_error_handler (_("%B: error: unknown relocation type %d."),
4453 input_bfd, r_type);
4454 bfd_set_error (bfd_error_bad_value);
4455 ret = FALSE;
4456 continue;
4457 }
4458
4459 if (r_type == R_NDS32_GNU_VTENTRY
4460 || r_type == R_NDS32_GNU_VTINHERIT
4461 || r_type == R_NDS32_NONE
4462 || r_type == R_NDS32_RELA_GNU_VTENTRY
4463 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4464 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4465 || r_type == R_NDS32_DATA
4466 || r_type == R_NDS32_TRAN
4467 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
4468 continue;
4469
4470 /* If we enter the fp-as-gp region. Resolve the address
4471 of best fp-base. */
4472 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4473 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4474 {
4475 int dist;
4476
4477 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4478 dist = rel->r_addend >> 16;
4479 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4480 local_syms, symtab_hdr);
4481 }
4482 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4483 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4484 {
4485 fpbase_addr = elf_gp (output_bfd);
4486 }
4487
4488 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4489 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4490 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
4491 continue;
4492
4493 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4494 r_symndx = ELF32_R_SYM (rel->r_info);
4495
4496 /* This is a final link. */
4497 sym = NULL;
4498 sec = NULL;
4499 h = NULL;
4500
4501 if (r_symndx < symtab_hdr->sh_info)
4502 {
4503 /* Local symbol. */
4504 sym = local_syms + r_symndx;
4505 sec = local_sections[r_symndx];
4506
4507 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4508 addend = rel->r_addend;
4509 }
4510 else
4511 {
4512 /* External symbol. */
4513 bfd_boolean warned, ignored, unresolved_reloc;
4514 int symndx = r_symndx - symtab_hdr->sh_info;
4515
4516 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4517 r_symndx, symtab_hdr, sym_hashes, h, sec,
4518 relocation, unresolved_reloc, warned,
4519 ignored);
4520
4521 /* la $fp, _FP_BASE_ is per-function (region).
4522 Handle it specially. */
4523 switch ((int) r_type)
4524 {
4525 case R_NDS32_SDA19S0_RELA:
4526 case R_NDS32_SDA15S0_RELA:
4527 case R_NDS32_20_RELA:
4528 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4529 FP_BASE_NAME) == 0)
4530 {
4531 relocation = fpbase_addr;
4532 break;
4533 }
4534 }
4535
4536 }
4537
4538 if (bfd_link_relocatable (info))
4539 {
4540 /* This is a relocatable link. We don't have to change
4541 anything, unless the reloc is against a section symbol,
4542 in which case we have to adjust according to where the
4543 section symbol winds up in the output section. */
4544 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4545 rel->r_addend += sec->output_offset + sym->st_value;
4546
4547 continue;
4548 }
4549
4550 /* Sanity check the address. */
4551 if (offset > high_address)
4552 {
4553 r = bfd_reloc_outofrange;
4554 goto check_reloc;
4555 }
4556
4557 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4558 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4559 || r_type >= R_NDS32_RELAX_ENTRY)
4560 continue;
4561
4562 switch ((int) r_type)
4563 {
4564 case R_NDS32_GOTOFF:
4565 /* Relocation is relative to the start of the global offset
4566 table (for ld24 rx, #uimm24), e.g. access at label+addend
4567
4568 ld24 rx. #label@GOTOFF + addend
4569 sub rx, r12. */
4570 case R_NDS32_GOTOFF_HI20:
4571 case R_NDS32_GOTOFF_LO12:
4572 case R_NDS32_GOTOFF_LO15:
4573 case R_NDS32_GOTOFF_LO19:
4574 BFD_ASSERT (sgot != NULL);
4575
4576 relocation -= elf_gp (output_bfd);
4577 break;
4578
4579 case R_NDS32_9_PLTREL:
4580 case R_NDS32_25_PLTREL:
4581 /* Relocation is to the entry for this symbol in the
4582 procedure linkage table. */
4583
4584 /* The native assembler will generate a 25_PLTREL reloc
4585 for a local symbol if you assemble a call from one
4586 section to another when using -K pic. */
4587 if (h == NULL)
4588 break;
4589
4590 if (h->forced_local)
4591 break;
4592
4593 /* We didn't make a PLT entry for this symbol. This
4594 happens when statically linking PIC code, or when
4595 using -Bsymbolic. */
4596 if (h->plt.offset == (bfd_vma) - 1)
4597 break;
4598
4599 relocation = (splt->output_section->vma
4600 + splt->output_offset + h->plt.offset);
4601 break;
4602
4603 case R_NDS32_PLT_GOTREL_HI20:
4604 case R_NDS32_PLT_GOTREL_LO12:
4605 case R_NDS32_PLT_GOTREL_LO15:
4606 case R_NDS32_PLT_GOTREL_LO19:
4607 case R_NDS32_PLT_GOTREL_LO20:
4608 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4609 {
4610 /* We didn't make a PLT entry for this symbol. This
4611 happens when statically linking PIC code, or when
4612 using -Bsymbolic. */
4613 relocation -= elf_gp (output_bfd);
4614 break;
4615 }
4616
4617 relocation = (splt->output_section->vma
4618 + splt->output_offset + h->plt.offset);
4619
4620 relocation -= elf_gp (output_bfd);
4621 break;
4622
4623 case R_NDS32_PLTREL_HI20:
4624 case R_NDS32_PLTREL_LO12:
4625
4626 /* Relocation is to the entry for this symbol in the
4627 procedure linkage table. */
4628
4629 /* The native assembler will generate a 25_PLTREL reloc
4630 for a local symbol if you assemble a call from one
4631 section to another when using -K pic. */
4632 if (h == NULL)
4633 break;
4634
4635 if (h->forced_local)
4636 break;
4637
4638 if (h->plt.offset == (bfd_vma) - 1)
4639 /* We didn't make a PLT entry for this symbol. This
4640 happens when statically linking PIC code, or when
4641 using -Bsymbolic. */
4642 break;
4643
4644 if (splt == NULL)
4645 break;
4646
4647 relocation = (splt->output_section->vma
4648 + splt->output_offset
4649 + h->plt.offset + 4)
4650 - (input_section->output_section->vma
4651 + input_section->output_offset
4652 + rel->r_offset);
4653
4654 break;
4655
4656 case R_NDS32_GOTPC20:
4657 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4658 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4659 relocation = elf_gp (output_bfd);
4660 break;
4661
4662 case R_NDS32_GOTPC_HI20:
4663 case R_NDS32_GOTPC_LO12:
4664 {
4665 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4666 bl .+4
4667 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4668 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4669 or
4670 bl .+4
4671 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4672 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4673 */
4674 relocation = elf_gp (output_bfd);
4675 relocation -= (input_section->output_section->vma
4676 + input_section->output_offset + rel->r_offset);
4677 break;
4678 }
4679
4680 case R_NDS32_GOT20:
4681 /* Fall through. */
4682 case R_NDS32_GOT_HI20:
4683 case R_NDS32_GOT_LO12:
4684 case R_NDS32_GOT_LO15:
4685 case R_NDS32_GOT_LO19:
4686 /* Relocation is to the entry for this symbol in the global
4687 offset table. */
4688 BFD_ASSERT (sgot != NULL);
4689
4690 if (h != NULL)
4691 {
4692 bfd_boolean dyn;
4693 bfd_vma off;
4694
4695 off = h->got.offset;
4696 BFD_ASSERT (off != (bfd_vma) - 1);
4697 dyn = htab->root.dynamic_sections_created;
4698 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4699 bfd_link_pic (info),
4700 h)
4701 || (bfd_link_pic (info)
4702 && (info->symbolic
4703 || h->dynindx == -1
4704 || h->forced_local) && h->def_regular))
4705 {
4706 /* This is actually a static link, or it is a
4707 -Bsymbolic link and the symbol is defined
4708 locally, or the symbol was forced to be local
4709 because of a version file. We must initialize
4710 this entry in the global offset table. Since the
4711 offset must always be a multiple of 4, we use the
4712 least significant bit to record whether we have
4713 initialized it already.
4714
4715 When doing a dynamic link, we create a .rela.got
4716 relocation entry to initialize the value. This
4717 is done in the finish_dynamic_symbol routine. */
4718 if ((off & 1) != 0)
4719 off &= ~1;
4720 else
4721 {
4722 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4723 h->got.offset |= 1;
4724 }
4725 }
4726 relocation = sgot->output_section->vma + sgot->output_offset + off
4727 - elf_gp (output_bfd);
4728 }
4729 else
4730 {
4731 bfd_vma off;
4732 bfd_byte *loc;
4733
4734 BFD_ASSERT (local_got_offsets != NULL
4735 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4736
4737 off = local_got_offsets[r_symndx];
4738
4739 /* The offset must always be a multiple of 4. We use
4740 the least significant bit to record whether we have
4741 already processed this entry. */
4742 if ((off & 1) != 0)
4743 off &= ~1;
4744 else
4745 {
4746 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4747
4748 if (bfd_link_pic (info))
4749 {
4750 asection *srelgot;
4751 Elf_Internal_Rela outrel;
4752
4753 /* We need to generate a R_NDS32_RELATIVE reloc
4754 for the dynamic linker. */
4755 srelgot = htab->root.srelgot;
4756 BFD_ASSERT (srelgot != NULL);
4757
4758 outrel.r_offset = (elf_gp (output_bfd)
4759 + sgot->output_offset + off);
4760 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4761 outrel.r_addend = relocation;
4762 loc = srelgot->contents;
4763 loc +=
4764 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4765 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4766 ++srelgot->reloc_count;
4767 }
4768 local_got_offsets[r_symndx] |= 1;
4769 }
4770 relocation = sgot->output_section->vma + sgot->output_offset + off
4771 - elf_gp (output_bfd);
4772 }
4773
4774 break;
4775
4776 case R_NDS32_16_RELA:
4777 case R_NDS32_20_RELA:
4778 case R_NDS32_5_RELA:
4779 case R_NDS32_32_RELA:
4780 case R_NDS32_9_PCREL_RELA:
4781 case R_NDS32_WORD_9_PCREL_RELA:
4782 case R_NDS32_10_UPCREL_RELA:
4783 case R_NDS32_15_PCREL_RELA:
4784 case R_NDS32_17_PCREL_RELA:
4785 case R_NDS32_25_PCREL_RELA:
4786 case R_NDS32_HI20_RELA:
4787 case R_NDS32_LO12S3_RELA:
4788 case R_NDS32_LO12S2_RELA:
4789 case R_NDS32_LO12S2_DP_RELA:
4790 case R_NDS32_LO12S2_SP_RELA:
4791 case R_NDS32_LO12S1_RELA:
4792 case R_NDS32_LO12S0_RELA:
4793 case R_NDS32_LO12S0_ORI_RELA:
4794 if (bfd_link_pic (info) && r_symndx != 0
4795 && (input_section->flags & SEC_ALLOC) != 0
4796 && (eliminate_gc_relocs == 0
4797 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4798 && ((r_type != R_NDS32_9_PCREL_RELA
4799 && r_type != R_NDS32_WORD_9_PCREL_RELA
4800 && r_type != R_NDS32_10_UPCREL_RELA
4801 && r_type != R_NDS32_15_PCREL_RELA
4802 && r_type != R_NDS32_17_PCREL_RELA
4803 && r_type != R_NDS32_25_PCREL_RELA
4804 && !(r_type == R_NDS32_32_RELA
4805 && strcmp (input_section->name, ".eh_frame") == 0))
4806 || (h != NULL && h->dynindx != -1
4807 && (!info->symbolic || !h->def_regular))))
4808 {
4809 Elf_Internal_Rela outrel;
4810 bfd_boolean skip, relocate;
4811 bfd_byte *loc;
4812
4813 /* When generating a shared object, these relocations
4814 are copied into the output file to be resolved at run
4815 time. */
4816
4817 if (sreloc == NULL)
4818 {
4819 const char *name;
4820
4821 name = bfd_elf_string_from_elf_section
4822 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4823 elf_section_data (input_section)->rela.hdr->sh_name);
4824 if (name == NULL)
4825 return FALSE;
4826
4827 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4828 && strcmp (bfd_get_section_name (input_bfd,
4829 input_section),
4830 name + 5) == 0);
4831
4832 sreloc = bfd_get_section_by_name (dynobj, name);
4833 BFD_ASSERT (sreloc != NULL);
4834 }
4835
4836 skip = FALSE;
4837 relocate = FALSE;
4838
4839 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4840 info,
4841 input_section,
4842 rel->r_offset);
4843 if (outrel.r_offset == (bfd_vma) - 1)
4844 skip = TRUE;
4845 else if (outrel.r_offset == (bfd_vma) - 2)
4846 skip = TRUE, relocate = TRUE;
4847 outrel.r_offset += (input_section->output_section->vma
4848 + input_section->output_offset);
4849
4850 if (skip)
4851 memset (&outrel, 0, sizeof outrel);
4852 else if (r_type == R_NDS32_17_PCREL_RELA
4853 || r_type == R_NDS32_15_PCREL_RELA
4854 || r_type == R_NDS32_25_PCREL_RELA)
4855 {
4856 BFD_ASSERT (h != NULL && h->dynindx != -1);
4857 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4858 outrel.r_addend = rel->r_addend;
4859 }
4860 else
4861 {
4862 /* h->dynindx may be -1 if this symbol was marked to
4863 become local. */
4864 if (h == NULL
4865 || ((info->symbolic || h->dynindx == -1)
4866 && h->def_regular))
4867 {
4868 relocate = TRUE;
4869 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4870 outrel.r_addend = relocation + rel->r_addend;
4871 }
4872 else
4873 {
4874 BFD_ASSERT (h->dynindx != -1);
4875 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4876 outrel.r_addend = rel->r_addend;
4877 }
4878 }
4879
4880 loc = sreloc->contents;
4881 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4882 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4883 ++sreloc->reloc_count;
4884
4885 /* If this reloc is against an external symbol, we do
4886 not want to fiddle with the addend. Otherwise, we
4887 need to include the symbol value so that it becomes
4888 an addend for the dynamic reloc. */
4889 if (!relocate)
4890 continue;
4891 }
4892 break;
4893
4894 case R_NDS32_25_ABS_RELA:
4895 if (bfd_link_pic (info))
4896 {
4897 _bfd_error_handler
4898 (_("%B: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
4899 "mode."), input_bfd);
4900 return FALSE;
4901 }
4902 break;
4903
4904 case R_NDS32_9_PCREL:
4905 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4906 contents, offset,
4907 sec, relocation, addend);
4908 goto check_reloc;
4909
4910 case R_NDS32_HI20:
4911 {
4912 Elf_Internal_Rela *lorel;
4913
4914 /* We allow an arbitrary number of HI20 relocs before the
4915 LO12 reloc. This permits gcc to emit the HI and LO relocs
4916 itself. */
4917 for (lorel = rel + 1;
4918 (lorel < relend
4919 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4920 continue;
4921 if (lorel < relend
4922 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4923 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4924 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4925 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4926 {
4927 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4928 contents, relocation + addend);
4929 r = bfd_reloc_ok;
4930 }
4931 else
4932 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
4933 contents, offset, relocation,
4934 addend);
4935 }
4936
4937 goto check_reloc;
4938
4939 case R_NDS32_GOT17S2_RELA:
4940 case R_NDS32_GOT15S2_RELA:
4941 {
4942 bfd_vma off;
4943
4944 BFD_ASSERT (sgot != NULL);
4945
4946 if (h != NULL)
4947 {
4948 bfd_boolean dyn;
4949
4950 off = h->got.offset;
4951 BFD_ASSERT (off != (bfd_vma) - 1);
4952
4953 dyn = htab->root.dynamic_sections_created;
4954 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
4955 (dyn, bfd_link_pic (info), h)
4956 || (bfd_link_pic (info)
4957 && (info->symbolic
4958 || h->dynindx == -1
4959 || h->forced_local)
4960 && h->def_regular))
4961 {
4962 /* This is actually a static link, or it is a
4963 -Bsymbolic link and the symbol is defined
4964 locally, or the symbol was forced to be local
4965 because of a version file. We must initialize
4966 this entry in the global offset table. Since the
4967 offset must always be a multiple of 4, we use the
4968 least significant bit to record whether we have
4969 initialized it already.
4970
4971 When doing a dynamic link, we create a .rela.got
4972 relocation entry to initialize the value. This
4973 is done in the finish_dynamic_symbol routine. */
4974 if ((off & 1) != 0)
4975 off &= ~1;
4976 else
4977 {
4978 bfd_put_32 (output_bfd, relocation,
4979 sgot->contents + off);
4980 h->got.offset |= 1;
4981 }
4982 }
4983 }
4984 else
4985 {
4986 bfd_byte *loc;
4987
4988 BFD_ASSERT (local_got_offsets != NULL
4989 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4990
4991 off = local_got_offsets[r_symndx];
4992
4993 /* The offset must always be a multiple of 4. We use
4994 the least significant bit to record whether we have
4995 already processed this entry. */
4996 if ((off & 1) != 0)
4997 off &= ~1;
4998 else
4999 {
5000 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5001
5002 if (bfd_link_pic (info))
5003 {
5004 asection *srelgot;
5005 Elf_Internal_Rela outrel;
5006
5007 /* We need to generate a R_NDS32_RELATIVE reloc
5008 for the dynamic linker. */
5009 srelgot = htab->root.srelgot;
5010 BFD_ASSERT (srelgot != NULL);
5011
5012 outrel.r_offset = (elf_gp (output_bfd)
5013 + sgot->output_offset + off);
5014 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5015 outrel.r_addend = relocation;
5016 loc = srelgot->contents;
5017 loc +=
5018 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5019 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5020 ++srelgot->reloc_count;
5021 }
5022 local_got_offsets[r_symndx] |= 1;
5023 }
5024 }
5025 relocation = sgot->output_section->vma + sgot->output_offset + off
5026 - elf_gp (output_bfd);
5027 }
5028 if (relocation & align)
5029 {
5030 /* Incorrect alignment. */
5031 _bfd_error_handler
5032 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5033 ret = FALSE;
5034 r = bfd_reloc_dangerous;
5035 goto check_reloc;
5036 }
5037 break;
5038
5039 case R_NDS32_SDA16S3_RELA:
5040 case R_NDS32_SDA15S3_RELA:
5041 case R_NDS32_SDA15S3:
5042 align = 0x7;
5043 goto handle_sda;
5044
5045 case R_NDS32_SDA17S2_RELA:
5046 case R_NDS32_SDA15S2_RELA:
5047 case R_NDS32_SDA12S2_SP_RELA:
5048 case R_NDS32_SDA12S2_DP_RELA:
5049 case R_NDS32_SDA15S2:
5050 case R_NDS32_SDA_FP7U2_RELA:
5051 align = 0x3;
5052 goto handle_sda;
5053
5054 case R_NDS32_SDA18S1_RELA:
5055 case R_NDS32_SDA15S1_RELA:
5056 case R_NDS32_SDA15S1:
5057 align = 0x1;
5058 goto handle_sda;
5059
5060 case R_NDS32_SDA19S0_RELA:
5061 case R_NDS32_SDA15S0_RELA:
5062 case R_NDS32_SDA15S0:
5063 {
5064 align = 0x0;
5065 handle_sda:
5066 BFD_ASSERT (sec != NULL);
5067
5068 /* If the symbol is in the abs section, the out_bfd will be null.
5069 This happens when the relocation has a symbol@GOTOFF. */
5070 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5071 if (r != bfd_reloc_ok)
5072 {
5073 _bfd_error_handler
5074 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5075 ret = FALSE;
5076 goto check_reloc;
5077 }
5078
5079 /* At this point `relocation' contains the object's
5080 address. */
5081 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5082 {
5083 relocation -= fpbase_addr;
5084 }
5085 else
5086 relocation -= gp;
5087 /* Now it contains the offset from _SDA_BASE_. */
5088
5089 /* Make sure alignment is correct. */
5090
5091 if (relocation & align)
5092 {
5093 /* Incorrect alignment. */
5094 _bfd_error_handler
5095 /* xgettext:c-format */
5096 (_("%B(%A): warning: unaligned small data access of type %d."),
5097 input_bfd, input_section, r_type);
5098 ret = FALSE;
5099 goto check_reloc;
5100 }
5101 }
5102
5103 break;
5104 case R_NDS32_17IFC_PCREL_RELA:
5105 case R_NDS32_10IFCU_PCREL_RELA:
5106 /* do nothing */
5107 break;
5108
5109 case R_NDS32_TLS_LE_HI20:
5110 case R_NDS32_TLS_LE_LO12:
5111 case R_NDS32_TLS_LE_20:
5112 case R_NDS32_TLS_LE_15S0:
5113 case R_NDS32_TLS_LE_15S1:
5114 case R_NDS32_TLS_LE_15S2:
5115 if (elf_hash_table (info)->tls_sec != NULL)
5116 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5117 break;
5118 case R_NDS32_TLS_IE_HI20:
5119 case R_NDS32_TLS_IE_LO12S2:
5120 {
5121 /* Relocation is to the entry for this symbol in the global
5122 offset table. */
5123 unsigned int tls_type;
5124 asection *srelgot;
5125 Elf_Internal_Rela outrel;
5126 bfd_vma off;
5127 bfd_byte *loc;
5128 int indx = 0;
5129
5130 BFD_ASSERT (sgot != NULL);
5131 if (h != NULL)
5132 {
5133 bfd_boolean dyn;
5134
5135 off = h->got.offset;
5136 BFD_ASSERT (off != (bfd_vma) - 1);
5137 dyn = htab->root.dynamic_sections_created;
5138 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5139 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5140 && (!bfd_link_pic (info)
5141 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5142 indx = h->dynindx;
5143 }
5144 else
5145 {
5146 /* Never happen currently. */
5147 BFD_ASSERT (local_got_offsets != NULL
5148 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5149
5150 off = local_got_offsets[r_symndx];
5151
5152 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5153 }
5154 relocation = sgot->output_section->vma + sgot->output_offset + off;
5155
5156 if (r_type == R_NDS32_TLS_IE_LO12S2)
5157 break;
5158
5159 /* The offset must always be a multiple of 4. We use
5160 the least significant bit to record whether we have
5161 already processed this entry. */
5162 if ((off & 1) != 0)
5163 off &= ~1;
5164 else
5165 {
5166 bfd_boolean need_relocs = FALSE;
5167 srelgot = htab->root.srelgot;
5168 if ((bfd_link_pic (info) || indx != 0)
5169 && (h == NULL
5170 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5171 || h->root.type != bfd_link_hash_undefweak))
5172 {
5173 need_relocs = TRUE;
5174 BFD_ASSERT (srelgot != NULL);
5175 }
5176 if (tls_type & GOT_TLS_IE)
5177 {
5178 if (need_relocs)
5179 {
5180 if (h->dynindx == 0)
5181 outrel.r_addend = relocation - dtpoff_base (info);
5182 else
5183 outrel.r_addend = 0;
5184 outrel.r_offset = (sgot->output_section->vma
5185 + sgot->output_offset
5186 + off);
5187 outrel.r_info =
5188 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5189
5190 loc = srelgot->contents;
5191 loc +=
5192 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5193 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5194 ++srelgot->reloc_count;
5195 }
5196 else
5197 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5198 sgot->contents + off);
5199 }
5200 }
5201 }
5202 break;
5203
5204 /* DON'T fall through. */
5205
5206 default:
5207 /* OLD_NDS32_RELOC. */
5208
5209 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5210 contents, offset, relocation, addend);
5211 goto check_reloc;
5212 }
5213
5214 switch ((int) r_type)
5215 {
5216 case R_NDS32_20_RELA:
5217 case R_NDS32_5_RELA:
5218 case R_NDS32_9_PCREL_RELA:
5219 case R_NDS32_WORD_9_PCREL_RELA:
5220 case R_NDS32_10_UPCREL_RELA:
5221 case R_NDS32_15_PCREL_RELA:
5222 case R_NDS32_17_PCREL_RELA:
5223 case R_NDS32_25_PCREL_RELA:
5224 case R_NDS32_25_ABS_RELA:
5225 case R_NDS32_HI20_RELA:
5226 case R_NDS32_LO12S3_RELA:
5227 case R_NDS32_LO12S2_RELA:
5228 case R_NDS32_LO12S2_DP_RELA:
5229 case R_NDS32_LO12S2_SP_RELA:
5230 case R_NDS32_LO12S1_RELA:
5231 case R_NDS32_LO12S0_RELA:
5232 case R_NDS32_LO12S0_ORI_RELA:
5233 case R_NDS32_SDA16S3_RELA:
5234 case R_NDS32_SDA17S2_RELA:
5235 case R_NDS32_SDA18S1_RELA:
5236 case R_NDS32_SDA19S0_RELA:
5237 case R_NDS32_SDA15S3_RELA:
5238 case R_NDS32_SDA15S2_RELA:
5239 case R_NDS32_SDA12S2_DP_RELA:
5240 case R_NDS32_SDA12S2_SP_RELA:
5241 case R_NDS32_SDA15S1_RELA:
5242 case R_NDS32_SDA15S0_RELA:
5243 case R_NDS32_SDA_FP7U2_RELA:
5244 case R_NDS32_9_PLTREL:
5245 case R_NDS32_25_PLTREL:
5246 case R_NDS32_GOT20:
5247 case R_NDS32_GOT_HI20:
5248 case R_NDS32_GOT_LO12:
5249 case R_NDS32_GOT_LO15:
5250 case R_NDS32_GOT_LO19:
5251 case R_NDS32_GOT15S2_RELA:
5252 case R_NDS32_GOT17S2_RELA:
5253 case R_NDS32_GOTPC20:
5254 case R_NDS32_GOTPC_HI20:
5255 case R_NDS32_GOTPC_LO12:
5256 case R_NDS32_GOTOFF:
5257 case R_NDS32_GOTOFF_HI20:
5258 case R_NDS32_GOTOFF_LO12:
5259 case R_NDS32_GOTOFF_LO15:
5260 case R_NDS32_GOTOFF_LO19:
5261 case R_NDS32_PLTREL_HI20:
5262 case R_NDS32_PLTREL_LO12:
5263 case R_NDS32_PLT_GOTREL_HI20:
5264 case R_NDS32_PLT_GOTREL_LO12:
5265 case R_NDS32_PLT_GOTREL_LO15:
5266 case R_NDS32_PLT_GOTREL_LO19:
5267 case R_NDS32_PLT_GOTREL_LO20:
5268 case R_NDS32_17IFC_PCREL_RELA:
5269 case R_NDS32_10IFCU_PCREL_RELA:
5270 case R_NDS32_TLS_LE_HI20:
5271 case R_NDS32_TLS_LE_LO12:
5272 case R_NDS32_TLS_IE_HI20:
5273 case R_NDS32_TLS_IE_LO12S2:
5274 case R_NDS32_TLS_LE_20:
5275 case R_NDS32_TLS_LE_15S0:
5276 case R_NDS32_TLS_LE_15S1:
5277 case R_NDS32_TLS_LE_15S2:
5278 /* Instruction related relocs must handle endian properly. */
5279 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
5280 r = nds32_elf_final_link_relocate (howto, input_bfd,
5281 input_section, contents,
5282 rel->r_offset, relocation,
5283 rel->r_addend);
5284 break;
5285
5286 default:
5287 /* All other relocs can use default handler. */
5288 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5289 contents, rel->r_offset,
5290 relocation, rel->r_addend);
5291 break;
5292 }
5293
5294 check_reloc:
5295
5296 if (r != bfd_reloc_ok)
5297 {
5298 /* FIXME: This should be generic enough to go in a utility. */
5299 const char *name;
5300
5301 if (h != NULL)
5302 name = h->root.root.string;
5303 else
5304 {
5305 name = bfd_elf_string_from_elf_section
5306 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5307 if (name == NULL || *name == '\0')
5308 name = bfd_section_name (input_bfd, sec);
5309 }
5310
5311 if (errmsg != NULL)
5312 goto common_error;
5313
5314 switch (r)
5315 {
5316 case bfd_reloc_overflow:
5317 (*info->callbacks->reloc_overflow)
5318 (info, (h ? &h->root : NULL), name, howto->name,
5319 (bfd_vma) 0, input_bfd, input_section, offset);
5320 break;
5321
5322 case bfd_reloc_undefined:
5323 (*info->callbacks->undefined_symbol)
5324 (info, name, input_bfd, input_section, offset, TRUE);
5325 break;
5326
5327 case bfd_reloc_outofrange:
5328 errmsg = _("internal error: out of range error");
5329 goto common_error;
5330
5331 case bfd_reloc_notsupported:
5332 errmsg = _("internal error: unsupported relocation error");
5333 goto common_error;
5334
5335 case bfd_reloc_dangerous:
5336 errmsg = _("internal error: dangerous error");
5337 goto common_error;
5338
5339 default:
5340 errmsg = _("internal error: unknown error");
5341 /* Fall through. */
5342
5343 common_error:
5344 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5345 input_section, offset);
5346 break;
5347 }
5348 }
5349 }
5350
5351 return ret;
5352 }
5353
5354 /* Finish up dynamic symbol handling. We set the contents of various
5355 dynamic sections here. */
5356
5357 static bfd_boolean
5358 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5359 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5360 {
5361 struct elf_nds32_link_hash_table *htab;
5362 bfd_byte *loc;
5363
5364 htab = nds32_elf_hash_table (info);
5365
5366 if (h->plt.offset != (bfd_vma) - 1)
5367 {
5368 asection *splt;
5369 asection *sgot;
5370 asection *srela;
5371
5372 bfd_vma plt_index;
5373 bfd_vma got_offset;
5374 bfd_vma local_plt_offset;
5375 Elf_Internal_Rela rela;
5376
5377 /* This symbol has an entry in the procedure linkage table. Set
5378 it up. */
5379
5380 BFD_ASSERT (h->dynindx != -1);
5381
5382 splt = htab->root.splt;
5383 sgot = htab->root.sgotplt;
5384 srela = htab->root.srelplt;
5385 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5386
5387 /* Get the index in the procedure linkage table which
5388 corresponds to this symbol. This is the index of this symbol
5389 in all the symbols for which we are making plt entries. The
5390 first entry in the procedure linkage table is reserved. */
5391 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5392
5393 /* Get the offset into the .got table of the entry that
5394 corresponds to this function. Each .got entry is 4 bytes.
5395 The first three are reserved. */
5396 got_offset = (plt_index + 3) * 4;
5397
5398 /* Fill in the entry in the procedure linkage table. */
5399 if (!bfd_link_pic (info))
5400 {
5401 unsigned long insn;
5402
5403 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5404 + sgot->output_offset + got_offset) >> 12)
5405 & 0xfffff);
5406 bfd_putb32 (insn, splt->contents + h->plt.offset);
5407
5408 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5409 + sgot->output_offset + got_offset) & 0x0fff)
5410 >> 2);
5411 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5412
5413 insn = PLT_ENTRY_WORD2;
5414 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5415
5416 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5417 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5418
5419 insn = PLT_ENTRY_WORD4
5420 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5421 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5422 local_plt_offset = 12;
5423 }
5424 else
5425 {
5426 /* sda_base must be set at this time. */
5427 unsigned long insn;
5428 long offset;
5429
5430 /* FIXME, sda_base is 65536, it will damage opcode. */
5431 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5432 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5433 - elf_gp (output_bfd);
5434 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5435 bfd_putb32 (insn, splt->contents + h->plt.offset);
5436
5437 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5438 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5439
5440 insn = PLT_PIC_ENTRY_WORD2;
5441 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5442
5443 insn = PLT_PIC_ENTRY_WORD3;
5444 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5445
5446 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5447 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5448
5449 insn = PLT_PIC_ENTRY_WORD5
5450 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5451 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5452
5453 local_plt_offset = 16;
5454 }
5455
5456 /* Fill in the entry in the global offset table,
5457 so it will fall through to the next instruction for the first time. */
5458 bfd_put_32 (output_bfd,
5459 (splt->output_section->vma + splt->output_offset
5460 + h->plt.offset + local_plt_offset),
5461 sgot->contents + got_offset);
5462
5463 /* Fill in the entry in the .rela.plt section. */
5464 rela.r_offset = (sgot->output_section->vma
5465 + sgot->output_offset + got_offset);
5466 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5467 rela.r_addend = 0;
5468 loc = srela->contents;
5469 loc += plt_index * sizeof (Elf32_External_Rela);
5470 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5471
5472 if (!h->def_regular)
5473 {
5474 /* Mark the symbol as undefined, rather than as defined in
5475 the .plt section. Leave the value alone. */
5476 sym->st_shndx = SHN_UNDEF;
5477 if (!h->ref_regular_nonweak)
5478 sym->st_value = 0;
5479 }
5480 }
5481
5482 if (h->got.offset != (bfd_vma) - 1)
5483 {
5484 asection *sgot;
5485 asection *srela;
5486 Elf_Internal_Rela rela;
5487
5488 /* This symbol has an entry in the global offset table.
5489 Set it up. */
5490
5491 sgot = htab->root.sgot;
5492 srela = htab->root.srelgot;
5493 BFD_ASSERT (sgot != NULL && srela != NULL);
5494
5495 rela.r_offset = (sgot->output_section->vma
5496 + sgot->output_offset + (h->got.offset & ~1));
5497
5498 /* If this is a -Bsymbolic link, and the symbol is defined
5499 locally, we just want to emit a RELATIVE reloc. Likewise if
5500 the symbol was forced to be local because of a version file.
5501 The entry in the global offset table will already have been
5502 initialized in the relocate_section function. */
5503 if (bfd_link_pic (info)
5504 && (info->symbolic
5505 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5506 {
5507 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5508 rela.r_addend = (h->root.u.def.value
5509 + h->root.u.def.section->output_section->vma
5510 + h->root.u.def.section->output_offset);
5511 }
5512 else
5513 {
5514 BFD_ASSERT ((h->got.offset & 1) == 0);
5515 bfd_put_32 (output_bfd, (bfd_vma) 0,
5516 sgot->contents + h->got.offset);
5517 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5518 rela.r_addend = 0;
5519 }
5520
5521 loc = srela->contents;
5522 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5523 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5524 ++srela->reloc_count;
5525 }
5526
5527 if (h->needs_copy)
5528 {
5529 asection *s;
5530 Elf_Internal_Rela rela;
5531
5532 /* This symbols needs a copy reloc. Set it up. */
5533
5534 BFD_ASSERT (h->dynindx != -1
5535 && (h->root.type == bfd_link_hash_defined
5536 || h->root.type == bfd_link_hash_defweak));
5537
5538 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5539 BFD_ASSERT (s != NULL);
5540
5541 rela.r_offset = (h->root.u.def.value
5542 + h->root.u.def.section->output_section->vma
5543 + h->root.u.def.section->output_offset);
5544 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5545 rela.r_addend = 0;
5546 loc = s->contents;
5547 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5548 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5549 ++s->reloc_count;
5550 }
5551
5552 /* Mark some specially defined symbols as absolute. */
5553 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5554 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5555 sym->st_shndx = SHN_ABS;
5556
5557 return TRUE;
5558 }
5559
5560
5561 /* Finish up the dynamic sections. */
5562
5563 static bfd_boolean
5564 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5565 {
5566 struct elf_nds32_link_hash_table *htab;
5567 bfd *dynobj;
5568 asection *sdyn;
5569 asection *sgot;
5570
5571 htab = nds32_elf_hash_table (info);
5572 dynobj = htab->root.dynobj;
5573
5574 sgot = htab->root.sgotplt;
5575 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5576
5577 if (htab->root.dynamic_sections_created)
5578 {
5579 asection *splt;
5580 Elf32_External_Dyn *dyncon, *dynconend;
5581
5582 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5583
5584 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5585 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5586
5587 for (; dyncon < dynconend; dyncon++)
5588 {
5589 Elf_Internal_Dyn dyn;
5590 asection *s;
5591
5592 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5593
5594 switch (dyn.d_tag)
5595 {
5596 default:
5597 break;
5598
5599 case DT_PLTGOT:
5600 s = htab->root.sgotplt;
5601 goto get_vma;
5602 case DT_JMPREL:
5603 s = htab->root.srelplt;
5604 get_vma:
5605 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
5606 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5607 break;
5608
5609 case DT_PLTRELSZ:
5610 s = htab->root.srelplt;
5611 dyn.d_un.d_val = s->size;
5612 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5613 break;
5614 }
5615 }
5616
5617 /* Fill in the first entry in the procedure linkage table. */
5618 splt = htab->root.splt;
5619 if (splt && splt->size > 0)
5620 {
5621 if (bfd_link_pic (info))
5622 {
5623 unsigned long insn;
5624 long offset;
5625
5626 /* FIXME, sda_base is 65536, it will damage opcode. */
5627 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5628 offset = sgot->output_section->vma + sgot->output_offset + 4
5629 - elf_gp (output_bfd);
5630 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5631 bfd_putb32 (insn, splt->contents);
5632
5633 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5634 /* here has a typo? */
5635 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5636 bfd_putb32 (insn, splt->contents + 4);
5637
5638 insn = PLT0_PIC_ENTRY_WORD2;
5639 bfd_putb32 (insn, splt->contents + 8);
5640
5641 insn = PLT0_PIC_ENTRY_WORD3;
5642 bfd_putb32 (insn, splt->contents + 12);
5643
5644 insn = PLT0_PIC_ENTRY_WORD4;
5645 bfd_putb32 (insn, splt->contents + 16);
5646
5647 insn = PLT0_PIC_ENTRY_WORD5;
5648 bfd_putb32 (insn, splt->contents + 20);
5649 }
5650 else
5651 {
5652 unsigned long insn;
5653 unsigned long addr;
5654
5655 /* addr = .got + 4 */
5656 addr = sgot->output_section->vma + sgot->output_offset + 4;
5657 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5658 bfd_putb32 (insn, splt->contents);
5659
5660 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5661 bfd_putb32 (insn, splt->contents + 4);
5662
5663 insn = PLT0_ENTRY_WORD2;
5664 bfd_putb32 (insn, splt->contents + 8);
5665
5666 insn = PLT0_ENTRY_WORD3;
5667 bfd_putb32 (insn, splt->contents + 12);
5668
5669 insn = PLT0_ENTRY_WORD4;
5670 bfd_putb32 (insn, splt->contents + 16);
5671 }
5672
5673 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5674 PLT_ENTRY_SIZE;
5675 }
5676 }
5677
5678 /* Fill in the first three entries in the global offset table. */
5679 if (sgot && sgot->size > 0)
5680 {
5681 if (sdyn == NULL)
5682 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5683 else
5684 bfd_put_32 (output_bfd,
5685 sdyn->output_section->vma + sdyn->output_offset,
5686 sgot->contents);
5687 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5688 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5689
5690 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5691 }
5692
5693 return TRUE;
5694 }
5695 \f
5696
5697 /* Set the right machine number. */
5698
5699 static bfd_boolean
5700 nds32_elf_object_p (bfd *abfd)
5701 {
5702 static unsigned int cur_arch = 0;
5703
5704 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5705 {
5706 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5707 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5708 }
5709
5710 switch (cur_arch)
5711 {
5712 default:
5713 case E_N1_ARCH:
5714 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5715 break;
5716 case E_N1H_ARCH:
5717 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5718 break;
5719 case E_NDS_ARCH_STAR_V2_0:
5720 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5721 break;
5722 case E_NDS_ARCH_STAR_V3_0:
5723 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5724 break;
5725 case E_NDS_ARCH_STAR_V3_M:
5726 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5727 break;
5728 }
5729
5730 return TRUE;
5731 }
5732
5733 /* Store the machine number in the flags field. */
5734
5735 static void
5736 nds32_elf_final_write_processing (bfd *abfd,
5737 bfd_boolean linker ATTRIBUTE_UNUSED)
5738 {
5739 unsigned long val;
5740 static unsigned int cur_mach = 0;
5741
5742 if (bfd_mach_n1 != bfd_get_mach (abfd))
5743 {
5744 cur_mach = bfd_get_mach (abfd);
5745 }
5746
5747 switch (cur_mach)
5748 {
5749 case bfd_mach_n1:
5750 /* Only happen when object is empty, since the case is abandon. */
5751 val = E_N1_ARCH;
5752 val |= E_NDS_ABI_AABI;
5753 val |= E_NDS32_ELF_VER_1_4;
5754 break;
5755 case bfd_mach_n1h:
5756 val = E_N1H_ARCH;
5757 break;
5758 case bfd_mach_n1h_v2:
5759 val = E_NDS_ARCH_STAR_V2_0;
5760 break;
5761 case bfd_mach_n1h_v3:
5762 val = E_NDS_ARCH_STAR_V3_0;
5763 break;
5764 case bfd_mach_n1h_v3m:
5765 val = E_NDS_ARCH_STAR_V3_M;
5766 break;
5767 default:
5768 val = 0;
5769 break;
5770 }
5771
5772 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5773 elf_elfheader (abfd)->e_flags |= val;
5774 }
5775
5776 /* Function to keep NDS32 specific file flags. */
5777
5778 static bfd_boolean
5779 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5780 {
5781 BFD_ASSERT (!elf_flags_init (abfd)
5782 || elf_elfheader (abfd)->e_flags == flags);
5783
5784 elf_elfheader (abfd)->e_flags = flags;
5785 elf_flags_init (abfd) = TRUE;
5786 return TRUE;
5787 }
5788
5789 static unsigned int
5790 convert_e_flags (unsigned int e_flags, unsigned int arch)
5791 {
5792 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5793 {
5794 /* From 0.9 to 1.0. */
5795 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5796
5797 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5798 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5799 if (arch == E_NDS_ARCH_STAR_V1_0)
5800 {
5801 /* Done. */
5802 return e_flags;
5803 }
5804 }
5805
5806 /* From 1.0 to 2.0. */
5807 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5808
5809 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5810 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5811
5812 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5813 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5814 return e_flags;
5815 }
5816
5817 static bfd_boolean
5818 nds32_check_vec_size (bfd *ibfd)
5819 {
5820 static unsigned int nds32_vec_size = 0;
5821
5822 asection *sec_t = NULL;
5823 bfd_byte *contents = NULL;
5824
5825 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5826
5827 if (sec_t && sec_t->size >= 4)
5828 {
5829 /* Get vec_size in file. */
5830 unsigned int flag_t;
5831
5832 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
5833 flag_t = bfd_get_32 (ibfd, contents);
5834
5835 /* The value could only be 4 or 16. */
5836
5837 if (!nds32_vec_size)
5838 /* Set if not set yet. */
5839 nds32_vec_size = (flag_t & 0x3);
5840 else if (nds32_vec_size != (flag_t & 0x3))
5841 {
5842 _bfd_error_handler
5843 /* xgettext:c-format */
5844 (_("%B: ISR vector size mismatch"
5845 " with previous modules, previous %u-byte, current %u-byte"),
5846 ibfd,
5847 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5848 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5849 return FALSE;
5850 }
5851 else
5852 /* Only keep the first vec_size section. */
5853 sec_t->flags |= SEC_EXCLUDE;
5854 }
5855
5856 return TRUE;
5857 }
5858
5859 /* Merge backend specific data from an object file to the output
5860 object file when linking. */
5861
5862 static bfd_boolean
5863 nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
5864 {
5865 bfd *obfd = info->output_bfd;
5866 flagword out_flags;
5867 flagword in_flags;
5868 flagword out_16regs;
5869 flagword in_no_mac;
5870 flagword out_no_mac;
5871 flagword in_16regs;
5872 flagword out_version;
5873 flagword in_version;
5874 flagword out_fpu_config;
5875 flagword in_fpu_config;
5876
5877 /* TODO: Revise to use object-attributes instead. */
5878 if (!nds32_check_vec_size (ibfd))
5879 return FALSE;
5880
5881 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5882 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5883 return TRUE;
5884
5885 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5886 {
5887 _bfd_error_handler
5888 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
5889
5890 bfd_set_error (bfd_error_bad_value);
5891 return FALSE;
5892 }
5893
5894 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5895 if (in_version == E_NDS32_ELF_VER_1_2)
5896 {
5897 _bfd_error_handler
5898 (_("%B: warning: Older version of object file encountered, "
5899 "Please recompile with current tool chain."), ibfd);
5900 }
5901
5902 /* We may need to merge V1 and V2 arch object files to V2. */
5903 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5904 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5905 {
5906 /* Need to convert version. */
5907 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5908 == E_NDS_ARCH_STAR_RESERVED)
5909 {
5910 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5911 }
5912 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5913 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5914 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5915 {
5916 elf_elfheader (obfd)->e_flags =
5917 convert_e_flags (elf_elfheader (obfd)->e_flags,
5918 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5919 }
5920 else
5921 {
5922 elf_elfheader (ibfd)->e_flags =
5923 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5924 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5925 }
5926 }
5927
5928 /* Extract some flags. */
5929 in_flags = elf_elfheader (ibfd)->e_flags
5930 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5931 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5932
5933 /* The following flags need special treatment. */
5934 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5935 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5936 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5937
5938 /* Extract some flags. */
5939 out_flags = elf_elfheader (obfd)->e_flags
5940 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5941 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5942
5943 /* The following flags need special treatment. */
5944 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5945 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5946 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5947 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5948 if (!elf_flags_init (obfd))
5949 {
5950 /* If the input is the default architecture then do not
5951 bother setting the flags for the output architecture,
5952 instead allow future merges to do this. If no future
5953 merges ever set these flags then they will retain their
5954 unitialised values, which surprise surprise, correspond
5955 to the default values. */
5956 if (bfd_get_arch_info (ibfd)->the_default)
5957 return TRUE;
5958
5959 elf_flags_init (obfd) = TRUE;
5960 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5961
5962 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5963 && bfd_get_arch_info (obfd)->the_default)
5964 {
5965 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5966 bfd_get_mach (ibfd));
5967 }
5968
5969 return TRUE;
5970 }
5971
5972 /* Check flag compatibility. */
5973 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5974 {
5975 _bfd_error_handler
5976 (_("%B: error: ABI mismatch with previous modules."), ibfd);
5977
5978 bfd_set_error (bfd_error_bad_value);
5979 return FALSE;
5980 }
5981
5982 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5983 {
5984 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5985 {
5986 _bfd_error_handler
5987 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
5988
5989 bfd_set_error (bfd_error_bad_value);
5990 return FALSE;
5991 }
5992 }
5993
5994 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5995 and perf ext1 and DIV are mergerd to perf ext1. */
5996 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
5997 {
5998 elf_elfheader (obfd)->e_flags =
5999 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6000 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6001 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6002 ? E_NDS32_HAS_EXT_INST : 0)
6003 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6004 ? E_NDS32_HAS_EXT_INST : 0)
6005 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6006 | ((in_version > out_version) ? out_version : in_version);
6007 }
6008 else
6009 {
6010 if (in_version != out_version)
6011 _bfd_error_handler
6012 /* xgettext:c-format */
6013 (_("%B: warning: Incompatible elf-versions %s and %s."),
6014 ibfd, nds32_elfver_strtab[out_version],
6015 nds32_elfver_strtab[in_version]);
6016
6017 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6018 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6019 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6020 | (in_version > out_version ? out_version : in_version);
6021 }
6022
6023 return TRUE;
6024 }
6025
6026 /* Display the flags field. */
6027
6028 static bfd_boolean
6029 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6030 {
6031 FILE *file = (FILE *) ptr;
6032
6033 BFD_ASSERT (abfd != NULL && ptr != NULL);
6034
6035 _bfd_elf_print_private_bfd_data (abfd, ptr);
6036
6037 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6038
6039 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6040 {
6041 default:
6042 case E_N1_ARCH:
6043 fprintf (file, _(": n1 instructions"));
6044 break;
6045 case E_N1H_ARCH:
6046 fprintf (file, _(": n1h instructions"));
6047 break;
6048 }
6049
6050 fputc ('\n', file);
6051
6052 return TRUE;
6053 }
6054
6055 static unsigned int
6056 nds32_elf_action_discarded (asection *sec)
6057 {
6058
6059 if (strncmp
6060 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6061 return 0;
6062
6063 return _bfd_elf_default_action_discarded (sec);
6064 }
6065
6066 static asection *
6067 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6068 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6069 Elf_Internal_Sym *sym)
6070 {
6071 if (h != NULL)
6072 switch (ELF32_R_TYPE (rel->r_info))
6073 {
6074 case R_NDS32_GNU_VTINHERIT:
6075 case R_NDS32_GNU_VTENTRY:
6076 case R_NDS32_RELA_GNU_VTINHERIT:
6077 case R_NDS32_RELA_GNU_VTENTRY:
6078 return NULL;
6079 }
6080
6081 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6082 }
6083
6084 /* Look through the relocs for a section during the first phase.
6085 Since we don't do .gots or .plts, we just need to consider the
6086 virtual table relocs for gc. */
6087
6088 static bfd_boolean
6089 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6090 asection *sec, const Elf_Internal_Rela *relocs)
6091 {
6092 Elf_Internal_Shdr *symtab_hdr;
6093 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6094 const Elf_Internal_Rela *rel;
6095 const Elf_Internal_Rela *rel_end;
6096 struct elf_nds32_link_hash_table *htab;
6097 bfd *dynobj;
6098 asection *sreloc = NULL;
6099
6100 if (bfd_link_relocatable (info))
6101 return TRUE;
6102
6103 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6104 sym_hashes = elf_sym_hashes (abfd);
6105 sym_hashes_end =
6106 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6107 if (!elf_bad_symtab (abfd))
6108 sym_hashes_end -= symtab_hdr->sh_info;
6109
6110 htab = nds32_elf_hash_table (info);
6111 dynobj = htab->root.dynobj;
6112
6113 rel_end = relocs + sec->reloc_count;
6114 for (rel = relocs; rel < rel_end; rel++)
6115 {
6116 enum elf_nds32_reloc_type r_type;
6117 struct elf_link_hash_entry *h;
6118 unsigned long r_symndx;
6119 int tls_type, old_tls_type;
6120
6121 r_symndx = ELF32_R_SYM (rel->r_info);
6122 r_type = ELF32_R_TYPE (rel->r_info);
6123 if (r_symndx < symtab_hdr->sh_info)
6124 h = NULL;
6125 else
6126 {
6127 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6128 while (h->root.type == bfd_link_hash_indirect
6129 || h->root.type == bfd_link_hash_warning)
6130 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6131 }
6132
6133 /* Some relocs require a global offset table. We create
6134 got section here, since these relocation need got section
6135 and it is not created yet. */
6136 if (htab->root.sgot == NULL)
6137 {
6138 switch (r_type)
6139 {
6140 case R_NDS32_GOT_HI20:
6141 case R_NDS32_GOT_LO12:
6142 case R_NDS32_GOT_LO15:
6143 case R_NDS32_GOT_LO19:
6144 case R_NDS32_GOT17S2_RELA:
6145 case R_NDS32_GOT15S2_RELA:
6146 case R_NDS32_GOTOFF:
6147 case R_NDS32_GOTOFF_HI20:
6148 case R_NDS32_GOTOFF_LO12:
6149 case R_NDS32_GOTOFF_LO15:
6150 case R_NDS32_GOTOFF_LO19:
6151 case R_NDS32_GOTPC20:
6152 case R_NDS32_GOTPC_HI20:
6153 case R_NDS32_GOTPC_LO12:
6154 case R_NDS32_GOT20:
6155 case R_NDS32_TLS_IE_HI20:
6156 case R_NDS32_TLS_IE_LO12S2:
6157 if (dynobj == NULL)
6158 htab->root.dynobj = dynobj = abfd;
6159 if (!_bfd_elf_create_got_section (dynobj, info))
6160 return FALSE;
6161 break;
6162
6163 default:
6164 break;
6165 }
6166 }
6167
6168 switch ((int) r_type)
6169 {
6170 case R_NDS32_GOT_HI20:
6171 case R_NDS32_GOT_LO12:
6172 case R_NDS32_GOT_LO15:
6173 case R_NDS32_GOT_LO19:
6174 case R_NDS32_GOT20:
6175 case R_NDS32_TLS_IE_HI20:
6176 case R_NDS32_TLS_IE_LO12S2:
6177 switch (r_type)
6178 {
6179 case R_NDS32_TLS_IE_HI20:
6180 case R_NDS32_TLS_IE_LO12S2:
6181 tls_type = GOT_TLS_IE;
6182 break;
6183 default:
6184 tls_type = GOT_NORMAL;
6185 break;
6186 }
6187 if (h != NULL)
6188 {
6189 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6190 h->got.refcount += 1;
6191 }
6192 else
6193 {
6194 bfd_signed_vma *local_got_refcounts;
6195
6196 /* This is a global offset table entry for a local
6197 symbol. */
6198 local_got_refcounts = elf_local_got_refcounts (abfd);
6199 if (local_got_refcounts == NULL)
6200 {
6201 bfd_size_type size;
6202
6203 size = symtab_hdr->sh_info;
6204 size *= sizeof (bfd_signed_vma);
6205 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6206 if (local_got_refcounts == NULL)
6207 return FALSE;
6208 elf_local_got_refcounts (abfd) = local_got_refcounts;
6209 }
6210 local_got_refcounts[r_symndx] += 1;
6211 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6212 }
6213
6214 /* We will already have issued an error message if there
6215 is a TLS/non-TLS mismatch, based on the symbol
6216 type. So just combine any TLS types needed. */
6217 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6218 && tls_type != GOT_NORMAL)
6219 tls_type |= old_tls_type;
6220
6221 if (old_tls_type != tls_type)
6222 {
6223 if (h != NULL)
6224 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6225 else
6226 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6227 }
6228 break;
6229 case R_NDS32_9_PLTREL:
6230 case R_NDS32_25_PLTREL:
6231 case R_NDS32_PLTREL_HI20:
6232 case R_NDS32_PLTREL_LO12:
6233 case R_NDS32_PLT_GOTREL_HI20:
6234 case R_NDS32_PLT_GOTREL_LO12:
6235 case R_NDS32_PLT_GOTREL_LO15:
6236 case R_NDS32_PLT_GOTREL_LO19:
6237 case R_NDS32_PLT_GOTREL_LO20:
6238
6239 /* This symbol requires a procedure linkage table entry. We
6240 actually build the entry in adjust_dynamic_symbol,
6241 because this might be a case of linking PIC code without
6242 linking in any dynamic objects, in which case we don't
6243 need to generate a procedure linkage table after all. */
6244
6245 /* If this is a local symbol, we resolve it directly without
6246 creating a procedure linkage table entry. */
6247 if (h == NULL)
6248 continue;
6249
6250 if (h->forced_local)
6251 break;
6252
6253 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6254 h->needs_plt = 1;
6255 h->plt.refcount += 1;
6256 break;
6257
6258 case R_NDS32_16_RELA:
6259 case R_NDS32_20_RELA:
6260 case R_NDS32_5_RELA:
6261 case R_NDS32_32_RELA:
6262 case R_NDS32_HI20_RELA:
6263 case R_NDS32_LO12S3_RELA:
6264 case R_NDS32_LO12S2_RELA:
6265 case R_NDS32_LO12S2_DP_RELA:
6266 case R_NDS32_LO12S2_SP_RELA:
6267 case R_NDS32_LO12S1_RELA:
6268 case R_NDS32_LO12S0_RELA:
6269 case R_NDS32_LO12S0_ORI_RELA:
6270 case R_NDS32_SDA16S3_RELA:
6271 case R_NDS32_SDA17S2_RELA:
6272 case R_NDS32_SDA18S1_RELA:
6273 case R_NDS32_SDA19S0_RELA:
6274 case R_NDS32_SDA15S3_RELA:
6275 case R_NDS32_SDA15S2_RELA:
6276 case R_NDS32_SDA12S2_DP_RELA:
6277 case R_NDS32_SDA12S2_SP_RELA:
6278 case R_NDS32_SDA15S1_RELA:
6279 case R_NDS32_SDA15S0_RELA:
6280 case R_NDS32_SDA_FP7U2_RELA:
6281 case R_NDS32_15_PCREL_RELA:
6282 case R_NDS32_17_PCREL_RELA:
6283 case R_NDS32_25_PCREL_RELA:
6284
6285 if (h != NULL && !bfd_link_pic (info))
6286 {
6287 h->non_got_ref = 1;
6288 h->plt.refcount += 1;
6289 }
6290
6291 /* If we are creating a shared library, and this is a reloc against
6292 a global symbol, or a non PC relative reloc against a local
6293 symbol, then we need to copy the reloc into the shared library.
6294 However, if we are linking with -Bsymbolic, we do not need to
6295 copy a reloc against a global symbol which is defined in an
6296 object we are including in the link (i.e., DEF_REGULAR is set).
6297 At this point we have not seen all the input files, so it is
6298 possible that DEF_REGULAR is not set now but will be set later
6299 (it is never cleared). We account for that possibility below by
6300 storing information in the dyn_relocs field of the hash table
6301 entry. A similar situation occurs when creating shared libraries
6302 and symbol visibility changes render the symbol local.
6303
6304 If on the other hand, we are creating an executable, we may need
6305 to keep relocations for symbols satisfied by a dynamic library
6306 if we manage to avoid copy relocs for the symbol. */
6307 if ((bfd_link_pic (info)
6308 && (sec->flags & SEC_ALLOC) != 0
6309 && ((r_type != R_NDS32_25_PCREL_RELA
6310 && r_type != R_NDS32_15_PCREL_RELA
6311 && r_type != R_NDS32_17_PCREL_RELA
6312 && !(r_type == R_NDS32_32_RELA
6313 && strcmp (sec->name, ".eh_frame") == 0))
6314 || (h != NULL
6315 && (!info->symbolic
6316 || h->root.type == bfd_link_hash_defweak
6317 || !h->def_regular))))
6318 || (!bfd_link_pic (info)
6319 && (sec->flags & SEC_ALLOC) != 0
6320 && h != NULL
6321 && (h->root.type == bfd_link_hash_defweak
6322 || !h->def_regular)))
6323 {
6324 struct elf_dyn_relocs *p;
6325 struct elf_dyn_relocs **head;
6326
6327 if (dynobj == NULL)
6328 htab->root.dynobj = dynobj = abfd;
6329
6330 /* When creating a shared object, we must copy these
6331 relocs into the output file. We create a reloc
6332 section in dynobj and make room for the reloc. */
6333 if (sreloc == NULL)
6334 {
6335 const char *name;
6336
6337 name = bfd_elf_string_from_elf_section
6338 (abfd, elf_elfheader (abfd)->e_shstrndx,
6339 elf_section_data (sec)->rela.hdr->sh_name);
6340 if (name == NULL)
6341 return FALSE;
6342
6343 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6344 && strcmp (bfd_get_section_name (abfd, sec),
6345 name + 5) == 0);
6346
6347 sreloc = bfd_get_section_by_name (dynobj, name);
6348 if (sreloc == NULL)
6349 {
6350 flagword flags;
6351
6352 sreloc = bfd_make_section (dynobj, name);
6353 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6354 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6355 if ((sec->flags & SEC_ALLOC) != 0)
6356 flags |= SEC_ALLOC | SEC_LOAD;
6357 if (sreloc == NULL
6358 || !bfd_set_section_flags (dynobj, sreloc, flags)
6359 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6360 return FALSE;
6361
6362 elf_section_type (sreloc) = SHT_RELA;
6363 }
6364 elf_section_data (sec)->sreloc = sreloc;
6365 }
6366
6367 /* If this is a global symbol, we count the number of
6368 relocations we need for this symbol. */
6369 if (h != NULL)
6370 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6371 else
6372 {
6373 asection *s;
6374 void *vpp;
6375
6376 Elf_Internal_Sym *isym;
6377 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6378 if (isym == NULL)
6379 return FALSE;
6380
6381 /* Track dynamic relocs needed for local syms too. */
6382 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6383 if (s == NULL)
6384 return FALSE;
6385
6386 vpp = &elf_section_data (s)->local_dynrel;
6387 head = (struct elf_dyn_relocs **) vpp;
6388 }
6389
6390 p = *head;
6391 if (p == NULL || p->sec != sec)
6392 {
6393 bfd_size_type amt = sizeof (*p);
6394 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
6395 if (p == NULL)
6396 return FALSE;
6397 p->next = *head;
6398 *head = p;
6399 p->sec = sec;
6400 p->count = 0;
6401 p->pc_count = 0;
6402 }
6403
6404 p->count += 1;
6405 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6406 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6407 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6408 p->pc_count += 1;
6409 }
6410 break;
6411
6412 /* This relocation describes the C++ object vtable hierarchy.
6413 Reconstruct it for later use during GC. */
6414 case R_NDS32_RELA_GNU_VTINHERIT:
6415 case R_NDS32_GNU_VTINHERIT:
6416 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6417 return FALSE;
6418 break;
6419
6420 /* This relocation describes which C++ vtable entries are actually
6421 used. Record for later use during GC. */
6422 case R_NDS32_GNU_VTENTRY:
6423 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6424 return FALSE;
6425 break;
6426 case R_NDS32_RELA_GNU_VTENTRY:
6427 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6428 return FALSE;
6429 break;
6430 }
6431 }
6432
6433 return TRUE;
6434 }
6435
6436 /* Write VAL in uleb128 format to P, returning a pointer to the
6437 following byte.
6438 This code is copied from elf-attr.c. */
6439
6440 static bfd_byte *
6441 write_uleb128 (bfd_byte *p, unsigned int val)
6442 {
6443 bfd_byte c;
6444 do
6445 {
6446 c = val & 0x7f;
6447 val >>= 7;
6448 if (val)
6449 c |= 0x80;
6450 *(p++) = c;
6451 }
6452 while (val);
6453 return p;
6454 }
6455
6456 static bfd_signed_vma
6457 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6458 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6459 int *pic_ext_target)
6460 {
6461 bfd_signed_vma foff;
6462 bfd_vma symval, addend;
6463 asection *sym_sec;
6464
6465 /* Get the value of the symbol referred to by the reloc. */
6466 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6467 {
6468 Elf_Internal_Sym *isym;
6469
6470 /* A local symbol. */
6471 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6472
6473 if (isym->st_shndx == SHN_UNDEF)
6474 sym_sec = bfd_und_section_ptr;
6475 else if (isym->st_shndx == SHN_ABS)
6476 sym_sec = bfd_abs_section_ptr;
6477 else if (isym->st_shndx == SHN_COMMON)
6478 sym_sec = bfd_com_section_ptr;
6479 else
6480 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6481 symval = isym->st_value + sym_sec->output_section->vma
6482 + sym_sec->output_offset;
6483 }
6484 else
6485 {
6486 unsigned long indx;
6487 struct elf_link_hash_entry *h;
6488 bfd *owner;
6489
6490 /* An external symbol. */
6491 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6492 h = elf_sym_hashes (abfd)[indx];
6493 BFD_ASSERT (h != NULL);
6494
6495 if (h->root.type != bfd_link_hash_defined
6496 && h->root.type != bfd_link_hash_defweak)
6497 /* This appears to be a reference to an undefined
6498 symbol. Just ignore it--it will be caught by the
6499 regular reloc processing. */
6500 return 0;
6501 owner = h->root.u.def.section->owner;
6502 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6503 *pic_ext_target = 1;
6504
6505 if (h->root.u.def.section->flags & SEC_MERGE)
6506 {
6507 sym_sec = h->root.u.def.section;
6508 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6509 elf_section_data (sym_sec)->sec_info,
6510 h->root.u.def.value);
6511 symval = symval + sym_sec->output_section->vma
6512 + sym_sec->output_offset;
6513 }
6514 else
6515 symval = (h->root.u.def.value
6516 + h->root.u.def.section->output_section->vma
6517 + h->root.u.def.section->output_offset);
6518 }
6519
6520 addend = irel->r_addend;
6521
6522 foff = (symval + addend
6523 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6524 return foff;
6525 }
6526
6527 static bfd_vma
6528 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6529 Elf_Internal_Sym *isymbuf,
6530 Elf_Internal_Rela *irel,
6531 Elf_Internal_Shdr *symtab_hdr)
6532 {
6533 bfd_vma symval;
6534
6535 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6536 {
6537 Elf_Internal_Sym *isym;
6538 asection *sym_sec;
6539 /* A local symbol. */
6540 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6541
6542 if (isym->st_shndx == SHN_UNDEF)
6543 sym_sec = bfd_und_section_ptr;
6544 else if (isym->st_shndx == SHN_ABS)
6545 sym_sec = bfd_abs_section_ptr;
6546 else if (isym->st_shndx == SHN_COMMON)
6547 sym_sec = bfd_com_section_ptr;
6548 else
6549 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6550 symval = isym->st_value + sym_sec->output_section->vma
6551 + sym_sec->output_offset;
6552 }
6553 else
6554 {
6555 unsigned long indx;
6556 struct elf_link_hash_entry *h;
6557 struct elf_nds32_link_hash_table *htab;
6558 asection *splt;
6559
6560 /* An external symbol. */
6561 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6562 h = elf_sym_hashes (abfd)[indx];
6563 BFD_ASSERT (h != NULL);
6564 htab = nds32_elf_hash_table (link_info);
6565 splt = htab->root.splt;
6566
6567 while (h->root.type == bfd_link_hash_indirect
6568 || h->root.type == bfd_link_hash_warning)
6569 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6570
6571 if (h->plt.offset == (bfd_vma) - 1)
6572 {
6573 if (h->root.type != bfd_link_hash_defined
6574 && h->root.type != bfd_link_hash_defweak)
6575 /* This appears to be a reference to an undefined
6576 * symbol. Just ignore it--it will be caught by the
6577 * regular reloc processing. */
6578 return 0;
6579 symval = (h->root.u.def.value
6580 + h->root.u.def.section->output_section->vma
6581 + h->root.u.def.section->output_offset);
6582 }
6583 else
6584 symval = splt->output_section->vma + h->plt.offset;
6585 }
6586
6587 return symval;
6588 }
6589
6590 static bfd_signed_vma
6591 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6592 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6593 Elf_Internal_Shdr *symtab_hdr)
6594 {
6595 bfd_vma foff;
6596 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6597 symtab_hdr)) == 0)
6598 return 0;
6599 else
6600 return foff - (irel->r_offset
6601 + sec->output_section->vma + sec->output_offset);
6602 }
6603 \f
6604 /* Convert a 32-bit instruction to 16-bit one.
6605 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6606 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6607 type of INSN16. Return 1 if successful. */
6608
6609 static int
6610 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6611 int *pinsn_type)
6612 {
6613 uint16_t insn16 = 0;
6614 int insn_type = 0;
6615 unsigned long mach = bfd_get_mach (abfd);
6616
6617 if (N32_SH5 (insn) != 0)
6618 return 0;
6619
6620 switch (N32_SUB5 (insn))
6621 {
6622 case N32_ALU1_ADD_SLLI:
6623 case N32_ALU1_ADD_SRLI:
6624 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6625 {
6626 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6627 N32_RB5 (insn));
6628 insn_type = NDS32_INSN_ADD333;
6629 }
6630 else if (N32_IS_RT4 (insn))
6631 {
6632 if (N32_RT5 (insn) == N32_RA5 (insn))
6633 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6634 else if (N32_RT5 (insn) == N32_RB5 (insn))
6635 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6636 insn_type = NDS32_INSN_ADD45;
6637 }
6638 break;
6639
6640 case N32_ALU1_SUB_SLLI:
6641 case N32_ALU1_SUB_SRLI:
6642 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6643 {
6644 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6645 N32_RB5 (insn));
6646 insn_type = NDS32_INSN_SUB333;
6647 }
6648 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6649 {
6650 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6651 insn_type = NDS32_INSN_SUB45;
6652 }
6653 break;
6654
6655 case N32_ALU1_AND_SLLI:
6656 case N32_ALU1_AND_SRLI:
6657 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6658 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6659 && N32_IS_RB3 (insn))
6660 {
6661 if (N32_RT5 (insn) == N32_RA5 (insn))
6662 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6663 else if (N32_RT5 (insn) == N32_RB5 (insn))
6664 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6665 if (insn16)
6666 insn_type = NDS32_INSN_AND33;
6667 }
6668 break;
6669
6670 case N32_ALU1_XOR_SLLI:
6671 case N32_ALU1_XOR_SRLI:
6672 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6673 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6674 && N32_IS_RB3 (insn))
6675 {
6676 if (N32_RT5 (insn) == N32_RA5 (insn))
6677 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6678 else if (N32_RT5 (insn) == N32_RB5 (insn))
6679 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6680 if (insn16)
6681 insn_type = NDS32_INSN_XOR33;
6682 }
6683 break;
6684
6685 case N32_ALU1_OR_SLLI:
6686 case N32_ALU1_OR_SRLI:
6687 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6688 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6689 && N32_IS_RB3 (insn))
6690 {
6691 if (N32_RT5 (insn) == N32_RA5 (insn))
6692 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6693 else if (N32_RT5 (insn) == N32_RB5 (insn))
6694 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6695 if (insn16)
6696 insn_type = NDS32_INSN_OR33;
6697 }
6698 break;
6699 case N32_ALU1_NOR:
6700 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6701 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6702 && N32_RA5 (insn) == N32_RB5 (insn))
6703 {
6704 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6705 insn_type = NDS32_INSN_NOT33;
6706 }
6707 break;
6708 case N32_ALU1_SRAI:
6709 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6710 {
6711 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6712 insn_type = NDS32_INSN_SRAI45;
6713 }
6714 break;
6715
6716 case N32_ALU1_SRLI:
6717 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6718 {
6719 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6720 insn_type = NDS32_INSN_SRLI45;
6721 }
6722 break;
6723
6724 case N32_ALU1_SLLI:
6725 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6726 {
6727 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6728 N32_UB5 (insn));
6729 insn_type = NDS32_INSN_SLLI333;
6730 }
6731 break;
6732
6733 case N32_ALU1_ZEH:
6734 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6735 {
6736 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6737 insn_type = NDS32_INSN_ZEH33;
6738 }
6739 break;
6740
6741 case N32_ALU1_SEB:
6742 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6743 {
6744 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6745 insn_type = NDS32_INSN_SEB33;
6746 }
6747 break;
6748
6749 case N32_ALU1_SEH:
6750 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6751 {
6752 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6753 insn_type = NDS32_INSN_SEH33;
6754 }
6755 break;
6756
6757 case N32_ALU1_SLT:
6758 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6759 {
6760 /* Implicit r15. */
6761 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6762 insn_type = NDS32_INSN_SLT45;
6763 }
6764 break;
6765
6766 case N32_ALU1_SLTS:
6767 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6768 {
6769 /* Implicit r15. */
6770 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6771 insn_type = NDS32_INSN_SLTS45;
6772 }
6773 break;
6774 }
6775
6776 if ((insn16 & 0x8000) == 0)
6777 return 0;
6778
6779 if (pinsn16)
6780 *pinsn16 = insn16;
6781 if (pinsn_type)
6782 *pinsn_type = insn_type;
6783 return 1;
6784 }
6785
6786 static int
6787 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6788 int *pinsn_type)
6789 {
6790 uint16_t insn16 = 0;
6791 int insn_type;
6792 unsigned long mach = bfd_get_mach (abfd);
6793
6794 /* TODO: bset, bclr, btgl, btst. */
6795 if (__GF (insn, 6, 4) != 0)
6796 return 0;
6797
6798 switch (N32_IMMU (insn, 6))
6799 {
6800 case N32_ALU2_MUL:
6801 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6802 && N32_IS_RB3 (insn))
6803 {
6804 if (N32_RT5 (insn) == N32_RA5 (insn))
6805 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6806 else if (N32_RT5 (insn) == N32_RB5 (insn))
6807 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6808 if (insn16)
6809 insn_type = NDS32_INSN_MUL33;
6810 }
6811 }
6812
6813 if ((insn16 & 0x8000) == 0)
6814 return 0;
6815
6816 if (pinsn16)
6817 *pinsn16 = insn16;
6818 if (pinsn_type)
6819 *pinsn_type = insn_type;
6820 return 1;
6821 }
6822
6823 int
6824 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6825 int *pinsn_type)
6826 {
6827 int op6;
6828 uint16_t insn16 = 0;
6829 int insn_type;
6830 unsigned long mach = bfd_get_mach (abfd);
6831
6832 /* Decode 32-bit instruction. */
6833 if (insn & 0x80000000)
6834 {
6835 /* Not 32-bit insn. */
6836 return 0;
6837 }
6838
6839 op6 = N32_OP6 (insn);
6840
6841 /* Convert it to 16-bit instruction. */
6842 switch (op6)
6843 {
6844 case N32_OP6_MOVI:
6845 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6846 {
6847 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6848 insn_type = NDS32_INSN_MOVI55;
6849 }
6850 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6851 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6852 {
6853 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6854 N32_IMM20S (insn) - 16);
6855 insn_type = NDS32_INSN_MOVPI45;
6856 }
6857 break;
6858
6859 case N32_OP6_ADDI:
6860 if (N32_IMM15S (insn) == 0)
6861 {
6862 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6863 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6864 if (mach <= MACH_V2
6865 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6866 {
6867 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6868 insn_type = NDS32_INSN_MOV55;
6869 }
6870 }
6871 else if (N32_IMM15S (insn) > 0)
6872 {
6873 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6874 {
6875 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6876 N32_IMM15S (insn));
6877 insn_type = NDS32_INSN_ADDI333;
6878 }
6879 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6880 && N32_IMM15S (insn) < 32)
6881 {
6882 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6883 insn_type = NDS32_INSN_ADDI45;
6884 }
6885 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6886 && N32_RT5 (insn) == N32_RA5 (insn)
6887 && N32_IMM15S (insn) < 512)
6888 {
6889 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6890 insn_type = NDS32_INSN_ADDI10_SP;
6891 }
6892 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6893 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6894 && (N32_IMM15S (insn) % 4 == 0))
6895 {
6896 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6897 N32_IMM15S (insn) >> 2);
6898 insn_type = NDS32_INSN_ADDRI36_SP;
6899 }
6900 }
6901 else
6902 {
6903 /* Less than 0. */
6904 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6905 {
6906 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6907 0 - N32_IMM15S (insn));
6908 insn_type = NDS32_INSN_SUBI333;
6909 }
6910 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6911 && N32_IMM15S (insn) > -32)
6912 {
6913 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6914 0 - N32_IMM15S (insn));
6915 insn_type = NDS32_INSN_SUBI45;
6916 }
6917 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6918 && N32_RT5 (insn) == N32_RA5 (insn)
6919 && N32_IMM15S (insn) >= -512)
6920 {
6921 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6922 insn_type = NDS32_INSN_ADDI10_SP;
6923 }
6924 }
6925 break;
6926
6927 case N32_OP6_ORI:
6928 if (N32_IMM15S (insn) == 0)
6929 {
6930 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6931 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6932 if (mach <= MACH_V2
6933 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6934 {
6935 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6936 insn_type = NDS32_INSN_MOV55;
6937 }
6938 }
6939 break;
6940
6941 case N32_OP6_SUBRI:
6942 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6943 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6944 {
6945 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6946 insn_type = NDS32_INSN_NEG33;
6947 }
6948 break;
6949
6950 case N32_OP6_ANDI:
6951 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6952 {
6953 if (N32_IMM15U (insn) == 1)
6954 {
6955 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6956 insn_type = NDS32_INSN_XLSB33;
6957 }
6958 else if (N32_IMM15U (insn) == 0x7ff)
6959 {
6960 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6961 insn_type = NDS32_INSN_X11B33;
6962 }
6963 else if (N32_IMM15U (insn) == 0xff)
6964 {
6965 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6966 insn_type = NDS32_INSN_ZEB33;
6967 }
6968 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6969 && N32_IMM15U (insn) < 256)
6970 {
6971 int imm15u = N32_IMM15U (insn);
6972
6973 if (__builtin_popcount (imm15u) == 1)
6974 {
6975 /* BMSKI33 */
6976 int imm3u = __builtin_ctz (imm15u);
6977
6978 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6979 insn_type = NDS32_INSN_BMSKI33;
6980 }
6981 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6982 {
6983 /* FEXTI33 */
6984 int imm3u = __builtin_ctz (imm15u + 1) - 1;
6985
6986 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6987 insn_type = NDS32_INSN_FEXTI33;
6988 }
6989 }
6990 }
6991 break;
6992
6993 case N32_OP6_SLTI:
6994 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6995 && IS_WITHIN_U (N32_IMM15S (insn), 5))
6996 {
6997 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
6998 insn_type = NDS32_INSN_SLTI45;
6999 }
7000 break;
7001
7002 case N32_OP6_SLTSI:
7003 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7004 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7005 {
7006 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7007 insn_type = NDS32_INSN_SLTSI45;
7008 }
7009 break;
7010
7011 case N32_OP6_LWI:
7012 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7013 {
7014 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7015 insn_type = NDS32_INSN_LWI450;
7016 }
7017 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7018 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7019 {
7020 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7021 N32_IMM15S (insn));
7022 insn_type = NDS32_INSN_LWI333;
7023 }
7024 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7025 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7026 {
7027 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7028 insn_type = NDS32_INSN_LWI37;
7029 }
7030 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7031 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7032 {
7033 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7034 insn_type = NDS32_INSN_LWI37_SP;
7035 }
7036 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7037 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7038 {
7039 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7040 N32_IMM15S (insn) + 32);
7041 insn_type = NDS32_INSN_LWI45_FE;
7042 }
7043 break;
7044
7045 case N32_OP6_SWI:
7046 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7047 {
7048 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7049 insn_type = NDS32_INSN_SWI450;
7050 }
7051 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7052 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7053 {
7054 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7055 N32_IMM15S (insn));
7056 insn_type = NDS32_INSN_SWI333;
7057 }
7058 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7059 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7060 {
7061 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7062 insn_type = NDS32_INSN_SWI37;
7063 }
7064 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7065 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7066 {
7067 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7068 insn_type = NDS32_INSN_SWI37_SP;
7069 }
7070 break;
7071
7072 case N32_OP6_LWI_BI:
7073 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7074 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7075 {
7076 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7077 N32_IMM15S (insn));
7078 insn_type = NDS32_INSN_LWI333_BI;
7079 }
7080 break;
7081
7082 case N32_OP6_SWI_BI:
7083 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7084 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7085 {
7086 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7087 N32_IMM15S (insn));
7088 insn_type = NDS32_INSN_SWI333_BI;
7089 }
7090 break;
7091
7092 case N32_OP6_LHI:
7093 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7094 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7095 {
7096 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7097 N32_IMM15S (insn));
7098 insn_type = NDS32_INSN_LHI333;
7099 }
7100 break;
7101
7102 case N32_OP6_SHI:
7103 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7104 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7105 {
7106 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7107 N32_IMM15S (insn));
7108 insn_type = NDS32_INSN_SHI333;
7109 }
7110 break;
7111
7112 case N32_OP6_LBI:
7113 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7114 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7115 {
7116 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7117 N32_IMM15S (insn));
7118 insn_type = NDS32_INSN_LBI333;
7119 }
7120 break;
7121
7122 case N32_OP6_SBI:
7123 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7124 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7125 {
7126 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7127 N32_IMM15S (insn));
7128 insn_type = NDS32_INSN_SBI333;
7129 }
7130 break;
7131
7132 case N32_OP6_ALU1:
7133 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7134
7135 case N32_OP6_ALU2:
7136 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7137
7138 case N32_OP6_BR1:
7139 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7140 goto done;
7141
7142 if ((insn & N32_BIT (14)) == 0)
7143 {
7144 /* N32_BR1_BEQ */
7145 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7146 && N32_RT5 (insn) != REG_R5)
7147 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7148 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7149 && N32_RA5 (insn) != REG_R5)
7150 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7151 insn_type = NDS32_INSN_BEQS38;
7152 break;
7153 }
7154 else
7155 {
7156 /* N32_BR1_BNE */
7157 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7158 && N32_RT5 (insn) != REG_R5)
7159 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7160 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7161 && N32_RA5 (insn) != REG_R5)
7162 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7163 insn_type = NDS32_INSN_BNES38;
7164 break;
7165 }
7166 break;
7167
7168 case N32_OP6_BR2:
7169 switch (N32_BR2_SUB (insn))
7170 {
7171 case N32_BR2_BEQZ:
7172 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7173 {
7174 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7175 insn_type = NDS32_INSN_BEQZ38;
7176 }
7177 else if (N32_RT5 (insn) == REG_R15
7178 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7179 {
7180 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7181 insn_type = NDS32_INSN_BEQZS8;
7182 }
7183 break;
7184
7185 case N32_BR2_BNEZ:
7186 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7187 {
7188 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7189 insn_type = NDS32_INSN_BNEZ38;
7190 }
7191 else if (N32_RT5 (insn) == REG_R15
7192 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7193 {
7194 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7195 insn_type = NDS32_INSN_BNEZS8;
7196 }
7197 break;
7198
7199 case N32_BR2_IFCALL:
7200 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7201 {
7202 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7203 insn_type = NDS32_INSN_IFCALL9;
7204 }
7205 break;
7206 }
7207 break;
7208
7209 case N32_OP6_JI:
7210 if ((insn & N32_BIT (24)) == 0)
7211 {
7212 /* N32_JI_J */
7213 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7214 {
7215 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7216 insn_type = NDS32_INSN_J8;
7217 }
7218 }
7219 break;
7220
7221 case N32_OP6_JREG:
7222 if (__GF (insn, 8, 2) != 0)
7223 goto done;
7224
7225 switch (N32_IMMU (insn, 5))
7226 {
7227 case N32_JREG_JR:
7228 if (N32_JREG_HINT (insn) == 0)
7229 {
7230 /* jr */
7231 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7232 insn_type = NDS32_INSN_JR5;
7233 }
7234 else if (N32_JREG_HINT (insn) == 1)
7235 {
7236 /* ret */
7237 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7238 insn_type = NDS32_INSN_RET5;
7239 }
7240 else if (N32_JREG_HINT (insn) == 3)
7241 {
7242 /* ifret = mov55 $sp, $sp */
7243 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7244 insn_type = NDS32_INSN_IFRET;
7245 }
7246 break;
7247
7248 case N32_JREG_JRAL:
7249 /* It's convertible when return rt5 is $lp and address
7250 translation is kept. */
7251 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7252 {
7253 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7254 insn_type = NDS32_INSN_JRAL5;
7255 }
7256 break;
7257 }
7258 break;
7259
7260 case N32_OP6_MISC:
7261 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7262 {
7263 /* For v3, swid above 31 are used for ex9.it. */
7264 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7265 insn_type = NDS32_INSN_BREAK16;
7266 }
7267 break;
7268
7269 default:
7270 /* This instruction has no 16-bit variant. */
7271 goto done;
7272 }
7273
7274 done:
7275 /* Bit-15 of insn16 should be set for a valid instruction. */
7276 if ((insn16 & 0x8000) == 0)
7277 return 0;
7278
7279 if (pinsn16)
7280 *pinsn16 = insn16;
7281 if (pinsn_type)
7282 *pinsn_type = insn_type;
7283 return 1;
7284 }
7285
7286 static int
7287 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7288 Elf_Internal_Rela *reloc)
7289 {
7290 uint16_t insn16 = 0;
7291
7292 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7293 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7294 return 0;
7295
7296 if (!N32_IS_RT3 (insn))
7297 return 0;
7298
7299 switch (N32_OP6 (insn))
7300 {
7301 case N32_OP6_LWI:
7302 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7303 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7304 break;
7305 case N32_OP6_SWI:
7306 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7307 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7308 break;
7309 case N32_OP6_HWGP:
7310 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7311 break;
7312
7313 if (__GF (insn, 17, 3) == 6)
7314 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7315 else if (__GF (insn, 17, 3) == 7)
7316 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7317 break;
7318 }
7319
7320 if ((insn16 & 0x8000) == 0)
7321 return 0;
7322
7323 *pinsn16 = insn16;
7324 return 1;
7325 }
7326
7327 /* Convert a 16-bit instruction to 32-bit one.
7328 INSN16 it the input and PINSN it the point to output.
7329 Return non-zero on successful. Otherwise 0 is returned. */
7330
7331 int
7332 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7333 {
7334 uint32_t insn = 0xffffffff;
7335 unsigned long mach = bfd_get_mach (abfd);
7336
7337 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7338
7339 switch (__GF (insn16, 9, 6))
7340 {
7341 case 0x4: /* add45 */
7342 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7343 N16_RA5 (insn16));
7344 goto done;
7345 case 0x5: /* sub45 */
7346 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7347 N16_RA5 (insn16));
7348 goto done;
7349 case 0x6: /* addi45 */
7350 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7351 N16_IMM5U (insn16));
7352 goto done;
7353 case 0x7: /* subi45 */
7354 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7355 -N16_IMM5U (insn16));
7356 goto done;
7357 case 0x8: /* srai45 */
7358 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7359 N16_IMM5U (insn16));
7360 goto done;
7361 case 0x9: /* srli45 */
7362 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7363 N16_IMM5U (insn16));
7364 goto done;
7365 case 0xa: /* slli333 */
7366 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7367 N16_IMM3U (insn16));
7368 goto done;
7369 case 0xc: /* add333 */
7370 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7371 N16_RB3 (insn16));
7372 goto done;
7373 case 0xd: /* sub333 */
7374 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7375 N16_RB3 (insn16));
7376 goto done;
7377 case 0xe: /* addi333 */
7378 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7379 N16_IMM3U (insn16));
7380 goto done;
7381 case 0xf: /* subi333 */
7382 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7383 -N16_IMM3U (insn16));
7384 goto done;
7385 case 0x10: /* lwi333 */
7386 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7387 N16_IMM3U (insn16));
7388 goto done;
7389 case 0x12: /* lhi333 */
7390 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7391 N16_IMM3U (insn16));
7392 goto done;
7393 case 0x13: /* lbi333 */
7394 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7395 N16_IMM3U (insn16));
7396 goto done;
7397 case 0x11: /* lwi333.bi */
7398 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7399 N16_IMM3U (insn16));
7400 goto done;
7401 case 0x14: /* swi333 */
7402 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7403 N16_IMM3U (insn16));
7404 goto done;
7405 case 0x16: /* shi333 */
7406 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7407 N16_IMM3U (insn16));
7408 goto done;
7409 case 0x17: /* sbi333 */
7410 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7411 N16_IMM3U (insn16));
7412 goto done;
7413 case 0x15: /* swi333.bi */
7414 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7415 N16_IMM3U (insn16));
7416 goto done;
7417 case 0x18: /* addri36.sp */
7418 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7419 N16_IMM6U (insn16) << 2);
7420 goto done;
7421 case 0x19: /* lwi45.fe */
7422 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7423 (N16_IMM5U (insn16) - 32));
7424 goto done;
7425 case 0x1a: /* lwi450 */
7426 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7427 goto done;
7428 case 0x1b: /* swi450 */
7429 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7430 goto done;
7431
7432 /* These are r15 implied instructions. */
7433 case 0x30: /* slts45 */
7434 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7435 goto done;
7436 case 0x31: /* slt45 */
7437 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7438 goto done;
7439 case 0x32: /* sltsi45 */
7440 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7441 goto done;
7442 case 0x33: /* slti45 */
7443 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7444 goto done;
7445 case 0x34: /* beqzs8, bnezs8 */
7446 if (insn16 & N32_BIT (8))
7447 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7448 else
7449 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7450 goto done;
7451
7452 case 0x35: /* break16, ex9.it */
7453 /* Only consider range of v3 break16. */
7454 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7455 goto done;
7456
7457 case 0x3c: /* ifcall9 */
7458 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7459 goto done;
7460 case 0x3d: /* movpi45 */
7461 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7462 goto done;
7463
7464 case 0x3f: /* MISC33 */
7465 switch (insn16 & 0x7)
7466 {
7467 case 2: /* neg33 */
7468 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7469 break;
7470 case 3: /* not33 */
7471 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7472 N16_RA3 (insn16));
7473 break;
7474 case 4: /* mul33 */
7475 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7476 N16_RA3 (insn16));
7477 break;
7478 case 5: /* xor33 */
7479 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7480 N16_RA3 (insn16));
7481 break;
7482 case 6: /* and33 */
7483 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7484 N16_RA3 (insn16));
7485 break;
7486 case 7: /* or33 */
7487 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7488 N16_RA3 (insn16));
7489 break;
7490 }
7491 goto done;
7492
7493 case 0xb:
7494 switch (insn16 & 0x7)
7495 {
7496 case 0: /* zeb33 */
7497 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7498 break;
7499 case 1: /* zeh33 */
7500 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7501 break;
7502 case 2: /* seb33 */
7503 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7504 break;
7505 case 3: /* seh33 */
7506 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7507 break;
7508 case 4: /* xlsb33 */
7509 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7510 break;
7511 case 5: /* x11b33 */
7512 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7513 break;
7514 case 6: /* bmski33 */
7515 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7516 1 << __GF (insn16, 3, 3));
7517 break;
7518 case 7: /* fexti33 */
7519 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7520 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7521 break;
7522 }
7523 goto done;
7524 }
7525
7526 switch (__GF (insn16, 10, 5))
7527 {
7528 case 0x0: /* mov55 or ifret16 */
7529 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7530 && N16_RT5 (insn16) == N16_RA5 (insn16))
7531 insn = N32_JREG (JR, 0, 0, 0, 3);
7532 else
7533 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7534 goto done;
7535 case 0x1: /* movi55 */
7536 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7537 goto done;
7538 case 0x1b: /* addi10s (V2) */
7539 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7540 goto done;
7541 }
7542
7543 switch (__GF (insn16, 11, 4))
7544 {
7545 case 0x7: /* lwi37.fp/swi37.fp */
7546 if (insn16 & N32_BIT (7)) /* swi37.fp */
7547 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7548 else /* lwi37.fp */
7549 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7550 goto done;
7551 case 0x8: /* beqz38 */
7552 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7553 goto done;
7554 case 0x9: /* bnez38 */
7555 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7556 goto done;
7557 case 0xa: /* beqs38/j8, implied r5 */
7558 if (N16_RT38 (insn16) == 5)
7559 insn = N32_JI (J, N16_IMM8S (insn16));
7560 else
7561 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7562 goto done;
7563 case 0xb: /* bnes38 and others */
7564 if (N16_RT38 (insn16) == 5)
7565 {
7566 switch (__GF (insn16, 5, 3))
7567 {
7568 case 0: /* jr5 */
7569 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7570 break;
7571 case 4: /* ret5 */
7572 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7573 break;
7574 case 1: /* jral5 */
7575 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7576 break;
7577 case 2: /* ex9.it imm5 */
7578 /* ex9.it had no 32-bit variantl. */
7579 break;
7580 case 5: /* add5.pc */
7581 /* add5.pc had no 32-bit variantl. */
7582 break;
7583 }
7584 }
7585 else /* bnes38 */
7586 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7587 goto done;
7588 case 0xe: /* lwi37/swi37 */
7589 if (insn16 & (1 << 7)) /* swi37.sp */
7590 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7591 else /* lwi37.sp */
7592 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7593 goto done;
7594 }
7595
7596 done:
7597 if (insn & 0x80000000)
7598 return 0;
7599
7600 if (pinsn)
7601 *pinsn = insn;
7602 return 1;
7603 }
7604 \f
7605 static bfd_boolean
7606 is_sda_access_insn (unsigned long insn)
7607 {
7608 switch (N32_OP6 (insn))
7609 {
7610 case N32_OP6_LWI:
7611 case N32_OP6_LHI:
7612 case N32_OP6_LHSI:
7613 case N32_OP6_LBI:
7614 case N32_OP6_LBSI:
7615 case N32_OP6_SWI:
7616 case N32_OP6_SHI:
7617 case N32_OP6_SBI:
7618 case N32_OP6_LWC:
7619 case N32_OP6_LDC:
7620 case N32_OP6_SWC:
7621 case N32_OP6_SDC:
7622 return TRUE;
7623 default:
7624 ;
7625 }
7626 return FALSE;
7627 }
7628
7629 static unsigned long
7630 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7631 {
7632 uint32_t oinsn = 0;
7633
7634 switch (type)
7635 {
7636 case R_NDS32_GOT_LO12:
7637 case R_NDS32_GOTOFF_LO12:
7638 case R_NDS32_PLTREL_LO12:
7639 case R_NDS32_PLT_GOTREL_LO12:
7640 case R_NDS32_LO12S0_RELA:
7641 switch (N32_OP6 (insn))
7642 {
7643 case N32_OP6_LBI:
7644 /* lbi.gp */
7645 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7646 break;
7647 case N32_OP6_LBSI:
7648 /* lbsi.gp */
7649 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
7650 break;
7651 case N32_OP6_SBI:
7652 /* sbi.gp */
7653 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7654 break;
7655 case N32_OP6_ORI:
7656 /* addi.gp */
7657 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
7658 break;
7659 }
7660 break;
7661
7662 case R_NDS32_LO12S1_RELA:
7663 switch (N32_OP6 (insn))
7664 {
7665 case N32_OP6_LHI:
7666 /* lhi.gp */
7667 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7668 break;
7669 case N32_OP6_LHSI:
7670 /* lhsi.gp */
7671 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
7672 break;
7673 case N32_OP6_SHI:
7674 /* shi.gp */
7675 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
7676 break;
7677 }
7678 break;
7679
7680 case R_NDS32_LO12S2_RELA:
7681 switch (N32_OP6 (insn))
7682 {
7683 case N32_OP6_LWI:
7684 /* lwi.gp */
7685 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7686 break;
7687 case N32_OP6_SWI:
7688 /* swi.gp */
7689 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7690 break;
7691 }
7692 break;
7693
7694 case R_NDS32_LO12S2_DP_RELA:
7695 case R_NDS32_LO12S2_SP_RELA:
7696 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7697 break;
7698 }
7699
7700 if (oinsn)
7701 *pinsn = oinsn;
7702
7703 return oinsn != 0;
7704 }
7705
7706 /* Linker hasn't found the correct merge section for non-section symbol
7707 in relax time, this work is left to the function elf_link_input_bfd().
7708 So for non-section symbol, _bfd_merged_section_offset is also needed
7709 to find the correct symbol address. */
7710
7711 static bfd_vma
7712 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7713 asection **psec, Elf_Internal_Rela *rel)
7714 {
7715 asection *sec = *psec;
7716 bfd_vma relocation;
7717
7718 relocation = (sec->output_section->vma
7719 + sec->output_offset + sym->st_value);
7720 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7721 {
7722 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7723 rel->r_addend =
7724 _bfd_merged_section_offset (abfd, psec,
7725 elf_section_data (sec)->sec_info,
7726 sym->st_value + rel->r_addend);
7727 else
7728 rel->r_addend =
7729 _bfd_merged_section_offset (abfd, psec,
7730 elf_section_data (sec)->sec_info,
7731 sym->st_value) + rel->r_addend;
7732
7733 if (sec != *psec)
7734 {
7735 /* If we have changed the section, and our original section is
7736 marked with SEC_EXCLUDE, it means that the original
7737 SEC_MERGE section has been completely subsumed in some
7738 other SEC_MERGE section. In this case, we need to leave
7739 some info around for --emit-relocs. */
7740 if ((sec->flags & SEC_EXCLUDE) != 0)
7741 sec->kept_section = *psec;
7742 sec = *psec;
7743 }
7744 rel->r_addend -= relocation;
7745 rel->r_addend += sec->output_section->vma + sec->output_offset;
7746 }
7747 return relocation;
7748 }
7749
7750 static bfd_vma
7751 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7752 Elf_Internal_Sym *isymbuf,
7753 Elf_Internal_Shdr *symtab_hdr)
7754 {
7755 bfd_signed_vma foff;
7756 bfd_vma symval, addend;
7757 Elf_Internal_Rela irel_fn;
7758 Elf_Internal_Sym *isym;
7759 asection *sym_sec;
7760
7761 /* Get the value of the symbol referred to by the reloc. */
7762 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7763 {
7764 /* A local symbol. */
7765 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7766
7767 if (isym->st_shndx == SHN_UNDEF)
7768 sym_sec = bfd_und_section_ptr;
7769 else if (isym->st_shndx == SHN_ABS)
7770 sym_sec = bfd_abs_section_ptr;
7771 else if (isym->st_shndx == SHN_COMMON)
7772 sym_sec = bfd_com_section_ptr;
7773 else
7774 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7775 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7776 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7777 addend = irel_fn.r_addend;
7778 }
7779 else
7780 {
7781 unsigned long indx;
7782 struct elf_link_hash_entry *h;
7783
7784 /* An external symbol. */
7785 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7786 h = elf_sym_hashes (abfd)[indx];
7787 BFD_ASSERT (h != NULL);
7788
7789 while (h->root.type == bfd_link_hash_indirect
7790 || h->root.type == bfd_link_hash_warning)
7791 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7792
7793 if (h->root.type != bfd_link_hash_defined
7794 && h->root.type != bfd_link_hash_defweak)
7795 /* This appears to be a reference to an undefined
7796 symbol. Just ignore it--it will be caught by the
7797 regular reloc processing. */
7798 return 0;
7799
7800 if (h->root.u.def.section->flags & SEC_MERGE)
7801 {
7802 sym_sec = h->root.u.def.section;
7803 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7804 (sym_sec)->sec_info, h->root.u.def.value);
7805 symval = symval + sym_sec->output_section->vma
7806 + sym_sec->output_offset;
7807 }
7808 else
7809 symval = (h->root.u.def.value
7810 + h->root.u.def.section->output_section->vma
7811 + h->root.u.def.section->output_offset);
7812 addend = irel->r_addend;
7813 }
7814
7815 foff = symval + addend;
7816
7817 return foff;
7818 }
7819
7820 static bfd_vma
7821 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7822 Elf_Internal_Rela *irel,
7823 Elf_Internal_Shdr *symtab_hdr)
7824 {
7825 int symndx;
7826 bfd_vma *local_got_offsets;
7827 /* Get the value of the symbol referred to by the reloc. */
7828 struct elf_link_hash_entry *h;
7829 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7830
7831 /* An external symbol. */
7832 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7833 h = elf_sym_hashes (abfd)[symndx];
7834 while (h->root.type == bfd_link_hash_indirect
7835 || h->root.type == bfd_link_hash_warning)
7836 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7837
7838 if (symndx >= 0)
7839 {
7840 BFD_ASSERT (h != NULL);
7841 return (htab->root.sgot->output_section->vma
7842 + htab->root.sgot->output_offset
7843 + h->got.offset);
7844 }
7845 else
7846 {
7847 local_got_offsets = elf_local_got_offsets (abfd);
7848 BFD_ASSERT (local_got_offsets != NULL);
7849 return (htab->root.sgot->output_section->vma
7850 + htab->root.sgot->output_offset
7851 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
7852 }
7853
7854 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7855 /* The check of h->root.type is passed. */
7856 }
7857
7858 static int
7859 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7860 asection *sec, Elf_Internal_Rela *rel)
7861 {
7862 bfd_byte *contents;
7863 unsigned short insn16;
7864
7865 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7866 return FALSE;
7867 contents = elf_section_data (sec)->this_hdr.contents;
7868 insn16 = bfd_getb16 (contents + rel->r_offset);
7869 if (insn16 == NDS32_NOP16)
7870 return TRUE;
7871 return FALSE;
7872 }
7873
7874 /* It checks whether the instruction could be converted to
7875 16-bit form and returns the converted one.
7876
7877 `internal_relocs' is supposed to be sorted. */
7878
7879 static int
7880 is_convert_32_to_16 (bfd *abfd, asection *sec,
7881 Elf_Internal_Rela *reloc,
7882 Elf_Internal_Rela *internal_relocs,
7883 Elf_Internal_Rela *irelend,
7884 uint16_t *insn16)
7885 {
7886 #define NORMAL_32_TO_16 (1 << 0)
7887 #define SPECIAL_32_TO_16 (1 << 1)
7888 bfd_byte *contents = NULL;
7889 bfd_signed_vma off;
7890 bfd_vma mem_addr;
7891 uint32_t insn = 0;
7892 Elf_Internal_Rela *pc_rel;
7893 int pic_ext_target = 0;
7894 Elf_Internal_Shdr *symtab_hdr;
7895 Elf_Internal_Sym *isymbuf = NULL;
7896 int convert_type;
7897 bfd_vma offset;
7898
7899 if (reloc->r_offset + 4 > sec->size)
7900 return FALSE;
7901
7902 offset = reloc->r_offset;
7903
7904 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
7905 return FALSE;
7906 insn = bfd_getb32 (contents + offset);
7907
7908 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7909 convert_type = NORMAL_32_TO_16;
7910 else if (special_convert_32_to_16 (insn, insn16, reloc))
7911 convert_type = SPECIAL_32_TO_16;
7912 else
7913 return FALSE;
7914
7915 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7916 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7917 return FALSE;
7918
7919 /* Find the first relocation of the same relocation-type,
7920 so we iteratie them forward. */
7921 pc_rel = reloc;
7922 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
7923 pc_rel--;
7924
7925 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7926 {
7927 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7928 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7929 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7930 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7931 {
7932 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7933 &pic_ext_target);
7934 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7935 || off == 0)
7936 return FALSE;
7937 break;
7938 }
7939 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7940 {
7941 /* movi => movi55 */
7942 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7943 symtab_hdr);
7944 /* mem_addr is unsigned, but the value should
7945 be between [-16, 15]. */
7946 if ((mem_addr + 0x10) >> 5)
7947 return FALSE;
7948 break;
7949 }
7950 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7951 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7952 {
7953 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7954 because it can be relaxed to addi for TLS_LE_ADD. */
7955 return FALSE;
7956 }
7957 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7958 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7959 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7960 && convert_type == SPECIAL_32_TO_16)
7961 {
7962 /* fp-as-gp
7963 We've selected a best fp-base for this access, so we can
7964 always resolve it anyway. Do nothing. */
7965 break;
7966 }
7967 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7968 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7969 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7970 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7971 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7972 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7973 {
7974 /* Prevent unresolved addi instruction translate
7975 to addi45 or addi333. */
7976 return FALSE;
7977 }
7978 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
7979 {
7980 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7981 &pic_ext_target);
7982 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
7983 return FALSE;
7984 break;
7985 }
7986 }
7987
7988 return TRUE;
7989 }
7990
7991 static void
7992 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
7993 Elf_Internal_Rela *reloc,
7994 Elf_Internal_Rela *internal_relocs,
7995 Elf_Internal_Rela *irelend,
7996 unsigned short insn16)
7997 {
7998 Elf_Internal_Rela *pc_rel;
7999 bfd_vma offset;
8000
8001 offset = reloc->r_offset;
8002 bfd_putb16 (insn16, contents + offset);
8003 /* Find the first relocation of the same relocation-type,
8004 so we iteratie them forward. */
8005 pc_rel = reloc;
8006 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8007 pc_rel--;
8008
8009 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8010 {
8011 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8012 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8013 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8014 {
8015 pc_rel->r_info =
8016 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8017 }
8018 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8019 pc_rel->r_info =
8020 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8021 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8022 pc_rel->r_info =
8023 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8024 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8025 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8026 pc_rel->r_info =
8027 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8028 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8029 pc_rel->r_info =
8030 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8031 }
8032 }
8033
8034 /* Find a relocation of type specified by `reloc_type'
8035 of the same r_offset with reloc.
8036 If not found, return irelend.
8037
8038 Assuming relocations are sorted by r_offset,
8039 we find the relocation from `reloc' backward untill relocs,
8040 or find it from `reloc' forward untill irelend. */
8041
8042 static Elf_Internal_Rela *
8043 find_relocs_at_address (Elf_Internal_Rela *reloc,
8044 Elf_Internal_Rela *relocs,
8045 Elf_Internal_Rela *irelend,
8046 enum elf_nds32_reloc_type reloc_type)
8047 {
8048 Elf_Internal_Rela *rel_t;
8049
8050 /* Find backward. */
8051 for (rel_t = reloc;
8052 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8053 rel_t--)
8054 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8055 return rel_t;
8056
8057 /* We didn't find it backward. Try find it forward. */
8058 for (rel_t = reloc;
8059 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8060 rel_t++)
8061 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8062 return rel_t;
8063
8064 return irelend;
8065 }
8066
8067 /* Find a relocation of specified type and offset.
8068 `reloc' is just a refence point to find a relocation at specified offset.
8069 If not found, return irelend.
8070
8071 Assuming relocations are sorted by r_offset,
8072 we find the relocation from `reloc' backward untill relocs,
8073 or find it from `reloc' forward untill irelend. */
8074
8075 static Elf_Internal_Rela *
8076 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8077 Elf_Internal_Rela *relocs,
8078 Elf_Internal_Rela *irelend,
8079 enum elf_nds32_reloc_type reloc_type,
8080 bfd_vma offset_p)
8081 {
8082 Elf_Internal_Rela *rel_t = NULL;
8083
8084 /* First, we try to find a relocation of offset `offset_p',
8085 and then we use find_relocs_at_address to find specific type. */
8086
8087 if (reloc->r_offset > offset_p)
8088 {
8089 /* Find backward. */
8090 for (rel_t = reloc;
8091 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8092 /* Do nothing. */;
8093 }
8094 else if (reloc->r_offset < offset_p)
8095 {
8096 /* Find forward. */
8097 for (rel_t = reloc;
8098 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8099 /* Do nothing. */;
8100 }
8101 else
8102 rel_t = reloc;
8103
8104 /* Not found? */
8105 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8106 return irelend;
8107
8108 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8109 }
8110
8111 static bfd_boolean
8112 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8113 Elf_Internal_Rela *internal_relocs,
8114 Elf_Internal_Rela *irelend,
8115 unsigned char reloc_type)
8116 {
8117 Elf_Internal_Rela *rel_t;
8118
8119 for (rel_t = reloc;
8120 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8121 rel_t--)
8122 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8123 {
8124 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8125 && rel_t->r_addend == reloc->r_addend)
8126 continue;
8127 return TRUE;
8128 }
8129
8130 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8131 rel_t++)
8132 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8133 {
8134 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8135 && rel_t->r_addend == reloc->r_addend)
8136 continue;
8137 return TRUE;
8138 }
8139
8140 return FALSE;
8141 }
8142
8143 typedef struct nds32_elf_blank nds32_elf_blank_t;
8144 struct nds32_elf_blank
8145 {
8146 /* Where the blank begins. */
8147 bfd_vma offset;
8148 /* The size of the blank. */
8149 bfd_vma size;
8150 /* The accumulative size before this blank. */
8151 bfd_vma total_size;
8152 nds32_elf_blank_t *next;
8153 nds32_elf_blank_t *prev;
8154 };
8155
8156 static nds32_elf_blank_t *blank_free_list = NULL;
8157
8158 static nds32_elf_blank_t *
8159 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8160 {
8161 nds32_elf_blank_t *blank_t;
8162
8163 if (blank_free_list)
8164 {
8165 blank_t = blank_free_list;
8166 blank_free_list = blank_free_list->next;
8167 }
8168 else
8169 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8170
8171 if (blank_t == NULL)
8172 return NULL;
8173
8174 blank_t->offset = offset_p;
8175 blank_t->size = size_p;
8176 blank_t->total_size = 0;
8177 blank_t->next = NULL;
8178 blank_t->prev = NULL;
8179
8180 return blank_t;
8181 }
8182
8183 static void
8184 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8185 {
8186 if (blank_free_list)
8187 {
8188 blank_free_list->prev = blank_p;
8189 blank_p->next = blank_free_list;
8190 }
8191 else
8192 blank_p->next = NULL;
8193
8194 blank_p->prev = NULL;
8195 blank_free_list = blank_p;
8196 }
8197
8198 static void
8199 clean_nds32_elf_blank (void)
8200 {
8201 nds32_elf_blank_t *blank_t;
8202
8203 while (blank_free_list)
8204 {
8205 blank_t = blank_free_list;
8206 blank_free_list = blank_free_list->next;
8207 free (blank_t);
8208 }
8209 }
8210
8211 static nds32_elf_blank_t *
8212 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8213 {
8214 nds32_elf_blank_t *blank_t;
8215
8216 if (!blank_p)
8217 return NULL;
8218 blank_t = blank_p;
8219
8220 while (blank_t && addr < blank_t->offset)
8221 blank_t = blank_t->prev;
8222 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8223 blank_t = blank_t->next;
8224
8225 return blank_t;
8226 }
8227
8228 static bfd_vma
8229 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8230 int overwrite)
8231 {
8232 nds32_elf_blank_t *blank_t;
8233
8234 blank_t = search_nds32_elf_blank (*blank_p, addr);
8235 if (!blank_t)
8236 return 0;
8237
8238 if (overwrite)
8239 *blank_p = blank_t;
8240
8241 if (addr < blank_t->offset + blank_t->size)
8242 return blank_t->total_size + (addr - blank_t->offset);
8243 else
8244 return blank_t->total_size + blank_t->size;
8245 }
8246
8247 static bfd_boolean
8248 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8249 {
8250 nds32_elf_blank_t *blank_t, *blank_t2;
8251
8252 if (!*blank_p)
8253 {
8254 *blank_p = create_nds32_elf_blank (addr, len);
8255 return *blank_p ? TRUE : FALSE;
8256 }
8257
8258 blank_t = search_nds32_elf_blank (*blank_p, addr);
8259
8260 if (blank_t == NULL)
8261 {
8262 blank_t = create_nds32_elf_blank (addr, len);
8263 if (!blank_t)
8264 return FALSE;
8265 while ((*blank_p)->prev != NULL)
8266 *blank_p = (*blank_p)->prev;
8267 blank_t->next = *blank_p;
8268 (*blank_p)->prev = blank_t;
8269 (*blank_p) = blank_t;
8270 return TRUE;
8271 }
8272
8273 if (addr < blank_t->offset + blank_t->size)
8274 {
8275 if (addr > blank_t->offset + blank_t->size)
8276 blank_t->size = addr - blank_t->offset;
8277 }
8278 else
8279 {
8280 blank_t2 = create_nds32_elf_blank (addr, len);
8281 if (!blank_t2)
8282 return FALSE;
8283 if (blank_t->next)
8284 {
8285 blank_t->next->prev = blank_t2;
8286 blank_t2->next = blank_t->next;
8287 }
8288 blank_t2->prev = blank_t;
8289 blank_t->next = blank_t2;
8290 *blank_p = blank_t2;
8291 }
8292
8293 return TRUE;
8294 }
8295
8296 static bfd_boolean
8297 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8298 bfd_vma len)
8299 {
8300 nds32_elf_blank_t *blank_t;
8301
8302 if (!insert_nds32_elf_blank (blank_p, addr, len))
8303 return FALSE;
8304
8305 blank_t = *blank_p;
8306
8307 if (!blank_t->prev)
8308 {
8309 blank_t->total_size = 0;
8310 blank_t = blank_t->next;
8311 }
8312
8313 while (blank_t)
8314 {
8315 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8316 blank_t = blank_t->next;
8317 }
8318
8319 return TRUE;
8320 }
8321
8322 static void
8323 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8324 {
8325 nds32_elf_blank_t *blank_t;
8326 bfd_vma total_size = 0;
8327
8328 if (!blank_p)
8329 return;
8330
8331 blank_t = blank_p;
8332 while (blank_t->prev)
8333 blank_t = blank_t->prev;
8334 while (blank_t)
8335 {
8336 blank_t->total_size = total_size;
8337 total_size += blank_t->size;
8338 blank_t = blank_t->next;
8339 }
8340 }
8341
8342 static bfd_boolean
8343 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8344 nds32_elf_blank_t *blank_p)
8345 {
8346 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
8347 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
8348 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8349 unsigned int sec_shndx; /* The section the be relaxed. */
8350 bfd_byte *contents; /* Contents data of iterating section. */
8351 Elf_Internal_Rela *internal_relocs;
8352 Elf_Internal_Rela *irel;
8353 Elf_Internal_Rela *irelend;
8354 struct elf_link_hash_entry **sym_hashes;
8355 struct elf_link_hash_entry **end_hashes;
8356 unsigned int symcount;
8357 asection *sect;
8358 nds32_elf_blank_t *blank_t;
8359 nds32_elf_blank_t *blank_t2;
8360 nds32_elf_blank_t *blank_head;
8361
8362 blank_head = blank_t = blank_p;
8363 while (blank_head->prev != NULL)
8364 blank_head = blank_head->prev;
8365 while (blank_t->next != NULL)
8366 blank_t = blank_t->next;
8367
8368 if (blank_t->offset + blank_t->size <= sec->size)
8369 {
8370 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8371 blank_t->next->prev = blank_t;
8372 }
8373 if (blank_head->offset > 0)
8374 {
8375 blank_head->prev = create_nds32_elf_blank (0, 0);
8376 blank_head->prev->next = blank_head;
8377 blank_head = blank_head->prev;
8378 }
8379
8380 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8381
8382 /* The deletion must stop at the next ALIGN reloc for an alignment
8383 power larger than the number of bytes we are deleting. */
8384
8385 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8386 if (!nds32_get_local_syms (abfd, sec, &isym))
8387 return FALSE;
8388
8389 if (isym == NULL)
8390 {
8391 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8392 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8393 symtab_hdr->contents = (bfd_byte *) isym;
8394 }
8395
8396 if (isym == NULL || symtab_hdr->sh_info == 0)
8397 return FALSE;
8398
8399 blank_t = blank_head;
8400 calc_nds32_blank_total (blank_head);
8401
8402 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8403 {
8404 /* Adjust all the relocs. */
8405
8406 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8407 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8408 TRUE /* keep_memory */);
8409 irelend = internal_relocs + sect->reloc_count;
8410
8411 blank_t = blank_head;
8412 blank_t2 = blank_head;
8413
8414 if (!(sect->flags & SEC_RELOC))
8415 continue;
8416
8417 nds32_get_section_contents (abfd, sect, &contents, TRUE);
8418
8419 for (irel = internal_relocs; irel < irelend; irel++)
8420 {
8421 bfd_vma raddr;
8422
8423 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8424 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8425 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8426 {
8427 unsigned long val = 0;
8428 unsigned long mask;
8429 long before, between;
8430 long offset = 0;
8431
8432 switch (ELF32_R_TYPE (irel->r_info))
8433 {
8434 case R_NDS32_DIFF8:
8435 offset = bfd_get_8 (abfd, contents + irel->r_offset);
8436 break;
8437 case R_NDS32_DIFF16:
8438 offset = bfd_get_16 (abfd, contents + irel->r_offset);
8439 break;
8440 case R_NDS32_DIFF32:
8441 val = bfd_get_32 (abfd, contents + irel->r_offset);
8442 /* Get the signed bit and mask for the high part. The
8443 gcc will alarm when right shift 32-bit since the
8444 type size of long may be 32-bit. */
8445 mask = 0 - (val >> 31);
8446 if (mask)
8447 offset = (val | (mask - 0xffffffff));
8448 else
8449 offset = val;
8450 break;
8451 default:
8452 BFD_ASSERT (0);
8453 }
8454
8455 /* DIFF value
8456 0 |encoded in location|
8457 |------------|-------------------|---------
8458 sym+off(addend)
8459 -- before ---| *****************
8460 --------------------- between ---|
8461
8462 We only care how much data are relax between DIFF,
8463 marked as ***. */
8464
8465 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8466 between = get_nds32_elf_blank_total (&blank_t,
8467 irel->r_addend + offset, 0);
8468 if (between == before)
8469 goto done_adjust_diff;
8470
8471 switch (ELF32_R_TYPE (irel->r_info))
8472 {
8473 case R_NDS32_DIFF8:
8474 bfd_put_8 (abfd, offset - (between - before),
8475 contents + irel->r_offset);
8476 break;
8477 case R_NDS32_DIFF16:
8478 bfd_put_16 (abfd, offset - (between - before),
8479 contents + irel->r_offset);
8480 break;
8481 case R_NDS32_DIFF32:
8482 bfd_put_32 (abfd, offset - (between - before),
8483 contents + irel->r_offset);
8484 break;
8485 }
8486 }
8487 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8488 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8489 {
8490 bfd_vma val = 0;
8491 unsigned int len = 0;
8492 unsigned long before, between;
8493 bfd_byte *endp, *p;
8494
8495 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8496 &len);
8497
8498 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8499 between = get_nds32_elf_blank_total (&blank_t,
8500 irel->r_addend + val, 0);
8501 if (between == before)
8502 goto done_adjust_diff;
8503
8504 p = contents + irel->r_offset;
8505 endp = p + len -1;
8506 memset (p, 0x80, len);
8507 *(endp) = 0;
8508 p = write_uleb128 (p, val - (between - before)) - 1;
8509 if (p < endp)
8510 *p |= 0x80;
8511 }
8512 done_adjust_diff:
8513
8514 if (sec == sect)
8515 {
8516 raddr = irel->r_offset;
8517 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8518 irel->r_offset, 1);
8519
8520 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8521 continue;
8522 if (blank_t2 && blank_t2->next
8523 && (blank_t2->offset > raddr
8524 || blank_t2->next->offset <= raddr))
8525 _bfd_error_handler
8526 (_("%B: Error: search_nds32_elf_blank reports wrong node\n"), abfd);
8527
8528 /* Mark reloc in deleted portion as NONE.
8529 For some relocs like R_NDS32_LABEL that doesn't modify the
8530 content in the section. R_NDS32_LABEL doesn't belong to the
8531 instruction in the section, so we should preserve it. */
8532 if (raddr >= blank_t2->offset
8533 && raddr < blank_t2->offset + blank_t2->size
8534 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8535 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8536 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8537 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8538 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8539 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8540 {
8541 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8542 R_NDS32_NONE);
8543 continue;
8544 }
8545 }
8546
8547 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8548 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8549 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8550 continue;
8551
8552 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8553 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8554 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8555 {
8556 if (irel->r_addend <= sec->size)
8557 irel->r_addend -=
8558 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8559 }
8560 }
8561 }
8562
8563 /* Adjust the local symbols defined in this section. */
8564 blank_t = blank_head;
8565 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8566 {
8567 if (isym->st_shndx == sec_shndx)
8568 {
8569 if (isym->st_value <= sec->size)
8570 {
8571 bfd_vma ahead;
8572 bfd_vma orig_addr = isym->st_value;
8573
8574 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8575 isym->st_value -= ahead;
8576
8577 /* Adjust function size. */
8578 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8579 && isym->st_size > 0)
8580 isym->st_size -=
8581 get_nds32_elf_blank_total
8582 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8583 }
8584 }
8585 }
8586
8587 /* Now adjust the global symbols defined in this section. */
8588 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8589 - symtab_hdr->sh_info);
8590 sym_hashes = elf_sym_hashes (abfd);
8591 end_hashes = sym_hashes + symcount;
8592 blank_t = blank_head;
8593 for (; sym_hashes < end_hashes; sym_hashes++)
8594 {
8595 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8596
8597 if ((sym_hash->root.type == bfd_link_hash_defined
8598 || sym_hash->root.type == bfd_link_hash_defweak)
8599 && sym_hash->root.u.def.section == sec)
8600 {
8601 if (sym_hash->root.u.def.value <= sec->size)
8602 {
8603 bfd_vma ahead;
8604 bfd_vma orig_addr = sym_hash->root.u.def.value;
8605
8606 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8607 sym_hash->root.u.def.value -= ahead;
8608
8609 /* Adjust function size. */
8610 if (sym_hash->type == STT_FUNC)
8611 sym_hash->size -=
8612 get_nds32_elf_blank_total
8613 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8614
8615 }
8616 }
8617 }
8618
8619 contents = elf_section_data (sec)->this_hdr.contents;
8620 blank_t = blank_head;
8621 while (blank_t->next)
8622 {
8623 /* Actually delete the bytes. */
8624
8625 /* If current blank is the last blank overlap with current section,
8626 go to finish process. */
8627 if (sec->size <= (blank_t->next->offset))
8628 break;
8629
8630 memmove (contents + blank_t->offset - blank_t->total_size,
8631 contents + blank_t->offset + blank_t->size,
8632 blank_t->next->offset - (blank_t->offset + blank_t->size));
8633
8634 blank_t = blank_t->next;
8635 }
8636
8637 if (sec->size > (blank_t->offset + blank_t->size))
8638 {
8639 /* There are remaining code between blank and section boundary.
8640 Move the remaining code to appropriate location. */
8641 memmove (contents + blank_t->offset - blank_t->total_size,
8642 contents + blank_t->offset + blank_t->size,
8643 sec->size - (blank_t->offset + blank_t->size));
8644 sec->size -= blank_t->total_size + blank_t->size;
8645 }
8646 else
8647 /* This blank is not entirely included in the section,
8648 reduce the section size by only part of the blank size. */
8649 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8650
8651 while (blank_head)
8652 {
8653 blank_t = blank_head;
8654 blank_head = blank_head->next;
8655 remove_nds32_elf_blank (blank_t);
8656 }
8657
8658 return TRUE;
8659 }
8660
8661 /* Get the contents of a section. */
8662
8663 static int
8664 nds32_get_section_contents (bfd *abfd, asection *sec,
8665 bfd_byte **contents_p, bfd_boolean cache)
8666 {
8667 /* Get the section contents. */
8668 if (elf_section_data (sec)->this_hdr.contents != NULL)
8669 *contents_p = elf_section_data (sec)->this_hdr.contents;
8670 else
8671 {
8672 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8673 return FALSE;
8674 if (cache)
8675 elf_section_data (sec)->this_hdr.contents = *contents_p;
8676 }
8677
8678 return TRUE;
8679 }
8680
8681 /* Get the contents of the internal symbol of abfd. */
8682
8683 static int
8684 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8685 Elf_Internal_Sym **isymbuf_p)
8686 {
8687 Elf_Internal_Shdr *symtab_hdr;
8688 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8689
8690 /* Read this BFD's local symbols if we haven't done so already. */
8691 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8692 {
8693 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8694 if (*isymbuf_p == NULL)
8695 {
8696 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8697 symtab_hdr->sh_info, 0,
8698 NULL, NULL, NULL);
8699 if (*isymbuf_p == NULL)
8700 return FALSE;
8701 }
8702 }
8703 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8704
8705 return TRUE;
8706 }
8707
8708 /* Range of small data. */
8709 static bfd_vma sdata_range[2][2];
8710 static bfd_vma const sdata_init_range[2] =
8711 { ACCURATE_12BIT_S1, ACCURATE_19BIT };
8712
8713 static int
8714 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8715 bfd_byte *contents, bfd_vma addr)
8716 {
8717 unsigned long insn = bfd_getb32 (contents + addr);
8718
8719 if (insn & 0x80000000)
8720 return 2;
8721
8722 return 4;
8723 }
8724
8725 /* Set the gp relax range. We have to measure the safe range
8726 to do gp relaxation. */
8727
8728 static void
8729 relax_range_measurement (bfd *abfd)
8730 {
8731 asection *sec_f, *sec_b;
8732 /* For upper bound. */
8733 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8734 bfd_vma align;
8735 static int decide_relax_range = 0;
8736 int i;
8737 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8738
8739 if (decide_relax_range)
8740 return;
8741 decide_relax_range = 1;
8742
8743 if (sda_rela_sec == NULL)
8744 {
8745 /* Since there is no data sections, we assume the range is page size. */
8746 for (i = 0; i < range_number; i++)
8747 {
8748 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8749 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8750 }
8751 return;
8752 }
8753
8754 /* Get the biggest alignment power after the gp located section. */
8755 sec_f = sda_rela_sec->output_section;
8756 sec_b = sec_f->next;
8757 align = 0;
8758 while (sec_b != NULL)
8759 {
8760 if ((unsigned)(1 << sec_b->alignment_power) > align)
8761 align = (1 << sec_b->alignment_power);
8762 sec_b = sec_b->next;
8763 }
8764
8765 /* I guess we can not determine the section before
8766 gp located section, so we assume the align is max page size. */
8767 for (i = 0; i < range_number; i++)
8768 {
8769 sdata_range[i][1] = sdata_init_range[i] - align;
8770 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
8771 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
8772 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8773 }
8774 }
8775
8776 /* These are macros used to check flags encoded in r_addend.
8777 They are only used by nds32_elf_relax_section (). */
8778 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8779 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8780 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8781 #define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8782
8783 static const char * unrecognized_reloc_msg =
8784 /* xgettext:c-format */
8785 N_("%B: warning: %s points to unrecognized reloc at %#Lx");
8786
8787 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8788
8789 static bfd_boolean
8790 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8791 Elf_Internal_Rela *internal_relocs, int *insn_len,
8792 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8793 Elf_Internal_Shdr *symtab_hdr)
8794 {
8795 /* There are 3 variations for LONGCALL1
8796 case 4-4-2; 16-bit on, optimize off or optimize for space
8797 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8798 ori ta, ta, lo12(symbol) ; LO12S0
8799 jral5 ta ;
8800
8801 case 4-4-4; 16-bit off, optimize don't care
8802 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8803 ori ta, ta, lo12(symbol) ; LO12S0
8804 jral ta ;
8805
8806 case 4-4-4; 16-bit on, optimize for speed
8807 sethi ta, hi20(symbol) ; LONGCALL1/HI20
8808 ori ta, ta, lo12(symbol) ; LO12S0
8809 jral ta ;
8810 Check code for -mlong-calls output. */
8811
8812 /* Get the reloc for the address from which the register is
8813 being loaded. This reloc will tell us which function is
8814 actually being called. */
8815
8816 bfd_vma laddr;
8817 int seq_len; /* Original length of instruction sequence. */
8818 uint32_t insn;
8819 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8820 int pic_ext_target = 0;
8821 bfd_signed_vma foff;
8822 uint16_t insn16;
8823
8824 irelend = internal_relocs + sec->reloc_count;
8825 seq_len = GET_SEQ_LEN (irel->r_addend);
8826 laddr = irel->r_offset;
8827 *insn_len = seq_len;
8828
8829 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8830 R_NDS32_HI20_RELA, laddr);
8831 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8832 R_NDS32_LO12S0_ORI_RELA,
8833 laddr + 4);
8834
8835 if (hi_irelfn == irelend || lo_irelfn == irelend)
8836 {
8837 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
8838 irel->r_offset);
8839 return FALSE;
8840 }
8841
8842 /* Get the value of the symbol referred to by the reloc. */
8843 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8844 &pic_ext_target);
8845
8846 /* This condition only happened when symbol is undefined. */
8847 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8848 || foff >= CONSERVATIVE_24BIT_S1)
8849 return FALSE;
8850
8851 /* Relax to: jal symbol; 25_PCREL */
8852 /* For simplicity of coding, we are going to modify the section
8853 contents, the section relocs, and the BFD symbol table. We
8854 must tell the rest of the code not to free up this
8855 information. It would be possible to instead create a table
8856 of changes which have to be made, as is done in coff-mips.c;
8857 that would be more work, but would require less memory when
8858 the linker is run. */
8859
8860 /* Replace the long call with a jal. */
8861 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8862 R_NDS32_25_PCREL_RELA);
8863 irel->r_addend = hi_irelfn->r_addend;
8864
8865 /* We don't resolve this here but resolve it in relocate_section. */
8866 insn = INSN_JAL;
8867 bfd_putb32 (insn, contents + irel->r_offset);
8868
8869 hi_irelfn->r_info =
8870 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8871 lo_irelfn->r_info =
8872 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8873 *insn_len = 4;
8874
8875 if (seq_len & 0x2)
8876 {
8877 insn16 = NDS32_NOP16;
8878 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8879 lo_irelfn->r_info =
8880 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8881 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8882 *insn_len += 2;
8883 }
8884 return TRUE;
8885 }
8886
8887 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8888 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
8889
8890 static bfd_boolean
8891 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8892 Elf_Internal_Rela *internal_relocs, int *insn_len,
8893 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8894 Elf_Internal_Shdr *symtab_hdr)
8895 {
8896 /* bltz rt, .L1 ; LONGCALL2
8897 jal symbol ; 25_PCREL
8898 .L1: */
8899
8900 /* Get the reloc for the address from which the register is
8901 being loaded. This reloc will tell us which function is
8902 actually being called. */
8903
8904 bfd_vma laddr;
8905 uint32_t insn;
8906 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8907 int pic_ext_target = 0;
8908 bfd_signed_vma foff;
8909
8910 irelend = internal_relocs + sec->reloc_count;
8911 laddr = irel->r_offset;
8912 i1_irelfn =
8913 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8914 R_NDS32_25_PCREL_RELA, laddr + 4);
8915
8916 if (i1_irelfn == irelend)
8917 {
8918 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
8919 irel->r_offset);
8920 return FALSE;
8921 }
8922
8923 insn = bfd_getb32 (contents + laddr);
8924
8925 /* Get the value of the symbol referred to by the reloc. */
8926 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8927 &pic_ext_target);
8928
8929 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8930 || foff >= CONSERVATIVE_16BIT_S1)
8931 return FALSE;
8932
8933 /* Relax to bgezal rt, label ; 17_PCREL
8934 or bltzal rt, label ; 17_PCREL */
8935
8936 /* Convert to complimentary conditional call. */
8937 insn = CONVERT_CONDITION_CALL (insn);
8938
8939 /* For simplicity of coding, we are going to modify the section
8940 contents, the section relocs, and the BFD symbol table. We
8941 must tell the rest of the code not to free up this
8942 information. It would be possible to instead create a table
8943 of changes which have to be made, as is done in coff-mips.c;
8944 that would be more work, but would require less memory when
8945 the linker is run. */
8946
8947 /* Clean unnessary relocations. */
8948 i1_irelfn->r_info =
8949 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8950 cond_irelfn =
8951 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8952 R_NDS32_17_PCREL_RELA, laddr);
8953 if (cond_irelfn != irelend)
8954 cond_irelfn->r_info =
8955 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8956
8957 /* Replace the long call with a bgezal. */
8958 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8959 R_NDS32_17_PCREL_RELA);
8960 irel->r_addend = i1_irelfn->r_addend;
8961
8962 bfd_putb32 (insn, contents + irel->r_offset);
8963
8964 *insn_len = 4;
8965 return TRUE;
8966 }
8967
8968 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8969
8970 static bfd_boolean
8971 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8972 Elf_Internal_Rela *internal_relocs, int *insn_len,
8973 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8974 Elf_Internal_Shdr *symtab_hdr)
8975 {
8976 /* There are 3 variations for LONGCALL3
8977 case 4-4-4-2; 16-bit on, optimize off or optimize for space
8978 bltz rt, $1 ; LONGCALL3
8979 sethi ta, hi20(symbol) ; HI20
8980 ori ta, ta, lo12(symbol) ; LO12S0
8981 jral5 ta ;
8982 $1
8983
8984 case 4-4-4-4; 16-bit off, optimize don't care
8985 bltz rt, $1 ; LONGCALL3
8986 sethi ta, hi20(symbol) ; HI20
8987 ori ta, ta, lo12(symbol) ; LO12S0
8988 jral ta ;
8989 $1
8990
8991 case 4-4-4-4; 16-bit on, optimize for speed
8992 bltz rt, $1 ; LONGCALL3
8993 sethi ta, hi20(symbol) ; HI20
8994 ori ta, ta, lo12(symbol) ; LO12S0
8995 jral ta ;
8996 $1 */
8997
8998 /* Get the reloc for the address from which the register is
8999 being loaded. This reloc will tell us which function is
9000 actually being called. */
9001
9002 bfd_vma laddr;
9003 int seq_len; /* Original length of instruction sequence. */
9004 uint32_t insn;
9005 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9006 int pic_ext_target = 0;
9007 bfd_signed_vma foff;
9008 uint16_t insn16;
9009
9010 irelend = internal_relocs + sec->reloc_count;
9011 seq_len = GET_SEQ_LEN (irel->r_addend);
9012 laddr = irel->r_offset;
9013 *insn_len = seq_len;
9014
9015 hi_irelfn =
9016 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9017 R_NDS32_HI20_RELA, laddr + 4);
9018 lo_irelfn =
9019 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9020 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9021
9022 if (hi_irelfn == irelend || lo_irelfn == irelend)
9023 {
9024 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
9025 irel->r_offset);
9026 return FALSE;
9027 }
9028
9029 /* Get the value of the symbol referred to by the reloc. */
9030 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9031 &pic_ext_target);
9032
9033 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9034 || foff >= CONSERVATIVE_24BIT_S1)
9035 return FALSE;
9036
9037 insn = bfd_getb32 (contents + laddr);
9038 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9039 {
9040 /* Relax to bgezal rt, label ; 17_PCREL
9041 or bltzal rt, label ; 17_PCREL */
9042
9043 /* Convert to complimentary conditional call. */
9044 insn = CONVERT_CONDITION_CALL (insn);
9045 bfd_putb32 (insn, contents + irel->r_offset);
9046
9047 *insn_len = 4;
9048 irel->r_info =
9049 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9050 hi_irelfn->r_info =
9051 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9052 lo_irelfn->r_info =
9053 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9054
9055 cond_irelfn =
9056 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9057 R_NDS32_17_PCREL_RELA, laddr);
9058 if (cond_irelfn != irelend)
9059 {
9060 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9061 R_NDS32_17_PCREL_RELA);
9062 cond_irelfn->r_addend = hi_irelfn->r_addend;
9063 }
9064
9065 if (seq_len & 0x2)
9066 {
9067 insn16 = NDS32_NOP16;
9068 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9069 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9070 R_NDS32_INSN16);
9071 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9072 insn_len += 2;
9073 }
9074 }
9075 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9076 {
9077 /* Relax to the following instruction sequence
9078 bltz rt, $1 ; LONGCALL2
9079 jal symbol ; 25_PCREL
9080 $1 */
9081 *insn_len = 8;
9082 insn = INSN_JAL;
9083 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9084
9085 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9086 R_NDS32_25_PCREL_RELA);
9087 irel->r_info =
9088 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9089
9090 lo_irelfn->r_info =
9091 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9092
9093 if (seq_len & 0x2)
9094 {
9095 insn16 = NDS32_NOP16;
9096 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9097 lo_irelfn->r_info =
9098 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9099 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9100 insn_len += 2;
9101 }
9102 }
9103 return TRUE;
9104 }
9105
9106 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
9107
9108 static bfd_boolean
9109 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9110 Elf_Internal_Rela *internal_relocs, int *insn_len,
9111 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9112 Elf_Internal_Shdr *symtab_hdr)
9113 {
9114 /* There are 3 variations for LONGJUMP1
9115 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9116 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9117 ori ta, ta, lo12(symbol) ; LO12S0
9118 jr5 ta ;
9119
9120 case 4-4-4; 16-bit off, optimize don't care
9121 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9122 ori ta, ta, lo12(symbol) ; LO12S0
9123 jr ta ;
9124
9125 case 4-4-4; 16-bit on, optimize for speed
9126 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9127 ori ta, ta, lo12(symbol) ; LO12S0
9128 jr ta ; */
9129
9130 /* Get the reloc for the address from which the register is
9131 being loaded. This reloc will tell us which function is
9132 actually being called. */
9133
9134 bfd_vma laddr;
9135 int seq_len; /* Original length of instruction sequence. */
9136 int insn16_on; /* 16-bit on/off. */
9137 uint32_t insn;
9138 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9139 int pic_ext_target = 0;
9140 bfd_signed_vma foff;
9141 uint16_t insn16;
9142 unsigned long reloc;
9143
9144 irelend = internal_relocs + sec->reloc_count;
9145 seq_len = GET_SEQ_LEN (irel->r_addend);
9146 laddr = irel->r_offset;
9147 *insn_len = seq_len;
9148 insn16_on = IS_16BIT_ON (irel->r_addend);
9149
9150 hi_irelfn =
9151 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9152 R_NDS32_HI20_RELA, laddr);
9153 lo_irelfn =
9154 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9155 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9156 if (hi_irelfn == irelend || lo_irelfn == irelend)
9157 {
9158 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
9159 irel->r_offset);
9160 return FALSE;
9161 }
9162
9163 /* Get the value of the symbol referred to by the reloc. */
9164 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9165 &pic_ext_target);
9166
9167 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9168 || foff < -CONSERVATIVE_24BIT_S1)
9169 return FALSE;
9170
9171 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9172 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9173 {
9174 /* j8 label */
9175 /* 16-bit on, but not optimized for speed. */
9176 reloc = R_NDS32_9_PCREL_RELA;
9177 insn16 = INSN_J8;
9178 bfd_putb16 (insn16, contents + irel->r_offset);
9179 *insn_len = 2;
9180 irel->r_info =
9181 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9182 }
9183 else
9184 {
9185 /* j label */
9186 reloc = R_NDS32_25_PCREL_RELA;
9187 insn = INSN_J;
9188 bfd_putb32 (insn, contents + irel->r_offset);
9189 *insn_len = 4;
9190 irel->r_info =
9191 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9192 irel->r_addend = 0;
9193 }
9194
9195 hi_irelfn->r_info =
9196 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9197 lo_irelfn->r_info =
9198 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9199
9200 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9201 {
9202 insn16 = NDS32_NOP16;
9203 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9204 lo_irelfn->r_info =
9205 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9206 R_NDS32_INSN16);
9207 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9208 *insn_len += 2;
9209 }
9210 return TRUE;
9211 }
9212
9213 /* Revert condition branch. This function does not check if the input
9214 instruction is condition branch or not. */
9215
9216 static void
9217 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9218 uint16_t *re_insn16, uint32_t *re_insn)
9219 {
9220 uint32_t comp_insn = 0;
9221 uint16_t comp_insn16 = 0;
9222
9223 if (insn)
9224 {
9225 if (N32_OP6 (insn) == N32_OP6_BR1)
9226 {
9227 /* beqs label. */
9228 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9229 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9230 {
9231 /* Insn can be contracted to 16-bit implied r5. */
9232 comp_insn16 =
9233 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9234 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9235 }
9236 }
9237 else if (N32_OP6 (insn) == N32_OP6_BR3)
9238 {
9239 /* bnec $ta, imm11, label. */
9240 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9241 }
9242 else
9243 {
9244 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9245 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9246 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9247 {
9248 if (N32_IS_RT3 (insn))
9249 {
9250 /* Insn can be contracted to 16-bit. */
9251 comp_insn16 =
9252 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9253 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9254 }
9255 else if (N32_RT5 (insn) == REG_R15)
9256 {
9257 /* Insn can be contracted to 16-bit. */
9258 comp_insn16 =
9259 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9260 }
9261 }
9262 }
9263 }
9264 else
9265 {
9266 switch ((insn16 & 0xf000) >> 12)
9267 {
9268 case 0xc:
9269 /* beqz38 or bnez38 */
9270 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9271 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9272 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9273 break;
9274
9275 case 0xd:
9276 /* beqs38 or bnes38 */
9277 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9278 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9279 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9280 | (REG_R5 << 15);
9281 break;
9282
9283 case 0xe:
9284 /* beqzS8 or bnezS8 */
9285 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9286 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9287 comp_insn |= REG_R15 << 20;
9288 break;
9289
9290 default:
9291 break;
9292 }
9293 }
9294 if (comp_insn && re_insn)
9295 *re_insn = comp_insn;
9296 if (comp_insn16 && re_insn16)
9297 *re_insn16 = comp_insn16;
9298 }
9299
9300 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
9301
9302 static bfd_boolean
9303 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9304 Elf_Internal_Rela *internal_relocs, int *insn_len,
9305 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9306 Elf_Internal_Shdr *symtab_hdr)
9307 {
9308 /* There are 3 variations for LONGJUMP2
9309 case 2-4; 1st insn convertible, 16-bit on,
9310 optimize off or optimize for space
9311 bnes38 rt, ra, $1 ; LONGJUMP2
9312 j label ; 25_PCREL
9313 $1:
9314
9315 case 4-4; 1st insn not convertible
9316 bne rt, ra, $1 ; LONGJUMP2
9317 j label ; 25_PCREL
9318 $1:
9319
9320 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9321 bne rt, ra, $1 ; LONGJUMP2
9322 j label ; 25_PCREL
9323 $1: */
9324
9325 /* Get the reloc for the address from which the register is
9326 being loaded. This reloc will tell us which function is
9327 actually being called. */
9328
9329 bfd_vma laddr;
9330 int seq_len; /* Original length of instruction sequence. */
9331 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9332 int pic_ext_target = 0, first_size;
9333 unsigned int i;
9334 bfd_signed_vma foff;
9335 uint32_t insn, re_insn = 0;
9336 uint16_t insn16, re_insn16 = 0;
9337 unsigned long reloc, cond_reloc;
9338
9339 enum elf_nds32_reloc_type checked_types[] =
9340 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9341
9342 irelend = internal_relocs + sec->reloc_count;
9343 seq_len = GET_SEQ_LEN (irel->r_addend);
9344 laddr = irel->r_offset;
9345 *insn_len = seq_len;
9346 first_size = (seq_len == 6) ? 2 : 4;
9347
9348 i2_irelfn =
9349 find_relocs_at_address_addr (irel, internal_relocs,
9350 irelend, R_NDS32_25_PCREL_RELA,
9351 laddr + first_size);
9352
9353 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9354 {
9355 cond_irelfn =
9356 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9357 checked_types[i], laddr);
9358 if (cond_irelfn != irelend)
9359 break;
9360 }
9361
9362 if (i2_irelfn == irelend || cond_irelfn == irelend)
9363 {
9364 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
9365 irel->r_offset);
9366 return FALSE;
9367 }
9368
9369 /* Get the value of the symbol referred to by the reloc. */
9370 foff =
9371 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9372 &pic_ext_target);
9373 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9374 || foff >= CONSERVATIVE_16BIT_S1)
9375 return FALSE;
9376
9377 /* Get the all corresponding instructions. */
9378 if (first_size == 4)
9379 {
9380 insn = bfd_getb32 (contents + laddr);
9381 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9382 }
9383 else
9384 {
9385 insn16 = bfd_getb16 (contents + laddr);
9386 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9387 }
9388
9389 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9390 && foff < ACCURATE_8BIT_S1 - first_size)
9391 {
9392 if (first_size == 4)
9393 {
9394 /* Don't convert it to 16-bit now, keep this as relaxable for
9395 ``label reloc; INSN16''. */
9396
9397 /* Save comp_insn32 to buffer. */
9398 bfd_putb32 (re_insn, contents + irel->r_offset);
9399 *insn_len = 4;
9400 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9401 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9402 cond_reloc = R_NDS32_INSN16;
9403 }
9404 else
9405 {
9406 bfd_putb16 (re_insn16, contents + irel->r_offset);
9407 *insn_len = 2;
9408 reloc = R_NDS32_9_PCREL_RELA;
9409 cond_reloc = R_NDS32_NONE;
9410 }
9411 }
9412 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9413 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9414 && foff < ACCURATE_14BIT_S1 - first_size))
9415 {
9416 /* beqs label ; 15_PCREL */
9417 bfd_putb32 (re_insn, contents + irel->r_offset);
9418 *insn_len = 4;
9419 reloc = R_NDS32_15_PCREL_RELA;
9420 cond_reloc = R_NDS32_NONE;
9421 }
9422 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9423 && foff >= -CONSERVATIVE_16BIT_S1
9424 && foff < CONSERVATIVE_16BIT_S1)
9425 {
9426 /* beqz label ; 17_PCREL */
9427 bfd_putb32 (re_insn, contents + irel->r_offset);
9428 *insn_len = 4;
9429 reloc = R_NDS32_17_PCREL_RELA;
9430 cond_reloc = R_NDS32_NONE;
9431 }
9432 else
9433 return FALSE;
9434
9435 /* Set all relocations. */
9436 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9437 irel->r_addend = i2_irelfn->r_addend;
9438
9439 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9440 cond_reloc);
9441 cond_irelfn->r_addend = 0;
9442
9443 if ((seq_len ^ *insn_len ) & 0x2)
9444 {
9445 insn16 = NDS32_NOP16;
9446 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9447 i2_irelfn->r_offset = 4;
9448 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9449 R_NDS32_INSN16);
9450 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9451 *insn_len += 2;
9452 }
9453 else
9454 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9455 R_NDS32_NONE);
9456 return TRUE;
9457 }
9458
9459 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
9460
9461 static bfd_boolean
9462 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9463 Elf_Internal_Rela *internal_relocs, int *insn_len,
9464 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9465 Elf_Internal_Shdr *symtab_hdr)
9466 {
9467 /* There are 5 variations for LONGJUMP3
9468 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9469 optimize off or optimize for space
9470 bnes38 rt, ra, $1 ; LONGJUMP3
9471 sethi ta, hi20(symbol) ; HI20
9472 ori ta, ta, lo12(symbol) ; LO12S0
9473 jr5 ta ;
9474 $1: ;
9475
9476 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9477 bnes38 rt, ra, $1 ; LONGJUMP3
9478 sethi ta, hi20(symbol) ; HI20
9479 ori ta, ta, lo12(symbol) ; LO12S0
9480 jr5 ta ;
9481 $1: ; LABEL
9482
9483 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9484 optimize off or optimize for space
9485 bne rt, ra, $1 ; LONGJUMP3
9486 sethi ta, hi20(symbol) ; HI20
9487 ori ta, ta, lo12(symbol) ; LO12S0
9488 jr5 ta ;
9489 $1: ;
9490
9491 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9492 16-bit off if no INSN16
9493 bne rt, ra, $1 ; LONGJUMP3
9494 sethi ta, hi20(symbol) ; HI20
9495 ori ta, ta, lo12(symbol) ; LO12S0
9496 jr ta ;
9497 $1: ;
9498
9499 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9500 16-bit off if no INSN16
9501 bne rt, ra, $1 ; LONGJUMP3
9502 sethi ta, hi20(symbol) ; HI20
9503 ori ta, ta, lo12(symbol) ; LO12S0
9504 jr ta ;
9505 $1: ; LABEL */
9506
9507 /* Get the reloc for the address from which the register is
9508 being loaded. This reloc will tell us which function is
9509 actually being called. */
9510 enum elf_nds32_reloc_type checked_types[] =
9511 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9512
9513 int reloc_off = 0, cond_removed = 0, convertible;
9514 bfd_vma laddr;
9515 int seq_len; /* Original length of instruction sequence. */
9516 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9517 int pic_ext_target = 0, first_size;
9518 unsigned int i;
9519 bfd_signed_vma foff;
9520 uint32_t insn, re_insn = 0;
9521 uint16_t insn16, re_insn16 = 0;
9522 unsigned long reloc, cond_reloc;
9523
9524 irelend = internal_relocs + sec->reloc_count;
9525 seq_len = GET_SEQ_LEN (irel->r_addend);
9526 laddr = irel->r_offset;
9527 *insn_len = seq_len;
9528
9529 convertible = IS_1ST_CONVERT (irel->r_addend);
9530
9531 if (convertible)
9532 first_size = 2;
9533 else
9534 first_size = 4;
9535
9536 /* Get all needed relocations. */
9537 hi_irelfn =
9538 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9539 R_NDS32_HI20_RELA, laddr + first_size);
9540 lo_irelfn =
9541 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9542 R_NDS32_LO12S0_ORI_RELA,
9543 laddr + first_size + 4);
9544
9545 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9546 {
9547 cond_irelfn =
9548 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9549 checked_types[i], laddr);
9550 if (cond_irelfn != irelend)
9551 break;
9552 }
9553
9554 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9555 {
9556 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
9557 irel->r_offset);
9558 return FALSE;
9559 }
9560
9561 /* Get the value of the symbol referred to by the reloc. */
9562 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9563 &pic_ext_target);
9564
9565 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9566 || foff >= CONSERVATIVE_24BIT_S1)
9567 return FALSE;
9568
9569 /* Get the all corresponding instructions. */
9570 if (first_size == 4)
9571 {
9572 insn = bfd_getb32 (contents + laddr);
9573 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9574 }
9575 else
9576 {
9577 insn16 = bfd_getb16 (contents + laddr);
9578 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9579 }
9580
9581 /* For simplicity of coding, we are going to modify the section
9582 contents, the section relocs, and the BFD symbol table. We
9583 must tell the rest of the code not to free up this
9584 information. It would be possible to instead create a table
9585 of changes which have to be made, as is done in coff-mips.c;
9586 that would be more work, but would require less memory when
9587 the linker is run. */
9588
9589 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9590 && foff < ACCURATE_8BIT_S1 - first_size)
9591 {
9592 if (!(seq_len & 0x2))
9593 {
9594 /* Don't convert it to 16-bit now, keep this as relaxable
9595 for ``label reloc; INSN1a''6. */
9596 /* Save comp_insn32 to buffer. */
9597 bfd_putb32 (re_insn, contents + irel->r_offset);
9598 *insn_len = 4;
9599 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9600 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9601 cond_reloc = R_NDS32_INSN16;
9602 }
9603 else
9604 {
9605 /* Not optimize for speed; convert sequence to 16-bit. */
9606 /* Save comp_insn16 to buffer. */
9607 bfd_putb16 (re_insn16, contents + irel->r_offset);
9608 *insn_len = 2;
9609 reloc = R_NDS32_9_PCREL_RELA;
9610 cond_reloc = R_NDS32_NONE;
9611 }
9612 cond_removed = 1;
9613 }
9614 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9615 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9616 && foff < ACCURATE_14BIT_S1 - first_size))
9617 {
9618 /* beqs label ; 15_PCREL */
9619 bfd_putb32 (re_insn, contents + irel->r_offset);
9620 *insn_len = 4;
9621 reloc = R_NDS32_15_PCREL_RELA;
9622 cond_reloc = R_NDS32_NONE;
9623 cond_removed = 1;
9624 }
9625 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9626 && foff >= -CONSERVATIVE_16BIT_S1
9627 && foff < CONSERVATIVE_16BIT_S1)
9628 {
9629 /* beqz label ; 17_PCREL */
9630 bfd_putb32 (re_insn, contents + irel->r_offset);
9631 *insn_len = 4;
9632 reloc = R_NDS32_17_PCREL_RELA;
9633 cond_reloc = R_NDS32_NONE;
9634 cond_removed = 1;
9635 }
9636 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9637 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9638 {
9639 /* Relax to one of the following 3 variations
9640
9641 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9642 for space
9643 bnes38 rt, $1 ; LONGJUMP2
9644 j label ; 25_PCREL
9645 $1
9646
9647 case 4-4; 1st insn not convertible, others don't care
9648 bne rt, ra, $1 ; LONGJUMP2
9649 j label ; 25_PCREL
9650 $1
9651
9652 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9653 bne rt, ra, $1 ; LONGJUMP2
9654 j label ; 25_PCREL
9655 $1 */
9656
9657 /* Offset for first instruction. */
9658
9659 /* Use j label as second instruction. */
9660 *insn_len = 4 + first_size;
9661 insn = INSN_J;
9662 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9663 reloc = R_NDS32_LONGJUMP2;
9664 cond_reloc = R_NDS32_25_PLTREL;
9665 }
9666 else
9667 return FALSE;
9668
9669 if (cond_removed == 1)
9670 {
9671 /* Set all relocations. */
9672 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9673 irel->r_addend = hi_irelfn->r_addend;
9674
9675 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9676 cond_reloc);
9677 cond_irelfn->r_addend = 0;
9678 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9679 R_NDS32_NONE);
9680 }
9681 else
9682 {
9683 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9684 irel->r_addend = irel->r_addend;
9685 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9686 cond_reloc);
9687 }
9688
9689 if ((seq_len ^ *insn_len ) & 0x2)
9690 {
9691 insn16 = NDS32_NOP16;
9692 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9693 lo_irelfn->r_offset = *insn_len;
9694 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9695 R_NDS32_INSN16);
9696 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9697 *insn_len += 2;
9698 }
9699 else
9700 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9701 R_NDS32_NONE);
9702 return TRUE;
9703 }
9704
9705 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
9706
9707 static bfd_boolean
9708 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9709 Elf_Internal_Rela *internal_relocs, int *insn_len,
9710 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9711 Elf_Internal_Shdr *symtab_hdr)
9712 {
9713 /* The pattern for LONGCALL4. Support for function cse.
9714 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9715 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9716 jral ta ; PTR_RES/EMPTY/INSN16 */
9717
9718 bfd_vma laddr;
9719 uint32_t insn;
9720 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9721 Elf_Internal_Rela *irelend;
9722 int pic_ext_target = 0;
9723 bfd_signed_vma foff;
9724
9725 irelend = internal_relocs + sec->reloc_count;
9726 laddr = irel->r_offset;
9727
9728 /* Get the reloc for the address from which the register is
9729 being loaded. This reloc will tell us which function is
9730 actually being called. */
9731 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9732 R_NDS32_HI20_RELA, laddr);
9733
9734 if (hi_irel == irelend)
9735 {
9736 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
9737 irel->r_offset);
9738 return FALSE;
9739 }
9740
9741 /* Get the value of the symbol referred to by the reloc. */
9742 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9743 &pic_ext_target);
9744
9745 /* This condition only happened when symbol is undefined. */
9746 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9747 || foff >= CONSERVATIVE_24BIT_S1)
9748 return FALSE;
9749
9750 /* Relax to: jal symbol; 25_PCREL */
9751 /* For simplicity of coding, we are going to modify the section
9752 contents, the section relocs, and the BFD symbol table. We
9753 must tell the rest of the code not to free up this
9754 information. It would be possible to instead create a table
9755 of changes which have to be made, as is done in coff-mips.c;
9756 that would be more work, but would require less memory when
9757 the linker is run. */
9758
9759 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9760 R_NDS32_PTR_RESOLVED, irel->r_addend);
9761 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9762 R_NDS32_EMPTY, irel->r_addend);
9763
9764 if (ptr_irel == irelend || em_irel == irelend)
9765 {
9766 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
9767 irel->r_offset);
9768 return FALSE;
9769 }
9770 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9771 insn = bfd_getb32 (contents + irel->r_addend);
9772 if (insn & 0x80000000)
9773 return FALSE;
9774
9775 /* Replace the long call with a jal. */
9776 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9777 R_NDS32_25_PCREL_RELA);
9778 ptr_irel->r_addend = 1;
9779
9780 /* We don't resolve this here but resolve it in relocate_section. */
9781 insn = INSN_JAL;
9782 bfd_putb32 (insn, contents + em_irel->r_offset);
9783
9784 irel->r_info =
9785 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9786
9787 /* If there is function cse, HI20 can not remove now. */
9788 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9789 R_NDS32_LONGCALL4, laddr);
9790 if (call_irel == irelend)
9791 {
9792 *insn_len = 0;
9793 hi_irel->r_info =
9794 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9795 }
9796
9797 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9798 R_NDS32_INSN16, irel->r_addend);
9799 if (insn_irel != irelend)
9800 insn_irel->r_info =
9801 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9802
9803 return TRUE;
9804 }
9805
9806 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
9807
9808 static bfd_boolean
9809 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9810 Elf_Internal_Rela *internal_relocs, int *insn_len,
9811 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9812 Elf_Internal_Shdr *symtab_hdr)
9813 {
9814 /* The pattern for LONGCALL5.
9815 bltz rt, .L1 ; LONGCALL5/17_PCREL
9816 jal symbol ; 25_PCREL
9817 .L1: */
9818
9819 bfd_vma laddr;
9820 uint32_t insn;
9821 Elf_Internal_Rela *cond_irel, *irelend;
9822 int pic_ext_target = 0;
9823 bfd_signed_vma foff;
9824
9825 irelend = internal_relocs + sec->reloc_count;
9826 laddr = irel->r_offset;
9827 insn = bfd_getb32 (contents + laddr);
9828
9829 /* Get the reloc for the address from which the register is
9830 being loaded. This reloc will tell us which function is
9831 actually being called. */
9832 cond_irel =
9833 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9834 R_NDS32_25_PCREL_RELA, irel->r_addend);
9835 if (cond_irel == irelend)
9836 {
9837 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
9838 irel->r_offset);
9839 return FALSE;
9840 }
9841
9842 /* Get the value of the symbol referred to by the reloc. */
9843 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9844 &pic_ext_target);
9845
9846 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9847 || foff >= CONSERVATIVE_16BIT_S1)
9848 return FALSE;
9849
9850 /* Relax to bgezal rt, label ; 17_PCREL
9851 or bltzal rt, label ; 17_PCREL */
9852
9853 /* Convert to complimentary conditional call. */
9854 insn = CONVERT_CONDITION_CALL (insn);
9855
9856 /* For simplicity of coding, we are going to modify the section
9857 contents, the section relocs, and the BFD symbol table. We
9858 must tell the rest of the code not to free up this
9859 information. It would be possible to instead create a table
9860 of changes which have to be made, as is done in coff-mips.c;
9861 that would be more work, but would require less memory when
9862 the linker is run. */
9863
9864 /* Modify relocation and contents. */
9865 cond_irel->r_info =
9866 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
9867
9868 /* Replace the long call with a bgezal. */
9869 bfd_putb32 (insn, contents + cond_irel->r_offset);
9870 *insn_len = 0;
9871
9872 /* Clean unnessary relocations. */
9873 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9874
9875 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9876 R_NDS32_17_PCREL_RELA, laddr);
9877 cond_irel->r_info =
9878 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9879
9880 return TRUE;
9881 }
9882
9883 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
9884
9885 static bfd_boolean
9886 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9887 Elf_Internal_Rela *internal_relocs, int *insn_len,
9888 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9889 Elf_Internal_Shdr *symtab_hdr)
9890 {
9891 /* The pattern for LONGCALL6.
9892 bltz rt, .L1 ; LONGCALL6/17_PCREL
9893 sethi ta, hi20(symbol) ; HI20/PTR
9894 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9895 jral ta ; PTR_RES/EMPTY/INSN16
9896 .L1 */
9897
9898 bfd_vma laddr;
9899 uint32_t insn;
9900 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9901 int pic_ext_target = 0;
9902 bfd_signed_vma foff;
9903
9904 irelend = internal_relocs + sec->reloc_count;
9905 laddr = irel->r_offset;
9906
9907 /* Get the reloc for the address from which the register is
9908 being loaded. This reloc will tell us which function is
9909 actually being called. */
9910 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9911 R_NDS32_EMPTY, irel->r_addend);
9912
9913 if (em_irel == irelend)
9914 {
9915 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
9916 irel->r_offset);
9917 return FALSE;
9918 }
9919
9920 /* Get the value of the symbol referred to by the reloc. */
9921 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9922 &pic_ext_target);
9923
9924 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9925 || foff >= CONSERVATIVE_24BIT_S1)
9926 return FALSE;
9927
9928 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9929 insn = bfd_getb32 (contents + irel->r_addend);
9930 if (insn & 0x80000000)
9931 return FALSE;
9932
9933 insn = bfd_getb32 (contents + laddr);
9934 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9935 {
9936 /* Relax to bgezal rt, label ; 17_PCREL
9937 or bltzal rt, label ; 17_PCREL */
9938
9939 /* Convert to complimentary conditional call. */
9940 *insn_len = 0;
9941 insn = CONVERT_CONDITION_CALL (insn);
9942 bfd_putb32 (insn, contents + em_irel->r_offset);
9943
9944 em_irel->r_info =
9945 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9946
9947 /* Set resolved relocation. */
9948 cond_irel =
9949 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9950 R_NDS32_PTR_RESOLVED, irel->r_addend);
9951 if (cond_irel == irelend)
9952 {
9953 _bfd_error_handler (unrecognized_reloc_msg, abfd,
9954 "R_NDS32_LONGCALL6", irel->r_offset);
9955 return FALSE;
9956 }
9957 cond_irel->r_addend = 1;
9958
9959 /* Clear relocations. */
9960
9961 irel->r_info =
9962 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9963
9964 cond_irel =
9965 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9966 R_NDS32_17_PCREL_RELA, laddr);
9967 if (cond_irel != irelend)
9968 cond_irel->r_info =
9969 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9970
9971 cond_irel =
9972 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9973 R_NDS32_INSN16, irel->r_addend);
9974 if (cond_irel != irelend)
9975 cond_irel->r_info =
9976 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9977
9978 }
9979 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9980 {
9981 /* Relax to the following instruction sequence
9982 bltz rt, .L1 ; LONGCALL2/17_PCREL
9983 jal symbol ; 25_PCREL/PTR_RES
9984 .L1 */
9985 *insn_len = 4;
9986 /* Convert instruction. */
9987 insn = INSN_JAL;
9988 bfd_putb32 (insn, contents + em_irel->r_offset);
9989
9990 /* Convert relocations. */
9991 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9992 R_NDS32_25_PCREL_RELA);
9993 irel->r_info =
9994 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
9995
9996 /* Set resolved relocation. */
9997 cond_irel =
9998 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9999 R_NDS32_PTR_RESOLVED, irel->r_addend);
10000 if (cond_irel == irelend)
10001 {
10002 _bfd_error_handler (unrecognized_reloc_msg, abfd,
10003 "R_NDS32_LONGCALL6", irel->r_offset);
10004 return FALSE;
10005 }
10006 cond_irel->r_addend = 1;
10007
10008 cond_irel =
10009 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10010 R_NDS32_INSN16, irel->r_addend);
10011 if (cond_irel != irelend)
10012 cond_irel->r_info =
10013 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10014 }
10015 return TRUE;
10016 }
10017
10018 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
10019
10020 static bfd_boolean
10021 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10022 Elf_Internal_Rela *internal_relocs, int *insn_len,
10023 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10024 Elf_Internal_Shdr *symtab_hdr)
10025 {
10026 /* The pattern for LONGJUMP4.
10027 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10028 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10029 jr ta ; PTR_RES/INSN16/EMPTY */
10030
10031 bfd_vma laddr;
10032 int seq_len; /* Original length of instruction sequence. */
10033 uint32_t insn;
10034 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10035 int pic_ext_target = 0;
10036 bfd_signed_vma foff;
10037
10038 irelend = internal_relocs + sec->reloc_count;
10039 seq_len = GET_SEQ_LEN (irel->r_addend);
10040 laddr = irel->r_offset;
10041 *insn_len = seq_len;
10042
10043 /* Get the reloc for the address from which the register is
10044 being loaded. This reloc will tell us which function is
10045 actually being called. */
10046
10047 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10048 R_NDS32_HI20_RELA, laddr);
10049
10050 if (hi_irel == irelend)
10051 {
10052 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
10053 irel->r_offset);
10054 return FALSE;
10055 }
10056
10057 /* Get the value of the symbol referred to by the reloc. */
10058 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10059 &pic_ext_target);
10060
10061 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10062 || foff < -CONSERVATIVE_24BIT_S1)
10063 return FALSE;
10064
10065 /* Convert it to "j label", it may be converted to j8 in the final
10066 pass of relaxation. Therefore, we do not consider this currently. */
10067 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10068 R_NDS32_PTR_RESOLVED, irel->r_addend);
10069 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10070 R_NDS32_EMPTY, irel->r_addend);
10071
10072 if (ptr_irel == irelend || em_irel == irelend)
10073 {
10074 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
10075 irel->r_offset);
10076 return FALSE;
10077 }
10078
10079 em_irel->r_info =
10080 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10081 ptr_irel->r_addend = 1;
10082
10083 /* Write instruction. */
10084 insn = INSN_J;
10085 bfd_putb32 (insn, contents + em_irel->r_offset);
10086
10087 /* Clear relocations. */
10088 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10089
10090 /* If there is function cse, HI20 can not remove now. */
10091 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10092 R_NDS32_LONGJUMP4, laddr);
10093 if (call_irel == irelend)
10094 {
10095 *insn_len = 0;
10096 hi_irel->r_info =
10097 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10098 }
10099
10100 return TRUE;
10101 }
10102
10103 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
10104
10105 static bfd_boolean
10106 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10107 Elf_Internal_Rela *internal_relocs, int *insn_len,
10108 int *seq_len, bfd_byte *contents,
10109 Elf_Internal_Sym *isymbuf,
10110 Elf_Internal_Shdr *symtab_hdr)
10111 {
10112 /* There are 2 variations for LONGJUMP5
10113 case 2-4; 1st insn convertible, 16-bit on.
10114 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10115 j label ; 25_PCREL/INSN16
10116 $1:
10117
10118 case 4-4; 1st insn not convertible
10119 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10120 j label ; 25_PCREL/INSN16
10121 .L1: */
10122
10123 bfd_vma laddr;
10124 Elf_Internal_Rela *cond_irel, *irelend;
10125 int pic_ext_target = 0;
10126 unsigned int i;
10127 bfd_signed_vma foff;
10128 uint32_t insn, re_insn = 0;
10129 uint16_t insn16, re_insn16 = 0;
10130 unsigned long reloc;
10131
10132 enum elf_nds32_reloc_type checked_types[] =
10133 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10134 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10135
10136 irelend = internal_relocs + sec->reloc_count;
10137 laddr = irel->r_offset;
10138
10139 /* Get the reloc for the address from which the register is
10140 being loaded. This reloc will tell us which function is
10141 actually being called. */
10142
10143 cond_irel =
10144 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10145 R_NDS32_25_PCREL_RELA, irel->r_addend);
10146 if (cond_irel == irelend)
10147 {
10148 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
10149 irel->r_offset);
10150 return FALSE;
10151 }
10152
10153 /* Get the value of the symbol referred to by the reloc. */
10154 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10155 &pic_ext_target);
10156
10157 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10158 || foff >= CONSERVATIVE_16BIT_S1)
10159 return FALSE;
10160
10161 /* Get the all corresponding instructions. */
10162 insn = bfd_getb32 (contents + laddr);
10163 /* Check instruction size. */
10164 if (insn & 0x80000000)
10165 {
10166 *seq_len = 0;
10167 insn16 = insn >> 16;
10168 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10169 }
10170 else
10171 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10172
10173 if (N32_OP6 (re_insn) == N32_OP6_BR1
10174 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10175 {
10176 /* beqs label ; 15_PCREL. */
10177 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10178 reloc = R_NDS32_15_PCREL_RELA;
10179 }
10180 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10181 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10182 {
10183 /* beqz label ; 17_PCREL. */
10184 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10185 reloc = R_NDS32_17_PCREL_RELA;
10186 }
10187 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10188 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10189 {
10190 /* beqc label ; 9_PCREL. */
10191 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10192 reloc = R_NDS32_WORD_9_PCREL_RELA;
10193 }
10194 else
10195 return FALSE;
10196
10197 /* Set all relocations. */
10198 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10199
10200 /* Clean relocations. */
10201 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10202 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10203 {
10204 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10205 checked_types[i], laddr);
10206 if (cond_irel != irelend)
10207 {
10208 if (*seq_len == 0
10209 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10210 {
10211 /* If the branch instruction is 2 byte, it cannot remove
10212 directly. Only convert it to nop16 and remove it after
10213 checking alignment issue. */
10214 insn16 = NDS32_NOP16;
10215 bfd_putb16 (insn16, contents + laddr);
10216 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10217 }
10218 else
10219 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10220 R_NDS32_NONE);
10221 }
10222 }
10223 *insn_len = 0;
10224
10225 return TRUE;
10226 }
10227
10228 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
10229
10230 static bfd_boolean
10231 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10232 Elf_Internal_Rela *internal_relocs, int *insn_len,
10233 int *seq_len, bfd_byte *contents,
10234 Elf_Internal_Sym *isymbuf,
10235 Elf_Internal_Shdr *symtab_hdr)
10236 {
10237 /* There are 5 variations for LONGJUMP6
10238 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10239 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10240 sethi ta, hi20(symbol) ; HI20/PTR
10241 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10242 jr ta ; PTR_RES/INSN16/EMPTY
10243 .L1:
10244
10245 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10246 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10247 sethi ta, hi20(symbol) ; HI20/PTR
10248 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10249 jr ta ; PTR_RES/INSN16/EMPTY
10250 .L1: */
10251
10252 enum elf_nds32_reloc_type checked_types[] =
10253 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10254 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10255
10256 int reloc_off = 0, cond_removed = 0;
10257 bfd_vma laddr;
10258 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10259 int pic_ext_target = 0;
10260 unsigned int i;
10261 bfd_signed_vma foff;
10262 uint32_t insn, re_insn = 0;
10263 uint16_t insn16, re_insn16 = 0;
10264 unsigned long reloc;
10265
10266 irelend = internal_relocs + sec->reloc_count;
10267 laddr = irel->r_offset;
10268
10269 /* Get the reloc for the address from which the register is
10270 being loaded. This reloc will tell us which function is
10271 actually being called. */
10272 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10273 R_NDS32_EMPTY, irel->r_addend);
10274
10275 if (em_irel == irelend)
10276 {
10277 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
10278 irel->r_offset);
10279 return FALSE;
10280 }
10281
10282 /* Get the value of the symbol referred to by the reloc. */
10283 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10284 &pic_ext_target);
10285
10286 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10287 || foff >= CONSERVATIVE_24BIT_S1)
10288 return FALSE;
10289
10290 insn = bfd_getb32 (contents + laddr);
10291 /* Check instruction size. */
10292 if (insn & 0x80000000)
10293 {
10294 *seq_len = 0;
10295 insn16 = insn >> 16;
10296 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10297 }
10298 else
10299 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10300
10301 /* For simplicity of coding, we are going to modify the section
10302 contents, the section relocs, and the BFD symbol table. We
10303 must tell the rest of the code not to free up this
10304 information. It would be possible to instead create a table
10305 of changes which have to be made, as is done in coff-mips.c;
10306 that would be more work, but would require less memory when
10307 the linker is run. */
10308
10309 if (N32_OP6 (re_insn) == N32_OP6_BR1
10310 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10311 {
10312 /* beqs label ; 15_PCREL */
10313 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10314 reloc = R_NDS32_15_PCREL_RELA;
10315 cond_removed = 1;
10316 }
10317 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10318 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10319 {
10320 /* beqz label ; 17_PCREL */
10321 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10322 reloc = R_NDS32_17_PCREL_RELA;
10323 cond_removed = 1;
10324 }
10325 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10326 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10327 {
10328 /* Relax to one of the following 2 variations
10329
10330 case 2-4; 1st insn convertible, 16-bit on.
10331 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10332 j label ; 25_PCREL/INSN16
10333 $1:
10334
10335 case 4-4; 1st insn not convertible
10336 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10337 j label ; 25_PCREL/INSN16
10338 .L1: */
10339
10340 /* Use j label as second instruction. */
10341 insn = INSN_J;
10342 reloc = R_NDS32_25_PCREL_RELA;
10343 bfd_putb32 (insn, contents + em_irel->r_offset);
10344 }
10345 else
10346 return FALSE;
10347
10348 /* Set all relocations. */
10349 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10350
10351 cond_irel =
10352 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10353 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10354 cond_irel->r_addend = 1;
10355
10356 /* Use INSN16 of first branch instruction to distinguish if keeping
10357 INSN16 of final instruction or not. */
10358 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10359 R_NDS32_INSN16, irel->r_offset);
10360 if (insn_irel == irelend)
10361 {
10362 /* Clean the final INSN16. */
10363 insn_irel =
10364 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10365 R_NDS32_INSN16, em_irel->r_offset);
10366 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10367 R_NDS32_NONE);
10368 }
10369
10370 if (cond_removed == 1)
10371 {
10372 *insn_len = 0;
10373
10374 /* Clear relocations. */
10375 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10376
10377 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10378 {
10379 cond_irel =
10380 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10381 checked_types[i], laddr);
10382 if (cond_irel != irelend)
10383 {
10384 if (*seq_len == 0
10385 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10386 {
10387 /* If the branch instruction is 2 byte, it cannot remove
10388 directly. Only convert it to nop16 and remove it after
10389 checking alignment issue. */
10390 insn16 = NDS32_NOP16;
10391 bfd_putb16 (insn16, contents + laddr);
10392 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10393 }
10394 else
10395 cond_irel->r_info =
10396 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10397 }
10398 }
10399 }
10400 else
10401 {
10402 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10403 R_NDS32_LONGJUMP5);
10404 }
10405
10406 return TRUE;
10407 }
10408
10409 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
10410
10411 static bfd_boolean
10412 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10413 Elf_Internal_Rela *internal_relocs, int *insn_len,
10414 int *seq_len, bfd_byte *contents,
10415 Elf_Internal_Sym *isymbuf,
10416 Elf_Internal_Shdr *symtab_hdr)
10417 {
10418 /* There are 2 variations for LONGJUMP5
10419 case 2-4; 1st insn convertible, 16-bit on.
10420 movi55 ta, imm11 ; LONGJUMP7/INSN16
10421 beq rt, ta, label ; 15_PCREL
10422
10423 case 4-4; 1st insn not convertible
10424 movi55 ta, imm11 ; LONGJUMP7/INSN16
10425 beq rt, ta, label ; 15_PCREL */
10426
10427 bfd_vma laddr;
10428 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10429 int pic_ext_target = 0;
10430 bfd_signed_vma foff;
10431 uint32_t insn, re_insn = 0;
10432 uint16_t insn16;
10433 uint32_t imm11;
10434
10435 irelend = internal_relocs + sec->reloc_count;
10436 laddr = irel->r_offset;
10437
10438 /* Get the reloc for the address from which the register is
10439 being loaded. This reloc will tell us which function is
10440 actually being called. */
10441
10442 cond_irel =
10443 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10444 R_NDS32_15_PCREL_RELA, irel->r_addend);
10445 if (cond_irel == irelend)
10446 {
10447 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
10448 irel->r_offset);
10449 return FALSE;
10450 }
10451
10452 /* Get the value of the symbol referred to by the reloc. */
10453 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10454 &pic_ext_target);
10455
10456 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10457 || foff >= CONSERVATIVE_8BIT_S1)
10458 return FALSE;
10459
10460 /* Get the first instruction for its size. */
10461 insn = bfd_getb32 (contents + laddr);
10462 if (insn & 0x80000000)
10463 {
10464 *seq_len = 0;
10465 /* Get the immediate from movi55. */
10466 imm11 = N16_IMM5S (insn >> 16);
10467 }
10468 else
10469 {
10470 /* Get the immediate from movi. */
10471 imm11 = N32_IMM20S (insn);
10472 }
10473
10474 /* Get the branch instruction. */
10475 insn = bfd_getb32 (contents + irel->r_addend);
10476 /* Convert instruction to BR3. */
10477 if ((insn >> 14) & 0x1)
10478 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10479 else
10480 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10481
10482 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10483
10484 /* Set all relocations. */
10485 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10486 R_NDS32_WORD_9_PCREL_RELA);
10487
10488 /* Clean relocations. */
10489 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10490 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10491 R_NDS32_INSN16, irel->r_offset);
10492 if (insn_irel != irelend)
10493 {
10494 if (*seq_len == 0)
10495 {
10496 /* If the first insntruction is 16bit, convert it to nop16. */
10497 insn16 = NDS32_NOP16;
10498 bfd_putb16 (insn16, contents + laddr);
10499 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10500 }
10501 else
10502 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10503 R_NDS32_NONE);
10504 }
10505 *insn_len = 0;
10506
10507 return TRUE;
10508 }
10509
10510 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10511
10512 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */
10513
10514 static bfd_boolean
10515 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10516 asection *sec, Elf_Internal_Rela *irel,
10517 Elf_Internal_Rela *internal_relocs, int *insn_len,
10518 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10519 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10520 {
10521 int eliminate_sethi = 0, range_type;
10522 unsigned int i;
10523 bfd_vma local_sda, laddr;
10524 int seq_len; /* Original length of instruction sequence. */
10525 uint32_t insn;
10526 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10527 bfd_vma access_addr = 0;
10528 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10529 enum elf_nds32_reloc_type checked_types[] =
10530 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10531 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10532 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10533 R_NDS32_TLS_LE_HI20
10534 };
10535
10536 irelend = internal_relocs + sec->reloc_count;
10537 seq_len = GET_SEQ_LEN (irel->r_addend);
10538 laddr = irel->r_offset;
10539 *insn_len = seq_len;
10540
10541 /* Get the high part relocation. */
10542 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
10543 {
10544 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10545 checked_types[i], laddr);
10546 if (hi_irelfn != irelend)
10547 break;
10548 }
10549
10550 if (hi_irelfn == irelend)
10551 {
10552 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
10553 irel->r_offset);
10554 return FALSE;
10555 }
10556
10557 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10558 nds32_elf_final_sda_base (sec->output_section->owner,
10559 link_info, &local_sda, FALSE);
10560
10561 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10562 {
10563 case R_NDS32_HI20_RELA:
10564 insn = bfd_getb32 (contents + laddr);
10565 access_addr =
10566 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10567
10568 if (range_type == NDS32_LOADSTORE_IMM)
10569 {
10570 struct elf_link_hash_entry *h = NULL;
10571 int indx;
10572
10573 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10574 {
10575 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10576 h = elf_sym_hashes (abfd)[indx];
10577 }
10578
10579 if ((access_addr < CONSERVATIVE_20BIT)
10580 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10581 {
10582 eliminate_sethi = 1;
10583 break;
10584 }
10585
10586 /* This is avoid to relax symbol address which is fixed
10587 relocations. Ex: _stack. */
10588 if (h && bfd_is_abs_section (h->root.u.def.section))
10589 return FALSE;
10590 }
10591
10592 if (!load_store_relax)
10593 return FALSE;
10594
10595 /* Case for set gp register. */
10596 if (N32_RT5 (insn) == REG_GP)
10597 break;
10598
10599 if (range_type == NDS32_LOADSTORE_FLOAT_S
10600 || range_type == NDS32_LOADSTORE_FLOAT_S)
10601 {
10602 range_l = sdata_range[0][0];
10603 range_h = sdata_range[0][1];
10604 }
10605 else
10606 {
10607 range_l = sdata_range[1][0];
10608 range_h = sdata_range[1][1];
10609 }
10610 break;
10611
10612 case R_NDS32_GOT_HI20:
10613 access_addr =
10614 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10615
10616 /* If this symbol is not in .got, the return value will be -1.
10617 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10618 a negative offset is allowed. */
10619 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10620 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10621 eliminate_sethi = 1;
10622 break;
10623
10624 case R_NDS32_PLT_GOTREL_HI20:
10625 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10626 hi_irelfn, symtab_hdr);
10627
10628 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10629 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10630 eliminate_sethi = 1;
10631 break;
10632
10633 case R_NDS32_GOTOFF_HI20:
10634 access_addr =
10635 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10636
10637 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10638 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10639 eliminate_sethi = 1;
10640 break;
10641
10642 case R_NDS32_GOTPC_HI20:
10643 /* The access_addr must consider r_addend of hi_irel. */
10644 access_addr = sec->output_section->vma + sec->output_offset
10645 + irel->r_offset + hi_irelfn->r_addend;
10646
10647 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10648 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10649 eliminate_sethi = 1;
10650 break;
10651
10652 case R_NDS32_TLS_LE_HI20:
10653 access_addr =
10654 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10655 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10656 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10657 if ((range_type == NDS32_LOADSTORE_IMM)
10658 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10659 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10660 eliminate_sethi = 1;
10661 break;
10662
10663 default:
10664 return FALSE;
10665 }
10666
10667 /* Delete sethi instruction. */
10668 if (eliminate_sethi == 1
10669 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10670 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10671 {
10672 hi_irelfn->r_info =
10673 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10674 irel->r_info =
10675 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10676 *insn_len = 0;
10677 }
10678 return TRUE;
10679 }
10680
10681 /* Relax LO12 relocation for nds32_elf_relax_section. */
10682
10683 static void
10684 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10685 asection *sec, Elf_Internal_Rela *irel,
10686 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10687 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10688 {
10689 uint32_t insn;
10690 bfd_vma local_sda, laddr;
10691 unsigned long reloc;
10692 bfd_vma access_addr;
10693 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10694 Elf_Internal_Rela *irelfn = NULL, *irelend;
10695 struct elf_link_hash_entry *h = NULL;
10696 int indx;
10697
10698 /* For SDA base relative relaxation. */
10699 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10700 &local_sda, FALSE);
10701
10702 irelend = internal_relocs + sec->reloc_count;
10703 laddr = irel->r_offset;
10704 insn = bfd_getb32 (contents + laddr);
10705
10706 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10707 return;
10708
10709 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10710
10711 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10712 {
10713 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10714 h = elf_sym_hashes (abfd)[indx];
10715 }
10716
10717 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10718 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10719 {
10720 reloc = R_NDS32_20_RELA;
10721 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10722 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10723 bfd_putb32 (insn, contents + laddr);
10724 }
10725 /* This is avoid to relax symbol address which is fixed
10726 relocations. Ex: _stack. */
10727 else if (N32_OP6 (insn) == N32_OP6_ORI
10728 && h && bfd_is_abs_section (h->root.u.def.section))
10729 return;
10730 else
10731 {
10732 range_l = sdata_range[1][0];
10733 range_h = sdata_range[1][1];
10734 switch (ELF32_R_TYPE (irel->r_info))
10735 {
10736 case R_NDS32_LO12S0_RELA:
10737 reloc = R_NDS32_SDA19S0_RELA;
10738 break;
10739 case R_NDS32_LO12S1_RELA:
10740 reloc = R_NDS32_SDA18S1_RELA;
10741 break;
10742 case R_NDS32_LO12S2_RELA:
10743 reloc = R_NDS32_SDA17S2_RELA;
10744 break;
10745 case R_NDS32_LO12S2_DP_RELA:
10746 range_l = sdata_range[0][0];
10747 range_h = sdata_range[0][1];
10748 reloc = R_NDS32_SDA12S2_DP_RELA;
10749 break;
10750 case R_NDS32_LO12S2_SP_RELA:
10751 range_l = sdata_range[0][0];
10752 range_h = sdata_range[0][1];
10753 reloc = R_NDS32_SDA12S2_SP_RELA;
10754 break;
10755 default:
10756 return;
10757 }
10758
10759 /* There are range_h and range_l because linker has to promise
10760 all sections move cross one page together. */
10761 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10762 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10763 {
10764 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
10765 {
10766 /* Maybe we should add R_NDS32_INSN16 reloc type here
10767 or manually do some optimization. sethi can't be
10768 eliminated when updating $gp so the relative ori
10769 needs to be preserved. */
10770 return;
10771 }
10772 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10773 &insn))
10774 return;
10775 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10776 bfd_putb32 (insn, contents + laddr);
10777
10778 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10779 R_NDS32_INSN16);
10780 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10781 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10782 irelfn->r_info =
10783 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10784
10785 }
10786 }
10787 return;
10788 }
10789
10790 /* Relax low part of PIC instruction pattern. */
10791
10792 static void
10793 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10794 asection *sec, Elf_Internal_Rela *irel,
10795 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10796 Elf_Internal_Shdr *symtab_hdr)
10797 {
10798 uint32_t insn;
10799 bfd_vma local_sda, laddr;
10800 bfd_signed_vma foff;
10801 unsigned long reloc;
10802
10803 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10804 &local_sda, FALSE);
10805 laddr = irel->r_offset;
10806 insn = bfd_getb32 (contents + laddr);
10807
10808 if (N32_OP6 (insn) != N32_OP6_ORI)
10809 return;
10810
10811 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10812 {
10813 foff = calculate_got_memory_address (abfd, link_info, irel,
10814 symtab_hdr) - local_sda;
10815 reloc = R_NDS32_GOT20;
10816 }
10817 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10818 {
10819 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10820 symtab_hdr) - local_sda;
10821 reloc = R_NDS32_PLT_GOTREL_LO20;
10822 }
10823 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10824 {
10825 foff = calculate_memory_address (abfd, irel, isymbuf,
10826 symtab_hdr) - local_sda;
10827 reloc = R_NDS32_GOTOFF;
10828 }
10829 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10830 {
10831 foff = local_sda - sec->output_section->vma + sec->output_offset
10832 + irel->r_offset + irel->r_addend;
10833 reloc = R_NDS32_GOTPC20;
10834 }
10835 else
10836 return;
10837
10838 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10839 {
10840 /* Turn into MOVI. */
10841 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10842 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10843 bfd_putb32 (insn, contents + laddr);
10844 }
10845 }
10846
10847 /* Relax low part of LE TLS instruction pattern. */
10848
10849 static void
10850 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10851 Elf_Internal_Rela *irel,
10852 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10853 Elf_Internal_Shdr *symtab_hdr)
10854 {
10855 uint32_t insn;
10856 bfd_vma laddr;
10857 bfd_signed_vma foff;
10858 unsigned long reloc;
10859
10860 laddr = irel->r_offset;
10861 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10862 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10863 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10864 insn = bfd_getb32 (contents + laddr);
10865
10866 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10867 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10868 {
10869 /* Pattern sethi-ori transform to movi. */
10870 reloc = R_NDS32_TLS_LE_20;
10871 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10872 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10873 bfd_putb32 (insn, contents + laddr);
10874 }
10875 }
10876
10877 /* Relax LE TLS calculate address instruction pattern. */
10878
10879 static void
10880 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10881 asection *sec, Elf_Internal_Rela *irel,
10882 Elf_Internal_Rela *internal_relocs,
10883 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10884 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10885 {
10886 /* Local TLS non-pic
10887 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
10888 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
10889 add ra, ta, tp ; TLS_LE_ADD */
10890
10891 uint32_t insn;
10892 bfd_vma laddr;
10893 bfd_signed_vma foff;
10894 Elf_Internal_Rela *i1_irelfn, *irelend;
10895
10896 irelend = internal_relocs + sec->reloc_count;
10897 laddr = irel->r_offset;
10898 insn = bfd_getb32 (contents + laddr);
10899 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10900 R_NDS32_PTR_RESOLVED);
10901 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10902 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10903 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10904
10905 /* The range is +/-16k. */
10906 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10907 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10908 {
10909 /* Transform add to addi. */
10910 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10911 irel->r_info =
10912 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10913
10914 bfd_putb32 (insn, contents + laddr);
10915 if (i1_irelfn != irelend)
10916 {
10917 i1_irelfn->r_addend |= 1;
10918 *again = TRUE;
10919 }
10920 }
10921 }
10922
10923 /* Relax LE TLS load store instruction pattern. */
10924
10925 static void
10926 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10927 asection *sec, Elf_Internal_Rela *irel,
10928 Elf_Internal_Rela *internal_relocs,
10929 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10930 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10931 {
10932
10933 uint32_t insn;
10934 bfd_vma laddr;
10935 bfd_signed_vma foff;
10936 Elf_Internal_Rela *i1_irelfn, *irelend;
10937 int success = 0;
10938
10939 irelend = internal_relocs + sec->reloc_count;
10940 laddr = irel->r_offset;
10941 insn = bfd_getb32 (contents + laddr);
10942 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10943 R_NDS32_PTR_RESOLVED);
10944 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10945 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10946 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10947
10948 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10949 {
10950 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10951 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10952 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10953 /* The range is +/-16k. */
10954 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10955 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10956 {
10957 insn =
10958 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10959 irel->r_info =
10960 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10961 success = 1;
10962 break;
10963 }
10964 /* Fall through. */
10965 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10966 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10967 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10968 /* The range is +/-32k. */
10969 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10970 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
10971 {
10972 insn =
10973 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10974 irel->r_info =
10975 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
10976 success = 1;
10977 break;
10978 }
10979 /* Fall through. */
10980 case (N32_OP6_MEM << 8) | N32_MEM_LW:
10981 case (N32_OP6_MEM << 8) | N32_MEM_SW:
10982 /* The range is +/-64k. */
10983 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
10984 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
10985 {
10986 insn =
10987 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10988 irel->r_info =
10989 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
10990 success = 1;
10991 break;
10992 }
10993 /* Fall through. */
10994 default:
10995 break;
10996 }
10997
10998 if (success)
10999 {
11000 bfd_putb32 (insn, contents + laddr);
11001 if (i1_irelfn != irelend)
11002 {
11003 i1_irelfn->r_addend |= 1;
11004 *again = TRUE;
11005 }
11006 }
11007 }
11008
11009 /* Relax PTR relocation for nds32_elf_relax_section. */
11010
11011 static bfd_boolean
11012 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11013 Elf_Internal_Rela *internal_relocs, int *insn_len,
11014 int *seq_len, bfd_byte *contents)
11015 {
11016 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11017
11018 irelend = internal_relocs + sec->reloc_count;
11019
11020 re_irel =
11021 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11022 R_NDS32_PTR_RESOLVED, irel->r_addend);
11023
11024 if (re_irel == irelend)
11025 {
11026 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
11027 irel->r_offset);
11028 return FALSE;
11029 }
11030
11031 if (re_irel->r_addend != 1)
11032 return FALSE;
11033
11034 /* Pointed target is relaxed and no longer needs this void *,
11035 change the type to NONE. */
11036 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11037
11038 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11039 not exist, it means only count 1 and remove it directly. */
11040 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11041 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11042 R_NDS32_PTR_COUNT);
11043 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11044 R_NDS32_PTR);
11045 if (count_irel != irelend)
11046 {
11047 if (--count_irel->r_addend > 0)
11048 return FALSE;
11049 }
11050
11051 if (ptr_irel != irelend)
11052 return FALSE;
11053
11054 /* If the PTR_COUNT is already 0, remove current instruction. */
11055 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11056 *insn_len = 0;
11057 return TRUE;
11058 }
11059
11060 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11061
11062 static void
11063 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11064 asection *sec, Elf_Internal_Rela *irel,
11065 Elf_Internal_Rela *internal_relocs,
11066 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11067 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11068 {
11069 uint32_t insn;
11070 bfd_signed_vma foff;
11071 Elf_Internal_Rela *i1_irelfn, *irelend;
11072 bfd_vma local_sda, laddr;
11073
11074 irelend = internal_relocs + sec->reloc_count;
11075 laddr = irel->r_offset;
11076 insn = bfd_getb32 (contents + laddr);
11077
11078 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11079 we need additional space. It might be help if we could
11080 borrow some space from instructions to be eliminated
11081 such as sethi, ori, add. */
11082 if (insn & 0x80000000)
11083 return;
11084
11085 if (nds32_elf_check_dup_relocs
11086 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11087 return;
11088
11089 i1_irelfn =
11090 find_relocs_at_address (irel, internal_relocs, irelend,
11091 R_NDS32_PTR_RESOLVED);
11092
11093 /* FIXIT 090606
11094 The boundary should be reduced since the .plt section hasn't
11095 been created and the address of specific entry is still unknown
11096 Maybe the range between the function call and the begin of the
11097 .text section can be used to decide if the .plt is in the range
11098 of function call. */
11099
11100 if (N32_OP6 (insn) == N32_OP6_ALU1
11101 && N32_SUB5 (insn) == N32_ALU1_ADD)
11102 {
11103 /* Get the value of the symbol referred to by the reloc. */
11104 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11105 &local_sda, FALSE);
11106 foff = (bfd_signed_vma) (calculate_plt_memory_address
11107 (abfd, link_info, isymbuf, irel,
11108 symtab_hdr) - local_sda);
11109 /* This condition only happened when symbol is undefined. */
11110 if (foff == 0)
11111 return;
11112
11113 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11114 return;
11115 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11116 R_NDS32_PLT_GOTREL_LO19);
11117 /* addi.gp */
11118 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
11119 }
11120 else if (N32_OP6 (insn) == N32_OP6_JREG
11121 && N32_SUB5 (insn) == N32_JREG_JRAL)
11122 {
11123 /* Get the value of the symbol referred to by the reloc. */
11124 foff =
11125 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11126 /* This condition only happened when symbol is undefined. */
11127 if (foff == 0)
11128 return;
11129 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11130 return;
11131 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11132 insn = INSN_JAL;
11133 }
11134 else
11135 return;
11136
11137 bfd_putb32 (insn, contents + laddr);
11138 if (i1_irelfn != irelend)
11139 {
11140 i1_irelfn->r_addend |= 1;
11141 *again = TRUE;
11142 }
11143 }
11144
11145 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11146
11147 static void
11148 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11149 asection *sec, Elf_Internal_Rela *irel,
11150 Elf_Internal_Rela *internal_relocs,
11151 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11152 bfd_boolean *again)
11153 {
11154 uint32_t insn;
11155 bfd_signed_vma foff;
11156 Elf_Internal_Rela *i1_irelfn, *irelend;
11157 bfd_vma local_sda, laddr;
11158
11159 irelend = internal_relocs + sec->reloc_count;
11160 laddr = irel->r_offset;
11161 insn = bfd_getb32 (contents + laddr);
11162 if (insn & 0x80000000)
11163 return;
11164
11165 if (nds32_elf_check_dup_relocs
11166 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11167 return;
11168
11169 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11170 R_NDS32_PTR_RESOLVED);
11171
11172 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11173 &local_sda, FALSE);
11174 foff = calculate_got_memory_address (abfd, link_info, irel,
11175 symtab_hdr) - local_sda;
11176
11177 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11178 {
11179 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11180 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11181 irel->r_info =
11182 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11183 bfd_putb32 (insn, contents + laddr);
11184 if (i1_irelfn != irelend)
11185 {
11186 i1_irelfn->r_addend |= 1;
11187 *again = TRUE;
11188 }
11189 }
11190 }
11191
11192 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11193
11194 static void
11195 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11196 asection *sec, Elf_Internal_Rela *irel,
11197 Elf_Internal_Rela *internal_relocs,
11198 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11199 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11200 {
11201 int opc_insn_gotoff;
11202 uint32_t insn;
11203 bfd_signed_vma foff;
11204 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11205 bfd_vma local_sda, laddr;
11206
11207 irelend = internal_relocs + sec->reloc_count;
11208 laddr = irel->r_offset;
11209 insn = bfd_getb32 (contents + laddr);
11210
11211 if (insn & 0x80000000)
11212 return;
11213
11214 if (nds32_elf_check_dup_relocs
11215 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11216 return;
11217
11218 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11219 R_NDS32_PTR_RESOLVED);
11220 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11221 &local_sda, FALSE);
11222 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11223 foff = foff - local_sda;
11224
11225 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11226 return;
11227
11228 /* Concatenate opcode and sub-opcode for switch case.
11229 It may be MEM or ALU1. */
11230 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11231 switch (opc_insn_gotoff)
11232 {
11233 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11234 /* 4-byte aligned. */
11235 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11236 irel->r_info =
11237 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11238 break;
11239 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11240 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11241 irel->r_info =
11242 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11243 break;
11244 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11245 /* 2-byte aligned. */
11246 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11247 irel->r_info =
11248 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11249 break;
11250 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11251 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
11252 irel->r_info =
11253 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11254 break;
11255 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11256 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
11257 irel->r_info =
11258 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11259 break;
11260 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11261 /* 1-byte aligned. */
11262 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11263 irel->r_info =
11264 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11265 break;
11266 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11267 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
11268 irel->r_info =
11269 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11270 break;
11271 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11272 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11273 irel->r_info =
11274 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11275 break;
11276 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11277 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
11278 irel->r_info =
11279 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11280 break;
11281 default:
11282 return;
11283 }
11284
11285 bfd_putb32 (insn, contents + laddr);
11286 if (i1_irelfn != irelend)
11287 {
11288 i1_irelfn->r_addend |= 1;
11289 *again = TRUE;
11290 }
11291 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11292 R_NDS32_INSN16)) != irelend)
11293 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11294
11295 }
11296
11297 static bfd_boolean
11298 nds32_relax_adjust_label (bfd *abfd, asection *sec,
11299 Elf_Internal_Rela *internal_relocs,
11300 bfd_byte *contents,
11301 nds32_elf_blank_t **relax_blank_list,
11302 int optimize, int opt_size)
11303 {
11304 /* This code block is used to adjust 4-byte alignment by relax a pair
11305 of instruction a time.
11306
11307 It recognizes three types of relocations.
11308 1. R_NDS32_LABEL - a alignment.
11309 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11310 3. is_16bit_NOP () - remove a 16-bit instruction. */
11311
11312 /* TODO: It seems currently implementation only support 4-byte alignment.
11313 We should handle any-alignment. */
11314
11315 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11316 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11317 Elf_Internal_Rela rel_temp;
11318 Elf_Internal_Rela *irelend;
11319 bfd_vma address;
11320 uint16_t insn16;
11321
11322 /* Checking for branch relaxation relies on the relocations to
11323 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11324 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11325 sizeof (Elf_Internal_Rela), compar_reloc);
11326
11327 irelend = internal_relocs + sec->reloc_count;
11328
11329 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11330 /* FIXME: Can we generate the right order in assembler?
11331 So we don't have to swapping them here. */
11332
11333 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11334 label_rel < irelend; label_rel++)
11335 {
11336 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11337 continue;
11338
11339 /* Find the first reloc has the same offset with label_rel. */
11340 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11341 insn_rel++;
11342
11343 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11344 insn_rel++)
11345 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11346 address. */
11347 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11348 break;
11349
11350 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11351 && insn_rel < label_rel)
11352 {
11353 /* Swap the two reloc if the R_NDS32_INSN16 is
11354 before R_NDS32_LABEL. */
11355 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11356 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11357 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11358 }
11359 }
11360
11361 label_rel = NULL;
11362 insn_rel = NULL;
11363 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11364 or higher, remove other R_NDS32_LABEL with lower alignment.
11365 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11366 then the R_NDS32_LABEL sequence is broke. */
11367 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11368 {
11369 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11370 {
11371 if (label_rel == NULL)
11372 {
11373 if (tmp_rel->r_addend < 2)
11374 label_rel = tmp_rel;
11375 continue;
11376 }
11377 else if (tmp_rel->r_addend > 1)
11378 {
11379 /* Remove all LABEL relocation from label_rel to tmp_rel
11380 including relocations with same offset as tmp_rel. */
11381 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11382 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11383 {
11384 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11385 && tmp2_rel->r_addend < 2)
11386 tmp2_rel->r_info =
11387 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11388 R_NDS32_NONE);
11389 }
11390 label_rel = NULL;
11391 }
11392 }
11393 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11394 {
11395 /* A new INSN16 which can be converted, so clear label_rel. */
11396 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11397 irelend, &insn16)
11398 || is_16bit_NOP (abfd, sec, tmp_rel))
11399 label_rel = NULL;
11400 }
11401 }
11402
11403 label_rel = NULL;
11404 insn_rel = NULL;
11405 /* Optimized for speed and nothing has not been relaxed.
11406 It's time to align labels.
11407 We may convert a 16-bit instruction right before a label to
11408 32-bit, in order to align the label if necessary
11409 all reloc entries has been sorted by r_offset. */
11410 for (irel = internal_relocs; irel < irelend; irel++)
11411 {
11412 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11413 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11414 continue;
11415
11416 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11417 {
11418 /* A new INSN16 found, resize the old one. */
11419 if (is_convert_32_to_16
11420 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11421 || is_16bit_NOP (abfd, sec, irel))
11422 {
11423 if (insn_rel)
11424 {
11425 /* Previous INSN16 reloc exists, reduce its
11426 size to 16-bit. */
11427 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11428 irelend, &insn16))
11429 {
11430 nds32_elf_write_16 (abfd, contents, insn_rel,
11431 internal_relocs, irelend, insn16);
11432
11433 if (!insert_nds32_elf_blank_recalc_total
11434 (relax_blank_list, insn_rel->r_offset + 2, 2))
11435 return FALSE;
11436 }
11437 else if (is_16bit_NOP (abfd, sec, insn_rel))
11438 {
11439 if (!insert_nds32_elf_blank_recalc_total
11440 (relax_blank_list, insn_rel->r_offset, 2))
11441 return FALSE;
11442 }
11443 insn_rel->r_info =
11444 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11445 }
11446 /* Save the new one for later use. */
11447 insn_rel = irel;
11448 }
11449 else
11450 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11451 R_NDS32_NONE);
11452 }
11453 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11454 {
11455 /* Search for label. */
11456 int force_relax = 0;
11457
11458 /* Label on 16-bit instruction or optimization
11459 needless, just reset this reloc. */
11460 insn16 = bfd_getb16 (contents + irel->r_offset);
11461 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11462 {
11463 irel->r_info =
11464 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11465 continue;
11466 }
11467
11468 address =
11469 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11470 irel->r_offset, 1);
11471
11472 if (!insn_rel)
11473 {
11474 /* Check if there is case which can not be aligned. */
11475 if (irel->r_addend == 2 && address & 0x2)
11476 return FALSE;
11477 continue;
11478 }
11479
11480 /* Try to align this label. */
11481
11482 if ((irel->r_addend & 0x1f) < 2)
11483 {
11484 /* Check if there is a INSN16 at the same address.
11485 Label_rel always seats before insn_rel after
11486 our sort. */
11487
11488 /* Search for INSN16 at LABEL location. If INSN16 is at
11489 same location and this LABEL alignment is lower than 2,
11490 the INSN16 can be converted to 2-byte. */
11491 for (tmp_rel = irel;
11492 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11493 tmp_rel++)
11494 {
11495 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11496 && (is_convert_32_to_16
11497 (abfd, sec, tmp_rel, internal_relocs,
11498 irelend, &insn16)
11499 || is_16bit_NOP (abfd, sec, tmp_rel)))
11500 {
11501 force_relax = 1;
11502 break;
11503 }
11504 }
11505 }
11506
11507 if (force_relax || irel->r_addend == 1 || address & 0x2)
11508 {
11509 /* Label not aligned. */
11510 /* Previous reloc exists, reduce its size to 16-bit. */
11511 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11512 internal_relocs, irelend, &insn16))
11513 {
11514 nds32_elf_write_16 (abfd, contents, insn_rel,
11515 internal_relocs, irelend, insn16);
11516
11517 if (!insert_nds32_elf_blank_recalc_total
11518 (relax_blank_list, insn_rel->r_offset + 2, 2))
11519 return FALSE;
11520 }
11521 else if (is_16bit_NOP (abfd, sec, insn_rel))
11522 {
11523 if (!insert_nds32_elf_blank_recalc_total
11524 (relax_blank_list, insn_rel->r_offset, 2))
11525 return FALSE;
11526 }
11527
11528 }
11529 /* INSN16 reloc is used. */
11530 insn_rel = NULL;
11531 }
11532 }
11533
11534 address =
11535 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11536 if (insn_rel && (address & 0x2 || opt_size))
11537 {
11538 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11539 irelend, &insn16))
11540 {
11541 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11542 irelend, insn16);
11543 if (!insert_nds32_elf_blank_recalc_total
11544 (relax_blank_list, insn_rel->r_offset + 2, 2))
11545 return FALSE;
11546 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11547 R_NDS32_NONE);
11548 }
11549 else if (is_16bit_NOP (abfd, sec, insn_rel))
11550 {
11551 if (!insert_nds32_elf_blank_recalc_total
11552 (relax_blank_list, insn_rel->r_offset, 2))
11553 return FALSE;
11554 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11555 R_NDS32_NONE);
11556 }
11557 }
11558 insn_rel = NULL;
11559 return TRUE;
11560 }
11561
11562 /* Pick relaxation round. */
11563
11564 static int
11565 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11566 struct elf_nds32_link_hash_table *table,
11567 struct bfd_link_info *link_info)
11568 {
11569 static asection *final_sec, *first_sec = NULL;
11570 static bfd_boolean normal_again = FALSE;
11571 static bfd_boolean set = FALSE;
11572 static bfd_boolean first = TRUE;
11573 int round_table[] = {
11574 NDS32_RELAX_NORMAL_ROUND,
11575 NDS32_RELAX_JUMP_IFC_ROUND,
11576 NDS32_RELAX_EX9_BUILD_ROUND,
11577 NDS32_RELAX_EX9_REPLACE_ROUND,
11578 };
11579 static int pass = 0;
11580 static int relax_round;
11581
11582 /* The new round. */
11583 if (init && first_sec == sec)
11584 {
11585 set = TRUE;
11586 normal_again = FALSE;
11587 }
11588
11589 if (first)
11590 {
11591 /* Run an empty run to get the final section. */
11592 relax_round = NDS32_RELAX_EMPTY_ROUND;
11593
11594 /* It has to enter relax again because we can
11595 not make sure what the final turn is. */
11596 *again = TRUE;
11597
11598 first = FALSE;
11599 first_sec = sec;
11600 }
11601
11602 if (!set)
11603 {
11604 /* Not reenter yet. */
11605 final_sec = sec;
11606 return relax_round;
11607 }
11608
11609 relax_round = round_table[pass];
11610
11611 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11612 normal_again = TRUE;
11613
11614 if (!init && final_sec == sec)
11615 {
11616 switch (relax_round)
11617 {
11618 case NDS32_RELAX_NORMAL_ROUND:
11619 if (!normal_again)
11620 {
11621 /* Normal relaxation done. */
11622 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11623 {
11624 pass++;
11625 *again = TRUE;
11626 }
11627 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11628 {
11629 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11630 *again = TRUE;
11631 }
11632 else if (table->ex9_import_file)
11633 {
11634 /* Import ex9 table. */
11635 if (table->update_ex9_table)
11636 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11637 else
11638 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11639 nds32_elf_ex9_import_table (link_info);
11640 *again = TRUE;
11641 }
11642 }
11643 break;
11644 case NDS32_RELAX_JUMP_IFC_ROUND:
11645 if (!nds32_elf_ifc_finish (link_info))
11646 _bfd_error_handler (_("error: Jump IFC Fail."));
11647 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11648 {
11649 pass++;
11650 *again = TRUE;
11651 }
11652 break;
11653 case NDS32_RELAX_EX9_BUILD_ROUND:
11654 nds32_elf_ex9_finish (link_info);
11655 pass++;
11656 *again = TRUE;
11657 break;
11658 case NDS32_RELAX_EX9_REPLACE_ROUND:
11659 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11660 {
11661 /* Do jump IFC optimization again. */
11662 if (!nds32_elf_ifc_finish (link_info))
11663 _bfd_error_handler (_("error: Jump IFC Fail."));
11664 }
11665 break;
11666 default:
11667 break;
11668 }
11669 }
11670
11671 return relax_round;
11672 }
11673
11674 static bfd_boolean
11675 nds32_elf_relax_section (bfd *abfd, asection *sec,
11676 struct bfd_link_info *link_info, bfd_boolean *again)
11677 {
11678 nds32_elf_blank_t *relax_blank_list = NULL;
11679 Elf_Internal_Shdr *symtab_hdr;
11680 Elf_Internal_Rela *internal_relocs;
11681 Elf_Internal_Rela *irel;
11682 Elf_Internal_Rela *irelend;
11683 Elf_Internal_Sym *isymbuf = NULL;
11684 bfd_byte *contents = NULL;
11685 bfd_boolean result = TRUE;
11686 int optimize = 0;
11687 int opt_size = 0;
11688 uint32_t insn;
11689 uint16_t insn16;
11690
11691 /* Target dependnet option. */
11692 struct elf_nds32_link_hash_table *table;
11693 int load_store_relax;
11694 int relax_round;
11695
11696 relax_blank_list = NULL;
11697
11698 *again = FALSE;
11699
11700 /* Nothing to do for
11701 * relocatable link or
11702 * non-relocatable section or
11703 * non-code section or
11704 * empty content or
11705 * no reloc entry. */
11706 if (bfd_link_relocatable (link_info)
11707 || (sec->flags & SEC_RELOC) == 0
11708 || (sec->flags & SEC_EXCLUDE) != 0
11709 || (sec->flags & SEC_CODE) == 0
11710 || sec->size == 0)
11711 return TRUE;
11712
11713 /* 09.12.11 Workaround. */
11714 /* We have to adjust align for R_NDS32_LABEL if needed.
11715 The adjust approach only can fix 2-byte align once. */
11716 if (sec->alignment_power > 2)
11717 return TRUE;
11718
11719 /* The optimization type to do. */
11720
11721 table = nds32_elf_hash_table (link_info);
11722 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11723 switch (relax_round)
11724 {
11725 case NDS32_RELAX_JUMP_IFC_ROUND:
11726 /* Here is the entrance of ifc jump relaxation. */
11727 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11728 return FALSE;
11729 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11730 return TRUE;
11731
11732 case NDS32_RELAX_EX9_BUILD_ROUND:
11733 /* Here is the entrance of ex9 relaxation. There are two pass of
11734 ex9 relaxation. The one is to traverse all instructions and build
11735 the hash table. The other one is to compare instructions and replace
11736 it by ex9.it. */
11737 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11738 return FALSE;
11739 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11740 return TRUE;
11741
11742 case NDS32_RELAX_EX9_REPLACE_ROUND:
11743 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11744 return FALSE;
11745 return TRUE;
11746
11747 case NDS32_RELAX_EMPTY_ROUND:
11748 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11749 return TRUE;
11750
11751 case NDS32_RELAX_NORMAL_ROUND:
11752 default:
11753 if (sec->reloc_count == 0)
11754 return TRUE;
11755 break;
11756 }
11757
11758 /* The begining of general relaxation. */
11759
11760 if (is_SDA_BASE_set == 0)
11761 {
11762 bfd_vma gp;
11763 is_SDA_BASE_set = 1;
11764 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11765 &gp, FALSE);
11766 relax_range_measurement (abfd);
11767 }
11768
11769 if (is_ITB_BASE_set == 0)
11770 {
11771 /* Set the _ITB_BASE_. */
11772 if (!nds32_elf_ex9_itb_base (link_info))
11773 {
11774 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd);
11775 bfd_set_error (bfd_error_bad_value);
11776 }
11777 }
11778
11779 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11780 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11781 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11782 TRUE /* keep_memory */);
11783 if (internal_relocs == NULL)
11784 goto error_return;
11785
11786 irelend = internal_relocs + sec->reloc_count;
11787 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11788 irelend, R_NDS32_RELAX_ENTRY);
11789
11790 if (irel == irelend)
11791 return TRUE;
11792
11793 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11794 {
11795 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
11796 {
11797 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11798 return TRUE;
11799 }
11800
11801 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11802 optimize = 1;
11803
11804 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11805 opt_size = 1;
11806 }
11807
11808 load_store_relax = table->load_store_relax;
11809
11810 /* Get symbol table and section content. */
11811 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
11812 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11813 goto error_return;
11814
11815 /* Do relax loop only when finalize is not done.
11816 Take care of relaxable relocs except INSN16. */
11817 for (irel = internal_relocs; irel < irelend; irel++)
11818 {
11819 int seq_len; /* Original length of instruction sequence. */
11820 int insn_len = 0; /* Final length of instruction sequence. */
11821 bfd_boolean removed;
11822
11823 insn = 0;
11824 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11825 && (irel->r_addend & 0x1f) >= 2)
11826 optimize = 1;
11827
11828 /* Relocation Types
11829 R_NDS32_LONGCALL1 53
11830 R_NDS32_LONGCALL2 54
11831 R_NDS32_LONGCALL3 55
11832 R_NDS32_LONGJUMP1 56
11833 R_NDS32_LONGJUMP2 57
11834 R_NDS32_LONGJUMP3 58
11835 R_NDS32_LOADSTORE 59 */
11836 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11837 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11838 seq_len = GET_SEQ_LEN (irel->r_addend);
11839
11840 /* Relocation Types
11841 R_NDS32_LONGCALL4 107
11842 R_NDS32_LONGCALL5 108
11843 R_NDS32_LONGCALL6 109
11844 R_NDS32_LONGJUMP4 110
11845 R_NDS32_LONGJUMP5 111
11846 R_NDS32_LONGJUMP6 112
11847 R_NDS32_LONGJUMP7 113 */
11848 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11849 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11850 seq_len = 4;
11851
11852 /* Relocation Types
11853 R_NDS32_LO12S0_RELA 30
11854 R_NDS32_LO12S1_RELA 29
11855 R_NDS32_LO12S2_RELA 28
11856 R_NDS32_LO12S2_SP_RELA 71
11857 R_NDS32_LO12S2_DP_RELA 70
11858 R_NDS32_GOT_LO12 46
11859 R_NDS32_GOTOFF_LO12 50
11860 R_NDS32_PLTREL_LO12 65
11861 R_NDS32_PLT_GOTREL_LO12 67
11862 R_NDS32_17IFC_PCREL_RELA 96
11863 R_NDS32_GOT_SUFF 193
11864 R_NDS32_GOTOFF_SUFF 194
11865 R_NDS32_PLT_GOT_SUFF 195
11866 R_NDS32_MULCALL_SUFF 196
11867 R_NDS32_PTR 197 */
11868 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11869 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11870 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11871 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11872 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11873 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11874 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11875 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11876 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11877 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11878 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11879 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11880 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11881 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11882 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11883 seq_len = 0;
11884 else
11885 continue;
11886
11887 insn_len = seq_len;
11888 removed = FALSE;
11889
11890 switch (ELF32_R_TYPE (irel->r_info))
11891 {
11892 case R_NDS32_LONGCALL1:
11893 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11894 &insn_len, contents, isymbuf,
11895 symtab_hdr);
11896 break;
11897 case R_NDS32_LONGCALL2:
11898 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11899 &insn_len, contents, isymbuf,
11900 symtab_hdr);
11901 break;
11902 case R_NDS32_LONGCALL3:
11903 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11904 &insn_len, contents, isymbuf,
11905 symtab_hdr);
11906 break;
11907 case R_NDS32_LONGJUMP1:
11908 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11909 &insn_len, contents, isymbuf,
11910 symtab_hdr);
11911 break;
11912 case R_NDS32_LONGJUMP2:
11913 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11914 &insn_len, contents, isymbuf,
11915 symtab_hdr);
11916 break;
11917 case R_NDS32_LONGJUMP3:
11918 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11919 &insn_len, contents, isymbuf,
11920 symtab_hdr);
11921 break;
11922 case R_NDS32_LONGCALL4:
11923 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11924 &insn_len, contents, isymbuf,
11925 symtab_hdr);
11926 break;
11927 case R_NDS32_LONGCALL5:
11928 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11929 &insn_len, contents, isymbuf,
11930 symtab_hdr);
11931 break;
11932 case R_NDS32_LONGCALL6:
11933 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11934 &insn_len, contents, isymbuf,
11935 symtab_hdr);
11936 break;
11937 case R_NDS32_LONGJUMP4:
11938 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11939 &insn_len, contents, isymbuf,
11940 symtab_hdr);
11941 break;
11942 case R_NDS32_LONGJUMP5:
11943 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11944 &insn_len, &seq_len, contents,
11945 isymbuf, symtab_hdr);
11946 break;
11947 case R_NDS32_LONGJUMP6:
11948 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11949 &insn_len, &seq_len, contents,
11950 isymbuf, symtab_hdr);
11951 break;
11952 case R_NDS32_LONGJUMP7:
11953 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11954 &insn_len, &seq_len, contents,
11955 isymbuf, symtab_hdr);
11956 break;
11957 case R_NDS32_LOADSTORE:
11958 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11959 internal_relocs, &insn_len,
11960 contents, isymbuf, symtab_hdr,
11961 load_store_relax);
11962 break;
11963 case R_NDS32_LO12S0_RELA:
11964 case R_NDS32_LO12S1_RELA:
11965 case R_NDS32_LO12S2_DP_RELA:
11966 case R_NDS32_LO12S2_SP_RELA:
11967 case R_NDS32_LO12S2_RELA:
11968 /* Relax for low part. */
11969 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11970 contents, isymbuf, symtab_hdr);
11971
11972 /* It is impossible to delete blank, so just continue. */
11973 continue;
11974 case R_NDS32_GOT_LO12:
11975 case R_NDS32_GOTOFF_LO12:
11976 case R_NDS32_PLTREL_LO12:
11977 case R_NDS32_PLT_GOTREL_LO12:
11978 case R_NDS32_GOTPC_LO12:
11979 /* Relax for PIC gp-relative low part. */
11980 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
11981 isymbuf, symtab_hdr);
11982
11983 /* It is impossible to delete blank, so just continue. */
11984 continue;
11985 case R_NDS32_TLS_LE_LO12:
11986 /* Relax for LE TLS low part. */
11987 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
11988 isymbuf, symtab_hdr);
11989
11990 /* It is impossible to delete blank, so just continue. */
11991 continue;
11992 case R_NDS32_TLS_LE_ADD:
11993 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
11994 contents, isymbuf, symtab_hdr, again);
11995 /* It is impossible to delete blank, so just continue. */
11996 continue;
11997 case R_NDS32_TLS_LE_LS:
11998 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
11999 contents, isymbuf, symtab_hdr, again);
12000 continue;
12001 case R_NDS32_PTR:
12002 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12003 &insn_len, &seq_len, contents);
12004 break;
12005 case R_NDS32_PLT_GOT_SUFF:
12006 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12007 internal_relocs, contents,
12008 isymbuf, symtab_hdr, again);
12009 /* It is impossible to delete blank, so just continue. */
12010 continue;
12011 case R_NDS32_GOT_SUFF:
12012 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12013 internal_relocs, contents,
12014 symtab_hdr, again);
12015 /* It is impossible to delete blank, so just continue. */
12016 continue;
12017 case R_NDS32_GOTOFF_SUFF:
12018 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12019 internal_relocs, contents,
12020 isymbuf, symtab_hdr, again);
12021 /* It is impossible to delete blank, so just continue. */
12022 continue;
12023 default:
12024 continue;
12025
12026 }
12027 if (removed && seq_len - insn_len > 0)
12028 {
12029 if (!insert_nds32_elf_blank
12030 (&relax_blank_list, irel->r_offset + insn_len,
12031 seq_len - insn_len))
12032 goto error_return;
12033 *again = TRUE;
12034 }
12035 }
12036
12037 calc_nds32_blank_total (relax_blank_list);
12038
12039 if (table->relax_fp_as_gp)
12040 {
12041 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12042 irelend, isymbuf))
12043 goto error_return;
12044
12045 if (!*again)
12046 {
12047 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12048 irelend))
12049 goto error_return;
12050 }
12051 }
12052
12053 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12054
12055 if (!*again)
12056 {
12057 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12058 &relax_blank_list, optimize, opt_size))
12059 goto error_return;
12060 }
12061
12062 /* It doesn't matter optimize_for_space_no_align anymore.
12063 If object file is assembled with flag '-Os',
12064 the we don't adjust jump-destination on 4-byte boundary. */
12065
12066 if (relax_blank_list)
12067 {
12068 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12069 relax_blank_list = NULL;
12070 }
12071
12072 if (!*again)
12073 {
12074 /* Closing the section, so we don't relax it anymore. */
12075 bfd_vma sec_size_align;
12076 Elf_Internal_Rela *tmp_rel;
12077
12078 /* Pad to alignment boundary. Only handle current section alignment. */
12079 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12080 & ((-1U) << sec->alignment_power);
12081 if ((sec_size_align - sec->size) & 0x2)
12082 {
12083 insn16 = NDS32_NOP16;
12084 bfd_putb16 (insn16, contents + sec->size);
12085 sec->size += 2;
12086 }
12087
12088 while (sec_size_align != sec->size)
12089 {
12090 insn = NDS32_NOP32;
12091 bfd_putb32 (insn, contents + sec->size);
12092 sec->size += 4;
12093 }
12094
12095 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12096 irelend, R_NDS32_RELAX_ENTRY);
12097 if (tmp_rel != irelend)
12098 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12099
12100 clean_nds32_elf_blank ();
12101 }
12102
12103 finish:
12104 if (internal_relocs != NULL
12105 && elf_section_data (sec)->relocs != internal_relocs)
12106 free (internal_relocs);
12107
12108 if (contents != NULL
12109 && elf_section_data (sec)->this_hdr.contents != contents)
12110 free (contents);
12111
12112 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12113 free (isymbuf);
12114
12115 return result;
12116
12117 error_return:
12118 result = FALSE;
12119 goto finish;
12120 }
12121
12122 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12123 {
12124 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12125 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12126 {NULL, 0, 0, 0, 0}
12127 };
12128
12129 static bfd_boolean
12130 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12131 struct bfd_link_info *info,
12132 void *finfo ATTRIBUTE_UNUSED,
12133 bfd_boolean (*func) (void *, const char *,
12134 Elf_Internal_Sym *,
12135 asection *,
12136 struct elf_link_hash_entry *)
12137 ATTRIBUTE_UNUSED)
12138 {
12139 FILE *sym_ld_script = NULL;
12140 struct elf_nds32_link_hash_table *table;
12141
12142 table = nds32_elf_hash_table (info);
12143 sym_ld_script = table->sym_ld_script;
12144
12145 if (check_start_export_sym)
12146 fprintf (sym_ld_script, "}\n");
12147
12148 return TRUE;
12149 }
12150
12151 static enum elf_reloc_type_class
12152 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12153 const asection *rel_sec ATTRIBUTE_UNUSED,
12154 const Elf_Internal_Rela *rela)
12155 {
12156 switch ((int) ELF32_R_TYPE (rela->r_info))
12157 {
12158 case R_NDS32_RELATIVE:
12159 return reloc_class_relative;
12160 case R_NDS32_JMP_SLOT:
12161 return reloc_class_plt;
12162 case R_NDS32_COPY:
12163 return reloc_class_copy;
12164 default:
12165 return reloc_class_normal;
12166 }
12167 }
12168
12169 /* Put target dependent option into info hash table. */
12170 void
12171 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12172 int relax_fp_as_gp,
12173 int eliminate_gc_relocs,
12174 FILE * sym_ld_script, int load_store_relax,
12175 int target_optimize, int relax_status,
12176 int relax_round, FILE * ex9_export_file,
12177 FILE * ex9_import_file,
12178 int update_ex9_table, int ex9_limit,
12179 bfd_boolean ex9_loop_aware,
12180 bfd_boolean ifc_loop_aware)
12181 {
12182 struct elf_nds32_link_hash_table *table;
12183
12184 table = nds32_elf_hash_table (link_info);
12185 if (table == NULL)
12186 return;
12187
12188 table->relax_fp_as_gp = relax_fp_as_gp;
12189 table->eliminate_gc_relocs = eliminate_gc_relocs;
12190 table->sym_ld_script = sym_ld_script;
12191 table ->load_store_relax = load_store_relax;
12192 table->target_optimize = target_optimize;
12193 table->relax_status = relax_status;
12194 table->relax_round = relax_round;
12195 table->ex9_export_file = ex9_export_file;
12196 table->ex9_import_file = ex9_import_file;
12197 table->update_ex9_table = update_ex9_table;
12198 table->ex9_limit = ex9_limit;
12199 table->ex9_loop_aware = ex9_loop_aware;
12200 table->ifc_loop_aware = ifc_loop_aware;
12201 }
12202 \f
12203 /* These functions and data-structures are used for fp-as-gp
12204 optimization. */
12205
12206 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */
12207 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12208 the read-only section and read-write section. */
12209 #define FAG_WINDOW (508 - 32)
12210
12211 /* An nds32_fag represent a gp-relative access.
12212 We find best fp-base by using a sliding window
12213 to find a base address which can cover most gp-access. */
12214 struct nds32_fag
12215 {
12216 struct nds32_fag *next; /* NULL-teminated linked list. */
12217 bfd_vma addr; /* The address of this fag. */
12218 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12219 It is used for applying FP7U2_FLAG. */
12220 int count; /* How many times this address is referred.
12221 There should be exactly `count' relocations
12222 in relas. */
12223 int relas_capcity; /* The buffer size of relas.
12224 We use an array instead of linked-list,
12225 and realloc is used to adjust buffer size. */
12226 };
12227
12228 static void
12229 nds32_fag_init (struct nds32_fag *head)
12230 {
12231 memset (head, 0, sizeof (struct nds32_fag));
12232 }
12233
12234 static void
12235 nds32_fag_verify (struct nds32_fag *head)
12236 {
12237 struct nds32_fag *iter;
12238 struct nds32_fag *prev;
12239
12240 prev = NULL;
12241 iter = head->next;
12242 while (iter)
12243 {
12244 if (prev && prev->addr >= iter->addr)
12245 puts ("Bug in fp-as-gp insertion.");
12246 prev = iter;
12247 iter = iter->next;
12248 }
12249 }
12250
12251 /* Insert a fag in ascending order.
12252 If a fag of the same address already exists,
12253 they are chained by relas array. */
12254
12255 static void
12256 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12257 Elf_Internal_Rela * rel)
12258 {
12259 struct nds32_fag *iter;
12260 struct nds32_fag *new_fag;
12261 const int INIT_RELAS_CAP = 4;
12262
12263 for (iter = head;
12264 iter->next && iter->next->addr <= addr;
12265 iter = iter->next)
12266 /* Find somewhere to insert. */ ;
12267
12268 /* `iter' will be equal to `head' if the list is empty. */
12269 if (iter != head && iter->addr == addr)
12270 {
12271 /* The address exists in the list.
12272 Insert `rel' into relocation list, relas. */
12273
12274 /* Check whether relas is big enough. */
12275 if (iter->count >= iter->relas_capcity)
12276 {
12277 iter->relas_capcity *= 2;
12278 iter->relas = bfd_realloc
12279 (iter->relas, iter->relas_capcity * sizeof (void *));
12280 }
12281 iter->relas[iter->count++] = rel;
12282 return;
12283 }
12284
12285 /* This is a new address. Create a fag node for it. */
12286 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12287 memset (new_fag, 0, sizeof (*new_fag));
12288 new_fag->addr = addr;
12289 new_fag->count = 1;
12290 new_fag->next = iter->next;
12291 new_fag->relas_capcity = INIT_RELAS_CAP;
12292 new_fag->relas = (Elf_Internal_Rela **)
12293 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12294 new_fag->relas[0] = rel;
12295 iter->next = new_fag;
12296
12297 nds32_fag_verify (head);
12298 }
12299
12300 static void
12301 nds32_fag_free_list (struct nds32_fag *head)
12302 {
12303 struct nds32_fag *iter;
12304
12305 iter = head->next;
12306 while (iter)
12307 {
12308 struct nds32_fag *tmp = iter;
12309 iter = iter->next;
12310 free (tmp->relas);
12311 tmp->relas = NULL;
12312 free (tmp);
12313 }
12314 }
12315
12316 /* Find the best fp-base address.
12317 The relocation associated with that address is returned,
12318 so we can track the symbol instead of a fixed address.
12319
12320 When relaxation, the address of an datum may change,
12321 because a text section is shrinked, so the data section
12322 moves forward. If the aligments of text and data section
12323 are different, their distance may change too.
12324 Therefore, tracking a fixed address is not appriate. */
12325
12326 static int
12327 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12328 {
12329 struct nds32_fag *base; /* First fag in the window. */
12330 struct nds32_fag *last; /* First fag outside the window. */
12331 int accu = 0; /* Usage accumulation. */
12332 struct nds32_fag *best; /* Best fag. */
12333 int baccu = 0; /* Best accumulation. */
12334
12335 /* Use first fag for initial, and find the last fag in the window.
12336
12337 In each iteration, we could simply subtract previous fag
12338 and accumulate following fags which are inside the window,
12339 untill we each the end. */
12340
12341 if (head->next == NULL)
12342 {
12343 *bestpp = NULL;
12344 return 0;
12345 }
12346
12347 /* Initialize base. */
12348 base = head->next;
12349 best = base;
12350 for (last = base;
12351 last && last->addr < base->addr + FAG_WINDOW;
12352 last = last->next)
12353 accu += last->count;
12354
12355 baccu = accu;
12356
12357 /* Record the best base in each iteration. */
12358 while (base->next)
12359 {
12360 accu -= base->count;
12361 base = base->next;
12362 /* Account fags in window. */
12363 for (/* Nothing. */;
12364 last && last->addr < base->addr + FAG_WINDOW;
12365 last = last->next)
12366 accu += last->count;
12367
12368 /* A better fp-base? */
12369 if (accu > baccu)
12370 {
12371 best = base;
12372 baccu = accu;
12373 }
12374 }
12375
12376 if (bestpp)
12377 *bestpp = best;
12378 return baccu;
12379 }
12380
12381 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12382 so we can convert it fo fp-relative access later.
12383 `best_fag' is the best fp-base. Only those inside the window
12384 of best_fag is applied the flag. */
12385
12386 static bfd_boolean
12387 nds32_fag_mark_relax (struct bfd_link_info *link_info,
12388 bfd *abfd, struct nds32_fag *best_fag,
12389 Elf_Internal_Rela *internal_relocs,
12390 Elf_Internal_Rela *irelend)
12391 {
12392 struct nds32_fag *ifag;
12393 bfd_vma best_fpbase, gp;
12394 bfd *output_bfd;
12395
12396 output_bfd = abfd->sections->output_section->owner;
12397 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12398 best_fpbase = best_fag->addr;
12399
12400 if (best_fpbase > gp + sdata_range[1][1]
12401 || best_fpbase < gp - sdata_range[1][0])
12402 return FALSE;
12403
12404 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12405 so we know they can be converted to lwi37.fp. */
12406 for (ifag = best_fag;
12407 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12408 {
12409 int i;
12410
12411 for (i = 0; i < ifag->count; i++)
12412 {
12413 Elf_Internal_Rela *insn16_rel;
12414 Elf_Internal_Rela *fag_rel;
12415
12416 fag_rel = ifag->relas[i];
12417
12418 /* Only if this is within the WINDOWS, FP7U2_FLAG
12419 is applied. */
12420
12421 insn16_rel = find_relocs_at_address
12422 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12423
12424 if (insn16_rel != irelend)
12425 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12426 }
12427 }
12428 return TRUE;
12429 }
12430
12431 /* Reset INSN16 to clean fp as gp. */
12432
12433 static void
12434 nds32_fag_unmark_relax (struct nds32_fag *fag,
12435 Elf_Internal_Rela *internal_relocs,
12436 Elf_Internal_Rela *irelend)
12437 {
12438 struct nds32_fag *ifag;
12439 int i;
12440 Elf_Internal_Rela *insn16_rel;
12441 Elf_Internal_Rela *fag_rel;
12442
12443 for (ifag = fag; ifag; ifag = ifag->next)
12444 {
12445 for (i = 0; i < ifag->count; i++)
12446 {
12447 fag_rel = ifag->relas[i];
12448
12449 /* Restore the INSN16 relocation. */
12450 insn16_rel = find_relocs_at_address
12451 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12452
12453 if (insn16_rel != irelend)
12454 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12455 }
12456 }
12457 }
12458
12459 /* This is the main function of fp-as-gp optimization.
12460 It should be called by relax_section. */
12461
12462 static bfd_boolean
12463 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12464 bfd *abfd, asection *sec,
12465 Elf_Internal_Rela *internal_relocs,
12466 Elf_Internal_Rela *irelend,
12467 Elf_Internal_Sym *isymbuf)
12468 {
12469 Elf_Internal_Rela *begin_rel = NULL;
12470 Elf_Internal_Rela *irel;
12471 struct nds32_fag fag_head;
12472 Elf_Internal_Shdr *symtab_hdr;
12473 bfd_byte *contents;
12474 bfd_boolean ifc_inside = FALSE;
12475
12476 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12477
12478 /* Per-function fp-base selection.
12479 1. Create a list for all the gp-relative access.
12480 2. Base on those gp-relative address,
12481 find a fp-base which can cover most access.
12482 3. Use the fp-base for fp-as-gp relaxation.
12483
12484 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12485 we should
12486 1. delete the `la $fp, _FP_BASE_' instruction and
12487 2. not convert lwi.gp to lwi37.fp.
12488
12489 To delete the _FP_BASE_ instruction, we simply apply
12490 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12491
12492 To suppress the conversion, we simply NOT to apply
12493 R_NDS32_INSN16_FP7U2_FLAG flag. */
12494
12495 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12496
12497 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12498 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12499 return FALSE;
12500
12501 /* Check whether it is worth for fp-as-gp optimization,
12502 i.e., at least 3 gp-load.
12503
12504 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12505 apply this optimization. */
12506
12507 for (irel = internal_relocs; irel < irelend; irel++)
12508 {
12509 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12510 One we enter the begin of the region, we track all the LW/ST
12511 instructions, so when we leave the region, we try to find
12512 the best fp-base address for those LW/ST instructions. */
12513
12514 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12515 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12516 {
12517 /* Begin of the region. */
12518 if (begin_rel)
12519 /* xgettext:c-format */
12520 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12521
12522 begin_rel = irel;
12523 nds32_fag_init (&fag_head);
12524 ifc_inside = FALSE;
12525 }
12526 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12527 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12528 {
12529 int accu;
12530 struct nds32_fag *best_fag, *tmp_fag;
12531 int dist;
12532
12533 /* End of the region.
12534 Check whether it is worth to do fp-as-gp. */
12535
12536 if (begin_rel == NULL)
12537 {
12538 /* xgettext:c-format */
12539 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12540 continue;
12541 }
12542
12543 accu = nds32_fag_find_base (&fag_head, &best_fag);
12544
12545 /* Clean FP7U2_FLAG because they may set ever. */
12546 tmp_fag = fag_head.next;
12547 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12548
12549 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12550 if (accu < FAG_THRESHOLD
12551 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12552 internal_relocs, irelend))
12553 {
12554 /* Not worth to do fp-as-gp. */
12555 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12556 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12557 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12558 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12559 nds32_fag_free_list (&fag_head);
12560 begin_rel = NULL;
12561 continue;
12562 }
12563
12564 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12565 so we use it to record the distance to the reloction of best
12566 fp-base. */
12567 dist = best_fag->relas[0] - begin_rel;
12568 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12569 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12570 relocation. And get the base value when relocating. */
12571 begin_rel->r_addend &= (0x1 << 16) - 1;
12572 begin_rel->r_addend |= dist << 16;
12573
12574 nds32_fag_free_list (&fag_head);
12575 begin_rel = NULL;
12576 }
12577
12578 if (begin_rel == NULL || ifc_inside)
12579 /* Skip if we are not in the region of fp-as-gp. */
12580 continue;
12581
12582 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12583 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12584 {
12585 bfd_vma addr;
12586 uint32_t insn;
12587
12588 /* A gp-relative access is found. Insert it to the fag-list. */
12589
12590 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12591 insn = bfd_getb32 (contents + irel->r_offset);
12592 if (!N32_IS_RT3 (insn))
12593 continue;
12594
12595 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12596 nds32_fag_insert (&fag_head, addr, irel);
12597 }
12598 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12599 {
12600 begin_rel = NULL;
12601 }
12602 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12603 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12604 {
12605 /* Suppress fp as gp when encounter ifc. */
12606 ifc_inside = TRUE;
12607 }
12608 }
12609
12610 return TRUE;
12611 }
12612
12613 /* Remove unused `la $fp, _FD_BASE_' instruction. */
12614
12615 static bfd_boolean
12616 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12617 Elf_Internal_Rela *internal_relocs,
12618 Elf_Internal_Rela *irelend)
12619 {
12620 Elf_Internal_Rela *irel;
12621 Elf_Internal_Shdr *symtab_hdr;
12622 bfd_byte *contents = NULL;
12623 nds32_elf_blank_t *relax_blank_list = NULL;
12624 bfd_boolean result = TRUE;
12625 bfd_boolean unused_region = FALSE;
12626
12627 /*
12628 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12629 * R_NDS32_17IFC_PCREL_RELA
12630 * R_NDS32_10IFCU_PCREL_RELA
12631
12632 CASE??????????????
12633 */
12634
12635 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12636 nds32_get_section_contents (abfd, sec, &contents, TRUE);
12637
12638 for (irel = internal_relocs; irel < irelend; irel++)
12639 {
12640 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12641 we marked to in previous pass.
12642 DO NOT scan relocations again, since we've alreadly decided it
12643 and set the flag. */
12644 const char *syname;
12645 int syndx;
12646 uint32_t insn;
12647
12648 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12649 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12650 unused_region = TRUE;
12651 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12652 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12653 unused_region = FALSE;
12654
12655 /* We're not in the region. */
12656 if (!unused_region)
12657 continue;
12658
12659 /* _FP_BASE_ must be a GLOBAL symbol. */
12660 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12661 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12662 continue;
12663
12664 /* The symbol name must be _FP_BASE_. */
12665 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12666 if (strcmp (syname, FP_BASE_NAME) != 0)
12667 continue;
12668
12669 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12670 {
12671 /* addi.gp $fp, -256 */
12672 insn = bfd_getb32 (contents + irel->r_offset);
12673 if (insn != INSN_ADDIGP_TO_FP)
12674 continue;
12675 }
12676 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12677 {
12678 /* addi $fp, $gp, -256 */
12679 insn = bfd_getb32 (contents + irel->r_offset);
12680 if (insn != INSN_ADDI_GP_TO_FP)
12681 continue;
12682 }
12683 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12684 {
12685 /* movi $fp, FP_BASE */
12686 insn = bfd_getb32 (contents + irel->r_offset);
12687 if (insn != INSN_MOVI_TO_FP)
12688 continue;
12689 }
12690 else
12691 continue;
12692
12693 /* We got here because a FP_BASE instruction is found. */
12694 if (!insert_nds32_elf_blank_recalc_total
12695 (&relax_blank_list, irel->r_offset, 4))
12696 goto error_return;
12697 }
12698
12699 finish:
12700 if (relax_blank_list)
12701 {
12702 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12703 relax_blank_list = NULL;
12704 }
12705 return result;
12706
12707 error_return:
12708 result = FALSE;
12709 goto finish;
12710 }
12711
12712 /* This is a version of bfd_generic_get_relocated_section_contents.
12713 We need this variety because relaxation will modify the dwarf
12714 infomation. When there is undefined symbol reference error mesage,
12715 linker need to dump line number where the symbol be used. However
12716 the address is be relaxed, it can not get the original dwarf contents.
12717 The variety only modify function call for reading in the section. */
12718
12719 static bfd_byte *
12720 nds32_elf_get_relocated_section_contents (bfd *abfd,
12721 struct bfd_link_info *link_info,
12722 struct bfd_link_order *link_order,
12723 bfd_byte *data,
12724 bfd_boolean relocatable,
12725 asymbol **symbols)
12726 {
12727 bfd *input_bfd = link_order->u.indirect.section->owner;
12728 asection *input_section = link_order->u.indirect.section;
12729 long reloc_size;
12730 arelent **reloc_vector;
12731 long reloc_count;
12732
12733 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12734 if (reloc_size < 0)
12735 return NULL;
12736
12737 /* Read in the section. */
12738 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
12739 return NULL;
12740
12741 if (reloc_size == 0)
12742 return data;
12743
12744 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12745 if (reloc_vector == NULL)
12746 return NULL;
12747
12748 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12749 reloc_vector, symbols);
12750 if (reloc_count < 0)
12751 goto error_return;
12752
12753 if (reloc_count > 0)
12754 {
12755 arelent **parent;
12756 for (parent = reloc_vector; *parent != NULL; parent++)
12757 {
12758 char *error_message = NULL;
12759 asymbol *symbol;
12760 bfd_reloc_status_type r;
12761
12762 symbol = *(*parent)->sym_ptr_ptr;
12763 if (symbol->section && discarded_section (symbol->section))
12764 {
12765 bfd_byte *p;
12766 static reloc_howto_type none_howto
12767 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12768 "unused", FALSE, 0, 0, FALSE);
12769
12770 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12771 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12772 p);
12773 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12774 (*parent)->addend = 0;
12775 (*parent)->howto = &none_howto;
12776 r = bfd_reloc_ok;
12777 }
12778 else
12779 r = bfd_perform_relocation (input_bfd, *parent, data,
12780 input_section,
12781 relocatable ? abfd : NULL,
12782 &error_message);
12783
12784 if (relocatable)
12785 {
12786 asection *os = input_section->output_section;
12787
12788 /* A partial link, so keep the relocs. */
12789 os->orelocation[os->reloc_count] = *parent;
12790 os->reloc_count++;
12791 }
12792
12793 if (r != bfd_reloc_ok)
12794 {
12795 switch (r)
12796 {
12797 case bfd_reloc_undefined:
12798 (*link_info->callbacks->undefined_symbol)
12799 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12800 input_bfd, input_section, (*parent)->address, TRUE);
12801 break;
12802 case bfd_reloc_dangerous:
12803 BFD_ASSERT (error_message != NULL);
12804 (*link_info->callbacks->reloc_dangerous)
12805 (link_info, error_message,
12806 input_bfd, input_section, (*parent)->address);
12807 break;
12808 case bfd_reloc_overflow:
12809 (*link_info->callbacks->reloc_overflow)
12810 (link_info, NULL,
12811 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12812 (*parent)->howto->name, (*parent)->addend,
12813 input_bfd, input_section, (*parent)->address);
12814 break;
12815 case bfd_reloc_outofrange:
12816 /* PR ld/13730:
12817 This error can result when processing some partially
12818 complete binaries. Do not abort, but issue an error
12819 message instead. */
12820 link_info->callbacks->einfo
12821 /* xgettext:c-format */
12822 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
12823 abfd, input_section, * parent);
12824 goto error_return;
12825
12826 default:
12827 abort ();
12828 break;
12829 }
12830 }
12831 }
12832 }
12833
12834 free (reloc_vector);
12835 return data;
12836
12837 error_return:
12838 free (reloc_vector);
12839 return NULL;
12840 }
12841 \f
12842 /* Link-time IFC relaxation.
12843 In this optimization, we chains jump instructions
12844 of the same destination with ifcall. */
12845
12846
12847 /* List to save jal and j relocation. */
12848 struct elf_nds32_ifc_symbol_entry
12849 {
12850 asection *sec;
12851 struct elf_link_hash_entry *h;
12852 struct elf_nds32_ifc_irel_list *irel_head;
12853 unsigned long insn;
12854 int times;
12855 int enable; /* Apply ifc. */
12856 int ex9_enable; /* Apply ifc after ex9. */
12857 struct elf_nds32_ifc_symbol_entry *next;
12858 };
12859
12860 struct elf_nds32_ifc_irel_list
12861 {
12862 Elf_Internal_Rela *irel;
12863 asection *sec;
12864 bfd_vma addr;
12865 /* If this is set, then it is the last instruction for
12866 ifc-chain, so it must be keep for the actual branching. */
12867 int keep;
12868 struct elf_nds32_ifc_irel_list *next;
12869 };
12870
12871 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
12872
12873 /* Insert symbol of jal and j for ifc. */
12874
12875 static void
12876 nds32_elf_ifc_insert_symbol (asection *sec,
12877 struct elf_link_hash_entry *h,
12878 Elf_Internal_Rela *irel,
12879 unsigned long insn)
12880 {
12881 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12882
12883 /* Check there is target of existing entry the same as the new one. */
12884 while (ptr != NULL)
12885 {
12886 if (((h == NULL && ptr->sec == sec
12887 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
12888 && ptr->irel_head->irel->r_addend == irel->r_addend)
12889 || h != NULL)
12890 && ptr->h == h
12891 && ptr->insn == insn)
12892 {
12893 /* The same target exist, so insert into list. */
12894 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
12895
12896 while (irel_list->next != NULL)
12897 irel_list = irel_list->next;
12898 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12899 irel_list = irel_list->next;
12900 irel_list->irel = irel;
12901 irel_list->keep = 1;
12902
12903 if (h == NULL)
12904 irel_list->sec = NULL;
12905 else
12906 irel_list->sec = sec;
12907 irel_list->next = NULL;
12908 return;
12909 }
12910 if (ptr->next == NULL)
12911 break;
12912 ptr = ptr->next;
12913 }
12914
12915 /* There is no same target entry, so build a new one. */
12916 if (ifc_symbol_head == NULL)
12917 {
12918 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12919 ptr = ifc_symbol_head;
12920 }
12921 else
12922 {
12923 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12924 ptr = ptr->next;
12925 }
12926
12927 ptr->h = h;
12928 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12929 ptr->irel_head->irel = irel;
12930 ptr->insn = insn;
12931 ptr->irel_head->keep = 1;
12932
12933 if (h == NULL)
12934 {
12935 /* Local symbols. */
12936 ptr->sec = sec;
12937 ptr->irel_head->sec = NULL;
12938 }
12939 else
12940 {
12941 /* Global symbol. */
12942 ptr->sec = NULL;
12943 ptr->irel_head->sec = sec;
12944 }
12945
12946 ptr->irel_head->next = NULL;
12947 ptr->times = 0;
12948 ptr->enable = 0;
12949 ptr->ex9_enable = 0;
12950 ptr->next = NULL;
12951 }
12952
12953 /* Gather all jal and j instructions. */
12954
12955 static bfd_boolean
12956 nds32_elf_ifc_calc (struct bfd_link_info *info,
12957 bfd *abfd, asection *sec)
12958 {
12959 Elf_Internal_Rela *internal_relocs;
12960 Elf_Internal_Rela *irelend;
12961 Elf_Internal_Rela *irel;
12962 Elf_Internal_Shdr *symtab_hdr;
12963 bfd_byte *contents = NULL;
12964 uint32_t insn, insn_with_reg;
12965 unsigned long r_symndx;
12966 struct elf_link_hash_entry *h;
12967 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
12968 struct elf_nds32_link_hash_table *table;
12969 bfd_boolean ifc_loop_aware;
12970
12971 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12972 TRUE /* keep_memory */);
12973 irelend = internal_relocs + sec->reloc_count;
12974 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12975
12976 /* Check if the object enable ifc. */
12977 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
12978 R_NDS32_RELAX_ENTRY);
12979
12980 if (irel == NULL
12981 || irel >= irelend
12982 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
12983 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
12984 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
12985 return TRUE;
12986
12987 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
12988 return FALSE;
12989
12990 table = nds32_elf_hash_table (info);
12991 ifc_loop_aware = table->ifc_loop_aware;
12992 while (irel != NULL && irel < irelend)
12993 {
12994 /* Traverse all relocation and gather all of them to build the list. */
12995
12996 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
12997 {
12998 if (ifc_loop_aware == 1
12999 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13000 {
13001 /* Check the region if loop or not. If it is true and
13002 ifc-loop-aware is true, ignore the region till region end. */
13003 while (irel != NULL
13004 && irel < irelend
13005 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13006 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13007 irel++;
13008 }
13009 }
13010
13011 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13012 {
13013 insn = bfd_getb32 (contents + irel->r_offset);
13014 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13015 r_symndx = ELF32_R_SYM (irel->r_info);
13016 if (r_symndx < symtab_hdr->sh_info)
13017 {
13018 /* Local symbol. */
13019 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13020 }
13021 else
13022 {
13023 /* External symbol. */
13024 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13025 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13026 }
13027 }
13028 irel++;
13029 }
13030 return TRUE;
13031 }
13032
13033 /* Determine whether j and jal should be substituted. */
13034
13035 static void
13036 nds32_elf_ifc_filter (struct bfd_link_info *info)
13037 {
13038 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13039 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13040 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13041 struct elf_nds32_link_hash_table *table;
13042 int target_optimize;
13043 bfd_vma address;
13044
13045 table = nds32_elf_hash_table (info);
13046 target_optimize = table->target_optimize;
13047 while (ptr)
13048 {
13049 irel_ptr = ptr->irel_head;
13050 if (ptr->h == NULL)
13051 {
13052 /* Local symbol. */
13053 irel_keeper = irel_ptr;
13054 while (irel_ptr && irel_ptr->next)
13055 {
13056 /* Check there is jump target can be used. */
13057 if ((irel_ptr->next->irel->r_offset
13058 - irel_keeper->irel->r_offset) > 1022)
13059 irel_keeper = irel_ptr->next;
13060 else
13061 {
13062 ptr->enable = 1;
13063 irel_ptr->keep = 0;
13064 }
13065 irel_ptr = irel_ptr->next;
13066 }
13067 }
13068 else
13069 {
13070 /* Global symbol. */
13071 /* We have to get the absolute address and decide
13072 whether to keep it or not. */
13073 while (irel_ptr)
13074 {
13075 address = (irel_ptr->irel->r_offset
13076 + irel_ptr->sec->output_section->vma
13077 + irel_ptr->sec->output_offset);
13078 irel_ptr->addr = address;
13079 irel_ptr = irel_ptr->next;
13080 }
13081
13082 irel_ptr = ptr->irel_head;
13083 while (irel_ptr)
13084 {
13085 /* Sort by address. */
13086 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13087 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13088 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13089 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13090
13091 /* Get the smallest one. */
13092 while (irel_temp->next)
13093 {
13094 if (irel_temp->next->addr < irel_dest->addr)
13095 {
13096 irel_dest_prev = irel_temp;
13097 irel_dest = irel_temp->next;
13098 }
13099 irel_temp = irel_temp->next;
13100 }
13101
13102 if (irel_dest != irel_ptr)
13103 {
13104 if (irel_ptr_prev)
13105 irel_ptr_prev->next = irel_dest;
13106 if (irel_dest_prev)
13107 irel_dest_prev->next = irel_ptr;
13108 irel_temp = irel_ptr->next;
13109 irel_ptr->next = irel_dest->next;
13110 irel_dest->next = irel_temp;
13111 }
13112 irel_ptr_prev = irel_ptr;
13113 irel_ptr = irel_ptr->next;
13114 }
13115
13116 irel_ptr = ptr->irel_head;
13117 irel_keeper = irel_ptr;
13118 while (irel_ptr && irel_ptr->next)
13119 {
13120 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13121 irel_keeper = irel_ptr->next;
13122 else
13123 {
13124 ptr->enable = 1;
13125 irel_ptr->keep = 0;
13126 }
13127 irel_ptr = irel_ptr->next;
13128 }
13129 }
13130
13131 /* Ex9 enable. Reserve it for ex9. */
13132 if ((target_optimize & NDS32_RELAX_EX9_ON)
13133 && ptr->irel_head != irel_keeper)
13134 ptr->enable = 0;
13135 ptr = ptr->next;
13136 }
13137 }
13138
13139 /* Determine whether j and jal should be substituted after ex9 done. */
13140
13141 static void
13142 nds32_elf_ifc_filter_after_ex9 (void)
13143 {
13144 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13145 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13146
13147 while (ptr)
13148 {
13149 if (ptr->enable == 0)
13150 {
13151 /* Check whether ifc is applied or not. */
13152 irel_ptr = ptr->irel_head;
13153 ptr->ex9_enable = 1;
13154 while (irel_ptr)
13155 {
13156 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13157 {
13158 /* Ex9 already. */
13159 ptr->ex9_enable = 0;
13160 break;
13161 }
13162 irel_ptr = irel_ptr->next;
13163 }
13164 }
13165 ptr = ptr->next;
13166 }
13167 }
13168
13169 /* Wrapper to do ifc relaxation. */
13170
13171 bfd_boolean
13172 nds32_elf_ifc_finish (struct bfd_link_info *info)
13173 {
13174 int relax_status;
13175 struct elf_nds32_link_hash_table *table;
13176
13177 table = nds32_elf_hash_table (info);
13178 relax_status = table->relax_status;
13179
13180 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13181 nds32_elf_ifc_filter (info);
13182 else
13183 nds32_elf_ifc_filter_after_ex9 ();
13184
13185 if (!nds32_elf_ifc_replace (info))
13186 return FALSE;
13187
13188 if (table)
13189 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13190 return TRUE;
13191 }
13192
13193 /* Traverse the result of ifc filter and replace it with ifcall9. */
13194
13195 static bfd_boolean
13196 nds32_elf_ifc_replace (struct bfd_link_info *info)
13197 {
13198 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13199 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13200 nds32_elf_blank_t *relax_blank_list = NULL;
13201 bfd_byte *contents = NULL;
13202 Elf_Internal_Rela *internal_relocs;
13203 Elf_Internal_Rela *irel;
13204 Elf_Internal_Rela *irelend;
13205 unsigned short insn16 = INSN_IFCALL9;
13206 struct elf_nds32_link_hash_table *table;
13207 int relax_status;
13208
13209 table = nds32_elf_hash_table (info);
13210 relax_status = table->relax_status;
13211
13212 while (ptr)
13213 {
13214 /* Traverse the ifc gather list, and replace the
13215 filter entries by ifcall9. */
13216 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13217 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13218 && ptr->ex9_enable == 1))
13219 {
13220 irel_ptr = ptr->irel_head;
13221 if (ptr->h == NULL)
13222 {
13223 /* Local symbol. */
13224 internal_relocs = _bfd_elf_link_read_relocs
13225 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13226 irelend = internal_relocs + ptr->sec->reloc_count;
13227
13228 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13229 &contents, TRUE))
13230 return FALSE;
13231
13232 while (irel_ptr)
13233 {
13234 if (irel_ptr->keep == 0 && irel_ptr->next)
13235 {
13236 /* The one can be replaced. We have to check whether
13237 there is any alignment point in the region. */
13238 irel = irel_ptr->irel;
13239 while (((irel_ptr->next->keep == 0
13240 && irel < irel_ptr->next->irel)
13241 || (irel_ptr->next->keep == 1 && irel < irelend))
13242 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13243 && (irel->r_addend & 0x1f) == 2))
13244 irel++;
13245 if (irel >= irelend
13246 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13247 && (irel->r_addend & 0x1f) == 2
13248 && ((irel->r_offset - get_nds32_elf_blank_total
13249 (&relax_blank_list, irel->r_offset, 1))
13250 & 0x02) == 0))
13251 {
13252 /* Replace by ifcall9. */
13253 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13254 if (!insert_nds32_elf_blank_recalc_total
13255 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13256 return FALSE;
13257 irel_ptr->irel->r_info =
13258 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13259 R_NDS32_10IFCU_PCREL_RELA);
13260 }
13261 }
13262 irel_ptr = irel_ptr->next;
13263 }
13264
13265 /* Delete the redundant code. */
13266 if (relax_blank_list)
13267 {
13268 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13269 relax_blank_list);
13270 relax_blank_list = NULL;
13271 }
13272 }
13273 else
13274 {
13275 /* Global symbol. */
13276 while (irel_ptr)
13277 {
13278 if (irel_ptr->keep == 0 && irel_ptr->next)
13279 {
13280 /* The one can be replaced, and we have to check
13281 whether there is any alignment point in the region. */
13282 internal_relocs = _bfd_elf_link_read_relocs
13283 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13284 TRUE /* keep_memory */);
13285 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13286 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13287 irel_ptr->sec, &contents,
13288 TRUE))
13289 return FALSE;
13290
13291 irel = irel_ptr->irel;
13292 while (((irel_ptr->sec == irel_ptr->next->sec
13293 && irel_ptr->next->keep == 0
13294 && irel < irel_ptr->next->irel)
13295 || ((irel_ptr->sec != irel_ptr->next->sec
13296 || irel_ptr->next->keep == 1)
13297 && irel < irelend))
13298 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13299 && (irel->r_addend & 0x1f) == 2))
13300 irel++;
13301 if (irel >= irelend
13302 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13303 && (irel->r_addend & 0x1f) == 2
13304 && ((irel->r_offset
13305 - get_nds32_elf_blank_total (&relax_blank_list,
13306 irel->r_offset, 1)) & 0x02) == 0))
13307 {
13308 /* Replace by ifcall9. */
13309 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13310 if (!insert_nds32_elf_blank_recalc_total
13311 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13312 return FALSE;
13313
13314 /* Delete the redundant code, and clear the relocation. */
13315 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13316 irel_ptr->sec,
13317 relax_blank_list);
13318 irel_ptr->irel->r_info =
13319 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13320 R_NDS32_10IFCU_PCREL_RELA);
13321 relax_blank_list = NULL;
13322 }
13323 }
13324
13325 irel_ptr = irel_ptr->next;
13326 }
13327 }
13328 }
13329 ptr = ptr->next;
13330 }
13331
13332 return TRUE;
13333 }
13334
13335 /* Relocate ifcall. */
13336
13337 static bfd_boolean
13338 nds32_elf_ifc_reloc (void)
13339 {
13340 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13341 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13342 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13343 bfd_vma relocation, address;
13344 unsigned short insn16;
13345 bfd_byte *contents = NULL;
13346 static bfd_boolean done = FALSE;
13347
13348 if (done)
13349 return TRUE;
13350
13351 done = TRUE;
13352
13353 while (ptr)
13354 {
13355 /* Check the entry is enable ifcall. */
13356 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13357 {
13358 /* Get the reserve jump. */
13359 irel_ptr = ptr->irel_head;
13360 while (irel_ptr)
13361 {
13362 if (irel_ptr->keep == 1)
13363 {
13364 irel_keeper = irel_ptr;
13365 break;
13366 }
13367 irel_ptr = irel_ptr->next;
13368 }
13369
13370 irel_ptr = ptr->irel_head;
13371 if (ptr->h == NULL)
13372 {
13373 /* Local symbol. */
13374 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13375 &contents, TRUE))
13376 return FALSE;
13377
13378 while (irel_ptr)
13379 {
13380 if (irel_ptr->keep == 0
13381 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13382 {
13383 relocation = irel_keeper->irel->r_offset;
13384 relocation = relocation - irel_ptr->irel->r_offset;
13385 while (irel_keeper && relocation > 1022)
13386 {
13387 irel_keeper = irel_keeper->next;
13388 if (irel_keeper && irel_keeper->keep == 1)
13389 {
13390 relocation = irel_keeper->irel->r_offset;
13391 relocation = relocation - irel_ptr->irel->r_offset;
13392 }
13393 }
13394 if (relocation > 1022)
13395 {
13396 /* Double check. */
13397 irel_keeper = ptr->irel_head;
13398 while (irel_keeper)
13399 {
13400 if (irel_keeper->keep == 1)
13401 {
13402 relocation = irel_keeper->irel->r_offset;
13403 relocation = relocation - irel_ptr->irel->r_offset;
13404 }
13405 if (relocation <= 1022)
13406 break;
13407 irel_keeper = irel_keeper->next;
13408 }
13409 if (!irel_keeper)
13410 return FALSE;
13411 }
13412 irel_ptr->irel->r_info =
13413 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13414 R_NDS32_NONE);
13415 insn16 = INSN_IFCALL9 | (relocation >> 1);
13416 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13417 }
13418 irel_ptr = irel_ptr->next;
13419 }
13420 }
13421 else
13422 {
13423 /* Global symbol. */
13424 while (irel_ptr)
13425 {
13426 if (irel_ptr->keep == 0
13427 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13428 {
13429 /* Get the distance between ifcall and jump. */
13430 relocation = (irel_keeper->irel->r_offset
13431 + irel_keeper->sec->output_section->vma
13432 + irel_keeper->sec->output_offset);
13433 address = (irel_ptr->irel->r_offset
13434 + irel_ptr->sec->output_section->vma
13435 + irel_ptr->sec->output_offset);
13436 relocation = relocation - address;
13437
13438 /* The distance is over ragne, find callee again. */
13439 while (irel_keeper && relocation > 1022)
13440 {
13441 irel_keeper = irel_keeper->next;
13442 if (irel_keeper && irel_keeper->keep ==1)
13443 {
13444 relocation = (irel_keeper->irel->r_offset
13445 + irel_keeper->sec->output_section->vma
13446 + irel_keeper->sec->output_offset);
13447 relocation = relocation - address;
13448 }
13449 }
13450
13451 if (relocation > 1022)
13452 {
13453 /* Double check. */
13454 irel_keeper = ptr->irel_head;
13455 while (irel_keeper)
13456 {
13457 if (irel_keeper->keep == 1)
13458 {
13459
13460 relocation = (irel_keeper->irel->r_offset
13461 + irel_keeper->sec->output_section->vma
13462 + irel_keeper->sec->output_offset);
13463 relocation = relocation - address;
13464 }
13465 if (relocation <= 1022)
13466 break;
13467 irel_keeper = irel_keeper->next;
13468 }
13469 if (!irel_keeper)
13470 return FALSE;
13471 }
13472 if (!nds32_get_section_contents
13473 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
13474 return FALSE;
13475 insn16 = INSN_IFCALL9 | (relocation >> 1);
13476 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13477 irel_ptr->irel->r_info =
13478 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13479 R_NDS32_NONE);
13480 }
13481 irel_ptr =irel_ptr->next;
13482 }
13483 }
13484 }
13485 ptr = ptr->next;
13486 }
13487
13488 return TRUE;
13489 }
13490
13491 /* End of IFC relaxation. */
13492 \f
13493 /* EX9 Instruction Table Relaxation. */
13494
13495 /* Global hash list. */
13496 struct elf_link_hash_entry_list
13497 {
13498 struct elf_link_hash_entry *h;
13499 struct elf_link_hash_entry_list *next;
13500 };
13501
13502 /* Save different destination but same insn. */
13503 struct elf_link_hash_entry_mul_list
13504 {
13505 /* Global symbol times. */
13506 int times;
13507 /* Save relocation for each global symbol but useful?? */
13508 Elf_Internal_Rela *irel;
13509 /* For sethi, two sethi may have the same high-part but different low-parts. */
13510 Elf_Internal_Rela rel_backup;
13511 struct elf_link_hash_entry_list *h_list;
13512 struct elf_link_hash_entry_mul_list *next;
13513 };
13514
13515 /* Instruction hash table. */
13516 struct elf_nds32_code_hash_entry
13517 {
13518 struct bfd_hash_entry root;
13519 int times;
13520 /* For insn that can use relocation or constant ex: sethi. */
13521 int const_insn;
13522 asection *sec;
13523 struct elf_link_hash_entry_mul_list *m_list;
13524 /* Using r_addend. */
13525 Elf_Internal_Rela *irel;
13526 /* Using r_info. */
13527 Elf_Internal_Rela rel_backup;
13528 };
13529
13530 /* Instruction count list. */
13531 struct elf_nds32_insn_times_entry
13532 {
13533 const char *string;
13534 int times;
13535 int order;
13536 asection *sec;
13537 struct elf_link_hash_entry_mul_list *m_list;
13538 Elf_Internal_Rela *irel;
13539 Elf_Internal_Rela rel_backup;
13540 struct elf_nds32_insn_times_entry *next;
13541 };
13542
13543 /* J and JAL symbol list. */
13544 struct elf_nds32_symbol_entry
13545 {
13546 char *string;
13547 unsigned long insn;
13548 struct elf_nds32_symbol_entry *next;
13549 };
13550
13551 /* Relocation list. */
13552 struct elf_nds32_irel_entry
13553 {
13554 Elf_Internal_Rela *irel;
13555 struct elf_nds32_irel_entry *next;
13556 };
13557
13558 /* ex9.it insn need to be fixed. */
13559 struct elf_nds32_ex9_refix
13560 {
13561 Elf_Internal_Rela *irel;
13562 asection *sec;
13563 struct elf_link_hash_entry *h;
13564 int order;
13565 struct elf_nds32_ex9_refix *next;
13566 };
13567
13568 static struct bfd_hash_table ex9_code_table;
13569 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13570 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13571
13572 /* EX9 hash function. */
13573
13574 static struct bfd_hash_entry *
13575 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13576 struct bfd_hash_table *table,
13577 const char *string)
13578 {
13579 struct elf_nds32_code_hash_entry *ret;
13580
13581 /* Allocate the structure if it has not already been allocated by a
13582 subclass. */
13583 if (entry == NULL)
13584 {
13585 entry = (struct bfd_hash_entry *)
13586 bfd_hash_allocate (table, sizeof (*ret));
13587 if (entry == NULL)
13588 return entry;
13589 }
13590
13591 /* Call the allocation method of the superclass. */
13592 entry = bfd_hash_newfunc (entry, table, string);
13593 if (entry == NULL)
13594 return entry;
13595
13596 ret = (struct elf_nds32_code_hash_entry*) entry;
13597 ret->times = 0;
13598 ret->const_insn = 0;
13599 ret->m_list = NULL;
13600 ret->sec = NULL;
13601 ret->irel = NULL;
13602 return &ret->root;
13603 }
13604
13605 /* Insert ex9 entry
13606 this insert must be stable sorted by times. */
13607
13608 static void
13609 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13610 {
13611 struct elf_nds32_insn_times_entry *temp;
13612 struct elf_nds32_insn_times_entry *temp2;
13613
13614 if (ex9_insn_head == NULL)
13615 {
13616 ex9_insn_head = ptr;
13617 ptr->next = NULL;
13618 }
13619 else
13620 {
13621 temp = ex9_insn_head;
13622 temp2 = ex9_insn_head;
13623 while (temp->next &&
13624 (temp->next->times >= ptr->times
13625 || temp->times == -1))
13626 {
13627 if (temp->times == -1)
13628 temp2 = temp;
13629 temp = temp->next;
13630 }
13631 if (ptr->times > temp->times && temp->times != -1)
13632 {
13633 ptr->next = temp;
13634 if (temp2->times == -1)
13635 temp2->next = ptr;
13636 else
13637 ex9_insn_head = ptr;
13638 }
13639 else if (temp->next == NULL)
13640 {
13641 temp->next = ptr;
13642 ptr->next = NULL;
13643 }
13644 else
13645 {
13646 ptr->next = temp->next;
13647 temp->next = ptr;
13648 }
13649 }
13650 }
13651
13652 /* Examine each insn times in hash table.
13653 Handle multi-link hash entry.
13654
13655 TODO: This function doesn't assign so much info since it is fake. */
13656
13657 static int
13658 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13659 {
13660 struct elf_nds32_insn_times_entry *ptr;
13661 int times;
13662
13663 if (h->m_list == NULL)
13664 {
13665 /* Local symbol insn or insn without relocation. */
13666 if (h->times < 3)
13667 return TRUE;
13668
13669 ptr = (struct elf_nds32_insn_times_entry *)
13670 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13671 ptr->times = h->times;
13672 ptr->string = h->root.string;
13673 ptr->m_list = NULL;
13674 ptr->sec = h->sec;
13675 ptr->irel = h->irel;
13676 ptr->rel_backup = h->rel_backup;
13677 nds32_elf_ex9_insert_entry (ptr);
13678 }
13679 else
13680 {
13681 /* Global symbol insn. */
13682 /* Only sethi insn has multiple m_list. */
13683 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13684
13685 times = 0;
13686 while (m_list)
13687 {
13688 times += m_list->times;
13689 m_list = m_list->next;
13690 }
13691 if (times >= 3)
13692 {
13693 m_list = h->m_list;
13694 ptr = (struct elf_nds32_insn_times_entry *)
13695 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13696 ptr->times = times; /* Use the total times. */
13697 ptr->string = h->root.string;
13698 ptr->m_list = m_list;
13699 ptr->sec = h->sec;
13700 ptr->irel = m_list->irel;
13701 ptr->rel_backup = m_list->rel_backup;
13702 nds32_elf_ex9_insert_entry (ptr);
13703 }
13704 if (h->const_insn == 1)
13705 {
13706 /* sethi with constant value. */
13707 if (h->times < 3)
13708 return TRUE;
13709
13710 ptr = (struct elf_nds32_insn_times_entry *)
13711 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13712 ptr->times = h->times;
13713 ptr->string = h->root.string;
13714 ptr->m_list = NULL;
13715 ptr->sec = NULL;
13716 ptr->irel = NULL;
13717 ptr->rel_backup = h->rel_backup;
13718 nds32_elf_ex9_insert_entry (ptr);
13719 }
13720 }
13721 return TRUE;
13722 }
13723
13724 /* Count each insn times in hash table.
13725 Handle multi-link hash entry. */
13726
13727 static int
13728 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13729 {
13730 int reservation, times;
13731 unsigned long relocation, min_relocation;
13732 struct elf_nds32_insn_times_entry *ptr;
13733
13734 if (h->m_list == NULL)
13735 {
13736 /* Local symbol insn or insn without relocation. */
13737 if (h->times < 3)
13738 return TRUE;
13739 ptr = (struct elf_nds32_insn_times_entry *)
13740 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13741 ptr->times = h->times;
13742 ptr->string = h->root.string;
13743 ptr->m_list = NULL;
13744 ptr->sec = h->sec;
13745 ptr->irel = h->irel;
13746 ptr->rel_backup = h->rel_backup;
13747 nds32_elf_ex9_insert_entry (ptr);
13748 }
13749 else
13750 {
13751 /* Global symbol insn. */
13752 /* Only sethi insn has multiple m_list. */
13753 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13754
13755 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13756 && m_list->next != NULL)
13757 {
13758 /* Sethi insn has different symbol or addend but has same hi20. */
13759 times = 0;
13760 reservation = 1;
13761 relocation = 0;
13762 min_relocation = 0xffffffff;
13763 while (m_list)
13764 {
13765 /* Get the minimum sethi address
13766 and calculate how many entry the sethi-list have to use. */
13767 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13768 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
13769 && (m_list->h_list->h->root.u.def.section != NULL
13770 && m_list->h_list->h->root.u.def.section->output_section != NULL))
13771 {
13772 relocation = (m_list->h_list->h->root.u.def.value +
13773 m_list->h_list->h->root.u.def.section->output_section->vma +
13774 m_list->h_list->h->root.u.def.section->output_offset);
13775 relocation += m_list->irel->r_addend;
13776 }
13777 else
13778 relocation = 0;
13779 if (relocation < min_relocation)
13780 min_relocation = relocation;
13781 times += m_list->times;
13782 m_list = m_list->next;
13783 }
13784 if (min_relocation < ex9_relax_size)
13785 reservation = (min_relocation >> 12) + 1;
13786 else
13787 reservation = (min_relocation >> 12)
13788 - ((min_relocation - ex9_relax_size) >> 12) + 1;
13789 if (reservation < (times / 3))
13790 {
13791 /* Efficient enough to use ex9. */
13792 int i;
13793
13794 for (i = reservation ; i > 0; i--)
13795 {
13796 /* Allocate number of reservation ex9 entry. */
13797 ptr = (struct elf_nds32_insn_times_entry *)
13798 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13799 ptr->times = h->m_list->times / reservation;
13800 ptr->string = h->root.string;
13801 ptr->m_list = h->m_list;
13802 ptr->sec = h->sec;
13803 ptr->irel = h->m_list->irel;
13804 ptr->rel_backup = h->m_list->rel_backup;
13805 nds32_elf_ex9_insert_entry (ptr);
13806 }
13807 }
13808 }
13809 else
13810 {
13811 /* Normal global symbol that means no different address symbol
13812 using same ex9 entry. */
13813 if (m_list->times >= 3)
13814 {
13815 ptr = (struct elf_nds32_insn_times_entry *)
13816 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13817 ptr->times = m_list->times;
13818 ptr->string = h->root.string;
13819 ptr->m_list = h->m_list;
13820 ptr->sec = h->sec;
13821 ptr->irel = h->m_list->irel;
13822 ptr->rel_backup = h->m_list->rel_backup;
13823 nds32_elf_ex9_insert_entry (ptr);
13824 }
13825 }
13826
13827 if (h->const_insn == 1)
13828 {
13829 /* sethi with constant value. */
13830 if (h->times < 3)
13831 return TRUE;
13832
13833 ptr = (struct elf_nds32_insn_times_entry *)
13834 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13835 ptr->times = h->times;
13836 ptr->string = h->root.string;
13837 ptr->m_list = NULL;
13838 ptr->sec = NULL;
13839 ptr->irel = NULL;
13840 ptr->rel_backup = h->rel_backup;
13841 nds32_elf_ex9_insert_entry (ptr);
13842 }
13843 }
13844
13845 return TRUE;
13846 }
13847
13848 /* Hash table traverse function. */
13849
13850 static void
13851 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
13852 {
13853 unsigned int i;
13854
13855 ex9_code_table.frozen = 1;
13856 for (i = 0; i < ex9_code_table.size; i++)
13857 {
13858 struct bfd_hash_entry *p;
13859
13860 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
13861 if (!func ((struct elf_nds32_code_hash_entry *) p))
13862 goto out;
13863 }
13864 out:
13865 ex9_code_table.frozen = 0;
13866 }
13867
13868
13869 /* Give order number to insn list. */
13870
13871 static void
13872 nds32_elf_order_insn_times (struct bfd_link_info *info)
13873 {
13874 struct elf_nds32_insn_times_entry *ex9_insn;
13875 struct elf_nds32_insn_times_entry *temp = NULL;
13876 struct elf_nds32_link_hash_table *table;
13877 int ex9_limit;
13878 int number = 0;
13879
13880 if (ex9_insn_head == NULL)
13881 return;
13882
13883 /* The max number of entries is 512. */
13884 ex9_insn = ex9_insn_head;
13885 table = nds32_elf_hash_table (info);
13886 ex9_limit = table->ex9_limit;
13887
13888 ex9_insn = ex9_insn_head;
13889
13890 while (ex9_insn != NULL && number < ex9_limit)
13891 {
13892 ex9_insn->order = number;
13893 number++;
13894 temp = ex9_insn;
13895 ex9_insn = ex9_insn->next;
13896 }
13897
13898 if (ex9_insn && temp)
13899 temp->next = NULL;
13900
13901 while (ex9_insn != NULL)
13902 {
13903 /* Free useless entry. */
13904 temp = ex9_insn;
13905 ex9_insn = ex9_insn->next;
13906 free (temp);
13907 }
13908 }
13909
13910 /* Build .ex9.itable section. */
13911
13912 static void
13913 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
13914 {
13915 asection *table_sec;
13916 struct elf_nds32_insn_times_entry *ptr;
13917 bfd *it_abfd;
13918 int number = 0;
13919 bfd_byte *contents = NULL;
13920
13921 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
13922 it_abfd = it_abfd->link.next)
13923 {
13924 /* Find the section .ex9.itable, and put all entries into it. */
13925 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13926 if (table_sec != NULL)
13927 {
13928 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
13929 return;
13930
13931 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13932 number++;
13933
13934 table_sec->size = number * 4;
13935
13936 if (number == 0)
13937 return;
13938
13939 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
13940 number = 0;
13941 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13942 {
13943 long val;
13944
13945 val = strtol (ptr->string, NULL, 16);
13946 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
13947 number++;
13948 }
13949 break;
13950 }
13951 }
13952 }
13953
13954 /* Get insn with regs according to relocation type. */
13955
13956 static void
13957 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
13958 uint32_t insn, uint32_t *insn_with_reg)
13959 {
13960 reloc_howto_type *howto = NULL;
13961
13962 if (irel == NULL
13963 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13964 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13965 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13966 {
13967 *insn_with_reg = insn;
13968 return;
13969 }
13970
13971 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13972 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
13973 }
13974
13975 /* Mask number of address bits according to relocation. */
13976
13977 static unsigned long
13978 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
13979 {
13980 reloc_howto_type *howto = NULL;
13981
13982 if (irel == NULL
13983 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13984 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13985 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13986 return 0;
13987
13988 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13989 return howto->dst_mask;
13990 }
13991
13992 static void
13993 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
13994 struct elf_nds32_irel_entry *irel_ptr)
13995 {
13996 if (*irel_list == NULL)
13997 {
13998 *irel_list = irel_ptr;
13999 irel_ptr->next = NULL;
14000 }
14001 else
14002 {
14003 irel_ptr->next = *irel_list;
14004 *irel_list = irel_ptr;
14005 }
14006 }
14007
14008 static void
14009 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14010 struct elf_link_hash_entry *h, int order)
14011 {
14012 struct elf_nds32_ex9_refix *ptr;
14013
14014 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14015 ptr->sec = sec;
14016 ptr->irel = irel;
14017 ptr->h = h;
14018 ptr->order = order;
14019 ptr->next = NULL;
14020
14021 if (ex9_refix_head == NULL)
14022 ex9_refix_head = ptr;
14023 else
14024 {
14025 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14026
14027 while (temp->next != NULL)
14028 temp = temp->next;
14029 temp->next = ptr;
14030 }
14031 }
14032
14033 enum
14034 {
14035 DATA_EXIST = 1,
14036 CLEAN_PRE = 1 << 1,
14037 PUSH_PRE = 1 << 2
14038 };
14039
14040 /* Check relocation type if supporting for ex9. */
14041
14042 static int
14043 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14044 Elf_Internal_Rela **irel,
14045 Elf_Internal_Rela *irelend,
14046 nds32_elf_blank_t *relax_blank_list,
14047 asection *sec,bfd_vma *off,
14048 bfd_byte *contents)
14049 {
14050 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14051 bfd_boolean nested_ex9, nested_loop;
14052 bfd_boolean ex9_loop_aware;
14053 /* We use the highest 1 byte of result to record
14054 how many bytes location counter has to move. */
14055 int result = 0;
14056 Elf_Internal_Rela *irel_save = NULL;
14057 struct elf_nds32_link_hash_table *table;
14058
14059 table = nds32_elf_hash_table (info);
14060 ex9_loop_aware = table->ex9_loop_aware;
14061
14062 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14063 {
14064 switch (ELF32_R_TYPE ((*irel)->r_info))
14065 {
14066 case R_NDS32_RELAX_REGION_BEGIN:
14067 /* Ignore code block. */
14068 nested_ex9 = FALSE;
14069 nested_loop = FALSE;
14070 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14071 || (ex9_loop_aware
14072 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14073 {
14074 /* Check the region if loop or not. If it is true and
14075 ex9-loop-aware is true, ignore the region till region end. */
14076 /* To save the status for in .no_relax ex9 region and
14077 loop region to conform the block can do ex9 relaxation. */
14078 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14079 nested_loop = (ex9_loop_aware
14080 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14081 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14082 {
14083 (*irel)++;
14084 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14085 {
14086 /* There may be nested region. */
14087 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14088 nested_ex9 = TRUE;
14089 else if (ex9_loop_aware
14090 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14091 nested_loop = TRUE;
14092 }
14093 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14094 {
14095 /* The end of region. */
14096 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14097 nested_ex9 = FALSE;
14098 else if (ex9_loop_aware
14099 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14100 nested_loop = FALSE;
14101 }
14102 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14103 && ((*irel)->r_addend & 0x1f) == 2)
14104 {
14105 /* Alignment exist in the region. */
14106 result |= CLEAN_PRE;
14107 if (((*irel)->r_offset -
14108 get_nds32_elf_blank_total (&relax_blank_list,
14109 (*irel)->r_offset, 0)) & 0x02)
14110 result |= PUSH_PRE;
14111 }
14112 }
14113 if ((*irel) >= irelend)
14114 *off = sec->size;
14115 else
14116 *off = (*irel)->r_offset;
14117
14118 /* The final instruction in the region, regard this one as data to ignore it. */
14119 result |= DATA_EXIST;
14120 return result;
14121 }
14122 break;
14123
14124 case R_NDS32_LABEL:
14125 if (((*irel)->r_addend & 0x1f) == 2)
14126 {
14127 /* Check this point is align and decide to do ex9 or not. */
14128 result |= CLEAN_PRE;
14129 if (((*irel)->r_offset -
14130 get_nds32_elf_blank_total (&relax_blank_list,
14131 (*irel)->r_offset, 0)) & 0x02)
14132 result |= PUSH_PRE;
14133 }
14134 break;
14135 case R_NDS32_32_RELA:
14136 /* Data. */
14137 result |= (4 << 24);
14138 result |= DATA_EXIST;
14139 break;
14140 case R_NDS32_16_RELA:
14141 /* Data. */
14142 result |= (2 << 24);
14143 result |= DATA_EXIST;
14144 break;
14145 case R_NDS32_DATA:
14146 /* Data. */
14147 /* The least code alignment is 2. If the data is only one byte,
14148 we have to shift one more byte. */
14149 if ((*irel)->r_addend == 1)
14150 result |= ((*irel)->r_addend << 25) ;
14151 else
14152 result |= ((*irel)->r_addend << 24) ;
14153
14154 result |= DATA_EXIST;
14155 break;
14156
14157 case R_NDS32_25_PCREL_RELA:
14158 case R_NDS32_SDA16S3_RELA:
14159 case R_NDS32_SDA15S3_RELA:
14160 case R_NDS32_SDA15S3:
14161 case R_NDS32_SDA17S2_RELA:
14162 case R_NDS32_SDA15S2_RELA:
14163 case R_NDS32_SDA12S2_SP_RELA:
14164 case R_NDS32_SDA12S2_DP_RELA:
14165 case R_NDS32_SDA15S2:
14166 case R_NDS32_SDA18S1_RELA:
14167 case R_NDS32_SDA15S1_RELA:
14168 case R_NDS32_SDA15S1:
14169 case R_NDS32_SDA19S0_RELA:
14170 case R_NDS32_SDA15S0_RELA:
14171 case R_NDS32_SDA15S0:
14172 case R_NDS32_HI20_RELA:
14173 case R_NDS32_LO12S0_ORI_RELA:
14174 case R_NDS32_LO12S0_RELA:
14175 case R_NDS32_LO12S1_RELA:
14176 case R_NDS32_LO12S2_RELA:
14177 /* These relocation is supported ex9 relaxation currently. */
14178 /* We have to save the relocation for using later, since we have
14179 to check there is any alignment in the same address. */
14180 irel_save = *irel;
14181 break;
14182 default:
14183 /* Not support relocations. */
14184 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14185 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14186 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14187 {
14188 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14189 But we have to consider if there is any side-effect. */
14190 if (!(result & DATA_EXIST))
14191 {
14192 /* We have to confirm there is no data relocation in the
14193 same address. In general case, this won't happen. */
14194 /* We have to do ex9 conservative, for those relocation not
14195 considerd we ignore instruction. */
14196 result |= DATA_EXIST;
14197 if (*(contents + *off) & 0x80)
14198 result |= (2 << 24);
14199 else
14200 result |= (4 << 24);
14201 break;
14202 }
14203 }
14204 }
14205 if ((*irel) < irelend
14206 && ((*irel) + 1) < irelend
14207 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14208 /* There are relocations pointing to the same address, we have to
14209 check all of them. */
14210 (*irel)++;
14211 else
14212 {
14213 if (irel_save)
14214 *irel = irel_save;
14215 return result;
14216 }
14217 }
14218 return result;
14219 }
14220
14221 /* Replace with ex9 instruction. */
14222
14223 static bfd_boolean
14224 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14225 nds32_elf_blank_t **relax_blank_list,
14226 struct elf_nds32_irel_entry *pre_irel_ptr,
14227 struct elf_nds32_irel_entry **irel_list)
14228 {
14229 if (insn16 != 0)
14230 {
14231 /* Implement the ex9 relaxation. */
14232 bfd_putb16 (insn16, contents + pre_off);
14233 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14234 pre_off + 2, 2))
14235 return FALSE;
14236 if (pre_irel_ptr != NULL)
14237 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14238 }
14239 return TRUE;
14240 }
14241
14242 /* Replace input file instruction which is in ex9 itable. */
14243
14244 static bfd_boolean
14245 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14246 {
14247 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14248 bfd_byte *contents = NULL;
14249 bfd_vma off;
14250 uint16_t insn16, insn_ex9;
14251 /* `pre_*' are used to track previous instruction that can use ex9.it. */
14252 bfd_vma pre_off = -1;
14253 uint16_t pre_insn16 = 0;
14254 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14255 Elf_Internal_Rela *internal_relocs;
14256 Elf_Internal_Rela *irel;
14257 Elf_Internal_Rela *irelend;
14258 Elf_Internal_Shdr *symtab_hdr;
14259 Elf_Internal_Sym *isym = NULL;
14260 nds32_elf_blank_t *relax_blank_list = NULL;
14261 uint32_t insn = 0;
14262 uint32_t insn_with_reg = 0;
14263 uint32_t it_insn;
14264 uint32_t it_insn_with_reg;
14265 unsigned long r_symndx;
14266 asection *isec;
14267 struct elf_nds32_irel_entry *irel_list = NULL;
14268 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14269 int data_flag, do_replace, save_irel;
14270 struct elf_link_hash_entry_list *h_list;
14271
14272
14273 /* Load section instructions, relocations, and symbol table. */
14274 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
14275 || !nds32_get_local_syms (abfd, sec, &isym))
14276 return FALSE;
14277 internal_relocs =
14278 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14279 irelend = internal_relocs + sec->reloc_count;
14280 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14281
14282 off = 0;
14283
14284 /* Check if the object enable ex9. */
14285 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14286 irelend, R_NDS32_RELAX_ENTRY);
14287
14288 /* Check this section trigger ex9 relaxation. */
14289 if (irel == NULL
14290 || irel >= irelend
14291 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14292 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14293 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14294 return TRUE;
14295
14296 irel = internal_relocs;
14297
14298 /* Check alignment and fetch proper relocation. */
14299 while (off < sec->size)
14300 {
14301 struct elf_link_hash_entry *h = NULL;
14302 struct elf_nds32_irel_entry *irel_ptr = NULL;
14303
14304 /* Syn the instruction and the relocation. */
14305 while (irel != NULL && irel < irelend && irel->r_offset < off)
14306 irel++;
14307
14308 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14309 relax_blank_list, sec,
14310 &off, contents);
14311 if (data_flag & PUSH_PRE)
14312 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14313 &relax_blank_list, pre_irel_ptr,
14314 &irel_list))
14315 return FALSE;
14316
14317 if (data_flag & CLEAN_PRE)
14318 {
14319 pre_off = 0;
14320 pre_insn16 = 0;
14321 pre_irel_ptr = NULL;
14322 }
14323 if (data_flag & DATA_EXIST)
14324 {
14325 /* We save the move offset in the highest byte. */
14326 off += (data_flag >> 24);
14327 continue;
14328 }
14329
14330 if (*(contents + off) & 0x80)
14331 {
14332 /* 2-byte instruction. */
14333 off += 2;
14334 continue;
14335 }
14336
14337 /* Load the instruction and its opcode with register for comparing. */
14338 ex9_insn = ex9_insn_head;
14339 insn = bfd_getb32 (contents + off);
14340 insn_with_reg = 0;
14341 while (ex9_insn)
14342 {
14343 it_insn = strtol (ex9_insn->string, NULL, 16);
14344 it_insn_with_reg = 0;
14345 do_replace = 0;
14346 save_irel = 0;
14347
14348 if (irel != NULL && irel < irelend && irel->r_offset == off)
14349 {
14350 /* Insn with relocation. */
14351 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14352
14353 if (ex9_insn->irel != NULL)
14354 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14355 &it_insn_with_reg);
14356
14357 if (ex9_insn->irel != NULL
14358 && (ELF32_R_TYPE (irel->r_info) ==
14359 ELF32_R_TYPE (ex9_insn->irel->r_info))
14360 && (insn_with_reg == it_insn_with_reg))
14361 {
14362 /* Insn relocation and format is the same as table entry. */
14363
14364 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14365 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14366 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14367 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14368 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14369 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14370 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14371 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14372 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14373 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14374 && ELF32_R_TYPE (irel->r_info) <=
14375 R_NDS32_SDA12S2_SP_RELA)
14376 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14377 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14378 {
14379 r_symndx = ELF32_R_SYM (irel->r_info);
14380 if (r_symndx < symtab_hdr->sh_info)
14381 {
14382 /* Local symbol. */
14383 int shndx = isym[r_symndx].st_shndx;
14384
14385 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14386 if (ex9_insn->sec == isec
14387 && ex9_insn->irel->r_addend == irel->r_addend
14388 && ex9_insn->irel->r_info == irel->r_info)
14389 {
14390 do_replace = 1;
14391 save_irel = 1;
14392 }
14393 }
14394 else
14395 {
14396 /* External symbol. */
14397 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14398 if (ex9_insn->m_list)
14399 {
14400 h_list = ex9_insn->m_list->h_list;
14401 while (h_list)
14402 {
14403 if (h == h_list->h
14404 && (ex9_insn->m_list->irel->r_addend ==
14405 irel->r_addend))
14406 {
14407 do_replace = 1;
14408 save_irel = 1;
14409 break;
14410 }
14411 h_list = h_list->next;
14412 }
14413 }
14414 }
14415 }
14416 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14417 {
14418 r_symndx = ELF32_R_SYM (irel->r_info);
14419 if (r_symndx < symtab_hdr->sh_info)
14420 {
14421 /* Local symbols. Compare its base symbol and offset. */
14422 int shndx = isym[r_symndx].st_shndx;
14423
14424 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14425 if (ex9_insn->sec == isec
14426 && ex9_insn->irel->r_addend == irel->r_addend
14427 && ex9_insn->irel->r_info == irel->r_info)
14428 {
14429 do_replace = 1;
14430 save_irel = 1;
14431 }
14432 }
14433 else
14434 {
14435 /* External symbol. */
14436 struct elf_link_hash_entry_mul_list *m_list;
14437
14438 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14439 m_list = ex9_insn->m_list;
14440
14441 while (m_list)
14442 {
14443 h_list = m_list->h_list;
14444
14445 while (h_list)
14446 {
14447 if (h == h_list->h
14448 && (m_list->irel->r_addend
14449 == irel->r_addend))
14450 {
14451 do_replace = 1;
14452 save_irel = 1;
14453 if (ex9_insn->next
14454 && ex9_insn->m_list
14455 && ex9_insn->m_list == ex9_insn->next->m_list)
14456 {
14457 /* sethi multiple entry must be fixed */
14458 nds32_elf_ex9_insert_fix (sec, irel,
14459 h, ex9_insn->order);
14460 }
14461 break;
14462 }
14463 h_list = h_list->next;
14464 }
14465 m_list = m_list->next;
14466 }
14467 }
14468 }
14469 }
14470
14471 /* Import table: Check the symbol hash table and the
14472 jump target. Only R_NDS32_25_PCREL_RELA now. */
14473 else if (ex9_insn->times == -1
14474 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14475 {
14476 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14477 if (insn_with_reg == it_insn_with_reg)
14478 {
14479 char code[10];
14480 bfd_vma relocation;
14481
14482 r_symndx = ELF32_R_SYM (irel->r_info);
14483 if (r_symndx >= symtab_hdr->sh_info)
14484 {
14485 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14486 if ((h->root.type == bfd_link_hash_defined
14487 || h->root.type == bfd_link_hash_defweak)
14488 && h->root.u.def.section != NULL
14489 && h->root.u.def.section->output_section != NULL
14490 && h->root.u.def.section->gc_mark == 1
14491 && bfd_is_abs_section (h->root.u.def.section)
14492 && h->root.u.def.value > sec->size)
14493 {
14494 relocation = h->root.u.def.value +
14495 h->root.u.def.section->output_section->vma +
14496 h->root.u.def.section->output_offset;
14497 relocation += irel->r_addend;
14498 insn = insn_with_reg
14499 | ((relocation >> 1) & 0xffffff);
14500 snprintf (code, sizeof (code), "%08x", insn);
14501 if (strcmp (code, ex9_insn->string) == 0)
14502 {
14503 do_replace = 1;
14504 save_irel = 1;
14505 }
14506 }
14507 }
14508 }
14509 }
14510 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14511 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14512 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14513 {
14514 /* These relocations do not have to relocate contens, so it can
14515 be regard as instruction without relocation. */
14516 if (insn == it_insn && ex9_insn->irel == NULL)
14517 do_replace = 1;
14518 }
14519 }
14520 else
14521 {
14522 /* Instruction without relocation, we only
14523 have to compare their byte code. */
14524 if (insn == it_insn && ex9_insn->irel == NULL)
14525 do_replace = 1;
14526 }
14527
14528 /* Insntruction match so replacing the code here. */
14529 if (do_replace == 1)
14530 {
14531 /* There are two formats of ex9 instruction. */
14532 if (ex9_insn->order < 32)
14533 insn_ex9 = INSN_EX9_IT_2;
14534 else
14535 insn_ex9 = INSN_EX9_IT_1;
14536 insn16 = insn_ex9 | ex9_insn->order;
14537
14538 /* Insert ex9 instruction. */
14539 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14540 &relax_blank_list, pre_irel_ptr,
14541 &irel_list);
14542 pre_off = off;
14543 pre_insn16 = insn16;
14544
14545 if (save_irel)
14546 {
14547 /* For instuction with relocation do relax. */
14548 irel_ptr = (struct elf_nds32_irel_entry *)
14549 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14550 irel_ptr->irel = irel;
14551 irel_ptr->next = NULL;
14552 pre_irel_ptr = irel_ptr;
14553 }
14554 else
14555 pre_irel_ptr = NULL;
14556 break;
14557 }
14558 ex9_insn = ex9_insn->next;
14559 }
14560 off += 4;
14561 }
14562
14563 /* Insert ex9 instruction. */
14564 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14565 &relax_blank_list, pre_irel_ptr,
14566 &irel_list);
14567
14568 /* Delete the redundant code. */
14569 if (relax_blank_list)
14570 {
14571 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14572 relax_blank_list = NULL;
14573 }
14574
14575 /* Clear the relocation that is replaced by ex9. */
14576 while (irel_list)
14577 {
14578 struct elf_nds32_irel_entry *irel_ptr;
14579
14580 irel_ptr = irel_list;
14581 irel_list = irel_ptr->next;
14582 irel_ptr->irel->r_info =
14583 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14584 free (irel_ptr);
14585 }
14586 return TRUE;
14587 }
14588
14589 /* Initialize ex9 hash table. */
14590
14591 int
14592 nds32_elf_ex9_init (void)
14593 {
14594 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14595 sizeof (struct elf_nds32_code_hash_entry),
14596 1023))
14597 {
14598 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n"));
14599 return FALSE;
14600 }
14601 return TRUE;
14602 }
14603
14604 /* Predict how many bytes will be relaxed with ex9 and ifc. */
14605
14606 static void
14607 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14608 {
14609 struct elf_nds32_insn_times_entry *ex9_insn;
14610 struct elf_nds32_insn_times_entry *temp;
14611 int target_optimize;
14612 struct elf_nds32_link_hash_table *table;
14613
14614 if (ex9_insn_head == NULL)
14615 return;
14616
14617 table = nds32_elf_hash_table (info);
14618 target_optimize = table->target_optimize;
14619 ex9_insn = ex9_insn_head;
14620 while (ex9_insn)
14621 {
14622 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14623 temp = ex9_insn;
14624 ex9_insn = ex9_insn->next;
14625 free (temp);
14626 }
14627 ex9_insn_head = NULL;
14628
14629 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14630 {
14631 /* Examine ifc reduce size. */
14632 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14633 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14634 int size = 0;
14635
14636 while (ifc_ent)
14637 {
14638 if (ifc_ent->enable == 0)
14639 {
14640 /* Not ifc yet. */
14641 irel_ptr = ifc_ent->irel_head;
14642 while (irel_ptr)
14643 {
14644 size += 2;
14645 irel_ptr = irel_ptr->next;
14646 }
14647 }
14648 size -= 2;
14649 ifc_ent = ifc_ent->next;
14650 }
14651 ex9_relax_size += size;
14652 }
14653 }
14654
14655 /* Finish ex9 table. */
14656
14657 void
14658 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14659 {
14660 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14661 nds32_elf_order_insn_times (link_info);
14662 nds32_elf_ex9_total_relax (link_info);
14663 /* Traverse the hash table and count its times. */
14664 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14665 nds32_elf_order_insn_times (link_info);
14666 nds32_elf_ex9_build_itable (link_info);
14667 }
14668
14669 /* Relocate the entries in ex9 table. */
14670
14671 static bfd_vma
14672 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14673 struct bfd_link_info *link_info)
14674 {
14675 Elf_Internal_Sym *isym = NULL;
14676 bfd_vma relocation = -1;
14677 struct elf_link_hash_entry *h;
14678
14679 if (ptr->m_list != NULL)
14680 {
14681 /* Global symbol. */
14682 h = ptr->m_list->h_list->h;
14683 if ((h->root.type == bfd_link_hash_defined
14684 || h->root.type == bfd_link_hash_defweak)
14685 && h->root.u.def.section != NULL
14686 && h->root.u.def.section->output_section != NULL)
14687 {
14688
14689 relocation = h->root.u.def.value +
14690 h->root.u.def.section->output_section->vma +
14691 h->root.u.def.section->output_offset;
14692 relocation += ptr->m_list->irel->r_addend;
14693 }
14694 else
14695 relocation = 0;
14696 }
14697 else if (ptr->sec !=NULL)
14698 {
14699 /* Local symbol. */
14700 Elf_Internal_Sym sym;
14701 asection *sec = NULL;
14702 asection isec;
14703 asection *isec_ptr = &isec;
14704 Elf_Internal_Rela irel_backup = *(ptr->irel);
14705 asection *sec_backup = ptr->sec;
14706 bfd *abfd = ptr->sec->owner;
14707
14708 if (!nds32_get_local_syms (abfd, sec, &isym))
14709 return FALSE;
14710 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14711
14712 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14713 if (sec != NULL)
14714 *isec_ptr = *sec;
14715 sym = *isym;
14716
14717 /* The purpose is same as elf_link_input_bfd. */
14718 if (isec_ptr != NULL
14719 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14720 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14721 {
14722 sym.st_value =
14723 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14724 elf_section_data (isec_ptr)->sec_info,
14725 isym->st_value);
14726 }
14727 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14728 &ptr->sec, ptr->irel);
14729 if (ptr->irel != NULL)
14730 relocation += ptr->irel->r_addend;
14731
14732 /* Restore origin value since there may be some insntructions that
14733 could not be replaced with ex9.it. */
14734 *(ptr->irel) = irel_backup;
14735 ptr->sec = sec_backup;
14736 }
14737
14738 return relocation;
14739 }
14740
14741 /* Import ex9 table and build list. */
14742
14743 void
14744 nds32_elf_ex9_import_table (struct bfd_link_info *info)
14745 {
14746 int num = 0;
14747 bfd_byte *contents;
14748 FILE *ex9_import_file;
14749 int update_ex9_table;
14750 struct elf_nds32_link_hash_table *table;
14751
14752 table = nds32_elf_hash_table (info);
14753 ex9_import_file = table->ex9_import_file;
14754 rewind (table->ex9_import_file);
14755
14756 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14757
14758 /* Read instructions from the input file and build the list. */
14759 while (!feof (ex9_import_file))
14760 {
14761 unsigned long insn;
14762 char *code;
14763 struct elf_nds32_insn_times_entry *ptr;
14764 size_t nread;
14765
14766 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
14767 /* Ignore the final byte 0x0a. */
14768 if (nread < 1)
14769 break;
14770 insn = bfd_getb32 (contents);
14771 code = bfd_malloc (sizeof (char) * 9);
14772 snprintf (code, 9, "%08lx", (insn & 0xffffffff));
14773 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14774 ptr->string = code;
14775 ptr->order = num;
14776 ptr->times = -1;
14777 ptr->sec = NULL;
14778 ptr->m_list = NULL;
14779 ptr->rel_backup.r_offset = 0;
14780 ptr->rel_backup.r_info = 0;
14781 ptr->rel_backup.r_addend = 0;
14782 ptr->irel = NULL;
14783 ptr->next = NULL;
14784 nds32_elf_ex9_insert_entry (ptr);
14785 num++;
14786 }
14787
14788 update_ex9_table = table->update_ex9_table;
14789 if (update_ex9_table == 1)
14790 {
14791 /* It has to consider of sethi need to use multiple page
14792 but it not be done yet. */
14793 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14794 nds32_elf_order_insn_times (info);
14795 }
14796 }
14797
14798 /* Export ex9 table. */
14799
14800 static void
14801 nds32_elf_ex9_export (struct bfd_link_info *info,
14802 bfd_byte *contents, int size)
14803 {
14804 FILE *ex9_export_file;
14805 struct elf_nds32_link_hash_table *table;
14806
14807 table = nds32_elf_hash_table (info);
14808 ex9_export_file = table->ex9_export_file;
14809 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
14810 fclose (ex9_export_file);
14811 }
14812
14813 /* Adjust relocations of J and JAL in ex9.itable.
14814 Export ex9 table. */
14815
14816 static void
14817 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
14818 {
14819 asection *table_sec = NULL;
14820 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14821 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
14822 bfd *it_abfd;
14823 uint32_t insn, insn_with_reg, source_insn;
14824 bfd_byte *contents = NULL, *source_contents = NULL;
14825 int size = 0;
14826 bfd_vma gp;
14827 int shift, update_ex9_table, offset = 0;
14828 reloc_howto_type *howto = NULL;
14829 Elf_Internal_Rela rel_backup;
14830 unsigned short insn_ex9;
14831 struct elf_nds32_link_hash_table *table;
14832 FILE *ex9_export_file;
14833 static bfd_boolean done = FALSE;
14834
14835 if (done)
14836 return;
14837
14838 done = TRUE;
14839
14840 table = nds32_elf_hash_table (link_info);
14841 if (table)
14842 table->relax_status |= NDS32_RELAX_EX9_DONE;
14843
14844
14845 update_ex9_table = table->update_ex9_table;
14846 /* Generated ex9.itable exactly. */
14847 if (update_ex9_table == 0)
14848 {
14849 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14850 it_abfd = it_abfd->link.next)
14851 {
14852 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14853 if (table_sec != NULL)
14854 break;
14855 }
14856
14857 if (table_sec != NULL)
14858 {
14859 bfd *output_bfd;
14860
14861 output_bfd = table_sec->output_section->owner;
14862 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14863 if (table_sec->size == 0)
14864 return;
14865
14866 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
14867 return;
14868 }
14869 }
14870 else
14871 {
14872 /* Set gp. */
14873 bfd *output_bfd;
14874
14875 output_bfd = link_info->input_bfds->sections->output_section->owner;
14876 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14877 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
14878 }
14879
14880 /* Relocate instruction. */
14881 while (ex9_insn)
14882 {
14883 bfd_vma relocation, min_relocation = 0xffffffff;
14884
14885 insn = strtol (ex9_insn->string, NULL, 16);
14886 insn_with_reg = 0;
14887 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
14888 {
14889 if (ex9_insn->m_list)
14890 rel_backup = ex9_insn->m_list->rel_backup;
14891 else
14892 rel_backup = ex9_insn->rel_backup;
14893
14894 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
14895 howto =
14896 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
14897 (rel_backup.r_info));
14898 shift = howto->rightshift;
14899 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
14900 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
14901 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
14902 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
14903 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
14904 {
14905 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14906 insn =
14907 insn_with_reg | ((relocation >> shift) &
14908 nds32_elf_irel_mask (&rel_backup));
14909 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14910 }
14911 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
14912 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
14913 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
14914 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
14915 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
14916 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
14917 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
14918 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
14919 {
14920 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14921 insn =
14922 insn_with_reg | (((relocation - gp) >> shift) &
14923 nds32_elf_irel_mask (&rel_backup));
14924 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14925 }
14926 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
14927 {
14928 /* Sethi may be multiple entry for one insn. */
14929 if (ex9_insn->next && ex9_insn->m_list
14930 && ex9_insn->m_list == ex9_insn->next->m_list)
14931 {
14932 struct elf_link_hash_entry_mul_list *m_list;
14933 struct elf_nds32_ex9_refix *fix_ptr;
14934 struct elf_link_hash_entry *h;
14935
14936 temp_ptr = ex9_insn;
14937 temp_ptr2 = ex9_insn;
14938 m_list = ex9_insn->m_list;
14939 while (m_list)
14940 {
14941 h = m_list->h_list->h;
14942 relocation = h->root.u.def.value +
14943 h->root.u.def.section->output_section->vma +
14944 h->root.u.def.section->output_offset;
14945 relocation += m_list->irel->r_addend;
14946
14947 if (relocation < min_relocation)
14948 min_relocation = relocation;
14949 m_list = m_list->next;
14950 }
14951 relocation = min_relocation;
14952
14953 /* Put insntruction into ex9 table. */
14954 insn = insn_with_reg
14955 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
14956 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14957 relocation = relocation + 0x1000; /* hi20 */
14958
14959 while (ex9_insn->next && ex9_insn->m_list
14960 && ex9_insn->m_list == ex9_insn->next->m_list)
14961 {
14962 /* Multiple sethi. */
14963 ex9_insn = ex9_insn->next;
14964 size += 4;
14965 insn =
14966 insn_with_reg | ((relocation >> shift) &
14967 nds32_elf_irel_mask (&rel_backup));
14968 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
14969 relocation = relocation + 0x1000; /* hi20 */
14970 }
14971
14972 fix_ptr = ex9_refix_head;
14973 while (fix_ptr)
14974 {
14975 /* Fix ex9 insn. */
14976 /* temp_ptr2 points to the head of multiple sethi. */
14977 temp_ptr = temp_ptr2;
14978 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
14979 {
14980 fix_ptr = fix_ptr->next;
14981 }
14982 if (fix_ptr->order != temp_ptr->order)
14983 break;
14984
14985 /* Set source insn. */
14986 relocation =
14987 fix_ptr->h->root.u.def.value +
14988 fix_ptr->h->root.u.def.section->output_section->vma +
14989 fix_ptr->h->root.u.def.section->output_offset;
14990 relocation += fix_ptr->irel->r_addend;
14991 /* sethi imm is imm20s. */
14992 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
14993
14994 while (temp_ptr)
14995 {
14996 /* Match entry and source code. */
14997 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
14998 if (insn == source_insn)
14999 {
15000 /* Fix the ex9 insn. */
15001 if (temp_ptr->order != fix_ptr->order)
15002 {
15003 if (!nds32_get_section_contents
15004 (fix_ptr->sec->owner, fix_ptr->sec,
15005 &source_contents, TRUE))
15006 _bfd_error_handler
15007 (_("Linker: error cannot fixed ex9 relocation \n"));
15008 if (temp_ptr->order < 32)
15009 insn_ex9 = INSN_EX9_IT_2;
15010 else
15011 insn_ex9 = INSN_EX9_IT_1;
15012 insn_ex9 = insn_ex9 | temp_ptr->order;
15013 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15014 }
15015 break;
15016 }
15017 else
15018 {
15019 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15020 _bfd_error_handler
15021 (_("Linker: error cannot fixed ex9 relocation \n"));
15022 else
15023 temp_ptr = temp_ptr->next;
15024 }
15025 }
15026 fix_ptr = fix_ptr->next;
15027 }
15028 }
15029 else
15030 {
15031 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15032 insn = insn_with_reg
15033 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15034 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15035 }
15036 }
15037 }
15038 else
15039 {
15040 /* Insn without relocation does not have to be fixed
15041 if need to update export table. */
15042 if (update_ex9_table == 1)
15043 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15044 }
15045 ex9_insn = ex9_insn->next;
15046 size += 4;
15047 }
15048
15049 ex9_export_file = table->ex9_export_file;
15050 if (ex9_export_file != NULL)
15051 nds32_elf_ex9_export (link_info, contents, table_sec->size);
15052 else if (update_ex9_table == 1)
15053 {
15054 table->ex9_export_file = table->ex9_import_file;
15055 rewind (table->ex9_export_file);
15056 nds32_elf_ex9_export (link_info, contents, size);
15057 }
15058 }
15059
15060 /* Generate ex9 hash table. */
15061
15062 static bfd_boolean
15063 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15064 struct bfd_link_info *link_info)
15065 {
15066 Elf_Internal_Rela *internal_relocs;
15067 Elf_Internal_Rela *irelend;
15068 Elf_Internal_Rela *irel;
15069 Elf_Internal_Rela *jrel;
15070 Elf_Internal_Rela rel_backup;
15071 Elf_Internal_Shdr *symtab_hdr;
15072 Elf_Internal_Sym *isym = NULL;
15073 asection *isec;
15074 struct elf_link_hash_entry **sym_hashes;
15075 bfd_byte *contents = NULL;
15076 bfd_vma off = 0;
15077 unsigned long r_symndx;
15078 uint32_t insn, insn_with_reg;
15079 struct elf_link_hash_entry *h;
15080 int data_flag, shift, align;
15081 bfd_vma relocation;
15082 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15083 reloc_howto_type *howto = NULL;
15084
15085 sym_hashes = elf_sym_hashes (abfd);
15086 /* Load section instructions, relocations, and symbol table. */
15087 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
15088 return FALSE;
15089
15090 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15091 TRUE /* keep_memory */);
15092 irelend = internal_relocs + sec->reloc_count;
15093 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15094 if (!nds32_get_local_syms (abfd, sec, &isym))
15095 return FALSE;
15096
15097 /* Check the object if enable ex9. */
15098 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15099 R_NDS32_RELAX_ENTRY);
15100
15101 /* Check this section trigger ex9 relaxation. */
15102 if (irel == NULL
15103 || irel >= irelend
15104 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15105 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15106 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15107 return TRUE;
15108
15109 irel = internal_relocs;
15110
15111 /* Push each insn into hash table. */
15112 while (off < sec->size)
15113 {
15114 char code[10];
15115 struct elf_nds32_code_hash_entry *entry;
15116
15117 while (irel != NULL && irel < irelend && irel->r_offset < off)
15118 irel++;
15119
15120 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15121 NULL, sec, &off, contents);
15122 if (data_flag & DATA_EXIST)
15123 {
15124 /* We save the move offset in the highest byte. */
15125 off += (data_flag >> 24);
15126 continue;
15127 }
15128
15129 if (*(contents + off) & 0x80)
15130 {
15131 off += 2;
15132 }
15133 else
15134 {
15135 h = NULL;
15136 isec = NULL;
15137 jrel = NULL;
15138 rel_backup.r_info = 0;
15139 rel_backup.r_offset = 0;
15140 rel_backup.r_addend = 0;
15141 /* Load the instruction and its opcode with register for comparing. */
15142 insn = bfd_getb32 (contents + off);
15143 insn_with_reg = 0;
15144 if (irel != NULL && irel < irelend && irel->r_offset == off)
15145 {
15146 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15147 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15148 shift = howto->rightshift;
15149 align = (1 << shift) - 1;
15150 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15151 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15152 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15153 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15154 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15155 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15156 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15157 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15158 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15159 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15160 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15161 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15162 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15163 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15164 {
15165 r_symndx = ELF32_R_SYM (irel->r_info);
15166 jrel = irel;
15167 rel_backup = *irel;
15168 if (r_symndx < symtab_hdr->sh_info)
15169 {
15170 /* Local symbol. */
15171 int shndx = isym[r_symndx].st_shndx;
15172
15173 bfd_vma st_value = (isym + r_symndx)->st_value;
15174 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15175 relocation = (isec->output_section->vma + isec->output_offset
15176 + st_value + irel->r_addend);
15177 }
15178 else
15179 {
15180 /* External symbol. */
15181 bfd_boolean warned ATTRIBUTE_UNUSED;
15182 bfd_boolean ignored ATTRIBUTE_UNUSED;
15183 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15184 asection *sym_sec;
15185
15186 /* Maybe there is a better way to get h and relocation */
15187 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15188 r_symndx, symtab_hdr, sym_hashes,
15189 h, sym_sec, relocation,
15190 unresolved_reloc, warned, ignored);
15191 relocation += irel->r_addend;
15192 if ((h->root.type != bfd_link_hash_defined
15193 && h->root.type != bfd_link_hash_defweak)
15194 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15195 {
15196 off += 4;
15197 continue;
15198 }
15199 }
15200
15201 /* Check for gp relative instruction alignment. */
15202 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15203 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15204 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15205 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15206 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15207 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15208 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15209 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15210 {
15211 bfd_vma gp;
15212 bfd *output_bfd = sec->output_section->owner;
15213 bfd_reloc_status_type r;
15214
15215 /* If the symbol is in the abs section, the out_bfd will be null.
15216 This happens when the relocation has a symbol@GOTOFF. */
15217 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15218 if (r != bfd_reloc_ok)
15219 {
15220 off += 4;
15221 continue;
15222 }
15223
15224 relocation -= gp;
15225
15226 /* Make sure alignment is correct. */
15227 if (relocation & align)
15228 {
15229 /* Incorrect alignment. */
15230 _bfd_error_handler
15231 /* xgettext:c-format */
15232 (_("%B: warning: unaligned small data access "
15233 "for entry: {%Ld, %Ld, %Ld}, addr = %#Lx, align = %#x"),
15234 abfd, irel->r_offset,
15235 irel->r_info, irel->r_addend, relocation, align);
15236 off += 4;
15237 continue;
15238 }
15239 }
15240
15241 insn = insn_with_reg
15242 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15243 }
15244 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15245 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15246 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15247 {
15248 /* These relocations do not have to relocate contens, so it can
15249 be regard as instruction without relocation. */
15250 }
15251 else
15252 {
15253 off += 4;
15254 continue;
15255 }
15256 }
15257
15258 snprintf (code, sizeof (code), "%08x", insn);
15259 /* Copy "code". */
15260 entry = (struct elf_nds32_code_hash_entry*)
15261 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15262 if (entry == NULL)
15263 {
15264 _bfd_error_handler
15265 (_("failed creating ex9.it %s hash table entry"), code);
15266 return FALSE;
15267 }
15268 if (h)
15269 {
15270 if (h->root.type == bfd_link_hash_undefined)
15271 return TRUE;
15272 /* Global symbol. */
15273 /* In order to do sethi with different symbol but same value. */
15274 if (entry->m_list == NULL)
15275 {
15276 struct elf_link_hash_entry_mul_list *m_list_new;
15277 struct elf_link_hash_entry_list *h_list_new;
15278
15279 m_list_new = (struct elf_link_hash_entry_mul_list *)
15280 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15281 h_list_new = (struct elf_link_hash_entry_list *)
15282 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15283 entry->m_list = m_list_new;
15284 m_list_new->h_list = h_list_new;
15285 m_list_new->rel_backup = rel_backup;
15286 m_list_new->times = 1;
15287 m_list_new->irel = jrel;
15288 m_list_new->next = NULL;
15289 h_list_new->h = h;
15290 h_list_new->next = NULL;
15291 }
15292 else
15293 {
15294 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15295 struct elf_link_hash_entry_list *h_list;
15296
15297 while (m_list)
15298 {
15299 /* Build the different symbols that point to the same address. */
15300 h_list = m_list->h_list;
15301 if (h_list->h->root.u.def.value == h->root.u.def.value
15302 && h_list->h->root.u.def.section->output_section->vma
15303 == h->root.u.def.section->output_section->vma
15304 && h_list->h->root.u.def.section->output_offset
15305 == h->root.u.def.section->output_offset
15306 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15307 {
15308 m_list->times++;
15309 m_list->irel = jrel;
15310 while (h_list->h != h && h_list->next)
15311 h_list = h_list->next;
15312 if (h_list->h != h)
15313 {
15314 struct elf_link_hash_entry_list *h_list_new;
15315
15316 h_list_new = (struct elf_link_hash_entry_list *)
15317 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15318 h_list->next = h_list_new;
15319 h_list_new->h = h;
15320 h_list_new->next = NULL;
15321 }
15322 break;
15323 }
15324 /* The sethi case may have different address but the
15325 hi20 is the same. */
15326 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15327 && m_list->next == NULL)
15328 {
15329 struct elf_link_hash_entry_mul_list *m_list_new;
15330 struct elf_link_hash_entry_list *h_list_new;
15331
15332 m_list_new = (struct elf_link_hash_entry_mul_list *)
15333 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15334 h_list_new = (struct elf_link_hash_entry_list *)
15335 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15336 m_list->next = m_list_new;
15337 m_list_new->h_list = h_list_new;
15338 m_list_new->rel_backup = rel_backup;
15339 m_list_new->times = 1;
15340 m_list_new->irel = jrel;
15341 m_list_new->next = NULL;
15342 h_list_new->h = h;
15343 h_list_new->next = NULL;
15344 break;
15345 }
15346 m_list = m_list->next;
15347 }
15348 if (!m_list)
15349 {
15350 off += 4;
15351 continue;
15352 }
15353 }
15354 }
15355 else
15356 {
15357 /* Local symbol and insn without relocation*/
15358 entry->times++;
15359 entry->rel_backup = rel_backup;
15360 }
15361
15362 /* Use in sethi insn with constant and global symbol in same format. */
15363 if (!jrel)
15364 entry->const_insn = 1;
15365 else
15366 entry->irel = jrel;
15367 entry->sec = isec;
15368 off += 4;
15369 }
15370 }
15371 return TRUE;
15372 }
15373
15374 /* Set the _ITB_BASE, and point it to ex9 table. */
15375
15376 bfd_boolean
15377 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15378 {
15379 bfd *abfd;
15380 asection *sec;
15381 bfd *output_bfd = NULL;
15382 struct bfd_link_hash_entry *bh = NULL;
15383
15384 if (is_ITB_BASE_set == 1)
15385 return TRUE;
15386
15387 is_ITB_BASE_set = 1;
15388
15389 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15390
15391 if (bh && (bh->type == bfd_link_hash_defined
15392 || bh->type == bfd_link_hash_defweak))
15393 return TRUE;
15394
15395 for (abfd = link_info->input_bfds; abfd != NULL;
15396 abfd = abfd->link.next)
15397 {
15398 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15399 if (sec != NULL)
15400 {
15401 output_bfd = sec->output_section->owner;
15402 break;
15403 }
15404 }
15405 if (output_bfd == NULL)
15406 {
15407 output_bfd = link_info->output_bfd;
15408 if (output_bfd->sections == NULL)
15409 return TRUE;
15410 else
15411 sec = bfd_abs_section_ptr;
15412 }
15413 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15414 FALSE, FALSE, TRUE);
15415 return (_bfd_generic_link_add_one_symbol
15416 (link_info, output_bfd, "_ITB_BASE_",
15417 BSF_GLOBAL | BSF_WEAK, sec, 0,
15418 (const char *) NULL, FALSE, get_elf_backend_data
15419 (output_bfd)->collect, &bh));
15420 } /* End EX9.IT */
15421 \f
15422
15423 #define ELF_ARCH bfd_arch_nds32
15424 #define ELF_MACHINE_CODE EM_NDS32
15425 #define ELF_MAXPAGESIZE 0x1000
15426 #define ELF_TARGET_ID NDS32_ELF_DATA
15427
15428 #define TARGET_BIG_SYM nds32_elf32_be_vec
15429 #define TARGET_BIG_NAME "elf32-nds32be"
15430 #define TARGET_LITTLE_SYM nds32_elf32_le_vec
15431 #define TARGET_LITTLE_NAME "elf32-nds32le"
15432
15433 #define elf_info_to_howto nds32_info_to_howto
15434 #define elf_info_to_howto_rel nds32_info_to_howto_rel
15435
15436 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15437 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15438 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15439 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15440 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15441
15442 #define bfd_elf32_mkobject nds32_elf_mkobject
15443 #define elf_backend_action_discarded nds32_elf_action_discarded
15444 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15445 #define elf_backend_check_relocs nds32_elf_check_relocs
15446 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15447 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15448 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15449 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15450 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15451 #define elf_backend_relocate_section nds32_elf_relocate_section
15452 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15453 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15454 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15455 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15456 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15457 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15458 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15459 #define elf_backend_object_p nds32_elf_object_p
15460 #define elf_backend_final_write_processing nds32_elf_final_write_processing
15461 #define elf_backend_special_sections nds32_elf_special_sections
15462 #define bfd_elf32_bfd_get_relocated_section_contents \
15463 nds32_elf_get_relocated_section_contents
15464
15465 #define elf_backend_can_gc_sections 1
15466 #define elf_backend_can_refcount 1
15467 #define elf_backend_want_got_plt 1
15468 #define elf_backend_plt_readonly 1
15469 #define elf_backend_want_plt_sym 0
15470 #define elf_backend_got_header_size 12
15471 #define elf_backend_may_use_rel_p 1
15472 #define elf_backend_default_use_rela_p 1
15473 #define elf_backend_may_use_rela_p 1
15474 #define elf_backend_dtrel_excludes_plt 1
15475
15476 #include "elf32-target.h"
15477
15478 #undef ELF_MAXPAGESIZE
15479 #define ELF_MAXPAGESIZE 0x2000
15480
15481 #undef TARGET_BIG_SYM
15482 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec
15483 #undef TARGET_BIG_NAME
15484 #define TARGET_BIG_NAME "elf32-nds32be-linux"
15485 #undef TARGET_LITTLE_SYM
15486 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
15487 #undef TARGET_LITTLE_NAME
15488 #define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15489 #undef elf32_bed
15490 #define elf32_bed elf32_nds32_lin_bed
15491
15492 #include "elf32-target.h"
GDB Binutils - Deliverables
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