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Set dynamic tag VMA and size from dynamic section when possible
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36
37 /* Relocation HOWTO functions. */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55 /* Helper functions for HOWTO. */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59 static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66 /* Target hooks. */
67 static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69 static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71 static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74 static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77 static bfd_boolean nds32_elf_object_p (bfd *);
78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80 static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82 static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84 static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86 static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89 static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91 static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93 static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95 static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97 static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
100 static bfd_boolean nds32_elf_mkobject (bfd *);
101
102 /* Nds32 helper functions. */
103 static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107 static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110 static bfd_vma calculate_memory_address
111 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112 static int nds32_get_section_contents (bfd *, asection *,
113 bfd_byte **, bfd_boolean);
114 static bfd_boolean nds32_elf_ex9_build_hash_table
115 (bfd *, asection *, struct bfd_link_info *);
116 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
117 static void nds32_elf_ex9_import_table (struct bfd_link_info *);
118 static void nds32_elf_ex9_finish (struct bfd_link_info *);
119 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
120 static void nds32_elf_get_insn_with_reg
121 (Elf_Internal_Rela *, uint32_t, uint32_t *);
122 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
123 Elf_Internal_Sym **);
124 static bfd_boolean nds32_elf_ex9_replace_instruction
125 (struct bfd_link_info *, bfd *, asection *);
126 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
127 asection *);
128 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
129 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
130 static bfd_boolean nds32_elf_ifc_reloc (void);
131 static bfd_boolean nds32_relax_fp_as_gp
132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
134 Elf_Internal_Sym *isymbuf);
135 static bfd_boolean nds32_fag_remove_unused_fpbase
136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
137 Elf_Internal_Rela *irelend);
138 static bfd_byte *
139 nds32_elf_get_relocated_section_contents (bfd *abfd,
140 struct bfd_link_info *link_info,
141 struct bfd_link_order *link_order,
142 bfd_byte *data,
143 bfd_boolean relocatable,
144 asymbol **symbols);
145
146 enum
147 {
148 MACH_V1 = bfd_mach_n1h,
149 MACH_V2 = bfd_mach_n1h_v2,
150 MACH_V3 = bfd_mach_n1h_v3,
151 MACH_V3M = bfd_mach_n1h_v3m
152 };
153
154 #define MIN(a, b) ((a) > (b) ? (b) : (a))
155 #define MAX(a, b) ((a) > (b) ? (a) : (b))
156
157 /* The name of the dynamic interpreter. This is put in the .interp
158 section. */
159 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
160
161 /* The nop opcode we use. */
162 #define NDS32_NOP32 0x40000009
163 #define NDS32_NOP16 0x9200
164
165 /* The size in bytes of an entry in the procedure linkage table. */
166 #define PLT_ENTRY_SIZE 24
167 #define PLT_HEADER_SIZE 24
168
169 /* The first entry in a procedure linkage table are reserved,
170 and the initial contents are unimportant (we zero them out).
171 Subsequent entries look like this. */
172 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
173 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
174 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
175 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
176 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
177
178 /* $ta is change to $r15 (from $r25). */
179 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
180 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
181 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
182 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
183 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
184 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
185
186 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
187 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
188 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
189 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
190 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
191
192 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
193 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
194 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
195 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
196 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
197 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
198
199 /* These are macros used to get the relocation accurate value. */
200 #define ACCURATE_8BIT_S1 (0x100)
201 #define ACCURATE_U9BIT_S1 (0x400)
202 #define ACCURATE_12BIT_S1 (0x2000)
203 #define ACCURATE_14BIT_S1 (0x4000)
204 #define ACCURATE_19BIT (0x40000)
205
206 /* These are macros used to get the relocation conservative value. */
207 #define CONSERVATIVE_8BIT_S1 (0x100 - 4)
208 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
209 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
210 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
211 /* These must be more conservative because the address may be in
212 different segment. */
213 #define CONSERVATIVE_15BIT (0x4000 - 0x1000)
214 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
215 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
216 #define CONSERVATIVE_19BIT (0x40000 - 0x1000)
217 #define CONSERVATIVE_20BIT (0x80000 - 0x1000)
218
219 /* Size of small data/bss sections, used to calculate SDA_BASE. */
220 static long got_size = 0;
221 static int is_SDA_BASE_set = 0;
222 static int is_ITB_BASE_set = 0;
223
224 /* Convert ELF-VER in eflags to string for debugging purpose. */
225 static const char *const nds32_elfver_strtab[] =
226 {
227 "ELF-1.2",
228 "ELF-1.3",
229 "ELF-1.4",
230 };
231
232 /* The nds32 linker needs to keep track of the number of relocs that it
233 decides to copy in check_relocs for each symbol. This is so that
234 it can discard PC relative relocs if it doesn't need them when
235 linking with -Bsymbolic. We store the information in a field
236 extending the regular ELF linker hash table. */
237
238 /* This structure keeps track of the number of PC relative relocs we
239 have copied for a given symbol. */
240
241 struct elf_nds32_pcrel_relocs_copied
242 {
243 /* Next section. */
244 struct elf_nds32_pcrel_relocs_copied *next;
245 /* A section in dynobj. */
246 asection *section;
247 /* Number of relocs copied in this section. */
248 bfd_size_type count;
249 };
250
251 /* The sh linker needs to keep track of the number of relocs that it
252 decides to copy as dynamic relocs in check_relocs for each symbol.
253 This is so that it can later discard them if they are found to be
254 unnecessary. We store the information in a field extending the
255 regular ELF linker hash table. */
256
257 struct elf_nds32_dyn_relocs
258 {
259 struct elf_nds32_dyn_relocs *next;
260
261 /* The input section of the reloc. */
262 asection *sec;
263
264 /* Total number of relocs copied for the input section. */
265 bfd_size_type count;
266
267 /* Number of pc-relative relocs copied for the input section. */
268 bfd_size_type pc_count;
269 };
270
271 /* Nds32 ELF linker hash entry. */
272
273 struct elf_nds32_link_hash_entry
274 {
275 struct elf_link_hash_entry root;
276
277 /* Track dynamic relocs copied for this symbol. */
278 struct elf_nds32_dyn_relocs *dyn_relocs;
279
280 /* For checking relocation type. */
281 #define GOT_UNKNOWN 0
282 #define GOT_NORMAL 1
283 #define GOT_TLS_IE 2
284 unsigned int tls_type;
285 };
286
287 /* Get the nds32 ELF linker hash table from a link_info structure. */
288
289 #define FP_BASE_NAME "_FP_BASE_"
290 static int check_start_export_sym = 0;
291 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
292
293 /* The offset for executable tls relaxation. */
294 #define TP_OFFSET 0x0
295
296 struct elf_nds32_obj_tdata
297 {
298 struct elf_obj_tdata root;
299
300 /* tls_type for each local got entry. */
301 char *local_got_tls_type;
302 };
303
304 #define elf_nds32_tdata(bfd) \
305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
306
307 #define elf32_nds32_local_got_tls_type(bfd) \
308 (elf_nds32_tdata (bfd)->local_got_tls_type)
309
310 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
311
312 static bfd_boolean
313 nds32_elf_mkobject (bfd *abfd)
314 {
315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
316 NDS32_ELF_DATA);
317 }
318
319 /* Relocations used for relocation. */
320 static reloc_howto_type nds32_elf_howto_table[] =
321 {
322 /* This reloc does nothing. */
323 HOWTO (R_NDS32_NONE, /* type */
324 0, /* rightshift */
325 3, /* size (0 = byte, 1 = short, 2 = long) */
326 0, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_dont, /* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_NDS32_NONE", /* name */
332 FALSE, /* partial_inplace */
333 0, /* src_mask */
334 0, /* dst_mask */
335 FALSE), /* pcrel_offset */
336
337 /* A 16 bit absolute relocation. */
338 HOWTO (R_NDS32_16, /* type */
339 0, /* rightshift */
340 1, /* size (0 = byte, 1 = short, 2 = long) */
341 16, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield, /* complain_on_overflow */
345 nds32_elf_generic_reloc, /* special_function */
346 "R_NDS32_16", /* name */
347 FALSE, /* partial_inplace */
348 0xffff, /* src_mask */
349 0xffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 /* A 32 bit absolute relocation. */
353 HOWTO (R_NDS32_32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield, /* complain_on_overflow */
360 nds32_elf_generic_reloc, /* special_function */
361 "R_NDS32_32", /* name */
362 FALSE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* A 20 bit address. */
368 HOWTO (R_NDS32_20, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 20, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_unsigned, /* complain_on_overflow */
375 nds32_elf_generic_reloc, /* special_function */
376 "R_NDS32_20", /* name */
377 FALSE, /* partial_inplace */
378 0xfffff, /* src_mask */
379 0xfffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 /* An PC Relative 9-bit relocation, shifted by 2.
383 This reloc is complicated because relocations are relative to pc & -4.
384 i.e. branches in the right insn slot use the address of the left insn
385 slot for pc. */
386 /* ??? It's not clear whether this should have partial_inplace set or not.
387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
390 HOWTO (R_NDS32_9_PCREL, /* type */
391 1, /* rightshift */
392 1, /* size (0 = byte, 1 = short, 2 = long) */
393 8, /* bitsize */
394 TRUE, /* pc_relative */
395 0, /* bitpos */
396 complain_overflow_signed, /* complain_on_overflow */
397 nds32_elf_9_pcrel_reloc, /* special_function */
398 "R_NDS32_9_PCREL", /* name */
399 FALSE, /* partial_inplace */
400 0xff, /* src_mask */
401 0xff, /* dst_mask */
402 TRUE), /* pcrel_offset */
403
404 /* A relative 15 bit relocation, right shifted by 1. */
405 HOWTO (R_NDS32_15_PCREL, /* type */
406 1, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 14, /* bitsize */
409 TRUE, /* pc_relative */
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 bfd_elf_generic_reloc, /* special_function */
413 "R_NDS32_15_PCREL", /* name */
414 FALSE, /* partial_inplace */
415 0x3fff, /* src_mask */
416 0x3fff, /* dst_mask */
417 TRUE), /* pcrel_offset */
418
419 /* A relative 17 bit relocation, right shifted by 1. */
420 HOWTO (R_NDS32_17_PCREL, /* type */
421 1, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 16, /* bitsize */
424 TRUE, /* pc_relative */
425 0, /* bitpos */
426 complain_overflow_signed, /* complain_on_overflow */
427 bfd_elf_generic_reloc, /* special_function */
428 "R_NDS32_17_PCREL", /* name */
429 FALSE, /* partial_inplace */
430 0xffff, /* src_mask */
431 0xffff, /* dst_mask */
432 TRUE), /* pcrel_offset */
433
434 /* A relative 25 bit relocation, right shifted by 1. */
435 /* ??? It's not clear whether this should have partial_inplace set or not.
436 Branch relaxing in the assembler can store the addend in the insn,
437 and if bfd_install_relocation gets called the addend may get added
438 again. */
439 HOWTO (R_NDS32_25_PCREL, /* type */
440 1, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 24, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_signed, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_NDS32_25_PCREL", /* name */
448 FALSE, /* partial_inplace */
449 0xffffff, /* src_mask */
450 0xffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 /* High 20 bits of address when lower 12 is or'd in. */
454 HOWTO (R_NDS32_HI20, /* type */
455 12, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 20, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_dont,/* complain_on_overflow */
461 nds32_elf_hi20_reloc, /* special_function */
462 "R_NDS32_HI20", /* name */
463 FALSE, /* partial_inplace */
464 0x000fffff, /* src_mask */
465 0x000fffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 /* Lower 12 bits of address. */
469 HOWTO (R_NDS32_LO12S3, /* type */
470 3, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 9, /* bitsize */
473 FALSE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_dont,/* complain_on_overflow */
476 nds32_elf_lo12_reloc, /* special_function */
477 "R_NDS32_LO12S3", /* name */
478 FALSE, /* partial_inplace */
479 0x000001ff, /* src_mask */
480 0x000001ff, /* dst_mask */
481 FALSE), /* pcrel_offset */
482
483 /* Lower 12 bits of address. */
484 HOWTO (R_NDS32_LO12S2, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 10, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_dont,/* complain_on_overflow */
491 nds32_elf_lo12_reloc, /* special_function */
492 "R_NDS32_LO12S2", /* name */
493 FALSE, /* partial_inplace */
494 0x000003ff, /* src_mask */
495 0x000003ff, /* dst_mask */
496 FALSE), /* pcrel_offset */
497
498 /* Lower 12 bits of address. */
499 HOWTO (R_NDS32_LO12S1, /* type */
500 1, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 11, /* bitsize */
503 FALSE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_dont,/* complain_on_overflow */
506 nds32_elf_lo12_reloc, /* special_function */
507 "R_NDS32_LO12S1", /* name */
508 FALSE, /* partial_inplace */
509 0x000007ff, /* src_mask */
510 0x000007ff, /* dst_mask */
511 FALSE), /* pcrel_offset */
512
513 /* Lower 12 bits of address. */
514 HOWTO (R_NDS32_LO12S0, /* type */
515 0, /* rightshift */
516 2, /* size (0 = byte, 1 = short, 2 = long) */
517 12, /* bitsize */
518 FALSE, /* pc_relative */
519 0, /* bitpos */
520 complain_overflow_dont,/* complain_on_overflow */
521 nds32_elf_lo12_reloc, /* special_function */
522 "R_NDS32_LO12S0", /* name */
523 FALSE, /* partial_inplace */
524 0x00000fff, /* src_mask */
525 0x00000fff, /* dst_mask */
526 FALSE), /* pcrel_offset */
527
528 /* Small data area 15 bits offset. */
529 HOWTO (R_NDS32_SDA15S3, /* type */
530 3, /* rightshift */
531 2, /* size (0 = byte, 1 = short, 2 = long) */
532 15, /* bitsize */
533 FALSE, /* pc_relative */
534 0, /* bitpos */
535 complain_overflow_signed, /* complain_on_overflow */
536 nds32_elf_sda15_reloc, /* special_function */
537 "R_NDS32_SDA15S3", /* name */
538 FALSE, /* partial_inplace */
539 0x00007fff, /* src_mask */
540 0x00007fff, /* dst_mask */
541 FALSE), /* pcrel_offset */
542
543 /* Small data area 15 bits offset. */
544 HOWTO (R_NDS32_SDA15S2, /* type */
545 2, /* rightshift */
546 2, /* size (0 = byte, 1 = short, 2 = long) */
547 15, /* bitsize */
548 FALSE, /* pc_relative */
549 0, /* bitpos */
550 complain_overflow_signed, /* complain_on_overflow */
551 nds32_elf_sda15_reloc, /* special_function */
552 "R_NDS32_SDA15S2", /* name */
553 FALSE, /* partial_inplace */
554 0x00007fff, /* src_mask */
555 0x00007fff, /* dst_mask */
556 FALSE), /* pcrel_offset */
557
558 /* Small data area 15 bits offset. */
559 HOWTO (R_NDS32_SDA15S1, /* type */
560 1, /* rightshift */
561 2, /* size (0 = byte, 1 = short, 2 = long) */
562 15, /* bitsize */
563 FALSE, /* pc_relative */
564 0, /* bitpos */
565 complain_overflow_signed, /* complain_on_overflow */
566 nds32_elf_sda15_reloc, /* special_function */
567 "R_NDS32_SDA15S1", /* name */
568 FALSE, /* partial_inplace */
569 0x00007fff, /* src_mask */
570 0x00007fff, /* dst_mask */
571 FALSE), /* pcrel_offset */
572
573 /* Small data area 15 bits offset. */
574 HOWTO (R_NDS32_SDA15S0, /* type */
575 0, /* rightshift */
576 2, /* size (0 = byte, 1 = short, 2 = long) */
577 15, /* bitsize */
578 FALSE, /* pc_relative */
579 0, /* bitpos */
580 complain_overflow_signed, /* complain_on_overflow */
581 nds32_elf_sda15_reloc, /* special_function */
582 "R_NDS32_SDA15S0", /* name */
583 FALSE, /* partial_inplace */
584 0x00007fff, /* src_mask */
585 0x00007fff, /* dst_mask */
586 FALSE), /* pcrel_offset */
587
588 /* GNU extension to record C++ vtable hierarchy */
589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
590 0, /* rightshift */
591 2, /* size (0 = byte, 1 = short, 2 = long) */
592 0, /* bitsize */
593 FALSE, /* pc_relative */
594 0, /* bitpos */
595 complain_overflow_dont,/* complain_on_overflow */
596 NULL, /* special_function */
597 "R_NDS32_GNU_VTINHERIT", /* name */
598 FALSE, /* partial_inplace */
599 0, /* src_mask */
600 0, /* dst_mask */
601 FALSE), /* pcrel_offset */
602
603 /* GNU extension to record C++ vtable member usage */
604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 0, /* bitsize */
608 FALSE, /* pc_relative */
609 0, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
612 "R_NDS32_GNU_VTENTRY", /* name */
613 FALSE, /* partial_inplace */
614 0, /* src_mask */
615 0, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 /* A 16 bit absolute relocation. */
619 HOWTO (R_NDS32_16_RELA, /* type */
620 0, /* rightshift */
621 1, /* size (0 = byte, 1 = short, 2 = long) */
622 16, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_bitfield, /* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_NDS32_16_RELA", /* name */
628 FALSE, /* partial_inplace */
629 0xffff, /* src_mask */
630 0xffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 /* A 32 bit absolute relocation. */
634 HOWTO (R_NDS32_32_RELA, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_bitfield, /* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_NDS32_32_RELA", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 /* A 20 bit address. */
649 HOWTO (R_NDS32_20_RELA, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 20, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_signed, /* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_NDS32_20_RELA", /* name */
658 FALSE, /* partial_inplace */
659 0xfffff, /* src_mask */
660 0xfffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
664 1, /* rightshift */
665 1, /* size (0 = byte, 1 = short, 2 = long) */
666 8, /* bitsize */
667 TRUE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed, /* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_NDS32_9_PCREL_RELA",/* name */
672 FALSE, /* partial_inplace */
673 0xff, /* src_mask */
674 0xff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 /* A relative 15 bit relocation, right shifted by 1. */
678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
679 1, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 14, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed, /* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_NDS32_15_PCREL_RELA", /* name */
687 FALSE, /* partial_inplace */
688 0x3fff, /* src_mask */
689 0x3fff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 /* A relative 17 bit relocation, right shifted by 1. */
693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
694 1, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 TRUE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_signed, /* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_NDS32_17_PCREL_RELA", /* name */
702 FALSE, /* partial_inplace */
703 0xffff, /* src_mask */
704 0xffff, /* dst_mask */
705 TRUE), /* pcrel_offset */
706
707 /* A relative 25 bit relocation, right shifted by 2. */
708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
709 1, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 24, /* bitsize */
712 TRUE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_signed, /* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_NDS32_25_PCREL_RELA", /* name */
717 FALSE, /* partial_inplace */
718 0xffffff, /* src_mask */
719 0xffffff, /* dst_mask */
720 TRUE), /* pcrel_offset */
721
722 /* High 20 bits of address when lower 16 is or'd in. */
723 HOWTO (R_NDS32_HI20_RELA, /* type */
724 12, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 20, /* bitsize */
727 FALSE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_NDS32_HI20_RELA", /* name */
732 FALSE, /* partial_inplace */
733 0x000fffff, /* src_mask */
734 0x000fffff, /* dst_mask */
735 FALSE), /* pcrel_offset */
736
737 /* Lower 12 bits of address. */
738 HOWTO (R_NDS32_LO12S3_RELA, /* type */
739 3, /* rightshift */
740 2, /* size (0 = byte, 1 = short, 2 = long) */
741 9, /* bitsize */
742 FALSE, /* pc_relative */
743 0, /* bitpos */
744 complain_overflow_dont,/* complain_on_overflow */
745 bfd_elf_generic_reloc, /* special_function */
746 "R_NDS32_LO12S3_RELA", /* name */
747 FALSE, /* partial_inplace */
748 0x000001ff, /* src_mask */
749 0x000001ff, /* dst_mask */
750 FALSE), /* pcrel_offset */
751
752 /* Lower 12 bits of address. */
753 HOWTO (R_NDS32_LO12S2_RELA, /* type */
754 2, /* rightshift */
755 2, /* size (0 = byte, 1 = short, 2 = long) */
756 10, /* bitsize */
757 FALSE, /* pc_relative */
758 0, /* bitpos */
759 complain_overflow_dont,/* complain_on_overflow */
760 bfd_elf_generic_reloc, /* special_function */
761 "R_NDS32_LO12S2_RELA", /* name */
762 FALSE, /* partial_inplace */
763 0x000003ff, /* src_mask */
764 0x000003ff, /* dst_mask */
765 FALSE), /* pcrel_offset */
766
767 /* Lower 12 bits of address. */
768 HOWTO (R_NDS32_LO12S1_RELA, /* type */
769 1, /* rightshift */
770 2, /* size (0 = byte, 1 = short, 2 = long) */
771 11, /* bitsize */
772 FALSE, /* pc_relative */
773 0, /* bitpos */
774 complain_overflow_dont,/* complain_on_overflow */
775 bfd_elf_generic_reloc, /* special_function */
776 "R_NDS32_LO12S1_RELA", /* name */
777 FALSE, /* partial_inplace */
778 0x000007ff, /* src_mask */
779 0x000007ff, /* dst_mask */
780 FALSE), /* pcrel_offset */
781
782 /* Lower 12 bits of address. */
783 HOWTO (R_NDS32_LO12S0_RELA, /* type */
784 0, /* rightshift */
785 2, /* size (0 = byte, 1 = short, 2 = long) */
786 12, /* bitsize */
787 FALSE, /* pc_relative */
788 0, /* bitpos */
789 complain_overflow_dont,/* complain_on_overflow */
790 bfd_elf_generic_reloc, /* special_function */
791 "R_NDS32_LO12S0_RELA", /* name */
792 FALSE, /* partial_inplace */
793 0x00000fff, /* src_mask */
794 0x00000fff, /* dst_mask */
795 FALSE), /* pcrel_offset */
796
797 /* Small data area 15 bits offset. */
798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
799 3, /* rightshift */
800 2, /* size (0 = byte, 1 = short, 2 = long) */
801 15, /* bitsize */
802 FALSE, /* pc_relative */
803 0, /* bitpos */
804 complain_overflow_signed, /* complain_on_overflow */
805 bfd_elf_generic_reloc, /* special_function */
806 "R_NDS32_SDA15S3_RELA",/* name */
807 FALSE, /* partial_inplace */
808 0x00007fff, /* src_mask */
809 0x00007fff, /* dst_mask */
810 FALSE), /* pcrel_offset */
811
812 /* Small data area 15 bits offset. */
813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
814 2, /* rightshift */
815 2, /* size (0 = byte, 1 = short, 2 = long) */
816 15, /* bitsize */
817 FALSE, /* pc_relative */
818 0, /* bitpos */
819 complain_overflow_signed, /* complain_on_overflow */
820 bfd_elf_generic_reloc, /* special_function */
821 "R_NDS32_SDA15S2_RELA",/* name */
822 FALSE, /* partial_inplace */
823 0x00007fff, /* src_mask */
824 0x00007fff, /* dst_mask */
825 FALSE), /* pcrel_offset */
826
827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 15, /* bitsize */
831 FALSE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_SDA15S1_RELA",/* name */
836 FALSE, /* partial_inplace */
837 0x00007fff, /* src_mask */
838 0x00007fff, /* dst_mask */
839 FALSE), /* pcrel_offset */
840
841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
842 0, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 15, /* bitsize */
845 FALSE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_signed, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 "R_NDS32_SDA15S0_RELA",/* name */
850 FALSE, /* partial_inplace */
851 0x00007fff, /* src_mask */
852 0x00007fff, /* dst_mask */
853 FALSE), /* pcrel_offset */
854
855 /* GNU extension to record C++ vtable hierarchy */
856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
857 0, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 0, /* bitsize */
860 FALSE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont,/* complain_on_overflow */
863 NULL, /* special_function */
864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
865 FALSE, /* partial_inplace */
866 0, /* src_mask */
867 0, /* dst_mask */
868 FALSE), /* pcrel_offset */
869
870 /* GNU extension to record C++ vtable member usage */
871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
872 0, /* rightshift */
873 2, /* size (0 = byte, 1 = short, 2 = long) */
874 0, /* bitsize */
875 FALSE, /* pc_relative */
876 0, /* bitpos */
877 complain_overflow_dont,/* complain_on_overflow */
878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
879 "R_NDS32_RELA_GNU_VTENTRY", /* name */
880 FALSE, /* partial_inplace */
881 0, /* src_mask */
882 0, /* dst_mask */
883 FALSE), /* pcrel_offset */
884
885 /* Like R_NDS32_20, but referring to the GOT table entry for
886 the symbol. */
887 HOWTO (R_NDS32_GOT20, /* type */
888 0, /* rightshift */
889 2, /* size (0 = byte, 1 = short, 2 = long) */
890 20, /* bitsize */
891 FALSE, /* pc_relative */
892 0, /* bitpos */
893 complain_overflow_signed, /* complain_on_overflow */
894 bfd_elf_generic_reloc, /* special_function */
895 "R_NDS32_GOT20", /* name */
896 FALSE, /* partial_inplace */
897 0xfffff, /* src_mask */
898 0xfffff, /* dst_mask */
899 FALSE), /* pcrel_offset */
900
901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
902 entry for the symbol. */
903 HOWTO (R_NDS32_25_PLTREL, /* type */
904 1, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 24, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_signed, /* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_NDS32_25_PLTREL", /* name */
912 FALSE, /* partial_inplace */
913 0xffffff, /* src_mask */
914 0xffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 /* This is used only by the dynamic linker. The symbol should exist
918 both in the object being run and in some shared library. The
919 dynamic linker copies the data addressed by the symbol from the
920 shared library into the object, because the object being
921 run has to have the data at some particular address. */
922 HOWTO (R_NDS32_COPY, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 FALSE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_bitfield, /* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_NDS32_COPY", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 FALSE), /* pcrel_offset */
935
936 /* Like R_NDS32_20, but used when setting global offset table
937 entries. */
938 HOWTO (R_NDS32_GLOB_DAT, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 FALSE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_bitfield, /* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_NDS32_GLOB_DAT", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 FALSE), /* pcrel_offset */
951
952 /* Marks a procedure linkage table entry for a symbol. */
953 HOWTO (R_NDS32_JMP_SLOT, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 32, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_bitfield, /* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_JMP_SLOT", /* name */
962 FALSE, /* partial_inplace */
963 0xffffffff, /* src_mask */
964 0xffffffff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* Used only by the dynamic linker. When the object is run, this
968 longword is set to the load address of the object, plus the
969 addend. */
970 HOWTO (R_NDS32_RELATIVE, /* type */
971 0, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 32, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_bitfield, /* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_RELATIVE", /* name */
979 FALSE, /* partial_inplace */
980 0xffffffff, /* src_mask */
981 0xffffffff, /* dst_mask */
982 FALSE), /* pcrel_offset */
983
984 HOWTO (R_NDS32_GOTOFF, /* type */
985 0, /* rightshift */
986 2, /* size (0 = byte, 1 = short, 2 = long) */
987 20, /* bitsize */
988 FALSE, /* pc_relative */
989 0, /* bitpos */
990 complain_overflow_signed, /* complain_on_overflow */
991 bfd_elf_generic_reloc, /* special_function */
992 "R_NDS32_GOTOFF", /* name */
993 FALSE, /* partial_inplace */
994 0xfffff, /* src_mask */
995 0xfffff, /* dst_mask */
996 FALSE), /* pcrel_offset */
997
998 /* An PC Relative 20-bit relocation used when setting PIC offset
999 table register. */
1000 HOWTO (R_NDS32_GOTPC20, /* type */
1001 0, /* rightshift */
1002 2, /* size (0 = byte, 1 = short, 2 = long) */
1003 20, /* bitsize */
1004 TRUE, /* pc_relative */
1005 0, /* bitpos */
1006 complain_overflow_signed, /* complain_on_overflow */
1007 bfd_elf_generic_reloc, /* special_function */
1008 "R_NDS32_GOTPC20", /* name */
1009 FALSE, /* partial_inplace */
1010 0xfffff, /* src_mask */
1011 0xfffff, /* dst_mask */
1012 TRUE), /* pcrel_offset */
1013
1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1015 the symbol. */
1016 HOWTO (R_NDS32_GOT_HI20, /* type */
1017 12, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 20, /* bitsize */
1020 FALSE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_NDS32_GOT_HI20", /* name */
1025 FALSE, /* partial_inplace */
1026 0x000fffff, /* src_mask */
1027 0x000fffff, /* dst_mask */
1028 FALSE), /* pcrel_offset */
1029 HOWTO (R_NDS32_GOT_LO12, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 12, /* bitsize */
1033 FALSE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_NDS32_GOT_LO12", /* name */
1038 FALSE, /* partial_inplace */
1039 0x00000fff, /* src_mask */
1040 0x00000fff, /* dst_mask */
1041 FALSE), /* pcrel_offset */
1042
1043 /* An PC Relative relocation used when setting PIC offset table register.
1044 Like R_NDS32_HI20, but referring to the GOT table entry for
1045 the symbol. */
1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1047 12, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 20, /* bitsize */
1050 FALSE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_NDS32_GOTPC_HI20", /* name */
1055 FALSE, /* partial_inplace */
1056 0x000fffff, /* src_mask */
1057 0x000fffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 12, /* bitsize */
1063 FALSE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont, /* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_NDS32_GOTPC_LO12", /* name */
1068 FALSE, /* partial_inplace */
1069 0x00000fff, /* src_mask */
1070 0x00000fff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1074 12, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 20, /* bitsize */
1077 FALSE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_NDS32_GOTOFF_HI20", /* name */
1082 FALSE, /* partial_inplace */
1083 0x000fffff, /* src_mask */
1084 0x000fffff, /* dst_mask */
1085 FALSE), /* pcrel_offset */
1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 12, /* bitsize */
1090 FALSE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_NDS32_GOTOFF_LO12", /* name */
1095 FALSE, /* partial_inplace */
1096 0x00000fff, /* src_mask */
1097 0x00000fff, /* dst_mask */
1098 FALSE), /* pcrel_offset */
1099
1100 /* Alignment hint for relaxable instruction. This is used with
1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1102 in order to make next label aligned on word boundary. */
1103 HOWTO (R_NDS32_INSN16, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 FALSE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 nds32_elf_ignore_reloc,/* special_function */
1111 "R_NDS32_INSN16", /* name */
1112 FALSE, /* partial_inplace */
1113 0x00000fff, /* src_mask */
1114 0x00000fff, /* dst_mask */
1115 FALSE), /* pcrel_offset */
1116
1117 /* Alignment hint for label. */
1118 HOWTO (R_NDS32_LABEL, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 FALSE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 nds32_elf_ignore_reloc,/* special_function */
1126 "R_NDS32_LABEL", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 FALSE), /* pcrel_offset */
1131
1132 /* Relax hint for unconditional call sequence */
1133 HOWTO (R_NDS32_LONGCALL1, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 FALSE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 nds32_elf_ignore_reloc,/* special_function */
1141 "R_NDS32_LONGCALL1", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 FALSE), /* pcrel_offset */
1146
1147 /* Relax hint for conditional call sequence. */
1148 HOWTO (R_NDS32_LONGCALL2, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 FALSE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 nds32_elf_ignore_reloc,/* special_function */
1156 "R_NDS32_LONGCALL2", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 FALSE), /* pcrel_offset */
1161
1162 /* Relax hint for conditional call sequence. */
1163 HOWTO (R_NDS32_LONGCALL3, /* type */
1164 0, /* rightshift */
1165 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 32, /* bitsize */
1167 FALSE, /* pc_relative */
1168 0, /* bitpos */
1169 complain_overflow_dont,/* complain_on_overflow */
1170 nds32_elf_ignore_reloc,/* special_function */
1171 "R_NDS32_LONGCALL3", /* name */
1172 FALSE, /* partial_inplace */
1173 0xffffffff, /* src_mask */
1174 0xffffffff, /* dst_mask */
1175 FALSE), /* pcrel_offset */
1176
1177 /* Relax hint for unconditional branch sequence. */
1178 HOWTO (R_NDS32_LONGJUMP1, /* type */
1179 0, /* rightshift */
1180 2, /* size (0 = byte, 1 = short, 2 = long) */
1181 32, /* bitsize */
1182 FALSE, /* pc_relative */
1183 0, /* bitpos */
1184 complain_overflow_dont,/* complain_on_overflow */
1185 nds32_elf_ignore_reloc,/* special_function */
1186 "R_NDS32_LONGJUMP1", /* name */
1187 FALSE, /* partial_inplace */
1188 0xffffffff, /* src_mask */
1189 0xffffffff, /* dst_mask */
1190 FALSE), /* pcrel_offset */
1191
1192 /* Relax hint for conditional branch sequence. */
1193 HOWTO (R_NDS32_LONGJUMP2, /* type */
1194 0, /* rightshift */
1195 2, /* size (0 = byte, 1 = short, 2 = long) */
1196 32, /* bitsize */
1197 FALSE, /* pc_relative */
1198 0, /* bitpos */
1199 complain_overflow_dont,/* complain_on_overflow */
1200 nds32_elf_ignore_reloc,/* special_function */
1201 "R_NDS32_LONGJUMP2", /* name */
1202 FALSE, /* partial_inplace */
1203 0xffffffff, /* src_mask */
1204 0xffffffff, /* dst_mask */
1205 FALSE), /* pcrel_offset */
1206
1207 /* Relax hint for conditional branch sequence. */
1208 HOWTO (R_NDS32_LONGJUMP3, /* type */
1209 0, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 32, /* bitsize */
1212 FALSE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont,/* complain_on_overflow */
1215 nds32_elf_ignore_reloc,/* special_function */
1216 "R_NDS32_LONGJUMP3", /* name */
1217 FALSE, /* partial_inplace */
1218 0xffffffff, /* src_mask */
1219 0xffffffff, /* dst_mask */
1220 FALSE), /* pcrel_offset */
1221
1222 /* Relax hint for load/store sequence. */
1223 HOWTO (R_NDS32_LOADSTORE, /* type */
1224 0, /* rightshift */
1225 2, /* size (0 = byte, 1 = short, 2 = long) */
1226 32, /* bitsize */
1227 FALSE, /* pc_relative */
1228 0, /* bitpos */
1229 complain_overflow_dont,/* complain_on_overflow */
1230 nds32_elf_ignore_reloc,/* special_function */
1231 "R_NDS32_LOADSTORE", /* name */
1232 FALSE, /* partial_inplace */
1233 0xffffffff, /* src_mask */
1234 0xffffffff, /* dst_mask */
1235 FALSE), /* pcrel_offset */
1236
1237 /* Relax hint for load/store sequence. */
1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1239 0, /* rightshift */
1240 1, /* size (0 = byte, 1 = short, 2 = long) */
1241 16, /* bitsize */
1242 FALSE, /* pc_relative */
1243 0, /* bitpos */
1244 complain_overflow_dont,/* complain_on_overflow */
1245 nds32_elf_ignore_reloc,/* special_function */
1246 "R_NDS32_9_FIXED_RELA",/* name */
1247 FALSE, /* partial_inplace */
1248 0x000000ff, /* src_mask */
1249 0x000000ff, /* dst_mask */
1250 FALSE), /* pcrel_offset */
1251
1252 /* Relax hint for load/store sequence. */
1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 FALSE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 nds32_elf_ignore_reloc,/* special_function */
1261 "R_NDS32_15_FIXED_RELA", /* name */
1262 FALSE, /* partial_inplace */
1263 0x00003fff, /* src_mask */
1264 0x00003fff, /* dst_mask */
1265 FALSE), /* pcrel_offset */
1266
1267 /* Relax hint for load/store sequence. */
1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1269 0, /* rightshift */
1270 2, /* size (0 = byte, 1 = short, 2 = long) */
1271 32, /* bitsize */
1272 FALSE, /* pc_relative */
1273 0, /* bitpos */
1274 complain_overflow_dont,/* complain_on_overflow */
1275 nds32_elf_ignore_reloc,/* special_function */
1276 "R_NDS32_17_FIXED_RELA", /* name */
1277 FALSE, /* partial_inplace */
1278 0x0000ffff, /* src_mask */
1279 0x0000ffff, /* dst_mask */
1280 FALSE), /* pcrel_offset */
1281
1282 /* Relax hint for load/store sequence. */
1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 32, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_dont,/* complain_on_overflow */
1290 nds32_elf_ignore_reloc,/* special_function */
1291 "R_NDS32_25_FIXED_RELA", /* name */
1292 FALSE, /* partial_inplace */
1293 0x00ffffff, /* src_mask */
1294 0x00ffffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 /* High 20 bits of PLT symbol offset relative to PC. */
1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1299 12, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 20, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_NDS32_PLTREL_HI20", /* name */
1307 FALSE, /* partial_inplace */
1308 0x000fffff, /* src_mask */
1309 0x000fffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 /* Low 12 bits of PLT symbol offset relative to PC. */
1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 12, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_NDS32_PLTREL_LO12", /* name */
1322 FALSE, /* partial_inplace */
1323 0x00000fff, /* src_mask */
1324 0x00000fff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1329 12, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 20, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_dont,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_NDS32_PLT_GOTREL_HI20", /* name */
1337 FALSE, /* partial_inplace */
1338 0x000fffff, /* src_mask */
1339 0x000fffff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 12, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_NDS32_PLT_GOTREL_LO12", /* name */
1352 FALSE, /* partial_inplace */
1353 0x00000fff, /* src_mask */
1354 0x00000fff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 /* Small data area 12 bits offset. */
1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1359 2, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 12, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_signed, /* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_NDS32_SDA12S2_DP_RELA", /* name */
1367 FALSE, /* partial_inplace */
1368 0x00000fff, /* src_mask */
1369 0x00000fff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 /* Small data area 12 bits offset. */
1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1374 2, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 12, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_signed, /* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_NDS32_SDA12S2_SP_RELA", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00000fff, /* src_mask */
1384 0x00000fff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386 /* Lower 12 bits of address. */
1387
1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1389 2, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 10, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_NDS32_LO12S2_DP_RELA", /* name */
1397 FALSE, /* partial_inplace */
1398 0x000003ff, /* src_mask */
1399 0x000003ff, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 /* Lower 12 bits of address. */
1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1404 2, /* rightshift */
1405 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 10, /* bitsize */
1407 FALSE, /* pc_relative */
1408 0, /* bitpos */
1409 complain_overflow_dont,/* complain_on_overflow */
1410 bfd_elf_generic_reloc, /* special_function */
1411 "R_NDS32_LO12S2_SP_RELA", /* name */
1412 FALSE, /* partial_inplace */
1413 0x000003ff, /* src_mask */
1414 0x000003ff, /* dst_mask */
1415 FALSE), /* pcrel_offset */
1416 /* Lower 12 bits of address. Special identity for or case. */
1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1418 0, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont,/* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 "R_NDS32_LO12S0_ORI_RELA", /* name */
1426 FALSE, /* partial_inplace */
1427 0x00000fff, /* src_mask */
1428 0x00000fff, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430 /* Small data area 19 bits offset. */
1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1432 3, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 16, /* bitsize */
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
1437 complain_overflow_signed, /* complain_on_overflow */
1438 bfd_elf_generic_reloc, /* special_function */
1439 "R_NDS32_SDA16S3_RELA",/* name */
1440 FALSE, /* partial_inplace */
1441 0x0000ffff, /* src_mask */
1442 0x0000ffff, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* Small data area 15 bits offset. */
1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1447 2, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 17, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_signed, /* complain_on_overflow */
1453 bfd_elf_generic_reloc, /* special_function */
1454 "R_NDS32_SDA17S2_RELA",/* name */
1455 FALSE, /* partial_inplace */
1456 0x0001ffff, /* src_mask */
1457 0x0001ffff, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1461 1, /* rightshift */
1462 2, /* size (0 = byte, 1 = short, 2 = long) */
1463 18, /* bitsize */
1464 FALSE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_NDS32_SDA18S1_RELA",/* name */
1469 FALSE, /* partial_inplace */
1470 0x0003ffff, /* src_mask */
1471 0x0003ffff, /* dst_mask */
1472 FALSE), /* pcrel_offset */
1473
1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1475 0, /* rightshift */
1476 2, /* size (0 = byte, 1 = short, 2 = long) */
1477 19, /* bitsize */
1478 FALSE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_NDS32_SDA19S0_RELA",/* name */
1483 FALSE, /* partial_inplace */
1484 0x0007ffff, /* src_mask */
1485 0x0007ffff, /* dst_mask */
1486 FALSE), /* pcrel_offset */
1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1488 0, /* rightshift */
1489 0, /* size (0 = byte, 1 = short, 2 = long) */
1490 8, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont,/* complain_on_overflow */
1494 nds32_elf_ignore_reloc,/* special_function */
1495 "R_NDS32_DWARF2_OP1_RELA", /* name */
1496 FALSE, /* partial_inplace */
1497 0xff, /* src_mask */
1498 0xff, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1501 0, /* rightshift */
1502 1, /* size (0 = byte, 1 = short, 2 = long) */
1503 16, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont,/* complain_on_overflow */
1507 nds32_elf_ignore_reloc,/* special_function */
1508 "R_NDS32_DWARF2_OP2_RELA", /* name */
1509 FALSE, /* partial_inplace */
1510 0xffff, /* src_mask */
1511 0xffff, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1514 0, /* rightshift */
1515 2, /* size (0 = byte, 1 = short, 2 = long) */
1516 32, /* bitsize */
1517 FALSE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_dont,/* complain_on_overflow */
1520 nds32_elf_ignore_reloc,/* special_function */
1521 "R_NDS32_DWARF2_LEB_RELA", /* name */
1522 FALSE, /* partial_inplace */
1523 0xffffffff, /* src_mask */
1524 0xffffffff, /* dst_mask */
1525 FALSE), /* pcrel_offset */
1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1527 0, /* rightshift */
1528 1, /* size (0 = byte, 1 = short, 2 = long) */
1529 16, /* bitsize */
1530 FALSE, /* pc_relative */
1531 0, /* bitpos */
1532 complain_overflow_dont,/* complain_on_overflow */
1533 nds32_elf_ignore_reloc,/* special_function */
1534 "R_NDS32_UPDATE_TA_RELA", /* name */
1535 FALSE, /* partial_inplace */
1536 0xffff, /* src_mask */
1537 0xffff, /* dst_mask */
1538 FALSE), /* pcrel_offset */
1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1540 entry for the symbol. */
1541 HOWTO (R_NDS32_9_PLTREL, /* type */
1542 1, /* rightshift */
1543 1, /* size (0 = byte, 1 = short, 2 = long) */
1544 8, /* bitsize */
1545 TRUE, /* pc_relative */
1546 0, /* bitpos */
1547 complain_overflow_signed, /* complain_on_overflow */
1548 bfd_elf_generic_reloc, /* special_function */
1549 "R_NDS32_9_PLTREL", /* name */
1550 FALSE, /* partial_inplace */
1551 0xff, /* src_mask */
1552 0xff, /* dst_mask */
1553 TRUE), /* pcrel_offset */
1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1556 0, /* rightshift */
1557 2, /* size (0 = byte, 1 = short, 2 = long) */
1558 20, /* bitsize */
1559 FALSE, /* pc_relative */
1560 0, /* bitpos */
1561 complain_overflow_dont,/* complain_on_overflow */
1562 bfd_elf_generic_reloc, /* special_function */
1563 "R_NDS32_PLT_GOTREL_LO20", /* name */
1564 FALSE, /* partial_inplace */
1565 0x000fffff, /* src_mask */
1566 0x000fffff, /* dst_mask */
1567 FALSE), /* pcrel_offset */
1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 15, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont,/* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 "R_NDS32_PLT_GOTREL_LO15", /* name */
1578 FALSE, /* partial_inplace */
1579 0x00007fff, /* src_mask */
1580 0x00007fff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1584 0, /* rightshift */
1585 2, /* size (0 = byte, 1 = short, 2 = long) */
1586 19, /* bitsize */
1587 FALSE, /* pc_relative */
1588 0, /* bitpos */
1589 complain_overflow_dont,/* complain_on_overflow */
1590 bfd_elf_generic_reloc, /* special_function */
1591 "R_NDS32_PLT_GOTREL_LO19", /* name */
1592 FALSE, /* partial_inplace */
1593 0x0007ffff, /* src_mask */
1594 0x0007ffff, /* dst_mask */
1595 FALSE), /* pcrel_offset */
1596 HOWTO (R_NDS32_GOT_LO15, /* type */
1597 0, /* rightshift */
1598 2, /* size (0 = byte, 1 = short, 2 = long) */
1599 15, /* bitsize */
1600 FALSE, /* pc_relative */
1601 0, /* bitpos */
1602 complain_overflow_dont,/* complain_on_overflow */
1603 bfd_elf_generic_reloc, /* special_function */
1604 "R_NDS32_GOT_LO15", /* name */
1605 FALSE, /* partial_inplace */
1606 0x00007fff, /* src_mask */
1607 0x00007fff, /* dst_mask */
1608 FALSE), /* pcrel_offset */
1609 HOWTO (R_NDS32_GOT_LO19, /* type */
1610 0, /* rightshift */
1611 2, /* size (0 = byte, 1 = short, 2 = long) */
1612 19, /* bitsize */
1613 FALSE, /* pc_relative */
1614 0, /* bitpos */
1615 complain_overflow_dont,/* complain_on_overflow */
1616 bfd_elf_generic_reloc, /* special_function */
1617 "R_NDS32_GOT_LO19", /* name */
1618 FALSE, /* partial_inplace */
1619 0x0007ffff, /* src_mask */
1620 0x0007ffff, /* dst_mask */
1621 FALSE), /* pcrel_offset */
1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1623 0, /* rightshift */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 15, /* bitsize */
1626 FALSE, /* pc_relative */
1627 0, /* bitpos */
1628 complain_overflow_dont,/* complain_on_overflow */
1629 bfd_elf_generic_reloc, /* special_function */
1630 "R_NDS32_GOTOFF_LO15", /* name */
1631 FALSE, /* partial_inplace */
1632 0x00007fff, /* src_mask */
1633 0x00007fff, /* dst_mask */
1634 FALSE), /* pcrel_offset */
1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1636 0, /* rightshift */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 19, /* bitsize */
1639 FALSE, /* pc_relative */
1640 0, /* bitpos */
1641 complain_overflow_dont,/* complain_on_overflow */
1642 bfd_elf_generic_reloc, /* special_function */
1643 "R_NDS32_GOTOFF_LO19", /* name */
1644 FALSE, /* partial_inplace */
1645 0x0007ffff, /* src_mask */
1646 0x0007ffff, /* dst_mask */
1647 FALSE), /* pcrel_offset */
1648 /* GOT 15 bits offset. */
1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1650 2, /* rightshift */
1651 2, /* size (0 = byte, 1 = short, 2 = long) */
1652 15, /* bitsize */
1653 FALSE, /* pc_relative */
1654 0, /* bitpos */
1655 complain_overflow_signed, /* complain_on_overflow */
1656 bfd_elf_generic_reloc, /* special_function */
1657 "R_NDS32_GOT15S2_RELA",/* name */
1658 FALSE, /* partial_inplace */
1659 0x00007fff, /* src_mask */
1660 0x00007fff, /* dst_mask */
1661 FALSE), /* pcrel_offset */
1662 /* GOT 17 bits offset. */
1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1664 2, /* rightshift */
1665 2, /* size (0 = byte, 1 = short, 2 = long) */
1666 17, /* bitsize */
1667 FALSE, /* pc_relative */
1668 0, /* bitpos */
1669 complain_overflow_signed, /* complain_on_overflow */
1670 bfd_elf_generic_reloc, /* special_function */
1671 "R_NDS32_GOT17S2_RELA",/* name */
1672 FALSE, /* partial_inplace */
1673 0x0001ffff, /* src_mask */
1674 0x0001ffff, /* dst_mask */
1675 FALSE), /* pcrel_offset */
1676 /* A 5 bit address. */
1677 HOWTO (R_NDS32_5_RELA, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 5, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_signed, /* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_NDS32_5_RELA", /* name */
1686 FALSE, /* partial_inplace */
1687 0x1f, /* src_mask */
1688 0x1f, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1691 1, /* rightshift */
1692 1, /* size (0 = byte, 1 = short, 2 = long) */
1693 9, /* bitsize */
1694 TRUE, /* pc_relative */
1695 0, /* bitpos */
1696 complain_overflow_unsigned, /* complain_on_overflow */
1697 bfd_elf_generic_reloc, /* special_function */
1698 "R_NDS32_10_UPCREL_RELA", /* name */
1699 FALSE, /* partial_inplace */
1700 0x1ff, /* src_mask */
1701 0x1ff, /* dst_mask */
1702 TRUE), /* pcrel_offset */
1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1704 2, /* rightshift */
1705 1, /* size (0 = byte, 1 = short, 2 = long) */
1706 7, /* bitsize */
1707 FALSE, /* pc_relative */
1708 0, /* bitpos */
1709 complain_overflow_unsigned, /* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_SDA_FP7U2_RELA", /* name */
1712 FALSE, /* partial_inplace */
1713 0x0000007f, /* src_mask */
1714 0x0000007f, /* dst_mask */
1715 FALSE), /* pcrel_offset */
1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1717 1, /* rightshift */
1718 2, /* size (0 = byte, 1 = short, 2 = long) */
1719 8, /* bitsize */
1720 TRUE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_signed, /* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1725 FALSE, /* partial_inplace */
1726 0xff, /* src_mask */
1727 0xff, /* dst_mask */
1728 TRUE), /* pcrel_offset */
1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1730 1, /* rightshift */
1731 2, /* size (0 = byte, 1 = short, 2 = long) */
1732 24, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_NDS32_25_ABS_RELA", /* name */
1738 FALSE, /* partial_inplace */
1739 0xffffff, /* src_mask */
1740 0xffffff, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1745 1, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 16, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_NDS32_17IFC_PCREL_RELA", /* name */
1753 FALSE, /* partial_inplace */
1754 0xffff, /* src_mask */
1755 0xffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1760 1, /* rightshift */
1761 1, /* size (0 = byte, 1 = short, 2 = long) */
1762 9, /* bitsize */
1763 TRUE, /* pc_relative */
1764 0, /* bitpos */
1765 complain_overflow_unsigned, /* complain_on_overflow */
1766 bfd_elf_generic_reloc, /* special_function */
1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1768 FALSE, /* partial_inplace */
1769 0x1ff, /* src_mask */
1770 0x1ff, /* dst_mask */
1771 TRUE), /* pcrel_offset */
1772
1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1775 12, /* rightshift */
1776 2, /* size (0 = byte, 1 = short, 2 = long) */
1777 20, /* bitsize */
1778 FALSE, /* pc_relative */
1779 0, /* bitpos */
1780 complain_overflow_dont, /* complain_on_overflow */
1781 bfd_elf_generic_reloc, /* special_function */
1782 "R_NDS32_TLS_LE_HI20", /* name */
1783 FALSE, /* partial_inplace */
1784 0x000fffff, /* src_mask */
1785 0x000fffff, /* dst_mask */
1786 FALSE), /* pcrel_offset */
1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1788 0, /* rightshift */
1789 2, /* size (0 = byte, 1 = short, 2 = long) */
1790 12, /* bitsize */
1791 FALSE, /* pc_relative */
1792 0, /* bitpos */
1793 complain_overflow_dont, /* complain_on_overflow */
1794 bfd_elf_generic_reloc, /* special_function */
1795 "R_NDS32_TLS_LE_LO12", /* name */
1796 FALSE, /* partial_inplace */
1797 0x00000fff, /* src_mask */
1798 0x00000fff, /* dst_mask */
1799 FALSE), /* pcrel_offset */
1800
1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1803 12, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 20, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_dont, /* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_NDS32_TLS_IE_HI20", /* name */
1811 FALSE, /* partial_inplace */
1812 0x000fffff, /* src_mask */
1813 0x000fffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1816 2, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 10, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_dont, /* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_NDS32_TLS_IE_LO12S2", /* name */
1824 FALSE, /* partial_inplace */
1825 0x000003ff, /* src_mask */
1826 0x000003ff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 /* Mark a TLS IE entry in GOT. */
1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield, /* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_NDS32_TLS_TPOFF", /* name */
1838 FALSE, /* partial_inplace */
1839 0xffffffff, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 /* A 20 bit address. */
1843 HOWTO (R_NDS32_TLS_LE_20, /* type */
1844 0, /* rightshift */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 20, /* bitsize */
1847 FALSE, /* pc_relative */
1848 0, /* bitpos */
1849 complain_overflow_signed, /* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_NDS32_TLS_LE_20", /* name */
1852 FALSE, /* partial_inplace */
1853 0xfffff, /* src_mask */
1854 0xfffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1857 0, /* rightshift */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1859 15, /* bitsize */
1860 FALSE, /* pc_relative */
1861 0, /* bitpos */
1862 complain_overflow_signed, /* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_NDS32_TLS_LE_15S0", /* name */
1865 FALSE, /* partial_inplace */
1866 0x7fff, /* src_mask */
1867 0x7fff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1870 1, /* rightshift */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1872 15, /* bitsize */
1873 FALSE, /* pc_relative */
1874 0, /* bitpos */
1875 complain_overflow_signed, /* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_NDS32_TLS_LE_15S1", /* name */
1878 FALSE, /* partial_inplace */
1879 0x7fff, /* src_mask */
1880 0x7fff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1883 2, /* rightshift */
1884 2, /* size (0 = byte, 1 = short, 2 = long) */
1885 15, /* bitsize */
1886 FALSE, /* pc_relative */
1887 0, /* bitpos */
1888 complain_overflow_signed, /* complain_on_overflow */
1889 bfd_elf_generic_reloc, /* special_function */
1890 "R_NDS32_TLS_LE_15S2", /* name */
1891 FALSE, /* partial_inplace */
1892 0x7fff, /* src_mask */
1893 0x7fff, /* dst_mask */
1894 FALSE), /* pcrel_offset */
1895
1896 /* Relax hint for unconditional call sequence */
1897 HOWTO (R_NDS32_LONGCALL4, /* type */
1898 0, /* rightshift */
1899 2, /* size (0 = byte, 1 = short, 2 = long) */
1900 32, /* bitsize */
1901 FALSE, /* pc_relative */
1902 0, /* bitpos */
1903 complain_overflow_dont, /* complain_on_overflow */
1904 nds32_elf_ignore_reloc, /* special_function */
1905 "R_NDS32_LONGCALL4", /* name */
1906 FALSE, /* partial_inplace */
1907 0xffffffff, /* src_mask */
1908 0xffffffff, /* dst_mask */
1909 FALSE), /* pcrel_offset */
1910
1911 /* Relax hint for conditional call sequence. */
1912 HOWTO (R_NDS32_LONGCALL5, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont, /* complain_on_overflow */
1919 nds32_elf_ignore_reloc, /* special_function */
1920 "R_NDS32_LONGCALL5", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925
1926 /* Relax hint for conditional call sequence. */
1927 HOWTO (R_NDS32_LONGCALL6, /* type */
1928 0, /* rightshift */
1929 2, /* size (0 = byte, 1 = short, 2 = long) */
1930 32, /* bitsize */
1931 FALSE, /* pc_relative */
1932 0, /* bitpos */
1933 complain_overflow_dont, /* complain_on_overflow */
1934 nds32_elf_ignore_reloc, /* special_function */
1935 "R_NDS32_LONGCALL6", /* name */
1936 FALSE, /* partial_inplace */
1937 0xffffffff, /* src_mask */
1938 0xffffffff, /* dst_mask */
1939 FALSE), /* pcrel_offset */
1940
1941 /* Relax hint for unconditional branch sequence. */
1942 HOWTO (R_NDS32_LONGJUMP4, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont, /* complain_on_overflow */
1949 nds32_elf_ignore_reloc, /* special_function */
1950 "R_NDS32_LONGJUMP4", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955
1956 /* Relax hint for conditional branch sequence. */
1957 HOWTO (R_NDS32_LONGJUMP5, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 32, /* bitsize */
1961 FALSE, /* pc_relative */
1962 0, /* bitpos */
1963 complain_overflow_dont, /* complain_on_overflow */
1964 nds32_elf_ignore_reloc, /* special_function */
1965 "R_NDS32_LONGJUMP5", /* name */
1966 FALSE, /* partial_inplace */
1967 0xffffffff, /* src_mask */
1968 0xffffffff, /* dst_mask */
1969 FALSE), /* pcrel_offset */
1970
1971 /* Relax hint for conditional branch sequence. */
1972 HOWTO (R_NDS32_LONGJUMP6, /* type */
1973 0, /* rightshift */
1974 2, /* size (0 = byte, 1 = short, 2 = long) */
1975 32, /* bitsize */
1976 FALSE, /* pc_relative */
1977 0, /* bitpos */
1978 complain_overflow_dont, /* complain_on_overflow */
1979 nds32_elf_ignore_reloc, /* special_function */
1980 "R_NDS32_LONGJUMP6", /* name */
1981 FALSE, /* partial_inplace */
1982 0xffffffff, /* src_mask */
1983 0xffffffff, /* dst_mask */
1984 FALSE), /* pcrel_offset */
1985
1986 /* Relax hint for conditional branch sequence. */
1987 HOWTO (R_NDS32_LONGJUMP7, /* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 32, /* bitsize */
1991 FALSE, /* pc_relative */
1992 0, /* bitpos */
1993 complain_overflow_dont, /* complain_on_overflow */
1994 nds32_elf_ignore_reloc, /* special_function */
1995 "R_NDS32_LONGJUMP7", /* name */
1996 FALSE, /* partial_inplace */
1997 0xffffffff, /* src_mask */
1998 0xffffffff, /* dst_mask */
1999 FALSE), /* pcrel_offset */
2000 };
2001
2002 /* Relocations used for relaxation. */
2003 static reloc_howto_type nds32_elf_relax_howto_table[] =
2004 {
2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2006 0, /* rightshift */
2007 2, /* size (0 = byte, 1 = short, 2 = long) */
2008 32, /* bitsize */
2009 FALSE, /* pc_relative */
2010 0, /* bitpos */
2011 complain_overflow_dont,/* complain_on_overflow */
2012 nds32_elf_ignore_reloc,/* special_function */
2013 "R_NDS32_RELAX_ENTRY", /* name */
2014 FALSE, /* partial_inplace */
2015 0xffffffff, /* src_mask */
2016 0xffffffff, /* dst_mask */
2017 FALSE), /* pcrel_offset */
2018 HOWTO (R_NDS32_GOT_SUFF, /* type */
2019 0, /* rightshift */
2020 2, /* size (0 = byte, 1 = short, 2 = long) */
2021 32, /* bitsize */
2022 FALSE, /* pc_relative */
2023 0, /* bitpos */
2024 complain_overflow_dont,/* complain_on_overflow */
2025 nds32_elf_ignore_reloc,/* special_function */
2026 "R_NDS32_GOT_SUFF", /* name */
2027 FALSE, /* partial_inplace */
2028 0xffffffff, /* src_mask */
2029 0xffffffff, /* dst_mask */
2030 FALSE), /* pcrel_offset */
2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2032 0, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 32, /* bitsize */
2035 FALSE, /* pc_relative */
2036 0, /* bitpos */
2037 complain_overflow_bitfield, /* complain_on_overflow */
2038 nds32_elf_ignore_reloc,/* special_function */
2039 "R_NDS32_GOTOFF_SUFF", /* name */
2040 FALSE, /* partial_inplace */
2041 0xffffffff, /* src_mask */
2042 0xffffffff, /* dst_mask */
2043 FALSE), /* pcrel_offset */
2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2045 0, /* rightshift */
2046 2, /* size (0 = byte, 1 = short, 2 = long) */
2047 32, /* bitsize */
2048 FALSE, /* pc_relative */
2049 0, /* bitpos */
2050 complain_overflow_dont,/* complain_on_overflow */
2051 nds32_elf_ignore_reloc,/* special_function */
2052 "R_NDS32_PLT_GOT_SUFF",/* name */
2053 FALSE, /* partial_inplace */
2054 0xffffffff, /* src_mask */
2055 0xffffffff, /* dst_mask */
2056 FALSE), /* pcrel_offset */
2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2058 0, /* rightshift */
2059 2, /* size (0 = byte, 1 = short, 2 = long) */
2060 32, /* bitsize */
2061 FALSE, /* pc_relative */
2062 0, /* bitpos */
2063 complain_overflow_dont,/* complain_on_overflow */
2064 nds32_elf_ignore_reloc,/* special_function */
2065 "R_NDS32_MULCALL_SUFF",/* name */
2066 FALSE, /* partial_inplace */
2067 0xffffffff, /* src_mask */
2068 0xffffffff, /* dst_mask */
2069 FALSE), /* pcrel_offset */
2070 HOWTO (R_NDS32_PTR, /* type */
2071 0, /* rightshift */
2072 2, /* size (0 = byte, 1 = short, 2 = long) */
2073 32, /* bitsize */
2074 FALSE, /* pc_relative */
2075 0, /* bitpos */
2076 complain_overflow_dont,/* complain_on_overflow */
2077 nds32_elf_ignore_reloc,/* special_function */
2078 "R_NDS32_PTR", /* name */
2079 FALSE, /* partial_inplace */
2080 0xffffffff, /* src_mask */
2081 0xffffffff, /* dst_mask */
2082 FALSE), /* pcrel_offset */
2083 HOWTO (R_NDS32_PTR_COUNT, /* type */
2084 0, /* rightshift */
2085 2, /* size (0 = byte, 1 = short, 2 = long) */
2086 32, /* bitsize */
2087 FALSE, /* pc_relative */
2088 0, /* bitpos */
2089 complain_overflow_dont,/* complain_on_overflow */
2090 nds32_elf_ignore_reloc,/* special_function */
2091 "R_NDS32_PTR_COUNT", /* name */
2092 FALSE, /* partial_inplace */
2093 0xffffffff, /* src_mask */
2094 0xffffffff, /* dst_mask */
2095 FALSE), /* pcrel_offset */
2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_PTR_RESOLVED",/* name */
2105 FALSE, /* partial_inplace */
2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
2108 FALSE), /* pcrel_offset */
2109 HOWTO (R_NDS32_PLTBLOCK, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
2113 FALSE, /* pc_relative */
2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_PLTBLOCK", /* name */
2118 FALSE, /* partial_inplace */
2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
2121 FALSE), /* pcrel_offset */
2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
2126 FALSE, /* pc_relative */
2127 0, /* bitpos */
2128 complain_overflow_dont,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2131 FALSE, /* partial_inplace */
2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
2134 FALSE), /* pcrel_offset */
2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
2139 FALSE, /* pc_relative */
2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_RELAX_REGION_END", /* name */
2144 FALSE, /* partial_inplace */
2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
2147 FALSE), /* pcrel_offset */
2148 HOWTO (R_NDS32_MINUEND, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
2152 FALSE, /* pc_relative */
2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MINUEND", /* name */
2157 FALSE, /* partial_inplace */
2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
2160 FALSE), /* pcrel_offset */
2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
2165 FALSE, /* pc_relative */
2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_SUBTRAHEND", /* name */
2170 FALSE, /* partial_inplace */
2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
2173 FALSE), /* pcrel_offset */
2174 HOWTO (R_NDS32_DIFF8, /* type */
2175 0, /* rightshift */
2176 0, /* size (0 = byte, 1 = short, 2 = long) */
2177 8, /* bitsize */
2178 FALSE, /* pc_relative */
2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_DIFF8", /* name */
2183 FALSE, /* partial_inplace */
2184 0x000000ff, /* src_mask */
2185 0x000000ff, /* dst_mask */
2186 FALSE), /* pcrel_offset */
2187 HOWTO (R_NDS32_DIFF16, /* type */
2188 0, /* rightshift */
2189 1, /* size (0 = byte, 1 = short, 2 = long) */
2190 16, /* bitsize */
2191 FALSE, /* pc_relative */
2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_DIFF16", /* name */
2196 FALSE, /* partial_inplace */
2197 0x0000ffff, /* src_mask */
2198 0x0000ffff, /* dst_mask */
2199 FALSE), /* pcrel_offset */
2200 HOWTO (R_NDS32_DIFF32, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
2204 FALSE, /* pc_relative */
2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_DIFF32", /* name */
2209 FALSE, /* partial_inplace */
2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
2212 FALSE), /* pcrel_offset */
2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2214 0, /* rightshift */
2215 0, /* size (0 = byte, 1 = short, 2 = long) */
2216 0, /* bitsize */
2217 FALSE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_DIFF_ULEB128",/* name */
2222 FALSE, /* partial_inplace */
2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
2225 FALSE), /* pcrel_offset */
2226 HOWTO (R_NDS32_DATA, /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_DATA", /* name */
2235 FALSE, /* partial_inplace */
2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239 HOWTO (R_NDS32_TRAN, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
2243 FALSE, /* pc_relative */
2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_TRAN", /* name */
2248 FALSE, /* partial_inplace */
2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
2251 FALSE), /* pcrel_offset */
2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
2256 FALSE, /* pc_relative */
2257 0, /* bitpos */
2258 complain_overflow_dont, /* complain_on_overflow */
2259 nds32_elf_ignore_reloc, /* special_function */
2260 "R_NDS32_TLS_LE_ADD", /* name */
2261 FALSE, /* partial_inplace */
2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
2264 FALSE), /* pcrel_offset */
2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2266 0, /* rightshift */
2267 2, /* size (0 = byte, 1 = short, 2 = long) */
2268 32, /* bitsize */
2269 FALSE, /* pc_relative */
2270 0, /* bitpos */
2271 complain_overflow_dont, /* complain_on_overflow */
2272 nds32_elf_ignore_reloc, /* special_function */
2273 "R_NDS32_TLS_LE_LS", /* name */
2274 FALSE, /* partial_inplace */
2275 0xffffffff, /* src_mask */
2276 0xffffffff, /* dst_mask */
2277 FALSE), /* pcrel_offset */
2278 HOWTO (R_NDS32_EMPTY, /* type */
2279 0, /* rightshift */
2280 2, /* size (0 = byte, 1 = short, 2 = long) */
2281 32, /* bitsize */
2282 FALSE, /* pc_relative */
2283 0, /* bitpos */
2284 complain_overflow_dont, /* complain_on_overflow */
2285 nds32_elf_ignore_reloc, /* special_function */
2286 "R_NDS32_EMPTY", /* name */
2287 FALSE, /* partial_inplace */
2288 0xffffffff, /* src_mask */
2289 0xffffffff, /* dst_mask */
2290 FALSE), /* pcrel_offset */
2291 };
2292
2293 \f
2294 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
2295 This prototype is the same as qsort (). */
2296
2297 void
2298 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2299 int (*compar) (const void *lhs, const void *rhs))
2300 {
2301 char *ptr = (char *) base;
2302 int i, j;
2303 char *tmp = xmalloc (size);
2304
2305 /* If i is less than j, i is inserted before j.
2306
2307 |---- j ----- i --------------|
2308 \ / \ /
2309 sorted unsorted
2310 */
2311
2312 for (i = 1; i < (int) nmemb; i++)
2313 {
2314 for (j = (i - 1); j >= 0; j--)
2315 if (compar (ptr + i * size, ptr + j * size) >= 0)
2316 break;
2317
2318 j++;
2319
2320 if (i == j)
2321 continue; /* i is in order. */
2322
2323 memcpy (tmp, ptr + i * size, size);
2324 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2325 memcpy (ptr + j * size, tmp, size);
2326 }
2327 free (tmp);
2328 }
2329
2330 /* Sort relocation by r_offset.
2331
2332 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2333 algorithm. Relocations at the same r_offset must keep their order.
2334 For example, RELAX_ENTRY must be the very first relocation entry.
2335
2336 Currently, this function implements insertion-sort.
2337
2338 FIXME: If we already sort them in assembler, why bother sort them
2339 here again? */
2340
2341 static int
2342 compar_reloc (const void *lhs, const void *rhs)
2343 {
2344 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2345 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2346
2347 if (l->r_offset > r->r_offset)
2348 return 1;
2349 else if (l->r_offset == r->r_offset)
2350 return 0;
2351 else
2352 return -1;
2353 }
2354
2355 /* Functions listed below are only used for old relocs.
2356 * nds32_elf_9_pcrel_reloc
2357 * nds32_elf_do_9_pcrel_reloc
2358 * nds32_elf_hi20_reloc
2359 * nds32_elf_relocate_hi20
2360 * nds32_elf_lo12_reloc
2361 * nds32_elf_sda15_reloc
2362 * nds32_elf_generic_reloc
2363 */
2364
2365 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2366
2367 static bfd_reloc_status_type
2368 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2369 void *data, asection *input_section, bfd *output_bfd,
2370 char **error_message ATTRIBUTE_UNUSED)
2371 {
2372 /* This part is from bfd_elf_generic_reloc. */
2373 if (output_bfd != (bfd *) NULL
2374 && (symbol->flags & BSF_SECTION_SYM) == 0
2375 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2376 {
2377 reloc_entry->address += input_section->output_offset;
2378 return bfd_reloc_ok;
2379 }
2380
2381 if (output_bfd != NULL)
2382 {
2383 /* FIXME: See bfd_perform_relocation. Is this right? */
2384 return bfd_reloc_continue;
2385 }
2386
2387 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2388 input_section,
2389 data, reloc_entry->address,
2390 symbol->section,
2391 (symbol->value
2392 + symbol->section->output_section->vma
2393 + symbol->section->output_offset),
2394 reloc_entry->addend);
2395 }
2396
2397 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2398 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2399
2400 static bfd_reloc_status_type
2401 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2402 asection *input_section, bfd_byte *data,
2403 bfd_vma offset,
2404 asection *symbol_section ATTRIBUTE_UNUSED,
2405 bfd_vma symbol_value, bfd_vma addend)
2406 {
2407 bfd_signed_vma relocation;
2408 unsigned short x;
2409 bfd_reloc_status_type status;
2410
2411 /* Sanity check the address (offset in section). */
2412 if (offset > bfd_get_section_limit (abfd, input_section))
2413 return bfd_reloc_outofrange;
2414
2415 relocation = symbol_value + addend;
2416 /* Make it pc relative. */
2417 relocation -= (input_section->output_section->vma
2418 + input_section->output_offset);
2419 /* These jumps mask off the lower two bits of the current address
2420 before doing pcrel calculations. */
2421 relocation -= (offset & -(bfd_vma) 2);
2422
2423 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2424 status = bfd_reloc_overflow;
2425 else
2426 status = bfd_reloc_ok;
2427
2428 x = bfd_getb16 (data + offset);
2429
2430 relocation >>= howto->rightshift;
2431 relocation <<= howto->bitpos;
2432 x = (x & ~howto->dst_mask)
2433 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2434
2435 bfd_putb16 ((bfd_vma) x, data + offset);
2436
2437 return status;
2438 }
2439
2440 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2441 HI20_SLO is for the add3 and load/store with displacement instructions.
2442 HI20 is for the or3 instruction.
2443 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2444 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2445 we must add one to the high 16 bytes (which will get subtracted off when
2446 the low 16 bits are added).
2447 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2448 because there is a carry from the LO12 to the HI20. Here we just save
2449 the information we need; we do the actual relocation when we see the LO12.
2450 This code is copied from the elf32-mips.c. We also support an arbitrary
2451 number of HI20 relocs to be associated with a single LO12 reloc. The
2452 assembler sorts the relocs to ensure each HI20 immediately precedes its
2453 LO12. However if there are multiple copies, the assembler may not find
2454 the real LO12 so it picks the first one it finds. */
2455
2456 struct nds32_hi20
2457 {
2458 struct nds32_hi20 *next;
2459 bfd_byte *addr;
2460 bfd_vma addend;
2461 };
2462
2463 static struct nds32_hi20 *nds32_hi20_list;
2464
2465 static bfd_reloc_status_type
2466 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2467 asymbol *symbol, void *data, asection *input_section,
2468 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2469 {
2470 bfd_reloc_status_type ret;
2471 bfd_vma relocation;
2472 struct nds32_hi20 *n;
2473
2474 /* This part is from bfd_elf_generic_reloc.
2475 If we're relocating, and this an external symbol, we don't want
2476 to change anything. */
2477 if (output_bfd != (bfd *) NULL
2478 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2479 {
2480 reloc_entry->address += input_section->output_offset;
2481 return bfd_reloc_ok;
2482 }
2483
2484 /* Sanity check the address (offset in section). */
2485 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2486 return bfd_reloc_outofrange;
2487
2488 ret = bfd_reloc_ok;
2489 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2490 ret = bfd_reloc_undefined;
2491
2492 if (bfd_is_com_section (symbol->section))
2493 relocation = 0;
2494 else
2495 relocation = symbol->value;
2496
2497 relocation += symbol->section->output_section->vma;
2498 relocation += symbol->section->output_offset;
2499 relocation += reloc_entry->addend;
2500
2501 /* Save the information, and let LO12 do the actual relocation. */
2502 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2503 if (n == NULL)
2504 return bfd_reloc_outofrange;
2505
2506 n->addr = (bfd_byte *) data + reloc_entry->address;
2507 n->addend = relocation;
2508 n->next = nds32_hi20_list;
2509 nds32_hi20_list = n;
2510
2511 if (output_bfd != (bfd *) NULL)
2512 reloc_entry->address += input_section->output_offset;
2513
2514 return ret;
2515 }
2516
2517 /* Handle an NDS32 ELF HI20 reloc. */
2518
2519 static void
2520 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2521 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2522 Elf_Internal_Rela *rello, bfd_byte *contents,
2523 bfd_vma addend)
2524 {
2525 unsigned long insn;
2526 bfd_vma addlo;
2527
2528 insn = bfd_getb32 (contents + relhi->r_offset);
2529
2530 addlo = bfd_getb32 (contents + rello->r_offset);
2531 addlo &= 0xfff;
2532
2533 addend += ((insn & 0xfffff) << 20) + addlo;
2534
2535 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2536 bfd_putb32 (insn, contents + relhi->r_offset);
2537 }
2538
2539 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2540 inplace relocation; this function exists in order to do the
2541 R_NDS32_HI20_[SU]LO relocation described above. */
2542
2543 static bfd_reloc_status_type
2544 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2545 void *data, asection *input_section, bfd *output_bfd,
2546 char **error_message)
2547 {
2548 /* This part is from bfd_elf_generic_reloc.
2549 If we're relocating, and this an external symbol, we don't want
2550 to change anything. */
2551 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2552 && reloc_entry->addend == 0)
2553 {
2554 reloc_entry->address += input_section->output_offset;
2555 return bfd_reloc_ok;
2556 }
2557
2558 if (nds32_hi20_list != NULL)
2559 {
2560 struct nds32_hi20 *l;
2561
2562 l = nds32_hi20_list;
2563 while (l != NULL)
2564 {
2565 unsigned long insn;
2566 unsigned long val;
2567 unsigned long vallo;
2568 struct nds32_hi20 *next;
2569
2570 /* Do the HI20 relocation. Note that we actually don't need
2571 to know anything about the LO12 itself, except where to
2572 find the low 12 bits of the addend needed by the LO12. */
2573 insn = bfd_getb32 (l->addr);
2574 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2575 vallo &= 0xfff;
2576 switch (reloc_entry->howto->type)
2577 {
2578 case R_NDS32_LO12S3:
2579 vallo <<= 3;
2580 break;
2581
2582 case R_NDS32_LO12S2:
2583 vallo <<= 2;
2584 break;
2585
2586 case R_NDS32_LO12S1:
2587 vallo <<= 1;
2588 break;
2589
2590 case R_NDS32_LO12S0:
2591 vallo <<= 0;
2592 break;
2593 }
2594
2595 val = ((insn & 0xfffff) << 12) + vallo;
2596 val += l->addend;
2597
2598 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2599 bfd_putb32 ((bfd_vma) insn, l->addr);
2600
2601 next = l->next;
2602 free (l);
2603 l = next;
2604 }
2605
2606 nds32_hi20_list = NULL;
2607 }
2608
2609 /* Now do the LO12 reloc in the usual way.
2610 ??? It would be nice to call bfd_elf_generic_reloc here,
2611 but we have partial_inplace set. bfd_elf_generic_reloc will
2612 pass the handling back to bfd_install_relocation which will install
2613 a section relative addend which is wrong. */
2614 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2615 input_section, output_bfd, error_message);
2616 }
2617
2618 /* Do generic partial_inplace relocation.
2619 This is a local replacement for bfd_elf_generic_reloc. */
2620
2621 static bfd_reloc_status_type
2622 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2623 asymbol *symbol, void *data, asection *input_section,
2624 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2625 {
2626 bfd_reloc_status_type ret;
2627 bfd_vma relocation;
2628 bfd_byte *inplace_address;
2629
2630 /* This part is from bfd_elf_generic_reloc.
2631 If we're relocating, and this an external symbol, we don't want
2632 to change anything. */
2633 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2634 && reloc_entry->addend == 0)
2635 {
2636 reloc_entry->address += input_section->output_offset;
2637 return bfd_reloc_ok;
2638 }
2639
2640 /* Now do the reloc in the usual way.
2641 ??? It would be nice to call bfd_elf_generic_reloc here,
2642 but we have partial_inplace set. bfd_elf_generic_reloc will
2643 pass the handling back to bfd_install_relocation which will install
2644 a section relative addend which is wrong. */
2645
2646 /* Sanity check the address (offset in section). */
2647 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2648 return bfd_reloc_outofrange;
2649
2650 ret = bfd_reloc_ok;
2651 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2652 ret = bfd_reloc_undefined;
2653
2654 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2655 relocation = 0;
2656 else
2657 relocation = symbol->value;
2658
2659 /* Only do this for a final link. */
2660 if (output_bfd == (bfd *) NULL)
2661 {
2662 relocation += symbol->section->output_section->vma;
2663 relocation += symbol->section->output_offset;
2664 }
2665
2666 relocation += reloc_entry->addend;
2667 switch (reloc_entry->howto->type)
2668 {
2669 case R_NDS32_LO12S3:
2670 relocation >>= 3;
2671 break;
2672
2673 case R_NDS32_LO12S2:
2674 relocation >>= 2;
2675 break;
2676
2677 case R_NDS32_LO12S1:
2678 relocation >>= 1;
2679 break;
2680
2681 case R_NDS32_LO12S0:
2682 default:
2683 relocation >>= 0;
2684 break;
2685 }
2686
2687 inplace_address = (bfd_byte *) data + reloc_entry->address;
2688
2689 #define DOIT(x) \
2690 x = ((x & ~reloc_entry->howto->dst_mask) | \
2691 (((x & reloc_entry->howto->src_mask) + relocation) & \
2692 reloc_entry->howto->dst_mask))
2693
2694 switch (reloc_entry->howto->size)
2695 {
2696 case 1:
2697 {
2698 short x = bfd_getb16 (inplace_address);
2699
2700 DOIT (x);
2701 bfd_putb16 ((bfd_vma) x, inplace_address);
2702 }
2703 break;
2704 case 2:
2705 {
2706 unsigned long x = bfd_getb32 (inplace_address);
2707
2708 DOIT (x);
2709 bfd_putb32 ((bfd_vma) x, inplace_address);
2710 }
2711 break;
2712 default:
2713 BFD_ASSERT (0);
2714 }
2715
2716 if (output_bfd != (bfd *) NULL)
2717 reloc_entry->address += input_section->output_offset;
2718
2719 return ret;
2720 }
2721
2722 /* Handle the R_NDS32_SDA15 reloc.
2723 This reloc is used to compute the address of objects in the small data area
2724 and to perform loads and stores from that area.
2725 The lower 15 bits are sign extended and added to the register specified
2726 in the instruction, which is assumed to point to _SDA_BASE_.
2727
2728 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2729 the access size, this must be taken care of. */
2730
2731 static bfd_reloc_status_type
2732 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2733 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2734 asection *input_section, bfd *output_bfd,
2735 char **error_message ATTRIBUTE_UNUSED)
2736 {
2737 /* This part is from bfd_elf_generic_reloc. */
2738 if (output_bfd != (bfd *) NULL
2739 && (symbol->flags & BSF_SECTION_SYM) == 0
2740 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2741 {
2742 reloc_entry->address += input_section->output_offset;
2743 return bfd_reloc_ok;
2744 }
2745
2746 if (output_bfd != NULL)
2747 {
2748 /* FIXME: See bfd_perform_relocation. Is this right? */
2749 return bfd_reloc_continue;
2750 }
2751
2752 /* FIXME: not sure what to do here yet. But then again, the linker
2753 may never call us. */
2754 abort ();
2755 }
2756
2757 /* nds32_elf_ignore_reloc is the special function for
2758 relocation types which don't need to be relocated
2759 like relaxation relocation types.
2760 This function simply return bfd_reloc_ok when it is
2761 invoked. */
2762
2763 static bfd_reloc_status_type
2764 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2765 asymbol *symbol ATTRIBUTE_UNUSED,
2766 void *data ATTRIBUTE_UNUSED, asection *input_section,
2767 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2768 {
2769 if (output_bfd != NULL)
2770 reloc_entry->address += input_section->output_offset;
2771
2772 return bfd_reloc_ok;
2773 }
2774 \f
2775
2776 /* Map BFD reloc types to NDS32 ELF reloc types. */
2777
2778 struct nds32_reloc_map_entry
2779 {
2780 bfd_reloc_code_real_type bfd_reloc_val;
2781 unsigned char elf_reloc_val;
2782 };
2783
2784 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2785 {
2786 {BFD_RELOC_NONE, R_NDS32_NONE},
2787 {BFD_RELOC_16, R_NDS32_16_RELA},
2788 {BFD_RELOC_32, R_NDS32_32_RELA},
2789 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2790 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2791 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2794 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2795 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2796 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2797 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2798 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2799 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2800 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2801 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2802 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2803 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2804 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2805 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2806 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2807 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2808 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2809
2810 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2811 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2812 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2813 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2814 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2815 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2816 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2817 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2818 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2819 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2820 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2821 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2822 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2823 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2824 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2825 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2826 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2827 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2828 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2829 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2830 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2831 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2832 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2833 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2834 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2835 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2836 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2837 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2838 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2839 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2840 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2841 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2842 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2843 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2844 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2845 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2846 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2847 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2848 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2849 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2850 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2856 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2857 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2860 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2861 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2862 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2863 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2864 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2868 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2869 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2870 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2871 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2872 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2873 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2874 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2875 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2876 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2877 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2878 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2879 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2880 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2881 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2882 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2883 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2884 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2885
2886 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2887 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2888 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2889 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2890 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2891 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2892 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2893 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2894 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2895 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2896 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2897 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2898 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2899 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2900 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2901 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2902 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2903 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2904 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2905 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2906 };
2907
2908 /* Patch tag. */
2909
2910 static reloc_howto_type *
2911 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2912 const char *r_name)
2913 {
2914 unsigned int i;
2915
2916 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2917 if (nds32_elf_howto_table[i].name != NULL
2918 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2919 return &nds32_elf_howto_table[i];
2920
2921 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2922 if (nds32_elf_relax_howto_table[i].name != NULL
2923 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2924 return &nds32_elf_relax_howto_table[i];
2925
2926 return NULL;
2927 }
2928
2929 static reloc_howto_type *
2930 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2931 {
2932 if (code < R_NDS32_RELAX_ENTRY)
2933 {
2934 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2935 return &nds32_elf_howto_table[code];
2936 }
2937 else
2938 {
2939 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2940 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2941 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2942 }
2943 }
2944
2945 static reloc_howto_type *
2946 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2947 bfd_reloc_code_real_type code)
2948 {
2949 unsigned int i;
2950
2951 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2952 {
2953 if (nds32_reloc_map[i].bfd_reloc_val == code)
2954 return bfd_elf32_bfd_reloc_type_table_lookup
2955 (nds32_reloc_map[i].elf_reloc_val);
2956 }
2957
2958 return NULL;
2959 }
2960
2961 /* Set the howto pointer for an NDS32 ELF reloc. */
2962
2963 static void
2964 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2965 Elf_Internal_Rela *dst)
2966 {
2967 enum elf_nds32_reloc_type r_type;
2968
2969 r_type = ELF32_R_TYPE (dst->r_info);
2970 if (r_type > R_NDS32_GNU_VTENTRY)
2971 {
2972 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
2973 r_type = 0;
2974 }
2975 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2976 }
2977
2978 static void
2979 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2980 Elf_Internal_Rela *dst)
2981 {
2982 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2983 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2984 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2985 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2986 }
2987
2988 /* Support for core dump NOTE sections.
2989 Reference to include/linux/elfcore.h in Linux. */
2990
2991 static bfd_boolean
2992 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2993 {
2994 int offset;
2995 size_t size;
2996
2997 switch (note->descsz)
2998 {
2999 case 0x114:
3000 /* Linux/NDS32 32-bit, ABI1 */
3001
3002 /* pr_cursig */
3003 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3004
3005 /* pr_pid */
3006 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3007
3008 /* pr_reg */
3009 offset = 72;
3010 size = 200;
3011 break;
3012
3013 case 0xfc:
3014 /* Linux/NDS32 32-bit */
3015
3016 /* pr_cursig */
3017 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3018
3019 /* pr_pid */
3020 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3021
3022 /* pr_reg */
3023 offset = 72;
3024 size = 176;
3025 break;
3026
3027 default:
3028 return FALSE;
3029 }
3030
3031 /* Make a ".reg" section. */
3032 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3033 size, note->descpos + offset);
3034 }
3035
3036 static bfd_boolean
3037 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3038 {
3039 switch (note->descsz)
3040 {
3041 case 124:
3042 /* Linux/NDS32 */
3043
3044 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3045 elf_tdata (abfd)->core->program =
3046 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3047 elf_tdata (abfd)->core->command =
3048 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3049
3050 default:
3051 return FALSE;
3052 }
3053
3054 /* Note that for some reason, a spurious space is tacked
3055 onto the end of the args in some (at least one anyway)
3056 implementations, so strip it off if it exists. */
3057 {
3058 char *command = elf_tdata (abfd)->core->command;
3059 int n = strlen (command);
3060
3061 if (0 < n && command[n - 1] == ' ')
3062 command[n - 1] = '\0';
3063 }
3064
3065 return TRUE;
3066 }
3067
3068 /* Hook called by the linker routine which adds symbols from an object
3069 file. We must handle the special NDS32 section numbers here.
3070 We also keep watching for whether we need to create the sdata special
3071 linker sections. */
3072
3073 static bfd_boolean
3074 nds32_elf_add_symbol_hook (bfd *abfd,
3075 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3076 Elf_Internal_Sym *sym,
3077 const char **namep ATTRIBUTE_UNUSED,
3078 flagword *flagsp ATTRIBUTE_UNUSED,
3079 asection **secp, bfd_vma *valp)
3080 {
3081 switch (sym->st_shndx)
3082 {
3083 case SHN_COMMON:
3084 /* Common symbols less than the GP size are automatically
3085 treated as SHN_MIPS_SCOMMON symbols. */
3086 if (sym->st_size > elf_gp_size (abfd)
3087 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3088 break;
3089
3090 /* st_value is the alignemnt constraint.
3091 That might be its actual size if it is an array or structure. */
3092 switch (sym->st_value)
3093 {
3094 case 1:
3095 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3096 break;
3097 case 2:
3098 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3099 break;
3100 case 4:
3101 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3102 break;
3103 case 8:
3104 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3105 break;
3106 default:
3107 return TRUE;
3108 }
3109
3110 (*secp)->flags |= SEC_IS_COMMON;
3111 *valp = sym->st_size;
3112 break;
3113 }
3114
3115 return TRUE;
3116 }
3117
3118
3119 /* This function can figure out the best location for a base register to access
3120 data relative to this base register
3121 INPUT:
3122 sda_d0: size of first DOUBLE WORD data section
3123 sda_w0: size of first WORD data section
3124 sda_h0: size of first HALF WORD data section
3125 sda_b : size of BYTE data section
3126 sda_hi: size of second HALF WORD data section
3127 sda_w1: size of second WORD data section
3128 sda_d1: size of second DOUBLE WORD data section
3129 OUTPUT:
3130 offset (always positive) from the beginning of sda_d0 if OK
3131 a negative error value if fail
3132 NOTE:
3133 these 7 sections have to be located back to back if exist
3134 a pass in 0 value for non-existing section */
3135
3136 /* Due to the interpretation of simm15 field of load/store depending on
3137 data accessing size, the organization of base register relative data shall
3138 like the following figure
3139 -------------------------------------------
3140 | DOUBLE WORD sized data (range +/- 128K)
3141 -------------------------------------------
3142 | WORD sized data (range +/- 64K)
3143 -------------------------------------------
3144 | HALF WORD sized data (range +/- 32K)
3145 -------------------------------------------
3146 | BYTE sized data (range +/- 16K)
3147 -------------------------------------------
3148 | HALF WORD sized data (range +/- 32K)
3149 -------------------------------------------
3150 | WORD sized data (range +/- 64K)
3151 -------------------------------------------
3152 | DOUBLE WORD sized data (range +/- 128K)
3153 -------------------------------------------
3154 Its base register shall be set to access these data freely. */
3155
3156 /* We have to figure out the SDA_BASE value, so that we can adjust the
3157 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3158 BFD. If we can't find it, we're stuck. We cache it in the ELF
3159 target data. We don't need to adjust the symbol value for an
3160 external symbol if we are producing relocatable output. */
3161
3162 static asection *sda_rela_sec = NULL;
3163
3164 #define SDA_SECTION_NUM 10
3165
3166 static bfd_reloc_status_type
3167 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3168 bfd_vma *psb, bfd_boolean add_symbol)
3169 {
3170 int relax_fp_as_gp;
3171 struct elf_nds32_link_hash_table *table;
3172 struct bfd_link_hash_entry *h, *h2;
3173 long unsigned int total = 0;
3174
3175 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3176 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3177 {
3178 asection *first = NULL, *final = NULL, *temp;
3179 bfd_vma sda_base;
3180 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3181 4 byte-aligned. Therefore, it has to set the first section ".data"
3182 4 byte-aligned. */
3183 static const char sec_name[SDA_SECTION_NUM][10] =
3184 {
3185 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3186 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3187 };
3188 size_t i = 0;
3189
3190 if (output_bfd->sections == NULL)
3191 {
3192 *psb = elf_gp (output_bfd);
3193 return bfd_reloc_ok;
3194 }
3195
3196 /* Get the first and final section. */
3197 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3198 {
3199 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3200 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3201 first = temp;
3202 if (temp && (temp->size != 0 || temp->rawsize != 0))
3203 final = temp;
3204
3205 /* Summarize the sections in order to check if joining .bss. */
3206 if (temp && temp->size != 0)
3207 total += temp->size;
3208 else if (temp && temp->rawsize != 0)
3209 total += temp->rawsize;
3210
3211 i++;
3212 }
3213
3214 /* Check .bss size. */
3215 temp = bfd_get_section_by_name (output_bfd, ".bss");
3216 if (temp)
3217 {
3218 if (temp->size != 0)
3219 total += temp->size;
3220 else if (temp->rawsize != 0)
3221 total += temp->rawsize;
3222
3223 if (total < 0x80000)
3224 {
3225 if (!first && (temp->size != 0 || temp->rawsize != 0))
3226 first = temp;
3227 if ((temp->size != 0 || temp->rawsize != 0))
3228 final = temp;
3229 }
3230 }
3231
3232 if (first && final)
3233 {
3234 /* The middle of data region. */
3235 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3236
3237 /* Find the section sda_base located. */
3238 i = 0;
3239 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3240 {
3241 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3242 if (final && (final->size != 0 || final->rawsize != 0)
3243 && sda_base >= final->vma)
3244 {
3245 first = final;
3246 i++;
3247 }
3248 else
3249 break;
3250 }
3251 }
3252 else
3253 {
3254 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3255 first output section. */
3256 first = output_bfd->sections;
3257 while (first && first->size == 0 && first->rawsize == 0)
3258 first = first->next;
3259 if (!first)
3260 {
3261 *psb = elf_gp (output_bfd);
3262 return bfd_reloc_ok;
3263 }
3264 sda_base = first->vma + first->rawsize;
3265 }
3266
3267 sda_base -= first->vma;
3268 sda_base = sda_base & (~7);
3269
3270 if (!_bfd_generic_link_add_one_symbol
3271 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3272 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3273 get_elf_backend_data (output_bfd)->collect, &h))
3274 return FALSE;
3275
3276 sda_rela_sec = first;
3277
3278 table = nds32_elf_hash_table (info);
3279 relax_fp_as_gp = table->relax_fp_as_gp;
3280 if (relax_fp_as_gp)
3281 {
3282 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3283 FALSE, FALSE, FALSE);
3284 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3285 And set FP equal to SDA_BASE to do relaxation for
3286 la $fp, _FP_BASE_. */
3287 if (!_bfd_generic_link_add_one_symbol
3288 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3289 first, (bfd_vma) sda_base, (const char *) NULL,
3290 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3291 return FALSE;
3292 }
3293 }
3294
3295 if (add_symbol == TRUE)
3296 {
3297 if (h)
3298 {
3299 /* Now set gp. */
3300 elf_gp (output_bfd) = (h->u.def.value
3301 + h->u.def.section->output_section->vma
3302 + h->u.def.section->output_offset);
3303 }
3304 else
3305 {
3306 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3307 return bfd_reloc_dangerous;
3308 }
3309 }
3310
3311 *psb = h->u.def.value + h->u.def.section->output_section->vma
3312 + h->u.def.section->output_offset;
3313 return bfd_reloc_ok;
3314 }
3315 \f
3316
3317 /* Return size of a PLT entry. */
3318 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3319
3320
3321 /* Create an entry in an nds32 ELF linker hash table. */
3322
3323 static struct bfd_hash_entry *
3324 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3325 struct bfd_hash_table *table,
3326 const char *string)
3327 {
3328 struct elf_nds32_link_hash_entry *ret;
3329
3330 ret = (struct elf_nds32_link_hash_entry *) entry;
3331
3332 /* Allocate the structure if it has not already been allocated by a
3333 subclass. */
3334 if (ret == NULL)
3335 ret = (struct elf_nds32_link_hash_entry *)
3336 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3337
3338 if (ret == NULL)
3339 return (struct bfd_hash_entry *) ret;
3340
3341 /* Call the allocation method of the superclass. */
3342 ret = (struct elf_nds32_link_hash_entry *)
3343 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3344
3345 if (ret != NULL)
3346 {
3347 struct elf_nds32_link_hash_entry *eh;
3348
3349 eh = (struct elf_nds32_link_hash_entry *) ret;
3350 eh->dyn_relocs = NULL;
3351 eh->tls_type = GOT_UNKNOWN;
3352 }
3353
3354 return (struct bfd_hash_entry *) ret;
3355 }
3356
3357 /* Create an nds32 ELF linker hash table. */
3358
3359 static struct bfd_link_hash_table *
3360 nds32_elf_link_hash_table_create (bfd *abfd)
3361 {
3362 struct elf_nds32_link_hash_table *ret;
3363
3364 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3365
3366 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3367 if (ret == NULL)
3368 return NULL;
3369
3370 /* patch tag. */
3371 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3372 nds32_elf_link_hash_newfunc,
3373 sizeof (struct elf_nds32_link_hash_entry),
3374 NDS32_ELF_DATA))
3375 {
3376 free (ret);
3377 return NULL;
3378 }
3379
3380 ret->sgot = NULL;
3381 ret->sgotplt = NULL;
3382 ret->srelgot = NULL;
3383 ret->splt = NULL;
3384 ret->srelplt = NULL;
3385 ret->sdynbss = NULL;
3386 ret->srelbss = NULL;
3387 ret->sym_ld_script = NULL;
3388 ret->ex9_export_file = NULL;
3389 ret->ex9_import_file = NULL;
3390
3391 return &ret->root.root;
3392 }
3393
3394 /* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3395 shortcuts to them in our hash table. */
3396
3397 static bfd_boolean
3398 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3399 {
3400 struct elf_nds32_link_hash_table *htab;
3401
3402 if (!_bfd_elf_create_got_section (dynobj, info))
3403 return FALSE;
3404
3405 htab = nds32_elf_hash_table (info);
3406 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3407 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3408 if (!htab->sgot || !htab->sgotplt)
3409 abort ();
3410
3411 /* _bfd_elf_create_got_section will create it for us. */
3412 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3413 if (htab->srelgot == NULL
3414 || !bfd_set_section_flags (dynobj, htab->srelgot,
3415 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3416 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3417 | SEC_READONLY))
3418 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3419 return FALSE;
3420
3421 return TRUE;
3422 }
3423
3424 /* Create dynamic sections when linking against a dynamic object. */
3425
3426 static bfd_boolean
3427 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3428 {
3429 struct elf_nds32_link_hash_table *htab;
3430 flagword flags, pltflags;
3431 register asection *s;
3432 const struct elf_backend_data *bed;
3433 int ptralign = 2; /* 32-bit */
3434
3435 bed = get_elf_backend_data (abfd);
3436
3437 htab = nds32_elf_hash_table (info);
3438
3439 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3440 .rel[a].bss sections. */
3441
3442 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3443 | SEC_LINKER_CREATED);
3444
3445 pltflags = flags;
3446 pltflags |= SEC_CODE;
3447 if (bed->plt_not_loaded)
3448 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3449 if (bed->plt_readonly)
3450 pltflags |= SEC_READONLY;
3451
3452 s = bfd_make_section (abfd, ".plt");
3453 htab->splt = s;
3454 if (s == NULL
3455 || !bfd_set_section_flags (abfd, s, pltflags)
3456 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3457 return FALSE;
3458
3459 if (bed->want_plt_sym)
3460 {
3461 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3462 .plt section. */
3463 struct bfd_link_hash_entry *bh = NULL;
3464 struct elf_link_hash_entry *h;
3465
3466 if (!(_bfd_generic_link_add_one_symbol
3467 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3468 (bfd_vma) 0, (const char *) NULL, FALSE,
3469 get_elf_backend_data (abfd)->collect, &bh)))
3470 return FALSE;
3471
3472 h = (struct elf_link_hash_entry *) bh;
3473 h->def_regular = 1;
3474 h->type = STT_OBJECT;
3475
3476 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
3477 return FALSE;
3478 }
3479
3480 s = bfd_make_section (abfd,
3481 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3482 htab->srelplt = s;
3483 if (s == NULL
3484 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3485 || !bfd_set_section_alignment (abfd, s, ptralign))
3486 return FALSE;
3487
3488 if (htab->sgot == NULL && !create_got_section (abfd, info))
3489 return FALSE;
3490
3491 {
3492 const char *secname;
3493 char *relname;
3494 flagword secflags;
3495 asection *sec;
3496
3497 for (sec = abfd->sections; sec; sec = sec->next)
3498 {
3499 secflags = bfd_get_section_flags (abfd, sec);
3500 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3501 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3502 continue;
3503 secname = bfd_get_section_name (abfd, sec);
3504 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3505 strcpy (relname, ".rela");
3506 strcat (relname, secname);
3507 if (bfd_get_section_by_name (abfd, secname))
3508 continue;
3509 s = bfd_make_section (abfd, relname);
3510 if (s == NULL
3511 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3512 || !bfd_set_section_alignment (abfd, s, ptralign))
3513 return FALSE;
3514 }
3515 }
3516
3517 if (bed->want_dynbss)
3518 {
3519 /* The .dynbss section is a place to put symbols which are defined
3520 by dynamic objects, are referenced by regular objects, and are
3521 not functions. We must allocate space for them in the process
3522 image and use a R_*_COPY reloc to tell the dynamic linker to
3523 initialize them at run time. The linker script puts the .dynbss
3524 section into the .bss section of the final image. */
3525 s = bfd_make_section (abfd, ".dynbss");
3526 htab->sdynbss = s;
3527 if (s == NULL
3528 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3529 return FALSE;
3530 /* The .rel[a].bss section holds copy relocs. This section is not
3531 normally needed. We need to create it here, though, so that the
3532 linker will map it to an output section. We can't just create it
3533 only if we need it, because we will not know whether we need it
3534 until we have seen all the input files, and the first time the
3535 main linker code calls BFD after examining all the input files
3536 (size_dynamic_sections) the input sections have already been
3537 mapped to the output sections. If the section turns out not to
3538 be needed, we can discard it later. We will never need this
3539 section when generating a shared object, since they do not use
3540 copy relocs. */
3541 if (!bfd_link_pic (info))
3542 {
3543 s = bfd_make_section (abfd, (bed->default_use_rela_p
3544 ? ".rela.bss" : ".rel.bss"));
3545 htab->srelbss = s;
3546 if (s == NULL
3547 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3548 || !bfd_set_section_alignment (abfd, s, ptralign))
3549 return FALSE;
3550 }
3551 }
3552
3553 return TRUE;
3554 }
3555
3556 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3557 static void
3558 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3559 struct elf_link_hash_entry *dir,
3560 struct elf_link_hash_entry *ind)
3561 {
3562 struct elf_nds32_link_hash_entry *edir, *eind;
3563
3564 edir = (struct elf_nds32_link_hash_entry *) dir;
3565 eind = (struct elf_nds32_link_hash_entry *) ind;
3566
3567 if (eind->dyn_relocs != NULL)
3568 {
3569 if (edir->dyn_relocs != NULL)
3570 {
3571 struct elf_nds32_dyn_relocs **pp;
3572 struct elf_nds32_dyn_relocs *p;
3573
3574 if (ind->root.type == bfd_link_hash_indirect)
3575 abort ();
3576
3577 /* Add reloc counts against the weak sym to the strong sym
3578 list. Merge any entries against the same section. */
3579 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3580 {
3581 struct elf_nds32_dyn_relocs *q;
3582
3583 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3584 if (q->sec == p->sec)
3585 {
3586 q->pc_count += p->pc_count;
3587 q->count += p->count;
3588 *pp = p->next;
3589 break;
3590 }
3591 if (q == NULL)
3592 pp = &p->next;
3593 }
3594 *pp = edir->dyn_relocs;
3595 }
3596
3597 edir->dyn_relocs = eind->dyn_relocs;
3598 eind->dyn_relocs = NULL;
3599 }
3600
3601 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3602 }
3603 \f
3604
3605 /* Adjust a symbol defined by a dynamic object and referenced by a
3606 regular object. The current definition is in some section of the
3607 dynamic object, but we're not including those sections. We have to
3608 change the definition to something the rest of the link can
3609 understand. */
3610
3611 static bfd_boolean
3612 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3613 struct elf_link_hash_entry *h)
3614 {
3615 struct elf_nds32_link_hash_table *htab;
3616 struct elf_nds32_link_hash_entry *eh;
3617 struct elf_nds32_dyn_relocs *p;
3618 bfd *dynobj;
3619 asection *s;
3620 unsigned int power_of_two;
3621
3622 dynobj = elf_hash_table (info)->dynobj;
3623
3624 /* Make sure we know what is going on here. */
3625 BFD_ASSERT (dynobj != NULL
3626 && (h->needs_plt
3627 || h->u.weakdef != NULL
3628 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3629
3630
3631 /* If this is a function, put it in the procedure linkage table. We
3632 will fill in the contents of the procedure linkage table later,
3633 when we know the address of the .got section. */
3634 if (h->type == STT_FUNC || h->needs_plt)
3635 {
3636 if (!bfd_link_pic (info)
3637 && !h->def_dynamic
3638 && !h->ref_dynamic
3639 && h->root.type != bfd_link_hash_undefweak
3640 && h->root.type != bfd_link_hash_undefined)
3641 {
3642 /* This case can occur if we saw a PLT reloc in an input
3643 file, but the symbol was never referred to by a dynamic
3644 object. In such a case, we don't actually need to build
3645 a procedure linkage table, and we can just do a PCREL
3646 reloc instead. */
3647 h->plt.offset = (bfd_vma) - 1;
3648 h->needs_plt = 0;
3649 }
3650
3651 return TRUE;
3652 }
3653 else
3654 h->plt.offset = (bfd_vma) - 1;
3655
3656 /* If this is a weak symbol, and there is a real definition, the
3657 processor independent code will have arranged for us to see the
3658 real definition first, and we can just use the same value. */
3659 if (h->u.weakdef != NULL)
3660 {
3661 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3662 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3663 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3664 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3665 return TRUE;
3666 }
3667
3668 /* This is a reference to a symbol defined by a dynamic object which
3669 is not a function. */
3670
3671 /* If we are creating a shared library, we must presume that the
3672 only references to the symbol are via the global offset table.
3673 For such cases we need not do anything here; the relocations will
3674 be handled correctly by relocate_section. */
3675 if (bfd_link_pic (info))
3676 return TRUE;
3677
3678 /* If there are no references to this symbol that do not use the
3679 GOT, we don't need to generate a copy reloc. */
3680 if (!h->non_got_ref)
3681 return TRUE;
3682
3683 /* If -z nocopyreloc was given, we won't generate them either. */
3684 if (info->nocopyreloc)
3685 {
3686 h->non_got_ref = 0;
3687 return TRUE;
3688 }
3689
3690 eh = (struct elf_nds32_link_hash_entry *) h;
3691 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3692 {
3693 s = p->sec->output_section;
3694 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3695 break;
3696 }
3697
3698 /* If we didn't find any dynamic relocs in sections which needs the
3699 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3700 the copy reloc. */
3701 if (p == NULL)
3702 {
3703 h->non_got_ref = 0;
3704 return TRUE;
3705 }
3706
3707 /* We must allocate the symbol in our .dynbss section, which will
3708 become part of the .bss section of the executable. There will be
3709 an entry for this symbol in the .dynsym section. The dynamic
3710 object will contain position independent code, so all references
3711 from the dynamic object to this symbol will go through the global
3712 offset table. The dynamic linker will use the .dynsym entry to
3713 determine the address it must put in the global offset table, so
3714 both the dynamic object and the regular object will refer to the
3715 same memory location for the variable. */
3716
3717 htab = nds32_elf_hash_table (info);
3718 s = htab->sdynbss;
3719 BFD_ASSERT (s != NULL);
3720
3721 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3722 to copy the initial value out of the dynamic object and into the
3723 runtime process image. We need to remember the offset into the
3724 .rela.bss section we are going to use. */
3725 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3726 {
3727 asection *srel;
3728
3729 srel = htab->srelbss;
3730 BFD_ASSERT (srel != NULL);
3731 srel->size += sizeof (Elf32_External_Rela);
3732 h->needs_copy = 1;
3733 }
3734
3735 /* We need to figure out the alignment required for this symbol. I
3736 have no idea how ELF linkers handle this. */
3737 power_of_two = bfd_log2 (h->size);
3738 if (power_of_two > 3)
3739 power_of_two = 3;
3740
3741 /* Apply the required alignment. */
3742 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3743 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3744 {
3745 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3746 return FALSE;
3747 }
3748
3749 /* Define the symbol as being at this point in the section. */
3750 h->root.u.def.section = s;
3751 h->root.u.def.value = s->size;
3752
3753 /* Increment the section size to make room for the symbol. */
3754 s->size += h->size;
3755
3756 return TRUE;
3757 }
3758
3759 /* Allocate space in .plt, .got and associated reloc sections for
3760 dynamic relocs. */
3761
3762 static bfd_boolean
3763 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3764 {
3765 struct bfd_link_info *info;
3766 struct elf_nds32_link_hash_table *htab;
3767 struct elf_nds32_link_hash_entry *eh;
3768 struct elf_nds32_dyn_relocs *p;
3769
3770 if (h->root.type == bfd_link_hash_indirect)
3771 return TRUE;
3772
3773 if (h->root.type == bfd_link_hash_warning)
3774 /* When warning symbols are created, they **replace** the "real"
3775 entry in the hash table, thus we never get to see the real
3776 symbol in a hash traversal. So look at it now. */
3777 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3778
3779 info = (struct bfd_link_info *) inf;
3780 htab = nds32_elf_hash_table (info);
3781
3782 eh = (struct elf_nds32_link_hash_entry *) h;
3783
3784 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3785 {
3786 /* Make sure this symbol is output as a dynamic symbol.
3787 Undefined weak syms won't yet be marked as dynamic. */
3788 if (h->dynindx == -1 && !h->forced_local)
3789 {
3790 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3791 return FALSE;
3792 }
3793
3794 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
3795 {
3796 asection *s = htab->splt;
3797
3798 /* If this is the first .plt entry, make room for the special
3799 first entry. */
3800 if (s->size == 0)
3801 s->size += PLT_ENTRY_SIZE;
3802
3803 h->plt.offset = s->size;
3804
3805 /* If this symbol is not defined in a regular file, and we are
3806 not generating a shared library, then set the symbol to this
3807 location in the .plt. This is required to make function
3808 pointers compare as equal between the normal executable and
3809 the shared library. */
3810 if (!bfd_link_pic (info) && !h->def_regular)
3811 {
3812 h->root.u.def.section = s;
3813 h->root.u.def.value = h->plt.offset;
3814 }
3815
3816 /* Make room for this entry. */
3817 s->size += PLT_ENTRY_SIZE;
3818
3819 /* We also need to make an entry in the .got.plt section, which
3820 will be placed in the .got section by the linker script. */
3821 htab->sgotplt->size += 4;
3822
3823 /* We also need to make an entry in the .rel.plt section. */
3824 htab->srelplt->size += sizeof (Elf32_External_Rela);
3825 }
3826 else
3827 {
3828 h->plt.offset = (bfd_vma) - 1;
3829 h->needs_plt = 0;
3830 }
3831 }
3832 else
3833 {
3834 h->plt.offset = (bfd_vma) - 1;
3835 h->needs_plt = 0;
3836 }
3837
3838 if (h->got.refcount > 0)
3839 {
3840 asection *s;
3841 bfd_boolean dyn;
3842 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3843
3844 /* Make sure this symbol is output as a dynamic symbol.
3845 Undefined weak syms won't yet be marked as dynamic. */
3846 if (h->dynindx == -1 && !h->forced_local)
3847 {
3848 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3849 return FALSE;
3850 }
3851
3852 s = htab->sgot;
3853 h->got.offset = s->size;
3854
3855 if (tls_type == GOT_UNKNOWN)
3856 abort ();
3857 else if (tls_type == GOT_NORMAL
3858 || tls_type == GOT_TLS_IE)
3859 /* Need a GOT slot. */
3860 s->size += 4;
3861
3862 dyn = htab->root.dynamic_sections_created;
3863 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
3864 htab->srelgot->size += sizeof (Elf32_External_Rela);
3865 }
3866 else
3867 h->got.offset = (bfd_vma) - 1;
3868
3869 if (eh->dyn_relocs == NULL)
3870 return TRUE;
3871
3872 /* In the shared -Bsymbolic case, discard space allocated for
3873 dynamic pc-relative relocs against symbols which turn out to be
3874 defined in regular objects. For the normal shared case, discard
3875 space for pc-relative relocs that have become local due to symbol
3876 visibility changes. */
3877
3878 if (bfd_link_pic (info))
3879 {
3880 if (h->def_regular && (h->forced_local || info->symbolic))
3881 {
3882 struct elf_nds32_dyn_relocs **pp;
3883
3884 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3885 {
3886 p->count -= p->pc_count;
3887 p->pc_count = 0;
3888 if (p->count == 0)
3889 *pp = p->next;
3890 else
3891 pp = &p->next;
3892 }
3893 }
3894 }
3895 else
3896 {
3897 /* For the non-shared case, discard space for relocs against
3898 symbols which turn out to need copy relocs or are not dynamic. */
3899
3900 if (!h->non_got_ref
3901 && ((h->def_dynamic
3902 && !h->def_regular)
3903 || (htab->root.dynamic_sections_created
3904 && (h->root.type == bfd_link_hash_undefweak
3905 || h->root.type == bfd_link_hash_undefined))))
3906 {
3907 /* Make sure this symbol is output as a dynamic symbol.
3908 Undefined weak syms won't yet be marked as dynamic. */
3909 if (h->dynindx == -1 && !h->forced_local)
3910 {
3911 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3912 return FALSE;
3913 }
3914
3915 /* If that succeeded, we know we'll be keeping all the
3916 relocs. */
3917 if (h->dynindx != -1)
3918 goto keep;
3919 }
3920
3921 eh->dyn_relocs = NULL;
3922
3923 keep:;
3924 }
3925
3926 /* Finally, allocate space. */
3927 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3928 {
3929 asection *sreloc = elf_section_data (p->sec)->sreloc;
3930 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3931 }
3932
3933 return TRUE;
3934 }
3935
3936 /* Find any dynamic relocs that apply to read-only sections. */
3937
3938 static bfd_boolean
3939 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3940 {
3941 struct elf_nds32_link_hash_entry *eh;
3942 struct elf_nds32_dyn_relocs *p;
3943
3944 if (h->root.type == bfd_link_hash_warning)
3945 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3946
3947 eh = (struct elf_nds32_link_hash_entry *) h;
3948 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3949 {
3950 asection *s = p->sec->output_section;
3951
3952 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3953 {
3954 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3955
3956 info->flags |= DF_TEXTREL;
3957
3958 /* Not an error, just cut short the traversal. */
3959 return FALSE;
3960 }
3961 }
3962 return TRUE;
3963 }
3964
3965 /* Set the sizes of the dynamic sections. */
3966
3967 static bfd_boolean
3968 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3969 struct bfd_link_info *info)
3970 {
3971 struct elf_nds32_link_hash_table *htab;
3972 bfd *dynobj;
3973 asection *s;
3974 bfd_boolean relocs;
3975 bfd *ibfd;
3976
3977 htab = nds32_elf_hash_table (info);
3978 dynobj = htab->root.dynobj;
3979 BFD_ASSERT (dynobj != NULL);
3980
3981 if (htab->root.dynamic_sections_created)
3982 {
3983 /* Set the contents of the .interp section to the interpreter. */
3984 if (!bfd_link_pic (info) && !info->nointerp)
3985 {
3986 s = bfd_get_section_by_name (dynobj, ".interp");
3987 BFD_ASSERT (s != NULL);
3988 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3989 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3990 }
3991 }
3992
3993 /* Set up .got offsets for local syms, and space for local dynamic
3994 relocs. */
3995 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3996 {
3997 bfd_signed_vma *local_got;
3998 bfd_signed_vma *end_local_got;
3999 bfd_size_type locsymcount;
4000 Elf_Internal_Shdr *symtab_hdr;
4001 asection *srel;
4002
4003 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4004 continue;
4005
4006 for (s = ibfd->sections; s != NULL; s = s->next)
4007 {
4008 struct elf_nds32_dyn_relocs *p;
4009
4010 for (p = ((struct elf_nds32_dyn_relocs *)
4011 elf_section_data (s)->local_dynrel);
4012 p != NULL; p = p->next)
4013 {
4014 if (!bfd_is_abs_section (p->sec)
4015 && bfd_is_abs_section (p->sec->output_section))
4016 {
4017 /* Input section has been discarded, either because
4018 it is a copy of a linkonce section or due to
4019 linker script /DISCARD/, so we'll be discarding
4020 the relocs too. */
4021 }
4022 else if (p->count != 0)
4023 {
4024 srel = elf_section_data (p->sec)->sreloc;
4025 srel->size += p->count * sizeof (Elf32_External_Rela);
4026 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4027 info->flags |= DF_TEXTREL;
4028 }
4029 }
4030 }
4031
4032 local_got = elf_local_got_refcounts (ibfd);
4033 if (!local_got)
4034 continue;
4035
4036 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4037 locsymcount = symtab_hdr->sh_info;
4038 end_local_got = local_got + locsymcount;
4039 s = htab->sgot;
4040 srel = htab->srelgot;
4041 for (; local_got < end_local_got; ++local_got)
4042 {
4043 if (*local_got > 0)
4044 {
4045 *local_got = s->size;
4046 s->size += 4;
4047 if (bfd_link_pic (info))
4048 srel->size += sizeof (Elf32_External_Rela);
4049 }
4050 else
4051 *local_got = (bfd_vma) - 1;
4052 }
4053 }
4054
4055 /* Allocate global sym .plt and .got entries, and space for global
4056 sym dynamic relocs. */
4057 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4058
4059 /* We now have determined the sizes of the various dynamic sections.
4060 Allocate memory for them. */
4061 relocs = FALSE;
4062 for (s = dynobj->sections; s != NULL; s = s->next)
4063 {
4064 if ((s->flags & SEC_LINKER_CREATED) == 0)
4065 continue;
4066
4067 if (s == htab->splt)
4068 {
4069 /* Strip this section if we don't need it; see the
4070 comment below. */
4071 }
4072 else if (s == htab->sgot)
4073 {
4074 got_size += s->size;
4075 }
4076 else if (s == htab->sgotplt)
4077 {
4078 got_size += s->size;
4079 }
4080 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4081 {
4082 if (s->size != 0 && s != htab->srelplt)
4083 relocs = TRUE;
4084
4085 /* We use the reloc_count field as a counter if we need
4086 to copy relocs into the output file. */
4087 s->reloc_count = 0;
4088 }
4089 else
4090 {
4091 /* It's not one of our sections, so don't allocate space. */
4092 continue;
4093 }
4094
4095 if (s->size == 0)
4096 {
4097 /* If we don't need this section, strip it from the
4098 output file. This is mostly to handle .rela.bss and
4099 .rela.plt. We must create both sections in
4100 create_dynamic_sections, because they must be created
4101 before the linker maps input sections to output
4102 sections. The linker does that before
4103 adjust_dynamic_symbol is called, and it is that
4104 function which decides whether anything needs to go
4105 into these sections. */
4106 s->flags |= SEC_EXCLUDE;
4107 continue;
4108 }
4109
4110 /* Allocate memory for the section contents. We use bfd_zalloc
4111 here in case unused entries are not reclaimed before the
4112 section's contents are written out. This should not happen,
4113 but this way if it does, we get a R_NDS32_NONE reloc instead
4114 of garbage. */
4115 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4116 if (s->contents == NULL)
4117 return FALSE;
4118 }
4119
4120
4121 if (htab->root.dynamic_sections_created)
4122 {
4123 /* Add some entries to the .dynamic section. We fill in the
4124 values later, in nds32_elf_finish_dynamic_sections, but we
4125 must add the entries now so that we get the correct size for
4126 the .dynamic section. The DT_DEBUG entry is filled in by the
4127 dynamic linker and used by the debugger. */
4128 #define add_dynamic_entry(TAG, VAL) \
4129 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4130
4131 if (!bfd_link_pic (info))
4132 {
4133 if (!add_dynamic_entry (DT_DEBUG, 0))
4134 return FALSE;
4135 }
4136
4137 if (htab->splt->size != 0)
4138 {
4139 if (!add_dynamic_entry (DT_PLTGOT, 0)
4140 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4141 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4142 || !add_dynamic_entry (DT_JMPREL, 0))
4143 return FALSE;
4144 }
4145
4146 if (relocs)
4147 {
4148 if (!add_dynamic_entry (DT_RELA, 0)
4149 || !add_dynamic_entry (DT_RELASZ, 0)
4150 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4151 return FALSE;
4152
4153 /* If any dynamic relocs apply to a read-only section,
4154 then we need a DT_TEXTREL entry. */
4155 if ((info->flags & DF_TEXTREL) == 0)
4156 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4157 (void *) info);
4158
4159 if ((info->flags & DF_TEXTREL) != 0)
4160 {
4161 if (!add_dynamic_entry (DT_TEXTREL, 0))
4162 return FALSE;
4163 }
4164 }
4165 }
4166 #undef add_dynamic_entry
4167
4168 return TRUE;
4169 }
4170
4171 static bfd_reloc_status_type
4172 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4173 bfd_vma relocation, bfd_byte *location)
4174 {
4175 int size;
4176 bfd_vma x = 0;
4177 bfd_reloc_status_type flag;
4178 unsigned int rightshift = howto->rightshift;
4179 unsigned int bitpos = howto->bitpos;
4180
4181 /* If the size is negative, negate RELOCATION. This isn't very
4182 general. */
4183 if (howto->size < 0)
4184 relocation = -relocation;
4185
4186 /* Get the value we are going to relocate. */
4187 size = bfd_get_reloc_size (howto);
4188 switch (size)
4189 {
4190 default:
4191 abort ();
4192 break;
4193 case 0:
4194 return bfd_reloc_ok;
4195 case 2:
4196 x = bfd_getb16 (location);
4197 break;
4198 case 4:
4199 x = bfd_getb32 (location);
4200 break;
4201 }
4202
4203 /* Check for overflow. FIXME: We may drop bits during the addition
4204 which we don't check for. We must either check at every single
4205 operation, which would be tedious, or we must do the computations
4206 in a type larger than bfd_vma, which would be inefficient. */
4207 flag = bfd_reloc_ok;
4208 if (howto->complain_on_overflow != complain_overflow_dont)
4209 {
4210 bfd_vma addrmask, fieldmask, signmask, ss;
4211 bfd_vma a, b, sum;
4212
4213 /* Get the values to be added together. For signed and unsigned
4214 relocations, we assume that all values should be truncated to
4215 the size of an address. For bitfields, all the bits matter.
4216 See also bfd_check_overflow. */
4217 fieldmask = N_ONES (howto->bitsize);
4218 signmask = ~fieldmask;
4219 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4220 a = (relocation & addrmask) >> rightshift;
4221 b = (x & howto->src_mask & addrmask) >> bitpos;
4222
4223 switch (howto->complain_on_overflow)
4224 {
4225 case complain_overflow_signed:
4226 /* If any sign bits are set, all sign bits must be set.
4227 That is, A must be a valid negative address after
4228 shifting. */
4229 signmask = ~(fieldmask >> 1);
4230 /* Fall through. */
4231
4232 case complain_overflow_bitfield:
4233 /* Much like the signed check, but for a field one bit
4234 wider. We allow a bitfield to represent numbers in the
4235 range -2**n to 2**n-1, where n is the number of bits in the
4236 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4237 can't overflow, which is exactly what we want. */
4238 ss = a & signmask;
4239 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4240 flag = bfd_reloc_overflow;
4241
4242 /* We only need this next bit of code if the sign bit of B
4243 is below the sign bit of A. This would only happen if
4244 SRC_MASK had fewer bits than BITSIZE. Note that if
4245 SRC_MASK has more bits than BITSIZE, we can get into
4246 trouble; we would need to verify that B is in range, as
4247 we do for A above. */
4248 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4249 ss >>= bitpos;
4250
4251 /* Set all the bits above the sign bit. */
4252 b = (b ^ ss) - ss;
4253
4254 /* Now we can do the addition. */
4255 sum = a + b;
4256
4257 /* See if the result has the correct sign. Bits above the
4258 sign bit are junk now; ignore them. If the sum is
4259 positive, make sure we did not have all negative inputs;
4260 if the sum is negative, make sure we did not have all
4261 positive inputs. The test below looks only at the sign
4262 bits, and it really just
4263 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4264
4265 We mask with addrmask here to explicitly allow an address
4266 wrap-around. The Linux kernel relies on it, and it is
4267 the only way to write assembler code which can run when
4268 loaded at a location 0x80000000 away from the location at
4269 which it is linked. */
4270 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4271 flag = bfd_reloc_overflow;
4272
4273 break;
4274
4275 case complain_overflow_unsigned:
4276 /* Checking for an unsigned overflow is relatively easy:
4277 trim the addresses and add, and trim the result as well.
4278 Overflow is normally indicated when the result does not
4279 fit in the field. However, we also need to consider the
4280 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4281 input is 0x80000000, and bfd_vma is only 32 bits; then we
4282 will get sum == 0, but there is an overflow, since the
4283 inputs did not fit in the field. Instead of doing a
4284 separate test, we can check for this by or-ing in the
4285 operands when testing for the sum overflowing its final
4286 field. */
4287 sum = (a + b) & addrmask;
4288 if ((a | b | sum) & signmask)
4289 flag = bfd_reloc_overflow;
4290 break;
4291
4292 default:
4293 abort ();
4294 }
4295 }
4296
4297 /* Put RELOCATION in the right bits. */
4298 relocation >>= (bfd_vma) rightshift;
4299 relocation <<= (bfd_vma) bitpos;
4300
4301 /* Add RELOCATION to the right bits of X. */
4302 /* FIXME : 090616
4303 Because the relaxation may generate duplicate relocation at one address,
4304 an addition to immediate in the instruction may cause the relocation added
4305 several times.
4306 This bug should be fixed in assembler, but a check is also needed here. */
4307 if (howto->partial_inplace)
4308 x = ((x & ~howto->dst_mask)
4309 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4310 else
4311 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4312
4313
4314 /* Put the relocated value back in the object file. */
4315 switch (size)
4316 {
4317 default:
4318 case 0:
4319 case 1:
4320 case 8:
4321 abort ();
4322 break;
4323 case 2:
4324 bfd_putb16 (x, location);
4325 break;
4326 case 4:
4327 bfd_putb32 (x, location);
4328 break;
4329 }
4330
4331 return flag;
4332 }
4333
4334 static bfd_reloc_status_type
4335 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4336 asection *input_section, bfd_byte *contents,
4337 bfd_vma address, bfd_vma value, bfd_vma addend)
4338 {
4339 bfd_vma relocation;
4340
4341 /* Sanity check the address. */
4342 if (address > bfd_get_section_limit (input_bfd, input_section))
4343 return bfd_reloc_outofrange;
4344
4345 /* This function assumes that we are dealing with a basic relocation
4346 against a symbol. We want to compute the value of the symbol to
4347 relocate to. This is just VALUE, the value of the symbol, plus
4348 ADDEND, any addend associated with the reloc. */
4349 relocation = value + addend;
4350
4351 /* If the relocation is PC relative, we want to set RELOCATION to
4352 the distance between the symbol (currently in RELOCATION) and the
4353 location we are relocating. Some targets (e.g., i386-aout)
4354 arrange for the contents of the section to be the negative of the
4355 offset of the location within the section; for such targets
4356 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4357 simply leave the contents of the section as zero; for such
4358 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4359 need to subtract out the offset of the location within the
4360 section (which is just ADDRESS). */
4361 if (howto->pc_relative)
4362 {
4363 relocation -= (input_section->output_section->vma
4364 + input_section->output_offset);
4365 if (howto->pcrel_offset)
4366 relocation -= address;
4367 }
4368
4369 return nds32_relocate_contents (howto, input_bfd, relocation,
4370 contents + address);
4371 }
4372
4373 static bfd_boolean
4374 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4375 const char *name,
4376 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4377 asection *input_sec,
4378 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4379 {
4380 const char *source;
4381 FILE *sym_ld_script = NULL;
4382 struct elf_nds32_link_hash_table *table;
4383
4384 table = nds32_elf_hash_table (info);
4385 sym_ld_script = table->sym_ld_script;
4386 if (!sym_ld_script)
4387 return TRUE;
4388
4389 if (!h || !name || *name == '\0')
4390 return TRUE;
4391
4392 if (input_sec->flags & SEC_EXCLUDE)
4393 return TRUE;
4394
4395 if (!check_start_export_sym)
4396 {
4397 fprintf (sym_ld_script, "SECTIONS\n{\n");
4398 check_start_export_sym = 1;
4399 }
4400
4401 if (h->root.type == bfd_link_hash_defined
4402 || h->root.type == bfd_link_hash_defweak)
4403 {
4404 if (!h->root.u.def.section->output_section)
4405 return TRUE;
4406
4407 if (bfd_is_const_section (input_sec))
4408 source = input_sec->name;
4409 else
4410 source = input_sec->owner->filename;
4411
4412 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4413 h->root.root.string,
4414 (long) (h->root.u.def.value
4415 + h->root.u.def.section->output_section->vma
4416 + h->root.u.def.section->output_offset), source);
4417 }
4418
4419 return TRUE;
4420 }
4421
4422 /* Relocate an NDS32/D ELF section.
4423 There is some attempt to make this function usable for many architectures,
4424 both for RELA and REL type relocs, if only to serve as a learning tool.
4425
4426 The RELOCATE_SECTION function is called by the new ELF backend linker
4427 to handle the relocations for a section.
4428
4429 The relocs are always passed as Rela structures; if the section
4430 actually uses Rel structures, the r_addend field will always be
4431 zero.
4432
4433 This function is responsible for adjust the section contents as
4434 necessary, and (if using Rela relocs and generating a
4435 relocatable output file) adjusting the reloc addend as
4436 necessary.
4437
4438 This function does not have to worry about setting the reloc
4439 address or the reloc symbol index.
4440
4441 LOCAL_SYMS is a pointer to the swapped in local symbols.
4442
4443 LOCAL_SECTIONS is an array giving the section in the input file
4444 corresponding to the st_shndx field of each local symbol.
4445
4446 The global hash table entry for the global symbols can be found
4447 via elf_sym_hashes (input_bfd).
4448
4449 When generating relocatable output, this function must handle
4450 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4451 going to be the section symbol corresponding to the output
4452 section, which means that the addend must be adjusted
4453 accordingly. */
4454
4455 static bfd_vma
4456 dtpoff_base (struct bfd_link_info *info)
4457 {
4458 /* If tls_sec is NULL, we should have signalled an error already. */
4459 if (elf_hash_table (info)->tls_sec == NULL)
4460 return 0;
4461 return elf_hash_table (info)->tls_sec->vma;
4462 }
4463
4464 static bfd_boolean
4465 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4466 struct bfd_link_info * info,
4467 bfd * input_bfd,
4468 asection * input_section,
4469 bfd_byte * contents,
4470 Elf_Internal_Rela * relocs,
4471 Elf_Internal_Sym * local_syms,
4472 asection ** local_sections)
4473 {
4474 Elf_Internal_Shdr *symtab_hdr;
4475 struct elf_link_hash_entry **sym_hashes;
4476 Elf_Internal_Rela *rel, *relend;
4477 bfd_boolean ret = TRUE; /* Assume success. */
4478 int align = 0;
4479 bfd_reloc_status_type r;
4480 const char *errmsg = NULL;
4481 bfd_vma gp;
4482 struct elf_nds32_link_hash_table *htab;
4483 bfd *dynobj;
4484 bfd_vma *local_got_offsets;
4485 asection *sgot, *splt, *sreloc;
4486 bfd_vma high_address;
4487 struct elf_nds32_link_hash_table *table;
4488 int eliminate_gc_relocs;
4489 bfd_vma fpbase_addr;
4490
4491 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4492 sym_hashes = elf_sym_hashes (input_bfd);
4493 htab = nds32_elf_hash_table (info);
4494 high_address = bfd_get_section_limit (input_bfd, input_section);
4495
4496 dynobj = htab->root.dynobj;
4497 local_got_offsets = elf_local_got_offsets (input_bfd);
4498
4499 sgot = htab->sgot;
4500 splt = htab->splt;
4501 sreloc = NULL;
4502
4503 rel = relocs;
4504 relend = relocs + input_section->reloc_count;
4505
4506 table = nds32_elf_hash_table (info);
4507 eliminate_gc_relocs = table->eliminate_gc_relocs;
4508 /* By this time, we can adjust the value of _SDA_BASE_. */
4509 if ((!bfd_link_relocatable (info)))
4510 {
4511 is_SDA_BASE_set = 1;
4512 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4513 if (r != bfd_reloc_ok)
4514 return FALSE;
4515 }
4516
4517 if (is_ITB_BASE_set == 0)
4518 {
4519 /* Set the _ITB_BASE_. */
4520 if (!nds32_elf_ex9_itb_base (info))
4521 {
4522 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"),
4523 output_bfd);
4524 bfd_set_error (bfd_error_bad_value);
4525 }
4526 }
4527
4528 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4529 if (!nds32_elf_ifc_reloc ())
4530 (*_bfd_error_handler) (_("error: IFC relocation error."));
4531
4532 /* Relocation for .ex9.itable. */
4533 if (table->target_optimize & NDS32_RELAX_EX9_ON
4534 || (table->ex9_import_file && table->update_ex9_table))
4535 nds32_elf_ex9_reloc_jmp (info);
4536
4537 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4538 the fp value is set as gp, and it has be reverted for instruction
4539 setting fp. */
4540 fpbase_addr = elf_gp (output_bfd);
4541
4542 for (rel = relocs; rel < relend; rel++)
4543 {
4544 enum elf_nds32_reloc_type r_type;
4545 reloc_howto_type *howto = NULL;
4546 unsigned long r_symndx;
4547 struct elf_link_hash_entry *h = NULL;
4548 Elf_Internal_Sym *sym = NULL;
4549 asection *sec;
4550 bfd_vma relocation;
4551
4552 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4553 ensure it's zero (we use REL relocs, not RELA). Therefore this
4554 should be assigning zero to `addend', but for clarity we use
4555 `r_addend'. */
4556
4557 bfd_vma addend = rel->r_addend;
4558 bfd_vma offset = rel->r_offset;
4559
4560 r_type = ELF32_R_TYPE (rel->r_info);
4561 if (r_type >= R_NDS32_max)
4562 {
4563 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4564 input_bfd, r_type);
4565 bfd_set_error (bfd_error_bad_value);
4566 ret = FALSE;
4567 continue;
4568 }
4569
4570 if (r_type == R_NDS32_GNU_VTENTRY
4571 || r_type == R_NDS32_GNU_VTINHERIT
4572 || r_type == R_NDS32_NONE
4573 || r_type == R_NDS32_RELA_GNU_VTENTRY
4574 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4575 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4576 || r_type == R_NDS32_DATA
4577 || r_type == R_NDS32_TRAN
4578 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
4579 continue;
4580
4581 /* If we enter the fp-as-gp region. Resolve the address
4582 of best fp-base. */
4583 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4584 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4585 {
4586 int dist;
4587
4588 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4589 dist = rel->r_addend >> 16;
4590 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4591 local_syms, symtab_hdr);
4592 }
4593 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4594 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4595 {
4596 fpbase_addr = elf_gp (output_bfd);
4597 }
4598
4599 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4600 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4601 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
4602 continue;
4603
4604 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4605 r_symndx = ELF32_R_SYM (rel->r_info);
4606
4607 /* This is a final link. */
4608 sym = NULL;
4609 sec = NULL;
4610 h = NULL;
4611
4612 if (r_symndx < symtab_hdr->sh_info)
4613 {
4614 /* Local symbol. */
4615 sym = local_syms + r_symndx;
4616 sec = local_sections[r_symndx];
4617
4618 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4619 addend = rel->r_addend;
4620 }
4621 else
4622 {
4623 /* External symbol. */
4624 bfd_boolean warned, ignored, unresolved_reloc;
4625 int symndx = r_symndx - symtab_hdr->sh_info;
4626
4627 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4628 r_symndx, symtab_hdr, sym_hashes, h, sec,
4629 relocation, unresolved_reloc, warned,
4630 ignored);
4631
4632 /* la $fp, _FP_BASE_ is per-function (region).
4633 Handle it specially. */
4634 switch ((int) r_type)
4635 {
4636 case R_NDS32_SDA19S0_RELA:
4637 case R_NDS32_SDA15S0_RELA:
4638 case R_NDS32_20_RELA:
4639 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4640 FP_BASE_NAME) == 0)
4641 {
4642 relocation = fpbase_addr;
4643 break;
4644 }
4645 }
4646
4647 }
4648
4649 if (bfd_link_relocatable (info))
4650 {
4651 /* This is a relocatable link. We don't have to change
4652 anything, unless the reloc is against a section symbol,
4653 in which case we have to adjust according to where the
4654 section symbol winds up in the output section. */
4655 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4656 rel->r_addend += sec->output_offset + sym->st_value;
4657
4658 continue;
4659 }
4660
4661 /* Sanity check the address. */
4662 if (offset > high_address)
4663 {
4664 r = bfd_reloc_outofrange;
4665 goto check_reloc;
4666 }
4667
4668 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4669 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4670 || r_type >= R_NDS32_RELAX_ENTRY)
4671 continue;
4672
4673 switch ((int) r_type)
4674 {
4675 case R_NDS32_GOTOFF:
4676 /* Relocation is relative to the start of the global offset
4677 table (for ld24 rx, #uimm24), e.g. access at label+addend
4678
4679 ld24 rx. #label@GOTOFF + addend
4680 sub rx, r12. */
4681 case R_NDS32_GOTOFF_HI20:
4682 case R_NDS32_GOTOFF_LO12:
4683 case R_NDS32_GOTOFF_LO15:
4684 case R_NDS32_GOTOFF_LO19:
4685 BFD_ASSERT (sgot != NULL);
4686
4687 relocation -= elf_gp (output_bfd);
4688 break;
4689
4690 case R_NDS32_9_PLTREL:
4691 case R_NDS32_25_PLTREL:
4692 /* Relocation is to the entry for this symbol in the
4693 procedure linkage table. */
4694
4695 /* The native assembler will generate a 25_PLTREL reloc
4696 for a local symbol if you assemble a call from one
4697 section to another when using -K pic. */
4698 if (h == NULL)
4699 break;
4700
4701 if (h->forced_local)
4702 break;
4703
4704 /* We didn't make a PLT entry for this symbol. This
4705 happens when statically linking PIC code, or when
4706 using -Bsymbolic. */
4707 if (h->plt.offset == (bfd_vma) - 1)
4708 break;
4709
4710 relocation = (splt->output_section->vma
4711 + splt->output_offset + h->plt.offset);
4712 break;
4713
4714 case R_NDS32_PLT_GOTREL_HI20:
4715 case R_NDS32_PLT_GOTREL_LO12:
4716 case R_NDS32_PLT_GOTREL_LO15:
4717 case R_NDS32_PLT_GOTREL_LO19:
4718 case R_NDS32_PLT_GOTREL_LO20:
4719 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4720 {
4721 /* We didn't make a PLT entry for this symbol. This
4722 happens when statically linking PIC code, or when
4723 using -Bsymbolic. */
4724 relocation -= elf_gp (output_bfd);
4725 break;
4726 }
4727
4728 relocation = (splt->output_section->vma
4729 + splt->output_offset + h->plt.offset);
4730
4731 relocation -= elf_gp (output_bfd);
4732 break;
4733
4734 case R_NDS32_PLTREL_HI20:
4735 case R_NDS32_PLTREL_LO12:
4736
4737 /* Relocation is to the entry for this symbol in the
4738 procedure linkage table. */
4739
4740 /* The native assembler will generate a 25_PLTREL reloc
4741 for a local symbol if you assemble a call from one
4742 section to another when using -K pic. */
4743 if (h == NULL)
4744 break;
4745
4746 if (h->forced_local)
4747 break;
4748
4749 if (h->plt.offset == (bfd_vma) - 1)
4750 /* We didn't make a PLT entry for this symbol. This
4751 happens when statically linking PIC code, or when
4752 using -Bsymbolic. */
4753 break;
4754
4755 if (splt == NULL)
4756 break;
4757
4758 relocation = (splt->output_section->vma
4759 + splt->output_offset
4760 + h->plt.offset + 4)
4761 - (input_section->output_section->vma
4762 + input_section->output_offset
4763 + rel->r_offset);
4764
4765 break;
4766
4767 case R_NDS32_GOTPC20:
4768 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4769 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4770 relocation = elf_gp (output_bfd);
4771 break;
4772
4773 case R_NDS32_GOTPC_HI20:
4774 case R_NDS32_GOTPC_LO12:
4775 {
4776 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4777 bl .+4
4778 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4779 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4780 or
4781 bl .+4
4782 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4783 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4784 */
4785 relocation = elf_gp (output_bfd);
4786 relocation -= (input_section->output_section->vma
4787 + input_section->output_offset + rel->r_offset);
4788 break;
4789 }
4790
4791 case R_NDS32_GOT20:
4792 /* Fall through. */
4793 case R_NDS32_GOT_HI20:
4794 case R_NDS32_GOT_LO12:
4795 case R_NDS32_GOT_LO15:
4796 case R_NDS32_GOT_LO19:
4797 /* Relocation is to the entry for this symbol in the global
4798 offset table. */
4799 BFD_ASSERT (sgot != NULL);
4800
4801 if (h != NULL)
4802 {
4803 bfd_boolean dyn;
4804 bfd_vma off;
4805
4806 off = h->got.offset;
4807 BFD_ASSERT (off != (bfd_vma) - 1);
4808 dyn = htab->root.dynamic_sections_created;
4809 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4810 bfd_link_pic (info),
4811 h)
4812 || (bfd_link_pic (info)
4813 && (info->symbolic
4814 || h->dynindx == -1
4815 || h->forced_local) && h->def_regular))
4816 {
4817 /* This is actually a static link, or it is a
4818 -Bsymbolic link and the symbol is defined
4819 locally, or the symbol was forced to be local
4820 because of a version file. We must initialize
4821 this entry in the global offset table. Since the
4822 offset must always be a multiple of 4, we use the
4823 least significant bit to record whether we have
4824 initialized it already.
4825
4826 When doing a dynamic link, we create a .rela.got
4827 relocation entry to initialize the value. This
4828 is done in the finish_dynamic_symbol routine. */
4829 if ((off & 1) != 0)
4830 off &= ~1;
4831 else
4832 {
4833 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4834 h->got.offset |= 1;
4835 }
4836 }
4837 relocation = sgot->output_section->vma + sgot->output_offset + off
4838 - elf_gp (output_bfd);
4839 }
4840 else
4841 {
4842 bfd_vma off;
4843 bfd_byte *loc;
4844
4845 BFD_ASSERT (local_got_offsets != NULL
4846 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4847
4848 off = local_got_offsets[r_symndx];
4849
4850 /* The offset must always be a multiple of 4. We use
4851 the least significant bit to record whether we have
4852 already processed this entry. */
4853 if ((off & 1) != 0)
4854 off &= ~1;
4855 else
4856 {
4857 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4858
4859 if (bfd_link_pic (info))
4860 {
4861 asection *srelgot;
4862 Elf_Internal_Rela outrel;
4863
4864 /* We need to generate a R_NDS32_RELATIVE reloc
4865 for the dynamic linker. */
4866 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4867 BFD_ASSERT (srelgot != NULL);
4868
4869 outrel.r_offset = (elf_gp (output_bfd)
4870 + sgot->output_offset + off);
4871 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4872 outrel.r_addend = relocation;
4873 loc = srelgot->contents;
4874 loc +=
4875 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4876 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4877 ++srelgot->reloc_count;
4878 }
4879 local_got_offsets[r_symndx] |= 1;
4880 }
4881 relocation = sgot->output_section->vma + sgot->output_offset + off
4882 - elf_gp (output_bfd);
4883 }
4884
4885 break;
4886
4887 case R_NDS32_16_RELA:
4888 case R_NDS32_20_RELA:
4889 case R_NDS32_5_RELA:
4890 case R_NDS32_32_RELA:
4891 case R_NDS32_9_PCREL_RELA:
4892 case R_NDS32_WORD_9_PCREL_RELA:
4893 case R_NDS32_10_UPCREL_RELA:
4894 case R_NDS32_15_PCREL_RELA:
4895 case R_NDS32_17_PCREL_RELA:
4896 case R_NDS32_25_PCREL_RELA:
4897 case R_NDS32_HI20_RELA:
4898 case R_NDS32_LO12S3_RELA:
4899 case R_NDS32_LO12S2_RELA:
4900 case R_NDS32_LO12S2_DP_RELA:
4901 case R_NDS32_LO12S2_SP_RELA:
4902 case R_NDS32_LO12S1_RELA:
4903 case R_NDS32_LO12S0_RELA:
4904 case R_NDS32_LO12S0_ORI_RELA:
4905 if (bfd_link_pic (info) && r_symndx != 0
4906 && (input_section->flags & SEC_ALLOC) != 0
4907 && (eliminate_gc_relocs == 0
4908 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4909 && ((r_type != R_NDS32_9_PCREL_RELA
4910 && r_type != R_NDS32_WORD_9_PCREL_RELA
4911 && r_type != R_NDS32_10_UPCREL_RELA
4912 && r_type != R_NDS32_15_PCREL_RELA
4913 && r_type != R_NDS32_17_PCREL_RELA
4914 && r_type != R_NDS32_25_PCREL_RELA
4915 && !(r_type == R_NDS32_32_RELA
4916 && strcmp (input_section->name, ".eh_frame") == 0))
4917 || (h != NULL && h->dynindx != -1
4918 && (!info->symbolic || !h->def_regular))))
4919 {
4920 Elf_Internal_Rela outrel;
4921 bfd_boolean skip, relocate;
4922 bfd_byte *loc;
4923
4924 /* When generating a shared object, these relocations
4925 are copied into the output file to be resolved at run
4926 time. */
4927
4928 if (sreloc == NULL)
4929 {
4930 const char *name;
4931
4932 name = bfd_elf_string_from_elf_section
4933 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4934 elf_section_data (input_section)->rela.hdr->sh_name);
4935 if (name == NULL)
4936 return FALSE;
4937
4938 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4939 && strcmp (bfd_get_section_name (input_bfd,
4940 input_section),
4941 name + 5) == 0);
4942
4943 sreloc = bfd_get_section_by_name (dynobj, name);
4944 BFD_ASSERT (sreloc != NULL);
4945 }
4946
4947 skip = FALSE;
4948 relocate = FALSE;
4949
4950 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4951 info,
4952 input_section,
4953 rel->r_offset);
4954 if (outrel.r_offset == (bfd_vma) - 1)
4955 skip = TRUE;
4956 else if (outrel.r_offset == (bfd_vma) - 2)
4957 skip = TRUE, relocate = TRUE;
4958 outrel.r_offset += (input_section->output_section->vma
4959 + input_section->output_offset);
4960
4961 if (skip)
4962 memset (&outrel, 0, sizeof outrel);
4963 else if (r_type == R_NDS32_17_PCREL_RELA
4964 || r_type == R_NDS32_15_PCREL_RELA
4965 || r_type == R_NDS32_25_PCREL_RELA)
4966 {
4967 BFD_ASSERT (h != NULL && h->dynindx != -1);
4968 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4969 outrel.r_addend = rel->r_addend;
4970 }
4971 else
4972 {
4973 /* h->dynindx may be -1 if this symbol was marked to
4974 become local. */
4975 if (h == NULL
4976 || ((info->symbolic || h->dynindx == -1)
4977 && h->def_regular))
4978 {
4979 relocate = TRUE;
4980 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4981 outrel.r_addend = relocation + rel->r_addend;
4982 }
4983 else
4984 {
4985 BFD_ASSERT (h->dynindx != -1);
4986 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4987 outrel.r_addend = rel->r_addend;
4988 }
4989 }
4990
4991 loc = sreloc->contents;
4992 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4993 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4994 ++sreloc->reloc_count;
4995
4996 /* If this reloc is against an external symbol, we do
4997 not want to fiddle with the addend. Otherwise, we
4998 need to include the symbol value so that it becomes
4999 an addend for the dynamic reloc. */
5000 if (!relocate)
5001 continue;
5002 }
5003 break;
5004
5005 case R_NDS32_25_ABS_RELA:
5006 if (bfd_link_pic (info))
5007 {
5008 (*_bfd_error_handler)
5009 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5010 "mode."), bfd_get_filename (input_bfd));
5011 return FALSE;
5012 }
5013 break;
5014
5015 case R_NDS32_9_PCREL:
5016 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5017 contents, offset,
5018 sec, relocation, addend);
5019 goto check_reloc;
5020
5021 case R_NDS32_HI20:
5022 {
5023 Elf_Internal_Rela *lorel;
5024
5025 /* We allow an arbitrary number of HI20 relocs before the
5026 LO12 reloc. This permits gcc to emit the HI and LO relocs
5027 itself. */
5028 for (lorel = rel + 1;
5029 (lorel < relend
5030 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5031 continue;
5032 if (lorel < relend
5033 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5034 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5035 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5036 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5037 {
5038 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5039 contents, relocation + addend);
5040 r = bfd_reloc_ok;
5041 }
5042 else
5043 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5044 contents, offset, relocation,
5045 addend);
5046 }
5047
5048 goto check_reloc;
5049
5050 case R_NDS32_GOT17S2_RELA:
5051 case R_NDS32_GOT15S2_RELA:
5052 {
5053 bfd_vma off;
5054
5055 BFD_ASSERT (sgot != NULL);
5056
5057 if (h != NULL)
5058 {
5059 bfd_boolean dyn;
5060
5061 off = h->got.offset;
5062 BFD_ASSERT (off != (bfd_vma) - 1);
5063
5064 dyn = htab->root.dynamic_sections_created;
5065 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5066 (dyn, bfd_link_pic (info), h)
5067 || (bfd_link_pic (info)
5068 && (info->symbolic
5069 || h->dynindx == -1
5070 || h->forced_local)
5071 && h->def_regular))
5072 {
5073 /* This is actually a static link, or it is a
5074 -Bsymbolic link and the symbol is defined
5075 locally, or the symbol was forced to be local
5076 because of a version file. We must initialize
5077 this entry in the global offset table. Since the
5078 offset must always be a multiple of 4, we use the
5079 least significant bit to record whether we have
5080 initialized it already.
5081
5082 When doing a dynamic link, we create a .rela.got
5083 relocation entry to initialize the value. This
5084 is done in the finish_dynamic_symbol routine. */
5085 if ((off & 1) != 0)
5086 off &= ~1;
5087 else
5088 {
5089 bfd_put_32 (output_bfd, relocation,
5090 sgot->contents + off);
5091 h->got.offset |= 1;
5092 }
5093 }
5094 }
5095 else
5096 {
5097 bfd_byte *loc;
5098
5099 BFD_ASSERT (local_got_offsets != NULL
5100 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5101
5102 off = local_got_offsets[r_symndx];
5103
5104 /* The offset must always be a multiple of 4. We use
5105 the least significant bit to record whether we have
5106 already processed this entry. */
5107 if ((off & 1) != 0)
5108 off &= ~1;
5109 else
5110 {
5111 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5112
5113 if (bfd_link_pic (info))
5114 {
5115 asection *srelgot;
5116 Elf_Internal_Rela outrel;
5117
5118 /* We need to generate a R_NDS32_RELATIVE reloc
5119 for the dynamic linker. */
5120 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5121 BFD_ASSERT (srelgot != NULL);
5122
5123 outrel.r_offset = (elf_gp (output_bfd)
5124 + sgot->output_offset + off);
5125 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5126 outrel.r_addend = relocation;
5127 loc = srelgot->contents;
5128 loc +=
5129 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5130 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5131 ++srelgot->reloc_count;
5132 }
5133 local_got_offsets[r_symndx] |= 1;
5134 }
5135 }
5136 relocation = sgot->output_section->vma + sgot->output_offset + off
5137 - elf_gp (output_bfd);
5138 }
5139 if (relocation & align)
5140 {
5141 /* Incorrect alignment. */
5142 (*_bfd_error_handler)
5143 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5144 ret = FALSE;
5145 r = bfd_reloc_dangerous;
5146 goto check_reloc;
5147 }
5148 break;
5149
5150 case R_NDS32_SDA16S3_RELA:
5151 case R_NDS32_SDA15S3_RELA:
5152 case R_NDS32_SDA15S3:
5153 align = 0x7;
5154 goto handle_sda;
5155
5156 case R_NDS32_SDA17S2_RELA:
5157 case R_NDS32_SDA15S2_RELA:
5158 case R_NDS32_SDA12S2_SP_RELA:
5159 case R_NDS32_SDA12S2_DP_RELA:
5160 case R_NDS32_SDA15S2:
5161 case R_NDS32_SDA_FP7U2_RELA:
5162 align = 0x3;
5163 goto handle_sda;
5164
5165 case R_NDS32_SDA18S1_RELA:
5166 case R_NDS32_SDA15S1_RELA:
5167 case R_NDS32_SDA15S1:
5168 align = 0x1;
5169 goto handle_sda;
5170
5171 case R_NDS32_SDA19S0_RELA:
5172 case R_NDS32_SDA15S0_RELA:
5173 case R_NDS32_SDA15S0:
5174 {
5175 align = 0x0;
5176 handle_sda:
5177 BFD_ASSERT (sec != NULL);
5178
5179 /* If the symbol is in the abs section, the out_bfd will be null.
5180 This happens when the relocation has a symbol@GOTOFF. */
5181 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5182 if (r != bfd_reloc_ok)
5183 {
5184 (*_bfd_error_handler)
5185 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5186 ret = FALSE;
5187 goto check_reloc;
5188 }
5189
5190 /* At this point `relocation' contains the object's
5191 address. */
5192 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5193 {
5194 relocation -= fpbase_addr;
5195 }
5196 else
5197 relocation -= gp;
5198 /* Now it contains the offset from _SDA_BASE_. */
5199
5200 /* Make sure alignment is correct. */
5201
5202 if (relocation & align)
5203 {
5204 /* Incorrect alignment. */
5205 (*_bfd_error_handler)
5206 (_("%B(%A): warning: unaligned small data access of type %d."),
5207 input_bfd, input_section, r_type);
5208 ret = FALSE;
5209 goto check_reloc;
5210 }
5211 }
5212
5213 break;
5214 case R_NDS32_17IFC_PCREL_RELA:
5215 case R_NDS32_10IFCU_PCREL_RELA:
5216 /* do nothing */
5217 break;
5218
5219 case R_NDS32_TLS_LE_HI20:
5220 case R_NDS32_TLS_LE_LO12:
5221 case R_NDS32_TLS_LE_20:
5222 case R_NDS32_TLS_LE_15S0:
5223 case R_NDS32_TLS_LE_15S1:
5224 case R_NDS32_TLS_LE_15S2:
5225 if (elf_hash_table (info)->tls_sec != NULL)
5226 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5227 break;
5228 case R_NDS32_TLS_IE_HI20:
5229 case R_NDS32_TLS_IE_LO12S2:
5230 {
5231 /* Relocation is to the entry for this symbol in the global
5232 offset table. */
5233 unsigned int tls_type;
5234 asection *srelgot;
5235 Elf_Internal_Rela outrel;
5236 bfd_vma off;
5237 bfd_byte *loc;
5238 int indx = 0;
5239
5240 BFD_ASSERT (sgot != NULL);
5241 if (h != NULL)
5242 {
5243 bfd_boolean dyn;
5244
5245 off = h->got.offset;
5246 BFD_ASSERT (off != (bfd_vma) - 1);
5247 dyn = htab->root.dynamic_sections_created;
5248 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5249 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5250 && (!bfd_link_pic (info)
5251 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5252 indx = h->dynindx;
5253 }
5254 else
5255 {
5256 /* Never happen currently. */
5257 BFD_ASSERT (local_got_offsets != NULL
5258 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5259
5260 off = local_got_offsets[r_symndx];
5261
5262 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5263 }
5264 relocation = sgot->output_section->vma + sgot->output_offset + off;
5265
5266 if (r_type == R_NDS32_TLS_IE_LO12S2)
5267 break;
5268
5269 /* The offset must always be a multiple of 4. We use
5270 the least significant bit to record whether we have
5271 already processed this entry. */
5272 if ((off & 1) != 0)
5273 off &= ~1;
5274 else
5275 {
5276 bfd_boolean need_relocs = FALSE;
5277 srelgot = htab->srelgot;
5278 if ((bfd_link_pic (info) || indx != 0)
5279 && (h == NULL
5280 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5281 || h->root.type != bfd_link_hash_undefweak))
5282 {
5283 need_relocs = TRUE;
5284 BFD_ASSERT (srelgot != NULL);
5285 }
5286 if (tls_type & GOT_TLS_IE)
5287 {
5288 if (need_relocs)
5289 {
5290 if (h->dynindx == 0)
5291 outrel.r_addend = relocation - dtpoff_base (info);
5292 else
5293 outrel.r_addend = 0;
5294 outrel.r_offset = (sgot->output_section->vma
5295 + sgot->output_offset
5296 + off);
5297 outrel.r_info =
5298 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5299
5300 loc = srelgot->contents;
5301 loc +=
5302 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5303 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5304 ++srelgot->reloc_count;
5305 }
5306 else
5307 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5308 sgot->contents + off);
5309 }
5310 }
5311 }
5312 break;
5313
5314 /* DON'T fall through. */
5315
5316 default:
5317 /* OLD_NDS32_RELOC. */
5318
5319 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5320 contents, offset, relocation, addend);
5321 goto check_reloc;
5322 }
5323
5324 switch ((int) r_type)
5325 {
5326 case R_NDS32_20_RELA:
5327 case R_NDS32_5_RELA:
5328 case R_NDS32_9_PCREL_RELA:
5329 case R_NDS32_WORD_9_PCREL_RELA:
5330 case R_NDS32_10_UPCREL_RELA:
5331 case R_NDS32_15_PCREL_RELA:
5332 case R_NDS32_17_PCREL_RELA:
5333 case R_NDS32_25_PCREL_RELA:
5334 case R_NDS32_25_ABS_RELA:
5335 case R_NDS32_HI20_RELA:
5336 case R_NDS32_LO12S3_RELA:
5337 case R_NDS32_LO12S2_RELA:
5338 case R_NDS32_LO12S2_DP_RELA:
5339 case R_NDS32_LO12S2_SP_RELA:
5340 case R_NDS32_LO12S1_RELA:
5341 case R_NDS32_LO12S0_RELA:
5342 case R_NDS32_LO12S0_ORI_RELA:
5343 case R_NDS32_SDA16S3_RELA:
5344 case R_NDS32_SDA17S2_RELA:
5345 case R_NDS32_SDA18S1_RELA:
5346 case R_NDS32_SDA19S0_RELA:
5347 case R_NDS32_SDA15S3_RELA:
5348 case R_NDS32_SDA15S2_RELA:
5349 case R_NDS32_SDA12S2_DP_RELA:
5350 case R_NDS32_SDA12S2_SP_RELA:
5351 case R_NDS32_SDA15S1_RELA:
5352 case R_NDS32_SDA15S0_RELA:
5353 case R_NDS32_SDA_FP7U2_RELA:
5354 case R_NDS32_9_PLTREL:
5355 case R_NDS32_25_PLTREL:
5356 case R_NDS32_GOT20:
5357 case R_NDS32_GOT_HI20:
5358 case R_NDS32_GOT_LO12:
5359 case R_NDS32_GOT_LO15:
5360 case R_NDS32_GOT_LO19:
5361 case R_NDS32_GOT15S2_RELA:
5362 case R_NDS32_GOT17S2_RELA:
5363 case R_NDS32_GOTPC20:
5364 case R_NDS32_GOTPC_HI20:
5365 case R_NDS32_GOTPC_LO12:
5366 case R_NDS32_GOTOFF:
5367 case R_NDS32_GOTOFF_HI20:
5368 case R_NDS32_GOTOFF_LO12:
5369 case R_NDS32_GOTOFF_LO15:
5370 case R_NDS32_GOTOFF_LO19:
5371 case R_NDS32_PLTREL_HI20:
5372 case R_NDS32_PLTREL_LO12:
5373 case R_NDS32_PLT_GOTREL_HI20:
5374 case R_NDS32_PLT_GOTREL_LO12:
5375 case R_NDS32_PLT_GOTREL_LO15:
5376 case R_NDS32_PLT_GOTREL_LO19:
5377 case R_NDS32_PLT_GOTREL_LO20:
5378 case R_NDS32_17IFC_PCREL_RELA:
5379 case R_NDS32_10IFCU_PCREL_RELA:
5380 case R_NDS32_TLS_LE_HI20:
5381 case R_NDS32_TLS_LE_LO12:
5382 case R_NDS32_TLS_IE_HI20:
5383 case R_NDS32_TLS_IE_LO12S2:
5384 case R_NDS32_TLS_LE_20:
5385 case R_NDS32_TLS_LE_15S0:
5386 case R_NDS32_TLS_LE_15S1:
5387 case R_NDS32_TLS_LE_15S2:
5388 /* Instruction related relocs must handle endian properly. */
5389 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
5390 r = nds32_elf_final_link_relocate (howto, input_bfd,
5391 input_section, contents,
5392 rel->r_offset, relocation,
5393 rel->r_addend);
5394 break;
5395
5396 default:
5397 /* All other relocs can use default handler. */
5398 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5399 contents, rel->r_offset,
5400 relocation, rel->r_addend);
5401 break;
5402 }
5403
5404 check_reloc:
5405
5406 if (r != bfd_reloc_ok)
5407 {
5408 /* FIXME: This should be generic enough to go in a utility. */
5409 const char *name;
5410
5411 if (h != NULL)
5412 name = h->root.root.string;
5413 else
5414 {
5415 name = bfd_elf_string_from_elf_section
5416 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5417 if (name == NULL || *name == '\0')
5418 name = bfd_section_name (input_bfd, sec);
5419 }
5420
5421 if (errmsg != NULL)
5422 goto common_error;
5423
5424 switch (r)
5425 {
5426 case bfd_reloc_overflow:
5427 if (!((*info->callbacks->reloc_overflow)
5428 (info, (h ? &h->root : NULL), name, howto->name,
5429 (bfd_vma) 0, input_bfd, input_section, offset)))
5430 return FALSE;
5431 break;
5432
5433 case bfd_reloc_undefined:
5434 if (!((*info->callbacks->undefined_symbol)
5435 (info, name, input_bfd, input_section, offset, TRUE)))
5436 return FALSE;
5437 break;
5438
5439 case bfd_reloc_outofrange:
5440 errmsg = _("internal error: out of range error");
5441 goto common_error;
5442
5443 case bfd_reloc_notsupported:
5444 errmsg = _("internal error: unsupported relocation error");
5445 goto common_error;
5446
5447 case bfd_reloc_dangerous:
5448 errmsg = _("internal error: dangerous error");
5449 goto common_error;
5450
5451 default:
5452 errmsg = _("internal error: unknown error");
5453 /* Fall through. */
5454
5455 common_error:
5456 if (!((*info->callbacks->warning)
5457 (info, errmsg, name, input_bfd, input_section, offset)))
5458 return FALSE;
5459 break;
5460 }
5461 }
5462 }
5463
5464 return ret;
5465 }
5466
5467 /* Finish up dynamic symbol handling. We set the contents of various
5468 dynamic sections here. */
5469
5470 static bfd_boolean
5471 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5472 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5473 {
5474 struct elf_nds32_link_hash_table *htab;
5475 bfd_byte *loc;
5476
5477 htab = nds32_elf_hash_table (info);
5478
5479 if (h->plt.offset != (bfd_vma) - 1)
5480 {
5481 asection *splt;
5482 asection *sgot;
5483 asection *srela;
5484
5485 bfd_vma plt_index;
5486 bfd_vma got_offset;
5487 bfd_vma local_plt_offset;
5488 Elf_Internal_Rela rela;
5489
5490 /* This symbol has an entry in the procedure linkage table. Set
5491 it up. */
5492
5493 BFD_ASSERT (h->dynindx != -1);
5494
5495 splt = htab->splt;
5496 sgot = htab->sgotplt;
5497 srela = htab->srelplt;
5498 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5499
5500 /* Get the index in the procedure linkage table which
5501 corresponds to this symbol. This is the index of this symbol
5502 in all the symbols for which we are making plt entries. The
5503 first entry in the procedure linkage table is reserved. */
5504 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5505
5506 /* Get the offset into the .got table of the entry that
5507 corresponds to this function. Each .got entry is 4 bytes.
5508 The first three are reserved. */
5509 got_offset = (plt_index + 3) * 4;
5510
5511 /* Fill in the entry in the procedure linkage table. */
5512 if (!bfd_link_pic (info))
5513 {
5514 unsigned long insn;
5515
5516 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5517 + sgot->output_offset + got_offset) >> 12)
5518 & 0xfffff);
5519 bfd_putb32 (insn, splt->contents + h->plt.offset);
5520
5521 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5522 + sgot->output_offset + got_offset) & 0x0fff)
5523 >> 2);
5524 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5525
5526 insn = PLT_ENTRY_WORD2;
5527 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5528
5529 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5530 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5531
5532 insn = PLT_ENTRY_WORD4
5533 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5534 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5535 local_plt_offset = 12;
5536 }
5537 else
5538 {
5539 /* sda_base must be set at this time. */
5540 unsigned long insn;
5541 long offset;
5542
5543 /* FIXME, sda_base is 65536, it will damage opcode. */
5544 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5545 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5546 - elf_gp (output_bfd);
5547 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5548 bfd_putb32 (insn, splt->contents + h->plt.offset);
5549
5550 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5551 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5552
5553 insn = PLT_PIC_ENTRY_WORD2;
5554 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5555
5556 insn = PLT_PIC_ENTRY_WORD3;
5557 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5558
5559 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5560 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5561
5562 insn = PLT_PIC_ENTRY_WORD5
5563 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5564 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5565
5566 local_plt_offset = 16;
5567 }
5568
5569 /* Fill in the entry in the global offset table,
5570 so it will fall through to the next instruction for the first time. */
5571 bfd_put_32 (output_bfd,
5572 (splt->output_section->vma + splt->output_offset
5573 + h->plt.offset + local_plt_offset),
5574 sgot->contents + got_offset);
5575
5576 /* Fill in the entry in the .rela.plt section. */
5577 rela.r_offset = (sgot->output_section->vma
5578 + sgot->output_offset + got_offset);
5579 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5580 rela.r_addend = 0;
5581 loc = srela->contents;
5582 loc += plt_index * sizeof (Elf32_External_Rela);
5583 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5584
5585 if (!h->def_regular)
5586 {
5587 /* Mark the symbol as undefined, rather than as defined in
5588 the .plt section. Leave the value alone. */
5589 sym->st_shndx = SHN_UNDEF;
5590 if (!h->ref_regular_nonweak)
5591 sym->st_value = 0;
5592 }
5593 }
5594
5595 if (h->got.offset != (bfd_vma) - 1)
5596 {
5597 asection *sgot;
5598 asection *srela;
5599 Elf_Internal_Rela rela;
5600
5601 /* This symbol has an entry in the global offset table.
5602 Set it up. */
5603
5604 sgot = htab->sgot;
5605 srela = htab->srelgot;
5606 BFD_ASSERT (sgot != NULL && srela != NULL);
5607
5608 rela.r_offset = (sgot->output_section->vma
5609 + sgot->output_offset + (h->got.offset & ~1));
5610
5611 /* If this is a -Bsymbolic link, and the symbol is defined
5612 locally, we just want to emit a RELATIVE reloc. Likewise if
5613 the symbol was forced to be local because of a version file.
5614 The entry in the global offset table will already have been
5615 initialized in the relocate_section function. */
5616 if (bfd_link_pic (info)
5617 && (info->symbolic
5618 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5619 {
5620 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5621 rela.r_addend = (h->root.u.def.value
5622 + h->root.u.def.section->output_section->vma
5623 + h->root.u.def.section->output_offset);
5624 }
5625 else
5626 {
5627 BFD_ASSERT ((h->got.offset & 1) == 0);
5628 bfd_put_32 (output_bfd, (bfd_vma) 0,
5629 sgot->contents + h->got.offset);
5630 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5631 rela.r_addend = 0;
5632 }
5633
5634 loc = srela->contents;
5635 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5636 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5637 ++srela->reloc_count;
5638 }
5639
5640 if (h->needs_copy)
5641 {
5642 asection *s;
5643 Elf_Internal_Rela rela;
5644
5645 /* This symbols needs a copy reloc. Set it up. */
5646
5647 BFD_ASSERT (h->dynindx != -1
5648 && (h->root.type == bfd_link_hash_defined
5649 || h->root.type == bfd_link_hash_defweak));
5650
5651 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5652 BFD_ASSERT (s != NULL);
5653
5654 rela.r_offset = (h->root.u.def.value
5655 + h->root.u.def.section->output_section->vma
5656 + h->root.u.def.section->output_offset);
5657 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5658 rela.r_addend = 0;
5659 loc = s->contents;
5660 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5661 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5662 ++s->reloc_count;
5663 }
5664
5665 /* Mark some specially defined symbols as absolute. */
5666 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5667 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5668 sym->st_shndx = SHN_ABS;
5669
5670 return TRUE;
5671 }
5672
5673
5674 /* Finish up the dynamic sections. */
5675
5676 static bfd_boolean
5677 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5678 {
5679 struct elf_nds32_link_hash_table *htab;
5680 bfd *dynobj;
5681 asection *sdyn;
5682 asection *sgot;
5683
5684 htab = nds32_elf_hash_table (info);
5685 dynobj = htab->root.dynobj;
5686
5687 sgot = htab->sgotplt;
5688 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5689
5690 if (htab->root.dynamic_sections_created)
5691 {
5692 asection *splt;
5693 Elf32_External_Dyn *dyncon, *dynconend;
5694
5695 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5696
5697 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5698 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5699
5700 for (; dyncon < dynconend; dyncon++)
5701 {
5702 Elf_Internal_Dyn dyn;
5703 asection *s;
5704
5705 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5706
5707 switch (dyn.d_tag)
5708 {
5709 default:
5710 break;
5711
5712 case DT_PLTGOT:
5713 s = htab->sgotplt;
5714 goto get_vma;
5715 case DT_JMPREL:
5716 s = htab->srelplt;
5717 get_vma:
5718 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
5719 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5720 break;
5721
5722 case DT_PLTRELSZ:
5723 s = htab->srelplt;
5724 dyn.d_un.d_val = s->size;
5725 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5726 break;
5727
5728 case DT_RELASZ:
5729 /* My reading of the SVR4 ABI indicates that the
5730 procedure linkage table relocs (DT_JMPREL) should be
5731 included in the overall relocs (DT_RELA). This is
5732 what Solaris does. However, UnixWare can not handle
5733 that case. Therefore, we override the DT_RELASZ entry
5734 here to make it not include the JMPREL relocs. Since
5735 the linker script arranges for .rela.plt to follow all
5736 other relocation sections, we don't have to worry
5737 about changing the DT_RELA entry. */
5738 if (htab->srelplt != NULL)
5739 {
5740 s = htab->srelplt;
5741 dyn.d_un.d_val -= s->size;
5742 }
5743 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5744 break;
5745 }
5746 }
5747
5748 /* Fill in the first entry in the procedure linkage table. */
5749 splt = htab->splt;
5750 if (splt && splt->size > 0)
5751 {
5752 if (bfd_link_pic (info))
5753 {
5754 unsigned long insn;
5755 long offset;
5756
5757 /* FIXME, sda_base is 65536, it will damage opcode. */
5758 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5759 offset = sgot->output_section->vma + sgot->output_offset + 4
5760 - elf_gp (output_bfd);
5761 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5762 bfd_putb32 (insn, splt->contents);
5763
5764 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5765 /* here has a typo? */
5766 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5767 bfd_putb32 (insn, splt->contents + 4);
5768
5769 insn = PLT0_PIC_ENTRY_WORD2;
5770 bfd_putb32 (insn, splt->contents + 8);
5771
5772 insn = PLT0_PIC_ENTRY_WORD3;
5773 bfd_putb32 (insn, splt->contents + 12);
5774
5775 insn = PLT0_PIC_ENTRY_WORD4;
5776 bfd_putb32 (insn, splt->contents + 16);
5777
5778 insn = PLT0_PIC_ENTRY_WORD5;
5779 bfd_putb32 (insn, splt->contents + 20);
5780 }
5781 else
5782 {
5783 unsigned long insn;
5784 unsigned long addr;
5785
5786 /* addr = .got + 4 */
5787 addr = sgot->output_section->vma + sgot->output_offset + 4;
5788 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5789 bfd_putb32 (insn, splt->contents);
5790
5791 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5792 bfd_putb32 (insn, splt->contents + 4);
5793
5794 insn = PLT0_ENTRY_WORD2;
5795 bfd_putb32 (insn, splt->contents + 8);
5796
5797 insn = PLT0_ENTRY_WORD3;
5798 bfd_putb32 (insn, splt->contents + 12);
5799
5800 insn = PLT0_ENTRY_WORD4;
5801 bfd_putb32 (insn, splt->contents + 16);
5802 }
5803
5804 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5805 PLT_ENTRY_SIZE;
5806 }
5807 }
5808
5809 /* Fill in the first three entries in the global offset table. */
5810 if (sgot && sgot->size > 0)
5811 {
5812 if (sdyn == NULL)
5813 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5814 else
5815 bfd_put_32 (output_bfd,
5816 sdyn->output_section->vma + sdyn->output_offset,
5817 sgot->contents);
5818 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5819 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5820
5821 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5822 }
5823
5824 return TRUE;
5825 }
5826 \f
5827
5828 /* Set the right machine number. */
5829
5830 static bfd_boolean
5831 nds32_elf_object_p (bfd *abfd)
5832 {
5833 static unsigned int cur_arch = 0;
5834
5835 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5836 {
5837 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5838 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5839 }
5840
5841 switch (cur_arch)
5842 {
5843 default:
5844 case E_N1_ARCH:
5845 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5846 break;
5847 case E_N1H_ARCH:
5848 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5849 break;
5850 case E_NDS_ARCH_STAR_V2_0:
5851 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5852 break;
5853 case E_NDS_ARCH_STAR_V3_0:
5854 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5855 break;
5856 case E_NDS_ARCH_STAR_V3_M:
5857 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5858 break;
5859 }
5860
5861 return TRUE;
5862 }
5863
5864 /* Store the machine number in the flags field. */
5865
5866 static void
5867 nds32_elf_final_write_processing (bfd *abfd,
5868 bfd_boolean linker ATTRIBUTE_UNUSED)
5869 {
5870 unsigned long val;
5871 static unsigned int cur_mach = 0;
5872
5873 if (bfd_mach_n1 != bfd_get_mach (abfd))
5874 {
5875 cur_mach = bfd_get_mach (abfd);
5876 }
5877
5878 switch (cur_mach)
5879 {
5880 case bfd_mach_n1:
5881 /* Only happen when object is empty, since the case is abandon. */
5882 val = E_N1_ARCH;
5883 val |= E_NDS_ABI_AABI;
5884 val |= E_NDS32_ELF_VER_1_4;
5885 break;
5886 case bfd_mach_n1h:
5887 val = E_N1H_ARCH;
5888 break;
5889 case bfd_mach_n1h_v2:
5890 val = E_NDS_ARCH_STAR_V2_0;
5891 break;
5892 case bfd_mach_n1h_v3:
5893 val = E_NDS_ARCH_STAR_V3_0;
5894 break;
5895 case bfd_mach_n1h_v3m:
5896 val = E_NDS_ARCH_STAR_V3_M;
5897 break;
5898 default:
5899 val = 0;
5900 break;
5901 }
5902
5903 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5904 elf_elfheader (abfd)->e_flags |= val;
5905 }
5906
5907 /* Function to keep NDS32 specific file flags. */
5908
5909 static bfd_boolean
5910 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5911 {
5912 BFD_ASSERT (!elf_flags_init (abfd)
5913 || elf_elfheader (abfd)->e_flags == flags);
5914
5915 elf_elfheader (abfd)->e_flags = flags;
5916 elf_flags_init (abfd) = TRUE;
5917 return TRUE;
5918 }
5919
5920 static unsigned int
5921 convert_e_flags (unsigned int e_flags, unsigned int arch)
5922 {
5923 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5924 {
5925 /* From 0.9 to 1.0. */
5926 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5927
5928 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5929 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5930 if (arch == E_NDS_ARCH_STAR_V1_0)
5931 {
5932 /* Done. */
5933 return e_flags;
5934 }
5935 }
5936
5937 /* From 1.0 to 2.0. */
5938 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5939
5940 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5941 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5942
5943 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5944 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5945 return e_flags;
5946 }
5947
5948 static bfd_boolean
5949 nds32_check_vec_size (bfd *ibfd)
5950 {
5951 static unsigned int nds32_vec_size = 0;
5952
5953 asection *sec_t = NULL;
5954 bfd_byte *contents = NULL;
5955
5956 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5957
5958 if (sec_t && sec_t->size >= 4)
5959 {
5960 /* Get vec_size in file. */
5961 unsigned int flag_t;
5962
5963 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
5964 flag_t = bfd_get_32 (ibfd, contents);
5965
5966 /* The value could only be 4 or 16. */
5967
5968 if (!nds32_vec_size)
5969 /* Set if not set yet. */
5970 nds32_vec_size = (flag_t & 0x3);
5971 else if (nds32_vec_size != (flag_t & 0x3))
5972 {
5973 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5974 " with previous modules, previous %u-byte, current %u-byte"),
5975 ibfd,
5976 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5977 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5978 return FALSE;
5979 }
5980 else
5981 /* Only keep the first vec_size section. */
5982 sec_t->flags |= SEC_EXCLUDE;
5983 }
5984
5985 return TRUE;
5986 }
5987
5988 /* Merge backend specific data from an object file to the output
5989 object file when linking. */
5990
5991 static bfd_boolean
5992 nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5993 {
5994 flagword out_flags;
5995 flagword in_flags;
5996 flagword out_16regs;
5997 flagword in_no_mac;
5998 flagword out_no_mac;
5999 flagword in_16regs;
6000 flagword out_version;
6001 flagword in_version;
6002 flagword out_fpu_config;
6003 flagword in_fpu_config;
6004
6005 /* TODO: Revise to use object-attributes instead. */
6006 if (!nds32_check_vec_size (ibfd))
6007 return FALSE;
6008
6009 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6010 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6011 return TRUE;
6012
6013 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6014 {
6015 (*_bfd_error_handler)
6016 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6017
6018 bfd_set_error (bfd_error_bad_value);
6019 return FALSE;
6020 }
6021
6022 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6023 if (in_version == E_NDS32_ELF_VER_1_2)
6024 {
6025 (*_bfd_error_handler)
6026 (_("%B: warning: Older version of object file encountered, "
6027 "Please recompile with current tool chain."), ibfd);
6028 }
6029
6030 /* We may need to merge V1 and V2 arch object files to V2. */
6031 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6032 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6033 {
6034 /* Need to convert version. */
6035 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6036 == E_NDS_ARCH_STAR_RESERVED)
6037 {
6038 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6039 }
6040 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6041 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6042 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6043 {
6044 elf_elfheader (obfd)->e_flags =
6045 convert_e_flags (elf_elfheader (obfd)->e_flags,
6046 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6047 }
6048 else
6049 {
6050 elf_elfheader (ibfd)->e_flags =
6051 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6052 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6053 }
6054 }
6055
6056 /* Extract some flags. */
6057 in_flags = elf_elfheader (ibfd)->e_flags
6058 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6059 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6060
6061 /* The following flags need special treatment. */
6062 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6063 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6064 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6065
6066 /* Extract some flags. */
6067 out_flags = elf_elfheader (obfd)->e_flags
6068 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6069 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6070
6071 /* The following flags need special treatment. */
6072 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6073 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6074 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6075 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6076 if (!elf_flags_init (obfd))
6077 {
6078 /* If the input is the default architecture then do not
6079 bother setting the flags for the output architecture,
6080 instead allow future merges to do this. If no future
6081 merges ever set these flags then they will retain their
6082 unitialised values, which surprise surprise, correspond
6083 to the default values. */
6084 if (bfd_get_arch_info (ibfd)->the_default)
6085 return TRUE;
6086
6087 elf_flags_init (obfd) = TRUE;
6088 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6089
6090 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6091 && bfd_get_arch_info (obfd)->the_default)
6092 {
6093 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6094 bfd_get_mach (ibfd));
6095 }
6096
6097 return TRUE;
6098 }
6099
6100 /* Check flag compatibility. */
6101 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6102 {
6103 (*_bfd_error_handler)
6104 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6105
6106 bfd_set_error (bfd_error_bad_value);
6107 return FALSE;
6108 }
6109
6110 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6111 {
6112 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6113 {
6114 (*_bfd_error_handler)
6115 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6116
6117 bfd_set_error (bfd_error_bad_value);
6118 return FALSE;
6119 }
6120 }
6121
6122 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6123 and perf ext1 and DIV are mergerd to perf ext1. */
6124 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6125 {
6126 elf_elfheader (obfd)->e_flags =
6127 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6128 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6129 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6130 ? E_NDS32_HAS_EXT_INST : 0)
6131 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6132 ? E_NDS32_HAS_EXT_INST : 0)
6133 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6134 | ((in_version > out_version) ? out_version : in_version);
6135 }
6136 else
6137 {
6138 if (in_version != out_version)
6139 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6140 ibfd, nds32_elfver_strtab[out_version],
6141 nds32_elfver_strtab[in_version]);
6142
6143 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6144 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6145 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6146 | (in_version > out_version ? out_version : in_version);
6147 }
6148
6149 return TRUE;
6150 }
6151
6152 /* Display the flags field. */
6153
6154 static bfd_boolean
6155 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6156 {
6157 FILE *file = (FILE *) ptr;
6158
6159 BFD_ASSERT (abfd != NULL && ptr != NULL);
6160
6161 _bfd_elf_print_private_bfd_data (abfd, ptr);
6162
6163 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6164
6165 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6166 {
6167 default:
6168 case E_N1_ARCH:
6169 fprintf (file, _(": n1 instructions"));
6170 break;
6171 case E_N1H_ARCH:
6172 fprintf (file, _(": n1h instructions"));
6173 break;
6174 }
6175
6176 fputc ('\n', file);
6177
6178 return TRUE;
6179 }
6180
6181 static unsigned int
6182 nds32_elf_action_discarded (asection *sec)
6183 {
6184
6185 if (strncmp
6186 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6187 return 0;
6188
6189 return _bfd_elf_default_action_discarded (sec);
6190 }
6191
6192 static asection *
6193 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6194 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6195 Elf_Internal_Sym *sym)
6196 {
6197 if (h != NULL)
6198 switch (ELF32_R_TYPE (rel->r_info))
6199 {
6200 case R_NDS32_GNU_VTINHERIT:
6201 case R_NDS32_GNU_VTENTRY:
6202 case R_NDS32_RELA_GNU_VTINHERIT:
6203 case R_NDS32_RELA_GNU_VTENTRY:
6204 return NULL;
6205 }
6206
6207 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6208 }
6209
6210 static bfd_boolean
6211 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6212 const Elf_Internal_Rela *relocs)
6213 {
6214 /* Update the got entry reference counts for the section being removed. */
6215 Elf_Internal_Shdr *symtab_hdr;
6216 struct elf_link_hash_entry **sym_hashes;
6217 bfd_signed_vma *local_got_refcounts;
6218 const Elf_Internal_Rela *rel, *relend;
6219
6220 elf_section_data (sec)->local_dynrel = NULL;
6221
6222 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6223 sym_hashes = elf_sym_hashes (abfd);
6224 local_got_refcounts = elf_local_got_refcounts (abfd);
6225
6226 relend = relocs + sec->reloc_count;
6227 for (rel = relocs; rel < relend; rel++)
6228 {
6229 unsigned long r_symndx;
6230 struct elf_link_hash_entry *h = NULL;
6231
6232 r_symndx = ELF32_R_SYM (rel->r_info);
6233 if (r_symndx >= symtab_hdr->sh_info)
6234 {
6235 /* External symbol. */
6236 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6237 while (h->root.type == bfd_link_hash_indirect
6238 || h->root.type == bfd_link_hash_warning)
6239 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6240 }
6241
6242 switch (ELF32_R_TYPE (rel->r_info))
6243 {
6244 case R_NDS32_GOT_HI20:
6245 case R_NDS32_GOT_LO12:
6246 case R_NDS32_GOT_LO15:
6247 case R_NDS32_GOT_LO19:
6248 case R_NDS32_GOT17S2_RELA:
6249 case R_NDS32_GOT15S2_RELA:
6250 case R_NDS32_GOTOFF:
6251 case R_NDS32_GOTOFF_HI20:
6252 case R_NDS32_GOTOFF_LO12:
6253 case R_NDS32_GOTOFF_LO15:
6254 case R_NDS32_GOTOFF_LO19:
6255 case R_NDS32_GOT20:
6256 case R_NDS32_GOTPC_HI20:
6257 case R_NDS32_GOTPC_LO12:
6258 case R_NDS32_GOTPC20:
6259 if (h != NULL)
6260 {
6261 if (h->got.refcount > 0)
6262 h->got.refcount--;
6263 }
6264 else
6265 {
6266 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6267 local_got_refcounts[r_symndx]--;
6268 }
6269 break;
6270
6271 case R_NDS32_16_RELA:
6272 case R_NDS32_20_RELA:
6273 case R_NDS32_5_RELA:
6274 case R_NDS32_32_RELA:
6275 case R_NDS32_HI20_RELA:
6276 case R_NDS32_LO12S3_RELA:
6277 case R_NDS32_LO12S2_RELA:
6278 case R_NDS32_LO12S2_DP_RELA:
6279 case R_NDS32_LO12S2_SP_RELA:
6280 case R_NDS32_LO12S1_RELA:
6281 case R_NDS32_LO12S0_RELA:
6282 case R_NDS32_LO12S0_ORI_RELA:
6283 case R_NDS32_SDA16S3_RELA:
6284 case R_NDS32_SDA17S2_RELA:
6285 case R_NDS32_SDA18S1_RELA:
6286 case R_NDS32_SDA19S0_RELA:
6287 case R_NDS32_SDA15S3_RELA:
6288 case R_NDS32_SDA15S2_RELA:
6289 case R_NDS32_SDA12S2_DP_RELA:
6290 case R_NDS32_SDA12S2_SP_RELA:
6291 case R_NDS32_SDA15S1_RELA:
6292 case R_NDS32_SDA15S0_RELA:
6293 case R_NDS32_SDA_FP7U2_RELA:
6294 case R_NDS32_15_PCREL_RELA:
6295 case R_NDS32_17_PCREL_RELA:
6296 case R_NDS32_25_PCREL_RELA:
6297 if (h != NULL)
6298 {
6299 struct elf_nds32_link_hash_entry *eh;
6300 struct elf_nds32_dyn_relocs **pp;
6301 struct elf_nds32_dyn_relocs *p;
6302
6303 if (!bfd_link_pic (info) && h->plt.refcount > 0)
6304 h->plt.refcount -= 1;
6305
6306 eh = (struct elf_nds32_link_hash_entry *) h;
6307
6308 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6309 if (p->sec == sec)
6310 {
6311 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6312 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6313 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6314 p->pc_count -= 1;
6315 p->count -= 1;
6316 if (p->count == 0)
6317 *pp = p->next;
6318 break;
6319 }
6320 }
6321 break;
6322
6323 case R_NDS32_9_PLTREL:
6324 case R_NDS32_25_PLTREL:
6325 if (h != NULL)
6326 {
6327 if (h->plt.refcount > 0)
6328 h->plt.refcount--;
6329 }
6330 break;
6331
6332 default:
6333 break;
6334 }
6335 }
6336
6337 return TRUE;
6338 }
6339
6340 /* Look through the relocs for a section during the first phase.
6341 Since we don't do .gots or .plts, we just need to consider the
6342 virtual table relocs for gc. */
6343
6344 static bfd_boolean
6345 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6346 asection *sec, const Elf_Internal_Rela *relocs)
6347 {
6348 Elf_Internal_Shdr *symtab_hdr;
6349 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6350 const Elf_Internal_Rela *rel;
6351 const Elf_Internal_Rela *rel_end;
6352 struct elf_nds32_link_hash_table *htab;
6353 bfd *dynobj;
6354 asection *sreloc = NULL;
6355
6356 if (bfd_link_relocatable (info))
6357 return TRUE;
6358
6359 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6360 sym_hashes = elf_sym_hashes (abfd);
6361 sym_hashes_end =
6362 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6363 if (!elf_bad_symtab (abfd))
6364 sym_hashes_end -= symtab_hdr->sh_info;
6365
6366 htab = nds32_elf_hash_table (info);
6367 dynobj = htab->root.dynobj;
6368
6369 rel_end = relocs + sec->reloc_count;
6370 for (rel = relocs; rel < rel_end; rel++)
6371 {
6372 enum elf_nds32_reloc_type r_type;
6373 struct elf_link_hash_entry *h;
6374 unsigned long r_symndx;
6375 int tls_type, old_tls_type;
6376
6377 r_symndx = ELF32_R_SYM (rel->r_info);
6378 r_type = ELF32_R_TYPE (rel->r_info);
6379 if (r_symndx < symtab_hdr->sh_info)
6380 h = NULL;
6381 else
6382 {
6383 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6384 while (h->root.type == bfd_link_hash_indirect
6385 || h->root.type == bfd_link_hash_warning)
6386 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6387 }
6388
6389 /* Some relocs require a global offset table. We create
6390 got section here, since these relocation need got section
6391 and it is not created yet. */
6392 if (htab->sgot == NULL)
6393 {
6394 switch (r_type)
6395 {
6396 case R_NDS32_GOT_HI20:
6397 case R_NDS32_GOT_LO12:
6398 case R_NDS32_GOT_LO15:
6399 case R_NDS32_GOT_LO19:
6400 case R_NDS32_GOT17S2_RELA:
6401 case R_NDS32_GOT15S2_RELA:
6402 case R_NDS32_GOTOFF:
6403 case R_NDS32_GOTOFF_HI20:
6404 case R_NDS32_GOTOFF_LO12:
6405 case R_NDS32_GOTOFF_LO15:
6406 case R_NDS32_GOTOFF_LO19:
6407 case R_NDS32_GOTPC20:
6408 case R_NDS32_GOTPC_HI20:
6409 case R_NDS32_GOTPC_LO12:
6410 case R_NDS32_GOT20:
6411 case R_NDS32_TLS_IE_HI20:
6412 case R_NDS32_TLS_IE_LO12S2:
6413 if (dynobj == NULL)
6414 htab->root.dynobj = dynobj = abfd;
6415 if (!create_got_section (dynobj, info))
6416 return FALSE;
6417 break;
6418
6419 default:
6420 break;
6421 }
6422 }
6423
6424 switch ((int) r_type)
6425 {
6426 case R_NDS32_GOT_HI20:
6427 case R_NDS32_GOT_LO12:
6428 case R_NDS32_GOT_LO15:
6429 case R_NDS32_GOT_LO19:
6430 case R_NDS32_GOT20:
6431 case R_NDS32_TLS_IE_HI20:
6432 case R_NDS32_TLS_IE_LO12S2:
6433 switch (r_type)
6434 {
6435 case R_NDS32_TLS_IE_HI20:
6436 case R_NDS32_TLS_IE_LO12S2:
6437 tls_type = GOT_TLS_IE;
6438 break;
6439 default:
6440 tls_type = GOT_NORMAL;
6441 break;
6442 }
6443 if (h != NULL)
6444 {
6445 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6446 h->got.refcount += 1;
6447 }
6448 else
6449 {
6450 bfd_signed_vma *local_got_refcounts;
6451
6452 /* This is a global offset table entry for a local
6453 symbol. */
6454 local_got_refcounts = elf_local_got_refcounts (abfd);
6455 if (local_got_refcounts == NULL)
6456 {
6457 bfd_size_type size;
6458
6459 size = symtab_hdr->sh_info;
6460 size *= sizeof (bfd_signed_vma);
6461 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6462 if (local_got_refcounts == NULL)
6463 return FALSE;
6464 elf_local_got_refcounts (abfd) = local_got_refcounts;
6465 }
6466 local_got_refcounts[r_symndx] += 1;
6467 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6468 }
6469
6470 /* We will already have issued an error message if there
6471 is a TLS/non-TLS mismatch, based on the symbol
6472 type. So just combine any TLS types needed. */
6473 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6474 && tls_type != GOT_NORMAL)
6475 tls_type |= old_tls_type;
6476
6477 if (old_tls_type != tls_type)
6478 {
6479 if (h != NULL)
6480 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6481 else
6482 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6483 }
6484 break;
6485 case R_NDS32_9_PLTREL:
6486 case R_NDS32_25_PLTREL:
6487 case R_NDS32_PLTREL_HI20:
6488 case R_NDS32_PLTREL_LO12:
6489 case R_NDS32_PLT_GOTREL_HI20:
6490 case R_NDS32_PLT_GOTREL_LO12:
6491 case R_NDS32_PLT_GOTREL_LO15:
6492 case R_NDS32_PLT_GOTREL_LO19:
6493 case R_NDS32_PLT_GOTREL_LO20:
6494
6495 /* This symbol requires a procedure linkage table entry. We
6496 actually build the entry in adjust_dynamic_symbol,
6497 because this might be a case of linking PIC code without
6498 linking in any dynamic objects, in which case we don't
6499 need to generate a procedure linkage table after all. */
6500
6501 /* If this is a local symbol, we resolve it directly without
6502 creating a procedure linkage table entry. */
6503 if (h == NULL)
6504 continue;
6505
6506 if (h->forced_local)
6507 break;
6508
6509 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6510 h->needs_plt = 1;
6511 h->plt.refcount += 1;
6512 break;
6513
6514 case R_NDS32_16_RELA:
6515 case R_NDS32_20_RELA:
6516 case R_NDS32_5_RELA:
6517 case R_NDS32_32_RELA:
6518 case R_NDS32_HI20_RELA:
6519 case R_NDS32_LO12S3_RELA:
6520 case R_NDS32_LO12S2_RELA:
6521 case R_NDS32_LO12S2_DP_RELA:
6522 case R_NDS32_LO12S2_SP_RELA:
6523 case R_NDS32_LO12S1_RELA:
6524 case R_NDS32_LO12S0_RELA:
6525 case R_NDS32_LO12S0_ORI_RELA:
6526 case R_NDS32_SDA16S3_RELA:
6527 case R_NDS32_SDA17S2_RELA:
6528 case R_NDS32_SDA18S1_RELA:
6529 case R_NDS32_SDA19S0_RELA:
6530 case R_NDS32_SDA15S3_RELA:
6531 case R_NDS32_SDA15S2_RELA:
6532 case R_NDS32_SDA12S2_DP_RELA:
6533 case R_NDS32_SDA12S2_SP_RELA:
6534 case R_NDS32_SDA15S1_RELA:
6535 case R_NDS32_SDA15S0_RELA:
6536 case R_NDS32_SDA_FP7U2_RELA:
6537 case R_NDS32_15_PCREL_RELA:
6538 case R_NDS32_17_PCREL_RELA:
6539 case R_NDS32_25_PCREL_RELA:
6540
6541 if (h != NULL && !bfd_link_pic (info))
6542 {
6543 h->non_got_ref = 1;
6544 h->plt.refcount += 1;
6545 }
6546
6547 /* If we are creating a shared library, and this is a reloc against
6548 a global symbol, or a non PC relative reloc against a local
6549 symbol, then we need to copy the reloc into the shared library.
6550 However, if we are linking with -Bsymbolic, we do not need to
6551 copy a reloc against a global symbol which is defined in an
6552 object we are including in the link (i.e., DEF_REGULAR is set).
6553 At this point we have not seen all the input files, so it is
6554 possible that DEF_REGULAR is not set now but will be set later
6555 (it is never cleared). We account for that possibility below by
6556 storing information in the dyn_relocs field of the hash table
6557 entry. A similar situation occurs when creating shared libraries
6558 and symbol visibility changes render the symbol local.
6559
6560 If on the other hand, we are creating an executable, we may need
6561 to keep relocations for symbols satisfied by a dynamic library
6562 if we manage to avoid copy relocs for the symbol. */
6563 if ((bfd_link_pic (info)
6564 && (sec->flags & SEC_ALLOC) != 0
6565 && ((r_type != R_NDS32_25_PCREL_RELA
6566 && r_type != R_NDS32_15_PCREL_RELA
6567 && r_type != R_NDS32_17_PCREL_RELA
6568 && !(r_type == R_NDS32_32_RELA
6569 && strcmp (sec->name, ".eh_frame") == 0))
6570 || (h != NULL
6571 && (!info->symbolic
6572 || h->root.type == bfd_link_hash_defweak
6573 || !h->def_regular))))
6574 || (!bfd_link_pic (info)
6575 && (sec->flags & SEC_ALLOC) != 0
6576 && h != NULL
6577 && (h->root.type == bfd_link_hash_defweak
6578 || !h->def_regular)))
6579 {
6580 struct elf_nds32_dyn_relocs *p;
6581 struct elf_nds32_dyn_relocs **head;
6582
6583 if (dynobj == NULL)
6584 htab->root.dynobj = dynobj = abfd;
6585
6586 /* When creating a shared object, we must copy these
6587 relocs into the output file. We create a reloc
6588 section in dynobj and make room for the reloc. */
6589 if (sreloc == NULL)
6590 {
6591 const char *name;
6592
6593 name = bfd_elf_string_from_elf_section
6594 (abfd, elf_elfheader (abfd)->e_shstrndx,
6595 elf_section_data (sec)->rela.hdr->sh_name);
6596 if (name == NULL)
6597 return FALSE;
6598
6599 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6600 && strcmp (bfd_get_section_name (abfd, sec),
6601 name + 5) == 0);
6602
6603 sreloc = bfd_get_section_by_name (dynobj, name);
6604 if (sreloc == NULL)
6605 {
6606 flagword flags;
6607
6608 sreloc = bfd_make_section (dynobj, name);
6609 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6610 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6611 if ((sec->flags & SEC_ALLOC) != 0)
6612 flags |= SEC_ALLOC | SEC_LOAD;
6613 if (sreloc == NULL
6614 || !bfd_set_section_flags (dynobj, sreloc, flags)
6615 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6616 return FALSE;
6617
6618 elf_section_type (sreloc) = SHT_RELA;
6619 }
6620 elf_section_data (sec)->sreloc = sreloc;
6621 }
6622
6623 /* If this is a global symbol, we count the number of
6624 relocations we need for this symbol. */
6625 if (h != NULL)
6626 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6627 else
6628 {
6629 asection *s;
6630
6631 Elf_Internal_Sym *isym;
6632 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6633 if (isym == NULL)
6634 return FALSE;
6635
6636 /* Track dynamic relocs needed for local syms too. */
6637 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6638 if (s == NULL)
6639 return FALSE;
6640
6641 head = ((struct elf_nds32_dyn_relocs **)
6642 &elf_section_data (s)->local_dynrel);
6643 }
6644
6645 p = *head;
6646 if (p == NULL || p->sec != sec)
6647 {
6648 bfd_size_type amt = sizeof (*p);
6649 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6650 if (p == NULL)
6651 return FALSE;
6652 p->next = *head;
6653 *head = p;
6654 p->sec = sec;
6655 p->count = 0;
6656 p->pc_count = 0;
6657 }
6658
6659 p->count += 1;
6660 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6661 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6662 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6663 p->pc_count += 1;
6664 }
6665 break;
6666
6667 /* This relocation describes the C++ object vtable hierarchy.
6668 Reconstruct it for later use during GC. */
6669 case R_NDS32_RELA_GNU_VTINHERIT:
6670 case R_NDS32_GNU_VTINHERIT:
6671 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6672 return FALSE;
6673 break;
6674
6675 /* This relocation describes which C++ vtable entries are actually
6676 used. Record for later use during GC. */
6677 case R_NDS32_GNU_VTENTRY:
6678 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6679 return FALSE;
6680 break;
6681 case R_NDS32_RELA_GNU_VTENTRY:
6682 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6683 return FALSE;
6684 break;
6685 }
6686 }
6687
6688 return TRUE;
6689 }
6690
6691 /* Write VAL in uleb128 format to P, returning a pointer to the
6692 following byte.
6693 This code is copied from elf-attr.c. */
6694
6695 static bfd_byte *
6696 write_uleb128 (bfd_byte *p, unsigned int val)
6697 {
6698 bfd_byte c;
6699 do
6700 {
6701 c = val & 0x7f;
6702 val >>= 7;
6703 if (val)
6704 c |= 0x80;
6705 *(p++) = c;
6706 }
6707 while (val);
6708 return p;
6709 }
6710
6711 static bfd_signed_vma
6712 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6713 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6714 int *pic_ext_target)
6715 {
6716 bfd_signed_vma foff;
6717 bfd_vma symval, addend;
6718 asection *sym_sec;
6719
6720 /* Get the value of the symbol referred to by the reloc. */
6721 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6722 {
6723 Elf_Internal_Sym *isym;
6724
6725 /* A local symbol. */
6726 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6727
6728 if (isym->st_shndx == SHN_UNDEF)
6729 sym_sec = bfd_und_section_ptr;
6730 else if (isym->st_shndx == SHN_ABS)
6731 sym_sec = bfd_abs_section_ptr;
6732 else if (isym->st_shndx == SHN_COMMON)
6733 sym_sec = bfd_com_section_ptr;
6734 else
6735 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6736 symval = isym->st_value + sym_sec->output_section->vma
6737 + sym_sec->output_offset;
6738 }
6739 else
6740 {
6741 unsigned long indx;
6742 struct elf_link_hash_entry *h;
6743 bfd *owner;
6744
6745 /* An external symbol. */
6746 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6747 h = elf_sym_hashes (abfd)[indx];
6748 BFD_ASSERT (h != NULL);
6749
6750 if (h->root.type != bfd_link_hash_defined
6751 && h->root.type != bfd_link_hash_defweak)
6752 /* This appears to be a reference to an undefined
6753 symbol. Just ignore it--it will be caught by the
6754 regular reloc processing. */
6755 return 0;
6756 owner = h->root.u.def.section->owner;
6757 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6758 *pic_ext_target = 1;
6759
6760 if (h->root.u.def.section->flags & SEC_MERGE)
6761 {
6762 sym_sec = h->root.u.def.section;
6763 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6764 elf_section_data (sym_sec)->sec_info,
6765 h->root.u.def.value);
6766 symval = symval + sym_sec->output_section->vma
6767 + sym_sec->output_offset;
6768 }
6769 else
6770 symval = (h->root.u.def.value
6771 + h->root.u.def.section->output_section->vma
6772 + h->root.u.def.section->output_offset);
6773 }
6774
6775 addend = irel->r_addend;
6776
6777 foff = (symval + addend
6778 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6779 return foff;
6780 }
6781
6782 static bfd_vma
6783 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6784 Elf_Internal_Sym *isymbuf,
6785 Elf_Internal_Rela *irel,
6786 Elf_Internal_Shdr *symtab_hdr)
6787 {
6788 bfd_vma symval;
6789
6790 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6791 {
6792 Elf_Internal_Sym *isym;
6793 asection *sym_sec;
6794 /* A local symbol. */
6795 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6796
6797 if (isym->st_shndx == SHN_UNDEF)
6798 sym_sec = bfd_und_section_ptr;
6799 else if (isym->st_shndx == SHN_ABS)
6800 sym_sec = bfd_abs_section_ptr;
6801 else if (isym->st_shndx == SHN_COMMON)
6802 sym_sec = bfd_com_section_ptr;
6803 else
6804 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6805 symval = isym->st_value + sym_sec->output_section->vma
6806 + sym_sec->output_offset;
6807 }
6808 else
6809 {
6810 unsigned long indx;
6811 struct elf_link_hash_entry *h;
6812 struct elf_nds32_link_hash_table *htab;
6813 asection *splt;
6814
6815 /* An external symbol. */
6816 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6817 h = elf_sym_hashes (abfd)[indx];
6818 BFD_ASSERT (h != NULL);
6819 htab = nds32_elf_hash_table (link_info);
6820 splt = htab->splt;
6821
6822 while (h->root.type == bfd_link_hash_indirect
6823 || h->root.type == bfd_link_hash_warning)
6824 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6825
6826 if (h->plt.offset == (bfd_vma) - 1)
6827 {
6828 if (h->root.type != bfd_link_hash_defined
6829 && h->root.type != bfd_link_hash_defweak)
6830 /* This appears to be a reference to an undefined
6831 * symbol. Just ignore it--it will be caught by the
6832 * regular reloc processing. */
6833 return 0;
6834 symval = (h->root.u.def.value
6835 + h->root.u.def.section->output_section->vma
6836 + h->root.u.def.section->output_offset);
6837 }
6838 else
6839 symval = splt->output_section->vma + h->plt.offset;
6840 }
6841
6842 return symval;
6843 }
6844
6845 static bfd_signed_vma
6846 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6847 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6848 Elf_Internal_Shdr *symtab_hdr)
6849 {
6850 bfd_vma foff;
6851 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6852 symtab_hdr)) == 0)
6853 return 0;
6854 else
6855 return foff - (irel->r_offset
6856 + sec->output_section->vma + sec->output_offset);
6857 }
6858 \f
6859 /* Convert a 32-bit instruction to 16-bit one.
6860 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6861 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6862 type of INSN16. Return 1 if successful. */
6863
6864 static int
6865 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6866 int *pinsn_type)
6867 {
6868 uint16_t insn16 = 0;
6869 int insn_type = 0;
6870 unsigned long mach = bfd_get_mach (abfd);
6871
6872 if (N32_SH5 (insn) != 0)
6873 return 0;
6874
6875 switch (N32_SUB5 (insn))
6876 {
6877 case N32_ALU1_ADD_SLLI:
6878 case N32_ALU1_ADD_SRLI:
6879 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6880 {
6881 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6882 N32_RB5 (insn));
6883 insn_type = NDS32_INSN_ADD333;
6884 }
6885 else if (N32_IS_RT4 (insn))
6886 {
6887 if (N32_RT5 (insn) == N32_RA5 (insn))
6888 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6889 else if (N32_RT5 (insn) == N32_RB5 (insn))
6890 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6891 insn_type = NDS32_INSN_ADD45;
6892 }
6893 break;
6894
6895 case N32_ALU1_SUB_SLLI:
6896 case N32_ALU1_SUB_SRLI:
6897 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6898 {
6899 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6900 N32_RB5 (insn));
6901 insn_type = NDS32_INSN_SUB333;
6902 }
6903 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6904 {
6905 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6906 insn_type = NDS32_INSN_SUB45;
6907 }
6908 break;
6909
6910 case N32_ALU1_AND_SLLI:
6911 case N32_ALU1_AND_SRLI:
6912 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6913 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6914 && N32_IS_RB3 (insn))
6915 {
6916 if (N32_RT5 (insn) == N32_RA5 (insn))
6917 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6918 else if (N32_RT5 (insn) == N32_RB5 (insn))
6919 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6920 if (insn16)
6921 insn_type = NDS32_INSN_AND33;
6922 }
6923 break;
6924
6925 case N32_ALU1_XOR_SLLI:
6926 case N32_ALU1_XOR_SRLI:
6927 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6928 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6929 && N32_IS_RB3 (insn))
6930 {
6931 if (N32_RT5 (insn) == N32_RA5 (insn))
6932 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6933 else if (N32_RT5 (insn) == N32_RB5 (insn))
6934 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6935 if (insn16)
6936 insn_type = NDS32_INSN_XOR33;
6937 }
6938 break;
6939
6940 case N32_ALU1_OR_SLLI:
6941 case N32_ALU1_OR_SRLI:
6942 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6943 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6944 && N32_IS_RB3 (insn))
6945 {
6946 if (N32_RT5 (insn) == N32_RA5 (insn))
6947 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6948 else if (N32_RT5 (insn) == N32_RB5 (insn))
6949 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6950 if (insn16)
6951 insn_type = NDS32_INSN_OR33;
6952 }
6953 break;
6954 case N32_ALU1_NOR:
6955 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6956 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6957 && N32_RA5 (insn) == N32_RB5 (insn))
6958 {
6959 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6960 insn_type = NDS32_INSN_NOT33;
6961 }
6962 break;
6963 case N32_ALU1_SRAI:
6964 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6965 {
6966 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6967 insn_type = NDS32_INSN_SRAI45;
6968 }
6969 break;
6970
6971 case N32_ALU1_SRLI:
6972 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6973 {
6974 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6975 insn_type = NDS32_INSN_SRLI45;
6976 }
6977 break;
6978
6979 case N32_ALU1_SLLI:
6980 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6981 {
6982 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6983 N32_UB5 (insn));
6984 insn_type = NDS32_INSN_SLLI333;
6985 }
6986 break;
6987
6988 case N32_ALU1_ZEH:
6989 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6990 {
6991 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6992 insn_type = NDS32_INSN_ZEH33;
6993 }
6994 break;
6995
6996 case N32_ALU1_SEB:
6997 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6998 {
6999 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7000 insn_type = NDS32_INSN_SEB33;
7001 }
7002 break;
7003
7004 case N32_ALU1_SEH:
7005 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7006 {
7007 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7008 insn_type = NDS32_INSN_SEH33;
7009 }
7010 break;
7011
7012 case N32_ALU1_SLT:
7013 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7014 {
7015 /* Implicit r15. */
7016 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7017 insn_type = NDS32_INSN_SLT45;
7018 }
7019 break;
7020
7021 case N32_ALU1_SLTS:
7022 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7023 {
7024 /* Implicit r15. */
7025 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7026 insn_type = NDS32_INSN_SLTS45;
7027 }
7028 break;
7029 }
7030
7031 if ((insn16 & 0x8000) == 0)
7032 return 0;
7033
7034 if (pinsn16)
7035 *pinsn16 = insn16;
7036 if (pinsn_type)
7037 *pinsn_type = insn_type;
7038 return 1;
7039 }
7040
7041 static int
7042 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7043 int *pinsn_type)
7044 {
7045 uint16_t insn16 = 0;
7046 int insn_type;
7047 unsigned long mach = bfd_get_mach (abfd);
7048
7049 /* TODO: bset, bclr, btgl, btst. */
7050 if (__GF (insn, 6, 4) != 0)
7051 return 0;
7052
7053 switch (N32_IMMU (insn, 6))
7054 {
7055 case N32_ALU2_MUL:
7056 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7057 && N32_IS_RB3 (insn))
7058 {
7059 if (N32_RT5 (insn) == N32_RA5 (insn))
7060 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7061 else if (N32_RT5 (insn) == N32_RB5 (insn))
7062 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7063 if (insn16)
7064 insn_type = NDS32_INSN_MUL33;
7065 }
7066 }
7067
7068 if ((insn16 & 0x8000) == 0)
7069 return 0;
7070
7071 if (pinsn16)
7072 *pinsn16 = insn16;
7073 if (pinsn_type)
7074 *pinsn_type = insn_type;
7075 return 1;
7076 }
7077
7078 int
7079 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7080 int *pinsn_type)
7081 {
7082 int op6;
7083 uint16_t insn16 = 0;
7084 int insn_type;
7085 unsigned long mach = bfd_get_mach (abfd);
7086
7087 /* Decode 32-bit instruction. */
7088 if (insn & 0x80000000)
7089 {
7090 /* Not 32-bit insn. */
7091 return 0;
7092 }
7093
7094 op6 = N32_OP6 (insn);
7095
7096 /* Convert it to 16-bit instruction. */
7097 switch (op6)
7098 {
7099 case N32_OP6_MOVI:
7100 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7101 {
7102 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7103 insn_type = NDS32_INSN_MOVI55;
7104 }
7105 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7106 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7107 {
7108 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7109 N32_IMM20S (insn) - 16);
7110 insn_type = NDS32_INSN_MOVPI45;
7111 }
7112 break;
7113
7114 case N32_OP6_ADDI:
7115 if (N32_IMM15S (insn) == 0)
7116 {
7117 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7118 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7119 if (mach <= MACH_V2
7120 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7121 {
7122 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7123 insn_type = NDS32_INSN_MOV55;
7124 }
7125 }
7126 else if (N32_IMM15S (insn) > 0)
7127 {
7128 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7129 {
7130 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7131 N32_IMM15S (insn));
7132 insn_type = NDS32_INSN_ADDI333;
7133 }
7134 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7135 && N32_IMM15S (insn) < 32)
7136 {
7137 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7138 insn_type = NDS32_INSN_ADDI45;
7139 }
7140 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7141 && N32_RT5 (insn) == N32_RA5 (insn)
7142 && N32_IMM15S (insn) < 512)
7143 {
7144 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7145 insn_type = NDS32_INSN_ADDI10_SP;
7146 }
7147 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7148 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7149 && (N32_IMM15S (insn) % 4 == 0))
7150 {
7151 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7152 N32_IMM15S (insn) >> 2);
7153 insn_type = NDS32_INSN_ADDRI36_SP;
7154 }
7155 }
7156 else
7157 {
7158 /* Less than 0. */
7159 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7160 {
7161 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7162 0 - N32_IMM15S (insn));
7163 insn_type = NDS32_INSN_SUBI333;
7164 }
7165 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7166 && N32_IMM15S (insn) > -32)
7167 {
7168 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7169 0 - N32_IMM15S (insn));
7170 insn_type = NDS32_INSN_SUBI45;
7171 }
7172 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7173 && N32_RT5 (insn) == N32_RA5 (insn)
7174 && N32_IMM15S (insn) >= -512)
7175 {
7176 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7177 insn_type = NDS32_INSN_ADDI10_SP;
7178 }
7179 }
7180 break;
7181
7182 case N32_OP6_ORI:
7183 if (N32_IMM15S (insn) == 0)
7184 {
7185 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7186 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7187 if (mach <= MACH_V2
7188 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7189 {
7190 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7191 insn_type = NDS32_INSN_MOV55;
7192 }
7193 }
7194 break;
7195
7196 case N32_OP6_SUBRI:
7197 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7198 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7199 {
7200 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7201 insn_type = NDS32_INSN_NEG33;
7202 }
7203 break;
7204
7205 case N32_OP6_ANDI:
7206 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7207 {
7208 if (N32_IMM15U (insn) == 1)
7209 {
7210 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7211 insn_type = NDS32_INSN_XLSB33;
7212 }
7213 else if (N32_IMM15U (insn) == 0x7ff)
7214 {
7215 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7216 insn_type = NDS32_INSN_X11B33;
7217 }
7218 else if (N32_IMM15U (insn) == 0xff)
7219 {
7220 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7221 insn_type = NDS32_INSN_ZEB33;
7222 }
7223 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7224 && N32_IMM15U (insn) < 256)
7225 {
7226 int imm15u = N32_IMM15U (insn);
7227
7228 if (__builtin_popcount (imm15u) == 1)
7229 {
7230 /* BMSKI33 */
7231 int imm3u = __builtin_ctz (imm15u);
7232
7233 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7234 insn_type = NDS32_INSN_BMSKI33;
7235 }
7236 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7237 {
7238 /* FEXTI33 */
7239 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7240
7241 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7242 insn_type = NDS32_INSN_FEXTI33;
7243 }
7244 }
7245 }
7246 break;
7247
7248 case N32_OP6_SLTI:
7249 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7250 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7251 {
7252 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7253 insn_type = NDS32_INSN_SLTI45;
7254 }
7255 break;
7256
7257 case N32_OP6_SLTSI:
7258 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7259 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7260 {
7261 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7262 insn_type = NDS32_INSN_SLTSI45;
7263 }
7264 break;
7265
7266 case N32_OP6_LWI:
7267 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7268 {
7269 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7270 insn_type = NDS32_INSN_LWI450;
7271 }
7272 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7273 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7274 {
7275 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7276 N32_IMM15S (insn));
7277 insn_type = NDS32_INSN_LWI333;
7278 }
7279 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7280 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7281 {
7282 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7283 insn_type = NDS32_INSN_LWI37;
7284 }
7285 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7286 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7287 {
7288 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7289 insn_type = NDS32_INSN_LWI37_SP;
7290 }
7291 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7292 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7293 {
7294 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7295 N32_IMM15S (insn) + 32);
7296 insn_type = NDS32_INSN_LWI45_FE;
7297 }
7298 break;
7299
7300 case N32_OP6_SWI:
7301 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7302 {
7303 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7304 insn_type = NDS32_INSN_SWI450;
7305 }
7306 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7307 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7308 {
7309 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7310 N32_IMM15S (insn));
7311 insn_type = NDS32_INSN_SWI333;
7312 }
7313 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7314 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7315 {
7316 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7317 insn_type = NDS32_INSN_SWI37;
7318 }
7319 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7320 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7321 {
7322 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7323 insn_type = NDS32_INSN_SWI37_SP;
7324 }
7325 break;
7326
7327 case N32_OP6_LWI_BI:
7328 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7329 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7330 {
7331 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7332 N32_IMM15S (insn));
7333 insn_type = NDS32_INSN_LWI333_BI;
7334 }
7335 break;
7336
7337 case N32_OP6_SWI_BI:
7338 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7339 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7340 {
7341 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7342 N32_IMM15S (insn));
7343 insn_type = NDS32_INSN_SWI333_BI;
7344 }
7345 break;
7346
7347 case N32_OP6_LHI:
7348 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7349 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7350 {
7351 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7352 N32_IMM15S (insn));
7353 insn_type = NDS32_INSN_LHI333;
7354 }
7355 break;
7356
7357 case N32_OP6_SHI:
7358 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7359 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7360 {
7361 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7362 N32_IMM15S (insn));
7363 insn_type = NDS32_INSN_SHI333;
7364 }
7365 break;
7366
7367 case N32_OP6_LBI:
7368 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7369 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7370 {
7371 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7372 N32_IMM15S (insn));
7373 insn_type = NDS32_INSN_LBI333;
7374 }
7375 break;
7376
7377 case N32_OP6_SBI:
7378 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7379 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7380 {
7381 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7382 N32_IMM15S (insn));
7383 insn_type = NDS32_INSN_SBI333;
7384 }
7385 break;
7386
7387 case N32_OP6_ALU1:
7388 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7389
7390 case N32_OP6_ALU2:
7391 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7392
7393 case N32_OP6_BR1:
7394 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7395 goto done;
7396
7397 if ((insn & __BIT (14)) == 0)
7398 {
7399 /* N32_BR1_BEQ */
7400 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7401 && N32_RT5 (insn) != REG_R5)
7402 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7403 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7404 && N32_RA5 (insn) != REG_R5)
7405 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7406 insn_type = NDS32_INSN_BEQS38;
7407 break;
7408 }
7409 else
7410 {
7411 /* N32_BR1_BNE */
7412 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7413 && N32_RT5 (insn) != REG_R5)
7414 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7415 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7416 && N32_RA5 (insn) != REG_R5)
7417 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7418 insn_type = NDS32_INSN_BNES38;
7419 break;
7420 }
7421 break;
7422
7423 case N32_OP6_BR2:
7424 switch (N32_BR2_SUB (insn))
7425 {
7426 case N32_BR2_BEQZ:
7427 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7428 {
7429 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7430 insn_type = NDS32_INSN_BEQZ38;
7431 }
7432 else if (N32_RT5 (insn) == REG_R15
7433 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7434 {
7435 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7436 insn_type = NDS32_INSN_BEQZS8;
7437 }
7438 break;
7439
7440 case N32_BR2_BNEZ:
7441 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7442 {
7443 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7444 insn_type = NDS32_INSN_BNEZ38;
7445 }
7446 else if (N32_RT5 (insn) == REG_R15
7447 && IS_WITHIN_S (N32_IMM16S (insn), 8))
7448 {
7449 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7450 insn_type = NDS32_INSN_BNEZS8;
7451 }
7452 break;
7453
7454 case N32_BR2_IFCALL:
7455 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7456 {
7457 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7458 insn_type = NDS32_INSN_IFCALL9;
7459 }
7460 break;
7461 }
7462 break;
7463
7464 case N32_OP6_JI:
7465 if ((insn & __BIT (24)) == 0)
7466 {
7467 /* N32_JI_J */
7468 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7469 {
7470 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7471 insn_type = NDS32_INSN_J8;
7472 }
7473 }
7474 break;
7475
7476 case N32_OP6_JREG:
7477 if (__GF (insn, 8, 2) != 0)
7478 goto done;
7479
7480 switch (N32_IMMU (insn, 5))
7481 {
7482 case N32_JREG_JR:
7483 if (N32_JREG_HINT (insn) == 0)
7484 {
7485 /* jr */
7486 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7487 insn_type = NDS32_INSN_JR5;
7488 }
7489 else if (N32_JREG_HINT (insn) == 1)
7490 {
7491 /* ret */
7492 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7493 insn_type = NDS32_INSN_RET5;
7494 }
7495 else if (N32_JREG_HINT (insn) == 3)
7496 {
7497 /* ifret = mov55 $sp, $sp */
7498 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7499 insn_type = NDS32_INSN_IFRET;
7500 }
7501 break;
7502
7503 case N32_JREG_JRAL:
7504 /* It's convertible when return rt5 is $lp and address
7505 translation is kept. */
7506 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7507 {
7508 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7509 insn_type = NDS32_INSN_JRAL5;
7510 }
7511 break;
7512 }
7513 break;
7514
7515 case N32_OP6_MISC:
7516 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7517 {
7518 /* For v3, swid above 31 are used for ex9.it. */
7519 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7520 insn_type = NDS32_INSN_BREAK16;
7521 }
7522 break;
7523
7524 default:
7525 /* This instruction has no 16-bit variant. */
7526 goto done;
7527 }
7528
7529 done:
7530 /* Bit-15 of insn16 should be set for a valid instruction. */
7531 if ((insn16 & 0x8000) == 0)
7532 return 0;
7533
7534 if (pinsn16)
7535 *pinsn16 = insn16;
7536 if (pinsn_type)
7537 *pinsn_type = insn_type;
7538 return 1;
7539 }
7540
7541 static int
7542 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7543 Elf_Internal_Rela *reloc)
7544 {
7545 uint16_t insn16 = 0;
7546
7547 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7548 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7549 return 0;
7550
7551 if (!N32_IS_RT3 (insn))
7552 return 0;
7553
7554 switch (N32_OP6 (insn))
7555 {
7556 case N32_OP6_LWI:
7557 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7558 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7559 break;
7560 case N32_OP6_SWI:
7561 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7562 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7563 break;
7564 case N32_OP6_HWGP:
7565 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7566 break;
7567
7568 if (__GF (insn, 17, 3) == 6)
7569 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7570 else if (__GF (insn, 17, 3) == 7)
7571 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7572 break;
7573 }
7574
7575 if ((insn16 & 0x8000) == 0)
7576 return 0;
7577
7578 *pinsn16 = insn16;
7579 return 1;
7580 }
7581
7582 /* Convert a 16-bit instruction to 32-bit one.
7583 INSN16 it the input and PINSN it the point to output.
7584 Return non-zero on successful. Otherwise 0 is returned. */
7585
7586 int
7587 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7588 {
7589 uint32_t insn = 0xffffffff;
7590 unsigned long mach = bfd_get_mach (abfd);
7591
7592 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7593
7594 switch (__GF (insn16, 9, 6))
7595 {
7596 case 0x4: /* add45 */
7597 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7598 N16_RA5 (insn16));
7599 goto done;
7600 case 0x5: /* sub45 */
7601 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7602 N16_RA5 (insn16));
7603 goto done;
7604 case 0x6: /* addi45 */
7605 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7606 N16_IMM5U (insn16));
7607 goto done;
7608 case 0x7: /* subi45 */
7609 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7610 -N16_IMM5U (insn16));
7611 goto done;
7612 case 0x8: /* srai45 */
7613 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7614 N16_IMM5U (insn16));
7615 goto done;
7616 case 0x9: /* srli45 */
7617 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7618 N16_IMM5U (insn16));
7619 goto done;
7620 case 0xa: /* slli333 */
7621 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7622 N16_IMM3U (insn16));
7623 goto done;
7624 case 0xc: /* add333 */
7625 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7626 N16_RB3 (insn16));
7627 goto done;
7628 case 0xd: /* sub333 */
7629 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7630 N16_RB3 (insn16));
7631 goto done;
7632 case 0xe: /* addi333 */
7633 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7634 N16_IMM3U (insn16));
7635 goto done;
7636 case 0xf: /* subi333 */
7637 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7638 -N16_IMM3U (insn16));
7639 goto done;
7640 case 0x10: /* lwi333 */
7641 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7642 N16_IMM3U (insn16));
7643 goto done;
7644 case 0x12: /* lhi333 */
7645 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7646 N16_IMM3U (insn16));
7647 goto done;
7648 case 0x13: /* lbi333 */
7649 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7650 N16_IMM3U (insn16));
7651 goto done;
7652 case 0x11: /* lwi333.bi */
7653 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7654 N16_IMM3U (insn16));
7655 goto done;
7656 case 0x14: /* swi333 */
7657 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7658 N16_IMM3U (insn16));
7659 goto done;
7660 case 0x16: /* shi333 */
7661 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7662 N16_IMM3U (insn16));
7663 goto done;
7664 case 0x17: /* sbi333 */
7665 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7666 N16_IMM3U (insn16));
7667 goto done;
7668 case 0x15: /* swi333.bi */
7669 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7670 N16_IMM3U (insn16));
7671 goto done;
7672 case 0x18: /* addri36.sp */
7673 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7674 N16_IMM6U (insn16) << 2);
7675 goto done;
7676 case 0x19: /* lwi45.fe */
7677 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7678 (N16_IMM5U (insn16) - 32));
7679 goto done;
7680 case 0x1a: /* lwi450 */
7681 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7682 goto done;
7683 case 0x1b: /* swi450 */
7684 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7685 goto done;
7686
7687 /* These are r15 implied instructions. */
7688 case 0x30: /* slts45 */
7689 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7690 goto done;
7691 case 0x31: /* slt45 */
7692 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7693 goto done;
7694 case 0x32: /* sltsi45 */
7695 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7696 goto done;
7697 case 0x33: /* slti45 */
7698 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7699 goto done;
7700 case 0x34: /* beqzs8, bnezs8 */
7701 if (insn16 & __BIT (8))
7702 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7703 else
7704 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7705 goto done;
7706
7707 case 0x35: /* break16, ex9.it */
7708 /* Only consider range of v3 break16. */
7709 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7710 goto done;
7711
7712 case 0x3c: /* ifcall9 */
7713 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7714 goto done;
7715 case 0x3d: /* movpi45 */
7716 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7717 goto done;
7718
7719 case 0x3f: /* MISC33 */
7720 switch (insn16 & 0x7)
7721 {
7722 case 2: /* neg33 */
7723 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7724 break;
7725 case 3: /* not33 */
7726 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7727 N16_RA3 (insn16));
7728 break;
7729 case 4: /* mul33 */
7730 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7731 N16_RA3 (insn16));
7732 break;
7733 case 5: /* xor33 */
7734 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7735 N16_RA3 (insn16));
7736 break;
7737 case 6: /* and33 */
7738 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7739 N16_RA3 (insn16));
7740 break;
7741 case 7: /* or33 */
7742 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7743 N16_RA3 (insn16));
7744 break;
7745 }
7746 goto done;
7747
7748 case 0xb:
7749 switch (insn16 & 0x7)
7750 {
7751 case 0: /* zeb33 */
7752 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7753 break;
7754 case 1: /* zeh33 */
7755 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7756 break;
7757 case 2: /* seb33 */
7758 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7759 break;
7760 case 3: /* seh33 */
7761 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7762 break;
7763 case 4: /* xlsb33 */
7764 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7765 break;
7766 case 5: /* x11b33 */
7767 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7768 break;
7769 case 6: /* bmski33 */
7770 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7771 1 << __GF (insn16, 3, 3));
7772 break;
7773 case 7: /* fexti33 */
7774 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7775 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7776 break;
7777 }
7778 goto done;
7779 }
7780
7781 switch (__GF (insn16, 10, 5))
7782 {
7783 case 0x0: /* mov55 or ifret16 */
7784 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7785 && N16_RT5 (insn16) == N16_RA5 (insn16))
7786 insn = N32_JREG (JR, 0, 0, 0, 3);
7787 else
7788 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7789 goto done;
7790 case 0x1: /* movi55 */
7791 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7792 goto done;
7793 case 0x1b: /* addi10s (V2) */
7794 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7795 goto done;
7796 }
7797
7798 switch (__GF (insn16, 11, 4))
7799 {
7800 case 0x7: /* lwi37.fp/swi37.fp */
7801 if (insn16 & __BIT (7)) /* swi37.fp */
7802 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7803 else /* lwi37.fp */
7804 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7805 goto done;
7806 case 0x8: /* beqz38 */
7807 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7808 goto done;
7809 case 0x9: /* bnez38 */
7810 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7811 goto done;
7812 case 0xa: /* beqs38/j8, implied r5 */
7813 if (N16_RT38 (insn16) == 5)
7814 insn = N32_JI (J, N16_IMM8S (insn16));
7815 else
7816 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7817 goto done;
7818 case 0xb: /* bnes38 and others */
7819 if (N16_RT38 (insn16) == 5)
7820 {
7821 switch (__GF (insn16, 5, 3))
7822 {
7823 case 0: /* jr5 */
7824 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7825 break;
7826 case 4: /* ret5 */
7827 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7828 break;
7829 case 1: /* jral5 */
7830 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7831 break;
7832 case 2: /* ex9.it imm5 */
7833 /* ex9.it had no 32-bit variantl. */
7834 break;
7835 case 5: /* add5.pc */
7836 /* add5.pc had no 32-bit variantl. */
7837 break;
7838 }
7839 }
7840 else /* bnes38 */
7841 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7842 goto done;
7843 case 0xe: /* lwi37/swi37 */
7844 if (insn16 & (1 << 7)) /* swi37.sp */
7845 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7846 else /* lwi37.sp */
7847 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7848 goto done;
7849 }
7850
7851 done:
7852 if (insn & 0x80000000)
7853 return 0;
7854
7855 if (pinsn)
7856 *pinsn = insn;
7857 return 1;
7858 }
7859 \f
7860 static bfd_boolean
7861 is_sda_access_insn (unsigned long insn)
7862 {
7863 switch (N32_OP6 (insn))
7864 {
7865 case N32_OP6_LWI:
7866 case N32_OP6_LHI:
7867 case N32_OP6_LHSI:
7868 case N32_OP6_LBI:
7869 case N32_OP6_LBSI:
7870 case N32_OP6_SWI:
7871 case N32_OP6_SHI:
7872 case N32_OP6_SBI:
7873 case N32_OP6_LWC:
7874 case N32_OP6_LDC:
7875 case N32_OP6_SWC:
7876 case N32_OP6_SDC:
7877 return TRUE;
7878 default:
7879 ;
7880 }
7881 return FALSE;
7882 }
7883
7884 static unsigned long
7885 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7886 {
7887 uint32_t oinsn = 0;
7888
7889 switch (type)
7890 {
7891 case R_NDS32_GOT_LO12:
7892 case R_NDS32_GOTOFF_LO12:
7893 case R_NDS32_PLTREL_LO12:
7894 case R_NDS32_PLT_GOTREL_LO12:
7895 case R_NDS32_LO12S0_RELA:
7896 switch (N32_OP6 (insn))
7897 {
7898 case N32_OP6_LBI:
7899 /* lbi.gp */
7900 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7901 break;
7902 case N32_OP6_LBSI:
7903 /* lbsi.gp */
7904 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7905 break;
7906 case N32_OP6_SBI:
7907 /* sbi.gp */
7908 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7909 break;
7910 case N32_OP6_ORI:
7911 /* addi.gp */
7912 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7913 break;
7914 }
7915 break;
7916
7917 case R_NDS32_LO12S1_RELA:
7918 switch (N32_OP6 (insn))
7919 {
7920 case N32_OP6_LHI:
7921 /* lhi.gp */
7922 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7923 break;
7924 case N32_OP6_LHSI:
7925 /* lhsi.gp */
7926 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7927 break;
7928 case N32_OP6_SHI:
7929 /* shi.gp */
7930 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7931 break;
7932 }
7933 break;
7934
7935 case R_NDS32_LO12S2_RELA:
7936 switch (N32_OP6 (insn))
7937 {
7938 case N32_OP6_LWI:
7939 /* lwi.gp */
7940 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7941 break;
7942 case N32_OP6_SWI:
7943 /* swi.gp */
7944 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7945 break;
7946 }
7947 break;
7948
7949 case R_NDS32_LO12S2_DP_RELA:
7950 case R_NDS32_LO12S2_SP_RELA:
7951 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7952 break;
7953 }
7954
7955 if (oinsn)
7956 *pinsn = oinsn;
7957
7958 return oinsn != 0;
7959 }
7960
7961 /* Linker hasn't found the correct merge section for non-section symbol
7962 in relax time, this work is left to the function elf_link_input_bfd().
7963 So for non-section symbol, _bfd_merged_section_offset is also needed
7964 to find the correct symbol address. */
7965
7966 static bfd_vma
7967 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7968 asection **psec, Elf_Internal_Rela *rel)
7969 {
7970 asection *sec = *psec;
7971 bfd_vma relocation;
7972
7973 relocation = (sec->output_section->vma
7974 + sec->output_offset + sym->st_value);
7975 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7976 {
7977 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7978 rel->r_addend =
7979 _bfd_merged_section_offset (abfd, psec,
7980 elf_section_data (sec)->sec_info,
7981 sym->st_value + rel->r_addend);
7982 else
7983 rel->r_addend =
7984 _bfd_merged_section_offset (abfd, psec,
7985 elf_section_data (sec)->sec_info,
7986 sym->st_value) + rel->r_addend;
7987
7988 if (sec != *psec)
7989 {
7990 /* If we have changed the section, and our original section is
7991 marked with SEC_EXCLUDE, it means that the original
7992 SEC_MERGE section has been completely subsumed in some
7993 other SEC_MERGE section. In this case, we need to leave
7994 some info around for --emit-relocs. */
7995 if ((sec->flags & SEC_EXCLUDE) != 0)
7996 sec->kept_section = *psec;
7997 sec = *psec;
7998 }
7999 rel->r_addend -= relocation;
8000 rel->r_addend += sec->output_section->vma + sec->output_offset;
8001 }
8002 return relocation;
8003 }
8004
8005 static bfd_vma
8006 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8007 Elf_Internal_Sym *isymbuf,
8008 Elf_Internal_Shdr *symtab_hdr)
8009 {
8010 bfd_signed_vma foff;
8011 bfd_vma symval, addend;
8012 Elf_Internal_Rela irel_fn;
8013 Elf_Internal_Sym *isym;
8014 asection *sym_sec;
8015
8016 /* Get the value of the symbol referred to by the reloc. */
8017 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8018 {
8019 /* A local symbol. */
8020 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8021
8022 if (isym->st_shndx == SHN_UNDEF)
8023 sym_sec = bfd_und_section_ptr;
8024 else if (isym->st_shndx == SHN_ABS)
8025 sym_sec = bfd_abs_section_ptr;
8026 else if (isym->st_shndx == SHN_COMMON)
8027 sym_sec = bfd_com_section_ptr;
8028 else
8029 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8030 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8031 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8032 addend = irel_fn.r_addend;
8033 }
8034 else
8035 {
8036 unsigned long indx;
8037 struct elf_link_hash_entry *h;
8038
8039 /* An external symbol. */
8040 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8041 h = elf_sym_hashes (abfd)[indx];
8042 BFD_ASSERT (h != NULL);
8043
8044 while (h->root.type == bfd_link_hash_indirect
8045 || h->root.type == bfd_link_hash_warning)
8046 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8047
8048 if (h->root.type != bfd_link_hash_defined
8049 && h->root.type != bfd_link_hash_defweak)
8050 /* This appears to be a reference to an undefined
8051 symbol. Just ignore it--it will be caught by the
8052 regular reloc processing. */
8053 return 0;
8054
8055 if (h->root.u.def.section->flags & SEC_MERGE)
8056 {
8057 sym_sec = h->root.u.def.section;
8058 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8059 (sym_sec)->sec_info, h->root.u.def.value);
8060 symval = symval + sym_sec->output_section->vma
8061 + sym_sec->output_offset;
8062 }
8063 else
8064 symval = (h->root.u.def.value
8065 + h->root.u.def.section->output_section->vma
8066 + h->root.u.def.section->output_offset);
8067 addend = irel->r_addend;
8068 }
8069
8070 foff = symval + addend;
8071
8072 return foff;
8073 }
8074
8075 static bfd_vma
8076 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8077 Elf_Internal_Rela *irel,
8078 Elf_Internal_Shdr *symtab_hdr)
8079 {
8080 int symndx;
8081 bfd_vma *local_got_offsets;
8082 /* Get the value of the symbol referred to by the reloc. */
8083 struct elf_link_hash_entry *h;
8084 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8085
8086 /* An external symbol. */
8087 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8088 h = elf_sym_hashes (abfd)[symndx];
8089 while (h->root.type == bfd_link_hash_indirect
8090 || h->root.type == bfd_link_hash_warning)
8091 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8092
8093 if (symndx >= 0)
8094 {
8095 BFD_ASSERT (h != NULL);
8096 return htab->sgot->output_section->vma + htab->sgot->output_offset
8097 + h->got.offset;
8098 }
8099 else
8100 {
8101 local_got_offsets = elf_local_got_offsets (abfd);
8102 BFD_ASSERT (local_got_offsets != NULL);
8103 return htab->sgot->output_section->vma + htab->sgot->output_offset
8104 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8105 }
8106
8107 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8108 /* The check of h->root.type is passed. */
8109 }
8110
8111 static int
8112 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8113 asection *sec, Elf_Internal_Rela *rel)
8114 {
8115 bfd_byte *contents;
8116 unsigned short insn16;
8117
8118 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8119 return FALSE;
8120 contents = elf_section_data (sec)->this_hdr.contents;
8121 insn16 = bfd_getb16 (contents + rel->r_offset);
8122 if (insn16 == NDS32_NOP16)
8123 return TRUE;
8124 return FALSE;
8125 }
8126
8127 /* It checks whether the instruction could be converted to
8128 16-bit form and returns the converted one.
8129
8130 `internal_relocs' is supposed to be sorted. */
8131
8132 static int
8133 is_convert_32_to_16 (bfd *abfd, asection *sec,
8134 Elf_Internal_Rela *reloc,
8135 Elf_Internal_Rela *internal_relocs,
8136 Elf_Internal_Rela *irelend,
8137 uint16_t *insn16)
8138 {
8139 #define NORMAL_32_TO_16 (1 << 0)
8140 #define SPECIAL_32_TO_16 (1 << 1)
8141 bfd_byte *contents = NULL;
8142 bfd_signed_vma off;
8143 bfd_vma mem_addr;
8144 uint32_t insn = 0;
8145 Elf_Internal_Rela *pc_rel;
8146 int pic_ext_target = 0;
8147 Elf_Internal_Shdr *symtab_hdr;
8148 Elf_Internal_Sym *isymbuf = NULL;
8149 int convert_type;
8150 bfd_vma offset;
8151
8152 if (reloc->r_offset + 4 > sec->size)
8153 return FALSE;
8154
8155 offset = reloc->r_offset;
8156
8157 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
8158 return FALSE;
8159 insn = bfd_getb32 (contents + offset);
8160
8161 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8162 convert_type = NORMAL_32_TO_16;
8163 else if (special_convert_32_to_16 (insn, insn16, reloc))
8164 convert_type = SPECIAL_32_TO_16;
8165 else
8166 return FALSE;
8167
8168 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8169 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8170 return FALSE;
8171
8172 /* Find the first relocation of the same relocation-type,
8173 so we iteratie them forward. */
8174 pc_rel = reloc;
8175 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
8176 pc_rel--;
8177
8178 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8179 {
8180 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8181 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8182 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8183 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8184 {
8185 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8186 &pic_ext_target);
8187 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8188 || off == 0)
8189 return FALSE;
8190 break;
8191 }
8192 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8193 {
8194 /* movi => movi55 */
8195 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8196 symtab_hdr);
8197 /* mem_addr is unsigned, but the value should
8198 be between [-16, 15]. */
8199 if ((mem_addr + 0x10) >> 5)
8200 return FALSE;
8201 break;
8202 }
8203 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8204 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8205 {
8206 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8207 because it can be relaxed to addi for TLS_LE_ADD. */
8208 return FALSE;
8209 }
8210 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8211 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8212 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8213 && convert_type == SPECIAL_32_TO_16)
8214 {
8215 /* fp-as-gp
8216 We've selected a best fp-base for this access, so we can
8217 always resolve it anyway. Do nothing. */
8218 break;
8219 }
8220 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8221 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8222 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8223 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8224 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8225 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8226 {
8227 /* Prevent unresolved addi instruction translate
8228 to addi45 or addi333. */
8229 return FALSE;
8230 }
8231 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8232 {
8233 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8234 &pic_ext_target);
8235 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8236 return FALSE;
8237 break;
8238 }
8239 }
8240
8241 return TRUE;
8242 }
8243
8244 static void
8245 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8246 Elf_Internal_Rela *reloc,
8247 Elf_Internal_Rela *internal_relocs,
8248 Elf_Internal_Rela *irelend,
8249 unsigned short insn16)
8250 {
8251 Elf_Internal_Rela *pc_rel;
8252 bfd_vma offset;
8253
8254 offset = reloc->r_offset;
8255 bfd_putb16 (insn16, contents + offset);
8256 /* Find the first relocation of the same relocation-type,
8257 so we iteratie them forward. */
8258 pc_rel = reloc;
8259 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8260 pc_rel--;
8261
8262 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8263 {
8264 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8265 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8266 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8267 {
8268 pc_rel->r_info =
8269 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8270 }
8271 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8272 pc_rel->r_info =
8273 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8274 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8275 pc_rel->r_info =
8276 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8277 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8278 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8279 pc_rel->r_info =
8280 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8281 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8282 pc_rel->r_info =
8283 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8284 }
8285 }
8286
8287 /* Find a relocation of type specified by `reloc_type'
8288 of the same r_offset with reloc.
8289 If not found, return irelend.
8290
8291 Assuming relocations are sorted by r_offset,
8292 we find the relocation from `reloc' backward untill relocs,
8293 or find it from `reloc' forward untill irelend. */
8294
8295 static Elf_Internal_Rela *
8296 find_relocs_at_address (Elf_Internal_Rela *reloc,
8297 Elf_Internal_Rela *relocs,
8298 Elf_Internal_Rela *irelend,
8299 enum elf_nds32_reloc_type reloc_type)
8300 {
8301 Elf_Internal_Rela *rel_t;
8302
8303 /* Find backward. */
8304 for (rel_t = reloc;
8305 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8306 rel_t--)
8307 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8308 return rel_t;
8309
8310 /* We didn't find it backward. Try find it forward. */
8311 for (rel_t = reloc;
8312 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8313 rel_t++)
8314 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8315 return rel_t;
8316
8317 return irelend;
8318 }
8319
8320 /* Find a relocation of specified type and offset.
8321 `reloc' is just a refence point to find a relocation at specified offset.
8322 If not found, return irelend.
8323
8324 Assuming relocations are sorted by r_offset,
8325 we find the relocation from `reloc' backward untill relocs,
8326 or find it from `reloc' forward untill irelend. */
8327
8328 static Elf_Internal_Rela *
8329 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8330 Elf_Internal_Rela *relocs,
8331 Elf_Internal_Rela *irelend,
8332 enum elf_nds32_reloc_type reloc_type,
8333 bfd_vma offset_p)
8334 {
8335 Elf_Internal_Rela *rel_t = NULL;
8336
8337 /* First, we try to find a relocation of offset `offset_p',
8338 and then we use find_relocs_at_address to find specific type. */
8339
8340 if (reloc->r_offset > offset_p)
8341 {
8342 /* Find backward. */
8343 for (rel_t = reloc;
8344 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8345 /* Do nothing. */;
8346 }
8347 else if (reloc->r_offset < offset_p)
8348 {
8349 /* Find forward. */
8350 for (rel_t = reloc;
8351 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8352 /* Do nothing. */;
8353 }
8354 else
8355 rel_t = reloc;
8356
8357 /* Not found? */
8358 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8359 return irelend;
8360
8361 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8362 }
8363
8364 static bfd_boolean
8365 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8366 Elf_Internal_Rela *internal_relocs,
8367 Elf_Internal_Rela *irelend,
8368 unsigned char reloc_type)
8369 {
8370 Elf_Internal_Rela *rel_t;
8371
8372 for (rel_t = reloc;
8373 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8374 rel_t--)
8375 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8376 {
8377 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8378 && rel_t->r_addend == reloc->r_addend)
8379 continue;
8380 return TRUE;
8381 }
8382
8383 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8384 rel_t++)
8385 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8386 {
8387 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8388 && rel_t->r_addend == reloc->r_addend)
8389 continue;
8390 return TRUE;
8391 }
8392
8393 return FALSE;
8394 }
8395
8396 typedef struct nds32_elf_blank nds32_elf_blank_t;
8397 struct nds32_elf_blank
8398 {
8399 /* Where the blank begins. */
8400 bfd_vma offset;
8401 /* The size of the blank. */
8402 bfd_vma size;
8403 /* The accumulative size before this blank. */
8404 bfd_vma total_size;
8405 nds32_elf_blank_t *next;
8406 nds32_elf_blank_t *prev;
8407 };
8408
8409 static nds32_elf_blank_t *blank_free_list = NULL;
8410
8411 static nds32_elf_blank_t *
8412 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8413 {
8414 nds32_elf_blank_t *blank_t;
8415
8416 if (blank_free_list)
8417 {
8418 blank_t = blank_free_list;
8419 blank_free_list = blank_free_list->next;
8420 }
8421 else
8422 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8423
8424 if (blank_t == NULL)
8425 return NULL;
8426
8427 blank_t->offset = offset_p;
8428 blank_t->size = size_p;
8429 blank_t->total_size = 0;
8430 blank_t->next = NULL;
8431 blank_t->prev = NULL;
8432
8433 return blank_t;
8434 }
8435
8436 static void
8437 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8438 {
8439 if (blank_free_list)
8440 {
8441 blank_free_list->prev = blank_p;
8442 blank_p->next = blank_free_list;
8443 }
8444 else
8445 blank_p->next = NULL;
8446
8447 blank_p->prev = NULL;
8448 blank_free_list = blank_p;
8449 }
8450
8451 static void
8452 clean_nds32_elf_blank (void)
8453 {
8454 nds32_elf_blank_t *blank_t;
8455
8456 while (blank_free_list)
8457 {
8458 blank_t = blank_free_list;
8459 blank_free_list = blank_free_list->next;
8460 free (blank_t);
8461 }
8462 }
8463
8464 static nds32_elf_blank_t *
8465 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8466 {
8467 nds32_elf_blank_t *blank_t;
8468
8469 if (!blank_p)
8470 return NULL;
8471 blank_t = blank_p;
8472
8473 while (blank_t && addr < blank_t->offset)
8474 blank_t = blank_t->prev;
8475 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8476 blank_t = blank_t->next;
8477
8478 return blank_t;
8479 }
8480
8481 static bfd_vma
8482 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8483 int overwrite)
8484 {
8485 nds32_elf_blank_t *blank_t;
8486
8487 blank_t = search_nds32_elf_blank (*blank_p, addr);
8488 if (!blank_t)
8489 return 0;
8490
8491 if (overwrite)
8492 *blank_p = blank_t;
8493
8494 if (addr < blank_t->offset + blank_t->size)
8495 return blank_t->total_size + (addr - blank_t->offset);
8496 else
8497 return blank_t->total_size + blank_t->size;
8498 }
8499
8500 static bfd_boolean
8501 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8502 {
8503 nds32_elf_blank_t *blank_t, *blank_t2;
8504
8505 if (!*blank_p)
8506 {
8507 *blank_p = create_nds32_elf_blank (addr, len);
8508 return *blank_p ? TRUE : FALSE;
8509 }
8510
8511 blank_t = search_nds32_elf_blank (*blank_p, addr);
8512
8513 if (blank_t == NULL)
8514 {
8515 blank_t = create_nds32_elf_blank (addr, len);
8516 if (!blank_t)
8517 return FALSE;
8518 while ((*blank_p)->prev != NULL)
8519 *blank_p = (*blank_p)->prev;
8520 blank_t->next = *blank_p;
8521 (*blank_p)->prev = blank_t;
8522 (*blank_p) = blank_t;
8523 return TRUE;
8524 }
8525
8526 if (addr < blank_t->offset + blank_t->size)
8527 {
8528 if (addr > blank_t->offset + blank_t->size)
8529 blank_t->size = addr - blank_t->offset;
8530 }
8531 else
8532 {
8533 blank_t2 = create_nds32_elf_blank (addr, len);
8534 if (!blank_t2)
8535 return FALSE;
8536 if (blank_t->next)
8537 {
8538 blank_t->next->prev = blank_t2;
8539 blank_t2->next = blank_t->next;
8540 }
8541 blank_t2->prev = blank_t;
8542 blank_t->next = blank_t2;
8543 *blank_p = blank_t2;
8544 }
8545
8546 return TRUE;
8547 }
8548
8549 static bfd_boolean
8550 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8551 bfd_vma len)
8552 {
8553 nds32_elf_blank_t *blank_t;
8554
8555 if (!insert_nds32_elf_blank (blank_p, addr, len))
8556 return FALSE;
8557
8558 blank_t = *blank_p;
8559
8560 if (!blank_t->prev)
8561 {
8562 blank_t->total_size = 0;
8563 blank_t = blank_t->next;
8564 }
8565
8566 while (blank_t)
8567 {
8568 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8569 blank_t = blank_t->next;
8570 }
8571
8572 return TRUE;
8573 }
8574
8575 static void
8576 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8577 {
8578 nds32_elf_blank_t *blank_t;
8579 bfd_vma total_size = 0;
8580
8581 if (!blank_p)
8582 return;
8583
8584 blank_t = blank_p;
8585 while (blank_t->prev)
8586 blank_t = blank_t->prev;
8587 while (blank_t)
8588 {
8589 blank_t->total_size = total_size;
8590 total_size += blank_t->size;
8591 blank_t = blank_t->next;
8592 }
8593 }
8594
8595 static bfd_boolean
8596 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8597 nds32_elf_blank_t *blank_p)
8598 {
8599 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
8600 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
8601 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8602 unsigned int sec_shndx; /* The section the be relaxed. */
8603 bfd_byte *contents; /* Contents data of iterating section. */
8604 Elf_Internal_Rela *internal_relocs;
8605 Elf_Internal_Rela *irel;
8606 Elf_Internal_Rela *irelend;
8607 struct elf_link_hash_entry **sym_hashes;
8608 struct elf_link_hash_entry **end_hashes;
8609 unsigned int symcount;
8610 asection *sect;
8611 nds32_elf_blank_t *blank_t;
8612 nds32_elf_blank_t *blank_t2;
8613 nds32_elf_blank_t *blank_head;
8614
8615 blank_head = blank_t = blank_p;
8616 while (blank_head->prev != NULL)
8617 blank_head = blank_head->prev;
8618 while (blank_t->next != NULL)
8619 blank_t = blank_t->next;
8620
8621 if (blank_t->offset + blank_t->size <= sec->size)
8622 {
8623 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8624 blank_t->next->prev = blank_t;
8625 }
8626 if (blank_head->offset > 0)
8627 {
8628 blank_head->prev = create_nds32_elf_blank (0, 0);
8629 blank_head->prev->next = blank_head;
8630 blank_head = blank_head->prev;
8631 }
8632
8633 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8634
8635 /* The deletion must stop at the next ALIGN reloc for an alignment
8636 power larger than the number of bytes we are deleting. */
8637
8638 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8639 if (!nds32_get_local_syms (abfd, sec, &isym))
8640 return FALSE;
8641
8642 if (isym == NULL)
8643 {
8644 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8645 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8646 symtab_hdr->contents = (bfd_byte *) isym;
8647 }
8648
8649 if (isym == NULL || symtab_hdr->sh_info == 0)
8650 return FALSE;
8651
8652 blank_t = blank_head;
8653 calc_nds32_blank_total (blank_head);
8654
8655 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8656 {
8657 /* Adjust all the relocs. */
8658
8659 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8660 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8661 TRUE /* keep_memory */);
8662 irelend = internal_relocs + sect->reloc_count;
8663
8664 blank_t = blank_head;
8665 blank_t2 = blank_head;
8666
8667 if (!(sect->flags & SEC_RELOC))
8668 continue;
8669
8670 nds32_get_section_contents (abfd, sect, &contents, TRUE);
8671
8672 for (irel = internal_relocs; irel < irelend; irel++)
8673 {
8674 bfd_vma raddr;
8675
8676 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8677 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8678 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8679 {
8680 unsigned long val = 0;
8681 unsigned long mask;
8682 long before, between;
8683 long offset = 0;
8684
8685 switch (ELF32_R_TYPE (irel->r_info))
8686 {
8687 case R_NDS32_DIFF8:
8688 offset = bfd_get_8 (abfd, contents + irel->r_offset);
8689 break;
8690 case R_NDS32_DIFF16:
8691 offset = bfd_get_16 (abfd, contents + irel->r_offset);
8692 break;
8693 case R_NDS32_DIFF32:
8694 val = bfd_get_32 (abfd, contents + irel->r_offset);
8695 /* Get the signed bit and mask for the high part. The
8696 gcc will alarm when right shift 32-bit since the
8697 type size of long may be 32-bit. */
8698 mask = 0 - (val >> 31);
8699 if (mask)
8700 offset = (val | (mask - 0xffffffff));
8701 else
8702 offset = val;
8703 break;
8704 default:
8705 BFD_ASSERT (0);
8706 }
8707
8708 /* DIFF value
8709 0 |encoded in location|
8710 |------------|-------------------|---------
8711 sym+off(addend)
8712 -- before ---| *****************
8713 --------------------- between ---|
8714
8715 We only care how much data are relax between DIFF,
8716 marked as ***. */
8717
8718 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8719 between = get_nds32_elf_blank_total (&blank_t,
8720 irel->r_addend + offset, 0);
8721 if (between == before)
8722 goto done_adjust_diff;
8723
8724 switch (ELF32_R_TYPE (irel->r_info))
8725 {
8726 case R_NDS32_DIFF8:
8727 bfd_put_8 (abfd, offset - (between - before),
8728 contents + irel->r_offset);
8729 break;
8730 case R_NDS32_DIFF16:
8731 bfd_put_16 (abfd, offset - (between - before),
8732 contents + irel->r_offset);
8733 break;
8734 case R_NDS32_DIFF32:
8735 bfd_put_32 (abfd, offset - (between - before),
8736 contents + irel->r_offset);
8737 break;
8738 }
8739 }
8740 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8741 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8742 {
8743 bfd_vma val = 0;
8744 unsigned int len = 0;
8745 unsigned long before, between;
8746 bfd_byte *endp, *p;
8747
8748 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8749 &len);
8750
8751 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8752 between = get_nds32_elf_blank_total (&blank_t,
8753 irel->r_addend + val, 0);
8754 if (between == before)
8755 goto done_adjust_diff;
8756
8757 p = contents + irel->r_offset;
8758 endp = p + len -1;
8759 memset (p, 0x80, len);
8760 *(endp) = 0;
8761 p = write_uleb128 (p, val - (between - before)) - 1;
8762 if (p < endp)
8763 *p |= 0x80;
8764 }
8765 done_adjust_diff:
8766
8767 if (sec == sect)
8768 {
8769 raddr = irel->r_offset;
8770 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8771 irel->r_offset, 1);
8772
8773 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8774 continue;
8775 if (blank_t2 && blank_t2->next
8776 && (blank_t2->offset > raddr
8777 || blank_t2->next->offset <= raddr))
8778 (*_bfd_error_handler)
8779 (_("%B: %s\n"), abfd,
8780 "Error: search_nds32_elf_blank reports wrong node");
8781
8782 /* Mark reloc in deleted portion as NONE.
8783 For some relocs like R_NDS32_LABEL that doesn't modify the
8784 content in the section. R_NDS32_LABEL doesn't belong to the
8785 instruction in the section, so we should preserve it. */
8786 if (raddr >= blank_t2->offset
8787 && raddr < blank_t2->offset + blank_t2->size
8788 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8789 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8790 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8793 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8794 {
8795 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8796 R_NDS32_NONE);
8797 continue;
8798 }
8799 }
8800
8801 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8802 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8803 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8804 continue;
8805
8806 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8807 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8808 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8809 {
8810 if (irel->r_addend <= sec->size)
8811 irel->r_addend -=
8812 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8813 }
8814 }
8815 }
8816
8817 /* Adjust the local symbols defined in this section. */
8818 blank_t = blank_head;
8819 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8820 {
8821 if (isym->st_shndx == sec_shndx)
8822 {
8823 if (isym->st_value <= sec->size)
8824 {
8825 bfd_vma ahead;
8826 bfd_vma orig_addr = isym->st_value;
8827
8828 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8829 isym->st_value -= ahead;
8830
8831 /* Adjust function size. */
8832 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8833 && isym->st_size > 0)
8834 isym->st_size -=
8835 get_nds32_elf_blank_total
8836 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8837 }
8838 }
8839 }
8840
8841 /* Now adjust the global symbols defined in this section. */
8842 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8843 - symtab_hdr->sh_info);
8844 sym_hashes = elf_sym_hashes (abfd);
8845 end_hashes = sym_hashes + symcount;
8846 blank_t = blank_head;
8847 for (; sym_hashes < end_hashes; sym_hashes++)
8848 {
8849 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8850
8851 if ((sym_hash->root.type == bfd_link_hash_defined
8852 || sym_hash->root.type == bfd_link_hash_defweak)
8853 && sym_hash->root.u.def.section == sec)
8854 {
8855 if (sym_hash->root.u.def.value <= sec->size)
8856 {
8857 bfd_vma ahead;
8858 bfd_vma orig_addr = sym_hash->root.u.def.value;
8859
8860 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8861 sym_hash->root.u.def.value -= ahead;
8862
8863 /* Adjust function size. */
8864 if (sym_hash->type == STT_FUNC)
8865 sym_hash->size -=
8866 get_nds32_elf_blank_total
8867 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8868
8869 }
8870 }
8871 }
8872
8873 contents = elf_section_data (sec)->this_hdr.contents;
8874 blank_t = blank_head;
8875 while (blank_t->next)
8876 {
8877 /* Actually delete the bytes. */
8878
8879 /* If current blank is the last blank overlap with current section,
8880 go to finish process. */
8881 if (sec->size <= (blank_t->next->offset))
8882 break;
8883
8884 memmove (contents + blank_t->offset - blank_t->total_size,
8885 contents + blank_t->offset + blank_t->size,
8886 blank_t->next->offset - (blank_t->offset + blank_t->size));
8887
8888 blank_t = blank_t->next;
8889 }
8890
8891 if (sec->size > (blank_t->offset + blank_t->size))
8892 {
8893 /* There are remaining code between blank and section boundary.
8894 Move the remaining code to appropriate location. */
8895 memmove (contents + blank_t->offset - blank_t->total_size,
8896 contents + blank_t->offset + blank_t->size,
8897 sec->size - (blank_t->offset + blank_t->size));
8898 sec->size -= blank_t->total_size + blank_t->size;
8899 }
8900 else
8901 /* This blank is not entirely included in the section,
8902 reduce the section size by only part of the blank size. */
8903 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8904
8905 while (blank_head)
8906 {
8907 blank_t = blank_head;
8908 blank_head = blank_head->next;
8909 remove_nds32_elf_blank (blank_t);
8910 }
8911
8912 return TRUE;
8913 }
8914
8915 /* Get the contents of a section. */
8916
8917 static int
8918 nds32_get_section_contents (bfd *abfd, asection *sec,
8919 bfd_byte **contents_p, bfd_boolean cache)
8920 {
8921 /* Get the section contents. */
8922 if (elf_section_data (sec)->this_hdr.contents != NULL)
8923 *contents_p = elf_section_data (sec)->this_hdr.contents;
8924 else
8925 {
8926 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8927 return FALSE;
8928 if (cache)
8929 elf_section_data (sec)->this_hdr.contents = *contents_p;
8930 }
8931
8932 return TRUE;
8933 }
8934
8935 /* Get the contents of the internal symbol of abfd. */
8936
8937 static int
8938 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8939 Elf_Internal_Sym **isymbuf_p)
8940 {
8941 Elf_Internal_Shdr *symtab_hdr;
8942 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8943
8944 /* Read this BFD's local symbols if we haven't done so already. */
8945 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8946 {
8947 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8948 if (*isymbuf_p == NULL)
8949 {
8950 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8951 symtab_hdr->sh_info, 0,
8952 NULL, NULL, NULL);
8953 if (*isymbuf_p == NULL)
8954 return FALSE;
8955 }
8956 }
8957 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8958
8959 return TRUE;
8960 }
8961
8962 /* Range of small data. */
8963 static bfd_vma sdata_range[2][2];
8964 static bfd_vma const sdata_init_range[2] =
8965 { ACCURATE_12BIT_S1, ACCURATE_19BIT };
8966
8967 static int
8968 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8969 bfd_byte *contents, bfd_vma addr)
8970 {
8971 unsigned long insn = bfd_getb32 (contents + addr);
8972
8973 if (insn & 0x80000000)
8974 return 2;
8975
8976 return 4;
8977 }
8978
8979 /* Set the gp relax range. We have to measure the safe range
8980 to do gp relaxation. */
8981
8982 static void
8983 relax_range_measurement (bfd *abfd)
8984 {
8985 asection *sec_f, *sec_b;
8986 /* For upper bound. */
8987 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8988 bfd_vma align;
8989 static int decide_relax_range = 0;
8990 int i;
8991 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8992
8993 if (decide_relax_range)
8994 return;
8995 decide_relax_range = 1;
8996
8997 if (sda_rela_sec == NULL)
8998 {
8999 /* Since there is no data sections, we assume the range is page size. */
9000 for (i = 0; i < range_number; i++)
9001 {
9002 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9003 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9004 }
9005 return;
9006 }
9007
9008 /* Get the biggest alignment power after the gp located section. */
9009 sec_f = sda_rela_sec->output_section;
9010 sec_b = sec_f->next;
9011 align = 0;
9012 while (sec_b != NULL)
9013 {
9014 if ((unsigned)(1 << sec_b->alignment_power) > align)
9015 align = (1 << sec_b->alignment_power);
9016 sec_b = sec_b->next;
9017 }
9018
9019 /* I guess we can not determine the section before
9020 gp located section, so we assume the align is max page size. */
9021 for (i = 0; i < range_number; i++)
9022 {
9023 sdata_range[i][1] = sdata_init_range[i] - align;
9024 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
9025 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
9026 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9027 }
9028 }
9029
9030 /* These are macros used to check flags encoded in r_addend.
9031 They are only used by nds32_elf_relax_section (). */
9032 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9033 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9034 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9035 #define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9036
9037 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9038
9039 static bfd_boolean
9040 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9041 Elf_Internal_Rela *internal_relocs, int *insn_len,
9042 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9043 Elf_Internal_Shdr *symtab_hdr)
9044 {
9045 /* There are 3 variations for LONGCALL1
9046 case 4-4-2; 16-bit on, optimize off or optimize for space
9047 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9048 ori ta, ta, lo12(symbol) ; LO12S0
9049 jral5 ta ;
9050
9051 case 4-4-4; 16-bit off, optimize don't care
9052 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9053 ori ta, ta, lo12(symbol) ; LO12S0
9054 jral ta ;
9055
9056 case 4-4-4; 16-bit on, optimize for speed
9057 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9058 ori ta, ta, lo12(symbol) ; LO12S0
9059 jral ta ;
9060 Check code for -mlong-calls output. */
9061
9062 /* Get the reloc for the address from which the register is
9063 being loaded. This reloc will tell us which function is
9064 actually being called. */
9065
9066 bfd_vma laddr;
9067 int seq_len; /* Original length of instruction sequence. */
9068 uint32_t insn;
9069 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9070 int pic_ext_target = 0;
9071 bfd_signed_vma foff;
9072 uint16_t insn16;
9073
9074 irelend = internal_relocs + sec->reloc_count;
9075 seq_len = GET_SEQ_LEN (irel->r_addend);
9076 laddr = irel->r_offset;
9077 *insn_len = seq_len;
9078
9079 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9080 R_NDS32_HI20_RELA, laddr);
9081 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9082 R_NDS32_LO12S0_ORI_RELA,
9083 laddr + 4);
9084
9085 if (hi_irelfn == irelend || lo_irelfn == irelend)
9086 {
9087 (*_bfd_error_handler)
9088 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9089 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9090 return FALSE;
9091 }
9092
9093 /* Get the value of the symbol referred to by the reloc. */
9094 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9095 &pic_ext_target);
9096
9097 /* This condition only happened when symbol is undefined. */
9098 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9099 || foff >= CONSERVATIVE_24BIT_S1)
9100 return FALSE;
9101
9102 /* Relax to: jal symbol; 25_PCREL */
9103 /* For simplicity of coding, we are going to modify the section
9104 contents, the section relocs, and the BFD symbol table. We
9105 must tell the rest of the code not to free up this
9106 information. It would be possible to instead create a table
9107 of changes which have to be made, as is done in coff-mips.c;
9108 that would be more work, but would require less memory when
9109 the linker is run. */
9110
9111 /* Replace the long call with a jal. */
9112 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9113 R_NDS32_25_PCREL_RELA);
9114 irel->r_addend = hi_irelfn->r_addend;
9115
9116 /* We don't resolve this here but resolve it in relocate_section. */
9117 insn = INSN_JAL;
9118 bfd_putb32 (insn, contents + irel->r_offset);
9119
9120 hi_irelfn->r_info =
9121 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9122 lo_irelfn->r_info =
9123 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9124 *insn_len = 4;
9125
9126 if (seq_len & 0x2)
9127 {
9128 insn16 = NDS32_NOP16;
9129 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9130 lo_irelfn->r_info =
9131 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9132 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9133 *insn_len += 2;
9134 }
9135 return TRUE;
9136 }
9137
9138 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9139 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
9140
9141 static bfd_boolean
9142 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9143 Elf_Internal_Rela *internal_relocs, int *insn_len,
9144 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9145 Elf_Internal_Shdr *symtab_hdr)
9146 {
9147 /* bltz rt, .L1 ; LONGCALL2
9148 jal symbol ; 25_PCREL
9149 .L1: */
9150
9151 /* Get the reloc for the address from which the register is
9152 being loaded. This reloc will tell us which function is
9153 actually being called. */
9154
9155 bfd_vma laddr;
9156 uint32_t insn;
9157 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9158 int pic_ext_target = 0;
9159 bfd_signed_vma foff;
9160
9161 irelend = internal_relocs + sec->reloc_count;
9162 laddr = irel->r_offset;
9163 i1_irelfn =
9164 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9165 R_NDS32_25_PCREL_RELA, laddr + 4);
9166
9167 if (i1_irelfn == irelend)
9168 {
9169 (*_bfd_error_handler)
9170 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9171 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9172 return FALSE;
9173 }
9174
9175 insn = bfd_getb32 (contents + laddr);
9176
9177 /* Get the value of the symbol referred to by the reloc. */
9178 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9179 &pic_ext_target);
9180
9181 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9182 || foff >= CONSERVATIVE_16BIT_S1)
9183 return FALSE;
9184
9185 /* Relax to bgezal rt, label ; 17_PCREL
9186 or bltzal rt, label ; 17_PCREL */
9187
9188 /* Convert to complimentary conditional call. */
9189 insn = CONVERT_CONDITION_CALL (insn);
9190
9191 /* For simplicity of coding, we are going to modify the section
9192 contents, the section relocs, and the BFD symbol table. We
9193 must tell the rest of the code not to free up this
9194 information. It would be possible to instead create a table
9195 of changes which have to be made, as is done in coff-mips.c;
9196 that would be more work, but would require less memory when
9197 the linker is run. */
9198
9199 /* Clean unnessary relocations. */
9200 i1_irelfn->r_info =
9201 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9202 cond_irelfn =
9203 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9204 R_NDS32_17_PCREL_RELA, laddr);
9205 if (cond_irelfn != irelend)
9206 cond_irelfn->r_info =
9207 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9208
9209 /* Replace the long call with a bgezal. */
9210 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9211 R_NDS32_17_PCREL_RELA);
9212 irel->r_addend = i1_irelfn->r_addend;
9213
9214 bfd_putb32 (insn, contents + irel->r_offset);
9215
9216 *insn_len = 4;
9217 return TRUE;
9218 }
9219
9220 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9221
9222 static bfd_boolean
9223 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9224 Elf_Internal_Rela *internal_relocs, int *insn_len,
9225 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9226 Elf_Internal_Shdr *symtab_hdr)
9227 {
9228 /* There are 3 variations for LONGCALL3
9229 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9230 bltz rt, $1 ; LONGCALL3
9231 sethi ta, hi20(symbol) ; HI20
9232 ori ta, ta, lo12(symbol) ; LO12S0
9233 jral5 ta ;
9234 $1
9235
9236 case 4-4-4-4; 16-bit off, optimize don't care
9237 bltz rt, $1 ; LONGCALL3
9238 sethi ta, hi20(symbol) ; HI20
9239 ori ta, ta, lo12(symbol) ; LO12S0
9240 jral ta ;
9241 $1
9242
9243 case 4-4-4-4; 16-bit on, optimize for speed
9244 bltz rt, $1 ; LONGCALL3
9245 sethi ta, hi20(symbol) ; HI20
9246 ori ta, ta, lo12(symbol) ; LO12S0
9247 jral ta ;
9248 $1 */
9249
9250 /* Get the reloc for the address from which the register is
9251 being loaded. This reloc will tell us which function is
9252 actually being called. */
9253
9254 bfd_vma laddr;
9255 int seq_len; /* Original length of instruction sequence. */
9256 uint32_t insn;
9257 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9258 int pic_ext_target = 0;
9259 bfd_signed_vma foff;
9260 uint16_t insn16;
9261
9262 irelend = internal_relocs + sec->reloc_count;
9263 seq_len = GET_SEQ_LEN (irel->r_addend);
9264 laddr = irel->r_offset;
9265 *insn_len = seq_len;
9266
9267 hi_irelfn =
9268 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9269 R_NDS32_HI20_RELA, laddr + 4);
9270 lo_irelfn =
9271 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9272 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9273
9274 if (hi_irelfn == irelend || lo_irelfn == irelend)
9275 {
9276 (*_bfd_error_handler)
9277 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9278 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9279 return FALSE;
9280 }
9281
9282 /* Get the value of the symbol referred to by the reloc. */
9283 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9284 &pic_ext_target);
9285
9286 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9287 || foff >= CONSERVATIVE_24BIT_S1)
9288 return FALSE;
9289
9290 insn = bfd_getb32 (contents + laddr);
9291 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9292 {
9293 /* Relax to bgezal rt, label ; 17_PCREL
9294 or bltzal rt, label ; 17_PCREL */
9295
9296 /* Convert to complimentary conditional call. */
9297 insn = CONVERT_CONDITION_CALL (insn);
9298 bfd_putb32 (insn, contents + irel->r_offset);
9299
9300 *insn_len = 4;
9301 irel->r_info =
9302 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9303 hi_irelfn->r_info =
9304 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9305 lo_irelfn->r_info =
9306 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9307
9308 cond_irelfn =
9309 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9310 R_NDS32_17_PCREL_RELA, laddr);
9311 if (cond_irelfn != irelend)
9312 {
9313 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9314 R_NDS32_17_PCREL_RELA);
9315 cond_irelfn->r_addend = hi_irelfn->r_addend;
9316 }
9317
9318 if (seq_len & 0x2)
9319 {
9320 insn16 = NDS32_NOP16;
9321 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9322 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9323 R_NDS32_INSN16);
9324 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9325 insn_len += 2;
9326 }
9327 }
9328 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9329 {
9330 /* Relax to the following instruction sequence
9331 bltz rt, $1 ; LONGCALL2
9332 jal symbol ; 25_PCREL
9333 $1 */
9334 *insn_len = 8;
9335 insn = INSN_JAL;
9336 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9337
9338 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9339 R_NDS32_25_PCREL_RELA);
9340 irel->r_info =
9341 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9342
9343 lo_irelfn->r_info =
9344 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9345
9346 if (seq_len & 0x2)
9347 {
9348 insn16 = NDS32_NOP16;
9349 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9350 lo_irelfn->r_info =
9351 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9352 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9353 insn_len += 2;
9354 }
9355 }
9356 return TRUE;
9357 }
9358
9359 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
9360
9361 static bfd_boolean
9362 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9363 Elf_Internal_Rela *internal_relocs, int *insn_len,
9364 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9365 Elf_Internal_Shdr *symtab_hdr)
9366 {
9367 /* There are 3 variations for LONGJUMP1
9368 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9369 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9370 ori ta, ta, lo12(symbol) ; LO12S0
9371 jr5 ta ;
9372
9373 case 4-4-4; 16-bit off, optimize don't care
9374 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9375 ori ta, ta, lo12(symbol) ; LO12S0
9376 jr ta ;
9377
9378 case 4-4-4; 16-bit on, optimize for speed
9379 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9380 ori ta, ta, lo12(symbol) ; LO12S0
9381 jr ta ; */
9382
9383 /* Get the reloc for the address from which the register is
9384 being loaded. This reloc will tell us which function is
9385 actually being called. */
9386
9387 bfd_vma laddr;
9388 int seq_len; /* Original length of instruction sequence. */
9389 int insn16_on; /* 16-bit on/off. */
9390 uint32_t insn;
9391 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9392 int pic_ext_target = 0;
9393 bfd_signed_vma foff;
9394 uint16_t insn16;
9395 unsigned long reloc;
9396
9397 irelend = internal_relocs + sec->reloc_count;
9398 seq_len = GET_SEQ_LEN (irel->r_addend);
9399 laddr = irel->r_offset;
9400 *insn_len = seq_len;
9401 insn16_on = IS_16BIT_ON (irel->r_addend);
9402
9403 hi_irelfn =
9404 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9405 R_NDS32_HI20_RELA, laddr);
9406 lo_irelfn =
9407 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9408 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9409 if (hi_irelfn == irelend || lo_irelfn == irelend)
9410 {
9411 (*_bfd_error_handler)
9412 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9413 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9414 return FALSE;
9415 }
9416
9417 /* Get the value of the symbol referred to by the reloc. */
9418 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9419 &pic_ext_target);
9420
9421 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9422 || foff < -CONSERVATIVE_24BIT_S1)
9423 return FALSE;
9424
9425 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9426 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9427 {
9428 /* j8 label */
9429 /* 16-bit on, but not optimized for speed. */
9430 reloc = R_NDS32_9_PCREL_RELA;
9431 insn16 = INSN_J8;
9432 bfd_putb16 (insn16, contents + irel->r_offset);
9433 *insn_len = 2;
9434 irel->r_info =
9435 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9436 }
9437 else
9438 {
9439 /* j label */
9440 reloc = R_NDS32_25_PCREL_RELA;
9441 insn = INSN_J;
9442 bfd_putb32 (insn, contents + irel->r_offset);
9443 *insn_len = 4;
9444 irel->r_info =
9445 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9446 irel->r_addend = 0;
9447 }
9448
9449 hi_irelfn->r_info =
9450 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9451 lo_irelfn->r_info =
9452 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9453
9454 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9455 {
9456 insn16 = NDS32_NOP16;
9457 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9458 lo_irelfn->r_info =
9459 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9460 R_NDS32_INSN16);
9461 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9462 *insn_len += 2;
9463 }
9464 return TRUE;
9465 }
9466
9467 /* Revert condition branch. This function does not check if the input
9468 instruction is condition branch or not. */
9469
9470 static void
9471 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9472 uint16_t *re_insn16, uint32_t *re_insn)
9473 {
9474 uint32_t comp_insn = 0;
9475 uint16_t comp_insn16 = 0;
9476
9477 if (insn)
9478 {
9479 if (N32_OP6 (insn) == N32_OP6_BR1)
9480 {
9481 /* beqs label. */
9482 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9483 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9484 {
9485 /* Insn can be contracted to 16-bit implied r5. */
9486 comp_insn16 =
9487 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9488 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9489 }
9490 }
9491 else if (N32_OP6 (insn) == N32_OP6_BR3)
9492 {
9493 /* bnec $ta, imm11, label. */
9494 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9495 }
9496 else
9497 {
9498 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9499 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9500 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9501 {
9502 if (N32_IS_RT3 (insn))
9503 {
9504 /* Insn can be contracted to 16-bit. */
9505 comp_insn16 =
9506 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9507 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9508 }
9509 else if (N32_RT5 (insn) == REG_R15)
9510 {
9511 /* Insn can be contracted to 16-bit. */
9512 comp_insn16 =
9513 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9514 }
9515 }
9516 }
9517 }
9518 else
9519 {
9520 switch ((insn16 & 0xf000) >> 12)
9521 {
9522 case 0xc:
9523 /* beqz38 or bnez38 */
9524 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9525 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9526 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9527 break;
9528
9529 case 0xd:
9530 /* beqs38 or bnes38 */
9531 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9532 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9533 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9534 | (REG_R5 << 15);
9535 break;
9536
9537 case 0xe:
9538 /* beqzS8 or bnezS8 */
9539 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9540 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9541 comp_insn |= REG_R15 << 20;
9542 break;
9543
9544 default:
9545 break;
9546 }
9547 }
9548 if (comp_insn && re_insn)
9549 *re_insn = comp_insn;
9550 if (comp_insn16 && re_insn16)
9551 *re_insn16 = comp_insn16;
9552 }
9553
9554 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
9555
9556 static bfd_boolean
9557 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9558 Elf_Internal_Rela *internal_relocs, int *insn_len,
9559 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9560 Elf_Internal_Shdr *symtab_hdr)
9561 {
9562 /* There are 3 variations for LONGJUMP2
9563 case 2-4; 1st insn convertible, 16-bit on,
9564 optimize off or optimize for space
9565 bnes38 rt, ra, $1 ; LONGJUMP2
9566 j label ; 25_PCREL
9567 $1:
9568
9569 case 4-4; 1st insn not convertible
9570 bne rt, ra, $1 ; LONGJUMP2
9571 j label ; 25_PCREL
9572 $1:
9573
9574 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9575 bne rt, ra, $1 ; LONGJUMP2
9576 j label ; 25_PCREL
9577 $1: */
9578
9579 /* Get the reloc for the address from which the register is
9580 being loaded. This reloc will tell us which function is
9581 actually being called. */
9582
9583 bfd_vma laddr;
9584 int seq_len; /* Original length of instruction sequence. */
9585 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9586 int pic_ext_target = 0, first_size;
9587 unsigned int i;
9588 bfd_signed_vma foff;
9589 uint32_t insn, re_insn = 0;
9590 uint16_t insn16, re_insn16 = 0;
9591 unsigned long reloc, cond_reloc;
9592
9593 enum elf_nds32_reloc_type checked_types[] =
9594 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9595
9596 irelend = internal_relocs + sec->reloc_count;
9597 seq_len = GET_SEQ_LEN (irel->r_addend);
9598 laddr = irel->r_offset;
9599 *insn_len = seq_len;
9600 first_size = (seq_len == 6) ? 2 : 4;
9601
9602 i2_irelfn =
9603 find_relocs_at_address_addr (irel, internal_relocs,
9604 irelend, R_NDS32_25_PCREL_RELA,
9605 laddr + first_size);
9606
9607 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9608 {
9609 cond_irelfn =
9610 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9611 checked_types[i], laddr);
9612 if (cond_irelfn != irelend)
9613 break;
9614 }
9615
9616 if (i2_irelfn == irelend || cond_irelfn == irelend)
9617 {
9618 (*_bfd_error_handler)
9619 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9620 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9621 return FALSE;
9622 }
9623
9624 /* Get the value of the symbol referred to by the reloc. */
9625 foff =
9626 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9627 &pic_ext_target);
9628 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9629 || foff >= CONSERVATIVE_16BIT_S1)
9630 return FALSE;
9631
9632 /* Get the all corresponding instructions. */
9633 if (first_size == 4)
9634 {
9635 insn = bfd_getb32 (contents + laddr);
9636 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9637 }
9638 else
9639 {
9640 insn16 = bfd_getb16 (contents + laddr);
9641 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9642 }
9643
9644 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9645 && foff < ACCURATE_8BIT_S1 - first_size)
9646 {
9647 if (first_size == 4)
9648 {
9649 /* Don't convert it to 16-bit now, keep this as relaxable for
9650 ``label reloc; INSN16''. */
9651
9652 /* Save comp_insn32 to buffer. */
9653 bfd_putb32 (re_insn, contents + irel->r_offset);
9654 *insn_len = 4;
9655 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9656 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9657 cond_reloc = R_NDS32_INSN16;
9658 }
9659 else
9660 {
9661 bfd_putb16 (re_insn16, contents + irel->r_offset);
9662 *insn_len = 2;
9663 reloc = R_NDS32_9_PCREL_RELA;
9664 cond_reloc = R_NDS32_NONE;
9665 }
9666 }
9667 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9668 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9669 && foff < ACCURATE_14BIT_S1 - first_size))
9670 {
9671 /* beqs label ; 15_PCREL */
9672 bfd_putb32 (re_insn, contents + irel->r_offset);
9673 *insn_len = 4;
9674 reloc = R_NDS32_15_PCREL_RELA;
9675 cond_reloc = R_NDS32_NONE;
9676 }
9677 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9678 && foff >= -CONSERVATIVE_16BIT_S1
9679 && foff < CONSERVATIVE_16BIT_S1)
9680 {
9681 /* beqz label ; 17_PCREL */
9682 bfd_putb32 (re_insn, contents + irel->r_offset);
9683 *insn_len = 4;
9684 reloc = R_NDS32_17_PCREL_RELA;
9685 cond_reloc = R_NDS32_NONE;
9686 }
9687 else
9688 return FALSE;
9689
9690 /* Set all relocations. */
9691 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9692 irel->r_addend = i2_irelfn->r_addend;
9693
9694 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9695 cond_reloc);
9696 cond_irelfn->r_addend = 0;
9697
9698 if ((seq_len ^ *insn_len ) & 0x2)
9699 {
9700 insn16 = NDS32_NOP16;
9701 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9702 i2_irelfn->r_offset = 4;
9703 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9704 R_NDS32_INSN16);
9705 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9706 *insn_len += 2;
9707 }
9708 else
9709 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9710 R_NDS32_NONE);
9711 return TRUE;
9712 }
9713
9714 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
9715
9716 static bfd_boolean
9717 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9718 Elf_Internal_Rela *internal_relocs, int *insn_len,
9719 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9720 Elf_Internal_Shdr *symtab_hdr)
9721 {
9722 /* There are 5 variations for LONGJUMP3
9723 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9724 optimize off or optimize for space
9725 bnes38 rt, ra, $1 ; LONGJUMP3
9726 sethi ta, hi20(symbol) ; HI20
9727 ori ta, ta, lo12(symbol) ; LO12S0
9728 jr5 ta ;
9729 $1: ;
9730
9731 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9732 bnes38 rt, ra, $1 ; LONGJUMP3
9733 sethi ta, hi20(symbol) ; HI20
9734 ori ta, ta, lo12(symbol) ; LO12S0
9735 jr5 ta ;
9736 $1: ; LABEL
9737
9738 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9739 optimize off or optimize for space
9740 bne rt, ra, $1 ; LONGJUMP3
9741 sethi ta, hi20(symbol) ; HI20
9742 ori ta, ta, lo12(symbol) ; LO12S0
9743 jr5 ta ;
9744 $1: ;
9745
9746 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9747 16-bit off if no INSN16
9748 bne rt, ra, $1 ; LONGJUMP3
9749 sethi ta, hi20(symbol) ; HI20
9750 ori ta, ta, lo12(symbol) ; LO12S0
9751 jr ta ;
9752 $1: ;
9753
9754 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9755 16-bit off if no INSN16
9756 bne rt, ra, $1 ; LONGJUMP3
9757 sethi ta, hi20(symbol) ; HI20
9758 ori ta, ta, lo12(symbol) ; LO12S0
9759 jr ta ;
9760 $1: ; LABEL */
9761
9762 /* Get the reloc for the address from which the register is
9763 being loaded. This reloc will tell us which function is
9764 actually being called. */
9765 enum elf_nds32_reloc_type checked_types[] =
9766 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9767
9768 int reloc_off = 0, cond_removed = 0, convertible;
9769 bfd_vma laddr;
9770 int seq_len; /* Original length of instruction sequence. */
9771 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9772 int pic_ext_target = 0, first_size;
9773 unsigned int i;
9774 bfd_signed_vma foff;
9775 uint32_t insn, re_insn = 0;
9776 uint16_t insn16, re_insn16 = 0;
9777 unsigned long reloc, cond_reloc;
9778
9779 irelend = internal_relocs + sec->reloc_count;
9780 seq_len = GET_SEQ_LEN (irel->r_addend);
9781 laddr = irel->r_offset;
9782 *insn_len = seq_len;
9783
9784 convertible = IS_1ST_CONVERT (irel->r_addend);
9785
9786 if (convertible)
9787 first_size = 2;
9788 else
9789 first_size = 4;
9790
9791 /* Get all needed relocations. */
9792 hi_irelfn =
9793 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9794 R_NDS32_HI20_RELA, laddr + first_size);
9795 lo_irelfn =
9796 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9797 R_NDS32_LO12S0_ORI_RELA,
9798 laddr + first_size + 4);
9799
9800 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9801 {
9802 cond_irelfn =
9803 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9804 checked_types[i], laddr);
9805 if (cond_irelfn != irelend)
9806 break;
9807 }
9808
9809 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9810 {
9811 (*_bfd_error_handler)
9812 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9813 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9814 return FALSE;
9815 }
9816
9817 /* Get the value of the symbol referred to by the reloc. */
9818 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9819 &pic_ext_target);
9820
9821 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9822 || foff >= CONSERVATIVE_24BIT_S1)
9823 return FALSE;
9824
9825 /* Get the all corresponding instructions. */
9826 if (first_size == 4)
9827 {
9828 insn = bfd_getb32 (contents + laddr);
9829 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9830 }
9831 else
9832 {
9833 insn16 = bfd_getb16 (contents + laddr);
9834 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9835 }
9836
9837 /* For simplicity of coding, we are going to modify the section
9838 contents, the section relocs, and the BFD symbol table. We
9839 must tell the rest of the code not to free up this
9840 information. It would be possible to instead create a table
9841 of changes which have to be made, as is done in coff-mips.c;
9842 that would be more work, but would require less memory when
9843 the linker is run. */
9844
9845 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9846 && foff < ACCURATE_8BIT_S1 - first_size)
9847 {
9848 if (!(seq_len & 0x2))
9849 {
9850 /* Don't convert it to 16-bit now, keep this as relaxable
9851 for ``label reloc; INSN1a''6. */
9852 /* Save comp_insn32 to buffer. */
9853 bfd_putb32 (re_insn, contents + irel->r_offset);
9854 *insn_len = 4;
9855 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9856 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9857 cond_reloc = R_NDS32_INSN16;
9858 }
9859 else
9860 {
9861 /* Not optimize for speed; convert sequence to 16-bit. */
9862 /* Save comp_insn16 to buffer. */
9863 bfd_putb16 (re_insn16, contents + irel->r_offset);
9864 *insn_len = 2;
9865 reloc = R_NDS32_9_PCREL_RELA;
9866 cond_reloc = R_NDS32_NONE;
9867 }
9868 cond_removed = 1;
9869 }
9870 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9871 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9872 && foff < ACCURATE_14BIT_S1 - first_size))
9873 {
9874 /* beqs label ; 15_PCREL */
9875 bfd_putb32 (re_insn, contents + irel->r_offset);
9876 *insn_len = 4;
9877 reloc = R_NDS32_15_PCREL_RELA;
9878 cond_reloc = R_NDS32_NONE;
9879 cond_removed = 1;
9880 }
9881 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9882 && foff >= -CONSERVATIVE_16BIT_S1
9883 && foff < CONSERVATIVE_16BIT_S1)
9884 {
9885 /* beqz label ; 17_PCREL */
9886 bfd_putb32 (re_insn, contents + irel->r_offset);
9887 *insn_len = 4;
9888 reloc = R_NDS32_17_PCREL_RELA;
9889 cond_reloc = R_NDS32_NONE;
9890 cond_removed = 1;
9891 }
9892 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9893 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9894 {
9895 /* Relax to one of the following 3 variations
9896
9897 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9898 for space
9899 bnes38 rt, $1 ; LONGJUMP2
9900 j label ; 25_PCREL
9901 $1
9902
9903 case 4-4; 1st insn not convertible, others don't care
9904 bne rt, ra, $1 ; LONGJUMP2
9905 j label ; 25_PCREL
9906 $1
9907
9908 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9909 bne rt, ra, $1 ; LONGJUMP2
9910 j label ; 25_PCREL
9911 $1 */
9912
9913 /* Offset for first instruction. */
9914
9915 /* Use j label as second instruction. */
9916 *insn_len = 4 + first_size;
9917 insn = INSN_J;
9918 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9919 reloc = R_NDS32_LONGJUMP2;
9920 cond_reloc = R_NDS32_25_PLTREL;
9921 }
9922 else
9923 return FALSE;
9924
9925 if (cond_removed == 1)
9926 {
9927 /* Set all relocations. */
9928 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9929 irel->r_addend = hi_irelfn->r_addend;
9930
9931 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9932 cond_reloc);
9933 cond_irelfn->r_addend = 0;
9934 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9935 R_NDS32_NONE);
9936 }
9937 else
9938 {
9939 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9940 irel->r_addend = irel->r_addend;
9941 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9942 cond_reloc);
9943 }
9944
9945 if ((seq_len ^ *insn_len ) & 0x2)
9946 {
9947 insn16 = NDS32_NOP16;
9948 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9949 lo_irelfn->r_offset = *insn_len;
9950 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9951 R_NDS32_INSN16);
9952 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9953 *insn_len += 2;
9954 }
9955 else
9956 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9957 R_NDS32_NONE);
9958 return TRUE;
9959 }
9960
9961 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
9962
9963 static bfd_boolean
9964 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9965 Elf_Internal_Rela *internal_relocs, int *insn_len,
9966 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9967 Elf_Internal_Shdr *symtab_hdr)
9968 {
9969 /* The pattern for LONGCALL4. Support for function cse.
9970 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9971 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9972 jral ta ; PTR_RES/EMPTY/INSN16 */
9973
9974 bfd_vma laddr;
9975 uint32_t insn;
9976 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9977 Elf_Internal_Rela *irelend;
9978 int pic_ext_target = 0;
9979 bfd_signed_vma foff;
9980
9981 irelend = internal_relocs + sec->reloc_count;
9982 laddr = irel->r_offset;
9983
9984 /* Get the reloc for the address from which the register is
9985 being loaded. This reloc will tell us which function is
9986 actually being called. */
9987 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9988 R_NDS32_HI20_RELA, laddr);
9989
9990 if (hi_irel == irelend)
9991 {
9992 (*_bfd_error_handler)
9993 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9994 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9995 return FALSE;
9996 }
9997
9998 /* Get the value of the symbol referred to by the reloc. */
9999 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10000 &pic_ext_target);
10001
10002 /* This condition only happened when symbol is undefined. */
10003 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10004 || foff >= CONSERVATIVE_24BIT_S1)
10005 return FALSE;
10006
10007 /* Relax to: jal symbol; 25_PCREL */
10008 /* For simplicity of coding, we are going to modify the section
10009 contents, the section relocs, and the BFD symbol table. We
10010 must tell the rest of the code not to free up this
10011 information. It would be possible to instead create a table
10012 of changes which have to be made, as is done in coff-mips.c;
10013 that would be more work, but would require less memory when
10014 the linker is run. */
10015
10016 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10017 R_NDS32_PTR_RESOLVED, irel->r_addend);
10018 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10019 R_NDS32_EMPTY, irel->r_addend);
10020
10021 if (ptr_irel == irelend || em_irel == irelend)
10022 {
10023 (*_bfd_error_handler)
10024 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10025 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10026 return FALSE;
10027 }
10028 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10029 insn = bfd_getb32 (contents + irel->r_addend);
10030 if (insn & 0x80000000)
10031 return FALSE;
10032
10033 /* Replace the long call with a jal. */
10034 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10035 R_NDS32_25_PCREL_RELA);
10036 ptr_irel->r_addend = 1;
10037
10038 /* We don't resolve this here but resolve it in relocate_section. */
10039 insn = INSN_JAL;
10040 bfd_putb32 (insn, contents + em_irel->r_offset);
10041
10042 irel->r_info =
10043 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10044
10045 /* If there is function cse, HI20 can not remove now. */
10046 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10047 R_NDS32_LONGCALL4, laddr);
10048 if (call_irel == irelend)
10049 {
10050 *insn_len = 0;
10051 hi_irel->r_info =
10052 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10053 }
10054
10055 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10056 R_NDS32_INSN16, irel->r_addend);
10057 if (insn_irel != irelend)
10058 insn_irel->r_info =
10059 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10060
10061 return TRUE;
10062 }
10063
10064 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
10065
10066 static bfd_boolean
10067 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10068 Elf_Internal_Rela *internal_relocs, int *insn_len,
10069 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10070 Elf_Internal_Shdr *symtab_hdr)
10071 {
10072 /* The pattern for LONGCALL5.
10073 bltz rt, .L1 ; LONGCALL5/17_PCREL
10074 jal symbol ; 25_PCREL
10075 .L1: */
10076
10077 bfd_vma laddr;
10078 uint32_t insn;
10079 Elf_Internal_Rela *cond_irel, *irelend;
10080 int pic_ext_target = 0;
10081 bfd_signed_vma foff;
10082
10083 irelend = internal_relocs + sec->reloc_count;
10084 laddr = irel->r_offset;
10085 insn = bfd_getb32 (contents + laddr);
10086
10087 /* Get the reloc for the address from which the register is
10088 being loaded. This reloc will tell us which function is
10089 actually being called. */
10090 cond_irel =
10091 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10092 R_NDS32_25_PCREL_RELA, irel->r_addend);
10093 if (cond_irel == irelend)
10094 {
10095 (*_bfd_error_handler)
10096 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10097 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10098 return FALSE;
10099 }
10100
10101 /* Get the value of the symbol referred to by the reloc. */
10102 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10103 &pic_ext_target);
10104
10105 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10106 || foff >= CONSERVATIVE_16BIT_S1)
10107 return FALSE;
10108
10109 /* Relax to bgezal rt, label ; 17_PCREL
10110 or bltzal rt, label ; 17_PCREL */
10111
10112 /* Convert to complimentary conditional call. */
10113 insn = CONVERT_CONDITION_CALL (insn);
10114
10115 /* For simplicity of coding, we are going to modify the section
10116 contents, the section relocs, and the BFD symbol table. We
10117 must tell the rest of the code not to free up this
10118 information. It would be possible to instead create a table
10119 of changes which have to be made, as is done in coff-mips.c;
10120 that would be more work, but would require less memory when
10121 the linker is run. */
10122
10123 /* Modify relocation and contents. */
10124 cond_irel->r_info =
10125 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
10126
10127 /* Replace the long call with a bgezal. */
10128 bfd_putb32 (insn, contents + cond_irel->r_offset);
10129 *insn_len = 0;
10130
10131 /* Clean unnessary relocations. */
10132 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10133
10134 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10135 R_NDS32_17_PCREL_RELA, laddr);
10136 cond_irel->r_info =
10137 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10138
10139 return TRUE;
10140 }
10141
10142 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
10143
10144 static bfd_boolean
10145 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10146 Elf_Internal_Rela *internal_relocs, int *insn_len,
10147 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10148 Elf_Internal_Shdr *symtab_hdr)
10149 {
10150 /* The pattern for LONGCALL6.
10151 bltz rt, .L1 ; LONGCALL6/17_PCREL
10152 sethi ta, hi20(symbol) ; HI20/PTR
10153 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10154 jral ta ; PTR_RES/EMPTY/INSN16
10155 .L1 */
10156
10157 bfd_vma laddr;
10158 uint32_t insn;
10159 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10160 int pic_ext_target = 0;
10161 bfd_signed_vma foff;
10162
10163 irelend = internal_relocs + sec->reloc_count;
10164 laddr = irel->r_offset;
10165
10166 /* Get the reloc for the address from which the register is
10167 being loaded. This reloc will tell us which function is
10168 actually being called. */
10169 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10170 R_NDS32_EMPTY, irel->r_addend);
10171
10172 if (em_irel == irelend)
10173 {
10174 (*_bfd_error_handler)
10175 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10176 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10177 return FALSE;
10178 }
10179
10180 /* Get the value of the symbol referred to by the reloc. */
10181 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10182 &pic_ext_target);
10183
10184 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10185 || foff >= CONSERVATIVE_24BIT_S1)
10186 return FALSE;
10187
10188 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10189 insn = bfd_getb32 (contents + irel->r_addend);
10190 if (insn & 0x80000000)
10191 return FALSE;
10192
10193 insn = bfd_getb32 (contents + laddr);
10194 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10195 {
10196 /* Relax to bgezal rt, label ; 17_PCREL
10197 or bltzal rt, label ; 17_PCREL */
10198
10199 /* Convert to complimentary conditional call. */
10200 *insn_len = 0;
10201 insn = CONVERT_CONDITION_CALL (insn);
10202 bfd_putb32 (insn, contents + em_irel->r_offset);
10203
10204 em_irel->r_info =
10205 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10206
10207 /* Set resolved relocation. */
10208 cond_irel =
10209 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10210 R_NDS32_PTR_RESOLVED, irel->r_addend);
10211 if (cond_irel == irelend)
10212 {
10213 (*_bfd_error_handler)
10214 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10215 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10216 return FALSE;
10217 }
10218 cond_irel->r_addend = 1;
10219
10220 /* Clear relocations. */
10221
10222 irel->r_info =
10223 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10224
10225 cond_irel =
10226 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10227 R_NDS32_17_PCREL_RELA, laddr);
10228 if (cond_irel != irelend)
10229 cond_irel->r_info =
10230 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10231
10232 cond_irel =
10233 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10234 R_NDS32_INSN16, irel->r_addend);
10235 if (cond_irel != irelend)
10236 cond_irel->r_info =
10237 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10238
10239 }
10240 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10241 {
10242 /* Relax to the following instruction sequence
10243 bltz rt, .L1 ; LONGCALL2/17_PCREL
10244 jal symbol ; 25_PCREL/PTR_RES
10245 .L1 */
10246 *insn_len = 4;
10247 /* Convert instruction. */
10248 insn = INSN_JAL;
10249 bfd_putb32 (insn, contents + em_irel->r_offset);
10250
10251 /* Convert relocations. */
10252 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10253 R_NDS32_25_PCREL_RELA);
10254 irel->r_info =
10255 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
10256
10257 /* Set resolved relocation. */
10258 cond_irel =
10259 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10260 R_NDS32_PTR_RESOLVED, irel->r_addend);
10261 if (cond_irel == irelend)
10262 {
10263 (*_bfd_error_handler)
10264 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10265 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10266 return FALSE;
10267 }
10268 cond_irel->r_addend = 1;
10269
10270 cond_irel =
10271 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10272 R_NDS32_INSN16, irel->r_addend);
10273 if (cond_irel != irelend)
10274 cond_irel->r_info =
10275 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10276 }
10277 return TRUE;
10278 }
10279
10280 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
10281
10282 static bfd_boolean
10283 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10284 Elf_Internal_Rela *internal_relocs, int *insn_len,
10285 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10286 Elf_Internal_Shdr *symtab_hdr)
10287 {
10288 /* The pattern for LONGJUMP4.
10289 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10290 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10291 jr ta ; PTR_RES/INSN16/EMPTY */
10292
10293 bfd_vma laddr;
10294 int seq_len; /* Original length of instruction sequence. */
10295 uint32_t insn;
10296 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10297 int pic_ext_target = 0;
10298 bfd_signed_vma foff;
10299
10300 irelend = internal_relocs + sec->reloc_count;
10301 seq_len = GET_SEQ_LEN (irel->r_addend);
10302 laddr = irel->r_offset;
10303 *insn_len = seq_len;
10304
10305 /* Get the reloc for the address from which the register is
10306 being loaded. This reloc will tell us which function is
10307 actually being called. */
10308
10309 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10310 R_NDS32_HI20_RELA, laddr);
10311
10312 if (hi_irel == irelend)
10313 {
10314 (*_bfd_error_handler)
10315 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10316 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10317 return FALSE;
10318 }
10319
10320 /* Get the value of the symbol referred to by the reloc. */
10321 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10322 &pic_ext_target);
10323
10324 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10325 || foff < -CONSERVATIVE_24BIT_S1)
10326 return FALSE;
10327
10328 /* Convert it to "j label", it may be converted to j8 in the final
10329 pass of relaxation. Therefore, we do not consider this currently. */
10330 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10331 R_NDS32_PTR_RESOLVED, irel->r_addend);
10332 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10333 R_NDS32_EMPTY, irel->r_addend);
10334
10335 if (ptr_irel == irelend || em_irel == irelend)
10336 {
10337 (*_bfd_error_handler)
10338 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10339 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10340 return FALSE;
10341 }
10342
10343 em_irel->r_info =
10344 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10345 ptr_irel->r_addend = 1;
10346
10347 /* Write instruction. */
10348 insn = INSN_J;
10349 bfd_putb32 (insn, contents + em_irel->r_offset);
10350
10351 /* Clear relocations. */
10352 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10353
10354 /* If there is function cse, HI20 can not remove now. */
10355 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10356 R_NDS32_LONGJUMP4, laddr);
10357 if (call_irel == irelend)
10358 {
10359 *insn_len = 0;
10360 hi_irel->r_info =
10361 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10362 }
10363
10364 return TRUE;
10365 }
10366
10367 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
10368
10369 static bfd_boolean
10370 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10371 Elf_Internal_Rela *internal_relocs, int *insn_len,
10372 int *seq_len, bfd_byte *contents,
10373 Elf_Internal_Sym *isymbuf,
10374 Elf_Internal_Shdr *symtab_hdr)
10375 {
10376 /* There are 2 variations for LONGJUMP5
10377 case 2-4; 1st insn convertible, 16-bit on.
10378 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10379 j label ; 25_PCREL/INSN16
10380 $1:
10381
10382 case 4-4; 1st insn not convertible
10383 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10384 j label ; 25_PCREL/INSN16
10385 .L1: */
10386
10387 bfd_vma laddr;
10388 Elf_Internal_Rela *cond_irel, *irelend;
10389 int pic_ext_target = 0;
10390 unsigned int i;
10391 bfd_signed_vma foff;
10392 uint32_t insn, re_insn = 0;
10393 uint16_t insn16, re_insn16 = 0;
10394 unsigned long reloc;
10395
10396 enum elf_nds32_reloc_type checked_types[] =
10397 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10398 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10399
10400 irelend = internal_relocs + sec->reloc_count;
10401 laddr = irel->r_offset;
10402
10403 /* Get the reloc for the address from which the register is
10404 being loaded. This reloc will tell us which function is
10405 actually being called. */
10406
10407 cond_irel =
10408 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10409 R_NDS32_25_PCREL_RELA, irel->r_addend);
10410 if (cond_irel == irelend)
10411 {
10412 (*_bfd_error_handler)
10413 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10414 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10415 return FALSE;
10416 }
10417
10418 /* Get the value of the symbol referred to by the reloc. */
10419 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10420 &pic_ext_target);
10421
10422 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10423 || foff >= CONSERVATIVE_16BIT_S1)
10424 return FALSE;
10425
10426 /* Get the all corresponding instructions. */
10427 insn = bfd_getb32 (contents + laddr);
10428 /* Check instruction size. */
10429 if (insn & 0x80000000)
10430 {
10431 *seq_len = 0;
10432 insn16 = insn >> 16;
10433 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10434 }
10435 else
10436 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10437
10438 if (N32_OP6 (re_insn) == N32_OP6_BR1
10439 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10440 {
10441 /* beqs label ; 15_PCREL. */
10442 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10443 reloc = R_NDS32_15_PCREL_RELA;
10444 }
10445 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10446 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10447 {
10448 /* beqz label ; 17_PCREL. */
10449 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10450 reloc = R_NDS32_17_PCREL_RELA;
10451 }
10452 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10453 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10454 {
10455 /* beqc label ; 9_PCREL. */
10456 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10457 reloc = R_NDS32_WORD_9_PCREL_RELA;
10458 }
10459 else
10460 return FALSE;
10461
10462 /* Set all relocations. */
10463 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10464
10465 /* Clean relocations. */
10466 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10467 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10468 {
10469 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10470 checked_types[i], laddr);
10471 if (cond_irel != irelend)
10472 {
10473 if (*seq_len == 0
10474 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10475 {
10476 /* If the branch instruction is 2 byte, it cannot remove
10477 directly. Only convert it to nop16 and remove it after
10478 checking alignment issue. */
10479 insn16 = NDS32_NOP16;
10480 bfd_putb16 (insn16, contents + laddr);
10481 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10482 }
10483 else
10484 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10485 R_NDS32_NONE);
10486 }
10487 }
10488 *insn_len = 0;
10489
10490 return TRUE;
10491 }
10492
10493 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
10494
10495 static bfd_boolean
10496 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10497 Elf_Internal_Rela *internal_relocs, int *insn_len,
10498 int *seq_len, bfd_byte *contents,
10499 Elf_Internal_Sym *isymbuf,
10500 Elf_Internal_Shdr *symtab_hdr)
10501 {
10502 /* There are 5 variations for LONGJUMP6
10503 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10504 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10505 sethi ta, hi20(symbol) ; HI20/PTR
10506 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10507 jr ta ; PTR_RES/INSN16/EMPTY
10508 .L1:
10509
10510 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10511 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10512 sethi ta, hi20(symbol) ; HI20/PTR
10513 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10514 jr ta ; PTR_RES/INSN16/EMPTY
10515 .L1: */
10516
10517 enum elf_nds32_reloc_type checked_types[] =
10518 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10519 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10520
10521 int reloc_off = 0, cond_removed = 0;
10522 bfd_vma laddr;
10523 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10524 int pic_ext_target = 0;
10525 unsigned int i;
10526 bfd_signed_vma foff;
10527 uint32_t insn, re_insn = 0;
10528 uint16_t insn16, re_insn16 = 0;
10529 unsigned long reloc;
10530
10531 irelend = internal_relocs + sec->reloc_count;
10532 laddr = irel->r_offset;
10533
10534 /* Get the reloc for the address from which the register is
10535 being loaded. This reloc will tell us which function is
10536 actually being called. */
10537 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10538 R_NDS32_EMPTY, irel->r_addend);
10539
10540 if (em_irel == irelend)
10541 {
10542 (*_bfd_error_handler)
10543 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10544 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10545 return FALSE;
10546 }
10547
10548 /* Get the value of the symbol referred to by the reloc. */
10549 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10550 &pic_ext_target);
10551
10552 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10553 || foff >= CONSERVATIVE_24BIT_S1)
10554 return FALSE;
10555
10556 insn = bfd_getb32 (contents + laddr);
10557 /* Check instruction size. */
10558 if (insn & 0x80000000)
10559 {
10560 *seq_len = 0;
10561 insn16 = insn >> 16;
10562 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10563 }
10564 else
10565 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10566
10567 /* For simplicity of coding, we are going to modify the section
10568 contents, the section relocs, and the BFD symbol table. We
10569 must tell the rest of the code not to free up this
10570 information. It would be possible to instead create a table
10571 of changes which have to be made, as is done in coff-mips.c;
10572 that would be more work, but would require less memory when
10573 the linker is run. */
10574
10575 if (N32_OP6 (re_insn) == N32_OP6_BR1
10576 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10577 {
10578 /* beqs label ; 15_PCREL */
10579 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10580 reloc = R_NDS32_15_PCREL_RELA;
10581 cond_removed = 1;
10582 }
10583 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10584 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10585 {
10586 /* beqz label ; 17_PCREL */
10587 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10588 reloc = R_NDS32_17_PCREL_RELA;
10589 cond_removed = 1;
10590 }
10591 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10592 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10593 {
10594 /* Relax to one of the following 2 variations
10595
10596 case 2-4; 1st insn convertible, 16-bit on.
10597 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10598 j label ; 25_PCREL/INSN16
10599 $1:
10600
10601 case 4-4; 1st insn not convertible
10602 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10603 j label ; 25_PCREL/INSN16
10604 .L1: */
10605
10606 /* Use j label as second instruction. */
10607 insn = INSN_J;
10608 reloc = R_NDS32_25_PCREL_RELA;
10609 bfd_putb32 (insn, contents + em_irel->r_offset);
10610 }
10611 else
10612 return FALSE;
10613
10614 /* Set all relocations. */
10615 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10616
10617 cond_irel =
10618 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10619 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10620 cond_irel->r_addend = 1;
10621
10622 /* Use INSN16 of first branch instruction to distinguish if keeping
10623 INSN16 of final instruction or not. */
10624 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10625 R_NDS32_INSN16, irel->r_offset);
10626 if (insn_irel == irelend)
10627 {
10628 /* Clean the final INSN16. */
10629 insn_irel =
10630 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10631 R_NDS32_INSN16, em_irel->r_offset);
10632 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10633 R_NDS32_NONE);
10634 }
10635
10636 if (cond_removed == 1)
10637 {
10638 *insn_len = 0;
10639
10640 /* Clear relocations. */
10641 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10642
10643 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10644 {
10645 cond_irel =
10646 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10647 checked_types[i], laddr);
10648 if (cond_irel != irelend)
10649 {
10650 if (*seq_len == 0
10651 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10652 {
10653 /* If the branch instruction is 2 byte, it cannot remove
10654 directly. Only convert it to nop16 and remove it after
10655 checking alignment issue. */
10656 insn16 = NDS32_NOP16;
10657 bfd_putb16 (insn16, contents + laddr);
10658 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10659 }
10660 else
10661 cond_irel->r_info =
10662 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10663 }
10664 }
10665 }
10666 else
10667 {
10668 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10669 R_NDS32_LONGJUMP5);
10670 }
10671
10672 return TRUE;
10673 }
10674
10675 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
10676
10677 static bfd_boolean
10678 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10679 Elf_Internal_Rela *internal_relocs, int *insn_len,
10680 int *seq_len, bfd_byte *contents,
10681 Elf_Internal_Sym *isymbuf,
10682 Elf_Internal_Shdr *symtab_hdr)
10683 {
10684 /* There are 2 variations for LONGJUMP5
10685 case 2-4; 1st insn convertible, 16-bit on.
10686 movi55 ta, imm11 ; LONGJUMP7/INSN16
10687 beq rt, ta, label ; 15_PCREL
10688
10689 case 4-4; 1st insn not convertible
10690 movi55 ta, imm11 ; LONGJUMP7/INSN16
10691 beq rt, ta, label ; 15_PCREL */
10692
10693 bfd_vma laddr;
10694 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10695 int pic_ext_target = 0;
10696 bfd_signed_vma foff;
10697 uint32_t insn, re_insn = 0;
10698 uint16_t insn16;
10699 uint32_t imm11;
10700
10701 irelend = internal_relocs + sec->reloc_count;
10702 laddr = irel->r_offset;
10703
10704 /* Get the reloc for the address from which the register is
10705 being loaded. This reloc will tell us which function is
10706 actually being called. */
10707
10708 cond_irel =
10709 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10710 R_NDS32_15_PCREL_RELA, irel->r_addend);
10711 if (cond_irel == irelend)
10712 {
10713 (*_bfd_error_handler)
10714 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10715 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10716 return FALSE;
10717 }
10718
10719 /* Get the value of the symbol referred to by the reloc. */
10720 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10721 &pic_ext_target);
10722
10723 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10724 || foff >= CONSERVATIVE_8BIT_S1)
10725 return FALSE;
10726
10727 /* Get the first instruction for its size. */
10728 insn = bfd_getb32 (contents + laddr);
10729 if (insn & 0x80000000)
10730 {
10731 *seq_len = 0;
10732 /* Get the immediate from movi55. */
10733 imm11 = N16_IMM5S (insn >> 16);
10734 }
10735 else
10736 {
10737 /* Get the immediate from movi. */
10738 imm11 = N32_IMM20S (insn);
10739 }
10740
10741 /* Get the branch instruction. */
10742 insn = bfd_getb32 (contents + irel->r_addend);
10743 /* Convert instruction to BR3. */
10744 if ((insn >> 14) & 0x1)
10745 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10746 else
10747 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10748
10749 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10750
10751 /* Set all relocations. */
10752 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10753 R_NDS32_WORD_9_PCREL_RELA);
10754
10755 /* Clean relocations. */
10756 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10757 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10758 R_NDS32_INSN16, irel->r_offset);
10759 if (insn_irel != irelend)
10760 {
10761 if (*seq_len == 0)
10762 {
10763 /* If the first insntruction is 16bit, convert it to nop16. */
10764 insn16 = NDS32_NOP16;
10765 bfd_putb16 (insn16, contents + laddr);
10766 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10767 }
10768 else
10769 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10770 R_NDS32_NONE);
10771 }
10772 *insn_len = 0;
10773
10774 return TRUE;
10775 }
10776
10777 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10778
10779 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */
10780
10781 static bfd_boolean
10782 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10783 asection *sec, Elf_Internal_Rela *irel,
10784 Elf_Internal_Rela *internal_relocs, int *insn_len,
10785 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10786 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10787 {
10788 int eliminate_sethi = 0, range_type;
10789 unsigned int i;
10790 bfd_vma local_sda, laddr;
10791 int seq_len; /* Original length of instruction sequence. */
10792 uint32_t insn;
10793 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10794 bfd_vma access_addr = 0;
10795 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10796 enum elf_nds32_reloc_type checked_types[] =
10797 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10798 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10799 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10800 R_NDS32_TLS_LE_HI20
10801 };
10802
10803 irelend = internal_relocs + sec->reloc_count;
10804 seq_len = GET_SEQ_LEN (irel->r_addend);
10805 laddr = irel->r_offset;
10806 *insn_len = seq_len;
10807
10808 /* Get the high part relocation. */
10809 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
10810 {
10811 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10812 checked_types[i], laddr);
10813 if (hi_irelfn != irelend)
10814 break;
10815 }
10816
10817 if (hi_irelfn == irelend)
10818 {
10819 (*_bfd_error_handler)
10820 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10821 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10822 return FALSE;
10823 }
10824
10825 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10826 nds32_elf_final_sda_base (sec->output_section->owner,
10827 link_info, &local_sda, FALSE);
10828
10829 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10830 {
10831 case R_NDS32_HI20_RELA:
10832 insn = bfd_getb32 (contents + laddr);
10833 access_addr =
10834 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10835
10836 if (range_type == NDS32_LOADSTORE_IMM)
10837 {
10838 struct elf_link_hash_entry *h = NULL;
10839 int indx;
10840
10841 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10842 {
10843 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10844 h = elf_sym_hashes (abfd)[indx];
10845 }
10846
10847 if ((access_addr < CONSERVATIVE_20BIT)
10848 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10849 {
10850 eliminate_sethi = 1;
10851 break;
10852 }
10853
10854 /* This is avoid to relax symbol address which is fixed
10855 relocations. Ex: _stack. */
10856 if (h && bfd_is_abs_section (h->root.u.def.section))
10857 return FALSE;
10858 }
10859
10860 if (!load_store_relax)
10861 return FALSE;
10862
10863 /* Case for set gp register. */
10864 if (N32_RT5 (insn) == REG_GP)
10865 break;
10866
10867 if (range_type == NDS32_LOADSTORE_FLOAT_S
10868 || range_type == NDS32_LOADSTORE_FLOAT_S)
10869 {
10870 range_l = sdata_range[0][0];
10871 range_h = sdata_range[0][1];
10872 }
10873 else
10874 {
10875 range_l = sdata_range[1][0];
10876 range_h = sdata_range[1][1];
10877 }
10878 break;
10879
10880 case R_NDS32_GOT_HI20:
10881 access_addr =
10882 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10883
10884 /* If this symbol is not in .got, the return value will be -1.
10885 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10886 a negative offset is allowed. */
10887 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10888 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10889 eliminate_sethi = 1;
10890 break;
10891
10892 case R_NDS32_PLT_GOTREL_HI20:
10893 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10894 hi_irelfn, symtab_hdr);
10895
10896 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10897 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10898 eliminate_sethi = 1;
10899 break;
10900
10901 case R_NDS32_GOTOFF_HI20:
10902 access_addr =
10903 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10904
10905 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10906 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10907 eliminate_sethi = 1;
10908 break;
10909
10910 case R_NDS32_GOTPC_HI20:
10911 /* The access_addr must consider r_addend of hi_irel. */
10912 access_addr = sec->output_section->vma + sec->output_offset
10913 + irel->r_offset + hi_irelfn->r_addend;
10914
10915 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10916 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10917 eliminate_sethi = 1;
10918 break;
10919
10920 case R_NDS32_TLS_LE_HI20:
10921 access_addr =
10922 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10923 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10924 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10925 if ((range_type == NDS32_LOADSTORE_IMM)
10926 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10927 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10928 eliminate_sethi = 1;
10929 break;
10930
10931 default:
10932 return FALSE;
10933 }
10934
10935 /* Delete sethi instruction. */
10936 if (eliminate_sethi == 1
10937 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10938 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10939 {
10940 hi_irelfn->r_info =
10941 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10942 irel->r_info =
10943 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10944 *insn_len = 0;
10945 }
10946 return TRUE;
10947 }
10948
10949 /* Relax LO12 relocation for nds32_elf_relax_section. */
10950
10951 static void
10952 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10953 asection *sec, Elf_Internal_Rela *irel,
10954 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10955 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10956 {
10957 uint32_t insn;
10958 bfd_vma local_sda, laddr;
10959 unsigned long reloc;
10960 bfd_vma access_addr;
10961 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10962 Elf_Internal_Rela *irelfn = NULL, *irelend;
10963 struct elf_link_hash_entry *h = NULL;
10964 int indx;
10965
10966 /* For SDA base relative relaxation. */
10967 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10968 &local_sda, FALSE);
10969
10970 irelend = internal_relocs + sec->reloc_count;
10971 laddr = irel->r_offset;
10972 insn = bfd_getb32 (contents + laddr);
10973
10974 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10975 return;
10976
10977 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10978
10979 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10980 {
10981 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10982 h = elf_sym_hashes (abfd)[indx];
10983 }
10984
10985 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10986 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10987 {
10988 reloc = R_NDS32_20_RELA;
10989 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10990 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10991 bfd_putb32 (insn, contents + laddr);
10992 }
10993 /* This is avoid to relax symbol address which is fixed
10994 relocations. Ex: _stack. */
10995 else if (N32_OP6 (insn) == N32_OP6_ORI
10996 && h && bfd_is_abs_section (h->root.u.def.section))
10997 return;
10998 else
10999 {
11000 range_l = sdata_range[1][0];
11001 range_h = sdata_range[1][1];
11002 switch (ELF32_R_TYPE (irel->r_info))
11003 {
11004 case R_NDS32_LO12S0_RELA:
11005 reloc = R_NDS32_SDA19S0_RELA;
11006 break;
11007 case R_NDS32_LO12S1_RELA:
11008 reloc = R_NDS32_SDA18S1_RELA;
11009 break;
11010 case R_NDS32_LO12S2_RELA:
11011 reloc = R_NDS32_SDA17S2_RELA;
11012 break;
11013 case R_NDS32_LO12S2_DP_RELA:
11014 range_l = sdata_range[0][0];
11015 range_h = sdata_range[0][1];
11016 reloc = R_NDS32_SDA12S2_DP_RELA;
11017 break;
11018 case R_NDS32_LO12S2_SP_RELA:
11019 range_l = sdata_range[0][0];
11020 range_h = sdata_range[0][1];
11021 reloc = R_NDS32_SDA12S2_SP_RELA;
11022 break;
11023 default:
11024 return;
11025 }
11026
11027 /* There are range_h and range_l because linker has to promise
11028 all sections move cross one page together. */
11029 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11030 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11031 {
11032 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
11033 {
11034 /* Maybe we should add R_NDS32_INSN16 reloc type here
11035 or manually do some optimization. sethi can't be
11036 eliminated when updating $gp so the relative ori
11037 needs to be preserved. */
11038 return;
11039 }
11040 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11041 &insn))
11042 return;
11043 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11044 bfd_putb32 (insn, contents + laddr);
11045
11046 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11047 R_NDS32_INSN16);
11048 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11049 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11050 irelfn->r_info =
11051 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11052
11053 }
11054 }
11055 return;
11056 }
11057
11058 /* Relax low part of PIC instruction pattern. */
11059
11060 static void
11061 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11062 asection *sec, Elf_Internal_Rela *irel,
11063 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11064 Elf_Internal_Shdr *symtab_hdr)
11065 {
11066 uint32_t insn;
11067 bfd_vma local_sda, laddr;
11068 bfd_signed_vma foff;
11069 unsigned long reloc;
11070
11071 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11072 &local_sda, FALSE);
11073 laddr = irel->r_offset;
11074 insn = bfd_getb32 (contents + laddr);
11075
11076 if (N32_OP6 (insn) != N32_OP6_ORI)
11077 return;
11078
11079 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11080 {
11081 foff = calculate_got_memory_address (abfd, link_info, irel,
11082 symtab_hdr) - local_sda;
11083 reloc = R_NDS32_GOT20;
11084 }
11085 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11086 {
11087 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11088 symtab_hdr) - local_sda;
11089 reloc = R_NDS32_PLT_GOTREL_LO20;
11090 }
11091 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11092 {
11093 foff = calculate_memory_address (abfd, irel, isymbuf,
11094 symtab_hdr) - local_sda;
11095 reloc = R_NDS32_GOTOFF;
11096 }
11097 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11098 {
11099 foff = local_sda - sec->output_section->vma + sec->output_offset
11100 + irel->r_offset + irel->r_addend;
11101 reloc = R_NDS32_GOTPC20;
11102 }
11103 else
11104 return;
11105
11106 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11107 {
11108 /* Turn into MOVI. */
11109 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11110 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11111 bfd_putb32 (insn, contents + laddr);
11112 }
11113 }
11114
11115 /* Relax low part of LE TLS instruction pattern. */
11116
11117 static void
11118 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11119 Elf_Internal_Rela *irel,
11120 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11121 Elf_Internal_Shdr *symtab_hdr)
11122 {
11123 uint32_t insn;
11124 bfd_vma laddr;
11125 bfd_signed_vma foff;
11126 unsigned long reloc;
11127
11128 laddr = irel->r_offset;
11129 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11130 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11131 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11132 insn = bfd_getb32 (contents + laddr);
11133
11134 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11135 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11136 {
11137 /* Pattern sethi-ori transform to movi. */
11138 reloc = R_NDS32_TLS_LE_20;
11139 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11140 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11141 bfd_putb32 (insn, contents + laddr);
11142 }
11143 }
11144
11145 /* Relax LE TLS calculate address instruction pattern. */
11146
11147 static void
11148 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11149 asection *sec, Elf_Internal_Rela *irel,
11150 Elf_Internal_Rela *internal_relocs,
11151 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11152 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11153 {
11154 /* Local TLS non-pic
11155 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11156 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11157 add ra, ta, tp ; TLS_LE_ADD */
11158
11159 uint32_t insn;
11160 bfd_vma laddr;
11161 bfd_signed_vma foff;
11162 Elf_Internal_Rela *i1_irelfn, *irelend;
11163
11164 irelend = internal_relocs + sec->reloc_count;
11165 laddr = irel->r_offset;
11166 insn = bfd_getb32 (contents + laddr);
11167 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11168 R_NDS32_PTR_RESOLVED);
11169 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11170 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11171 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11172
11173 /* The range is +/-16k. */
11174 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11175 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11176 {
11177 /* Transform add to addi. */
11178 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11179 irel->r_info =
11180 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11181
11182 bfd_putb32 (insn, contents + laddr);
11183 if (i1_irelfn != irelend)
11184 {
11185 i1_irelfn->r_addend |= 1;
11186 *again = TRUE;
11187 }
11188 }
11189 }
11190
11191 /* Relax LE TLS load store instruction pattern. */
11192
11193 static void
11194 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11195 asection *sec, Elf_Internal_Rela *irel,
11196 Elf_Internal_Rela *internal_relocs,
11197 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11198 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11199 {
11200
11201 uint32_t insn;
11202 bfd_vma laddr;
11203 bfd_signed_vma foff;
11204 Elf_Internal_Rela *i1_irelfn, *irelend;
11205 int success = 0;
11206
11207 irelend = internal_relocs + sec->reloc_count;
11208 laddr = irel->r_offset;
11209 insn = bfd_getb32 (contents + laddr);
11210 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11211 R_NDS32_PTR_RESOLVED);
11212 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11213 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11214 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11215
11216 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11217 {
11218 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11219 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11220 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11221 /* The range is +/-16k. */
11222 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11223 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11224 {
11225 insn =
11226 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11227 irel->r_info =
11228 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11229 success = 1;
11230 break;
11231 }
11232 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11233 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11234 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11235 /* The range is +/-32k. */
11236 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11237 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
11238 {
11239 insn =
11240 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11241 irel->r_info =
11242 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11243 success = 1;
11244 break;
11245 }
11246 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11247 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11248 /* The range is +/-64k. */
11249 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11250 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11251 {
11252 insn =
11253 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11254 irel->r_info =
11255 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11256 success = 1;
11257 break;
11258 }
11259 default:
11260 break;
11261 }
11262
11263 if (success)
11264 {
11265 bfd_putb32 (insn, contents + laddr);
11266 if (i1_irelfn != irelend)
11267 {
11268 i1_irelfn->r_addend |= 1;
11269 *again = TRUE;
11270 }
11271 }
11272 }
11273
11274 /* Relax PTR relocation for nds32_elf_relax_section. */
11275
11276 static bfd_boolean
11277 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11278 Elf_Internal_Rela *internal_relocs, int *insn_len,
11279 int *seq_len, bfd_byte *contents)
11280 {
11281 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11282
11283 irelend = internal_relocs + sec->reloc_count;
11284
11285 re_irel =
11286 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11287 R_NDS32_PTR_RESOLVED, irel->r_addend);
11288
11289 if (re_irel == irelend)
11290 {
11291 (*_bfd_error_handler)
11292 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11293 abfd, (long) irel->r_offset);
11294 return FALSE;
11295 }
11296
11297 if (re_irel->r_addend != 1)
11298 return FALSE;
11299
11300 /* Pointed target is relaxed and no longer needs this void *,
11301 change the type to NONE. */
11302 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11303
11304 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11305 not exist, it means only count 1 and remove it directly. */
11306 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11307 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11308 R_NDS32_PTR_COUNT);
11309 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11310 R_NDS32_PTR);
11311 if (count_irel != irelend)
11312 {
11313 if (--count_irel->r_addend > 0)
11314 return FALSE;
11315 }
11316
11317 if (ptr_irel != irelend)
11318 return FALSE;
11319
11320 /* If the PTR_COUNT is already 0, remove current instruction. */
11321 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11322 *insn_len = 0;
11323 return TRUE;
11324 }
11325
11326 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11327
11328 static void
11329 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11330 asection *sec, Elf_Internal_Rela *irel,
11331 Elf_Internal_Rela *internal_relocs,
11332 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11333 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11334 {
11335 uint32_t insn;
11336 bfd_signed_vma foff;
11337 Elf_Internal_Rela *i1_irelfn, *irelend;
11338 bfd_vma local_sda, laddr;
11339
11340 irelend = internal_relocs + sec->reloc_count;
11341 laddr = irel->r_offset;
11342 insn = bfd_getb32 (contents + laddr);
11343
11344 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11345 we need additional space. It might be help if we could
11346 borrow some space from instructions to be eliminated
11347 such as sethi, ori, add. */
11348 if (insn & 0x80000000)
11349 return;
11350
11351 if (nds32_elf_check_dup_relocs
11352 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11353 return;
11354
11355 i1_irelfn =
11356 find_relocs_at_address (irel, internal_relocs, irelend,
11357 R_NDS32_PTR_RESOLVED);
11358
11359 /* FIXIT 090606
11360 The boundary should be reduced since the .plt section hasn't
11361 been created and the address of specific entry is still unknown
11362 Maybe the range between the function call and the begin of the
11363 .text section can be used to decide if the .plt is in the range
11364 of function call. */
11365
11366 if (N32_OP6 (insn) == N32_OP6_ALU1
11367 && N32_SUB5 (insn) == N32_ALU1_ADD)
11368 {
11369 /* Get the value of the symbol referred to by the reloc. */
11370 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11371 &local_sda, FALSE);
11372 foff = (bfd_signed_vma) (calculate_plt_memory_address
11373 (abfd, link_info, isymbuf, irel,
11374 symtab_hdr) - local_sda);
11375 /* This condition only happened when symbol is undefined. */
11376 if (foff == 0)
11377 return;
11378
11379 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11380 return;
11381 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11382 R_NDS32_PLT_GOTREL_LO19);
11383 /* addi.gp */
11384 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11385 }
11386 else if (N32_OP6 (insn) == N32_OP6_JREG
11387 && N32_SUB5 (insn) == N32_JREG_JRAL)
11388 {
11389 /* Get the value of the symbol referred to by the reloc. */
11390 foff =
11391 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11392 /* This condition only happened when symbol is undefined. */
11393 if (foff == 0)
11394 return;
11395 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11396 return;
11397 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11398 insn = INSN_JAL;
11399 }
11400 else
11401 return;
11402
11403 bfd_putb32 (insn, contents + laddr);
11404 if (i1_irelfn != irelend)
11405 {
11406 i1_irelfn->r_addend |= 1;
11407 *again = TRUE;
11408 }
11409 }
11410
11411 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11412
11413 static void
11414 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11415 asection *sec, Elf_Internal_Rela *irel,
11416 Elf_Internal_Rela *internal_relocs,
11417 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11418 bfd_boolean *again)
11419 {
11420 uint32_t insn;
11421 bfd_signed_vma foff;
11422 Elf_Internal_Rela *i1_irelfn, *irelend;
11423 bfd_vma local_sda, laddr;
11424
11425 irelend = internal_relocs + sec->reloc_count;
11426 laddr = irel->r_offset;
11427 insn = bfd_getb32 (contents + laddr);
11428 if (insn & 0x80000000)
11429 return;
11430
11431 if (nds32_elf_check_dup_relocs
11432 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11433 return;
11434
11435 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11436 R_NDS32_PTR_RESOLVED);
11437
11438 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11439 &local_sda, FALSE);
11440 foff = calculate_got_memory_address (abfd, link_info, irel,
11441 symtab_hdr) - local_sda;
11442
11443 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11444 {
11445 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11446 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11447 irel->r_info =
11448 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11449 bfd_putb32 (insn, contents + laddr);
11450 if (i1_irelfn != irelend)
11451 {
11452 i1_irelfn->r_addend |= 1;
11453 *again = TRUE;
11454 }
11455 }
11456 }
11457
11458 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11459
11460 static void
11461 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11462 asection *sec, Elf_Internal_Rela *irel,
11463 Elf_Internal_Rela *internal_relocs,
11464 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11465 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11466 {
11467 int opc_insn_gotoff;
11468 uint32_t insn;
11469 bfd_signed_vma foff;
11470 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11471 bfd_vma local_sda, laddr;
11472
11473 irelend = internal_relocs + sec->reloc_count;
11474 laddr = irel->r_offset;
11475 insn = bfd_getb32 (contents + laddr);
11476
11477 if (insn & 0x80000000)
11478 return;
11479
11480 if (nds32_elf_check_dup_relocs
11481 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11482 return;
11483
11484 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11485 R_NDS32_PTR_RESOLVED);
11486 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11487 &local_sda, FALSE);
11488 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11489 foff = foff - local_sda;
11490
11491 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11492 return;
11493
11494 /* Concatenate opcode and sub-opcode for switch case.
11495 It may be MEM or ALU1. */
11496 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11497 switch (opc_insn_gotoff)
11498 {
11499 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11500 /* 4-byte aligned. */
11501 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11502 irel->r_info =
11503 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11504 break;
11505 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11506 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11507 irel->r_info =
11508 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11509 break;
11510 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11511 /* 2-byte aligned. */
11512 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11513 irel->r_info =
11514 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11515 break;
11516 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11517 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11518 irel->r_info =
11519 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11520 break;
11521 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11522 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11523 irel->r_info =
11524 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11525 break;
11526 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11527 /* 1-byte aligned. */
11528 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11529 irel->r_info =
11530 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11531 break;
11532 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11533 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11534 irel->r_info =
11535 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11536 break;
11537 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11538 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11539 irel->r_info =
11540 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11541 break;
11542 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11543 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11544 irel->r_info =
11545 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11546 break;
11547 default:
11548 return;
11549 }
11550
11551 bfd_putb32 (insn, contents + laddr);
11552 if (i1_irelfn != irelend)
11553 {
11554 i1_irelfn->r_addend |= 1;
11555 *again = TRUE;
11556 }
11557 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11558 R_NDS32_INSN16)) != irelend)
11559 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11560
11561 }
11562
11563 static bfd_boolean
11564 nds32_relax_adjust_label (bfd *abfd, asection *sec,
11565 Elf_Internal_Rela *internal_relocs,
11566 bfd_byte *contents,
11567 nds32_elf_blank_t **relax_blank_list,
11568 int optimize, int opt_size)
11569 {
11570 /* This code block is used to adjust 4-byte alignment by relax a pair
11571 of instruction a time.
11572
11573 It recognizes three types of relocations.
11574 1. R_NDS32_LABEL - a aligment.
11575 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11576 3. is_16bit_NOP () - remove a 16-bit instruction. */
11577
11578 /* TODO: It seems currently implementation only support 4-byte aligment.
11579 We should handle any-aligment. */
11580
11581 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11582 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11583 Elf_Internal_Rela rel_temp;
11584 Elf_Internal_Rela *irelend;
11585 bfd_vma address;
11586 uint16_t insn16;
11587
11588 /* Checking for branch relaxation relies on the relocations to
11589 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11590 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11591 sizeof (Elf_Internal_Rela), compar_reloc);
11592
11593 irelend = internal_relocs + sec->reloc_count;
11594
11595 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11596 /* FIXME: Can we generate the right order in assembler?
11597 So we don't have to swapping them here. */
11598
11599 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11600 label_rel < irelend; label_rel++)
11601 {
11602 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11603 continue;
11604
11605 /* Find the first reloc has the same offset with label_rel. */
11606 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11607 insn_rel++;
11608
11609 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11610 insn_rel++)
11611 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11612 address. */
11613 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11614 break;
11615
11616 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11617 && insn_rel < label_rel)
11618 {
11619 /* Swap the two reloc if the R_NDS32_INSN16 is
11620 before R_NDS32_LABEL. */
11621 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11622 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11623 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11624 }
11625 }
11626
11627 label_rel = NULL;
11628 insn_rel = NULL;
11629 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11630 or higher, remove other R_NDS32_LABEL with lower alignment.
11631 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11632 then the R_NDS32_LABEL sequence is broke. */
11633 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11634 {
11635 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11636 {
11637 if (label_rel == NULL)
11638 {
11639 if (tmp_rel->r_addend < 2)
11640 label_rel = tmp_rel;
11641 continue;
11642 }
11643 else if (tmp_rel->r_addend > 1)
11644 {
11645 /* Remove all LABEL relocation from label_rel to tmp_rel
11646 including relocations with same offset as tmp_rel. */
11647 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11648 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11649 {
11650 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11651 && tmp2_rel->r_addend < 2)
11652 tmp2_rel->r_info =
11653 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11654 R_NDS32_NONE);
11655 }
11656 label_rel = NULL;
11657 }
11658 }
11659 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11660 {
11661 /* A new INSN16 which can be converted, so clear label_rel. */
11662 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11663 irelend, &insn16)
11664 || is_16bit_NOP (abfd, sec, tmp_rel))
11665 label_rel = NULL;
11666 }
11667 }
11668
11669 label_rel = NULL;
11670 insn_rel = NULL;
11671 /* Optimized for speed and nothing has not been relaxed.
11672 It's time to align labels.
11673 We may convert a 16-bit instruction right before a label to
11674 32-bit, in order to align the label if necessary
11675 all reloc entries has been sorted by r_offset. */
11676 for (irel = internal_relocs; irel < irelend; irel++)
11677 {
11678 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11679 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11680 continue;
11681
11682 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11683 {
11684 /* A new INSN16 found, resize the old one. */
11685 if (is_convert_32_to_16
11686 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11687 || is_16bit_NOP (abfd, sec, irel))
11688 {
11689 if (insn_rel)
11690 {
11691 /* Previous INSN16 reloc exists, reduce its
11692 size to 16-bit. */
11693 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11694 irelend, &insn16))
11695 {
11696 nds32_elf_write_16 (abfd, contents, insn_rel,
11697 internal_relocs, irelend, insn16);
11698
11699 if (!insert_nds32_elf_blank_recalc_total
11700 (relax_blank_list, insn_rel->r_offset + 2, 2))
11701 return FALSE;
11702 }
11703 else if (is_16bit_NOP (abfd, sec, insn_rel))
11704 {
11705 if (!insert_nds32_elf_blank_recalc_total
11706 (relax_blank_list, insn_rel->r_offset, 2))
11707 return FALSE;
11708 }
11709 insn_rel->r_info =
11710 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11711 }
11712 /* Save the new one for later use. */
11713 insn_rel = irel;
11714 }
11715 else
11716 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11717 R_NDS32_NONE);
11718 }
11719 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11720 {
11721 /* Search for label. */
11722 int force_relax = 0;
11723
11724 /* Label on 16-bit instruction or optimization
11725 needless, just reset this reloc. */
11726 insn16 = bfd_getb16 (contents + irel->r_offset);
11727 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11728 {
11729 irel->r_info =
11730 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11731 continue;
11732 }
11733
11734 address =
11735 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11736 irel->r_offset, 1);
11737
11738 if (!insn_rel)
11739 {
11740 /* Check if there is case which can not be aligned. */
11741 if (irel->r_addend == 2 && address & 0x2)
11742 return FALSE;
11743 continue;
11744 }
11745
11746 /* Try to align this label. */
11747
11748 if ((irel->r_addend & 0x1f) < 2)
11749 {
11750 /* Check if there is a INSN16 at the same address.
11751 Label_rel always seats before insn_rel after
11752 our sort. */
11753
11754 /* Search for INSN16 at LABEL location. If INSN16 is at
11755 same location and this LABEL alignment is lower than 2,
11756 the INSN16 can be converted to 2-byte. */
11757 for (tmp_rel = irel;
11758 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11759 tmp_rel++)
11760 {
11761 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11762 && (is_convert_32_to_16
11763 (abfd, sec, tmp_rel, internal_relocs,
11764 irelend, &insn16)
11765 || is_16bit_NOP (abfd, sec, tmp_rel)))
11766 {
11767 force_relax = 1;
11768 break;
11769 }
11770 }
11771 }
11772
11773 if (force_relax || irel->r_addend == 1 || address & 0x2)
11774 {
11775 /* Label not aligned. */
11776 /* Previous reloc exists, reduce its size to 16-bit. */
11777 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11778 internal_relocs, irelend, &insn16))
11779 {
11780 nds32_elf_write_16 (abfd, contents, insn_rel,
11781 internal_relocs, irelend, insn16);
11782
11783 if (!insert_nds32_elf_blank_recalc_total
11784 (relax_blank_list, insn_rel->r_offset + 2, 2))
11785 return FALSE;
11786 }
11787 else if (is_16bit_NOP (abfd, sec, insn_rel))
11788 {
11789 if (!insert_nds32_elf_blank_recalc_total
11790 (relax_blank_list, insn_rel->r_offset, 2))
11791 return FALSE;
11792 }
11793
11794 }
11795 /* INSN16 reloc is used. */
11796 insn_rel = NULL;
11797 }
11798 }
11799
11800 address =
11801 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11802 if (insn_rel && (address & 0x2 || opt_size))
11803 {
11804 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11805 irelend, &insn16))
11806 {
11807 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11808 irelend, insn16);
11809 if (!insert_nds32_elf_blank_recalc_total
11810 (relax_blank_list, insn_rel->r_offset + 2, 2))
11811 return FALSE;
11812 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11813 R_NDS32_NONE);
11814 }
11815 else if (is_16bit_NOP (abfd, sec, insn_rel))
11816 {
11817 if (!insert_nds32_elf_blank_recalc_total
11818 (relax_blank_list, insn_rel->r_offset, 2))
11819 return FALSE;
11820 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11821 R_NDS32_NONE);
11822 }
11823 }
11824 insn_rel = NULL;
11825 return TRUE;
11826 }
11827
11828 /* Pick relaxation round. */
11829
11830 static int
11831 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11832 struct elf_nds32_link_hash_table *table,
11833 struct bfd_link_info *link_info)
11834 {
11835 static asection *final_sec, *first_sec = NULL;
11836 static bfd_boolean normal_again = FALSE;
11837 static bfd_boolean set = FALSE;
11838 static bfd_boolean first = TRUE;
11839 int round_table[] = {
11840 NDS32_RELAX_NORMAL_ROUND,
11841 NDS32_RELAX_JUMP_IFC_ROUND,
11842 NDS32_RELAX_EX9_BUILD_ROUND,
11843 NDS32_RELAX_EX9_REPLACE_ROUND,
11844 };
11845 static int pass = 0;
11846 static int relax_round;
11847
11848 /* The new round. */
11849 if (init && first_sec == sec)
11850 {
11851 set = TRUE;
11852 normal_again = FALSE;
11853 }
11854
11855 if (first)
11856 {
11857 /* Run an empty run to get the final section. */
11858 relax_round = NDS32_RELAX_EMPTY_ROUND;
11859
11860 /* It has to enter relax again because we can
11861 not make sure what the final turn is. */
11862 *again = TRUE;
11863
11864 first = FALSE;
11865 first_sec = sec;
11866 }
11867
11868 if (!set)
11869 {
11870 /* Not reenter yet. */
11871 final_sec = sec;
11872 return relax_round;
11873 }
11874
11875 relax_round = round_table[pass];
11876
11877 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11878 normal_again = TRUE;
11879
11880 if (!init && final_sec == sec)
11881 {
11882 switch (relax_round)
11883 {
11884 case NDS32_RELAX_NORMAL_ROUND:
11885 if (!normal_again)
11886 {
11887 /* Normal relaxation done. */
11888 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11889 {
11890 pass++;
11891 *again = TRUE;
11892 }
11893 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11894 {
11895 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11896 *again = TRUE;
11897 }
11898 else if (table->ex9_import_file)
11899 {
11900 /* Import ex9 table. */
11901 if (table->update_ex9_table)
11902 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11903 else
11904 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11905 nds32_elf_ex9_import_table (link_info);
11906 *again = TRUE;
11907 }
11908 }
11909 break;
11910 case NDS32_RELAX_JUMP_IFC_ROUND:
11911 if (!nds32_elf_ifc_finish (link_info))
11912 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11913 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11914 {
11915 pass++;
11916 *again = TRUE;
11917 }
11918 break;
11919 case NDS32_RELAX_EX9_BUILD_ROUND:
11920 nds32_elf_ex9_finish (link_info);
11921 pass++;
11922 *again = TRUE;
11923 break;
11924 case NDS32_RELAX_EX9_REPLACE_ROUND:
11925 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11926 {
11927 /* Do jump IFC optimization again. */
11928 if (!nds32_elf_ifc_finish (link_info))
11929 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11930 }
11931 break;
11932 default:
11933 break;
11934 }
11935 }
11936
11937 return relax_round;
11938 }
11939
11940 static bfd_boolean
11941 nds32_elf_relax_section (bfd *abfd, asection *sec,
11942 struct bfd_link_info *link_info, bfd_boolean *again)
11943 {
11944 nds32_elf_blank_t *relax_blank_list = NULL;
11945 Elf_Internal_Shdr *symtab_hdr;
11946 Elf_Internal_Rela *internal_relocs;
11947 Elf_Internal_Rela *irel;
11948 Elf_Internal_Rela *irelend;
11949 Elf_Internal_Sym *isymbuf = NULL;
11950 bfd_byte *contents = NULL;
11951 bfd_boolean result = TRUE;
11952 int optimize = 0;
11953 int opt_size = 0;
11954 uint32_t insn;
11955 uint16_t insn16;
11956
11957 /* Target dependnet option. */
11958 struct elf_nds32_link_hash_table *table;
11959 int load_store_relax;
11960 int relax_round;
11961
11962 relax_blank_list = NULL;
11963
11964 *again = FALSE;
11965
11966 /* Nothing to do for
11967 * relocatable link or
11968 * non-relocatable section or
11969 * non-code section or
11970 * empty content or
11971 * no reloc entry. */
11972 if (bfd_link_relocatable (link_info)
11973 || (sec->flags & SEC_RELOC) == 0
11974 || (sec->flags & SEC_EXCLUDE) == 1
11975 || (sec->flags & SEC_CODE) == 0
11976 || sec->size == 0)
11977 return TRUE;
11978
11979 /* 09.12.11 Workaround. */
11980 /* We have to adjust align for R_NDS32_LABEL if needed.
11981 The adjust approach only can fix 2-byte align once. */
11982 if (sec->alignment_power > 2)
11983 return TRUE;
11984
11985 /* The optimization type to do. */
11986
11987 table = nds32_elf_hash_table (link_info);
11988 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11989 switch (relax_round)
11990 {
11991 case NDS32_RELAX_JUMP_IFC_ROUND:
11992 /* Here is the entrance of ifc jump relaxation. */
11993 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11994 return FALSE;
11995 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11996 return TRUE;
11997
11998 case NDS32_RELAX_EX9_BUILD_ROUND:
11999 /* Here is the entrance of ex9 relaxation. There are two pass of
12000 ex9 relaxation. The one is to traverse all instructions and build
12001 the hash table. The other one is to compare instructions and replace
12002 it by ex9.it. */
12003 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12004 return FALSE;
12005 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12006 return TRUE;
12007
12008 case NDS32_RELAX_EX9_REPLACE_ROUND:
12009 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12010 return FALSE;
12011 return TRUE;
12012
12013 case NDS32_RELAX_EMPTY_ROUND:
12014 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12015 return TRUE;
12016
12017 case NDS32_RELAX_NORMAL_ROUND:
12018 default:
12019 if (sec->reloc_count == 0)
12020 return TRUE;
12021 break;
12022 }
12023
12024 /* The begining of general relaxation. */
12025
12026 if (is_SDA_BASE_set == 0)
12027 {
12028 bfd_vma gp;
12029 is_SDA_BASE_set = 1;
12030 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12031 &gp, FALSE);
12032 relax_range_measurement (abfd);
12033 }
12034
12035 if (is_ITB_BASE_set == 0)
12036 {
12037 /* Set the _ITB_BASE_. */
12038 if (!nds32_elf_ex9_itb_base (link_info))
12039 {
12040 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12041 bfd_set_error (bfd_error_bad_value);
12042 }
12043 }
12044
12045 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12046 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12047 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12048 TRUE /* keep_memory */);
12049 if (internal_relocs == NULL)
12050 goto error_return;
12051
12052 irelend = internal_relocs + sec->reloc_count;
12053 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12054 irelend, R_NDS32_RELAX_ENTRY);
12055
12056 if (irel == irelend)
12057 return TRUE;
12058
12059 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12060 {
12061 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
12062 {
12063 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12064 return TRUE;
12065 }
12066
12067 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12068 optimize = 1;
12069
12070 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12071 opt_size = 1;
12072 }
12073
12074 load_store_relax = table->load_store_relax;
12075
12076 /* Get symbol table and section content. */
12077 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12078 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12079 goto error_return;
12080
12081 /* Do relax loop only when finalize is not done.
12082 Take care of relaxable relocs except INSN16. */
12083 for (irel = internal_relocs; irel < irelend; irel++)
12084 {
12085 int seq_len; /* Original length of instruction sequence. */
12086 int insn_len = 0; /* Final length of instruction sequence. */
12087 bfd_boolean removed;
12088
12089 insn = 0;
12090 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12091 && (irel->r_addend & 0x1f) >= 2)
12092 optimize = 1;
12093
12094 /* Relocation Types
12095 R_NDS32_LONGCALL1 53
12096 R_NDS32_LONGCALL2 54
12097 R_NDS32_LONGCALL3 55
12098 R_NDS32_LONGJUMP1 56
12099 R_NDS32_LONGJUMP2 57
12100 R_NDS32_LONGJUMP3 58
12101 R_NDS32_LOADSTORE 59 */
12102 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12103 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12104 seq_len = GET_SEQ_LEN (irel->r_addend);
12105
12106 /* Relocation Types
12107 R_NDS32_LONGCALL4 107
12108 R_NDS32_LONGCALL5 108
12109 R_NDS32_LONGCALL6 109
12110 R_NDS32_LONGJUMP4 110
12111 R_NDS32_LONGJUMP5 111
12112 R_NDS32_LONGJUMP6 112
12113 R_NDS32_LONGJUMP7 113 */
12114 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12115 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12116 seq_len = 4;
12117
12118 /* Relocation Types
12119 R_NDS32_LO12S0_RELA 30
12120 R_NDS32_LO12S1_RELA 29
12121 R_NDS32_LO12S2_RELA 28
12122 R_NDS32_LO12S2_SP_RELA 71
12123 R_NDS32_LO12S2_DP_RELA 70
12124 R_NDS32_GOT_LO12 46
12125 R_NDS32_GOTOFF_LO12 50
12126 R_NDS32_PLTREL_LO12 65
12127 R_NDS32_PLT_GOTREL_LO12 67
12128 R_NDS32_17IFC_PCREL_RELA 96
12129 R_NDS32_GOT_SUFF 193
12130 R_NDS32_GOTOFF_SUFF 194
12131 R_NDS32_PLT_GOT_SUFF 195
12132 R_NDS32_MULCALL_SUFF 196
12133 R_NDS32_PTR 197 */
12134 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12135 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12136 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12137 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12138 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12139 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12143 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12144 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12147 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12148 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12149 seq_len = 0;
12150 else
12151 continue;
12152
12153 insn_len = seq_len;
12154 removed = FALSE;
12155
12156 switch (ELF32_R_TYPE (irel->r_info))
12157 {
12158 case R_NDS32_LONGCALL1:
12159 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12160 &insn_len, contents, isymbuf,
12161 symtab_hdr);
12162 break;
12163 case R_NDS32_LONGCALL2:
12164 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12165 &insn_len, contents, isymbuf,
12166 symtab_hdr);
12167 break;
12168 case R_NDS32_LONGCALL3:
12169 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12170 &insn_len, contents, isymbuf,
12171 symtab_hdr);
12172 break;
12173 case R_NDS32_LONGJUMP1:
12174 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12175 &insn_len, contents, isymbuf,
12176 symtab_hdr);
12177 break;
12178 case R_NDS32_LONGJUMP2:
12179 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12180 &insn_len, contents, isymbuf,
12181 symtab_hdr);
12182 break;
12183 case R_NDS32_LONGJUMP3:
12184 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12185 &insn_len, contents, isymbuf,
12186 symtab_hdr);
12187 break;
12188 case R_NDS32_LONGCALL4:
12189 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12190 &insn_len, contents, isymbuf,
12191 symtab_hdr);
12192 break;
12193 case R_NDS32_LONGCALL5:
12194 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12195 &insn_len, contents, isymbuf,
12196 symtab_hdr);
12197 break;
12198 case R_NDS32_LONGCALL6:
12199 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12200 &insn_len, contents, isymbuf,
12201 symtab_hdr);
12202 break;
12203 case R_NDS32_LONGJUMP4:
12204 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12205 &insn_len, contents, isymbuf,
12206 symtab_hdr);
12207 break;
12208 case R_NDS32_LONGJUMP5:
12209 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12210 &insn_len, &seq_len, contents,
12211 isymbuf, symtab_hdr);
12212 break;
12213 case R_NDS32_LONGJUMP6:
12214 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12215 &insn_len, &seq_len, contents,
12216 isymbuf, symtab_hdr);
12217 break;
12218 case R_NDS32_LONGJUMP7:
12219 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12220 &insn_len, &seq_len, contents,
12221 isymbuf, symtab_hdr);
12222 break;
12223 case R_NDS32_LOADSTORE:
12224 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12225 internal_relocs, &insn_len,
12226 contents, isymbuf, symtab_hdr,
12227 load_store_relax);
12228 break;
12229 case R_NDS32_LO12S0_RELA:
12230 case R_NDS32_LO12S1_RELA:
12231 case R_NDS32_LO12S2_DP_RELA:
12232 case R_NDS32_LO12S2_SP_RELA:
12233 case R_NDS32_LO12S2_RELA:
12234 /* Relax for low part. */
12235 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12236 contents, isymbuf, symtab_hdr);
12237
12238 /* It is impossible to delete blank, so just continue. */
12239 continue;
12240 case R_NDS32_GOT_LO12:
12241 case R_NDS32_GOTOFF_LO12:
12242 case R_NDS32_PLTREL_LO12:
12243 case R_NDS32_PLT_GOTREL_LO12:
12244 case R_NDS32_GOTPC_LO12:
12245 /* Relax for PIC gp-relative low part. */
12246 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12247 isymbuf, symtab_hdr);
12248
12249 /* It is impossible to delete blank, so just continue. */
12250 continue;
12251 case R_NDS32_TLS_LE_LO12:
12252 /* Relax for LE TLS low part. */
12253 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12254 isymbuf, symtab_hdr);
12255
12256 /* It is impossible to delete blank, so just continue. */
12257 continue;
12258 case R_NDS32_TLS_LE_ADD:
12259 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12260 contents, isymbuf, symtab_hdr, again);
12261 /* It is impossible to delete blank, so just continue. */
12262 continue;
12263 case R_NDS32_TLS_LE_LS:
12264 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12265 contents, isymbuf, symtab_hdr, again);
12266 continue;
12267 case R_NDS32_PTR:
12268 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12269 &insn_len, &seq_len, contents);
12270 break;
12271 case R_NDS32_PLT_GOT_SUFF:
12272 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12273 internal_relocs, contents,
12274 isymbuf, symtab_hdr, again);
12275 /* It is impossible to delete blank, so just continue. */
12276 continue;
12277 case R_NDS32_GOT_SUFF:
12278 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12279 internal_relocs, contents,
12280 symtab_hdr, again);
12281 /* It is impossible to delete blank, so just continue. */
12282 continue;
12283 case R_NDS32_GOTOFF_SUFF:
12284 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12285 internal_relocs, contents,
12286 isymbuf, symtab_hdr, again);
12287 /* It is impossible to delete blank, so just continue. */
12288 continue;
12289 default:
12290 continue;
12291
12292 }
12293 if (removed && seq_len - insn_len > 0)
12294 {
12295 if (!insert_nds32_elf_blank
12296 (&relax_blank_list, irel->r_offset + insn_len,
12297 seq_len - insn_len))
12298 goto error_return;
12299 *again = TRUE;
12300 }
12301 }
12302
12303 calc_nds32_blank_total (relax_blank_list);
12304
12305 if (table->relax_fp_as_gp)
12306 {
12307 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12308 irelend, isymbuf))
12309 goto error_return;
12310
12311 if (*again == FALSE)
12312 {
12313 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12314 irelend))
12315 goto error_return;
12316 }
12317 }
12318
12319 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12320
12321 if (*again == FALSE)
12322 {
12323 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12324 &relax_blank_list, optimize, opt_size))
12325 goto error_return;
12326 }
12327
12328 /* It doesn't matter optimize_for_space_no_align anymore.
12329 If object file is assembled with flag '-Os',
12330 the we don't adjust jump-destination on 4-byte boundary. */
12331
12332 if (relax_blank_list)
12333 {
12334 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12335 relax_blank_list = NULL;
12336 }
12337
12338 if (*again == FALSE)
12339 {
12340 /* Closing the section, so we don't relax it anymore. */
12341 bfd_vma sec_size_align;
12342 Elf_Internal_Rela *tmp_rel;
12343
12344 /* Pad to alignment boundary. Only handle current section alignment. */
12345 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12346 & ((-1U) << sec->alignment_power);
12347 if ((sec_size_align - sec->size) & 0x2)
12348 {
12349 insn16 = NDS32_NOP16;
12350 bfd_putb16 (insn16, contents + sec->size);
12351 sec->size += 2;
12352 }
12353
12354 while (sec_size_align != sec->size)
12355 {
12356 insn = NDS32_NOP32;
12357 bfd_putb32 (insn, contents + sec->size);
12358 sec->size += 4;
12359 }
12360
12361 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12362 irelend, R_NDS32_RELAX_ENTRY);
12363 if (tmp_rel != irelend)
12364 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12365
12366 clean_nds32_elf_blank ();
12367 }
12368
12369 finish:
12370 if (internal_relocs != NULL
12371 && elf_section_data (sec)->relocs != internal_relocs)
12372 free (internal_relocs);
12373
12374 if (contents != NULL
12375 && elf_section_data (sec)->this_hdr.contents != contents)
12376 free (contents);
12377
12378 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12379 free (isymbuf);
12380
12381 return result;
12382
12383 error_return:
12384 result = FALSE;
12385 goto finish;
12386 }
12387
12388 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12389 {
12390 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12391 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12392 {NULL, 0, 0, 0, 0}
12393 };
12394
12395 static bfd_boolean
12396 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12397 struct bfd_link_info *info,
12398 void *finfo ATTRIBUTE_UNUSED,
12399 bfd_boolean (*func) (void *, const char *,
12400 Elf_Internal_Sym *,
12401 asection *,
12402 struct elf_link_hash_entry *)
12403 ATTRIBUTE_UNUSED)
12404 {
12405 FILE *sym_ld_script = NULL;
12406 struct elf_nds32_link_hash_table *table;
12407
12408 table = nds32_elf_hash_table (info);
12409 sym_ld_script = table->sym_ld_script;
12410
12411 if (check_start_export_sym)
12412 fprintf (sym_ld_script, "}\n");
12413
12414 return TRUE;
12415 }
12416
12417 static enum elf_reloc_type_class
12418 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12419 const asection *rel_sec ATTRIBUTE_UNUSED,
12420 const Elf_Internal_Rela *rela)
12421 {
12422 switch ((int) ELF32_R_TYPE (rela->r_info))
12423 {
12424 case R_NDS32_RELATIVE:
12425 return reloc_class_relative;
12426 case R_NDS32_JMP_SLOT:
12427 return reloc_class_plt;
12428 case R_NDS32_COPY:
12429 return reloc_class_copy;
12430 default:
12431 return reloc_class_normal;
12432 }
12433 }
12434
12435 /* Put target dependent option into info hash table. */
12436 void
12437 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12438 int relax_fp_as_gp,
12439 int eliminate_gc_relocs,
12440 FILE * sym_ld_script, int load_store_relax,
12441 int target_optimize, int relax_status,
12442 int relax_round, FILE * ex9_export_file,
12443 FILE * ex9_import_file,
12444 int update_ex9_table, int ex9_limit,
12445 bfd_boolean ex9_loop_aware,
12446 bfd_boolean ifc_loop_aware)
12447 {
12448 struct elf_nds32_link_hash_table *table;
12449
12450 table = nds32_elf_hash_table (link_info);
12451 if (table == NULL)
12452 return;
12453
12454 table->relax_fp_as_gp = relax_fp_as_gp;
12455 table->eliminate_gc_relocs = eliminate_gc_relocs;
12456 table->sym_ld_script = sym_ld_script;
12457 table ->load_store_relax = load_store_relax;
12458 table->target_optimize = target_optimize;
12459 table->relax_status = relax_status;
12460 table->relax_round = relax_round;
12461 table->ex9_export_file = ex9_export_file;
12462 table->ex9_import_file = ex9_import_file;
12463 table->update_ex9_table = update_ex9_table;
12464 table->ex9_limit = ex9_limit;
12465 table->ex9_loop_aware = ex9_loop_aware;
12466 table->ifc_loop_aware = ifc_loop_aware;
12467 }
12468 \f
12469 /* These functions and data-structures are used for fp-as-gp
12470 optimization. */
12471
12472 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */
12473 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12474 the read-only section and read-write section. */
12475 #define FAG_WINDOW (508 - 32)
12476
12477 /* An nds32_fag represent a gp-relative access.
12478 We find best fp-base by using a sliding window
12479 to find a base address which can cover most gp-access. */
12480 struct nds32_fag
12481 {
12482 struct nds32_fag *next; /* NULL-teminated linked list. */
12483 bfd_vma addr; /* The address of this fag. */
12484 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12485 It is used for applying FP7U2_FLAG. */
12486 int count; /* How many times this address is referred.
12487 There should be exactly `count' relocations
12488 in relas. */
12489 int relas_capcity; /* The buffer size of relas.
12490 We use an array instead of linked-list,
12491 and realloc is used to adjust buffer size. */
12492 };
12493
12494 static void
12495 nds32_fag_init (struct nds32_fag *head)
12496 {
12497 memset (head, 0, sizeof (struct nds32_fag));
12498 }
12499
12500 static void
12501 nds32_fag_verify (struct nds32_fag *head)
12502 {
12503 struct nds32_fag *iter;
12504 struct nds32_fag *prev;
12505
12506 prev = NULL;
12507 iter = head->next;
12508 while (iter)
12509 {
12510 if (prev && prev->addr >= iter->addr)
12511 puts ("Bug in fp-as-gp insertion.");
12512 prev = iter;
12513 iter = iter->next;
12514 }
12515 }
12516
12517 /* Insert a fag in ascending order.
12518 If a fag of the same address already exists,
12519 they are chained by relas array. */
12520
12521 static void
12522 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12523 Elf_Internal_Rela * rel)
12524 {
12525 struct nds32_fag *iter;
12526 struct nds32_fag *new_fag;
12527 const int INIT_RELAS_CAP = 4;
12528
12529 for (iter = head;
12530 iter->next && iter->next->addr <= addr;
12531 iter = iter->next)
12532 /* Find somewhere to insert. */ ;
12533
12534 /* `iter' will be equal to `head' if the list is empty. */
12535 if (iter != head && iter->addr == addr)
12536 {
12537 /* The address exists in the list.
12538 Insert `rel' into relocation list, relas. */
12539
12540 /* Check whether relas is big enough. */
12541 if (iter->count >= iter->relas_capcity)
12542 {
12543 iter->relas_capcity *= 2;
12544 iter->relas = bfd_realloc
12545 (iter->relas, iter->relas_capcity * sizeof (void *));
12546 }
12547 iter->relas[iter->count++] = rel;
12548 return;
12549 }
12550
12551 /* This is a new address. Create a fag node for it. */
12552 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12553 memset (new_fag, 0, sizeof (*new_fag));
12554 new_fag->addr = addr;
12555 new_fag->count = 1;
12556 new_fag->next = iter->next;
12557 new_fag->relas_capcity = INIT_RELAS_CAP;
12558 new_fag->relas = (Elf_Internal_Rela **)
12559 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12560 new_fag->relas[0] = rel;
12561 iter->next = new_fag;
12562
12563 nds32_fag_verify (head);
12564 }
12565
12566 static void
12567 nds32_fag_free_list (struct nds32_fag *head)
12568 {
12569 struct nds32_fag *iter;
12570
12571 iter = head->next;
12572 while (iter)
12573 {
12574 struct nds32_fag *tmp = iter;
12575 iter = iter->next;
12576 free (tmp->relas);
12577 tmp->relas = NULL;
12578 free (tmp);
12579 }
12580 }
12581
12582 /* Find the best fp-base address.
12583 The relocation associated with that address is returned,
12584 so we can track the symbol instead of a fixed address.
12585
12586 When relaxation, the address of an datum may change,
12587 because a text section is shrinked, so the data section
12588 moves forward. If the aligments of text and data section
12589 are different, their distance may change too.
12590 Therefore, tracking a fixed address is not appriate. */
12591
12592 static int
12593 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12594 {
12595 struct nds32_fag *base; /* First fag in the window. */
12596 struct nds32_fag *last; /* First fag outside the window. */
12597 int accu = 0; /* Usage accumulation. */
12598 struct nds32_fag *best; /* Best fag. */
12599 int baccu = 0; /* Best accumulation. */
12600
12601 /* Use first fag for initial, and find the last fag in the window.
12602
12603 In each iteration, we could simply subtract previous fag
12604 and accumulate following fags which are inside the window,
12605 untill we each the end. */
12606
12607 if (head->next == NULL)
12608 {
12609 *bestpp = NULL;
12610 return 0;
12611 }
12612
12613 /* Initialize base. */
12614 base = head->next;
12615 best = base;
12616 for (last = base;
12617 last && last->addr < base->addr + FAG_WINDOW;
12618 last = last->next)
12619 accu += last->count;
12620
12621 baccu = accu;
12622
12623 /* Record the best base in each iteration. */
12624 while (base->next)
12625 {
12626 accu -= base->count;
12627 base = base->next;
12628 /* Account fags in window. */
12629 for (/* Nothing. */;
12630 last && last->addr < base->addr + FAG_WINDOW;
12631 last = last->next)
12632 accu += last->count;
12633
12634 /* A better fp-base? */
12635 if (accu > baccu)
12636 {
12637 best = base;
12638 baccu = accu;
12639 }
12640 }
12641
12642 if (bestpp)
12643 *bestpp = best;
12644 return baccu;
12645 }
12646
12647 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12648 so we can convert it fo fp-relative access later.
12649 `best_fag' is the best fp-base. Only those inside the window
12650 of best_fag is applied the flag. */
12651
12652 static bfd_boolean
12653 nds32_fag_mark_relax (struct bfd_link_info *link_info,
12654 bfd *abfd, struct nds32_fag *best_fag,
12655 Elf_Internal_Rela *internal_relocs,
12656 Elf_Internal_Rela *irelend)
12657 {
12658 struct nds32_fag *ifag;
12659 bfd_vma best_fpbase, gp;
12660 bfd *output_bfd;
12661
12662 output_bfd = abfd->sections->output_section->owner;
12663 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12664 best_fpbase = best_fag->addr;
12665
12666 if (best_fpbase > gp + sdata_range[1][1]
12667 || best_fpbase < gp - sdata_range[1][0])
12668 return FALSE;
12669
12670 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12671 so we know they can be converted to lwi37.fp. */
12672 for (ifag = best_fag;
12673 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12674 {
12675 int i;
12676
12677 for (i = 0; i < ifag->count; i++)
12678 {
12679 Elf_Internal_Rela *insn16_rel;
12680 Elf_Internal_Rela *fag_rel;
12681
12682 fag_rel = ifag->relas[i];
12683
12684 /* Only if this is within the WINDOWS, FP7U2_FLAG
12685 is applied. */
12686
12687 insn16_rel = find_relocs_at_address
12688 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12689
12690 if (insn16_rel != irelend)
12691 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12692 }
12693 }
12694 return TRUE;
12695 }
12696
12697 /* Reset INSN16 to clean fp as gp. */
12698
12699 static void
12700 nds32_fag_unmark_relax (struct nds32_fag *fag,
12701 Elf_Internal_Rela *internal_relocs,
12702 Elf_Internal_Rela *irelend)
12703 {
12704 struct nds32_fag *ifag;
12705 int i;
12706 Elf_Internal_Rela *insn16_rel;
12707 Elf_Internal_Rela *fag_rel;
12708
12709 for (ifag = fag; ifag; ifag = ifag->next)
12710 {
12711 for (i = 0; i < ifag->count; i++)
12712 {
12713 fag_rel = ifag->relas[i];
12714
12715 /* Restore the INSN16 relocation. */
12716 insn16_rel = find_relocs_at_address
12717 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12718
12719 if (insn16_rel != irelend)
12720 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12721 }
12722 }
12723 }
12724
12725 /* This is the main function of fp-as-gp optimization.
12726 It should be called by relax_section. */
12727
12728 static bfd_boolean
12729 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12730 bfd *abfd, asection *sec,
12731 Elf_Internal_Rela *internal_relocs,
12732 Elf_Internal_Rela *irelend,
12733 Elf_Internal_Sym *isymbuf)
12734 {
12735 Elf_Internal_Rela *begin_rel = NULL;
12736 Elf_Internal_Rela *irel;
12737 struct nds32_fag fag_head;
12738 Elf_Internal_Shdr *symtab_hdr;
12739 bfd_byte *contents;
12740 bfd_boolean ifc_inside = FALSE;
12741
12742 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12743
12744 /* Per-function fp-base selection.
12745 1. Create a list for all the gp-relative access.
12746 2. Base on those gp-relative address,
12747 find a fp-base which can cover most access.
12748 3. Use the fp-base for fp-as-gp relaxation.
12749
12750 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12751 we should
12752 1. delete the `la $fp, _FP_BASE_' instruction and
12753 2. not convert lwi.gp to lwi37.fp.
12754
12755 To delete the _FP_BASE_ instruction, we simply apply
12756 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12757
12758 To suppress the conversion, we simply NOT to apply
12759 R_NDS32_INSN16_FP7U2_FLAG flag. */
12760
12761 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12762
12763 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
12764 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12765 return FALSE;
12766
12767 /* Check whether it is worth for fp-as-gp optimization,
12768 i.e., at least 3 gp-load.
12769
12770 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12771 apply this optimization. */
12772
12773 for (irel = internal_relocs; irel < irelend; irel++)
12774 {
12775 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12776 One we enter the begin of the region, we track all the LW/ST
12777 instructions, so when we leave the region, we try to find
12778 the best fp-base address for those LW/ST instructions. */
12779
12780 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12781 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12782 {
12783 /* Begin of the region. */
12784 if (begin_rel)
12785 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12786
12787 begin_rel = irel;
12788 nds32_fag_init (&fag_head);
12789 ifc_inside = FALSE;
12790 }
12791 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12792 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12793 {
12794 int accu;
12795 struct nds32_fag *best_fag, *tmp_fag;
12796 int dist;
12797
12798 /* End of the region.
12799 Check whether it is worth to do fp-as-gp. */
12800
12801 if (begin_rel == NULL)
12802 {
12803 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12804 continue;
12805 }
12806
12807 accu = nds32_fag_find_base (&fag_head, &best_fag);
12808
12809 /* Clean FP7U2_FLAG because they may set ever. */
12810 tmp_fag = fag_head.next;
12811 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12812
12813 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12814 if (accu < FAG_THRESHOLD
12815 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12816 internal_relocs, irelend))
12817 {
12818 /* Not worth to do fp-as-gp. */
12819 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12820 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12821 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12822 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12823 nds32_fag_free_list (&fag_head);
12824 begin_rel = NULL;
12825 continue;
12826 }
12827
12828 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12829 so we use it to record the distance to the reloction of best
12830 fp-base. */
12831 dist = best_fag->relas[0] - begin_rel;
12832 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12833 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12834 relocation. And get the base value when relocating. */
12835 begin_rel->r_addend &= (0x1 << 16) - 1;
12836 begin_rel->r_addend |= dist << 16;
12837
12838 nds32_fag_free_list (&fag_head);
12839 begin_rel = NULL;
12840 }
12841
12842 if (begin_rel == NULL || ifc_inside)
12843 /* Skip if we are not in the region of fp-as-gp. */
12844 continue;
12845
12846 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12847 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12848 {
12849 bfd_vma addr;
12850 uint32_t insn;
12851
12852 /* A gp-relative access is found. Insert it to the fag-list. */
12853
12854 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12855 insn = bfd_getb32 (contents + irel->r_offset);
12856 if (!N32_IS_RT3 (insn))
12857 continue;
12858
12859 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12860 nds32_fag_insert (&fag_head, addr, irel);
12861 }
12862 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12863 {
12864 begin_rel = NULL;
12865 }
12866 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12867 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12868 {
12869 /* Suppress fp as gp when encounter ifc. */
12870 ifc_inside = TRUE;
12871 }
12872 }
12873
12874 return TRUE;
12875 }
12876
12877 /* Remove unused `la $fp, _FD_BASE_' instruction. */
12878
12879 static bfd_boolean
12880 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12881 Elf_Internal_Rela *internal_relocs,
12882 Elf_Internal_Rela *irelend)
12883 {
12884 Elf_Internal_Rela *irel;
12885 Elf_Internal_Shdr *symtab_hdr;
12886 bfd_byte *contents = NULL;
12887 nds32_elf_blank_t *relax_blank_list = NULL;
12888 bfd_boolean result = TRUE;
12889 bfd_boolean unused_region = FALSE;
12890
12891 /*
12892 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12893 * R_NDS32_17IFC_PCREL_RELA
12894 * R_NDS32_10IFCU_PCREL_RELA
12895
12896 CASE??????????????
12897 */
12898
12899 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12900 nds32_get_section_contents (abfd, sec, &contents, TRUE);
12901
12902 for (irel = internal_relocs; irel < irelend; irel++)
12903 {
12904 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12905 we marked to in previous pass.
12906 DO NOT scan relocations again, since we've alreadly decided it
12907 and set the flag. */
12908 const char *syname;
12909 int syndx;
12910 uint32_t insn;
12911
12912 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12913 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12914 unused_region = TRUE;
12915 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12916 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12917 unused_region = FALSE;
12918
12919 /* We're not in the region. */
12920 if (!unused_region)
12921 continue;
12922
12923 /* _FP_BASE_ must be a GLOBAL symbol. */
12924 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12925 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12926 continue;
12927
12928 /* The symbol name must be _FP_BASE_. */
12929 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12930 if (strcmp (syname, FP_BASE_NAME) != 0)
12931 continue;
12932
12933 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12934 {
12935 /* addi.gp $fp, -256 */
12936 insn = bfd_getb32 (contents + irel->r_offset);
12937 if (insn != INSN_ADDIGP_TO_FP)
12938 continue;
12939 }
12940 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12941 {
12942 /* addi $fp, $gp, -256 */
12943 insn = bfd_getb32 (contents + irel->r_offset);
12944 if (insn != INSN_ADDI_GP_TO_FP)
12945 continue;
12946 }
12947 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12948 {
12949 /* movi $fp, FP_BASE */
12950 insn = bfd_getb32 (contents + irel->r_offset);
12951 if (insn != INSN_MOVI_TO_FP)
12952 continue;
12953 }
12954 else
12955 continue;
12956
12957 /* We got here because a FP_BASE instruction is found. */
12958 if (!insert_nds32_elf_blank_recalc_total
12959 (&relax_blank_list, irel->r_offset, 4))
12960 goto error_return;
12961 }
12962
12963 finish:
12964 if (relax_blank_list)
12965 {
12966 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12967 relax_blank_list = NULL;
12968 }
12969 return result;
12970
12971 error_return:
12972 result = FALSE;
12973 goto finish;
12974 }
12975
12976 /* This is a version of bfd_generic_get_relocated_section_contents.
12977 We need this variety because relaxation will modify the dwarf
12978 infomation. When there is undefined symbol reference error mesage,
12979 linker need to dump line number where the symbol be used. However
12980 the address is be relaxed, it can not get the original dwarf contents.
12981 The variety only modify function call for reading in the section. */
12982
12983 static bfd_byte *
12984 nds32_elf_get_relocated_section_contents (bfd *abfd,
12985 struct bfd_link_info *link_info,
12986 struct bfd_link_order *link_order,
12987 bfd_byte *data,
12988 bfd_boolean relocatable,
12989 asymbol **symbols)
12990 {
12991 bfd *input_bfd = link_order->u.indirect.section->owner;
12992 asection *input_section = link_order->u.indirect.section;
12993 long reloc_size;
12994 arelent **reloc_vector;
12995 long reloc_count;
12996
12997 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12998 if (reloc_size < 0)
12999 return NULL;
13000
13001 /* Read in the section. */
13002 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
13003 return NULL;
13004
13005 if (reloc_size == 0)
13006 return data;
13007
13008 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13009 if (reloc_vector == NULL)
13010 return NULL;
13011
13012 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13013 reloc_vector, symbols);
13014 if (reloc_count < 0)
13015 goto error_return;
13016
13017 if (reloc_count > 0)
13018 {
13019 arelent **parent;
13020 for (parent = reloc_vector; *parent != NULL; parent++)
13021 {
13022 char *error_message = NULL;
13023 asymbol *symbol;
13024 bfd_reloc_status_type r;
13025
13026 symbol = *(*parent)->sym_ptr_ptr;
13027 if (symbol->section && discarded_section (symbol->section))
13028 {
13029 bfd_byte *p;
13030 static reloc_howto_type none_howto
13031 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13032 "unused", FALSE, 0, 0, FALSE);
13033
13034 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13035 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13036 p);
13037 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13038 (*parent)->addend = 0;
13039 (*parent)->howto = &none_howto;
13040 r = bfd_reloc_ok;
13041 }
13042 else
13043 r = bfd_perform_relocation (input_bfd, *parent, data,
13044 input_section,
13045 relocatable ? abfd : NULL,
13046 &error_message);
13047
13048 if (relocatable)
13049 {
13050 asection *os = input_section->output_section;
13051
13052 /* A partial link, so keep the relocs. */
13053 os->orelocation[os->reloc_count] = *parent;
13054 os->reloc_count++;
13055 }
13056
13057 if (r != bfd_reloc_ok)
13058 {
13059 switch (r)
13060 {
13061 case bfd_reloc_undefined:
13062 if (!((*link_info->callbacks->undefined_symbol)
13063 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13064 input_bfd, input_section, (*parent)->address, TRUE)))
13065 goto error_return;
13066 break;
13067 case bfd_reloc_dangerous:
13068 BFD_ASSERT (error_message != NULL);
13069 if (!((*link_info->callbacks->reloc_dangerous)
13070 (link_info, error_message, input_bfd, input_section,
13071 (*parent)->address)))
13072 goto error_return;
13073 break;
13074 case bfd_reloc_overflow:
13075 if (!((*link_info->callbacks->reloc_overflow)
13076 (link_info, NULL,
13077 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13078 (*parent)->howto->name, (*parent)->addend,
13079 input_bfd, input_section, (*parent)->address)))
13080 goto error_return;
13081 break;
13082 case bfd_reloc_outofrange:
13083 /* PR ld/13730:
13084 This error can result when processing some partially
13085 complete binaries. Do not abort, but issue an error
13086 message instead. */
13087 link_info->callbacks->einfo
13088 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13089 abfd, input_section, * parent);
13090 goto error_return;
13091
13092 default:
13093 abort ();
13094 break;
13095 }
13096 }
13097 }
13098 }
13099
13100 free (reloc_vector);
13101 return data;
13102
13103 error_return:
13104 free (reloc_vector);
13105 return NULL;
13106 }
13107 \f
13108 /* Link-time IFC relaxation.
13109 In this optimization, we chains jump instructions
13110 of the same destination with ifcall. */
13111
13112
13113 /* List to save jal and j relocation. */
13114 struct elf_nds32_ifc_symbol_entry
13115 {
13116 asection *sec;
13117 struct elf_link_hash_entry *h;
13118 struct elf_nds32_ifc_irel_list *irel_head;
13119 unsigned long insn;
13120 int times;
13121 int enable; /* Apply ifc. */
13122 int ex9_enable; /* Apply ifc after ex9. */
13123 struct elf_nds32_ifc_symbol_entry *next;
13124 };
13125
13126 struct elf_nds32_ifc_irel_list
13127 {
13128 Elf_Internal_Rela *irel;
13129 asection *sec;
13130 bfd_vma addr;
13131 /* If this is set, then it is the last instruction for
13132 ifc-chain, so it must be keep for the actual branching. */
13133 int keep;
13134 struct elf_nds32_ifc_irel_list *next;
13135 };
13136
13137 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13138
13139 /* Insert symbol of jal and j for ifc. */
13140
13141 static void
13142 nds32_elf_ifc_insert_symbol (asection *sec,
13143 struct elf_link_hash_entry *h,
13144 Elf_Internal_Rela *irel,
13145 unsigned long insn)
13146 {
13147 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13148
13149 /* Check there is target of existing entry the same as the new one. */
13150 while (ptr != NULL)
13151 {
13152 if (((h == NULL && ptr->sec == sec
13153 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13154 && ptr->irel_head->irel->r_addend == irel->r_addend)
13155 || h != NULL)
13156 && ptr->h == h
13157 && ptr->insn == insn)
13158 {
13159 /* The same target exist, so insert into list. */
13160 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13161
13162 while (irel_list->next != NULL)
13163 irel_list = irel_list->next;
13164 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13165 irel_list = irel_list->next;
13166 irel_list->irel = irel;
13167 irel_list->keep = 1;
13168
13169 if (h == NULL)
13170 irel_list->sec = NULL;
13171 else
13172 irel_list->sec = sec;
13173 irel_list->next = NULL;
13174 return;
13175 }
13176 if (ptr->next == NULL)
13177 break;
13178 ptr = ptr->next;
13179 }
13180
13181 /* There is no same target entry, so build a new one. */
13182 if (ifc_symbol_head == NULL)
13183 {
13184 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13185 ptr = ifc_symbol_head;
13186 }
13187 else
13188 {
13189 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13190 ptr = ptr->next;
13191 }
13192
13193 ptr->h = h;
13194 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13195 ptr->irel_head->irel = irel;
13196 ptr->insn = insn;
13197 ptr->irel_head->keep = 1;
13198
13199 if (h == NULL)
13200 {
13201 /* Local symbols. */
13202 ptr->sec = sec;
13203 ptr->irel_head->sec = NULL;
13204 }
13205 else
13206 {
13207 /* Global symbol. */
13208 ptr->sec = NULL;
13209 ptr->irel_head->sec = sec;
13210 }
13211
13212 ptr->irel_head->next = NULL;
13213 ptr->times = 0;
13214 ptr->enable = 0;
13215 ptr->ex9_enable = 0;
13216 ptr->next = NULL;
13217 }
13218
13219 /* Gather all jal and j instructions. */
13220
13221 static bfd_boolean
13222 nds32_elf_ifc_calc (struct bfd_link_info *info,
13223 bfd *abfd, asection *sec)
13224 {
13225 Elf_Internal_Rela *internal_relocs;
13226 Elf_Internal_Rela *irelend;
13227 Elf_Internal_Rela *irel;
13228 Elf_Internal_Shdr *symtab_hdr;
13229 bfd_byte *contents = NULL;
13230 uint32_t insn, insn_with_reg;
13231 unsigned long r_symndx;
13232 struct elf_link_hash_entry *h;
13233 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13234 struct elf_nds32_link_hash_table *table;
13235 bfd_boolean ifc_loop_aware;
13236
13237 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13238 TRUE /* keep_memory */);
13239 irelend = internal_relocs + sec->reloc_count;
13240 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13241
13242 /* Check if the object enable ifc. */
13243 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13244 R_NDS32_RELAX_ENTRY);
13245
13246 if (irel == NULL
13247 || irel >= irelend
13248 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13249 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13250 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13251 return TRUE;
13252
13253 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
13254 return FALSE;
13255
13256 table = nds32_elf_hash_table (info);
13257 ifc_loop_aware = table->ifc_loop_aware;
13258 while (irel != NULL && irel < irelend)
13259 {
13260 /* Traverse all relocation and gather all of them to build the list. */
13261
13262 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13263 {
13264 if (ifc_loop_aware == 1
13265 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13266 {
13267 /* Check the region if loop or not. If it is true and
13268 ifc-loop-aware is true, ignore the region till region end. */
13269 while (irel != NULL
13270 && irel < irelend
13271 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13272 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13273 irel++;
13274 }
13275 }
13276
13277 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13278 {
13279 insn = bfd_getb32 (contents + irel->r_offset);
13280 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13281 r_symndx = ELF32_R_SYM (irel->r_info);
13282 if (r_symndx < symtab_hdr->sh_info)
13283 {
13284 /* Local symbol. */
13285 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13286 }
13287 else
13288 {
13289 /* External symbol. */
13290 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13291 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13292 }
13293 }
13294 irel++;
13295 }
13296 return TRUE;
13297 }
13298
13299 /* Determine whether j and jal should be substituted. */
13300
13301 static void
13302 nds32_elf_ifc_filter (struct bfd_link_info *info)
13303 {
13304 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13305 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13306 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13307 struct elf_nds32_link_hash_table *table;
13308 int target_optimize;
13309 bfd_vma address;
13310
13311 table = nds32_elf_hash_table (info);
13312 target_optimize = table->target_optimize;
13313 while (ptr)
13314 {
13315 irel_ptr = ptr->irel_head;
13316 if (ptr->h == NULL)
13317 {
13318 /* Local symbol. */
13319 irel_keeper = irel_ptr;
13320 while (irel_ptr && irel_ptr->next)
13321 {
13322 /* Check there is jump target can be used. */
13323 if ((irel_ptr->next->irel->r_offset
13324 - irel_keeper->irel->r_offset) > 1022)
13325 irel_keeper = irel_ptr->next;
13326 else
13327 {
13328 ptr->enable = 1;
13329 irel_ptr->keep = 0;
13330 }
13331 irel_ptr = irel_ptr->next;
13332 }
13333 }
13334 else
13335 {
13336 /* Global symbol. */
13337 /* We have to get the absolute address and decide
13338 whether to keep it or not. */
13339 while (irel_ptr)
13340 {
13341 address = (irel_ptr->irel->r_offset
13342 + irel_ptr->sec->output_section->vma
13343 + irel_ptr->sec->output_offset);
13344 irel_ptr->addr = address;
13345 irel_ptr = irel_ptr->next;
13346 }
13347
13348 irel_ptr = ptr->irel_head;
13349 while (irel_ptr)
13350 {
13351 /* Sort by address. */
13352 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13353 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13354 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13355 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13356
13357 /* Get the smallest one. */
13358 while (irel_temp->next)
13359 {
13360 if (irel_temp->next->addr < irel_dest->addr)
13361 {
13362 irel_dest_prev = irel_temp;
13363 irel_dest = irel_temp->next;
13364 }
13365 irel_temp = irel_temp->next;
13366 }
13367
13368 if (irel_dest != irel_ptr)
13369 {
13370 if (irel_ptr_prev)
13371 irel_ptr_prev->next = irel_dest;
13372 if (irel_dest_prev)
13373 irel_dest_prev->next = irel_ptr;
13374 irel_temp = irel_ptr->next;
13375 irel_ptr->next = irel_dest->next;
13376 irel_dest->next = irel_temp;
13377 }
13378 irel_ptr_prev = irel_ptr;
13379 irel_ptr = irel_ptr->next;
13380 }
13381
13382 irel_ptr = ptr->irel_head;
13383 irel_keeper = irel_ptr;
13384 while (irel_ptr && irel_ptr->next)
13385 {
13386 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13387 irel_keeper = irel_ptr->next;
13388 else
13389 {
13390 ptr->enable = 1;
13391 irel_ptr->keep = 0;
13392 }
13393 irel_ptr = irel_ptr->next;
13394 }
13395 }
13396
13397 /* Ex9 enable. Reserve it for ex9. */
13398 if ((target_optimize & NDS32_RELAX_EX9_ON)
13399 && ptr->irel_head != irel_keeper)
13400 ptr->enable = 0;
13401 ptr = ptr->next;
13402 }
13403 }
13404
13405 /* Determine whether j and jal should be substituted after ex9 done. */
13406
13407 static void
13408 nds32_elf_ifc_filter_after_ex9 (void)
13409 {
13410 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13411 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13412
13413 while (ptr)
13414 {
13415 if (ptr->enable == 0)
13416 {
13417 /* Check whether ifc is applied or not. */
13418 irel_ptr = ptr->irel_head;
13419 ptr->ex9_enable = 1;
13420 while (irel_ptr)
13421 {
13422 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13423 {
13424 /* Ex9 already. */
13425 ptr->ex9_enable = 0;
13426 break;
13427 }
13428 irel_ptr = irel_ptr->next;
13429 }
13430 }
13431 ptr = ptr->next;
13432 }
13433 }
13434
13435 /* Wrapper to do ifc relaxation. */
13436
13437 bfd_boolean
13438 nds32_elf_ifc_finish (struct bfd_link_info *info)
13439 {
13440 int relax_status;
13441 struct elf_nds32_link_hash_table *table;
13442
13443 table = nds32_elf_hash_table (info);
13444 relax_status = table->relax_status;
13445
13446 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13447 nds32_elf_ifc_filter (info);
13448 else
13449 nds32_elf_ifc_filter_after_ex9 ();
13450
13451 if (!nds32_elf_ifc_replace (info))
13452 return FALSE;
13453
13454 if (table)
13455 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13456 return TRUE;
13457 }
13458
13459 /* Traverse the result of ifc filter and replace it with ifcall9. */
13460
13461 static bfd_boolean
13462 nds32_elf_ifc_replace (struct bfd_link_info *info)
13463 {
13464 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13465 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13466 nds32_elf_blank_t *relax_blank_list = NULL;
13467 bfd_byte *contents = NULL;
13468 Elf_Internal_Rela *internal_relocs;
13469 Elf_Internal_Rela *irel;
13470 Elf_Internal_Rela *irelend;
13471 unsigned short insn16 = INSN_IFCALL9;
13472 struct elf_nds32_link_hash_table *table;
13473 int relax_status;
13474
13475 table = nds32_elf_hash_table (info);
13476 relax_status = table->relax_status;
13477
13478 while (ptr)
13479 {
13480 /* Traverse the ifc gather list, and replace the
13481 filter entries by ifcall9. */
13482 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13483 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13484 && ptr->ex9_enable == 1))
13485 {
13486 irel_ptr = ptr->irel_head;
13487 if (ptr->h == NULL)
13488 {
13489 /* Local symbol. */
13490 internal_relocs = _bfd_elf_link_read_relocs
13491 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13492 irelend = internal_relocs + ptr->sec->reloc_count;
13493
13494 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13495 &contents, TRUE))
13496 return FALSE;
13497
13498 while (irel_ptr)
13499 {
13500 if (irel_ptr->keep == 0 && irel_ptr->next)
13501 {
13502 /* The one can be replaced. We have to check whether
13503 there is any alignment point in the region. */
13504 irel = irel_ptr->irel;
13505 while (((irel_ptr->next->keep == 0
13506 && irel < irel_ptr->next->irel)
13507 || (irel_ptr->next->keep == 1 && irel < irelend))
13508 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13509 && (irel->r_addend & 0x1f) == 2))
13510 irel++;
13511 if (irel >= irelend
13512 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13513 && (irel->r_addend & 0x1f) == 2
13514 && ((irel->r_offset - get_nds32_elf_blank_total
13515 (&relax_blank_list, irel->r_offset, 1))
13516 & 0x02) == 0))
13517 {
13518 /* Replace by ifcall9. */
13519 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13520 if (!insert_nds32_elf_blank_recalc_total
13521 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13522 return FALSE;
13523 irel_ptr->irel->r_info =
13524 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13525 R_NDS32_10IFCU_PCREL_RELA);
13526 }
13527 }
13528 irel_ptr = irel_ptr->next;
13529 }
13530
13531 /* Delete the redundant code. */
13532 if (relax_blank_list)
13533 {
13534 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13535 relax_blank_list);
13536 relax_blank_list = NULL;
13537 }
13538 }
13539 else
13540 {
13541 /* Global symbol. */
13542 while (irel_ptr)
13543 {
13544 if (irel_ptr->keep == 0 && irel_ptr->next)
13545 {
13546 /* The one can be replaced, and we have to check
13547 whether there is any alignment point in the region. */
13548 internal_relocs = _bfd_elf_link_read_relocs
13549 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13550 TRUE /* keep_memory */);
13551 irelend = internal_relocs + irel_ptr->sec->reloc_count;
13552 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13553 irel_ptr->sec, &contents,
13554 TRUE))
13555 return FALSE;
13556
13557 irel = irel_ptr->irel;
13558 while (((irel_ptr->sec == irel_ptr->next->sec
13559 && irel_ptr->next->keep == 0
13560 && irel < irel_ptr->next->irel)
13561 || ((irel_ptr->sec != irel_ptr->next->sec
13562 || irel_ptr->next->keep == 1)
13563 && irel < irelend))
13564 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13565 && (irel->r_addend & 0x1f) == 2))
13566 irel++;
13567 if (irel >= irelend
13568 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13569 && (irel->r_addend & 0x1f) == 2
13570 && ((irel->r_offset
13571 - get_nds32_elf_blank_total (&relax_blank_list,
13572 irel->r_offset, 1)) & 0x02) == 0))
13573 {
13574 /* Replace by ifcall9. */
13575 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13576 if (!insert_nds32_elf_blank_recalc_total
13577 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13578 return FALSE;
13579
13580 /* Delete the redundant code, and clear the relocation. */
13581 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13582 irel_ptr->sec,
13583 relax_blank_list);
13584 irel_ptr->irel->r_info =
13585 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13586 R_NDS32_10IFCU_PCREL_RELA);
13587 relax_blank_list = NULL;
13588 }
13589 }
13590
13591 irel_ptr = irel_ptr->next;
13592 }
13593 }
13594 }
13595 ptr = ptr->next;
13596 }
13597
13598 return TRUE;
13599 }
13600
13601 /* Relocate ifcall. */
13602
13603 static bfd_boolean
13604 nds32_elf_ifc_reloc (void)
13605 {
13606 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13607 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13608 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13609 bfd_vma relocation, address;
13610 unsigned short insn16;
13611 bfd_byte *contents = NULL;
13612 static bfd_boolean done = FALSE;
13613
13614 if (done)
13615 return TRUE;
13616
13617 done = TRUE;
13618
13619 while (ptr)
13620 {
13621 /* Check the entry is enable ifcall. */
13622 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13623 {
13624 /* Get the reserve jump. */
13625 irel_ptr = ptr->irel_head;
13626 while (irel_ptr)
13627 {
13628 if (irel_ptr->keep == 1)
13629 {
13630 irel_keeper = irel_ptr;
13631 break;
13632 }
13633 irel_ptr = irel_ptr->next;
13634 }
13635
13636 irel_ptr = ptr->irel_head;
13637 if (ptr->h == NULL)
13638 {
13639 /* Local symbol. */
13640 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13641 &contents, TRUE))
13642 return FALSE;
13643
13644 while (irel_ptr)
13645 {
13646 if (irel_ptr->keep == 0
13647 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13648 {
13649 relocation = irel_keeper->irel->r_offset;
13650 relocation = relocation - irel_ptr->irel->r_offset;
13651 while (irel_keeper && relocation > 1022)
13652 {
13653 irel_keeper = irel_keeper->next;
13654 if (irel_keeper && irel_keeper->keep == 1)
13655 {
13656 relocation = irel_keeper->irel->r_offset;
13657 relocation = relocation - irel_ptr->irel->r_offset;
13658 }
13659 }
13660 if (relocation > 1022)
13661 {
13662 /* Double check. */
13663 irel_keeper = ptr->irel_head;
13664 while (irel_keeper)
13665 {
13666 if (irel_keeper->keep == 1)
13667 {
13668 relocation = irel_keeper->irel->r_offset;
13669 relocation = relocation - irel_ptr->irel->r_offset;
13670 }
13671 if (relocation <= 1022)
13672 break;
13673 irel_keeper = irel_keeper->next;
13674 }
13675 if (!irel_keeper)
13676 return FALSE;
13677 }
13678 irel_ptr->irel->r_info =
13679 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13680 R_NDS32_NONE);
13681 insn16 = INSN_IFCALL9 | (relocation >> 1);
13682 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13683 }
13684 irel_ptr = irel_ptr->next;
13685 }
13686 }
13687 else
13688 {
13689 /* Global symbol. */
13690 while (irel_ptr)
13691 {
13692 if (irel_ptr->keep == 0
13693 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13694 {
13695 /* Get the distance between ifcall and jump. */
13696 relocation = (irel_keeper->irel->r_offset
13697 + irel_keeper->sec->output_section->vma
13698 + irel_keeper->sec->output_offset);
13699 address = (irel_ptr->irel->r_offset
13700 + irel_ptr->sec->output_section->vma
13701 + irel_ptr->sec->output_offset);
13702 relocation = relocation - address;
13703
13704 /* The distance is over ragne, find callee again. */
13705 while (irel_keeper && relocation > 1022)
13706 {
13707 irel_keeper = irel_keeper->next;
13708 if (irel_keeper && irel_keeper->keep ==1)
13709 {
13710 relocation = (irel_keeper->irel->r_offset
13711 + irel_keeper->sec->output_section->vma
13712 + irel_keeper->sec->output_offset);
13713 relocation = relocation - address;
13714 }
13715 }
13716
13717 if (relocation > 1022)
13718 {
13719 /* Double check. */
13720 irel_keeper = ptr->irel_head;
13721 while (irel_keeper)
13722 {
13723 if (irel_keeper->keep == 1)
13724 {
13725
13726 relocation = (irel_keeper->irel->r_offset
13727 + irel_keeper->sec->output_section->vma
13728 + irel_keeper->sec->output_offset);
13729 relocation = relocation - address;
13730 }
13731 if (relocation <= 1022)
13732 break;
13733 irel_keeper = irel_keeper->next;
13734 }
13735 if (!irel_keeper)
13736 return FALSE;
13737 }
13738 if (!nds32_get_section_contents
13739 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
13740 return FALSE;
13741 insn16 = INSN_IFCALL9 | (relocation >> 1);
13742 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13743 irel_ptr->irel->r_info =
13744 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13745 R_NDS32_NONE);
13746 }
13747 irel_ptr =irel_ptr->next;
13748 }
13749 }
13750 }
13751 ptr = ptr->next;
13752 }
13753
13754 return TRUE;
13755 }
13756
13757 /* End of IFC relaxation. */
13758 \f
13759 /* EX9 Instruction Table Relaxation. */
13760
13761 /* Global hash list. */
13762 struct elf_link_hash_entry_list
13763 {
13764 struct elf_link_hash_entry *h;
13765 struct elf_link_hash_entry_list *next;
13766 };
13767
13768 /* Save different destination but same insn. */
13769 struct elf_link_hash_entry_mul_list
13770 {
13771 /* Global symbol times. */
13772 int times;
13773 /* Save relocation for each global symbol but useful?? */
13774 Elf_Internal_Rela *irel;
13775 /* For sethi, two sethi may have the same high-part but different low-parts. */
13776 Elf_Internal_Rela rel_backup;
13777 struct elf_link_hash_entry_list *h_list;
13778 struct elf_link_hash_entry_mul_list *next;
13779 };
13780
13781 /* Instruction hash table. */
13782 struct elf_nds32_code_hash_entry
13783 {
13784 struct bfd_hash_entry root;
13785 int times;
13786 /* For insn that can use relocation or constant ex: sethi. */
13787 int const_insn;
13788 asection *sec;
13789 struct elf_link_hash_entry_mul_list *m_list;
13790 /* Using r_addend. */
13791 Elf_Internal_Rela *irel;
13792 /* Using r_info. */
13793 Elf_Internal_Rela rel_backup;
13794 };
13795
13796 /* Instruction count list. */
13797 struct elf_nds32_insn_times_entry
13798 {
13799 const char *string;
13800 int times;
13801 int order;
13802 asection *sec;
13803 struct elf_link_hash_entry_mul_list *m_list;
13804 Elf_Internal_Rela *irel;
13805 Elf_Internal_Rela rel_backup;
13806 struct elf_nds32_insn_times_entry *next;
13807 };
13808
13809 /* J and JAL symbol list. */
13810 struct elf_nds32_symbol_entry
13811 {
13812 char *string;
13813 unsigned long insn;
13814 struct elf_nds32_symbol_entry *next;
13815 };
13816
13817 /* Relocation list. */
13818 struct elf_nds32_irel_entry
13819 {
13820 Elf_Internal_Rela *irel;
13821 struct elf_nds32_irel_entry *next;
13822 };
13823
13824 /* ex9.it insn need to be fixed. */
13825 struct elf_nds32_ex9_refix
13826 {
13827 Elf_Internal_Rela *irel;
13828 asection *sec;
13829 struct elf_link_hash_entry *h;
13830 int order;
13831 struct elf_nds32_ex9_refix *next;
13832 };
13833
13834 static struct bfd_hash_table ex9_code_table;
13835 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13836 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13837
13838 /* EX9 hash function. */
13839
13840 static struct bfd_hash_entry *
13841 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13842 struct bfd_hash_table *table,
13843 const char *string)
13844 {
13845 struct elf_nds32_code_hash_entry *ret;
13846
13847 /* Allocate the structure if it has not already been allocated by a
13848 subclass. */
13849 if (entry == NULL)
13850 {
13851 entry = (struct bfd_hash_entry *)
13852 bfd_hash_allocate (table, sizeof (*ret));
13853 if (entry == NULL)
13854 return entry;
13855 }
13856
13857 /* Call the allocation method of the superclass. */
13858 entry = bfd_hash_newfunc (entry, table, string);
13859 if (entry == NULL)
13860 return entry;
13861
13862 ret = (struct elf_nds32_code_hash_entry*) entry;
13863 ret->times = 0;
13864 ret->const_insn = 0;
13865 ret->m_list = NULL;
13866 ret->sec = NULL;
13867 ret->irel = NULL;
13868 return &ret->root;
13869 }
13870
13871 /* Insert ex9 entry
13872 this insert must be stable sorted by times. */
13873
13874 static void
13875 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13876 {
13877 struct elf_nds32_insn_times_entry *temp;
13878 struct elf_nds32_insn_times_entry *temp2;
13879
13880 if (ex9_insn_head == NULL)
13881 {
13882 ex9_insn_head = ptr;
13883 ptr->next = NULL;
13884 }
13885 else
13886 {
13887 temp = ex9_insn_head;
13888 temp2 = ex9_insn_head;
13889 while (temp->next &&
13890 (temp->next->times >= ptr->times
13891 || temp->times == -1))
13892 {
13893 if (temp->times == -1)
13894 temp2 = temp;
13895 temp = temp->next;
13896 }
13897 if (ptr->times > temp->times && temp->times != -1)
13898 {
13899 ptr->next = temp;
13900 if (temp2->times == -1)
13901 temp2->next = ptr;
13902 else
13903 ex9_insn_head = ptr;
13904 }
13905 else if (temp->next == NULL)
13906 {
13907 temp->next = ptr;
13908 ptr->next = NULL;
13909 }
13910 else
13911 {
13912 ptr->next = temp->next;
13913 temp->next = ptr;
13914 }
13915 }
13916 }
13917
13918 /* Examine each insn times in hash table.
13919 Handle multi-link hash entry.
13920
13921 TODO: This function doesn't assign so much info since it is fake. */
13922
13923 static int
13924 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13925 {
13926 struct elf_nds32_insn_times_entry *ptr;
13927 int times;
13928
13929 if (h->m_list == NULL)
13930 {
13931 /* Local symbol insn or insn without relocation. */
13932 if (h->times < 3)
13933 return TRUE;
13934
13935 ptr = (struct elf_nds32_insn_times_entry *)
13936 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13937 ptr->times = h->times;
13938 ptr->string = h->root.string;
13939 ptr->m_list = NULL;
13940 ptr->sec = h->sec;
13941 ptr->irel = h->irel;
13942 ptr->rel_backup = h->rel_backup;
13943 nds32_elf_ex9_insert_entry (ptr);
13944 }
13945 else
13946 {
13947 /* Global symbol insn. */
13948 /* Only sethi insn has multiple m_list. */
13949 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13950
13951 times = 0;
13952 while (m_list)
13953 {
13954 times += m_list->times;
13955 m_list = m_list->next;
13956 }
13957 if (times >= 3)
13958 {
13959 m_list = h->m_list;
13960 ptr = (struct elf_nds32_insn_times_entry *)
13961 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13962 ptr->times = times; /* Use the total times. */
13963 ptr->string = h->root.string;
13964 ptr->m_list = m_list;
13965 ptr->sec = h->sec;
13966 ptr->irel = m_list->irel;
13967 ptr->rel_backup = m_list->rel_backup;
13968 nds32_elf_ex9_insert_entry (ptr);
13969 }
13970 if (h->const_insn == 1)
13971 {
13972 /* sethi with constant value. */
13973 if (h->times < 3)
13974 return TRUE;
13975
13976 ptr = (struct elf_nds32_insn_times_entry *)
13977 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13978 ptr->times = h->times;
13979 ptr->string = h->root.string;
13980 ptr->m_list = NULL;
13981 ptr->sec = NULL;
13982 ptr->irel = NULL;
13983 ptr->rel_backup = h->rel_backup;
13984 nds32_elf_ex9_insert_entry (ptr);
13985 }
13986 }
13987 return TRUE;
13988 }
13989
13990 /* Count each insn times in hash table.
13991 Handle multi-link hash entry. */
13992
13993 static int
13994 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13995 {
13996 int reservation, times;
13997 unsigned long relocation, min_relocation;
13998 struct elf_nds32_insn_times_entry *ptr;
13999
14000 if (h->m_list == NULL)
14001 {
14002 /* Local symbol insn or insn without relocation. */
14003 if (h->times < 3)
14004 return TRUE;
14005 ptr = (struct elf_nds32_insn_times_entry *)
14006 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14007 ptr->times = h->times;
14008 ptr->string = h->root.string;
14009 ptr->m_list = NULL;
14010 ptr->sec = h->sec;
14011 ptr->irel = h->irel;
14012 ptr->rel_backup = h->rel_backup;
14013 nds32_elf_ex9_insert_entry (ptr);
14014 }
14015 else
14016 {
14017 /* Global symbol insn. */
14018 /* Only sethi insn has multiple m_list. */
14019 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14020
14021 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14022 && m_list->next != NULL)
14023 {
14024 /* Sethi insn has different symbol or addend but has same hi20. */
14025 times = 0;
14026 reservation = 1;
14027 relocation = 0;
14028 min_relocation = 0xffffffff;
14029 while (m_list)
14030 {
14031 /* Get the minimum sethi address
14032 and calculate how many entry the sethi-list have to use. */
14033 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14034 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14035 && (m_list->h_list->h->root.u.def.section != NULL
14036 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14037 {
14038 relocation = (m_list->h_list->h->root.u.def.value +
14039 m_list->h_list->h->root.u.def.section->output_section->vma +
14040 m_list->h_list->h->root.u.def.section->output_offset);
14041 relocation += m_list->irel->r_addend;
14042 }
14043 else
14044 relocation = 0;
14045 if (relocation < min_relocation)
14046 min_relocation = relocation;
14047 times += m_list->times;
14048 m_list = m_list->next;
14049 }
14050 if (min_relocation < ex9_relax_size)
14051 reservation = (min_relocation >> 12) + 1;
14052 else
14053 reservation = (min_relocation >> 12)
14054 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14055 if (reservation < (times / 3))
14056 {
14057 /* Efficient enough to use ex9. */
14058 int i;
14059
14060 for (i = reservation ; i > 0; i--)
14061 {
14062 /* Allocate number of reservation ex9 entry. */
14063 ptr = (struct elf_nds32_insn_times_entry *)
14064 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14065 ptr->times = h->m_list->times / reservation;
14066 ptr->string = h->root.string;
14067 ptr->m_list = h->m_list;
14068 ptr->sec = h->sec;
14069 ptr->irel = h->m_list->irel;
14070 ptr->rel_backup = h->m_list->rel_backup;
14071 nds32_elf_ex9_insert_entry (ptr);
14072 }
14073 }
14074 }
14075 else
14076 {
14077 /* Normal global symbol that means no different address symbol
14078 using same ex9 entry. */
14079 if (m_list->times >= 3)
14080 {
14081 ptr = (struct elf_nds32_insn_times_entry *)
14082 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14083 ptr->times = m_list->times;
14084 ptr->string = h->root.string;
14085 ptr->m_list = h->m_list;
14086 ptr->sec = h->sec;
14087 ptr->irel = h->m_list->irel;
14088 ptr->rel_backup = h->m_list->rel_backup;
14089 nds32_elf_ex9_insert_entry (ptr);
14090 }
14091 }
14092
14093 if (h->const_insn == 1)
14094 {
14095 /* sethi with constant value. */
14096 if (h->times < 3)
14097 return TRUE;
14098
14099 ptr = (struct elf_nds32_insn_times_entry *)
14100 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14101 ptr->times = h->times;
14102 ptr->string = h->root.string;
14103 ptr->m_list = NULL;
14104 ptr->sec = NULL;
14105 ptr->irel = NULL;
14106 ptr->rel_backup = h->rel_backup;
14107 nds32_elf_ex9_insert_entry (ptr);
14108 }
14109 }
14110
14111 return TRUE;
14112 }
14113
14114 /* Hash table traverse function. */
14115
14116 static void
14117 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14118 {
14119 unsigned int i;
14120
14121 ex9_code_table.frozen = 1;
14122 for (i = 0; i < ex9_code_table.size; i++)
14123 {
14124 struct bfd_hash_entry *p;
14125
14126 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14127 if (!func ((struct elf_nds32_code_hash_entry *) p))
14128 goto out;
14129 }
14130 out:
14131 ex9_code_table.frozen = 0;
14132 }
14133
14134
14135 /* Give order number to insn list. */
14136
14137 static void
14138 nds32_elf_order_insn_times (struct bfd_link_info *info)
14139 {
14140 struct elf_nds32_insn_times_entry *ex9_insn;
14141 struct elf_nds32_insn_times_entry *temp = NULL;
14142 struct elf_nds32_link_hash_table *table;
14143 int ex9_limit;
14144 int number = 0;
14145
14146 if (ex9_insn_head == NULL)
14147 return;
14148
14149 /* The max number of entries is 512. */
14150 ex9_insn = ex9_insn_head;
14151 table = nds32_elf_hash_table (info);
14152 ex9_limit = table->ex9_limit;
14153
14154 ex9_insn = ex9_insn_head;
14155
14156 while (ex9_insn != NULL && number < ex9_limit)
14157 {
14158 ex9_insn->order = number;
14159 number++;
14160 temp = ex9_insn;
14161 ex9_insn = ex9_insn->next;
14162 }
14163
14164 if (ex9_insn && temp)
14165 temp->next = NULL;
14166
14167 while (ex9_insn != NULL)
14168 {
14169 /* Free useless entry. */
14170 temp = ex9_insn;
14171 ex9_insn = ex9_insn->next;
14172 free (temp);
14173 }
14174 }
14175
14176 /* Build .ex9.itable section. */
14177
14178 static void
14179 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14180 {
14181 asection *table_sec;
14182 struct elf_nds32_insn_times_entry *ptr;
14183 bfd *it_abfd;
14184 int number = 0;
14185 bfd_byte *contents = NULL;
14186
14187 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14188 it_abfd = it_abfd->link.next)
14189 {
14190 /* Find the section .ex9.itable, and put all entries into it. */
14191 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14192 if (table_sec != NULL)
14193 {
14194 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
14195 return;
14196
14197 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14198 number++;
14199
14200 table_sec->size = number * 4;
14201
14202 if (number == 0)
14203 return;
14204
14205 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14206 number = 0;
14207 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14208 {
14209 long val;
14210
14211 val = strtol (ptr->string, NULL, 16);
14212 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14213 number++;
14214 }
14215 break;
14216 }
14217 }
14218 }
14219
14220 /* Get insn with regs according to relocation type. */
14221
14222 static void
14223 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
14224 uint32_t insn, uint32_t *insn_with_reg)
14225 {
14226 reloc_howto_type *howto = NULL;
14227
14228 if (irel == NULL
14229 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14230 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14231 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14232 {
14233 *insn_with_reg = insn;
14234 return;
14235 }
14236
14237 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14238 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14239 }
14240
14241 /* Mask number of address bits according to relocation. */
14242
14243 static unsigned long
14244 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14245 {
14246 reloc_howto_type *howto = NULL;
14247
14248 if (irel == NULL
14249 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14250 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14251 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14252 return 0;
14253
14254 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14255 return howto->dst_mask;
14256 }
14257
14258 static void
14259 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14260 struct elf_nds32_irel_entry *irel_ptr)
14261 {
14262 if (*irel_list == NULL)
14263 {
14264 *irel_list = irel_ptr;
14265 irel_ptr->next = NULL;
14266 }
14267 else
14268 {
14269 irel_ptr->next = *irel_list;
14270 *irel_list = irel_ptr;
14271 }
14272 }
14273
14274 static void
14275 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14276 struct elf_link_hash_entry *h, int order)
14277 {
14278 struct elf_nds32_ex9_refix *ptr;
14279
14280 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14281 ptr->sec = sec;
14282 ptr->irel = irel;
14283 ptr->h = h;
14284 ptr->order = order;
14285 ptr->next = NULL;
14286
14287 if (ex9_refix_head == NULL)
14288 ex9_refix_head = ptr;
14289 else
14290 {
14291 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14292
14293 while (temp->next != NULL)
14294 temp = temp->next;
14295 temp->next = ptr;
14296 }
14297 }
14298
14299 enum
14300 {
14301 DATA_EXIST = 1,
14302 CLEAN_PRE = 1 << 1,
14303 PUSH_PRE = 1 << 2
14304 };
14305
14306 /* Check relocation type if supporting for ex9. */
14307
14308 static int
14309 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14310 Elf_Internal_Rela **irel,
14311 Elf_Internal_Rela *irelend,
14312 nds32_elf_blank_t *relax_blank_list,
14313 asection *sec,bfd_vma *off,
14314 bfd_byte *contents)
14315 {
14316 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14317 bfd_boolean nested_ex9, nested_loop;
14318 bfd_boolean ex9_loop_aware;
14319 /* We use the highest 1 byte of result to record
14320 how many bytes location counter has to move. */
14321 int result = 0;
14322 Elf_Internal_Rela *irel_save = NULL;
14323 struct elf_nds32_link_hash_table *table;
14324
14325 table = nds32_elf_hash_table (info);
14326 ex9_loop_aware = table->ex9_loop_aware;
14327
14328 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14329 {
14330 switch (ELF32_R_TYPE ((*irel)->r_info))
14331 {
14332 case R_NDS32_RELAX_REGION_BEGIN:
14333 /* Ignore code block. */
14334 nested_ex9 = FALSE;
14335 nested_loop = FALSE;
14336 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14337 || (ex9_loop_aware
14338 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14339 {
14340 /* Check the region if loop or not. If it is true and
14341 ex9-loop-aware is true, ignore the region till region end. */
14342 /* To save the status for in .no_relax ex9 region and
14343 loop region to conform the block can do ex9 relaxation. */
14344 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14345 nested_loop = (ex9_loop_aware
14346 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14347 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14348 {
14349 (*irel)++;
14350 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14351 {
14352 /* There may be nested region. */
14353 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14354 nested_ex9 = TRUE;
14355 else if (ex9_loop_aware
14356 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14357 nested_loop = TRUE;
14358 }
14359 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14360 {
14361 /* The end of region. */
14362 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14363 nested_ex9 = FALSE;
14364 else if (ex9_loop_aware
14365 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14366 nested_loop = FALSE;
14367 }
14368 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14369 && ((*irel)->r_addend & 0x1f) == 2)
14370 {
14371 /* Alignment exist in the region. */
14372 result |= CLEAN_PRE;
14373 if (((*irel)->r_offset -
14374 get_nds32_elf_blank_total (&relax_blank_list,
14375 (*irel)->r_offset, 0)) & 0x02)
14376 result |= PUSH_PRE;
14377 }
14378 }
14379 if ((*irel) >= irelend)
14380 *off = sec->size;
14381 else
14382 *off = (*irel)->r_offset;
14383
14384 /* The final instruction in the region, regard this one as data to ignore it. */
14385 result |= DATA_EXIST;
14386 return result;
14387 }
14388 break;
14389
14390 case R_NDS32_LABEL:
14391 if (((*irel)->r_addend & 0x1f) == 2)
14392 {
14393 /* Check this point is align and decide to do ex9 or not. */
14394 result |= CLEAN_PRE;
14395 if (((*irel)->r_offset -
14396 get_nds32_elf_blank_total (&relax_blank_list,
14397 (*irel)->r_offset, 0)) & 0x02)
14398 result |= PUSH_PRE;
14399 }
14400 break;
14401 case R_NDS32_32_RELA:
14402 /* Data. */
14403 result |= (4 << 24);
14404 result |= DATA_EXIST;
14405 break;
14406 case R_NDS32_16_RELA:
14407 /* Data. */
14408 result |= (2 << 24);
14409 result |= DATA_EXIST;
14410 break;
14411 case R_NDS32_DATA:
14412 /* Data. */
14413 /* The least code alignment is 2. If the data is only one byte,
14414 we have to shift one more byte. */
14415 if ((*irel)->r_addend == 1)
14416 result |= ((*irel)->r_addend << 25) ;
14417 else
14418 result |= ((*irel)->r_addend << 24) ;
14419
14420 result |= DATA_EXIST;
14421 break;
14422
14423 case R_NDS32_25_PCREL_RELA:
14424 case R_NDS32_SDA16S3_RELA:
14425 case R_NDS32_SDA15S3_RELA:
14426 case R_NDS32_SDA15S3:
14427 case R_NDS32_SDA17S2_RELA:
14428 case R_NDS32_SDA15S2_RELA:
14429 case R_NDS32_SDA12S2_SP_RELA:
14430 case R_NDS32_SDA12S2_DP_RELA:
14431 case R_NDS32_SDA15S2:
14432 case R_NDS32_SDA18S1_RELA:
14433 case R_NDS32_SDA15S1_RELA:
14434 case R_NDS32_SDA15S1:
14435 case R_NDS32_SDA19S0_RELA:
14436 case R_NDS32_SDA15S0_RELA:
14437 case R_NDS32_SDA15S0:
14438 case R_NDS32_HI20_RELA:
14439 case R_NDS32_LO12S0_ORI_RELA:
14440 case R_NDS32_LO12S0_RELA:
14441 case R_NDS32_LO12S1_RELA:
14442 case R_NDS32_LO12S2_RELA:
14443 /* These relocation is supported ex9 relaxation currently. */
14444 /* We have to save the relocation for using later, since we have
14445 to check there is any alignment in the same address. */
14446 irel_save = *irel;
14447 break;
14448 default:
14449 /* Not support relocations. */
14450 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14451 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14452 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14453 {
14454 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14455 But we have to consider if there is any side-effect. */
14456 if (!(result & DATA_EXIST))
14457 {
14458 /* We have to confirm there is no data relocation in the
14459 same address. In general case, this won't happen. */
14460 /* We have to do ex9 conservative, for those relocation not
14461 considerd we ignore instruction. */
14462 result |= DATA_EXIST;
14463 if (*(contents + *off) & 0x80)
14464 result |= (2 << 24);
14465 else
14466 result |= (4 << 24);
14467 break;
14468 }
14469 }
14470 }
14471 if ((*irel) < irelend
14472 && ((*irel) + 1) < irelend
14473 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14474 /* There are relocations pointing to the same address, we have to
14475 check all of them. */
14476 (*irel)++;
14477 else
14478 {
14479 if (irel_save)
14480 *irel = irel_save;
14481 return result;
14482 }
14483 }
14484 return result;
14485 }
14486
14487 /* Replace with ex9 instruction. */
14488
14489 static bfd_boolean
14490 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14491 nds32_elf_blank_t **relax_blank_list,
14492 struct elf_nds32_irel_entry *pre_irel_ptr,
14493 struct elf_nds32_irel_entry **irel_list)
14494 {
14495 if (insn16 != 0)
14496 {
14497 /* Implement the ex9 relaxation. */
14498 bfd_putb16 (insn16, contents + pre_off);
14499 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14500 pre_off + 2, 2))
14501 return FALSE;
14502 if (pre_irel_ptr != NULL)
14503 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14504 }
14505 return TRUE;
14506 }
14507
14508 /* Replace input file instruction which is in ex9 itable. */
14509
14510 static bfd_boolean
14511 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14512 {
14513 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14514 bfd_byte *contents = NULL;
14515 bfd_vma off;
14516 uint16_t insn16, insn_ex9;
14517 /* `pre_*' are used to track previous instruction that can use ex9.it. */
14518 bfd_vma pre_off = -1;
14519 uint16_t pre_insn16 = 0;
14520 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14521 Elf_Internal_Rela *internal_relocs;
14522 Elf_Internal_Rela *irel;
14523 Elf_Internal_Rela *irelend;
14524 Elf_Internal_Shdr *symtab_hdr;
14525 Elf_Internal_Sym *isym = NULL;
14526 nds32_elf_blank_t *relax_blank_list = NULL;
14527 uint32_t insn = 0;
14528 uint32_t insn_with_reg = 0;
14529 uint32_t it_insn;
14530 uint32_t it_insn_with_reg;
14531 unsigned long r_symndx;
14532 asection *isec;
14533 struct elf_nds32_irel_entry *irel_list = NULL;
14534 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14535 int data_flag, do_replace, save_irel;
14536 struct elf_link_hash_entry_list *h_list;
14537
14538
14539 /* Load section instructions, relocations, and symbol table. */
14540 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
14541 || !nds32_get_local_syms (abfd, sec, &isym))
14542 return FALSE;
14543 internal_relocs =
14544 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14545 irelend = internal_relocs + sec->reloc_count;
14546 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14547
14548 off = 0;
14549
14550 /* Check if the object enable ex9. */
14551 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14552 irelend, R_NDS32_RELAX_ENTRY);
14553
14554 /* Check this section trigger ex9 relaxation. */
14555 if (irel == NULL
14556 || irel >= irelend
14557 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14558 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14559 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14560 return TRUE;
14561
14562 irel = internal_relocs;
14563
14564 /* Check alignment and fetch proper relocation. */
14565 while (off < sec->size)
14566 {
14567 struct elf_link_hash_entry *h = NULL;
14568 struct elf_nds32_irel_entry *irel_ptr = NULL;
14569
14570 /* Syn the instruction and the relocation. */
14571 while (irel != NULL && irel < irelend && irel->r_offset < off)
14572 irel++;
14573
14574 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14575 relax_blank_list, sec,
14576 &off, contents);
14577 if (data_flag & PUSH_PRE)
14578 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14579 &relax_blank_list, pre_irel_ptr,
14580 &irel_list))
14581 return FALSE;
14582
14583 if (data_flag & CLEAN_PRE)
14584 {
14585 pre_off = 0;
14586 pre_insn16 = 0;
14587 pre_irel_ptr = NULL;
14588 }
14589 if (data_flag & DATA_EXIST)
14590 {
14591 /* We save the move offset in the highest byte. */
14592 off += (data_flag >> 24);
14593 continue;
14594 }
14595
14596 if (*(contents + off) & 0x80)
14597 {
14598 /* 2-byte instruction. */
14599 off += 2;
14600 continue;
14601 }
14602
14603 /* Load the instruction and its opcode with register for comparing. */
14604 ex9_insn = ex9_insn_head;
14605 insn = bfd_getb32 (contents + off);
14606 insn_with_reg = 0;
14607 while (ex9_insn)
14608 {
14609 it_insn = strtol (ex9_insn->string, NULL, 16);
14610 it_insn_with_reg = 0;
14611 do_replace = 0;
14612 save_irel = 0;
14613
14614 if (irel != NULL && irel < irelend && irel->r_offset == off)
14615 {
14616 /* Insn with relocation. */
14617 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14618
14619 if (ex9_insn->irel != NULL)
14620 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14621 &it_insn_with_reg);
14622
14623 if (ex9_insn->irel != NULL
14624 && (ELF32_R_TYPE (irel->r_info) ==
14625 ELF32_R_TYPE (ex9_insn->irel->r_info))
14626 && (insn_with_reg == it_insn_with_reg))
14627 {
14628 /* Insn relocation and format is the same as table entry. */
14629
14630 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14631 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14632 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14633 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14634 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14635 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14636 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14637 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14638 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14639 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14640 && ELF32_R_TYPE (irel->r_info) <=
14641 R_NDS32_SDA12S2_SP_RELA)
14642 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14643 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14644 {
14645 r_symndx = ELF32_R_SYM (irel->r_info);
14646 if (r_symndx < symtab_hdr->sh_info)
14647 {
14648 /* Local symbol. */
14649 int shndx = isym[r_symndx].st_shndx;
14650
14651 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14652 if (ex9_insn->sec == isec
14653 && ex9_insn->irel->r_addend == irel->r_addend
14654 && ex9_insn->irel->r_info == irel->r_info)
14655 {
14656 do_replace = 1;
14657 save_irel = 1;
14658 }
14659 }
14660 else
14661 {
14662 /* External symbol. */
14663 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14664 if (ex9_insn->m_list)
14665 {
14666 h_list = ex9_insn->m_list->h_list;
14667 while (h_list)
14668 {
14669 if (h == h_list->h
14670 && (ex9_insn->m_list->irel->r_addend ==
14671 irel->r_addend))
14672 {
14673 do_replace = 1;
14674 save_irel = 1;
14675 break;
14676 }
14677 h_list = h_list->next;
14678 }
14679 }
14680 }
14681 }
14682 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14683 {
14684 r_symndx = ELF32_R_SYM (irel->r_info);
14685 if (r_symndx < symtab_hdr->sh_info)
14686 {
14687 /* Local symbols. Compare its base symbol and offset. */
14688 int shndx = isym[r_symndx].st_shndx;
14689
14690 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14691 if (ex9_insn->sec == isec
14692 && ex9_insn->irel->r_addend == irel->r_addend
14693 && ex9_insn->irel->r_info == irel->r_info)
14694 {
14695 do_replace = 1;
14696 save_irel = 1;
14697 }
14698 }
14699 else
14700 {
14701 /* External symbol. */
14702 struct elf_link_hash_entry_mul_list *m_list;
14703
14704 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14705 m_list = ex9_insn->m_list;
14706
14707 while (m_list)
14708 {
14709 h_list = m_list->h_list;
14710
14711 while (h_list)
14712 {
14713 if (h == h_list->h
14714 && (m_list->irel->r_addend
14715 == irel->r_addend))
14716 {
14717 do_replace = 1;
14718 save_irel = 1;
14719 if (ex9_insn->next
14720 && ex9_insn->m_list
14721 && ex9_insn->m_list == ex9_insn->next->m_list)
14722 {
14723 /* sethi multiple entry must be fixed */
14724 nds32_elf_ex9_insert_fix (sec, irel,
14725 h, ex9_insn->order);
14726 }
14727 break;
14728 }
14729 h_list = h_list->next;
14730 }
14731 m_list = m_list->next;
14732 }
14733 }
14734 }
14735 }
14736
14737 /* Import table: Check the symbol hash table and the
14738 jump target. Only R_NDS32_25_PCREL_RELA now. */
14739 else if (ex9_insn->times == -1
14740 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14741 {
14742 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14743 if (insn_with_reg == it_insn_with_reg)
14744 {
14745 char code[10];
14746 bfd_vma relocation;
14747
14748 r_symndx = ELF32_R_SYM (irel->r_info);
14749 if (r_symndx >= symtab_hdr->sh_info)
14750 {
14751 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14752 if ((h->root.type == bfd_link_hash_defined
14753 || h->root.type == bfd_link_hash_defweak)
14754 && h->root.u.def.section != NULL
14755 && h->root.u.def.section->output_section != NULL
14756 && h->root.u.def.section->gc_mark == 1
14757 && bfd_is_abs_section (h->root.u.def.section)
14758 && h->root.u.def.value > sec->size)
14759 {
14760 relocation = h->root.u.def.value +
14761 h->root.u.def.section->output_section->vma +
14762 h->root.u.def.section->output_offset;
14763 relocation += irel->r_addend;
14764 insn = insn_with_reg
14765 | ((relocation >> 1) & 0xffffff);
14766 snprintf (code, sizeof (code), "%08x", insn);
14767 if (strcmp (code, ex9_insn->string) == 0)
14768 {
14769 do_replace = 1;
14770 save_irel = 1;
14771 }
14772 }
14773 }
14774 }
14775 }
14776 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14777 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14778 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14779 {
14780 /* These relocations do not have to relocate contens, so it can
14781 be regard as instruction without relocation. */
14782 if (insn == it_insn && ex9_insn->irel == NULL)
14783 do_replace = 1;
14784 }
14785 }
14786 else
14787 {
14788 /* Instruction without relocation, we only
14789 have to compare their byte code. */
14790 if (insn == it_insn && ex9_insn->irel == NULL)
14791 do_replace = 1;
14792 }
14793
14794 /* Insntruction match so replacing the code here. */
14795 if (do_replace == 1)
14796 {
14797 /* There are two formats of ex9 instruction. */
14798 if (ex9_insn->order < 32)
14799 insn_ex9 = INSN_EX9_IT_2;
14800 else
14801 insn_ex9 = INSN_EX9_IT_1;
14802 insn16 = insn_ex9 | ex9_insn->order;
14803
14804 /* Insert ex9 instruction. */
14805 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14806 &relax_blank_list, pre_irel_ptr,
14807 &irel_list);
14808 pre_off = off;
14809 pre_insn16 = insn16;
14810
14811 if (save_irel)
14812 {
14813 /* For instuction with relocation do relax. */
14814 irel_ptr = (struct elf_nds32_irel_entry *)
14815 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14816 irel_ptr->irel = irel;
14817 irel_ptr->next = NULL;
14818 pre_irel_ptr = irel_ptr;
14819 }
14820 else
14821 pre_irel_ptr = NULL;
14822 break;
14823 }
14824 ex9_insn = ex9_insn->next;
14825 }
14826 off += 4;
14827 }
14828
14829 /* Insert ex9 instruction. */
14830 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14831 &relax_blank_list, pre_irel_ptr,
14832 &irel_list);
14833
14834 /* Delete the redundant code. */
14835 if (relax_blank_list)
14836 {
14837 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14838 relax_blank_list = NULL;
14839 }
14840
14841 /* Clear the relocation that is replaced by ex9. */
14842 while (irel_list)
14843 {
14844 struct elf_nds32_irel_entry *irel_ptr;
14845
14846 irel_ptr = irel_list;
14847 irel_list = irel_ptr->next;
14848 irel_ptr->irel->r_info =
14849 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14850 free (irel_ptr);
14851 }
14852 return TRUE;
14853 }
14854
14855 /* Initialize ex9 hash table. */
14856
14857 int
14858 nds32_elf_ex9_init (void)
14859 {
14860 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14861 sizeof (struct elf_nds32_code_hash_entry),
14862 1023))
14863 {
14864 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14865 return FALSE;
14866 }
14867 return TRUE;
14868 }
14869
14870 /* Predict how many bytes will be relaxed with ex9 and ifc. */
14871
14872 static void
14873 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14874 {
14875 struct elf_nds32_insn_times_entry *ex9_insn;
14876 struct elf_nds32_insn_times_entry *temp;
14877 int target_optimize;
14878 struct elf_nds32_link_hash_table *table;
14879
14880 if (ex9_insn_head == NULL)
14881 return;
14882
14883 table = nds32_elf_hash_table (info);
14884 target_optimize = table->target_optimize;
14885 ex9_insn = ex9_insn_head;
14886 while (ex9_insn)
14887 {
14888 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14889 temp = ex9_insn;
14890 ex9_insn = ex9_insn->next;
14891 free (temp);
14892 }
14893 ex9_insn_head = NULL;
14894
14895 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14896 {
14897 /* Examine ifc reduce size. */
14898 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14899 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14900 int size = 0;
14901
14902 while (ifc_ent)
14903 {
14904 if (ifc_ent->enable == 0)
14905 {
14906 /* Not ifc yet. */
14907 irel_ptr = ifc_ent->irel_head;
14908 while (irel_ptr)
14909 {
14910 size += 2;
14911 irel_ptr = irel_ptr->next;
14912 }
14913 }
14914 size -= 2;
14915 ifc_ent = ifc_ent->next;
14916 }
14917 ex9_relax_size += size;
14918 }
14919 }
14920
14921 /* Finish ex9 table. */
14922
14923 void
14924 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14925 {
14926 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14927 nds32_elf_order_insn_times (link_info);
14928 nds32_elf_ex9_total_relax (link_info);
14929 /* Traverse the hash table and count its times. */
14930 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14931 nds32_elf_order_insn_times (link_info);
14932 nds32_elf_ex9_build_itable (link_info);
14933 }
14934
14935 /* Relocate the entries in ex9 table. */
14936
14937 static bfd_vma
14938 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14939 struct bfd_link_info *link_info)
14940 {
14941 Elf_Internal_Sym *isym = NULL;
14942 bfd_vma relocation = -1;
14943 struct elf_link_hash_entry *h;
14944
14945 if (ptr->m_list != NULL)
14946 {
14947 /* Global symbol. */
14948 h = ptr->m_list->h_list->h;
14949 if ((h->root.type == bfd_link_hash_defined
14950 || h->root.type == bfd_link_hash_defweak)
14951 && h->root.u.def.section != NULL
14952 && h->root.u.def.section->output_section != NULL)
14953 {
14954
14955 relocation = h->root.u.def.value +
14956 h->root.u.def.section->output_section->vma +
14957 h->root.u.def.section->output_offset;
14958 relocation += ptr->m_list->irel->r_addend;
14959 }
14960 else
14961 relocation = 0;
14962 }
14963 else if (ptr->sec !=NULL)
14964 {
14965 /* Local symbol. */
14966 Elf_Internal_Sym sym;
14967 asection *sec = NULL;
14968 asection isec;
14969 asection *isec_ptr = &isec;
14970 Elf_Internal_Rela irel_backup = *(ptr->irel);
14971 asection *sec_backup = ptr->sec;
14972 bfd *abfd = ptr->sec->owner;
14973
14974 if (!nds32_get_local_syms (abfd, sec, &isym))
14975 return FALSE;
14976 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14977
14978 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14979 if (sec != NULL)
14980 *isec_ptr = *sec;
14981 sym = *isym;
14982
14983 /* The purpose is same as elf_link_input_bfd. */
14984 if (isec_ptr != NULL
14985 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14986 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14987 {
14988 sym.st_value =
14989 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14990 elf_section_data (isec_ptr)->sec_info,
14991 isym->st_value);
14992 }
14993 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14994 &ptr->sec, ptr->irel);
14995 if (ptr->irel != NULL)
14996 relocation += ptr->irel->r_addend;
14997
14998 /* Restore origin value since there may be some insntructions that
14999 could not be replaced with ex9.it. */
15000 *(ptr->irel) = irel_backup;
15001 ptr->sec = sec_backup;
15002 }
15003
15004 return relocation;
15005 }
15006
15007 /* Import ex9 table and build list. */
15008
15009 void
15010 nds32_elf_ex9_import_table (struct bfd_link_info *info)
15011 {
15012 int num = 0;
15013 bfd_byte *contents;
15014 unsigned long insn;
15015 FILE *ex9_import_file;
15016 int update_ex9_table;
15017 struct elf_nds32_link_hash_table *table;
15018
15019 table = nds32_elf_hash_table (info);
15020 ex9_import_file = table->ex9_import_file;
15021 rewind (table->ex9_import_file);
15022
15023 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15024
15025 /* Read instructions from the input file and build the list. */
15026 while (!feof (ex9_import_file))
15027 {
15028 char *code;
15029 struct elf_nds32_insn_times_entry *ptr;
15030 size_t nread;
15031
15032 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
15033 /* Ignore the final byte 0x0a. */
15034 if (nread < 1)
15035 break;
15036 insn = bfd_getb32 (contents);
15037 code = bfd_malloc (sizeof (char) * 9);
15038 snprintf (code, 9, "%08lx", insn);
15039 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15040 ptr->string = code;
15041 ptr->order = num;
15042 ptr->times = -1;
15043 ptr->sec = NULL;
15044 ptr->m_list = NULL;
15045 ptr->rel_backup.r_offset = 0;
15046 ptr->rel_backup.r_info = 0;
15047 ptr->rel_backup.r_addend = 0;
15048 ptr->irel = NULL;
15049 ptr->next = NULL;
15050 nds32_elf_ex9_insert_entry (ptr);
15051 num++;
15052 }
15053
15054 update_ex9_table = table->update_ex9_table;
15055 if (update_ex9_table == 1)
15056 {
15057 /* It has to consider of sethi need to use multiple page
15058 but it not be done yet. */
15059 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15060 nds32_elf_order_insn_times (info);
15061 }
15062 }
15063
15064 /* Export ex9 table. */
15065
15066 static void
15067 nds32_elf_ex9_export (struct bfd_link_info *info,
15068 bfd_byte *contents, int size)
15069 {
15070 FILE *ex9_export_file;
15071 struct elf_nds32_link_hash_table *table;
15072
15073 table = nds32_elf_hash_table (info);
15074 ex9_export_file = table->ex9_export_file;
15075 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15076 fclose (ex9_export_file);
15077 }
15078
15079 /* Adjust relocations of J and JAL in ex9.itable.
15080 Export ex9 table. */
15081
15082 static void
15083 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15084 {
15085 asection *table_sec = NULL;
15086 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15087 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15088 bfd *it_abfd;
15089 uint32_t insn, insn_with_reg, source_insn;
15090 bfd_byte *contents = NULL, *source_contents = NULL;
15091 int size = 0;
15092 bfd_vma gp;
15093 int shift, update_ex9_table, offset = 0;
15094 reloc_howto_type *howto = NULL;
15095 Elf_Internal_Rela rel_backup;
15096 unsigned short insn_ex9;
15097 struct elf_nds32_link_hash_table *table;
15098 FILE *ex9_export_file;
15099 static bfd_boolean done = FALSE;
15100
15101 if (done)
15102 return;
15103
15104 done = TRUE;
15105
15106 table = nds32_elf_hash_table (link_info);
15107 if (table)
15108 table->relax_status |= NDS32_RELAX_EX9_DONE;
15109
15110
15111 update_ex9_table = table->update_ex9_table;
15112 /* Generated ex9.itable exactly. */
15113 if (update_ex9_table == 0)
15114 {
15115 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
15116 it_abfd = it_abfd->link.next)
15117 {
15118 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15119 if (table_sec != NULL)
15120 break;
15121 }
15122
15123 if (table_sec != NULL)
15124 {
15125 bfd *output_bfd;
15126
15127 output_bfd = table_sec->output_section->owner;
15128 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15129 if (table_sec->size == 0)
15130 return;
15131
15132 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
15133 return;
15134 }
15135 }
15136 else
15137 {
15138 /* Set gp. */
15139 bfd *output_bfd;
15140
15141 output_bfd = link_info->input_bfds->sections->output_section->owner;
15142 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15143 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15144 }
15145
15146 /* Relocate instruction. */
15147 while (ex9_insn)
15148 {
15149 bfd_vma relocation, min_relocation = 0xffffffff;
15150
15151 insn = strtol (ex9_insn->string, NULL, 16);
15152 insn_with_reg = 0;
15153 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15154 {
15155 if (ex9_insn->m_list)
15156 rel_backup = ex9_insn->m_list->rel_backup;
15157 else
15158 rel_backup = ex9_insn->rel_backup;
15159
15160 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15161 howto =
15162 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15163 (rel_backup.r_info));
15164 shift = howto->rightshift;
15165 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15166 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15167 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15168 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15169 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15170 {
15171 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15172 insn =
15173 insn_with_reg | ((relocation >> shift) &
15174 nds32_elf_irel_mask (&rel_backup));
15175 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15176 }
15177 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15178 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15179 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15180 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15181 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15182 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15183 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15184 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15185 {
15186 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15187 insn =
15188 insn_with_reg | (((relocation - gp) >> shift) &
15189 nds32_elf_irel_mask (&rel_backup));
15190 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15191 }
15192 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15193 {
15194 /* Sethi may be multiple entry for one insn. */
15195 if (ex9_insn->next && ex9_insn->m_list
15196 && ex9_insn->m_list == ex9_insn->next->m_list)
15197 {
15198 struct elf_link_hash_entry_mul_list *m_list;
15199 struct elf_nds32_ex9_refix *fix_ptr;
15200 struct elf_link_hash_entry *h;
15201
15202 temp_ptr = ex9_insn;
15203 temp_ptr2 = ex9_insn;
15204 m_list = ex9_insn->m_list;
15205 while (m_list)
15206 {
15207 h = m_list->h_list->h;
15208 relocation = h->root.u.def.value +
15209 h->root.u.def.section->output_section->vma +
15210 h->root.u.def.section->output_offset;
15211 relocation += m_list->irel->r_addend;
15212
15213 if (relocation < min_relocation)
15214 min_relocation = relocation;
15215 m_list = m_list->next;
15216 }
15217 relocation = min_relocation;
15218
15219 /* Put insntruction into ex9 table. */
15220 insn = insn_with_reg
15221 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15222 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15223 relocation = relocation + 0x1000; /* hi20 */
15224
15225 while (ex9_insn->next && ex9_insn->m_list
15226 && ex9_insn->m_list == ex9_insn->next->m_list)
15227 {
15228 /* Multiple sethi. */
15229 ex9_insn = ex9_insn->next;
15230 size += 4;
15231 insn =
15232 insn_with_reg | ((relocation >> shift) &
15233 nds32_elf_irel_mask (&rel_backup));
15234 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15235 relocation = relocation + 0x1000; /* hi20 */
15236 }
15237
15238 fix_ptr = ex9_refix_head;
15239 while (fix_ptr)
15240 {
15241 /* Fix ex9 insn. */
15242 /* temp_ptr2 points to the head of multiple sethi. */
15243 temp_ptr = temp_ptr2;
15244 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15245 {
15246 fix_ptr = fix_ptr->next;
15247 }
15248 if (fix_ptr->order != temp_ptr->order)
15249 break;
15250
15251 /* Set source insn. */
15252 relocation =
15253 fix_ptr->h->root.u.def.value +
15254 fix_ptr->h->root.u.def.section->output_section->vma +
15255 fix_ptr->h->root.u.def.section->output_offset;
15256 relocation += fix_ptr->irel->r_addend;
15257 /* sethi imm is imm20s. */
15258 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15259
15260 while (temp_ptr)
15261 {
15262 /* Match entry and source code. */
15263 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15264 if (insn == source_insn)
15265 {
15266 /* Fix the ex9 insn. */
15267 if (temp_ptr->order != fix_ptr->order)
15268 {
15269 if (!nds32_get_section_contents
15270 (fix_ptr->sec->owner, fix_ptr->sec,
15271 &source_contents, TRUE))
15272 (*_bfd_error_handler)
15273 (_("Linker: error cannot fixed ex9 relocation \n"));
15274 if (temp_ptr->order < 32)
15275 insn_ex9 = INSN_EX9_IT_2;
15276 else
15277 insn_ex9 = INSN_EX9_IT_1;
15278 insn_ex9 = insn_ex9 | temp_ptr->order;
15279 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15280 }
15281 break;
15282 }
15283 else
15284 {
15285 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15286 (*_bfd_error_handler)
15287 (_("Linker: error cannot fixed ex9 relocation \n"));
15288 else
15289 temp_ptr = temp_ptr->next;
15290 }
15291 }
15292 fix_ptr = fix_ptr->next;
15293 }
15294 }
15295 else
15296 {
15297 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15298 insn = insn_with_reg
15299 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15300 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15301 }
15302 }
15303 }
15304 else
15305 {
15306 /* Insn without relocation does not have to be fixed
15307 if need to update export table. */
15308 if (update_ex9_table == 1)
15309 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15310 }
15311 ex9_insn = ex9_insn->next;
15312 size += 4;
15313 }
15314
15315 ex9_export_file = table->ex9_export_file;
15316 if (ex9_export_file != NULL)
15317 nds32_elf_ex9_export (link_info, contents, table_sec->size);
15318 else if (update_ex9_table == 1)
15319 {
15320 table->ex9_export_file = table->ex9_import_file;
15321 rewind (table->ex9_export_file);
15322 nds32_elf_ex9_export (link_info, contents, size);
15323 }
15324 }
15325
15326 /* Generate ex9 hash table. */
15327
15328 static bfd_boolean
15329 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15330 struct bfd_link_info *link_info)
15331 {
15332 Elf_Internal_Rela *internal_relocs;
15333 Elf_Internal_Rela *irelend;
15334 Elf_Internal_Rela *irel;
15335 Elf_Internal_Rela *jrel;
15336 Elf_Internal_Rela rel_backup;
15337 Elf_Internal_Shdr *symtab_hdr;
15338 Elf_Internal_Sym *isym = NULL;
15339 asection *isec;
15340 struct elf_link_hash_entry **sym_hashes;
15341 bfd_byte *contents = NULL;
15342 bfd_vma off = 0;
15343 unsigned long r_symndx;
15344 uint32_t insn, insn_with_reg;
15345 struct elf_link_hash_entry *h;
15346 int data_flag, shift, align;
15347 bfd_vma relocation;
15348 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15349 reloc_howto_type *howto = NULL;
15350
15351 sym_hashes = elf_sym_hashes (abfd);
15352 /* Load section instructions, relocations, and symbol table. */
15353 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
15354 return FALSE;
15355
15356 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15357 TRUE /* keep_memory */);
15358 irelend = internal_relocs + sec->reloc_count;
15359 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15360 if (!nds32_get_local_syms (abfd, sec, &isym))
15361 return FALSE;
15362
15363 /* Check the object if enable ex9. */
15364 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15365 R_NDS32_RELAX_ENTRY);
15366
15367 /* Check this section trigger ex9 relaxation. */
15368 if (irel == NULL
15369 || irel >= irelend
15370 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15371 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15372 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15373 return TRUE;
15374
15375 irel = internal_relocs;
15376
15377 /* Push each insn into hash table. */
15378 while (off < sec->size)
15379 {
15380 char code[10];
15381 struct elf_nds32_code_hash_entry *entry;
15382
15383 while (irel != NULL && irel < irelend && irel->r_offset < off)
15384 irel++;
15385
15386 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15387 NULL, sec, &off, contents);
15388 if (data_flag & DATA_EXIST)
15389 {
15390 /* We save the move offset in the highest byte. */
15391 off += (data_flag >> 24);
15392 continue;
15393 }
15394
15395 if (*(contents + off) & 0x80)
15396 {
15397 off += 2;
15398 }
15399 else
15400 {
15401 h = NULL;
15402 isec = NULL;
15403 jrel = NULL;
15404 rel_backup.r_info = 0;
15405 rel_backup.r_offset = 0;
15406 rel_backup.r_addend = 0;
15407 /* Load the instruction and its opcode with register for comparing. */
15408 insn = bfd_getb32 (contents + off);
15409 insn_with_reg = 0;
15410 if (irel != NULL && irel < irelend && irel->r_offset == off)
15411 {
15412 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15413 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15414 shift = howto->rightshift;
15415 align = (1 << shift) - 1;
15416 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15417 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15418 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15419 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15420 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15421 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15422 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15423 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15424 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15425 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15426 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15427 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15428 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15429 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15430 {
15431 r_symndx = ELF32_R_SYM (irel->r_info);
15432 jrel = irel;
15433 rel_backup = *irel;
15434 if (r_symndx < symtab_hdr->sh_info)
15435 {
15436 /* Local symbol. */
15437 int shndx = isym[r_symndx].st_shndx;
15438
15439 bfd_vma st_value = (isym + r_symndx)->st_value;
15440 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15441 relocation = (isec->output_section->vma + isec->output_offset
15442 + st_value + irel->r_addend);
15443 }
15444 else
15445 {
15446 /* External symbol. */
15447 bfd_boolean warned ATTRIBUTE_UNUSED;
15448 bfd_boolean ignored ATTRIBUTE_UNUSED;
15449 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15450 asection *sym_sec;
15451
15452 /* Maybe there is a better way to get h and relocation */
15453 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15454 r_symndx, symtab_hdr, sym_hashes,
15455 h, sym_sec, relocation,
15456 unresolved_reloc, warned, ignored);
15457 relocation += irel->r_addend;
15458 if ((h->root.type != bfd_link_hash_defined
15459 && h->root.type != bfd_link_hash_defweak)
15460 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15461 {
15462 off += 4;
15463 continue;
15464 }
15465 }
15466
15467 /* Check for gp relative instruction alignment. */
15468 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15469 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15470 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15471 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15472 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15473 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15474 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15475 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15476 {
15477 bfd_vma gp;
15478 bfd *output_bfd = sec->output_section->owner;
15479 bfd_reloc_status_type r;
15480
15481 /* If the symbol is in the abs section, the out_bfd will be null.
15482 This happens when the relocation has a symbol@GOTOFF. */
15483 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15484 if (r != bfd_reloc_ok)
15485 {
15486 off += 4;
15487 continue;
15488 }
15489
15490 relocation -= gp;
15491
15492 /* Make sure alignment is correct. */
15493 if (relocation & align)
15494 {
15495 /* Incorrect alignment. */
15496 (*_bfd_error_handler)
15497 (_("%s: warning: unaligned small data access. "
15498 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15499 bfd_get_filename (abfd), irel->r_offset,
15500 irel->r_info, irel->r_addend, relocation, align);
15501 off += 4;
15502 continue;
15503 }
15504 }
15505
15506 insn = insn_with_reg
15507 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15508 }
15509 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15510 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15511 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15512 {
15513 /* These relocations do not have to relocate contens, so it can
15514 be regard as instruction without relocation. */
15515 }
15516 else
15517 {
15518 off += 4;
15519 continue;
15520 }
15521 }
15522
15523 snprintf (code, sizeof (code), "%08x", insn);
15524 /* Copy "code". */
15525 entry = (struct elf_nds32_code_hash_entry*)
15526 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15527 if (entry == NULL)
15528 {
15529 (*_bfd_error_handler)
15530 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15531 return FALSE;
15532 }
15533 if (h)
15534 {
15535 if (h->root.type == bfd_link_hash_undefined)
15536 return TRUE;
15537 /* Global symbol. */
15538 /* In order to do sethi with different symbol but same value. */
15539 if (entry->m_list == NULL)
15540 {
15541 struct elf_link_hash_entry_mul_list *m_list_new;
15542 struct elf_link_hash_entry_list *h_list_new;
15543
15544 m_list_new = (struct elf_link_hash_entry_mul_list *)
15545 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15546 h_list_new = (struct elf_link_hash_entry_list *)
15547 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15548 entry->m_list = m_list_new;
15549 m_list_new->h_list = h_list_new;
15550 m_list_new->rel_backup = rel_backup;
15551 m_list_new->times = 1;
15552 m_list_new->irel = jrel;
15553 m_list_new->next = NULL;
15554 h_list_new->h = h;
15555 h_list_new->next = NULL;
15556 }
15557 else
15558 {
15559 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15560 struct elf_link_hash_entry_list *h_list;
15561
15562 while (m_list)
15563 {
15564 /* Build the different symbols that point to the same address. */
15565 h_list = m_list->h_list;
15566 if (h_list->h->root.u.def.value == h->root.u.def.value
15567 && h_list->h->root.u.def.section->output_section->vma
15568 == h->root.u.def.section->output_section->vma
15569 && h_list->h->root.u.def.section->output_offset
15570 == h->root.u.def.section->output_offset
15571 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15572 {
15573 m_list->times++;
15574 m_list->irel = jrel;
15575 while (h_list->h != h && h_list->next)
15576 h_list = h_list->next;
15577 if (h_list->h != h)
15578 {
15579 struct elf_link_hash_entry_list *h_list_new;
15580
15581 h_list_new = (struct elf_link_hash_entry_list *)
15582 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15583 h_list->next = h_list_new;
15584 h_list_new->h = h;
15585 h_list_new->next = NULL;
15586 }
15587 break;
15588 }
15589 /* The sethi case may have different address but the
15590 hi20 is the same. */
15591 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15592 && m_list->next == NULL)
15593 {
15594 struct elf_link_hash_entry_mul_list *m_list_new;
15595 struct elf_link_hash_entry_list *h_list_new;
15596
15597 m_list_new = (struct elf_link_hash_entry_mul_list *)
15598 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15599 h_list_new = (struct elf_link_hash_entry_list *)
15600 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15601 m_list->next = m_list_new;
15602 m_list_new->h_list = h_list_new;
15603 m_list_new->rel_backup = rel_backup;
15604 m_list_new->times = 1;
15605 m_list_new->irel = jrel;
15606 m_list_new->next = NULL;
15607 h_list_new->h = h;
15608 h_list_new->next = NULL;
15609 break;
15610 }
15611 m_list = m_list->next;
15612 }
15613 if (!m_list)
15614 {
15615 off += 4;
15616 continue;
15617 }
15618 }
15619 }
15620 else
15621 {
15622 /* Local symbol and insn without relocation*/
15623 entry->times++;
15624 entry->rel_backup = rel_backup;
15625 }
15626
15627 /* Use in sethi insn with constant and global symbol in same format. */
15628 if (!jrel)
15629 entry->const_insn = 1;
15630 else
15631 entry->irel = jrel;
15632 entry->sec = isec;
15633 off += 4;
15634 }
15635 }
15636 return TRUE;
15637 }
15638
15639 /* Set the _ITB_BASE, and point it to ex9 table. */
15640
15641 bfd_boolean
15642 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15643 {
15644 bfd *abfd;
15645 asection *sec;
15646 bfd *output_bfd = NULL;
15647 struct bfd_link_hash_entry *bh = NULL;
15648
15649 if (is_ITB_BASE_set == 1)
15650 return TRUE;
15651
15652 is_ITB_BASE_set = 1;
15653
15654 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15655
15656 if (bh && (bh->type == bfd_link_hash_defined
15657 || bh->type == bfd_link_hash_defweak))
15658 return TRUE;
15659
15660 for (abfd = link_info->input_bfds; abfd != NULL;
15661 abfd = abfd->link.next)
15662 {
15663 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15664 if (sec != NULL)
15665 {
15666 output_bfd = sec->output_section->owner;
15667 break;
15668 }
15669 }
15670 if (output_bfd == NULL)
15671 {
15672 output_bfd = link_info->output_bfd;
15673 if (output_bfd->sections == NULL)
15674 return TRUE;
15675 else
15676 sec = bfd_abs_section_ptr;
15677 }
15678 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15679 FALSE, FALSE, TRUE);
15680 return (_bfd_generic_link_add_one_symbol
15681 (link_info, output_bfd, "_ITB_BASE_",
15682 BSF_GLOBAL | BSF_WEAK, sec, 0,
15683 (const char *) NULL, FALSE, get_elf_backend_data
15684 (output_bfd)->collect, &bh));
15685 } /* End EX9.IT */
15686 \f
15687
15688 #define ELF_ARCH bfd_arch_nds32
15689 #define ELF_MACHINE_CODE EM_NDS32
15690 #define ELF_MAXPAGESIZE 0x1000
15691 #define ELF_TARGET_ID NDS32_ELF_DATA
15692
15693 #define TARGET_BIG_SYM nds32_elf32_be_vec
15694 #define TARGET_BIG_NAME "elf32-nds32be"
15695 #define TARGET_LITTLE_SYM nds32_elf32_le_vec
15696 #define TARGET_LITTLE_NAME "elf32-nds32le"
15697
15698 #define elf_info_to_howto nds32_info_to_howto
15699 #define elf_info_to_howto_rel nds32_info_to_howto_rel
15700
15701 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15702 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15703 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15704 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15705 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15706
15707 #define bfd_elf32_mkobject nds32_elf_mkobject
15708 #define elf_backend_action_discarded nds32_elf_action_discarded
15709 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15710 #define elf_backend_check_relocs nds32_elf_check_relocs
15711 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15712 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15713 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15714 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15715 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15716 #define elf_backend_relocate_section nds32_elf_relocate_section
15717 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15718 #define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15719 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15720 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15721 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15722 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15723 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15724 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15725 #define elf_backend_object_p nds32_elf_object_p
15726 #define elf_backend_final_write_processing nds32_elf_final_write_processing
15727 #define elf_backend_special_sections nds32_elf_special_sections
15728 #define bfd_elf32_bfd_get_relocated_section_contents \
15729 nds32_elf_get_relocated_section_contents
15730
15731 #define elf_backend_can_gc_sections 1
15732 #define elf_backend_can_refcount 1
15733 #define elf_backend_want_got_plt 1
15734 #define elf_backend_plt_readonly 1
15735 #define elf_backend_want_plt_sym 0
15736 #define elf_backend_got_header_size 12
15737 #define elf_backend_may_use_rel_p 1
15738 #define elf_backend_default_use_rela_p 1
15739 #define elf_backend_may_use_rela_p 1
15740
15741 #include "elf32-target.h"
15742
15743 #undef ELF_MAXPAGESIZE
15744 #define ELF_MAXPAGESIZE 0x2000
15745
15746 #undef TARGET_BIG_SYM
15747 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec
15748 #undef TARGET_BIG_NAME
15749 #define TARGET_BIG_NAME "elf32-nds32be-linux"
15750 #undef TARGET_LITTLE_SYM
15751 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
15752 #undef TARGET_LITTLE_NAME
15753 #define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15754 #undef elf32_bed
15755 #define elf32_bed elf32_nds32_lin_bed
15756
15757 #include "elf32-target.h"
GDB Binutils - Deliverables
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