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[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "sysdep.h"
21 #include "bfd.h"
22 #include "bfd_stdint.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rl78.h"
26 #include "libiberty.h"
27
28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
35 asection *, bfd *, char **);
36
37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */
38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
41
42 /* Note that the relocations around 0x7f are internal to this file;
43 feel free to move them as needed to avoid conflicts with published
44 relocation numbers. */
45
46 static reloc_howto_type rl78_elf_howto_table [] =
47 {
48 RL78REL (NONE, 3, 0, 0, dont, FALSE),
49 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
51 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
54 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
67
68 EMPTY_HOWTO (0x13),
69 EMPTY_HOWTO (0x14),
70 EMPTY_HOWTO (0x15),
71 EMPTY_HOWTO (0x16),
72 EMPTY_HOWTO (0x17),
73 EMPTY_HOWTO (0x18),
74 EMPTY_HOWTO (0x19),
75 EMPTY_HOWTO (0x1a),
76 EMPTY_HOWTO (0x1b),
77 EMPTY_HOWTO (0x1c),
78 EMPTY_HOWTO (0x1d),
79 EMPTY_HOWTO (0x1e),
80 EMPTY_HOWTO (0x1f),
81
82 EMPTY_HOWTO (0x20),
83 EMPTY_HOWTO (0x21),
84 EMPTY_HOWTO (0x22),
85 EMPTY_HOWTO (0x23),
86 EMPTY_HOWTO (0x24),
87 EMPTY_HOWTO (0x25),
88 EMPTY_HOWTO (0x26),
89 EMPTY_HOWTO (0x27),
90 EMPTY_HOWTO (0x28),
91 EMPTY_HOWTO (0x29),
92 EMPTY_HOWTO (0x2a),
93 EMPTY_HOWTO (0x2b),
94 EMPTY_HOWTO (0x2c),
95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
96
97 EMPTY_HOWTO (0x2e),
98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
99 EMPTY_HOWTO (0x30),
100 EMPTY_HOWTO (0x31),
101 EMPTY_HOWTO (0x32),
102 EMPTY_HOWTO (0x33),
103 EMPTY_HOWTO (0x34),
104 EMPTY_HOWTO (0x35),
105 EMPTY_HOWTO (0x36),
106 EMPTY_HOWTO (0x37),
107 EMPTY_HOWTO (0x38),
108 EMPTY_HOWTO (0x39),
109 EMPTY_HOWTO (0x3a),
110 EMPTY_HOWTO (0x3b),
111 EMPTY_HOWTO (0x3c),
112 EMPTY_HOWTO (0x3d),
113 EMPTY_HOWTO (0x3e),
114 EMPTY_HOWTO (0x3f),
115 EMPTY_HOWTO (0x40),
116
117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
134
135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
136
137 EMPTY_HOWTO (0x52),
138 EMPTY_HOWTO (0x53),
139 EMPTY_HOWTO (0x54),
140 EMPTY_HOWTO (0x55),
141 EMPTY_HOWTO (0x56),
142 EMPTY_HOWTO (0x57),
143 EMPTY_HOWTO (0x58),
144 EMPTY_HOWTO (0x59),
145 EMPTY_HOWTO (0x5a),
146 EMPTY_HOWTO (0x5b),
147 EMPTY_HOWTO (0x5c),
148 EMPTY_HOWTO (0x5d),
149 EMPTY_HOWTO (0x5e),
150 EMPTY_HOWTO (0x5f),
151 EMPTY_HOWTO (0x60),
152 EMPTY_HOWTO (0x61),
153 EMPTY_HOWTO (0x62),
154 EMPTY_HOWTO (0x63),
155 EMPTY_HOWTO (0x64),
156 EMPTY_HOWTO (0x65),
157 EMPTY_HOWTO (0x66),
158 EMPTY_HOWTO (0x67),
159 EMPTY_HOWTO (0x68),
160 EMPTY_HOWTO (0x69),
161 EMPTY_HOWTO (0x6a),
162 EMPTY_HOWTO (0x6b),
163 EMPTY_HOWTO (0x6c),
164 EMPTY_HOWTO (0x6d),
165 EMPTY_HOWTO (0x6e),
166 EMPTY_HOWTO (0x6f),
167 EMPTY_HOWTO (0x70),
168 EMPTY_HOWTO (0x71),
169 EMPTY_HOWTO (0x72),
170 EMPTY_HOWTO (0x73),
171 EMPTY_HOWTO (0x74),
172 EMPTY_HOWTO (0x75),
173 EMPTY_HOWTO (0x76),
174 EMPTY_HOWTO (0x77),
175
176 EMPTY_HOWTO (0x78),
177 EMPTY_HOWTO (0x79),
178 EMPTY_HOWTO (0x7a),
179 EMPTY_HOWTO (0x7b),
180 EMPTY_HOWTO (0x7c),
181 EMPTY_HOWTO (0x7d),
182 EMPTY_HOWTO (0x7e),
183 EMPTY_HOWTO (0x7f),
184
185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
194 EMPTY_HOWTO (0x89),
195 EMPTY_HOWTO (0x8a),
196 EMPTY_HOWTO (0x8b),
197 EMPTY_HOWTO (0x8c),
198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
199 EMPTY_HOWTO (0x8e),
200 EMPTY_HOWTO (0x8f),
201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
208 };
209 \f
210 /* Map BFD reloc types to RL78 ELF reloc types. */
211
212 struct rl78_reloc_map
213 {
214 bfd_reloc_code_real_type bfd_reloc_val;
215 unsigned int rl78_reloc_val;
216 };
217
218 static const struct rl78_reloc_map rl78_reloc_map [] =
219 {
220 { BFD_RELOC_NONE, R_RL78_NONE },
221 { BFD_RELOC_8, R_RL78_DIR8S },
222 { BFD_RELOC_16, R_RL78_DIR16S },
223 { BFD_RELOC_24, R_RL78_DIR24S },
224 { BFD_RELOC_32, R_RL78_DIR32 },
225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
232 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
247 };
248
249 static reloc_howto_type *
250 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
251 bfd_reloc_code_real_type code)
252 {
253 unsigned int i;
254
255 if (code == BFD_RELOC_RL78_32_OP)
256 return rl78_elf_howto_table + R_RL78_DIR32;
257
258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
259 if (rl78_reloc_map [i].bfd_reloc_val == code)
260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
261
262 return NULL;
263 }
264
265 static reloc_howto_type *
266 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
267 {
268 unsigned int i;
269
270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
271 if (rl78_elf_howto_table[i].name != NULL
272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
273 return rl78_elf_howto_table + i;
274
275 return NULL;
276 }
277
278 /* Set the howto pointer for an RL78 ELF reloc. */
279
280 static void
281 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
282 arelent * cache_ptr,
283 Elf_Internal_Rela * dst)
284 {
285 unsigned int r_type;
286
287 r_type = ELF32_R_TYPE (dst->r_info);
288 if (r_type >= (unsigned int) R_RL78_max)
289 {
290 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
291 r_type = 0;
292 }
293 cache_ptr->howto = rl78_elf_howto_table + r_type;
294 }
295 \f
296 static bfd_vma
297 get_symbol_value (const char * name,
298 struct bfd_link_info * info,
299 bfd * input_bfd,
300 asection * input_section,
301 int offset)
302 {
303 struct bfd_link_hash_entry * h;
304
305 if (info == NULL)
306 return 0;
307
308 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
309
310 if (h == NULL
311 || (h->type != bfd_link_hash_defined
312 && h->type != bfd_link_hash_defweak))
313 {
314 (*info->callbacks->undefined_symbol)
315 (info, name, input_bfd, input_section, offset, TRUE);
316 return 0;
317 }
318
319 return (h->u.def.value
320 + h->u.def.section->output_section->vma
321 + h->u.def.section->output_offset);
322 }
323
324 static bfd_vma
325 get_romstart (struct bfd_link_info * info,
326 bfd * abfd,
327 asection * sec,
328 int offset)
329 {
330 static bfd_boolean cached = FALSE;
331 static bfd_vma cached_value = 0;
332
333 if (!cached)
334 {
335 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
336 cached = TRUE;
337 }
338 return cached_value;
339 }
340
341 static bfd_vma
342 get_ramstart (struct bfd_link_info * info,
343 bfd * abfd,
344 asection * sec,
345 int offset)
346 {
347 static bfd_boolean cached = FALSE;
348 static bfd_vma cached_value = 0;
349
350 if (!cached)
351 {
352 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
353 cached = TRUE;
354 }
355 return cached_value;
356 }
357
358 #define NUM_STACK_ENTRIES 16
359 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
360 static unsigned int rl78_stack_top;
361
362 #define RL78_STACK_PUSH(val) \
363 do \
364 { \
365 if (rl78_stack_top < NUM_STACK_ENTRIES) \
366 rl78_stack [rl78_stack_top ++] = (val); \
367 else \
368 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
369 } \
370 while (0)
371
372 #define RL78_STACK_POP(dest) \
373 do \
374 { \
375 if (rl78_stack_top > 0) \
376 (dest) = rl78_stack [-- rl78_stack_top];\
377 else \
378 { \
379 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
380 (dest) = 0; \
381 } \
382 } \
383 while (0)
384
385 /* Special handling for RL78 complex relocs. Returns the
386 value of the reloc, or 0 for relocs which do not generate
387 a result. SYMVAL is the value of the symbol for relocs
388 which use a symbolic argument. */
389
390 static bfd_vma
391 rl78_compute_complex_reloc (unsigned long r_type,
392 bfd_vma symval,
393 asection * input_section)
394 {
395 int32_t tmp1, tmp2;
396 bfd_vma relocation;
397
398 switch (r_type)
399 {
400 default:
401 return 0;
402
403 case R_RL78_ABS24S_PCREL:
404 case R_RL78_ABS16S_PCREL:
405 case R_RL78_ABS8S_PCREL:
406 RL78_STACK_POP (relocation);
407 relocation -= input_section->output_section->vma + input_section->output_offset;
408 return relocation;
409
410 case R_RL78_ABS32:
411 case R_RL78_ABS32_REV:
412 case R_RL78_ABS16:
413 case R_RL78_ABS16_REV:
414 case R_RL78_ABS16S:
415 case R_RL78_ABS16U:
416 case R_RL78_ABS8:
417 case R_RL78_ABS8U:
418 case R_RL78_ABS8S:
419 RL78_STACK_POP (relocation);
420 return relocation;
421
422 case R_RL78_ABS16UL:
423 case R_RL78_ABS8UL:
424 RL78_STACK_POP (relocation);
425 return relocation >> 2;
426
427 case R_RL78_ABS16UW:
428 case R_RL78_ABS8UW:
429 RL78_STACK_POP (relocation);
430 return relocation >> 1;
431
432 /* The rest of the relocs compute values and then push them onto the stack. */
433 case R_RL78_OPramtop:
434 case R_RL78_OPromtop:
435 case R_RL78_SYM:
436 RL78_STACK_PUSH (symval);
437 return 0;
438
439 case R_RL78_OPneg:
440 RL78_STACK_POP (tmp1);
441 tmp1 = - tmp1;
442 RL78_STACK_PUSH (tmp1);
443 return 0;
444
445 case R_RL78_OPadd:
446 RL78_STACK_POP (tmp2);
447 RL78_STACK_POP (tmp1);
448 tmp1 += tmp2;
449 RL78_STACK_PUSH (tmp1);
450 return 0;
451
452 case R_RL78_OPsub:
453 /* For the expression "A - B", the assembler pushes A,
454 then B, then OPSUB. So the first op we pop is B, not A. */
455 RL78_STACK_POP (tmp2); /* B */
456 RL78_STACK_POP (tmp1); /* A */
457 tmp1 -= tmp2; /* A - B */
458 RL78_STACK_PUSH (tmp1);
459 return 0;
460
461 case R_RL78_OPmul:
462 RL78_STACK_POP (tmp2);
463 RL78_STACK_POP (tmp1);
464 tmp1 *= tmp2;
465 RL78_STACK_PUSH (tmp1);
466 return 0;
467
468 case R_RL78_OPdiv:
469 RL78_STACK_POP (tmp2);
470 RL78_STACK_POP (tmp1);
471 tmp1 /= tmp2;
472 RL78_STACK_PUSH (tmp1);
473 return 0;
474
475 case R_RL78_OPshla:
476 RL78_STACK_POP (tmp2);
477 RL78_STACK_POP (tmp1);
478 tmp1 <<= tmp2;
479 RL78_STACK_PUSH (tmp1);
480 return 0;
481
482 case R_RL78_OPshra:
483 RL78_STACK_POP (tmp2);
484 RL78_STACK_POP (tmp1);
485 tmp1 >>= tmp2;
486 RL78_STACK_PUSH (tmp1);
487 return 0;
488
489 case R_RL78_OPsctsize:
490 RL78_STACK_PUSH (input_section->size);
491 return 0;
492
493 case R_RL78_OPscttop:
494 RL78_STACK_PUSH (input_section->output_section->vma);
495 return 0;
496
497 case R_RL78_OPand:
498 RL78_STACK_POP (tmp2);
499 RL78_STACK_POP (tmp1);
500 tmp1 &= tmp2;
501 RL78_STACK_PUSH (tmp1);
502 return 0;
503
504 case R_RL78_OPor:
505 RL78_STACK_POP (tmp2);
506 RL78_STACK_POP (tmp1);
507 tmp1 |= tmp2;
508 RL78_STACK_PUSH (tmp1);
509 return 0;
510
511 case R_RL78_OPxor:
512 RL78_STACK_POP (tmp2);
513 RL78_STACK_POP (tmp1);
514 tmp1 ^= tmp2;
515 RL78_STACK_PUSH (tmp1);
516 return 0;
517
518 case R_RL78_OPnot:
519 RL78_STACK_POP (tmp1);
520 tmp1 = ~ tmp1;
521 RL78_STACK_PUSH (tmp1);
522 return 0;
523
524 case R_RL78_OPmod:
525 RL78_STACK_POP (tmp2);
526 RL78_STACK_POP (tmp1);
527 tmp1 %= tmp2;
528 RL78_STACK_PUSH (tmp1);
529 return 0;
530 }
531 }
532
533 #undef RL78_STACK_PUSH
534 #undef RL78_STACK_POP
535
536 #define OP(i) (contents[reloc->address + (i)])
537
538 static bfd_reloc_status_type
539 rl78_special_reloc (bfd * input_bfd,
540 arelent * reloc,
541 asymbol * symbol,
542 void * data,
543 asection * input_section,
544 bfd * output_bfd ATTRIBUTE_UNUSED,
545 char ** error_message ATTRIBUTE_UNUSED)
546 {
547 bfd_reloc_status_type r = bfd_reloc_ok;
548 bfd_vma relocation = 0;
549 unsigned long r_type = reloc->howto->type;
550 bfd_byte * contents = data;
551
552 /* If necessary, compute the symbolic value of the relocation. */
553 switch (r_type)
554 {
555 case R_RL78_SYM:
556 relocation = (symbol->value
557 + symbol->section->output_section->vma
558 + symbol->section->output_offset
559 + reloc->addend);
560 break;
561
562 case R_RL78_OPromtop:
563 relocation = get_romstart (NULL, input_bfd, input_section,
564 reloc->address);
565 break;
566
567 case R_RL78_OPramtop:
568 relocation = get_ramstart (NULL, input_bfd, input_section,
569 reloc->address);
570 break;
571 }
572
573 /* Get the value of the relocation. */
574 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
575
576 /* If the relocation alters the contents of the section then apply it now.
577 Note - since this function is called from
578 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
579 and not from the linker, we do not perform any range checking. The
580 clients who are calling us are only interested in some relocated section
581 contents, and not any linkage problems that might occur later. */
582 switch (r_type)
583 {
584 case R_RL78_ABS32:
585 OP (0) = relocation;
586 OP (1) = relocation >> 8;
587 OP (2) = relocation >> 16;
588 OP (3) = relocation >> 24;
589 break;
590
591 case R_RL78_ABS32_REV:
592 OP (3) = relocation;
593 OP (2) = relocation >> 8;
594 OP (1) = relocation >> 16;
595 OP (0) = relocation >> 24;
596 break;
597
598 case R_RL78_ABS24S_PCREL:
599 case R_RL78_ABS24S:
600 OP (0) = relocation;
601 OP (1) = relocation >> 8;
602 OP (2) = relocation >> 16;
603 break;
604
605 case R_RL78_ABS16_REV:
606 OP (1) = relocation;
607 OP (0) = relocation >> 8;
608 break;
609
610 case R_RL78_ABS16S_PCREL:
611 case R_RL78_ABS16:
612 case R_RL78_ABS16S:
613 case R_RL78_ABS16U:
614 case R_RL78_ABS16UL:
615 case R_RL78_ABS16UW:
616 OP (0) = relocation;
617 OP (1) = relocation >> 8;
618 break;
619
620 case R_RL78_ABS8S_PCREL:
621 case R_RL78_ABS8:
622 case R_RL78_ABS8U:
623 case R_RL78_ABS8UL:
624 case R_RL78_ABS8UW:
625 case R_RL78_ABS8S:
626 OP (0) = relocation;
627 break;
628
629 default:
630 break;
631 }
632
633 return r;
634 }
635
636 #undef OP
637 #define OP(i) (contents[rel->r_offset + (i)])
638
639 /* Relocate an RL78 ELF section.
640 There is some attempt to make this function usable for many architectures,
641 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
642 if only to serve as a learning tool.
643
644 The RELOCATE_SECTION function is called by the new ELF backend linker
645 to handle the relocations for a section.
646
647 The relocs are always passed as Rela structures; if the section
648 actually uses Rel structures, the r_addend field will always be
649 zero.
650
651 This function is responsible for adjusting the section contents as
652 necessary, and (if using Rela relocs and generating a relocatable
653 output file) adjusting the reloc addend as necessary.
654
655 This function does not have to worry about setting the reloc
656 address or the reloc symbol index.
657
658 LOCAL_SYMS is a pointer to the swapped in local symbols.
659
660 LOCAL_SECTIONS is an array giving the section in the input file
661 corresponding to the st_shndx field of each local symbol.
662
663 The global hash table entry for the global symbols can be found
664 via elf_sym_hashes (input_bfd).
665
666 When generating relocatable output, this function must handle
667 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
668 going to be the section symbol corresponding to the output
669 section, which means that the addend must be adjusted
670 accordingly. */
671
672 static bfd_boolean
673 rl78_elf_relocate_section
674 (bfd * output_bfd,
675 struct bfd_link_info * info,
676 bfd * input_bfd,
677 asection * input_section,
678 bfd_byte * contents,
679 Elf_Internal_Rela * relocs,
680 Elf_Internal_Sym * local_syms,
681 asection ** local_sections)
682 {
683 Elf_Internal_Shdr * symtab_hdr;
684 struct elf_link_hash_entry ** sym_hashes;
685 Elf_Internal_Rela * rel;
686 Elf_Internal_Rela * relend;
687 bfd *dynobj;
688 asection *splt;
689
690 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
691 sym_hashes = elf_sym_hashes (input_bfd);
692 relend = relocs + input_section->reloc_count;
693
694 dynobj = elf_hash_table (info)->dynobj;
695 splt = NULL;
696 if (dynobj != NULL)
697 splt = bfd_get_linker_section (dynobj, ".plt");
698
699 for (rel = relocs; rel < relend; rel ++)
700 {
701 reloc_howto_type * howto;
702 unsigned long r_symndx;
703 Elf_Internal_Sym * sym;
704 asection * sec;
705 struct elf_link_hash_entry * h;
706 bfd_vma relocation;
707 bfd_reloc_status_type r;
708 const char * name = NULL;
709 bfd_boolean unresolved_reloc = TRUE;
710 int r_type;
711
712 r_type = ELF32_R_TYPE (rel->r_info);
713 r_symndx = ELF32_R_SYM (rel->r_info);
714
715 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
716 h = NULL;
717 sym = NULL;
718 sec = NULL;
719 relocation = 0;
720
721 if (r_symndx < symtab_hdr->sh_info)
722 {
723 sym = local_syms + r_symndx;
724 sec = local_sections [r_symndx];
725 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
726
727 name = bfd_elf_string_from_elf_section
728 (input_bfd, symtab_hdr->sh_link, sym->st_name);
729 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
730 }
731 else
732 {
733 bfd_boolean warned ATTRIBUTE_UNUSED;
734 bfd_boolean ignored ATTRIBUTE_UNUSED;
735
736 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
737 r_symndx, symtab_hdr, sym_hashes, h,
738 sec, relocation, unresolved_reloc,
739 warned, ignored);
740
741 name = h->root.root.string;
742 }
743
744 if (sec != NULL && discarded_section (sec))
745 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
746 rel, 1, relend, howto, 0, contents);
747
748 if (bfd_link_relocatable (info))
749 {
750 /* This is a relocatable link. We don't have to change
751 anything, unless the reloc is against a section symbol,
752 in which case we have to adjust according to where the
753 section symbol winds up in the output section. */
754 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
755 rel->r_addend += sec->output_offset;
756 continue;
757 }
758
759 switch (ELF32_R_TYPE (rel->r_info))
760 {
761 case R_RL78_DIR16S:
762 {
763 bfd_vma *plt_offset;
764
765 if (h != NULL)
766 plt_offset = &h->plt.offset;
767 else
768 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
769
770 if (! valid_16bit_address (relocation))
771 {
772 /* If this is the first time we've processed this symbol,
773 fill in the plt entry with the correct symbol address. */
774 if ((*plt_offset & 1) == 0)
775 {
776 unsigned int x;
777
778 x = 0x000000ec; /* br !!abs24 */
779 x |= (relocation << 8) & 0xffffff00;
780 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
781 *plt_offset |= 1;
782 }
783
784 relocation = (splt->output_section->vma
785 + splt->output_offset
786 + (*plt_offset & -2));
787 if (name)
788 {
789 char *newname = bfd_malloc (strlen(name)+5);
790 strcpy (newname, name);
791 strcat(newname, ".plt");
792 _bfd_generic_link_add_one_symbol (info,
793 input_bfd,
794 newname,
795 BSF_FUNCTION | BSF_WEAK,
796 splt,
797 (*plt_offset & -2),
798 0,
799 1,
800 0,
801 0);
802 }
803 }
804 }
805 break;
806 }
807
808 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
809 /* If the symbol is undefined and weak
810 then the relocation resolves to zero. */
811 relocation = 0;
812 else
813 {
814 if (howto->pc_relative)
815 {
816 relocation -= (input_section->output_section->vma
817 + input_section->output_offset
818 + rel->r_offset);
819 relocation -= bfd_get_reloc_size (howto);
820 }
821
822 relocation += rel->r_addend;
823 }
824
825 r = bfd_reloc_ok;
826
827 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
828
829 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
830 switch (r_type)
831 {
832 case R_RL78_NONE:
833 break;
834
835 case R_RL78_RH_RELAX:
836 break;
837
838 case R_RL78_DIR8S_PCREL:
839 RANGE (-128, 127);
840 OP (0) = relocation;
841 break;
842
843 case R_RL78_DIR8S:
844 RANGE (-128, 255);
845 OP (0) = relocation;
846 break;
847
848 case R_RL78_DIR8U:
849 RANGE (0, 255);
850 OP (0) = relocation;
851 break;
852
853 case R_RL78_DIR16S_PCREL:
854 RANGE (-32768, 32767);
855 OP (0) = relocation;
856 OP (1) = relocation >> 8;
857 break;
858
859 case R_RL78_DIR16S:
860 if ((relocation & 0xf0000) == 0xf0000)
861 relocation &= 0xffff;
862 RANGE (-32768, 65535);
863 OP (0) = relocation;
864 OP (1) = relocation >> 8;
865 break;
866
867 case R_RL78_DIR16U:
868 RANGE (0, 65536);
869 OP (0) = relocation;
870 OP (1) = relocation >> 8;
871 break;
872
873 case R_RL78_DIR16:
874 RANGE (-32768, 65536);
875 OP (0) = relocation;
876 OP (1) = relocation >> 8;
877 break;
878
879 case R_RL78_DIR16_REV:
880 RANGE (-32768, 65536);
881 OP (1) = relocation;
882 OP (0) = relocation >> 8;
883 break;
884
885 case R_RL78_DIR3U_PCREL:
886 RANGE (3, 10);
887 OP (0) &= 0xf8;
888 OP (0) |= relocation & 0x07;
889 break;
890
891 case R_RL78_DIR24S_PCREL:
892 RANGE (-0x800000, 0x7fffff);
893 OP (0) = relocation;
894 OP (1) = relocation >> 8;
895 OP (2) = relocation >> 16;
896 break;
897
898 case R_RL78_DIR24S:
899 RANGE (-0x800000, 0x7fffff);
900 OP (0) = relocation;
901 OP (1) = relocation >> 8;
902 OP (2) = relocation >> 16;
903 break;
904
905 case R_RL78_DIR32:
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 OP (3) = relocation >> 24;
910 break;
911
912 case R_RL78_DIR32_REV:
913 OP (3) = relocation;
914 OP (2) = relocation >> 8;
915 OP (1) = relocation >> 16;
916 OP (0) = relocation >> 24;
917 break;
918
919 case R_RL78_RH_SFR:
920 RANGE (0xfff00, 0xfffff);
921 OP (0) = relocation & 0xff;
922 break;
923
924 case R_RL78_RH_SADDR:
925 RANGE (0xffe20, 0xfff1f);
926 OP (0) = relocation & 0xff;
927 break;
928
929 /* Complex reloc handling: */
930 case R_RL78_ABS32:
931 case R_RL78_ABS32_REV:
932 case R_RL78_ABS24S_PCREL:
933 case R_RL78_ABS24S:
934 case R_RL78_ABS16:
935 case R_RL78_ABS16_REV:
936 case R_RL78_ABS16S_PCREL:
937 case R_RL78_ABS16S:
938 case R_RL78_ABS16U:
939 case R_RL78_ABS16UL:
940 case R_RL78_ABS16UW:
941 case R_RL78_ABS8:
942 case R_RL78_ABS8U:
943 case R_RL78_ABS8UL:
944 case R_RL78_ABS8UW:
945 case R_RL78_ABS8S_PCREL:
946 case R_RL78_ABS8S:
947 case R_RL78_OPneg:
948 case R_RL78_OPadd:
949 case R_RL78_OPsub:
950 case R_RL78_OPmul:
951 case R_RL78_OPdiv:
952 case R_RL78_OPshla:
953 case R_RL78_OPshra:
954 case R_RL78_OPsctsize:
955 case R_RL78_OPscttop:
956 case R_RL78_OPand:
957 case R_RL78_OPor:
958 case R_RL78_OPxor:
959 case R_RL78_OPnot:
960 case R_RL78_OPmod:
961 relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
962
963 switch (r_type)
964 {
965 case R_RL78_ABS32:
966 OP (0) = relocation;
967 OP (1) = relocation >> 8;
968 OP (2) = relocation >> 16;
969 OP (3) = relocation >> 24;
970 break;
971
972 case R_RL78_ABS32_REV:
973 OP (3) = relocation;
974 OP (2) = relocation >> 8;
975 OP (1) = relocation >> 16;
976 OP (0) = relocation >> 24;
977 break;
978
979 case R_RL78_ABS24S_PCREL:
980 case R_RL78_ABS24S:
981 RANGE (-0x800000, 0x7fffff);
982 OP (0) = relocation;
983 OP (1) = relocation >> 8;
984 OP (2) = relocation >> 16;
985 break;
986
987 case R_RL78_ABS16:
988 RANGE (-32768, 65535);
989 OP (0) = relocation;
990 OP (1) = relocation >> 8;
991 break;
992
993 case R_RL78_ABS16_REV:
994 RANGE (-32768, 65535);
995 OP (1) = relocation;
996 OP (0) = relocation >> 8;
997 break;
998
999 case R_RL78_ABS16S_PCREL:
1000 case R_RL78_ABS16S:
1001 RANGE (-32768, 32767);
1002 OP (0) = relocation;
1003 OP (1) = relocation >> 8;
1004 break;
1005
1006 case R_RL78_ABS16U:
1007 case R_RL78_ABS16UL:
1008 case R_RL78_ABS16UW:
1009 RANGE (0, 65536);
1010 OP (0) = relocation;
1011 OP (1) = relocation >> 8;
1012 break;
1013
1014 case R_RL78_ABS8:
1015 RANGE (-128, 255);
1016 OP (0) = relocation;
1017 break;
1018
1019 case R_RL78_ABS8U:
1020 case R_RL78_ABS8UL:
1021 case R_RL78_ABS8UW:
1022 RANGE (0, 255);
1023 OP (0) = relocation;
1024 break;
1025
1026 case R_RL78_ABS8S_PCREL:
1027 case R_RL78_ABS8S:
1028 RANGE (-128, 127);
1029 OP (0) = relocation;
1030 break;
1031
1032 default:
1033 break;
1034 }
1035 break;
1036
1037 case R_RL78_SYM:
1038 if (r_symndx < symtab_hdr->sh_info)
1039 relocation = sec->output_section->vma + sec->output_offset
1040 + sym->st_value + rel->r_addend;
1041 else if (h != NULL
1042 && (h->root.type == bfd_link_hash_defined
1043 || h->root.type == bfd_link_hash_defweak))
1044 relocation = h->root.u.def.value
1045 + sec->output_section->vma
1046 + sec->output_offset
1047 + rel->r_addend;
1048 else
1049 {
1050 relocation = 0;
1051 if (h->root.type != bfd_link_hash_undefweak)
1052 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
1053 }
1054 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1055 break;
1056
1057 case R_RL78_OPromtop:
1058 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset);
1059 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1060 break;
1061
1062 case R_RL78_OPramtop:
1063 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1064 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1065 break;
1066
1067 default:
1068 r = bfd_reloc_notsupported;
1069 break;
1070 }
1071
1072 if (r != bfd_reloc_ok)
1073 {
1074 const char * msg = NULL;
1075
1076 switch (r)
1077 {
1078 case bfd_reloc_overflow:
1079 /* Catch the case of a missing function declaration
1080 and emit a more helpful error message. */
1081 if (r_type == R_RL78_DIR24S_PCREL)
1082 msg = _("%B(%A): error: call to undefined function '%s'");
1083 else
1084 (*info->callbacks->reloc_overflow)
1085 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1086 input_bfd, input_section, rel->r_offset);
1087 break;
1088
1089 case bfd_reloc_undefined:
1090 (*info->callbacks->undefined_symbol)
1091 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
1092 break;
1093
1094 case bfd_reloc_other:
1095 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1096 break;
1097
1098 case bfd_reloc_outofrange:
1099 msg = _("%B(%A): internal error: out of range error");
1100 break;
1101
1102 case bfd_reloc_notsupported:
1103 msg = _("%B(%A): internal error: unsupported relocation error");
1104 break;
1105
1106 case bfd_reloc_dangerous:
1107 msg = _("%B(%A): internal error: dangerous relocation");
1108 break;
1109
1110 default:
1111 msg = _("%B(%A): internal error: unknown error");
1112 break;
1113 }
1114
1115 if (msg)
1116 _bfd_error_handler (msg, input_bfd, input_section, name);
1117 }
1118 }
1119
1120 return TRUE;
1121 }
1122 \f
1123 /* Function to set the ELF flag bits. */
1124
1125 static bfd_boolean
1126 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1127 {
1128 elf_elfheader (abfd)->e_flags = flags;
1129 elf_flags_init (abfd) = TRUE;
1130 return TRUE;
1131 }
1132
1133 static bfd_boolean no_warn_mismatch = FALSE;
1134
1135 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1136
1137 void
1138 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1139 {
1140 no_warn_mismatch = user_no_warn_mismatch;
1141 }
1142
1143 static const char *
1144 rl78_cpu_name (flagword flags)
1145 {
1146 switch (flags & E_FLAG_RL78_CPU_MASK)
1147 {
1148 default: return "";
1149 case E_FLAG_RL78_G10: return "G10";
1150 case E_FLAG_RL78_G13: return "G13";
1151 case E_FLAG_RL78_G14: return "G14";
1152 }
1153 }
1154
1155 /* Merge backend specific data from an object file to the output
1156 object file when linking. */
1157
1158 static bfd_boolean
1159 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
1160 {
1161 bfd *obfd = info->output_bfd;
1162 flagword new_flags;
1163 flagword old_flags;
1164 bfd_boolean error = FALSE;
1165
1166 new_flags = elf_elfheader (ibfd)->e_flags;
1167 old_flags = elf_elfheader (obfd)->e_flags;
1168
1169 if (!elf_flags_init (obfd))
1170 {
1171 /* First call, no flags set. */
1172 elf_flags_init (obfd) = TRUE;
1173 elf_elfheader (obfd)->e_flags = new_flags;
1174 }
1175 else if (old_flags != new_flags)
1176 {
1177 flagword changed_flags = old_flags ^ new_flags;
1178
1179 if (changed_flags & E_FLAG_RL78_CPU_MASK)
1180 {
1181 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1182 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
1183
1184 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1185 /* It does not matter what new_cpu may have. */;
1186 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1187 {
1188 if (in_cpu == E_FLAG_RL78_G10)
1189 {
1190 /* G10 files can only be linked with other G10 files.
1191 If the output is set to "any" this means that it is
1192 a G14 file that does not use hardware multiply/divide,
1193 but that is still incompatible with the G10 ABI. */
1194 error = TRUE;
1195
1196 _bfd_error_handler
1197 (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
1198 bfd_get_filename (ibfd),
1199 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1200 }
1201 else
1202 {
1203 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1204 old_flags |= in_cpu;
1205 elf_elfheader (obfd)->e_flags = old_flags;
1206 }
1207 }
1208 else
1209 {
1210 error = TRUE;
1211
1212 _bfd_error_handler
1213 (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
1214 rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
1215 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1216 }
1217 }
1218
1219 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1220 {
1221 _bfd_error_handler
1222 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1223
1224 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1225 _bfd_error_handler (_("- %s is 64-bit, %s is not"),
1226 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1227 else
1228 _bfd_error_handler (_("- %s is 64-bit, %s is not"),
1229 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1230 error = TRUE;
1231 }
1232 }
1233
1234 return !error;
1235 }
1236 \f
1237 static bfd_boolean
1238 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1239 {
1240 FILE * file = (FILE *) ptr;
1241 flagword flags;
1242
1243 BFD_ASSERT (abfd != NULL && ptr != NULL);
1244
1245 /* Print normal ELF private data. */
1246 _bfd_elf_print_private_bfd_data (abfd, ptr);
1247
1248 flags = elf_elfheader (abfd)->e_flags;
1249 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1250
1251 if (flags & E_FLAG_RL78_CPU_MASK)
1252 fprintf (file, " [%s]", rl78_cpu_name (flags));
1253
1254 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1255 fprintf (file, _(" [64-bit doubles]"));
1256
1257 fputc ('\n', file);
1258 return TRUE;
1259 }
1260
1261 /* Return the MACH for an e_flags value. */
1262
1263 static int
1264 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
1265 {
1266 return bfd_mach_rl78;
1267 }
1268
1269 static bfd_boolean
1270 rl78_elf_object_p (bfd * abfd)
1271 {
1272 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1273 elf32_rl78_machine (abfd));
1274 return TRUE;
1275 }
1276 \f
1277 /* support PLT for 16-bit references to 24-bit functions. */
1278
1279 /* We support 16-bit pointers to code above 64k by generating a thunk
1280 below 64k containing a JMP instruction to the final address. */
1281
1282 static bfd_boolean
1283 rl78_elf_check_relocs
1284 (bfd * abfd,
1285 struct bfd_link_info * info,
1286 asection * sec,
1287 const Elf_Internal_Rela * relocs)
1288 {
1289 Elf_Internal_Shdr * symtab_hdr;
1290 struct elf_link_hash_entry ** sym_hashes;
1291 const Elf_Internal_Rela * rel;
1292 const Elf_Internal_Rela * rel_end;
1293 bfd_vma *local_plt_offsets;
1294 asection *splt;
1295 bfd *dynobj;
1296
1297 if (bfd_link_relocatable (info))
1298 return TRUE;
1299
1300 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1301 sym_hashes = elf_sym_hashes (abfd);
1302 local_plt_offsets = elf_local_got_offsets (abfd);
1303 splt = NULL;
1304 dynobj = elf_hash_table(info)->dynobj;
1305
1306 rel_end = relocs + sec->reloc_count;
1307 for (rel = relocs; rel < rel_end; rel++)
1308 {
1309 struct elf_link_hash_entry *h;
1310 unsigned long r_symndx;
1311 bfd_vma *offset;
1312
1313 r_symndx = ELF32_R_SYM (rel->r_info);
1314 if (r_symndx < symtab_hdr->sh_info)
1315 h = NULL;
1316 else
1317 {
1318 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1319 while (h->root.type == bfd_link_hash_indirect
1320 || h->root.type == bfd_link_hash_warning)
1321 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1322
1323 /* PR15323, ref flags aren't set for references in the same
1324 object. */
1325 h->root.non_ir_ref = 1;
1326 }
1327
1328 switch (ELF32_R_TYPE (rel->r_info))
1329 {
1330 /* This relocation describes a 16-bit pointer to a function.
1331 We may need to allocate a thunk in low memory; reserve memory
1332 for it now. */
1333 case R_RL78_DIR16S:
1334 if (dynobj == NULL)
1335 elf_hash_table (info)->dynobj = dynobj = abfd;
1336 if (splt == NULL)
1337 {
1338 splt = bfd_get_linker_section (dynobj, ".plt");
1339 if (splt == NULL)
1340 {
1341 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1342 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1343 | SEC_READONLY | SEC_CODE);
1344 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1345 flags);
1346 if (splt == NULL
1347 || ! bfd_set_section_alignment (dynobj, splt, 1))
1348 return FALSE;
1349 }
1350 }
1351
1352 if (h != NULL)
1353 offset = &h->plt.offset;
1354 else
1355 {
1356 if (local_plt_offsets == NULL)
1357 {
1358 size_t size;
1359 unsigned int i;
1360
1361 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1362 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1363 if (local_plt_offsets == NULL)
1364 return FALSE;
1365 elf_local_got_offsets (abfd) = local_plt_offsets;
1366
1367 for (i = 0; i < symtab_hdr->sh_info; i++)
1368 local_plt_offsets[i] = (bfd_vma) -1;
1369 }
1370 offset = &local_plt_offsets[r_symndx];
1371 }
1372
1373 if (*offset == (bfd_vma) -1)
1374 {
1375 *offset = splt->size;
1376 splt->size += 4;
1377 }
1378 break;
1379 }
1380 }
1381
1382 return TRUE;
1383 }
1384
1385 /* This must exist if dynobj is ever set. */
1386
1387 static bfd_boolean
1388 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1389 struct bfd_link_info *info)
1390 {
1391 bfd *dynobj;
1392 asection *splt;
1393
1394 if (!elf_hash_table (info)->dynamic_sections_created)
1395 return TRUE;
1396
1397 /* As an extra sanity check, verify that all plt entries have been
1398 filled in. However, relaxing might have changed the relocs so
1399 that some plt entries don't get filled in, so we have to skip
1400 this check if we're relaxing. Unfortunately, check_relocs is
1401 called before relaxation. */
1402
1403 if (info->relax_trip > 0)
1404 return TRUE;
1405
1406 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1407 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
1408 {
1409 bfd_byte *contents = splt->contents;
1410 unsigned int i, size = splt->size;
1411
1412 for (i = 0; i < size; i += 4)
1413 {
1414 unsigned int x = bfd_get_32 (dynobj, contents + i);
1415 BFD_ASSERT (x != 0);
1416 }
1417 }
1418
1419 return TRUE;
1420 }
1421
1422 static bfd_boolean
1423 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1424 struct bfd_link_info *info)
1425 {
1426 bfd *dynobj;
1427 asection *splt;
1428
1429 if (bfd_link_relocatable (info))
1430 return TRUE;
1431
1432 dynobj = elf_hash_table (info)->dynobj;
1433 if (dynobj == NULL)
1434 return TRUE;
1435
1436 splt = bfd_get_linker_section (dynobj, ".plt");
1437 BFD_ASSERT (splt != NULL);
1438
1439 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1440 if (splt->contents == NULL)
1441 return FALSE;
1442
1443 return TRUE;
1444 }
1445
1446 \f
1447
1448 /* Handle relaxing. */
1449
1450 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1451 is within the low 64k, remove any entry for it in the plt. */
1452
1453 struct relax_plt_data
1454 {
1455 asection *splt;
1456 bfd_boolean *again;
1457 };
1458
1459 static bfd_boolean
1460 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1461 {
1462 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1463
1464 if (h->plt.offset != (bfd_vma) -1)
1465 {
1466 bfd_vma address;
1467
1468 if (h->root.type == bfd_link_hash_undefined
1469 || h->root.type == bfd_link_hash_undefweak)
1470 address = 0;
1471 else
1472 address = (h->root.u.def.section->output_section->vma
1473 + h->root.u.def.section->output_offset
1474 + h->root.u.def.value);
1475
1476 if (valid_16bit_address (address))
1477 {
1478 h->plt.offset = -1;
1479 data->splt->size -= 4;
1480 *data->again = TRUE;
1481 }
1482 }
1483
1484 return TRUE;
1485 }
1486
1487 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1488 previously had a plt entry, give it a new entry offset. */
1489
1490 static bfd_boolean
1491 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1492 {
1493 bfd_vma *entry = (bfd_vma *) xdata;
1494
1495 if (h->plt.offset != (bfd_vma) -1)
1496 {
1497 h->plt.offset = *entry;
1498 *entry += 4;
1499 }
1500
1501 return TRUE;
1502 }
1503
1504 static bfd_boolean
1505 rl78_elf_relax_plt_section (bfd *dynobj,
1506 asection *splt,
1507 struct bfd_link_info *info,
1508 bfd_boolean *again)
1509 {
1510 struct relax_plt_data relax_plt_data;
1511 bfd *ibfd;
1512
1513 /* Assume nothing changes. */
1514 *again = FALSE;
1515
1516 if (bfd_link_relocatable (info))
1517 return TRUE;
1518
1519 /* We only relax the .plt section at the moment. */
1520 if (dynobj != elf_hash_table (info)->dynobj
1521 || strcmp (splt->name, ".plt") != 0)
1522 return TRUE;
1523
1524 /* Quick check for an empty plt. */
1525 if (splt->size == 0)
1526 return TRUE;
1527
1528 /* Map across all global symbols; see which ones happen to
1529 fall in the low 64k. */
1530 relax_plt_data.splt = splt;
1531 relax_plt_data.again = again;
1532 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1533 &relax_plt_data);
1534
1535 /* Likewise for local symbols, though that's somewhat less convenient
1536 as we have to walk the list of input bfds and swap in symbol data. */
1537 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1538 {
1539 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1540 Elf_Internal_Shdr *symtab_hdr;
1541 Elf_Internal_Sym *isymbuf = NULL;
1542 unsigned int idx;
1543
1544 if (! local_plt_offsets)
1545 continue;
1546
1547 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1548 if (symtab_hdr->sh_info != 0)
1549 {
1550 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1551 if (isymbuf == NULL)
1552 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1553 symtab_hdr->sh_info, 0,
1554 NULL, NULL, NULL);
1555 if (isymbuf == NULL)
1556 return FALSE;
1557 }
1558
1559 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1560 {
1561 Elf_Internal_Sym *isym;
1562 asection *tsec;
1563 bfd_vma address;
1564
1565 if (local_plt_offsets[idx] == (bfd_vma) -1)
1566 continue;
1567
1568 isym = &isymbuf[idx];
1569 if (isym->st_shndx == SHN_UNDEF)
1570 continue;
1571 else if (isym->st_shndx == SHN_ABS)
1572 tsec = bfd_abs_section_ptr;
1573 else if (isym->st_shndx == SHN_COMMON)
1574 tsec = bfd_com_section_ptr;
1575 else
1576 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1577
1578 address = (tsec->output_section->vma
1579 + tsec->output_offset
1580 + isym->st_value);
1581 if (valid_16bit_address (address))
1582 {
1583 local_plt_offsets[idx] = -1;
1584 splt->size -= 4;
1585 *again = TRUE;
1586 }
1587 }
1588
1589 if (isymbuf != NULL
1590 && symtab_hdr->contents != (unsigned char *) isymbuf)
1591 {
1592 if (! info->keep_memory)
1593 free (isymbuf);
1594 else
1595 {
1596 /* Cache the symbols for elf_link_input_bfd. */
1597 symtab_hdr->contents = (unsigned char *) isymbuf;
1598 }
1599 }
1600 }
1601
1602 /* If we changed anything, walk the symbols again to reallocate
1603 .plt entry addresses. */
1604 if (*again && splt->size > 0)
1605 {
1606 bfd_vma entry = 0;
1607
1608 elf_link_hash_traverse (elf_hash_table (info),
1609 rl78_relax_plt_realloc, &entry);
1610
1611 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1612 {
1613 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1614 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1615 unsigned int idx;
1616
1617 if (! local_plt_offsets)
1618 continue;
1619
1620 for (idx = 0; idx < nlocals; ++idx)
1621 if (local_plt_offsets[idx] != (bfd_vma) -1)
1622 {
1623 local_plt_offsets[idx] = entry;
1624 entry += 4;
1625 }
1626 }
1627 }
1628
1629 return TRUE;
1630 }
1631
1632 /* Delete some bytes from a section while relaxing. */
1633
1634 static bfd_boolean
1635 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1636 Elf_Internal_Rela *alignment_rel, int force_snip)
1637 {
1638 Elf_Internal_Shdr * symtab_hdr;
1639 unsigned int sec_shndx;
1640 bfd_byte * contents;
1641 Elf_Internal_Rela * irel;
1642 Elf_Internal_Rela * irelend;
1643 Elf_Internal_Sym * isym;
1644 Elf_Internal_Sym * isymend;
1645 bfd_vma toaddr;
1646 unsigned int symcount;
1647 struct elf_link_hash_entry ** sym_hashes;
1648 struct elf_link_hash_entry ** end_hashes;
1649
1650 if (!alignment_rel)
1651 force_snip = 1;
1652
1653 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1654
1655 contents = elf_section_data (sec)->this_hdr.contents;
1656
1657 /* The deletion must stop at the next alignment boundary, if
1658 ALIGNMENT_REL is non-NULL. */
1659 toaddr = sec->size;
1660 if (alignment_rel)
1661 toaddr = alignment_rel->r_offset;
1662
1663 irel = elf_section_data (sec)->relocs;
1664 if (irel == NULL)
1665 {
1666 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1667 irel = elf_section_data (sec)->relocs;
1668 }
1669
1670 irelend = irel + sec->reloc_count;
1671
1672 /* Actually delete the bytes. */
1673 memmove (contents + addr, contents + addr + count,
1674 (size_t) (toaddr - addr - count));
1675
1676 /* If we don't have an alignment marker to worry about, we can just
1677 shrink the section. Otherwise, we have to fill in the newly
1678 created gap with NOP insns (0x03). */
1679 if (force_snip)
1680 sec->size -= count;
1681 else
1682 memset (contents + toaddr - count, 0x03, count);
1683
1684 /* Adjust all the relocs. */
1685 for (; irel && irel < irelend; irel++)
1686 {
1687 /* Get the new reloc address. */
1688 if (irel->r_offset > addr
1689 && (irel->r_offset < toaddr
1690 || (force_snip && irel->r_offset == toaddr)))
1691 irel->r_offset -= count;
1692
1693 /* If we see an ALIGN marker at the end of the gap, we move it
1694 to the beginning of the gap, since marking these gaps is what
1695 they're for. */
1696 if (irel->r_offset == toaddr
1697 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1698 && irel->r_addend & RL78_RELAXA_ALIGN)
1699 irel->r_offset -= count;
1700 }
1701
1702 /* Adjust the local symbols defined in this section. */
1703 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1704 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1705 isymend = isym + symtab_hdr->sh_info;
1706
1707 for (; isym < isymend; isym++)
1708 {
1709 /* If the symbol is in the range of memory we just moved, we
1710 have to adjust its value. */
1711 if (isym->st_shndx == sec_shndx
1712 && isym->st_value > addr
1713 && isym->st_value < toaddr)
1714 isym->st_value -= count;
1715
1716 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1717 *end* is in the moved bytes but it's *start* isn't), then we
1718 must adjust its size. */
1719 if (isym->st_shndx == sec_shndx
1720 && isym->st_value < addr
1721 && isym->st_value + isym->st_size > addr
1722 && isym->st_value + isym->st_size < toaddr)
1723 isym->st_size -= count;
1724 }
1725
1726 /* Now adjust the global symbols defined in this section. */
1727 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1728 - symtab_hdr->sh_info);
1729 sym_hashes = elf_sym_hashes (abfd);
1730 end_hashes = sym_hashes + symcount;
1731
1732 for (; sym_hashes < end_hashes; sym_hashes++)
1733 {
1734 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1735
1736 if ((sym_hash->root.type == bfd_link_hash_defined
1737 || sym_hash->root.type == bfd_link_hash_defweak)
1738 && sym_hash->root.u.def.section == sec)
1739 {
1740 /* As above, adjust the value if needed. */
1741 if (sym_hash->root.u.def.value > addr
1742 && sym_hash->root.u.def.value < toaddr)
1743 sym_hash->root.u.def.value -= count;
1744
1745 /* As above, adjust the size if needed. */
1746 if (sym_hash->root.u.def.value < addr
1747 && sym_hash->root.u.def.value + sym_hash->size > addr
1748 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1749 sym_hash->size -= count;
1750 }
1751 }
1752
1753 return TRUE;
1754 }
1755
1756 /* Used to sort relocs by address. If relocs have the same address,
1757 we maintain their relative order, except that R_RL78_RH_RELAX
1758 alignment relocs must be the first reloc for any given address. */
1759
1760 static void
1761 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1762 {
1763 int i;
1764 bfd_boolean again;
1765 bfd_boolean swappit;
1766
1767 /* This is almost a classic bubblesort. It's the slowest sort, but
1768 we're taking advantage of the fact that the relocations are
1769 mostly in order already (the assembler emits them that way) and
1770 we need relocs with the same address to remain in the same
1771 relative order. */
1772 again = TRUE;
1773 while (again)
1774 {
1775 again = FALSE;
1776 for (i = 0; i < count - 1; i ++)
1777 {
1778 if (r[i].r_offset > r[i + 1].r_offset)
1779 swappit = TRUE;
1780 else if (r[i].r_offset < r[i + 1].r_offset)
1781 swappit = FALSE;
1782 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1783 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1784 swappit = TRUE;
1785 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1786 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1787 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1788 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1789 swappit = TRUE;
1790 else
1791 swappit = FALSE;
1792
1793 if (swappit)
1794 {
1795 Elf_Internal_Rela tmp;
1796
1797 tmp = r[i];
1798 r[i] = r[i + 1];
1799 r[i + 1] = tmp;
1800 /* If we do move a reloc back, re-scan to see if it
1801 needs to be moved even further back. This avoids
1802 most of the O(n^2) behavior for our cases. */
1803 if (i > 0)
1804 i -= 2;
1805 again = TRUE;
1806 }
1807 }
1808 }
1809 }
1810
1811
1812 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1813 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1814 lrel, abfd, sec, link_info, scale)
1815
1816 static bfd_vma
1817 rl78_offset_for_reloc (bfd * abfd,
1818 Elf_Internal_Rela * rel,
1819 Elf_Internal_Shdr * symtab_hdr,
1820 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1821 Elf_Internal_Sym * intsyms,
1822 Elf_Internal_Rela ** lrel,
1823 bfd * input_bfd,
1824 asection * input_section,
1825 struct bfd_link_info * info,
1826 int * scale)
1827 {
1828 bfd_vma symval;
1829
1830 *scale = 1;
1831
1832 /* REL is the first of 1..N relocations. We compute the symbol
1833 value for each relocation, then combine them if needed. LREL
1834 gets a pointer to the last relocation used. */
1835 while (1)
1836 {
1837 unsigned long r_type;
1838
1839 /* Get the value of the symbol referred to by the reloc. */
1840 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1841 {
1842 /* A local symbol. */
1843 Elf_Internal_Sym *isym;
1844 asection *ssec;
1845
1846 isym = intsyms + ELF32_R_SYM (rel->r_info);
1847
1848 if (isym->st_shndx == SHN_UNDEF)
1849 ssec = bfd_und_section_ptr;
1850 else if (isym->st_shndx == SHN_ABS)
1851 ssec = bfd_abs_section_ptr;
1852 else if (isym->st_shndx == SHN_COMMON)
1853 ssec = bfd_com_section_ptr;
1854 else
1855 ssec = bfd_section_from_elf_index (abfd,
1856 isym->st_shndx);
1857
1858 /* Initial symbol value. */
1859 symval = isym->st_value;
1860
1861 /* GAS may have made this symbol relative to a section, in
1862 which case, we have to add the addend to find the
1863 symbol. */
1864 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1865 symval += rel->r_addend;
1866
1867 if (ssec)
1868 {
1869 if ((ssec->flags & SEC_MERGE)
1870 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1871 symval = _bfd_merged_section_offset (abfd, & ssec,
1872 elf_section_data (ssec)->sec_info,
1873 symval);
1874 }
1875
1876 /* Now make the offset relative to where the linker is putting it. */
1877 if (ssec)
1878 symval +=
1879 ssec->output_section->vma + ssec->output_offset;
1880
1881 symval += rel->r_addend;
1882 }
1883 else
1884 {
1885 unsigned long indx;
1886 struct elf_link_hash_entry * h;
1887
1888 /* An external symbol. */
1889 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1890 h = elf_sym_hashes (abfd)[indx];
1891 BFD_ASSERT (h != NULL);
1892
1893 if (h->root.type != bfd_link_hash_defined
1894 && h->root.type != bfd_link_hash_defweak)
1895 {
1896 /* This appears to be a reference to an undefined
1897 symbol. Just ignore it--it will be caught by the
1898 regular reloc processing. */
1899 if (lrel)
1900 *lrel = rel;
1901 return 0;
1902 }
1903
1904 symval = (h->root.u.def.value
1905 + h->root.u.def.section->output_section->vma
1906 + h->root.u.def.section->output_offset);
1907
1908 symval += rel->r_addend;
1909 }
1910
1911 r_type = ELF32_R_TYPE (rel->r_info);
1912 switch (r_type)
1913 {
1914 case R_RL78_SYM:
1915 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1916 break;
1917
1918 case R_RL78_OPromtop:
1919 symval = get_romstart (info, input_bfd, input_section, rel->r_offset);
1920 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1921 break;
1922
1923 case R_RL78_OPramtop:
1924 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1925 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1926 break;
1927
1928 case R_RL78_OPneg:
1929 case R_RL78_OPadd:
1930 case R_RL78_OPsub:
1931 case R_RL78_OPmul:
1932 case R_RL78_OPdiv:
1933 case R_RL78_OPshla:
1934 case R_RL78_OPshra:
1935 case R_RL78_OPsctsize:
1936 case R_RL78_OPscttop:
1937 case R_RL78_OPand:
1938 case R_RL78_OPor:
1939 case R_RL78_OPxor:
1940 case R_RL78_OPnot:
1941 case R_RL78_OPmod:
1942 (void) rl78_compute_complex_reloc (r_type, 0, input_section);
1943 break;
1944
1945 case R_RL78_DIR16UL:
1946 case R_RL78_DIR8UL:
1947 case R_RL78_ABS16UL:
1948 case R_RL78_ABS8UL:
1949 *scale = 4;
1950 goto reloc_computes_value;
1951
1952 case R_RL78_DIR16UW:
1953 case R_RL78_DIR8UW:
1954 case R_RL78_ABS16UW:
1955 case R_RL78_ABS8UW:
1956 *scale = 2;
1957 goto reloc_computes_value;
1958
1959 default:
1960 reloc_computes_value:
1961 symval = rl78_compute_complex_reloc (r_type, symval, input_section);
1962 /* Fall through. */
1963 case R_RL78_DIR32:
1964 case R_RL78_DIR24S:
1965 case R_RL78_DIR16:
1966 case R_RL78_DIR16U:
1967 case R_RL78_DIR16S:
1968 case R_RL78_DIR24S_PCREL:
1969 case R_RL78_DIR16S_PCREL:
1970 case R_RL78_DIR8S_PCREL:
1971 if (lrel)
1972 *lrel = rel;
1973 return symval;
1974 }
1975
1976 rel ++;
1977 }
1978 }
1979
1980 struct {
1981 int prefix; /* or -1 for "no prefix" */
1982 int insn; /* or -1 for "end of list" */
1983 int insn_for_saddr; /* or -1 for "no alternative" */
1984 int insn_for_sfr; /* or -1 for "no alternative" */
1985 } relax_addr16[] = {
1986 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1987 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1988 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1989 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1990
1991 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1992 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1993 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1994 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1995 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1996 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1997 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1998 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1999
2000 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
2001 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2002 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2003 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2004 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2005
2006 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2007 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2008 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2009 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2010
2011 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2012 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2013 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2014
2015 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2016 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2017 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2018 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2019 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2020 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2021
2022 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2023
2024 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2025 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2026 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2027 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2028 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2029 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2030 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2031 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2032
2033 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2034 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2035 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2036 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2037 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2038 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2039 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2040 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
2041
2042 { -1, -1, -1, -1 }
2043 };
2044
2045 /* Relax one section. */
2046
2047 static bfd_boolean
2048 rl78_elf_relax_section
2049 (bfd * abfd,
2050 asection * sec,
2051 struct bfd_link_info * link_info,
2052 bfd_boolean * again)
2053 {
2054 Elf_Internal_Shdr * symtab_hdr;
2055 Elf_Internal_Shdr * shndx_hdr;
2056 Elf_Internal_Rela * internal_relocs;
2057 Elf_Internal_Rela * free_relocs = NULL;
2058 Elf_Internal_Rela * irel;
2059 Elf_Internal_Rela * srel;
2060 Elf_Internal_Rela * irelend;
2061 Elf_Internal_Rela * next_alignment;
2062 bfd_byte * contents = NULL;
2063 bfd_byte * free_contents = NULL;
2064 Elf_Internal_Sym * intsyms = NULL;
2065 Elf_Internal_Sym * free_intsyms = NULL;
2066 Elf_External_Sym_Shndx * shndx_buf = NULL;
2067 bfd_vma pc;
2068 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2069 int pcrel ATTRIBUTE_UNUSED = 0;
2070 int code ATTRIBUTE_UNUSED = 0;
2071 int section_alignment_glue;
2072 int scale;
2073
2074 if (abfd == elf_hash_table (link_info)->dynobj
2075 && strcmp (sec->name, ".plt") == 0)
2076 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2077
2078 /* Assume nothing changes. */
2079 *again = FALSE;
2080
2081 /* We don't have to do anything for a relocatable link, if
2082 this section does not have relocs, or if this is not a
2083 code section. */
2084 if (bfd_link_relocatable (link_info)
2085 || (sec->flags & SEC_RELOC) == 0
2086 || sec->reloc_count == 0
2087 || (sec->flags & SEC_CODE) == 0)
2088 return TRUE;
2089
2090 symtab_hdr = & elf_symtab_hdr (abfd);
2091 if (elf_symtab_shndx_list (abfd))
2092 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2093 else
2094 shndx_hdr = NULL;
2095
2096 /* Get the section contents. */
2097 if (elf_section_data (sec)->this_hdr.contents != NULL)
2098 contents = elf_section_data (sec)->this_hdr.contents;
2099 /* Go get them off disk. */
2100 else
2101 {
2102 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2103 goto error_return;
2104 elf_section_data (sec)->this_hdr.contents = contents;
2105 }
2106
2107 /* Read this BFD's symbols. */
2108 /* Get cached copy if it exists. */
2109 if (symtab_hdr->contents != NULL)
2110 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2111 else
2112 {
2113 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2114 symtab_hdr->contents = (bfd_byte *) intsyms;
2115 }
2116
2117 if (shndx_hdr && shndx_hdr->sh_size != 0)
2118 {
2119 bfd_size_type amt;
2120
2121 amt = symtab_hdr->sh_info;
2122 amt *= sizeof (Elf_External_Sym_Shndx);
2123 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2124 if (shndx_buf == NULL)
2125 goto error_return;
2126 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2127 || bfd_bread (shndx_buf, amt, abfd) != amt)
2128 goto error_return;
2129 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2130 }
2131
2132 /* Get a copy of the native relocations. */
2133 internal_relocs = (_bfd_elf_link_read_relocs
2134 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2135 link_info->keep_memory));
2136 if (internal_relocs == NULL)
2137 goto error_return;
2138 if (! link_info->keep_memory)
2139 free_relocs = internal_relocs;
2140
2141 /* The RL_ relocs must be just before the operand relocs they go
2142 with, so we must sort them to guarantee this. We use bubblesort
2143 instead of qsort so we can guarantee that relocs with the same
2144 address remain in the same relative order. */
2145 reloc_bubblesort (internal_relocs, sec->reloc_count);
2146
2147 /* Walk through them looking for relaxing opportunities. */
2148 irelend = internal_relocs + sec->reloc_count;
2149
2150
2151 /* This will either be NULL or a pointer to the next alignment
2152 relocation. */
2153 next_alignment = internal_relocs;
2154
2155 /* We calculate worst case shrinkage caused by alignment directives.
2156 No fool-proof, but better than either ignoring the problem or
2157 doing heavy duty analysis of all the alignment markers in all
2158 input sections. */
2159 section_alignment_glue = 0;
2160 for (irel = internal_relocs; irel < irelend; irel++)
2161 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2162 && irel->r_addend & RL78_RELAXA_ALIGN)
2163 {
2164 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2165
2166 if (section_alignment_glue < this_glue)
2167 section_alignment_glue = this_glue;
2168 }
2169 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2170 shrinkage. */
2171 section_alignment_glue *= 2;
2172
2173 for (irel = internal_relocs; irel < irelend; irel++)
2174 {
2175 unsigned char *insn;
2176 int nrelocs;
2177
2178 /* The insns we care about are all marked with one of these. */
2179 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2180 continue;
2181
2182 if (irel->r_addend & RL78_RELAXA_ALIGN
2183 || next_alignment == internal_relocs)
2184 {
2185 /* When we delete bytes, we need to maintain all the alignments
2186 indicated. In addition, we need to be careful about relaxing
2187 jumps across alignment boundaries - these displacements
2188 *grow* when we delete bytes. For now, don't shrink
2189 displacements across an alignment boundary, just in case.
2190 Note that this only affects relocations to the same
2191 section. */
2192 next_alignment += 2;
2193 while (next_alignment < irelend
2194 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2195 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2196 next_alignment ++;
2197 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2198 next_alignment = NULL;
2199 }
2200
2201 /* When we hit alignment markers, see if we've shrunk enough
2202 before them to reduce the gap without violating the alignment
2203 requirements. */
2204 if (irel->r_addend & RL78_RELAXA_ALIGN)
2205 {
2206 /* At this point, the next relocation *should* be the ELIGN
2207 end marker. */
2208 Elf_Internal_Rela *erel = irel + 1;
2209 unsigned int alignment, nbytes;
2210
2211 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2212 continue;
2213 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2214 continue;
2215
2216 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2217
2218 if (erel->r_offset - irel->r_offset < alignment)
2219 continue;
2220
2221 nbytes = erel->r_offset - irel->r_offset;
2222 nbytes /= alignment;
2223 nbytes *= alignment;
2224
2225 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2226 next_alignment, erel->r_offset == sec->size);
2227 *again = TRUE;
2228
2229 continue;
2230 }
2231
2232 if (irel->r_addend & RL78_RELAXA_ELIGN)
2233 continue;
2234
2235 insn = contents + irel->r_offset;
2236
2237 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2238
2239 /* At this point, we have an insn that is a candidate for linker
2240 relaxation. There are NRELOCS relocs following that may be
2241 relaxed, although each reloc may be made of more than one
2242 reloc entry (such as gp-rel symbols). */
2243
2244 /* Get the value of the symbol referred to by the reloc. Just
2245 in case this is the last reloc in the list, use the RL's
2246 addend to choose between this reloc (no addend) or the next
2247 (yes addend, which means at least one following reloc). */
2248
2249 /* srel points to the "current" reloction for this insn -
2250 actually the last reloc for a given operand, which is the one
2251 we need to update. We check the relaxations in the same
2252 order that the relocations happen, so we'll just push it
2253 along as we go. */
2254 srel = irel;
2255
2256 pc = sec->output_section->vma + sec->output_offset
2257 + srel->r_offset;
2258
2259 #define GET_RELOC \
2260 BFD_ASSERT (nrelocs > 0); \
2261 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2262 pcrel = symval - pc + srel->r_addend; \
2263 nrelocs --;
2264
2265 #define SNIPNR(offset, nbytes) \
2266 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2267
2268 #define SNIP(offset, nbytes, newtype) \
2269 SNIPNR (offset, nbytes); \
2270 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2271
2272 /* The order of these bit tests must match the order that the
2273 relocs appear in. Since we sorted those by offset, we can
2274 predict them. */
2275
2276 /*----------------------------------------------------------------------*/
2277 /* EF ad BR $rel8 pcrel
2278 ED al ah BR !abs16 abs
2279 EE al ah BR $!rel16 pcrel
2280 EC al ah as BR !!abs20 abs
2281
2282 FD al ah CALL !abs16 abs
2283 FE al ah CALL $!rel16 pcrel
2284 FC al ah as CALL !!abs20 abs
2285
2286 DC ad BC $rel8
2287 DE ad BNC $rel8
2288 DD ad BZ $rel8
2289 DF ad BNZ $rel8
2290 61 C3 ad BH $rel8
2291 61 D3 ad BNH $rel8
2292 61 C8 EF ad SKC ; BR $rel8
2293 61 D8 EF ad SKNC ; BR $rel8
2294 61 E8 EF ad SKZ ; BR $rel8
2295 61 F8 EF ad SKNZ ; BR $rel8
2296 61 E3 EF ad SKH ; BR $rel8
2297 61 F3 EF ad SKNH ; BR $rel8
2298 */
2299
2300 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2301 {
2302 /* SKIP opcodes that skip non-branches will have a relax tag
2303 but no corresponding symbol to relax against; we just
2304 skip those. */
2305 if (irel->r_addend & RL78_RELAXA_RNUM)
2306 {
2307 GET_RELOC;
2308 }
2309
2310 switch (insn[0])
2311 {
2312 case 0xdc: /* BC */
2313 case 0xdd: /* BZ */
2314 case 0xde: /* BNC */
2315 case 0xdf: /* BNZ */
2316 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
2317 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
2318 {
2319 /* This is a "long" conditional as generated by gas:
2320 DC 03 EE ad.dr */
2321 if (pcrel < 127
2322 && pcrel > -127)
2323 {
2324 insn[0] ^= 0x02; /* invert conditional */
2325 SNIPNR (4, 1);
2326 SNIP (1, 2, R_RL78_DIR8S_PCREL);
2327 insn[1] = pcrel;
2328 *again = TRUE;
2329 }
2330 }
2331 break;
2332
2333 case 0xec: /* BR !!abs20 */
2334
2335 if (pcrel < 127
2336 && pcrel > -127)
2337 {
2338 insn[0] = 0xef;
2339 insn[1] = pcrel;
2340 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2341 *again = TRUE;
2342 }
2343 else if (symval < 65536)
2344 {
2345 insn[0] = 0xed;
2346 insn[1] = symval & 0xff;
2347 insn[2] = symval >> 8;
2348 SNIP (2, 1, R_RL78_DIR16U);
2349 *again = TRUE;
2350 }
2351 else if (pcrel < 32767
2352 && pcrel > -32767)
2353 {
2354 insn[0] = 0xee;
2355 insn[1] = pcrel & 0xff;
2356 insn[2] = pcrel >> 8;
2357 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2358 *again = TRUE;
2359 }
2360 break;
2361
2362 case 0xee: /* BR $!pcrel16 */
2363 case 0xed: /* BR $!abs16 */
2364 if (pcrel < 127
2365 && pcrel > -127)
2366 {
2367 insn[0] = 0xef;
2368 insn[1] = pcrel;
2369 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2370 *again = TRUE;
2371 }
2372 break;
2373
2374 case 0xfc: /* CALL !!abs20 */
2375 if (symval < 65536)
2376 {
2377 insn[0] = 0xfd;
2378 insn[1] = symval & 0xff;
2379 insn[2] = symval >> 8;
2380 SNIP (2, 1, R_RL78_DIR16U);
2381 *again = TRUE;
2382 }
2383 else if (pcrel < 32767
2384 && pcrel > -32767)
2385 {
2386 insn[0] = 0xfe;
2387 insn[1] = pcrel & 0xff;
2388 insn[2] = pcrel >> 8;
2389 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2390 *again = TRUE;
2391 }
2392 break;
2393
2394 case 0x61: /* PREFIX */
2395 /* For SKIP/BR, we change the BR opcode and delete the
2396 SKIP. That way, we don't have to find and change the
2397 relocation for the BR. */
2398 /* Note that, for the case where we're skipping some
2399 other insn, we have no "other" reloc but that's safe
2400 here anyway. */
2401 switch (insn[1])
2402 {
2403 case 0xd3: /* BNH */
2404 case 0xc3: /* BH */
2405 if (insn[2] == 0x03 && insn[3] == 0xee
2406 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
2407 {
2408 /* Another long branch by gas:
2409 61 D3 03 EE ad.dr */
2410 if (pcrel < 127
2411 && pcrel > -127)
2412 {
2413 insn[1] ^= 0x10; /* invert conditional */
2414 SNIPNR (5, 1);
2415 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2416 insn[2] = pcrel;
2417 *again = TRUE;
2418 }
2419 }
2420 break;
2421
2422 case 0xc8: /* SKC */
2423 if (insn[2] == 0xef)
2424 {
2425 insn[2] = 0xde; /* BNC */
2426 SNIPNR (0, 2);
2427 }
2428 break;
2429
2430 case 0xd8: /* SKNC */
2431 if (insn[2] == 0xef)
2432 {
2433 insn[2] = 0xdc; /* BC */
2434 SNIPNR (0, 2);
2435 }
2436 break;
2437
2438 case 0xe8: /* SKZ */
2439 if (insn[2] == 0xef)
2440 {
2441 insn[2] = 0xdf; /* BNZ */
2442 SNIPNR (0, 2);
2443 }
2444 break;
2445
2446 case 0xf8: /* SKNZ */
2447 if (insn[2] == 0xef)
2448 {
2449 insn[2] = 0xdd; /* BZ */
2450 SNIPNR (0, 2);
2451 }
2452 break;
2453
2454 case 0xe3: /* SKH */
2455 if (insn[2] == 0xef)
2456 {
2457 insn[2] = 0xd3; /* BNH */
2458 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2459 }
2460 break;
2461
2462 case 0xf3: /* SKNH */
2463 if (insn[2] == 0xef)
2464 {
2465 insn[2] = 0xc3; /* BH */
2466 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2467 }
2468 break;
2469 }
2470 break;
2471 }
2472 }
2473
2474 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2475 && nrelocs > 0)
2476 {
2477 /*----------------------------------------------------------------------*/
2478 /* Some insns have both a 16-bit address operand and an 8-bit
2479 variant if the address is within a special range:
2480
2481 Address 16-bit operand SADDR range SFR range
2482 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2483 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2484
2485 The RELAX_ADDR16[] array has the insn encodings for the
2486 16-bit operand version, as well as the SFR and SADDR
2487 variants. We only need to replace the encodings and
2488 adjust the operand.
2489
2490 Note: we intentionally do not attempt to decode and skip
2491 any ES: prefix, as adding ES: means the addr16 (likely)
2492 no longer points to saddr/sfr space.
2493 */
2494
2495 int is_sfr;
2496 int is_saddr;
2497 int idx;
2498 int poff;
2499
2500 GET_RELOC;
2501
2502 if (0xffe20 <= symval && symval <= 0xfffff)
2503 {
2504
2505 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2506 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2507
2508 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2509 {
2510 if (relax_addr16[idx].prefix != -1
2511 && insn[0] == relax_addr16[idx].prefix
2512 && insn[1] == relax_addr16[idx].insn)
2513 {
2514 poff = 1;
2515 }
2516 else if (relax_addr16[idx].prefix == -1
2517 && insn[0] == relax_addr16[idx].insn)
2518 {
2519 poff = 0;
2520 }
2521 else
2522 continue;
2523
2524 /* We have a matched insn, and poff is 0 or 1 depending
2525 on the base pattern size. */
2526
2527 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2528 {
2529 insn[poff] = relax_addr16[idx].insn_for_sfr;
2530 SNIP (poff+2, 1, R_RL78_RH_SFR);
2531 }
2532
2533 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2534 {
2535 insn[poff] = relax_addr16[idx].insn_for_saddr;
2536 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2537 }
2538 }
2539 }
2540 }
2541 /*----------------------------------------------------------------------*/
2542 }
2543
2544 return TRUE;
2545
2546 error_return:
2547 if (free_relocs != NULL)
2548 free (free_relocs);
2549
2550 if (free_contents != NULL)
2551 free (free_contents);
2552
2553 if (shndx_buf != NULL)
2554 {
2555 shndx_hdr->contents = NULL;
2556 free (shndx_buf);
2557 }
2558
2559 if (free_intsyms != NULL)
2560 free (free_intsyms);
2561
2562 return TRUE;
2563 }
2564
2565 \f
2566
2567 #define ELF_ARCH bfd_arch_rl78
2568 #define ELF_MACHINE_CODE EM_RL78
2569 #define ELF_MAXPAGESIZE 0x1000
2570
2571 #define TARGET_LITTLE_SYM rl78_elf32_vec
2572 #define TARGET_LITTLE_NAME "elf32-rl78"
2573
2574 #define elf_info_to_howto_rel NULL
2575 #define elf_info_to_howto rl78_info_to_howto_rela
2576 #define elf_backend_object_p rl78_elf_object_p
2577 #define elf_backend_relocate_section rl78_elf_relocate_section
2578 #define elf_symbol_leading_char ('_')
2579 #define elf_backend_can_gc_sections 1
2580
2581 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2582 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2583 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2584 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2585 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2586
2587 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2588 #define elf_backend_check_relocs rl78_elf_check_relocs
2589 #define elf_backend_always_size_sections \
2590 rl78_elf_always_size_sections
2591 #define elf_backend_finish_dynamic_sections \
2592 rl78_elf_finish_dynamic_sections
2593
2594 #include "elf32-target.h"
GDB Binutils - Deliverables
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