1 /* AArch64-specific support for ELF.
2 Copyright (C) 2009-2015 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
22 #include "elfxx-aarch64.h"
26 #define MASK(n) ((1u << (n)) - 1)
28 /* Sign-extend VALUE, which has the indicated number of BITS. */
31 _bfd_aarch64_sign_extend (bfd_vma value
, int bits
)
33 if (value
& ((bfd_vma
) 1 << (bits
- 1)))
34 /* VALUE is negative. */
35 value
|= ((bfd_vma
) - 1) << bits
;
40 /* Decode the IMM field of ADRP. */
43 _bfd_aarch64_decode_adrp_imm (uint32_t insn
)
45 return (((insn
>> 5) & MASK (19)) << 2) | ((insn
>> 29) & MASK (2));
48 /* Reencode the imm field of add immediate. */
49 static inline uint32_t
50 reencode_add_imm (uint32_t insn
, uint32_t imm
)
52 return (insn
& ~(MASK (12) << 10)) | ((imm
& MASK (12)) << 10);
55 /* Reencode the IMM field of ADR. */
58 _bfd_aarch64_reencode_adr_imm (uint32_t insn
, uint32_t imm
)
60 return (insn
& ~((MASK (2) << 29) | (MASK (19) << 5)))
61 | ((imm
& MASK (2)) << 29) | ((imm
& (MASK (19) << 2)) << 3);
64 /* Reencode the imm field of ld/st pos immediate. */
65 static inline uint32_t
66 reencode_ldst_pos_imm (uint32_t insn
, uint32_t imm
)
68 return (insn
& ~(MASK (12) << 10)) | ((imm
& MASK (12)) << 10);
71 /* Encode the 26-bit offset of unconditional branch. */
72 static inline uint32_t
73 reencode_branch_ofs_26 (uint32_t insn
, uint32_t ofs
)
75 return (insn
& ~MASK (26)) | (ofs
& MASK (26));
78 /* Encode the 19-bit offset of conditional branch and compare & branch. */
79 static inline uint32_t
80 reencode_cond_branch_ofs_19 (uint32_t insn
, uint32_t ofs
)
82 return (insn
& ~(MASK (19) << 5)) | ((ofs
& MASK (19)) << 5);
85 /* Decode the 19-bit offset of load literal. */
86 static inline uint32_t
87 reencode_ld_lit_ofs_19 (uint32_t insn
, uint32_t ofs
)
89 return (insn
& ~(MASK (19) << 5)) | ((ofs
& MASK (19)) << 5);
92 /* Encode the 14-bit offset of test & branch. */
93 static inline uint32_t
94 reencode_tst_branch_ofs_14 (uint32_t insn
, uint32_t ofs
)
96 return (insn
& ~(MASK (14) << 5)) | ((ofs
& MASK (14)) << 5);
99 /* Reencode the imm field of move wide. */
100 static inline uint32_t
101 reencode_movw_imm (uint32_t insn
, uint32_t imm
)
103 return (insn
& ~(MASK (16) << 5)) | ((imm
& MASK (16)) << 5);
106 /* Reencode mov[zn] to movz. */
107 static inline uint32_t
108 reencode_movzn_to_movz (uint32_t opcode
)
110 return opcode
| (1 << 30);
113 /* Reencode mov[zn] to movn. */
114 static inline uint32_t
115 reencode_movzn_to_movn (uint32_t opcode
)
117 return opcode
& ~(1 << 30);
120 /* Return non-zero if the indicated VALUE has overflowed the maximum
121 range expressible by a unsigned number with the indicated number of
124 static bfd_reloc_status_type
125 aarch64_unsigned_overflow (bfd_vma value
, unsigned int bits
)
128 if (bits
>= sizeof (bfd_vma
) * 8)
130 lim
= (bfd_vma
) 1 << bits
;
132 return bfd_reloc_overflow
;
136 /* Return non-zero if the indicated VALUE has overflowed the maximum
137 range expressible by an signed number with the indicated number of
140 static bfd_reloc_status_type
141 aarch64_signed_overflow (bfd_vma value
, unsigned int bits
)
143 bfd_signed_vma svalue
= (bfd_signed_vma
) value
;
146 if (bits
>= sizeof (bfd_vma
) * 8)
148 lim
= (bfd_signed_vma
) 1 << (bits
- 1);
149 if (svalue
< -lim
|| svalue
>= lim
)
150 return bfd_reloc_overflow
;
154 /* Insert the addend/value into the instruction or data object being
156 bfd_reloc_status_type
157 _bfd_aarch64_elf_put_addend (bfd
*abfd
,
158 bfd_byte
*address
, bfd_reloc_code_real_type r_type
,
159 reloc_howto_type
*howto
, bfd_signed_vma addend
)
161 bfd_reloc_status_type status
= bfd_reloc_ok
;
162 bfd_signed_vma old_addend
= addend
;
166 size
= bfd_get_reloc_size (howto
);
172 contents
= bfd_get_16 (abfd
, address
);
175 if (howto
->src_mask
!= 0xffffffff)
176 /* Must be 32-bit instruction, always little-endian. */
177 contents
= bfd_getl32 (address
);
179 /* Must be 32-bit data (endianness dependent). */
180 contents
= bfd_get_32 (abfd
, address
);
183 contents
= bfd_get_64 (abfd
, address
);
189 switch (howto
->complain_on_overflow
)
191 case complain_overflow_dont
:
193 case complain_overflow_signed
:
194 status
= aarch64_signed_overflow (addend
,
195 howto
->bitsize
+ howto
->rightshift
);
197 case complain_overflow_unsigned
:
198 status
= aarch64_unsigned_overflow (addend
,
199 howto
->bitsize
+ howto
->rightshift
);
201 case complain_overflow_bitfield
:
206 addend
>>= howto
->rightshift
;
210 case BFD_RELOC_AARCH64_CALL26
:
211 case BFD_RELOC_AARCH64_JUMP26
:
212 contents
= reencode_branch_ofs_26 (contents
, addend
);
215 case BFD_RELOC_AARCH64_BRANCH19
:
216 contents
= reencode_cond_branch_ofs_19 (contents
, addend
);
219 case BFD_RELOC_AARCH64_TSTBR14
:
220 contents
= reencode_tst_branch_ofs_14 (contents
, addend
);
223 case BFD_RELOC_AARCH64_GOT_LD_PREL19
:
224 case BFD_RELOC_AARCH64_LD_LO19_PCREL
:
225 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
:
226 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
:
227 if (old_addend
& ((1 << howto
->rightshift
) - 1))
228 return bfd_reloc_overflow
;
229 contents
= reencode_ld_lit_ofs_19 (contents
, addend
);
232 case BFD_RELOC_AARCH64_TLSDESC_CALL
:
235 case BFD_RELOC_AARCH64_ADR_GOT_PAGE
:
236 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
:
237 case BFD_RELOC_AARCH64_ADR_HI21_PCREL
:
238 case BFD_RELOC_AARCH64_ADR_LO21_PCREL
:
239 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
:
240 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
:
241 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
:
242 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
:
243 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
:
244 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
:
245 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
:
246 contents
= _bfd_aarch64_reencode_adr_imm (contents
, addend
);
249 case BFD_RELOC_AARCH64_ADD_LO12
:
250 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
:
251 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
:
252 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
:
253 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
:
254 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
:
255 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
:
256 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
:
257 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
:
258 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
:
259 /* Corresponds to: add rd, rn, #uimm12 to provide the low order
260 12 bits of the page offset following
261 BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
262 (pc-relative) page base. */
263 contents
= reencode_add_imm (contents
, addend
);
266 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
:
267 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
:
268 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
:
269 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
:
270 case BFD_RELOC_AARCH64_LDST128_LO12
:
271 case BFD_RELOC_AARCH64_LDST16_LO12
:
272 case BFD_RELOC_AARCH64_LDST32_LO12
:
273 case BFD_RELOC_AARCH64_LDST64_LO12
:
274 case BFD_RELOC_AARCH64_LDST8_LO12
:
275 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
:
276 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
:
277 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
:
278 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
:
279 if (old_addend
& ((1 << howto
->rightshift
) - 1))
280 return bfd_reloc_overflow
;
281 /* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
282 12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
283 which computes the (pc-relative) page base. */
284 contents
= reencode_ldst_pos_imm (contents
, addend
);
287 /* Group relocations to create high bits of a 16, 32, 48 or 64
288 bit signed data or abs address inline. Will change
289 instruction to MOVN or MOVZ depending on sign of calculated
292 case BFD_RELOC_AARCH64_MOVW_G0_S
:
293 case BFD_RELOC_AARCH64_MOVW_G1_S
:
294 case BFD_RELOC_AARCH64_MOVW_G2_S
:
295 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
:
296 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
:
297 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
:
298 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
:
299 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
:
300 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
:
301 /* NOTE: We can only come here with movz or movn. */
304 /* Force use of MOVN. */
306 contents
= reencode_movzn_to_movn (contents
);
310 /* Force use of MOVZ. */
311 contents
= reencode_movzn_to_movz (contents
);
315 /* Group relocations to create a 16, 32, 48 or 64 bit unsigned
316 data or abs address inline. */
318 case BFD_RELOC_AARCH64_MOVW_G0
:
319 case BFD_RELOC_AARCH64_MOVW_G0_NC
:
320 case BFD_RELOC_AARCH64_MOVW_G1
:
321 case BFD_RELOC_AARCH64_MOVW_G1_NC
:
322 case BFD_RELOC_AARCH64_MOVW_G2
:
323 case BFD_RELOC_AARCH64_MOVW_G2_NC
:
324 case BFD_RELOC_AARCH64_MOVW_G3
:
325 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
:
326 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
:
327 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
:
328 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
:
329 contents
= reencode_movw_imm (contents
, addend
);
333 /* Repack simple data */
334 if (howto
->dst_mask
& (howto
->dst_mask
+ 1))
335 return bfd_reloc_notsupported
;
337 contents
= ((contents
& ~howto
->dst_mask
) | (addend
& howto
->dst_mask
));
344 bfd_put_16 (abfd
, contents
, address
);
347 if (howto
->dst_mask
!= 0xffffffff)
348 /* must be 32-bit instruction, always little-endian */
349 bfd_putl32 (contents
, address
);
351 /* must be 32-bit data (endianness dependent) */
352 bfd_put_32 (abfd
, contents
, address
);
355 bfd_put_64 (abfd
, contents
, address
);
365 _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type
,
366 bfd_vma place
, bfd_vma value
,
367 bfd_vma addend
, bfd_boolean weak_undef_p
)
371 case BFD_RELOC_AARCH64_NONE
:
372 case BFD_RELOC_AARCH64_TLSDESC_CALL
:
375 case BFD_RELOC_AARCH64_16_PCREL
:
376 case BFD_RELOC_AARCH64_32_PCREL
:
377 case BFD_RELOC_AARCH64_64_PCREL
:
378 case BFD_RELOC_AARCH64_ADR_LO21_PCREL
:
379 case BFD_RELOC_AARCH64_BRANCH19
:
380 case BFD_RELOC_AARCH64_LD_LO19_PCREL
:
381 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
:
382 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
:
383 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
:
384 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
:
385 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
:
386 case BFD_RELOC_AARCH64_TSTBR14
:
389 value
= value
+ addend
- place
;
392 case BFD_RELOC_AARCH64_CALL26
:
393 case BFD_RELOC_AARCH64_JUMP26
:
394 value
= value
+ addend
- place
;
397 case BFD_RELOC_AARCH64_16
:
398 case BFD_RELOC_AARCH64_32
:
399 case BFD_RELOC_AARCH64_MOVW_G0
:
400 case BFD_RELOC_AARCH64_MOVW_G0_NC
:
401 case BFD_RELOC_AARCH64_MOVW_G0_S
:
402 case BFD_RELOC_AARCH64_MOVW_G1
:
403 case BFD_RELOC_AARCH64_MOVW_G1_NC
:
404 case BFD_RELOC_AARCH64_MOVW_G1_S
:
405 case BFD_RELOC_AARCH64_MOVW_G2
:
406 case BFD_RELOC_AARCH64_MOVW_G2_NC
:
407 case BFD_RELOC_AARCH64_MOVW_G2_S
:
408 case BFD_RELOC_AARCH64_MOVW_G3
:
409 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
:
410 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
:
411 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
:
412 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
:
413 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
:
414 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
:
415 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
:
416 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
:
417 value
= value
+ addend
;
420 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
:
421 case BFD_RELOC_AARCH64_ADR_HI21_PCREL
:
424 value
= PG (value
+ addend
) - PG (place
);
427 case BFD_RELOC_AARCH64_GOT_LD_PREL19
:
428 value
= value
+ addend
- place
;
431 case BFD_RELOC_AARCH64_ADR_GOT_PAGE
:
432 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
:
433 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
:
434 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
:
435 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
:
436 value
= PG (value
+ addend
) - PG (place
);
439 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
:
440 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
:
441 /* Caller must make sure addend is the base address of .got section. */
442 value
= value
- PG (addend
);
445 case BFD_RELOC_AARCH64_ADD_LO12
:
446 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
:
447 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
:
448 case BFD_RELOC_AARCH64_LDST128_LO12
:
449 case BFD_RELOC_AARCH64_LDST16_LO12
:
450 case BFD_RELOC_AARCH64_LDST32_LO12
:
451 case BFD_RELOC_AARCH64_LDST64_LO12
:
452 case BFD_RELOC_AARCH64_LDST8_LO12
:
453 case BFD_RELOC_AARCH64_TLSDESC_ADD
:
454 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
:
455 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
:
456 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
:
457 case BFD_RELOC_AARCH64_TLSDESC_LDR
:
458 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
:
459 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
:
460 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
:
461 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
:
462 value
= PG_OFFSET (value
+ addend
);
465 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
:
466 value
= value
+ addend
;
469 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
:
470 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
:
471 value
= (value
+ addend
) & (bfd_vma
) 0xffff0000;
473 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
:
474 /* Mask off low 12bits, keep all other high bits, so that the later
475 generic code could check whehter there is overflow. */
476 value
= (value
+ addend
) & ~(bfd_vma
) 0xfff;
479 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
:
480 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
:
481 value
= (value
+ addend
) & (bfd_vma
) 0xffff;
484 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
:
485 value
= (value
+ addend
) & ~(bfd_vma
) 0xffffffff;
486 value
-= place
& ~(bfd_vma
) 0xffffffff;
496 /* Hook called by the linker routine which adds symbols from an object
500 _bfd_aarch64_elf_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
501 Elf_Internal_Sym
*sym
,
502 const char **namep ATTRIBUTE_UNUSED
,
503 flagword
*flagsp ATTRIBUTE_UNUSED
,
504 asection
**secp ATTRIBUTE_UNUSED
,
505 bfd_vma
*valp ATTRIBUTE_UNUSED
)
507 if ((ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
508 || ELF_ST_BIND (sym
->st_info
) == STB_GNU_UNIQUE
)
509 && (abfd
->flags
& DYNAMIC
) == 0
510 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
511 elf_tdata (info
->output_bfd
)->has_gnu_symbols
= elf_gnu_symbol_any
;
516 /* Support for core dump NOTE sections. */
519 _bfd_aarch64_elf_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
524 switch (note
->descsz
)
529 case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */
531 elf_tdata (abfd
)->core
->signal
532 = bfd_get_16 (abfd
, note
->descdata
+ 12);
535 elf_tdata (abfd
)->core
->lwpid
536 = bfd_get_32 (abfd
, note
->descdata
+ 32);
545 /* Make a ".reg/999" section. */
546 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
547 size
, note
->descpos
+ offset
);
551 _bfd_aarch64_elf_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
553 switch (note
->descsz
)
558 case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */
559 elf_tdata (abfd
)->core
->pid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
560 elf_tdata (abfd
)->core
->program
561 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 40, 16);
562 elf_tdata (abfd
)->core
->command
563 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 56, 80);
566 /* Note that for some reason, a spurious space is tacked
567 onto the end of the args in some (at least one anyway)
568 implementations, so strip it off if it exists. */
571 char *command
= elf_tdata (abfd
)->core
->command
;
572 int n
= strlen (command
);
574 if (0 < n
&& command
[n
- 1] == ' ')
575 command
[n
- 1] = '\0';
582 _bfd_aarch64_elf_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
, int note_type
,
595 va_start (ap
, note_type
);
596 memset (data
, 0, sizeof (data
));
597 strncpy (data
+ 40, va_arg (ap
, const char *), 16);
598 strncpy (data
+ 56, va_arg (ap
, const char *), 80);
601 return elfcore_write_note (abfd
, buf
, bufsiz
, "CORE",
602 note_type
, data
, sizeof (data
));
613 va_start (ap
, note_type
);
614 memset (data
, 0, sizeof (data
));
615 pid
= va_arg (ap
, long);
616 bfd_put_32 (abfd
, pid
, data
+ 32);
617 cursig
= va_arg (ap
, int);
618 bfd_put_16 (abfd
, cursig
, data
+ 12);
619 greg
= va_arg (ap
, const void *);
620 memcpy (data
+ 112, greg
, 272);
623 return elfcore_write_note (abfd
, buf
, bufsiz
, "CORE",
624 note_type
, data
, sizeof (data
));