[AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
[deliverable/binutils-gdb.git] / bfd / elfxx-aarch64.c
1 /* AArch64-specific support for ELF.
2 Copyright (C) 2009-2015 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21 #include "sysdep.h"
22 #include "elfxx-aarch64.h"
23 #include <stdarg.h>
24 #include <string.h>
25
26 #define MASK(n) ((1u << (n)) - 1)
27
28 /* Sign-extend VALUE, which has the indicated number of BITS. */
29
30 bfd_signed_vma
31 _bfd_aarch64_sign_extend (bfd_vma value, int bits)
32 {
33 if (value & ((bfd_vma) 1 << (bits - 1)))
34 /* VALUE is negative. */
35 value |= ((bfd_vma) - 1) << bits;
36
37 return value;
38 }
39
40 /* Decode the IMM field of ADRP. */
41
42 uint32_t
43 _bfd_aarch64_decode_adrp_imm (uint32_t insn)
44 {
45 return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
46 }
47
48 /* Reencode the imm field of add immediate. */
49 static inline uint32_t
50 reencode_add_imm (uint32_t insn, uint32_t imm)
51 {
52 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
53 }
54
55 /* Reencode the IMM field of ADR. */
56
57 uint32_t
58 _bfd_aarch64_reencode_adr_imm (uint32_t insn, uint32_t imm)
59 {
60 return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
61 | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
62 }
63
64 /* Reencode the imm field of ld/st pos immediate. */
65 static inline uint32_t
66 reencode_ldst_pos_imm (uint32_t insn, uint32_t imm)
67 {
68 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
69 }
70
71 /* Encode the 26-bit offset of unconditional branch. */
72 static inline uint32_t
73 reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs)
74 {
75 return (insn & ~MASK (26)) | (ofs & MASK (26));
76 }
77
78 /* Encode the 19-bit offset of conditional branch and compare & branch. */
79 static inline uint32_t
80 reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs)
81 {
82 return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
83 }
84
85 /* Decode the 19-bit offset of load literal. */
86 static inline uint32_t
87 reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs)
88 {
89 return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
90 }
91
92 /* Encode the 14-bit offset of test & branch. */
93 static inline uint32_t
94 reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs)
95 {
96 return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5);
97 }
98
99 /* Reencode the imm field of move wide. */
100 static inline uint32_t
101 reencode_movw_imm (uint32_t insn, uint32_t imm)
102 {
103 return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5);
104 }
105
106 /* Reencode mov[zn] to movz. */
107 static inline uint32_t
108 reencode_movzn_to_movz (uint32_t opcode)
109 {
110 return opcode | (1 << 30);
111 }
112
113 /* Reencode mov[zn] to movn. */
114 static inline uint32_t
115 reencode_movzn_to_movn (uint32_t opcode)
116 {
117 return opcode & ~(1 << 30);
118 }
119
120 /* Return non-zero if the indicated VALUE has overflowed the maximum
121 range expressible by a unsigned number with the indicated number of
122 BITS. */
123
124 static bfd_reloc_status_type
125 aarch64_unsigned_overflow (bfd_vma value, unsigned int bits)
126 {
127 bfd_vma lim;
128 if (bits >= sizeof (bfd_vma) * 8)
129 return bfd_reloc_ok;
130 lim = (bfd_vma) 1 << bits;
131 if (value >= lim)
132 return bfd_reloc_overflow;
133 return bfd_reloc_ok;
134 }
135
136 /* Return non-zero if the indicated VALUE has overflowed the maximum
137 range expressible by an signed number with the indicated number of
138 BITS. */
139
140 static bfd_reloc_status_type
141 aarch64_signed_overflow (bfd_vma value, unsigned int bits)
142 {
143 bfd_signed_vma svalue = (bfd_signed_vma) value;
144 bfd_signed_vma lim;
145
146 if (bits >= sizeof (bfd_vma) * 8)
147 return bfd_reloc_ok;
148 lim = (bfd_signed_vma) 1 << (bits - 1);
149 if (svalue < -lim || svalue >= lim)
150 return bfd_reloc_overflow;
151 return bfd_reloc_ok;
152 }
153
154 /* Insert the addend/value into the instruction or data object being
155 relocated. */
156 bfd_reloc_status_type
157 _bfd_aarch64_elf_put_addend (bfd *abfd,
158 bfd_byte *address, bfd_reloc_code_real_type r_type,
159 reloc_howto_type *howto, bfd_signed_vma addend)
160 {
161 bfd_reloc_status_type status = bfd_reloc_ok;
162 bfd_signed_vma old_addend = addend;
163 bfd_vma contents;
164 int size;
165
166 size = bfd_get_reloc_size (howto);
167 switch (size)
168 {
169 case 0:
170 return status;
171 case 2:
172 contents = bfd_get_16 (abfd, address);
173 break;
174 case 4:
175 if (howto->src_mask != 0xffffffff)
176 /* Must be 32-bit instruction, always little-endian. */
177 contents = bfd_getl32 (address);
178 else
179 /* Must be 32-bit data (endianness dependent). */
180 contents = bfd_get_32 (abfd, address);
181 break;
182 case 8:
183 contents = bfd_get_64 (abfd, address);
184 break;
185 default:
186 abort ();
187 }
188
189 switch (howto->complain_on_overflow)
190 {
191 case complain_overflow_dont:
192 break;
193 case complain_overflow_signed:
194 status = aarch64_signed_overflow (addend,
195 howto->bitsize + howto->rightshift);
196 break;
197 case complain_overflow_unsigned:
198 status = aarch64_unsigned_overflow (addend,
199 howto->bitsize + howto->rightshift);
200 break;
201 case complain_overflow_bitfield:
202 default:
203 abort ();
204 }
205
206 addend >>= howto->rightshift;
207
208 switch (r_type)
209 {
210 case BFD_RELOC_AARCH64_CALL26:
211 case BFD_RELOC_AARCH64_JUMP26:
212 contents = reencode_branch_ofs_26 (contents, addend);
213 break;
214
215 case BFD_RELOC_AARCH64_BRANCH19:
216 contents = reencode_cond_branch_ofs_19 (contents, addend);
217 break;
218
219 case BFD_RELOC_AARCH64_TSTBR14:
220 contents = reencode_tst_branch_ofs_14 (contents, addend);
221 break;
222
223 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
224 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
225 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
226 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
227 if (old_addend & ((1 << howto->rightshift) - 1))
228 return bfd_reloc_overflow;
229 contents = reencode_ld_lit_ofs_19 (contents, addend);
230 break;
231
232 case BFD_RELOC_AARCH64_TLSDESC_CALL:
233 break;
234
235 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
236 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
237 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
238 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
239 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
240 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
241 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
242 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
243 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
244 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
245 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
246 contents = _bfd_aarch64_reencode_adr_imm (contents, addend);
247 break;
248
249 case BFD_RELOC_AARCH64_ADD_LO12:
250 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
251 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
252 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
253 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
254 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
255 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
256 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
257 /* Corresponds to: add rd, rn, #uimm12 to provide the low order
258 12 bits of the page offset following
259 BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
260 (pc-relative) page base. */
261 contents = reencode_add_imm (contents, addend);
262 break;
263
264 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
265 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
266 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
267 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
268 case BFD_RELOC_AARCH64_LDST128_LO12:
269 case BFD_RELOC_AARCH64_LDST16_LO12:
270 case BFD_RELOC_AARCH64_LDST32_LO12:
271 case BFD_RELOC_AARCH64_LDST64_LO12:
272 case BFD_RELOC_AARCH64_LDST8_LO12:
273 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
274 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
275 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
276 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
277 if (old_addend & ((1 << howto->rightshift) - 1))
278 return bfd_reloc_overflow;
279 /* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
280 12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
281 which computes the (pc-relative) page base. */
282 contents = reencode_ldst_pos_imm (contents, addend);
283 break;
284
285 /* Group relocations to create high bits of a 16, 32, 48 or 64
286 bit signed data or abs address inline. Will change
287 instruction to MOVN or MOVZ depending on sign of calculated
288 value. */
289
290 case BFD_RELOC_AARCH64_MOVW_G0_S:
291 case BFD_RELOC_AARCH64_MOVW_G1_S:
292 case BFD_RELOC_AARCH64_MOVW_G2_S:
293 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
294 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
295 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
296 /* NOTE: We can only come here with movz or movn. */
297 if (addend < 0)
298 {
299 /* Force use of MOVN. */
300 addend = ~addend;
301 contents = reencode_movzn_to_movn (contents);
302 }
303 else
304 {
305 /* Force use of MOVZ. */
306 contents = reencode_movzn_to_movz (contents);
307 }
308 /* fall through */
309
310 /* Group relocations to create a 16, 32, 48 or 64 bit unsigned
311 data or abs address inline. */
312
313 case BFD_RELOC_AARCH64_MOVW_G0:
314 case BFD_RELOC_AARCH64_MOVW_G0_NC:
315 case BFD_RELOC_AARCH64_MOVW_G1:
316 case BFD_RELOC_AARCH64_MOVW_G1_NC:
317 case BFD_RELOC_AARCH64_MOVW_G2:
318 case BFD_RELOC_AARCH64_MOVW_G2_NC:
319 case BFD_RELOC_AARCH64_MOVW_G3:
320 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
321 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
322 contents = reencode_movw_imm (contents, addend);
323 break;
324
325 default:
326 /* Repack simple data */
327 if (howto->dst_mask & (howto->dst_mask + 1))
328 return bfd_reloc_notsupported;
329
330 contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask));
331 break;
332 }
333
334 switch (size)
335 {
336 case 2:
337 bfd_put_16 (abfd, contents, address);
338 break;
339 case 4:
340 if (howto->dst_mask != 0xffffffff)
341 /* must be 32-bit instruction, always little-endian */
342 bfd_putl32 (contents, address);
343 else
344 /* must be 32-bit data (endianness dependent) */
345 bfd_put_32 (abfd, contents, address);
346 break;
347 case 8:
348 bfd_put_64 (abfd, contents, address);
349 break;
350 default:
351 abort ();
352 }
353
354 return status;
355 }
356
357 bfd_vma
358 _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
359 bfd_vma place, bfd_vma value,
360 bfd_vma addend, bfd_boolean weak_undef_p)
361 {
362 switch (r_type)
363 {
364 case BFD_RELOC_AARCH64_NONE:
365 case BFD_RELOC_AARCH64_TLSDESC_CALL:
366 break;
367
368 case BFD_RELOC_AARCH64_16_PCREL:
369 case BFD_RELOC_AARCH64_32_PCREL:
370 case BFD_RELOC_AARCH64_64_PCREL:
371 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
372 case BFD_RELOC_AARCH64_BRANCH19:
373 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
374 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
375 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
376 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
377 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
378 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
379 case BFD_RELOC_AARCH64_TSTBR14:
380 if (weak_undef_p)
381 value = place;
382 value = value + addend - place;
383 break;
384
385 case BFD_RELOC_AARCH64_CALL26:
386 case BFD_RELOC_AARCH64_JUMP26:
387 value = value + addend - place;
388 break;
389
390 case BFD_RELOC_AARCH64_16:
391 case BFD_RELOC_AARCH64_32:
392 case BFD_RELOC_AARCH64_MOVW_G0:
393 case BFD_RELOC_AARCH64_MOVW_G0_NC:
394 case BFD_RELOC_AARCH64_MOVW_G0_S:
395 case BFD_RELOC_AARCH64_MOVW_G1:
396 case BFD_RELOC_AARCH64_MOVW_G1_NC:
397 case BFD_RELOC_AARCH64_MOVW_G1_S:
398 case BFD_RELOC_AARCH64_MOVW_G2:
399 case BFD_RELOC_AARCH64_MOVW_G2_NC:
400 case BFD_RELOC_AARCH64_MOVW_G2_S:
401 case BFD_RELOC_AARCH64_MOVW_G3:
402 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
403 value = value + addend;
404 break;
405
406 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
407 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
408 if (weak_undef_p)
409 value = PG (place);
410 value = PG (value + addend) - PG (place);
411 break;
412
413 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
414 value = value + addend - place;
415 break;
416
417 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
418 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
419 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
420 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
421 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
422 value = PG (value + addend) - PG (place);
423 break;
424
425 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
426 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
427 /* Caller must make sure addend is the base address of .got section. */
428 value = value - PG (addend);
429 break;
430
431 case BFD_RELOC_AARCH64_ADD_LO12:
432 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
433 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
434 case BFD_RELOC_AARCH64_LDST128_LO12:
435 case BFD_RELOC_AARCH64_LDST16_LO12:
436 case BFD_RELOC_AARCH64_LDST32_LO12:
437 case BFD_RELOC_AARCH64_LDST64_LO12:
438 case BFD_RELOC_AARCH64_LDST8_LO12:
439 case BFD_RELOC_AARCH64_TLSDESC_ADD:
440 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
441 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
442 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
443 case BFD_RELOC_AARCH64_TLSDESC_LDR:
444 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
445 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
446 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
447 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
448 value = PG_OFFSET (value + addend);
449 break;
450
451 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
452 value = value + addend;
453 break;
454
455 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
456 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
457 value = (value + addend) & (bfd_vma) 0xffff0000;
458 break;
459 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
460 /* Mask off low 12bits, keep all other high bits, so that the later
461 generic code could check whehter there is overflow. */
462 value = (value + addend) & ~(bfd_vma) 0xfff;
463 break;
464
465 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
466 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
467 value = (value + addend) & (bfd_vma) 0xffff;
468 break;
469
470 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
471 value = (value + addend) & ~(bfd_vma) 0xffffffff;
472 value -= place & ~(bfd_vma) 0xffffffff;
473 break;
474
475 default:
476 break;
477 }
478
479 return value;
480 }
481
482 /* Hook called by the linker routine which adds symbols from an object
483 file. */
484
485 bfd_boolean
486 _bfd_aarch64_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
487 Elf_Internal_Sym *sym,
488 const char **namep ATTRIBUTE_UNUSED,
489 flagword *flagsp ATTRIBUTE_UNUSED,
490 asection **secp ATTRIBUTE_UNUSED,
491 bfd_vma *valp ATTRIBUTE_UNUSED)
492 {
493 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
494 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
495 && (abfd->flags & DYNAMIC) == 0
496 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
497 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
498
499 return TRUE;
500 }
501
502 /* Support for core dump NOTE sections. */
503
504 bfd_boolean
505 _bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
506 {
507 int offset;
508 size_t size;
509
510 switch (note->descsz)
511 {
512 default:
513 return FALSE;
514
515 case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */
516 /* pr_cursig */
517 elf_tdata (abfd)->core->signal
518 = bfd_get_16 (abfd, note->descdata + 12);
519
520 /* pr_pid */
521 elf_tdata (abfd)->core->lwpid
522 = bfd_get_32 (abfd, note->descdata + 32);
523
524 /* pr_reg */
525 offset = 112;
526 size = 272;
527
528 break;
529 }
530
531 /* Make a ".reg/999" section. */
532 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
533 size, note->descpos + offset);
534 }
535
536 bfd_boolean
537 _bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
538 {
539 switch (note->descsz)
540 {
541 default:
542 return FALSE;
543
544 case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */
545 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
546 elf_tdata (abfd)->core->program
547 = _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
548 elf_tdata (abfd)->core->command
549 = _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
550 }
551
552 /* Note that for some reason, a spurious space is tacked
553 onto the end of the args in some (at least one anyway)
554 implementations, so strip it off if it exists. */
555
556 {
557 char *command = elf_tdata (abfd)->core->command;
558 int n = strlen (command);
559
560 if (0 < n && command[n - 1] == ' ')
561 command[n - 1] = '\0';
562 }
563
564 return TRUE;
565 }
566
567 char *
568 _bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
569 ...)
570 {
571 switch (note_type)
572 {
573 default:
574 return NULL;
575
576 case NT_PRPSINFO:
577 {
578 char data[136];
579 va_list ap;
580
581 va_start (ap, note_type);
582 memset (data, 0, sizeof (data));
583 strncpy (data + 40, va_arg (ap, const char *), 16);
584 strncpy (data + 56, va_arg (ap, const char *), 80);
585 va_end (ap);
586
587 return elfcore_write_note (abfd, buf, bufsiz, "CORE",
588 note_type, data, sizeof (data));
589 }
590
591 case NT_PRSTATUS:
592 {
593 char data[392];
594 va_list ap;
595 long pid;
596 int cursig;
597 const void *greg;
598
599 va_start (ap, note_type);
600 memset (data, 0, sizeof (data));
601 pid = va_arg (ap, long);
602 bfd_put_32 (abfd, pid, data + 32);
603 cursig = va_arg (ap, int);
604 bfd_put_16 (abfd, cursig, data + 12);
605 greg = va_arg (ap, const void *);
606 memcpy (data + 112, greg, 272);
607 va_end (ap);
608
609 return elfcore_write_note (abfd, buf, bufsiz, "CORE",
610 note_type, data, sizeof (data));
611 }
612 }
613 }
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