1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
28 BFD maintains relocations in much the same way it maintains
29 symbols: they are left alone until required, then read in
30 en-masse and translated into an internal form. A common
31 routine <<bfd_perform_relocation>> acts upon the
32 canonical form to do the fixup.
34 Relocations are maintained on a per section basis,
35 while symbols are maintained on a per BFD basis.
37 All that a back end has to do to fit the BFD interface is to create
38 a <<struct reloc_cache_entry>> for each relocation
39 in a particular section, and fill in the right bits of the structures.
48 /* DO compile in the reloc_code name table from libbfd.h. */
49 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
58 typedef arelent, howto manager, Relocations, Relocations
63 This is the structure of a relocation entry:
67 .typedef enum bfd_reloc_status
69 . {* No errors detected. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok - presently
91 . generated only when linking i960 coff files with i960 b.out
92 . symbols. If this type is returned, the error_message argument
93 . to bfd_perform_relocation will be set. *}
96 . bfd_reloc_status_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct bfd_symbol; {* Forward declaration. *}
285 .struct reloc_howto_struct
287 . {* The type field has mainly a documentary use - the back end can
288 . do what it wants with it, though normally the back end's
289 . external idea of what a reloc number is stored
290 . in this field. For example, a PC relative word relocation
291 . in a coff environment has the type 023 - because that's
292 . what the outside world calls a R_PCRWORD reloc. *}
295 . {* The value the final relocation is shifted right by. This drops
296 . unwanted data from the relocation. *}
297 . unsigned int rightshift;
299 . {* The size of the item to be relocated. This is *not* a
300 . power-of-two measure. To get the number of bytes operated
301 . on by a type of relocation, use bfd_get_reloc_size. *}
304 . {* The number of bits in the item to be relocated. This is used
305 . when doing overflow checking. *}
306 . unsigned int bitsize;
308 . {* The relocation is relative to the field being relocated. *}
309 . bfd_boolean pc_relative;
311 . {* The bit position of the reloc value in the destination.
312 . The relocated value is left shifted by this amount. *}
313 . unsigned int bitpos;
315 . {* What type of overflow error should be checked for when
317 . enum complain_overflow complain_on_overflow;
319 . {* If this field is non null, then the supplied function is
320 . called rather than the normal function. This allows really
321 . strange relocation methods to be accommodated (e.g., i960 callj
323 . bfd_reloc_status_type (*special_function)
324 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
327 . {* The textual name of the relocation type. *}
330 . {* Some formats record a relocation addend in the section contents
331 . rather than with the relocation. For ELF formats this is the
332 . distinction between USE_REL and USE_RELA (though the code checks
333 . for USE_REL == 1/0). The value of this field is TRUE if the
334 . addend is recorded with the section contents; when performing a
335 . partial link (ld -r) the section contents (the data) will be
336 . modified. The value of this field is FALSE if addends are
337 . recorded with the relocation (in arelent.addend); when performing
338 . a partial link the relocation will be modified.
339 . All relocations for all ELF USE_RELA targets should set this field
340 . to FALSE (values of TRUE should be looked on with suspicion).
341 . However, the converse is not true: not all relocations of all ELF
342 . USE_REL targets set this field to TRUE. Why this is so is peculiar
343 . to each particular target. For relocs that aren't used in partial
344 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
345 . bfd_boolean partial_inplace;
347 . {* src_mask selects the part of the instruction (or data) to be used
348 . in the relocation sum. If the target relocations don't have an
349 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
350 . dst_mask to extract the addend from the section contents. If
351 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
352 . field should be zero. Non-zero values for ELF USE_RELA targets are
353 . bogus as in those cases the value in the dst_mask part of the
354 . section contents should be treated as garbage. *}
357 . {* dst_mask selects which parts of the instruction (or data) are
358 . replaced with a relocated value. *}
361 . {* When some formats create PC relative instructions, they leave
362 . the value of the pc of the place being relocated in the offset
363 . slot of the instruction, so that a PC relative relocation can
364 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
365 . Some formats leave the displacement part of an instruction
366 . empty (e.g., m88k bcs); this flag signals the fact. *}
367 . bfd_boolean pcrel_offset;
377 The HOWTO define is horrible and will go away.
379 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
380 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
383 And will be replaced with the totally magic way. But for the
384 moment, we are compatible, so do it this way.
386 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
387 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
388 . NAME, FALSE, 0, 0, IN)
392 This is used to fill in an empty howto entry in an array.
394 .#define EMPTY_HOWTO(C) \
395 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
396 . NULL, FALSE, 0, 0, FALSE)
400 Helper routine to turn a symbol into a relocation value.
402 .#define HOWTO_PREPARE(relocation, symbol) \
404 . if (symbol != NULL) \
406 . if (bfd_is_com_section (symbol->section)) \
412 . relocation = symbol->value; \
424 unsigned int bfd_get_reloc_size (reloc_howto_type *);
427 For a reloc_howto_type that operates on a fixed number of bytes,
428 this returns the number of bytes operated on.
432 bfd_get_reloc_size (reloc_howto_type
*howto
)
453 How relocs are tied together in an <<asection>>:
455 .typedef struct relent_chain
458 . struct relent_chain *next;
464 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
465 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
472 bfd_reloc_status_type bfd_check_overflow
473 (enum complain_overflow how,
474 unsigned int bitsize,
475 unsigned int rightshift,
476 unsigned int addrsize,
480 Perform overflow checking on @var{relocation} which has
481 @var{bitsize} significant bits and will be shifted right by
482 @var{rightshift} bits, on a machine with addresses containing
483 @var{addrsize} significant bits. The result is either of
484 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
488 bfd_reloc_status_type
489 bfd_check_overflow (enum complain_overflow how
,
490 unsigned int bitsize
,
491 unsigned int rightshift
,
492 unsigned int addrsize
,
495 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
496 bfd_reloc_status_type flag
= bfd_reloc_ok
;
498 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
499 we'll be permissive: extra bits in the field mask will
500 automatically extend the address mask for purposes of the
502 fieldmask
= N_ONES (bitsize
);
503 signmask
= ~fieldmask
;
504 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
505 a
= (relocation
& addrmask
) >> rightshift
;;
509 case complain_overflow_dont
:
512 case complain_overflow_signed
:
513 /* If any sign bits are set, all sign bits must be set. That
514 is, A must be a valid negative address after shifting. */
515 signmask
= ~ (fieldmask
>> 1);
518 case complain_overflow_bitfield
:
519 /* Bitfields are sometimes signed, sometimes unsigned. We
520 explicitly allow an address wrap too, which means a bitfield
521 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
522 if the value has some, but not all, bits set outside the
525 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
526 flag
= bfd_reloc_overflow
;
529 case complain_overflow_unsigned
:
530 /* We have an overflow if the address does not fit in the field. */
531 if ((a
& signmask
) != 0)
532 flag
= bfd_reloc_overflow
;
544 bfd_perform_relocation
547 bfd_reloc_status_type bfd_perform_relocation
549 arelent *reloc_entry,
551 asection *input_section,
553 char **error_message);
556 If @var{output_bfd} is supplied to this function, the
557 generated image will be relocatable; the relocations are
558 copied to the output file after they have been changed to
559 reflect the new state of the world. There are two ways of
560 reflecting the results of partial linkage in an output file:
561 by modifying the output data in place, and by modifying the
562 relocation record. Some native formats (e.g., basic a.out and
563 basic coff) have no way of specifying an addend in the
564 relocation type, so the addend has to go in the output data.
565 This is no big deal since in these formats the output data
566 slot will always be big enough for the addend. Complex reloc
567 types with addends were invented to solve just this problem.
568 The @var{error_message} argument is set to an error message if
569 this return @code{bfd_reloc_dangerous}.
573 bfd_reloc_status_type
574 bfd_perform_relocation (bfd
*abfd
,
575 arelent
*reloc_entry
,
577 asection
*input_section
,
579 char **error_message
)
582 bfd_reloc_status_type flag
= bfd_reloc_ok
;
583 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
584 bfd_vma output_base
= 0;
585 reloc_howto_type
*howto
= reloc_entry
->howto
;
586 asection
*reloc_target_output_section
;
589 symbol
= *(reloc_entry
->sym_ptr_ptr
);
590 if (bfd_is_abs_section (symbol
->section
)
591 && output_bfd
!= NULL
)
593 reloc_entry
->address
+= input_section
->output_offset
;
597 /* If we are not producing relocatable output, return an error if
598 the symbol is not defined. An undefined weak symbol is
599 considered to have a value of zero (SVR4 ABI, p. 4-27). */
600 if (bfd_is_und_section (symbol
->section
)
601 && (symbol
->flags
& BSF_WEAK
) == 0
602 && output_bfd
== NULL
)
603 flag
= bfd_reloc_undefined
;
605 /* If there is a function supplied to handle this relocation type,
606 call it. It'll return `bfd_reloc_continue' if further processing
608 if (howto
->special_function
)
610 bfd_reloc_status_type cont
;
611 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
612 input_section
, output_bfd
,
614 if (cont
!= bfd_reloc_continue
)
618 /* Is the address of the relocation really within the section? */
619 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
620 return bfd_reloc_outofrange
;
622 /* Work out which section the relocation is targeted at and the
623 initial relocation command value. */
625 /* Get symbol value. (Common symbols are special.) */
626 if (bfd_is_com_section (symbol
->section
))
629 relocation
= symbol
->value
;
631 reloc_target_output_section
= symbol
->section
->output_section
;
633 /* Convert input-section-relative symbol value to absolute. */
634 if ((output_bfd
&& ! howto
->partial_inplace
)
635 || reloc_target_output_section
== NULL
)
638 output_base
= reloc_target_output_section
->vma
;
640 relocation
+= output_base
+ symbol
->section
->output_offset
;
642 /* Add in supplied addend. */
643 relocation
+= reloc_entry
->addend
;
645 /* Here the variable relocation holds the final address of the
646 symbol we are relocating against, plus any addend. */
648 if (howto
->pc_relative
)
650 /* This is a PC relative relocation. We want to set RELOCATION
651 to the distance between the address of the symbol and the
652 location. RELOCATION is already the address of the symbol.
654 We start by subtracting the address of the section containing
657 If pcrel_offset is set, we must further subtract the position
658 of the location within the section. Some targets arrange for
659 the addend to be the negative of the position of the location
660 within the section; for example, i386-aout does this. For
661 i386-aout, pcrel_offset is FALSE. Some other targets do not
662 include the position of the location; for example, m88kbcs,
663 or ELF. For those targets, pcrel_offset is TRUE.
665 If we are producing relocatable output, then we must ensure
666 that this reloc will be correctly computed when the final
667 relocation is done. If pcrel_offset is FALSE we want to wind
668 up with the negative of the location within the section,
669 which means we must adjust the existing addend by the change
670 in the location within the section. If pcrel_offset is TRUE
671 we do not want to adjust the existing addend at all.
673 FIXME: This seems logical to me, but for the case of
674 producing relocatable output it is not what the code
675 actually does. I don't want to change it, because it seems
676 far too likely that something will break. */
679 input_section
->output_section
->vma
+ input_section
->output_offset
;
681 if (howto
->pcrel_offset
)
682 relocation
-= reloc_entry
->address
;
685 if (output_bfd
!= NULL
)
687 if (! howto
->partial_inplace
)
689 /* This is a partial relocation, and we want to apply the relocation
690 to the reloc entry rather than the raw data. Modify the reloc
691 inplace to reflect what we now know. */
692 reloc_entry
->addend
= relocation
;
693 reloc_entry
->address
+= input_section
->output_offset
;
698 /* This is a partial relocation, but inplace, so modify the
701 If we've relocated with a symbol with a section, change
702 into a ref to the section belonging to the symbol. */
704 reloc_entry
->address
+= input_section
->output_offset
;
707 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
708 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
709 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
711 /* For m68k-coff, the addend was being subtracted twice during
712 relocation with -r. Removing the line below this comment
713 fixes that problem; see PR 2953.
715 However, Ian wrote the following, regarding removing the line below,
716 which explains why it is still enabled: --djm
718 If you put a patch like that into BFD you need to check all the COFF
719 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
720 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
721 problem in a different way. There may very well be a reason that the
722 code works as it does.
724 Hmmm. The first obvious point is that bfd_perform_relocation should
725 not have any tests that depend upon the flavour. It's seem like
726 entirely the wrong place for such a thing. The second obvious point
727 is that the current code ignores the reloc addend when producing
728 relocatable output for COFF. That's peculiar. In fact, I really
729 have no idea what the point of the line you want to remove is.
731 A typical COFF reloc subtracts the old value of the symbol and adds in
732 the new value to the location in the object file (if it's a pc
733 relative reloc it adds the difference between the symbol value and the
734 location). When relocating we need to preserve that property.
736 BFD handles this by setting the addend to the negative of the old
737 value of the symbol. Unfortunately it handles common symbols in a
738 non-standard way (it doesn't subtract the old value) but that's a
739 different story (we can't change it without losing backward
740 compatibility with old object files) (coff-i386 does subtract the old
741 value, to be compatible with existing coff-i386 targets, like SCO).
743 So everything works fine when not producing relocatable output. When
744 we are producing relocatable output, logically we should do exactly
745 what we do when not producing relocatable output. Therefore, your
746 patch is correct. In fact, it should probably always just set
747 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
748 add the value into the object file. This won't hurt the COFF code,
749 which doesn't use the addend; I'm not sure what it will do to other
750 formats (the thing to check for would be whether any formats both use
751 the addend and set partial_inplace).
753 When I wanted to make coff-i386 produce relocatable output, I ran
754 into the problem that you are running into: I wanted to remove that
755 line. Rather than risk it, I made the coff-i386 relocs use a special
756 function; it's coff_i386_reloc in coff-i386.c. The function
757 specifically adds the addend field into the object file, knowing that
758 bfd_perform_relocation is not going to. If you remove that line, then
759 coff-i386.c will wind up adding the addend field in twice. It's
760 trivial to fix; it just needs to be done.
762 The problem with removing the line is just that it may break some
763 working code. With BFD it's hard to be sure of anything. The right
764 way to deal with this is simply to build and test at least all the
765 supported COFF targets. It should be straightforward if time and disk
766 space consuming. For each target:
768 2) generate some executable, and link it using -r (I would
769 probably use paranoia.o and link against newlib/libc.a, which
770 for all the supported targets would be available in
771 /usr/cygnus/progressive/H-host/target/lib/libc.a).
772 3) make the change to reloc.c
773 4) rebuild the linker
775 6) if the resulting object files are the same, you have at least
777 7) if they are different you have to figure out which version is
780 relocation
-= reloc_entry
->addend
;
781 reloc_entry
->addend
= 0;
785 reloc_entry
->addend
= relocation
;
791 reloc_entry
->addend
= 0;
794 /* FIXME: This overflow checking is incomplete, because the value
795 might have overflowed before we get here. For a correct check we
796 need to compute the value in a size larger than bitsize, but we
797 can't reasonably do that for a reloc the same size as a host
799 FIXME: We should also do overflow checking on the result after
800 adding in the value contained in the object file. */
801 if (howto
->complain_on_overflow
!= complain_overflow_dont
802 && flag
== bfd_reloc_ok
)
803 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
806 bfd_arch_bits_per_address (abfd
),
809 /* Either we are relocating all the way, or we don't want to apply
810 the relocation to the reloc entry (probably because there isn't
811 any room in the output format to describe addends to relocs). */
813 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
814 (OSF version 1.3, compiler version 3.11). It miscompiles the
828 x <<= (unsigned long) s.i0;
832 printf ("succeeded (%lx)\n", x);
836 relocation
>>= (bfd_vma
) howto
->rightshift
;
838 /* Shift everything up to where it's going to be used. */
839 relocation
<<= (bfd_vma
) howto
->bitpos
;
841 /* Wait for the day when all have the mask in them. */
844 i instruction to be left alone
845 o offset within instruction
846 r relocation offset to apply
855 (( i i i i i o o o o o from bfd_get<size>
856 and S S S S S) to get the size offset we want
857 + r r r r r r r r r r) to get the final value to place
858 and D D D D D to chop to right size
859 -----------------------
862 ( i i i i i o o o o o from bfd_get<size>
863 and N N N N N ) get instruction
864 -----------------------
870 -----------------------
871 = R R R R R R R R R R put into bfd_put<size>
875 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
881 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
883 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
889 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
891 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
896 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
898 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
903 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
904 relocation
= -relocation
;
906 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
912 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
913 relocation
= -relocation
;
915 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
926 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
928 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
935 return bfd_reloc_other
;
943 bfd_install_relocation
946 bfd_reloc_status_type bfd_install_relocation
948 arelent *reloc_entry,
949 void *data, bfd_vma data_start,
950 asection *input_section,
951 char **error_message);
954 This looks remarkably like <<bfd_perform_relocation>>, except it
955 does not expect that the section contents have been filled in.
956 I.e., it's suitable for use when creating, rather than applying
959 For now, this function should be considered reserved for the
963 bfd_reloc_status_type
964 bfd_install_relocation (bfd
*abfd
,
965 arelent
*reloc_entry
,
967 bfd_vma data_start_offset
,
968 asection
*input_section
,
969 char **error_message
)
972 bfd_reloc_status_type flag
= bfd_reloc_ok
;
973 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
974 bfd_vma output_base
= 0;
975 reloc_howto_type
*howto
= reloc_entry
->howto
;
976 asection
*reloc_target_output_section
;
980 symbol
= *(reloc_entry
->sym_ptr_ptr
);
981 if (bfd_is_abs_section (symbol
->section
))
983 reloc_entry
->address
+= input_section
->output_offset
;
987 /* If there is a function supplied to handle this relocation type,
988 call it. It'll return `bfd_reloc_continue' if further processing
990 if (howto
->special_function
)
992 bfd_reloc_status_type cont
;
994 /* XXX - The special_function calls haven't been fixed up to deal
995 with creating new relocations and section contents. */
996 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
997 /* XXX - Non-portable! */
998 ((bfd_byte
*) data_start
999 - data_start_offset
),
1000 input_section
, abfd
, error_message
);
1001 if (cont
!= bfd_reloc_continue
)
1005 /* Is the address of the relocation really within the section? */
1006 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1007 return bfd_reloc_outofrange
;
1009 /* Work out which section the relocation is targeted at and the
1010 initial relocation command value. */
1012 /* Get symbol value. (Common symbols are special.) */
1013 if (bfd_is_com_section (symbol
->section
))
1016 relocation
= symbol
->value
;
1018 reloc_target_output_section
= symbol
->section
->output_section
;
1020 /* Convert input-section-relative symbol value to absolute. */
1021 if (! howto
->partial_inplace
)
1024 output_base
= reloc_target_output_section
->vma
;
1026 relocation
+= output_base
+ symbol
->section
->output_offset
;
1028 /* Add in supplied addend. */
1029 relocation
+= reloc_entry
->addend
;
1031 /* Here the variable relocation holds the final address of the
1032 symbol we are relocating against, plus any addend. */
1034 if (howto
->pc_relative
)
1036 /* This is a PC relative relocation. We want to set RELOCATION
1037 to the distance between the address of the symbol and the
1038 location. RELOCATION is already the address of the symbol.
1040 We start by subtracting the address of the section containing
1043 If pcrel_offset is set, we must further subtract the position
1044 of the location within the section. Some targets arrange for
1045 the addend to be the negative of the position of the location
1046 within the section; for example, i386-aout does this. For
1047 i386-aout, pcrel_offset is FALSE. Some other targets do not
1048 include the position of the location; for example, m88kbcs,
1049 or ELF. For those targets, pcrel_offset is TRUE.
1051 If we are producing relocatable output, then we must ensure
1052 that this reloc will be correctly computed when the final
1053 relocation is done. If pcrel_offset is FALSE we want to wind
1054 up with the negative of the location within the section,
1055 which means we must adjust the existing addend by the change
1056 in the location within the section. If pcrel_offset is TRUE
1057 we do not want to adjust the existing addend at all.
1059 FIXME: This seems logical to me, but for the case of
1060 producing relocatable output it is not what the code
1061 actually does. I don't want to change it, because it seems
1062 far too likely that something will break. */
1065 input_section
->output_section
->vma
+ input_section
->output_offset
;
1067 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1068 relocation
-= reloc_entry
->address
;
1071 if (! howto
->partial_inplace
)
1073 /* This is a partial relocation, and we want to apply the relocation
1074 to the reloc entry rather than the raw data. Modify the reloc
1075 inplace to reflect what we now know. */
1076 reloc_entry
->addend
= relocation
;
1077 reloc_entry
->address
+= input_section
->output_offset
;
1082 /* This is a partial relocation, but inplace, so modify the
1085 If we've relocated with a symbol with a section, change
1086 into a ref to the section belonging to the symbol. */
1087 reloc_entry
->address
+= input_section
->output_offset
;
1090 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1091 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1092 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1095 /* For m68k-coff, the addend was being subtracted twice during
1096 relocation with -r. Removing the line below this comment
1097 fixes that problem; see PR 2953.
1099 However, Ian wrote the following, regarding removing the line below,
1100 which explains why it is still enabled: --djm
1102 If you put a patch like that into BFD you need to check all the COFF
1103 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1104 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1105 problem in a different way. There may very well be a reason that the
1106 code works as it does.
1108 Hmmm. The first obvious point is that bfd_install_relocation should
1109 not have any tests that depend upon the flavour. It's seem like
1110 entirely the wrong place for such a thing. The second obvious point
1111 is that the current code ignores the reloc addend when producing
1112 relocatable output for COFF. That's peculiar. In fact, I really
1113 have no idea what the point of the line you want to remove is.
1115 A typical COFF reloc subtracts the old value of the symbol and adds in
1116 the new value to the location in the object file (if it's a pc
1117 relative reloc it adds the difference between the symbol value and the
1118 location). When relocating we need to preserve that property.
1120 BFD handles this by setting the addend to the negative of the old
1121 value of the symbol. Unfortunately it handles common symbols in a
1122 non-standard way (it doesn't subtract the old value) but that's a
1123 different story (we can't change it without losing backward
1124 compatibility with old object files) (coff-i386 does subtract the old
1125 value, to be compatible with existing coff-i386 targets, like SCO).
1127 So everything works fine when not producing relocatable output. When
1128 we are producing relocatable output, logically we should do exactly
1129 what we do when not producing relocatable output. Therefore, your
1130 patch is correct. In fact, it should probably always just set
1131 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1132 add the value into the object file. This won't hurt the COFF code,
1133 which doesn't use the addend; I'm not sure what it will do to other
1134 formats (the thing to check for would be whether any formats both use
1135 the addend and set partial_inplace).
1137 When I wanted to make coff-i386 produce relocatable output, I ran
1138 into the problem that you are running into: I wanted to remove that
1139 line. Rather than risk it, I made the coff-i386 relocs use a special
1140 function; it's coff_i386_reloc in coff-i386.c. The function
1141 specifically adds the addend field into the object file, knowing that
1142 bfd_install_relocation is not going to. If you remove that line, then
1143 coff-i386.c will wind up adding the addend field in twice. It's
1144 trivial to fix; it just needs to be done.
1146 The problem with removing the line is just that it may break some
1147 working code. With BFD it's hard to be sure of anything. The right
1148 way to deal with this is simply to build and test at least all the
1149 supported COFF targets. It should be straightforward if time and disk
1150 space consuming. For each target:
1152 2) generate some executable, and link it using -r (I would
1153 probably use paranoia.o and link against newlib/libc.a, which
1154 for all the supported targets would be available in
1155 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1156 3) make the change to reloc.c
1157 4) rebuild the linker
1159 6) if the resulting object files are the same, you have at least
1161 7) if they are different you have to figure out which version is
1163 relocation
-= reloc_entry
->addend
;
1164 /* FIXME: There should be no target specific code here... */
1165 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1166 reloc_entry
->addend
= 0;
1170 reloc_entry
->addend
= relocation
;
1174 /* FIXME: This overflow checking is incomplete, because the value
1175 might have overflowed before we get here. For a correct check we
1176 need to compute the value in a size larger than bitsize, but we
1177 can't reasonably do that for a reloc the same size as a host
1179 FIXME: We should also do overflow checking on the result after
1180 adding in the value contained in the object file. */
1181 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1182 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1185 bfd_arch_bits_per_address (abfd
),
1188 /* Either we are relocating all the way, or we don't want to apply
1189 the relocation to the reloc entry (probably because there isn't
1190 any room in the output format to describe addends to relocs). */
1192 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1193 (OSF version 1.3, compiler version 3.11). It miscompiles the
1207 x <<= (unsigned long) s.i0;
1209 printf ("failed\n");
1211 printf ("succeeded (%lx)\n", x);
1215 relocation
>>= (bfd_vma
) howto
->rightshift
;
1217 /* Shift everything up to where it's going to be used. */
1218 relocation
<<= (bfd_vma
) howto
->bitpos
;
1220 /* Wait for the day when all have the mask in them. */
1223 i instruction to be left alone
1224 o offset within instruction
1225 r relocation offset to apply
1234 (( i i i i i o o o o o from bfd_get<size>
1235 and S S S S S) to get the size offset we want
1236 + r r r r r r r r r r) to get the final value to place
1237 and D D D D D to chop to right size
1238 -----------------------
1241 ( i i i i i o o o o o from bfd_get<size>
1242 and N N N N N ) get instruction
1243 -----------------------
1249 -----------------------
1250 = R R R R R R R R R R put into bfd_put<size>
1254 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1256 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1258 switch (howto
->size
)
1262 char x
= bfd_get_8 (abfd
, data
);
1264 bfd_put_8 (abfd
, x
, data
);
1270 short x
= bfd_get_16 (abfd
, data
);
1272 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1277 long x
= bfd_get_32 (abfd
, data
);
1279 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1284 long x
= bfd_get_32 (abfd
, data
);
1285 relocation
= -relocation
;
1287 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1297 bfd_vma x
= bfd_get_64 (abfd
, data
);
1299 bfd_put_64 (abfd
, x
, data
);
1303 return bfd_reloc_other
;
1309 /* This relocation routine is used by some of the backend linkers.
1310 They do not construct asymbol or arelent structures, so there is no
1311 reason for them to use bfd_perform_relocation. Also,
1312 bfd_perform_relocation is so hacked up it is easier to write a new
1313 function than to try to deal with it.
1315 This routine does a final relocation. Whether it is useful for a
1316 relocatable link depends upon how the object format defines
1319 FIXME: This routine ignores any special_function in the HOWTO,
1320 since the existing special_function values have been written for
1321 bfd_perform_relocation.
1323 HOWTO is the reloc howto information.
1324 INPUT_BFD is the BFD which the reloc applies to.
1325 INPUT_SECTION is the section which the reloc applies to.
1326 CONTENTS is the contents of the section.
1327 ADDRESS is the address of the reloc within INPUT_SECTION.
1328 VALUE is the value of the symbol the reloc refers to.
1329 ADDEND is the addend of the reloc. */
1331 bfd_reloc_status_type
1332 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1334 asection
*input_section
,
1342 /* Sanity check the address. */
1343 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1344 return bfd_reloc_outofrange
;
1346 /* This function assumes that we are dealing with a basic relocation
1347 against a symbol. We want to compute the value of the symbol to
1348 relocate to. This is just VALUE, the value of the symbol, plus
1349 ADDEND, any addend associated with the reloc. */
1350 relocation
= value
+ addend
;
1352 /* If the relocation is PC relative, we want to set RELOCATION to
1353 the distance between the symbol (currently in RELOCATION) and the
1354 location we are relocating. Some targets (e.g., i386-aout)
1355 arrange for the contents of the section to be the negative of the
1356 offset of the location within the section; for such targets
1357 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1358 simply leave the contents of the section as zero; for such
1359 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1360 need to subtract out the offset of the location within the
1361 section (which is just ADDRESS). */
1362 if (howto
->pc_relative
)
1364 relocation
-= (input_section
->output_section
->vma
1365 + input_section
->output_offset
);
1366 if (howto
->pcrel_offset
)
1367 relocation
-= address
;
1370 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1371 contents
+ address
);
1374 /* Relocate a given location using a given value and howto. */
1376 bfd_reloc_status_type
1377 _bfd_relocate_contents (reloc_howto_type
*howto
,
1384 bfd_reloc_status_type flag
;
1385 unsigned int rightshift
= howto
->rightshift
;
1386 unsigned int bitpos
= howto
->bitpos
;
1388 /* If the size is negative, negate RELOCATION. This isn't very
1390 if (howto
->size
< 0)
1391 relocation
= -relocation
;
1393 /* Get the value we are going to relocate. */
1394 size
= bfd_get_reloc_size (howto
);
1401 x
= bfd_get_8 (input_bfd
, location
);
1404 x
= bfd_get_16 (input_bfd
, location
);
1407 x
= bfd_get_32 (input_bfd
, location
);
1411 x
= bfd_get_64 (input_bfd
, location
);
1418 /* Check for overflow. FIXME: We may drop bits during the addition
1419 which we don't check for. We must either check at every single
1420 operation, which would be tedious, or we must do the computations
1421 in a type larger than bfd_vma, which would be inefficient. */
1422 flag
= bfd_reloc_ok
;
1423 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1425 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1428 /* Get the values to be added together. For signed and unsigned
1429 relocations, we assume that all values should be truncated to
1430 the size of an address. For bitfields, all the bits matter.
1431 See also bfd_check_overflow. */
1432 fieldmask
= N_ONES (howto
->bitsize
);
1433 signmask
= ~fieldmask
;
1434 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1435 | (fieldmask
<< rightshift
));
1436 a
= (relocation
& addrmask
) >> rightshift
;
1437 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1438 addrmask
>>= rightshift
;
1440 switch (howto
->complain_on_overflow
)
1442 case complain_overflow_signed
:
1443 /* If any sign bits are set, all sign bits must be set.
1444 That is, A must be a valid negative address after
1446 signmask
= ~(fieldmask
>> 1);
1449 case complain_overflow_bitfield
:
1450 /* Much like the signed check, but for a field one bit
1451 wider. We allow a bitfield to represent numbers in the
1452 range -2**n to 2**n-1, where n is the number of bits in the
1453 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1454 can't overflow, which is exactly what we want. */
1456 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1457 flag
= bfd_reloc_overflow
;
1459 /* We only need this next bit of code if the sign bit of B
1460 is below the sign bit of A. This would only happen if
1461 SRC_MASK had fewer bits than BITSIZE. Note that if
1462 SRC_MASK has more bits than BITSIZE, we can get into
1463 trouble; we would need to verify that B is in range, as
1464 we do for A above. */
1465 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1468 /* Set all the bits above the sign bit. */
1471 /* Now we can do the addition. */
1474 /* See if the result has the correct sign. Bits above the
1475 sign bit are junk now; ignore them. If the sum is
1476 positive, make sure we did not have all negative inputs;
1477 if the sum is negative, make sure we did not have all
1478 positive inputs. The test below looks only at the sign
1479 bits, and it really just
1480 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1482 We mask with addrmask here to explicitly allow an address
1483 wrap-around. The Linux kernel relies on it, and it is
1484 the only way to write assembler code which can run when
1485 loaded at a location 0x80000000 away from the location at
1486 which it is linked. */
1487 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1488 flag
= bfd_reloc_overflow
;
1491 case complain_overflow_unsigned
:
1492 /* Checking for an unsigned overflow is relatively easy:
1493 trim the addresses and add, and trim the result as well.
1494 Overflow is normally indicated when the result does not
1495 fit in the field. However, we also need to consider the
1496 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1497 input is 0x80000000, and bfd_vma is only 32 bits; then we
1498 will get sum == 0, but there is an overflow, since the
1499 inputs did not fit in the field. Instead of doing a
1500 separate test, we can check for this by or-ing in the
1501 operands when testing for the sum overflowing its final
1503 sum
= (a
+ b
) & addrmask
;
1504 if ((a
| b
| sum
) & signmask
)
1505 flag
= bfd_reloc_overflow
;
1513 /* Put RELOCATION in the right bits. */
1514 relocation
>>= (bfd_vma
) rightshift
;
1515 relocation
<<= (bfd_vma
) bitpos
;
1517 /* Add RELOCATION to the right bits of X. */
1518 x
= ((x
& ~howto
->dst_mask
)
1519 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1521 /* Put the relocated value back in the object file. */
1527 bfd_put_8 (input_bfd
, x
, location
);
1530 bfd_put_16 (input_bfd
, x
, location
);
1533 bfd_put_32 (input_bfd
, x
, location
);
1537 bfd_put_64 (input_bfd
, x
, location
);
1547 /* Clear a given location using a given howto, by applying a fixed relocation
1548 value and discarding any in-place addend. This is used for fixed-up
1549 relocations against discarded symbols, to make ignorable debug or unwind
1550 information more obvious. */
1553 _bfd_clear_contents (reloc_howto_type
*howto
,
1555 asection
*input_section
,
1561 /* Get the value we are going to relocate. */
1562 size
= bfd_get_reloc_size (howto
);
1569 x
= bfd_get_8 (input_bfd
, location
);
1572 x
= bfd_get_16 (input_bfd
, location
);
1575 x
= bfd_get_32 (input_bfd
, location
);
1579 x
= bfd_get_64 (input_bfd
, location
);
1586 /* Zero out the unwanted bits of X. */
1587 x
&= ~howto
->dst_mask
;
1589 /* For a range list, use 1 instead of 0 as placeholder. 0
1590 would terminate the list, hiding any later entries. */
1591 if (strcmp (bfd_get_section_name (input_bfd
, input_section
),
1592 ".debug_ranges") == 0
1593 && (howto
->dst_mask
& 1) != 0)
1596 /* Put the relocated value back in the object file. */
1603 bfd_put_8 (input_bfd
, x
, location
);
1606 bfd_put_16 (input_bfd
, x
, location
);
1609 bfd_put_32 (input_bfd
, x
, location
);
1613 bfd_put_64 (input_bfd
, x
, location
);
1624 howto manager, , typedef arelent, Relocations
1629 When an application wants to create a relocation, but doesn't
1630 know what the target machine might call it, it can find out by
1631 using this bit of code.
1640 The insides of a reloc code. The idea is that, eventually, there
1641 will be one enumerator for every type of relocation we ever do.
1642 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1643 return a howto pointer.
1645 This does mean that the application must determine the correct
1646 enumerator value; you can't get a howto pointer from a random set
1667 Basic absolute relocations of N bits.
1682 PC-relative relocations. Sometimes these are relative to the address
1683 of the relocation itself; sometimes they are relative to the start of
1684 the section containing the relocation. It depends on the specific target.
1686 The 24-bit relocation is used in some Intel 960 configurations.
1691 Section relative relocations. Some targets need this for DWARF2.
1694 BFD_RELOC_32_GOT_PCREL
1696 BFD_RELOC_16_GOT_PCREL
1698 BFD_RELOC_8_GOT_PCREL
1704 BFD_RELOC_LO16_GOTOFF
1706 BFD_RELOC_HI16_GOTOFF
1708 BFD_RELOC_HI16_S_GOTOFF
1712 BFD_RELOC_64_PLT_PCREL
1714 BFD_RELOC_32_PLT_PCREL
1716 BFD_RELOC_24_PLT_PCREL
1718 BFD_RELOC_16_PLT_PCREL
1720 BFD_RELOC_8_PLT_PCREL
1728 BFD_RELOC_LO16_PLTOFF
1730 BFD_RELOC_HI16_PLTOFF
1732 BFD_RELOC_HI16_S_PLTOFF
1739 BFD_RELOC_68K_GLOB_DAT
1741 BFD_RELOC_68K_JMP_SLOT
1743 BFD_RELOC_68K_RELATIVE
1745 BFD_RELOC_68K_TLS_GD32
1747 BFD_RELOC_68K_TLS_GD16
1749 BFD_RELOC_68K_TLS_GD8
1751 BFD_RELOC_68K_TLS_LDM32
1753 BFD_RELOC_68K_TLS_LDM16
1755 BFD_RELOC_68K_TLS_LDM8
1757 BFD_RELOC_68K_TLS_LDO32
1759 BFD_RELOC_68K_TLS_LDO16
1761 BFD_RELOC_68K_TLS_LDO8
1763 BFD_RELOC_68K_TLS_IE32
1765 BFD_RELOC_68K_TLS_IE16
1767 BFD_RELOC_68K_TLS_IE8
1769 BFD_RELOC_68K_TLS_LE32
1771 BFD_RELOC_68K_TLS_LE16
1773 BFD_RELOC_68K_TLS_LE8
1775 Relocations used by 68K ELF.
1778 BFD_RELOC_32_BASEREL
1780 BFD_RELOC_16_BASEREL
1782 BFD_RELOC_LO16_BASEREL
1784 BFD_RELOC_HI16_BASEREL
1786 BFD_RELOC_HI16_S_BASEREL
1792 Linkage-table relative.
1797 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1800 BFD_RELOC_32_PCREL_S2
1802 BFD_RELOC_16_PCREL_S2
1804 BFD_RELOC_23_PCREL_S2
1806 These PC-relative relocations are stored as word displacements --
1807 i.e., byte displacements shifted right two bits. The 30-bit word
1808 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1809 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1810 signed 16-bit displacement is used on the MIPS, and the 23-bit
1811 displacement is used on the Alpha.
1818 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1819 the target word. These are used on the SPARC.
1826 For systems that allocate a Global Pointer register, these are
1827 displacements off that register. These relocation types are
1828 handled specially, because the value the register will have is
1829 decided relatively late.
1832 BFD_RELOC_I960_CALLJ
1834 Reloc types used for i960/b.out.
1839 BFD_RELOC_SPARC_WDISP22
1845 BFD_RELOC_SPARC_GOT10
1847 BFD_RELOC_SPARC_GOT13
1849 BFD_RELOC_SPARC_GOT22
1851 BFD_RELOC_SPARC_PC10
1853 BFD_RELOC_SPARC_PC22
1855 BFD_RELOC_SPARC_WPLT30
1857 BFD_RELOC_SPARC_COPY
1859 BFD_RELOC_SPARC_GLOB_DAT
1861 BFD_RELOC_SPARC_JMP_SLOT
1863 BFD_RELOC_SPARC_RELATIVE
1865 BFD_RELOC_SPARC_UA16
1867 BFD_RELOC_SPARC_UA32
1869 BFD_RELOC_SPARC_UA64
1871 BFD_RELOC_SPARC_GOTDATA_HIX22
1873 BFD_RELOC_SPARC_GOTDATA_LOX10
1875 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1877 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1879 BFD_RELOC_SPARC_GOTDATA_OP
1881 BFD_RELOC_SPARC_JMP_IREL
1883 BFD_RELOC_SPARC_IRELATIVE
1885 SPARC ELF relocations. There is probably some overlap with other
1886 relocation types already defined.
1889 BFD_RELOC_SPARC_BASE13
1891 BFD_RELOC_SPARC_BASE22
1893 I think these are specific to SPARC a.out (e.g., Sun 4).
1903 BFD_RELOC_SPARC_OLO10
1905 BFD_RELOC_SPARC_HH22
1907 BFD_RELOC_SPARC_HM10
1909 BFD_RELOC_SPARC_LM22
1911 BFD_RELOC_SPARC_PC_HH22
1913 BFD_RELOC_SPARC_PC_HM10
1915 BFD_RELOC_SPARC_PC_LM22
1917 BFD_RELOC_SPARC_WDISP16
1919 BFD_RELOC_SPARC_WDISP19
1927 BFD_RELOC_SPARC_DISP64
1930 BFD_RELOC_SPARC_PLT32
1932 BFD_RELOC_SPARC_PLT64
1934 BFD_RELOC_SPARC_HIX22
1936 BFD_RELOC_SPARC_LOX10
1944 BFD_RELOC_SPARC_REGISTER
1949 BFD_RELOC_SPARC_REV32
1951 SPARC little endian relocation
1953 BFD_RELOC_SPARC_TLS_GD_HI22
1955 BFD_RELOC_SPARC_TLS_GD_LO10
1957 BFD_RELOC_SPARC_TLS_GD_ADD
1959 BFD_RELOC_SPARC_TLS_GD_CALL
1961 BFD_RELOC_SPARC_TLS_LDM_HI22
1963 BFD_RELOC_SPARC_TLS_LDM_LO10
1965 BFD_RELOC_SPARC_TLS_LDM_ADD
1967 BFD_RELOC_SPARC_TLS_LDM_CALL
1969 BFD_RELOC_SPARC_TLS_LDO_HIX22
1971 BFD_RELOC_SPARC_TLS_LDO_LOX10
1973 BFD_RELOC_SPARC_TLS_LDO_ADD
1975 BFD_RELOC_SPARC_TLS_IE_HI22
1977 BFD_RELOC_SPARC_TLS_IE_LO10
1979 BFD_RELOC_SPARC_TLS_IE_LD
1981 BFD_RELOC_SPARC_TLS_IE_LDX
1983 BFD_RELOC_SPARC_TLS_IE_ADD
1985 BFD_RELOC_SPARC_TLS_LE_HIX22
1987 BFD_RELOC_SPARC_TLS_LE_LOX10
1989 BFD_RELOC_SPARC_TLS_DTPMOD32
1991 BFD_RELOC_SPARC_TLS_DTPMOD64
1993 BFD_RELOC_SPARC_TLS_DTPOFF32
1995 BFD_RELOC_SPARC_TLS_DTPOFF64
1997 BFD_RELOC_SPARC_TLS_TPOFF32
1999 BFD_RELOC_SPARC_TLS_TPOFF64
2001 SPARC TLS relocations
2010 BFD_RELOC_SPU_IMM10W
2014 BFD_RELOC_SPU_IMM16W
2018 BFD_RELOC_SPU_PCREL9a
2020 BFD_RELOC_SPU_PCREL9b
2022 BFD_RELOC_SPU_PCREL16
2032 BFD_RELOC_SPU_ADD_PIC
2037 BFD_RELOC_ALPHA_GPDISP_HI16
2039 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
2040 "addend" in some special way.
2041 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
2042 writing; when reading, it will be the absolute section symbol. The
2043 addend is the displacement in bytes of the "lda" instruction from
2044 the "ldah" instruction (which is at the address of this reloc).
2046 BFD_RELOC_ALPHA_GPDISP_LO16
2048 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
2049 with GPDISP_HI16 relocs. The addend is ignored when writing the
2050 relocations out, and is filled in with the file's GP value on
2051 reading, for convenience.
2054 BFD_RELOC_ALPHA_GPDISP
2056 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
2057 relocation except that there is no accompanying GPDISP_LO16
2061 BFD_RELOC_ALPHA_LITERAL
2063 BFD_RELOC_ALPHA_ELF_LITERAL
2065 BFD_RELOC_ALPHA_LITUSE
2067 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
2068 the assembler turns it into a LDQ instruction to load the address of
2069 the symbol, and then fills in a register in the real instruction.
2071 The LITERAL reloc, at the LDQ instruction, refers to the .lita
2072 section symbol. The addend is ignored when writing, but is filled
2073 in with the file's GP value on reading, for convenience, as with the
2076 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2077 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2078 but it generates output not based on the position within the .got
2079 section, but relative to the GP value chosen for the file during the
2082 The LITUSE reloc, on the instruction using the loaded address, gives
2083 information to the linker that it might be able to use to optimize
2084 away some literal section references. The symbol is ignored (read
2085 as the absolute section symbol), and the "addend" indicates the type
2086 of instruction using the register:
2087 1 - "memory" fmt insn
2088 2 - byte-manipulation (byte offset reg)
2089 3 - jsr (target of branch)
2092 BFD_RELOC_ALPHA_HINT
2094 The HINT relocation indicates a value that should be filled into the
2095 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2096 prediction logic which may be provided on some processors.
2099 BFD_RELOC_ALPHA_LINKAGE
2101 The LINKAGE relocation outputs a linkage pair in the object file,
2102 which is filled by the linker.
2105 BFD_RELOC_ALPHA_CODEADDR
2107 The CODEADDR relocation outputs a STO_CA in the object file,
2108 which is filled by the linker.
2111 BFD_RELOC_ALPHA_GPREL_HI16
2113 BFD_RELOC_ALPHA_GPREL_LO16
2115 The GPREL_HI/LO relocations together form a 32-bit offset from the
2119 BFD_RELOC_ALPHA_BRSGP
2121 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2122 share a common GP, and the target address is adjusted for
2123 STO_ALPHA_STD_GPLOAD.
2128 The NOP relocation outputs a NOP if the longword displacement
2129 between two procedure entry points is < 2^21.
2134 The BSR relocation outputs a BSR if the longword displacement
2135 between two procedure entry points is < 2^21.
2140 The LDA relocation outputs a LDA if the longword displacement
2141 between two procedure entry points is < 2^16.
2146 The BOH relocation outputs a BSR if the longword displacement
2147 between two procedure entry points is < 2^21, or else a hint.
2150 BFD_RELOC_ALPHA_TLSGD
2152 BFD_RELOC_ALPHA_TLSLDM
2154 BFD_RELOC_ALPHA_DTPMOD64
2156 BFD_RELOC_ALPHA_GOTDTPREL16
2158 BFD_RELOC_ALPHA_DTPREL64
2160 BFD_RELOC_ALPHA_DTPREL_HI16
2162 BFD_RELOC_ALPHA_DTPREL_LO16
2164 BFD_RELOC_ALPHA_DTPREL16
2166 BFD_RELOC_ALPHA_GOTTPREL16
2168 BFD_RELOC_ALPHA_TPREL64
2170 BFD_RELOC_ALPHA_TPREL_HI16
2172 BFD_RELOC_ALPHA_TPREL_LO16
2174 BFD_RELOC_ALPHA_TPREL16
2176 Alpha thread-local storage relocations.
2181 BFD_RELOC_MICROMIPS_JMP
2183 The MIPS jump instruction.
2186 BFD_RELOC_MIPS16_JMP
2188 The MIPS16 jump instruction.
2191 BFD_RELOC_MIPS16_GPREL
2193 MIPS16 GP relative reloc.
2198 High 16 bits of 32-bit value; simple reloc.
2203 High 16 bits of 32-bit value but the low 16 bits will be sign
2204 extended and added to form the final result. If the low 16
2205 bits form a negative number, we need to add one to the high value
2206 to compensate for the borrow when the low bits are added.
2214 BFD_RELOC_HI16_PCREL
2216 High 16 bits of 32-bit pc-relative value
2218 BFD_RELOC_HI16_S_PCREL
2220 High 16 bits of 32-bit pc-relative value, adjusted
2222 BFD_RELOC_LO16_PCREL
2224 Low 16 bits of pc-relative value
2227 BFD_RELOC_MIPS16_GOT16
2229 BFD_RELOC_MIPS16_CALL16
2231 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2232 16-bit immediate fields
2234 BFD_RELOC_MIPS16_HI16
2236 MIPS16 high 16 bits of 32-bit value.
2238 BFD_RELOC_MIPS16_HI16_S
2240 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2241 extended and added to form the final result. If the low 16
2242 bits form a negative number, we need to add one to the high value
2243 to compensate for the borrow when the low bits are added.
2245 BFD_RELOC_MIPS16_LO16
2250 BFD_RELOC_MIPS16_TLS_GD
2252 BFD_RELOC_MIPS16_TLS_LDM
2254 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2256 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2258 BFD_RELOC_MIPS16_TLS_GOTTPREL
2260 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2262 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2264 MIPS16 TLS relocations
2267 BFD_RELOC_MIPS_LITERAL
2269 BFD_RELOC_MICROMIPS_LITERAL
2271 Relocation against a MIPS literal section.
2274 BFD_RELOC_MICROMIPS_7_PCREL_S1
2276 BFD_RELOC_MICROMIPS_10_PCREL_S1
2278 BFD_RELOC_MICROMIPS_16_PCREL_S1
2280 microMIPS PC-relative relocations.
2283 BFD_RELOC_MICROMIPS_GPREL16
2285 BFD_RELOC_MICROMIPS_HI16
2287 BFD_RELOC_MICROMIPS_HI16_S
2289 BFD_RELOC_MICROMIPS_LO16
2291 microMIPS versions of generic BFD relocs.
2294 BFD_RELOC_MIPS_GOT16
2296 BFD_RELOC_MICROMIPS_GOT16
2298 BFD_RELOC_MIPS_CALL16
2300 BFD_RELOC_MICROMIPS_CALL16
2302 BFD_RELOC_MIPS_GOT_HI16
2304 BFD_RELOC_MICROMIPS_GOT_HI16
2306 BFD_RELOC_MIPS_GOT_LO16
2308 BFD_RELOC_MICROMIPS_GOT_LO16
2310 BFD_RELOC_MIPS_CALL_HI16
2312 BFD_RELOC_MICROMIPS_CALL_HI16
2314 BFD_RELOC_MIPS_CALL_LO16
2316 BFD_RELOC_MICROMIPS_CALL_LO16
2320 BFD_RELOC_MICROMIPS_SUB
2322 BFD_RELOC_MIPS_GOT_PAGE
2324 BFD_RELOC_MICROMIPS_GOT_PAGE
2326 BFD_RELOC_MIPS_GOT_OFST
2328 BFD_RELOC_MICROMIPS_GOT_OFST
2330 BFD_RELOC_MIPS_GOT_DISP
2332 BFD_RELOC_MICROMIPS_GOT_DISP
2334 BFD_RELOC_MIPS_SHIFT5
2336 BFD_RELOC_MIPS_SHIFT6
2338 BFD_RELOC_MIPS_INSERT_A
2340 BFD_RELOC_MIPS_INSERT_B
2342 BFD_RELOC_MIPS_DELETE
2344 BFD_RELOC_MIPS_HIGHEST
2346 BFD_RELOC_MICROMIPS_HIGHEST
2348 BFD_RELOC_MIPS_HIGHER
2350 BFD_RELOC_MICROMIPS_HIGHER
2352 BFD_RELOC_MIPS_SCN_DISP
2354 BFD_RELOC_MICROMIPS_SCN_DISP
2356 BFD_RELOC_MIPS_REL16
2358 BFD_RELOC_MIPS_RELGOT
2362 BFD_RELOC_MICROMIPS_JALR
2364 BFD_RELOC_MIPS_TLS_DTPMOD32
2366 BFD_RELOC_MIPS_TLS_DTPREL32
2368 BFD_RELOC_MIPS_TLS_DTPMOD64
2370 BFD_RELOC_MIPS_TLS_DTPREL64
2372 BFD_RELOC_MIPS_TLS_GD
2374 BFD_RELOC_MICROMIPS_TLS_GD
2376 BFD_RELOC_MIPS_TLS_LDM
2378 BFD_RELOC_MICROMIPS_TLS_LDM
2380 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2382 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2384 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2386 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2388 BFD_RELOC_MIPS_TLS_GOTTPREL
2390 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2392 BFD_RELOC_MIPS_TLS_TPREL32
2394 BFD_RELOC_MIPS_TLS_TPREL64
2396 BFD_RELOC_MIPS_TLS_TPREL_HI16
2398 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2400 BFD_RELOC_MIPS_TLS_TPREL_LO16
2402 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2404 MIPS ELF relocations.
2410 BFD_RELOC_MIPS_JUMP_SLOT
2412 MIPS ELF relocations (VxWorks and PLT extensions).
2416 BFD_RELOC_MOXIE_10_PCREL
2418 Moxie ELF relocations.
2422 BFD_RELOC_FRV_LABEL16
2424 BFD_RELOC_FRV_LABEL24
2430 BFD_RELOC_FRV_GPREL12
2432 BFD_RELOC_FRV_GPRELU12
2434 BFD_RELOC_FRV_GPREL32
2436 BFD_RELOC_FRV_GPRELHI
2438 BFD_RELOC_FRV_GPRELLO
2446 BFD_RELOC_FRV_FUNCDESC
2448 BFD_RELOC_FRV_FUNCDESC_GOT12
2450 BFD_RELOC_FRV_FUNCDESC_GOTHI
2452 BFD_RELOC_FRV_FUNCDESC_GOTLO
2454 BFD_RELOC_FRV_FUNCDESC_VALUE
2456 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2458 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2460 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2462 BFD_RELOC_FRV_GOTOFF12
2464 BFD_RELOC_FRV_GOTOFFHI
2466 BFD_RELOC_FRV_GOTOFFLO
2468 BFD_RELOC_FRV_GETTLSOFF
2470 BFD_RELOC_FRV_TLSDESC_VALUE
2472 BFD_RELOC_FRV_GOTTLSDESC12
2474 BFD_RELOC_FRV_GOTTLSDESCHI
2476 BFD_RELOC_FRV_GOTTLSDESCLO
2478 BFD_RELOC_FRV_TLSMOFF12
2480 BFD_RELOC_FRV_TLSMOFFHI
2482 BFD_RELOC_FRV_TLSMOFFLO
2484 BFD_RELOC_FRV_GOTTLSOFF12
2486 BFD_RELOC_FRV_GOTTLSOFFHI
2488 BFD_RELOC_FRV_GOTTLSOFFLO
2490 BFD_RELOC_FRV_TLSOFF
2492 BFD_RELOC_FRV_TLSDESC_RELAX
2494 BFD_RELOC_FRV_GETTLSOFF_RELAX
2496 BFD_RELOC_FRV_TLSOFF_RELAX
2498 BFD_RELOC_FRV_TLSMOFF
2500 Fujitsu Frv Relocations.
2504 BFD_RELOC_MN10300_GOTOFF24
2506 This is a 24bit GOT-relative reloc for the mn10300.
2508 BFD_RELOC_MN10300_GOT32
2510 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2513 BFD_RELOC_MN10300_GOT24
2515 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2518 BFD_RELOC_MN10300_GOT16
2520 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2523 BFD_RELOC_MN10300_COPY
2525 Copy symbol at runtime.
2527 BFD_RELOC_MN10300_GLOB_DAT
2531 BFD_RELOC_MN10300_JMP_SLOT
2535 BFD_RELOC_MN10300_RELATIVE
2537 Adjust by program base.
2539 BFD_RELOC_MN10300_SYM_DIFF
2541 Together with another reloc targeted at the same location,
2542 allows for a value that is the difference of two symbols
2543 in the same section.
2545 BFD_RELOC_MN10300_ALIGN
2547 The addend of this reloc is an alignment power that must
2548 be honoured at the offset's location, regardless of linker
2551 BFD_RELOC_MN10300_TLS_GD
2553 BFD_RELOC_MN10300_TLS_LD
2555 BFD_RELOC_MN10300_TLS_LDO
2557 BFD_RELOC_MN10300_TLS_GOTIE
2559 BFD_RELOC_MN10300_TLS_IE
2561 BFD_RELOC_MN10300_TLS_LE
2563 BFD_RELOC_MN10300_TLS_DTPMOD
2565 BFD_RELOC_MN10300_TLS_DTPOFF
2567 BFD_RELOC_MN10300_TLS_TPOFF
2569 Various TLS-related relocations.
2571 BFD_RELOC_MN10300_32_PCREL
2573 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2576 BFD_RELOC_MN10300_16_PCREL
2578 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2589 BFD_RELOC_386_GLOB_DAT
2591 BFD_RELOC_386_JUMP_SLOT
2593 BFD_RELOC_386_RELATIVE
2595 BFD_RELOC_386_GOTOFF
2599 BFD_RELOC_386_TLS_TPOFF
2601 BFD_RELOC_386_TLS_IE
2603 BFD_RELOC_386_TLS_GOTIE
2605 BFD_RELOC_386_TLS_LE
2607 BFD_RELOC_386_TLS_GD
2609 BFD_RELOC_386_TLS_LDM
2611 BFD_RELOC_386_TLS_LDO_32
2613 BFD_RELOC_386_TLS_IE_32
2615 BFD_RELOC_386_TLS_LE_32
2617 BFD_RELOC_386_TLS_DTPMOD32
2619 BFD_RELOC_386_TLS_DTPOFF32
2621 BFD_RELOC_386_TLS_TPOFF32
2623 BFD_RELOC_386_TLS_GOTDESC
2625 BFD_RELOC_386_TLS_DESC_CALL
2627 BFD_RELOC_386_TLS_DESC
2629 BFD_RELOC_386_IRELATIVE
2631 i386/elf relocations
2634 BFD_RELOC_X86_64_GOT32
2636 BFD_RELOC_X86_64_PLT32
2638 BFD_RELOC_X86_64_COPY
2640 BFD_RELOC_X86_64_GLOB_DAT
2642 BFD_RELOC_X86_64_JUMP_SLOT
2644 BFD_RELOC_X86_64_RELATIVE
2646 BFD_RELOC_X86_64_GOTPCREL
2648 BFD_RELOC_X86_64_32S
2650 BFD_RELOC_X86_64_DTPMOD64
2652 BFD_RELOC_X86_64_DTPOFF64
2654 BFD_RELOC_X86_64_TPOFF64
2656 BFD_RELOC_X86_64_TLSGD
2658 BFD_RELOC_X86_64_TLSLD
2660 BFD_RELOC_X86_64_DTPOFF32
2662 BFD_RELOC_X86_64_GOTTPOFF
2664 BFD_RELOC_X86_64_TPOFF32
2666 BFD_RELOC_X86_64_GOTOFF64
2668 BFD_RELOC_X86_64_GOTPC32
2670 BFD_RELOC_X86_64_GOT64
2672 BFD_RELOC_X86_64_GOTPCREL64
2674 BFD_RELOC_X86_64_GOTPC64
2676 BFD_RELOC_X86_64_GOTPLT64
2678 BFD_RELOC_X86_64_PLTOFF64
2680 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2682 BFD_RELOC_X86_64_TLSDESC_CALL
2684 BFD_RELOC_X86_64_TLSDESC
2686 BFD_RELOC_X86_64_IRELATIVE
2688 x86-64/elf relocations
2691 BFD_RELOC_NS32K_IMM_8
2693 BFD_RELOC_NS32K_IMM_16
2695 BFD_RELOC_NS32K_IMM_32
2697 BFD_RELOC_NS32K_IMM_8_PCREL
2699 BFD_RELOC_NS32K_IMM_16_PCREL
2701 BFD_RELOC_NS32K_IMM_32_PCREL
2703 BFD_RELOC_NS32K_DISP_8
2705 BFD_RELOC_NS32K_DISP_16
2707 BFD_RELOC_NS32K_DISP_32
2709 BFD_RELOC_NS32K_DISP_8_PCREL
2711 BFD_RELOC_NS32K_DISP_16_PCREL
2713 BFD_RELOC_NS32K_DISP_32_PCREL
2718 BFD_RELOC_PDP11_DISP_8_PCREL
2720 BFD_RELOC_PDP11_DISP_6_PCREL
2725 BFD_RELOC_PJ_CODE_HI16
2727 BFD_RELOC_PJ_CODE_LO16
2729 BFD_RELOC_PJ_CODE_DIR16
2731 BFD_RELOC_PJ_CODE_DIR32
2733 BFD_RELOC_PJ_CODE_REL16
2735 BFD_RELOC_PJ_CODE_REL32
2737 Picojava relocs. Not all of these appear in object files.
2748 BFD_RELOC_PPC_B16_BRTAKEN
2750 BFD_RELOC_PPC_B16_BRNTAKEN
2754 BFD_RELOC_PPC_BA16_BRTAKEN
2756 BFD_RELOC_PPC_BA16_BRNTAKEN
2760 BFD_RELOC_PPC_GLOB_DAT
2762 BFD_RELOC_PPC_JMP_SLOT
2764 BFD_RELOC_PPC_RELATIVE
2766 BFD_RELOC_PPC_LOCAL24PC
2768 BFD_RELOC_PPC_EMB_NADDR32
2770 BFD_RELOC_PPC_EMB_NADDR16
2772 BFD_RELOC_PPC_EMB_NADDR16_LO
2774 BFD_RELOC_PPC_EMB_NADDR16_HI
2776 BFD_RELOC_PPC_EMB_NADDR16_HA
2778 BFD_RELOC_PPC_EMB_SDAI16
2780 BFD_RELOC_PPC_EMB_SDA2I16
2782 BFD_RELOC_PPC_EMB_SDA2REL
2784 BFD_RELOC_PPC_EMB_SDA21
2786 BFD_RELOC_PPC_EMB_MRKREF
2788 BFD_RELOC_PPC_EMB_RELSEC16
2790 BFD_RELOC_PPC_EMB_RELST_LO
2792 BFD_RELOC_PPC_EMB_RELST_HI
2794 BFD_RELOC_PPC_EMB_RELST_HA
2796 BFD_RELOC_PPC_EMB_BIT_FLD
2798 BFD_RELOC_PPC_EMB_RELSDA
2800 BFD_RELOC_PPC64_HIGHER
2802 BFD_RELOC_PPC64_HIGHER_S
2804 BFD_RELOC_PPC64_HIGHEST
2806 BFD_RELOC_PPC64_HIGHEST_S
2808 BFD_RELOC_PPC64_TOC16_LO
2810 BFD_RELOC_PPC64_TOC16_HI
2812 BFD_RELOC_PPC64_TOC16_HA
2816 BFD_RELOC_PPC64_PLTGOT16
2818 BFD_RELOC_PPC64_PLTGOT16_LO
2820 BFD_RELOC_PPC64_PLTGOT16_HI
2822 BFD_RELOC_PPC64_PLTGOT16_HA
2824 BFD_RELOC_PPC64_ADDR16_DS
2826 BFD_RELOC_PPC64_ADDR16_LO_DS
2828 BFD_RELOC_PPC64_GOT16_DS
2830 BFD_RELOC_PPC64_GOT16_LO_DS
2832 BFD_RELOC_PPC64_PLT16_LO_DS
2834 BFD_RELOC_PPC64_SECTOFF_DS
2836 BFD_RELOC_PPC64_SECTOFF_LO_DS
2838 BFD_RELOC_PPC64_TOC16_DS
2840 BFD_RELOC_PPC64_TOC16_LO_DS
2842 BFD_RELOC_PPC64_PLTGOT16_DS
2844 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2846 Power(rs6000) and PowerPC relocations.
2855 BFD_RELOC_PPC_DTPMOD
2857 BFD_RELOC_PPC_TPREL16
2859 BFD_RELOC_PPC_TPREL16_LO
2861 BFD_RELOC_PPC_TPREL16_HI
2863 BFD_RELOC_PPC_TPREL16_HA
2867 BFD_RELOC_PPC_DTPREL16
2869 BFD_RELOC_PPC_DTPREL16_LO
2871 BFD_RELOC_PPC_DTPREL16_HI
2873 BFD_RELOC_PPC_DTPREL16_HA
2875 BFD_RELOC_PPC_DTPREL
2877 BFD_RELOC_PPC_GOT_TLSGD16
2879 BFD_RELOC_PPC_GOT_TLSGD16_LO
2881 BFD_RELOC_PPC_GOT_TLSGD16_HI
2883 BFD_RELOC_PPC_GOT_TLSGD16_HA
2885 BFD_RELOC_PPC_GOT_TLSLD16
2887 BFD_RELOC_PPC_GOT_TLSLD16_LO
2889 BFD_RELOC_PPC_GOT_TLSLD16_HI
2891 BFD_RELOC_PPC_GOT_TLSLD16_HA
2893 BFD_RELOC_PPC_GOT_TPREL16
2895 BFD_RELOC_PPC_GOT_TPREL16_LO
2897 BFD_RELOC_PPC_GOT_TPREL16_HI
2899 BFD_RELOC_PPC_GOT_TPREL16_HA
2901 BFD_RELOC_PPC_GOT_DTPREL16
2903 BFD_RELOC_PPC_GOT_DTPREL16_LO
2905 BFD_RELOC_PPC_GOT_DTPREL16_HI
2907 BFD_RELOC_PPC_GOT_DTPREL16_HA
2909 BFD_RELOC_PPC64_TPREL16_DS
2911 BFD_RELOC_PPC64_TPREL16_LO_DS
2913 BFD_RELOC_PPC64_TPREL16_HIGHER
2915 BFD_RELOC_PPC64_TPREL16_HIGHERA
2917 BFD_RELOC_PPC64_TPREL16_HIGHEST
2919 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2921 BFD_RELOC_PPC64_DTPREL16_DS
2923 BFD_RELOC_PPC64_DTPREL16_LO_DS
2925 BFD_RELOC_PPC64_DTPREL16_HIGHER
2927 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2929 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2931 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2933 PowerPC and PowerPC64 thread-local storage relocations.
2938 IBM 370/390 relocations
2943 The type of reloc used to build a constructor table - at the moment
2944 probably a 32 bit wide absolute relocation, but the target can choose.
2945 It generally does map to one of the other relocation types.
2948 BFD_RELOC_ARM_PCREL_BRANCH
2950 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2951 not stored in the instruction.
2953 BFD_RELOC_ARM_PCREL_BLX
2955 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2956 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2957 field in the instruction.
2959 BFD_RELOC_THUMB_PCREL_BLX
2961 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2962 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2963 field in the instruction.
2965 BFD_RELOC_ARM_PCREL_CALL
2967 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2969 BFD_RELOC_ARM_PCREL_JUMP
2971 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2974 BFD_RELOC_THUMB_PCREL_BRANCH7
2976 BFD_RELOC_THUMB_PCREL_BRANCH9
2978 BFD_RELOC_THUMB_PCREL_BRANCH12
2980 BFD_RELOC_THUMB_PCREL_BRANCH20
2982 BFD_RELOC_THUMB_PCREL_BRANCH23
2984 BFD_RELOC_THUMB_PCREL_BRANCH25
2986 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2987 The lowest bit must be zero and is not stored in the instruction.
2988 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2989 "nn" one smaller in all cases. Note further that BRANCH23
2990 corresponds to R_ARM_THM_CALL.
2993 BFD_RELOC_ARM_OFFSET_IMM
2995 12-bit immediate offset, used in ARM-format ldr and str instructions.
2998 BFD_RELOC_ARM_THUMB_OFFSET
3000 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3003 BFD_RELOC_ARM_TARGET1
3005 Pc-relative or absolute relocation depending on target. Used for
3006 entries in .init_array sections.
3008 BFD_RELOC_ARM_ROSEGREL32
3010 Read-only segment base relative address.
3012 BFD_RELOC_ARM_SBREL32
3014 Data segment base relative address.
3016 BFD_RELOC_ARM_TARGET2
3018 This reloc is used for references to RTTI data from exception handling
3019 tables. The actual definition depends on the target. It may be a
3020 pc-relative or some form of GOT-indirect relocation.
3022 BFD_RELOC_ARM_PREL31
3024 31-bit PC relative address.
3030 BFD_RELOC_ARM_MOVW_PCREL
3032 BFD_RELOC_ARM_MOVT_PCREL
3034 BFD_RELOC_ARM_THUMB_MOVW
3036 BFD_RELOC_ARM_THUMB_MOVT
3038 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3040 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3042 Low and High halfword relocations for MOVW and MOVT instructions.
3045 BFD_RELOC_ARM_JUMP_SLOT
3047 BFD_RELOC_ARM_GLOB_DAT
3053 BFD_RELOC_ARM_RELATIVE
3055 BFD_RELOC_ARM_GOTOFF
3059 BFD_RELOC_ARM_GOT_PREL
3061 Relocations for setting up GOTs and PLTs for shared libraries.
3064 BFD_RELOC_ARM_TLS_GD32
3066 BFD_RELOC_ARM_TLS_LDO32
3068 BFD_RELOC_ARM_TLS_LDM32
3070 BFD_RELOC_ARM_TLS_DTPOFF32
3072 BFD_RELOC_ARM_TLS_DTPMOD32
3074 BFD_RELOC_ARM_TLS_TPOFF32
3076 BFD_RELOC_ARM_TLS_IE32
3078 BFD_RELOC_ARM_TLS_LE32
3080 BFD_RELOC_ARM_TLS_GOTDESC
3082 BFD_RELOC_ARM_TLS_CALL
3084 BFD_RELOC_ARM_THM_TLS_CALL
3086 BFD_RELOC_ARM_TLS_DESCSEQ
3088 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3090 BFD_RELOC_ARM_TLS_DESC
3092 ARM thread-local storage relocations.
3095 BFD_RELOC_ARM_ALU_PC_G0_NC
3097 BFD_RELOC_ARM_ALU_PC_G0
3099 BFD_RELOC_ARM_ALU_PC_G1_NC
3101 BFD_RELOC_ARM_ALU_PC_G1
3103 BFD_RELOC_ARM_ALU_PC_G2
3105 BFD_RELOC_ARM_LDR_PC_G0
3107 BFD_RELOC_ARM_LDR_PC_G1
3109 BFD_RELOC_ARM_LDR_PC_G2
3111 BFD_RELOC_ARM_LDRS_PC_G0
3113 BFD_RELOC_ARM_LDRS_PC_G1
3115 BFD_RELOC_ARM_LDRS_PC_G2
3117 BFD_RELOC_ARM_LDC_PC_G0
3119 BFD_RELOC_ARM_LDC_PC_G1
3121 BFD_RELOC_ARM_LDC_PC_G2
3123 BFD_RELOC_ARM_ALU_SB_G0_NC
3125 BFD_RELOC_ARM_ALU_SB_G0
3127 BFD_RELOC_ARM_ALU_SB_G1_NC
3129 BFD_RELOC_ARM_ALU_SB_G1
3131 BFD_RELOC_ARM_ALU_SB_G2
3133 BFD_RELOC_ARM_LDR_SB_G0
3135 BFD_RELOC_ARM_LDR_SB_G1
3137 BFD_RELOC_ARM_LDR_SB_G2
3139 BFD_RELOC_ARM_LDRS_SB_G0
3141 BFD_RELOC_ARM_LDRS_SB_G1
3143 BFD_RELOC_ARM_LDRS_SB_G2
3145 BFD_RELOC_ARM_LDC_SB_G0
3147 BFD_RELOC_ARM_LDC_SB_G1
3149 BFD_RELOC_ARM_LDC_SB_G2
3151 ARM group relocations.
3156 Annotation of BX instructions.
3159 BFD_RELOC_ARM_IRELATIVE
3161 ARM support for STT_GNU_IFUNC.
3164 BFD_RELOC_ARM_IMMEDIATE
3166 BFD_RELOC_ARM_ADRL_IMMEDIATE
3168 BFD_RELOC_ARM_T32_IMMEDIATE
3170 BFD_RELOC_ARM_T32_ADD_IMM
3172 BFD_RELOC_ARM_T32_IMM12
3174 BFD_RELOC_ARM_T32_ADD_PC12
3176 BFD_RELOC_ARM_SHIFT_IMM
3186 BFD_RELOC_ARM_CP_OFF_IMM
3188 BFD_RELOC_ARM_CP_OFF_IMM_S2
3190 BFD_RELOC_ARM_T32_CP_OFF_IMM
3192 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3194 BFD_RELOC_ARM_ADR_IMM
3196 BFD_RELOC_ARM_LDR_IMM
3198 BFD_RELOC_ARM_LITERAL
3200 BFD_RELOC_ARM_IN_POOL
3202 BFD_RELOC_ARM_OFFSET_IMM8
3204 BFD_RELOC_ARM_T32_OFFSET_U8
3206 BFD_RELOC_ARM_T32_OFFSET_IMM
3208 BFD_RELOC_ARM_HWLITERAL
3210 BFD_RELOC_ARM_THUMB_ADD
3212 BFD_RELOC_ARM_THUMB_IMM
3214 BFD_RELOC_ARM_THUMB_SHIFT
3216 These relocs are only used within the ARM assembler. They are not
3217 (at present) written to any object files.
3220 BFD_RELOC_SH_PCDISP8BY2
3222 BFD_RELOC_SH_PCDISP12BY2
3230 BFD_RELOC_SH_DISP12BY2
3232 BFD_RELOC_SH_DISP12BY4
3234 BFD_RELOC_SH_DISP12BY8
3238 BFD_RELOC_SH_DISP20BY8
3242 BFD_RELOC_SH_IMM4BY2
3244 BFD_RELOC_SH_IMM4BY4
3248 BFD_RELOC_SH_IMM8BY2
3250 BFD_RELOC_SH_IMM8BY4
3252 BFD_RELOC_SH_PCRELIMM8BY2
3254 BFD_RELOC_SH_PCRELIMM8BY4
3256 BFD_RELOC_SH_SWITCH16
3258 BFD_RELOC_SH_SWITCH32
3272 BFD_RELOC_SH_LOOP_START
3274 BFD_RELOC_SH_LOOP_END
3278 BFD_RELOC_SH_GLOB_DAT
3280 BFD_RELOC_SH_JMP_SLOT
3282 BFD_RELOC_SH_RELATIVE
3286 BFD_RELOC_SH_GOT_LOW16
3288 BFD_RELOC_SH_GOT_MEDLOW16
3290 BFD_RELOC_SH_GOT_MEDHI16
3292 BFD_RELOC_SH_GOT_HI16
3294 BFD_RELOC_SH_GOTPLT_LOW16
3296 BFD_RELOC_SH_GOTPLT_MEDLOW16
3298 BFD_RELOC_SH_GOTPLT_MEDHI16
3300 BFD_RELOC_SH_GOTPLT_HI16
3302 BFD_RELOC_SH_PLT_LOW16
3304 BFD_RELOC_SH_PLT_MEDLOW16
3306 BFD_RELOC_SH_PLT_MEDHI16
3308 BFD_RELOC_SH_PLT_HI16
3310 BFD_RELOC_SH_GOTOFF_LOW16
3312 BFD_RELOC_SH_GOTOFF_MEDLOW16
3314 BFD_RELOC_SH_GOTOFF_MEDHI16
3316 BFD_RELOC_SH_GOTOFF_HI16
3318 BFD_RELOC_SH_GOTPC_LOW16
3320 BFD_RELOC_SH_GOTPC_MEDLOW16
3322 BFD_RELOC_SH_GOTPC_MEDHI16
3324 BFD_RELOC_SH_GOTPC_HI16
3328 BFD_RELOC_SH_GLOB_DAT64
3330 BFD_RELOC_SH_JMP_SLOT64
3332 BFD_RELOC_SH_RELATIVE64
3334 BFD_RELOC_SH_GOT10BY4
3336 BFD_RELOC_SH_GOT10BY8
3338 BFD_RELOC_SH_GOTPLT10BY4
3340 BFD_RELOC_SH_GOTPLT10BY8
3342 BFD_RELOC_SH_GOTPLT32
3344 BFD_RELOC_SH_SHMEDIA_CODE
3350 BFD_RELOC_SH_IMMS6BY32
3356 BFD_RELOC_SH_IMMS10BY2
3358 BFD_RELOC_SH_IMMS10BY4
3360 BFD_RELOC_SH_IMMS10BY8
3366 BFD_RELOC_SH_IMM_LOW16
3368 BFD_RELOC_SH_IMM_LOW16_PCREL
3370 BFD_RELOC_SH_IMM_MEDLOW16
3372 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3374 BFD_RELOC_SH_IMM_MEDHI16
3376 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3378 BFD_RELOC_SH_IMM_HI16
3380 BFD_RELOC_SH_IMM_HI16_PCREL
3384 BFD_RELOC_SH_TLS_GD_32
3386 BFD_RELOC_SH_TLS_LD_32
3388 BFD_RELOC_SH_TLS_LDO_32
3390 BFD_RELOC_SH_TLS_IE_32
3392 BFD_RELOC_SH_TLS_LE_32
3394 BFD_RELOC_SH_TLS_DTPMOD32
3396 BFD_RELOC_SH_TLS_DTPOFF32
3398 BFD_RELOC_SH_TLS_TPOFF32
3402 BFD_RELOC_SH_GOTOFF20
3404 BFD_RELOC_SH_GOTFUNCDESC
3406 BFD_RELOC_SH_GOTFUNCDESC20
3408 BFD_RELOC_SH_GOTOFFFUNCDESC
3410 BFD_RELOC_SH_GOTOFFFUNCDESC20
3412 BFD_RELOC_SH_FUNCDESC
3414 Renesas / SuperH SH relocs. Not all of these appear in object files.
3417 BFD_RELOC_ARC_B22_PCREL
3420 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
3421 not stored in the instruction. The high 20 bits are installed in bits 26
3422 through 7 of the instruction.
3426 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
3427 stored in the instruction. The high 24 bits are installed in bits 23
3431 BFD_RELOC_BFIN_16_IMM
3433 ADI Blackfin 16 bit immediate absolute reloc.
3435 BFD_RELOC_BFIN_16_HIGH
3437 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3439 BFD_RELOC_BFIN_4_PCREL
3441 ADI Blackfin 'a' part of LSETUP.
3443 BFD_RELOC_BFIN_5_PCREL
3447 BFD_RELOC_BFIN_16_LOW
3449 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3451 BFD_RELOC_BFIN_10_PCREL
3455 BFD_RELOC_BFIN_11_PCREL
3457 ADI Blackfin 'b' part of LSETUP.
3459 BFD_RELOC_BFIN_12_PCREL_JUMP
3463 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3465 ADI Blackfin Short jump, pcrel.
3467 BFD_RELOC_BFIN_24_PCREL_CALL_X
3469 ADI Blackfin Call.x not implemented.
3471 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3473 ADI Blackfin Long Jump pcrel.
3475 BFD_RELOC_BFIN_GOT17M4
3477 BFD_RELOC_BFIN_GOTHI
3479 BFD_RELOC_BFIN_GOTLO
3481 BFD_RELOC_BFIN_FUNCDESC
3483 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3485 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3487 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3489 BFD_RELOC_BFIN_FUNCDESC_VALUE
3491 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3493 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3495 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3497 BFD_RELOC_BFIN_GOTOFF17M4
3499 BFD_RELOC_BFIN_GOTOFFHI
3501 BFD_RELOC_BFIN_GOTOFFLO
3503 ADI Blackfin FD-PIC relocations.
3507 ADI Blackfin GOT relocation.
3509 BFD_RELOC_BFIN_PLTPC
3511 ADI Blackfin PLTPC relocation.
3513 BFD_ARELOC_BFIN_PUSH
3515 ADI Blackfin arithmetic relocation.
3517 BFD_ARELOC_BFIN_CONST
3519 ADI Blackfin arithmetic relocation.
3523 ADI Blackfin arithmetic relocation.
3527 ADI Blackfin arithmetic relocation.
3529 BFD_ARELOC_BFIN_MULT
3531 ADI Blackfin arithmetic relocation.
3535 ADI Blackfin arithmetic relocation.
3539 ADI Blackfin arithmetic relocation.
3541 BFD_ARELOC_BFIN_LSHIFT
3543 ADI Blackfin arithmetic relocation.
3545 BFD_ARELOC_BFIN_RSHIFT
3547 ADI Blackfin arithmetic relocation.
3551 ADI Blackfin arithmetic relocation.
3555 ADI Blackfin arithmetic relocation.
3559 ADI Blackfin arithmetic relocation.
3561 BFD_ARELOC_BFIN_LAND
3563 ADI Blackfin arithmetic relocation.
3567 ADI Blackfin arithmetic relocation.
3571 ADI Blackfin arithmetic relocation.
3575 ADI Blackfin arithmetic relocation.
3577 BFD_ARELOC_BFIN_COMP
3579 ADI Blackfin arithmetic relocation.
3581 BFD_ARELOC_BFIN_PAGE
3583 ADI Blackfin arithmetic relocation.
3585 BFD_ARELOC_BFIN_HWPAGE
3587 ADI Blackfin arithmetic relocation.
3589 BFD_ARELOC_BFIN_ADDR
3591 ADI Blackfin arithmetic relocation.
3594 BFD_RELOC_D10V_10_PCREL_R
3596 Mitsubishi D10V relocs.
3597 This is a 10-bit reloc with the right 2 bits
3600 BFD_RELOC_D10V_10_PCREL_L
3602 Mitsubishi D10V relocs.
3603 This is a 10-bit reloc with the right 2 bits
3604 assumed to be 0. This is the same as the previous reloc
3605 except it is in the left container, i.e.,
3606 shifted left 15 bits.
3610 This is an 18-bit reloc with the right 2 bits
3613 BFD_RELOC_D10V_18_PCREL
3615 This is an 18-bit reloc with the right 2 bits
3621 Mitsubishi D30V relocs.
3622 This is a 6-bit absolute reloc.
3624 BFD_RELOC_D30V_9_PCREL
3626 This is a 6-bit pc-relative reloc with
3627 the right 3 bits assumed to be 0.
3629 BFD_RELOC_D30V_9_PCREL_R
3631 This is a 6-bit pc-relative reloc with
3632 the right 3 bits assumed to be 0. Same
3633 as the previous reloc but on the right side
3638 This is a 12-bit absolute reloc with the
3639 right 3 bitsassumed to be 0.
3641 BFD_RELOC_D30V_15_PCREL
3643 This is a 12-bit pc-relative reloc with
3644 the right 3 bits assumed to be 0.
3646 BFD_RELOC_D30V_15_PCREL_R
3648 This is a 12-bit pc-relative reloc with
3649 the right 3 bits assumed to be 0. Same
3650 as the previous reloc but on the right side
3655 This is an 18-bit absolute reloc with
3656 the right 3 bits assumed to be 0.
3658 BFD_RELOC_D30V_21_PCREL
3660 This is an 18-bit pc-relative reloc with
3661 the right 3 bits assumed to be 0.
3663 BFD_RELOC_D30V_21_PCREL_R
3665 This is an 18-bit pc-relative reloc with
3666 the right 3 bits assumed to be 0. Same
3667 as the previous reloc but on the right side
3672 This is a 32-bit absolute reloc.
3674 BFD_RELOC_D30V_32_PCREL
3676 This is a 32-bit pc-relative reloc.
3679 BFD_RELOC_DLX_HI16_S
3694 BFD_RELOC_M32C_RL_JUMP
3696 BFD_RELOC_M32C_RL_1ADDR
3698 BFD_RELOC_M32C_RL_2ADDR
3700 Renesas M16C/M32C Relocations.
3705 Renesas M32R (formerly Mitsubishi M32R) relocs.
3706 This is a 24 bit absolute address.
3708 BFD_RELOC_M32R_10_PCREL
3710 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3712 BFD_RELOC_M32R_18_PCREL
3714 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3716 BFD_RELOC_M32R_26_PCREL
3718 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3720 BFD_RELOC_M32R_HI16_ULO
3722 This is a 16-bit reloc containing the high 16 bits of an address
3723 used when the lower 16 bits are treated as unsigned.
3725 BFD_RELOC_M32R_HI16_SLO
3727 This is a 16-bit reloc containing the high 16 bits of an address
3728 used when the lower 16 bits are treated as signed.
3732 This is a 16-bit reloc containing the lower 16 bits of an address.
3734 BFD_RELOC_M32R_SDA16
3736 This is a 16-bit reloc containing the small data area offset for use in
3737 add3, load, and store instructions.
3739 BFD_RELOC_M32R_GOT24
3741 BFD_RELOC_M32R_26_PLTREL
3745 BFD_RELOC_M32R_GLOB_DAT
3747 BFD_RELOC_M32R_JMP_SLOT
3749 BFD_RELOC_M32R_RELATIVE
3751 BFD_RELOC_M32R_GOTOFF
3753 BFD_RELOC_M32R_GOTOFF_HI_ULO
3755 BFD_RELOC_M32R_GOTOFF_HI_SLO
3757 BFD_RELOC_M32R_GOTOFF_LO
3759 BFD_RELOC_M32R_GOTPC24
3761 BFD_RELOC_M32R_GOT16_HI_ULO
3763 BFD_RELOC_M32R_GOT16_HI_SLO
3765 BFD_RELOC_M32R_GOT16_LO
3767 BFD_RELOC_M32R_GOTPC_HI_ULO
3769 BFD_RELOC_M32R_GOTPC_HI_SLO
3771 BFD_RELOC_M32R_GOTPC_LO
3777 BFD_RELOC_V850_9_PCREL
3779 This is a 9-bit reloc
3781 BFD_RELOC_V850_22_PCREL
3783 This is a 22-bit reloc
3786 BFD_RELOC_V850_SDA_16_16_OFFSET
3788 This is a 16 bit offset from the short data area pointer.
3790 BFD_RELOC_V850_SDA_15_16_OFFSET
3792 This is a 16 bit offset (of which only 15 bits are used) from the
3793 short data area pointer.
3795 BFD_RELOC_V850_ZDA_16_16_OFFSET
3797 This is a 16 bit offset from the zero data area pointer.
3799 BFD_RELOC_V850_ZDA_15_16_OFFSET
3801 This is a 16 bit offset (of which only 15 bits are used) from the
3802 zero data area pointer.
3804 BFD_RELOC_V850_TDA_6_8_OFFSET
3806 This is an 8 bit offset (of which only 6 bits are used) from the
3807 tiny data area pointer.
3809 BFD_RELOC_V850_TDA_7_8_OFFSET
3811 This is an 8bit offset (of which only 7 bits are used) from the tiny
3814 BFD_RELOC_V850_TDA_7_7_OFFSET
3816 This is a 7 bit offset from the tiny data area pointer.
3818 BFD_RELOC_V850_TDA_16_16_OFFSET
3820 This is a 16 bit offset from the tiny data area pointer.
3823 BFD_RELOC_V850_TDA_4_5_OFFSET
3825 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3828 BFD_RELOC_V850_TDA_4_4_OFFSET
3830 This is a 4 bit offset from the tiny data area pointer.
3832 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3834 This is a 16 bit offset from the short data area pointer, with the
3835 bits placed non-contiguously in the instruction.
3837 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3839 This is a 16 bit offset from the zero data area pointer, with the
3840 bits placed non-contiguously in the instruction.
3842 BFD_RELOC_V850_CALLT_6_7_OFFSET
3844 This is a 6 bit offset from the call table base pointer.
3846 BFD_RELOC_V850_CALLT_16_16_OFFSET
3848 This is a 16 bit offset from the call table base pointer.
3850 BFD_RELOC_V850_LONGCALL
3852 Used for relaxing indirect function calls.
3854 BFD_RELOC_V850_LONGJUMP
3856 Used for relaxing indirect jumps.
3858 BFD_RELOC_V850_ALIGN
3860 Used to maintain alignment whilst relaxing.
3862 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3864 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3867 BFD_RELOC_V850_16_PCREL
3869 This is a 16-bit reloc.
3871 BFD_RELOC_V850_17_PCREL
3873 This is a 17-bit reloc.
3877 This is a 23-bit reloc.
3879 BFD_RELOC_V850_32_PCREL
3881 This is a 32-bit reloc.
3883 BFD_RELOC_V850_32_ABS
3885 This is a 32-bit reloc.
3887 BFD_RELOC_V850_16_SPLIT_OFFSET
3889 This is a 16-bit reloc.
3891 BFD_RELOC_V850_16_S1
3893 This is a 16-bit reloc.
3895 BFD_RELOC_V850_LO16_S1
3897 Low 16 bits. 16 bit shifted by 1.
3899 BFD_RELOC_V850_CALLT_15_16_OFFSET
3901 This is a 16 bit offset from the call table base pointer.
3903 BFD_RELOC_V850_32_GOTPCREL
3907 BFD_RELOC_V850_16_GOT
3911 BFD_RELOC_V850_32_GOT
3915 BFD_RELOC_V850_22_PLT_PCREL
3919 BFD_RELOC_V850_32_PLT_PCREL
3927 BFD_RELOC_V850_GLOB_DAT
3931 BFD_RELOC_V850_JMP_SLOT
3935 BFD_RELOC_V850_RELATIVE
3939 BFD_RELOC_V850_16_GOTOFF
3943 BFD_RELOC_V850_32_GOTOFF
3958 This is a 8bit DP reloc for the tms320c30, where the most
3959 significant 8 bits of a 24 bit word are placed into the least
3960 significant 8 bits of the opcode.
3963 BFD_RELOC_TIC54X_PARTLS7
3965 This is a 7bit reloc for the tms320c54x, where the least
3966 significant 7 bits of a 16 bit word are placed into the least
3967 significant 7 bits of the opcode.
3970 BFD_RELOC_TIC54X_PARTMS9
3972 This is a 9bit DP reloc for the tms320c54x, where the most
3973 significant 9 bits of a 16 bit word are placed into the least
3974 significant 9 bits of the opcode.
3979 This is an extended address 23-bit reloc for the tms320c54x.
3982 BFD_RELOC_TIC54X_16_OF_23
3984 This is a 16-bit reloc for the tms320c54x, where the least
3985 significant 16 bits of a 23-bit extended address are placed into
3989 BFD_RELOC_TIC54X_MS7_OF_23
3991 This is a reloc for the tms320c54x, where the most
3992 significant 7 bits of a 23-bit extended address are placed into
3996 BFD_RELOC_C6000_PCR_S21
3998 BFD_RELOC_C6000_PCR_S12
4000 BFD_RELOC_C6000_PCR_S10
4002 BFD_RELOC_C6000_PCR_S7
4004 BFD_RELOC_C6000_ABS_S16
4006 BFD_RELOC_C6000_ABS_L16
4008 BFD_RELOC_C6000_ABS_H16
4010 BFD_RELOC_C6000_SBR_U15_B
4012 BFD_RELOC_C6000_SBR_U15_H
4014 BFD_RELOC_C6000_SBR_U15_W
4016 BFD_RELOC_C6000_SBR_S16
4018 BFD_RELOC_C6000_SBR_L16_B
4020 BFD_RELOC_C6000_SBR_L16_H
4022 BFD_RELOC_C6000_SBR_L16_W
4024 BFD_RELOC_C6000_SBR_H16_B
4026 BFD_RELOC_C6000_SBR_H16_H
4028 BFD_RELOC_C6000_SBR_H16_W
4030 BFD_RELOC_C6000_SBR_GOT_U15_W
4032 BFD_RELOC_C6000_SBR_GOT_L16_W
4034 BFD_RELOC_C6000_SBR_GOT_H16_W
4036 BFD_RELOC_C6000_DSBT_INDEX
4038 BFD_RELOC_C6000_PREL31
4040 BFD_RELOC_C6000_COPY
4042 BFD_RELOC_C6000_JUMP_SLOT
4044 BFD_RELOC_C6000_EHTYPE
4046 BFD_RELOC_C6000_PCR_H16
4048 BFD_RELOC_C6000_PCR_L16
4050 BFD_RELOC_C6000_ALIGN
4052 BFD_RELOC_C6000_FPHEAD
4054 BFD_RELOC_C6000_NOCMP
4056 TMS320C6000 relocations.
4061 This is a 48 bit reloc for the FR30 that stores 32 bits.
4065 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4068 BFD_RELOC_FR30_6_IN_4
4070 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4073 BFD_RELOC_FR30_8_IN_8
4075 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4078 BFD_RELOC_FR30_9_IN_8
4080 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4083 BFD_RELOC_FR30_10_IN_8
4085 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4088 BFD_RELOC_FR30_9_PCREL
4090 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4091 short offset into 8 bits.
4093 BFD_RELOC_FR30_12_PCREL
4095 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4096 short offset into 11 bits.
4099 BFD_RELOC_MCORE_PCREL_IMM8BY4
4101 BFD_RELOC_MCORE_PCREL_IMM11BY2
4103 BFD_RELOC_MCORE_PCREL_IMM4BY2
4105 BFD_RELOC_MCORE_PCREL_32
4107 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4111 Motorola Mcore relocations.
4120 BFD_RELOC_MEP_PCREL8A2
4122 BFD_RELOC_MEP_PCREL12A2
4124 BFD_RELOC_MEP_PCREL17A2
4126 BFD_RELOC_MEP_PCREL24A2
4128 BFD_RELOC_MEP_PCABS24A2
4140 BFD_RELOC_MEP_TPREL7
4142 BFD_RELOC_MEP_TPREL7A2
4144 BFD_RELOC_MEP_TPREL7A4
4146 BFD_RELOC_MEP_UIMM24
4148 BFD_RELOC_MEP_ADDR24A4
4150 BFD_RELOC_MEP_GNU_VTINHERIT
4152 BFD_RELOC_MEP_GNU_VTENTRY
4154 Toshiba Media Processor Relocations.
4160 BFD_RELOC_MMIX_GETA_1
4162 BFD_RELOC_MMIX_GETA_2
4164 BFD_RELOC_MMIX_GETA_3
4166 These are relocations for the GETA instruction.
4168 BFD_RELOC_MMIX_CBRANCH
4170 BFD_RELOC_MMIX_CBRANCH_J
4172 BFD_RELOC_MMIX_CBRANCH_1
4174 BFD_RELOC_MMIX_CBRANCH_2
4176 BFD_RELOC_MMIX_CBRANCH_3
4178 These are relocations for a conditional branch instruction.
4180 BFD_RELOC_MMIX_PUSHJ
4182 BFD_RELOC_MMIX_PUSHJ_1
4184 BFD_RELOC_MMIX_PUSHJ_2
4186 BFD_RELOC_MMIX_PUSHJ_3
4188 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4190 These are relocations for the PUSHJ instruction.
4194 BFD_RELOC_MMIX_JMP_1
4196 BFD_RELOC_MMIX_JMP_2
4198 BFD_RELOC_MMIX_JMP_3
4200 These are relocations for the JMP instruction.
4202 BFD_RELOC_MMIX_ADDR19
4204 This is a relocation for a relative address as in a GETA instruction or
4207 BFD_RELOC_MMIX_ADDR27
4209 This is a relocation for a relative address as in a JMP instruction.
4211 BFD_RELOC_MMIX_REG_OR_BYTE
4213 This is a relocation for an instruction field that may be a general
4214 register or a value 0..255.
4218 This is a relocation for an instruction field that may be a general
4221 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4223 This is a relocation for two instruction fields holding a register and
4224 an offset, the equivalent of the relocation.
4226 BFD_RELOC_MMIX_LOCAL
4228 This relocation is an assertion that the expression is not allocated as
4229 a global register. It does not modify contents.
4232 BFD_RELOC_AVR_7_PCREL
4234 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4235 short offset into 7 bits.
4237 BFD_RELOC_AVR_13_PCREL
4239 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4240 short offset into 12 bits.
4244 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4245 program memory address) into 16 bits.
4247 BFD_RELOC_AVR_LO8_LDI
4249 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4250 data memory address) into 8 bit immediate value of LDI insn.
4252 BFD_RELOC_AVR_HI8_LDI
4254 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4255 of data memory address) into 8 bit immediate value of LDI insn.
4257 BFD_RELOC_AVR_HH8_LDI
4259 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4260 of program memory address) into 8 bit immediate value of LDI insn.
4262 BFD_RELOC_AVR_MS8_LDI
4264 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4265 of 32 bit value) into 8 bit immediate value of LDI insn.
4267 BFD_RELOC_AVR_LO8_LDI_NEG
4269 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4270 (usually data memory address) into 8 bit immediate value of SUBI insn.
4272 BFD_RELOC_AVR_HI8_LDI_NEG
4274 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4275 (high 8 bit of data memory address) into 8 bit immediate value of
4278 BFD_RELOC_AVR_HH8_LDI_NEG
4280 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4281 (most high 8 bit of program memory address) into 8 bit immediate value
4282 of LDI or SUBI insn.
4284 BFD_RELOC_AVR_MS8_LDI_NEG
4286 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4287 of 32 bit value) into 8 bit immediate value of LDI insn.
4289 BFD_RELOC_AVR_LO8_LDI_PM
4291 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4292 command address) into 8 bit immediate value of LDI insn.
4294 BFD_RELOC_AVR_LO8_LDI_GS
4296 This is a 16 bit reloc for the AVR that stores 8 bit value
4297 (command address) into 8 bit immediate value of LDI insn. If the address
4298 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4301 BFD_RELOC_AVR_HI8_LDI_PM
4303 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4304 of command address) into 8 bit immediate value of LDI insn.
4306 BFD_RELOC_AVR_HI8_LDI_GS
4308 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4309 of command address) into 8 bit immediate value of LDI insn. If the address
4310 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4313 BFD_RELOC_AVR_HH8_LDI_PM
4315 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4316 of command address) into 8 bit immediate value of LDI insn.
4318 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4320 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4321 (usually command address) into 8 bit immediate value of SUBI insn.
4323 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4325 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4326 (high 8 bit of 16 bit command address) into 8 bit immediate value
4329 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4331 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4332 (high 6 bit of 22 bit command address) into 8 bit immediate
4337 This is a 32 bit reloc for the AVR that stores 23 bit value
4342 This is a 16 bit reloc for the AVR that stores all needed bits
4343 for absolute addressing with ldi with overflow check to linktime
4347 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4350 BFD_RELOC_AVR_6_ADIW
4352 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
4358 BFD_RELOC_RL78_NEG16
4360 BFD_RELOC_RL78_NEG24
4362 BFD_RELOC_RL78_NEG32
4364 BFD_RELOC_RL78_16_OP
4366 BFD_RELOC_RL78_24_OP
4368 BFD_RELOC_RL78_32_OP
4376 BFD_RELOC_RL78_DIR3U_PCREL
4380 BFD_RELOC_RL78_GPRELB
4382 BFD_RELOC_RL78_GPRELW
4384 BFD_RELOC_RL78_GPRELL
4388 BFD_RELOC_RL78_OP_SUBTRACT
4390 BFD_RELOC_RL78_OP_NEG
4392 BFD_RELOC_RL78_OP_AND
4394 BFD_RELOC_RL78_OP_SHRA
4398 BFD_RELOC_RL78_ABS16
4400 BFD_RELOC_RL78_ABS16_REV
4402 BFD_RELOC_RL78_ABS32
4404 BFD_RELOC_RL78_ABS32_REV
4406 BFD_RELOC_RL78_ABS16U
4408 BFD_RELOC_RL78_ABS16UW
4410 BFD_RELOC_RL78_ABS16UL
4412 BFD_RELOC_RL78_RELAX
4420 Renesas RL78 Relocations.
4443 BFD_RELOC_RX_DIR3U_PCREL
4455 BFD_RELOC_RX_OP_SUBTRACT
4463 BFD_RELOC_RX_ABS16_REV
4467 BFD_RELOC_RX_ABS32_REV
4471 BFD_RELOC_RX_ABS16UW
4473 BFD_RELOC_RX_ABS16UL
4477 Renesas RX Relocations.
4490 32 bit PC relative PLT address.
4494 Copy symbol at runtime.
4496 BFD_RELOC_390_GLOB_DAT
4500 BFD_RELOC_390_JMP_SLOT
4504 BFD_RELOC_390_RELATIVE
4506 Adjust by program base.
4510 32 bit PC relative offset to GOT.
4516 BFD_RELOC_390_PC16DBL
4518 PC relative 16 bit shifted by 1.
4520 BFD_RELOC_390_PLT16DBL
4522 16 bit PC rel. PLT shifted by 1.
4524 BFD_RELOC_390_PC32DBL
4526 PC relative 32 bit shifted by 1.
4528 BFD_RELOC_390_PLT32DBL
4530 32 bit PC rel. PLT shifted by 1.
4532 BFD_RELOC_390_GOTPCDBL
4534 32 bit PC rel. GOT shifted by 1.
4542 64 bit PC relative PLT address.
4544 BFD_RELOC_390_GOTENT
4546 32 bit rel. offset to GOT entry.
4548 BFD_RELOC_390_GOTOFF64
4550 64 bit offset to GOT.
4552 BFD_RELOC_390_GOTPLT12
4554 12-bit offset to symbol-entry within GOT, with PLT handling.
4556 BFD_RELOC_390_GOTPLT16
4558 16-bit offset to symbol-entry within GOT, with PLT handling.
4560 BFD_RELOC_390_GOTPLT32
4562 32-bit offset to symbol-entry within GOT, with PLT handling.
4564 BFD_RELOC_390_GOTPLT64
4566 64-bit offset to symbol-entry within GOT, with PLT handling.
4568 BFD_RELOC_390_GOTPLTENT
4570 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
4572 BFD_RELOC_390_PLTOFF16
4574 16-bit rel. offset from the GOT to a PLT entry.
4576 BFD_RELOC_390_PLTOFF32
4578 32-bit rel. offset from the GOT to a PLT entry.
4580 BFD_RELOC_390_PLTOFF64
4582 64-bit rel. offset from the GOT to a PLT entry.
4585 BFD_RELOC_390_TLS_LOAD
4587 BFD_RELOC_390_TLS_GDCALL
4589 BFD_RELOC_390_TLS_LDCALL
4591 BFD_RELOC_390_TLS_GD32
4593 BFD_RELOC_390_TLS_GD64
4595 BFD_RELOC_390_TLS_GOTIE12
4597 BFD_RELOC_390_TLS_GOTIE32
4599 BFD_RELOC_390_TLS_GOTIE64
4601 BFD_RELOC_390_TLS_LDM32
4603 BFD_RELOC_390_TLS_LDM64
4605 BFD_RELOC_390_TLS_IE32
4607 BFD_RELOC_390_TLS_IE64
4609 BFD_RELOC_390_TLS_IEENT
4611 BFD_RELOC_390_TLS_LE32
4613 BFD_RELOC_390_TLS_LE64
4615 BFD_RELOC_390_TLS_LDO32
4617 BFD_RELOC_390_TLS_LDO64
4619 BFD_RELOC_390_TLS_DTPMOD
4621 BFD_RELOC_390_TLS_DTPOFF
4623 BFD_RELOC_390_TLS_TPOFF
4625 s390 tls relocations.
4632 BFD_RELOC_390_GOTPLT20
4634 BFD_RELOC_390_TLS_GOTIE20
4636 Long displacement extension.
4639 BFD_RELOC_SCORE_GPREL15
4642 Low 16 bit for load/store
4644 BFD_RELOC_SCORE_DUMMY2
4648 This is a 24-bit reloc with the right 1 bit assumed to be 0
4650 BFD_RELOC_SCORE_BRANCH
4652 This is a 19-bit reloc with the right 1 bit assumed to be 0
4654 BFD_RELOC_SCORE_IMM30
4656 This is a 32-bit reloc for 48-bit instructions.
4658 BFD_RELOC_SCORE_IMM32
4660 This is a 32-bit reloc for 48-bit instructions.
4662 BFD_RELOC_SCORE16_JMP
4664 This is a 11-bit reloc with the right 1 bit assumed to be 0
4666 BFD_RELOC_SCORE16_BRANCH
4668 This is a 8-bit reloc with the right 1 bit assumed to be 0
4670 BFD_RELOC_SCORE_BCMP
4672 This is a 9-bit reloc with the right 1 bit assumed to be 0
4674 BFD_RELOC_SCORE_GOT15
4676 BFD_RELOC_SCORE_GOT_LO16
4678 BFD_RELOC_SCORE_CALL15
4680 BFD_RELOC_SCORE_DUMMY_HI16
4682 Undocumented Score relocs
4687 Scenix IP2K - 9-bit register number / data address
4691 Scenix IP2K - 4-bit register/data bank number
4693 BFD_RELOC_IP2K_ADDR16CJP
4695 Scenix IP2K - low 13 bits of instruction word address
4697 BFD_RELOC_IP2K_PAGE3
4699 Scenix IP2K - high 3 bits of instruction word address
4701 BFD_RELOC_IP2K_LO8DATA
4703 BFD_RELOC_IP2K_HI8DATA
4705 BFD_RELOC_IP2K_EX8DATA
4707 Scenix IP2K - ext/low/high 8 bits of data address
4709 BFD_RELOC_IP2K_LO8INSN
4711 BFD_RELOC_IP2K_HI8INSN
4713 Scenix IP2K - low/high 8 bits of instruction word address
4715 BFD_RELOC_IP2K_PC_SKIP
4717 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
4721 Scenix IP2K - 16 bit word address in text section.
4723 BFD_RELOC_IP2K_FR_OFFSET
4725 Scenix IP2K - 7-bit sp or dp offset
4727 BFD_RELOC_VPE4KMATH_DATA
4729 BFD_RELOC_VPE4KMATH_INSN
4731 Scenix VPE4K coprocessor - data/insn-space addressing
4734 BFD_RELOC_VTABLE_INHERIT
4736 BFD_RELOC_VTABLE_ENTRY
4738 These two relocations are used by the linker to determine which of
4739 the entries in a C++ virtual function table are actually used. When
4740 the --gc-sections option is given, the linker will zero out the entries
4741 that are not used, so that the code for those functions need not be
4742 included in the output.
4744 VTABLE_INHERIT is a zero-space relocation used to describe to the
4745 linker the inheritance tree of a C++ virtual function table. The
4746 relocation's symbol should be the parent class' vtable, and the
4747 relocation should be located at the child vtable.
4749 VTABLE_ENTRY is a zero-space relocation that describes the use of a
4750 virtual function table entry. The reloc's symbol should refer to the
4751 table of the class mentioned in the code. Off of that base, an offset
4752 describes the entry that is being used. For Rela hosts, this offset
4753 is stored in the reloc's addend. For Rel hosts, we are forced to put
4754 this offset in the reloc's section offset.
4757 BFD_RELOC_IA64_IMM14
4759 BFD_RELOC_IA64_IMM22
4761 BFD_RELOC_IA64_IMM64
4763 BFD_RELOC_IA64_DIR32MSB
4765 BFD_RELOC_IA64_DIR32LSB
4767 BFD_RELOC_IA64_DIR64MSB
4769 BFD_RELOC_IA64_DIR64LSB
4771 BFD_RELOC_IA64_GPREL22
4773 BFD_RELOC_IA64_GPREL64I
4775 BFD_RELOC_IA64_GPREL32MSB
4777 BFD_RELOC_IA64_GPREL32LSB
4779 BFD_RELOC_IA64_GPREL64MSB
4781 BFD_RELOC_IA64_GPREL64LSB
4783 BFD_RELOC_IA64_LTOFF22
4785 BFD_RELOC_IA64_LTOFF64I
4787 BFD_RELOC_IA64_PLTOFF22
4789 BFD_RELOC_IA64_PLTOFF64I
4791 BFD_RELOC_IA64_PLTOFF64MSB
4793 BFD_RELOC_IA64_PLTOFF64LSB
4795 BFD_RELOC_IA64_FPTR64I
4797 BFD_RELOC_IA64_FPTR32MSB
4799 BFD_RELOC_IA64_FPTR32LSB
4801 BFD_RELOC_IA64_FPTR64MSB
4803 BFD_RELOC_IA64_FPTR64LSB
4805 BFD_RELOC_IA64_PCREL21B
4807 BFD_RELOC_IA64_PCREL21BI
4809 BFD_RELOC_IA64_PCREL21M
4811 BFD_RELOC_IA64_PCREL21F
4813 BFD_RELOC_IA64_PCREL22
4815 BFD_RELOC_IA64_PCREL60B
4817 BFD_RELOC_IA64_PCREL64I
4819 BFD_RELOC_IA64_PCREL32MSB
4821 BFD_RELOC_IA64_PCREL32LSB
4823 BFD_RELOC_IA64_PCREL64MSB
4825 BFD_RELOC_IA64_PCREL64LSB
4827 BFD_RELOC_IA64_LTOFF_FPTR22
4829 BFD_RELOC_IA64_LTOFF_FPTR64I
4831 BFD_RELOC_IA64_LTOFF_FPTR32MSB
4833 BFD_RELOC_IA64_LTOFF_FPTR32LSB
4835 BFD_RELOC_IA64_LTOFF_FPTR64MSB
4837 BFD_RELOC_IA64_LTOFF_FPTR64LSB
4839 BFD_RELOC_IA64_SEGREL32MSB
4841 BFD_RELOC_IA64_SEGREL32LSB
4843 BFD_RELOC_IA64_SEGREL64MSB
4845 BFD_RELOC_IA64_SEGREL64LSB
4847 BFD_RELOC_IA64_SECREL32MSB
4849 BFD_RELOC_IA64_SECREL32LSB
4851 BFD_RELOC_IA64_SECREL64MSB
4853 BFD_RELOC_IA64_SECREL64LSB
4855 BFD_RELOC_IA64_REL32MSB
4857 BFD_RELOC_IA64_REL32LSB
4859 BFD_RELOC_IA64_REL64MSB
4861 BFD_RELOC_IA64_REL64LSB
4863 BFD_RELOC_IA64_LTV32MSB
4865 BFD_RELOC_IA64_LTV32LSB
4867 BFD_RELOC_IA64_LTV64MSB
4869 BFD_RELOC_IA64_LTV64LSB
4871 BFD_RELOC_IA64_IPLTMSB
4873 BFD_RELOC_IA64_IPLTLSB
4877 BFD_RELOC_IA64_LTOFF22X
4879 BFD_RELOC_IA64_LDXMOV
4881 BFD_RELOC_IA64_TPREL14
4883 BFD_RELOC_IA64_TPREL22
4885 BFD_RELOC_IA64_TPREL64I
4887 BFD_RELOC_IA64_TPREL64MSB
4889 BFD_RELOC_IA64_TPREL64LSB
4891 BFD_RELOC_IA64_LTOFF_TPREL22
4893 BFD_RELOC_IA64_DTPMOD64MSB
4895 BFD_RELOC_IA64_DTPMOD64LSB
4897 BFD_RELOC_IA64_LTOFF_DTPMOD22
4899 BFD_RELOC_IA64_DTPREL14
4901 BFD_RELOC_IA64_DTPREL22
4903 BFD_RELOC_IA64_DTPREL64I
4905 BFD_RELOC_IA64_DTPREL32MSB
4907 BFD_RELOC_IA64_DTPREL32LSB
4909 BFD_RELOC_IA64_DTPREL64MSB
4911 BFD_RELOC_IA64_DTPREL64LSB
4913 BFD_RELOC_IA64_LTOFF_DTPREL22
4915 Intel IA64 Relocations.
4918 BFD_RELOC_M68HC11_HI8
4920 Motorola 68HC11 reloc.
4921 This is the 8 bit high part of an absolute address.
4923 BFD_RELOC_M68HC11_LO8
4925 Motorola 68HC11 reloc.
4926 This is the 8 bit low part of an absolute address.
4928 BFD_RELOC_M68HC11_3B
4930 Motorola 68HC11 reloc.
4931 This is the 3 bit of a value.
4933 BFD_RELOC_M68HC11_RL_JUMP
4935 Motorola 68HC11 reloc.
4936 This reloc marks the beginning of a jump/call instruction.
4937 It is used for linker relaxation to correctly identify beginning
4938 of instruction and change some branches to use PC-relative
4941 BFD_RELOC_M68HC11_RL_GROUP
4943 Motorola 68HC11 reloc.
4944 This reloc marks a group of several instructions that gcc generates
4945 and for which the linker relaxation pass can modify and/or remove
4948 BFD_RELOC_M68HC11_LO16
4950 Motorola 68HC11 reloc.
4951 This is the 16-bit lower part of an address. It is used for 'call'
4952 instruction to specify the symbol address without any special
4953 transformation (due to memory bank window).
4955 BFD_RELOC_M68HC11_PAGE
4957 Motorola 68HC11 reloc.
4958 This is a 8-bit reloc that specifies the page number of an address.
4959 It is used by 'call' instruction to specify the page number of
4962 BFD_RELOC_M68HC11_24
4964 Motorola 68HC11 reloc.
4965 This is a 24-bit reloc that represents the address with a 16-bit
4966 value and a 8-bit page number. The symbol address is transformed
4967 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
4969 BFD_RELOC_M68HC12_5B
4971 Motorola 68HC12 reloc.
4972 This is the 5 bits of a value.
4977 BFD_RELOC_16C_NUM08_C
4981 BFD_RELOC_16C_NUM16_C
4985 BFD_RELOC_16C_NUM32_C
4987 BFD_RELOC_16C_DISP04
4989 BFD_RELOC_16C_DISP04_C
4991 BFD_RELOC_16C_DISP08
4993 BFD_RELOC_16C_DISP08_C
4995 BFD_RELOC_16C_DISP16
4997 BFD_RELOC_16C_DISP16_C
4999 BFD_RELOC_16C_DISP24
5001 BFD_RELOC_16C_DISP24_C
5003 BFD_RELOC_16C_DISP24a
5005 BFD_RELOC_16C_DISP24a_C
5009 BFD_RELOC_16C_REG04_C
5011 BFD_RELOC_16C_REG04a
5013 BFD_RELOC_16C_REG04a_C
5017 BFD_RELOC_16C_REG14_C
5021 BFD_RELOC_16C_REG16_C
5025 BFD_RELOC_16C_REG20_C
5029 BFD_RELOC_16C_ABS20_C
5033 BFD_RELOC_16C_ABS24_C
5037 BFD_RELOC_16C_IMM04_C
5041 BFD_RELOC_16C_IMM16_C
5045 BFD_RELOC_16C_IMM20_C
5049 BFD_RELOC_16C_IMM24_C
5053 BFD_RELOC_16C_IMM32_C
5055 NS CR16C Relocations.
5060 BFD_RELOC_CR16_NUM16
5062 BFD_RELOC_CR16_NUM32
5064 BFD_RELOC_CR16_NUM32a
5066 BFD_RELOC_CR16_REGREL0
5068 BFD_RELOC_CR16_REGREL4
5070 BFD_RELOC_CR16_REGREL4a
5072 BFD_RELOC_CR16_REGREL14
5074 BFD_RELOC_CR16_REGREL14a
5076 BFD_RELOC_CR16_REGREL16
5078 BFD_RELOC_CR16_REGREL20
5080 BFD_RELOC_CR16_REGREL20a
5082 BFD_RELOC_CR16_ABS20
5084 BFD_RELOC_CR16_ABS24
5090 BFD_RELOC_CR16_IMM16
5092 BFD_RELOC_CR16_IMM20
5094 BFD_RELOC_CR16_IMM24
5096 BFD_RELOC_CR16_IMM32
5098 BFD_RELOC_CR16_IMM32a
5100 BFD_RELOC_CR16_DISP4
5102 BFD_RELOC_CR16_DISP8
5104 BFD_RELOC_CR16_DISP16
5106 BFD_RELOC_CR16_DISP20
5108 BFD_RELOC_CR16_DISP24
5110 BFD_RELOC_CR16_DISP24a
5112 BFD_RELOC_CR16_SWITCH8
5114 BFD_RELOC_CR16_SWITCH16
5116 BFD_RELOC_CR16_SWITCH32
5118 BFD_RELOC_CR16_GOT_REGREL20
5120 BFD_RELOC_CR16_GOTC_REGREL20
5122 BFD_RELOC_CR16_GLOB_DAT
5124 NS CR16 Relocations.
5131 BFD_RELOC_CRX_REL8_CMP
5139 BFD_RELOC_CRX_REGREL12
5141 BFD_RELOC_CRX_REGREL22
5143 BFD_RELOC_CRX_REGREL28
5145 BFD_RELOC_CRX_REGREL32
5161 BFD_RELOC_CRX_SWITCH8
5163 BFD_RELOC_CRX_SWITCH16
5165 BFD_RELOC_CRX_SWITCH32
5170 BFD_RELOC_CRIS_BDISP8
5172 BFD_RELOC_CRIS_UNSIGNED_5
5174 BFD_RELOC_CRIS_SIGNED_6
5176 BFD_RELOC_CRIS_UNSIGNED_6
5178 BFD_RELOC_CRIS_SIGNED_8
5180 BFD_RELOC_CRIS_UNSIGNED_8
5182 BFD_RELOC_CRIS_SIGNED_16
5184 BFD_RELOC_CRIS_UNSIGNED_16
5186 BFD_RELOC_CRIS_LAPCQ_OFFSET
5188 BFD_RELOC_CRIS_UNSIGNED_4
5190 These relocs are only used within the CRIS assembler. They are not
5191 (at present) written to any object files.
5195 BFD_RELOC_CRIS_GLOB_DAT
5197 BFD_RELOC_CRIS_JUMP_SLOT
5199 BFD_RELOC_CRIS_RELATIVE
5201 Relocs used in ELF shared libraries for CRIS.
5203 BFD_RELOC_CRIS_32_GOT
5205 32-bit offset to symbol-entry within GOT.
5207 BFD_RELOC_CRIS_16_GOT
5209 16-bit offset to symbol-entry within GOT.
5211 BFD_RELOC_CRIS_32_GOTPLT
5213 32-bit offset to symbol-entry within GOT, with PLT handling.
5215 BFD_RELOC_CRIS_16_GOTPLT
5217 16-bit offset to symbol-entry within GOT, with PLT handling.
5219 BFD_RELOC_CRIS_32_GOTREL
5221 32-bit offset to symbol, relative to GOT.
5223 BFD_RELOC_CRIS_32_PLT_GOTREL
5225 32-bit offset to symbol with PLT entry, relative to GOT.
5227 BFD_RELOC_CRIS_32_PLT_PCREL
5229 32-bit offset to symbol with PLT entry, relative to this relocation.
5232 BFD_RELOC_CRIS_32_GOT_GD
5234 BFD_RELOC_CRIS_16_GOT_GD
5236 BFD_RELOC_CRIS_32_GD
5240 BFD_RELOC_CRIS_32_DTPREL
5242 BFD_RELOC_CRIS_16_DTPREL
5244 BFD_RELOC_CRIS_32_GOT_TPREL
5246 BFD_RELOC_CRIS_16_GOT_TPREL
5248 BFD_RELOC_CRIS_32_TPREL
5250 BFD_RELOC_CRIS_16_TPREL
5252 BFD_RELOC_CRIS_DTPMOD
5254 BFD_RELOC_CRIS_32_IE
5256 Relocs used in TLS code for CRIS.
5261 BFD_RELOC_860_GLOB_DAT
5263 BFD_RELOC_860_JUMP_SLOT
5265 BFD_RELOC_860_RELATIVE
5275 BFD_RELOC_860_SPLIT0
5279 BFD_RELOC_860_SPLIT1
5283 BFD_RELOC_860_SPLIT2
5287 BFD_RELOC_860_LOGOT0
5289 BFD_RELOC_860_SPGOT0
5291 BFD_RELOC_860_LOGOT1
5293 BFD_RELOC_860_SPGOT1
5295 BFD_RELOC_860_LOGOTOFF0
5297 BFD_RELOC_860_SPGOTOFF0
5299 BFD_RELOC_860_LOGOTOFF1
5301 BFD_RELOC_860_SPGOTOFF1
5303 BFD_RELOC_860_LOGOTOFF2
5305 BFD_RELOC_860_LOGOTOFF3
5309 BFD_RELOC_860_HIGHADJ
5313 BFD_RELOC_860_HAGOTOFF
5321 BFD_RELOC_860_HIGOTOFF
5323 Intel i860 Relocations.
5326 BFD_RELOC_OPENRISC_ABS_26
5328 BFD_RELOC_OPENRISC_REL_26
5330 OpenRISC Relocations.
5333 BFD_RELOC_H8_DIR16A8
5335 BFD_RELOC_H8_DIR16R8
5337 BFD_RELOC_H8_DIR24A8
5339 BFD_RELOC_H8_DIR24R8
5341 BFD_RELOC_H8_DIR32A16
5346 BFD_RELOC_XSTORMY16_REL_12
5348 BFD_RELOC_XSTORMY16_12
5350 BFD_RELOC_XSTORMY16_24
5352 BFD_RELOC_XSTORMY16_FPTR16
5354 Sony Xstormy16 Relocations.
5359 Self-describing complex relocations.
5371 Infineon Relocations.
5374 BFD_RELOC_VAX_GLOB_DAT
5376 BFD_RELOC_VAX_JMP_SLOT
5378 BFD_RELOC_VAX_RELATIVE
5380 Relocations used by VAX ELF.
5385 Morpho MT - 16 bit immediate relocation.
5389 Morpho MT - Hi 16 bits of an address.
5393 Morpho MT - Low 16 bits of an address.
5395 BFD_RELOC_MT_GNU_VTINHERIT
5397 Morpho MT - Used to tell the linker which vtable entries are used.
5399 BFD_RELOC_MT_GNU_VTENTRY
5401 Morpho MT - Used to tell the linker which vtable entries are used.
5403 BFD_RELOC_MT_PCINSN8
5405 Morpho MT - 8 bit immediate relocation.
5408 BFD_RELOC_MSP430_10_PCREL
5410 BFD_RELOC_MSP430_16_PCREL
5414 BFD_RELOC_MSP430_16_PCREL_BYTE
5416 BFD_RELOC_MSP430_16_BYTE
5418 BFD_RELOC_MSP430_2X_PCREL
5420 BFD_RELOC_MSP430_RL_PCREL
5422 msp430 specific relocation codes
5425 BFD_RELOC_IQ2000_OFFSET_16
5427 BFD_RELOC_IQ2000_OFFSET_21
5429 BFD_RELOC_IQ2000_UHI16
5434 BFD_RELOC_XTENSA_RTLD
5436 Special Xtensa relocation used only by PLT entries in ELF shared
5437 objects to indicate that the runtime linker should set the value
5438 to one of its own internal functions or data structures.
5440 BFD_RELOC_XTENSA_GLOB_DAT
5442 BFD_RELOC_XTENSA_JMP_SLOT
5444 BFD_RELOC_XTENSA_RELATIVE
5446 Xtensa relocations for ELF shared objects.
5448 BFD_RELOC_XTENSA_PLT
5450 Xtensa relocation used in ELF object files for symbols that may require
5451 PLT entries. Otherwise, this is just a generic 32-bit relocation.
5453 BFD_RELOC_XTENSA_DIFF8
5455 BFD_RELOC_XTENSA_DIFF16
5457 BFD_RELOC_XTENSA_DIFF32
5459 Xtensa relocations to mark the difference of two local symbols.
5460 These are only needed to support linker relaxation and can be ignored
5461 when not relaxing. The field is set to the value of the difference
5462 assuming no relaxation. The relocation encodes the position of the
5463 first symbol so the linker can determine whether to adjust the field
5466 BFD_RELOC_XTENSA_SLOT0_OP
5468 BFD_RELOC_XTENSA_SLOT1_OP
5470 BFD_RELOC_XTENSA_SLOT2_OP
5472 BFD_RELOC_XTENSA_SLOT3_OP
5474 BFD_RELOC_XTENSA_SLOT4_OP
5476 BFD_RELOC_XTENSA_SLOT5_OP
5478 BFD_RELOC_XTENSA_SLOT6_OP
5480 BFD_RELOC_XTENSA_SLOT7_OP
5482 BFD_RELOC_XTENSA_SLOT8_OP
5484 BFD_RELOC_XTENSA_SLOT9_OP
5486 BFD_RELOC_XTENSA_SLOT10_OP
5488 BFD_RELOC_XTENSA_SLOT11_OP
5490 BFD_RELOC_XTENSA_SLOT12_OP
5492 BFD_RELOC_XTENSA_SLOT13_OP
5494 BFD_RELOC_XTENSA_SLOT14_OP
5496 Generic Xtensa relocations for instruction operands. Only the slot
5497 number is encoded in the relocation. The relocation applies to the
5498 last PC-relative immediate operand, or if there are no PC-relative
5499 immediates, to the last immediate operand.
5501 BFD_RELOC_XTENSA_SLOT0_ALT
5503 BFD_RELOC_XTENSA_SLOT1_ALT
5505 BFD_RELOC_XTENSA_SLOT2_ALT
5507 BFD_RELOC_XTENSA_SLOT3_ALT
5509 BFD_RELOC_XTENSA_SLOT4_ALT
5511 BFD_RELOC_XTENSA_SLOT5_ALT
5513 BFD_RELOC_XTENSA_SLOT6_ALT
5515 BFD_RELOC_XTENSA_SLOT7_ALT
5517 BFD_RELOC_XTENSA_SLOT8_ALT
5519 BFD_RELOC_XTENSA_SLOT9_ALT
5521 BFD_RELOC_XTENSA_SLOT10_ALT
5523 BFD_RELOC_XTENSA_SLOT11_ALT
5525 BFD_RELOC_XTENSA_SLOT12_ALT
5527 BFD_RELOC_XTENSA_SLOT13_ALT
5529 BFD_RELOC_XTENSA_SLOT14_ALT
5531 Alternate Xtensa relocations. Only the slot is encoded in the
5532 relocation. The meaning of these relocations is opcode-specific.
5534 BFD_RELOC_XTENSA_OP0
5536 BFD_RELOC_XTENSA_OP1
5538 BFD_RELOC_XTENSA_OP2
5540 Xtensa relocations for backward compatibility. These have all been
5541 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
5543 BFD_RELOC_XTENSA_ASM_EXPAND
5545 Xtensa relocation to mark that the assembler expanded the
5546 instructions from an original target. The expansion size is
5547 encoded in the reloc size.
5549 BFD_RELOC_XTENSA_ASM_SIMPLIFY
5551 Xtensa relocation to mark that the linker should simplify
5552 assembler-expanded instructions. This is commonly used
5553 internally by the linker after analysis of a
5554 BFD_RELOC_XTENSA_ASM_EXPAND.
5556 BFD_RELOC_XTENSA_TLSDESC_FN
5558 BFD_RELOC_XTENSA_TLSDESC_ARG
5560 BFD_RELOC_XTENSA_TLS_DTPOFF
5562 BFD_RELOC_XTENSA_TLS_TPOFF
5564 BFD_RELOC_XTENSA_TLS_FUNC
5566 BFD_RELOC_XTENSA_TLS_ARG
5568 BFD_RELOC_XTENSA_TLS_CALL
5570 Xtensa TLS relocations.
5575 8 bit signed offset in (ix+d) or (iy+d).
5593 BFD_RELOC_LM32_BRANCH
5595 BFD_RELOC_LM32_16_GOT
5597 BFD_RELOC_LM32_GOTOFF_HI16
5599 BFD_RELOC_LM32_GOTOFF_LO16
5603 BFD_RELOC_LM32_GLOB_DAT
5605 BFD_RELOC_LM32_JMP_SLOT
5607 BFD_RELOC_LM32_RELATIVE
5609 Lattice Mico32 relocations.
5612 BFD_RELOC_MACH_O_SECTDIFF
5614 Difference between two section addreses. Must be followed by a
5615 BFD_RELOC_MACH_O_PAIR.
5617 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
5619 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
5621 BFD_RELOC_MACH_O_PAIR
5623 Pair of relocation. Contains the first symbol.
5626 BFD_RELOC_MACH_O_X86_64_BRANCH32
5628 BFD_RELOC_MACH_O_X86_64_BRANCH8
5630 PCREL relocations. They are marked as branch to create PLT entry if
5633 BFD_RELOC_MACH_O_X86_64_GOT
5635 Used when referencing a GOT entry.
5637 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
5639 Used when loading a GOT entry with movq. It is specially marked so that
5640 the linker could optimize the movq to a leaq if possible.
5642 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32
5644 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
5646 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64
5648 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
5650 BFD_RELOC_MACH_O_X86_64_PCREL32_1
5652 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
5654 BFD_RELOC_MACH_O_X86_64_PCREL32_2
5656 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
5658 BFD_RELOC_MACH_O_X86_64_PCREL32_4
5660 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
5663 BFD_RELOC_MICROBLAZE_32_LO
5665 This is a 32 bit reloc for the microblaze that stores the
5666 low 16 bits of a value
5668 BFD_RELOC_MICROBLAZE_32_LO_PCREL
5670 This is a 32 bit pc-relative reloc for the microblaze that
5671 stores the low 16 bits of a value
5673 BFD_RELOC_MICROBLAZE_32_ROSDA
5675 This is a 32 bit reloc for the microblaze that stores a
5676 value relative to the read-only small data area anchor
5678 BFD_RELOC_MICROBLAZE_32_RWSDA
5680 This is a 32 bit reloc for the microblaze that stores a
5681 value relative to the read-write small data area anchor
5683 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
5685 This is a 32 bit reloc for the microblaze to handle
5686 expressions of the form "Symbol Op Symbol"
5688 BFD_RELOC_MICROBLAZE_64_NONE
5690 This is a 64 bit reloc that stores the 32 bit pc relative
5691 value in two words (with an imm instruction). No relocation is
5692 done here - only used for relaxing
5694 BFD_RELOC_MICROBLAZE_64_GOTPC
5696 This is a 64 bit reloc that stores the 32 bit pc relative
5697 value in two words (with an imm instruction). The relocation is
5698 PC-relative GOT offset
5700 BFD_RELOC_MICROBLAZE_64_GOT
5702 This is a 64 bit reloc that stores the 32 bit pc relative
5703 value in two words (with an imm instruction). The relocation is
5706 BFD_RELOC_MICROBLAZE_64_PLT
5708 This is a 64 bit reloc that stores the 32 bit pc relative
5709 value in two words (with an imm instruction). The relocation is
5710 PC-relative offset into PLT
5712 BFD_RELOC_MICROBLAZE_64_GOTOFF
5714 This is a 64 bit reloc that stores the 32 bit GOT relative
5715 value in two words (with an imm instruction). The relocation is
5716 relative offset from _GLOBAL_OFFSET_TABLE_
5718 BFD_RELOC_MICROBLAZE_32_GOTOFF
5720 This is a 32 bit reloc that stores the 32 bit GOT relative
5721 value in a word. The relocation is relative offset from
5722 _GLOBAL_OFFSET_TABLE_
5724 BFD_RELOC_MICROBLAZE_COPY
5726 This is used to tell the dynamic linker to copy the value out of
5727 the dynamic object into the runtime process image.
5730 BFD_RELOC_TILEPRO_COPY
5732 BFD_RELOC_TILEPRO_GLOB_DAT
5734 BFD_RELOC_TILEPRO_JMP_SLOT
5736 BFD_RELOC_TILEPRO_RELATIVE
5738 BFD_RELOC_TILEPRO_BROFF_X1
5740 BFD_RELOC_TILEPRO_JOFFLONG_X1
5742 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
5744 BFD_RELOC_TILEPRO_IMM8_X0
5746 BFD_RELOC_TILEPRO_IMM8_Y0
5748 BFD_RELOC_TILEPRO_IMM8_X1
5750 BFD_RELOC_TILEPRO_IMM8_Y1
5752 BFD_RELOC_TILEPRO_DEST_IMM8_X1
5754 BFD_RELOC_TILEPRO_MT_IMM15_X1
5756 BFD_RELOC_TILEPRO_MF_IMM15_X1
5758 BFD_RELOC_TILEPRO_IMM16_X0
5760 BFD_RELOC_TILEPRO_IMM16_X1
5762 BFD_RELOC_TILEPRO_IMM16_X0_LO
5764 BFD_RELOC_TILEPRO_IMM16_X1_LO
5766 BFD_RELOC_TILEPRO_IMM16_X0_HI
5768 BFD_RELOC_TILEPRO_IMM16_X1_HI
5770 BFD_RELOC_TILEPRO_IMM16_X0_HA
5772 BFD_RELOC_TILEPRO_IMM16_X1_HA
5774 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
5776 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
5778 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
5780 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
5782 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
5784 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
5786 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
5788 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
5790 BFD_RELOC_TILEPRO_IMM16_X0_GOT
5792 BFD_RELOC_TILEPRO_IMM16_X1_GOT
5794 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
5796 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
5798 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
5800 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
5802 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
5804 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
5806 BFD_RELOC_TILEPRO_MMSTART_X0
5808 BFD_RELOC_TILEPRO_MMEND_X0
5810 BFD_RELOC_TILEPRO_MMSTART_X1
5812 BFD_RELOC_TILEPRO_MMEND_X1
5814 BFD_RELOC_TILEPRO_SHAMT_X0
5816 BFD_RELOC_TILEPRO_SHAMT_X1
5818 BFD_RELOC_TILEPRO_SHAMT_Y0
5820 BFD_RELOC_TILEPRO_SHAMT_Y1
5822 BFD_RELOC_TILEPRO_TLS_GD_CALL
5824 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
5826 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
5828 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
5830 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
5832 BFD_RELOC_TILEPRO_TLS_IE_LOAD
5834 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
5836 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
5838 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
5840 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
5842 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
5844 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
5846 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
5848 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
5850 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
5852 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
5854 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
5856 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
5858 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
5860 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
5862 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
5864 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
5866 BFD_RELOC_TILEPRO_TLS_DTPMOD32
5868 BFD_RELOC_TILEPRO_TLS_DTPOFF32
5870 BFD_RELOC_TILEPRO_TLS_TPOFF32
5872 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
5874 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
5876 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
5878 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
5880 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
5882 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
5884 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
5886 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
5888 Tilera TILEPro Relocations.
5891 BFD_RELOC_TILEGX_HW0
5893 BFD_RELOC_TILEGX_HW1
5895 BFD_RELOC_TILEGX_HW2
5897 BFD_RELOC_TILEGX_HW3
5899 BFD_RELOC_TILEGX_HW0_LAST
5901 BFD_RELOC_TILEGX_HW1_LAST
5903 BFD_RELOC_TILEGX_HW2_LAST
5905 BFD_RELOC_TILEGX_COPY
5907 BFD_RELOC_TILEGX_GLOB_DAT
5909 BFD_RELOC_TILEGX_JMP_SLOT
5911 BFD_RELOC_TILEGX_RELATIVE
5913 BFD_RELOC_TILEGX_BROFF_X1
5915 BFD_RELOC_TILEGX_JUMPOFF_X1
5917 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
5919 BFD_RELOC_TILEGX_IMM8_X0
5921 BFD_RELOC_TILEGX_IMM8_Y0
5923 BFD_RELOC_TILEGX_IMM8_X1
5925 BFD_RELOC_TILEGX_IMM8_Y1
5927 BFD_RELOC_TILEGX_DEST_IMM8_X1
5929 BFD_RELOC_TILEGX_MT_IMM14_X1
5931 BFD_RELOC_TILEGX_MF_IMM14_X1
5933 BFD_RELOC_TILEGX_MMSTART_X0
5935 BFD_RELOC_TILEGX_MMEND_X0
5937 BFD_RELOC_TILEGX_SHAMT_X0
5939 BFD_RELOC_TILEGX_SHAMT_X1
5941 BFD_RELOC_TILEGX_SHAMT_Y0
5943 BFD_RELOC_TILEGX_SHAMT_Y1
5945 BFD_RELOC_TILEGX_IMM16_X0_HW0
5947 BFD_RELOC_TILEGX_IMM16_X1_HW0
5949 BFD_RELOC_TILEGX_IMM16_X0_HW1
5951 BFD_RELOC_TILEGX_IMM16_X1_HW1
5953 BFD_RELOC_TILEGX_IMM16_X0_HW2
5955 BFD_RELOC_TILEGX_IMM16_X1_HW2
5957 BFD_RELOC_TILEGX_IMM16_X0_HW3
5959 BFD_RELOC_TILEGX_IMM16_X1_HW3
5961 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
5963 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
5965 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
5967 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
5969 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
5971 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
5973 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
5975 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
5977 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
5979 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
5981 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
5983 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
5985 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
5987 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
5989 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
5991 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
5993 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
5995 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
5997 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
5999 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
6001 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
6003 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
6005 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
6007 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
6009 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
6011 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
6013 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
6015 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
6017 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
6019 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
6021 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
6023 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
6025 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
6027 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
6029 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
6031 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
6033 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
6035 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
6037 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
6039 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
6041 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
6043 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
6045 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
6047 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
6049 BFD_RELOC_TILEGX_TLS_DTPMOD64
6051 BFD_RELOC_TILEGX_TLS_DTPOFF64
6053 BFD_RELOC_TILEGX_TLS_TPOFF64
6055 BFD_RELOC_TILEGX_TLS_DTPMOD32
6057 BFD_RELOC_TILEGX_TLS_DTPOFF32
6059 BFD_RELOC_TILEGX_TLS_TPOFF32
6061 BFD_RELOC_TILEGX_TLS_GD_CALL
6063 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
6065 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
6067 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
6069 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
6071 BFD_RELOC_TILEGX_TLS_IE_LOAD
6073 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
6075 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
6077 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
6079 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
6081 Tilera TILE-Gx Relocations.
6084 BFD_RELOC_EPIPHANY_SIMM8
6086 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
6088 BFD_RELOC_EPIPHANY_SIMM24
6090 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
6092 BFD_RELOC_EPIPHANY_HIGH
6094 Adapteva EPIPHANY - 16 most-significant bits of absolute address
6096 BFD_RELOC_EPIPHANY_LOW
6098 Adapteva EPIPHANY - 16 least-significant bits of absolute address
6100 BFD_RELOC_EPIPHANY_SIMM11
6102 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
6104 BFD_RELOC_EPIPHANY_IMM11
6106 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
6108 BFD_RELOC_EPIPHANY_IMM8
6110 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
6117 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
6122 bfd_reloc_type_lookup
6123 bfd_reloc_name_lookup
6126 reloc_howto_type *bfd_reloc_type_lookup
6127 (bfd *abfd, bfd_reloc_code_real_type code);
6128 reloc_howto_type *bfd_reloc_name_lookup
6129 (bfd *abfd, const char *reloc_name);
6132 Return a pointer to a howto structure which, when
6133 invoked, will perform the relocation @var{code} on data from the
6139 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
6141 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
6145 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
6147 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
6150 static reloc_howto_type bfd_howto_32
=
6151 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
6155 bfd_default_reloc_type_lookup
6158 reloc_howto_type *bfd_default_reloc_type_lookup
6159 (bfd *abfd, bfd_reloc_code_real_type code);
6162 Provides a default relocation lookup routine for any architecture.
6167 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
6171 case BFD_RELOC_CTOR
:
6172 /* The type of reloc used in a ctor, which will be as wide as the
6173 address - so either a 64, 32, or 16 bitter. */
6174 switch (bfd_arch_bits_per_address (abfd
))
6179 return &bfd_howto_32
;
6193 bfd_get_reloc_code_name
6196 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
6199 Provides a printable name for the supplied relocation code.
6200 Useful mainly for printing error messages.
6204 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
6206 if (code
> BFD_RELOC_UNUSED
)
6208 return bfd_reloc_code_real_names
[code
];
6213 bfd_generic_relax_section
6216 bfd_boolean bfd_generic_relax_section
6219 struct bfd_link_info *,
6223 Provides default handling for relaxing for back ends which
6228 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
6229 asection
*section ATTRIBUTE_UNUSED
,
6230 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
6233 if (link_info
->relocatable
)
6234 (*link_info
->callbacks
->einfo
)
6235 (_("%P%F: --relax and -r may not be used together\n"));
6243 bfd_generic_gc_sections
6246 bfd_boolean bfd_generic_gc_sections
6247 (bfd *, struct bfd_link_info *);
6250 Provides default handling for relaxing for back ends which
6251 don't do section gc -- i.e., does nothing.
6255 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
6256 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
6263 bfd_generic_lookup_section_flags
6266 void bfd_generic_lookup_section_flags
6267 (struct bfd_link_info *, struct flag_info *);
6270 Provides default handling for section flags lookup
6271 -- i.e., does nothing.
6275 bfd_generic_lookup_section_flags (struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
6276 struct flag_info
*flaginfo
)
6278 if (flaginfo
!= NULL
)
6280 (*_bfd_error_handler
) (_("INPUT_SECTION_FLAGS are not supported.\n"));
6287 bfd_generic_merge_sections
6290 bfd_boolean bfd_generic_merge_sections
6291 (bfd *, struct bfd_link_info *);
6294 Provides default handling for SEC_MERGE section merging for back ends
6295 which don't have SEC_MERGE support -- i.e., does nothing.
6299 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
6300 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
6307 bfd_generic_get_relocated_section_contents
6310 bfd_byte *bfd_generic_get_relocated_section_contents
6312 struct bfd_link_info *link_info,
6313 struct bfd_link_order *link_order,
6315 bfd_boolean relocatable,
6319 Provides default handling of relocation effort for back ends
6320 which can't be bothered to do it efficiently.
6325 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
6326 struct bfd_link_info
*link_info
,
6327 struct bfd_link_order
*link_order
,
6329 bfd_boolean relocatable
,
6332 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
6333 asection
*input_section
= link_order
->u
.indirect
.section
;
6335 arelent
**reloc_vector
;
6338 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
6342 /* Read in the section. */
6343 if (!bfd_get_full_section_contents (input_bfd
, input_section
, &data
))
6346 if (reloc_size
== 0)
6349 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
6350 if (reloc_vector
== NULL
)
6353 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
6357 if (reloc_count
< 0)
6360 if (reloc_count
> 0)
6363 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
6365 char *error_message
= NULL
;
6367 bfd_reloc_status_type r
;
6369 symbol
= *(*parent
)->sym_ptr_ptr
;
6370 if (symbol
->section
&& elf_discarded_section (symbol
->section
))
6373 static reloc_howto_type none_howto
6374 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
6375 "unused", FALSE
, 0, 0, FALSE
);
6377 p
= data
+ (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
6378 _bfd_clear_contents ((*parent
)->howto
, input_bfd
, input_section
,
6380 (*parent
)->sym_ptr_ptr
= bfd_abs_section
.symbol_ptr_ptr
;
6381 (*parent
)->addend
= 0;
6382 (*parent
)->howto
= &none_howto
;
6386 r
= bfd_perform_relocation (input_bfd
,
6390 relocatable
? abfd
: NULL
,
6395 asection
*os
= input_section
->output_section
;
6397 /* A partial link, so keep the relocs. */
6398 os
->orelocation
[os
->reloc_count
] = *parent
;
6402 if (r
!= bfd_reloc_ok
)
6406 case bfd_reloc_undefined
:
6407 if (!((*link_info
->callbacks
->undefined_symbol
)
6408 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
6409 input_bfd
, input_section
, (*parent
)->address
,
6413 case bfd_reloc_dangerous
:
6414 BFD_ASSERT (error_message
!= NULL
);
6415 if (!((*link_info
->callbacks
->reloc_dangerous
)
6416 (link_info
, error_message
, input_bfd
, input_section
,
6417 (*parent
)->address
)))
6420 case bfd_reloc_overflow
:
6421 if (!((*link_info
->callbacks
->reloc_overflow
)
6423 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
6424 (*parent
)->howto
->name
, (*parent
)->addend
,
6425 input_bfd
, input_section
, (*parent
)->address
)))
6428 case bfd_reloc_outofrange
:
6430 This error can result when processing some partially
6431 complete binaries. Do not abort, but issue an error
6433 link_info
->callbacks
->einfo
6434 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
6435 abfd
, input_section
, * parent
);
6447 free (reloc_vector
);
6451 free (reloc_vector
);