1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2018 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. Note - the value 2 is used so that it
69 . will not be mistaken for the boolean TRUE or FALSE values. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok. If this type is
91 . returned, the error_message argument to bfd_perform_relocation
95 . bfd_reloc_status_type;
97 .typedef const struct reloc_howto_struct reloc_howto_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's idea of
287 . an external reloc number is stored in this field. *}
290 . {* The encoded size of the item to be relocated. This is *not* a
291 . power-of-two measure. Use bfd_get_reloc_size to find the size
292 . of the item in bytes. *}
293 . unsigned int size:3;
295 . {* The number of bits in the field to be relocated. This is used
296 . when doing overflow checking. *}
297 . unsigned int bitsize:7;
299 . {* The value the final relocation is shifted right by. This drops
300 . unwanted data from the relocation. *}
301 . unsigned int rightshift:6;
303 . {* The bit position of the reloc value in the destination.
304 . The relocated value is left shifted by this amount. *}
305 . unsigned int bitpos:6;
307 . {* What type of overflow error should be checked for when
309 . ENUM_BITFIELD (complain_overflow) complain_on_overflow:2;
311 . {* The relocation value should be negated before applying. *}
312 . unsigned int negate:1;
314 . {* The relocation is relative to the item being relocated. *}
315 . unsigned int pc_relative:1;
317 . {* Some formats record a relocation addend in the section contents
318 . rather than with the relocation. For ELF formats this is the
319 . distinction between USE_REL and USE_RELA (though the code checks
320 . for USE_REL == 1/0). The value of this field is TRUE if the
321 . addend is recorded with the section contents; when performing a
322 . partial link (ld -r) the section contents (the data) will be
323 . modified. The value of this field is FALSE if addends are
324 . recorded with the relocation (in arelent.addend); when performing
325 . a partial link the relocation will be modified.
326 . All relocations for all ELF USE_RELA targets should set this field
327 . to FALSE (values of TRUE should be looked on with suspicion).
328 . However, the converse is not true: not all relocations of all ELF
329 . USE_REL targets set this field to TRUE. Why this is so is peculiar
330 . to each particular target. For relocs that aren't used in partial
331 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
332 . unsigned int partial_inplace:1;
334 . {* When some formats create PC relative instructions, they leave
335 . the value of the pc of the place being relocated in the offset
336 . slot of the instruction, so that a PC relative relocation can
337 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
338 . Some formats leave the displacement part of an instruction
339 . empty (e.g., ELF); this flag signals the fact. *}
340 . unsigned int pcrel_offset:1;
342 . {* src_mask selects the part of the instruction (or data) to be used
343 . in the relocation sum. If the target relocations don't have an
344 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
345 . dst_mask to extract the addend from the section contents. If
346 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
347 . field should normally be zero. Non-zero values for ELF USE_RELA
348 . targets should be viewed with suspicion as normally the value in
349 . the dst_mask part of the section contents should be ignored. *}
352 . {* dst_mask selects which parts of the instruction (or data) are
353 . replaced with a relocated value. *}
356 . {* If this field is non null, then the supplied function is
357 . called rather than the normal function. This allows really
358 . strange relocation methods to be accommodated. *}
359 . bfd_reloc_status_type (*special_function)
360 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
363 . {* The textual name of the relocation type. *}
374 The HOWTO macro fills in a reloc_howto_type (a typedef for
375 const struct reloc_howto_struct).
377 .#define HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \
378 . inplace, src_mask, dst_mask, pcrel_off) \
379 . { (unsigned) type, size < 0 ? -size : size, bits, right, left, ovf, \
380 . size < 0, pcrel, inplace, pcrel_off, src_mask, dst_mask, func, name }
383 This is used to fill in an empty howto entry in an array.
385 .#define EMPTY_HOWTO(C) \
386 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
387 . NULL, FALSE, 0, 0, FALSE)
396 unsigned int bfd_get_reloc_size (reloc_howto_type *);
399 For a reloc_howto_type that operates on a fixed number of bytes,
400 this returns the number of bytes operated on.
404 bfd_get_reloc_size (reloc_howto_type
*howto
)
424 How relocs are tied together in an <<asection>>:
426 .typedef struct relent_chain
429 . struct relent_chain *next;
435 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
436 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
443 bfd_reloc_status_type bfd_check_overflow
444 (enum complain_overflow how,
445 unsigned int bitsize,
446 unsigned int rightshift,
447 unsigned int addrsize,
451 Perform overflow checking on @var{relocation} which has
452 @var{bitsize} significant bits and will be shifted right by
453 @var{rightshift} bits, on a machine with addresses containing
454 @var{addrsize} significant bits. The result is either of
455 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
459 bfd_reloc_status_type
460 bfd_check_overflow (enum complain_overflow how
,
461 unsigned int bitsize
,
462 unsigned int rightshift
,
463 unsigned int addrsize
,
466 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
467 bfd_reloc_status_type flag
= bfd_reloc_ok
;
469 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
470 we'll be permissive: extra bits in the field mask will
471 automatically extend the address mask for purposes of the
473 fieldmask
= N_ONES (bitsize
);
474 signmask
= ~fieldmask
;
475 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
476 a
= (relocation
& addrmask
) >> rightshift
;
480 case complain_overflow_dont
:
483 case complain_overflow_signed
:
484 /* If any sign bits are set, all sign bits must be set. That
485 is, A must be a valid negative address after shifting. */
486 signmask
= ~ (fieldmask
>> 1);
489 case complain_overflow_bitfield
:
490 /* Bitfields are sometimes signed, sometimes unsigned. We
491 explicitly allow an address wrap too, which means a bitfield
492 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
493 if the value has some, but not all, bits set outside the
496 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
497 flag
= bfd_reloc_overflow
;
500 case complain_overflow_unsigned
:
501 /* We have an overflow if the address does not fit in the field. */
502 if ((a
& signmask
) != 0)
503 flag
= bfd_reloc_overflow
;
515 bfd_reloc_offset_in_range
518 bfd_boolean bfd_reloc_offset_in_range
519 (reloc_howto_type *howto,
522 bfd_size_type offset);
525 Returns TRUE if the reloc described by @var{HOWTO} can be
526 applied at @var{OFFSET} octets in @var{SECTION}.
530 /* HOWTO describes a relocation, at offset OCTET. Return whether the
531 relocation field is within SECTION of ABFD. */
534 bfd_reloc_offset_in_range (reloc_howto_type
*howto
,
539 bfd_size_type octet_end
= bfd_get_section_limit_octets (abfd
, section
);
540 bfd_size_type reloc_size
= bfd_get_reloc_size (howto
);
542 /* The reloc field must be contained entirely within the section.
543 Allow zero length fields (marker relocs or NONE relocs where no
544 relocation will be performed) at the end of the section. */
545 return octet
<= octet_end
&& octet
+ reloc_size
<= octet_end
;
548 /* Read and return the section contents at DATA converted to a host
549 integer (bfd_vma). The number of bytes read is given by the HOWTO. */
552 read_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
)
557 return bfd_get_8 (abfd
, data
);
560 return bfd_get_16 (abfd
, data
);
563 return bfd_get_32 (abfd
, data
);
570 return bfd_get_64 (abfd
, data
);
574 return bfd_get_24 (abfd
, data
);
582 /* Convert VAL to target format and write to DATA. The number of
583 bytes written is given by the HOWTO. */
586 write_reloc (bfd
*abfd
, bfd_vma val
, bfd_byte
*data
, reloc_howto_type
*howto
)
591 bfd_put_8 (abfd
, val
, data
);
595 bfd_put_16 (abfd
, val
, data
);
599 bfd_put_32 (abfd
, val
, data
);
607 bfd_put_64 (abfd
, val
, data
);
612 bfd_put_24 (abfd
, val
, data
);
620 /* Apply RELOCATION value to target bytes at DATA, according to
624 apply_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
,
627 bfd_vma val
= read_reloc (abfd
, data
, howto
);
630 relocation
= -relocation
;
632 val
= ((val
& ~howto
->dst_mask
)
633 | (((val
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
635 write_reloc (abfd
, val
, data
, howto
);
640 bfd_perform_relocation
643 bfd_reloc_status_type bfd_perform_relocation
645 arelent *reloc_entry,
647 asection *input_section,
649 char **error_message);
652 If @var{output_bfd} is supplied to this function, the
653 generated image will be relocatable; the relocations are
654 copied to the output file after they have been changed to
655 reflect the new state of the world. There are two ways of
656 reflecting the results of partial linkage in an output file:
657 by modifying the output data in place, and by modifying the
658 relocation record. Some native formats (e.g., basic a.out and
659 basic coff) have no way of specifying an addend in the
660 relocation type, so the addend has to go in the output data.
661 This is no big deal since in these formats the output data
662 slot will always be big enough for the addend. Complex reloc
663 types with addends were invented to solve just this problem.
664 The @var{error_message} argument is set to an error message if
665 this return @code{bfd_reloc_dangerous}.
669 bfd_reloc_status_type
670 bfd_perform_relocation (bfd
*abfd
,
671 arelent
*reloc_entry
,
673 asection
*input_section
,
675 char **error_message
)
678 bfd_reloc_status_type flag
= bfd_reloc_ok
;
679 bfd_size_type octets
;
680 bfd_vma output_base
= 0;
681 reloc_howto_type
*howto
= reloc_entry
->howto
;
682 asection
*reloc_target_output_section
;
685 symbol
= *(reloc_entry
->sym_ptr_ptr
);
687 /* If we are not producing relocatable output, return an error if
688 the symbol is not defined. An undefined weak symbol is
689 considered to have a value of zero (SVR4 ABI, p. 4-27). */
690 if (bfd_is_und_section (symbol
->section
)
691 && (symbol
->flags
& BSF_WEAK
) == 0
692 && output_bfd
== NULL
)
693 flag
= bfd_reloc_undefined
;
695 /* If there is a function supplied to handle this relocation type,
696 call it. It'll return `bfd_reloc_continue' if further processing
698 if (howto
&& howto
->special_function
)
700 bfd_reloc_status_type cont
;
702 /* Note - we do not call bfd_reloc_offset_in_range here as the
703 reloc_entry->address field might actually be valid for the
704 backend concerned. It is up to the special_function itself
705 to call bfd_reloc_offset_in_range if needed. */
706 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
707 input_section
, output_bfd
,
709 if (cont
!= bfd_reloc_continue
)
713 if (bfd_is_abs_section (symbol
->section
)
714 && output_bfd
!= NULL
)
716 reloc_entry
->address
+= input_section
->output_offset
;
720 /* PR 17512: file: 0f67f69d. */
722 return bfd_reloc_undefined
;
724 /* Is the address of the relocation really within the section? */
725 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
726 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
727 return bfd_reloc_outofrange
;
729 /* Work out which section the relocation is targeted at and the
730 initial relocation command value. */
732 /* Get symbol value. (Common symbols are special.) */
733 if (bfd_is_com_section (symbol
->section
))
736 relocation
= symbol
->value
;
738 reloc_target_output_section
= symbol
->section
->output_section
;
740 /* Convert input-section-relative symbol value to absolute. */
741 if ((output_bfd
&& ! howto
->partial_inplace
)
742 || reloc_target_output_section
== NULL
)
745 output_base
= reloc_target_output_section
->vma
;
747 relocation
+= output_base
+ symbol
->section
->output_offset
;
749 /* Add in supplied addend. */
750 relocation
+= reloc_entry
->addend
;
752 /* Here the variable relocation holds the final address of the
753 symbol we are relocating against, plus any addend. */
755 if (howto
->pc_relative
)
757 /* This is a PC relative relocation. We want to set RELOCATION
758 to the distance between the address of the symbol and the
759 location. RELOCATION is already the address of the symbol.
761 We start by subtracting the address of the section containing
764 If pcrel_offset is set, we must further subtract the position
765 of the location within the section. Some targets arrange for
766 the addend to be the negative of the position of the location
767 within the section; for example, i386-aout does this. For
768 i386-aout, pcrel_offset is FALSE. Some other targets do not
769 include the position of the location; for example, ELF.
770 For those targets, pcrel_offset is TRUE.
772 If we are producing relocatable output, then we must ensure
773 that this reloc will be correctly computed when the final
774 relocation is done. If pcrel_offset is FALSE we want to wind
775 up with the negative of the location within the section,
776 which means we must adjust the existing addend by the change
777 in the location within the section. If pcrel_offset is TRUE
778 we do not want to adjust the existing addend at all.
780 FIXME: This seems logical to me, but for the case of
781 producing relocatable output it is not what the code
782 actually does. I don't want to change it, because it seems
783 far too likely that something will break. */
786 input_section
->output_section
->vma
+ input_section
->output_offset
;
788 if (howto
->pcrel_offset
)
789 relocation
-= reloc_entry
->address
;
792 if (output_bfd
!= NULL
)
794 if (! howto
->partial_inplace
)
796 /* This is a partial relocation, and we want to apply the relocation
797 to the reloc entry rather than the raw data. Modify the reloc
798 inplace to reflect what we now know. */
799 reloc_entry
->addend
= relocation
;
800 reloc_entry
->address
+= input_section
->output_offset
;
805 /* This is a partial relocation, but inplace, so modify the
808 If we've relocated with a symbol with a section, change
809 into a ref to the section belonging to the symbol. */
811 reloc_entry
->address
+= input_section
->output_offset
;
814 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
815 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
816 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
818 /* For m68k-coff, the addend was being subtracted twice during
819 relocation with -r. Removing the line below this comment
820 fixes that problem; see PR 2953.
822 However, Ian wrote the following, regarding removing the line below,
823 which explains why it is still enabled: --djm
825 If you put a patch like that into BFD you need to check all the COFF
826 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
827 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
828 problem in a different way. There may very well be a reason that the
829 code works as it does.
831 Hmmm. The first obvious point is that bfd_perform_relocation should
832 not have any tests that depend upon the flavour. It's seem like
833 entirely the wrong place for such a thing. The second obvious point
834 is that the current code ignores the reloc addend when producing
835 relocatable output for COFF. That's peculiar. In fact, I really
836 have no idea what the point of the line you want to remove is.
838 A typical COFF reloc subtracts the old value of the symbol and adds in
839 the new value to the location in the object file (if it's a pc
840 relative reloc it adds the difference between the symbol value and the
841 location). When relocating we need to preserve that property.
843 BFD handles this by setting the addend to the negative of the old
844 value of the symbol. Unfortunately it handles common symbols in a
845 non-standard way (it doesn't subtract the old value) but that's a
846 different story (we can't change it without losing backward
847 compatibility with old object files) (coff-i386 does subtract the old
848 value, to be compatible with existing coff-i386 targets, like SCO).
850 So everything works fine when not producing relocatable output. When
851 we are producing relocatable output, logically we should do exactly
852 what we do when not producing relocatable output. Therefore, your
853 patch is correct. In fact, it should probably always just set
854 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
855 add the value into the object file. This won't hurt the COFF code,
856 which doesn't use the addend; I'm not sure what it will do to other
857 formats (the thing to check for would be whether any formats both use
858 the addend and set partial_inplace).
860 When I wanted to make coff-i386 produce relocatable output, I ran
861 into the problem that you are running into: I wanted to remove that
862 line. Rather than risk it, I made the coff-i386 relocs use a special
863 function; it's coff_i386_reloc in coff-i386.c. The function
864 specifically adds the addend field into the object file, knowing that
865 bfd_perform_relocation is not going to. If you remove that line, then
866 coff-i386.c will wind up adding the addend field in twice. It's
867 trivial to fix; it just needs to be done.
869 The problem with removing the line is just that it may break some
870 working code. With BFD it's hard to be sure of anything. The right
871 way to deal with this is simply to build and test at least all the
872 supported COFF targets. It should be straightforward if time and disk
873 space consuming. For each target:
875 2) generate some executable, and link it using -r (I would
876 probably use paranoia.o and link against newlib/libc.a, which
877 for all the supported targets would be available in
878 /usr/cygnus/progressive/H-host/target/lib/libc.a).
879 3) make the change to reloc.c
880 4) rebuild the linker
882 6) if the resulting object files are the same, you have at least
884 7) if they are different you have to figure out which version is
887 relocation
-= reloc_entry
->addend
;
888 reloc_entry
->addend
= 0;
892 reloc_entry
->addend
= relocation
;
897 /* FIXME: This overflow checking is incomplete, because the value
898 might have overflowed before we get here. For a correct check we
899 need to compute the value in a size larger than bitsize, but we
900 can't reasonably do that for a reloc the same size as a host
902 FIXME: We should also do overflow checking on the result after
903 adding in the value contained in the object file. */
904 if (howto
->complain_on_overflow
!= complain_overflow_dont
905 && flag
== bfd_reloc_ok
)
906 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
909 bfd_arch_bits_per_address (abfd
),
912 /* Either we are relocating all the way, or we don't want to apply
913 the relocation to the reloc entry (probably because there isn't
914 any room in the output format to describe addends to relocs). */
916 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
917 (OSF version 1.3, compiler version 3.11). It miscompiles the
931 x <<= (unsigned long) s.i0;
935 printf ("succeeded (%lx)\n", x);
939 relocation
>>= (bfd_vma
) howto
->rightshift
;
941 /* Shift everything up to where it's going to be used. */
942 relocation
<<= (bfd_vma
) howto
->bitpos
;
944 /* Wait for the day when all have the mask in them. */
947 i instruction to be left alone
948 o offset within instruction
949 r relocation offset to apply
958 (( i i i i i o o o o o from bfd_get<size>
959 and S S S S S) to get the size offset we want
960 + r r r r r r r r r r) to get the final value to place
961 and D D D D D to chop to right size
962 -----------------------
965 ( i i i i i o o o o o from bfd_get<size>
966 and N N N N N ) get instruction
967 -----------------------
973 -----------------------
974 = R R R R R R R R R R put into bfd_put<size>
977 data
= (bfd_byte
*) data
+ octets
;
978 apply_reloc (abfd
, data
, howto
, relocation
);
984 bfd_install_relocation
987 bfd_reloc_status_type bfd_install_relocation
989 arelent *reloc_entry,
990 void *data, bfd_vma data_start,
991 asection *input_section,
992 char **error_message);
995 This looks remarkably like <<bfd_perform_relocation>>, except it
996 does not expect that the section contents have been filled in.
997 I.e., it's suitable for use when creating, rather than applying
1000 For now, this function should be considered reserved for the
1004 bfd_reloc_status_type
1005 bfd_install_relocation (bfd
*abfd
,
1006 arelent
*reloc_entry
,
1008 bfd_vma data_start_offset
,
1009 asection
*input_section
,
1010 char **error_message
)
1013 bfd_reloc_status_type flag
= bfd_reloc_ok
;
1014 bfd_size_type octets
;
1015 bfd_vma output_base
= 0;
1016 reloc_howto_type
*howto
= reloc_entry
->howto
;
1017 asection
*reloc_target_output_section
;
1021 symbol
= *(reloc_entry
->sym_ptr_ptr
);
1023 /* If there is a function supplied to handle this relocation type,
1024 call it. It'll return `bfd_reloc_continue' if further processing
1026 if (howto
&& howto
->special_function
)
1028 bfd_reloc_status_type cont
;
1030 /* Note - we do not call bfd_reloc_offset_in_range here as the
1031 reloc_entry->address field might actually be valid for the
1032 backend concerned. It is up to the special_function itself
1033 to call bfd_reloc_offset_in_range if needed. */
1034 /* XXX - The special_function calls haven't been fixed up to deal
1035 with creating new relocations and section contents. */
1036 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1037 /* XXX - Non-portable! */
1038 ((bfd_byte
*) data_start
1039 - data_start_offset
),
1040 input_section
, abfd
, error_message
);
1041 if (cont
!= bfd_reloc_continue
)
1045 if (bfd_is_abs_section (symbol
->section
))
1047 reloc_entry
->address
+= input_section
->output_offset
;
1048 return bfd_reloc_ok
;
1051 /* No need to check for howto != NULL if !bfd_is_abs_section as
1052 it will have been checked in `bfd_perform_relocation already'. */
1054 /* Is the address of the relocation really within the section? */
1055 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
1056 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
1057 return bfd_reloc_outofrange
;
1059 /* Work out which section the relocation is targeted at and the
1060 initial relocation command value. */
1062 /* Get symbol value. (Common symbols are special.) */
1063 if (bfd_is_com_section (symbol
->section
))
1066 relocation
= symbol
->value
;
1068 reloc_target_output_section
= symbol
->section
->output_section
;
1070 /* Convert input-section-relative symbol value to absolute. */
1071 if (! howto
->partial_inplace
)
1074 output_base
= reloc_target_output_section
->vma
;
1076 relocation
+= output_base
+ symbol
->section
->output_offset
;
1078 /* Add in supplied addend. */
1079 relocation
+= reloc_entry
->addend
;
1081 /* Here the variable relocation holds the final address of the
1082 symbol we are relocating against, plus any addend. */
1084 if (howto
->pc_relative
)
1086 /* This is a PC relative relocation. We want to set RELOCATION
1087 to the distance between the address of the symbol and the
1088 location. RELOCATION is already the address of the symbol.
1090 We start by subtracting the address of the section containing
1093 If pcrel_offset is set, we must further subtract the position
1094 of the location within the section. Some targets arrange for
1095 the addend to be the negative of the position of the location
1096 within the section; for example, i386-aout does this. For
1097 i386-aout, pcrel_offset is FALSE. Some other targets do not
1098 include the position of the location; for example, ELF.
1099 For those targets, pcrel_offset is TRUE.
1101 If we are producing relocatable output, then we must ensure
1102 that this reloc will be correctly computed when the final
1103 relocation is done. If pcrel_offset is FALSE we want to wind
1104 up with the negative of the location within the section,
1105 which means we must adjust the existing addend by the change
1106 in the location within the section. If pcrel_offset is TRUE
1107 we do not want to adjust the existing addend at all.
1109 FIXME: This seems logical to me, but for the case of
1110 producing relocatable output it is not what the code
1111 actually does. I don't want to change it, because it seems
1112 far too likely that something will break. */
1115 input_section
->output_section
->vma
+ input_section
->output_offset
;
1117 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1118 relocation
-= reloc_entry
->address
;
1121 if (! howto
->partial_inplace
)
1123 /* This is a partial relocation, and we want to apply the relocation
1124 to the reloc entry rather than the raw data. Modify the reloc
1125 inplace to reflect what we now know. */
1126 reloc_entry
->addend
= relocation
;
1127 reloc_entry
->address
+= input_section
->output_offset
;
1132 /* This is a partial relocation, but inplace, so modify the
1135 If we've relocated with a symbol with a section, change
1136 into a ref to the section belonging to the symbol. */
1137 reloc_entry
->address
+= input_section
->output_offset
;
1140 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1141 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1142 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1145 /* For m68k-coff, the addend was being subtracted twice during
1146 relocation with -r. Removing the line below this comment
1147 fixes that problem; see PR 2953.
1149 However, Ian wrote the following, regarding removing the line below,
1150 which explains why it is still enabled: --djm
1152 If you put a patch like that into BFD you need to check all the COFF
1153 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1154 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1155 problem in a different way. There may very well be a reason that the
1156 code works as it does.
1158 Hmmm. The first obvious point is that bfd_install_relocation should
1159 not have any tests that depend upon the flavour. It's seem like
1160 entirely the wrong place for such a thing. The second obvious point
1161 is that the current code ignores the reloc addend when producing
1162 relocatable output for COFF. That's peculiar. In fact, I really
1163 have no idea what the point of the line you want to remove is.
1165 A typical COFF reloc subtracts the old value of the symbol and adds in
1166 the new value to the location in the object file (if it's a pc
1167 relative reloc it adds the difference between the symbol value and the
1168 location). When relocating we need to preserve that property.
1170 BFD handles this by setting the addend to the negative of the old
1171 value of the symbol. Unfortunately it handles common symbols in a
1172 non-standard way (it doesn't subtract the old value) but that's a
1173 different story (we can't change it without losing backward
1174 compatibility with old object files) (coff-i386 does subtract the old
1175 value, to be compatible with existing coff-i386 targets, like SCO).
1177 So everything works fine when not producing relocatable output. When
1178 we are producing relocatable output, logically we should do exactly
1179 what we do when not producing relocatable output. Therefore, your
1180 patch is correct. In fact, it should probably always just set
1181 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1182 add the value into the object file. This won't hurt the COFF code,
1183 which doesn't use the addend; I'm not sure what it will do to other
1184 formats (the thing to check for would be whether any formats both use
1185 the addend and set partial_inplace).
1187 When I wanted to make coff-i386 produce relocatable output, I ran
1188 into the problem that you are running into: I wanted to remove that
1189 line. Rather than risk it, I made the coff-i386 relocs use a special
1190 function; it's coff_i386_reloc in coff-i386.c. The function
1191 specifically adds the addend field into the object file, knowing that
1192 bfd_install_relocation is not going to. If you remove that line, then
1193 coff-i386.c will wind up adding the addend field in twice. It's
1194 trivial to fix; it just needs to be done.
1196 The problem with removing the line is just that it may break some
1197 working code. With BFD it's hard to be sure of anything. The right
1198 way to deal with this is simply to build and test at least all the
1199 supported COFF targets. It should be straightforward if time and disk
1200 space consuming. For each target:
1202 2) generate some executable, and link it using -r (I would
1203 probably use paranoia.o and link against newlib/libc.a, which
1204 for all the supported targets would be available in
1205 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1206 3) make the change to reloc.c
1207 4) rebuild the linker
1209 6) if the resulting object files are the same, you have at least
1211 7) if they are different you have to figure out which version is
1213 relocation
-= reloc_entry
->addend
;
1214 /* FIXME: There should be no target specific code here... */
1215 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1216 reloc_entry
->addend
= 0;
1220 reloc_entry
->addend
= relocation
;
1224 /* FIXME: This overflow checking is incomplete, because the value
1225 might have overflowed before we get here. For a correct check we
1226 need to compute the value in a size larger than bitsize, but we
1227 can't reasonably do that for a reloc the same size as a host
1229 FIXME: We should also do overflow checking on the result after
1230 adding in the value contained in the object file. */
1231 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1232 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1235 bfd_arch_bits_per_address (abfd
),
1238 /* Either we are relocating all the way, or we don't want to apply
1239 the relocation to the reloc entry (probably because there isn't
1240 any room in the output format to describe addends to relocs). */
1242 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1243 (OSF version 1.3, compiler version 3.11). It miscompiles the
1257 x <<= (unsigned long) s.i0;
1259 printf ("failed\n");
1261 printf ("succeeded (%lx)\n", x);
1265 relocation
>>= (bfd_vma
) howto
->rightshift
;
1267 /* Shift everything up to where it's going to be used. */
1268 relocation
<<= (bfd_vma
) howto
->bitpos
;
1270 /* Wait for the day when all have the mask in them. */
1273 i instruction to be left alone
1274 o offset within instruction
1275 r relocation offset to apply
1284 (( i i i i i o o o o o from bfd_get<size>
1285 and S S S S S) to get the size offset we want
1286 + r r r r r r r r r r) to get the final value to place
1287 and D D D D D to chop to right size
1288 -----------------------
1291 ( i i i i i o o o o o from bfd_get<size>
1292 and N N N N N ) get instruction
1293 -----------------------
1299 -----------------------
1300 = R R R R R R R R R R put into bfd_put<size>
1303 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1304 apply_reloc (abfd
, data
, howto
, relocation
);
1308 /* This relocation routine is used by some of the backend linkers.
1309 They do not construct asymbol or arelent structures, so there is no
1310 reason for them to use bfd_perform_relocation. Also,
1311 bfd_perform_relocation is so hacked up it is easier to write a new
1312 function than to try to deal with it.
1314 This routine does a final relocation. Whether it is useful for a
1315 relocatable link depends upon how the object format defines
1318 FIXME: This routine ignores any special_function in the HOWTO,
1319 since the existing special_function values have been written for
1320 bfd_perform_relocation.
1322 HOWTO is the reloc howto information.
1323 INPUT_BFD is the BFD which the reloc applies to.
1324 INPUT_SECTION is the section which the reloc applies to.
1325 CONTENTS is the contents of the section.
1326 ADDRESS is the address of the reloc within INPUT_SECTION.
1327 VALUE is the value of the symbol the reloc refers to.
1328 ADDEND is the addend of the reloc. */
1330 bfd_reloc_status_type
1331 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1333 asection
*input_section
,
1340 bfd_size_type octets
= address
* bfd_octets_per_byte (input_bfd
);
1342 /* Sanity check the address. */
1343 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, octets
))
1344 return bfd_reloc_outofrange
;
1346 /* This function assumes that we are dealing with a basic relocation
1347 against a symbol. We want to compute the value of the symbol to
1348 relocate to. This is just VALUE, the value of the symbol, plus
1349 ADDEND, any addend associated with the reloc. */
1350 relocation
= value
+ addend
;
1352 /* If the relocation is PC relative, we want to set RELOCATION to
1353 the distance between the symbol (currently in RELOCATION) and the
1354 location we are relocating. Some targets (e.g., i386-aout)
1355 arrange for the contents of the section to be the negative of the
1356 offset of the location within the section; for such targets
1357 pcrel_offset is FALSE. Other targets (e.g., ELF) simply leave
1358 the contents of the section as zero; for such targets
1359 pcrel_offset is TRUE. If pcrel_offset is FALSE we do not need to
1360 subtract out the offset of the location within the section (which
1361 is just ADDRESS). */
1362 if (howto
->pc_relative
)
1364 relocation
-= (input_section
->output_section
->vma
1365 + input_section
->output_offset
);
1366 if (howto
->pcrel_offset
)
1367 relocation
-= address
;
1370 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1372 + address
* bfd_octets_per_byte (input_bfd
));
1375 /* Relocate a given location using a given value and howto. */
1377 bfd_reloc_status_type
1378 _bfd_relocate_contents (reloc_howto_type
*howto
,
1384 bfd_reloc_status_type flag
;
1385 unsigned int rightshift
= howto
->rightshift
;
1386 unsigned int bitpos
= howto
->bitpos
;
1389 relocation
= -relocation
;
1391 /* Get the value we are going to relocate. */
1392 x
= read_reloc (input_bfd
, location
, howto
);
1394 /* Check for overflow. FIXME: We may drop bits during the addition
1395 which we don't check for. We must either check at every single
1396 operation, which would be tedious, or we must do the computations
1397 in a type larger than bfd_vma, which would be inefficient. */
1398 flag
= bfd_reloc_ok
;
1399 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1401 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1404 /* Get the values to be added together. For signed and unsigned
1405 relocations, we assume that all values should be truncated to
1406 the size of an address. For bitfields, all the bits matter.
1407 See also bfd_check_overflow. */
1408 fieldmask
= N_ONES (howto
->bitsize
);
1409 signmask
= ~fieldmask
;
1410 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1411 | (fieldmask
<< rightshift
));
1412 a
= (relocation
& addrmask
) >> rightshift
;
1413 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1414 addrmask
>>= rightshift
;
1416 switch (howto
->complain_on_overflow
)
1418 case complain_overflow_signed
:
1419 /* If any sign bits are set, all sign bits must be set.
1420 That is, A must be a valid negative address after
1422 signmask
= ~(fieldmask
>> 1);
1425 case complain_overflow_bitfield
:
1426 /* Much like the signed check, but for a field one bit
1427 wider. We allow a bitfield to represent numbers in the
1428 range -2**n to 2**n-1, where n is the number of bits in the
1429 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1430 can't overflow, which is exactly what we want. */
1432 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1433 flag
= bfd_reloc_overflow
;
1435 /* We only need this next bit of code if the sign bit of B
1436 is below the sign bit of A. This would only happen if
1437 SRC_MASK had fewer bits than BITSIZE. Note that if
1438 SRC_MASK has more bits than BITSIZE, we can get into
1439 trouble; we would need to verify that B is in range, as
1440 we do for A above. */
1441 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1444 /* Set all the bits above the sign bit. */
1447 /* Now we can do the addition. */
1450 /* See if the result has the correct sign. Bits above the
1451 sign bit are junk now; ignore them. If the sum is
1452 positive, make sure we did not have all negative inputs;
1453 if the sum is negative, make sure we did not have all
1454 positive inputs. The test below looks only at the sign
1455 bits, and it really just
1456 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1458 We mask with addrmask here to explicitly allow an address
1459 wrap-around. The Linux kernel relies on it, and it is
1460 the only way to write assembler code which can run when
1461 loaded at a location 0x80000000 away from the location at
1462 which it is linked. */
1463 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1464 flag
= bfd_reloc_overflow
;
1467 case complain_overflow_unsigned
:
1468 /* Checking for an unsigned overflow is relatively easy:
1469 trim the addresses and add, and trim the result as well.
1470 Overflow is normally indicated when the result does not
1471 fit in the field. However, we also need to consider the
1472 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1473 input is 0x80000000, and bfd_vma is only 32 bits; then we
1474 will get sum == 0, but there is an overflow, since the
1475 inputs did not fit in the field. Instead of doing a
1476 separate test, we can check for this by or-ing in the
1477 operands when testing for the sum overflowing its final
1479 sum
= (a
+ b
) & addrmask
;
1480 if ((a
| b
| sum
) & signmask
)
1481 flag
= bfd_reloc_overflow
;
1489 /* Put RELOCATION in the right bits. */
1490 relocation
>>= (bfd_vma
) rightshift
;
1491 relocation
<<= (bfd_vma
) bitpos
;
1493 /* Add RELOCATION to the right bits of X. */
1494 x
= ((x
& ~howto
->dst_mask
)
1495 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1497 /* Put the relocated value back in the object file. */
1498 write_reloc (input_bfd
, x
, location
, howto
);
1502 /* Clear a given location using a given howto, by applying a fixed relocation
1503 value and discarding any in-place addend. This is used for fixed-up
1504 relocations against discarded symbols, to make ignorable debug or unwind
1505 information more obvious. */
1508 _bfd_clear_contents (reloc_howto_type
*howto
,
1510 asection
*input_section
,
1515 /* Get the value we are going to relocate. */
1516 x
= read_reloc (input_bfd
, location
, howto
);
1518 /* Zero out the unwanted bits of X. */
1519 x
&= ~howto
->dst_mask
;
1521 /* For a range list, use 1 instead of 0 as placeholder. 0
1522 would terminate the list, hiding any later entries. */
1523 if (strcmp (bfd_get_section_name (input_bfd
, input_section
),
1524 ".debug_ranges") == 0
1525 && (howto
->dst_mask
& 1) != 0)
1528 /* Put the relocated value back in the object file. */
1529 write_reloc (input_bfd
, x
, location
, howto
);
1535 howto manager, , typedef arelent, Relocations
1540 When an application wants to create a relocation, but doesn't
1541 know what the target machine might call it, it can find out by
1542 using this bit of code.
1551 The insides of a reloc code. The idea is that, eventually, there
1552 will be one enumerator for every type of relocation we ever do.
1553 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1554 return a howto pointer.
1556 This does mean that the application must determine the correct
1557 enumerator value; you can't get a howto pointer from a random set
1578 Basic absolute relocations of N bits.
1593 PC-relative relocations. Sometimes these are relative to the address
1594 of the relocation itself; sometimes they are relative to the start of
1595 the section containing the relocation. It depends on the specific target.
1600 Section relative relocations. Some targets need this for DWARF2.
1603 BFD_RELOC_32_GOT_PCREL
1605 BFD_RELOC_16_GOT_PCREL
1607 BFD_RELOC_8_GOT_PCREL
1613 BFD_RELOC_LO16_GOTOFF
1615 BFD_RELOC_HI16_GOTOFF
1617 BFD_RELOC_HI16_S_GOTOFF
1621 BFD_RELOC_64_PLT_PCREL
1623 BFD_RELOC_32_PLT_PCREL
1625 BFD_RELOC_24_PLT_PCREL
1627 BFD_RELOC_16_PLT_PCREL
1629 BFD_RELOC_8_PLT_PCREL
1637 BFD_RELOC_LO16_PLTOFF
1639 BFD_RELOC_HI16_PLTOFF
1641 BFD_RELOC_HI16_S_PLTOFF
1655 BFD_RELOC_68K_GLOB_DAT
1657 BFD_RELOC_68K_JMP_SLOT
1659 BFD_RELOC_68K_RELATIVE
1661 BFD_RELOC_68K_TLS_GD32
1663 BFD_RELOC_68K_TLS_GD16
1665 BFD_RELOC_68K_TLS_GD8
1667 BFD_RELOC_68K_TLS_LDM32
1669 BFD_RELOC_68K_TLS_LDM16
1671 BFD_RELOC_68K_TLS_LDM8
1673 BFD_RELOC_68K_TLS_LDO32
1675 BFD_RELOC_68K_TLS_LDO16
1677 BFD_RELOC_68K_TLS_LDO8
1679 BFD_RELOC_68K_TLS_IE32
1681 BFD_RELOC_68K_TLS_IE16
1683 BFD_RELOC_68K_TLS_IE8
1685 BFD_RELOC_68K_TLS_LE32
1687 BFD_RELOC_68K_TLS_LE16
1689 BFD_RELOC_68K_TLS_LE8
1691 Relocations used by 68K ELF.
1694 BFD_RELOC_32_BASEREL
1696 BFD_RELOC_16_BASEREL
1698 BFD_RELOC_LO16_BASEREL
1700 BFD_RELOC_HI16_BASEREL
1702 BFD_RELOC_HI16_S_BASEREL
1708 Linkage-table relative.
1713 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1716 BFD_RELOC_32_PCREL_S2
1718 BFD_RELOC_16_PCREL_S2
1720 BFD_RELOC_23_PCREL_S2
1722 These PC-relative relocations are stored as word displacements --
1723 i.e., byte displacements shifted right two bits. The 30-bit word
1724 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1725 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1726 signed 16-bit displacement is used on the MIPS, and the 23-bit
1727 displacement is used on the Alpha.
1734 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1735 the target word. These are used on the SPARC.
1742 For systems that allocate a Global Pointer register, these are
1743 displacements off that register. These relocation types are
1744 handled specially, because the value the register will have is
1745 decided relatively late.
1750 BFD_RELOC_SPARC_WDISP22
1756 BFD_RELOC_SPARC_GOT10
1758 BFD_RELOC_SPARC_GOT13
1760 BFD_RELOC_SPARC_GOT22
1762 BFD_RELOC_SPARC_PC10
1764 BFD_RELOC_SPARC_PC22
1766 BFD_RELOC_SPARC_WPLT30
1768 BFD_RELOC_SPARC_COPY
1770 BFD_RELOC_SPARC_GLOB_DAT
1772 BFD_RELOC_SPARC_JMP_SLOT
1774 BFD_RELOC_SPARC_RELATIVE
1776 BFD_RELOC_SPARC_UA16
1778 BFD_RELOC_SPARC_UA32
1780 BFD_RELOC_SPARC_UA64
1782 BFD_RELOC_SPARC_GOTDATA_HIX22
1784 BFD_RELOC_SPARC_GOTDATA_LOX10
1786 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1788 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1790 BFD_RELOC_SPARC_GOTDATA_OP
1792 BFD_RELOC_SPARC_JMP_IREL
1794 BFD_RELOC_SPARC_IRELATIVE
1796 SPARC ELF relocations. There is probably some overlap with other
1797 relocation types already defined.
1800 BFD_RELOC_SPARC_BASE13
1802 BFD_RELOC_SPARC_BASE22
1804 I think these are specific to SPARC a.out (e.g., Sun 4).
1814 BFD_RELOC_SPARC_OLO10
1816 BFD_RELOC_SPARC_HH22
1818 BFD_RELOC_SPARC_HM10
1820 BFD_RELOC_SPARC_LM22
1822 BFD_RELOC_SPARC_PC_HH22
1824 BFD_RELOC_SPARC_PC_HM10
1826 BFD_RELOC_SPARC_PC_LM22
1828 BFD_RELOC_SPARC_WDISP16
1830 BFD_RELOC_SPARC_WDISP19
1838 BFD_RELOC_SPARC_DISP64
1841 BFD_RELOC_SPARC_PLT32
1843 BFD_RELOC_SPARC_PLT64
1845 BFD_RELOC_SPARC_HIX22
1847 BFD_RELOC_SPARC_LOX10
1855 BFD_RELOC_SPARC_REGISTER
1859 BFD_RELOC_SPARC_SIZE32
1861 BFD_RELOC_SPARC_SIZE64
1863 BFD_RELOC_SPARC_WDISP10
1868 BFD_RELOC_SPARC_REV32
1870 SPARC little endian relocation
1872 BFD_RELOC_SPARC_TLS_GD_HI22
1874 BFD_RELOC_SPARC_TLS_GD_LO10
1876 BFD_RELOC_SPARC_TLS_GD_ADD
1878 BFD_RELOC_SPARC_TLS_GD_CALL
1880 BFD_RELOC_SPARC_TLS_LDM_HI22
1882 BFD_RELOC_SPARC_TLS_LDM_LO10
1884 BFD_RELOC_SPARC_TLS_LDM_ADD
1886 BFD_RELOC_SPARC_TLS_LDM_CALL
1888 BFD_RELOC_SPARC_TLS_LDO_HIX22
1890 BFD_RELOC_SPARC_TLS_LDO_LOX10
1892 BFD_RELOC_SPARC_TLS_LDO_ADD
1894 BFD_RELOC_SPARC_TLS_IE_HI22
1896 BFD_RELOC_SPARC_TLS_IE_LO10
1898 BFD_RELOC_SPARC_TLS_IE_LD
1900 BFD_RELOC_SPARC_TLS_IE_LDX
1902 BFD_RELOC_SPARC_TLS_IE_ADD
1904 BFD_RELOC_SPARC_TLS_LE_HIX22
1906 BFD_RELOC_SPARC_TLS_LE_LOX10
1908 BFD_RELOC_SPARC_TLS_DTPMOD32
1910 BFD_RELOC_SPARC_TLS_DTPMOD64
1912 BFD_RELOC_SPARC_TLS_DTPOFF32
1914 BFD_RELOC_SPARC_TLS_DTPOFF64
1916 BFD_RELOC_SPARC_TLS_TPOFF32
1918 BFD_RELOC_SPARC_TLS_TPOFF64
1920 SPARC TLS relocations
1929 BFD_RELOC_SPU_IMM10W
1933 BFD_RELOC_SPU_IMM16W
1937 BFD_RELOC_SPU_PCREL9a
1939 BFD_RELOC_SPU_PCREL9b
1941 BFD_RELOC_SPU_PCREL16
1951 BFD_RELOC_SPU_ADD_PIC
1956 BFD_RELOC_ALPHA_GPDISP_HI16
1958 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1959 "addend" in some special way.
1960 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1961 writing; when reading, it will be the absolute section symbol. The
1962 addend is the displacement in bytes of the "lda" instruction from
1963 the "ldah" instruction (which is at the address of this reloc).
1965 BFD_RELOC_ALPHA_GPDISP_LO16
1967 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1968 with GPDISP_HI16 relocs. The addend is ignored when writing the
1969 relocations out, and is filled in with the file's GP value on
1970 reading, for convenience.
1973 BFD_RELOC_ALPHA_GPDISP
1975 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1976 relocation except that there is no accompanying GPDISP_LO16
1980 BFD_RELOC_ALPHA_LITERAL
1982 BFD_RELOC_ALPHA_ELF_LITERAL
1984 BFD_RELOC_ALPHA_LITUSE
1986 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1987 the assembler turns it into a LDQ instruction to load the address of
1988 the symbol, and then fills in a register in the real instruction.
1990 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1991 section symbol. The addend is ignored when writing, but is filled
1992 in with the file's GP value on reading, for convenience, as with the
1995 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1996 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1997 but it generates output not based on the position within the .got
1998 section, but relative to the GP value chosen for the file during the
2001 The LITUSE reloc, on the instruction using the loaded address, gives
2002 information to the linker that it might be able to use to optimize
2003 away some literal section references. The symbol is ignored (read
2004 as the absolute section symbol), and the "addend" indicates the type
2005 of instruction using the register:
2006 1 - "memory" fmt insn
2007 2 - byte-manipulation (byte offset reg)
2008 3 - jsr (target of branch)
2011 BFD_RELOC_ALPHA_HINT
2013 The HINT relocation indicates a value that should be filled into the
2014 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2015 prediction logic which may be provided on some processors.
2018 BFD_RELOC_ALPHA_LINKAGE
2020 The LINKAGE relocation outputs a linkage pair in the object file,
2021 which is filled by the linker.
2024 BFD_RELOC_ALPHA_CODEADDR
2026 The CODEADDR relocation outputs a STO_CA in the object file,
2027 which is filled by the linker.
2030 BFD_RELOC_ALPHA_GPREL_HI16
2032 BFD_RELOC_ALPHA_GPREL_LO16
2034 The GPREL_HI/LO relocations together form a 32-bit offset from the
2038 BFD_RELOC_ALPHA_BRSGP
2040 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2041 share a common GP, and the target address is adjusted for
2042 STO_ALPHA_STD_GPLOAD.
2047 The NOP relocation outputs a NOP if the longword displacement
2048 between two procedure entry points is < 2^21.
2053 The BSR relocation outputs a BSR if the longword displacement
2054 between two procedure entry points is < 2^21.
2059 The LDA relocation outputs a LDA if the longword displacement
2060 between two procedure entry points is < 2^16.
2065 The BOH relocation outputs a BSR if the longword displacement
2066 between two procedure entry points is < 2^21, or else a hint.
2069 BFD_RELOC_ALPHA_TLSGD
2071 BFD_RELOC_ALPHA_TLSLDM
2073 BFD_RELOC_ALPHA_DTPMOD64
2075 BFD_RELOC_ALPHA_GOTDTPREL16
2077 BFD_RELOC_ALPHA_DTPREL64
2079 BFD_RELOC_ALPHA_DTPREL_HI16
2081 BFD_RELOC_ALPHA_DTPREL_LO16
2083 BFD_RELOC_ALPHA_DTPREL16
2085 BFD_RELOC_ALPHA_GOTTPREL16
2087 BFD_RELOC_ALPHA_TPREL64
2089 BFD_RELOC_ALPHA_TPREL_HI16
2091 BFD_RELOC_ALPHA_TPREL_LO16
2093 BFD_RELOC_ALPHA_TPREL16
2095 Alpha thread-local storage relocations.
2100 BFD_RELOC_MICROMIPS_JMP
2102 The MIPS jump instruction.
2105 BFD_RELOC_MIPS16_JMP
2107 The MIPS16 jump instruction.
2110 BFD_RELOC_MIPS16_GPREL
2112 MIPS16 GP relative reloc.
2117 High 16 bits of 32-bit value; simple reloc.
2122 High 16 bits of 32-bit value but the low 16 bits will be sign
2123 extended and added to form the final result. If the low 16
2124 bits form a negative number, we need to add one to the high value
2125 to compensate for the borrow when the low bits are added.
2133 BFD_RELOC_HI16_PCREL
2135 High 16 bits of 32-bit pc-relative value
2137 BFD_RELOC_HI16_S_PCREL
2139 High 16 bits of 32-bit pc-relative value, adjusted
2141 BFD_RELOC_LO16_PCREL
2143 Low 16 bits of pc-relative value
2146 BFD_RELOC_MIPS16_GOT16
2148 BFD_RELOC_MIPS16_CALL16
2150 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2151 16-bit immediate fields
2153 BFD_RELOC_MIPS16_HI16
2155 MIPS16 high 16 bits of 32-bit value.
2157 BFD_RELOC_MIPS16_HI16_S
2159 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2160 extended and added to form the final result. If the low 16
2161 bits form a negative number, we need to add one to the high value
2162 to compensate for the borrow when the low bits are added.
2164 BFD_RELOC_MIPS16_LO16
2169 BFD_RELOC_MIPS16_TLS_GD
2171 BFD_RELOC_MIPS16_TLS_LDM
2173 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2175 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2177 BFD_RELOC_MIPS16_TLS_GOTTPREL
2179 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2181 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2183 MIPS16 TLS relocations
2186 BFD_RELOC_MIPS_LITERAL
2188 BFD_RELOC_MICROMIPS_LITERAL
2190 Relocation against a MIPS literal section.
2193 BFD_RELOC_MICROMIPS_7_PCREL_S1
2195 BFD_RELOC_MICROMIPS_10_PCREL_S1
2197 BFD_RELOC_MICROMIPS_16_PCREL_S1
2199 microMIPS PC-relative relocations.
2202 BFD_RELOC_MIPS16_16_PCREL_S1
2204 MIPS16 PC-relative relocation.
2207 BFD_RELOC_MIPS_21_PCREL_S2
2209 BFD_RELOC_MIPS_26_PCREL_S2
2211 BFD_RELOC_MIPS_18_PCREL_S3
2213 BFD_RELOC_MIPS_19_PCREL_S2
2215 MIPS PC-relative relocations.
2218 BFD_RELOC_MICROMIPS_GPREL16
2220 BFD_RELOC_MICROMIPS_HI16
2222 BFD_RELOC_MICROMIPS_HI16_S
2224 BFD_RELOC_MICROMIPS_LO16
2226 microMIPS versions of generic BFD relocs.
2229 BFD_RELOC_MIPS_GOT16
2231 BFD_RELOC_MICROMIPS_GOT16
2233 BFD_RELOC_MIPS_CALL16
2235 BFD_RELOC_MICROMIPS_CALL16
2237 BFD_RELOC_MIPS_GOT_HI16
2239 BFD_RELOC_MICROMIPS_GOT_HI16
2241 BFD_RELOC_MIPS_GOT_LO16
2243 BFD_RELOC_MICROMIPS_GOT_LO16
2245 BFD_RELOC_MIPS_CALL_HI16
2247 BFD_RELOC_MICROMIPS_CALL_HI16
2249 BFD_RELOC_MIPS_CALL_LO16
2251 BFD_RELOC_MICROMIPS_CALL_LO16
2255 BFD_RELOC_MICROMIPS_SUB
2257 BFD_RELOC_MIPS_GOT_PAGE
2259 BFD_RELOC_MICROMIPS_GOT_PAGE
2261 BFD_RELOC_MIPS_GOT_OFST
2263 BFD_RELOC_MICROMIPS_GOT_OFST
2265 BFD_RELOC_MIPS_GOT_DISP
2267 BFD_RELOC_MICROMIPS_GOT_DISP
2269 BFD_RELOC_MIPS_SHIFT5
2271 BFD_RELOC_MIPS_SHIFT6
2273 BFD_RELOC_MIPS_INSERT_A
2275 BFD_RELOC_MIPS_INSERT_B
2277 BFD_RELOC_MIPS_DELETE
2279 BFD_RELOC_MIPS_HIGHEST
2281 BFD_RELOC_MICROMIPS_HIGHEST
2283 BFD_RELOC_MIPS_HIGHER
2285 BFD_RELOC_MICROMIPS_HIGHER
2287 BFD_RELOC_MIPS_SCN_DISP
2289 BFD_RELOC_MICROMIPS_SCN_DISP
2291 BFD_RELOC_MIPS_REL16
2293 BFD_RELOC_MIPS_RELGOT
2297 BFD_RELOC_MICROMIPS_JALR
2299 BFD_RELOC_MIPS_TLS_DTPMOD32
2301 BFD_RELOC_MIPS_TLS_DTPREL32
2303 BFD_RELOC_MIPS_TLS_DTPMOD64
2305 BFD_RELOC_MIPS_TLS_DTPREL64
2307 BFD_RELOC_MIPS_TLS_GD
2309 BFD_RELOC_MICROMIPS_TLS_GD
2311 BFD_RELOC_MIPS_TLS_LDM
2313 BFD_RELOC_MICROMIPS_TLS_LDM
2315 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2317 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2319 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2321 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2323 BFD_RELOC_MIPS_TLS_GOTTPREL
2325 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2327 BFD_RELOC_MIPS_TLS_TPREL32
2329 BFD_RELOC_MIPS_TLS_TPREL64
2331 BFD_RELOC_MIPS_TLS_TPREL_HI16
2333 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2335 BFD_RELOC_MIPS_TLS_TPREL_LO16
2337 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2341 MIPS ELF relocations.
2347 BFD_RELOC_MIPS_JUMP_SLOT
2349 MIPS ELF relocations (VxWorks and PLT extensions).
2353 BFD_RELOC_MOXIE_10_PCREL
2355 Moxie ELF relocations.
2367 BFD_RELOC_FT32_RELAX
2375 BFD_RELOC_FT32_DIFF32
2377 FT32 ELF relocations.
2381 BFD_RELOC_FRV_LABEL16
2383 BFD_RELOC_FRV_LABEL24
2389 BFD_RELOC_FRV_GPREL12
2391 BFD_RELOC_FRV_GPRELU12
2393 BFD_RELOC_FRV_GPREL32
2395 BFD_RELOC_FRV_GPRELHI
2397 BFD_RELOC_FRV_GPRELLO
2405 BFD_RELOC_FRV_FUNCDESC
2407 BFD_RELOC_FRV_FUNCDESC_GOT12
2409 BFD_RELOC_FRV_FUNCDESC_GOTHI
2411 BFD_RELOC_FRV_FUNCDESC_GOTLO
2413 BFD_RELOC_FRV_FUNCDESC_VALUE
2415 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2417 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2419 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2421 BFD_RELOC_FRV_GOTOFF12
2423 BFD_RELOC_FRV_GOTOFFHI
2425 BFD_RELOC_FRV_GOTOFFLO
2427 BFD_RELOC_FRV_GETTLSOFF
2429 BFD_RELOC_FRV_TLSDESC_VALUE
2431 BFD_RELOC_FRV_GOTTLSDESC12
2433 BFD_RELOC_FRV_GOTTLSDESCHI
2435 BFD_RELOC_FRV_GOTTLSDESCLO
2437 BFD_RELOC_FRV_TLSMOFF12
2439 BFD_RELOC_FRV_TLSMOFFHI
2441 BFD_RELOC_FRV_TLSMOFFLO
2443 BFD_RELOC_FRV_GOTTLSOFF12
2445 BFD_RELOC_FRV_GOTTLSOFFHI
2447 BFD_RELOC_FRV_GOTTLSOFFLO
2449 BFD_RELOC_FRV_TLSOFF
2451 BFD_RELOC_FRV_TLSDESC_RELAX
2453 BFD_RELOC_FRV_GETTLSOFF_RELAX
2455 BFD_RELOC_FRV_TLSOFF_RELAX
2457 BFD_RELOC_FRV_TLSMOFF
2459 Fujitsu Frv Relocations.
2463 BFD_RELOC_MN10300_GOTOFF24
2465 This is a 24bit GOT-relative reloc for the mn10300.
2467 BFD_RELOC_MN10300_GOT32
2469 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2472 BFD_RELOC_MN10300_GOT24
2474 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2477 BFD_RELOC_MN10300_GOT16
2479 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2482 BFD_RELOC_MN10300_COPY
2484 Copy symbol at runtime.
2486 BFD_RELOC_MN10300_GLOB_DAT
2490 BFD_RELOC_MN10300_JMP_SLOT
2494 BFD_RELOC_MN10300_RELATIVE
2496 Adjust by program base.
2498 BFD_RELOC_MN10300_SYM_DIFF
2500 Together with another reloc targeted at the same location,
2501 allows for a value that is the difference of two symbols
2502 in the same section.
2504 BFD_RELOC_MN10300_ALIGN
2506 The addend of this reloc is an alignment power that must
2507 be honoured at the offset's location, regardless of linker
2510 BFD_RELOC_MN10300_TLS_GD
2512 BFD_RELOC_MN10300_TLS_LD
2514 BFD_RELOC_MN10300_TLS_LDO
2516 BFD_RELOC_MN10300_TLS_GOTIE
2518 BFD_RELOC_MN10300_TLS_IE
2520 BFD_RELOC_MN10300_TLS_LE
2522 BFD_RELOC_MN10300_TLS_DTPMOD
2524 BFD_RELOC_MN10300_TLS_DTPOFF
2526 BFD_RELOC_MN10300_TLS_TPOFF
2528 Various TLS-related relocations.
2530 BFD_RELOC_MN10300_32_PCREL
2532 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2535 BFD_RELOC_MN10300_16_PCREL
2537 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2548 BFD_RELOC_386_GLOB_DAT
2550 BFD_RELOC_386_JUMP_SLOT
2552 BFD_RELOC_386_RELATIVE
2554 BFD_RELOC_386_GOTOFF
2558 BFD_RELOC_386_TLS_TPOFF
2560 BFD_RELOC_386_TLS_IE
2562 BFD_RELOC_386_TLS_GOTIE
2564 BFD_RELOC_386_TLS_LE
2566 BFD_RELOC_386_TLS_GD
2568 BFD_RELOC_386_TLS_LDM
2570 BFD_RELOC_386_TLS_LDO_32
2572 BFD_RELOC_386_TLS_IE_32
2574 BFD_RELOC_386_TLS_LE_32
2576 BFD_RELOC_386_TLS_DTPMOD32
2578 BFD_RELOC_386_TLS_DTPOFF32
2580 BFD_RELOC_386_TLS_TPOFF32
2582 BFD_RELOC_386_TLS_GOTDESC
2584 BFD_RELOC_386_TLS_DESC_CALL
2586 BFD_RELOC_386_TLS_DESC
2588 BFD_RELOC_386_IRELATIVE
2590 BFD_RELOC_386_GOT32X
2592 i386/elf relocations
2595 BFD_RELOC_X86_64_GOT32
2597 BFD_RELOC_X86_64_PLT32
2599 BFD_RELOC_X86_64_COPY
2601 BFD_RELOC_X86_64_GLOB_DAT
2603 BFD_RELOC_X86_64_JUMP_SLOT
2605 BFD_RELOC_X86_64_RELATIVE
2607 BFD_RELOC_X86_64_GOTPCREL
2609 BFD_RELOC_X86_64_32S
2611 BFD_RELOC_X86_64_DTPMOD64
2613 BFD_RELOC_X86_64_DTPOFF64
2615 BFD_RELOC_X86_64_TPOFF64
2617 BFD_RELOC_X86_64_TLSGD
2619 BFD_RELOC_X86_64_TLSLD
2621 BFD_RELOC_X86_64_DTPOFF32
2623 BFD_RELOC_X86_64_GOTTPOFF
2625 BFD_RELOC_X86_64_TPOFF32
2627 BFD_RELOC_X86_64_GOTOFF64
2629 BFD_RELOC_X86_64_GOTPC32
2631 BFD_RELOC_X86_64_GOT64
2633 BFD_RELOC_X86_64_GOTPCREL64
2635 BFD_RELOC_X86_64_GOTPC64
2637 BFD_RELOC_X86_64_GOTPLT64
2639 BFD_RELOC_X86_64_PLTOFF64
2641 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2643 BFD_RELOC_X86_64_TLSDESC_CALL
2645 BFD_RELOC_X86_64_TLSDESC
2647 BFD_RELOC_X86_64_IRELATIVE
2649 BFD_RELOC_X86_64_PC32_BND
2651 BFD_RELOC_X86_64_PLT32_BND
2653 BFD_RELOC_X86_64_GOTPCRELX
2655 BFD_RELOC_X86_64_REX_GOTPCRELX
2657 x86-64/elf relocations
2660 BFD_RELOC_NS32K_IMM_8
2662 BFD_RELOC_NS32K_IMM_16
2664 BFD_RELOC_NS32K_IMM_32
2666 BFD_RELOC_NS32K_IMM_8_PCREL
2668 BFD_RELOC_NS32K_IMM_16_PCREL
2670 BFD_RELOC_NS32K_IMM_32_PCREL
2672 BFD_RELOC_NS32K_DISP_8
2674 BFD_RELOC_NS32K_DISP_16
2676 BFD_RELOC_NS32K_DISP_32
2678 BFD_RELOC_NS32K_DISP_8_PCREL
2680 BFD_RELOC_NS32K_DISP_16_PCREL
2682 BFD_RELOC_NS32K_DISP_32_PCREL
2687 BFD_RELOC_PDP11_DISP_8_PCREL
2689 BFD_RELOC_PDP11_DISP_6_PCREL
2694 BFD_RELOC_PJ_CODE_HI16
2696 BFD_RELOC_PJ_CODE_LO16
2698 BFD_RELOC_PJ_CODE_DIR16
2700 BFD_RELOC_PJ_CODE_DIR32
2702 BFD_RELOC_PJ_CODE_REL16
2704 BFD_RELOC_PJ_CODE_REL32
2706 Picojava relocs. Not all of these appear in object files.
2717 BFD_RELOC_PPC_B16_BRTAKEN
2719 BFD_RELOC_PPC_B16_BRNTAKEN
2723 BFD_RELOC_PPC_BA16_BRTAKEN
2725 BFD_RELOC_PPC_BA16_BRNTAKEN
2729 BFD_RELOC_PPC_GLOB_DAT
2731 BFD_RELOC_PPC_JMP_SLOT
2733 BFD_RELOC_PPC_RELATIVE
2735 BFD_RELOC_PPC_LOCAL24PC
2737 BFD_RELOC_PPC_EMB_NADDR32
2739 BFD_RELOC_PPC_EMB_NADDR16
2741 BFD_RELOC_PPC_EMB_NADDR16_LO
2743 BFD_RELOC_PPC_EMB_NADDR16_HI
2745 BFD_RELOC_PPC_EMB_NADDR16_HA
2747 BFD_RELOC_PPC_EMB_SDAI16
2749 BFD_RELOC_PPC_EMB_SDA2I16
2751 BFD_RELOC_PPC_EMB_SDA2REL
2753 BFD_RELOC_PPC_EMB_SDA21
2755 BFD_RELOC_PPC_EMB_MRKREF
2757 BFD_RELOC_PPC_EMB_RELSEC16
2759 BFD_RELOC_PPC_EMB_RELST_LO
2761 BFD_RELOC_PPC_EMB_RELST_HI
2763 BFD_RELOC_PPC_EMB_RELST_HA
2765 BFD_RELOC_PPC_EMB_BIT_FLD
2767 BFD_RELOC_PPC_EMB_RELSDA
2769 BFD_RELOC_PPC_VLE_REL8
2771 BFD_RELOC_PPC_VLE_REL15
2773 BFD_RELOC_PPC_VLE_REL24
2775 BFD_RELOC_PPC_VLE_LO16A
2777 BFD_RELOC_PPC_VLE_LO16D
2779 BFD_RELOC_PPC_VLE_HI16A
2781 BFD_RELOC_PPC_VLE_HI16D
2783 BFD_RELOC_PPC_VLE_HA16A
2785 BFD_RELOC_PPC_VLE_HA16D
2787 BFD_RELOC_PPC_VLE_SDA21
2789 BFD_RELOC_PPC_VLE_SDA21_LO
2791 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2793 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2795 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2797 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2799 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2801 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2803 BFD_RELOC_PPC_16DX_HA
2805 BFD_RELOC_PPC_REL16DX_HA
2807 BFD_RELOC_PPC64_HIGHER
2809 BFD_RELOC_PPC64_HIGHER_S
2811 BFD_RELOC_PPC64_HIGHEST
2813 BFD_RELOC_PPC64_HIGHEST_S
2815 BFD_RELOC_PPC64_TOC16_LO
2817 BFD_RELOC_PPC64_TOC16_HI
2819 BFD_RELOC_PPC64_TOC16_HA
2823 BFD_RELOC_PPC64_PLTGOT16
2825 BFD_RELOC_PPC64_PLTGOT16_LO
2827 BFD_RELOC_PPC64_PLTGOT16_HI
2829 BFD_RELOC_PPC64_PLTGOT16_HA
2831 BFD_RELOC_PPC64_ADDR16_DS
2833 BFD_RELOC_PPC64_ADDR16_LO_DS
2835 BFD_RELOC_PPC64_GOT16_DS
2837 BFD_RELOC_PPC64_GOT16_LO_DS
2839 BFD_RELOC_PPC64_PLT16_LO_DS
2841 BFD_RELOC_PPC64_SECTOFF_DS
2843 BFD_RELOC_PPC64_SECTOFF_LO_DS
2845 BFD_RELOC_PPC64_TOC16_DS
2847 BFD_RELOC_PPC64_TOC16_LO_DS
2849 BFD_RELOC_PPC64_PLTGOT16_DS
2851 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2853 BFD_RELOC_PPC64_ADDR16_HIGH
2855 BFD_RELOC_PPC64_ADDR16_HIGHA
2857 BFD_RELOC_PPC64_ADDR64_LOCAL
2859 BFD_RELOC_PPC64_ENTRY
2861 BFD_RELOC_PPC64_REL24_NOTOC
2863 Power(rs6000) and PowerPC relocations.
2872 BFD_RELOC_PPC_DTPMOD
2874 BFD_RELOC_PPC_TPREL16
2876 BFD_RELOC_PPC_TPREL16_LO
2878 BFD_RELOC_PPC_TPREL16_HI
2880 BFD_RELOC_PPC_TPREL16_HA
2884 BFD_RELOC_PPC_DTPREL16
2886 BFD_RELOC_PPC_DTPREL16_LO
2888 BFD_RELOC_PPC_DTPREL16_HI
2890 BFD_RELOC_PPC_DTPREL16_HA
2892 BFD_RELOC_PPC_DTPREL
2894 BFD_RELOC_PPC_GOT_TLSGD16
2896 BFD_RELOC_PPC_GOT_TLSGD16_LO
2898 BFD_RELOC_PPC_GOT_TLSGD16_HI
2900 BFD_RELOC_PPC_GOT_TLSGD16_HA
2902 BFD_RELOC_PPC_GOT_TLSLD16
2904 BFD_RELOC_PPC_GOT_TLSLD16_LO
2906 BFD_RELOC_PPC_GOT_TLSLD16_HI
2908 BFD_RELOC_PPC_GOT_TLSLD16_HA
2910 BFD_RELOC_PPC_GOT_TPREL16
2912 BFD_RELOC_PPC_GOT_TPREL16_LO
2914 BFD_RELOC_PPC_GOT_TPREL16_HI
2916 BFD_RELOC_PPC_GOT_TPREL16_HA
2918 BFD_RELOC_PPC_GOT_DTPREL16
2920 BFD_RELOC_PPC_GOT_DTPREL16_LO
2922 BFD_RELOC_PPC_GOT_DTPREL16_HI
2924 BFD_RELOC_PPC_GOT_DTPREL16_HA
2926 BFD_RELOC_PPC64_TPREL16_DS
2928 BFD_RELOC_PPC64_TPREL16_LO_DS
2930 BFD_RELOC_PPC64_TPREL16_HIGHER
2932 BFD_RELOC_PPC64_TPREL16_HIGHERA
2934 BFD_RELOC_PPC64_TPREL16_HIGHEST
2936 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2938 BFD_RELOC_PPC64_DTPREL16_DS
2940 BFD_RELOC_PPC64_DTPREL16_LO_DS
2942 BFD_RELOC_PPC64_DTPREL16_HIGHER
2944 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2946 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2948 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2950 BFD_RELOC_PPC64_TPREL16_HIGH
2952 BFD_RELOC_PPC64_TPREL16_HIGHA
2954 BFD_RELOC_PPC64_DTPREL16_HIGH
2956 BFD_RELOC_PPC64_DTPREL16_HIGHA
2958 PowerPC and PowerPC64 thread-local storage relocations.
2963 IBM 370/390 relocations
2968 The type of reloc used to build a constructor table - at the moment
2969 probably a 32 bit wide absolute relocation, but the target can choose.
2970 It generally does map to one of the other relocation types.
2973 BFD_RELOC_ARM_PCREL_BRANCH
2975 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2976 not stored in the instruction.
2978 BFD_RELOC_ARM_PCREL_BLX
2980 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2981 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2982 field in the instruction.
2984 BFD_RELOC_THUMB_PCREL_BLX
2986 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2987 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2988 field in the instruction.
2990 BFD_RELOC_ARM_PCREL_CALL
2992 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2994 BFD_RELOC_ARM_PCREL_JUMP
2996 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2999 BFD_RELOC_THUMB_PCREL_BRANCH7
3001 BFD_RELOC_THUMB_PCREL_BRANCH9
3003 BFD_RELOC_THUMB_PCREL_BRANCH12
3005 BFD_RELOC_THUMB_PCREL_BRANCH20
3007 BFD_RELOC_THUMB_PCREL_BRANCH23
3009 BFD_RELOC_THUMB_PCREL_BRANCH25
3011 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
3012 The lowest bit must be zero and is not stored in the instruction.
3013 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
3014 "nn" one smaller in all cases. Note further that BRANCH23
3015 corresponds to R_ARM_THM_CALL.
3018 BFD_RELOC_ARM_OFFSET_IMM
3020 12-bit immediate offset, used in ARM-format ldr and str instructions.
3023 BFD_RELOC_ARM_THUMB_OFFSET
3025 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3028 BFD_RELOC_ARM_TARGET1
3030 Pc-relative or absolute relocation depending on target. Used for
3031 entries in .init_array sections.
3033 BFD_RELOC_ARM_ROSEGREL32
3035 Read-only segment base relative address.
3037 BFD_RELOC_ARM_SBREL32
3039 Data segment base relative address.
3041 BFD_RELOC_ARM_TARGET2
3043 This reloc is used for references to RTTI data from exception handling
3044 tables. The actual definition depends on the target. It may be a
3045 pc-relative or some form of GOT-indirect relocation.
3047 BFD_RELOC_ARM_PREL31
3049 31-bit PC relative address.
3055 BFD_RELOC_ARM_MOVW_PCREL
3057 BFD_RELOC_ARM_MOVT_PCREL
3059 BFD_RELOC_ARM_THUMB_MOVW
3061 BFD_RELOC_ARM_THUMB_MOVT
3063 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3065 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3067 Low and High halfword relocations for MOVW and MOVT instructions.
3070 BFD_RELOC_ARM_GOTFUNCDESC
3072 BFD_RELOC_ARM_GOTOFFFUNCDESC
3074 BFD_RELOC_ARM_FUNCDESC
3076 BFD_RELOC_ARM_FUNCDESC_VALUE
3078 BFD_RELOC_ARM_TLS_GD32_FDPIC
3080 BFD_RELOC_ARM_TLS_LDM32_FDPIC
3082 BFD_RELOC_ARM_TLS_IE32_FDPIC
3084 ARM FDPIC specific relocations.
3087 BFD_RELOC_ARM_JUMP_SLOT
3089 BFD_RELOC_ARM_GLOB_DAT
3095 BFD_RELOC_ARM_RELATIVE
3097 BFD_RELOC_ARM_GOTOFF
3101 BFD_RELOC_ARM_GOT_PREL
3103 Relocations for setting up GOTs and PLTs for shared libraries.
3106 BFD_RELOC_ARM_TLS_GD32
3108 BFD_RELOC_ARM_TLS_LDO32
3110 BFD_RELOC_ARM_TLS_LDM32
3112 BFD_RELOC_ARM_TLS_DTPOFF32
3114 BFD_RELOC_ARM_TLS_DTPMOD32
3116 BFD_RELOC_ARM_TLS_TPOFF32
3118 BFD_RELOC_ARM_TLS_IE32
3120 BFD_RELOC_ARM_TLS_LE32
3122 BFD_RELOC_ARM_TLS_GOTDESC
3124 BFD_RELOC_ARM_TLS_CALL
3126 BFD_RELOC_ARM_THM_TLS_CALL
3128 BFD_RELOC_ARM_TLS_DESCSEQ
3130 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3132 BFD_RELOC_ARM_TLS_DESC
3134 ARM thread-local storage relocations.
3137 BFD_RELOC_ARM_ALU_PC_G0_NC
3139 BFD_RELOC_ARM_ALU_PC_G0
3141 BFD_RELOC_ARM_ALU_PC_G1_NC
3143 BFD_RELOC_ARM_ALU_PC_G1
3145 BFD_RELOC_ARM_ALU_PC_G2
3147 BFD_RELOC_ARM_LDR_PC_G0
3149 BFD_RELOC_ARM_LDR_PC_G1
3151 BFD_RELOC_ARM_LDR_PC_G2
3153 BFD_RELOC_ARM_LDRS_PC_G0
3155 BFD_RELOC_ARM_LDRS_PC_G1
3157 BFD_RELOC_ARM_LDRS_PC_G2
3159 BFD_RELOC_ARM_LDC_PC_G0
3161 BFD_RELOC_ARM_LDC_PC_G1
3163 BFD_RELOC_ARM_LDC_PC_G2
3165 BFD_RELOC_ARM_ALU_SB_G0_NC
3167 BFD_RELOC_ARM_ALU_SB_G0
3169 BFD_RELOC_ARM_ALU_SB_G1_NC
3171 BFD_RELOC_ARM_ALU_SB_G1
3173 BFD_RELOC_ARM_ALU_SB_G2
3175 BFD_RELOC_ARM_LDR_SB_G0
3177 BFD_RELOC_ARM_LDR_SB_G1
3179 BFD_RELOC_ARM_LDR_SB_G2
3181 BFD_RELOC_ARM_LDRS_SB_G0
3183 BFD_RELOC_ARM_LDRS_SB_G1
3185 BFD_RELOC_ARM_LDRS_SB_G2
3187 BFD_RELOC_ARM_LDC_SB_G0
3189 BFD_RELOC_ARM_LDC_SB_G1
3191 BFD_RELOC_ARM_LDC_SB_G2
3193 ARM group relocations.
3198 Annotation of BX instructions.
3201 BFD_RELOC_ARM_IRELATIVE
3203 ARM support for STT_GNU_IFUNC.
3206 BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
3208 BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
3210 BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
3212 BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
3214 Thumb1 relocations to support execute-only code.
3217 BFD_RELOC_ARM_IMMEDIATE
3219 BFD_RELOC_ARM_ADRL_IMMEDIATE
3221 BFD_RELOC_ARM_T32_IMMEDIATE
3223 BFD_RELOC_ARM_T32_ADD_IMM
3225 BFD_RELOC_ARM_T32_IMM12
3227 BFD_RELOC_ARM_T32_ADD_PC12
3229 BFD_RELOC_ARM_SHIFT_IMM
3239 BFD_RELOC_ARM_CP_OFF_IMM
3241 BFD_RELOC_ARM_CP_OFF_IMM_S2
3243 BFD_RELOC_ARM_T32_CP_OFF_IMM
3245 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3247 BFD_RELOC_ARM_ADR_IMM
3249 BFD_RELOC_ARM_LDR_IMM
3251 BFD_RELOC_ARM_LITERAL
3253 BFD_RELOC_ARM_IN_POOL
3255 BFD_RELOC_ARM_OFFSET_IMM8
3257 BFD_RELOC_ARM_T32_OFFSET_U8
3259 BFD_RELOC_ARM_T32_OFFSET_IMM
3261 BFD_RELOC_ARM_HWLITERAL
3263 BFD_RELOC_ARM_THUMB_ADD
3265 BFD_RELOC_ARM_THUMB_IMM
3267 BFD_RELOC_ARM_THUMB_SHIFT
3269 These relocs are only used within the ARM assembler. They are not
3270 (at present) written to any object files.
3273 BFD_RELOC_SH_PCDISP8BY2
3275 BFD_RELOC_SH_PCDISP12BY2
3283 BFD_RELOC_SH_DISP12BY2
3285 BFD_RELOC_SH_DISP12BY4
3287 BFD_RELOC_SH_DISP12BY8
3291 BFD_RELOC_SH_DISP20BY8
3295 BFD_RELOC_SH_IMM4BY2
3297 BFD_RELOC_SH_IMM4BY4
3301 BFD_RELOC_SH_IMM8BY2
3303 BFD_RELOC_SH_IMM8BY4
3305 BFD_RELOC_SH_PCRELIMM8BY2
3307 BFD_RELOC_SH_PCRELIMM8BY4
3309 BFD_RELOC_SH_SWITCH16
3311 BFD_RELOC_SH_SWITCH32
3325 BFD_RELOC_SH_LOOP_START
3327 BFD_RELOC_SH_LOOP_END
3331 BFD_RELOC_SH_GLOB_DAT
3333 BFD_RELOC_SH_JMP_SLOT
3335 BFD_RELOC_SH_RELATIVE
3339 BFD_RELOC_SH_GOT_LOW16
3341 BFD_RELOC_SH_GOT_MEDLOW16
3343 BFD_RELOC_SH_GOT_MEDHI16
3345 BFD_RELOC_SH_GOT_HI16
3347 BFD_RELOC_SH_GOTPLT_LOW16
3349 BFD_RELOC_SH_GOTPLT_MEDLOW16
3351 BFD_RELOC_SH_GOTPLT_MEDHI16
3353 BFD_RELOC_SH_GOTPLT_HI16
3355 BFD_RELOC_SH_PLT_LOW16
3357 BFD_RELOC_SH_PLT_MEDLOW16
3359 BFD_RELOC_SH_PLT_MEDHI16
3361 BFD_RELOC_SH_PLT_HI16
3363 BFD_RELOC_SH_GOTOFF_LOW16
3365 BFD_RELOC_SH_GOTOFF_MEDLOW16
3367 BFD_RELOC_SH_GOTOFF_MEDHI16
3369 BFD_RELOC_SH_GOTOFF_HI16
3371 BFD_RELOC_SH_GOTPC_LOW16
3373 BFD_RELOC_SH_GOTPC_MEDLOW16
3375 BFD_RELOC_SH_GOTPC_MEDHI16
3377 BFD_RELOC_SH_GOTPC_HI16
3381 BFD_RELOC_SH_GLOB_DAT64
3383 BFD_RELOC_SH_JMP_SLOT64
3385 BFD_RELOC_SH_RELATIVE64
3387 BFD_RELOC_SH_GOT10BY4
3389 BFD_RELOC_SH_GOT10BY8
3391 BFD_RELOC_SH_GOTPLT10BY4
3393 BFD_RELOC_SH_GOTPLT10BY8
3395 BFD_RELOC_SH_GOTPLT32
3397 BFD_RELOC_SH_SHMEDIA_CODE
3403 BFD_RELOC_SH_IMMS6BY32
3409 BFD_RELOC_SH_IMMS10BY2
3411 BFD_RELOC_SH_IMMS10BY4
3413 BFD_RELOC_SH_IMMS10BY8
3419 BFD_RELOC_SH_IMM_LOW16
3421 BFD_RELOC_SH_IMM_LOW16_PCREL
3423 BFD_RELOC_SH_IMM_MEDLOW16
3425 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3427 BFD_RELOC_SH_IMM_MEDHI16
3429 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3431 BFD_RELOC_SH_IMM_HI16
3433 BFD_RELOC_SH_IMM_HI16_PCREL
3437 BFD_RELOC_SH_TLS_GD_32
3439 BFD_RELOC_SH_TLS_LD_32
3441 BFD_RELOC_SH_TLS_LDO_32
3443 BFD_RELOC_SH_TLS_IE_32
3445 BFD_RELOC_SH_TLS_LE_32
3447 BFD_RELOC_SH_TLS_DTPMOD32
3449 BFD_RELOC_SH_TLS_DTPOFF32
3451 BFD_RELOC_SH_TLS_TPOFF32
3455 BFD_RELOC_SH_GOTOFF20
3457 BFD_RELOC_SH_GOTFUNCDESC
3459 BFD_RELOC_SH_GOTFUNCDESC20
3461 BFD_RELOC_SH_GOTOFFFUNCDESC
3463 BFD_RELOC_SH_GOTOFFFUNCDESC20
3465 BFD_RELOC_SH_FUNCDESC
3467 Renesas / SuperH SH relocs. Not all of these appear in object files.
3490 BFD_RELOC_ARC_SECTOFF
3492 BFD_RELOC_ARC_S21H_PCREL
3494 BFD_RELOC_ARC_S21W_PCREL
3496 BFD_RELOC_ARC_S25H_PCREL
3498 BFD_RELOC_ARC_S25W_PCREL
3502 BFD_RELOC_ARC_SDA_LDST
3504 BFD_RELOC_ARC_SDA_LDST1
3506 BFD_RELOC_ARC_SDA_LDST2
3508 BFD_RELOC_ARC_SDA16_LD
3510 BFD_RELOC_ARC_SDA16_LD1
3512 BFD_RELOC_ARC_SDA16_LD2
3514 BFD_RELOC_ARC_S13_PCREL
3520 BFD_RELOC_ARC_32_ME_S
3522 BFD_RELOC_ARC_N32_ME
3524 BFD_RELOC_ARC_SECTOFF_ME
3526 BFD_RELOC_ARC_SDA32_ME
3530 BFD_RELOC_AC_SECTOFF_U8
3532 BFD_RELOC_AC_SECTOFF_U8_1
3534 BFD_RELOC_AC_SECTOFF_U8_2
3536 BFD_RELOC_AC_SECTOFF_S9
3538 BFD_RELOC_AC_SECTOFF_S9_1
3540 BFD_RELOC_AC_SECTOFF_S9_2
3542 BFD_RELOC_ARC_SECTOFF_ME_1
3544 BFD_RELOC_ARC_SECTOFF_ME_2
3546 BFD_RELOC_ARC_SECTOFF_1
3548 BFD_RELOC_ARC_SECTOFF_2
3550 BFD_RELOC_ARC_SDA_12
3552 BFD_RELOC_ARC_SDA16_ST2
3554 BFD_RELOC_ARC_32_PCREL
3560 BFD_RELOC_ARC_GOTPC32
3566 BFD_RELOC_ARC_GLOB_DAT
3568 BFD_RELOC_ARC_JMP_SLOT
3570 BFD_RELOC_ARC_RELATIVE
3572 BFD_RELOC_ARC_GOTOFF
3576 BFD_RELOC_ARC_S21W_PCREL_PLT
3578 BFD_RELOC_ARC_S25H_PCREL_PLT
3580 BFD_RELOC_ARC_TLS_DTPMOD
3582 BFD_RELOC_ARC_TLS_TPOFF
3584 BFD_RELOC_ARC_TLS_GD_GOT
3586 BFD_RELOC_ARC_TLS_GD_LD
3588 BFD_RELOC_ARC_TLS_GD_CALL
3590 BFD_RELOC_ARC_TLS_IE_GOT
3592 BFD_RELOC_ARC_TLS_DTPOFF
3594 BFD_RELOC_ARC_TLS_DTPOFF_S9
3596 BFD_RELOC_ARC_TLS_LE_S9
3598 BFD_RELOC_ARC_TLS_LE_32
3600 BFD_RELOC_ARC_S25W_PCREL_PLT
3602 BFD_RELOC_ARC_S21H_PCREL_PLT
3604 BFD_RELOC_ARC_NPS_CMEM16
3606 BFD_RELOC_ARC_JLI_SECTOFF
3611 BFD_RELOC_BFIN_16_IMM
3613 ADI Blackfin 16 bit immediate absolute reloc.
3615 BFD_RELOC_BFIN_16_HIGH
3617 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3619 BFD_RELOC_BFIN_4_PCREL
3621 ADI Blackfin 'a' part of LSETUP.
3623 BFD_RELOC_BFIN_5_PCREL
3627 BFD_RELOC_BFIN_16_LOW
3629 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3631 BFD_RELOC_BFIN_10_PCREL
3635 BFD_RELOC_BFIN_11_PCREL
3637 ADI Blackfin 'b' part of LSETUP.
3639 BFD_RELOC_BFIN_12_PCREL_JUMP
3643 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3645 ADI Blackfin Short jump, pcrel.
3647 BFD_RELOC_BFIN_24_PCREL_CALL_X
3649 ADI Blackfin Call.x not implemented.
3651 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3653 ADI Blackfin Long Jump pcrel.
3655 BFD_RELOC_BFIN_GOT17M4
3657 BFD_RELOC_BFIN_GOTHI
3659 BFD_RELOC_BFIN_GOTLO
3661 BFD_RELOC_BFIN_FUNCDESC
3663 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3665 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3667 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3669 BFD_RELOC_BFIN_FUNCDESC_VALUE
3671 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3673 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3675 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3677 BFD_RELOC_BFIN_GOTOFF17M4
3679 BFD_RELOC_BFIN_GOTOFFHI
3681 BFD_RELOC_BFIN_GOTOFFLO
3683 ADI Blackfin FD-PIC relocations.
3687 ADI Blackfin GOT relocation.
3689 BFD_RELOC_BFIN_PLTPC
3691 ADI Blackfin PLTPC relocation.
3693 BFD_ARELOC_BFIN_PUSH
3695 ADI Blackfin arithmetic relocation.
3697 BFD_ARELOC_BFIN_CONST
3699 ADI Blackfin arithmetic relocation.
3703 ADI Blackfin arithmetic relocation.
3707 ADI Blackfin arithmetic relocation.
3709 BFD_ARELOC_BFIN_MULT
3711 ADI Blackfin arithmetic relocation.
3715 ADI Blackfin arithmetic relocation.
3719 ADI Blackfin arithmetic relocation.
3721 BFD_ARELOC_BFIN_LSHIFT
3723 ADI Blackfin arithmetic relocation.
3725 BFD_ARELOC_BFIN_RSHIFT
3727 ADI Blackfin arithmetic relocation.
3731 ADI Blackfin arithmetic relocation.
3735 ADI Blackfin arithmetic relocation.
3739 ADI Blackfin arithmetic relocation.
3741 BFD_ARELOC_BFIN_LAND
3743 ADI Blackfin arithmetic relocation.
3747 ADI Blackfin arithmetic relocation.
3751 ADI Blackfin arithmetic relocation.
3755 ADI Blackfin arithmetic relocation.
3757 BFD_ARELOC_BFIN_COMP
3759 ADI Blackfin arithmetic relocation.
3761 BFD_ARELOC_BFIN_PAGE
3763 ADI Blackfin arithmetic relocation.
3765 BFD_ARELOC_BFIN_HWPAGE
3767 ADI Blackfin arithmetic relocation.
3769 BFD_ARELOC_BFIN_ADDR
3771 ADI Blackfin arithmetic relocation.
3774 BFD_RELOC_D10V_10_PCREL_R
3776 Mitsubishi D10V relocs.
3777 This is a 10-bit reloc with the right 2 bits
3780 BFD_RELOC_D10V_10_PCREL_L
3782 Mitsubishi D10V relocs.
3783 This is a 10-bit reloc with the right 2 bits
3784 assumed to be 0. This is the same as the previous reloc
3785 except it is in the left container, i.e.,
3786 shifted left 15 bits.
3790 This is an 18-bit reloc with the right 2 bits
3793 BFD_RELOC_D10V_18_PCREL
3795 This is an 18-bit reloc with the right 2 bits
3801 Mitsubishi D30V relocs.
3802 This is a 6-bit absolute reloc.
3804 BFD_RELOC_D30V_9_PCREL
3806 This is a 6-bit pc-relative reloc with
3807 the right 3 bits assumed to be 0.
3809 BFD_RELOC_D30V_9_PCREL_R
3811 This is a 6-bit pc-relative reloc with
3812 the right 3 bits assumed to be 0. Same
3813 as the previous reloc but on the right side
3818 This is a 12-bit absolute reloc with the
3819 right 3 bitsassumed to be 0.
3821 BFD_RELOC_D30V_15_PCREL
3823 This is a 12-bit pc-relative reloc with
3824 the right 3 bits assumed to be 0.
3826 BFD_RELOC_D30V_15_PCREL_R
3828 This is a 12-bit pc-relative reloc with
3829 the right 3 bits assumed to be 0. Same
3830 as the previous reloc but on the right side
3835 This is an 18-bit absolute reloc with
3836 the right 3 bits assumed to be 0.
3838 BFD_RELOC_D30V_21_PCREL
3840 This is an 18-bit pc-relative reloc with
3841 the right 3 bits assumed to be 0.
3843 BFD_RELOC_D30V_21_PCREL_R
3845 This is an 18-bit pc-relative reloc with
3846 the right 3 bits assumed to be 0. Same
3847 as the previous reloc but on the right side
3852 This is a 32-bit absolute reloc.
3854 BFD_RELOC_D30V_32_PCREL
3856 This is a 32-bit pc-relative reloc.
3859 BFD_RELOC_DLX_HI16_S
3874 BFD_RELOC_M32C_RL_JUMP
3876 BFD_RELOC_M32C_RL_1ADDR
3878 BFD_RELOC_M32C_RL_2ADDR
3880 Renesas M16C/M32C Relocations.
3885 Renesas M32R (formerly Mitsubishi M32R) relocs.
3886 This is a 24 bit absolute address.
3888 BFD_RELOC_M32R_10_PCREL
3890 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3892 BFD_RELOC_M32R_18_PCREL
3894 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3896 BFD_RELOC_M32R_26_PCREL
3898 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3900 BFD_RELOC_M32R_HI16_ULO
3902 This is a 16-bit reloc containing the high 16 bits of an address
3903 used when the lower 16 bits are treated as unsigned.
3905 BFD_RELOC_M32R_HI16_SLO
3907 This is a 16-bit reloc containing the high 16 bits of an address
3908 used when the lower 16 bits are treated as signed.
3912 This is a 16-bit reloc containing the lower 16 bits of an address.
3914 BFD_RELOC_M32R_SDA16
3916 This is a 16-bit reloc containing the small data area offset for use in
3917 add3, load, and store instructions.
3919 BFD_RELOC_M32R_GOT24
3921 BFD_RELOC_M32R_26_PLTREL
3925 BFD_RELOC_M32R_GLOB_DAT
3927 BFD_RELOC_M32R_JMP_SLOT
3929 BFD_RELOC_M32R_RELATIVE
3931 BFD_RELOC_M32R_GOTOFF
3933 BFD_RELOC_M32R_GOTOFF_HI_ULO
3935 BFD_RELOC_M32R_GOTOFF_HI_SLO
3937 BFD_RELOC_M32R_GOTOFF_LO
3939 BFD_RELOC_M32R_GOTPC24
3941 BFD_RELOC_M32R_GOT16_HI_ULO
3943 BFD_RELOC_M32R_GOT16_HI_SLO
3945 BFD_RELOC_M32R_GOT16_LO
3947 BFD_RELOC_M32R_GOTPC_HI_ULO
3949 BFD_RELOC_M32R_GOTPC_HI_SLO
3951 BFD_RELOC_M32R_GOTPC_LO
3960 This is a 20 bit absolute address.
3962 BFD_RELOC_NDS32_9_PCREL
3964 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
3966 BFD_RELOC_NDS32_WORD_9_PCREL
3968 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
3970 BFD_RELOC_NDS32_15_PCREL
3972 This is an 15-bit reloc with the right 1 bit assumed to be 0.
3974 BFD_RELOC_NDS32_17_PCREL
3976 This is an 17-bit reloc with the right 1 bit assumed to be 0.
3978 BFD_RELOC_NDS32_25_PCREL
3980 This is a 25-bit reloc with the right 1 bit assumed to be 0.
3982 BFD_RELOC_NDS32_HI20
3984 This is a 20-bit reloc containing the high 20 bits of an address
3985 used with the lower 12 bits
3987 BFD_RELOC_NDS32_LO12S3
3989 This is a 12-bit reloc containing the lower 12 bits of an address
3990 then shift right by 3. This is used with ldi,sdi...
3992 BFD_RELOC_NDS32_LO12S2
3994 This is a 12-bit reloc containing the lower 12 bits of an address
3995 then shift left by 2. This is used with lwi,swi...
3997 BFD_RELOC_NDS32_LO12S1
3999 This is a 12-bit reloc containing the lower 12 bits of an address
4000 then shift left by 1. This is used with lhi,shi...
4002 BFD_RELOC_NDS32_LO12S0
4004 This is a 12-bit reloc containing the lower 12 bits of an address
4005 then shift left by 0. This is used with lbisbi...
4007 BFD_RELOC_NDS32_LO12S0_ORI
4009 This is a 12-bit reloc containing the lower 12 bits of an address
4010 then shift left by 0. This is only used with branch relaxations
4012 BFD_RELOC_NDS32_SDA15S3
4014 This is a 15-bit reloc containing the small data area 18-bit signed offset
4015 and shift left by 3 for use in ldi, sdi...
4017 BFD_RELOC_NDS32_SDA15S2
4019 This is a 15-bit reloc containing the small data area 17-bit signed offset
4020 and shift left by 2 for use in lwi, swi...
4022 BFD_RELOC_NDS32_SDA15S1
4024 This is a 15-bit reloc containing the small data area 16-bit signed offset
4025 and shift left by 1 for use in lhi, shi...
4027 BFD_RELOC_NDS32_SDA15S0
4029 This is a 15-bit reloc containing the small data area 15-bit signed offset
4030 and shift left by 0 for use in lbi, sbi...
4032 BFD_RELOC_NDS32_SDA16S3
4034 This is a 16-bit reloc containing the small data area 16-bit signed offset
4037 BFD_RELOC_NDS32_SDA17S2
4039 This is a 17-bit reloc containing the small data area 17-bit signed offset
4040 and shift left by 2 for use in lwi.gp, swi.gp...
4042 BFD_RELOC_NDS32_SDA18S1
4044 This is a 18-bit reloc containing the small data area 18-bit signed offset
4045 and shift left by 1 for use in lhi.gp, shi.gp...
4047 BFD_RELOC_NDS32_SDA19S0
4049 This is a 19-bit reloc containing the small data area 19-bit signed offset
4050 and shift left by 0 for use in lbi.gp, sbi.gp...
4052 BFD_RELOC_NDS32_GOT20
4054 BFD_RELOC_NDS32_9_PLTREL
4056 BFD_RELOC_NDS32_25_PLTREL
4058 BFD_RELOC_NDS32_COPY
4060 BFD_RELOC_NDS32_GLOB_DAT
4062 BFD_RELOC_NDS32_JMP_SLOT
4064 BFD_RELOC_NDS32_RELATIVE
4066 BFD_RELOC_NDS32_GOTOFF
4068 BFD_RELOC_NDS32_GOTOFF_HI20
4070 BFD_RELOC_NDS32_GOTOFF_LO12
4072 BFD_RELOC_NDS32_GOTPC20
4074 BFD_RELOC_NDS32_GOT_HI20
4076 BFD_RELOC_NDS32_GOT_LO12
4078 BFD_RELOC_NDS32_GOTPC_HI20
4080 BFD_RELOC_NDS32_GOTPC_LO12
4084 BFD_RELOC_NDS32_INSN16
4086 BFD_RELOC_NDS32_LABEL
4088 BFD_RELOC_NDS32_LONGCALL1
4090 BFD_RELOC_NDS32_LONGCALL2
4092 BFD_RELOC_NDS32_LONGCALL3
4094 BFD_RELOC_NDS32_LONGJUMP1
4096 BFD_RELOC_NDS32_LONGJUMP2
4098 BFD_RELOC_NDS32_LONGJUMP3
4100 BFD_RELOC_NDS32_LOADSTORE
4102 BFD_RELOC_NDS32_9_FIXED
4104 BFD_RELOC_NDS32_15_FIXED
4106 BFD_RELOC_NDS32_17_FIXED
4108 BFD_RELOC_NDS32_25_FIXED
4110 BFD_RELOC_NDS32_LONGCALL4
4112 BFD_RELOC_NDS32_LONGCALL5
4114 BFD_RELOC_NDS32_LONGCALL6
4116 BFD_RELOC_NDS32_LONGJUMP4
4118 BFD_RELOC_NDS32_LONGJUMP5
4120 BFD_RELOC_NDS32_LONGJUMP6
4122 BFD_RELOC_NDS32_LONGJUMP7
4126 BFD_RELOC_NDS32_PLTREL_HI20
4128 BFD_RELOC_NDS32_PLTREL_LO12
4130 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4132 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4136 BFD_RELOC_NDS32_SDA12S2_DP
4138 BFD_RELOC_NDS32_SDA12S2_SP
4140 BFD_RELOC_NDS32_LO12S2_DP
4142 BFD_RELOC_NDS32_LO12S2_SP
4146 BFD_RELOC_NDS32_DWARF2_OP1
4148 BFD_RELOC_NDS32_DWARF2_OP2
4150 BFD_RELOC_NDS32_DWARF2_LEB
4152 for dwarf2 debug_line.
4154 BFD_RELOC_NDS32_UPDATE_TA
4156 for eliminate 16-bit instructions
4158 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4160 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4162 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4164 BFD_RELOC_NDS32_GOT_LO15
4166 BFD_RELOC_NDS32_GOT_LO19
4168 BFD_RELOC_NDS32_GOTOFF_LO15
4170 BFD_RELOC_NDS32_GOTOFF_LO19
4172 BFD_RELOC_NDS32_GOT15S2
4174 BFD_RELOC_NDS32_GOT17S2
4176 for PIC object relaxation
4181 This is a 5 bit absolute address.
4183 BFD_RELOC_NDS32_10_UPCREL
4185 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4187 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4189 If fp were omitted, fp can used as another gp.
4191 BFD_RELOC_NDS32_RELAX_ENTRY
4193 BFD_RELOC_NDS32_GOT_SUFF
4195 BFD_RELOC_NDS32_GOTOFF_SUFF
4197 BFD_RELOC_NDS32_PLT_GOT_SUFF
4199 BFD_RELOC_NDS32_MULCALL_SUFF
4203 BFD_RELOC_NDS32_PTR_COUNT
4205 BFD_RELOC_NDS32_PTR_RESOLVED
4207 BFD_RELOC_NDS32_PLTBLOCK
4209 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4211 BFD_RELOC_NDS32_RELAX_REGION_END
4213 BFD_RELOC_NDS32_MINUEND
4215 BFD_RELOC_NDS32_SUBTRAHEND
4217 BFD_RELOC_NDS32_DIFF8
4219 BFD_RELOC_NDS32_DIFF16
4221 BFD_RELOC_NDS32_DIFF32
4223 BFD_RELOC_NDS32_DIFF_ULEB128
4225 BFD_RELOC_NDS32_EMPTY
4227 relaxation relative relocation types
4229 BFD_RELOC_NDS32_25_ABS
4231 This is a 25 bit absolute address.
4233 BFD_RELOC_NDS32_DATA
4235 BFD_RELOC_NDS32_TRAN
4237 BFD_RELOC_NDS32_17IFC_PCREL
4239 BFD_RELOC_NDS32_10IFCU_PCREL
4241 For ex9 and ifc using.
4243 BFD_RELOC_NDS32_TPOFF
4245 BFD_RELOC_NDS32_TLS_LE_HI20
4247 BFD_RELOC_NDS32_TLS_LE_LO12
4249 BFD_RELOC_NDS32_TLS_LE_ADD
4251 BFD_RELOC_NDS32_TLS_LE_LS
4253 BFD_RELOC_NDS32_GOTTPOFF
4255 BFD_RELOC_NDS32_TLS_IE_HI20
4257 BFD_RELOC_NDS32_TLS_IE_LO12S2
4259 BFD_RELOC_NDS32_TLS_TPOFF
4261 BFD_RELOC_NDS32_TLS_LE_20
4263 BFD_RELOC_NDS32_TLS_LE_15S0
4265 BFD_RELOC_NDS32_TLS_LE_15S1
4267 BFD_RELOC_NDS32_TLS_LE_15S2
4273 BFD_RELOC_V850_9_PCREL
4275 This is a 9-bit reloc
4277 BFD_RELOC_V850_22_PCREL
4279 This is a 22-bit reloc
4282 BFD_RELOC_V850_SDA_16_16_OFFSET
4284 This is a 16 bit offset from the short data area pointer.
4286 BFD_RELOC_V850_SDA_15_16_OFFSET
4288 This is a 16 bit offset (of which only 15 bits are used) from the
4289 short data area pointer.
4291 BFD_RELOC_V850_ZDA_16_16_OFFSET
4293 This is a 16 bit offset from the zero data area pointer.
4295 BFD_RELOC_V850_ZDA_15_16_OFFSET
4297 This is a 16 bit offset (of which only 15 bits are used) from the
4298 zero data area pointer.
4300 BFD_RELOC_V850_TDA_6_8_OFFSET
4302 This is an 8 bit offset (of which only 6 bits are used) from the
4303 tiny data area pointer.
4305 BFD_RELOC_V850_TDA_7_8_OFFSET
4307 This is an 8bit offset (of which only 7 bits are used) from the tiny
4310 BFD_RELOC_V850_TDA_7_7_OFFSET
4312 This is a 7 bit offset from the tiny data area pointer.
4314 BFD_RELOC_V850_TDA_16_16_OFFSET
4316 This is a 16 bit offset from the tiny data area pointer.
4319 BFD_RELOC_V850_TDA_4_5_OFFSET
4321 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4324 BFD_RELOC_V850_TDA_4_4_OFFSET
4326 This is a 4 bit offset from the tiny data area pointer.
4328 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4330 This is a 16 bit offset from the short data area pointer, with the
4331 bits placed non-contiguously in the instruction.
4333 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4335 This is a 16 bit offset from the zero data area pointer, with the
4336 bits placed non-contiguously in the instruction.
4338 BFD_RELOC_V850_CALLT_6_7_OFFSET
4340 This is a 6 bit offset from the call table base pointer.
4342 BFD_RELOC_V850_CALLT_16_16_OFFSET
4344 This is a 16 bit offset from the call table base pointer.
4346 BFD_RELOC_V850_LONGCALL
4348 Used for relaxing indirect function calls.
4350 BFD_RELOC_V850_LONGJUMP
4352 Used for relaxing indirect jumps.
4354 BFD_RELOC_V850_ALIGN
4356 Used to maintain alignment whilst relaxing.
4358 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4360 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4363 BFD_RELOC_V850_16_PCREL
4365 This is a 16-bit reloc.
4367 BFD_RELOC_V850_17_PCREL
4369 This is a 17-bit reloc.
4373 This is a 23-bit reloc.
4375 BFD_RELOC_V850_32_PCREL
4377 This is a 32-bit reloc.
4379 BFD_RELOC_V850_32_ABS
4381 This is a 32-bit reloc.
4383 BFD_RELOC_V850_16_SPLIT_OFFSET
4385 This is a 16-bit reloc.
4387 BFD_RELOC_V850_16_S1
4389 This is a 16-bit reloc.
4391 BFD_RELOC_V850_LO16_S1
4393 Low 16 bits. 16 bit shifted by 1.
4395 BFD_RELOC_V850_CALLT_15_16_OFFSET
4397 This is a 16 bit offset from the call table base pointer.
4399 BFD_RELOC_V850_32_GOTPCREL
4403 BFD_RELOC_V850_16_GOT
4407 BFD_RELOC_V850_32_GOT
4411 BFD_RELOC_V850_22_PLT_PCREL
4415 BFD_RELOC_V850_32_PLT_PCREL
4423 BFD_RELOC_V850_GLOB_DAT
4427 BFD_RELOC_V850_JMP_SLOT
4431 BFD_RELOC_V850_RELATIVE
4435 BFD_RELOC_V850_16_GOTOFF
4439 BFD_RELOC_V850_32_GOTOFF
4454 This is a 8bit DP reloc for the tms320c30, where the most
4455 significant 8 bits of a 24 bit word are placed into the least
4456 significant 8 bits of the opcode.
4459 BFD_RELOC_TIC54X_PARTLS7
4461 This is a 7bit reloc for the tms320c54x, where the least
4462 significant 7 bits of a 16 bit word are placed into the least
4463 significant 7 bits of the opcode.
4466 BFD_RELOC_TIC54X_PARTMS9
4468 This is a 9bit DP reloc for the tms320c54x, where the most
4469 significant 9 bits of a 16 bit word are placed into the least
4470 significant 9 bits of the opcode.
4475 This is an extended address 23-bit reloc for the tms320c54x.
4478 BFD_RELOC_TIC54X_16_OF_23
4480 This is a 16-bit reloc for the tms320c54x, where the least
4481 significant 16 bits of a 23-bit extended address are placed into
4485 BFD_RELOC_TIC54X_MS7_OF_23
4487 This is a reloc for the tms320c54x, where the most
4488 significant 7 bits of a 23-bit extended address are placed into
4492 BFD_RELOC_C6000_PCR_S21
4494 BFD_RELOC_C6000_PCR_S12
4496 BFD_RELOC_C6000_PCR_S10
4498 BFD_RELOC_C6000_PCR_S7
4500 BFD_RELOC_C6000_ABS_S16
4502 BFD_RELOC_C6000_ABS_L16
4504 BFD_RELOC_C6000_ABS_H16
4506 BFD_RELOC_C6000_SBR_U15_B
4508 BFD_RELOC_C6000_SBR_U15_H
4510 BFD_RELOC_C6000_SBR_U15_W
4512 BFD_RELOC_C6000_SBR_S16
4514 BFD_RELOC_C6000_SBR_L16_B
4516 BFD_RELOC_C6000_SBR_L16_H
4518 BFD_RELOC_C6000_SBR_L16_W
4520 BFD_RELOC_C6000_SBR_H16_B
4522 BFD_RELOC_C6000_SBR_H16_H
4524 BFD_RELOC_C6000_SBR_H16_W
4526 BFD_RELOC_C6000_SBR_GOT_U15_W
4528 BFD_RELOC_C6000_SBR_GOT_L16_W
4530 BFD_RELOC_C6000_SBR_GOT_H16_W
4532 BFD_RELOC_C6000_DSBT_INDEX
4534 BFD_RELOC_C6000_PREL31
4536 BFD_RELOC_C6000_COPY
4538 BFD_RELOC_C6000_JUMP_SLOT
4540 BFD_RELOC_C6000_EHTYPE
4542 BFD_RELOC_C6000_PCR_H16
4544 BFD_RELOC_C6000_PCR_L16
4546 BFD_RELOC_C6000_ALIGN
4548 BFD_RELOC_C6000_FPHEAD
4550 BFD_RELOC_C6000_NOCMP
4552 TMS320C6000 relocations.
4557 This is a 48 bit reloc for the FR30 that stores 32 bits.
4561 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4564 BFD_RELOC_FR30_6_IN_4
4566 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4569 BFD_RELOC_FR30_8_IN_8
4571 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4574 BFD_RELOC_FR30_9_IN_8
4576 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4579 BFD_RELOC_FR30_10_IN_8
4581 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4584 BFD_RELOC_FR30_9_PCREL
4586 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4587 short offset into 8 bits.
4589 BFD_RELOC_FR30_12_PCREL
4591 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4592 short offset into 11 bits.
4595 BFD_RELOC_MCORE_PCREL_IMM8BY4
4597 BFD_RELOC_MCORE_PCREL_IMM11BY2
4599 BFD_RELOC_MCORE_PCREL_IMM4BY2
4601 BFD_RELOC_MCORE_PCREL_32
4603 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4607 Motorola Mcore relocations.
4616 BFD_RELOC_MEP_PCREL8A2
4618 BFD_RELOC_MEP_PCREL12A2
4620 BFD_RELOC_MEP_PCREL17A2
4622 BFD_RELOC_MEP_PCREL24A2
4624 BFD_RELOC_MEP_PCABS24A2
4636 BFD_RELOC_MEP_TPREL7
4638 BFD_RELOC_MEP_TPREL7A2
4640 BFD_RELOC_MEP_TPREL7A4
4642 BFD_RELOC_MEP_UIMM24
4644 BFD_RELOC_MEP_ADDR24A4
4646 BFD_RELOC_MEP_GNU_VTINHERIT
4648 BFD_RELOC_MEP_GNU_VTENTRY
4650 Toshiba Media Processor Relocations.
4654 BFD_RELOC_METAG_HIADDR16
4656 BFD_RELOC_METAG_LOADDR16
4658 BFD_RELOC_METAG_RELBRANCH
4660 BFD_RELOC_METAG_GETSETOFF
4662 BFD_RELOC_METAG_HIOG
4664 BFD_RELOC_METAG_LOOG
4666 BFD_RELOC_METAG_REL8
4668 BFD_RELOC_METAG_REL16
4670 BFD_RELOC_METAG_HI16_GOTOFF
4672 BFD_RELOC_METAG_LO16_GOTOFF
4674 BFD_RELOC_METAG_GETSET_GOTOFF
4676 BFD_RELOC_METAG_GETSET_GOT
4678 BFD_RELOC_METAG_HI16_GOTPC
4680 BFD_RELOC_METAG_LO16_GOTPC
4682 BFD_RELOC_METAG_HI16_PLT
4684 BFD_RELOC_METAG_LO16_PLT
4686 BFD_RELOC_METAG_RELBRANCH_PLT
4688 BFD_RELOC_METAG_GOTOFF
4692 BFD_RELOC_METAG_COPY
4694 BFD_RELOC_METAG_JMP_SLOT
4696 BFD_RELOC_METAG_RELATIVE
4698 BFD_RELOC_METAG_GLOB_DAT
4700 BFD_RELOC_METAG_TLS_GD
4702 BFD_RELOC_METAG_TLS_LDM
4704 BFD_RELOC_METAG_TLS_LDO_HI16
4706 BFD_RELOC_METAG_TLS_LDO_LO16
4708 BFD_RELOC_METAG_TLS_LDO
4710 BFD_RELOC_METAG_TLS_IE
4712 BFD_RELOC_METAG_TLS_IENONPIC
4714 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4716 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4718 BFD_RELOC_METAG_TLS_TPOFF
4720 BFD_RELOC_METAG_TLS_DTPMOD
4722 BFD_RELOC_METAG_TLS_DTPOFF
4724 BFD_RELOC_METAG_TLS_LE
4726 BFD_RELOC_METAG_TLS_LE_HI16
4728 BFD_RELOC_METAG_TLS_LE_LO16
4730 Imagination Technologies Meta relocations.
4735 BFD_RELOC_MMIX_GETA_1
4737 BFD_RELOC_MMIX_GETA_2
4739 BFD_RELOC_MMIX_GETA_3
4741 These are relocations for the GETA instruction.
4743 BFD_RELOC_MMIX_CBRANCH
4745 BFD_RELOC_MMIX_CBRANCH_J
4747 BFD_RELOC_MMIX_CBRANCH_1
4749 BFD_RELOC_MMIX_CBRANCH_2
4751 BFD_RELOC_MMIX_CBRANCH_3
4753 These are relocations for a conditional branch instruction.
4755 BFD_RELOC_MMIX_PUSHJ
4757 BFD_RELOC_MMIX_PUSHJ_1
4759 BFD_RELOC_MMIX_PUSHJ_2
4761 BFD_RELOC_MMIX_PUSHJ_3
4763 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4765 These are relocations for the PUSHJ instruction.
4769 BFD_RELOC_MMIX_JMP_1
4771 BFD_RELOC_MMIX_JMP_2
4773 BFD_RELOC_MMIX_JMP_3
4775 These are relocations for the JMP instruction.
4777 BFD_RELOC_MMIX_ADDR19
4779 This is a relocation for a relative address as in a GETA instruction or
4782 BFD_RELOC_MMIX_ADDR27
4784 This is a relocation for a relative address as in a JMP instruction.
4786 BFD_RELOC_MMIX_REG_OR_BYTE
4788 This is a relocation for an instruction field that may be a general
4789 register or a value 0..255.
4793 This is a relocation for an instruction field that may be a general
4796 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4798 This is a relocation for two instruction fields holding a register and
4799 an offset, the equivalent of the relocation.
4801 BFD_RELOC_MMIX_LOCAL
4803 This relocation is an assertion that the expression is not allocated as
4804 a global register. It does not modify contents.
4807 BFD_RELOC_AVR_7_PCREL
4809 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4810 short offset into 7 bits.
4812 BFD_RELOC_AVR_13_PCREL
4814 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4815 short offset into 12 bits.
4819 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4820 program memory address) into 16 bits.
4822 BFD_RELOC_AVR_LO8_LDI
4824 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4825 data memory address) into 8 bit immediate value of LDI insn.
4827 BFD_RELOC_AVR_HI8_LDI
4829 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4830 of data memory address) into 8 bit immediate value of LDI insn.
4832 BFD_RELOC_AVR_HH8_LDI
4834 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4835 of program memory address) into 8 bit immediate value of LDI insn.
4837 BFD_RELOC_AVR_MS8_LDI
4839 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4840 of 32 bit value) into 8 bit immediate value of LDI insn.
4842 BFD_RELOC_AVR_LO8_LDI_NEG
4844 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4845 (usually data memory address) into 8 bit immediate value of SUBI insn.
4847 BFD_RELOC_AVR_HI8_LDI_NEG
4849 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4850 (high 8 bit of data memory address) into 8 bit immediate value of
4853 BFD_RELOC_AVR_HH8_LDI_NEG
4855 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4856 (most high 8 bit of program memory address) into 8 bit immediate value
4857 of LDI or SUBI insn.
4859 BFD_RELOC_AVR_MS8_LDI_NEG
4861 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4862 of 32 bit value) into 8 bit immediate value of LDI insn.
4864 BFD_RELOC_AVR_LO8_LDI_PM
4866 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4867 command address) into 8 bit immediate value of LDI insn.
4869 BFD_RELOC_AVR_LO8_LDI_GS
4871 This is a 16 bit reloc for the AVR that stores 8 bit value
4872 (command address) into 8 bit immediate value of LDI insn. If the address
4873 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4876 BFD_RELOC_AVR_HI8_LDI_PM
4878 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4879 of command address) into 8 bit immediate value of LDI insn.
4881 BFD_RELOC_AVR_HI8_LDI_GS
4883 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4884 of command address) into 8 bit immediate value of LDI insn. If the address
4885 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4888 BFD_RELOC_AVR_HH8_LDI_PM
4890 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4891 of command address) into 8 bit immediate value of LDI insn.
4893 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4895 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4896 (usually command address) into 8 bit immediate value of SUBI insn.
4898 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4900 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4901 (high 8 bit of 16 bit command address) into 8 bit immediate value
4904 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4906 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4907 (high 6 bit of 22 bit command address) into 8 bit immediate
4912 This is a 32 bit reloc for the AVR that stores 23 bit value
4917 This is a 16 bit reloc for the AVR that stores all needed bits
4918 for absolute addressing with ldi with overflow check to linktime
4922 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4925 BFD_RELOC_AVR_6_ADIW
4927 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
4932 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
4933 in .byte lo8(symbol)
4937 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
4938 in .byte hi8(symbol)
4942 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
4943 in .byte hlo8(symbol)
4947 BFD_RELOC_AVR_DIFF16
4949 BFD_RELOC_AVR_DIFF32
4951 AVR relocations to mark the difference of two local symbols.
4952 These are only needed to support linker relaxation and can be ignored
4953 when not relaxing. The field is set to the value of the difference
4954 assuming no relaxation. The relocation encodes the position of the
4955 second symbol so the linker can determine whether to adjust the field
4958 BFD_RELOC_AVR_LDS_STS_16
4960 This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
4961 lds and sts instructions supported only tiny core.
4965 This is a 6 bit reloc for the AVR that stores an I/O register
4966 number for the IN and OUT instructions
4970 This is a 5 bit reloc for the AVR that stores an I/O register
4971 number for the SBIC, SBIS, SBI and CBI instructions
4974 BFD_RELOC_RISCV_HI20
4976 BFD_RELOC_RISCV_PCREL_HI20
4978 BFD_RELOC_RISCV_PCREL_LO12_I
4980 BFD_RELOC_RISCV_PCREL_LO12_S
4982 BFD_RELOC_RISCV_LO12_I
4984 BFD_RELOC_RISCV_LO12_S
4986 BFD_RELOC_RISCV_GPREL12_I
4988 BFD_RELOC_RISCV_GPREL12_S
4990 BFD_RELOC_RISCV_TPREL_HI20
4992 BFD_RELOC_RISCV_TPREL_LO12_I
4994 BFD_RELOC_RISCV_TPREL_LO12_S
4996 BFD_RELOC_RISCV_TPREL_ADD
4998 BFD_RELOC_RISCV_CALL
5000 BFD_RELOC_RISCV_CALL_PLT
5002 BFD_RELOC_RISCV_ADD8
5004 BFD_RELOC_RISCV_ADD16
5006 BFD_RELOC_RISCV_ADD32
5008 BFD_RELOC_RISCV_ADD64
5010 BFD_RELOC_RISCV_SUB8
5012 BFD_RELOC_RISCV_SUB16
5014 BFD_RELOC_RISCV_SUB32
5016 BFD_RELOC_RISCV_SUB64
5018 BFD_RELOC_RISCV_GOT_HI20
5020 BFD_RELOC_RISCV_TLS_GOT_HI20
5022 BFD_RELOC_RISCV_TLS_GD_HI20
5026 BFD_RELOC_RISCV_TLS_DTPMOD32
5028 BFD_RELOC_RISCV_TLS_DTPREL32
5030 BFD_RELOC_RISCV_TLS_DTPMOD64
5032 BFD_RELOC_RISCV_TLS_DTPREL64
5034 BFD_RELOC_RISCV_TLS_TPREL32
5036 BFD_RELOC_RISCV_TLS_TPREL64
5038 BFD_RELOC_RISCV_ALIGN
5040 BFD_RELOC_RISCV_RVC_BRANCH
5042 BFD_RELOC_RISCV_RVC_JUMP
5044 BFD_RELOC_RISCV_RVC_LUI
5046 BFD_RELOC_RISCV_GPREL_I
5048 BFD_RELOC_RISCV_GPREL_S
5050 BFD_RELOC_RISCV_TPREL_I
5052 BFD_RELOC_RISCV_TPREL_S
5054 BFD_RELOC_RISCV_RELAX
5058 BFD_RELOC_RISCV_SUB6
5060 BFD_RELOC_RISCV_SET6
5062 BFD_RELOC_RISCV_SET8
5064 BFD_RELOC_RISCV_SET16
5066 BFD_RELOC_RISCV_SET32
5068 BFD_RELOC_RISCV_32_PCREL
5075 BFD_RELOC_RL78_NEG16
5077 BFD_RELOC_RL78_NEG24
5079 BFD_RELOC_RL78_NEG32
5081 BFD_RELOC_RL78_16_OP
5083 BFD_RELOC_RL78_24_OP
5085 BFD_RELOC_RL78_32_OP
5093 BFD_RELOC_RL78_DIR3U_PCREL
5097 BFD_RELOC_RL78_GPRELB
5099 BFD_RELOC_RL78_GPRELW
5101 BFD_RELOC_RL78_GPRELL
5105 BFD_RELOC_RL78_OP_SUBTRACT
5107 BFD_RELOC_RL78_OP_NEG
5109 BFD_RELOC_RL78_OP_AND
5111 BFD_RELOC_RL78_OP_SHRA
5115 BFD_RELOC_RL78_ABS16
5117 BFD_RELOC_RL78_ABS16_REV
5119 BFD_RELOC_RL78_ABS32
5121 BFD_RELOC_RL78_ABS32_REV
5123 BFD_RELOC_RL78_ABS16U
5125 BFD_RELOC_RL78_ABS16UW
5127 BFD_RELOC_RL78_ABS16UL
5129 BFD_RELOC_RL78_RELAX
5139 BFD_RELOC_RL78_SADDR
5141 Renesas RL78 Relocations.
5164 BFD_RELOC_RX_DIR3U_PCREL
5176 BFD_RELOC_RX_OP_SUBTRACT
5184 BFD_RELOC_RX_ABS16_REV
5188 BFD_RELOC_RX_ABS32_REV
5192 BFD_RELOC_RX_ABS16UW
5194 BFD_RELOC_RX_ABS16UL
5198 Renesas RX Relocations.
5211 32 bit PC relative PLT address.
5215 Copy symbol at runtime.
5217 BFD_RELOC_390_GLOB_DAT
5221 BFD_RELOC_390_JMP_SLOT
5225 BFD_RELOC_390_RELATIVE
5227 Adjust by program base.
5231 32 bit PC relative offset to GOT.
5237 BFD_RELOC_390_PC12DBL
5239 PC relative 12 bit shifted by 1.
5241 BFD_RELOC_390_PLT12DBL
5243 12 bit PC rel. PLT shifted by 1.
5245 BFD_RELOC_390_PC16DBL
5247 PC relative 16 bit shifted by 1.
5249 BFD_RELOC_390_PLT16DBL
5251 16 bit PC rel. PLT shifted by 1.
5253 BFD_RELOC_390_PC24DBL
5255 PC relative 24 bit shifted by 1.
5257 BFD_RELOC_390_PLT24DBL
5259 24 bit PC rel. PLT shifted by 1.
5261 BFD_RELOC_390_PC32DBL
5263 PC relative 32 bit shifted by 1.
5265 BFD_RELOC_390_PLT32DBL
5267 32 bit PC rel. PLT shifted by 1.
5269 BFD_RELOC_390_GOTPCDBL
5271 32 bit PC rel. GOT shifted by 1.
5279 64 bit PC relative PLT address.
5281 BFD_RELOC_390_GOTENT
5283 32 bit rel. offset to GOT entry.
5285 BFD_RELOC_390_GOTOFF64
5287 64 bit offset to GOT.
5289 BFD_RELOC_390_GOTPLT12
5291 12-bit offset to symbol-entry within GOT, with PLT handling.
5293 BFD_RELOC_390_GOTPLT16
5295 16-bit offset to symbol-entry within GOT, with PLT handling.
5297 BFD_RELOC_390_GOTPLT32
5299 32-bit offset to symbol-entry within GOT, with PLT handling.
5301 BFD_RELOC_390_GOTPLT64
5303 64-bit offset to symbol-entry within GOT, with PLT handling.
5305 BFD_RELOC_390_GOTPLTENT
5307 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5309 BFD_RELOC_390_PLTOFF16
5311 16-bit rel. offset from the GOT to a PLT entry.
5313 BFD_RELOC_390_PLTOFF32
5315 32-bit rel. offset from the GOT to a PLT entry.
5317 BFD_RELOC_390_PLTOFF64
5319 64-bit rel. offset from the GOT to a PLT entry.
5322 BFD_RELOC_390_TLS_LOAD
5324 BFD_RELOC_390_TLS_GDCALL
5326 BFD_RELOC_390_TLS_LDCALL
5328 BFD_RELOC_390_TLS_GD32
5330 BFD_RELOC_390_TLS_GD64
5332 BFD_RELOC_390_TLS_GOTIE12
5334 BFD_RELOC_390_TLS_GOTIE32
5336 BFD_RELOC_390_TLS_GOTIE64
5338 BFD_RELOC_390_TLS_LDM32
5340 BFD_RELOC_390_TLS_LDM64
5342 BFD_RELOC_390_TLS_IE32
5344 BFD_RELOC_390_TLS_IE64
5346 BFD_RELOC_390_TLS_IEENT
5348 BFD_RELOC_390_TLS_LE32
5350 BFD_RELOC_390_TLS_LE64
5352 BFD_RELOC_390_TLS_LDO32
5354 BFD_RELOC_390_TLS_LDO64
5356 BFD_RELOC_390_TLS_DTPMOD
5358 BFD_RELOC_390_TLS_DTPOFF
5360 BFD_RELOC_390_TLS_TPOFF
5362 s390 tls relocations.
5369 BFD_RELOC_390_GOTPLT20
5371 BFD_RELOC_390_TLS_GOTIE20
5373 Long displacement extension.
5376 BFD_RELOC_390_IRELATIVE
5378 STT_GNU_IFUNC relocation.
5381 BFD_RELOC_SCORE_GPREL15
5384 Low 16 bit for load/store
5386 BFD_RELOC_SCORE_DUMMY2
5390 This is a 24-bit reloc with the right 1 bit assumed to be 0
5392 BFD_RELOC_SCORE_BRANCH
5394 This is a 19-bit reloc with the right 1 bit assumed to be 0
5396 BFD_RELOC_SCORE_IMM30
5398 This is a 32-bit reloc for 48-bit instructions.
5400 BFD_RELOC_SCORE_IMM32
5402 This is a 32-bit reloc for 48-bit instructions.
5404 BFD_RELOC_SCORE16_JMP
5406 This is a 11-bit reloc with the right 1 bit assumed to be 0
5408 BFD_RELOC_SCORE16_BRANCH
5410 This is a 8-bit reloc with the right 1 bit assumed to be 0
5412 BFD_RELOC_SCORE_BCMP
5414 This is a 9-bit reloc with the right 1 bit assumed to be 0
5416 BFD_RELOC_SCORE_GOT15
5418 BFD_RELOC_SCORE_GOT_LO16
5420 BFD_RELOC_SCORE_CALL15
5422 BFD_RELOC_SCORE_DUMMY_HI16
5424 Undocumented Score relocs
5429 Scenix IP2K - 9-bit register number / data address
5433 Scenix IP2K - 4-bit register/data bank number
5435 BFD_RELOC_IP2K_ADDR16CJP
5437 Scenix IP2K - low 13 bits of instruction word address
5439 BFD_RELOC_IP2K_PAGE3
5441 Scenix IP2K - high 3 bits of instruction word address
5443 BFD_RELOC_IP2K_LO8DATA
5445 BFD_RELOC_IP2K_HI8DATA
5447 BFD_RELOC_IP2K_EX8DATA
5449 Scenix IP2K - ext/low/high 8 bits of data address
5451 BFD_RELOC_IP2K_LO8INSN
5453 BFD_RELOC_IP2K_HI8INSN
5455 Scenix IP2K - low/high 8 bits of instruction word address
5457 BFD_RELOC_IP2K_PC_SKIP
5459 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5463 Scenix IP2K - 16 bit word address in text section.
5465 BFD_RELOC_IP2K_FR_OFFSET
5467 Scenix IP2K - 7-bit sp or dp offset
5469 BFD_RELOC_VPE4KMATH_DATA
5471 BFD_RELOC_VPE4KMATH_INSN
5473 Scenix VPE4K coprocessor - data/insn-space addressing
5476 BFD_RELOC_VTABLE_INHERIT
5478 BFD_RELOC_VTABLE_ENTRY
5480 These two relocations are used by the linker to determine which of
5481 the entries in a C++ virtual function table are actually used. When
5482 the --gc-sections option is given, the linker will zero out the entries
5483 that are not used, so that the code for those functions need not be
5484 included in the output.
5486 VTABLE_INHERIT is a zero-space relocation used to describe to the
5487 linker the inheritance tree of a C++ virtual function table. The
5488 relocation's symbol should be the parent class' vtable, and the
5489 relocation should be located at the child vtable.
5491 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5492 virtual function table entry. The reloc's symbol should refer to the
5493 table of the class mentioned in the code. Off of that base, an offset
5494 describes the entry that is being used. For Rela hosts, this offset
5495 is stored in the reloc's addend. For Rel hosts, we are forced to put
5496 this offset in the reloc's section offset.
5499 BFD_RELOC_IA64_IMM14
5501 BFD_RELOC_IA64_IMM22
5503 BFD_RELOC_IA64_IMM64
5505 BFD_RELOC_IA64_DIR32MSB
5507 BFD_RELOC_IA64_DIR32LSB
5509 BFD_RELOC_IA64_DIR64MSB
5511 BFD_RELOC_IA64_DIR64LSB
5513 BFD_RELOC_IA64_GPREL22
5515 BFD_RELOC_IA64_GPREL64I
5517 BFD_RELOC_IA64_GPREL32MSB
5519 BFD_RELOC_IA64_GPREL32LSB
5521 BFD_RELOC_IA64_GPREL64MSB
5523 BFD_RELOC_IA64_GPREL64LSB
5525 BFD_RELOC_IA64_LTOFF22
5527 BFD_RELOC_IA64_LTOFF64I
5529 BFD_RELOC_IA64_PLTOFF22
5531 BFD_RELOC_IA64_PLTOFF64I
5533 BFD_RELOC_IA64_PLTOFF64MSB
5535 BFD_RELOC_IA64_PLTOFF64LSB
5537 BFD_RELOC_IA64_FPTR64I
5539 BFD_RELOC_IA64_FPTR32MSB
5541 BFD_RELOC_IA64_FPTR32LSB
5543 BFD_RELOC_IA64_FPTR64MSB
5545 BFD_RELOC_IA64_FPTR64LSB
5547 BFD_RELOC_IA64_PCREL21B
5549 BFD_RELOC_IA64_PCREL21BI
5551 BFD_RELOC_IA64_PCREL21M
5553 BFD_RELOC_IA64_PCREL21F
5555 BFD_RELOC_IA64_PCREL22
5557 BFD_RELOC_IA64_PCREL60B
5559 BFD_RELOC_IA64_PCREL64I
5561 BFD_RELOC_IA64_PCREL32MSB
5563 BFD_RELOC_IA64_PCREL32LSB
5565 BFD_RELOC_IA64_PCREL64MSB
5567 BFD_RELOC_IA64_PCREL64LSB
5569 BFD_RELOC_IA64_LTOFF_FPTR22
5571 BFD_RELOC_IA64_LTOFF_FPTR64I
5573 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5575 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5577 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5579 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5581 BFD_RELOC_IA64_SEGREL32MSB
5583 BFD_RELOC_IA64_SEGREL32LSB
5585 BFD_RELOC_IA64_SEGREL64MSB
5587 BFD_RELOC_IA64_SEGREL64LSB
5589 BFD_RELOC_IA64_SECREL32MSB
5591 BFD_RELOC_IA64_SECREL32LSB
5593 BFD_RELOC_IA64_SECREL64MSB
5595 BFD_RELOC_IA64_SECREL64LSB
5597 BFD_RELOC_IA64_REL32MSB
5599 BFD_RELOC_IA64_REL32LSB
5601 BFD_RELOC_IA64_REL64MSB
5603 BFD_RELOC_IA64_REL64LSB
5605 BFD_RELOC_IA64_LTV32MSB
5607 BFD_RELOC_IA64_LTV32LSB
5609 BFD_RELOC_IA64_LTV64MSB
5611 BFD_RELOC_IA64_LTV64LSB
5613 BFD_RELOC_IA64_IPLTMSB
5615 BFD_RELOC_IA64_IPLTLSB
5619 BFD_RELOC_IA64_LTOFF22X
5621 BFD_RELOC_IA64_LDXMOV
5623 BFD_RELOC_IA64_TPREL14
5625 BFD_RELOC_IA64_TPREL22
5627 BFD_RELOC_IA64_TPREL64I
5629 BFD_RELOC_IA64_TPREL64MSB
5631 BFD_RELOC_IA64_TPREL64LSB
5633 BFD_RELOC_IA64_LTOFF_TPREL22
5635 BFD_RELOC_IA64_DTPMOD64MSB
5637 BFD_RELOC_IA64_DTPMOD64LSB
5639 BFD_RELOC_IA64_LTOFF_DTPMOD22
5641 BFD_RELOC_IA64_DTPREL14
5643 BFD_RELOC_IA64_DTPREL22
5645 BFD_RELOC_IA64_DTPREL64I
5647 BFD_RELOC_IA64_DTPREL32MSB
5649 BFD_RELOC_IA64_DTPREL32LSB
5651 BFD_RELOC_IA64_DTPREL64MSB
5653 BFD_RELOC_IA64_DTPREL64LSB
5655 BFD_RELOC_IA64_LTOFF_DTPREL22
5657 Intel IA64 Relocations.
5660 BFD_RELOC_M68HC11_HI8
5662 Motorola 68HC11 reloc.
5663 This is the 8 bit high part of an absolute address.
5665 BFD_RELOC_M68HC11_LO8
5667 Motorola 68HC11 reloc.
5668 This is the 8 bit low part of an absolute address.
5670 BFD_RELOC_M68HC11_3B
5672 Motorola 68HC11 reloc.
5673 This is the 3 bit of a value.
5675 BFD_RELOC_M68HC11_RL_JUMP
5677 Motorola 68HC11 reloc.
5678 This reloc marks the beginning of a jump/call instruction.
5679 It is used for linker relaxation to correctly identify beginning
5680 of instruction and change some branches to use PC-relative
5683 BFD_RELOC_M68HC11_RL_GROUP
5685 Motorola 68HC11 reloc.
5686 This reloc marks a group of several instructions that gcc generates
5687 and for which the linker relaxation pass can modify and/or remove
5690 BFD_RELOC_M68HC11_LO16
5692 Motorola 68HC11 reloc.
5693 This is the 16-bit lower part of an address. It is used for 'call'
5694 instruction to specify the symbol address without any special
5695 transformation (due to memory bank window).
5697 BFD_RELOC_M68HC11_PAGE
5699 Motorola 68HC11 reloc.
5700 This is a 8-bit reloc that specifies the page number of an address.
5701 It is used by 'call' instruction to specify the page number of
5704 BFD_RELOC_M68HC11_24
5706 Motorola 68HC11 reloc.
5707 This is a 24-bit reloc that represents the address with a 16-bit
5708 value and a 8-bit page number. The symbol address is transformed
5709 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5711 BFD_RELOC_M68HC12_5B
5713 Motorola 68HC12 reloc.
5714 This is the 5 bits of a value.
5716 BFD_RELOC_XGATE_RL_JUMP
5718 Freescale XGATE reloc.
5719 This reloc marks the beginning of a bra/jal instruction.
5721 BFD_RELOC_XGATE_RL_GROUP
5723 Freescale XGATE reloc.
5724 This reloc marks a group of several instructions that gcc generates
5725 and for which the linker relaxation pass can modify and/or remove
5728 BFD_RELOC_XGATE_LO16
5730 Freescale XGATE reloc.
5731 This is the 16-bit lower part of an address. It is used for the '16-bit'
5734 BFD_RELOC_XGATE_GPAGE
5736 Freescale XGATE reloc.
5740 Freescale XGATE reloc.
5742 BFD_RELOC_XGATE_PCREL_9
5744 Freescale XGATE reloc.
5745 This is a 9-bit pc-relative reloc.
5747 BFD_RELOC_XGATE_PCREL_10
5749 Freescale XGATE reloc.
5750 This is a 10-bit pc-relative reloc.
5752 BFD_RELOC_XGATE_IMM8_LO
5754 Freescale XGATE reloc.
5755 This is the 16-bit lower part of an address. It is used for the '16-bit'
5758 BFD_RELOC_XGATE_IMM8_HI
5760 Freescale XGATE reloc.
5761 This is the 16-bit higher part of an address. It is used for the '16-bit'
5764 BFD_RELOC_XGATE_IMM3
5766 Freescale XGATE reloc.
5767 This is a 3-bit pc-relative reloc.
5769 BFD_RELOC_XGATE_IMM4
5771 Freescale XGATE reloc.
5772 This is a 4-bit pc-relative reloc.
5774 BFD_RELOC_XGATE_IMM5
5776 Freescale XGATE reloc.
5777 This is a 5-bit pc-relative reloc.
5779 BFD_RELOC_M68HC12_9B
5781 Motorola 68HC12 reloc.
5782 This is the 9 bits of a value.
5784 BFD_RELOC_M68HC12_16B
5786 Motorola 68HC12 reloc.
5787 This is the 16 bits of a value.
5789 BFD_RELOC_M68HC12_9_PCREL
5791 Motorola 68HC12/XGATE reloc.
5792 This is a PCREL9 branch.
5794 BFD_RELOC_M68HC12_10_PCREL
5796 Motorola 68HC12/XGATE reloc.
5797 This is a PCREL10 branch.
5799 BFD_RELOC_M68HC12_LO8XG
5801 Motorola 68HC12/XGATE reloc.
5802 This is the 8 bit low part of an absolute address and immediately precedes
5803 a matching HI8XG part.
5805 BFD_RELOC_M68HC12_HI8XG
5807 Motorola 68HC12/XGATE reloc.
5808 This is the 8 bit high part of an absolute address and immediately follows
5809 a matching LO8XG part.
5811 BFD_RELOC_S12Z_15_PCREL
5813 Freescale S12Z reloc.
5814 This is a 15 bit relative address. If the most significant bits are all zero
5815 then it may be truncated to 8 bits.
5819 BFD_RELOC_16C_NUM08_C
5823 BFD_RELOC_16C_NUM16_C
5827 BFD_RELOC_16C_NUM32_C
5829 BFD_RELOC_16C_DISP04
5831 BFD_RELOC_16C_DISP04_C
5833 BFD_RELOC_16C_DISP08
5835 BFD_RELOC_16C_DISP08_C
5837 BFD_RELOC_16C_DISP16
5839 BFD_RELOC_16C_DISP16_C
5841 BFD_RELOC_16C_DISP24
5843 BFD_RELOC_16C_DISP24_C
5845 BFD_RELOC_16C_DISP24a
5847 BFD_RELOC_16C_DISP24a_C
5851 BFD_RELOC_16C_REG04_C
5853 BFD_RELOC_16C_REG04a
5855 BFD_RELOC_16C_REG04a_C
5859 BFD_RELOC_16C_REG14_C
5863 BFD_RELOC_16C_REG16_C
5867 BFD_RELOC_16C_REG20_C
5871 BFD_RELOC_16C_ABS20_C
5875 BFD_RELOC_16C_ABS24_C
5879 BFD_RELOC_16C_IMM04_C
5883 BFD_RELOC_16C_IMM16_C
5887 BFD_RELOC_16C_IMM20_C
5891 BFD_RELOC_16C_IMM24_C
5895 BFD_RELOC_16C_IMM32_C
5897 NS CR16C Relocations.
5902 BFD_RELOC_CR16_NUM16
5904 BFD_RELOC_CR16_NUM32
5906 BFD_RELOC_CR16_NUM32a
5908 BFD_RELOC_CR16_REGREL0
5910 BFD_RELOC_CR16_REGREL4
5912 BFD_RELOC_CR16_REGREL4a
5914 BFD_RELOC_CR16_REGREL14
5916 BFD_RELOC_CR16_REGREL14a
5918 BFD_RELOC_CR16_REGREL16
5920 BFD_RELOC_CR16_REGREL20
5922 BFD_RELOC_CR16_REGREL20a
5924 BFD_RELOC_CR16_ABS20
5926 BFD_RELOC_CR16_ABS24
5932 BFD_RELOC_CR16_IMM16
5934 BFD_RELOC_CR16_IMM20
5936 BFD_RELOC_CR16_IMM24
5938 BFD_RELOC_CR16_IMM32
5940 BFD_RELOC_CR16_IMM32a
5942 BFD_RELOC_CR16_DISP4
5944 BFD_RELOC_CR16_DISP8
5946 BFD_RELOC_CR16_DISP16
5948 BFD_RELOC_CR16_DISP20
5950 BFD_RELOC_CR16_DISP24
5952 BFD_RELOC_CR16_DISP24a
5954 BFD_RELOC_CR16_SWITCH8
5956 BFD_RELOC_CR16_SWITCH16
5958 BFD_RELOC_CR16_SWITCH32
5960 BFD_RELOC_CR16_GOT_REGREL20
5962 BFD_RELOC_CR16_GOTC_REGREL20
5964 BFD_RELOC_CR16_GLOB_DAT
5966 NS CR16 Relocations.
5973 BFD_RELOC_CRX_REL8_CMP
5981 BFD_RELOC_CRX_REGREL12
5983 BFD_RELOC_CRX_REGREL22
5985 BFD_RELOC_CRX_REGREL28
5987 BFD_RELOC_CRX_REGREL32
6003 BFD_RELOC_CRX_SWITCH8
6005 BFD_RELOC_CRX_SWITCH16
6007 BFD_RELOC_CRX_SWITCH32
6012 BFD_RELOC_CRIS_BDISP8
6014 BFD_RELOC_CRIS_UNSIGNED_5
6016 BFD_RELOC_CRIS_SIGNED_6
6018 BFD_RELOC_CRIS_UNSIGNED_6
6020 BFD_RELOC_CRIS_SIGNED_8
6022 BFD_RELOC_CRIS_UNSIGNED_8
6024 BFD_RELOC_CRIS_SIGNED_16
6026 BFD_RELOC_CRIS_UNSIGNED_16
6028 BFD_RELOC_CRIS_LAPCQ_OFFSET
6030 BFD_RELOC_CRIS_UNSIGNED_4
6032 These relocs are only used within the CRIS assembler. They are not
6033 (at present) written to any object files.
6037 BFD_RELOC_CRIS_GLOB_DAT
6039 BFD_RELOC_CRIS_JUMP_SLOT
6041 BFD_RELOC_CRIS_RELATIVE
6043 Relocs used in ELF shared libraries for CRIS.
6045 BFD_RELOC_CRIS_32_GOT
6047 32-bit offset to symbol-entry within GOT.
6049 BFD_RELOC_CRIS_16_GOT
6051 16-bit offset to symbol-entry within GOT.
6053 BFD_RELOC_CRIS_32_GOTPLT
6055 32-bit offset to symbol-entry within GOT, with PLT handling.
6057 BFD_RELOC_CRIS_16_GOTPLT
6059 16-bit offset to symbol-entry within GOT, with PLT handling.
6061 BFD_RELOC_CRIS_32_GOTREL
6063 32-bit offset to symbol, relative to GOT.
6065 BFD_RELOC_CRIS_32_PLT_GOTREL
6067 32-bit offset to symbol with PLT entry, relative to GOT.
6069 BFD_RELOC_CRIS_32_PLT_PCREL
6071 32-bit offset to symbol with PLT entry, relative to this relocation.
6074 BFD_RELOC_CRIS_32_GOT_GD
6076 BFD_RELOC_CRIS_16_GOT_GD
6078 BFD_RELOC_CRIS_32_GD
6082 BFD_RELOC_CRIS_32_DTPREL
6084 BFD_RELOC_CRIS_16_DTPREL
6086 BFD_RELOC_CRIS_32_GOT_TPREL
6088 BFD_RELOC_CRIS_16_GOT_TPREL
6090 BFD_RELOC_CRIS_32_TPREL
6092 BFD_RELOC_CRIS_16_TPREL
6094 BFD_RELOC_CRIS_DTPMOD
6096 BFD_RELOC_CRIS_32_IE
6098 Relocs used in TLS code for CRIS.
6101 BFD_RELOC_OR1K_REL_26
6103 BFD_RELOC_OR1K_GOTPC_HI16
6105 BFD_RELOC_OR1K_GOTPC_LO16
6107 BFD_RELOC_OR1K_GOT16
6109 BFD_RELOC_OR1K_PLT26
6111 BFD_RELOC_OR1K_GOTOFF_HI16
6113 BFD_RELOC_OR1K_GOTOFF_LO16
6117 BFD_RELOC_OR1K_GLOB_DAT
6119 BFD_RELOC_OR1K_JMP_SLOT
6121 BFD_RELOC_OR1K_RELATIVE
6123 BFD_RELOC_OR1K_TLS_GD_HI16
6125 BFD_RELOC_OR1K_TLS_GD_LO16
6127 BFD_RELOC_OR1K_TLS_LDM_HI16
6129 BFD_RELOC_OR1K_TLS_LDM_LO16
6131 BFD_RELOC_OR1K_TLS_LDO_HI16
6133 BFD_RELOC_OR1K_TLS_LDO_LO16
6135 BFD_RELOC_OR1K_TLS_IE_HI16
6137 BFD_RELOC_OR1K_TLS_IE_LO16
6139 BFD_RELOC_OR1K_TLS_LE_HI16
6141 BFD_RELOC_OR1K_TLS_LE_LO16
6143 BFD_RELOC_OR1K_TLS_TPOFF
6145 BFD_RELOC_OR1K_TLS_DTPOFF
6147 BFD_RELOC_OR1K_TLS_DTPMOD
6149 OpenRISC 1000 Relocations.
6152 BFD_RELOC_H8_DIR16A8
6154 BFD_RELOC_H8_DIR16R8
6156 BFD_RELOC_H8_DIR24A8
6158 BFD_RELOC_H8_DIR24R8
6160 BFD_RELOC_H8_DIR32A16
6162 BFD_RELOC_H8_DISP32A16
6167 BFD_RELOC_XSTORMY16_REL_12
6169 BFD_RELOC_XSTORMY16_12
6171 BFD_RELOC_XSTORMY16_24
6173 BFD_RELOC_XSTORMY16_FPTR16
6175 Sony Xstormy16 Relocations.
6180 Self-describing complex relocations.
6192 Infineon Relocations.
6195 BFD_RELOC_VAX_GLOB_DAT
6197 BFD_RELOC_VAX_JMP_SLOT
6199 BFD_RELOC_VAX_RELATIVE
6201 Relocations used by VAX ELF.
6206 Morpho MT - 16 bit immediate relocation.
6210 Morpho MT - Hi 16 bits of an address.
6214 Morpho MT - Low 16 bits of an address.
6216 BFD_RELOC_MT_GNU_VTINHERIT
6218 Morpho MT - Used to tell the linker which vtable entries are used.
6220 BFD_RELOC_MT_GNU_VTENTRY
6222 Morpho MT - Used to tell the linker which vtable entries are used.
6224 BFD_RELOC_MT_PCINSN8
6226 Morpho MT - 8 bit immediate relocation.
6229 BFD_RELOC_MSP430_10_PCREL
6231 BFD_RELOC_MSP430_16_PCREL
6235 BFD_RELOC_MSP430_16_PCREL_BYTE
6237 BFD_RELOC_MSP430_16_BYTE
6239 BFD_RELOC_MSP430_2X_PCREL
6241 BFD_RELOC_MSP430_RL_PCREL
6243 BFD_RELOC_MSP430_ABS8
6245 BFD_RELOC_MSP430X_PCR20_EXT_SRC
6247 BFD_RELOC_MSP430X_PCR20_EXT_DST
6249 BFD_RELOC_MSP430X_PCR20_EXT_ODST
6251 BFD_RELOC_MSP430X_ABS20_EXT_SRC
6253 BFD_RELOC_MSP430X_ABS20_EXT_DST
6255 BFD_RELOC_MSP430X_ABS20_EXT_ODST
6257 BFD_RELOC_MSP430X_ABS20_ADR_SRC
6259 BFD_RELOC_MSP430X_ABS20_ADR_DST
6261 BFD_RELOC_MSP430X_PCR16
6263 BFD_RELOC_MSP430X_PCR20_CALL
6265 BFD_RELOC_MSP430X_ABS16
6267 BFD_RELOC_MSP430_ABS_HI16
6269 BFD_RELOC_MSP430_PREL31
6271 BFD_RELOC_MSP430_SYM_DIFF
6273 msp430 specific relocation codes
6280 BFD_RELOC_NIOS2_CALL26
6282 BFD_RELOC_NIOS2_IMM5
6284 BFD_RELOC_NIOS2_CACHE_OPX
6286 BFD_RELOC_NIOS2_IMM6
6288 BFD_RELOC_NIOS2_IMM8
6290 BFD_RELOC_NIOS2_HI16
6292 BFD_RELOC_NIOS2_LO16
6294 BFD_RELOC_NIOS2_HIADJ16
6296 BFD_RELOC_NIOS2_GPREL
6298 BFD_RELOC_NIOS2_UJMP
6300 BFD_RELOC_NIOS2_CJMP
6302 BFD_RELOC_NIOS2_CALLR
6304 BFD_RELOC_NIOS2_ALIGN
6306 BFD_RELOC_NIOS2_GOT16
6308 BFD_RELOC_NIOS2_CALL16
6310 BFD_RELOC_NIOS2_GOTOFF_LO
6312 BFD_RELOC_NIOS2_GOTOFF_HA
6314 BFD_RELOC_NIOS2_PCREL_LO
6316 BFD_RELOC_NIOS2_PCREL_HA
6318 BFD_RELOC_NIOS2_TLS_GD16
6320 BFD_RELOC_NIOS2_TLS_LDM16
6322 BFD_RELOC_NIOS2_TLS_LDO16
6324 BFD_RELOC_NIOS2_TLS_IE16
6326 BFD_RELOC_NIOS2_TLS_LE16
6328 BFD_RELOC_NIOS2_TLS_DTPMOD
6330 BFD_RELOC_NIOS2_TLS_DTPREL
6332 BFD_RELOC_NIOS2_TLS_TPREL
6334 BFD_RELOC_NIOS2_COPY
6336 BFD_RELOC_NIOS2_GLOB_DAT
6338 BFD_RELOC_NIOS2_JUMP_SLOT
6340 BFD_RELOC_NIOS2_RELATIVE
6342 BFD_RELOC_NIOS2_GOTOFF
6344 BFD_RELOC_NIOS2_CALL26_NOAT
6346 BFD_RELOC_NIOS2_GOT_LO
6348 BFD_RELOC_NIOS2_GOT_HA
6350 BFD_RELOC_NIOS2_CALL_LO
6352 BFD_RELOC_NIOS2_CALL_HA
6354 BFD_RELOC_NIOS2_R2_S12
6356 BFD_RELOC_NIOS2_R2_I10_1_PCREL
6358 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
6360 BFD_RELOC_NIOS2_R2_T1I7_2
6362 BFD_RELOC_NIOS2_R2_T2I4
6364 BFD_RELOC_NIOS2_R2_T2I4_1
6366 BFD_RELOC_NIOS2_R2_T2I4_2
6368 BFD_RELOC_NIOS2_R2_X1I7_2
6370 BFD_RELOC_NIOS2_R2_X2L5
6372 BFD_RELOC_NIOS2_R2_F1I5_2
6374 BFD_RELOC_NIOS2_R2_L5I4X1
6376 BFD_RELOC_NIOS2_R2_T1X1I6
6378 BFD_RELOC_NIOS2_R2_T1X1I6_2
6380 Relocations used by the Altera Nios II core.
6385 PRU LDI 16-bit unsigned data-memory relocation.
6387 BFD_RELOC_PRU_U16_PMEMIMM
6389 PRU LDI 16-bit unsigned instruction-memory relocation.
6393 PRU relocation for two consecutive LDI load instructions that load a
6394 32 bit value into a register. If the higher bits are all zero, then
6395 the second instruction may be relaxed.
6397 BFD_RELOC_PRU_S10_PCREL
6399 PRU QBBx 10-bit signed PC-relative relocation.
6401 BFD_RELOC_PRU_U8_PCREL
6403 PRU 8-bit unsigned relocation used for the LOOP instruction.
6405 BFD_RELOC_PRU_32_PMEM
6407 BFD_RELOC_PRU_16_PMEM
6409 PRU Program Memory relocations. Used to convert from byte addressing to
6410 32-bit word addressing.
6412 BFD_RELOC_PRU_GNU_DIFF8
6414 BFD_RELOC_PRU_GNU_DIFF16
6416 BFD_RELOC_PRU_GNU_DIFF32
6418 BFD_RELOC_PRU_GNU_DIFF16_PMEM
6420 BFD_RELOC_PRU_GNU_DIFF32_PMEM
6422 PRU relocations to mark the difference of two local symbols.
6423 These are only needed to support linker relaxation and can be ignored
6424 when not relaxing. The field is set to the value of the difference
6425 assuming no relaxation. The relocation encodes the position of the
6426 second symbol so the linker can determine whether to adjust the field
6427 value. The PMEM variants encode the word difference, instead of byte
6428 difference between symbols.
6431 BFD_RELOC_IQ2000_OFFSET_16
6433 BFD_RELOC_IQ2000_OFFSET_21
6435 BFD_RELOC_IQ2000_UHI16
6440 BFD_RELOC_XTENSA_RTLD
6442 Special Xtensa relocation used only by PLT entries in ELF shared
6443 objects to indicate that the runtime linker should set the value
6444 to one of its own internal functions or data structures.
6446 BFD_RELOC_XTENSA_GLOB_DAT
6448 BFD_RELOC_XTENSA_JMP_SLOT
6450 BFD_RELOC_XTENSA_RELATIVE
6452 Xtensa relocations for ELF shared objects.
6454 BFD_RELOC_XTENSA_PLT
6456 Xtensa relocation used in ELF object files for symbols that may require
6457 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6459 BFD_RELOC_XTENSA_DIFF8
6461 BFD_RELOC_XTENSA_DIFF16
6463 BFD_RELOC_XTENSA_DIFF32
6465 Xtensa relocations to mark the difference of two local symbols.
6466 These are only needed to support linker relaxation and can be ignored
6467 when not relaxing. The field is set to the value of the difference
6468 assuming no relaxation. The relocation encodes the position of the
6469 first symbol so the linker can determine whether to adjust the field
6472 BFD_RELOC_XTENSA_SLOT0_OP
6474 BFD_RELOC_XTENSA_SLOT1_OP
6476 BFD_RELOC_XTENSA_SLOT2_OP
6478 BFD_RELOC_XTENSA_SLOT3_OP
6480 BFD_RELOC_XTENSA_SLOT4_OP
6482 BFD_RELOC_XTENSA_SLOT5_OP
6484 BFD_RELOC_XTENSA_SLOT6_OP
6486 BFD_RELOC_XTENSA_SLOT7_OP
6488 BFD_RELOC_XTENSA_SLOT8_OP
6490 BFD_RELOC_XTENSA_SLOT9_OP
6492 BFD_RELOC_XTENSA_SLOT10_OP
6494 BFD_RELOC_XTENSA_SLOT11_OP
6496 BFD_RELOC_XTENSA_SLOT12_OP
6498 BFD_RELOC_XTENSA_SLOT13_OP
6500 BFD_RELOC_XTENSA_SLOT14_OP
6502 Generic Xtensa relocations for instruction operands. Only the slot
6503 number is encoded in the relocation. The relocation applies to the
6504 last PC-relative immediate operand, or if there are no PC-relative
6505 immediates, to the last immediate operand.
6507 BFD_RELOC_XTENSA_SLOT0_ALT
6509 BFD_RELOC_XTENSA_SLOT1_ALT
6511 BFD_RELOC_XTENSA_SLOT2_ALT
6513 BFD_RELOC_XTENSA_SLOT3_ALT
6515 BFD_RELOC_XTENSA_SLOT4_ALT
6517 BFD_RELOC_XTENSA_SLOT5_ALT
6519 BFD_RELOC_XTENSA_SLOT6_ALT
6521 BFD_RELOC_XTENSA_SLOT7_ALT
6523 BFD_RELOC_XTENSA_SLOT8_ALT
6525 BFD_RELOC_XTENSA_SLOT9_ALT
6527 BFD_RELOC_XTENSA_SLOT10_ALT
6529 BFD_RELOC_XTENSA_SLOT11_ALT
6531 BFD_RELOC_XTENSA_SLOT12_ALT
6533 BFD_RELOC_XTENSA_SLOT13_ALT
6535 BFD_RELOC_XTENSA_SLOT14_ALT
6537 Alternate Xtensa relocations. Only the slot is encoded in the
6538 relocation. The meaning of these relocations is opcode-specific.
6540 BFD_RELOC_XTENSA_OP0
6542 BFD_RELOC_XTENSA_OP1
6544 BFD_RELOC_XTENSA_OP2
6546 Xtensa relocations for backward compatibility. These have all been
6547 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6549 BFD_RELOC_XTENSA_ASM_EXPAND
6551 Xtensa relocation to mark that the assembler expanded the
6552 instructions from an original target. The expansion size is
6553 encoded in the reloc size.
6555 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6557 Xtensa relocation to mark that the linker should simplify
6558 assembler-expanded instructions. This is commonly used
6559 internally by the linker after analysis of a
6560 BFD_RELOC_XTENSA_ASM_EXPAND.
6562 BFD_RELOC_XTENSA_TLSDESC_FN
6564 BFD_RELOC_XTENSA_TLSDESC_ARG
6566 BFD_RELOC_XTENSA_TLS_DTPOFF
6568 BFD_RELOC_XTENSA_TLS_TPOFF
6570 BFD_RELOC_XTENSA_TLS_FUNC
6572 BFD_RELOC_XTENSA_TLS_ARG
6574 BFD_RELOC_XTENSA_TLS_CALL
6576 Xtensa TLS relocations.
6581 8 bit signed offset in (ix+d) or (iy+d).
6599 BFD_RELOC_LM32_BRANCH
6601 BFD_RELOC_LM32_16_GOT
6603 BFD_RELOC_LM32_GOTOFF_HI16
6605 BFD_RELOC_LM32_GOTOFF_LO16
6609 BFD_RELOC_LM32_GLOB_DAT
6611 BFD_RELOC_LM32_JMP_SLOT
6613 BFD_RELOC_LM32_RELATIVE
6615 Lattice Mico32 relocations.
6618 BFD_RELOC_MACH_O_SECTDIFF
6620 Difference between two section addreses. Must be followed by a
6621 BFD_RELOC_MACH_O_PAIR.
6623 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6625 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6627 BFD_RELOC_MACH_O_PAIR
6629 Pair of relocation. Contains the first symbol.
6631 BFD_RELOC_MACH_O_SUBTRACTOR32
6633 Symbol will be substracted. Must be followed by a BFD_RELOC_32.
6635 BFD_RELOC_MACH_O_SUBTRACTOR64
6637 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6640 BFD_RELOC_MACH_O_X86_64_BRANCH32
6642 BFD_RELOC_MACH_O_X86_64_BRANCH8
6644 PCREL relocations. They are marked as branch to create PLT entry if
6647 BFD_RELOC_MACH_O_X86_64_GOT
6649 Used when referencing a GOT entry.
6651 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6653 Used when loading a GOT entry with movq. It is specially marked so that
6654 the linker could optimize the movq to a leaq if possible.
6656 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6658 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6660 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6662 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6664 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6666 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6668 BFD_RELOC_MACH_O_X86_64_TLV
6670 Used when referencing a TLV entry.
6674 BFD_RELOC_MACH_O_ARM64_ADDEND
6676 Addend for PAGE or PAGEOFF.
6678 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21
6680 Relative offset to page of GOT slot.
6682 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12
6684 Relative offset within page of GOT slot.
6686 BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT
6688 Address of a GOT entry.
6691 BFD_RELOC_MICROBLAZE_32_LO
6693 This is a 32 bit reloc for the microblaze that stores the
6694 low 16 bits of a value
6696 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6698 This is a 32 bit pc-relative reloc for the microblaze that
6699 stores the low 16 bits of a value
6701 BFD_RELOC_MICROBLAZE_32_ROSDA
6703 This is a 32 bit reloc for the microblaze that stores a
6704 value relative to the read-only small data area anchor
6706 BFD_RELOC_MICROBLAZE_32_RWSDA
6708 This is a 32 bit reloc for the microblaze that stores a
6709 value relative to the read-write small data area anchor
6711 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6713 This is a 32 bit reloc for the microblaze to handle
6714 expressions of the form "Symbol Op Symbol"
6716 BFD_RELOC_MICROBLAZE_64_NONE
6718 This is a 64 bit reloc that stores the 32 bit pc relative
6719 value in two words (with an imm instruction). No relocation is
6720 done here - only used for relaxing
6722 BFD_RELOC_MICROBLAZE_64_GOTPC
6724 This is a 64 bit reloc that stores the 32 bit pc relative
6725 value in two words (with an imm instruction). The relocation is
6726 PC-relative GOT offset
6728 BFD_RELOC_MICROBLAZE_64_GOT
6730 This is a 64 bit reloc that stores the 32 bit pc relative
6731 value in two words (with an imm instruction). The relocation is
6734 BFD_RELOC_MICROBLAZE_64_PLT
6736 This is a 64 bit reloc that stores the 32 bit pc relative
6737 value in two words (with an imm instruction). The relocation is
6738 PC-relative offset into PLT
6740 BFD_RELOC_MICROBLAZE_64_GOTOFF
6742 This is a 64 bit reloc that stores the 32 bit GOT relative
6743 value in two words (with an imm instruction). The relocation is
6744 relative offset from _GLOBAL_OFFSET_TABLE_
6746 BFD_RELOC_MICROBLAZE_32_GOTOFF
6748 This is a 32 bit reloc that stores the 32 bit GOT relative
6749 value in a word. The relocation is relative offset from
6750 _GLOBAL_OFFSET_TABLE_
6752 BFD_RELOC_MICROBLAZE_COPY
6754 This is used to tell the dynamic linker to copy the value out of
6755 the dynamic object into the runtime process image.
6757 BFD_RELOC_MICROBLAZE_64_TLS
6761 BFD_RELOC_MICROBLAZE_64_TLSGD
6763 This is a 64 bit reloc that stores the 32 bit GOT relative value
6764 of the GOT TLS GD info entry in two words (with an imm instruction). The
6765 relocation is GOT offset.
6767 BFD_RELOC_MICROBLAZE_64_TLSLD
6769 This is a 64 bit reloc that stores the 32 bit GOT relative value
6770 of the GOT TLS LD info entry in two words (with an imm instruction). The
6771 relocation is GOT offset.
6773 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6775 This is a 32 bit reloc that stores the Module ID to GOT(n).
6777 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6779 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6781 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6783 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6786 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6788 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6789 to two words (uses imm instruction).
6791 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6793 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6794 to two words (uses imm instruction).
6796 BFD_RELOC_MICROBLAZE_64_TEXTPCREL
6798 This is a 64 bit reloc that stores the 32 bit pc relative
6799 value in two words (with an imm instruction). The relocation is
6800 PC-relative offset from start of TEXT.
6802 BFD_RELOC_MICROBLAZE_64_TEXTREL
6804 This is a 64 bit reloc that stores the 32 bit offset
6805 value in two words (with an imm instruction). The relocation is
6806 relative offset from start of TEXT.
6809 BFD_RELOC_AARCH64_RELOC_START
6811 AArch64 pseudo relocation code to mark the start of the AArch64
6812 relocation enumerators. N.B. the order of the enumerators is
6813 important as several tables in the AArch64 bfd backend are indexed
6814 by these enumerators; make sure they are all synced.
6816 BFD_RELOC_AARCH64_NULL
6818 Deprecated AArch64 null relocation code.
6820 BFD_RELOC_AARCH64_NONE
6822 AArch64 null relocation code.
6824 BFD_RELOC_AARCH64_64
6826 BFD_RELOC_AARCH64_32
6828 BFD_RELOC_AARCH64_16
6830 Basic absolute relocations of N bits. These are equivalent to
6831 BFD_RELOC_N and they were added to assist the indexing of the howto
6834 BFD_RELOC_AARCH64_64_PCREL
6836 BFD_RELOC_AARCH64_32_PCREL
6838 BFD_RELOC_AARCH64_16_PCREL
6840 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
6841 and they were added to assist the indexing of the howto table.
6843 BFD_RELOC_AARCH64_MOVW_G0
6845 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
6846 of an unsigned address/value.
6848 BFD_RELOC_AARCH64_MOVW_G0_NC
6850 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
6851 an address/value. No overflow checking.
6853 BFD_RELOC_AARCH64_MOVW_G1
6855 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
6856 of an unsigned address/value.
6858 BFD_RELOC_AARCH64_MOVW_G1_NC
6860 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
6861 of an address/value. No overflow checking.
6863 BFD_RELOC_AARCH64_MOVW_G2
6865 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
6866 of an unsigned address/value.
6868 BFD_RELOC_AARCH64_MOVW_G2_NC
6870 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
6871 of an address/value. No overflow checking.
6873 BFD_RELOC_AARCH64_MOVW_G3
6875 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
6876 of a signed or unsigned address/value.
6878 BFD_RELOC_AARCH64_MOVW_G0_S
6880 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6881 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6884 BFD_RELOC_AARCH64_MOVW_G1_S
6886 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
6887 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6890 BFD_RELOC_AARCH64_MOVW_G2_S
6892 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
6893 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6896 BFD_RELOC_AARCH64_MOVW_PREL_G0
6898 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6899 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6902 BFD_RELOC_AARCH64_MOVW_PREL_G0_NC
6904 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6905 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6908 BFD_RELOC_AARCH64_MOVW_PREL_G1
6910 AArch64 MOVK instruction with most significant bits 16 to 31
6913 BFD_RELOC_AARCH64_MOVW_PREL_G1_NC
6915 AArch64 MOVK instruction with most significant bits 16 to 31
6918 BFD_RELOC_AARCH64_MOVW_PREL_G2
6920 AArch64 MOVK instruction with most significant bits 32 to 47
6923 BFD_RELOC_AARCH64_MOVW_PREL_G2_NC
6925 AArch64 MOVK instruction with most significant bits 32 to 47
6928 BFD_RELOC_AARCH64_MOVW_PREL_G3
6930 AArch64 MOVK instruction with most significant bits 47 to 63
6933 BFD_RELOC_AARCH64_LD_LO19_PCREL
6935 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
6936 offset. The lowest two bits must be zero and are not stored in the
6937 instruction, giving a 21 bit signed byte offset.
6939 BFD_RELOC_AARCH64_ADR_LO21_PCREL
6941 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
6943 BFD_RELOC_AARCH64_ADR_HI21_PCREL
6945 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6946 offset, giving a 4KB aligned page base address.
6948 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
6950 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6951 offset, giving a 4KB aligned page base address, but with no overflow
6954 BFD_RELOC_AARCH64_ADD_LO12
6956 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
6957 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6959 BFD_RELOC_AARCH64_LDST8_LO12
6961 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
6962 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6964 BFD_RELOC_AARCH64_TSTBR14
6966 AArch64 14 bit pc-relative test bit and branch.
6967 The lowest two bits must be zero and are not stored in the instruction,
6968 giving a 16 bit signed byte offset.
6970 BFD_RELOC_AARCH64_BRANCH19
6972 AArch64 19 bit pc-relative conditional branch and compare & branch.
6973 The lowest two bits must be zero and are not stored in the instruction,
6974 giving a 21 bit signed byte offset.
6976 BFD_RELOC_AARCH64_JUMP26
6978 AArch64 26 bit pc-relative unconditional branch.
6979 The lowest two bits must be zero and are not stored in the instruction,
6980 giving a 28 bit signed byte offset.
6982 BFD_RELOC_AARCH64_CALL26
6984 AArch64 26 bit pc-relative unconditional branch and link.
6985 The lowest two bits must be zero and are not stored in the instruction,
6986 giving a 28 bit signed byte offset.
6988 BFD_RELOC_AARCH64_LDST16_LO12
6990 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
6991 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6993 BFD_RELOC_AARCH64_LDST32_LO12
6995 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
6996 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6998 BFD_RELOC_AARCH64_LDST64_LO12
7000 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
7001 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7003 BFD_RELOC_AARCH64_LDST128_LO12
7005 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
7006 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7008 BFD_RELOC_AARCH64_GOT_LD_PREL19
7010 AArch64 Load Literal instruction, holding a 19 bit PC relative word
7011 offset of the global offset table entry for a symbol. The lowest two
7012 bits must be zero and are not stored in the instruction, giving a 21
7013 bit signed byte offset. This relocation type requires signed overflow
7016 BFD_RELOC_AARCH64_ADR_GOT_PAGE
7018 Get to the page base of the global offset table entry for a symbol as
7019 part of an ADRP instruction using a 21 bit PC relative value.Used in
7020 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
7022 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
7024 Unsigned 12 bit byte offset for 64 bit load/store from the page of
7025 the GOT entry for this symbol. Used in conjunction with
7026 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in LP64 ABI only.
7028 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
7030 Unsigned 12 bit byte offset for 32 bit load/store from the page of
7031 the GOT entry for this symbol. Used in conjunction with
7032 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in ILP32 ABI only.
7034 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
7036 Unsigned 16 bit byte offset for 64 bit load/store from the GOT entry
7037 for this symbol. Valid in LP64 ABI only.
7039 BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
7041 Unsigned 16 bit byte higher offset for 64 bit load/store from the GOT entry
7042 for this symbol. Valid in LP64 ABI only.
7044 BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
7046 Unsigned 15 bit byte offset for 64 bit load/store from the page of
7047 the GOT entry for this symbol. Valid in LP64 ABI only.
7049 BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
7051 Scaled 14 bit byte offset to the page base of the global offset table.
7053 BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
7055 Scaled 15 bit byte offset to the page base of the global offset table.
7057 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
7059 Get to the page base of the global offset table entry for a symbols
7060 tls_index structure as part of an adrp instruction using a 21 bit PC
7061 relative value. Used in conjunction with
7062 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
7064 BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
7066 AArch64 TLS General Dynamic
7068 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
7070 Unsigned 12 bit byte offset to global offset table entry for a symbols
7071 tls_index structure. Used in conjunction with
7072 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
7074 BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
7076 AArch64 TLS General Dynamic relocation.
7078 BFD_RELOC_AARCH64_TLSGD_MOVW_G1
7080 AArch64 TLS General Dynamic relocation.
7082 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
7084 AArch64 TLS INITIAL EXEC relocation.
7086 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
7088 AArch64 TLS INITIAL EXEC relocation.
7090 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
7092 AArch64 TLS INITIAL EXEC relocation.
7094 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
7096 AArch64 TLS INITIAL EXEC relocation.
7098 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
7100 AArch64 TLS INITIAL EXEC relocation.
7102 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
7104 AArch64 TLS INITIAL EXEC relocation.
7106 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
7108 bit[23:12] of byte offset to module TLS base address.
7110 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
7112 Unsigned 12 bit byte offset to module TLS base address.
7114 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
7116 No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
7118 BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
7120 Unsigned 12 bit byte offset to global offset table entry for a symbols
7121 tls_index structure. Used in conjunction with
7122 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
7124 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
7126 GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
7129 BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
7131 GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
7133 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
7135 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7138 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
7140 Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
7142 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
7144 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7147 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
7149 Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
7151 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
7153 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7156 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
7158 Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
7160 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
7162 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7165 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
7167 Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
7169 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7171 bit[15:0] of byte offset to module TLS base address.
7173 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
7175 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7177 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7179 bit[31:16] of byte offset to module TLS base address.
7181 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
7183 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7185 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
7187 bit[47:32] of byte offset to module TLS base address.
7189 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
7191 AArch64 TLS LOCAL EXEC relocation.
7193 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
7195 AArch64 TLS LOCAL EXEC relocation.
7197 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
7199 AArch64 TLS LOCAL EXEC relocation.
7201 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
7203 AArch64 TLS LOCAL EXEC relocation.
7205 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
7207 AArch64 TLS LOCAL EXEC relocation.
7209 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
7211 AArch64 TLS LOCAL EXEC relocation.
7213 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
7215 AArch64 TLS LOCAL EXEC relocation.
7217 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
7219 AArch64 TLS LOCAL EXEC relocation.
7221 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
7223 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7226 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
7228 Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.
7230 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
7232 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7235 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
7237 Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.
7239 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
7241 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7244 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
7246 Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.
7248 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
7250 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7253 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
7255 Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.
7257 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
7259 AArch64 TLS DESC relocation.
7261 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
7263 AArch64 TLS DESC relocation.
7265 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
7267 AArch64 TLS DESC relocation.
7269 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
7271 AArch64 TLS DESC relocation.
7273 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
7275 AArch64 TLS DESC relocation.
7277 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
7279 AArch64 TLS DESC relocation.
7281 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
7283 AArch64 TLS DESC relocation.
7285 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
7287 AArch64 TLS DESC relocation.
7289 BFD_RELOC_AARCH64_TLSDESC_LDR
7291 AArch64 TLS DESC relocation.
7293 BFD_RELOC_AARCH64_TLSDESC_ADD
7295 AArch64 TLS DESC relocation.
7297 BFD_RELOC_AARCH64_TLSDESC_CALL
7299 AArch64 TLS DESC relocation.
7301 BFD_RELOC_AARCH64_COPY
7303 AArch64 TLS relocation.
7305 BFD_RELOC_AARCH64_GLOB_DAT
7307 AArch64 TLS relocation.
7309 BFD_RELOC_AARCH64_JUMP_SLOT
7311 AArch64 TLS relocation.
7313 BFD_RELOC_AARCH64_RELATIVE
7315 AArch64 TLS relocation.
7317 BFD_RELOC_AARCH64_TLS_DTPMOD
7319 AArch64 TLS relocation.
7321 BFD_RELOC_AARCH64_TLS_DTPREL
7323 AArch64 TLS relocation.
7325 BFD_RELOC_AARCH64_TLS_TPREL
7327 AArch64 TLS relocation.
7329 BFD_RELOC_AARCH64_TLSDESC
7331 AArch64 TLS relocation.
7333 BFD_RELOC_AARCH64_IRELATIVE
7335 AArch64 support for STT_GNU_IFUNC.
7337 BFD_RELOC_AARCH64_RELOC_END
7339 AArch64 pseudo relocation code to mark the end of the AArch64
7340 relocation enumerators that have direct mapping to ELF reloc codes.
7341 There are a few more enumerators after this one; those are mainly
7342 used by the AArch64 assembler for the internal fixup or to select
7343 one of the above enumerators.
7345 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
7347 AArch64 pseudo relocation code to be used internally by the AArch64
7348 assembler and not (currently) written to any object files.
7350 BFD_RELOC_AARCH64_LDST_LO12
7352 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
7353 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7355 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
7357 AArch64 pseudo relocation code for TLS local dynamic mode. It's to be
7358 used internally by the AArch64 assembler and not (currently) written to
7361 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
7363 Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
7365 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
7367 AArch64 pseudo relocation code for TLS local exec mode. It's to be
7368 used internally by the AArch64 assembler and not (currently) written to
7371 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC
7373 Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.
7375 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
7377 AArch64 pseudo relocation code to be used internally by the AArch64
7378 assembler and not (currently) written to any object files.
7380 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
7382 AArch64 pseudo relocation code to be used internally by the AArch64
7383 assembler and not (currently) written to any object files.
7385 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
7387 AArch64 pseudo relocation code to be used internally by the AArch64
7388 assembler and not (currently) written to any object files.
7390 BFD_RELOC_TILEPRO_COPY
7392 BFD_RELOC_TILEPRO_GLOB_DAT
7394 BFD_RELOC_TILEPRO_JMP_SLOT
7396 BFD_RELOC_TILEPRO_RELATIVE
7398 BFD_RELOC_TILEPRO_BROFF_X1
7400 BFD_RELOC_TILEPRO_JOFFLONG_X1
7402 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
7404 BFD_RELOC_TILEPRO_IMM8_X0
7406 BFD_RELOC_TILEPRO_IMM8_Y0
7408 BFD_RELOC_TILEPRO_IMM8_X1
7410 BFD_RELOC_TILEPRO_IMM8_Y1
7412 BFD_RELOC_TILEPRO_DEST_IMM8_X1
7414 BFD_RELOC_TILEPRO_MT_IMM15_X1
7416 BFD_RELOC_TILEPRO_MF_IMM15_X1
7418 BFD_RELOC_TILEPRO_IMM16_X0
7420 BFD_RELOC_TILEPRO_IMM16_X1
7422 BFD_RELOC_TILEPRO_IMM16_X0_LO
7424 BFD_RELOC_TILEPRO_IMM16_X1_LO
7426 BFD_RELOC_TILEPRO_IMM16_X0_HI
7428 BFD_RELOC_TILEPRO_IMM16_X1_HI
7430 BFD_RELOC_TILEPRO_IMM16_X0_HA
7432 BFD_RELOC_TILEPRO_IMM16_X1_HA
7434 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
7436 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
7438 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
7440 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
7442 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
7444 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
7446 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
7448 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
7450 BFD_RELOC_TILEPRO_IMM16_X0_GOT
7452 BFD_RELOC_TILEPRO_IMM16_X1_GOT
7454 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
7456 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
7458 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
7460 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
7462 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
7464 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
7466 BFD_RELOC_TILEPRO_MMSTART_X0
7468 BFD_RELOC_TILEPRO_MMEND_X0
7470 BFD_RELOC_TILEPRO_MMSTART_X1
7472 BFD_RELOC_TILEPRO_MMEND_X1
7474 BFD_RELOC_TILEPRO_SHAMT_X0
7476 BFD_RELOC_TILEPRO_SHAMT_X1
7478 BFD_RELOC_TILEPRO_SHAMT_Y0
7480 BFD_RELOC_TILEPRO_SHAMT_Y1
7482 BFD_RELOC_TILEPRO_TLS_GD_CALL
7484 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
7486 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
7488 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
7490 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
7492 BFD_RELOC_TILEPRO_TLS_IE_LOAD
7494 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
7496 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
7498 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
7500 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
7502 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
7504 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
7506 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
7508 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
7510 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
7512 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
7514 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
7516 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
7518 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
7520 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
7522 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
7524 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
7526 BFD_RELOC_TILEPRO_TLS_DTPMOD32
7528 BFD_RELOC_TILEPRO_TLS_DTPOFF32
7530 BFD_RELOC_TILEPRO_TLS_TPOFF32
7532 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
7534 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
7536 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
7538 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
7540 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
7542 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
7544 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
7546 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
7548 Tilera TILEPro Relocations.
7550 BFD_RELOC_TILEGX_HW0
7552 BFD_RELOC_TILEGX_HW1
7554 BFD_RELOC_TILEGX_HW2
7556 BFD_RELOC_TILEGX_HW3
7558 BFD_RELOC_TILEGX_HW0_LAST
7560 BFD_RELOC_TILEGX_HW1_LAST
7562 BFD_RELOC_TILEGX_HW2_LAST
7564 BFD_RELOC_TILEGX_COPY
7566 BFD_RELOC_TILEGX_GLOB_DAT
7568 BFD_RELOC_TILEGX_JMP_SLOT
7570 BFD_RELOC_TILEGX_RELATIVE
7572 BFD_RELOC_TILEGX_BROFF_X1
7574 BFD_RELOC_TILEGX_JUMPOFF_X1
7576 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
7578 BFD_RELOC_TILEGX_IMM8_X0
7580 BFD_RELOC_TILEGX_IMM8_Y0
7582 BFD_RELOC_TILEGX_IMM8_X1
7584 BFD_RELOC_TILEGX_IMM8_Y1
7586 BFD_RELOC_TILEGX_DEST_IMM8_X1
7588 BFD_RELOC_TILEGX_MT_IMM14_X1
7590 BFD_RELOC_TILEGX_MF_IMM14_X1
7592 BFD_RELOC_TILEGX_MMSTART_X0
7594 BFD_RELOC_TILEGX_MMEND_X0
7596 BFD_RELOC_TILEGX_SHAMT_X0
7598 BFD_RELOC_TILEGX_SHAMT_X1
7600 BFD_RELOC_TILEGX_SHAMT_Y0
7602 BFD_RELOC_TILEGX_SHAMT_Y1
7604 BFD_RELOC_TILEGX_IMM16_X0_HW0
7606 BFD_RELOC_TILEGX_IMM16_X1_HW0
7608 BFD_RELOC_TILEGX_IMM16_X0_HW1
7610 BFD_RELOC_TILEGX_IMM16_X1_HW1
7612 BFD_RELOC_TILEGX_IMM16_X0_HW2
7614 BFD_RELOC_TILEGX_IMM16_X1_HW2
7616 BFD_RELOC_TILEGX_IMM16_X0_HW3
7618 BFD_RELOC_TILEGX_IMM16_X1_HW3
7620 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7622 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7624 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7626 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7628 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7630 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7632 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7634 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7636 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7638 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7640 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7642 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7644 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7646 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7648 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7650 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7652 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7654 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7656 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7658 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7660 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7662 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7664 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7666 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7668 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7670 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7672 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7674 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7676 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7678 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7680 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7682 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7684 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7686 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7688 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7690 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7692 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7694 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7696 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7698 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7700 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7702 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7704 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7706 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7708 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7710 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7712 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7714 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7716 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7718 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7720 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7722 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7724 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7726 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7728 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7730 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7732 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7734 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7736 BFD_RELOC_TILEGX_TLS_DTPMOD64
7738 BFD_RELOC_TILEGX_TLS_DTPOFF64
7740 BFD_RELOC_TILEGX_TLS_TPOFF64
7742 BFD_RELOC_TILEGX_TLS_DTPMOD32
7744 BFD_RELOC_TILEGX_TLS_DTPOFF32
7746 BFD_RELOC_TILEGX_TLS_TPOFF32
7748 BFD_RELOC_TILEGX_TLS_GD_CALL
7750 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7752 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7754 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7756 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7758 BFD_RELOC_TILEGX_TLS_IE_LOAD
7760 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7762 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7764 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7766 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7768 Tilera TILE-Gx Relocations.
7771 BFD_RELOC_EPIPHANY_SIMM8
7773 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7775 BFD_RELOC_EPIPHANY_SIMM24
7777 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7779 BFD_RELOC_EPIPHANY_HIGH
7781 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7783 BFD_RELOC_EPIPHANY_LOW
7785 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7787 BFD_RELOC_EPIPHANY_SIMM11
7789 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7791 BFD_RELOC_EPIPHANY_IMM11
7793 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7795 BFD_RELOC_EPIPHANY_IMM8
7797 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7800 BFD_RELOC_VISIUM_HI16
7802 BFD_RELOC_VISIUM_LO16
7804 BFD_RELOC_VISIUM_IM16
7806 BFD_RELOC_VISIUM_REL16
7808 BFD_RELOC_VISIUM_HI16_PCREL
7810 BFD_RELOC_VISIUM_LO16_PCREL
7812 BFD_RELOC_VISIUM_IM16_PCREL
7817 BFD_RELOC_WASM32_LEB128
7819 BFD_RELOC_WASM32_LEB128_GOT
7821 BFD_RELOC_WASM32_LEB128_GOT_CODE
7823 BFD_RELOC_WASM32_LEB128_PLT
7825 BFD_RELOC_WASM32_PLT_INDEX
7827 BFD_RELOC_WASM32_ABS32_CODE
7829 BFD_RELOC_WASM32_COPY
7831 BFD_RELOC_WASM32_CODE_POINTER
7833 BFD_RELOC_WASM32_INDEX
7835 BFD_RELOC_WASM32_PLT_SIG
7837 WebAssembly relocations.
7840 BFD_RELOC_CKCORE_NONE
7842 BFD_RELOC_CKCORE_ADDR32
7844 BFD_RELOC_CKCORE_PCREL_IMM8BY4
7846 BFD_RELOC_CKCORE_PCREL_IMM11BY2
7848 BFD_RELOC_CKCORE_PCREL_IMM4BY2
7850 BFD_RELOC_CKCORE_PCREL32
7852 BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2
7854 BFD_RELOC_CKCORE_GNU_VTINHERIT
7856 BFD_RELOC_CKCORE_GNU_VTENTRY
7858 BFD_RELOC_CKCORE_RELATIVE
7860 BFD_RELOC_CKCORE_COPY
7862 BFD_RELOC_CKCORE_GLOB_DAT
7864 BFD_RELOC_CKCORE_JUMP_SLOT
7866 BFD_RELOC_CKCORE_GOTOFF
7868 BFD_RELOC_CKCORE_GOTPC
7870 BFD_RELOC_CKCORE_GOT32
7872 BFD_RELOC_CKCORE_PLT32
7874 BFD_RELOC_CKCORE_ADDRGOT
7876 BFD_RELOC_CKCORE_ADDRPLT
7878 BFD_RELOC_CKCORE_PCREL_IMM26BY2
7880 BFD_RELOC_CKCORE_PCREL_IMM16BY2
7882 BFD_RELOC_CKCORE_PCREL_IMM16BY4
7884 BFD_RELOC_CKCORE_PCREL_IMM10BY2
7886 BFD_RELOC_CKCORE_PCREL_IMM10BY4
7888 BFD_RELOC_CKCORE_ADDR_HI16
7890 BFD_RELOC_CKCORE_ADDR_LO16
7892 BFD_RELOC_CKCORE_GOTPC_HI16
7894 BFD_RELOC_CKCORE_GOTPC_LO16
7896 BFD_RELOC_CKCORE_GOTOFF_HI16
7898 BFD_RELOC_CKCORE_GOTOFF_LO16
7900 BFD_RELOC_CKCORE_GOT12
7902 BFD_RELOC_CKCORE_GOT_HI16
7904 BFD_RELOC_CKCORE_GOT_LO16
7906 BFD_RELOC_CKCORE_PLT12
7908 BFD_RELOC_CKCORE_PLT_HI16
7910 BFD_RELOC_CKCORE_PLT_LO16
7912 BFD_RELOC_CKCORE_ADDRGOT_HI16
7914 BFD_RELOC_CKCORE_ADDRGOT_LO16
7916 BFD_RELOC_CKCORE_ADDRPLT_HI16
7918 BFD_RELOC_CKCORE_ADDRPLT_LO16
7920 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2
7922 BFD_RELOC_CKCORE_TOFFSET_LO16
7924 BFD_RELOC_CKCORE_DOFFSET_LO16
7926 BFD_RELOC_CKCORE_PCREL_IMM18BY2
7928 BFD_RELOC_CKCORE_DOFFSET_IMM18
7930 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
7932 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
7934 BFD_RELOC_CKCORE_GOTOFF_IMM18
7936 BFD_RELOC_CKCORE_GOT_IMM18BY4
7938 BFD_RELOC_CKCORE_PLT_IMM18BY4
7940 BFD_RELOC_CKCORE_PCREL_IMM7BY4
7942 BFD_RELOC_CKCORE_TLS_LE32
7944 BFD_RELOC_CKCORE_TLS_IE32
7946 BFD_RELOC_CKCORE_TLS_GD32
7948 BFD_RELOC_CKCORE_TLS_LDM32
7950 BFD_RELOC_CKCORE_TLS_LDO32
7952 BFD_RELOC_CKCORE_TLS_DTPMOD32
7954 BFD_RELOC_CKCORE_TLS_DTPOFF32
7956 BFD_RELOC_CKCORE_TLS_TPOFF32
7958 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
7960 BFD_RELOC_CKCORE_NOJSRI
7962 BFD_RELOC_CKCORE_CALLGRAPH
7964 BFD_RELOC_CKCORE_IRELATIVE
7966 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4
7968 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4
7976 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
7981 bfd_reloc_type_lookup
7982 bfd_reloc_name_lookup
7985 reloc_howto_type *bfd_reloc_type_lookup
7986 (bfd *abfd, bfd_reloc_code_real_type code);
7987 reloc_howto_type *bfd_reloc_name_lookup
7988 (bfd *abfd, const char *reloc_name);
7991 Return a pointer to a howto structure which, when
7992 invoked, will perform the relocation @var{code} on data from the
7998 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8000 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
8004 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
8006 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
8009 static reloc_howto_type bfd_howto_32
=
8010 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
8014 bfd_default_reloc_type_lookup
8017 reloc_howto_type *bfd_default_reloc_type_lookup
8018 (bfd *abfd, bfd_reloc_code_real_type code);
8021 Provides a default relocation lookup routine for any architecture.
8026 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8030 case BFD_RELOC_CTOR
:
8031 /* The type of reloc used in a ctor, which will be as wide as the
8032 address - so either a 64, 32, or 16 bitter. */
8033 switch (bfd_arch_bits_per_address (abfd
))
8039 return &bfd_howto_32
;
8055 bfd_get_reloc_code_name
8058 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
8061 Provides a printable name for the supplied relocation code.
8062 Useful mainly for printing error messages.
8066 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
8068 if (code
> BFD_RELOC_UNUSED
)
8070 return bfd_reloc_code_real_names
[code
];
8075 bfd_generic_relax_section
8078 bfd_boolean bfd_generic_relax_section
8081 struct bfd_link_info *,
8085 Provides default handling for relaxing for back ends which
8090 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
8091 asection
*section ATTRIBUTE_UNUSED
,
8092 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
8095 if (bfd_link_relocatable (link_info
))
8096 (*link_info
->callbacks
->einfo
)
8097 (_("%P%F: --relax and -r may not be used together\n"));
8105 bfd_generic_gc_sections
8108 bfd_boolean bfd_generic_gc_sections
8109 (bfd *, struct bfd_link_info *);
8112 Provides default handling for relaxing for back ends which
8113 don't do section gc -- i.e., does nothing.
8117 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8118 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
8125 bfd_generic_lookup_section_flags
8128 bfd_boolean bfd_generic_lookup_section_flags
8129 (struct bfd_link_info *, struct flag_info *, asection *);
8132 Provides default handling for section flags lookup
8133 -- i.e., does nothing.
8134 Returns FALSE if the section should be omitted, otherwise TRUE.
8138 bfd_generic_lookup_section_flags (struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
8139 struct flag_info
*flaginfo
,
8140 asection
*section ATTRIBUTE_UNUSED
)
8142 if (flaginfo
!= NULL
)
8144 _bfd_error_handler (_("INPUT_SECTION_FLAGS are not supported"));
8152 bfd_generic_merge_sections
8155 bfd_boolean bfd_generic_merge_sections
8156 (bfd *, struct bfd_link_info *);
8159 Provides default handling for SEC_MERGE section merging for back ends
8160 which don't have SEC_MERGE support -- i.e., does nothing.
8164 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8165 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
8172 bfd_generic_get_relocated_section_contents
8175 bfd_byte *bfd_generic_get_relocated_section_contents
8177 struct bfd_link_info *link_info,
8178 struct bfd_link_order *link_order,
8180 bfd_boolean relocatable,
8184 Provides default handling of relocation effort for back ends
8185 which can't be bothered to do it efficiently.
8190 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
8191 struct bfd_link_info
*link_info
,
8192 struct bfd_link_order
*link_order
,
8194 bfd_boolean relocatable
,
8197 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
8198 asection
*input_section
= link_order
->u
.indirect
.section
;
8200 arelent
**reloc_vector
;
8203 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
8207 /* Read in the section. */
8208 if (!bfd_get_full_section_contents (input_bfd
, input_section
, &data
))
8214 if (reloc_size
== 0)
8217 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
8218 if (reloc_vector
== NULL
)
8221 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
8225 if (reloc_count
< 0)
8228 if (reloc_count
> 0)
8232 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
8234 char *error_message
= NULL
;
8236 bfd_reloc_status_type r
;
8238 symbol
= *(*parent
)->sym_ptr_ptr
;
8239 /* PR ld/19628: A specially crafted input file
8240 can result in a NULL symbol pointer here. */
8243 link_info
->callbacks
->einfo
8244 /* xgettext:c-format */
8245 (_("%X%P: %pB(%pA): error: relocation for offset %V has no value\n"),
8246 abfd
, input_section
, (* parent
)->address
);
8250 if (symbol
->section
&& discarded_section (symbol
->section
))
8253 static reloc_howto_type none_howto
8254 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
8255 "unused", FALSE
, 0, 0, FALSE
);
8257 p
= data
+ (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
8258 _bfd_clear_contents ((*parent
)->howto
, input_bfd
, input_section
,
8260 (*parent
)->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
8261 (*parent
)->addend
= 0;
8262 (*parent
)->howto
= &none_howto
;
8266 r
= bfd_perform_relocation (input_bfd
,
8270 relocatable
? abfd
: NULL
,
8275 asection
*os
= input_section
->output_section
;
8277 /* A partial link, so keep the relocs. */
8278 os
->orelocation
[os
->reloc_count
] = *parent
;
8282 if (r
!= bfd_reloc_ok
)
8286 case bfd_reloc_undefined
:
8287 (*link_info
->callbacks
->undefined_symbol
)
8288 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8289 input_bfd
, input_section
, (*parent
)->address
, TRUE
);
8291 case bfd_reloc_dangerous
:
8292 BFD_ASSERT (error_message
!= NULL
);
8293 (*link_info
->callbacks
->reloc_dangerous
)
8294 (link_info
, error_message
,
8295 input_bfd
, input_section
, (*parent
)->address
);
8297 case bfd_reloc_overflow
:
8298 (*link_info
->callbacks
->reloc_overflow
)
8300 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8301 (*parent
)->howto
->name
, (*parent
)->addend
,
8302 input_bfd
, input_section
, (*parent
)->address
);
8304 case bfd_reloc_outofrange
:
8306 This error can result when processing some partially
8307 complete binaries. Do not abort, but issue an error
8309 link_info
->callbacks
->einfo
8310 /* xgettext:c-format */
8311 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
8312 abfd
, input_section
, * parent
);
8315 case bfd_reloc_notsupported
:
8317 This error can result when processing a corrupt binary.
8318 Do not abort. Issue an error message instead. */
8319 link_info
->callbacks
->einfo
8320 /* xgettext:c-format */
8321 (_("%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"),
8322 abfd
, input_section
, * parent
);
8326 /* PR 17512; file: 90c2a92e.
8327 Report unexpected results, without aborting. */
8328 link_info
->callbacks
->einfo
8329 /* xgettext:c-format */
8330 (_("%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"),
8331 abfd
, input_section
, * parent
, r
);
8339 free (reloc_vector
);
8343 free (reloc_vector
);
8349 _bfd_generic_set_reloc
8352 void _bfd_generic_set_reloc
8356 unsigned int count);
8359 Installs a new set of internal relocations in SECTION.
8363 _bfd_generic_set_reloc (bfd
*abfd ATTRIBUTE_UNUSED
,
8368 section
->orelocation
= relptr
;
8369 section
->reloc_count
= count
;
8374 _bfd_unrecognized_reloc
8377 bfd_boolean _bfd_unrecognized_reloc
8380 unsigned int r_type);
8383 Reports an unrecognized reloc.
8384 Written as a function in order to reduce code duplication.
8385 Returns FALSE so that it can be called from a return statement.
8389 _bfd_unrecognized_reloc (bfd
* abfd
, sec_ptr section
, unsigned int r_type
)
8391 /* xgettext:c-format */
8392 _bfd_error_handler (_("%pB: unrecognized relocation type %#x in section `%pA'"),
8393 abfd
, r_type
, section
);
8395 /* PR 21803: Suggest the most likely cause of this error. */
8396 _bfd_error_handler (_("is this version of the linker - %s - out of date ?"),
8397 BFD_VERSION_STRING
);
8399 bfd_set_error (bfd_error_bad_value
);
8404 _bfd_norelocs_bfd_reloc_type_lookup
8406 bfd_reloc_code_real_type code ATTRIBUTE_UNUSED
)
8408 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8412 _bfd_norelocs_bfd_reloc_name_lookup (bfd
*abfd
,
8413 const char *reloc_name ATTRIBUTE_UNUSED
)
8415 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8419 _bfd_nodynamic_canonicalize_dynamic_reloc (bfd
*abfd
,
8420 arelent
**relp ATTRIBUTE_UNUSED
,
8421 asymbol
**symp ATTRIBUTE_UNUSED
)
8423 return _bfd_long_bfd_n1_error (abfd
);