1 /* Print m68k instructions for objdump
2 Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
5 This file is part of the binutils.
7 The binutils are free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 1, or (at your option)
12 The binutils are distributed in the hope that they will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with the binutils; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 Revision 1.1.1.1 1991/03/21 21:26:46 gumby
24 Back from Intel with Steve
26 * Revision 1.1 1991/03/21 21:26:45 gumby
29 * Revision 1.1 1991/03/13 00:34:06 chrisb
32 * Revision 1.4 1991/03/09 04:36:34 rich
34 * sparc-pinsn.c ostrip.c objdump.c m68k-pinsn.c i960-pinsn.c
37 * Pulled sysdep.h out of bfd.h.
39 * Revision 1.3 1991/03/08 21:54:45 rich
41 * Makefile ar.c binutils.h bucomm.c copy.c cplus-dem.c getopt.c
42 * i960-pinsn.c m68k-pinsn.c nm.c objdump.c sparc-opcode.h
43 * sparc-pinsn.c strip.c
45 * Verifying Portland tree with steve's last changes. Also, some partial
48 * Revision 1.2 1991/03/08 07:46:24 sac
49 * Added -l option to disassembly - prints line numbers too.
51 * Revision 1.1 1991/02/22 16:48:02 sac
59 #include "m68k-opcode.h"
62 extern void print_address();
64 /* 68k instructions are never longer than this many bytes. */
67 /* Number of elements in the opcode table. */
68 #define NOPCODES (sizeof m68k_opcodes / sizeof m68k_opcodes[0])
70 extern char *reg_names
[];
71 char *fpcr_names
[] = { "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
72 "fpiar/fpcr", "fpsr/fpcr", "fpiar-fpcr"};
74 char *reg_names
[] = {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
75 static unsigned char *print_insn_arg ();
76 static unsigned char *print_indexed ();
77 static void print_base ();
78 static int fetch_arg ();
80 #define NEXTBYTE(p) (p += 2, ((char *)p)[-1])
83 (p += 2, ((((char *)p)[-2]) << 8) + p[-1])
86 (p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
88 #define NEXTSINGLE(p) \
89 (p += 4, *((float *)(p - 4)))
91 #define NEXTDOUBLE(p) \
92 (p += 8, *((double *)(p - 8)))
94 #define NEXTEXTEND(p) \
95 (p += 12, 0.0) /* Need a function to convert from extended to double
98 #define NEXTPACKED(p) \
99 (p += 12, 0.0) /* Need a function to convert from packed to double
100 precision. Actually, it's easier to print a
101 packed number than a double anyway, so maybe
102 there should be a special case to handle this... */
104 /* Print the m68k instruction at address MEMADDR in debugged memory,
105 on STREAM. Returns length of the instruction, in bytes. */
108 print_insn_m68k(addr
, buffer
, stream
)
110 unsigned char *buffer
;
113 register unsigned int i
;
114 register unsigned char *p
;
116 register unsigned int bestmask
;
123 for (i
= 0; i
< NOPCODES
; i
++)
125 register unsigned int opcode
= m68k_opcodes
[i
].opcode
;
126 register unsigned int match
= m68k_opcodes
[i
].match
;
127 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
128 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
129 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
130 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
132 /* Don't use for printout the variants of divul and divsl
133 that have the same register number in two places.
134 The more general variants will match instead. */
135 for (d
= m68k_opcodes
[i
].args
; *d
; d
+= 2)
139 /* Don't use for printout the variants of most floating
140 point coprocessor instructions which use the same
141 register number in two places, as above. */
143 for (d
= m68k_opcodes
[i
].args
; *d
; d
+= 2)
147 if (*d
== 0 && match
> bestmask
)
155 /* Handle undefined instructions. */
158 fprintf (stream
, "0%o", (unsigned) (buffer
[0] << 8) + buffer
[1]);
162 fprintf (stream
, "%s", m68k_opcodes
[best
].name
);
164 /* Point at first word of argument data,
165 and at descriptor for first argument. */
168 /* Why do this this way? -MelloN */
169 for (d
= m68k_opcodes
[best
].args
; *d
; d
+= 2)
173 if (d
[1] == 'l' && p
- buffer
< 6)
175 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8' )
178 if (d
[1] >= '1' && d
[1] <= '3' && p
- buffer
< 4)
180 if (d
[1] >= '4' && d
[1] <= '6' && p
- buffer
< 6)
182 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
186 d
= m68k_opcodes
[best
].args
;
193 p
= print_insn_arg (d
, buffer
, p
, addr
+ p
- buffer
, stream
);
195 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
201 static unsigned char *
202 print_insn_arg (d
, buffer
, p
, addr
, stream
)
204 unsigned char *buffer
;
205 register unsigned char *p
;
206 bfd_vma addr
; /* PC for this arg to be relative to */
210 register int place
= d
[1];
212 register char *regname
;
213 register unsigned char *p1
;
214 register double flval
;
220 fprintf (stream
, "ccr");
224 fprintf (stream
, "sr");
228 fprintf (stream
, "usp");
233 static struct { char *name
; int value
; } names
[]
234 = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
235 {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
236 {"msp", 0x803}, {"isp", 0x804}};
238 val
= fetch_arg (buffer
, place
, 12);
239 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
240 if (names
[regno
].value
== val
)
242 fprintf (stream
, names
[regno
].name
);
246 fprintf (stream
, "%d", val
);
251 val
= fetch_arg (buffer
, place
, 3);
252 if (val
== 0) val
= 8;
253 fprintf (stream
, "#%d", val
);
257 val
= fetch_arg (buffer
, place
, 8);
260 fprintf (stream
, "#%d", val
);
264 val
= fetch_arg (buffer
, place
, 4);
265 fprintf (stream
, "#%d", val
);
269 fprintf (stream
, "%s", reg_names
[fetch_arg (buffer
, place
, 3)]);
273 fprintf (stream
, "%s",
274 reg_names
[fetch_arg (buffer
, place
, 3) + 010]);
278 fprintf (stream
, "%s", reg_names
[fetch_arg (buffer
, place
, 4)]);
282 fprintf (stream
, "fp%d", fetch_arg (buffer
, place
, 3));
286 val
= fetch_arg (buffer
, place
, 6);
288 fprintf (stream
, "%s", reg_names
[val
& 7]);
290 fprintf (stream
, "%d", val
);
294 fprintf (stream
, "%s@+",
295 reg_names
[fetch_arg (buffer
, place
, 3) + 8]);
299 fprintf (stream
, "%s@-",
300 reg_names
[fetch_arg (buffer
, place
, 3) + 8]);
305 fprintf (stream
, "{%s}", reg_names
[fetch_arg (buffer
, place
, 3)]);
306 else if (place
== 'C')
308 val
= fetch_arg (buffer
, place
, 7);
309 if ( val
> 63 ) /* This is a signed constant. */
311 fprintf (stream
, "{#%d}", val
);
314 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
320 p1
= buffer
+ (*d
== '#' ? 2 : 4);
322 val
= fetch_arg (buffer
, place
, 4);
323 else if (place
== 'C')
324 val
= fetch_arg (buffer
, place
, 7);
325 else if (place
== '8')
326 val
= fetch_arg (buffer
, place
, 3);
327 else if (place
== '3')
328 val
= fetch_arg (buffer
, place
, 8);
329 else if (place
== 'b')
331 else if (place
== 'w')
333 else if (place
== 'l')
336 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
338 fprintf (stream
, "#%d", val
);
344 else if (place
== 'w')
346 else if (place
== 'l')
348 else if (place
== 'g')
350 val
= ((char *)buffer
)[1];
356 else if (place
== 'c')
358 if (buffer
[1] & 0x40) /* If bit six is one, long offset */
364 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
366 print_address (addr
+ val
, stream
);
371 fprintf (stream
, "%s@(%d)",
372 reg_names
[fetch_arg (buffer
, place
, 3)], val
);
376 fprintf (stream
, "%s",
377 fpcr_names
[fetch_arg (buffer
, place
, 3)]);
381 val
= fetch_arg (buffer
, 'd', 3); /* Get coprocessor ID... */
382 if (val
!= 1) /* Unusual coprocessor ID? */
383 fprintf (stream
, "(cpid=%d) ", val
);
385 p
+= 2; /* Skip coprocessor extended operands */
401 val
= fetch_arg (buffer
, 'x', 6);
402 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
405 val
= fetch_arg (buffer
, 's', 6);
407 /* Get register number assuming address register. */
408 regno
= (val
& 7) + 8;
409 regname
= reg_names
[regno
];
413 fprintf (stream
, "%s", reg_names
[val
]);
417 fprintf (stream
, "%s", regname
);
421 fprintf (stream
, "%s@", regname
);
425 fprintf (stream
, "%s@+", regname
);
429 fprintf (stream
, "%s@-", regname
);
434 fprintf (stream
, "%s@(%d)", regname
, val
);
438 p
= print_indexed (regno
, p
, addr
, stream
);
446 fprintf (stream
, "@#");
447 print_address (val
, stream
);
452 fprintf (stream
, "@#");
453 print_address (val
, stream
);
458 print_address (addr
+ val
, stream
);
462 p
= print_indexed (-1, p
, addr
, stream
);
466 flt_p
= 1; /* Assume it's a float... */
485 flval
= NEXTSINGLE(p
);
489 flval
= NEXTDOUBLE(p
);
493 flval
= NEXTEXTEND(p
);
497 flval
= NEXTPACKED(p
);
501 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
504 if ( flt_p
) /* Print a float? */
505 fprintf (stream
, "#%g", flval
);
507 fprintf (stream
, "#%d", val
);
511 fprintf (stream
, "<invalid address mode 0%o>", (unsigned) val
);
523 /* Move the pointer ahead if this point is farther ahead
528 fputs ("#0", stream
);
533 register int newval
= 0;
534 for (regno
= 0; regno
< 16; ++regno
)
535 if (val
& (0x8000 >> regno
))
536 newval
|= 1 << regno
;
541 for (regno
= 0; regno
< 16; ++regno
)
542 if (val
& (1 << regno
))
548 fprintf (stream
, "%s", reg_names
[regno
]);
550 while (val
& (1 << (regno
+ 1)))
552 if (regno
> first_regno
)
553 fprintf (stream
, "-%s", reg_names
[regno
]);
556 else if (place
== '3')
560 val
= fetch_arg (buffer
, place
, 8);
563 fputs ("#0", stream
);
568 register int newval
= 0;
569 for (regno
= 0; regno
< 8; ++regno
)
570 if (val
& (0x80 >> regno
))
571 newval
|= 1 << regno
;
576 for (regno
= 0; regno
< 8; ++regno
)
577 if (val
& (1 << regno
))
583 fprintf (stream
, "fp%d", regno
);
585 while (val
& (1 << (regno
+ 1)))
587 if (regno
> first_regno
)
588 fprintf (stream
, "-fp%d", regno
);
596 fprintf(stderr
, "Invalid arg format in opcode table: \"%c\".", *d
);
599 return (unsigned char *) p
;
602 /* Fetch BITS bits from a position in the instruction specified by CODE.
603 CODE is a "place to put an argument", or 'x' for a destination
604 that is a general address (mode and register).
605 BUFFER contains the instruction. */
608 fetch_arg (buffer
, code
, bits
)
609 unsigned char *buffer
;
620 case 'd': /* Destination, for register or quick. */
621 val
= (buffer
[0] << 8) + buffer
[1];
625 case 'x': /* Destination, for general arg */
626 val
= (buffer
[0] << 8) + buffer
[1];
631 val
= (buffer
[3] >> 4);
639 val
= (buffer
[2] << 8) + buffer
[3];
644 val
= (buffer
[2] << 8) + buffer
[3];
650 val
= (buffer
[2] << 8) + buffer
[3];
654 val
= (buffer
[4] << 8) + buffer
[5];
659 val
= (buffer
[4] << 8) + buffer
[5];
664 val
= (buffer
[4] << 8) + buffer
[5];
668 val
= (buffer
[2] << 8) + buffer
[3];
673 val
= (buffer
[2] << 8) + buffer
[3];
703 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
704 P points to extension word, in buffer.
705 ADDR is the nominal core address of that extension word. */
707 static unsigned char *
708 print_indexed (basereg
, p
, addr
, stream
)
715 static char *scales
[] = {"", "*2", "*4", "*8"};
716 register int base_disp
;
717 register int outer_disp
;
722 /* Generate the text for the index register.
723 Where this will be output is not yet determined. */
724 sprintf (buf
, "[%s.%c%s]",
725 reg_names
[(word
>> 12) & 0xf],
726 (word
& 0x800) ? 'l' : 'w',
727 scales
[(word
>> 9) & 3]);
729 /* Handle the 68000 style of indexing. */
731 if ((word
& 0x100) == 0)
734 ((word
& 0x80) ? word
| 0xff00 : word
& 0xff)
735 + ((basereg
== -1) ? addr
: 0),
741 /* Handle the generalized kind. */
742 /* First, compute the displacement to add to the base register. */
749 switch ((word
>> 4) & 3)
752 base_disp
= NEXTWORD (p
);
755 base_disp
= NEXTLONG (p
);
760 /* Handle single-level case (not indirect) */
764 print_base (basereg
, base_disp
, stream
);
769 /* Two level. Compute displacement to add after indirection. */
775 outer_disp
= NEXTWORD (p
);
778 outer_disp
= NEXTLONG (p
);
781 fprintf (stream
, "%d(", outer_disp
);
782 print_base (basereg
, base_disp
, stream
);
784 /* If postindexed, print the closeparen before the index. */
786 fprintf (stream
, ")%s", buf
);
787 /* If preindexed, print the closeparen after the index. */
789 fprintf (stream
, "%s)", buf
);
794 /* Print a base register REGNO and displacement DISP, on STREAM.
795 REGNO = -1 for pc, -2 for none (suppressed). */
798 print_base (regno
, disp
, stream
)
804 fprintf (stream
, "%d", disp
);
805 else if (regno
== -1)
806 fprintf (stream
, "0x%x", (unsigned) disp
);
808 fprintf (stream
, "%d(%s)", disp
, reg_names
[regno
]);
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