2 #source: out-of-order.s
3 #ld: -e v1 -Ttext-segment=0x400000
5 #name: Check if disassembler can handle all sections in default order
7 .*: +file format .*arm.*
9 Disassembly of section \.func1:
12 400000: e0800001 add r0, r0, r1
13 400004: 00000000 andeq r0, r0, r0
15 Disassembly of section \.func2:
18 400008: e0800001 add r0, r0, r1
20 Disassembly of section \.func3:
23 40000c: e0800001 add r0, r0, r1
24 400010: e0800001 add r0, r0, r1
25 400014: e0800001 add r0, r0, r1
26 400018: e0800001 add r0, r0, r1
27 40001c: e0800001 add r0, r0, r1
28 400020: 00000000 andeq r0, r0, r0
30 Disassembly of section \.rodata:
33 400024: 00000004 andeq r0, r0, r4
35 Disassembly of section \.global:
37 00410028 <__data_start>:
38 410028: 00000001 andeq r0, r0, r1
39 41002c: 00000001 andeq r0, r0, r1
40 410030: 00000001 andeq r0, r0, r1
42 Disassembly of section \.ARM\.attributes:
44 00000000 <\.ARM\.attributes>:
45 0: 00001141 andeq r1, r0, r1, asr #2
46 4: 61656100 cmnvs r5, r0, lsl #2
47 8: 01006962 tsteq r0, r2, ror #18
48 c: 00000007 andeq r0, r0, r7
49 10: Address 0x0000000000000010 is out of bounds.