1 2020-02-04 Alan Modra <amodra@gmail.com>
3 * m32r.cpu (f-disp8): Avoid left shift of negative values.
4 (f-disp16, f-disp24): Likewise.
6 2019-12-23 Alan Modra <amodra@gmail.com>
8 * iq2000.cpu (f-offset): Avoid left shift of negative values.
10 2019-12-20 Alan Modra <amodra@gmail.com>
12 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
14 2019-12-17 Alan Modra <amodra@gmail.com>
16 * bpf.cpu (f-imm64): Avoid signed overflow.
18 2019-12-16 Alan Modra <amodra@gmail.com>
20 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
22 2019-12-11 Alan Modra <amodra@gmail.com>
24 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
25 * lm32.cpu (f-branch, f-vall): Likewise.
26 * m32.cpu (f-lab-8-16): Likewise.
28 2019-12-11 Alan Modra <amodra@gmail.com>
30 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
31 shift left to avoid UB on left shift of negative values.
33 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
35 * bpf.cpu: Fix comment describing the 128-bit instruction format.
37 2019-09-09 Phil Blundell <pb@pbcl.net>
39 binutils 2.33 branch created.
41 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
43 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
46 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
48 * bpf.cpu (dlabs): New pmacro.
51 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
53 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
54 explicit 'dst' argument.
56 2019-06-13 Stafford Horne <shorne@gmail.com>
58 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
60 2019-06-13 Stafford Horne <shorne@gmail.com>
62 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
63 (l-adrp): Improve comment.
65 2019-06-13 Stafford Horne <shorne@gmail.com>
67 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
68 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
69 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
70 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
71 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
72 float-setflag-unordered-symantics): New pmacro for instruction
74 (float-setflag-insn): Update to use float-setflag-insn-base.
75 (float-setflag-unordered-insn): New pmacro for generating instructions.
77 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
78 Stafford Horne <shorne@gmail.com>
80 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
81 (ORFPX-MACHS): Removed pmacro.
82 * or1k.opc (or1k_cgen_insn_supported): New function.
83 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
84 (parse_regpair, print_regpair): New functions.
85 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
87 (h-fdr): Update comment to indicate or64.
88 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
89 (h-fd32r): New hardware for 64-bit fpu registers.
90 (h-i64r): New hardware for 64-bit int registers.
91 * or1korbis.cpu (f-resv-8-1): New field.
92 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
93 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
94 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
95 (h-roff1): New hardware.
96 (double-field-and-ops mnemonic): New pmacro to generate operations
97 rDD32F, rAD32F, rBD32F, rDDI and rADI.
98 (float-regreg-insn): Update single precision generator to MACH
99 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
100 (float-setflag-insn): Update single precision generator to MACH
101 ORFPX32-MACHS. Fix double instructions from single to double
102 precision. Add generator for or32 64-bit instructions.
103 (float-cust-insn cust-num): Update single precision generator to MACH
104 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
105 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
107 (lf-rem-d): Fix operation from mod to rem.
108 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
109 (lf-itof-d): Fix operands from single to double.
110 (lf-ftoi-d): Update operand mode from DI to WI.
112 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
117 2018-06-24 Nick Clifton <nickc@redhat.com>
121 2018-10-05 Richard Henderson <rth@twiddle.net>
122 Stafford Horne <shorne@gmail.com>
124 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
125 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
126 (l-mul): Fix overflow support and indentation.
127 (l-mulu): Fix overflow support and indentation.
128 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
129 (l-div); Remove incorrect carry behavior.
130 (l-divu): Fix carry and overflow behavior.
131 (l-mac): Add overflow support.
132 (l-msb, l-msbu): Add carry and overflow support.
134 2018-10-05 Richard Henderson <rth@twiddle.net>
136 * or1k.opc (parse_disp26): Add support for plta() relocations.
137 (parse_disp21): New function.
138 (or1k_rclass): New enum.
139 (or1k_rtype): New enum.
140 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
141 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
142 (parse_imm16): Add support for the new 21bit and 13bit relocations.
143 * or1korbis.cpu (f-disp26): Don't assume SI.
144 (f-disp21): New pc-relative 21-bit 13 shifted to right.
145 (insn-opcode): Add ADRP.
146 (l-adrp): New instruction.
148 2018-10-05 Richard Henderson <rth@twiddle.net>
150 * or1k.opc: Add RTYPE_ enum.
151 (INVALID_STORE_RELOC): New string.
152 (or1k_imm16_relocs): New array array.
153 (parse_reloc): New static function that just does the parsing.
154 (parse_imm16): New static function for generic parsing.
155 (parse_simm16): Change to just call parse_imm16.
156 (parse_simm16_split): New function.
157 (parse_uimm16): Change to call parse_imm16.
158 (parse_uimm16_split): New function.
159 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
160 (uimm16-split): Change to use new uimm16_split.
162 2018-07-24 Alan Modra <amodra@gmail.com>
165 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
167 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
169 * or1kcommon.cpu (spr-reg-info): Typo fix.
171 2018-03-03 Alan Modra <amodra@gmail.com>
173 * frv.opc: Include opintl.h.
174 (add_next_to_vliw): Use opcodes_error_handler to print error.
175 Standardize error message.
176 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
178 2018-01-13 Nick Clifton <nickc@redhat.com>
182 2017-03-15 Stafford Horne <shorne@gmail.com>
184 * or1kcommon.cpu: Add pc set semantics to also update ppc.
186 2016-10-06 Alan Modra <amodra@gmail.com>
188 * mep.opc (expand_string): Add fall through comment.
190 2016-03-03 Alan Modra <amodra@gmail.com>
192 * fr30.cpu (f-m4): Replace bogus comment with a better guess
193 at what is really going on.
195 2016-03-02 Alan Modra <amodra@gmail.com>
197 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
199 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
201 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
202 a constant to better align disassembler output.
204 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
206 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
208 2014-06-12 Alan Modra <amodra@gmail.com>
210 * or1k.opc: Whitespace fixes.
212 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
214 * or1korbis.cpu (h-atomic-reserve): New hardware.
215 (h-atomic-address): Likewise.
216 (insn-opcode): Add opcodes for LWA and SWA.
217 (atomic-reserve): New operand.
218 (atomic-address): Likewise.
219 (l-lwa, l-swa): New instructions.
220 (l-lbs): Fix typo in comment.
221 (store-insn): Clear atomic reserve on store to atomic-address.
222 Fix register names in fmt field.
224 2014-04-22 Christian Svensson <blue@cmd.nu>
226 * openrisc.cpu: Delete.
227 * openrisc.opc: Delete.
228 * or1k.cpu: New file.
229 * or1k.opc: New file.
230 * or1kcommon.cpu: New file.
231 * or1korbis.cpu: New file.
232 * or1korfpx.cpu: New file.
234 2013-12-07 Mike Frysinger <vapier@gentoo.org>
236 * epiphany.opc: Remove +x file mode.
238 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
241 * lm32.cpu (Control and status registers): Add CFG2, PSW,
242 TLBVADDR, TLBPADDR and TLBBADVADDR.
244 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
245 Joern Rennecke <joern.rennecke@embecosm.com>
247 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
248 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
249 (testset-insn): Add NO_DIS attribute to t.l.
250 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
251 (move-insns): Add NO-DIS attribute to cmov.l.
252 (op-mmr-movts): Add NO-DIS attribute to movts.l.
253 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
254 (op-rrr): Add NO-DIS attribute to .l.
255 (shift-rrr): Add NO-DIS attribute to .l.
256 (op-shift-rri): Add NO-DIS attribute to i32.l.
257 (bitrl, movtl): Add NO-DIS attribute.
258 (op-iextrrr): Add NO-DIS attribute to .l
259 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
260 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
262 2012-02-27 Alan Modra <amodra@gmail.com>
264 * mt.opc (print_dollarhex): Trim values to 32 bits.
266 2011-12-15 Nick Clifton <nickc@redhat.com>
268 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
271 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
273 * epiphany.opc (parse_branch_addr): Fix type of valuep.
274 Cast value before printing it as a long.
275 (parse_postindex): Fix type of valuep.
277 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
279 * cpu/epiphany.cpu: New file.
280 * cpu/epiphany.opc: New file.
282 2011-08-22 Nick Clifton <nickc@redhat.com>
284 * fr30.cpu: Newly contributed file.
285 * fr30.opc: Likewise.
286 * ip2k.cpu: Likewise.
287 * ip2k.opc: Likewise.
288 * mep-avc.cpu: Likewise.
289 * mep-avc2.cpu: Likewise.
290 * mep-c5.cpu: Likewise.
291 * mep-core.cpu: Likewise.
292 * mep-default.cpu: Likewise.
293 * mep-ext-cop.cpu: Likewise.
294 * mep-fmax.cpu: Likewise.
295 * mep-h1.cpu: Likewise.
296 * mep-ivc2.cpu: Likewise.
297 * mep-rhcop.cpu: Likewise.
298 * mep-sample-ucidsp.cpu: Likewise.
301 * openrisc.cpu: Likewise.
302 * openrisc.opc: Likewise.
303 * xstormy16.cpu: Likewise.
304 * xstormy16.opc: Likewise.
306 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
308 * frv.opc: #undef DEBUG.
310 2010-07-03 DJ Delorie <dj@delorie.com>
312 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
314 2010-02-11 Doug Evans <dje@sebabeach.org>
316 * m32r.cpu (HASH-PREFIX): Delete.
317 (duhpo, dshpo): New pmacros.
318 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
319 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
320 attribute, define with dshpo.
321 (uimm24): Delete HASH-PREFIX attribute.
322 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
323 (print_signed_with_hash_prefix): New function.
324 (print_unsigned_with_hash_prefix): New function.
325 * xc16x.cpu (dowh): New pmacro.
326 (upof16): Define with dowh, specify print handler.
327 (qbit, qlobit, qhibit): Ditto.
329 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
330 (print_with_dot_prefix): New functions.
331 (print_with_pof_prefix, print_with_pag_prefix): New functions.
333 2010-01-24 Doug Evans <dje@sebabeach.org>
335 * frv.cpu (floating-point-conversion): Update call to fp conv op.
336 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
337 conditional-floating-point-conversion, ne-floating-point-conversion,
338 float-parallel-mul-add-double-semantics): Ditto.
340 2010-01-05 Doug Evans <dje@sebabeach.org>
342 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
343 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
345 2010-01-02 Doug Evans <dje@sebabeach.org>
347 * m32c.opc (parse_signed16): Fix typo.
349 2009-12-11 Nick Clifton <nickc@redhat.com>
351 * frv.opc: Fix shadowed variable warnings.
352 * m32c.opc: Fix shadowed variable warnings.
354 2009-11-14 Doug Evans <dje@sebabeach.org>
356 Must use VOID expression in VOID context.
357 * xc16x.cpu (mov4): Fix mode of `sequence'.
358 (mov9, mov10): Ditto.
359 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
360 (callr, callseg, calls, trap, rets, reti): Ditto.
361 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
362 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
363 (exts, exts1, extsr, extsr1, prior): Ditto.
365 2009-10-23 Doug Evans <dje@sebabeach.org>
367 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
368 cgen-ops.h -> cgen/basic-ops.h.
370 2009-09-25 Alan Modra <amodra@bigpond.net.au>
372 * m32r.cpu (stb-plus): Typo fix.
374 2009-09-23 Doug Evans <dje@sebabeach.org>
376 * m32r.cpu (sth-plus): Fix address mode and calculation.
378 (clrpsw): Fix mask calculation.
379 (bset, bclr, btst): Make mode in bit calculation match expression.
381 * xc16x.cpu (rtl-version): Set to 0.8.
382 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
383 make uppercase. Remove unnecessary name-prefix spec.
384 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
385 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
386 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
387 (h-cr): New hardware.
388 (muls): Comment out parts that won't compile, add fixme.
389 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
390 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
391 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
393 2009-07-16 Doug Evans <dje@sebabeach.org>
395 * cpu/simplify.inc (*): One line doc strings don't need \n.
396 (df): Invoke define-full-ifield instead of claiming it's an alias.
398 (dnop): Mark as deprecated.
400 2009-06-22 Alan Modra <amodra@bigpond.net.au>
402 * m32c.opc (parse_lab_5_3): Use correct enum.
404 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
406 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
407 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
408 (media-arith-sat-semantics): Explicitly sign- or zero-extend
409 arguments of "operation" to DI using "mode" and the new pmacros.
411 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
413 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
416 2008-12-23 Jon Beniston <jon@beniston.com>
418 * lm32.cpu: New file.
419 * lm32.opc: New file.
421 2008-01-29 Alan Modra <amodra@bigpond.net.au>
423 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
426 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
428 * cris.cpu (movs, movu): Use result of extension operation when
431 2007-07-04 Nick Clifton <nickc@redhat.com>
433 * cris.cpu: Update copyright notice to refer to GPLv3.
434 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
435 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
436 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
438 * iq2000.cpu: Fix copyright notice to refer to FSF.
440 2007-04-30 Mark Salter <msalter@sadr.localdomain>
442 * frv.cpu (spr-names): Support new coprocessor SPR registers.
444 2007-04-20 Nick Clifton <nickc@redhat.com>
446 * xc16x.cpu: Restore after accidentally overwriting this file with
449 2007-03-29 DJ Delorie <dj@redhat.com>
451 * m32c.cpu (Imm-8-s4n): Fix print hook.
452 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
453 (arith-jnz-imm4-dst-defn): Make relaxable.
454 (arith-jnz16-imm4-dst-defn): Fix encodings.
456 2007-03-20 DJ Delorie <dj@redhat.com>
458 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
460 (src16-16-20-An-relative-*): New.
461 (dst16-*-20-An-relative-*): New.
462 (dst16-16-16sa-*): New
463 (dst16-16-16ar-*): New
464 (dst32-16-16sa-Unprefixed-*): New
465 (jsri): Fix operands.
466 (setzx): Fix encoding.
468 2007-03-08 Alan Modra <amodra@bigpond.net.au>
470 * m32r.opc: Formatting.
472 2006-05-22 Nick Clifton <nickc@redhat.com>
474 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
476 2006-04-10 DJ Delorie <dj@redhat.com>
478 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
479 decides if this function accepts symbolic constants or not.
480 (parse_signed_bitbase): Likewise.
481 (parse_unsigned_bitbase8): Pass the new parameter.
482 (parse_unsigned_bitbase11): Likewise.
483 (parse_unsigned_bitbase16): Likewise.
484 (parse_unsigned_bitbase19): Likewise.
485 (parse_unsigned_bitbase27): Likewise.
486 (parse_signed_bitbase8): Likewise.
487 (parse_signed_bitbase11): Likewise.
488 (parse_signed_bitbase19): Likewise.
490 2006-03-13 DJ Delorie <dj@redhat.com>
492 * m32c.cpu (Bit3-S): New.
494 * m32c.opc (parse_bit3_S): New.
496 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
497 (btst): Add optional :G suffix for MACH32.
499 (pop.w:G): Add optional :G suffix for MACH16.
500 (push.b.imm): Fix syntax.
502 2006-03-10 DJ Delorie <dj@redhat.com>
504 * m32c.cpu (mul.l): New.
507 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
509 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
510 an error message otherwise.
511 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
512 Fix up comments to correctly describe the functions.
514 2006-02-24 DJ Delorie <dj@redhat.com>
516 * m32c.cpu (RL_TYPE): New attribute, with macros.
517 (Lab-8-24): Add RELAX.
518 (unary-insn-defn-g, binary-arith-imm-dst-defn,
519 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
520 (binary-arith-src-dst-defn): Add 2ADDR attribute.
521 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
522 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
524 (jsri16, jsri32): Add 1ADDR attribute.
525 (jsr32.w, jsr32.a): Add JUMP attribute.
527 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
528 Anil Paranjape <anilp1@kpitcummins.com>
529 Shilin Shakti <shilins@kpitcummins.com>
531 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
533 * xc16x.opc: New file containing supporting XC16C routines.
535 2006-02-10 Nick Clifton <nickc@redhat.com>
537 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
539 2006-01-06 DJ Delorie <dj@redhat.com>
541 * m32c.cpu (mov.w:q): Fix mode.
542 (push32.b.imm): Likewise, for the comment.
544 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
546 Second part of ms1 to mt renaming.
547 * mt.cpu (define-arch, define-isa): Set name to mt.
548 (define-mach): Adjust.
549 * mt.opc (CGEN_ASM_HASH): Update.
550 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
551 (parse_loopsize, parse_imm16): Adjust.
553 2005-12-13 DJ Delorie <dj@redhat.com>
555 * m32c.cpu (jsri): Fix order so register names aren't treated as
557 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
558 indexwd, indexws): Fix encodings.
560 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
562 * mt.cpu: Rename from ms1.cpu.
563 * mt.opc: Rename from ms1.opc.
565 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
567 * cris.cpu (simplecris-common-writable-specregs)
568 (simplecris-common-readable-specregs): Split from
569 simplecris-common-specregs. All users changed.
570 (cris-implemented-writable-specregs-v0)
571 (cris-implemented-readable-specregs-v0): Similar from
572 cris-implemented-specregs-v0.
573 (cris-implemented-writable-specregs-v3)
574 (cris-implemented-readable-specregs-v3)
575 (cris-implemented-writable-specregs-v8)
576 (cris-implemented-readable-specregs-v8)
577 (cris-implemented-writable-specregs-v10)
578 (cris-implemented-readable-specregs-v10)
579 (cris-implemented-writable-specregs-v32)
580 (cris-implemented-readable-specregs-v32): Similar.
581 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
582 insns and specializations.
584 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
587 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
589 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
590 f-cb2incr, f-rc3): New fields.
591 (LOOP): New instruction.
592 (JAL-HAZARD): New hazard.
593 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
595 (mul, muli, dbnz, iflush): Enable for ms2
596 (jal, reti): Has JAL-HAZARD.
597 (ldctxt, ldfb, stfb): Only ms1.
598 (fbcb): Only ms1,ms1-003.
599 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
600 fbcbincrs, mfbcbincrs): Enable for ms2.
601 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
602 * ms1.opc (parse_loopsize): New.
603 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
606 2005-10-28 Dave Brolley <brolley@redhat.com>
608 Contribute the following change:
609 2003-09-24 Dave Brolley <brolley@redhat.com>
611 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
612 CGEN_ATTR_VALUE_TYPE.
613 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
614 Use cgen_bitset_intersect_p.
616 2005-10-27 DJ Delorie <dj@redhat.com>
618 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
619 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
620 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
621 imm operand is needed.
622 (adjnz, sbjnz): Pass the right operands.
623 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
624 unary-insn): Add -g variants for opcodes that need to support :G.
625 (not.BW:G, push.BW:G): Call it.
626 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
627 stzx16-imm8-imm8-abs16): Fix operand typos.
628 * m32c.opc (m32c_asm_hash): Support bnCND.
629 (parse_signed4n, print_signed4n): New.
631 2005-10-26 DJ Delorie <dj@redhat.com>
633 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
634 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
635 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
637 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
638 (mov.BW:S r0,r1): Fix typo r1l->r1.
639 (tst): Allow :G suffix.
640 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
642 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
644 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
646 2005-10-25 DJ Delorie <dj@redhat.com>
648 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
649 making one a macro of the other.
651 2005-10-21 DJ Delorie <dj@redhat.com>
653 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
654 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
655 indexld, indexls): .w variants have `1' bit.
656 (rot32.b): QI, not SI.
657 (rot32.w): HI, not SI.
658 (xchg16): HI for .w variant.
660 2005-10-19 Nick Clifton <nickc@redhat.com>
662 * m32r.opc (parse_slo16): Fix bad application of previous patch.
664 2005-10-18 Andreas Schwab <schwab@suse.de>
666 * m32r.opc (parse_slo16): Better version of previous patch.
668 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
670 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
673 2005-07-25 DJ Delorie <dj@redhat.com>
675 * m32c.opc (parse_unsigned8): Add %dsp8().
676 (parse_signed8): Add %hi8().
677 (parse_unsigned16): Add %dsp16().
678 (parse_signed16): Add %lo16() and %hi16().
679 (parse_lab_5_3): Make valuep a bfd_vma *.
681 2005-07-18 Nick Clifton <nickc@redhat.com>
683 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
685 (f-lab32-jmp-s): Fix insertion sequence.
686 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
687 (Dsp-40-s8): Make parameter be signed.
688 (Dsp-40-s16): Likewise.
689 (Dsp-48-s8): Likewise.
690 (Dsp-48-s16): Likewise.
691 (Imm-13-u3): Likewise. (Despite its name!)
692 (BitBase16-16-s8): Make the parameter be unsigned.
693 (BitBase16-8-u11-S): Likewise.
694 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
695 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
698 * m32c.opc: Fix formatting.
699 Use safe-ctype.h instead of ctype.h
700 Move duplicated code sequences into a macro.
701 Fix compile time warnings about signedness mismatches.
703 (parse_lab_5_3): New parser function.
705 2005-07-16 Jim Blandy <jimb@redhat.com>
707 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
708 to represent isa sets.
710 2005-07-15 Jim Blandy <jimb@redhat.com>
712 * m32c.cpu, m32c.opc: Fix copyright.
714 2005-07-14 Jim Blandy <jimb@redhat.com>
716 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
718 2005-07-14 Alan Modra <amodra@bigpond.net.au>
720 * ms1.opc (print_dollarhex): Correct format string.
722 2005-07-06 Alan Modra <amodra@bigpond.net.au>
724 * iq2000.cpu: Include from binutils cpu dir.
726 2005-07-05 Nick Clifton <nickc@redhat.com>
728 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
729 unsigned in order to avoid compile time warnings about sign
732 * ms1.opc (parse_*): Likewise.
733 (parse_imm16): Use a "void *" as it is passed both signed and
736 2005-07-01 Nick Clifton <nickc@redhat.com>
738 * frv.opc: Update to ISO C90 function declaration style.
739 * iq2000.opc: Likewise.
740 * m32r.opc: Likewise.
743 2005-06-15 Dave Brolley <brolley@redhat.com>
745 Contributed by Red Hat.
746 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
747 * ms1.opc: New file. Written by Stan Cox.
749 2005-05-10 Nick Clifton <nickc@redhat.com>
751 * Update the address and phone number of the FSF organization in
752 the GPL notices in the following files:
753 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
754 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
755 sh64-media.cpu, simplify.inc
757 2005-02-24 Alan Modra <amodra@bigpond.net.au>
759 * frv.opc (parse_A): Warning fix.
761 2005-02-23 Nick Clifton <nickc@redhat.com>
763 * frv.opc: Fixed compile time warnings about differing signed'ness
764 of pointers passed to functions.
765 * m32r.opc: Likewise.
767 2005-02-11 Nick Clifton <nickc@redhat.com>
769 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
770 'bfd_vma *' in order avoid compile time warning message.
772 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
774 * cris.cpu (mstep): Add missing insn.
776 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
778 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
779 * frv.cpu: Add support for TLS annotations in loads and calll.
780 * frv.opc (parse_symbolic_address): New.
781 (parse_ldd_annotation): New.
782 (parse_call_annotation): New.
783 (parse_ld_annotation): New.
784 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
785 Introduce TLS relocations.
786 (parse_d12, parse_s12, parse_u12): Likewise.
787 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
788 (parse_call_label, print_at): New.
790 2004-12-21 Mikael Starvik <starvik@axis.com>
792 * cris.cpu (cris-set-mem): Correct integral write semantics.
794 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
796 * cris.cpu: New file.
798 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
800 * iq2000.cpu: Added quotes around macro arguments so that they
801 will work with newer versions of guile.
803 2004-10-27 Nick Clifton <nickc@redhat.com>
805 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
806 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
808 * iq2000.cpu (dnop index): Rename to _index to avoid complications
811 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
813 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
815 2004-05-15 Nick Clifton <nickc@redhat.com>
817 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
819 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
821 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
823 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
825 * frv.cpu (define-arch frv): Add fr450 mach.
826 (define-mach fr450): New.
827 (define-model fr450): New. Add profile units to every fr450 insn.
828 (define-attr UNIT): Add MDCUTSSI.
829 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
830 (define-attr AUDIO): New boolean.
831 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
832 (f-LRA-null, f-TLBPR-null): New fields.
833 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
834 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
835 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
836 (LRA-null, TLBPR-null): New macros.
837 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
838 (load-real-address): New macro.
839 (lrai, lrad, tlbpr): New instructions.
840 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
841 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
842 (mdcutssi): Change UNIT attribute to MDCUTSSI.
843 (media-low-clear-semantics, media-scope-limit-semantics)
844 (media-quad-limit, media-quad-shift): New macros.
845 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
846 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
847 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
848 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
849 (fr450_unit_mapping): New array.
850 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
851 for new MDCUTSSI unit.
852 (fr450_check_insn_major_constraints): New function.
853 (check_insn_major_constraints): Use it.
855 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
857 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
858 (scutss): Change unit to I0.
859 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
860 (mqsaths): Fix FR400-MAJOR categorization.
861 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
862 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
863 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
866 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
868 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
869 (rstb, rsth, rst, rstd, rstq): Delete.
870 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
872 2004-02-23 Nick Clifton <nickc@redhat.com>
874 * Apply these patches from Renesas:
876 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
878 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
879 disassembling codes for 0x*2 addresses.
881 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
883 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
885 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
887 * cpu/m32r.cpu : Add new model m32r2.
888 Add new instructions.
889 Replace occurrances of 'Mitsubishi' with 'Renesas'.
890 Changed PIPE attr of push from O to OS.
891 Care for Little-endian of M32R.
892 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
893 Care for Little-endian of M32R.
894 (parse_slo16): signed extension for value.
896 2004-02-20 Andrew Cagney <cagney@redhat.com>
898 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
899 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
901 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
902 written by Ben Elliston.
904 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
906 * frv.cpu (UNIT): Add IACC.
907 (iacc-multiply-r-r): Use it.
908 * frv.opc (fr400_unit_mapping): Add entry for IACC.
909 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
911 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
913 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
914 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
915 cut&paste errors in shifting/truncating numerical operands.
916 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
917 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
918 (parse_uslo16): Likewise.
919 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
920 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
921 (parse_s12): Likewise.
922 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
923 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
924 (parse_uslo16): Likewise.
925 (parse_uhi16): Parse gothi and gotfuncdeschi.
926 (parse_d12): Parse got12 and gotfuncdesc12.
927 (parse_s12): Likewise.
929 2003-10-10 Dave Brolley <brolley@redhat.com>
931 * frv.cpu (dnpmop): New p-macro.
932 (GRdoublek): Use dnpmop.
933 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
934 (store-double-r-r): Use (.sym regtype doublek).
935 (r-store-double): Ditto.
936 (store-double-r-r-u): Ditto.
937 (conditional-store-double): Ditto.
938 (conditional-store-double-u): Ditto.
939 (store-double-r-simm): Ditto.
940 (fmovs): Assign to UNIT FMALL.
942 2003-10-06 Dave Brolley <brolley@redhat.com>
944 * frv.cpu, frv.opc: Add support for fr550.
946 2003-09-24 Dave Brolley <brolley@redhat.com>
948 * frv.cpu (u-commit): New modelling unit for fr500.
949 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
950 (commit-r): Use u-commit model for fr500.
952 (conditional-float-binary-op): Take profiling data as an argument.
954 (ne-float-binary-op): Ditto.
956 2003-09-19 Michael Snyder <msnyder@redhat.com>
958 * frv.cpu (nldqi): Delete unimplemented instruction.
960 2003-09-12 Dave Brolley <brolley@redhat.com>
962 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
963 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
964 frv_ref_SI to get input register referenced for profiling.
965 (clear-ne-flag-all): Pass insn profiling in as an argument.
966 (clrgr,clrfr,clrga,clrfa): Add profiling information.
968 2003-09-11 Michael Snyder <msnyder@redhat.com>
970 * frv.cpu: Typographical corrections.
972 2003-09-09 Dave Brolley <brolley@redhat.com>
974 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
975 (conditional-media-dual-complex, media-quad-complex): Likewise.
977 2003-09-04 Dave Brolley <brolley@redhat.com>
979 * frv.cpu (register-transfer): Pass in all attributes in on argument.
981 (conditional-register-transfer): Ditto.
982 (cache-preload): Ditto.
983 (floating-point-conversion): Ditto.
984 (floating-point-neg): Ditto.
986 (float-binary-op-s): Ditto.
987 (conditional-float-binary-op): Ditto.
988 (ne-float-binary-op): Ditto.
989 (float-dual-arith): Ditto.
990 (ne-float-dual-arith): Ditto.
992 2003-09-03 Dave Brolley <brolley@redhat.com>
994 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
995 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
997 (A): Removed operand.
998 (A0,A1): New operands replace operand A.
999 (mnop): Now a real insn
1000 (mclracc): Removed insn.
1001 (mclracc-0, mclracc-1): New insns replace mclracc.
1002 (all insns): Use new UNIT attributes.
1004 2003-08-21 Nick Clifton <nickc@redhat.com>
1006 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1007 and u-media-dual-btoh with output parameter.
1008 (cmbtoh): Add profiling hack.
1010 2003-08-19 Michael Snyder <msnyder@redhat.com>
1012 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1014 2003-06-10 Doug Evans <dje@sebabeach.org>
1016 * frv.cpu: Add IDOC attribute.
1018 2003-06-06 Andrew Cagney <cagney@redhat.com>
1020 Contributed by Red Hat.
1021 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1022 Stan Cox, and Frank Ch. Eigler.
1023 * iq2000.opc: New file. Written by Ben Elliston, Frank
1024 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1025 * iq2000m.cpu: New file. Written by Jeff Johnston.
1026 * iq10.cpu: New file. Written by Jeff Johnston.
1028 2003-06-05 Nick Clifton <nickc@redhat.com>
1030 * frv.cpu (FRintieven): New operand. An even-numbered only
1031 version of the FRinti operand.
1032 (FRintjeven): Likewise for FRintj.
1033 (FRintkeven): Likewise for FRintk.
1034 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1035 media-quad-arith-sat-semantics, media-quad-arith-sat,
1036 conditional-media-quad-arith-sat, mdunpackh,
1037 media-quad-multiply-semantics, media-quad-multiply,
1038 conditional-media-quad-multiply, media-quad-complex-i,
1039 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1040 conditional-media-quad-multiply-acc, munpackh,
1041 media-quad-multiply-cross-acc-semantics, mdpackh,
1042 media-quad-multiply-cross-acc, mbtoh-semantics,
1043 media-quad-cross-multiply-cross-acc-semantics,
1044 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1045 media-quad-cross-multiply-acc-semantics, cmbtoh,
1046 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1047 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1048 cmhtob): Use new operands.
1049 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1050 (parse_even_register): New function.
1052 2003-06-03 Nick Clifton <nickc@redhat.com>
1054 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1055 immediate value not unsigned.
1057 2003-06-03 Andrew Cagney <cagney@redhat.com>
1059 Contributed by Red Hat.
1060 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1061 and Eric Christopher.
1062 * frv.opc: New file. Written by Catherine Moore, and Dave
1064 * simplify.inc: New file. Written by Doug Evans.
1066 2003-05-02 Andrew Cagney <cagney@redhat.com>
1071 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1073 Copying and distribution of this file, with or without modification,
1074 are permitted in any medium without royalty provided the copyright
1075 notice and this notice are preserved.
1081 version-control: never