1 2019-06-13 Stafford Horne <shorne@gmail.com>
3 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
5 2019-06-13 Stafford Horne <shorne@gmail.com>
7 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
8 (l-adrp): Improve comment.
10 2019-06-13 Stafford Horne <shorne@gmail.com>
12 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
13 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
14 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
15 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
16 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
17 float-setflag-unordered-symantics): New pmacro for instruction
19 (float-setflag-insn): Update to use float-setflag-insn-base.
20 (float-setflag-unordered-insn): New pmacro for generating instructions.
22 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
23 Stafford Horne <shorne@gmail.com>
25 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
26 (ORFPX-MACHS): Removed pmacro.
27 * or1k.opc (or1k_cgen_insn_supported): New function.
28 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
29 (parse_regpair, print_regpair): New functions.
30 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
32 (h-fdr): Update comment to indicate or64.
33 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
34 (h-fd32r): New hardware for 64-bit fpu registers.
35 (h-i64r): New hardware for 64-bit int registers.
36 * or1korbis.cpu (f-resv-8-1): New field.
37 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
38 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
39 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
40 (h-roff1): New hardware.
41 (double-field-and-ops mnemonic): New pmacro to generate operations
42 rDD32F, rAD32F, rBD32F, rDDI and rADI.
43 (float-regreg-insn): Update single precision generator to MACH
44 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
45 (float-setflag-insn): Update single precision generator to MACH
46 ORFPX32-MACHS. Fix double instructions from single to double
47 precision. Add generator for or32 64-bit instructions.
48 (float-cust-insn cust-num): Update single precision generator to MACH
49 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
50 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
52 (lf-rem-d): Fix operation from mod to rem.
53 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
54 (lf-itof-d): Fix operands from single to double.
55 (lf-ftoi-d): Update operand mode from DI to WI.
57 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
62 2018-06-24 Nick Clifton <nickc@redhat.com>
66 2018-10-05 Richard Henderson <rth@twiddle.net>
67 Stafford Horne <shorne@gmail.com>
69 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
70 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
71 (l-mul): Fix overflow support and indentation.
72 (l-mulu): Fix overflow support and indentation.
73 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
74 (l-div); Remove incorrect carry behavior.
75 (l-divu): Fix carry and overflow behavior.
76 (l-mac): Add overflow support.
77 (l-msb, l-msbu): Add carry and overflow support.
79 2018-10-05 Richard Henderson <rth@twiddle.net>
81 * or1k.opc (parse_disp26): Add support for plta() relocations.
82 (parse_disp21): New function.
83 (or1k_rclass): New enum.
84 (or1k_rtype): New enum.
85 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
86 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
87 (parse_imm16): Add support for the new 21bit and 13bit relocations.
88 * or1korbis.cpu (f-disp26): Don't assume SI.
89 (f-disp21): New pc-relative 21-bit 13 shifted to right.
90 (insn-opcode): Add ADRP.
91 (l-adrp): New instruction.
93 2018-10-05 Richard Henderson <rth@twiddle.net>
95 * or1k.opc: Add RTYPE_ enum.
96 (INVALID_STORE_RELOC): New string.
97 (or1k_imm16_relocs): New array array.
98 (parse_reloc): New static function that just does the parsing.
99 (parse_imm16): New static function for generic parsing.
100 (parse_simm16): Change to just call parse_imm16.
101 (parse_simm16_split): New function.
102 (parse_uimm16): Change to call parse_imm16.
103 (parse_uimm16_split): New function.
104 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
105 (uimm16-split): Change to use new uimm16_split.
107 2018-07-24 Alan Modra <amodra@gmail.com>
110 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
112 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
114 * or1kcommon.cpu (spr-reg-info): Typo fix.
116 2018-03-03 Alan Modra <amodra@gmail.com>
118 * frv.opc: Include opintl.h.
119 (add_next_to_vliw): Use opcodes_error_handler to print error.
120 Standardize error message.
121 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
123 2018-01-13 Nick Clifton <nickc@redhat.com>
127 2017-03-15 Stafford Horne <shorne@gmail.com>
129 * or1kcommon.cpu: Add pc set semantics to also update ppc.
131 2016-10-06 Alan Modra <amodra@gmail.com>
133 * mep.opc (expand_string): Add fall through comment.
135 2016-03-03 Alan Modra <amodra@gmail.com>
137 * fr30.cpu (f-m4): Replace bogus comment with a better guess
138 at what is really going on.
140 2016-03-02 Alan Modra <amodra@gmail.com>
142 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
144 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
146 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
147 a constant to better align disassembler output.
149 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
151 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
153 2014-06-12 Alan Modra <amodra@gmail.com>
155 * or1k.opc: Whitespace fixes.
157 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
159 * or1korbis.cpu (h-atomic-reserve): New hardware.
160 (h-atomic-address): Likewise.
161 (insn-opcode): Add opcodes for LWA and SWA.
162 (atomic-reserve): New operand.
163 (atomic-address): Likewise.
164 (l-lwa, l-swa): New instructions.
165 (l-lbs): Fix typo in comment.
166 (store-insn): Clear atomic reserve on store to atomic-address.
167 Fix register names in fmt field.
169 2014-04-22 Christian Svensson <blue@cmd.nu>
171 * openrisc.cpu: Delete.
172 * openrisc.opc: Delete.
173 * or1k.cpu: New file.
174 * or1k.opc: New file.
175 * or1kcommon.cpu: New file.
176 * or1korbis.cpu: New file.
177 * or1korfpx.cpu: New file.
179 2013-12-07 Mike Frysinger <vapier@gentoo.org>
181 * epiphany.opc: Remove +x file mode.
183 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
186 * lm32.cpu (Control and status registers): Add CFG2, PSW,
187 TLBVADDR, TLBPADDR and TLBBADVADDR.
189 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
190 Joern Rennecke <joern.rennecke@embecosm.com>
192 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
193 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
194 (testset-insn): Add NO_DIS attribute to t.l.
195 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
196 (move-insns): Add NO-DIS attribute to cmov.l.
197 (op-mmr-movts): Add NO-DIS attribute to movts.l.
198 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
199 (op-rrr): Add NO-DIS attribute to .l.
200 (shift-rrr): Add NO-DIS attribute to .l.
201 (op-shift-rri): Add NO-DIS attribute to i32.l.
202 (bitrl, movtl): Add NO-DIS attribute.
203 (op-iextrrr): Add NO-DIS attribute to .l
204 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
205 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
207 2012-02-27 Alan Modra <amodra@gmail.com>
209 * mt.opc (print_dollarhex): Trim values to 32 bits.
211 2011-12-15 Nick Clifton <nickc@redhat.com>
213 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
216 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
218 * epiphany.opc (parse_branch_addr): Fix type of valuep.
219 Cast value before printing it as a long.
220 (parse_postindex): Fix type of valuep.
222 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
224 * cpu/epiphany.cpu: New file.
225 * cpu/epiphany.opc: New file.
227 2011-08-22 Nick Clifton <nickc@redhat.com>
229 * fr30.cpu: Newly contributed file.
230 * fr30.opc: Likewise.
231 * ip2k.cpu: Likewise.
232 * ip2k.opc: Likewise.
233 * mep-avc.cpu: Likewise.
234 * mep-avc2.cpu: Likewise.
235 * mep-c5.cpu: Likewise.
236 * mep-core.cpu: Likewise.
237 * mep-default.cpu: Likewise.
238 * mep-ext-cop.cpu: Likewise.
239 * mep-fmax.cpu: Likewise.
240 * mep-h1.cpu: Likewise.
241 * mep-ivc2.cpu: Likewise.
242 * mep-rhcop.cpu: Likewise.
243 * mep-sample-ucidsp.cpu: Likewise.
246 * openrisc.cpu: Likewise.
247 * openrisc.opc: Likewise.
248 * xstormy16.cpu: Likewise.
249 * xstormy16.opc: Likewise.
251 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
253 * frv.opc: #undef DEBUG.
255 2010-07-03 DJ Delorie <dj@delorie.com>
257 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
259 2010-02-11 Doug Evans <dje@sebabeach.org>
261 * m32r.cpu (HASH-PREFIX): Delete.
262 (duhpo, dshpo): New pmacros.
263 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
264 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
265 attribute, define with dshpo.
266 (uimm24): Delete HASH-PREFIX attribute.
267 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
268 (print_signed_with_hash_prefix): New function.
269 (print_unsigned_with_hash_prefix): New function.
270 * xc16x.cpu (dowh): New pmacro.
271 (upof16): Define with dowh, specify print handler.
272 (qbit, qlobit, qhibit): Ditto.
274 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
275 (print_with_dot_prefix): New functions.
276 (print_with_pof_prefix, print_with_pag_prefix): New functions.
278 2010-01-24 Doug Evans <dje@sebabeach.org>
280 * frv.cpu (floating-point-conversion): Update call to fp conv op.
281 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
282 conditional-floating-point-conversion, ne-floating-point-conversion,
283 float-parallel-mul-add-double-semantics): Ditto.
285 2010-01-05 Doug Evans <dje@sebabeach.org>
287 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
288 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
290 2010-01-02 Doug Evans <dje@sebabeach.org>
292 * m32c.opc (parse_signed16): Fix typo.
294 2009-12-11 Nick Clifton <nickc@redhat.com>
296 * frv.opc: Fix shadowed variable warnings.
297 * m32c.opc: Fix shadowed variable warnings.
299 2009-11-14 Doug Evans <dje@sebabeach.org>
301 Must use VOID expression in VOID context.
302 * xc16x.cpu (mov4): Fix mode of `sequence'.
303 (mov9, mov10): Ditto.
304 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
305 (callr, callseg, calls, trap, rets, reti): Ditto.
306 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
307 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
308 (exts, exts1, extsr, extsr1, prior): Ditto.
310 2009-10-23 Doug Evans <dje@sebabeach.org>
312 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
313 cgen-ops.h -> cgen/basic-ops.h.
315 2009-09-25 Alan Modra <amodra@bigpond.net.au>
317 * m32r.cpu (stb-plus): Typo fix.
319 2009-09-23 Doug Evans <dje@sebabeach.org>
321 * m32r.cpu (sth-plus): Fix address mode and calculation.
323 (clrpsw): Fix mask calculation.
324 (bset, bclr, btst): Make mode in bit calculation match expression.
326 * xc16x.cpu (rtl-version): Set to 0.8.
327 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
328 make uppercase. Remove unnecessary name-prefix spec.
329 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
330 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
331 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
332 (h-cr): New hardware.
333 (muls): Comment out parts that won't compile, add fixme.
334 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
335 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
336 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
338 2009-07-16 Doug Evans <dje@sebabeach.org>
340 * cpu/simplify.inc (*): One line doc strings don't need \n.
341 (df): Invoke define-full-ifield instead of claiming it's an alias.
343 (dnop): Mark as deprecated.
345 2009-06-22 Alan Modra <amodra@bigpond.net.au>
347 * m32c.opc (parse_lab_5_3): Use correct enum.
349 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
351 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
352 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
353 (media-arith-sat-semantics): Explicitly sign- or zero-extend
354 arguments of "operation" to DI using "mode" and the new pmacros.
356 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
358 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
361 2008-12-23 Jon Beniston <jon@beniston.com>
363 * lm32.cpu: New file.
364 * lm32.opc: New file.
366 2008-01-29 Alan Modra <amodra@bigpond.net.au>
368 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
371 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
373 * cris.cpu (movs, movu): Use result of extension operation when
376 2007-07-04 Nick Clifton <nickc@redhat.com>
378 * cris.cpu: Update copyright notice to refer to GPLv3.
379 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
380 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
381 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
383 * iq2000.cpu: Fix copyright notice to refer to FSF.
385 2007-04-30 Mark Salter <msalter@sadr.localdomain>
387 * frv.cpu (spr-names): Support new coprocessor SPR registers.
389 2007-04-20 Nick Clifton <nickc@redhat.com>
391 * xc16x.cpu: Restore after accidentally overwriting this file with
394 2007-03-29 DJ Delorie <dj@redhat.com>
396 * m32c.cpu (Imm-8-s4n): Fix print hook.
397 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
398 (arith-jnz-imm4-dst-defn): Make relaxable.
399 (arith-jnz16-imm4-dst-defn): Fix encodings.
401 2007-03-20 DJ Delorie <dj@redhat.com>
403 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
405 (src16-16-20-An-relative-*): New.
406 (dst16-*-20-An-relative-*): New.
407 (dst16-16-16sa-*): New
408 (dst16-16-16ar-*): New
409 (dst32-16-16sa-Unprefixed-*): New
410 (jsri): Fix operands.
411 (setzx): Fix encoding.
413 2007-03-08 Alan Modra <amodra@bigpond.net.au>
415 * m32r.opc: Formatting.
417 2006-05-22 Nick Clifton <nickc@redhat.com>
419 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
421 2006-04-10 DJ Delorie <dj@redhat.com>
423 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
424 decides if this function accepts symbolic constants or not.
425 (parse_signed_bitbase): Likewise.
426 (parse_unsigned_bitbase8): Pass the new parameter.
427 (parse_unsigned_bitbase11): Likewise.
428 (parse_unsigned_bitbase16): Likewise.
429 (parse_unsigned_bitbase19): Likewise.
430 (parse_unsigned_bitbase27): Likewise.
431 (parse_signed_bitbase8): Likewise.
432 (parse_signed_bitbase11): Likewise.
433 (parse_signed_bitbase19): Likewise.
435 2006-03-13 DJ Delorie <dj@redhat.com>
437 * m32c.cpu (Bit3-S): New.
439 * m32c.opc (parse_bit3_S): New.
441 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
442 (btst): Add optional :G suffix for MACH32.
444 (pop.w:G): Add optional :G suffix for MACH16.
445 (push.b.imm): Fix syntax.
447 2006-03-10 DJ Delorie <dj@redhat.com>
449 * m32c.cpu (mul.l): New.
452 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
454 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
455 an error message otherwise.
456 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
457 Fix up comments to correctly describe the functions.
459 2006-02-24 DJ Delorie <dj@redhat.com>
461 * m32c.cpu (RL_TYPE): New attribute, with macros.
462 (Lab-8-24): Add RELAX.
463 (unary-insn-defn-g, binary-arith-imm-dst-defn,
464 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
465 (binary-arith-src-dst-defn): Add 2ADDR attribute.
466 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
467 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
469 (jsri16, jsri32): Add 1ADDR attribute.
470 (jsr32.w, jsr32.a): Add JUMP attribute.
472 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
473 Anil Paranjape <anilp1@kpitcummins.com>
474 Shilin Shakti <shilins@kpitcummins.com>
476 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
478 * xc16x.opc: New file containing supporting XC16C routines.
480 2006-02-10 Nick Clifton <nickc@redhat.com>
482 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
484 2006-01-06 DJ Delorie <dj@redhat.com>
486 * m32c.cpu (mov.w:q): Fix mode.
487 (push32.b.imm): Likewise, for the comment.
489 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
491 Second part of ms1 to mt renaming.
492 * mt.cpu (define-arch, define-isa): Set name to mt.
493 (define-mach): Adjust.
494 * mt.opc (CGEN_ASM_HASH): Update.
495 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
496 (parse_loopsize, parse_imm16): Adjust.
498 2005-12-13 DJ Delorie <dj@redhat.com>
500 * m32c.cpu (jsri): Fix order so register names aren't treated as
502 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
503 indexwd, indexws): Fix encodings.
505 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
507 * mt.cpu: Rename from ms1.cpu.
508 * mt.opc: Rename from ms1.opc.
510 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
512 * cris.cpu (simplecris-common-writable-specregs)
513 (simplecris-common-readable-specregs): Split from
514 simplecris-common-specregs. All users changed.
515 (cris-implemented-writable-specregs-v0)
516 (cris-implemented-readable-specregs-v0): Similar from
517 cris-implemented-specregs-v0.
518 (cris-implemented-writable-specregs-v3)
519 (cris-implemented-readable-specregs-v3)
520 (cris-implemented-writable-specregs-v8)
521 (cris-implemented-readable-specregs-v8)
522 (cris-implemented-writable-specregs-v10)
523 (cris-implemented-readable-specregs-v10)
524 (cris-implemented-writable-specregs-v32)
525 (cris-implemented-readable-specregs-v32): Similar.
526 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
527 insns and specializations.
529 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
532 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
534 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
535 f-cb2incr, f-rc3): New fields.
536 (LOOP): New instruction.
537 (JAL-HAZARD): New hazard.
538 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
540 (mul, muli, dbnz, iflush): Enable for ms2
541 (jal, reti): Has JAL-HAZARD.
542 (ldctxt, ldfb, stfb): Only ms1.
543 (fbcb): Only ms1,ms1-003.
544 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
545 fbcbincrs, mfbcbincrs): Enable for ms2.
546 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
547 * ms1.opc (parse_loopsize): New.
548 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
551 2005-10-28 Dave Brolley <brolley@redhat.com>
553 Contribute the following change:
554 2003-09-24 Dave Brolley <brolley@redhat.com>
556 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
557 CGEN_ATTR_VALUE_TYPE.
558 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
559 Use cgen_bitset_intersect_p.
561 2005-10-27 DJ Delorie <dj@redhat.com>
563 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
564 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
565 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
566 imm operand is needed.
567 (adjnz, sbjnz): Pass the right operands.
568 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
569 unary-insn): Add -g variants for opcodes that need to support :G.
570 (not.BW:G, push.BW:G): Call it.
571 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
572 stzx16-imm8-imm8-abs16): Fix operand typos.
573 * m32c.opc (m32c_asm_hash): Support bnCND.
574 (parse_signed4n, print_signed4n): New.
576 2005-10-26 DJ Delorie <dj@redhat.com>
578 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
579 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
580 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
582 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
583 (mov.BW:S r0,r1): Fix typo r1l->r1.
584 (tst): Allow :G suffix.
585 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
587 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
589 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
591 2005-10-25 DJ Delorie <dj@redhat.com>
593 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
594 making one a macro of the other.
596 2005-10-21 DJ Delorie <dj@redhat.com>
598 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
599 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
600 indexld, indexls): .w variants have `1' bit.
601 (rot32.b): QI, not SI.
602 (rot32.w): HI, not SI.
603 (xchg16): HI for .w variant.
605 2005-10-19 Nick Clifton <nickc@redhat.com>
607 * m32r.opc (parse_slo16): Fix bad application of previous patch.
609 2005-10-18 Andreas Schwab <schwab@suse.de>
611 * m32r.opc (parse_slo16): Better version of previous patch.
613 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
615 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
618 2005-07-25 DJ Delorie <dj@redhat.com>
620 * m32c.opc (parse_unsigned8): Add %dsp8().
621 (parse_signed8): Add %hi8().
622 (parse_unsigned16): Add %dsp16().
623 (parse_signed16): Add %lo16() and %hi16().
624 (parse_lab_5_3): Make valuep a bfd_vma *.
626 2005-07-18 Nick Clifton <nickc@redhat.com>
628 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
630 (f-lab32-jmp-s): Fix insertion sequence.
631 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
632 (Dsp-40-s8): Make parameter be signed.
633 (Dsp-40-s16): Likewise.
634 (Dsp-48-s8): Likewise.
635 (Dsp-48-s16): Likewise.
636 (Imm-13-u3): Likewise. (Despite its name!)
637 (BitBase16-16-s8): Make the parameter be unsigned.
638 (BitBase16-8-u11-S): Likewise.
639 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
640 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
643 * m32c.opc: Fix formatting.
644 Use safe-ctype.h instead of ctype.h
645 Move duplicated code sequences into a macro.
646 Fix compile time warnings about signedness mismatches.
648 (parse_lab_5_3): New parser function.
650 2005-07-16 Jim Blandy <jimb@redhat.com>
652 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
653 to represent isa sets.
655 2005-07-15 Jim Blandy <jimb@redhat.com>
657 * m32c.cpu, m32c.opc: Fix copyright.
659 2005-07-14 Jim Blandy <jimb@redhat.com>
661 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
663 2005-07-14 Alan Modra <amodra@bigpond.net.au>
665 * ms1.opc (print_dollarhex): Correct format string.
667 2005-07-06 Alan Modra <amodra@bigpond.net.au>
669 * iq2000.cpu: Include from binutils cpu dir.
671 2005-07-05 Nick Clifton <nickc@redhat.com>
673 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
674 unsigned in order to avoid compile time warnings about sign
677 * ms1.opc (parse_*): Likewise.
678 (parse_imm16): Use a "void *" as it is passed both signed and
681 2005-07-01 Nick Clifton <nickc@redhat.com>
683 * frv.opc: Update to ISO C90 function declaration style.
684 * iq2000.opc: Likewise.
685 * m32r.opc: Likewise.
688 2005-06-15 Dave Brolley <brolley@redhat.com>
690 Contributed by Red Hat.
691 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
692 * ms1.opc: New file. Written by Stan Cox.
694 2005-05-10 Nick Clifton <nickc@redhat.com>
696 * Update the address and phone number of the FSF organization in
697 the GPL notices in the following files:
698 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
699 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
700 sh64-media.cpu, simplify.inc
702 2005-02-24 Alan Modra <amodra@bigpond.net.au>
704 * frv.opc (parse_A): Warning fix.
706 2005-02-23 Nick Clifton <nickc@redhat.com>
708 * frv.opc: Fixed compile time warnings about differing signed'ness
709 of pointers passed to functions.
710 * m32r.opc: Likewise.
712 2005-02-11 Nick Clifton <nickc@redhat.com>
714 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
715 'bfd_vma *' in order avoid compile time warning message.
717 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
719 * cris.cpu (mstep): Add missing insn.
721 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
723 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
724 * frv.cpu: Add support for TLS annotations in loads and calll.
725 * frv.opc (parse_symbolic_address): New.
726 (parse_ldd_annotation): New.
727 (parse_call_annotation): New.
728 (parse_ld_annotation): New.
729 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
730 Introduce TLS relocations.
731 (parse_d12, parse_s12, parse_u12): Likewise.
732 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
733 (parse_call_label, print_at): New.
735 2004-12-21 Mikael Starvik <starvik@axis.com>
737 * cris.cpu (cris-set-mem): Correct integral write semantics.
739 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
741 * cris.cpu: New file.
743 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
745 * iq2000.cpu: Added quotes around macro arguments so that they
746 will work with newer versions of guile.
748 2004-10-27 Nick Clifton <nickc@redhat.com>
750 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
751 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
753 * iq2000.cpu (dnop index): Rename to _index to avoid complications
756 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
758 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
760 2004-05-15 Nick Clifton <nickc@redhat.com>
762 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
764 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
766 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
768 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
770 * frv.cpu (define-arch frv): Add fr450 mach.
771 (define-mach fr450): New.
772 (define-model fr450): New. Add profile units to every fr450 insn.
773 (define-attr UNIT): Add MDCUTSSI.
774 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
775 (define-attr AUDIO): New boolean.
776 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
777 (f-LRA-null, f-TLBPR-null): New fields.
778 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
779 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
780 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
781 (LRA-null, TLBPR-null): New macros.
782 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
783 (load-real-address): New macro.
784 (lrai, lrad, tlbpr): New instructions.
785 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
786 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
787 (mdcutssi): Change UNIT attribute to MDCUTSSI.
788 (media-low-clear-semantics, media-scope-limit-semantics)
789 (media-quad-limit, media-quad-shift): New macros.
790 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
791 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
792 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
793 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
794 (fr450_unit_mapping): New array.
795 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
796 for new MDCUTSSI unit.
797 (fr450_check_insn_major_constraints): New function.
798 (check_insn_major_constraints): Use it.
800 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
802 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
803 (scutss): Change unit to I0.
804 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
805 (mqsaths): Fix FR400-MAJOR categorization.
806 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
807 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
808 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
811 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
813 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
814 (rstb, rsth, rst, rstd, rstq): Delete.
815 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
817 2004-02-23 Nick Clifton <nickc@redhat.com>
819 * Apply these patches from Renesas:
821 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
823 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
824 disassembling codes for 0x*2 addresses.
826 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
828 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
830 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
832 * cpu/m32r.cpu : Add new model m32r2.
833 Add new instructions.
834 Replace occurrances of 'Mitsubishi' with 'Renesas'.
835 Changed PIPE attr of push from O to OS.
836 Care for Little-endian of M32R.
837 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
838 Care for Little-endian of M32R.
839 (parse_slo16): signed extension for value.
841 2004-02-20 Andrew Cagney <cagney@redhat.com>
843 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
844 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
846 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
847 written by Ben Elliston.
849 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
851 * frv.cpu (UNIT): Add IACC.
852 (iacc-multiply-r-r): Use it.
853 * frv.opc (fr400_unit_mapping): Add entry for IACC.
854 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
856 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
858 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
859 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
860 cut&paste errors in shifting/truncating numerical operands.
861 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
862 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
863 (parse_uslo16): Likewise.
864 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
865 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
866 (parse_s12): Likewise.
867 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
868 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
869 (parse_uslo16): Likewise.
870 (parse_uhi16): Parse gothi and gotfuncdeschi.
871 (parse_d12): Parse got12 and gotfuncdesc12.
872 (parse_s12): Likewise.
874 2003-10-10 Dave Brolley <brolley@redhat.com>
876 * frv.cpu (dnpmop): New p-macro.
877 (GRdoublek): Use dnpmop.
878 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
879 (store-double-r-r): Use (.sym regtype doublek).
880 (r-store-double): Ditto.
881 (store-double-r-r-u): Ditto.
882 (conditional-store-double): Ditto.
883 (conditional-store-double-u): Ditto.
884 (store-double-r-simm): Ditto.
885 (fmovs): Assign to UNIT FMALL.
887 2003-10-06 Dave Brolley <brolley@redhat.com>
889 * frv.cpu, frv.opc: Add support for fr550.
891 2003-09-24 Dave Brolley <brolley@redhat.com>
893 * frv.cpu (u-commit): New modelling unit for fr500.
894 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
895 (commit-r): Use u-commit model for fr500.
897 (conditional-float-binary-op): Take profiling data as an argument.
899 (ne-float-binary-op): Ditto.
901 2003-09-19 Michael Snyder <msnyder@redhat.com>
903 * frv.cpu (nldqi): Delete unimplemented instruction.
905 2003-09-12 Dave Brolley <brolley@redhat.com>
907 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
908 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
909 frv_ref_SI to get input register referenced for profiling.
910 (clear-ne-flag-all): Pass insn profiling in as an argument.
911 (clrgr,clrfr,clrga,clrfa): Add profiling information.
913 2003-09-11 Michael Snyder <msnyder@redhat.com>
915 * frv.cpu: Typographical corrections.
917 2003-09-09 Dave Brolley <brolley@redhat.com>
919 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
920 (conditional-media-dual-complex, media-quad-complex): Likewise.
922 2003-09-04 Dave Brolley <brolley@redhat.com>
924 * frv.cpu (register-transfer): Pass in all attributes in on argument.
926 (conditional-register-transfer): Ditto.
927 (cache-preload): Ditto.
928 (floating-point-conversion): Ditto.
929 (floating-point-neg): Ditto.
931 (float-binary-op-s): Ditto.
932 (conditional-float-binary-op): Ditto.
933 (ne-float-binary-op): Ditto.
934 (float-dual-arith): Ditto.
935 (ne-float-dual-arith): Ditto.
937 2003-09-03 Dave Brolley <brolley@redhat.com>
939 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
940 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
942 (A): Removed operand.
943 (A0,A1): New operands replace operand A.
944 (mnop): Now a real insn
945 (mclracc): Removed insn.
946 (mclracc-0, mclracc-1): New insns replace mclracc.
947 (all insns): Use new UNIT attributes.
949 2003-08-21 Nick Clifton <nickc@redhat.com>
951 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
952 and u-media-dual-btoh with output parameter.
953 (cmbtoh): Add profiling hack.
955 2003-08-19 Michael Snyder <msnyder@redhat.com>
957 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
959 2003-06-10 Doug Evans <dje@sebabeach.org>
961 * frv.cpu: Add IDOC attribute.
963 2003-06-06 Andrew Cagney <cagney@redhat.com>
965 Contributed by Red Hat.
966 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
967 Stan Cox, and Frank Ch. Eigler.
968 * iq2000.opc: New file. Written by Ben Elliston, Frank
969 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
970 * iq2000m.cpu: New file. Written by Jeff Johnston.
971 * iq10.cpu: New file. Written by Jeff Johnston.
973 2003-06-05 Nick Clifton <nickc@redhat.com>
975 * frv.cpu (FRintieven): New operand. An even-numbered only
976 version of the FRinti operand.
977 (FRintjeven): Likewise for FRintj.
978 (FRintkeven): Likewise for FRintk.
979 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
980 media-quad-arith-sat-semantics, media-quad-arith-sat,
981 conditional-media-quad-arith-sat, mdunpackh,
982 media-quad-multiply-semantics, media-quad-multiply,
983 conditional-media-quad-multiply, media-quad-complex-i,
984 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
985 conditional-media-quad-multiply-acc, munpackh,
986 media-quad-multiply-cross-acc-semantics, mdpackh,
987 media-quad-multiply-cross-acc, mbtoh-semantics,
988 media-quad-cross-multiply-cross-acc-semantics,
989 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
990 media-quad-cross-multiply-acc-semantics, cmbtoh,
991 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
992 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
993 cmhtob): Use new operands.
994 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
995 (parse_even_register): New function.
997 2003-06-03 Nick Clifton <nickc@redhat.com>
999 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1000 immediate value not unsigned.
1002 2003-06-03 Andrew Cagney <cagney@redhat.com>
1004 Contributed by Red Hat.
1005 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1006 and Eric Christopher.
1007 * frv.opc: New file. Written by Catherine Moore, and Dave
1009 * simplify.inc: New file. Written by Doug Evans.
1011 2003-05-02 Andrew Cagney <cagney@redhat.com>
1016 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1018 Copying and distribution of this file, with or without modification,
1019 are permitted in any medium without royalty provided the copyright
1020 notice and this notice are preserved.
1026 version-control: never